Boot log: asus-C436FA-Flip-hatch

    1 17:26:31.411611  lava-dispatcher, installed at version: 2022.06
    2 17:26:31.411804  start: 0 validate
    3 17:26:31.411937  Start time: 2022-08-03 17:26:31.411929+00:00 (UTC)
    4 17:26:31.412069  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:26:31.412197  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220718.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:26:31.712398  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:26:31.713206  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:26:32.001282  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:26:32.001980  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220718.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:26:32.295854  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:26:32.296567  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:26:32.586259  validate duration: 1.17
   14 17:26:32.586593  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:26:32.586706  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:26:32.586795  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:26:32.586888  Not decompressing ramdisk as can be used compressed.
   18 17:26:32.586969  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220718.0/amd64/initrd.cpio.gz
   19 17:26:32.587034  saving as /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/ramdisk/initrd.cpio.gz
   20 17:26:32.587093  total size: 5411033 (5MB)
   21 17:26:32.588232  progress   0% (0MB)
   22 17:26:32.589712  progress   5% (0MB)
   23 17:26:32.591033  progress  10% (0MB)
   24 17:26:32.592360  progress  15% (0MB)
   25 17:26:32.593876  progress  20% (1MB)
   26 17:26:32.595196  progress  25% (1MB)
   27 17:26:32.596543  progress  30% (1MB)
   28 17:26:32.597902  progress  35% (1MB)
   29 17:26:32.599335  progress  40% (2MB)
   30 17:26:32.600618  progress  45% (2MB)
   31 17:26:32.601929  progress  50% (2MB)
   32 17:26:32.603182  progress  55% (2MB)
   33 17:26:32.604611  progress  60% (3MB)
   34 17:26:32.605902  progress  65% (3MB)
   35 17:26:32.607188  progress  70% (3MB)
   36 17:26:32.608475  progress  75% (3MB)
   37 17:26:32.610000  progress  80% (4MB)
   38 17:26:32.611285  progress  85% (4MB)
   39 17:26:32.612538  progress  90% (4MB)
   40 17:26:32.613887  progress  95% (4MB)
   41 17:26:32.615361  progress 100% (5MB)
   42 17:26:32.615534  5MB downloaded in 0.03s (181.47MB/s)
   43 17:26:32.615687  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:26:32.615929  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:26:32.616017  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:26:32.616102  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:26:32.616206  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:26:32.616273  saving as /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/kernel/bzImage
   50 17:26:32.616333  total size: 6815632 (6MB)
   51 17:26:32.616392  No compression specified
   52 17:26:32.617560  progress   0% (0MB)
   53 17:26:32.619323  progress   5% (0MB)
   54 17:26:32.620909  progress  10% (0MB)
   55 17:26:32.622976  progress  15% (1MB)
   56 17:26:32.624646  progress  20% (1MB)
   57 17:26:32.626376  progress  25% (1MB)
   58 17:26:32.628195  progress  30% (1MB)
   59 17:26:32.629926  progress  35% (2MB)
   60 17:26:32.631656  progress  40% (2MB)
   61 17:26:32.633267  progress  45% (2MB)
   62 17:26:32.634821  progress  50% (3MB)
   63 17:26:32.636513  progress  55% (3MB)
   64 17:26:32.638186  progress  60% (3MB)
   65 17:26:32.639881  progress  65% (4MB)
   66 17:26:32.641535  progress  70% (4MB)
   67 17:26:32.643089  progress  75% (4MB)
   68 17:26:32.644780  progress  80% (5MB)
   69 17:26:32.646418  progress  85% (5MB)
   70 17:26:32.648148  progress  90% (5MB)
   71 17:26:32.649760  progress  95% (6MB)
   72 17:26:32.651334  progress 100% (6MB)
   73 17:26:32.651611  6MB downloaded in 0.04s (184.28MB/s)
   74 17:26:32.651759  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:26:32.651995  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:26:32.652083  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:26:32.652170  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:26:32.652275  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220718.0/amd64/full.rootfs.tar.xz
   80 17:26:32.652341  saving as /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/nfsrootfs/full.rootfs.tar
   81 17:26:32.652400  total size: 207105224 (197MB)
   82 17:26:32.652460  Using unxz to decompress xz
   83 17:26:32.655928  progress   0% (0MB)
   84 17:26:33.214349  progress   5% (9MB)
   85 17:26:33.743116  progress  10% (19MB)
   86 17:26:34.333914  progress  15% (29MB)
   87 17:26:34.693627  progress  20% (39MB)
   88 17:26:35.058545  progress  25% (49MB)
   89 17:26:35.651263  progress  30% (59MB)
   90 17:26:36.202214  progress  35% (69MB)
   91 17:26:36.796438  progress  40% (79MB)
   92 17:26:37.348184  progress  45% (88MB)
   93 17:26:37.922996  progress  50% (98MB)
   94 17:26:38.546834  progress  55% (108MB)
   95 17:26:39.221828  progress  60% (118MB)
   96 17:26:39.373137  progress  65% (128MB)
   97 17:26:39.519590  progress  70% (138MB)
   98 17:26:39.613785  progress  75% (148MB)
   99 17:26:39.686912  progress  80% (158MB)
  100 17:26:39.760794  progress  85% (167MB)
  101 17:26:39.885415  progress  90% (177MB)
  102 17:26:40.153832  progress  95% (187MB)
  103 17:26:40.738747  progress 100% (197MB)
  104 17:26:40.744128  197MB downloaded in 8.09s (24.41MB/s)
  105 17:26:40.744387  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 17:26:40.744655  end: 1.3 download-retry (duration 00:00:08) [common]
  108 17:26:40.744749  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:26:40.744839  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:26:40.744986  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:26:40.745090  saving as /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/modules/modules.tar
  112 17:26:40.745157  total size: 51872 (0MB)
  113 17:26:40.745222  Using unxz to decompress xz
  114 17:26:40.748472  progress  63% (0MB)
  115 17:26:40.748843  progress 100% (0MB)
  116 17:26:40.752117  0MB downloaded in 0.01s (7.11MB/s)
  117 17:26:40.752331  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 17:26:40.752589  end: 1.4 download-retry (duration 00:00:00) [common]
  120 17:26:40.752687  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 17:26:40.752784  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 17:26:42.803108  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6962840/extract-nfsrootfs-ft85wguk
  123 17:26:42.803318  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 17:26:42.803421  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 17:26:42.803557  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h
  126 17:26:42.803659  makedir: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin
  127 17:26:42.803743  makedir: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/tests
  128 17:26:42.803829  makedir: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/results
  129 17:26:42.803928  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-add-keys
  130 17:26:42.804061  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-add-sources
  131 17:26:42.804177  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-background-process-start
  132 17:26:42.804291  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-background-process-stop
  133 17:26:42.804404  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-common-functions
  134 17:26:42.804515  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-echo-ipv4
  135 17:26:42.804625  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-install-packages
  136 17:26:42.804735  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-installed-packages
  137 17:26:42.804846  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-os-build
  138 17:26:42.804960  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-probe-channel
  139 17:26:42.805108  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-probe-ip
  140 17:26:42.805217  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-target-ip
  141 17:26:42.805325  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-target-mac
  142 17:26:42.805433  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-target-storage
  143 17:26:42.805545  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-case
  144 17:26:42.805655  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-event
  145 17:26:42.805763  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-feedback
  146 17:26:42.805871  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-raise
  147 17:26:42.805978  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-reference
  148 17:26:42.806088  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-runner
  149 17:26:42.806197  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-set
  150 17:26:42.806303  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-test-shell
  151 17:26:42.806413  Updating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-add-keys (debian)
  152 17:26:42.806526  Updating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-add-sources (debian)
  153 17:26:42.806639  Updating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-install-packages (debian)
  154 17:26:42.806750  Updating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-installed-packages (debian)
  155 17:26:42.806860  Updating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/bin/lava-os-build (debian)
  156 17:26:42.806956  Creating /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/environment
  157 17:26:42.807042  LAVA metadata
  158 17:26:42.807108  - LAVA_JOB_ID=6962840
  159 17:26:42.807171  - LAVA_DISPATCHER_IP=192.168.201.1
  160 17:26:42.807268  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 17:26:42.807335  skipped lava-vland-overlay
  162 17:26:42.807412  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 17:26:42.807493  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 17:26:42.807555  skipped lava-multinode-overlay
  165 17:26:42.807628  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 17:26:42.807709  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 17:26:42.807780  Loading test definitions
  168 17:26:42.807870  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 17:26:42.807944  Using /lava-6962840 at stage 0
  170 17:26:42.808174  uuid=6962840_1.5.2.3.1 testdef=None
  171 17:26:42.808264  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 17:26:42.808351  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 17:26:42.808770  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 17:26:42.809241  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 17:26:42.809732  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 17:26:42.809975  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 17:26:42.810432  runner path: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/0/tests/0_timesync-off test_uuid 6962840_1.5.2.3.1
  180 17:26:42.810580  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 17:26:42.810813  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 17:26:42.810888  Using /lava-6962840 at stage 0
  184 17:26:42.810985  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 17:26:42.811065  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/0/tests/1_kselftest-futex'
  186 17:26:46.308170  Running '/usr/bin/git checkout kernelci.org
  187 17:26:46.439619  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
  188 17:26:46.440280  uuid=6962840_1.5.2.3.5 testdef=None
  189 17:26:46.440435  end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
  191 17:26:46.440685  start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
  192 17:26:46.441433  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 17:26:46.441691  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
  195 17:26:46.442547  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 17:26:46.442793  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
  198 17:26:46.443681  runner path: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/0/tests/1_kselftest-futex test_uuid 6962840_1.5.2.3.5
  199 17:26:46.443770  BOARD='asus-C436FA-Flip-hatch'
  200 17:26:46.443837  BRANCH='cip-gitlab'
  201 17:26:46.443898  SKIPFILE='skipfile-lkft.yaml'
  202 17:26:46.443959  TESTPROG_URL='None'
  203 17:26:46.444019  TST_CASENAME=''
  204 17:26:46.444076  TST_CMDFILES='futex'
  205 17:26:46.444206  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 17:26:46.444416  Creating lava-test-runner.conf files
  208 17:26:46.444482  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6962840/lava-overlay-xync7s3h/lava-6962840/0 for stage 0
  209 17:26:46.444566  - 0_timesync-off
  210 17:26:46.444638  - 1_kselftest-futex
  211 17:26:46.444729  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  212 17:26:46.444816  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  213 17:26:53.593041  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 17:26:53.593207  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
  215 17:26:53.593304  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 17:26:53.593406  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  217 17:26:53.593500  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
  218 17:26:53.694274  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 17:26:53.694624  start: 1.5.4 extract-modules (timeout 00:09:39) [common]
  220 17:26:53.694734  extracting modules file /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962840/extract-nfsrootfs-ft85wguk
  221 17:26:53.698754  extracting modules file /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962840/extract-overlay-ramdisk-zeiaymu7/ramdisk
  222 17:26:53.702538  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 17:26:53.702647  start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
  224 17:26:53.702733  [common] Applying overlay to NFS
  225 17:26:53.702804  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6962840/compress-overlay-052pbk91/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6962840/extract-nfsrootfs-ft85wguk
  226 17:26:54.141674  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 17:26:54.141845  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  228 17:26:54.141945  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 17:26:54.142042  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  230 17:26:54.142131  Building ramdisk /var/lib/lava/dispatcher/tmp/6962840/extract-overlay-ramdisk-zeiaymu7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6962840/extract-overlay-ramdisk-zeiaymu7/ramdisk
  231 17:26:54.175234  >> 24431 blocks

  232 17:26:54.632052  rename /var/lib/lava/dispatcher/tmp/6962840/extract-overlay-ramdisk-zeiaymu7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
  233 17:26:54.632449  end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
  234 17:26:54.632575  start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
  235 17:26:54.632683  start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
  236 17:26:54.632782  No mkimage arch provided, not using FIT.
  237 17:26:54.632874  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 17:26:54.632982  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 17:26:54.633098  end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
  240 17:26:54.633189  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
  241 17:26:54.633268  No LXC device requested
  242 17:26:54.633350  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 17:26:54.633437  start: 1.7 deploy-device-env (timeout 00:09:38) [common]
  244 17:26:54.633520  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 17:26:54.633589  Checking files for TFTP limit of 4294967296 bytes.
  246 17:26:54.633966  end: 1 tftp-deploy (duration 00:00:22) [common]
  247 17:26:54.634071  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 17:26:54.634165  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 17:26:54.634292  substitutions:
  250 17:26:54.634361  - {DTB}: None
  251 17:26:54.634426  - {INITRD}: 6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
  252 17:26:54.634487  - {KERNEL}: 6962840/tftp-deploy-oe08rtiq/kernel/bzImage
  253 17:26:54.634547  - {LAVA_MAC}: None
  254 17:26:54.634605  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6962840/extract-nfsrootfs-ft85wguk
  255 17:26:54.634665  - {NFS_SERVER_IP}: 192.168.201.1
  256 17:26:54.634722  - {PRESEED_CONFIG}: None
  257 17:26:54.634780  - {PRESEED_LOCAL}: None
  258 17:26:54.634836  - {RAMDISK}: 6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
  259 17:26:54.634892  - {ROOT_PART}: None
  260 17:26:54.634948  - {ROOT}: None
  261 17:26:54.635004  - {SERVER_IP}: 192.168.201.1
  262 17:26:54.635059  - {TEE}: None
  263 17:26:54.635115  Parsed boot commands:
  264 17:26:54.635171  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 17:26:54.635320  Parsed boot commands: tftpboot 192.168.201.1 6962840/tftp-deploy-oe08rtiq/kernel/bzImage 6962840/tftp-deploy-oe08rtiq/kernel/cmdline 6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
  266 17:26:54.635413  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 17:26:54.635501  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 17:26:54.635597  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 17:26:54.635684  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 17:26:54.635754  Not connected, no need to disconnect.
  271 17:26:54.635830  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 17:26:54.635912  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 17:26:54.636011  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 17:26:54.638844  Setting prompt string to ['lava-test: # ']
  275 17:26:54.639124  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 17:26:54.639228  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 17:26:54.639326  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 17:26:54.639418  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 17:26:54.639595  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 17:26:54.658834  >> Command sent successfully.

  281 17:26:54.660739  Returned 0 in 0 seconds
  282 17:26:54.761832  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 17:26:54.763220  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 17:26:54.763721  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 17:26:54.764226  Setting prompt string to 'Starting depthcharge on Helios...'
  287 17:26:54.764569  Changing prompt to 'Starting depthcharge on Helios...'
  288 17:26:54.764931  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 17:26:54.766160  [Enter `^Ec?' for help]
  290 17:27:00.949781  
  291 17:27:00.950378  
  292 17:27:00.959873  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 17:27:00.963428  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 17:27:00.970045  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 17:27:00.973385  CPU: AES supported, TXT NOT supported, VT supported
  296 17:27:00.980010  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 17:27:00.982743  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 17:27:00.990059  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 17:27:00.992792  VBOOT: Loading verstage.
  300 17:27:00.996110  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 17:27:01.002963  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 17:27:01.009370  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 17:27:01.009948  CBFS @ c08000 size 3f8000
  304 17:27:01.016020  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 17:27:01.020059  CBFS: Locating 'fallback/verstage'
  306 17:27:01.023328  CBFS: Found @ offset 10fb80 size 1072c
  307 17:27:01.027431  
  308 17:27:01.028027  
  309 17:27:01.036804  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 17:27:01.052185  Probing TPM: . done!
  311 17:27:01.054344  TPM ready after 0 ms
  312 17:27:01.057789  Connected to device vid:did:rid of 1ae0:0028:00
  313 17:27:01.067947  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 17:27:01.072209  Initialized TPM device CR50 revision 0
  315 17:27:01.107641  tlcl_send_startup: Startup return code is 0
  316 17:27:01.108191  TPM: setup succeeded
  317 17:27:01.119897  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 17:27:01.123547  Chrome EC: UHEPI supported
  319 17:27:01.127265  Phase 1
  320 17:27:01.129839  FMAP: area GBB found @ c05000 (12288 bytes)
  321 17:27:01.137101  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 17:27:01.139870  Phase 2
  323 17:27:01.140353  Phase 3
  324 17:27:01.143566  FMAP: area GBB found @ c05000 (12288 bytes)
  325 17:27:01.150368  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 17:27:01.157010  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  327 17:27:01.159981  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  328 17:27:01.166908  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 17:27:01.182127  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  330 17:27:01.185638  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  331 17:27:01.191994  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 17:27:01.196409  Phase 4
  333 17:27:01.199575  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  334 17:27:01.206398  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 17:27:01.386128  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 17:27:01.392769  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 17:27:01.393287  Saving nvdata
  338 17:27:01.395496  Reboot requested (10020007)
  339 17:27:01.398982  board_reset() called!
  340 17:27:01.399498  full_reset() called!
  341 17:27:05.917442  
  342 17:27:05.917630  
  343 17:27:05.926423  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 17:27:05.930120  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 17:27:05.936390  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 17:27:05.939854  CPU: AES supported, TXT NOT supported, VT supported
  347 17:27:05.946589  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 17:27:05.949915  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 17:27:05.956511  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 17:27:05.959922  VBOOT: Loading verstage.
  351 17:27:05.963121  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 17:27:05.969850  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 17:27:05.976880  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 17:27:05.977018  CBFS @ c08000 size 3f8000
  355 17:27:05.982960  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 17:27:05.986676  CBFS: Locating 'fallback/verstage'
  357 17:27:05.989547  CBFS: Found @ offset 10fb80 size 1072c
  358 17:27:05.993474  
  359 17:27:05.993558  
  360 17:27:06.003482  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 17:27:06.018822  Probing TPM: . done!
  362 17:27:06.021515  TPM ready after 0 ms
  363 17:27:06.024852  Connected to device vid:did:rid of 1ae0:0028:00
  364 17:27:06.035076  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 17:27:06.038276  Initialized TPM device CR50 revision 0
  366 17:27:06.073698  tlcl_send_startup: Startup return code is 0
  367 17:27:06.073786  TPM: setup succeeded
  368 17:27:06.086647  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 17:27:06.090095  Chrome EC: UHEPI supported
  370 17:27:06.093913  Phase 1
  371 17:27:06.096669  FMAP: area GBB found @ c05000 (12288 bytes)
  372 17:27:06.103503  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 17:27:06.110090  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 17:27:06.113105  Recovery requested (1009000e)
  375 17:27:06.119201  Saving nvdata
  376 17:27:06.125356  tlcl_extend: response is 0
  377 17:27:06.133875  tlcl_extend: response is 0
  378 17:27:06.140811  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 17:27:06.144528  CBFS @ c08000 size 3f8000
  380 17:27:06.151434  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 17:27:06.154454  CBFS: Locating 'fallback/romstage'
  382 17:27:06.157831  CBFS: Found @ offset 80 size 145fc
  383 17:27:06.161332  Accumulated console time in verstage 99 ms
  384 17:27:06.161418  
  385 17:27:06.161486  
  386 17:27:06.174829  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 17:27:06.180727  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 17:27:06.184242  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 17:27:06.187197  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 17:27:06.193985  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 17:27:06.197678  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 17:27:06.200539  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  393 17:27:06.203971  TCO_STS:   0000 0000
  394 17:27:06.207131  GEN_PMCON: e0015238 00000200
  395 17:27:06.210789  GBLRST_CAUSE: 00000000 00000000
  396 17:27:06.210874  prev_sleep_state 5
  397 17:27:06.214071  Boot Count incremented to 34252
  398 17:27:06.220909  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 17:27:06.225130  CBFS @ c08000 size 3f8000
  400 17:27:06.230830  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 17:27:06.230908  CBFS: Locating 'fspm.bin'
  402 17:27:06.237102  CBFS: Found @ offset 5ffc0 size 71000
  403 17:27:06.240434  Chrome EC: UHEPI supported
  404 17:27:06.247419  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 17:27:06.250705  Probing TPM:  done!
  406 17:27:06.257673  Connected to device vid:did:rid of 1ae0:0028:00
  407 17:27:06.267823  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 17:27:06.273745  Initialized TPM device CR50 revision 0
  409 17:27:06.282764  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 17:27:06.289102  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 17:27:06.292801  MRC cache found, size 1948
  412 17:27:06.295948  bootmode is set to: 2
  413 17:27:06.299168  PRMRR disabled by config.
  414 17:27:06.303048  SPD INDEX = 1
  415 17:27:06.305557  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 17:27:06.309122  CBFS @ c08000 size 3f8000
  417 17:27:06.315847  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 17:27:06.315930  CBFS: Locating 'spd.bin'
  419 17:27:06.319133  CBFS: Found @ offset 5fb80 size 400
  420 17:27:06.321860  SPD: module type is LPDDR3
  421 17:27:06.325423  SPD: module part is 
  422 17:27:06.331884  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 17:27:06.335342  SPD: device width 4 bits, bus width 8 bits
  424 17:27:06.338691  SPD: module size is 4096 MB (per channel)
  425 17:27:06.342127  memory slot: 0 configuration done.
  426 17:27:06.345321  memory slot: 2 configuration done.
  427 17:27:06.397058  CBMEM:
  428 17:27:06.400859  IMD: root @ 99fff000 254 entries.
  429 17:27:06.403609  IMD: root @ 99ffec00 62 entries.
  430 17:27:06.407040  External stage cache:
  431 17:27:06.410290  IMD: root @ 9abff000 254 entries.
  432 17:27:06.413418  IMD: root @ 9abfec00 62 entries.
  433 17:27:06.419982  Chrome EC: clear events_b mask to 0x0000000020004000
  434 17:27:06.433291  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 17:27:06.446442  tlcl_write: response is 0
  436 17:27:06.455574  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 17:27:06.461759  MRC: TPM MRC hash updated successfully.
  438 17:27:06.461835  2 DIMMs found
  439 17:27:06.464948  SMM Memory Map
  440 17:27:06.468703  SMRAM       : 0x9a000000 0x1000000
  441 17:27:06.471814   Subregion 0: 0x9a000000 0xa00000
  442 17:27:06.474821   Subregion 1: 0x9aa00000 0x200000
  443 17:27:06.478560   Subregion 2: 0x9ac00000 0x400000
  444 17:27:06.482146  top_of_ram = 0x9a000000
  445 17:27:06.484872  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 17:27:06.492238  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 17:27:06.495502  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 17:27:06.501651  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 17:27:06.504900  CBFS @ c08000 size 3f8000
  450 17:27:06.508810  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 17:27:06.511467  CBFS: Locating 'fallback/postcar'
  452 17:27:06.518153  CBFS: Found @ offset 107000 size 4b44
  453 17:27:06.525133  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 17:27:06.535407  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 17:27:06.537937  Processing 180 relocs. Offset value of 0x97c0c000
  456 17:27:06.546178  Accumulated console time in romstage 286 ms
  457 17:27:06.546256  
  458 17:27:06.546323  
  459 17:27:06.555835  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 17:27:06.562955  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 17:27:06.565641  CBFS @ c08000 size 3f8000
  462 17:27:06.572337  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 17:27:06.575893  CBFS: Locating 'fallback/ramstage'
  464 17:27:06.579241  CBFS: Found @ offset 43380 size 1b9e8
  465 17:27:06.585605  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 17:27:06.617749  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 17:27:06.621042  Processing 3976 relocs. Offset value of 0x98db0000
  468 17:27:06.628056  Accumulated console time in postcar 52 ms
  469 17:27:06.628142  
  470 17:27:06.628209  
  471 17:27:06.638027  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 17:27:06.645074  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 17:27:06.647900  WARNING: RO_VPD is uninitialized or empty.
  474 17:27:06.651601  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 17:27:06.657651  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 17:27:06.657737  Normal boot.
  477 17:27:06.664569  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 17:27:06.667830  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 17:27:06.671389  CBFS @ c08000 size 3f8000
  480 17:27:06.678191  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 17:27:06.681510  CBFS: Locating 'cpu_microcode_blob.bin'
  482 17:27:06.684634  CBFS: Found @ offset 14700 size 2ec00
  483 17:27:06.687706  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 17:27:06.690752  Skip microcode update
  485 17:27:06.697377  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 17:27:06.697462  CBFS @ c08000 size 3f8000
  487 17:27:06.704886  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 17:27:06.707847  CBFS: Locating 'fsps.bin'
  489 17:27:06.710999  CBFS: Found @ offset d1fc0 size 35000
  490 17:27:06.736449  Detected 4 core, 8 thread CPU.
  491 17:27:06.739801  Setting up SMI for CPU
  492 17:27:06.742659  IED base = 0x9ac00000
  493 17:27:06.742744  IED size = 0x00400000
  494 17:27:06.745893  Will perform SMM setup.
  495 17:27:06.752726  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 17:27:06.759597  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 17:27:06.762731  Processing 16 relocs. Offset value of 0x00030000
  498 17:27:06.766304  Attempting to start 7 APs
  499 17:27:06.770156  Waiting for 10ms after sending INIT.
  500 17:27:06.786328  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
  501 17:27:06.786414  done.
  502 17:27:06.789203  AP: slot 5 apic_id 5.
  503 17:27:06.793136  AP: slot 7 apic_id 4.
  504 17:27:06.793221  AP: slot 1 apic_id 2.
  505 17:27:06.796005  AP: slot 4 apic_id 3.
  506 17:27:06.799217  AP: slot 6 apic_id 6.
  507 17:27:06.799302  AP: slot 3 apic_id 7.
  508 17:27:06.805947  Waiting for 2nd SIPI to complete...done.
  509 17:27:06.812403  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 17:27:06.819155  Processing 13 relocs. Offset value of 0x00038000
  511 17:27:06.822622  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 17:27:06.829763  Installing SMM handler to 0x9a000000
  513 17:27:06.835797  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 17:27:06.842842  Processing 658 relocs. Offset value of 0x9a010000
  515 17:27:06.848821  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 17:27:06.851981  Processing 13 relocs. Offset value of 0x9a008000
  517 17:27:06.859309  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 17:27:06.865223  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 17:27:06.872228  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 17:27:06.875385  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 17:27:06.882264  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 17:27:06.888510  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 17:27:06.892089  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 17:27:06.899047  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 17:27:06.902301  Clearing SMI status registers
  526 17:27:06.905639  SMI_STS: PM1 
  527 17:27:06.905723  PM1_STS: PWRBTN 
  528 17:27:06.909117  TCO_STS: SECOND_TO 
  529 17:27:06.912000  New SMBASE 0x9a000000
  530 17:27:06.915666  In relocation handler: CPU 0
  531 17:27:06.918900  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 17:27:06.922529  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 17:27:06.925289  Relocation complete.
  534 17:27:06.928847  New SMBASE 0x99fff800
  535 17:27:06.928932  In relocation handler: CPU 2
  536 17:27:06.935908  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  537 17:27:06.938986  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 17:27:06.942343  Relocation complete.
  539 17:27:06.945270  New SMBASE 0x99fff000
  540 17:27:06.945356  In relocation handler: CPU 4
  541 17:27:06.952207  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  542 17:27:06.955580  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 17:27:06.958588  Relocation complete.
  544 17:27:06.958674  New SMBASE 0x99fffc00
  545 17:27:06.962060  In relocation handler: CPU 1
  546 17:27:06.968750  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  547 17:27:06.971909  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 17:27:06.975838  Relocation complete.
  549 17:27:06.975923  New SMBASE 0x99ffe400
  550 17:27:06.978552  In relocation handler: CPU 7
  551 17:27:06.983136  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  552 17:27:06.989042  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 17:27:06.992643  Relocation complete.
  554 17:27:06.992727  New SMBASE 0x99ffec00
  555 17:27:06.995143  In relocation handler: CPU 5
  556 17:27:06.998509  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  557 17:27:07.005426  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 17:27:07.008418  Relocation complete.
  559 17:27:07.008503  New SMBASE 0x99fff400
  560 17:27:07.011556  In relocation handler: CPU 3
  561 17:27:07.015166  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  562 17:27:07.021591  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 17:27:07.021676  Relocation complete.
  564 17:27:07.025119  New SMBASE 0x99ffe800
  565 17:27:07.028609  In relocation handler: CPU 6
  566 17:27:07.031913  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  567 17:27:07.038147  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 17:27:07.038232  Relocation complete.
  569 17:27:07.041509  Initializing CPU #0
  570 17:27:07.044865  CPU: vendor Intel device 806ec
  571 17:27:07.048111  CPU: family 06, model 8e, stepping 0c
  572 17:27:07.051419  Clearing out pending MCEs
  573 17:27:07.054978  Setting up local APIC...
  574 17:27:07.055065   apic_id: 0x00 done.
  575 17:27:07.058392  Turbo is available but hidden
  576 17:27:07.062289  Turbo is available and visible
  577 17:27:07.064850  VMX status: enabled
  578 17:27:07.068610  IA32_FEATURE_CONTROL status: locked
  579 17:27:07.071698  Skip microcode update
  580 17:27:07.071783  CPU #0 initialized
  581 17:27:07.074649  Initializing CPU #2
  582 17:27:07.078502  Initializing CPU #5
  583 17:27:07.078586  Initializing CPU #7
  584 17:27:07.081706  CPU: vendor Intel device 806ec
  585 17:27:07.084797  CPU: family 06, model 8e, stepping 0c
  586 17:27:07.088838  CPU: vendor Intel device 806ec
  587 17:27:07.091823  CPU: family 06, model 8e, stepping 0c
  588 17:27:07.095054  Clearing out pending MCEs
  589 17:27:07.097845  Clearing out pending MCEs
  590 17:27:07.101069  Setting up local APIC...
  591 17:27:07.101154  Initializing CPU #1
  592 17:27:07.104544  Initializing CPU #4
  593 17:27:07.108290  CPU: vendor Intel device 806ec
  594 17:27:07.111557  CPU: family 06, model 8e, stepping 0c
  595 17:27:07.114586  CPU: vendor Intel device 806ec
  596 17:27:07.117789  CPU: family 06, model 8e, stepping 0c
  597 17:27:07.121481  Clearing out pending MCEs
  598 17:27:07.124567  Clearing out pending MCEs
  599 17:27:07.124652  Setting up local APIC...
  600 17:27:07.127696  Initializing CPU #3
  601 17:27:07.131900  Initializing CPU #6
  602 17:27:07.134903  CPU: vendor Intel device 806ec
  603 17:27:07.137753  CPU: family 06, model 8e, stepping 0c
  604 17:27:07.141533  CPU: vendor Intel device 806ec
  605 17:27:07.144538  CPU: family 06, model 8e, stepping 0c
  606 17:27:07.147976  Clearing out pending MCEs
  607 17:27:07.148061  Clearing out pending MCEs
  608 17:27:07.150799  Setting up local APIC...
  609 17:27:07.154254  CPU: vendor Intel device 806ec
  610 17:27:07.158049  CPU: family 06, model 8e, stepping 0c
  611 17:27:07.160803  Clearing out pending MCEs
  612 17:27:07.164054  Setting up local APIC...
  613 17:27:07.164139   apic_id: 0x04 done.
  614 17:27:07.168116   apic_id: 0x02 done.
  615 17:27:07.171152   apic_id: 0x03 done.
  616 17:27:07.171237  VMX status: enabled
  617 17:27:07.174877  VMX status: enabled
  618 17:27:07.177960  IA32_FEATURE_CONTROL status: locked
  619 17:27:07.180463  IA32_FEATURE_CONTROL status: locked
  620 17:27:07.183957  Skip microcode update
  621 17:27:07.187352  Skip microcode update
  622 17:27:07.187437  CPU #1 initialized
  623 17:27:07.191739  CPU #4 initialized
  624 17:27:07.191823  Setting up local APIC...
  625 17:27:07.194907  Setting up local APIC...
  626 17:27:07.197367   apic_id: 0x05 done.
  627 17:27:07.200858  VMX status: enabled
  628 17:27:07.200947  VMX status: enabled
  629 17:27:07.204404  IA32_FEATURE_CONTROL status: locked
  630 17:27:07.207383  IA32_FEATURE_CONTROL status: locked
  631 17:27:07.211317  Skip microcode update
  632 17:27:07.213845  Skip microcode update
  633 17:27:07.213930  CPU #7 initialized
  634 17:27:07.217468  CPU #5 initialized
  635 17:27:07.217553   apic_id: 0x01 done.
  636 17:27:07.220649  Setting up local APIC...
  637 17:27:07.223728  VMX status: enabled
  638 17:27:07.223813   apic_id: 0x06 done.
  639 17:27:07.227112   apic_id: 0x07 done.
  640 17:27:07.230603  VMX status: enabled
  641 17:27:07.230688  VMX status: enabled
  642 17:27:07.234182  IA32_FEATURE_CONTROL status: locked
  643 17:27:07.240738  IA32_FEATURE_CONTROL status: locked
  644 17:27:07.240824  Skip microcode update
  645 17:27:07.243696  Skip microcode update
  646 17:27:07.243780  CPU #6 initialized
  647 17:27:07.247524  CPU #3 initialized
  648 17:27:07.251057  IA32_FEATURE_CONTROL status: locked
  649 17:27:07.253703  Skip microcode update
  650 17:27:07.253787  CPU #2 initialized
  651 17:27:07.260601  bsp_do_flight_plan done after 452 msecs.
  652 17:27:07.263510  CPU: frequency set to 4200 MHz
  653 17:27:07.263595  Enabling SMIs.
  654 17:27:07.267386  Locking SMM.
  655 17:27:07.280329  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 17:27:07.284666  CBFS @ c08000 size 3f8000
  657 17:27:07.290288  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 17:27:07.290374  CBFS: Locating 'vbt.bin'
  659 17:27:07.293829  CBFS: Found @ offset 5f5c0 size 499
  660 17:27:07.300596  Found a VBT of 4608 bytes after decompression
  661 17:27:07.484002  Display FSP Version Info HOB
  662 17:27:07.487074  Reference Code - CPU = 9.0.1e.30
  663 17:27:07.490774  uCode Version = 0.0.0.ca
  664 17:27:07.494372  TXT ACM version = ff.ff.ff.ffff
  665 17:27:07.498565  Display FSP Version Info HOB
  666 17:27:07.500549  Reference Code - ME = 9.0.1e.30
  667 17:27:07.504564  MEBx version = 0.0.0.0
  668 17:27:07.507431  ME Firmware Version = Consumer SKU
  669 17:27:07.510932  Display FSP Version Info HOB
  670 17:27:07.514221  Reference Code - CML PCH = 9.0.1e.30
  671 17:27:07.516887  PCH-CRID Status = Disabled
  672 17:27:07.520753  PCH-CRID Original Value = ff.ff.ff.ffff
  673 17:27:07.524275  PCH-CRID New Value = ff.ff.ff.ffff
  674 17:27:07.526965  OPROM - RST - RAID = ff.ff.ff.ffff
  675 17:27:07.530204  ChipsetInit Base Version = ff.ff.ff.ffff
  676 17:27:07.533897  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 17:27:07.537402  Display FSP Version Info HOB
  678 17:27:07.544341  Reference Code - SA - System Agent = 9.0.1e.30
  679 17:27:07.547046  Reference Code - MRC = 0.7.1.6c
  680 17:27:07.547131  SA - PCIe Version = 9.0.1e.30
  681 17:27:07.550035  SA-CRID Status = Disabled
  682 17:27:07.554049  SA-CRID Original Value = 0.0.0.c
  683 17:27:07.557185  SA-CRID New Value = 0.0.0.c
  684 17:27:07.560003  OPROM - VBIOS = ff.ff.ff.ffff
  685 17:27:07.563722  RTC Init
  686 17:27:07.566760  Set power on after power failure.
  687 17:27:07.566844  Disabling Deep S3
  688 17:27:07.569970  Disabling Deep S3
  689 17:27:07.570054  Disabling Deep S4
  690 17:27:07.573340  Disabling Deep S4
  691 17:27:07.576658  Disabling Deep S5
  692 17:27:07.576742  Disabling Deep S5
  693 17:27:07.582995  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
  694 17:27:07.583080  Enumerating buses...
  695 17:27:07.589803  Show all devs... Before device enumeration.
  696 17:27:07.593035  Root Device: enabled 1
  697 17:27:07.593119  CPU_CLUSTER: 0: enabled 1
  698 17:27:07.596446  DOMAIN: 0000: enabled 1
  699 17:27:07.600720  APIC: 00: enabled 1
  700 17:27:07.600804  PCI: 00:00.0: enabled 1
  701 17:27:07.603534  PCI: 00:02.0: enabled 1
  702 17:27:07.606927  PCI: 00:04.0: enabled 0
  703 17:27:07.609749  PCI: 00:05.0: enabled 0
  704 17:27:07.609833  PCI: 00:12.0: enabled 1
  705 17:27:07.613581  PCI: 00:12.5: enabled 0
  706 17:27:07.616390  PCI: 00:12.6: enabled 0
  707 17:27:07.619771  PCI: 00:14.0: enabled 1
  708 17:27:07.619855  PCI: 00:14.1: enabled 0
  709 17:27:07.622944  PCI: 00:14.3: enabled 1
  710 17:27:07.626444  PCI: 00:14.5: enabled 0
  711 17:27:07.626528  PCI: 00:15.0: enabled 1
  712 17:27:07.629484  PCI: 00:15.1: enabled 1
  713 17:27:07.632854  PCI: 00:15.2: enabled 0
  714 17:27:07.636225  PCI: 00:15.3: enabled 0
  715 17:27:07.636310  PCI: 00:16.0: enabled 1
  716 17:27:07.639509  PCI: 00:16.1: enabled 0
  717 17:27:07.644112  PCI: 00:16.2: enabled 0
  718 17:27:07.646270  PCI: 00:16.3: enabled 0
  719 17:27:07.646354  PCI: 00:16.4: enabled 0
  720 17:27:07.650219  PCI: 00:16.5: enabled 0
  721 17:27:07.652965  PCI: 00:17.0: enabled 1
  722 17:27:07.655990  PCI: 00:19.0: enabled 1
  723 17:27:07.656075  PCI: 00:19.1: enabled 0
  724 17:27:07.659487  PCI: 00:19.2: enabled 0
  725 17:27:07.662871  PCI: 00:1a.0: enabled 0
  726 17:27:07.662955  PCI: 00:1c.0: enabled 0
  727 17:27:07.666213  PCI: 00:1c.1: enabled 0
  728 17:27:07.669498  PCI: 00:1c.2: enabled 0
  729 17:27:07.672876  PCI: 00:1c.3: enabled 0
  730 17:27:07.672985  PCI: 00:1c.4: enabled 0
  731 17:27:07.676449  PCI: 00:1c.5: enabled 0
  732 17:27:07.680179  PCI: 00:1c.6: enabled 0
  733 17:27:07.682891  PCI: 00:1c.7: enabled 0
  734 17:27:07.682976  PCI: 00:1d.0: enabled 1
  735 17:27:07.686266  PCI: 00:1d.1: enabled 0
  736 17:27:07.689341  PCI: 00:1d.2: enabled 0
  737 17:27:07.692762  PCI: 00:1d.3: enabled 0
  738 17:27:07.692846  PCI: 00:1d.4: enabled 0
  739 17:27:07.696014  PCI: 00:1d.5: enabled 1
  740 17:27:07.699768  PCI: 00:1e.0: enabled 1
  741 17:27:07.699853  PCI: 00:1e.1: enabled 0
  742 17:27:07.702762  PCI: 00:1e.2: enabled 1
  743 17:27:07.706235  PCI: 00:1e.3: enabled 1
  744 17:27:07.709512  PCI: 00:1f.0: enabled 1
  745 17:27:07.709596  PCI: 00:1f.1: enabled 1
  746 17:27:07.713096  PCI: 00:1f.2: enabled 1
  747 17:27:07.716105  PCI: 00:1f.3: enabled 1
  748 17:27:07.719157  PCI: 00:1f.4: enabled 1
  749 17:27:07.719241  PCI: 00:1f.5: enabled 1
  750 17:27:07.723069  PCI: 00:1f.6: enabled 0
  751 17:27:07.726906  USB0 port 0: enabled 1
  752 17:27:07.726992  I2C: 00:15: enabled 1
  753 17:27:07.728912  I2C: 00:5d: enabled 1
  754 17:27:07.732170  GENERIC: 0.0: enabled 1
  755 17:27:07.736225  I2C: 00:1a: enabled 1
  756 17:27:07.736309  I2C: 00:38: enabled 1
  757 17:27:07.739170  I2C: 00:39: enabled 1
  758 17:27:07.742213  I2C: 00:3a: enabled 1
  759 17:27:07.742298  I2C: 00:3b: enabled 1
  760 17:27:07.745455  PCI: 00:00.0: enabled 1
  761 17:27:07.748845  SPI: 00: enabled 1
  762 17:27:07.748929  SPI: 01: enabled 1
  763 17:27:07.752263  PNP: 0c09.0: enabled 1
  764 17:27:07.755650  USB2 port 0: enabled 1
  765 17:27:07.755749  USB2 port 1: enabled 1
  766 17:27:07.758615  USB2 port 2: enabled 0
  767 17:27:07.762040  USB2 port 3: enabled 0
  768 17:27:07.762125  USB2 port 5: enabled 0
  769 17:27:07.765987  USB2 port 6: enabled 1
  770 17:27:07.768846  USB2 port 9: enabled 1
  771 17:27:07.772111  USB3 port 0: enabled 1
  772 17:27:07.772196  USB3 port 1: enabled 1
  773 17:27:07.776636  USB3 port 2: enabled 1
  774 17:27:07.778591  USB3 port 3: enabled 1
  775 17:27:07.778676  USB3 port 4: enabled 0
  776 17:27:07.782941  APIC: 02: enabled 1
  777 17:27:07.785495  APIC: 01: enabled 1
  778 17:27:07.785580  APIC: 07: enabled 1
  779 17:27:07.788839  APIC: 03: enabled 1
  780 17:27:07.788925  APIC: 05: enabled 1
  781 17:27:07.791695  APIC: 06: enabled 1
  782 17:27:07.795242  APIC: 04: enabled 1
  783 17:27:07.795327  Compare with tree...
  784 17:27:07.799099  Root Device: enabled 1
  785 17:27:07.802470   CPU_CLUSTER: 0: enabled 1
  786 17:27:07.805306    APIC: 00: enabled 1
  787 17:27:07.805390    APIC: 02: enabled 1
  788 17:27:07.808288    APIC: 01: enabled 1
  789 17:27:07.811866    APIC: 07: enabled 1
  790 17:27:07.811951    APIC: 03: enabled 1
  791 17:27:07.815205    APIC: 05: enabled 1
  792 17:27:07.819219    APIC: 06: enabled 1
  793 17:27:07.819304    APIC: 04: enabled 1
  794 17:27:07.821996   DOMAIN: 0000: enabled 1
  795 17:27:07.825248    PCI: 00:00.0: enabled 1
  796 17:27:07.828492    PCI: 00:02.0: enabled 1
  797 17:27:07.828607    PCI: 00:04.0: enabled 0
  798 17:27:07.831858    PCI: 00:05.0: enabled 0
  799 17:27:07.835112    PCI: 00:12.0: enabled 1
  800 17:27:07.838718    PCI: 00:12.5: enabled 0
  801 17:27:07.841553    PCI: 00:12.6: enabled 0
  802 17:27:07.841638    PCI: 00:14.0: enabled 1
  803 17:27:07.845071     USB0 port 0: enabled 1
  804 17:27:07.848557      USB2 port 0: enabled 1
  805 17:27:07.851551      USB2 port 1: enabled 1
  806 17:27:07.855287      USB2 port 2: enabled 0
  807 17:27:07.855372      USB2 port 3: enabled 0
  808 17:27:07.859480      USB2 port 5: enabled 0
  809 17:27:07.861724      USB2 port 6: enabled 1
  810 17:27:07.864872      USB2 port 9: enabled 1
  811 17:27:07.868186      USB3 port 0: enabled 1
  812 17:27:07.871953      USB3 port 1: enabled 1
  813 17:27:07.872038      USB3 port 2: enabled 1
  814 17:27:07.875169      USB3 port 3: enabled 1
  815 17:27:07.878266      USB3 port 4: enabled 0
  816 17:27:07.881625    PCI: 00:14.1: enabled 0
  817 17:27:07.884585    PCI: 00:14.3: enabled 1
  818 17:27:07.884670    PCI: 00:14.5: enabled 0
  819 17:27:07.888547    PCI: 00:15.0: enabled 1
  820 17:27:07.891399     I2C: 00:15: enabled 1
  821 17:27:07.894853    PCI: 00:15.1: enabled 1
  822 17:27:07.898525     I2C: 00:5d: enabled 1
  823 17:27:07.898609     GENERIC: 0.0: enabled 1
  824 17:27:07.901856    PCI: 00:15.2: enabled 0
  825 17:27:07.905265    PCI: 00:15.3: enabled 0
  826 17:27:07.908014    PCI: 00:16.0: enabled 1
  827 17:27:07.908099    PCI: 00:16.1: enabled 0
  828 17:27:07.911981    PCI: 00:16.2: enabled 0
  829 17:27:07.914682    PCI: 00:16.3: enabled 0
  830 17:27:07.918081    PCI: 00:16.4: enabled 0
  831 17:27:07.921067    PCI: 00:16.5: enabled 0
  832 17:27:07.921151    PCI: 00:17.0: enabled 1
  833 17:27:07.924602    PCI: 00:19.0: enabled 1
  834 17:27:07.928093     I2C: 00:1a: enabled 1
  835 17:27:07.931513     I2C: 00:38: enabled 1
  836 17:27:07.934862     I2C: 00:39: enabled 1
  837 17:27:07.934946     I2C: 00:3a: enabled 1
  838 17:27:07.937734     I2C: 00:3b: enabled 1
  839 17:27:07.941200    PCI: 00:19.1: enabled 0
  840 17:27:07.944272    PCI: 00:19.2: enabled 0
  841 17:27:07.944356    PCI: 00:1a.0: enabled 0
  842 17:27:07.948219    PCI: 00:1c.0: enabled 0
  843 17:27:07.950917    PCI: 00:1c.1: enabled 0
  844 17:27:07.954409    PCI: 00:1c.2: enabled 0
  845 17:27:07.957879    PCI: 00:1c.3: enabled 0
  846 17:27:07.957963    PCI: 00:1c.4: enabled 0
  847 17:27:07.961330    PCI: 00:1c.5: enabled 0
  848 17:27:07.964701    PCI: 00:1c.6: enabled 0
  849 17:27:07.967726    PCI: 00:1c.7: enabled 0
  850 17:27:07.970969    PCI: 00:1d.0: enabled 1
  851 17:27:07.971054    PCI: 00:1d.1: enabled 0
  852 17:27:07.974415    PCI: 00:1d.2: enabled 0
  853 17:27:07.977455    PCI: 00:1d.3: enabled 0
  854 17:27:07.981175    PCI: 00:1d.4: enabled 0
  855 17:27:07.983970    PCI: 00:1d.5: enabled 1
  856 17:27:07.984055     PCI: 00:00.0: enabled 1
  857 17:27:07.987613    PCI: 00:1e.0: enabled 1
  858 17:27:07.991332    PCI: 00:1e.1: enabled 0
  859 17:27:07.993868    PCI: 00:1e.2: enabled 1
  860 17:27:07.993951     SPI: 00: enabled 1
  861 17:27:07.997227    PCI: 00:1e.3: enabled 1
  862 17:27:08.001592     SPI: 01: enabled 1
  863 17:27:08.004112    PCI: 00:1f.0: enabled 1
  864 17:27:08.004195     PNP: 0c09.0: enabled 1
  865 17:27:08.009089    PCI: 00:1f.1: enabled 1
  866 17:27:08.010802    PCI: 00:1f.2: enabled 1
  867 17:27:08.014065    PCI: 00:1f.3: enabled 1
  868 17:27:08.017691    PCI: 00:1f.4: enabled 1
  869 17:27:08.017775    PCI: 00:1f.5: enabled 1
  870 17:27:08.020626    PCI: 00:1f.6: enabled 0
  871 17:27:08.024087  Root Device scanning...
  872 17:27:08.027572  scan_static_bus for Root Device
  873 17:27:08.030306  CPU_CLUSTER: 0 enabled
  874 17:27:08.030390  DOMAIN: 0000 enabled
  875 17:27:08.033675  DOMAIN: 0000 scanning...
  876 17:27:08.037346  PCI: pci_scan_bus for bus 00
  877 17:27:08.040770  PCI: 00:00.0 [8086/0000] ops
  878 17:27:08.043980  PCI: 00:00.0 [8086/9b61] enabled
  879 17:27:08.047381  PCI: 00:02.0 [8086/0000] bus ops
  880 17:27:08.050504  PCI: 00:02.0 [8086/9b41] enabled
  881 17:27:08.054124  PCI: 00:04.0 [8086/1903] disabled
  882 17:27:08.057146  PCI: 00:08.0 [8086/1911] enabled
  883 17:27:08.060653  PCI: 00:12.0 [8086/02f9] enabled
  884 17:27:08.063767  PCI: 00:14.0 [8086/0000] bus ops
  885 17:27:08.066667  PCI: 00:14.0 [8086/02ed] enabled
  886 17:27:08.070593  PCI: 00:14.2 [8086/02ef] enabled
  887 17:27:08.073931  PCI: 00:14.3 [8086/02f0] enabled
  888 17:27:08.077436  PCI: 00:15.0 [8086/0000] bus ops
  889 17:27:08.080362  PCI: 00:15.0 [8086/02e8] enabled
  890 17:27:08.083770  PCI: 00:15.1 [8086/0000] bus ops
  891 17:27:08.087328  PCI: 00:15.1 [8086/02e9] enabled
  892 17:27:08.090112  PCI: 00:16.0 [8086/0000] ops
  893 17:27:08.094063  PCI: 00:16.0 [8086/02e0] enabled
  894 17:27:08.096510  PCI: 00:17.0 [8086/0000] ops
  895 17:27:08.100339  PCI: 00:17.0 [8086/02d3] enabled
  896 17:27:08.103818  PCI: 00:19.0 [8086/0000] bus ops
  897 17:27:08.106531  PCI: 00:19.0 [8086/02c5] enabled
  898 17:27:08.110033  PCI: 00:1d.0 [8086/0000] bus ops
  899 17:27:08.113183  PCI: 00:1d.0 [8086/02b0] enabled
  900 17:27:08.120485  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 17:27:08.123518  PCI: 00:1e.0 [8086/0000] ops
  902 17:27:08.126890  PCI: 00:1e.0 [8086/02a8] enabled
  903 17:27:08.129967  PCI: 00:1e.2 [8086/0000] bus ops
  904 17:27:08.133504  PCI: 00:1e.2 [8086/02aa] enabled
  905 17:27:08.136781  PCI: 00:1e.3 [8086/0000] bus ops
  906 17:27:08.140215  PCI: 00:1e.3 [8086/02ab] enabled
  907 17:27:08.143538  PCI: 00:1f.0 [8086/0000] bus ops
  908 17:27:08.146520  PCI: 00:1f.0 [8086/0284] enabled
  909 17:27:08.150457  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 17:27:08.156372  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 17:27:08.160003  PCI: 00:1f.3 [8086/0000] bus ops
  912 17:27:08.162927  PCI: 00:1f.3 [8086/02c8] enabled
  913 17:27:08.166484  PCI: 00:1f.4 [8086/0000] bus ops
  914 17:27:08.170030  PCI: 00:1f.4 [8086/02a3] enabled
  915 17:27:08.173482  PCI: 00:1f.5 [8086/0000] bus ops
  916 17:27:08.176849  PCI: 00:1f.5 [8086/02a4] enabled
  917 17:27:08.179650  PCI: Leftover static devices:
  918 17:27:08.179734  PCI: 00:05.0
  919 17:27:08.183292  PCI: 00:12.5
  920 17:27:08.183377  PCI: 00:12.6
  921 17:27:08.186197  PCI: 00:14.1
  922 17:27:08.186282  PCI: 00:14.5
  923 17:27:08.186349  PCI: 00:15.2
  924 17:27:08.189576  PCI: 00:15.3
  925 17:27:08.189660  PCI: 00:16.1
  926 17:27:08.192874  PCI: 00:16.2
  927 17:27:08.192965  PCI: 00:16.3
  928 17:27:08.193032  PCI: 00:16.4
  929 17:27:08.196195  PCI: 00:16.5
  930 17:27:08.196280  PCI: 00:19.1
  931 17:27:08.200012  PCI: 00:19.2
  932 17:27:08.200096  PCI: 00:1a.0
  933 17:27:08.200163  PCI: 00:1c.0
  934 17:27:08.202700  PCI: 00:1c.1
  935 17:27:08.202785  PCI: 00:1c.2
  936 17:27:08.206660  PCI: 00:1c.3
  937 17:27:08.206744  PCI: 00:1c.4
  938 17:27:08.209797  PCI: 00:1c.5
  939 17:27:08.209881  PCI: 00:1c.6
  940 17:27:08.209947  PCI: 00:1c.7
  941 17:27:08.213795  PCI: 00:1d.1
  942 17:27:08.213881  PCI: 00:1d.2
  943 17:27:08.216125  PCI: 00:1d.3
  944 17:27:08.216210  PCI: 00:1d.4
  945 17:27:08.216277  PCI: 00:1d.5
  946 17:27:08.219405  PCI: 00:1e.1
  947 17:27:08.219490  PCI: 00:1f.1
  948 17:27:08.222635  PCI: 00:1f.2
  949 17:27:08.222720  PCI: 00:1f.6
  950 17:27:08.225797  PCI: Check your devicetree.cb.
  951 17:27:08.229010  PCI: 00:02.0 scanning...
  952 17:27:08.232957  scan_generic_bus for PCI: 00:02.0
  953 17:27:08.235762  scan_generic_bus for PCI: 00:02.0 done
  954 17:27:08.242878  scan_bus: scanning of bus PCI: 00:02.0 took 10178 usecs
  955 17:27:08.245912  PCI: 00:14.0 scanning...
  956 17:27:08.249081  scan_static_bus for PCI: 00:14.0
  957 17:27:08.249157  USB0 port 0 enabled
  958 17:27:08.252878  USB0 port 0 scanning...
  959 17:27:08.256458  scan_static_bus for USB0 port 0
  960 17:27:08.258879  USB2 port 0 enabled
  961 17:27:08.258953  USB2 port 1 enabled
  962 17:27:08.262285  USB2 port 2 disabled
  963 17:27:08.265713  USB2 port 3 disabled
  964 17:27:08.265787  USB2 port 5 disabled
  965 17:27:08.269613  USB2 port 6 enabled
  966 17:27:08.269686  USB2 port 9 enabled
  967 17:27:08.272728  USB3 port 0 enabled
  968 17:27:08.275635  USB3 port 1 enabled
  969 17:27:08.275714  USB3 port 2 enabled
  970 17:27:08.278991  USB3 port 3 enabled
  971 17:27:08.282639  USB3 port 4 disabled
  972 17:27:08.282710  USB2 port 0 scanning...
  973 17:27:08.286073  scan_static_bus for USB2 port 0
  974 17:27:08.292315  scan_static_bus for USB2 port 0 done
  975 17:27:08.295441  scan_bus: scanning of bus USB2 port 0 took 9687 usecs
  976 17:27:08.298759  USB2 port 1 scanning...
  977 17:27:08.301948  scan_static_bus for USB2 port 1
  978 17:27:08.306306  scan_static_bus for USB2 port 1 done
  979 17:27:08.311932  scan_bus: scanning of bus USB2 port 1 took 9713 usecs
  980 17:27:08.312006  USB2 port 6 scanning...
  981 17:27:08.316227  scan_static_bus for USB2 port 6
  982 17:27:08.322705  scan_static_bus for USB2 port 6 done
  983 17:27:08.325427  scan_bus: scanning of bus USB2 port 6 took 9705 usecs
  984 17:27:08.328777  USB2 port 9 scanning...
  985 17:27:08.332274  scan_static_bus for USB2 port 9
  986 17:27:08.335113  scan_static_bus for USB2 port 9 done
  987 17:27:08.342422  scan_bus: scanning of bus USB2 port 9 took 9702 usecs
  988 17:27:08.342498  USB3 port 0 scanning...
  989 17:27:08.345376  scan_static_bus for USB3 port 0
  990 17:27:08.351773  scan_static_bus for USB3 port 0 done
  991 17:27:08.355619  scan_bus: scanning of bus USB3 port 0 took 9706 usecs
  992 17:27:08.358739  USB3 port 1 scanning...
  993 17:27:08.361731  scan_static_bus for USB3 port 1
  994 17:27:08.365733  scan_static_bus for USB3 port 1 done
  995 17:27:08.371659  scan_bus: scanning of bus USB3 port 1 took 9714 usecs
  996 17:27:08.371746  USB3 port 2 scanning...
  997 17:27:08.375536  scan_static_bus for USB3 port 2
  998 17:27:08.381857  scan_static_bus for USB3 port 2 done
  999 17:27:08.385750  scan_bus: scanning of bus USB3 port 2 took 9705 usecs
 1000 17:27:08.388963  USB3 port 3 scanning...
 1001 17:27:08.392013  scan_static_bus for USB3 port 3
 1002 17:27:08.395635  scan_static_bus for USB3 port 3 done
 1003 17:27:08.402519  scan_bus: scanning of bus USB3 port 3 took 9713 usecs
 1004 17:27:08.405526  scan_static_bus for USB0 port 0 done
 1005 17:27:08.412092  scan_bus: scanning of bus USB0 port 0 took 155500 usecs
 1006 17:27:08.415205  scan_static_bus for PCI: 00:14.0 done
 1007 17:27:08.418527  scan_bus: scanning of bus PCI: 00:14.0 took 173177 usecs
 1008 17:27:08.421986  PCI: 00:15.0 scanning...
 1009 17:27:08.425073  scan_generic_bus for PCI: 00:15.0
 1010 17:27:08.428375  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 17:27:08.434966  scan_generic_bus for PCI: 00:15.0 done
 1012 17:27:08.438193  scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs
 1013 17:27:08.441926  PCI: 00:15.1 scanning...
 1014 17:27:08.445111  scan_generic_bus for PCI: 00:15.1
 1015 17:27:08.448167  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 17:27:08.455402  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 17:27:08.458439  scan_generic_bus for PCI: 00:15.1 done
 1018 17:27:08.465024  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs
 1019 17:27:08.465099  PCI: 00:19.0 scanning...
 1020 17:27:08.468364  scan_generic_bus for PCI: 00:19.0
 1021 17:27:08.474761  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 17:27:08.478013  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 17:27:08.481704  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 17:27:08.484786  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 17:27:08.491907  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 17:27:08.494694  scan_generic_bus for PCI: 00:19.0 done
 1027 17:27:08.498240  scan_bus: scanning of bus PCI: 00:19.0 took 30744 usecs
 1028 17:27:08.501374  PCI: 00:1d.0 scanning...
 1029 17:27:08.504627  do_pci_scan_bridge for PCI: 00:1d.0
 1030 17:27:08.508335  PCI: pci_scan_bus for bus 01
 1031 17:27:08.512045  PCI: 01:00.0 [1c5c/1327] enabled
 1032 17:27:08.514485  Enabling Common Clock Configuration
 1033 17:27:08.521658  L1 Sub-State supported from root port 29
 1034 17:27:08.525497  L1 Sub-State Support = 0xf
 1035 17:27:08.525576  CommonModeRestoreTime = 0x28
 1036 17:27:08.531499  Power On Value = 0x16, Power On Scale = 0x0
 1037 17:27:08.531580  ASPM: Enabled L1
 1038 17:27:08.538111  scan_bus: scanning of bus PCI: 00:1d.0 took 32804 usecs
 1039 17:27:08.541620  PCI: 00:1e.2 scanning...
 1040 17:27:08.544948  scan_generic_bus for PCI: 00:1e.2
 1041 17:27:08.548051  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 17:27:08.551390  scan_generic_bus for PCI: 00:1e.2 done
 1043 17:27:08.558484  scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
 1044 17:27:08.561365  PCI: 00:1e.3 scanning...
 1045 17:27:08.564415  scan_generic_bus for PCI: 00:1e.3
 1046 17:27:08.568282  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 17:27:08.571762  scan_generic_bus for PCI: 00:1e.3 done
 1048 17:27:08.577359  scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
 1049 17:27:08.581212  PCI: 00:1f.0 scanning...
 1050 17:27:08.583891  scan_static_bus for PCI: 00:1f.0
 1051 17:27:08.583970  PNP: 0c09.0 enabled
 1052 17:27:08.587797  scan_static_bus for PCI: 00:1f.0 done
 1053 17:27:08.593975  scan_bus: scanning of bus PCI: 00:1f.0 took 12083 usecs
 1054 17:27:08.597353  PCI: 00:1f.3 scanning...
 1055 17:27:08.604061  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
 1056 17:27:08.604136  PCI: 00:1f.4 scanning...
 1057 17:27:08.610475  scan_generic_bus for PCI: 00:1f.4
 1058 17:27:08.613833  scan_generic_bus for PCI: 00:1f.4 done
 1059 17:27:08.616821  scan_bus: scanning of bus PCI: 00:1f.4 took 10201 usecs
 1060 17:27:08.620940  PCI: 00:1f.5 scanning...
 1061 17:27:08.623623  scan_generic_bus for PCI: 00:1f.5
 1062 17:27:08.626789  scan_generic_bus for PCI: 00:1f.5 done
 1063 17:27:08.633764  scan_bus: scanning of bus PCI: 00:1f.5 took 10194 usecs
 1064 17:27:08.639965  scan_bus: scanning of bus DOMAIN: 0000 took 605364 usecs
 1065 17:27:08.643537  scan_static_bus for Root Device done
 1066 17:27:08.649760  scan_bus: scanning of bus Root Device took 625258 usecs
 1067 17:27:08.649839  done
 1068 17:27:08.653648  Chrome EC: UHEPI supported
 1069 17:27:08.660104  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 17:27:08.663231  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 17:27:08.669704  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 17:27:08.678558  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 17:27:08.681257  SPI flash protection: WPSW=0 SRP0=0
 1074 17:27:08.687477  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 17:27:08.690766  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 17:27:08.694142  found VGA at PCI: 00:02.0
 1077 17:27:08.697805  Setting up VGA for PCI: 00:02.0
 1078 17:27:08.703720  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 17:27:08.707661  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 17:27:08.710746  Allocating resources...
 1081 17:27:08.713888  Reading resources...
 1082 17:27:08.717478  Root Device read_resources bus 0 link: 0
 1083 17:27:08.720425  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 17:27:08.727540  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 17:27:08.730592  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 17:27:08.737528  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 17:27:08.741495  USB0 port 0 read_resources bus 0 link: 0
 1088 17:27:08.749140  USB0 port 0 read_resources bus 0 link: 0 done
 1089 17:27:08.752588  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 17:27:08.759887  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 17:27:08.763072  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 17:27:08.769804  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 17:27:08.772939  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 17:27:08.781631  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 17:27:08.787272  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 17:27:08.790777  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 17:27:08.797228  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 17:27:08.800916  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 17:27:08.807113  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 17:27:08.810552  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 17:27:08.816754  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 17:27:08.820251  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 17:27:08.827142  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 17:27:08.834269  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 17:27:08.837090  Root Device read_resources bus 0 link: 0 done
 1106 17:27:08.840194  Done reading resources.
 1107 17:27:08.843690  Show resources in subtree (Root Device)...After reading.
 1108 17:27:08.850129   Root Device child on link 0 CPU_CLUSTER: 0
 1109 17:27:08.853685    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 17:27:08.853761     APIC: 00
 1111 17:27:08.856928     APIC: 02
 1112 17:27:08.857022     APIC: 01
 1113 17:27:08.860742     APIC: 07
 1114 17:27:08.860814     APIC: 03
 1115 17:27:08.860876     APIC: 05
 1116 17:27:08.863685     APIC: 06
 1117 17:27:08.863756     APIC: 04
 1118 17:27:08.867339    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 17:27:08.877213    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 17:27:08.930042    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 17:27:08.930341     PCI: 00:00.0
 1122 17:27:08.931486     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 17:27:08.932713     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 17:27:08.933016     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 17:27:08.934079     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 17:27:08.979756     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 17:27:08.981165     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 17:27:08.981523     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 17:27:08.983451     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 17:27:08.984324     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 17:27:09.029526     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 17:27:09.029826     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 17:27:09.030855     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 17:27:09.031199     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 17:27:09.032225     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 17:27:09.032501     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 17:27:09.050870     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 17:27:09.051001     PCI: 00:02.0
 1139 17:27:09.054350     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 17:27:09.061067     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 17:27:09.071545     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 17:27:09.071630     PCI: 00:04.0
 1143 17:27:09.074258     PCI: 00:08.0
 1144 17:27:09.084102     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 17:27:09.084188     PCI: 00:12.0
 1146 17:27:09.093927     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 17:27:09.097467     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 17:27:09.107705     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 17:27:09.114216      USB0 port 0 child on link 0 USB2 port 0
 1150 17:27:09.114304       USB2 port 0
 1151 17:27:09.117055       USB2 port 1
 1152 17:27:09.117132       USB2 port 2
 1153 17:27:09.120404       USB2 port 3
 1154 17:27:09.123636       USB2 port 5
 1155 17:27:09.123709       USB2 port 6
 1156 17:27:09.126935       USB2 port 9
 1157 17:27:09.127012       USB3 port 0
 1158 17:27:09.130159       USB3 port 1
 1159 17:27:09.130233       USB3 port 2
 1160 17:27:09.134036       USB3 port 3
 1161 17:27:09.134116       USB3 port 4
 1162 17:27:09.136984     PCI: 00:14.2
 1163 17:27:09.147422     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 17:27:09.156900     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 17:27:09.157023     PCI: 00:14.3
 1166 17:27:09.166266     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 17:27:09.173629     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 17:27:09.182819     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 17:27:09.182898      I2C: 01:15
 1170 17:27:09.186805     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 17:27:09.195965     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 17:27:09.199489      I2C: 02:5d
 1173 17:27:09.199565      GENERIC: 0.0
 1174 17:27:09.202680     PCI: 00:16.0
 1175 17:27:09.212521     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 17:27:09.212599     PCI: 00:17.0
 1177 17:27:09.222935     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 17:27:09.232365     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 17:27:09.238867     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 17:27:09.248860     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 17:27:09.255685     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 17:27:09.266056     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 17:27:09.268917     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 17:27:09.279206     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 17:27:09.282499      I2C: 03:1a
 1186 17:27:09.282575      I2C: 03:38
 1187 17:27:09.285496      I2C: 03:39
 1188 17:27:09.285574      I2C: 03:3a
 1189 17:27:09.289283      I2C: 03:3b
 1190 17:27:09.291902     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 17:27:09.302291     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 17:27:09.311791     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 17:27:09.318833     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 17:27:09.321631      PCI: 01:00.0
 1195 17:27:09.331407      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 17:27:09.334775     PCI: 00:1e.0
 1197 17:27:09.345039     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 17:27:09.354736     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 17:27:09.358082     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 17:27:09.368307     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 17:27:09.368394      SPI: 00
 1202 17:27:09.374481     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 17:27:09.384598     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 17:27:09.384685      SPI: 01
 1205 17:27:09.387748     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 17:27:09.397717     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 17:27:09.407694     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 17:27:09.407780      PNP: 0c09.0
 1209 17:27:09.417625      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 17:27:09.417713     PCI: 00:1f.3
 1211 17:27:09.427474     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 17:27:09.437306     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 17:27:09.441317     PCI: 00:1f.4
 1214 17:27:09.451174     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 17:27:09.460775     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 17:27:09.460861     PCI: 00:1f.5
 1217 17:27:09.470666     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 17:27:09.477678  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 17:27:09.483945  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 17:27:09.490519  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 17:27:09.494198  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 17:27:09.497371  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 17:27:09.501442  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 17:27:09.503957  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 17:27:09.510514  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 17:27:09.516636  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 17:27:09.526863  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 17:27:09.533459  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 17:27:09.539887  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 17:27:09.543075  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 17:27:09.553460  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 17:27:09.556731  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 17:27:09.563011  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 17:27:09.566275  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 17:27:09.573190  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 17:27:09.576203  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 17:27:09.583154  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 17:27:09.586173  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 17:27:09.589503  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 17:27:09.596507  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 17:27:09.599225  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 17:27:09.605830  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 17:27:09.609648  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 17:27:09.616411  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 17:27:09.619274  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 17:27:09.625949  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 17:27:09.629380  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 17:27:09.635737  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 17:27:09.639140  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 17:27:09.646103  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 17:27:09.649210  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 17:27:09.655638  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 17:27:09.659232  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 17:27:09.665736  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 17:27:09.672922  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 17:27:09.675534  avoid_fixed_resources: DOMAIN: 0000
 1257 17:27:09.682246  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 17:27:09.688698  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 17:27:09.695620  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 17:27:09.702157  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 17:27:09.711847  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 17:27:09.718356  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 17:27:09.725252  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 17:27:09.735378  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 17:27:09.742142  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 17:27:09.748312  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 17:27:09.754804  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 17:27:09.765104  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 17:27:09.765192  Setting resources...
 1270 17:27:09.772075  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 17:27:09.775364  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 17:27:09.782430  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 17:27:09.785125  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 17:27:09.787838  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 17:27:09.794896  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 17:27:09.801413  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 17:27:09.808883  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 17:27:09.814469  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 17:27:09.821150  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 17:27:09.824476  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 17:27:09.831173  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 17:27:09.835742  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 17:27:09.837540  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 17:27:09.844194  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 17:27:09.848222  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 17:27:09.854150  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 17:27:09.857568  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 17:27:09.865699  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 17:27:09.867378  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 17:27:09.874602  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 17:27:09.877702  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 17:27:09.883846  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 17:27:09.887335  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 17:27:09.894291  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 17:27:09.897781  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 17:27:09.903939  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 17:27:09.907255  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 17:27:09.914074  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 17:27:09.917315  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 17:27:09.920344  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 17:27:09.926863  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 17:27:09.933702  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 17:27:09.940550  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 17:27:09.950099  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 17:27:09.957216  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 17:27:09.959809  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 17:27:09.970407  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 17:27:09.973179  Root Device assign_resources, bus 0 link: 0
 1309 17:27:09.976462  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 17:27:09.986737  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 17:27:09.994003  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 17:27:10.004357  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 17:27:10.009650  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 17:27:10.019852  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 17:27:10.027154  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 17:27:10.033145  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 17:27:10.037225  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 17:27:10.046467  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 17:27:10.052778  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 17:27:10.062697  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 17:27:10.069442  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 17:27:10.072853  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 17:27:10.079938  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 17:27:10.085908  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 17:27:10.093188  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 17:27:10.096327  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 17:27:10.106233  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 17:27:10.112603  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 17:27:10.119143  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 17:27:10.128880  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 17:27:10.135282  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 17:27:10.142164  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 17:27:10.151855  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 17:27:10.158640  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 17:27:10.165865  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 17:27:10.168338  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 17:27:10.178109  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 17:27:10.185324  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 17:27:10.195376  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 17:27:10.197951  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 17:27:10.208570  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 17:27:10.211405  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 17:27:10.221250  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 17:27:10.227578  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 17:27:10.234593  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 17:27:10.237658  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 17:27:10.247456  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 17:27:10.251392  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 17:27:10.257075  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 17:27:10.260617  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 17:27:10.267467  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 17:27:10.270424  LPC: Trying to open IO window from 800 size 1ff
 1353 17:27:10.280225  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 17:27:10.286990  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 17:27:10.293985  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 17:27:10.303668  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 17:27:10.306912  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 17:27:10.313834  Root Device assign_resources, bus 0 link: 0
 1359 17:27:10.313917  Done setting resources.
 1360 17:27:10.321171  Show resources in subtree (Root Device)...After assigning values.
 1361 17:27:10.327246   Root Device child on link 0 CPU_CLUSTER: 0
 1362 17:27:10.330752    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 17:27:10.330835     APIC: 00
 1364 17:27:10.333874     APIC: 02
 1365 17:27:10.333958     APIC: 01
 1366 17:27:10.336845     APIC: 07
 1367 17:27:10.336927     APIC: 03
 1368 17:27:10.337035     APIC: 05
 1369 17:27:10.340409     APIC: 06
 1370 17:27:10.340492     APIC: 04
 1371 17:27:10.343700    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 17:27:10.354059    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 17:27:10.367024    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 17:27:10.367108     PCI: 00:00.0
 1375 17:27:10.376784     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 17:27:10.386362     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 17:27:10.396460     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 17:27:10.406521     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 17:27:10.413663     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 17:27:10.422801     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 17:27:10.433173     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 17:27:10.442977     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 17:27:10.452667     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 17:27:10.459266     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 17:27:10.469611     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 17:27:10.479065     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 17:27:10.488885     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 17:27:10.498974     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 17:27:10.508884     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 17:27:10.518695     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 17:27:10.518780     PCI: 00:02.0
 1392 17:27:10.528788     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 17:27:10.541875     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 17:27:10.548498     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 17:27:10.551915     PCI: 00:04.0
 1396 17:27:10.551994     PCI: 00:08.0
 1397 17:27:10.562265     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 17:27:10.565321     PCI: 00:12.0
 1399 17:27:10.575136     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 17:27:10.578709     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 17:27:10.588137     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 17:27:10.594603      USB0 port 0 child on link 0 USB2 port 0
 1403 17:27:10.594688       USB2 port 0
 1404 17:27:10.598370       USB2 port 1
 1405 17:27:10.598455       USB2 port 2
 1406 17:27:10.601779       USB2 port 3
 1407 17:27:10.601853       USB2 port 5
 1408 17:27:10.605244       USB2 port 6
 1409 17:27:10.608225       USB2 port 9
 1410 17:27:10.608303       USB3 port 0
 1411 17:27:10.611163       USB3 port 1
 1412 17:27:10.611241       USB3 port 2
 1413 17:27:10.614897       USB3 port 3
 1414 17:27:10.614979       USB3 port 4
 1415 17:27:10.618015     PCI: 00:14.2
 1416 17:27:10.627560     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 17:27:10.638107     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 17:27:10.638190     PCI: 00:14.3
 1419 17:27:10.650723     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 17:27:10.654630     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 17:27:10.664287     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 17:27:10.664369      I2C: 01:15
 1423 17:27:10.670826     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 17:27:10.680845     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 17:27:10.680929      I2C: 02:5d
 1426 17:27:10.683949      GENERIC: 0.0
 1427 17:27:10.684024     PCI: 00:16.0
 1428 17:27:10.694778     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 17:27:10.697495     PCI: 00:17.0
 1430 17:27:10.707181     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 17:27:10.717954     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 17:27:10.727505     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 17:27:10.736892     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 17:27:10.743691     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 17:27:10.753956     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 17:27:10.760157     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 17:27:10.770644     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 17:27:10.770728      I2C: 03:1a
 1439 17:27:10.773380      I2C: 03:38
 1440 17:27:10.773457      I2C: 03:39
 1441 17:27:10.777146      I2C: 03:3a
 1442 17:27:10.777229      I2C: 03:3b
 1443 17:27:10.784069     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 17:27:10.790006     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 17:27:10.799794     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 17:27:10.813039     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 17:27:10.813131      PCI: 01:00.0
 1448 17:27:10.822850      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 17:27:10.826430     PCI: 00:1e.0
 1450 17:27:10.836024     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 17:27:10.845968     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 17:27:10.850066     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 17:27:10.863019     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 17:27:10.863105      SPI: 00
 1455 17:27:10.865776     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 17:27:10.875481     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 17:27:10.879312      SPI: 01
 1458 17:27:10.882363     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 17:27:10.892246     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 17:27:10.898909     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 17:27:10.902496      PNP: 0c09.0
 1462 17:27:10.912152      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 17:27:10.912239     PCI: 00:1f.3
 1464 17:27:10.923952     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 17:27:10.931721     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 17:27:10.935054     PCI: 00:1f.4
 1467 17:27:10.945697     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 17:27:10.954996     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 17:27:10.955082     PCI: 00:1f.5
 1470 17:27:10.965408     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 17:27:10.968173  Done allocating resources.
 1472 17:27:10.974775  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 17:27:10.978745  Enabling resources...
 1474 17:27:10.982029  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 17:27:10.984880  PCI: 00:00.0 cmd <- 06
 1476 17:27:10.988739  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 17:27:10.991108  PCI: 00:02.0 cmd <- 03
 1478 17:27:10.991182  PCI: 00:08.0 cmd <- 06
 1479 17:27:10.997803  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 17:27:10.997878  PCI: 00:12.0 cmd <- 02
 1481 17:27:11.001529  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 17:27:11.004515  PCI: 00:14.0 cmd <- 02
 1483 17:27:11.007825  PCI: 00:14.2 cmd <- 02
 1484 17:27:11.011291  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 17:27:11.014646  PCI: 00:14.3 cmd <- 02
 1486 17:27:11.017882  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 17:27:11.021234  PCI: 00:15.0 cmd <- 02
 1488 17:27:11.024492  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 17:27:11.028446  PCI: 00:15.1 cmd <- 02
 1490 17:27:11.031012  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 17:27:11.034114  PCI: 00:16.0 cmd <- 02
 1492 17:27:11.037574  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 17:27:11.037650  PCI: 00:17.0 cmd <- 03
 1494 17:27:11.045217  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 17:27:11.045302  PCI: 00:19.0 cmd <- 02
 1496 17:27:11.048447  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 17:27:11.051708  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 17:27:11.054690  PCI: 00:1d.0 cmd <- 06
 1499 17:27:11.057742  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 17:27:11.061407  PCI: 00:1e.0 cmd <- 06
 1501 17:27:11.064612  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 17:27:11.067561  PCI: 00:1e.2 cmd <- 06
 1503 17:27:11.070590  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 17:27:11.074024  PCI: 00:1e.3 cmd <- 02
 1505 17:27:11.077621  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 17:27:11.081320  PCI: 00:1f.0 cmd <- 407
 1507 17:27:11.084444  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 17:27:11.087246  PCI: 00:1f.3 cmd <- 02
 1509 17:27:11.090940  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 17:27:11.093990  PCI: 00:1f.4 cmd <- 03
 1511 17:27:11.097113  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 17:27:11.100651  PCI: 00:1f.5 cmd <- 406
 1513 17:27:11.107848  PCI: 01:00.0 cmd <- 02
 1514 17:27:11.112799  done.
 1515 17:27:11.124066  ME: Version: 14.0.39.1367
 1516 17:27:11.130424  BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 10
 1517 17:27:11.134318  Initializing devices...
 1518 17:27:11.134403  Root Device init ...
 1519 17:27:11.140696  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 17:27:11.143957  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 17:27:11.150383  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 17:27:11.157024  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 17:27:11.163589  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 17:27:11.167182  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 17:27:11.170662  Root Device init finished in 35178 usecs
 1526 17:27:11.173877  CPU_CLUSTER: 0 init ...
 1527 17:27:11.180887  CPU_CLUSTER: 0 init finished in 2440 usecs
 1528 17:27:11.185468  PCI: 00:00.0 init ...
 1529 17:27:11.188170  CPU TDP: 15 Watts
 1530 17:27:11.191625  CPU PL2 = 64 Watts
 1531 17:27:11.194435  PCI: 00:00.0 init finished in 7077 usecs
 1532 17:27:11.197764  PCI: 00:02.0 init ...
 1533 17:27:11.200877  PCI: 00:02.0 init finished in 2254 usecs
 1534 17:27:11.204559  PCI: 00:08.0 init ...
 1535 17:27:11.207875  PCI: 00:08.0 init finished in 2252 usecs
 1536 17:27:11.211033  PCI: 00:12.0 init ...
 1537 17:27:11.214231  PCI: 00:12.0 init finished in 2254 usecs
 1538 17:27:11.217686  PCI: 00:14.0 init ...
 1539 17:27:11.220900  PCI: 00:14.0 init finished in 2252 usecs
 1540 17:27:11.224432  PCI: 00:14.2 init ...
 1541 17:27:11.227298  PCI: 00:14.2 init finished in 2244 usecs
 1542 17:27:11.231032  PCI: 00:14.3 init ...
 1543 17:27:11.234077  PCI: 00:14.3 init finished in 2261 usecs
 1544 17:27:11.237518  PCI: 00:15.0 init ...
 1545 17:27:11.241337  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 17:27:11.244671  PCI: 00:15.0 init finished in 5979 usecs
 1547 17:27:11.248227  PCI: 00:15.1 init ...
 1548 17:27:11.251209  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 17:27:11.257285  PCI: 00:15.1 init finished in 5979 usecs
 1550 17:27:11.257370  PCI: 00:16.0 init ...
 1551 17:27:11.264174  PCI: 00:16.0 init finished in 2254 usecs
 1552 17:27:11.267200  PCI: 00:19.0 init ...
 1553 17:27:11.270806  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 17:27:11.274396  PCI: 00:19.0 init finished in 5978 usecs
 1555 17:27:11.277442  PCI: 00:1d.0 init ...
 1556 17:27:11.280934  Initializing PCH PCIe bridge.
 1557 17:27:11.284136  PCI: 00:1d.0 init finished in 5286 usecs
 1558 17:27:11.286999  PCI: 00:1f.0 init ...
 1559 17:27:11.290604  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 17:27:11.297142  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 17:27:11.297227  IOAPIC: ID = 0x02
 1562 17:27:11.300658  IOAPIC: Dumping registers
 1563 17:27:11.303817    reg 0x0000: 0x02000000
 1564 17:27:11.307380    reg 0x0001: 0x00770020
 1565 17:27:11.307465    reg 0x0002: 0x00000000
 1566 17:27:11.313817  PCI: 00:1f.0 init finished in 23530 usecs
 1567 17:27:11.317281  PCI: 00:1f.4 init ...
 1568 17:27:11.320150  PCI: 00:1f.4 init finished in 2263 usecs
 1569 17:27:11.330854  PCI: 01:00.0 init ...
 1570 17:27:11.334111  PCI: 01:00.0 init finished in 2254 usecs
 1571 17:27:11.338171  PNP: 0c09.0 init ...
 1572 17:27:11.341682  Google Chrome EC uptime: 11.087 seconds
 1573 17:27:11.348376  Google Chrome AP resets since EC boot: 0
 1574 17:27:11.351820  Google Chrome most recent AP reset causes:
 1575 17:27:11.358608  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 17:27:11.361646  PNP: 0c09.0 init finished in 20583 usecs
 1577 17:27:11.364734  Devices initialized
 1578 17:27:11.368619  Show all devs... After init.
 1579 17:27:11.368708  Root Device: enabled 1
 1580 17:27:11.371339  CPU_CLUSTER: 0: enabled 1
 1581 17:27:11.374789  DOMAIN: 0000: enabled 1
 1582 17:27:11.374875  APIC: 00: enabled 1
 1583 17:27:11.377696  PCI: 00:00.0: enabled 1
 1584 17:27:11.381284  PCI: 00:02.0: enabled 1
 1585 17:27:11.384721  PCI: 00:04.0: enabled 0
 1586 17:27:11.384806  PCI: 00:05.0: enabled 0
 1587 17:27:11.387738  PCI: 00:12.0: enabled 1
 1588 17:27:11.391660  PCI: 00:12.5: enabled 0
 1589 17:27:11.394219  PCI: 00:12.6: enabled 0
 1590 17:27:11.394304  PCI: 00:14.0: enabled 1
 1591 17:27:11.397887  PCI: 00:14.1: enabled 0
 1592 17:27:11.401935  PCI: 00:14.3: enabled 1
 1593 17:27:11.404575  PCI: 00:14.5: enabled 0
 1594 17:27:11.404660  PCI: 00:15.0: enabled 1
 1595 17:27:11.408210  PCI: 00:15.1: enabled 1
 1596 17:27:11.411350  PCI: 00:15.2: enabled 0
 1597 17:27:11.411435  PCI: 00:15.3: enabled 0
 1598 17:27:11.414488  PCI: 00:16.0: enabled 1
 1599 17:27:11.417603  PCI: 00:16.1: enabled 0
 1600 17:27:11.421146  PCI: 00:16.2: enabled 0
 1601 17:27:11.421231  PCI: 00:16.3: enabled 0
 1602 17:27:11.424861  PCI: 00:16.4: enabled 0
 1603 17:27:11.428295  PCI: 00:16.5: enabled 0
 1604 17:27:11.431321  PCI: 00:17.0: enabled 1
 1605 17:27:11.431784  PCI: 00:19.0: enabled 1
 1606 17:27:11.435642  PCI: 00:19.1: enabled 0
 1607 17:27:11.437429  PCI: 00:19.2: enabled 0
 1608 17:27:11.440890  PCI: 00:1a.0: enabled 0
 1609 17:27:11.441418  PCI: 00:1c.0: enabled 0
 1610 17:27:11.444102  PCI: 00:1c.1: enabled 0
 1611 17:27:11.447431  PCI: 00:1c.2: enabled 0
 1612 17:27:11.450891  PCI: 00:1c.3: enabled 0
 1613 17:27:11.451330  PCI: 00:1c.4: enabled 0
 1614 17:27:11.454511  PCI: 00:1c.5: enabled 0
 1615 17:27:11.457268  PCI: 00:1c.6: enabled 0
 1616 17:27:11.457707  PCI: 00:1c.7: enabled 0
 1617 17:27:11.460537  PCI: 00:1d.0: enabled 1
 1618 17:27:11.464353  PCI: 00:1d.1: enabled 0
 1619 17:27:11.467448  PCI: 00:1d.2: enabled 0
 1620 17:27:11.467891  PCI: 00:1d.3: enabled 0
 1621 17:27:11.470800  PCI: 00:1d.4: enabled 0
 1622 17:27:11.473748  PCI: 00:1d.5: enabled 0
 1623 17:27:11.477486  PCI: 00:1e.0: enabled 1
 1624 17:27:11.477966  PCI: 00:1e.1: enabled 0
 1625 17:27:11.481470  PCI: 00:1e.2: enabled 1
 1626 17:27:11.484392  PCI: 00:1e.3: enabled 1
 1627 17:27:11.487341  PCI: 00:1f.0: enabled 1
 1628 17:27:11.487807  PCI: 00:1f.1: enabled 0
 1629 17:27:11.490658  PCI: 00:1f.2: enabled 0
 1630 17:27:11.494146  PCI: 00:1f.3: enabled 1
 1631 17:27:11.497160  PCI: 00:1f.4: enabled 1
 1632 17:27:11.497651  PCI: 00:1f.5: enabled 1
 1633 17:27:11.500395  PCI: 00:1f.6: enabled 0
 1634 17:27:11.504349  USB0 port 0: enabled 1
 1635 17:27:11.504826  I2C: 01:15: enabled 1
 1636 17:27:11.507419  I2C: 02:5d: enabled 1
 1637 17:27:11.511119  GENERIC: 0.0: enabled 1
 1638 17:27:11.511560  I2C: 03:1a: enabled 1
 1639 17:27:11.513550  I2C: 03:38: enabled 1
 1640 17:27:11.517017  I2C: 03:39: enabled 1
 1641 17:27:11.517466  I2C: 03:3a: enabled 1
 1642 17:27:11.520910  I2C: 03:3b: enabled 1
 1643 17:27:11.524382  PCI: 00:00.0: enabled 1
 1644 17:27:11.526753  SPI: 00: enabled 1
 1645 17:27:11.527195  SPI: 01: enabled 1
 1646 17:27:11.530479  PNP: 0c09.0: enabled 1
 1647 17:27:11.533314  USB2 port 0: enabled 1
 1648 17:27:11.533775  USB2 port 1: enabled 1
 1649 17:27:11.537878  USB2 port 2: enabled 0
 1650 17:27:11.540534  USB2 port 3: enabled 0
 1651 17:27:11.540997  USB2 port 5: enabled 0
 1652 17:27:11.543864  USB2 port 6: enabled 1
 1653 17:27:11.546972  USB2 port 9: enabled 1
 1654 17:27:11.547458  USB3 port 0: enabled 1
 1655 17:27:11.549919  USB3 port 1: enabled 1
 1656 17:27:11.553142  USB3 port 2: enabled 1
 1657 17:27:11.556668  USB3 port 3: enabled 1
 1658 17:27:11.557261  USB3 port 4: enabled 0
 1659 17:27:11.560389  APIC: 02: enabled 1
 1660 17:27:11.563115  APIC: 01: enabled 1
 1661 17:27:11.563633  APIC: 07: enabled 1
 1662 17:27:11.566375  APIC: 03: enabled 1
 1663 17:27:11.566856  APIC: 05: enabled 1
 1664 17:27:11.570577  APIC: 06: enabled 1
 1665 17:27:11.573054  APIC: 04: enabled 1
 1666 17:27:11.573540  PCI: 00:08.0: enabled 1
 1667 17:27:11.576505  PCI: 00:14.2: enabled 1
 1668 17:27:11.579740  PCI: 01:00.0: enabled 1
 1669 17:27:11.583160  Disabling ACPI via APMC:
 1670 17:27:11.586524  done.
 1671 17:27:11.590048  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 17:27:11.592928  ELOG: NV offset 0xaf0000 size 0x4000
 1673 17:27:11.600367  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 17:27:11.607049  ELOG: Event(17) added with size 13 at 2022-08-03 17:27:12 UTC
 1675 17:27:11.613966  ELOG: Event(92) added with size 9 at 2022-08-03 17:27:12 UTC
 1676 17:27:11.620313  ELOG: Event(93) added with size 9 at 2022-08-03 17:27:12 UTC
 1677 17:27:11.627434  ELOG: Event(9A) added with size 9 at 2022-08-03 17:27:12 UTC
 1678 17:27:11.633774  ELOG: Event(9E) added with size 10 at 2022-08-03 17:27:12 UTC
 1679 17:27:11.640801  ELOG: Event(9F) added with size 14 at 2022-08-03 17:27:12 UTC
 1680 17:27:11.643845  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
 1681 17:27:11.650871  ELOG: Event(A1) added with size 10 at 2022-08-03 17:27:12 UTC
 1682 17:27:11.660834  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 17:27:11.667329  ELOG: Event(A0) added with size 9 at 2022-08-03 17:27:12 UTC
 1684 17:27:11.670661  elog_add_boot_reason: Logged dev mode boot
 1685 17:27:11.674373  Finalize devices...
 1686 17:27:11.674838  PCI: 00:17.0 final
 1687 17:27:11.676998  Devices finalized
 1688 17:27:11.680585  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 17:27:11.687060  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 17:27:11.690260  ME: HFSTS1                  : 0x90000245
 1691 17:27:11.693696  ME: HFSTS2                  : 0x3B850126
 1692 17:27:11.700272  ME: HFSTS3                  : 0x00000020
 1693 17:27:11.703489  ME: HFSTS4                  : 0x00004800
 1694 17:27:11.707103  ME: HFSTS5                  : 0x00000000
 1695 17:27:11.710438  ME: HFSTS6                  : 0x40400006
 1696 17:27:11.713773  ME: Manufacturing Mode      : NO
 1697 17:27:11.717153  ME: FW Partition Table      : OK
 1698 17:27:11.720308  ME: Bringup Loader Failure  : NO
 1699 17:27:11.723374  ME: Firmware Init Complete  : YES
 1700 17:27:11.727559  ME: Boot Options Present    : NO
 1701 17:27:11.730905  ME: Update In Progress      : NO
 1702 17:27:11.733125  ME: D0i3 Support            : YES
 1703 17:27:11.736491  ME: Low Power State Enabled : NO
 1704 17:27:11.740025  ME: CPU Replaced            : NO
 1705 17:27:11.743988  ME: CPU Replacement Valid   : YES
 1706 17:27:11.746760  ME: Current Working State   : 5
 1707 17:27:11.749732  ME: Current Operation State : 1
 1708 17:27:11.753640  ME: Current Operation Mode  : 0
 1709 17:27:11.757067  ME: Error Code              : 0
 1710 17:27:11.759924  ME: CPU Debug Disabled      : YES
 1711 17:27:11.763662  ME: TXT Support             : NO
 1712 17:27:11.769752  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 17:27:11.776625  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 17:27:11.777185  CBFS @ c08000 size 3f8000
 1715 17:27:11.783372  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 17:27:11.786310  CBFS: Locating 'fallback/dsdt.aml'
 1717 17:27:11.789925  CBFS: Found @ offset 10bb80 size 3fa5
 1718 17:27:11.796655  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 17:27:11.799600  CBFS @ c08000 size 3f8000
 1720 17:27:11.806189  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 17:27:11.806670  CBFS: Locating 'fallback/slic'
 1722 17:27:11.811683  CBFS: 'fallback/slic' not found.
 1723 17:27:11.818117  ACPI: Writing ACPI tables at 99b3e000.
 1724 17:27:11.818602  ACPI:    * FACS
 1725 17:27:11.822030  ACPI:    * DSDT
 1726 17:27:11.824914  Ramoops buffer: 0x100000@0x99a3d000.
 1727 17:27:11.828132  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 17:27:11.834829  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 17:27:11.837618  Google Chrome EC: version:
 1730 17:27:11.841419  	ro: helios_v2.0.2659-56403530b
 1731 17:27:11.844869  	rw: helios_v2.0.2849-c41de27e7d
 1732 17:27:11.845362    running image: 1
 1733 17:27:11.848571  ACPI:    * FADT
 1734 17:27:11.849079  SCI is IRQ9
 1735 17:27:11.855237  ACPI: added table 1/32, length now 40
 1736 17:27:11.855707  ACPI:     * SSDT
 1737 17:27:11.858483  Found 1 CPU(s) with 8 core(s) each.
 1738 17:27:11.861871  Error: Could not locate 'wifi_sar' in VPD.
 1739 17:27:11.868714  Checking CBFS for default SAR values
 1740 17:27:11.872438  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 17:27:11.875122  CBFS @ c08000 size 3f8000
 1742 17:27:11.882083  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 17:27:11.885234  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 17:27:11.888406  CBFS: Found @ offset 5fac0 size 77
 1745 17:27:11.891588  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 17:27:11.898345  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 17:27:11.901978  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 17:27:11.908116  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 17:27:11.911396  failed to find key in VPD: dsm_calib_r0_0
 1750 17:27:11.921766  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 17:27:11.925064  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 17:27:11.928163  failed to find key in VPD: dsm_calib_r0_1
 1753 17:27:11.938731  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 17:27:11.944743  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 17:27:11.947684  failed to find key in VPD: dsm_calib_r0_2
 1756 17:27:11.958306  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 17:27:11.961081  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 17:27:11.968104  failed to find key in VPD: dsm_calib_r0_3
 1759 17:27:11.974282  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 17:27:11.981609  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 17:27:11.984772  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 17:27:11.987591  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 17:27:11.991373  EC returned error result code 1
 1764 17:27:11.995384  EC returned error result code 1
 1765 17:27:11.999135  EC returned error result code 1
 1766 17:27:12.006235  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 17:27:12.009157  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 17:27:12.015909  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 17:27:12.022099  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 17:27:12.025733  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 17:27:12.032294  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 17:27:12.039076  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 17:27:12.045227  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 17:27:12.048562  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 17:27:12.055356  ACPI: added table 2/32, length now 44
 1776 17:27:12.055830  ACPI:    * MCFG
 1777 17:27:12.058426  ACPI: added table 3/32, length now 48
 1778 17:27:12.062426  ACPI:    * TPM2
 1779 17:27:12.065875  TPM2 log created at 99a2d000
 1780 17:27:12.068518  ACPI: added table 4/32, length now 52
 1781 17:27:12.068998  ACPI:    * MADT
 1782 17:27:12.071927  SCI is IRQ9
 1783 17:27:12.075195  ACPI: added table 5/32, length now 56
 1784 17:27:12.075649  current = 99b43ac0
 1785 17:27:12.078651  ACPI:    * DMAR
 1786 17:27:12.081685  ACPI: added table 6/32, length now 60
 1787 17:27:12.084913  ACPI:    * IGD OpRegion
 1788 17:27:12.085402  GMA: Found VBT in CBFS
 1789 17:27:12.088610  GMA: Found valid VBT in CBFS
 1790 17:27:12.091693  ACPI: added table 7/32, length now 64
 1791 17:27:12.094844  ACPI:    * HPET
 1792 17:27:12.098217  ACPI: added table 8/32, length now 68
 1793 17:27:12.102316  ACPI: done.
 1794 17:27:12.102770  ACPI tables: 31744 bytes.
 1795 17:27:12.105541  smbios_write_tables: 99a2c000
 1796 17:27:12.108527  EC returned error result code 3
 1797 17:27:12.111659  Couldn't obtain OEM name from CBI
 1798 17:27:12.115779  Create SMBIOS type 17
 1799 17:27:12.118145  PCI: 00:00.0 (Intel Cannonlake)
 1800 17:27:12.121652  PCI: 00:14.3 (Intel WiFi)
 1801 17:27:12.124970  SMBIOS tables: 939 bytes.
 1802 17:27:12.128469  Writing table forward entry at 0x00000500
 1803 17:27:12.134642  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 17:27:12.138669  Writing coreboot table at 0x99b62000
 1805 17:27:12.144370   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 17:27:12.148291   1. 0000000000001000-000000000009ffff: RAM
 1807 17:27:12.150923   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 17:27:12.157760   3. 0000000000100000-0000000099a2bfff: RAM
 1809 17:27:12.164494   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 17:27:12.167679   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 17:27:12.174461   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 17:27:12.177694   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 17:27:12.184523   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 17:27:12.187950   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 17:27:12.193988  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 17:27:12.197954  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 17:27:12.200788  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 17:27:12.208284  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 17:27:12.210780  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 17:27:12.218067  15. 0000000100000000-000000045e7fffff: RAM
 1821 17:27:12.220679  Graphics framebuffer located at 0xc0000000
 1822 17:27:12.223909  Passing 5 GPIOs to payload:
 1823 17:27:12.227318              NAME |       PORT | POLARITY |     VALUE
 1824 17:27:12.233673     write protect |  undefined |     high |       low
 1825 17:27:12.240617               lid |  undefined |     high |      high
 1826 17:27:12.244258             power |  undefined |     high |       low
 1827 17:27:12.250369             oprom |  undefined |     high |       low
 1828 17:27:12.253695          EC in RW | 0x000000cb |     high |       low
 1829 17:27:12.256834  Board ID: 4
 1830 17:27:12.260010  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 17:27:12.263686  CBFS @ c08000 size 3f8000
 1832 17:27:12.269992  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 17:27:12.276808  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
 1834 17:27:12.276889  coreboot table: 1492 bytes.
 1835 17:27:12.279824  IMD ROOT    0. 99fff000 00001000
 1836 17:27:12.283381  IMD SMALL   1. 99ffe000 00001000
 1837 17:27:12.289984  FSP MEMORY  2. 99c4e000 003b0000
 1838 17:27:12.293194  CONSOLE     3. 99c2e000 00020000
 1839 17:27:12.296746  FMAP        4. 99c2d000 0000054e
 1840 17:27:12.299966  TIME STAMP  5. 99c2c000 00000910
 1841 17:27:12.303663  VBOOT WORK  6. 99c18000 00014000
 1842 17:27:12.306725  MRC DATA    7. 99c16000 00001958
 1843 17:27:12.310571  ROMSTG STCK 8. 99c15000 00001000
 1844 17:27:12.313462  AFTER CAR   9. 99c0b000 0000a000
 1845 17:27:12.316349  RAMSTAGE   10. 99baf000 0005c000
 1846 17:27:12.320095  REFCODE    11. 99b7a000 00035000
 1847 17:27:12.323068  SMM BACKUP 12. 99b6a000 00010000
 1848 17:27:12.326196  COREBOOT   13. 99b62000 00008000
 1849 17:27:12.330072  ACPI       14. 99b3e000 00024000
 1850 17:27:12.333142  ACPI GNVS  15. 99b3d000 00001000
 1851 17:27:12.335961  RAMOOPS    16. 99a3d000 00100000
 1852 17:27:12.340230  TPM2 TCGLOG17. 99a2d000 00010000
 1853 17:27:12.343172  SMBIOS     18. 99a2c000 00000800
 1854 17:27:12.343245  IMD small region:
 1855 17:27:12.346356    IMD ROOT    0. 99ffec00 00000400
 1856 17:27:12.349279    FSP RUNTIME 1. 99ffebe0 00000004
 1857 17:27:12.352779    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 17:27:12.359457    POWER STATE 3. 99ffeb80 00000040
 1859 17:27:12.362866    ROMSTAGE    4. 99ffeb60 00000004
 1860 17:27:12.365948    MEM INFO    5. 99ffe9a0 000001b9
 1861 17:27:12.368949    VPD         6. 99ffe940 0000004c
 1862 17:27:12.372512  MTRR: Physical address space:
 1863 17:27:12.379050  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 17:27:12.382665  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 17:27:12.389153  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 17:27:12.395820  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 17:27:12.402499  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 17:27:12.409041  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 17:27:12.415783  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 17:27:12.419549  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 17:27:12.422075  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 17:27:12.428868  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 17:27:12.432236  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 17:27:12.435504  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 17:27:12.438716  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 17:27:12.442458  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 17:27:12.448701  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 17:27:12.451780  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 17:27:12.455272  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 17:27:12.458155  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 17:27:12.462466  call enable_fixed_mtrr()
 1882 17:27:12.466159  CPU physical address size: 39 bits
 1883 17:27:12.472374  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 17:27:12.475947  MTRR: WB selected as default type.
 1885 17:27:12.482576  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 17:27:12.485489  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 17:27:12.491961  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 17:27:12.498711  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 17:27:12.505111  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 17:27:12.512488  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 17:27:12.519619  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 17:27:12.521693  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 17:27:12.525195  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 17:27:12.528634  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 17:27:12.534996  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 17:27:12.538652  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 17:27:12.541353  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 17:27:12.545594  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 17:27:12.548644  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 17:27:12.554810  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 17:27:12.557969  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 17:27:12.558049  
 1903 17:27:12.560942  MTRR check
 1904 17:27:12.561027  Fixed MTRRs   : Enabled
 1905 17:27:12.564608  Variable MTRRs: Enabled
 1906 17:27:12.564693  
 1907 17:27:12.568214  call enable_fixed_mtrr()
 1908 17:27:12.570865  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1909 17:27:12.574721  CPU physical address size: 39 bits
 1910 17:27:12.581272  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1911 17:27:12.584642  CBFS @ c08000 size 3f8000
 1912 17:27:12.591013  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1913 17:27:12.594733  CBFS: Locating 'fallback/payload'
 1914 17:27:12.597499  MTRR: Fixed MSR 0x250 0x0606060606060606
 1915 17:27:12.601392  MTRR: Fixed MSR 0x250 0x0606060606060606
 1916 17:27:12.604516  MTRR: Fixed MSR 0x258 0x0606060606060606
 1917 17:27:12.611195  MTRR: Fixed MSR 0x259 0x0000000000000000
 1918 17:27:12.614438  MTRR: Fixed MSR 0x268 0x0606060606060606
 1919 17:27:12.617581  MTRR: Fixed MSR 0x269 0x0606060606060606
 1920 17:27:12.621370  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1921 17:27:12.627890  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1922 17:27:12.631096  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1923 17:27:12.634101  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1924 17:27:12.637367  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1925 17:27:12.640690  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1926 17:27:12.647202  MTRR: Fixed MSR 0x258 0x0606060606060606
 1927 17:27:12.650553  call enable_fixed_mtrr()
 1928 17:27:12.654161  CBFS: Found @ offset 1c96c0 size 3f798
 1929 17:27:12.657158  MTRR: Fixed MSR 0x250 0x0606060606060606
 1930 17:27:12.660297  MTRR: Fixed MSR 0x250 0x0606060606060606
 1931 17:27:12.663619  MTRR: Fixed MSR 0x258 0x0606060606060606
 1932 17:27:12.670113  MTRR: Fixed MSR 0x259 0x0000000000000000
 1933 17:27:12.673659  MTRR: Fixed MSR 0x268 0x0606060606060606
 1934 17:27:12.677019  MTRR: Fixed MSR 0x269 0x0606060606060606
 1935 17:27:12.680985  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1936 17:27:12.686812  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1937 17:27:12.690453  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1938 17:27:12.693255  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1939 17:27:12.696803  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1940 17:27:12.704104  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1941 17:27:12.706449  MTRR: Fixed MSR 0x258 0x0606060606060606
 1942 17:27:12.711313  call enable_fixed_mtrr()
 1943 17:27:12.713527  MTRR: Fixed MSR 0x259 0x0000000000000000
 1944 17:27:12.717183  MTRR: Fixed MSR 0x268 0x0606060606060606
 1945 17:27:12.719857  MTRR: Fixed MSR 0x269 0x0606060606060606
 1946 17:27:12.727099  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1947 17:27:12.729745  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1948 17:27:12.733583  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1949 17:27:12.736480  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1950 17:27:12.742947  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1951 17:27:12.746139  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1952 17:27:12.749466  CPU physical address size: 39 bits
 1953 17:27:12.752845  call enable_fixed_mtrr()
 1954 17:27:12.756158  MTRR: Fixed MSR 0x250 0x0606060606060606
 1955 17:27:12.759442  MTRR: Fixed MSR 0x250 0x0606060606060606
 1956 17:27:12.766134  MTRR: Fixed MSR 0x258 0x0606060606060606
 1957 17:27:12.769734  MTRR: Fixed MSR 0x259 0x0000000000000000
 1958 17:27:12.773115  MTRR: Fixed MSR 0x268 0x0606060606060606
 1959 17:27:12.776163  MTRR: Fixed MSR 0x269 0x0606060606060606
 1960 17:27:12.783012  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1961 17:27:12.785833  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1962 17:27:12.789431  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1963 17:27:12.792278  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1964 17:27:12.799106  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1965 17:27:12.802098  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1966 17:27:12.806033  MTRR: Fixed MSR 0x258 0x0606060606060606
 1967 17:27:12.809193  call enable_fixed_mtrr()
 1968 17:27:12.812315  MTRR: Fixed MSR 0x259 0x0000000000000000
 1969 17:27:12.815720  MTRR: Fixed MSR 0x268 0x0606060606060606
 1970 17:27:12.822280  MTRR: Fixed MSR 0x269 0x0606060606060606
 1971 17:27:12.826126  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1972 17:27:12.828779  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1973 17:27:12.832262  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1974 17:27:12.838880  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1975 17:27:12.841926  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1976 17:27:12.846153  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1977 17:27:12.849239  CPU physical address size: 39 bits
 1978 17:27:12.852483  call enable_fixed_mtrr()
 1979 17:27:12.855570  CPU physical address size: 39 bits
 1980 17:27:12.858641  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 17:27:12.866209  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 17:27:12.868655  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 17:27:12.871726  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 17:27:12.875257  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 17:27:12.882095  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 17:27:12.885169  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 17:27:12.889132  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 17:27:12.892000  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 17:27:12.895646  CPU physical address size: 39 bits
 1990 17:27:12.898027  call enable_fixed_mtrr()
 1991 17:27:12.901528  CPU physical address size: 39 bits
 1992 17:27:12.908136  Checking segment from ROM address 0xffdd16f8
 1993 17:27:12.911952  CPU physical address size: 39 bits
 1994 17:27:12.915123  Checking segment from ROM address 0xffdd1714
 1995 17:27:12.918210  Loading segment from ROM address 0xffdd16f8
 1996 17:27:12.921390    code (compression=0)
 1997 17:27:12.931668    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 17:27:12.938157  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 17:27:12.941134  it's not compressed!
 2000 17:27:13.032730  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 17:27:13.039193  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 17:27:13.043070  Loading segment from ROM address 0xffdd1714
 2003 17:27:13.045992    Entry Point 0x30000000
 2004 17:27:13.049417  Loaded segments
 2005 17:27:13.055807  Finalizing chipset.
 2006 17:27:13.058506  Finalizing SMM.
 2007 17:27:13.061694  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2008 17:27:13.065004  mp_park_aps done after 0 msecs.
 2009 17:27:13.071898  Jumping to boot code at 30000000(99b62000)
 2010 17:27:13.078480  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 17:27:13.078564  
 2012 17:27:13.081539  Starting depthcharge on Helios...
 2013 17:27:13.081915  end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
 2014 17:27:13.082081  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2015 17:27:13.082195  Setting prompt string to ['hatch:']
 2016 17:27:13.082307  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2017 17:27:13.091211  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 17:27:13.098030  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 17:27:13.104324  board_setup: Info: eMMC controller not present; skipping
 2020 17:27:13.107998  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 17:27:13.114320  board_setup: Info: SDHCI controller not present; skipping
 2022 17:27:13.121378  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 17:27:13.121511  Wipe memory regions:
 2024 17:27:13.124619  	[0x00000000001000, 0x000000000a0000)
 2025 17:27:13.130925  	[0x00000000100000, 0x00000030000000)
 2026 17:27:13.197907  	[0x00000030657430, 0x00000099a2c000)
 2027 17:27:13.343931  	[0x00000100000000, 0x0000045e800000)
 2028 17:27:14.733793  R8152: Initializing
 2029 17:27:14.736936  Version 9 (ocp_data = 6010)
 2030 17:27:14.741362  R8152: Done initializing
 2031 17:27:14.745287  Adding net device
 2032 17:27:15.241431  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 17:27:15.241575  
 2034 17:27:15.241858  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2036 17:27:15.342588  hatch: tftpboot 192.168.201.1 6962840/tftp-deploy-oe08rtiq/kernel/bzImage 6962840/tftp-deploy-oe08rtiq/kernel/cmdline 6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
 2037 17:27:15.342721  Setting prompt string to 'Starting kernel'
 2038 17:27:15.342796  Setting prompt string to ['Starting kernel']
 2039 17:27:15.342897  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2040 17:27:15.342977  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 2041 17:27:15.346950  tftpboot 192.168.201.1 6962840/tftp-deploy-oe08rtiq/kernel/bzImaoy-oe08rtiq/kernel/cmdline 6962840/tftp-deploy-oe08rtiq/ramdisk/ramdisk.cpio.gz
 2042 17:27:15.347045  Waiting for link
 2043 17:27:15.548317  done.
 2044 17:27:15.548889  MAC: f4:f5:e8:50:dc:f7
 2045 17:27:15.551334  Sending DHCP discover... done.
 2046 17:27:15.554974  Waiting for reply... done.
 2047 17:27:15.558544  Sending DHCP request... done.
 2048 17:27:15.561758  Waiting for reply... done.
 2049 17:27:15.564661  My ip is 192.168.201.10
 2050 17:27:15.568241  The DHCP server ip is 192.168.201.1
 2051 17:27:15.571405  TFTP server IP predefined by user: 192.168.201.1
 2052 17:27:15.578157  Bootfile predefined by user: 6962840/tftp-deploy-oe08rtiq/kernel/bzImage
 2053 17:27:15.581072  Sending tftp read request... done.
 2054 17:27:15.589221  Waiting for the transfer... 
 2055 17:27:15.832328  00000000 ################################################################
 2056 17:27:16.088798  00080000 ################################################################
 2057 17:27:16.350829  00100000 ################################################################
 2058 17:27:16.610037  00180000 ################################################################
 2059 17:27:16.855794  00200000 ################################################################
 2060 17:27:17.103560  00280000 ################################################################
 2061 17:27:17.349835  00300000 ################################################################
 2062 17:27:17.603373  00380000 ################################################################
 2063 17:27:17.856537  00400000 ################################################################
 2064 17:27:18.103254  00480000 ################################################################
 2065 17:27:18.341420  00500000 ################################################################
 2066 17:27:18.604185  00580000 ################################################################
 2067 17:27:18.866983  00600000 ################################################################ done.
 2068 17:27:18.870506  The bootfile was 6815632 bytes long.
 2069 17:27:18.874782  Sending tftp read request... done.
 2070 17:27:18.876835  Waiting for the transfer... 
 2071 17:27:19.108677  00000000 ################################################################
 2072 17:27:19.354749  00080000 ################################################################
 2073 17:27:19.604680  00100000 ################################################################
 2074 17:27:19.832004  00180000 ################################################################
 2075 17:27:20.057824  00200000 ################################################################
 2076 17:27:20.322268  00280000 ################################################################
 2077 17:27:20.568745  00300000 ################################################################
 2078 17:27:20.821774  00380000 ################################################################
 2079 17:27:21.099265  00400000 ################################################################
 2080 17:27:21.370767  00480000 ################################################################
 2081 17:27:21.494370  00500000 ############################# done.
 2082 17:27:21.497706  Sending tftp read request... done.
 2083 17:27:21.501760  Waiting for the transfer... 
 2084 17:27:21.501838  00000000 # done.
 2085 17:27:21.511177  Command line loaded dynamically from TFTP file: 6962840/tftp-deploy-oe08rtiq/kernel/cmdline
 2086 17:27:21.537057  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6962840/extract-nfsrootfs-ft85wguk,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2087 17:27:21.540924  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2088 17:27:21.547276  Shutting down all USB controllers.
 2089 17:27:21.550941  Removing current net device
 2090 17:27:21.554256  Finalizing coreboot
 2091 17:27:21.560601  Exiting depthcharge with code 4 at timestamp: 15746446
 2092 17:27:21.560855  
 2093 17:27:21.561100  Starting kernel ...
 2094 17:27:21.561294  
 2095 17:27:21.561511  
 2096 17:27:21.562160  end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
 2097 17:27:21.562540  start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
 2098 17:27:21.562830  Setting prompt string to ['Linux version [0-9]']
 2099 17:27:21.563127  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2100 17:27:21.563423  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2102 17:31:54.563581  end: 2.2.5 auto-login-action (duration 00:04:33) [common]
 2104 17:31:54.564809  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
 2106 17:31:54.565726  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2109 17:31:54.567495  end: 2 depthcharge-action (duration 00:05:00) [common]
 2111 17:31:54.568624  Cleaning after the job
 2112 17:31:54.569143  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/ramdisk
 2113 17:31:54.571526  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/kernel
 2114 17:31:54.574381  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/nfsrootfs
 2115 17:31:54.646721  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962840/tftp-deploy-oe08rtiq/modules
 2116 17:31:54.647015  start: 4.1 power-off (timeout 00:00:30) [common]
 2117 17:31:54.647180  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2118 17:31:54.666549  >> Command sent successfully.

 2119 17:31:54.668472  Returned 0 in 0 seconds
 2120 17:31:54.769239  end: 4.1 power-off (duration 00:00:00) [common]
 2122 17:31:54.769577  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2123 17:31:54.769823  Listened to connection for namespace 'common' for up to 1s
 2124 17:31:55.773041  Finalising connection for namespace 'common'
 2125 17:31:55.773229  Disconnecting from shell: Finalise
 2126 17:31:55.873988  end: 4.2 read-feedback (duration 00:00:01) [common]
 2127 17:31:55.874171  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6962840
 2128 17:31:56.054676  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6962840
 2129 17:31:56.054867  JobError: Your job cannot terminate cleanly.