Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 17:28:30.737961 lava-dispatcher, installed at version: 2022.06
2 17:28:30.738157 start: 0 validate
3 17:28:30.738288 Start time: 2022-08-03 17:28:30.738282+00:00 (UTC)
4 17:28:30.738413 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:28:30.738540 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Finitrd.cpio.gz exists
6 17:28:31.020527 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:28:31.021120 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:28:31.309368 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:28:31.310059 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220716.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:28:31.604291 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:28:31.604996 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-74-gc99f2b257bde3%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:28:31.904564 validate duration: 1.17
14 17:28:31.904831 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:28:31.904934 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:28:31.905029 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:28:31.905123 Not decompressing ramdisk as can be used compressed.
18 17:28:31.905206 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/initrd.cpio.gz
19 17:28:31.905274 saving as /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/ramdisk/initrd.cpio.gz
20 17:28:31.905336 total size: 5411064 (5MB)
21 17:28:31.906412 progress 0% (0MB)
22 17:28:31.907790 progress 5% (0MB)
23 17:28:31.909076 progress 10% (0MB)
24 17:28:31.910444 progress 15% (0MB)
25 17:28:31.911855 progress 20% (1MB)
26 17:28:31.913115 progress 25% (1MB)
27 17:28:31.914407 progress 30% (1MB)
28 17:28:31.915703 progress 35% (1MB)
29 17:28:31.917142 progress 40% (2MB)
30 17:28:31.918398 progress 45% (2MB)
31 17:28:31.919653 progress 50% (2MB)
32 17:28:31.920909 progress 55% (2MB)
33 17:28:31.922320 progress 60% (3MB)
34 17:28:31.923600 progress 65% (3MB)
35 17:28:31.924884 progress 70% (3MB)
36 17:28:31.926155 progress 75% (3MB)
37 17:28:31.927553 progress 80% (4MB)
38 17:28:31.928803 progress 85% (4MB)
39 17:28:31.930210 progress 90% (4MB)
40 17:28:31.931467 progress 95% (4MB)
41 17:28:31.932910 progress 100% (5MB)
42 17:28:31.933072 5MB downloaded in 0.03s (186.08MB/s)
43 17:28:31.933213 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:28:31.933506 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:28:31.933593 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:28:31.933677 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:28:31.933777 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:28:31.933844 saving as /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/kernel/bzImage
50 17:28:31.933936 total size: 6815632 (6MB)
51 17:28:31.933997 No compression specified
52 17:28:31.934993 progress 0% (0MB)
53 17:28:31.936719 progress 5% (0MB)
54 17:28:31.938347 progress 10% (0MB)
55 17:28:31.940131 progress 15% (1MB)
56 17:28:31.941843 progress 20% (1MB)
57 17:28:31.943429 progress 25% (1MB)
58 17:28:31.945147 progress 30% (1MB)
59 17:28:31.946755 progress 35% (2MB)
60 17:28:31.948450 progress 40% (2MB)
61 17:28:31.950032 progress 45% (2MB)
62 17:28:31.951582 progress 50% (3MB)
63 17:28:31.953400 progress 55% (3MB)
64 17:28:31.954944 progress 60% (3MB)
65 17:28:31.956671 progress 65% (4MB)
66 17:28:31.958271 progress 70% (4MB)
67 17:28:31.959817 progress 75% (4MB)
68 17:28:31.961576 progress 80% (5MB)
69 17:28:31.963122 progress 85% (5MB)
70 17:28:31.964813 progress 90% (5MB)
71 17:28:31.966418 progress 95% (6MB)
72 17:28:31.967980 progress 100% (6MB)
73 17:28:31.968292 6MB downloaded in 0.03s (189.21MB/s)
74 17:28:31.968434 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:28:31.968667 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:28:31.968754 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:28:31.968839 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:28:31.968939 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220716.0/amd64/full.rootfs.tar.xz
80 17:28:31.969005 saving as /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/nfsrootfs/full.rootfs.tar
81 17:28:31.969066 total size: 122624016 (116MB)
82 17:28:31.969127 Using unxz to decompress xz
83 17:28:31.972368 progress 0% (0MB)
84 17:28:32.403113 progress 5% (5MB)
85 17:28:32.839706 progress 10% (11MB)
86 17:28:33.277997 progress 15% (17MB)
87 17:28:33.723536 progress 20% (23MB)
88 17:28:34.031157 progress 25% (29MB)
89 17:28:34.361518 progress 30% (35MB)
90 17:28:34.594973 progress 35% (40MB)
91 17:28:34.796546 progress 40% (46MB)
92 17:28:35.131924 progress 45% (52MB)
93 17:28:35.479399 progress 50% (58MB)
94 17:28:35.803121 progress 55% (64MB)
95 17:28:36.140312 progress 60% (70MB)
96 17:28:36.458725 progress 65% (76MB)
97 17:28:36.828513 progress 70% (81MB)
98 17:28:37.230264 progress 75% (87MB)
99 17:28:37.632475 progress 80% (93MB)
100 17:28:37.743380 progress 85% (99MB)
101 17:28:37.904845 progress 90% (105MB)
102 17:28:38.230630 progress 95% (111MB)
103 17:28:38.590801 progress 100% (116MB)
104 17:28:38.595840 116MB downloaded in 6.63s (17.65MB/s)
105 17:28:38.596102 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:28:38.596372 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:28:38.596468 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:28:38.596562 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:28:38.596680 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-74-gc99f2b257bde3/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:28:38.596755 saving as /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/modules/modules.tar
112 17:28:38.596820 total size: 51872 (0MB)
113 17:28:38.596884 Using unxz to decompress xz
114 17:28:38.600077 progress 63% (0MB)
115 17:28:38.600449 progress 100% (0MB)
116 17:28:38.603647 0MB downloaded in 0.01s (7.25MB/s)
117 17:28:38.603861 end: 1.4.1 http-download (duration 00:00:00) [common]
119 17:28:38.604121 end: 1.4 download-retry (duration 00:00:00) [common]
120 17:28:38.604219 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 17:28:38.604316 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 17:28:40.255355 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6962851/extract-nfsrootfs-f0nndzq7
123 17:28:40.255561 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 17:28:40.255668 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 17:28:40.255810 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul
126 17:28:40.255919 makedir: /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin
127 17:28:40.256014 makedir: /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/tests
128 17:28:40.256100 makedir: /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/results
129 17:28:40.256199 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-add-keys
130 17:28:40.256331 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-add-sources
131 17:28:40.256450 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-background-process-start
132 17:28:40.256567 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-background-process-stop
133 17:28:40.256681 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-common-functions
134 17:28:40.256794 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-echo-ipv4
135 17:28:40.256907 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-install-packages
136 17:28:40.257018 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-installed-packages
137 17:28:40.257131 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-os-build
138 17:28:40.257242 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-probe-channel
139 17:28:40.257360 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-probe-ip
140 17:28:40.257471 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-target-ip
141 17:28:40.257582 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-target-mac
142 17:28:40.257693 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-target-storage
143 17:28:40.257806 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-case
144 17:28:40.257920 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-event
145 17:28:40.258031 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-feedback
146 17:28:40.258144 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-raise
147 17:28:40.258254 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-reference
148 17:28:40.258364 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-runner
149 17:28:40.258474 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-set
150 17:28:40.258586 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-test-shell
151 17:28:40.258697 Updating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-install-packages (oe)
152 17:28:40.258813 Updating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/bin/lava-installed-packages (oe)
153 17:28:40.258912 Creating /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/environment
154 17:28:40.258998 LAVA metadata
155 17:28:40.259066 - LAVA_JOB_ID=6962851
156 17:28:40.259133 - LAVA_DISPATCHER_IP=192.168.201.1
157 17:28:40.259233 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 17:28:40.259299 skipped lava-vland-overlay
159 17:28:40.259377 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 17:28:40.259460 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 17:28:40.259523 skipped lava-multinode-overlay
162 17:28:40.259599 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 17:28:40.259680 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 17:28:40.259755 Loading test definitions
165 17:28:40.259846 start: 1.5.2.3.1 git-repo-action (timeout 00:09:52) [common]
166 17:28:40.259919 Using /lava-6962851 at stage 0
167 17:28:40.260014 Fetching tests from https://github.com/kernelci/test-definitions
168 17:28:40.260095 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/0/tests/0_ltp-timers'
169 17:28:43.230104 Running '/usr/bin/git checkout kernelci.org
170 17:28:43.363338 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 17:28:43.364009 uuid=6962851_1.5.2.3.1 testdef=None
172 17:28:43.364167 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 17:28:43.364420 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
175 17:28:43.365083 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 17:28:43.365378 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
178 17:28:43.366195 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 17:28:43.366445 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
181 17:28:43.367212 runner path: /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/0/tests/0_ltp-timers test_uuid 6962851_1.5.2.3.1
182 17:28:43.367303 GRP_TEST='TMR'
183 17:28:43.367370 SKIPFILE='skipfile-lkft.yaml'
184 17:28:43.367430 SKIP_INSTALL='true'
185 17:28:43.367489 TST_CMDFILES=''
186 17:28:43.367620 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 17:28:43.367839 Creating lava-test-runner.conf files
189 17:28:43.367907 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6962851/lava-overlay-5uyxixul/lava-6962851/0 for stage 0
190 17:28:43.367991 - 0_ltp-timers
191 17:28:43.368095 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
192 17:28:43.368189 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
193 17:28:50.480368 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 17:28:50.480533 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
195 17:28:50.480632 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 17:28:50.480735 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
197 17:28:50.480829 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
198 17:28:50.584135 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 17:28:50.584485 start: 1.5.4 extract-modules (timeout 00:09:41) [common]
200 17:28:50.584598 extracting modules file /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962851/extract-nfsrootfs-f0nndzq7
201 17:28:50.588665 extracting modules file /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6962851/extract-overlay-ramdisk-0n72pkrc/ramdisk
202 17:28:50.592627 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 17:28:50.592749 start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
204 17:28:50.592839 [common] Applying overlay to NFS
205 17:28:50.592912 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6962851/compress-overlay-mwsu2jxj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6962851/extract-nfsrootfs-f0nndzq7
206 17:28:51.032217 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 17:28:51.032380 start: 1.5.6 configure-preseed-file (timeout 00:09:41) [common]
208 17:28:51.032478 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 17:28:51.032594 start: 1.5.7 compress-ramdisk (timeout 00:09:41) [common]
210 17:28:51.032705 Building ramdisk /var/lib/lava/dispatcher/tmp/6962851/extract-overlay-ramdisk-0n72pkrc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6962851/extract-overlay-ramdisk-0n72pkrc/ramdisk
211 17:28:51.065754 >> 24431 blocks
212 17:28:51.529671 rename /var/lib/lava/dispatcher/tmp/6962851/extract-overlay-ramdisk-0n72pkrc/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
213 17:28:51.530071 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
214 17:28:51.530196 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
215 17:28:51.530303 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
216 17:28:51.530401 No mkimage arch provided, not using FIT.
217 17:28:51.530492 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 17:28:51.530576 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 17:28:51.530671 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
220 17:28:51.530763 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
221 17:28:51.530844 No LXC device requested
222 17:28:51.530927 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 17:28:51.531013 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
224 17:28:51.531099 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 17:28:51.531171 Checking files for TFTP limit of 4294967296 bytes.
226 17:28:51.531539 end: 1 tftp-deploy (duration 00:00:20) [common]
227 17:28:51.531646 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 17:28:51.531741 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 17:28:51.531869 substitutions:
230 17:28:51.531936 - {DTB}: None
231 17:28:51.532000 - {INITRD}: 6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
232 17:28:51.532062 - {KERNEL}: 6962851/tftp-deploy-echciovj/kernel/bzImage
233 17:28:51.532121 - {LAVA_MAC}: None
234 17:28:51.532180 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6962851/extract-nfsrootfs-f0nndzq7
235 17:28:51.532240 - {NFS_SERVER_IP}: 192.168.201.1
236 17:28:51.532298 - {PRESEED_CONFIG}: None
237 17:28:51.532355 - {PRESEED_LOCAL}: None
238 17:28:51.532411 - {RAMDISK}: 6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
239 17:28:51.532467 - {ROOT_PART}: None
240 17:28:51.532523 - {ROOT}: None
241 17:28:51.532579 - {SERVER_IP}: 192.168.201.1
242 17:28:51.532634 - {TEE}: None
243 17:28:51.532690 Parsed boot commands:
244 17:28:51.532745 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 17:28:51.532897 Parsed boot commands: tftpboot 192.168.201.1 6962851/tftp-deploy-echciovj/kernel/bzImage 6962851/tftp-deploy-echciovj/kernel/cmdline 6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
246 17:28:51.532988 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 17:28:51.533075 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 17:28:51.533168 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 17:28:51.533253 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 17:28:51.533397 Not connected, no need to disconnect.
251 17:28:51.533476 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 17:28:51.533560 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 17:28:51.533629 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
254 17:28:51.536354 Setting prompt string to ['lava-test: # ']
255 17:28:51.536646 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 17:28:51.536753 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 17:28:51.536850 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 17:28:51.536943 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 17:28:51.537118 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
260 17:28:51.556295 >> Command sent successfully.
261 17:28:51.558405 Returned 0 in 0 seconds
262 17:28:51.659186 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
264 17:28:51.659525 end: 2.2.2 reset-device (duration 00:00:00) [common]
265 17:28:51.659625 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
266 17:28:51.659710 Setting prompt string to 'Starting depthcharge on Helios...'
267 17:28:51.659777 Changing prompt to 'Starting depthcharge on Helios...'
268 17:28:51.659843 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 17:28:51.660123 [Enter `^Ec?' for help]
270 17:28:58.844820
271 17:28:58.844982
272 17:28:58.854321 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 17:28:58.857807 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 17:28:58.864492 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 17:28:58.867869 CPU: AES supported, TXT NOT supported, VT supported
276 17:28:58.874261 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 17:28:58.881161 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 17:28:58.884003 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 17:28:58.887567 VBOOT: Loading verstage.
280 17:28:58.894016 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
281 17:28:58.897209 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 17:28:58.903826 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 17:28:58.903908 CBFS @ c08000 size 3f8000
284 17:28:58.910552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 17:28:58.913712 CBFS: Locating 'fallback/verstage'
286 17:28:58.920375 CBFS: Found @ offset 10fb80 size 1072c
287 17:28:58.920458
288 17:28:58.920524
289 17:28:58.930015 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 17:28:58.945812 Probing TPM: . done!
291 17:28:58.949124 TPM ready after 0 ms
292 17:28:58.952671 Connected to device vid:did:rid of 1ae0:0028:00
293 17:28:58.962644 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
294 17:28:58.966028 Initialized TPM device CR50 revision 0
295 17:28:58.999048 tlcl_send_startup: Startup return code is 0
296 17:28:58.999132 TPM: setup succeeded
297 17:28:59.011785 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 17:28:59.015642 Chrome EC: UHEPI supported
299 17:28:59.018861 Phase 1
300 17:28:59.022295 FMAP: area GBB found @ c05000 (12288 bytes)
301 17:28:59.028846 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 17:28:59.031789 Phase 2
303 17:28:59.031872 Phase 3
304 17:28:59.035111 FMAP: area GBB found @ c05000 (12288 bytes)
305 17:28:59.041650 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 17:28:59.048279 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 17:28:59.051758 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 17:28:59.058283 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 17:28:59.074441 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 17:28:59.077456 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 17:28:59.084187 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 17:28:59.088440 Phase 4
313 17:28:59.091793 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 17:28:59.101232 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 17:28:59.278212 VB2:vb2_rsa_verify_digest() Digest check failed!
316 17:28:59.284460 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 17:28:59.284556 Saving nvdata
318 17:28:59.287650 Reboot requested (10020007)
319 17:28:59.291058 board_reset() called!
320 17:28:59.291145 full_reset() called!
321 17:29:03.812478
322 17:29:03.813026
323 17:29:03.821891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 17:29:03.825580 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 17:29:03.832197 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 17:29:03.835003 CPU: AES supported, TXT NOT supported, VT supported
327 17:29:03.841758 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 17:29:03.848225 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 17:29:03.851848 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 17:29:03.854967 VBOOT: Loading verstage.
331 17:29:03.861745 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
332 17:29:03.864847 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 17:29:03.871544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 17:29:03.872086 CBFS @ c08000 size 3f8000
335 17:29:03.878202 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 17:29:03.880935 CBFS: Locating 'fallback/verstage'
337 17:29:03.887650 CBFS: Found @ offset 10fb80 size 1072c
338 17:29:03.888084
339 17:29:03.888477
340 17:29:03.897791 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 17:29:03.913752 Probing TPM: . done!
342 17:29:03.916714 TPM ready after 0 ms
343 17:29:03.919695 Connected to device vid:did:rid of 1ae0:0028:00
344 17:29:03.929975 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
345 17:29:03.933251 Initialized TPM device CR50 revision 0
346 17:29:03.966946 tlcl_send_startup: Startup return code is 0
347 17:29:03.967491 TPM: setup succeeded
348 17:29:03.979844 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 17:29:03.983152 Chrome EC: UHEPI supported
350 17:29:03.986866 Phase 1
351 17:29:03.989655 FMAP: area GBB found @ c05000 (12288 bytes)
352 17:29:03.996321 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 17:29:04.002949 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 17:29:04.006121 Recovery requested (1009000e)
355 17:29:04.012318 Saving nvdata
356 17:29:04.018455 tlcl_extend: response is 0
357 17:29:04.026803 tlcl_extend: response is 0
358 17:29:04.033701 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 17:29:04.037444 CBFS @ c08000 size 3f8000
360 17:29:04.043991 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 17:29:04.047169 CBFS: Locating 'fallback/romstage'
362 17:29:04.050294 CBFS: Found @ offset 80 size 145fc
363 17:29:04.053806 Accumulated console time in verstage 98 ms
364 17:29:04.054336
365 17:29:04.054690
366 17:29:04.067033 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 17:29:04.073785 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 17:29:04.076860 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 17:29:04.080205 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 17:29:04.086783 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 17:29:04.089833 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 17:29:04.093212 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 17:29:04.096621 TCO_STS: 0000 0000
374 17:29:04.099876 GEN_PMCON: e0015238 00000200
375 17:29:04.102997 GBLRST_CAUSE: 00000000 00000000
376 17:29:04.103429 prev_sleep_state 5
377 17:29:04.106622 Boot Count incremented to 27676
378 17:29:04.113356 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 17:29:04.116539 CBFS @ c08000 size 3f8000
380 17:29:04.123796 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 17:29:04.124370 CBFS: Locating 'fspm.bin'
382 17:29:04.130137 CBFS: Found @ offset 5ffc0 size 71000
383 17:29:04.133076 Chrome EC: UHEPI supported
384 17:29:04.139868 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 17:29:04.143410 Probing TPM: done!
386 17:29:04.150114 Connected to device vid:did:rid of 1ae0:0028:00
387 17:29:04.160199 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
388 17:29:04.165893 Initialized TPM device CR50 revision 0
389 17:29:04.175264 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 17:29:04.184753 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 17:29:04.185295 MRC cache found, size 1948
392 17:29:04.187947 bootmode is set to: 2
393 17:29:04.191543 PRMRR disabled by config.
394 17:29:04.194622 SPD INDEX = 1
395 17:29:04.198101 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 17:29:04.201465 CBFS @ c08000 size 3f8000
397 17:29:04.207773 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 17:29:04.208308 CBFS: Locating 'spd.bin'
399 17:29:04.211104 CBFS: Found @ offset 5fb80 size 400
400 17:29:04.214272 SPD: module type is LPDDR3
401 17:29:04.217691 SPD: module part is
402 17:29:04.224468 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 17:29:04.227511 SPD: device width 4 bits, bus width 8 bits
404 17:29:04.231267 SPD: module size is 4096 MB (per channel)
405 17:29:04.234099 memory slot: 0 configuration done.
406 17:29:04.240742 memory slot: 2 configuration done.
407 17:29:04.289645 CBMEM:
408 17:29:04.292945 IMD: root @ 99fff000 254 entries.
409 17:29:04.296200 IMD: root @ 99ffec00 62 entries.
410 17:29:04.299719 External stage cache:
411 17:29:04.302886 IMD: root @ 9abff000 254 entries.
412 17:29:04.306181 IMD: root @ 9abfec00 62 entries.
413 17:29:04.312660 Chrome EC: clear events_b mask to 0x0000000020004000
414 17:29:04.325309 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 17:29:04.335640 tlcl_write: response is 0
416 17:29:04.347486 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 17:29:04.353978 MRC: TPM MRC hash updated successfully.
418 17:29:04.354420 2 DIMMs found
419 17:29:04.357523 SMM Memory Map
420 17:29:04.360560 SMRAM : 0x9a000000 0x1000000
421 17:29:04.363968 Subregion 0: 0x9a000000 0xa00000
422 17:29:04.367506 Subregion 1: 0x9aa00000 0x200000
423 17:29:04.370447 Subregion 2: 0x9ac00000 0x400000
424 17:29:04.373808 top_of_ram = 0x9a000000
425 17:29:04.377382 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 17:29:04.383385 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 17:29:04.387006 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 17:29:04.393431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 17:29:04.396976 CBFS @ c08000 size 3f8000
430 17:29:04.403475 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 17:29:04.406958 CBFS: Locating 'fallback/postcar'
432 17:29:04.410035 CBFS: Found @ offset 107000 size 4b44
433 17:29:04.416630 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 17:29:04.426428 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 17:29:04.429424 Processing 180 relocs. Offset value of 0x97c0c000
436 17:29:04.438231 Accumulated console time in romstage 286 ms
437 17:29:04.438766
438 17:29:04.439120
439 17:29:04.447907 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 17:29:04.454392 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 17:29:04.457741 CBFS @ c08000 size 3f8000
442 17:29:04.464019 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 17:29:04.467860 CBFS: Locating 'fallback/ramstage'
444 17:29:04.470585 CBFS: Found @ offset 43380 size 1b9e8
445 17:29:04.477648 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 17:29:04.509560 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 17:29:04.516097 Processing 3976 relocs. Offset value of 0x98db0000
448 17:29:04.519367 Accumulated console time in postcar 52 ms
449 17:29:04.519703
450 17:29:04.519911
451 17:29:04.529081 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 17:29:04.535822 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 17:29:04.539140 WARNING: RO_VPD is uninitialized or empty.
454 17:29:04.542364 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 17:29:04.549162 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 17:29:04.549745 Normal boot.
457 17:29:04.555953 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 17:29:04.558984 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 17:29:04.562348 CBFS @ c08000 size 3f8000
460 17:29:04.568807 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 17:29:04.572041 CBFS: Locating 'cpu_microcode_blob.bin'
462 17:29:04.575618 CBFS: Found @ offset 14700 size 2ec00
463 17:29:04.582160 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 17:29:04.582720 Skip microcode update
465 17:29:04.588683 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 17:29:04.592138 CBFS @ c08000 size 3f8000
467 17:29:04.595337 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 17:29:04.598659 CBFS: Locating 'fsps.bin'
469 17:29:04.601831 CBFS: Found @ offset d1fc0 size 35000
470 17:29:04.628091 Detected 4 core, 8 thread CPU.
471 17:29:04.631254 Setting up SMI for CPU
472 17:29:04.634518 IED base = 0x9ac00000
473 17:29:04.634954 IED size = 0x00400000
474 17:29:04.637504 Will perform SMM setup.
475 17:29:04.644490 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 17:29:04.651489 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 17:29:04.657562 Processing 16 relocs. Offset value of 0x00030000
478 17:29:04.658103 Attempting to start 7 APs
479 17:29:04.663941 Waiting for 10ms after sending INIT.
480 17:29:04.677927 Waiting for 1st SIPI to complete...done.
481 17:29:04.678472 AP: slot 3 apic_id 1.
482 17:29:04.684329 Waiting for 2nd SIPI to complete...done.
483 17:29:04.684864 AP: slot 1 apic_id 2.
484 17:29:04.687791 AP: slot 4 apic_id 3.
485 17:29:04.690750 AP: slot 6 apic_id 4.
486 17:29:04.691181 AP: slot 5 apic_id 5.
487 17:29:04.694318 AP: slot 7 apic_id 6.
488 17:29:04.697295 AP: slot 2 apic_id 7.
489 17:29:04.704181 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 17:29:04.710888 Processing 13 relocs. Offset value of 0x00038000
491 17:29:04.714214 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 17:29:04.720346 Installing SMM handler to 0x9a000000
493 17:29:04.727415 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 17:29:04.734056 Processing 658 relocs. Offset value of 0x9a010000
495 17:29:04.740596 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 17:29:04.743806 Processing 13 relocs. Offset value of 0x9a008000
497 17:29:04.750239 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 17:29:04.757023 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 17:29:04.763280 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 17:29:04.766836 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 17:29:04.773818 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 17:29:04.780165 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 17:29:04.786244 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 17:29:04.793222 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 17:29:04.796364 Clearing SMI status registers
506 17:29:04.796941 SMI_STS: PM1
507 17:29:04.799506 PM1_STS: PWRBTN
508 17:29:04.800057 TCO_STS: SECOND_TO
509 17:29:04.802715 New SMBASE 0x9a000000
510 17:29:04.805882 In relocation handler: CPU 0
511 17:29:04.809415 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 17:29:04.815891 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 17:29:04.816444 Relocation complete.
514 17:29:04.819102 New SMBASE 0x99fff400
515 17:29:04.822356 In relocation handler: CPU 3
516 17:29:04.825602 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
517 17:29:04.832642 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 17:29:04.833199 Relocation complete.
519 17:29:04.835224 New SMBASE 0x99fff000
520 17:29:04.838774 In relocation handler: CPU 4
521 17:29:04.841845 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
522 17:29:04.848573 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 17:29:04.849131 Relocation complete.
524 17:29:04.852144 New SMBASE 0x99fffc00
525 17:29:04.855113 In relocation handler: CPU 1
526 17:29:04.858891 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
527 17:29:04.865530 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 17:29:04.866084 Relocation complete.
529 17:29:04.868494 New SMBASE 0x99ffe800
530 17:29:04.871857 In relocation handler: CPU 6
531 17:29:04.874933 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
532 17:29:04.881438 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 17:29:04.881989 Relocation complete.
534 17:29:04.884941 New SMBASE 0x99ffec00
535 17:29:04.888213 In relocation handler: CPU 5
536 17:29:04.891326 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
537 17:29:04.898071 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 17:29:04.898605 Relocation complete.
539 17:29:04.901382 New SMBASE 0x99ffe400
540 17:29:04.904916 In relocation handler: CPU 7
541 17:29:04.907899 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 17:29:04.911089 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 17:29:04.914695 Relocation complete.
544 17:29:04.917515 New SMBASE 0x99fff800
545 17:29:04.920959 In relocation handler: CPU 2
546 17:29:04.924608 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
547 17:29:04.927471 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 17:29:04.931141 Relocation complete.
549 17:29:04.933967 Initializing CPU #0
550 17:29:04.937728 CPU: vendor Intel device 806ec
551 17:29:04.940603 CPU: family 06, model 8e, stepping 0c
552 17:29:04.944039 Clearing out pending MCEs
553 17:29:04.944580 Setting up local APIC...
554 17:29:04.947437 apic_id: 0x00 done.
555 17:29:04.950710 Turbo is available but hidden
556 17:29:04.953789 Turbo is available and visible
557 17:29:04.957006 VMX status: enabled
558 17:29:04.960190 IA32_FEATURE_CONTROL status: locked
559 17:29:04.960624 Skip microcode update
560 17:29:04.963621 CPU #0 initialized
561 17:29:04.966766 Initializing CPU #3
562 17:29:04.967324 Initializing CPU #1
563 17:29:04.970356 Initializing CPU #4
564 17:29:04.973547 CPU: vendor Intel device 806ec
565 17:29:04.976956 CPU: family 06, model 8e, stepping 0c
566 17:29:04.980088 CPU: vendor Intel device 806ec
567 17:29:04.983350 CPU: family 06, model 8e, stepping 0c
568 17:29:04.986743 Clearing out pending MCEs
569 17:29:04.990195 Clearing out pending MCEs
570 17:29:04.990745 Setting up local APIC...
571 17:29:04.993223 CPU: vendor Intel device 806ec
572 17:29:04.999886 CPU: family 06, model 8e, stepping 0c
573 17:29:05.000441 Clearing out pending MCEs
574 17:29:05.003178 apic_id: 0x02 done.
575 17:29:05.006352 Setting up local APIC...
576 17:29:05.009919 Setting up local APIC...
577 17:29:05.010473 Initializing CPU #6
578 17:29:05.013246 Initializing CPU #5
579 17:29:05.016464 CPU: vendor Intel device 806ec
580 17:29:05.019842 CPU: family 06, model 8e, stepping 0c
581 17:29:05.022430 CPU: vendor Intel device 806ec
582 17:29:05.026060 CPU: family 06, model 8e, stepping 0c
583 17:29:05.029331 Clearing out pending MCEs
584 17:29:05.032640 Clearing out pending MCEs
585 17:29:05.033182 Setting up local APIC...
586 17:29:05.036061 Initializing CPU #7
587 17:29:05.039366 Initializing CPU #2
588 17:29:05.042646 CPU: vendor Intel device 806ec
589 17:29:05.045847 CPU: family 06, model 8e, stepping 0c
590 17:29:05.049427 CPU: vendor Intel device 806ec
591 17:29:05.052318 CPU: family 06, model 8e, stepping 0c
592 17:29:05.055684 Clearing out pending MCEs
593 17:29:05.056129 Clearing out pending MCEs
594 17:29:05.059285 Setting up local APIC...
595 17:29:05.062249 VMX status: enabled
596 17:29:05.062700 apic_id: 0x03 done.
597 17:29:05.069233 IA32_FEATURE_CONTROL status: locked
598 17:29:05.069794 VMX status: enabled
599 17:29:05.072359 Skip microcode update
600 17:29:05.075917 IA32_FEATURE_CONTROL status: locked
601 17:29:05.079051 CPU #1 initialized
602 17:29:05.079585 Skip microcode update
603 17:29:05.082185 apic_id: 0x01 done.
604 17:29:05.085546 Setting up local APIC...
605 17:29:05.086131 Setting up local APIC...
606 17:29:05.088844 apic_id: 0x04 done.
607 17:29:05.092054 VMX status: enabled
608 17:29:05.092589 CPU #4 initialized
609 17:29:05.095659 apic_id: 0x06 done.
610 17:29:05.098698 apic_id: 0x07 done.
611 17:29:05.099233 VMX status: enabled
612 17:29:05.101990 VMX status: enabled
613 17:29:05.105442 IA32_FEATURE_CONTROL status: locked
614 17:29:05.108725 IA32_FEATURE_CONTROL status: locked
615 17:29:05.111674 Skip microcode update
616 17:29:05.112109 Skip microcode update
617 17:29:05.115021 CPU #7 initialized
618 17:29:05.118483 CPU #2 initialized
619 17:29:05.121421 IA32_FEATURE_CONTROL status: locked
620 17:29:05.121864 VMX status: enabled
621 17:29:05.124845 apic_id: 0x05 done.
622 17:29:05.128372 IA32_FEATURE_CONTROL status: locked
623 17:29:05.131634 VMX status: enabled
624 17:29:05.132169 Skip microcode update
625 17:29:05.134782 IA32_FEATURE_CONTROL status: locked
626 17:29:05.137867 CPU #6 initialized
627 17:29:05.141334 Skip microcode update
628 17:29:05.141860 Skip microcode update
629 17:29:05.144427 CPU #5 initialized
630 17:29:05.148088 CPU #3 initialized
631 17:29:05.151496 bsp_do_flight_plan done after 465 msecs.
632 17:29:05.154176 CPU: frequency set to 4200 MHz
633 17:29:05.154614 Enabling SMIs.
634 17:29:05.157874 Locking SMM.
635 17:29:05.171538 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 17:29:05.174808 CBFS @ c08000 size 3f8000
637 17:29:05.181707 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 17:29:05.182244 CBFS: Locating 'vbt.bin'
639 17:29:05.187749 CBFS: Found @ offset 5f5c0 size 499
640 17:29:05.191264 Found a VBT of 4608 bytes after decompression
641 17:29:05.372551 Display FSP Version Info HOB
642 17:29:05.376054 Reference Code - CPU = 9.0.1e.30
643 17:29:05.379513 uCode Version = 0.0.0.ca
644 17:29:05.382398 TXT ACM version = ff.ff.ff.ffff
645 17:29:05.385322 Display FSP Version Info HOB
646 17:29:05.389110 Reference Code - ME = 9.0.1e.30
647 17:29:05.391938 MEBx version = 0.0.0.0
648 17:29:05.395499 ME Firmware Version = Consumer SKU
649 17:29:05.398488 Display FSP Version Info HOB
650 17:29:05.402211 Reference Code - CML PCH = 9.0.1e.30
651 17:29:05.405174 PCH-CRID Status = Disabled
652 17:29:05.408854 PCH-CRID Original Value = ff.ff.ff.ffff
653 17:29:05.411862 PCH-CRID New Value = ff.ff.ff.ffff
654 17:29:05.415470 OPROM - RST - RAID = ff.ff.ff.ffff
655 17:29:05.418344 ChipsetInit Base Version = ff.ff.ff.ffff
656 17:29:05.424589 ChipsetInit Oem Version = ff.ff.ff.ffff
657 17:29:05.425134 Display FSP Version Info HOB
658 17:29:05.431427 Reference Code - SA - System Agent = 9.0.1e.30
659 17:29:05.434858 Reference Code - MRC = 0.7.1.6c
660 17:29:05.438005 SA - PCIe Version = 9.0.1e.30
661 17:29:05.441035 SA-CRID Status = Disabled
662 17:29:05.444779 SA-CRID Original Value = 0.0.0.c
663 17:29:05.445344 SA-CRID New Value = 0.0.0.c
664 17:29:05.447856 OPROM - VBIOS = ff.ff.ff.ffff
665 17:29:05.451672 RTC Init
666 17:29:05.454464 Set power on after power failure.
667 17:29:05.457903 Disabling Deep S3
668 17:29:05.458438 Disabling Deep S3
669 17:29:05.461086 Disabling Deep S4
670 17:29:05.461644 Disabling Deep S4
671 17:29:05.464701 Disabling Deep S5
672 17:29:05.465243 Disabling Deep S5
673 17:29:05.470920 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
674 17:29:05.474205 Enumerating buses...
675 17:29:05.477519 Show all devs... Before device enumeration.
676 17:29:05.480876 Root Device: enabled 1
677 17:29:05.483910 CPU_CLUSTER: 0: enabled 1
678 17:29:05.484355 DOMAIN: 0000: enabled 1
679 17:29:05.487428 APIC: 00: enabled 1
680 17:29:05.490858 PCI: 00:00.0: enabled 1
681 17:29:05.491386 PCI: 00:02.0: enabled 1
682 17:29:05.493985 PCI: 00:04.0: enabled 0
683 17:29:05.497192 PCI: 00:05.0: enabled 0
684 17:29:05.500596 PCI: 00:12.0: enabled 1
685 17:29:05.501129 PCI: 00:12.5: enabled 0
686 17:29:05.503411 PCI: 00:12.6: enabled 0
687 17:29:05.507185 PCI: 00:14.0: enabled 1
688 17:29:05.510231 PCI: 00:14.1: enabled 0
689 17:29:05.510761 PCI: 00:14.3: enabled 1
690 17:29:05.513493 PCI: 00:14.5: enabled 0
691 17:29:05.516775 PCI: 00:15.0: enabled 1
692 17:29:05.520395 PCI: 00:15.1: enabled 1
693 17:29:05.520925 PCI: 00:15.2: enabled 0
694 17:29:05.523429 PCI: 00:15.3: enabled 0
695 17:29:05.526319 PCI: 00:16.0: enabled 1
696 17:29:05.529771 PCI: 00:16.1: enabled 0
697 17:29:05.530204 PCI: 00:16.2: enabled 0
698 17:29:05.532876 PCI: 00:16.3: enabled 0
699 17:29:05.536293 PCI: 00:16.4: enabled 0
700 17:29:05.539727 PCI: 00:16.5: enabled 0
701 17:29:05.540319 PCI: 00:17.0: enabled 1
702 17:29:05.542587 PCI: 00:19.0: enabled 1
703 17:29:05.546124 PCI: 00:19.1: enabled 0
704 17:29:05.549505 PCI: 00:19.2: enabled 0
705 17:29:05.550035 PCI: 00:1a.0: enabled 0
706 17:29:05.552728 PCI: 00:1c.0: enabled 0
707 17:29:05.555663 PCI: 00:1c.1: enabled 0
708 17:29:05.559547 PCI: 00:1c.2: enabled 0
709 17:29:05.560083 PCI: 00:1c.3: enabled 0
710 17:29:05.562172 PCI: 00:1c.4: enabled 0
711 17:29:05.565708 PCI: 00:1c.5: enabled 0
712 17:29:05.568498 PCI: 00:1c.6: enabled 0
713 17:29:05.568934 PCI: 00:1c.7: enabled 0
714 17:29:05.572428 PCI: 00:1d.0: enabled 1
715 17:29:05.575427 PCI: 00:1d.1: enabled 0
716 17:29:05.578777 PCI: 00:1d.2: enabled 0
717 17:29:05.579308 PCI: 00:1d.3: enabled 0
718 17:29:05.581975 PCI: 00:1d.4: enabled 0
719 17:29:05.585405 PCI: 00:1d.5: enabled 1
720 17:29:05.588081 PCI: 00:1e.0: enabled 1
721 17:29:05.588538 PCI: 00:1e.1: enabled 0
722 17:29:05.591905 PCI: 00:1e.2: enabled 1
723 17:29:05.595055 PCI: 00:1e.3: enabled 1
724 17:29:05.598187 PCI: 00:1f.0: enabled 1
725 17:29:05.598725 PCI: 00:1f.1: enabled 1
726 17:29:05.601900 PCI: 00:1f.2: enabled 1
727 17:29:05.604772 PCI: 00:1f.3: enabled 1
728 17:29:05.608218 PCI: 00:1f.4: enabled 1
729 17:29:05.608751 PCI: 00:1f.5: enabled 1
730 17:29:05.611027 PCI: 00:1f.6: enabled 0
731 17:29:05.614433 USB0 port 0: enabled 1
732 17:29:05.614869 I2C: 00:15: enabled 1
733 17:29:05.617914 I2C: 00:5d: enabled 1
734 17:29:05.621256 GENERIC: 0.0: enabled 1
735 17:29:05.621828 I2C: 00:1a: enabled 1
736 17:29:05.624266 I2C: 00:38: enabled 1
737 17:29:05.627693 I2C: 00:39: enabled 1
738 17:29:05.630754 I2C: 00:3a: enabled 1
739 17:29:05.631188 I2C: 00:3b: enabled 1
740 17:29:05.634083 PCI: 00:00.0: enabled 1
741 17:29:05.637339 SPI: 00: enabled 1
742 17:29:05.637778 SPI: 01: enabled 1
743 17:29:05.640822 PNP: 0c09.0: enabled 1
744 17:29:05.644176 USB2 port 0: enabled 1
745 17:29:05.644711 USB2 port 1: enabled 1
746 17:29:05.647489 USB2 port 2: enabled 0
747 17:29:05.650595 USB2 port 3: enabled 0
748 17:29:05.653718 USB2 port 5: enabled 0
749 17:29:05.654253 USB2 port 6: enabled 1
750 17:29:05.657107 USB2 port 9: enabled 1
751 17:29:05.660611 USB3 port 0: enabled 1
752 17:29:05.661143 USB3 port 1: enabled 1
753 17:29:05.663189 USB3 port 2: enabled 1
754 17:29:05.667099 USB3 port 3: enabled 1
755 17:29:05.667637 USB3 port 4: enabled 0
756 17:29:05.669981 APIC: 02: enabled 1
757 17:29:05.673434 APIC: 07: enabled 1
758 17:29:05.673969 APIC: 01: enabled 1
759 17:29:05.677199 APIC: 03: enabled 1
760 17:29:05.679983 APIC: 05: enabled 1
761 17:29:05.680521 APIC: 04: enabled 1
762 17:29:05.683023 APIC: 06: enabled 1
763 17:29:05.686197 Compare with tree...
764 17:29:05.686632 Root Device: enabled 1
765 17:29:05.689351 CPU_CLUSTER: 0: enabled 1
766 17:29:05.692865 APIC: 00: enabled 1
767 17:29:05.693233 APIC: 02: enabled 1
768 17:29:05.696436 APIC: 07: enabled 1
769 17:29:05.699296 APIC: 01: enabled 1
770 17:29:05.699731 APIC: 03: enabled 1
771 17:29:05.702813 APIC: 05: enabled 1
772 17:29:05.706017 APIC: 04: enabled 1
773 17:29:05.709704 APIC: 06: enabled 1
774 17:29:05.710241 DOMAIN: 0000: enabled 1
775 17:29:05.712729 PCI: 00:00.0: enabled 1
776 17:29:05.716228 PCI: 00:02.0: enabled 1
777 17:29:05.719326 PCI: 00:04.0: enabled 0
778 17:29:05.722173 PCI: 00:05.0: enabled 0
779 17:29:05.722653 PCI: 00:12.0: enabled 1
780 17:29:05.725744 PCI: 00:12.5: enabled 0
781 17:29:05.728660 PCI: 00:12.6: enabled 0
782 17:29:05.732445 PCI: 00:14.0: enabled 1
783 17:29:05.735533 USB0 port 0: enabled 1
784 17:29:05.736078 USB2 port 0: enabled 1
785 17:29:05.738576 USB2 port 1: enabled 1
786 17:29:05.741719 USB2 port 2: enabled 0
787 17:29:05.745575 USB2 port 3: enabled 0
788 17:29:05.748521 USB2 port 5: enabled 0
789 17:29:05.752033 USB2 port 6: enabled 1
790 17:29:05.752567 USB2 port 9: enabled 1
791 17:29:05.754985 USB3 port 0: enabled 1
792 17:29:05.758057 USB3 port 1: enabled 1
793 17:29:05.761804 USB3 port 2: enabled 1
794 17:29:05.764916 USB3 port 3: enabled 1
795 17:29:05.768169 USB3 port 4: enabled 0
796 17:29:05.768702 PCI: 00:14.1: enabled 0
797 17:29:05.771659 PCI: 00:14.3: enabled 1
798 17:29:05.774938 PCI: 00:14.5: enabled 0
799 17:29:05.778260 PCI: 00:15.0: enabled 1
800 17:29:05.781553 I2C: 00:15: enabled 1
801 17:29:05.782086 PCI: 00:15.1: enabled 1
802 17:29:05.784710 I2C: 00:5d: enabled 1
803 17:29:05.787776 GENERIC: 0.0: enabled 1
804 17:29:05.791196 PCI: 00:15.2: enabled 0
805 17:29:05.794143 PCI: 00:15.3: enabled 0
806 17:29:05.794675 PCI: 00:16.0: enabled 1
807 17:29:05.797984 PCI: 00:16.1: enabled 0
808 17:29:05.801156 PCI: 00:16.2: enabled 0
809 17:29:05.804063 PCI: 00:16.3: enabled 0
810 17:29:05.807266 PCI: 00:16.4: enabled 0
811 17:29:05.807799 PCI: 00:16.5: enabled 0
812 17:29:05.810868 PCI: 00:17.0: enabled 1
813 17:29:05.814151 PCI: 00:19.0: enabled 1
814 17:29:05.817256 I2C: 00:1a: enabled 1
815 17:29:05.820796 I2C: 00:38: enabled 1
816 17:29:05.821361 I2C: 00:39: enabled 1
817 17:29:05.823833 I2C: 00:3a: enabled 1
818 17:29:05.826743 I2C: 00:3b: enabled 1
819 17:29:05.830242 PCI: 00:19.1: enabled 0
820 17:29:05.830677 PCI: 00:19.2: enabled 0
821 17:29:05.833440 PCI: 00:1a.0: enabled 0
822 17:29:05.836755 PCI: 00:1c.0: enabled 0
823 17:29:05.839813 PCI: 00:1c.1: enabled 0
824 17:29:05.843483 PCI: 00:1c.2: enabled 0
825 17:29:05.844016 PCI: 00:1c.3: enabled 0
826 17:29:05.846508 PCI: 00:1c.4: enabled 0
827 17:29:05.849576 PCI: 00:1c.5: enabled 0
828 17:29:05.853287 PCI: 00:1c.6: enabled 0
829 17:29:05.856283 PCI: 00:1c.7: enabled 0
830 17:29:05.859876 PCI: 00:1d.0: enabled 1
831 17:29:05.860414 PCI: 00:1d.1: enabled 0
832 17:29:05.862911 PCI: 00:1d.2: enabled 0
833 17:29:05.866101 PCI: 00:1d.3: enabled 0
834 17:29:05.869460 PCI: 00:1d.4: enabled 0
835 17:29:05.873030 PCI: 00:1d.5: enabled 1
836 17:29:05.873590 PCI: 00:00.0: enabled 1
837 17:29:05.875767 PCI: 00:1e.0: enabled 1
838 17:29:05.879213 PCI: 00:1e.1: enabled 0
839 17:29:05.882189 PCI: 00:1e.2: enabled 1
840 17:29:05.882624 SPI: 00: enabled 1
841 17:29:05.885410 PCI: 00:1e.3: enabled 1
842 17:29:05.889013 SPI: 01: enabled 1
843 17:29:05.892280 PCI: 00:1f.0: enabled 1
844 17:29:05.895923 PNP: 0c09.0: enabled 1
845 17:29:05.896454 PCI: 00:1f.1: enabled 1
846 17:29:05.898865 PCI: 00:1f.2: enabled 1
847 17:29:05.902220 PCI: 00:1f.3: enabled 1
848 17:29:05.905680 PCI: 00:1f.4: enabled 1
849 17:29:05.908686 PCI: 00:1f.5: enabled 1
850 17:29:05.909240 PCI: 00:1f.6: enabled 0
851 17:29:05.912111 Root Device scanning...
852 17:29:05.915287 scan_static_bus for Root Device
853 17:29:05.918518 CPU_CLUSTER: 0 enabled
854 17:29:05.922022 DOMAIN: 0000 enabled
855 17:29:05.922572 DOMAIN: 0000 scanning...
856 17:29:05.925042 PCI: pci_scan_bus for bus 00
857 17:29:05.928022 PCI: 00:00.0 [8086/0000] ops
858 17:29:05.931835 PCI: 00:00.0 [8086/9b61] enabled
859 17:29:05.934959 PCI: 00:02.0 [8086/0000] bus ops
860 17:29:05.937772 PCI: 00:02.0 [8086/9b41] enabled
861 17:29:05.941306 PCI: 00:04.0 [8086/1903] disabled
862 17:29:05.944672 PCI: 00:08.0 [8086/1911] enabled
863 17:29:05.948108 PCI: 00:12.0 [8086/02f9] enabled
864 17:29:05.950957 PCI: 00:14.0 [8086/0000] bus ops
865 17:29:05.954013 PCI: 00:14.0 [8086/02ed] enabled
866 17:29:05.957531 PCI: 00:14.2 [8086/02ef] enabled
867 17:29:05.961219 PCI: 00:14.3 [8086/02f0] enabled
868 17:29:05.964098 PCI: 00:15.0 [8086/0000] bus ops
869 17:29:05.967862 PCI: 00:15.0 [8086/02e8] enabled
870 17:29:05.974021 PCI: 00:15.1 [8086/0000] bus ops
871 17:29:05.977193 PCI: 00:15.1 [8086/02e9] enabled
872 17:29:05.977757 PCI: 00:16.0 [8086/0000] ops
873 17:29:05.980534 PCI: 00:16.0 [8086/02e0] enabled
874 17:29:05.983615 PCI: 00:17.0 [8086/0000] ops
875 17:29:05.986706 PCI: 00:17.0 [8086/02d3] enabled
876 17:29:05.989999 PCI: 00:19.0 [8086/0000] bus ops
877 17:29:05.993840 PCI: 00:19.0 [8086/02c5] enabled
878 17:29:05.996620 PCI: 00:1d.0 [8086/0000] bus ops
879 17:29:06.000212 PCI: 00:1d.0 [8086/02b0] enabled
880 17:29:06.006648 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 17:29:06.010267 PCI: 00:1e.0 [8086/0000] ops
882 17:29:06.013059 PCI: 00:1e.0 [8086/02a8] enabled
883 17:29:06.016859 PCI: 00:1e.2 [8086/0000] bus ops
884 17:29:06.019955 PCI: 00:1e.2 [8086/02aa] enabled
885 17:29:06.022799 PCI: 00:1e.3 [8086/0000] bus ops
886 17:29:06.026533 PCI: 00:1e.3 [8086/02ab] enabled
887 17:29:06.029449 PCI: 00:1f.0 [8086/0000] bus ops
888 17:29:06.032788 PCI: 00:1f.0 [8086/0284] enabled
889 17:29:06.039173 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 17:29:06.045487 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 17:29:06.048659 PCI: 00:1f.3 [8086/0000] bus ops
892 17:29:06.051973 PCI: 00:1f.3 [8086/02c8] enabled
893 17:29:06.055047 PCI: 00:1f.4 [8086/0000] bus ops
894 17:29:06.058485 PCI: 00:1f.4 [8086/02a3] enabled
895 17:29:06.061897 PCI: 00:1f.5 [8086/0000] bus ops
896 17:29:06.065121 PCI: 00:1f.5 [8086/02a4] enabled
897 17:29:06.068372 PCI: Leftover static devices:
898 17:29:06.068459 PCI: 00:05.0
899 17:29:06.068527 PCI: 00:12.5
900 17:29:06.071882 PCI: 00:12.6
901 17:29:06.071969 PCI: 00:14.1
902 17:29:06.074902 PCI: 00:14.5
903 17:29:06.074987 PCI: 00:15.2
904 17:29:06.078098 PCI: 00:15.3
905 17:29:06.078182 PCI: 00:16.1
906 17:29:06.078250 PCI: 00:16.2
907 17:29:06.081528 PCI: 00:16.3
908 17:29:06.081613 PCI: 00:16.4
909 17:29:06.084667 PCI: 00:16.5
910 17:29:06.084752 PCI: 00:19.1
911 17:29:06.084819 PCI: 00:19.2
912 17:29:06.087998 PCI: 00:1a.0
913 17:29:06.088083 PCI: 00:1c.0
914 17:29:06.091358 PCI: 00:1c.1
915 17:29:06.091443 PCI: 00:1c.2
916 17:29:06.094421 PCI: 00:1c.3
917 17:29:06.094514 PCI: 00:1c.4
918 17:29:06.094584 PCI: 00:1c.5
919 17:29:06.097886 PCI: 00:1c.6
920 17:29:06.097973 PCI: 00:1c.7
921 17:29:06.101004 PCI: 00:1d.1
922 17:29:06.101090 PCI: 00:1d.2
923 17:29:06.101158 PCI: 00:1d.3
924 17:29:06.104098 PCI: 00:1d.4
925 17:29:06.104189 PCI: 00:1d.5
926 17:29:06.107565 PCI: 00:1e.1
927 17:29:06.107653 PCI: 00:1f.1
928 17:29:06.110760 PCI: 00:1f.2
929 17:29:06.110852 PCI: 00:1f.6
930 17:29:06.114334 PCI: Check your devicetree.cb.
931 17:29:06.117396 PCI: 00:02.0 scanning...
932 17:29:06.120516 scan_generic_bus for PCI: 00:02.0
933 17:29:06.123964 scan_generic_bus for PCI: 00:02.0 done
934 17:29:06.130226 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
935 17:29:06.130314 PCI: 00:14.0 scanning...
936 17:29:06.133906 scan_static_bus for PCI: 00:14.0
937 17:29:06.137471 USB0 port 0 enabled
938 17:29:06.140978 USB0 port 0 scanning...
939 17:29:06.143923 scan_static_bus for USB0 port 0
940 17:29:06.147370 USB2 port 0 enabled
941 17:29:06.147531 USB2 port 1 enabled
942 17:29:06.150595 USB2 port 2 disabled
943 17:29:06.150738 USB2 port 3 disabled
944 17:29:06.153634 USB2 port 5 disabled
945 17:29:06.157015 USB2 port 6 enabled
946 17:29:06.157132 USB2 port 9 enabled
947 17:29:06.160154 USB3 port 0 enabled
948 17:29:06.163934 USB3 port 1 enabled
949 17:29:06.164107 USB3 port 2 enabled
950 17:29:06.167148 USB3 port 3 enabled
951 17:29:06.170269 USB3 port 4 disabled
952 17:29:06.170452 USB2 port 0 scanning...
953 17:29:06.173182 scan_static_bus for USB2 port 0
954 17:29:06.176792 scan_static_bus for USB2 port 0 done
955 17:29:06.183154 scan_bus: scanning of bus USB2 port 0 took 9700 usecs
956 17:29:06.186378 USB2 port 1 scanning...
957 17:29:06.189450 scan_static_bus for USB2 port 1
958 17:29:06.192800 scan_static_bus for USB2 port 1 done
959 17:29:06.199341 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
960 17:29:06.199554 USB2 port 6 scanning...
961 17:29:06.202807 scan_static_bus for USB2 port 6
962 17:29:06.209879 scan_static_bus for USB2 port 6 done
963 17:29:06.213101 scan_bus: scanning of bus USB2 port 6 took 9694 usecs
964 17:29:06.216631 USB2 port 9 scanning...
965 17:29:06.219618 scan_static_bus for USB2 port 9
966 17:29:06.222992 scan_static_bus for USB2 port 9 done
967 17:29:06.229609 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
968 17:29:06.232886 USB3 port 0 scanning...
969 17:29:06.236111 scan_static_bus for USB3 port 0
970 17:29:06.239197 scan_static_bus for USB3 port 0 done
971 17:29:06.242517 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
972 17:29:06.245707 USB3 port 1 scanning...
973 17:29:06.249166 scan_static_bus for USB3 port 1
974 17:29:06.252187 scan_static_bus for USB3 port 1 done
975 17:29:06.258980 scan_bus: scanning of bus USB3 port 1 took 9703 usecs
976 17:29:06.262003 USB3 port 2 scanning...
977 17:29:06.265435 scan_static_bus for USB3 port 2
978 17:29:06.268537 scan_static_bus for USB3 port 2 done
979 17:29:06.275205 scan_bus: scanning of bus USB3 port 2 took 9693 usecs
980 17:29:06.275747 USB3 port 3 scanning...
981 17:29:06.278963 scan_static_bus for USB3 port 3
982 17:29:06.285231 scan_static_bus for USB3 port 3 done
983 17:29:06.288396 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
984 17:29:06.291390 scan_static_bus for USB0 port 0 done
985 17:29:06.298412 scan_bus: scanning of bus USB0 port 0 took 155326 usecs
986 17:29:06.301604 scan_static_bus for PCI: 00:14.0 done
987 17:29:06.307854 scan_bus: scanning of bus PCI: 00:14.0 took 172927 usecs
988 17:29:06.310995 PCI: 00:15.0 scanning...
989 17:29:06.314546 scan_generic_bus for PCI: 00:15.0
990 17:29:06.317851 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 17:29:06.321056 scan_generic_bus for PCI: 00:15.0 done
992 17:29:06.327618 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
993 17:29:06.330949 PCI: 00:15.1 scanning...
994 17:29:06.334005 scan_generic_bus for PCI: 00:15.1
995 17:29:06.338030 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 17:29:06.340907 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 17:29:06.347890 scan_generic_bus for PCI: 00:15.1 done
998 17:29:06.350623 scan_bus: scanning of bus PCI: 00:15.1 took 18596 usecs
999 17:29:06.353881 PCI: 00:19.0 scanning...
1000 17:29:06.357132 scan_generic_bus for PCI: 00:19.0
1001 17:29:06.360429 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 17:29:06.367158 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 17:29:06.370629 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 17:29:06.373961 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 17:29:06.376869 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 17:29:06.383567 scan_generic_bus for PCI: 00:19.0 done
1007 17:29:06.386758 scan_bus: scanning of bus PCI: 00:19.0 took 30703 usecs
1008 17:29:06.389727 PCI: 00:1d.0 scanning...
1009 17:29:06.393371 do_pci_scan_bridge for PCI: 00:1d.0
1010 17:29:06.396204 PCI: pci_scan_bus for bus 01
1011 17:29:06.399813 PCI: 01:00.0 [1c5c/1327] enabled
1012 17:29:06.403047 Enabling Common Clock Configuration
1013 17:29:06.409302 L1 Sub-State supported from root port 29
1014 17:29:06.409839 L1 Sub-State Support = 0xf
1015 17:29:06.413143 CommonModeRestoreTime = 0x28
1016 17:29:06.419200 Power On Value = 0x16, Power On Scale = 0x0
1017 17:29:06.419756 ASPM: Enabled L1
1018 17:29:06.426010 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1019 17:29:06.429041 PCI: 00:1e.2 scanning...
1020 17:29:06.432294 scan_generic_bus for PCI: 00:1e.2
1021 17:29:06.436014 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 17:29:06.439293 scan_generic_bus for PCI: 00:1e.2 done
1023 17:29:06.445755 scan_bus: scanning of bus PCI: 00:1e.2 took 14000 usecs
1024 17:29:06.448684 PCI: 00:1e.3 scanning...
1025 17:29:06.452139 scan_generic_bus for PCI: 00:1e.3
1026 17:29:06.455762 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 17:29:06.458474 scan_generic_bus for PCI: 00:1e.3 done
1028 17:29:06.465158 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1029 17:29:06.468363 PCI: 00:1f.0 scanning...
1030 17:29:06.472018 scan_static_bus for PCI: 00:1f.0
1031 17:29:06.472587 PNP: 0c09.0 enabled
1032 17:29:06.474773 scan_static_bus for PCI: 00:1f.0 done
1033 17:29:06.481379 scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs
1034 17:29:06.484702 PCI: 00:1f.3 scanning...
1035 17:29:06.491234 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1036 17:29:06.491675 PCI: 00:1f.4 scanning...
1037 17:29:06.498304 scan_generic_bus for PCI: 00:1f.4
1038 17:29:06.501599 scan_generic_bus for PCI: 00:1f.4 done
1039 17:29:06.504619 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1040 17:29:06.508205 PCI: 00:1f.5 scanning...
1041 17:29:06.511099 scan_generic_bus for PCI: 00:1f.5
1042 17:29:06.514896 scan_generic_bus for PCI: 00:1f.5 done
1043 17:29:06.521242 scan_bus: scanning of bus PCI: 00:1f.5 took 10174 usecs
1044 17:29:06.528052 scan_bus: scanning of bus DOMAIN: 0000 took 604781 usecs
1045 17:29:06.530841 scan_static_bus for Root Device done
1046 17:29:06.537538 scan_bus: scanning of bus Root Device took 624649 usecs
1047 17:29:06.537980 done
1048 17:29:06.541125 Chrome EC: UHEPI supported
1049 17:29:06.547644 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 17:29:06.553836 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 17:29:06.556896 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 17:29:06.565037 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 17:29:06.568458 SPI flash protection: WPSW=0 SRP0=1
1054 17:29:06.574565 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 17:29:06.577979 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1056 17:29:06.581005 found VGA at PCI: 00:02.0
1057 17:29:06.585032 Setting up VGA for PCI: 00:02.0
1058 17:29:06.591247 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 17:29:06.594099 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 17:29:06.597759 Allocating resources...
1061 17:29:06.600930 Reading resources...
1062 17:29:06.604335 Root Device read_resources bus 0 link: 0
1063 17:29:06.607457 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 17:29:06.613855 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 17:29:06.616941 DOMAIN: 0000 read_resources bus 0 link: 0
1066 17:29:06.625177 PCI: 00:14.0 read_resources bus 0 link: 0
1067 17:29:06.628558 USB0 port 0 read_resources bus 0 link: 0
1068 17:29:06.636828 USB0 port 0 read_resources bus 0 link: 0 done
1069 17:29:06.640078 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 17:29:06.647109 PCI: 00:15.0 read_resources bus 1 link: 0
1071 17:29:06.650314 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 17:29:06.656960 PCI: 00:15.1 read_resources bus 2 link: 0
1073 17:29:06.659900 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 17:29:06.667410 PCI: 00:19.0 read_resources bus 3 link: 0
1075 17:29:06.674169 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 17:29:06.677617 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 17:29:06.684053 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 17:29:06.687293 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 17:29:06.693683 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 17:29:06.696842 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 17:29:06.703793 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 17:29:06.706782 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 17:29:06.713714 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 17:29:06.720515 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 17:29:06.723228 Root Device read_resources bus 0 link: 0 done
1086 17:29:06.726540 Done reading resources.
1087 17:29:06.733303 Show resources in subtree (Root Device)...After reading.
1088 17:29:06.736790 Root Device child on link 0 CPU_CLUSTER: 0
1089 17:29:06.739949 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 17:29:06.743092 APIC: 00
1091 17:29:06.743649 APIC: 02
1092 17:29:06.745946 APIC: 07
1093 17:29:06.746391 APIC: 01
1094 17:29:06.746838 APIC: 03
1095 17:29:06.749706 APIC: 05
1096 17:29:06.750258 APIC: 04
1097 17:29:06.750718 APIC: 06
1098 17:29:06.756019 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 17:29:06.765876 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 17:29:06.822358 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 17:29:06.823048 PCI: 00:00.0
1102 17:29:06.823529 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 17:29:06.823967 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 17:29:06.824807 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 17:29:06.825190 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 17:29:06.825647 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 17:29:06.871891 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 17:29:06.872468 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 17:29:06.872943 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 17:29:06.873802 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 17:29:06.874194 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 17:29:06.921425 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 17:29:06.922366 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 17:29:06.922775 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 17:29:06.923571 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 17:29:06.923951 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 17:29:06.949891 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 17:29:06.950434 PCI: 00:02.0
1119 17:29:06.951282 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 17:29:06.953444 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 17:29:06.956829 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 17:29:06.957411 PCI: 00:04.0
1123 17:29:06.960196 PCI: 00:08.0
1124 17:29:06.969621 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 17:29:06.972798 PCI: 00:12.0
1126 17:29:06.982616 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 17:29:06.986265 PCI: 00:14.0 child on link 0 USB0 port 0
1128 17:29:06.995515 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 17:29:06.998872 USB0 port 0 child on link 0 USB2 port 0
1130 17:29:07.002617 USB2 port 0
1131 17:29:07.003066 USB2 port 1
1132 17:29:07.005798 USB2 port 2
1133 17:29:07.006321 USB2 port 3
1134 17:29:07.008919 USB2 port 5
1135 17:29:07.011856 USB2 port 6
1136 17:29:07.012376 USB2 port 9
1137 17:29:07.015260 USB3 port 0
1138 17:29:07.015744 USB3 port 1
1139 17:29:07.018399 USB3 port 2
1140 17:29:07.018906 USB3 port 3
1141 17:29:07.021705 USB3 port 4
1142 17:29:07.022255 PCI: 00:14.2
1143 17:29:07.031639 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 17:29:07.041398 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 17:29:07.044917 PCI: 00:14.3
1146 17:29:07.054481 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 17:29:07.057756 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 17:29:07.067545 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 17:29:07.071418 I2C: 01:15
1150 17:29:07.074229 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 17:29:07.084010 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 17:29:07.084715 I2C: 02:5d
1153 17:29:07.087759 GENERIC: 0.0
1154 17:29:07.090519 PCI: 00:16.0
1155 17:29:07.100903 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 17:29:07.101630 PCI: 00:17.0
1157 17:29:07.110290 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 17:29:07.120086 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 17:29:07.126583 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 17:29:07.136525 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 17:29:07.143208 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 17:29:07.152618 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 17:29:07.156123 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 17:29:07.165616 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 17:29:07.169334 I2C: 03:1a
1166 17:29:07.169934 I2C: 03:38
1167 17:29:07.172613 I2C: 03:39
1168 17:29:07.173340 I2C: 03:3a
1169 17:29:07.175774 I2C: 03:3b
1170 17:29:07.179323 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 17:29:07.188925 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 17:29:07.198543 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 17:29:07.205172 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 17:29:07.208427 PCI: 01:00.0
1175 17:29:07.217900 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 17:29:07.221426 PCI: 00:1e.0
1177 17:29:07.231151 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 17:29:07.241096 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 17:29:07.244304 PCI: 00:1e.2 child on link 0 SPI: 00
1180 17:29:07.254056 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 17:29:07.257244 SPI: 00
1182 17:29:07.260506 PCI: 00:1e.3 child on link 0 SPI: 01
1183 17:29:07.270827 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 17:29:07.271367 SPI: 01
1185 17:29:07.277032 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 17:29:07.283451 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 17:29:07.293480 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 17:29:07.296331 PNP: 0c09.0
1189 17:29:07.303483 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 17:29:07.306478 PCI: 00:1f.3
1191 17:29:07.316117 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 17:29:07.326155 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 17:29:07.326658 PCI: 00:1f.4
1194 17:29:07.335781 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 17:29:07.345798 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 17:29:07.348950 PCI: 00:1f.5
1197 17:29:07.355211 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 17:29:07.361854 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 17:29:07.368738 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 17:29:07.374948 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 17:29:07.378452 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 17:29:07.385019 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 17:29:07.388467 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 17:29:07.391457 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 17:29:07.397916 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 17:29:07.404482 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 17:29:07.410921 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 17:29:07.420686 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 17:29:07.427208 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 17:29:07.430477 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 17:29:07.440541 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 17:29:07.443587 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 17:29:07.447373 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 17:29:07.453589 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 17:29:07.457090 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 17:29:07.463726 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 17:29:07.466602 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 17:29:07.473682 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 17:29:07.476678 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 17:29:07.483125 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 17:29:07.486737 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 17:29:07.492886 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 17:29:07.496093 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 17:29:07.502642 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 17:29:07.505842 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 17:29:07.512424 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 17:29:07.515617 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 17:29:07.522660 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 17:29:07.525378 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 17:29:07.532300 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 17:29:07.535310 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 17:29:07.541861 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 17:29:07.545244 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 17:29:07.552293 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 17:29:07.558169 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 17:29:07.561794 avoid_fixed_resources: DOMAIN: 0000
1237 17:29:07.568271 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 17:29:07.574820 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 17:29:07.581299 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 17:29:07.590884 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 17:29:07.597524 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 17:29:07.603742 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 17:29:07.613783 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 17:29:07.620330 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 17:29:07.626739 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 17:29:07.636919 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 17:29:07.643373 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 17:29:07.649587 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 17:29:07.653105 Setting resources...
1250 17:29:07.659828 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 17:29:07.663256 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 17:29:07.666378 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 17:29:07.669949 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 17:29:07.676390 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 17:29:07.679270 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 17:29:07.685865 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 17:29:07.692736 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 17:29:07.702205 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 17:29:07.705384 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 17:29:07.712472 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 17:29:07.715401 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 17:29:07.721926 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 17:29:07.724904 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 17:29:07.731329 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 17:29:07.734767 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 17:29:07.741364 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 17:29:07.744925 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 17:29:07.751311 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 17:29:07.754501 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 17:29:07.761029 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 17:29:07.764443 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 17:29:07.771067 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 17:29:07.773851 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 17:29:07.780459 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 17:29:07.783949 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 17:29:07.786998 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 17:29:07.793636 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 17:29:07.796989 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 17:29:07.803450 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 17:29:07.806824 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 17:29:07.812977 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 17:29:07.819571 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 17:29:07.829521 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 17:29:07.835833 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 17:29:07.842434 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 17:29:07.849050 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 17:29:07.855541 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 17:29:07.858560 Root Device assign_resources, bus 0 link: 0
1289 17:29:07.865123 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 17:29:07.871904 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 17:29:07.881634 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 17:29:07.888047 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 17:29:07.897959 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 17:29:07.904851 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 17:29:07.914436 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 17:29:07.917338 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 17:29:07.924260 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 17:29:07.930469 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 17:29:07.940274 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 17:29:07.946712 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 17:29:07.956841 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 17:29:07.960214 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 17:29:07.966326 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 17:29:07.973328 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 17:29:07.976505 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 17:29:07.982998 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 17:29:07.989492 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 17:29:07.999124 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 17:29:08.005921 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 17:29:08.015839 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 17:29:08.022298 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 17:29:08.028829 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 17:29:08.038648 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 17:29:08.045387 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 17:29:08.051733 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 17:29:08.054859 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 17:29:08.064805 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 17:29:08.070999 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 17:29:08.081296 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 17:29:08.084276 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 17:29:08.093993 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 17:29:08.097203 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 17:29:08.107018 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 17:29:08.113603 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 17:29:08.120023 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 17:29:08.123694 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 17:29:08.133290 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 17:29:08.136550 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 17:29:08.142845 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 17:29:08.146096 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 17:29:08.152920 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 17:29:08.155836 LPC: Trying to open IO window from 800 size 1ff
1333 17:29:08.165891 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 17:29:08.172198 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 17:29:08.182551 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 17:29:08.189125 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 17:29:08.195516 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 17:29:08.198396 Root Device assign_resources, bus 0 link: 0
1339 17:29:08.201857 Done setting resources.
1340 17:29:08.208865 Show resources in subtree (Root Device)...After assigning values.
1341 17:29:08.211614 Root Device child on link 0 CPU_CLUSTER: 0
1342 17:29:08.215252 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 17:29:08.218392 APIC: 00
1344 17:29:08.218916 APIC: 02
1345 17:29:08.221438 APIC: 07
1346 17:29:08.221963 APIC: 01
1347 17:29:08.222312 APIC: 03
1348 17:29:08.224868 APIC: 05
1349 17:29:08.225424 APIC: 04
1350 17:29:08.225770 APIC: 06
1351 17:29:08.231447 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 17:29:08.241121 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 17:29:08.250603 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 17:29:08.253915 PCI: 00:00.0
1355 17:29:08.263896 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 17:29:08.273693 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 17:29:08.280041 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 17:29:08.289959 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 17:29:08.300261 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 17:29:08.309553 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 17:29:08.319657 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 17:29:08.329155 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 17:29:08.336078 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 17:29:08.345564 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 17:29:08.355558 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 17:29:08.365161 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 17:29:08.375254 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 17:29:08.385044 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 17:29:08.394387 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 17:29:08.404134 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 17:29:08.404636 PCI: 00:02.0
1372 17:29:08.414121 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 17:29:08.427073 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 17:29:08.433902 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 17:29:08.436850 PCI: 00:04.0
1376 17:29:08.437302 PCI: 00:08.0
1377 17:29:08.449774 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 17:29:08.450224 PCI: 00:12.0
1379 17:29:08.459835 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 17:29:08.466646 PCI: 00:14.0 child on link 0 USB0 port 0
1381 17:29:08.476395 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 17:29:08.479549 USB0 port 0 child on link 0 USB2 port 0
1383 17:29:08.482797 USB2 port 0
1384 17:29:08.483279 USB2 port 1
1385 17:29:08.485837 USB2 port 2
1386 17:29:08.486303 USB2 port 3
1387 17:29:08.489400 USB2 port 5
1388 17:29:08.490008 USB2 port 6
1389 17:29:08.492452 USB2 port 9
1390 17:29:08.492938 USB3 port 0
1391 17:29:08.495933 USB3 port 1
1392 17:29:08.496553 USB3 port 2
1393 17:29:08.498960 USB3 port 3
1394 17:29:08.502473 USB3 port 4
1395 17:29:08.503036 PCI: 00:14.2
1396 17:29:08.511738 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 17:29:08.522037 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 17:29:08.524969 PCI: 00:14.3
1399 17:29:08.535002 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 17:29:08.538036 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 17:29:08.547997 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 17:29:08.551432 I2C: 01:15
1403 17:29:08.554783 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 17:29:08.564598 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 17:29:08.567825 I2C: 02:5d
1406 17:29:08.568261 GENERIC: 0.0
1407 17:29:08.571014 PCI: 00:16.0
1408 17:29:08.580625 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 17:29:08.584543 PCI: 00:17.0
1410 17:29:08.593846 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 17:29:08.603680 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 17:29:08.613667 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 17:29:08.620143 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 17:29:08.629795 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 17:29:08.639574 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 17:29:08.646249 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 17:29:08.655728 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 17:29:08.656191 I2C: 03:1a
1419 17:29:08.659427 I2C: 03:38
1420 17:29:08.659943 I2C: 03:39
1421 17:29:08.662478 I2C: 03:3a
1422 17:29:08.663024 I2C: 03:3b
1423 17:29:08.668948 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 17:29:08.675821 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 17:29:08.685468 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 17:29:08.698288 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 17:29:08.698846 PCI: 01:00.0
1428 17:29:08.708656 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 17:29:08.712071 PCI: 00:1e.0
1430 17:29:08.721490 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 17:29:08.731502 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 17:29:08.737787 PCI: 00:1e.2 child on link 0 SPI: 00
1433 17:29:08.747521 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 17:29:08.747960 SPI: 00
1435 17:29:08.750852 PCI: 00:1e.3 child on link 0 SPI: 01
1436 17:29:08.760686 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 17:29:08.763952 SPI: 01
1438 17:29:08.767717 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 17:29:08.777501 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 17:29:08.787336 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 17:29:08.787875 PNP: 0c09.0
1442 17:29:08.797179 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 17:29:08.797750 PCI: 00:1f.3
1444 17:29:08.806277 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 17:29:08.819680 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 17:29:08.820216 PCI: 00:1f.4
1447 17:29:08.829283 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 17:29:08.839331 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 17:29:08.839846 PCI: 00:1f.5
1450 17:29:08.852284 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 17:29:08.852877 Done allocating resources.
1452 17:29:08.858868 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 17:29:08.862197 Enabling resources...
1454 17:29:08.865563 PCI: 00:00.0 subsystem <- 8086/9b61
1455 17:29:08.868866 PCI: 00:00.0 cmd <- 06
1456 17:29:08.871981 PCI: 00:02.0 subsystem <- 8086/9b41
1457 17:29:08.875537 PCI: 00:02.0 cmd <- 03
1458 17:29:08.878789 PCI: 00:08.0 cmd <- 06
1459 17:29:08.881729 PCI: 00:12.0 subsystem <- 8086/02f9
1460 17:29:08.885566 PCI: 00:12.0 cmd <- 02
1461 17:29:08.888801 PCI: 00:14.0 subsystem <- 8086/02ed
1462 17:29:08.891674 PCI: 00:14.0 cmd <- 02
1463 17:29:08.892110 PCI: 00:14.2 cmd <- 02
1464 17:29:08.898426 PCI: 00:14.3 subsystem <- 8086/02f0
1465 17:29:08.898971 PCI: 00:14.3 cmd <- 02
1466 17:29:08.904534 PCI: 00:15.0 subsystem <- 8086/02e8
1467 17:29:08.905040 PCI: 00:15.0 cmd <- 02
1468 17:29:08.908417 PCI: 00:15.1 subsystem <- 8086/02e9
1469 17:29:08.911121 PCI: 00:15.1 cmd <- 02
1470 17:29:08.914850 PCI: 00:16.0 subsystem <- 8086/02e0
1471 17:29:08.917653 PCI: 00:16.0 cmd <- 02
1472 17:29:08.921339 PCI: 00:17.0 subsystem <- 8086/02d3
1473 17:29:08.924120 PCI: 00:17.0 cmd <- 03
1474 17:29:08.927421 PCI: 00:19.0 subsystem <- 8086/02c5
1475 17:29:08.931241 PCI: 00:19.0 cmd <- 02
1476 17:29:08.933903 PCI: 00:1d.0 bridge ctrl <- 0013
1477 17:29:08.937476 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 17:29:08.940472 PCI: 00:1d.0 cmd <- 06
1479 17:29:08.943825 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 17:29:08.947208 PCI: 00:1e.0 cmd <- 06
1481 17:29:08.950625 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 17:29:08.953570 PCI: 00:1e.2 cmd <- 06
1483 17:29:08.956925 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 17:29:08.960617 PCI: 00:1e.3 cmd <- 02
1485 17:29:08.963555 PCI: 00:1f.0 subsystem <- 8086/0284
1486 17:29:08.967096 PCI: 00:1f.0 cmd <- 407
1487 17:29:08.969955 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 17:29:08.970397 PCI: 00:1f.3 cmd <- 02
1489 17:29:08.976835 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 17:29:08.977402 PCI: 00:1f.4 cmd <- 03
1491 17:29:08.983057 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 17:29:08.983594 PCI: 00:1f.5 cmd <- 406
1493 17:29:08.993370 PCI: 01:00.0 cmd <- 02
1494 17:29:08.998155 done.
1495 17:29:09.012058 ME: Version: 14.0.39.1367
1496 17:29:09.018337 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1497 17:29:09.022070 Initializing devices...
1498 17:29:09.022608 Root Device init ...
1499 17:29:09.028135 Chrome EC: Set SMI mask to 0x0000000000000000
1500 17:29:09.031304 Chrome EC: clear events_b mask to 0x0000000000000000
1501 17:29:09.038046 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 17:29:09.044818 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 17:29:09.051518 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 17:29:09.054499 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 17:29:09.061138 Root Device init finished in 35217 usecs
1506 17:29:09.061824 CPU_CLUSTER: 0 init ...
1507 17:29:09.067660 CPU_CLUSTER: 0 init finished in 2447 usecs
1508 17:29:09.072766 PCI: 00:00.0 init ...
1509 17:29:09.076166 CPU TDP: 15 Watts
1510 17:29:09.079282 CPU PL2 = 64 Watts
1511 17:29:09.082102 PCI: 00:00.0 init finished in 7065 usecs
1512 17:29:09.085696 PCI: 00:02.0 init ...
1513 17:29:09.088830 PCI: 00:02.0 init finished in 2255 usecs
1514 17:29:09.092074 PCI: 00:08.0 init ...
1515 17:29:09.095287 PCI: 00:08.0 init finished in 2252 usecs
1516 17:29:09.098488 PCI: 00:12.0 init ...
1517 17:29:09.102064 PCI: 00:12.0 init finished in 2253 usecs
1518 17:29:09.105101 PCI: 00:14.0 init ...
1519 17:29:09.108175 PCI: 00:14.0 init finished in 2244 usecs
1520 17:29:09.111653 PCI: 00:14.2 init ...
1521 17:29:09.114783 PCI: 00:14.2 init finished in 2252 usecs
1522 17:29:09.117951 PCI: 00:14.3 init ...
1523 17:29:09.121411 PCI: 00:14.3 init finished in 2271 usecs
1524 17:29:09.124578 PCI: 00:15.0 init ...
1525 17:29:09.128051 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 17:29:09.134765 PCI: 00:15.0 init finished in 5979 usecs
1527 17:29:09.135305 PCI: 00:15.1 init ...
1528 17:29:09.140856 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 17:29:09.144336 PCI: 00:15.1 init finished in 5979 usecs
1530 17:29:09.147838 PCI: 00:16.0 init ...
1531 17:29:09.151107 PCI: 00:16.0 init finished in 2254 usecs
1532 17:29:09.154231 PCI: 00:19.0 init ...
1533 17:29:09.157419 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 17:29:09.160736 PCI: 00:19.0 init finished in 5977 usecs
1535 17:29:09.164117 PCI: 00:1d.0 init ...
1536 17:29:09.167480 Initializing PCH PCIe bridge.
1537 17:29:09.170563 PCI: 00:1d.0 init finished in 5287 usecs
1538 17:29:09.174365 PCI: 00:1f.0 init ...
1539 17:29:09.177547 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 17:29:09.184633 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 17:29:09.185147 IOAPIC: ID = 0x02
1542 17:29:09.187670 IOAPIC: Dumping registers
1543 17:29:09.190620 reg 0x0000: 0x02000000
1544 17:29:09.194000 reg 0x0001: 0x00770020
1545 17:29:09.197522 reg 0x0002: 0x00000000
1546 17:29:09.200449 PCI: 00:1f.0 init finished in 23535 usecs
1547 17:29:09.204018 PCI: 00:1f.4 init ...
1548 17:29:09.207184 PCI: 00:1f.4 init finished in 2263 usecs
1549 17:29:09.218647 PCI: 01:00.0 init ...
1550 17:29:09.221716 PCI: 01:00.0 init finished in 2254 usecs
1551 17:29:09.226033 PNP: 0c09.0 init ...
1552 17:29:09.232804 Google Chrome EC uptime: 11.071 seconds
1553 17:29:09.235822 Google Chrome AP resets since EC boot: 0
1554 17:29:09.239391 Google Chrome most recent AP reset causes:
1555 17:29:09.246037 Google Chrome EC reset flags at last EC boot: reset-pin
1556 17:29:09.249184 PNP: 0c09.0 init finished in 20577 usecs
1557 17:29:09.252395 Devices initialized
1558 17:29:09.255355 Show all devs... After init.
1559 17:29:09.255791 Root Device: enabled 1
1560 17:29:09.258821 CPU_CLUSTER: 0: enabled 1
1561 17:29:09.262318 DOMAIN: 0000: enabled 1
1562 17:29:09.262750 APIC: 00: enabled 1
1563 17:29:09.265432 PCI: 00:00.0: enabled 1
1564 17:29:09.269049 PCI: 00:02.0: enabled 1
1565 17:29:09.272160 PCI: 00:04.0: enabled 0
1566 17:29:09.272698 PCI: 00:05.0: enabled 0
1567 17:29:09.275422 PCI: 00:12.0: enabled 1
1568 17:29:09.278492 PCI: 00:12.5: enabled 0
1569 17:29:09.281613 PCI: 00:12.6: enabled 0
1570 17:29:09.282047 PCI: 00:14.0: enabled 1
1571 17:29:09.285495 PCI: 00:14.1: enabled 0
1572 17:29:09.288417 PCI: 00:14.3: enabled 1
1573 17:29:09.291381 PCI: 00:14.5: enabled 0
1574 17:29:09.291812 PCI: 00:15.0: enabled 1
1575 17:29:09.294684 PCI: 00:15.1: enabled 1
1576 17:29:09.298041 PCI: 00:15.2: enabled 0
1577 17:29:09.301115 PCI: 00:15.3: enabled 0
1578 17:29:09.301646 PCI: 00:16.0: enabled 1
1579 17:29:09.304627 PCI: 00:16.1: enabled 0
1580 17:29:09.307544 PCI: 00:16.2: enabled 0
1581 17:29:09.310795 PCI: 00:16.3: enabled 0
1582 17:29:09.311224 PCI: 00:16.4: enabled 0
1583 17:29:09.314602 PCI: 00:16.5: enabled 0
1584 17:29:09.317586 PCI: 00:17.0: enabled 1
1585 17:29:09.320755 PCI: 00:19.0: enabled 1
1586 17:29:09.321206 PCI: 00:19.1: enabled 0
1587 17:29:09.324289 PCI: 00:19.2: enabled 0
1588 17:29:09.327333 PCI: 00:1a.0: enabled 0
1589 17:29:09.330488 PCI: 00:1c.0: enabled 0
1590 17:29:09.330921 PCI: 00:1c.1: enabled 0
1591 17:29:09.333779 PCI: 00:1c.2: enabled 0
1592 17:29:09.336830 PCI: 00:1c.3: enabled 0
1593 17:29:09.340674 PCI: 00:1c.4: enabled 0
1594 17:29:09.341396 PCI: 00:1c.5: enabled 0
1595 17:29:09.343440 PCI: 00:1c.6: enabled 0
1596 17:29:09.346839 PCI: 00:1c.7: enabled 0
1597 17:29:09.349926 PCI: 00:1d.0: enabled 1
1598 17:29:09.350388 PCI: 00:1d.1: enabled 0
1599 17:29:09.353380 PCI: 00:1d.2: enabled 0
1600 17:29:09.356614 PCI: 00:1d.3: enabled 0
1601 17:29:09.359773 PCI: 00:1d.4: enabled 0
1602 17:29:09.360211 PCI: 00:1d.5: enabled 0
1603 17:29:09.363309 PCI: 00:1e.0: enabled 1
1604 17:29:09.366722 PCI: 00:1e.1: enabled 0
1605 17:29:09.369487 PCI: 00:1e.2: enabled 1
1606 17:29:09.369925 PCI: 00:1e.3: enabled 1
1607 17:29:09.372963 PCI: 00:1f.0: enabled 1
1608 17:29:09.376074 PCI: 00:1f.1: enabled 0
1609 17:29:09.379872 PCI: 00:1f.2: enabled 0
1610 17:29:09.380414 PCI: 00:1f.3: enabled 1
1611 17:29:09.383079 PCI: 00:1f.4: enabled 1
1612 17:29:09.386156 PCI: 00:1f.5: enabled 1
1613 17:29:09.389730 PCI: 00:1f.6: enabled 0
1614 17:29:09.390271 USB0 port 0: enabled 1
1615 17:29:09.392874 I2C: 01:15: enabled 1
1616 17:29:09.395989 I2C: 02:5d: enabled 1
1617 17:29:09.396534 GENERIC: 0.0: enabled 1
1618 17:29:09.399222 I2C: 03:1a: enabled 1
1619 17:29:09.402255 I2C: 03:38: enabled 1
1620 17:29:09.405710 I2C: 03:39: enabled 1
1621 17:29:09.406143 I2C: 03:3a: enabled 1
1622 17:29:09.409067 I2C: 03:3b: enabled 1
1623 17:29:09.412277 PCI: 00:00.0: enabled 1
1624 17:29:09.412814 SPI: 00: enabled 1
1625 17:29:09.415725 SPI: 01: enabled 1
1626 17:29:09.418784 PNP: 0c09.0: enabled 1
1627 17:29:09.419325 USB2 port 0: enabled 1
1628 17:29:09.421973 USB2 port 1: enabled 1
1629 17:29:09.425315 USB2 port 2: enabled 0
1630 17:29:09.425746 USB2 port 3: enabled 0
1631 17:29:09.428236 USB2 port 5: enabled 0
1632 17:29:09.432125 USB2 port 6: enabled 1
1633 17:29:09.434807 USB2 port 9: enabled 1
1634 17:29:09.435246 USB3 port 0: enabled 1
1635 17:29:09.438397 USB3 port 1: enabled 1
1636 17:29:09.441339 USB3 port 2: enabled 1
1637 17:29:09.441867 USB3 port 3: enabled 1
1638 17:29:09.444746 USB3 port 4: enabled 0
1639 17:29:09.447903 APIC: 02: enabled 1
1640 17:29:09.448335 APIC: 07: enabled 1
1641 17:29:09.451398 APIC: 01: enabled 1
1642 17:29:09.454785 APIC: 03: enabled 1
1643 17:29:09.455190 APIC: 05: enabled 1
1644 17:29:09.457883 APIC: 04: enabled 1
1645 17:29:09.458320 APIC: 06: enabled 1
1646 17:29:09.460927 PCI: 00:08.0: enabled 1
1647 17:29:09.464499 PCI: 00:14.2: enabled 1
1648 17:29:09.467771 PCI: 01:00.0: enabled 1
1649 17:29:09.471189 Disabling ACPI via APMC:
1650 17:29:09.474223 done.
1651 17:29:09.477348 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 17:29:09.480796 ELOG: NV offset 0xaf0000 size 0x4000
1653 17:29:09.487816 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 17:29:09.494356 ELOG: Event(17) added with size 13 at 2022-08-03 17:29:09 UTC
1655 17:29:09.500933 POST: Unexpected post code in previous boot: 0x73
1656 17:29:09.507633 ELOG: Event(A3) added with size 11 at 2022-08-03 17:29:09 UTC
1657 17:29:09.514043 ELOG: Event(A6) added with size 13 at 2022-08-03 17:29:09 UTC
1658 17:29:09.520744 ELOG: Event(92) added with size 9 at 2022-08-03 17:29:09 UTC
1659 17:29:09.527203 ELOG: Event(93) added with size 9 at 2022-08-03 17:29:09 UTC
1660 17:29:09.533852 ELOG: Event(9A) added with size 9 at 2022-08-03 17:29:09 UTC
1661 17:29:09.537068 ELOG: Event(9E) added with size 10 at 2022-08-03 17:29:09 UTC
1662 17:29:09.543443 ELOG: Event(16) added with size 11 at 2022-08-03 17:29:09 UTC
1663 17:29:09.546900 Erasing flash addr af0000 + 4 KiB
1664 17:29:09.613098 ELOG: Event(9F) added with size 14 at 2022-08-03 17:29:09 UTC
1665 17:29:09.619009 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 57
1666 17:29:09.625426 ELOG: Event(A1) added with size 10 at 2022-08-03 17:29:09 UTC
1667 17:29:09.632479 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 17:29:09.638891 ELOG: Event(A0) added with size 9 at 2022-08-03 17:29:09 UTC
1669 17:29:09.645295 elog_add_boot_reason: Logged dev mode boot
1670 17:29:09.645751 Finalize devices...
1671 17:29:09.648621 PCI: 00:17.0 final
1672 17:29:09.651846 Devices finalized
1673 17:29:09.655022 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 17:29:09.661545 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 17:29:09.664616 ME: HFSTS1 : 0x90000245
1676 17:29:09.668103 ME: HFSTS2 : 0x3B850126
1677 17:29:09.674662 ME: HFSTS3 : 0x00000020
1678 17:29:09.677612 ME: HFSTS4 : 0x00004800
1679 17:29:09.681105 ME: HFSTS5 : 0x00000000
1680 17:29:09.684745 ME: HFSTS6 : 0x40400006
1681 17:29:09.687478 ME: Manufacturing Mode : NO
1682 17:29:09.690497 ME: FW Partition Table : OK
1683 17:29:09.694136 ME: Bringup Loader Failure : NO
1684 17:29:09.697411 ME: Firmware Init Complete : YES
1685 17:29:09.700641 ME: Boot Options Present : NO
1686 17:29:09.703873 ME: Update In Progress : NO
1687 17:29:09.706855 ME: D0i3 Support : YES
1688 17:29:09.710477 ME: Low Power State Enabled : NO
1689 17:29:09.716847 ME: CPU Replaced : NO
1690 17:29:09.720125 ME: CPU Replacement Valid : YES
1691 17:29:09.723530 ME: Current Working State : 5
1692 17:29:09.726592 ME: Current Operation State : 1
1693 17:29:09.727024 ME: Current Operation Mode : 0
1694 17:29:09.730016 ME: Error Code : 0
1695 17:29:09.736733 ME: CPU Debug Disabled : YES
1696 17:29:09.739960 ME: TXT Support : NO
1697 17:29:09.743031 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 17:29:09.749534 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 17:29:09.752986 CBFS @ c08000 size 3f8000
1700 17:29:09.756239 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 17:29:09.759314 CBFS: Locating 'fallback/dsdt.aml'
1702 17:29:09.766061 CBFS: Found @ offset 10bb80 size 3fa5
1703 17:29:09.769666 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 17:29:09.772864 CBFS @ c08000 size 3f8000
1705 17:29:09.779170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 17:29:09.782751 CBFS: Locating 'fallback/slic'
1707 17:29:09.785706 CBFS: 'fallback/slic' not found.
1708 17:29:09.792179 ACPI: Writing ACPI tables at 99b3e000.
1709 17:29:09.792683 ACPI: * FACS
1710 17:29:09.795642 ACPI: * DSDT
1711 17:29:09.799244 Ramoops buffer: 0x100000@0x99a3d000.
1712 17:29:09.802343 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 17:29:09.805725 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 17:29:09.809586 Google Chrome EC: version:
1715 17:29:09.813185 ro: helios_v2.0.2659-56403530b
1716 17:29:09.816162 rw: helios_v2.0.2849-c41de27e7d
1717 17:29:09.819219 running image: 1
1718 17:29:09.822676 ACPI: * FADT
1719 17:29:09.823206 SCI is IRQ9
1720 17:29:09.829090 ACPI: added table 1/32, length now 40
1721 17:29:09.829618 ACPI: * SSDT
1722 17:29:09.832430 Found 1 CPU(s) with 8 core(s) each.
1723 17:29:09.835587 Error: Could not locate 'wifi_sar' in VPD.
1724 17:29:09.842440 Checking CBFS for default SAR values
1725 17:29:09.845672 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 17:29:09.848714 CBFS @ c08000 size 3f8000
1727 17:29:09.855775 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 17:29:09.858873 CBFS: Locating 'wifi_sar_defaults.hex'
1729 17:29:09.861878 CBFS: Found @ offset 5fac0 size 77
1730 17:29:09.865240 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 17:29:09.872011 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 17:29:09.875330 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 17:29:09.881592 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 17:29:09.885129 failed to find key in VPD: dsm_calib_r0_0
1735 17:29:09.894588 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 17:29:09.901620 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 17:29:09.904589 failed to find key in VPD: dsm_calib_r0_1
1738 17:29:09.914269 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 17:29:09.917968 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 17:29:09.920941 failed to find key in VPD: dsm_calib_r0_2
1741 17:29:09.930890 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 17:29:09.937200 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 17:29:09.940337 failed to find key in VPD: dsm_calib_r0_3
1744 17:29:09.949965 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 17:29:09.953401 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 17:29:09.959906 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 17:29:09.963490 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 17:29:09.966636 EC returned error result code 1
1749 17:29:09.969875 EC returned error result code 1
1750 17:29:09.973379 EC returned error result code 1
1751 17:29:09.979628 PS2K: Bad resp from EC. Vivaldi disabled!
1752 17:29:09.986046 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 17:29:09.989119 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 17:29:09.996012 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 17:29:09.999233 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 17:29:10.005698 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 17:29:10.012238 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 17:29:10.018803 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 17:29:10.025207 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 17:29:10.028778 ACPI: added table 2/32, length now 44
1761 17:29:10.029371 ACPI: * MCFG
1762 17:29:10.031690 ACPI: added table 3/32, length now 48
1763 17:29:10.035406 ACPI: * TPM2
1764 17:29:10.038314 TPM2 log created at 99a2d000
1765 17:29:10.041918 ACPI: added table 4/32, length now 52
1766 17:29:10.042455 ACPI: * MADT
1767 17:29:10.044726 SCI is IRQ9
1768 17:29:10.048324 ACPI: added table 5/32, length now 56
1769 17:29:10.051589 current = 99b43ac0
1770 17:29:10.052129 ACPI: * DMAR
1771 17:29:10.054638 ACPI: added table 6/32, length now 60
1772 17:29:10.058219 ACPI: * IGD OpRegion
1773 17:29:10.061464 GMA: Found VBT in CBFS
1774 17:29:10.064856 GMA: Found valid VBT in CBFS
1775 17:29:10.068042 ACPI: added table 7/32, length now 64
1776 17:29:10.068574 ACPI: * HPET
1777 17:29:10.074617 ACPI: added table 8/32, length now 68
1778 17:29:10.075156 ACPI: done.
1779 17:29:10.077803 ACPI tables: 31744 bytes.
1780 17:29:10.081061 smbios_write_tables: 99a2c000
1781 17:29:10.084355 EC returned error result code 3
1782 17:29:10.087332 Couldn't obtain OEM name from CBI
1783 17:29:10.090960 Create SMBIOS type 17
1784 17:29:10.093805 PCI: 00:00.0 (Intel Cannonlake)
1785 17:29:10.094239 PCI: 00:14.3 (Intel WiFi)
1786 17:29:10.097379 SMBIOS tables: 939 bytes.
1787 17:29:10.104180 Writing table forward entry at 0x00000500
1788 17:29:10.106957 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 17:29:10.113748 Writing coreboot table at 0x99b62000
1790 17:29:10.117125 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 17:29:10.123143 1. 0000000000001000-000000000009ffff: RAM
1792 17:29:10.126641 2. 00000000000a0000-00000000000fffff: RESERVED
1793 17:29:10.129748 3. 0000000000100000-0000000099a2bfff: RAM
1794 17:29:10.136570 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 17:29:10.142767 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 17:29:10.149587 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 17:29:10.152697 7. 000000009a000000-000000009f7fffff: RESERVED
1798 17:29:10.155689 8. 00000000e0000000-00000000efffffff: RESERVED
1799 17:29:10.162643 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 17:29:10.165886 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 17:29:10.172406 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 17:29:10.175690 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 17:29:10.182525 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 17:29:10.185372 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 17:29:10.188771 15. 0000000100000000-000000045e7fffff: RAM
1806 17:29:10.195278 Graphics framebuffer located at 0xc0000000
1807 17:29:10.198753 Passing 5 GPIOs to payload:
1808 17:29:10.201626 NAME | PORT | POLARITY | VALUE
1809 17:29:10.208229 write protect | undefined | high | low
1810 17:29:10.211755 lid | undefined | high | high
1811 17:29:10.217994 power | undefined | high | low
1812 17:29:10.224956 oprom | undefined | high | low
1813 17:29:10.228334 EC in RW | 0x000000cb | high | low
1814 17:29:10.231037 Board ID: 4
1815 17:29:10.234693 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 17:29:10.237965 CBFS @ c08000 size 3f8000
1817 17:29:10.244672 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 17:29:10.250818 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d67
1819 17:29:10.254110 coreboot table: 1492 bytes.
1820 17:29:10.257689 IMD ROOT 0. 99fff000 00001000
1821 17:29:10.260858 IMD SMALL 1. 99ffe000 00001000
1822 17:29:10.264089 FSP MEMORY 2. 99c4e000 003b0000
1823 17:29:10.267492 CONSOLE 3. 99c2e000 00020000
1824 17:29:10.271131 FMAP 4. 99c2d000 0000054e
1825 17:29:10.273615 TIME STAMP 5. 99c2c000 00000910
1826 17:29:10.277333 VBOOT WORK 6. 99c18000 00014000
1827 17:29:10.280519 MRC DATA 7. 99c16000 00001958
1828 17:29:10.283987 ROMSTG STCK 8. 99c15000 00001000
1829 17:29:10.286609 AFTER CAR 9. 99c0b000 0000a000
1830 17:29:10.290673 RAMSTAGE 10. 99baf000 0005c000
1831 17:29:10.293225 REFCODE 11. 99b7a000 00035000
1832 17:29:10.296713 SMM BACKUP 12. 99b6a000 00010000
1833 17:29:10.299862 COREBOOT 13. 99b62000 00008000
1834 17:29:10.303423 ACPI 14. 99b3e000 00024000
1835 17:29:10.306629 ACPI GNVS 15. 99b3d000 00001000
1836 17:29:10.309612 RAMOOPS 16. 99a3d000 00100000
1837 17:29:10.313195 TPM2 TCGLOG17. 99a2d000 00010000
1838 17:29:10.316739 SMBIOS 18. 99a2c000 00000800
1839 17:29:10.317332 IMD small region:
1840 17:29:10.322724 IMD ROOT 0. 99ffec00 00000400
1841 17:29:10.325977 FSP RUNTIME 1. 99ffebe0 00000004
1842 17:29:10.329142 EC HOSTEVENT 2. 99ffebc0 00000008
1843 17:29:10.332636 POWER STATE 3. 99ffeb80 00000040
1844 17:29:10.336159 ROMSTAGE 4. 99ffeb60 00000004
1845 17:29:10.339247 MEM INFO 5. 99ffe9a0 000001b9
1846 17:29:10.342878 VPD 6. 99ffe940 0000004c
1847 17:29:10.345667 MTRR: Physical address space:
1848 17:29:10.351979 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 17:29:10.358583 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 17:29:10.365151 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 17:29:10.371846 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 17:29:10.378394 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 17:29:10.381294 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 17:29:10.388091 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 17:29:10.394713 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 17:29:10.397918 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 17:29:10.401047 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 17:29:10.404519 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 17:29:10.411046 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 17:29:10.414264 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 17:29:10.417552 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 17:29:10.420554 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 17:29:10.427256 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 17:29:10.430477 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 17:29:10.433688 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 17:29:10.436971 call enable_fixed_mtrr()
1867 17:29:10.440456 CPU physical address size: 39 bits
1868 17:29:10.446936 MTRR: default type WB/UC MTRR counts: 6/8.
1869 17:29:10.450405 MTRR: WB selected as default type.
1870 17:29:10.456570 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 17:29:10.460345 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 17:29:10.466837 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 17:29:10.473527 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 17:29:10.479613 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 17:29:10.485876 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 17:29:10.492375 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 17:29:10.495631 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 17:29:10.499424 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 17:29:10.502280 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 17:29:10.508659 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 17:29:10.512187 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 17:29:10.515752 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 17:29:10.518952 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 17:29:10.525418 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 17:29:10.528846 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 17:29:10.531616 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 17:29:10.532056
1888 17:29:10.535488 MTRR check
1889 17:29:10.536070 Fixed MTRRs : Enabled
1890 17:29:10.538123 Variable MTRRs: Enabled
1891 17:29:10.538561
1892 17:29:10.541586 call enable_fixed_mtrr()
1893 17:29:10.547879 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 17:29:10.551163 CPU physical address size: 39 bits
1895 17:29:10.554659 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 17:29:10.557630 CBFS @ c08000 size 3f8000
1897 17:29:10.564305 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1898 17:29:10.567749 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 17:29:10.571044 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 17:29:10.577924 MTRR: Fixed MSR 0x258 0x0606060606060606
1901 17:29:10.580973 MTRR: Fixed MSR 0x259 0x0000000000000000
1902 17:29:10.584121 MTRR: Fixed MSR 0x268 0x0606060606060606
1903 17:29:10.587351 MTRR: Fixed MSR 0x269 0x0606060606060606
1904 17:29:10.594213 MTRR: Fixed MSR 0x26a 0x0606060606060606
1905 17:29:10.597144 MTRR: Fixed MSR 0x26b 0x0606060606060606
1906 17:29:10.600551 MTRR: Fixed MSR 0x26c 0x0606060606060606
1907 17:29:10.603877 MTRR: Fixed MSR 0x26d 0x0606060606060606
1908 17:29:10.610635 MTRR: Fixed MSR 0x26e 0x0606060606060606
1909 17:29:10.613718 MTRR: Fixed MSR 0x26f 0x0606060606060606
1910 17:29:10.616840 MTRR: Fixed MSR 0x258 0x0606060606060606
1911 17:29:10.619906 call enable_fixed_mtrr()
1912 17:29:10.623060 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 17:29:10.629725 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 17:29:10.633152 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 17:29:10.636799 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 17:29:10.640132 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 17:29:10.643254 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 17:29:10.649823 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 17:29:10.652884 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 17:29:10.656061 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 17:29:10.659956 CPU physical address size: 39 bits
1922 17:29:10.662494 call enable_fixed_mtrr()
1923 17:29:10.666012 CBFS: Locating 'fallback/payload'
1924 17:29:10.672279 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 17:29:10.676108 MTRR: Fixed MSR 0x250 0x0606060606060606
1926 17:29:10.678974 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 17:29:10.682159 MTRR: Fixed MSR 0x259 0x0000000000000000
1928 17:29:10.688717 MTRR: Fixed MSR 0x268 0x0606060606060606
1929 17:29:10.691870 MTRR: Fixed MSR 0x269 0x0606060606060606
1930 17:29:10.695130 MTRR: Fixed MSR 0x26a 0x0606060606060606
1931 17:29:10.698321 MTRR: Fixed MSR 0x26b 0x0606060606060606
1932 17:29:10.704821 MTRR: Fixed MSR 0x26c 0x0606060606060606
1933 17:29:10.708243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1934 17:29:10.711617 MTRR: Fixed MSR 0x26e 0x0606060606060606
1935 17:29:10.714987 MTRR: Fixed MSR 0x26f 0x0606060606060606
1936 17:29:10.721424 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 17:29:10.724587 call enable_fixed_mtrr()
1938 17:29:10.727860 MTRR: Fixed MSR 0x259 0x0000000000000000
1939 17:29:10.731030 MTRR: Fixed MSR 0x268 0x0606060606060606
1940 17:29:10.734356 MTRR: Fixed MSR 0x269 0x0606060606060606
1941 17:29:10.741090 MTRR: Fixed MSR 0x26a 0x0606060606060606
1942 17:29:10.744197 MTRR: Fixed MSR 0x26b 0x0606060606060606
1943 17:29:10.747353 MTRR: Fixed MSR 0x26c 0x0606060606060606
1944 17:29:10.750453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1945 17:29:10.756985 MTRR: Fixed MSR 0x26e 0x0606060606060606
1946 17:29:10.760451 MTRR: Fixed MSR 0x26f 0x0606060606060606
1947 17:29:10.763543 CPU physical address size: 39 bits
1948 17:29:10.766945 call enable_fixed_mtrr()
1949 17:29:10.769939 CBFS: Found @ offset 1c96c0 size 3f798
1950 17:29:10.773258 CPU physical address size: 39 bits
1951 17:29:10.776664 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 17:29:10.783347 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 17:29:10.786484 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 17:29:10.789538 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 17:29:10.793341 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 17:29:10.799688 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 17:29:10.802859 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 17:29:10.805941 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 17:29:10.809362 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 17:29:10.816641 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 17:29:10.819747 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 17:29:10.822627 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 17:29:10.826114 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 17:29:10.829348 call enable_fixed_mtrr()
1965 17:29:10.832746 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 17:29:10.839174 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 17:29:10.842082 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 17:29:10.845440 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 17:29:10.848852 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 17:29:10.855669 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 17:29:10.858279 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 17:29:10.861694 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 17:29:10.865442 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 17:29:10.871833 CPU physical address size: 39 bits
1975 17:29:10.874737 call enable_fixed_mtrr()
1976 17:29:10.878080 Checking segment from ROM address 0xffdd16f8
1977 17:29:10.881630 CPU physical address size: 39 bits
1978 17:29:10.884872 Checking segment from ROM address 0xffdd1714
1979 17:29:10.888184 CPU physical address size: 39 bits
1980 17:29:10.894257 Loading segment from ROM address 0xffdd16f8
1981 17:29:10.897558 code (compression=0)
1982 17:29:10.904265 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 17:29:10.913925 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 17:29:10.914454 it's not compressed!
1985 17:29:11.007621 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 17:29:11.013879 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 17:29:11.020559 Loading segment from ROM address 0xffdd1714
1988 17:29:11.021098 Entry Point 0x30000000
1989 17:29:11.023927 Loaded segments
1990 17:29:11.029815 Finalizing chipset.
1991 17:29:11.033219 Finalizing SMM.
1992 17:29:11.036398 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 17:29:11.039468 mp_park_aps done after 0 msecs.
1994 17:29:11.045986 Jumping to boot code at 30000000(99b62000)
1995 17:29:11.052269 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 17:29:11.052790
1997 17:29:11.055854 Starting depthcharge on Helios...
1998 17:29:11.057163 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1999 17:29:11.057748 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2000 17:29:11.058203 Setting prompt string to ['hatch:']
2001 17:29:11.058626 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2002 17:29:11.065609 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2003 17:29:11.072334 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2004 17:29:11.078690 board_setup: Info: eMMC controller not present; skipping
2005 17:29:11.082156 New NVMe Controller 0x30053ac0 @ 00:1d:00
2006 17:29:11.088683 board_setup: Info: SDHCI controller not present; skipping
2007 17:29:11.095385 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2008 17:29:11.095934 Wipe memory regions:
2009 17:29:11.101941 [0x00000000001000, 0x000000000a0000)
2010 17:29:11.104974 [0x00000000100000, 0x00000030000000)
2011 17:29:11.171999 [0x00000030657430, 0x00000099a2c000)
2012 17:29:11.312218 [0x00000100000000, 0x0000045e800000)
2013 17:29:12.694573 R8152: Initializing
2014 17:29:12.697643 Version 9 (ocp_data = 6010)
2015 17:29:12.702166 R8152: Done initializing
2016 17:29:12.705480 Adding net device
2017 17:29:13.080391 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2018 17:29:13.080526
2019 17:29:13.080809 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2021 17:29:13.181319 hatch: tftpboot 192.168.201.1 6962851/tftp-deploy-echciovj/kernel/bzImage 6962851/tftp-deploy-echciovj/kernel/cmdline 6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
2022 17:29:13.181447 Setting prompt string to 'Starting kernel'
2023 17:29:13.181525 Setting prompt string to ['Starting kernel']
2024 17:29:13.181593 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2025 17:29:13.181666 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
2026 17:29:13.185652 tftpboot 192.168.201.1 6962851/tftp-deploy-echciovj/kernel/bzImoy-echciovj/kernel/cmdline 6962851/tftp-deploy-echciovj/ramdisk/ramdisk.cpio.gz
2027 17:29:13.185738 Waiting for link
2028 17:29:13.386254 done.
2029 17:29:13.386375 MAC: f4:f5:e8:50:e5:3a
2030 17:29:13.389736 Sending DHCP discover... done.
2031 17:29:13.392944 Waiting for reply... done.
2032 17:29:13.396040 Sending DHCP request... done.
2033 17:29:13.399402 Waiting for reply... done.
2034 17:29:13.402647 My ip is 192.168.201.10
2035 17:29:13.405930 The DHCP server ip is 192.168.201.1
2036 17:29:13.409046 TFTP server IP predefined by user: 192.168.201.1
2037 17:29:13.415668 Bootfile predefined by user: 6962851/tftp-deploy-echciovj/kernel/bzImage
2038 17:29:13.421990 Sending tftp read request... done.
2039 17:29:13.425440 Waiting for the transfer...
2040 17:29:13.685887 00000000 ################################################################
2041 17:29:13.927742 00080000 ################################################################
2042 17:29:14.167838 00100000 ################################################################
2043 17:29:14.412859 00180000 ################################################################
2044 17:29:14.650358 00200000 ################################################################
2045 17:29:14.890789 00280000 ################################################################
2046 17:29:15.131781 00300000 ################################################################
2047 17:29:15.375186 00380000 ################################################################
2048 17:29:15.615919 00400000 ################################################################
2049 17:29:15.860990 00480000 ################################################################
2050 17:29:16.111310 00500000 ################################################################
2051 17:29:16.363896 00580000 ################################################################
2052 17:29:16.611631 00600000 ################################################################ done.
2053 17:29:16.614752 The bootfile was 6815632 bytes long.
2054 17:29:16.618252 Sending tftp read request... done.
2055 17:29:16.621210 Waiting for the transfer...
2056 17:29:16.856750 00000000 ################################################################
2057 17:29:17.104380 00080000 ################################################################
2058 17:29:17.348563 00100000 ################################################################
2059 17:29:17.595324 00180000 ################################################################
2060 17:29:17.826409 00200000 ################################################################
2061 17:29:18.067956 00280000 ################################################################
2062 17:29:18.311436 00300000 ################################################################
2063 17:29:18.550960 00380000 ################################################################
2064 17:29:18.797566 00400000 ################################################################
2065 17:29:19.035755 00480000 ################################################################
2066 17:29:19.148081 00500000 ############################# done.
2067 17:29:19.150789 Sending tftp read request... done.
2068 17:29:19.154210 Waiting for the transfer...
2069 17:29:19.154285 00000000 # done.
2070 17:29:19.164026 Command line loaded dynamically from TFTP file: 6962851/tftp-deploy-echciovj/kernel/cmdline
2071 17:29:19.187066 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6962851/extract-nfsrootfs-f0nndzq7,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2072 17:29:19.193250 ec_init(0): CrosEC protocol v3 supported (256, 256)
2073 17:29:19.199946 Shutting down all USB controllers.
2074 17:29:19.200023 Removing current net device
2075 17:29:19.203627 Finalizing coreboot
2076 17:29:19.209950 Exiting depthcharge with code 4 at timestamp: 15500351
2077 17:29:19.210036
2078 17:29:19.210104 Starting kernel ...
2079 17:29:19.210416 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2080 17:29:19.210524 start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
2081 17:29:19.210601 Setting prompt string to ['Linux version [0-9]']
2082 17:29:19.210674 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2083 17:29:19.210758 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2084 17:29:19.213417
2085 17:29:19.213502
2087 17:33:51.211077 end: 2.2.5 auto-login-action (duration 00:04:32) [common]
2089 17:33:51.211873 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
2091 17:33:51.212469 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2094 17:33:51.213544 end: 2 depthcharge-action (duration 00:05:00) [common]
2096 17:33:51.214334 Cleaning after the job
2097 17:33:51.214638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/ramdisk
2098 17:33:51.216426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/kernel
2099 17:33:51.218405 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/nfsrootfs
2100 17:33:51.271550 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6962851/tftp-deploy-echciovj/modules
2101 17:33:51.271859 start: 4.1 power-off (timeout 00:00:30) [common]
2102 17:33:51.272019 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2103 17:33:51.291211 >> Command sent successfully.
2104 17:33:51.293011 Returned 0 in 0 seconds
2105 17:33:51.393816 end: 4.1 power-off (duration 00:00:00) [common]
2107 17:33:51.395947 start: 4.2 read-feedback (timeout 00:10:00) [common]
2108 17:33:51.397007 Listened to connection for namespace 'common' for up to 1s
2109 17:33:52.401617 Finalising connection for namespace 'common'
2110 17:33:52.401867 Disconnecting from shell: Finalise
2111 17:33:52.502894 end: 4.2 read-feedback (duration 00:00:01) [common]
2112 17:33:52.503142 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6962851
2113 17:33:52.668273 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6962851
2114 17:33:52.668449 JobError: Your job cannot terminate cleanly.