Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:37.136413 lava-dispatcher, installed at version: 2022.06
2 09:46:37.136613 start: 0 validate
3 09:46:37.136746 Start time: 2022-08-12 09:46:37.136737+00:00 (UTC)
4 09:46:37.136877 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:37.137004 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
6 09:46:37.428197 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:37.428378 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:37.721909 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:37.722733 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:46:38.011609 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:46:38.012511 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:46:38.309024 validate duration: 1.17
14 09:46:38.309338 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:46:38.309451 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:46:38.309551 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:46:38.309661 Not decompressing ramdisk as can be used compressed.
18 09:46:38.309755 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220805.0/amd64/initrd.cpio.gz
19 09:46:38.309828 saving as /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/ramdisk/initrd.cpio.gz
20 09:46:38.309906 total size: 5411025 (5MB)
21 09:46:38.310972 progress 0% (0MB)
22 09:46:38.312376 progress 5% (0MB)
23 09:46:38.313715 progress 10% (0MB)
24 09:46:38.315088 progress 15% (0MB)
25 09:46:38.316513 progress 20% (1MB)
26 09:46:38.317781 progress 25% (1MB)
27 09:46:38.319091 progress 30% (1MB)
28 09:46:38.320352 progress 35% (1MB)
29 09:46:38.321761 progress 40% (2MB)
30 09:46:38.323062 progress 45% (2MB)
31 09:46:38.324411 progress 50% (2MB)
32 09:46:38.325673 progress 55% (2MB)
33 09:46:38.327142 progress 60% (3MB)
34 09:46:38.328412 progress 65% (3MB)
35 09:46:38.329696 progress 70% (3MB)
36 09:46:38.331034 progress 75% (3MB)
37 09:46:38.332471 progress 80% (4MB)
38 09:46:38.333767 progress 85% (4MB)
39 09:46:38.335116 progress 90% (4MB)
40 09:46:38.336407 progress 95% (4MB)
41 09:46:38.337865 progress 100% (5MB)
42 09:46:38.338045 5MB downloaded in 0.03s (183.41MB/s)
43 09:46:38.338199 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:46:38.338467 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:46:38.338570 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:46:38.338671 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:46:38.338784 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:46:38.338858 saving as /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/kernel/bzImage
50 09:46:38.338983 total size: 6815632 (6MB)
51 09:46:38.339069 No compression specified
52 09:46:40.343198 progress 0% (0MB)
53 09:46:40.345081 progress 5% (0MB)
54 09:46:40.346721 progress 10% (0MB)
55 09:46:40.348594 progress 15% (1MB)
56 09:46:40.350230 progress 20% (1MB)
57 09:46:40.351896 progress 25% (1MB)
58 09:46:40.353677 progress 30% (1MB)
59 09:46:40.355331 progress 35% (2MB)
60 09:46:40.357145 progress 40% (2MB)
61 09:46:40.358829 progress 45% (2MB)
62 09:46:40.360475 progress 50% (3MB)
63 09:46:40.362268 progress 55% (3MB)
64 09:46:40.363909 progress 60% (3MB)
65 09:46:40.365655 progress 65% (4MB)
66 09:46:40.367306 progress 70% (4MB)
67 09:46:40.368899 progress 75% (4MB)
68 09:46:40.370640 progress 80% (5MB)
69 09:46:40.372278 progress 85% (5MB)
70 09:46:40.374030 progress 90% (5MB)
71 09:46:40.375680 progress 95% (6MB)
72 09:46:40.377291 progress 100% (6MB)
73 09:46:40.377583 6MB downloaded in 2.04s (3.19MB/s)
74 09:46:40.377752 end: 1.2.1 http-download (duration 00:00:02) [common]
76 09:46:40.378017 end: 1.2 download-retry (duration 00:00:02) [common]
77 09:46:40.378119 start: 1.3 download-retry (timeout 00:09:58) [common]
78 09:46:40.378220 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 09:46:40.378340 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220805.0/amd64/full.rootfs.tar.xz
80 09:46:40.378413 saving as /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/nfsrootfs/full.rootfs.tar
81 09:46:40.378493 total size: 133191700 (127MB)
82 09:46:40.378570 Using unxz to decompress xz
83 09:46:40.381899 progress 0% (0MB)
84 09:46:40.743433 progress 5% (6MB)
85 09:46:41.109180 progress 10% (12MB)
86 09:46:41.401535 progress 15% (19MB)
87 09:46:41.632425 progress 20% (25MB)
88 09:46:41.891959 progress 25% (31MB)
89 09:46:42.250462 progress 30% (38MB)
90 09:46:42.620296 progress 35% (44MB)
91 09:46:43.025754 progress 40% (50MB)
92 09:46:43.429196 progress 45% (57MB)
93 09:46:43.803860 progress 50% (63MB)
94 09:46:44.188301 progress 55% (69MB)
95 09:46:44.564141 progress 60% (76MB)
96 09:46:44.937250 progress 65% (82MB)
97 09:46:45.317751 progress 70% (88MB)
98 09:46:45.699260 progress 75% (95MB)
99 09:46:46.145569 progress 80% (101MB)
100 09:46:46.597641 progress 85% (107MB)
101 09:46:46.888446 progress 90% (114MB)
102 09:46:47.247267 progress 95% (120MB)
103 09:46:47.648283 progress 100% (127MB)
104 09:46:47.654451 127MB downloaded in 7.28s (17.46MB/s)
105 09:46:47.654734 end: 1.3.1 http-download (duration 00:00:07) [common]
107 09:46:47.655034 end: 1.3 download-retry (duration 00:00:07) [common]
108 09:46:47.655144 start: 1.4 download-retry (timeout 00:09:51) [common]
109 09:46:47.655289 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 09:46:47.655407 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:46:47.655479 saving as /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/modules/modules.tar
112 09:46:47.655541 total size: 51724 (0MB)
113 09:46:47.655604 Using unxz to decompress xz
114 09:46:47.659090 progress 63% (0MB)
115 09:46:47.659502 progress 100% (0MB)
116 09:46:47.662877 0MB downloaded in 0.01s (6.73MB/s)
117 09:46:47.663157 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:46:47.663425 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:46:47.663522 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 09:46:47.663620 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 09:46:48.930350 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7022964/extract-nfsrootfs-ge8l71s3
123 09:46:48.930600 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 09:46:48.930722 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 09:46:48.930881 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj
126 09:46:48.931044 makedir: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin
127 09:46:48.931147 makedir: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/tests
128 09:46:48.931248 makedir: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/results
129 09:46:48.931369 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-add-keys
130 09:46:48.931525 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-add-sources
131 09:46:48.931661 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-background-process-start
132 09:46:48.931795 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-background-process-stop
133 09:46:48.931930 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-common-functions
134 09:46:48.932062 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-echo-ipv4
135 09:46:48.932194 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-install-packages
136 09:46:48.932325 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-installed-packages
137 09:46:48.932455 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-os-build
138 09:46:48.932586 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-probe-channel
139 09:46:48.932716 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-probe-ip
140 09:46:48.932847 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-target-ip
141 09:46:48.932977 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-target-mac
142 09:46:48.933108 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-target-storage
143 09:46:48.933242 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-case
144 09:46:48.933378 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-event
145 09:46:48.933508 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-feedback
146 09:46:48.933638 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-raise
147 09:46:48.933767 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-reference
148 09:46:48.933897 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-runner
149 09:46:48.934027 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-set
150 09:46:48.934157 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-test-shell
151 09:46:48.934289 Updating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-install-packages (oe)
152 09:46:48.934424 Updating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/bin/lava-installed-packages (oe)
153 09:46:48.934541 Creating /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/environment
154 09:46:48.934645 LAVA metadata
155 09:46:48.934723 - LAVA_JOB_ID=7022964
156 09:46:48.934805 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:46:48.934983 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 09:46:48.935060 skipped lava-vland-overlay
159 09:46:48.935166 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:46:48.935268 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 09:46:48.935341 skipped lava-multinode-overlay
162 09:46:48.935443 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:46:48.935547 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 09:46:48.935637 Loading test definitions
165 09:46:48.935754 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
166 09:46:48.935842 Using /lava-7022964 at stage 0
167 09:46:48.936135 uuid=7022964_1.5.2.3.1 testdef=None
168 09:46:48.936241 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 09:46:48.936347 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
170 09:46:48.936888 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 09:46:48.937155 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
173 09:46:48.937755 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 09:46:48.938029 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
176 09:46:48.938599 runner path: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/0/tests/0_dmesg test_uuid 7022964_1.5.2.3.1
177 09:46:48.938767 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 09:46:48.939346 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
180 09:46:48.939433 Using /lava-7022964 at stage 1
181 09:46:48.939760 uuid=7022964_1.5.2.3.5 testdef=None
182 09:46:48.939891 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 09:46:48.939998 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
184 09:46:48.940469 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 09:46:48.940727 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
187 09:46:48.941327 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 09:46:48.941601 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
190 09:46:48.942174 runner path: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/1/tests/1_bootrr test_uuid 7022964_1.5.2.3.5
191 09:46:48.942336 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 09:46:48.942576 Creating lava-test-runner.conf files
194 09:46:48.942660 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/0 for stage 0
195 09:46:48.942769 - 0_dmesg
196 09:46:48.942857 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7022964/lava-overlay-b74ythgj/lava-7022964/1 for stage 1
197 09:46:48.942970 - 1_bootrr
198 09:46:48.943083 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 09:46:48.943188 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
200 09:46:48.948734 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 09:46:48.948895 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
202 09:46:48.949012 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 09:46:48.949122 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 09:46:48.949229 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
205 09:46:49.052654 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 09:46:49.053012 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
207 09:46:49.053144 extracting modules file /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022964/extract-nfsrootfs-ge8l71s3
208 09:46:49.057213 extracting modules file /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7022964/extract-overlay-ramdisk-0i8a1f4r/ramdisk
209 09:46:49.061318 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 09:46:49.061474 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
211 09:46:49.061579 [common] Applying overlay to NFS
212 09:46:49.061666 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7022964/compress-overlay-o7b9i59m/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7022964/extract-nfsrootfs-ge8l71s3
213 09:46:49.065616 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 09:46:49.065740 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
215 09:46:49.065848 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 09:46:49.065959 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
217 09:46:49.066048 Building ramdisk /var/lib/lava/dispatcher/tmp/7022964/extract-overlay-ramdisk-0i8a1f4r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7022964/extract-overlay-ramdisk-0i8a1f4r/ramdisk
218 09:46:49.100106 >> 24431 blocks
219 09:46:49.562597 rename /var/lib/lava/dispatcher/tmp/7022964/extract-overlay-ramdisk-0i8a1f4r/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
220 09:46:49.563044 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 09:46:49.563167 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 09:46:49.563271 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 09:46:49.563371 No mkimage arch provided, not using FIT.
224 09:46:49.563463 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 09:46:49.563547 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 09:46:49.563650 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 09:46:49.563746 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 09:46:49.563827 No LXC device requested
229 09:46:49.563912 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 09:46:49.564003 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 09:46:49.564086 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 09:46:49.564156 Checking files for TFTP limit of 4294967296 bytes.
233 09:46:49.564536 end: 1 tftp-deploy (duration 00:00:11) [common]
234 09:46:49.564639 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 09:46:49.564736 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 09:46:49.564863 substitutions:
237 09:46:49.564933 - {DTB}: None
238 09:46:49.565000 - {INITRD}: 7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
239 09:46:49.565063 - {KERNEL}: 7022964/tftp-deploy-ltboiod1/kernel/bzImage
240 09:46:49.565124 - {LAVA_MAC}: None
241 09:46:49.565183 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7022964/extract-nfsrootfs-ge8l71s3
242 09:46:49.565244 - {NFS_SERVER_IP}: 192.168.201.1
243 09:46:49.565302 - {PRESEED_CONFIG}: None
244 09:46:49.565360 - {PRESEED_LOCAL}: None
245 09:46:49.565418 - {RAMDISK}: 7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
246 09:46:49.565475 - {ROOT_PART}: None
247 09:46:49.565532 - {ROOT}: None
248 09:46:49.565589 - {SERVER_IP}: 192.168.201.1
249 09:46:49.565646 - {TEE}: None
250 09:46:49.565703 Parsed boot commands:
251 09:46:49.565759 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 09:46:49.565913 Parsed boot commands: tftpboot 192.168.201.1 7022964/tftp-deploy-ltboiod1/kernel/bzImage 7022964/tftp-deploy-ltboiod1/kernel/cmdline 7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
253 09:46:49.566008 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 09:46:49.566142 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 09:46:49.566288 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 09:46:49.566435 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 09:46:49.566551 Not connected, no need to disconnect.
258 09:46:49.566684 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 09:46:49.566826 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 09:46:49.566977 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
261 09:46:49.570088 Setting prompt string to ['lava-test: # ']
262 09:46:49.570361 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 09:46:49.570468 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 09:46:49.570568 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 09:46:49.570659 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 09:46:49.570840 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
267 09:46:49.590092 >> Command sent successfully.
268 09:46:49.592030 Returned 0 in 0 seconds
269 09:46:49.692834 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 09:46:49.693166 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 09:46:49.693269 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 09:46:49.693355 Setting prompt string to 'Starting depthcharge on Helios...'
274 09:46:49.693422 Changing prompt to 'Starting depthcharge on Helios...'
275 09:46:49.693493 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 09:46:49.693771 [Enter `^Ec?' for help]
277 09:46:56.244994
278 09:46:56.245164
279 09:46:56.254810 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 09:46:56.258073 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 09:46:56.264767 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 09:46:56.267887 CPU: AES supported, TXT NOT supported, VT supported
283 09:46:56.274377 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 09:46:56.281082 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 09:46:56.284216 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 09:46:56.287316 VBOOT: Loading verstage.
287 09:46:56.294098 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 09:46:56.297411 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 09:46:56.304197 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 09:46:56.307347 CBFS @ c08000 size 3f8000
291 09:46:56.310465 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 09:46:56.313997 CBFS: Locating 'fallback/verstage'
293 09:46:56.320512 CBFS: Found @ offset 10fb80 size 1072c
294 09:46:56.320598
295 09:46:56.320665
296 09:46:56.330151 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 09:46:56.346241 Probing TPM: . done!
298 09:46:56.349357 TPM ready after 0 ms
299 09:46:56.352948 Connected to device vid:did:rid of 1ae0:0028:00
300 09:46:56.362769 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
301 09:46:56.366202 Initialized TPM device CR50 revision 0
302 09:46:56.411087 tlcl_send_startup: Startup return code is 0
303 09:46:56.411199 TPM: setup succeeded
304 09:46:56.423855 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 09:46:56.427569 Chrome EC: UHEPI supported
306 09:46:56.430836 Phase 1
307 09:46:56.434035 FMAP: area GBB found @ c05000 (12288 bytes)
308 09:46:56.440664 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 09:46:56.443787 Phase 2
310 09:46:56.443873 Phase 3
311 09:46:56.447263 FMAP: area GBB found @ c05000 (12288 bytes)
312 09:46:56.453980 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 09:46:56.460429 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 09:46:56.463799 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 09:46:56.470100 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 09:46:56.486017 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 09:46:56.489435 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 09:46:56.496139 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 09:46:56.500221 Phase 4
320 09:46:56.503778 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 09:46:56.510217 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 09:46:56.689926 VB2:vb2_rsa_verify_digest() Digest check failed!
323 09:46:56.696210 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 09:46:56.696297 Saving nvdata
325 09:46:56.699413 Reboot requested (10020007)
326 09:46:56.702584 board_reset() called!
327 09:46:56.702669 full_reset() called!
328 09:47:01.211010
329 09:47:01.211153
330 09:47:01.220770 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 09:47:01.224168 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 09:47:01.230736 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 09:47:01.234033 CPU: AES supported, TXT NOT supported, VT supported
334 09:47:01.240575 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 09:47:01.243942 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 09:47:01.250675 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 09:47:01.254195 VBOOT: Loading verstage.
338 09:47:01.257123 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 09:47:01.264017 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 09:47:01.270526 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 09:47:01.270616 CBFS @ c08000 size 3f8000
342 09:47:01.277179 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 09:47:01.280551 CBFS: Locating 'fallback/verstage'
344 09:47:01.283825 CBFS: Found @ offset 10fb80 size 1072c
345 09:47:01.288037
346 09:47:01.288150
347 09:47:01.297897 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 09:47:01.312055 Probing TPM: . done!
349 09:47:01.315674 TPM ready after 0 ms
350 09:47:01.318725 Connected to device vid:did:rid of 1ae0:0028:00
351 09:47:01.328962 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
352 09:47:01.332742 Initialized TPM device CR50 revision 0
353 09:47:01.376990 tlcl_send_startup: Startup return code is 0
354 09:47:01.377125 TPM: setup succeeded
355 09:47:01.389968 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 09:47:01.393549 Chrome EC: UHEPI supported
357 09:47:01.396824 Phase 1
358 09:47:01.400144 FMAP: area GBB found @ c05000 (12288 bytes)
359 09:47:01.406763 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 09:47:01.413432 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 09:47:01.416695 Recovery requested (1009000e)
362 09:47:01.422568 Saving nvdata
363 09:47:01.428510 tlcl_extend: response is 0
364 09:47:01.437216 tlcl_extend: response is 0
365 09:47:01.444459 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 09:47:01.447770 CBFS @ c08000 size 3f8000
367 09:47:01.454310 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 09:47:01.457533 CBFS: Locating 'fallback/romstage'
369 09:47:01.460897 CBFS: Found @ offset 80 size 145fc
370 09:47:01.464214 Accumulated console time in verstage 99 ms
371 09:47:01.464300
372 09:47:01.464368
373 09:47:01.477328 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 09:47:01.484022 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 09:47:01.487210 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 09:47:01.490429 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 09:47:01.496937 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 09:47:01.500355 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 09:47:01.503593 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
380 09:47:01.506688 TCO_STS: 0000 0000
381 09:47:01.510064 GEN_PMCON: e0015238 00000200
382 09:47:01.513412 GBLRST_CAUSE: 00000000 00000000
383 09:47:01.513497 prev_sleep_state 5
384 09:47:01.517316 Boot Count incremented to 28574
385 09:47:01.524240 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 09:47:01.527753 CBFS @ c08000 size 3f8000
387 09:47:01.534042 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 09:47:01.534131 CBFS: Locating 'fspm.bin'
389 09:47:01.540510 CBFS: Found @ offset 5ffc0 size 71000
390 09:47:01.543840 Chrome EC: UHEPI supported
391 09:47:01.550383 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 09:47:01.553986 Probing TPM: done!
393 09:47:01.560775 Connected to device vid:did:rid of 1ae0:0028:00
394 09:47:01.570554 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
395 09:47:01.577218 Initialized TPM device CR50 revision 0
396 09:47:01.586803 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 09:47:01.596406 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 09:47:01.596496 MRC cache found, size 1948
399 09:47:01.599850 bootmode is set to: 2
400 09:47:01.603054 PRMRR disabled by config.
401 09:47:01.606441 SPD INDEX = 1
402 09:47:01.609867 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 09:47:01.612939 CBFS @ c08000 size 3f8000
404 09:47:01.619597 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 09:47:01.619684 CBFS: Locating 'spd.bin'
406 09:47:01.625994 CBFS: Found @ offset 5fb80 size 400
407 09:47:01.626081 SPD: module type is LPDDR3
408 09:47:01.629348 SPD: module part is
409 09:47:01.635866 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 09:47:01.639411 SPD: device width 4 bits, bus width 8 bits
411 09:47:01.642474 SPD: module size is 4096 MB (per channel)
412 09:47:01.646017 memory slot: 0 configuration done.
413 09:47:01.652577 memory slot: 2 configuration done.
414 09:47:01.701548 CBMEM:
415 09:47:01.704582 IMD: root @ 99fff000 254 entries.
416 09:47:01.707797 IMD: root @ 99ffec00 62 entries.
417 09:47:01.711319 External stage cache:
418 09:47:01.714578 IMD: root @ 9abff000 254 entries.
419 09:47:01.717696 IMD: root @ 9abfec00 62 entries.
420 09:47:01.724441 Chrome EC: clear events_b mask to 0x0000000020004000
421 09:47:01.738397 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 09:47:01.753603 tlcl_write: response is 0
423 09:47:01.762999 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 09:47:01.769259 MRC: TPM MRC hash updated successfully.
425 09:47:01.769346 2 DIMMs found
426 09:47:01.772870 SMM Memory Map
427 09:47:01.775859 SMRAM : 0x9a000000 0x1000000
428 09:47:01.779409 Subregion 0: 0x9a000000 0xa00000
429 09:47:01.782783 Subregion 1: 0x9aa00000 0x200000
430 09:47:01.785669 Subregion 2: 0x9ac00000 0x400000
431 09:47:01.789100 top_of_ram = 0x9a000000
432 09:47:01.792792 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 09:47:01.798991 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 09:47:01.802288 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 09:47:01.808925 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 09:47:01.812382 CBFS @ c08000 size 3f8000
437 09:47:01.815593 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 09:47:01.822256 CBFS: Locating 'fallback/postcar'
439 09:47:01.825317 CBFS: Found @ offset 107000 size 4b44
440 09:47:01.832007 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 09:47:01.841992 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 09:47:01.845465 Processing 180 relocs. Offset value of 0x97c0c000
443 09:47:01.854041 Accumulated console time in romstage 286 ms
444 09:47:01.854129
445 09:47:01.854196
446 09:47:01.863881 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 09:47:01.870618 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 09:47:01.873886 CBFS @ c08000 size 3f8000
449 09:47:01.880556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 09:47:01.883644 CBFS: Locating 'fallback/ramstage'
451 09:47:01.886767 CBFS: Found @ offset 43380 size 1b9e8
452 09:47:01.893365 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 09:47:01.925713 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 09:47:01.932249 Processing 3976 relocs. Offset value of 0x98db0000
455 09:47:01.935512 Accumulated console time in postcar 52 ms
456 09:47:01.935598
457 09:47:01.935666
458 09:47:01.945381 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 09:47:01.951917 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 09:47:01.954944 WARNING: RO_VPD is uninitialized or empty.
461 09:47:01.958384 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 09:47:01.964832 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 09:47:01.964918 Normal boot.
464 09:47:01.971358 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 09:47:01.975086 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 09:47:01.978059 CBFS @ c08000 size 3f8000
467 09:47:01.984514 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 09:47:01.988080 CBFS: Locating 'cpu_microcode_blob.bin'
469 09:47:01.991042 CBFS: Found @ offset 14700 size 2ec00
470 09:47:01.997711 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 09:47:01.997797 Skip microcode update
472 09:47:02.004431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 09:47:02.007567 CBFS @ c08000 size 3f8000
474 09:47:02.010831 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 09:47:02.014042 CBFS: Locating 'fsps.bin'
476 09:47:02.017458 CBFS: Found @ offset d1fc0 size 35000
477 09:47:02.043941 Detected 4 core, 8 thread CPU.
478 09:47:02.047339 Setting up SMI for CPU
479 09:47:02.050548 IED base = 0x9ac00000
480 09:47:02.053622 IED size = 0x00400000
481 09:47:02.053707 Will perform SMM setup.
482 09:47:02.060353 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 09:47:02.067126 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 09:47:02.073322 Processing 16 relocs. Offset value of 0x00030000
485 09:47:02.073408 Attempting to start 7 APs
486 09:47:02.080063 Waiting for 10ms after sending INIT.
487 09:47:02.093704 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
488 09:47:02.093791 done.
489 09:47:02.097269 AP: slot 4 apic_id 5.
490 09:47:02.100304 AP: slot 5 apic_id 4.
491 09:47:02.103594 Waiting for 2nd SIPI to complete...done.
492 09:47:02.106758 AP: slot 6 apic_id 6.
493 09:47:02.106843 AP: slot 7 apic_id 7.
494 09:47:02.110110 AP: slot 1 apic_id 2.
495 09:47:02.113426 AP: slot 3 apic_id 3.
496 09:47:02.120163 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 09:47:02.126380 Processing 13 relocs. Offset value of 0x00038000
498 09:47:02.133216 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 09:47:02.136552 Installing SMM handler to 0x9a000000
500 09:47:02.143019 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 09:47:02.149643 Processing 658 relocs. Offset value of 0x9a010000
502 09:47:02.156339 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 09:47:02.159525 Processing 13 relocs. Offset value of 0x9a008000
504 09:47:02.166199 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 09:47:02.172934 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 09:47:02.179507 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 09:47:02.182680 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 09:47:02.189289 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 09:47:02.196171 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 09:47:02.202658 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 09:47:02.209200 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 09:47:02.212298 Clearing SMI status registers
513 09:47:02.212387 SMI_STS: PM1
514 09:47:02.215733 PM1_STS: PWRBTN
515 09:47:02.215817 TCO_STS: SECOND_TO
516 09:47:02.218877 New SMBASE 0x9a000000
517 09:47:02.222189 In relocation handler: CPU 0
518 09:47:02.225493 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 09:47:02.232136 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 09:47:02.232224 Relocation complete.
521 09:47:02.235503 New SMBASE 0x99fff800
522 09:47:02.238751 In relocation handler: CPU 2
523 09:47:02.241765 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
524 09:47:02.248350 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 09:47:02.248435 Relocation complete.
526 09:47:02.251586 New SMBASE 0x99ffec00
527 09:47:02.255094 In relocation handler: CPU 5
528 09:47:02.258162 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
529 09:47:02.265000 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 09:47:02.265085 Relocation complete.
531 09:47:02.268200 New SMBASE 0x99fff000
532 09:47:02.271635 In relocation handler: CPU 4
533 09:47:02.274881 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
534 09:47:02.281265 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 09:47:02.281350 Relocation complete.
536 09:47:02.284586 New SMBASE 0x99ffe800
537 09:47:02.288109 In relocation handler: CPU 6
538 09:47:02.291139 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
539 09:47:02.298073 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 09:47:02.298158 Relocation complete.
541 09:47:02.301170 New SMBASE 0x99ffe400
542 09:47:02.304513 In relocation handler: CPU 7
543 09:47:02.307801 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
544 09:47:02.311042 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 09:47:02.314377 Relocation complete.
546 09:47:02.317583 New SMBASE 0x99fff400
547 09:47:02.320931 In relocation handler: CPU 3
548 09:47:02.324285 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
549 09:47:02.327473 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 09:47:02.330629 Relocation complete.
551 09:47:02.334221 New SMBASE 0x99fffc00
552 09:47:02.337294 In relocation handler: CPU 1
553 09:47:02.340788 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
554 09:47:02.343783 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 09:47:02.347265 Relocation complete.
556 09:47:02.350853 Initializing CPU #0
557 09:47:02.353745 CPU: vendor Intel device 806ec
558 09:47:02.356956 CPU: family 06, model 8e, stepping 0c
559 09:47:02.360189 Clearing out pending MCEs
560 09:47:02.360275 Setting up local APIC...
561 09:47:02.363820 apic_id: 0x00 done.
562 09:47:02.367049 Turbo is available but hidden
563 09:47:02.370370 Turbo is available and visible
564 09:47:02.373719 VMX status: enabled
565 09:47:02.376780 IA32_FEATURE_CONTROL status: locked
566 09:47:02.376866 Skip microcode update
567 09:47:02.380224 CPU #0 initialized
568 09:47:02.383510 Initializing CPU #2
569 09:47:02.383595 Initializing CPU #6
570 09:47:02.386779 Initializing CPU #7
571 09:47:02.390192 Initializing CPU #1
572 09:47:02.390277 Initializing CPU #3
573 09:47:02.393252 CPU: vendor Intel device 806ec
574 09:47:02.396770 CPU: family 06, model 8e, stepping 0c
575 09:47:02.399709 CPU: vendor Intel device 806ec
576 09:47:02.403204 CPU: family 06, model 8e, stepping 0c
577 09:47:02.406421 Clearing out pending MCEs
578 09:47:02.409862 Clearing out pending MCEs
579 09:47:02.413226 CPU: vendor Intel device 806ec
580 09:47:02.416472 CPU: family 06, model 8e, stepping 0c
581 09:47:02.419700 Clearing out pending MCEs
582 09:47:02.419785 Initializing CPU #5
583 09:47:02.423164 Initializing CPU #4
584 09:47:02.426482 CPU: vendor Intel device 806ec
585 09:47:02.429714 CPU: family 06, model 8e, stepping 0c
586 09:47:02.432736 CPU: vendor Intel device 806ec
587 09:47:02.436177 CPU: family 06, model 8e, stepping 0c
588 09:47:02.439533 Clearing out pending MCEs
589 09:47:02.442718 Clearing out pending MCEs
590 09:47:02.446083 Setting up local APIC...
591 09:47:02.446168 Setting up local APIC...
592 09:47:02.449463 CPU: vendor Intel device 806ec
593 09:47:02.452726 CPU: family 06, model 8e, stepping 0c
594 09:47:02.455950 CPU: vendor Intel device 806ec
595 09:47:02.462377 CPU: family 06, model 8e, stepping 0c
596 09:47:02.462462 Clearing out pending MCEs
597 09:47:02.465893 Clearing out pending MCEs
598 09:47:02.469168 Setting up local APIC...
599 09:47:02.472605 Setting up local APIC...
600 09:47:02.472690 Setting up local APIC...
601 09:47:02.475933 apic_id: 0x07 done.
602 09:47:02.479253 Setting up local APIC...
603 09:47:02.482554 apic_id: 0x01 done.
604 09:47:02.482639 apic_id: 0x03 done.
605 09:47:02.485712 apic_id: 0x02 done.
606 09:47:02.485796 VMX status: enabled
607 09:47:02.488851 VMX status: enabled
608 09:47:02.492375 IA32_FEATURE_CONTROL status: locked
609 09:47:02.495591 IA32_FEATURE_CONTROL status: locked
610 09:47:02.498875 Skip microcode update
611 09:47:02.502343 Skip microcode update
612 09:47:02.502427 CPU #3 initialized
613 09:47:02.505294 CPU #1 initialized
614 09:47:02.509045 Setting up local APIC...
615 09:47:02.509129 apic_id: 0x06 done.
616 09:47:02.511955 VMX status: enabled
617 09:47:02.512041 VMX status: enabled
618 09:47:02.518531 IA32_FEATURE_CONTROL status: locked
619 09:47:02.522188 IA32_FEATURE_CONTROL status: locked
620 09:47:02.522275 Skip microcode update
621 09:47:02.525326 Skip microcode update
622 09:47:02.528722 CPU #7 initialized
623 09:47:02.528806 CPU #6 initialized
624 09:47:02.531816 VMX status: enabled
625 09:47:02.531900 apic_id: 0x05 done.
626 09:47:02.535091 apic_id: 0x04 done.
627 09:47:02.538481 VMX status: enabled
628 09:47:02.538566 VMX status: enabled
629 09:47:02.541863 IA32_FEATURE_CONTROL status: locked
630 09:47:02.548430 IA32_FEATURE_CONTROL status: locked
631 09:47:02.548514 Skip microcode update
632 09:47:02.551777 Skip microcode update
633 09:47:02.551861 CPU #4 initialized
634 09:47:02.554886 CPU #5 initialized
635 09:47:02.558337 IA32_FEATURE_CONTROL status: locked
636 09:47:02.561410 Skip microcode update
637 09:47:02.561494 CPU #2 initialized
638 09:47:02.568495 bsp_do_flight_plan done after 462 msecs.
639 09:47:02.571440 CPU: frequency set to 4200 MHz
640 09:47:02.571524 Enabling SMIs.
641 09:47:02.574676 Locking SMM.
642 09:47:02.588064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 09:47:02.591648 CBFS @ c08000 size 3f8000
644 09:47:02.598003 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 09:47:02.598088 CBFS: Locating 'vbt.bin'
646 09:47:02.604786 CBFS: Found @ offset 5f5c0 size 499
647 09:47:02.607791 Found a VBT of 4608 bytes after decompression
648 09:47:02.791052 Display FSP Version Info HOB
649 09:47:02.794058 Reference Code - CPU = 9.0.1e.30
650 09:47:02.797368 uCode Version = 0.0.0.ca
651 09:47:02.800825 TXT ACM version = ff.ff.ff.ffff
652 09:47:02.803978 Display FSP Version Info HOB
653 09:47:02.807288 Reference Code - ME = 9.0.1e.30
654 09:47:02.810587 MEBx version = 0.0.0.0
655 09:47:02.813698 ME Firmware Version = Consumer SKU
656 09:47:02.816911 Display FSP Version Info HOB
657 09:47:02.820347 Reference Code - CML PCH = 9.0.1e.30
658 09:47:02.823547 PCH-CRID Status = Disabled
659 09:47:02.826711 PCH-CRID Original Value = ff.ff.ff.ffff
660 09:47:02.829986 PCH-CRID New Value = ff.ff.ff.ffff
661 09:47:02.833565 OPROM - RST - RAID = ff.ff.ff.ffff
662 09:47:02.836412 ChipsetInit Base Version = ff.ff.ff.ffff
663 09:47:02.843096 ChipsetInit Oem Version = ff.ff.ff.ffff
664 09:47:02.843180 Display FSP Version Info HOB
665 09:47:02.849545 Reference Code - SA - System Agent = 9.0.1e.30
666 09:47:02.853041 Reference Code - MRC = 0.7.1.6c
667 09:47:02.856348 SA - PCIe Version = 9.0.1e.30
668 09:47:02.859376 SA-CRID Status = Disabled
669 09:47:02.862698 SA-CRID Original Value = 0.0.0.c
670 09:47:02.862785 SA-CRID New Value = 0.0.0.c
671 09:47:02.866164 OPROM - VBIOS = ff.ff.ff.ffff
672 09:47:02.869826 RTC Init
673 09:47:02.873114 Set power on after power failure.
674 09:47:02.873197 Disabling Deep S3
675 09:47:02.876347 Disabling Deep S3
676 09:47:02.879435 Disabling Deep S4
677 09:47:02.879519 Disabling Deep S4
678 09:47:02.882705 Disabling Deep S5
679 09:47:02.882789 Disabling Deep S5
680 09:47:02.889461 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
681 09:47:02.892468 Enumerating buses...
682 09:47:02.895829 Show all devs... Before device enumeration.
683 09:47:02.899344 Root Device: enabled 1
684 09:47:02.902409 CPU_CLUSTER: 0: enabled 1
685 09:47:02.902493 DOMAIN: 0000: enabled 1
686 09:47:02.905672 APIC: 00: enabled 1
687 09:47:02.908949 PCI: 00:00.0: enabled 1
688 09:47:02.909032 PCI: 00:02.0: enabled 1
689 09:47:02.912189 PCI: 00:04.0: enabled 0
690 09:47:02.915732 PCI: 00:05.0: enabled 0
691 09:47:02.918946 PCI: 00:12.0: enabled 1
692 09:47:02.919030 PCI: 00:12.5: enabled 0
693 09:47:02.921939 PCI: 00:12.6: enabled 0
694 09:47:02.925203 PCI: 00:14.0: enabled 1
695 09:47:02.928597 PCI: 00:14.1: enabled 0
696 09:47:02.928680 PCI: 00:14.3: enabled 1
697 09:47:02.931784 PCI: 00:14.5: enabled 0
698 09:47:02.935102 PCI: 00:15.0: enabled 1
699 09:47:02.938349 PCI: 00:15.1: enabled 1
700 09:47:02.938433 PCI: 00:15.2: enabled 0
701 09:47:02.941405 PCI: 00:15.3: enabled 0
702 09:47:02.945139 PCI: 00:16.0: enabled 1
703 09:47:02.948123 PCI: 00:16.1: enabled 0
704 09:47:02.948209 PCI: 00:16.2: enabled 0
705 09:47:02.951222 PCI: 00:16.3: enabled 0
706 09:47:02.954706 PCI: 00:16.4: enabled 0
707 09:47:02.957791 PCI: 00:16.5: enabled 0
708 09:47:02.957877 PCI: 00:17.0: enabled 1
709 09:47:02.961231 PCI: 00:19.0: enabled 1
710 09:47:02.964766 PCI: 00:19.1: enabled 0
711 09:47:02.967845 PCI: 00:19.2: enabled 0
712 09:47:02.967930 PCI: 00:1a.0: enabled 0
713 09:47:02.971298 PCI: 00:1c.0: enabled 0
714 09:47:02.974236 PCI: 00:1c.1: enabled 0
715 09:47:02.977355 PCI: 00:1c.2: enabled 0
716 09:47:02.977440 PCI: 00:1c.3: enabled 0
717 09:47:02.980475 PCI: 00:1c.4: enabled 0
718 09:47:02.983840 PCI: 00:1c.5: enabled 0
719 09:47:02.987255 PCI: 00:1c.6: enabled 0
720 09:47:02.987341 PCI: 00:1c.7: enabled 0
721 09:47:02.990256 PCI: 00:1d.0: enabled 1
722 09:47:02.993704 PCI: 00:1d.1: enabled 0
723 09:47:02.996920 PCI: 00:1d.2: enabled 0
724 09:47:02.997005 PCI: 00:1d.3: enabled 0
725 09:47:03.000279 PCI: 00:1d.4: enabled 0
726 09:47:03.003544 PCI: 00:1d.5: enabled 1
727 09:47:03.006871 PCI: 00:1e.0: enabled 1
728 09:47:03.006997 PCI: 00:1e.1: enabled 0
729 09:47:03.010279 PCI: 00:1e.2: enabled 1
730 09:47:03.013316 PCI: 00:1e.3: enabled 1
731 09:47:03.016814 PCI: 00:1f.0: enabled 1
732 09:47:03.016904 PCI: 00:1f.1: enabled 1
733 09:47:03.019881 PCI: 00:1f.2: enabled 1
734 09:47:03.023043 PCI: 00:1f.3: enabled 1
735 09:47:03.023128 PCI: 00:1f.4: enabled 1
736 09:47:03.026273 PCI: 00:1f.5: enabled 1
737 09:47:03.029756 PCI: 00:1f.6: enabled 0
738 09:47:03.033255 USB0 port 0: enabled 1
739 09:47:03.033341 I2C: 00:15: enabled 1
740 09:47:03.036307 I2C: 00:5d: enabled 1
741 09:47:03.039728 GENERIC: 0.0: enabled 1
742 09:47:03.039813 I2C: 00:1a: enabled 1
743 09:47:03.042983 I2C: 00:38: enabled 1
744 09:47:03.046204 I2C: 00:39: enabled 1
745 09:47:03.049409 I2C: 00:3a: enabled 1
746 09:47:03.049517 I2C: 00:3b: enabled 1
747 09:47:03.052721 PCI: 00:00.0: enabled 1
748 09:47:03.055883 SPI: 00: enabled 1
749 09:47:03.055990 SPI: 01: enabled 1
750 09:47:03.059411 PNP: 0c09.0: enabled 1
751 09:47:03.062244 USB2 port 0: enabled 1
752 09:47:03.062352 USB2 port 1: enabled 1
753 09:47:03.065561 USB2 port 2: enabled 0
754 09:47:03.069006 USB2 port 3: enabled 0
755 09:47:03.069115 USB2 port 5: enabled 0
756 09:47:03.072402 USB2 port 6: enabled 1
757 09:47:03.075321 USB2 port 9: enabled 1
758 09:47:03.078597 USB3 port 0: enabled 1
759 09:47:03.078701 USB3 port 1: enabled 1
760 09:47:03.081965 USB3 port 2: enabled 1
761 09:47:03.085228 USB3 port 3: enabled 1
762 09:47:03.085331 USB3 port 4: enabled 0
763 09:47:03.088328 APIC: 02: enabled 1
764 09:47:03.091790 APIC: 01: enabled 1
765 09:47:03.091895 APIC: 03: enabled 1
766 09:47:03.095071 APIC: 05: enabled 1
767 09:47:03.098208 APIC: 04: enabled 1
768 09:47:03.098312 APIC: 06: enabled 1
769 09:47:03.101721 APIC: 07: enabled 1
770 09:47:03.104906 Compare with tree...
771 09:47:03.105009 Root Device: enabled 1
772 09:47:03.108035 CPU_CLUSTER: 0: enabled 1
773 09:47:03.111436 APIC: 00: enabled 1
774 09:47:03.111540 APIC: 02: enabled 1
775 09:47:03.114410 APIC: 01: enabled 1
776 09:47:03.117841 APIC: 03: enabled 1
777 09:47:03.117946 APIC: 05: enabled 1
778 09:47:03.121171 APIC: 04: enabled 1
779 09:47:03.124369 APIC: 06: enabled 1
780 09:47:03.127610 APIC: 07: enabled 1
781 09:47:03.127715 DOMAIN: 0000: enabled 1
782 09:47:03.131124 PCI: 00:00.0: enabled 1
783 09:47:03.134457 PCI: 00:02.0: enabled 1
784 09:47:03.137442 PCI: 00:04.0: enabled 0
785 09:47:03.140863 PCI: 00:05.0: enabled 0
786 09:47:03.140973 PCI: 00:12.0: enabled 1
787 09:47:03.144012 PCI: 00:12.5: enabled 0
788 09:47:03.147477 PCI: 00:12.6: enabled 0
789 09:47:03.150429 PCI: 00:14.0: enabled 1
790 09:47:03.153787 USB0 port 0: enabled 1
791 09:47:03.153900 USB2 port 0: enabled 1
792 09:47:03.157279 USB2 port 1: enabled 1
793 09:47:03.160331 USB2 port 2: enabled 0
794 09:47:03.163892 USB2 port 3: enabled 0
795 09:47:03.166908 USB2 port 5: enabled 0
796 09:47:03.170043 USB2 port 6: enabled 1
797 09:47:03.170143 USB2 port 9: enabled 1
798 09:47:03.173516 USB3 port 0: enabled 1
799 09:47:03.176806 USB3 port 1: enabled 1
800 09:47:03.179916 USB3 port 2: enabled 1
801 09:47:03.183079 USB3 port 3: enabled 1
802 09:47:03.186752 USB3 port 4: enabled 0
803 09:47:03.186857 PCI: 00:14.1: enabled 0
804 09:47:03.189920 PCI: 00:14.3: enabled 1
805 09:47:03.193287 PCI: 00:14.5: enabled 0
806 09:47:03.196260 PCI: 00:15.0: enabled 1
807 09:47:03.199527 I2C: 00:15: enabled 1
808 09:47:03.199635 PCI: 00:15.1: enabled 1
809 09:47:03.202911 I2C: 00:5d: enabled 1
810 09:47:03.206504 GENERIC: 0.0: enabled 1
811 09:47:03.209319 PCI: 00:15.2: enabled 0
812 09:47:03.212490 PCI: 00:15.3: enabled 0
813 09:47:03.212596 PCI: 00:16.0: enabled 1
814 09:47:03.216087 PCI: 00:16.1: enabled 0
815 09:47:03.219141 PCI: 00:16.2: enabled 0
816 09:47:03.222498 PCI: 00:16.3: enabled 0
817 09:47:03.225787 PCI: 00:16.4: enabled 0
818 09:47:03.225896 PCI: 00:16.5: enabled 0
819 09:47:03.229030 PCI: 00:17.0: enabled 1
820 09:47:03.232342 PCI: 00:19.0: enabled 1
821 09:47:03.235433 I2C: 00:1a: enabled 1
822 09:47:03.238844 I2C: 00:38: enabled 1
823 09:47:03.238990 I2C: 00:39: enabled 1
824 09:47:03.242072 I2C: 00:3a: enabled 1
825 09:47:03.245294 I2C: 00:3b: enabled 1
826 09:47:03.248734 PCI: 00:19.1: enabled 0
827 09:47:03.248839 PCI: 00:19.2: enabled 0
828 09:47:03.252010 PCI: 00:1a.0: enabled 0
829 09:47:03.255068 PCI: 00:1c.0: enabled 0
830 09:47:03.258473 PCI: 00:1c.1: enabled 0
831 09:47:03.262065 PCI: 00:1c.2: enabled 0
832 09:47:03.262171 PCI: 00:1c.3: enabled 0
833 09:47:03.265165 PCI: 00:1c.4: enabled 0
834 09:47:03.268552 PCI: 00:1c.5: enabled 0
835 09:47:03.271653 PCI: 00:1c.6: enabled 0
836 09:47:03.274904 PCI: 00:1c.7: enabled 0
837 09:47:03.275008 PCI: 00:1d.0: enabled 1
838 09:47:03.278193 PCI: 00:1d.1: enabled 0
839 09:47:03.281522 PCI: 00:1d.2: enabled 0
840 09:47:03.284546 PCI: 00:1d.3: enabled 0
841 09:47:03.287766 PCI: 00:1d.4: enabled 0
842 09:47:03.287852 PCI: 00:1d.5: enabled 1
843 09:47:03.291138 PCI: 00:00.0: enabled 1
844 09:47:03.294404 PCI: 00:1e.0: enabled 1
845 09:47:03.297644 PCI: 00:1e.1: enabled 0
846 09:47:03.301126 PCI: 00:1e.2: enabled 1
847 09:47:03.301211 SPI: 00: enabled 1
848 09:47:03.304322 PCI: 00:1e.3: enabled 1
849 09:47:03.307697 SPI: 01: enabled 1
850 09:47:03.310703 PCI: 00:1f.0: enabled 1
851 09:47:03.310789 PNP: 0c09.0: enabled 1
852 09:47:03.314029 PCI: 00:1f.1: enabled 1
853 09:47:03.317535 PCI: 00:1f.2: enabled 1
854 09:47:03.320576 PCI: 00:1f.3: enabled 1
855 09:47:03.324076 PCI: 00:1f.4: enabled 1
856 09:47:03.324162 PCI: 00:1f.5: enabled 1
857 09:47:03.327219 PCI: 00:1f.6: enabled 0
858 09:47:03.330492 Root Device scanning...
859 09:47:03.333880 scan_static_bus for Root Device
860 09:47:03.337359 CPU_CLUSTER: 0 enabled
861 09:47:03.337444 DOMAIN: 0000 enabled
862 09:47:03.340477 DOMAIN: 0000 scanning...
863 09:47:03.343649 PCI: pci_scan_bus for bus 00
864 09:47:03.346789 PCI: 00:00.0 [8086/0000] ops
865 09:47:03.350245 PCI: 00:00.0 [8086/9b61] enabled
866 09:47:03.353510 PCI: 00:02.0 [8086/0000] bus ops
867 09:47:03.356578 PCI: 00:02.0 [8086/9b41] enabled
868 09:47:03.360072 PCI: 00:04.0 [8086/1903] disabled
869 09:47:03.363077 PCI: 00:08.0 [8086/1911] enabled
870 09:47:03.366473 PCI: 00:12.0 [8086/02f9] enabled
871 09:47:03.369829 PCI: 00:14.0 [8086/0000] bus ops
872 09:47:03.372880 PCI: 00:14.0 [8086/02ed] enabled
873 09:47:03.376495 PCI: 00:14.2 [8086/02ef] enabled
874 09:47:03.379585 PCI: 00:14.3 [8086/02f0] enabled
875 09:47:03.382994 PCI: 00:15.0 [8086/0000] bus ops
876 09:47:03.386348 PCI: 00:15.0 [8086/02e8] enabled
877 09:47:03.389500 PCI: 00:15.1 [8086/0000] bus ops
878 09:47:03.392638 PCI: 00:15.1 [8086/02e9] enabled
879 09:47:03.396012 PCI: 00:16.0 [8086/0000] ops
880 09:47:03.399231 PCI: 00:16.0 [8086/02e0] enabled
881 09:47:03.402530 PCI: 00:17.0 [8086/0000] ops
882 09:47:03.405876 PCI: 00:17.0 [8086/02d3] enabled
883 09:47:03.408834 PCI: 00:19.0 [8086/0000] bus ops
884 09:47:03.412275 PCI: 00:19.0 [8086/02c5] enabled
885 09:47:03.415504 PCI: 00:1d.0 [8086/0000] bus ops
886 09:47:03.419048 PCI: 00:1d.0 [8086/02b0] enabled
887 09:47:03.425566 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 09:47:03.428646 PCI: 00:1e.0 [8086/0000] ops
889 09:47:03.432106 PCI: 00:1e.0 [8086/02a8] enabled
890 09:47:03.435294 PCI: 00:1e.2 [8086/0000] bus ops
891 09:47:03.438725 PCI: 00:1e.2 [8086/02aa] enabled
892 09:47:03.441752 PCI: 00:1e.3 [8086/0000] bus ops
893 09:47:03.444907 PCI: 00:1e.3 [8086/02ab] enabled
894 09:47:03.448215 PCI: 00:1f.0 [8086/0000] bus ops
895 09:47:03.451467 PCI: 00:1f.0 [8086/0284] enabled
896 09:47:03.458112 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 09:47:03.464843 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 09:47:03.467958 PCI: 00:1f.3 [8086/0000] bus ops
899 09:47:03.471298 PCI: 00:1f.3 [8086/02c8] enabled
900 09:47:03.474672 PCI: 00:1f.4 [8086/0000] bus ops
901 09:47:03.478035 PCI: 00:1f.4 [8086/02a3] enabled
902 09:47:03.481328 PCI: 00:1f.5 [8086/0000] bus ops
903 09:47:03.484411 PCI: 00:1f.5 [8086/02a4] enabled
904 09:47:03.487485 PCI: Leftover static devices:
905 09:47:03.487581 PCI: 00:05.0
906 09:47:03.487649 PCI: 00:12.5
907 09:47:03.491104 PCI: 00:12.6
908 09:47:03.491191 PCI: 00:14.1
909 09:47:03.494263 PCI: 00:14.5
910 09:47:03.494351 PCI: 00:15.2
911 09:47:03.494418 PCI: 00:15.3
912 09:47:03.497483 PCI: 00:16.1
913 09:47:03.497568 PCI: 00:16.2
914 09:47:03.501087 PCI: 00:16.3
915 09:47:03.501171 PCI: 00:16.4
916 09:47:03.504090 PCI: 00:16.5
917 09:47:03.504173 PCI: 00:19.1
918 09:47:03.504239 PCI: 00:19.2
919 09:47:03.507552 PCI: 00:1a.0
920 09:47:03.507636 PCI: 00:1c.0
921 09:47:03.510475 PCI: 00:1c.1
922 09:47:03.510558 PCI: 00:1c.2
923 09:47:03.510624 PCI: 00:1c.3
924 09:47:03.513659 PCI: 00:1c.4
925 09:47:03.513744 PCI: 00:1c.5
926 09:47:03.517214 PCI: 00:1c.6
927 09:47:03.517297 PCI: 00:1c.7
928 09:47:03.520288 PCI: 00:1d.1
929 09:47:03.520372 PCI: 00:1d.2
930 09:47:03.520438 PCI: 00:1d.3
931 09:47:03.523819 PCI: 00:1d.4
932 09:47:03.523903 PCI: 00:1d.5
933 09:47:03.526721 PCI: 00:1e.1
934 09:47:03.526831 PCI: 00:1f.1
935 09:47:03.526947 PCI: 00:1f.2
936 09:47:03.530303 PCI: 00:1f.6
937 09:47:03.533578 PCI: Check your devicetree.cb.
938 09:47:03.536528 PCI: 00:02.0 scanning...
939 09:47:03.539871 scan_generic_bus for PCI: 00:02.0
940 09:47:03.543229 scan_generic_bus for PCI: 00:02.0 done
941 09:47:03.549505 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
942 09:47:03.549591 PCI: 00:14.0 scanning...
943 09:47:03.553046 scan_static_bus for PCI: 00:14.0
944 09:47:03.556357 USB0 port 0 enabled
945 09:47:03.559469 USB0 port 0 scanning...
946 09:47:03.562681 scan_static_bus for USB0 port 0
947 09:47:03.566132 USB2 port 0 enabled
948 09:47:03.566221 USB2 port 1 enabled
949 09:47:03.569238 USB2 port 2 disabled
950 09:47:03.572715 USB2 port 3 disabled
951 09:47:03.572799 USB2 port 5 disabled
952 09:47:03.576048 USB2 port 6 enabled
953 09:47:03.576132 USB2 port 9 enabled
954 09:47:03.579247 USB3 port 0 enabled
955 09:47:03.582379 USB3 port 1 enabled
956 09:47:03.582463 USB3 port 2 enabled
957 09:47:03.585638 USB3 port 3 enabled
958 09:47:03.588963 USB3 port 4 disabled
959 09:47:03.589053 USB2 port 0 scanning...
960 09:47:03.592278 scan_static_bus for USB2 port 0
961 09:47:03.598633 scan_static_bus for USB2 port 0 done
962 09:47:03.602024 scan_bus: scanning of bus USB2 port 0 took 9704 usecs
963 09:47:03.605049 USB2 port 1 scanning...
964 09:47:03.608396 scan_static_bus for USB2 port 1
965 09:47:03.611818 scan_static_bus for USB2 port 1 done
966 09:47:03.618326 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
967 09:47:03.621619 USB2 port 6 scanning...
968 09:47:03.624736 scan_static_bus for USB2 port 6
969 09:47:03.628158 scan_static_bus for USB2 port 6 done
970 09:47:03.631606 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
971 09:47:03.634658 USB2 port 9 scanning...
972 09:47:03.638066 scan_static_bus for USB2 port 9
973 09:47:03.641129 scan_static_bus for USB2 port 9 done
974 09:47:03.647794 scan_bus: scanning of bus USB2 port 9 took 9705 usecs
975 09:47:03.651283 USB3 port 0 scanning...
976 09:47:03.654269 scan_static_bus for USB3 port 0
977 09:47:03.657630 scan_static_bus for USB3 port 0 done
978 09:47:03.663930 scan_bus: scanning of bus USB3 port 0 took 9689 usecs
979 09:47:03.664014 USB3 port 1 scanning...
980 09:47:03.667368 scan_static_bus for USB3 port 1
981 09:47:03.673720 scan_static_bus for USB3 port 1 done
982 09:47:03.677102 scan_bus: scanning of bus USB3 port 1 took 9686 usecs
983 09:47:03.680394 USB3 port 2 scanning...
984 09:47:03.683508 scan_static_bus for USB3 port 2
985 09:47:03.686825 scan_static_bus for USB3 port 2 done
986 09:47:03.693321 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
987 09:47:03.693405 USB3 port 3 scanning...
988 09:47:03.696900 scan_static_bus for USB3 port 3
989 09:47:03.703685 scan_static_bus for USB3 port 3 done
990 09:47:03.706999 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
991 09:47:03.710009 scan_static_bus for USB0 port 0 done
992 09:47:03.716708 scan_bus: scanning of bus USB0 port 0 took 155345 usecs
993 09:47:03.720194 scan_static_bus for PCI: 00:14.0 done
994 09:47:03.726594 scan_bus: scanning of bus PCI: 00:14.0 took 172958 usecs
995 09:47:03.729807 PCI: 00:15.0 scanning...
996 09:47:03.732871 scan_generic_bus for PCI: 00:15.0
997 09:47:03.736310 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 09:47:03.739699 scan_generic_bus for PCI: 00:15.0 done
999 09:47:03.746281 scan_bus: scanning of bus PCI: 00:15.0 took 14302 usecs
1000 09:47:03.749508 PCI: 00:15.1 scanning...
1001 09:47:03.752784 scan_generic_bus for PCI: 00:15.1
1002 09:47:03.756033 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 09:47:03.759050 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 09:47:03.765607 scan_generic_bus for PCI: 00:15.1 done
1005 09:47:03.768805 scan_bus: scanning of bus PCI: 00:15.1 took 18610 usecs
1006 09:47:03.772064 PCI: 00:19.0 scanning...
1007 09:47:03.775387 scan_generic_bus for PCI: 00:19.0
1008 09:47:03.781933 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 09:47:03.785216 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 09:47:03.788464 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 09:47:03.792032 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 09:47:03.798298 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 09:47:03.801660 scan_generic_bus for PCI: 00:19.0 done
1014 09:47:03.804961 scan_bus: scanning of bus PCI: 00:19.0 took 30716 usecs
1015 09:47:03.807997 PCI: 00:1d.0 scanning...
1016 09:47:03.811437 do_pci_scan_bridge for PCI: 00:1d.0
1017 09:47:03.814556 PCI: pci_scan_bus for bus 01
1018 09:47:03.817841 PCI: 01:00.0 [1c5c/1327] enabled
1019 09:47:03.821200 Enabling Common Clock Configuration
1020 09:47:03.827897 L1 Sub-State supported from root port 29
1021 09:47:03.831223 L1 Sub-State Support = 0xf
1022 09:47:03.831307 CommonModeRestoreTime = 0x28
1023 09:47:03.837520 Power On Value = 0x16, Power On Scale = 0x0
1024 09:47:03.837605 ASPM: Enabled L1
1025 09:47:03.844434 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
1026 09:47:03.847311 PCI: 00:1e.2 scanning...
1027 09:47:03.850805 scan_generic_bus for PCI: 00:1e.2
1028 09:47:03.854168 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 09:47:03.857397 scan_generic_bus for PCI: 00:1e.2 done
1030 09:47:03.863848 scan_bus: scanning of bus PCI: 00:1e.2 took 13993 usecs
1031 09:47:03.867246 PCI: 00:1e.3 scanning...
1032 09:47:03.870250 scan_generic_bus for PCI: 00:1e.3
1033 09:47:03.873412 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 09:47:03.876815 scan_generic_bus for PCI: 00:1e.3 done
1035 09:47:03.883521 scan_bus: scanning of bus PCI: 00:1e.3 took 13999 usecs
1036 09:47:03.886965 PCI: 00:1f.0 scanning...
1037 09:47:03.889847 scan_static_bus for PCI: 00:1f.0
1038 09:47:03.889931 PNP: 0c09.0 enabled
1039 09:47:03.896695 scan_static_bus for PCI: 00:1f.0 done
1040 09:47:03.899780 scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs
1041 09:47:03.903056 PCI: 00:1f.3 scanning...
1042 09:47:03.909753 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1043 09:47:03.912738 PCI: 00:1f.4 scanning...
1044 09:47:03.916398 scan_generic_bus for PCI: 00:1f.4
1045 09:47:03.919493 scan_generic_bus for PCI: 00:1f.4 done
1046 09:47:03.925887 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1047 09:47:03.925971 PCI: 00:1f.5 scanning...
1048 09:47:03.932534 scan_generic_bus for PCI: 00:1f.5
1049 09:47:03.935815 scan_generic_bus for PCI: 00:1f.5 done
1050 09:47:03.939016 scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
1051 09:47:03.945565 scan_bus: scanning of bus DOMAIN: 0000 took 604969 usecs
1052 09:47:03.949040 scan_static_bus for Root Device done
1053 09:47:03.955454 scan_bus: scanning of bus Root Device took 624850 usecs
1054 09:47:03.955541 done
1055 09:47:03.958750 Chrome EC: UHEPI supported
1056 09:47:03.965227 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 09:47:03.971899 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 09:47:03.978353 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 09:47:03.984866 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 09:47:03.987881 SPI flash protection: WPSW=0 SRP0=0
1061 09:47:03.991484 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 09:47:03.997724 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1063 09:47:04.001451 found VGA at PCI: 00:02.0
1064 09:47:04.004420 Setting up VGA for PCI: 00:02.0
1065 09:47:04.007684 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 09:47:04.014100 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 09:47:04.017549 Allocating resources...
1068 09:47:04.017633 Reading resources...
1069 09:47:04.024105 Root Device read_resources bus 0 link: 0
1070 09:47:04.027410 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 09:47:04.033976 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 09:47:04.037043 DOMAIN: 0000 read_resources bus 0 link: 0
1073 09:47:04.043849 PCI: 00:14.0 read_resources bus 0 link: 0
1074 09:47:04.046998 USB0 port 0 read_resources bus 0 link: 0
1075 09:47:04.055307 USB0 port 0 read_resources bus 0 link: 0 done
1076 09:47:04.058738 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 09:47:04.065899 PCI: 00:15.0 read_resources bus 1 link: 0
1078 09:47:04.069192 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 09:47:04.075666 PCI: 00:15.1 read_resources bus 2 link: 0
1080 09:47:04.079308 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 09:47:04.086510 PCI: 00:19.0 read_resources bus 3 link: 0
1082 09:47:04.093081 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 09:47:04.096445 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 09:47:04.103167 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 09:47:04.106450 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 09:47:04.112870 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 09:47:04.116176 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 09:47:04.122746 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 09:47:04.125820 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 09:47:04.132424 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 09:47:04.139004 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 09:47:04.142236 Root Device read_resources bus 0 link: 0 done
1093 09:47:04.145600 Done reading resources.
1094 09:47:04.152176 Show resources in subtree (Root Device)...After reading.
1095 09:47:04.155606 Root Device child on link 0 CPU_CLUSTER: 0
1096 09:47:04.158810 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 09:47:04.162027 APIC: 00
1098 09:47:04.162136 APIC: 02
1099 09:47:04.162240 APIC: 01
1100 09:47:04.165235 APIC: 03
1101 09:47:04.165319 APIC: 05
1102 09:47:04.168429 APIC: 04
1103 09:47:04.168513 APIC: 06
1104 09:47:04.168579 APIC: 07
1105 09:47:04.218103 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 09:47:04.218436 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 09:47:04.218514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 09:47:04.218579 PCI: 00:00.0
1109 09:47:04.219030 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 09:47:04.219318 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 09:47:04.267834 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 09:47:04.268449 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 09:47:04.268720 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 09:47:04.268984 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 09:47:04.269246 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 09:47:04.309132 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 09:47:04.309604 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 09:47:04.309884 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 09:47:04.310465 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 09:47:04.313643 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 09:47:04.316966 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 09:47:04.326690 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 09:47:04.336472 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 09:47:04.346634 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 09:47:04.346721 PCI: 00:02.0
1126 09:47:04.356176 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 09:47:04.365871 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 09:47:04.375769 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 09:47:04.375855 PCI: 00:04.0
1130 09:47:04.379214 PCI: 00:08.0
1131 09:47:04.388808 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 09:47:04.388895 PCI: 00:12.0
1133 09:47:04.398705 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 09:47:04.405259 PCI: 00:14.0 child on link 0 USB0 port 0
1135 09:47:04.414796 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 09:47:04.418193 USB0 port 0 child on link 0 USB2 port 0
1137 09:47:04.421717 USB2 port 0
1138 09:47:04.421802 USB2 port 1
1139 09:47:04.424922 USB2 port 2
1140 09:47:04.425006 USB2 port 3
1141 09:47:04.428338 USB2 port 5
1142 09:47:04.428422 USB2 port 6
1143 09:47:04.431220 USB2 port 9
1144 09:47:04.434843 USB3 port 0
1145 09:47:04.434934 USB3 port 1
1146 09:47:04.438057 USB3 port 2
1147 09:47:04.438140 USB3 port 3
1148 09:47:04.441065 USB3 port 4
1149 09:47:04.441149 PCI: 00:14.2
1150 09:47:04.451180 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 09:47:04.460800 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 09:47:04.464122 PCI: 00:14.3
1153 09:47:04.473881 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 09:47:04.477206 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 09:47:04.487213 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 09:47:04.490350 I2C: 01:15
1157 09:47:04.493540 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 09:47:04.503354 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 09:47:04.503439 I2C: 02:5d
1160 09:47:04.506725 GENERIC: 0.0
1161 09:47:04.506809 PCI: 00:16.0
1162 09:47:04.516336 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 09:47:04.519678 PCI: 00:17.0
1164 09:47:04.529308 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 09:47:04.539284 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 09:47:04.545739 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 09:47:04.555643 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 09:47:04.562220 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 09:47:04.571859 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 09:47:04.575077 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 09:47:04.585176 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 09:47:04.588175 I2C: 03:1a
1173 09:47:04.588259 I2C: 03:38
1174 09:47:04.591495 I2C: 03:39
1175 09:47:04.591580 I2C: 03:3a
1176 09:47:04.594997 I2C: 03:3b
1177 09:47:04.598022 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 09:47:04.607833 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 09:47:04.617961 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 09:47:04.624441 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 09:47:04.627478 PCI: 01:00.0
1182 09:47:04.637343 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 09:47:04.640439 PCI: 00:1e.0
1184 09:47:04.650258 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 09:47:04.660215 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 09:47:04.663680 PCI: 00:1e.2 child on link 0 SPI: 00
1187 09:47:04.673295 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 09:47:04.676326 SPI: 00
1189 09:47:04.679718 PCI: 00:1e.3 child on link 0 SPI: 01
1190 09:47:04.689609 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 09:47:04.689695 SPI: 01
1192 09:47:04.696299 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 09:47:04.702532 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 09:47:04.712582 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 09:47:04.715845 PNP: 0c09.0
1196 09:47:04.722307 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 09:47:04.725541 PCI: 00:1f.3
1198 09:47:04.735363 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 09:47:04.745236 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 09:47:04.745327 PCI: 00:1f.4
1201 09:47:04.755341 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 09:47:04.764785 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 09:47:04.767912 PCI: 00:1f.5
1204 09:47:04.774880 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 09:47:04.781063 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 09:47:04.787490 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 09:47:04.794209 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 09:47:04.797613 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 09:47:04.801072 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 09:47:04.807280 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 09:47:04.810592 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 09:47:04.817411 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 09:47:04.823923 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 09:47:04.830529 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 09:47:04.840013 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 09:47:04.846443 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 09:47:04.850064 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 09:47:04.859832 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 09:47:04.863144 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 09:47:04.866433 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 09:47:04.872905 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 09:47:04.876080 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 09:47:04.882750 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 09:47:04.885992 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 09:47:04.892412 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 09:47:04.895826 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 09:47:04.901921 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 09:47:04.905292 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 09:47:04.911963 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 09:47:04.915267 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 09:47:04.921574 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 09:47:04.925069 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 09:47:04.931746 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 09:47:04.934822 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 09:47:04.941163 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 09:47:04.944573 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 09:47:04.951089 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 09:47:04.954461 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 09:47:04.960842 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 09:47:04.964304 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 09:47:04.970485 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 09:47:04.977201 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 09:47:04.980447 avoid_fixed_resources: DOMAIN: 0000
1244 09:47:04.987015 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 09:47:04.993798 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 09:47:05.000328 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 09:47:05.009908 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 09:47:05.016555 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 09:47:05.022876 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 09:47:05.032682 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 09:47:05.038955 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 09:47:05.045779 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 09:47:05.055331 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 09:47:05.061922 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 09:47:05.068752 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 09:47:05.071772 Setting resources...
1257 09:47:05.078241 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 09:47:05.081722 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 09:47:05.085014 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 09:47:05.088359 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 09:47:05.094715 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 09:47:05.101461 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 09:47:05.107803 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 09:47:05.111180 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 09:47:05.120686 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 09:47:05.123963 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 09:47:05.130612 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 09:47:05.133900 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 09:47:05.140538 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 09:47:05.143640 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 09:47:05.150170 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 09:47:05.153378 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 09:47:05.159897 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 09:47:05.163421 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 09:47:05.169844 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 09:47:05.173335 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 09:47:05.179795 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 09:47:05.182777 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 09:47:05.189729 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 09:47:05.192803 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 09:47:05.199255 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 09:47:05.202607 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 09:47:05.209229 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 09:47:05.212341 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 09:47:05.218773 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 09:47:05.222243 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 09:47:05.228794 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 09:47:05.231879 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 09:47:05.238359 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 09:47:05.248214 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 09:47:05.255040 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 09:47:05.261289 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 09:47:05.267929 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 09:47:05.274317 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 09:47:05.277892 Root Device assign_resources, bus 0 link: 0
1296 09:47:05.284126 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 09:47:05.290828 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 09:47:05.300406 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 09:47:05.307303 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 09:47:05.317047 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 09:47:05.323422 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 09:47:05.333190 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 09:47:05.336362 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 09:47:05.343224 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 09:47:05.349388 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 09:47:05.359217 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 09:47:05.365716 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 09:47:05.375723 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 09:47:05.378790 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 09:47:05.385336 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 09:47:05.391903 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 09:47:05.398666 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 09:47:05.401732 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 09:47:05.411368 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 09:47:05.417885 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 09:47:05.424431 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 09:47:05.434539 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 09:47:05.440855 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 09:47:05.450736 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 09:47:05.457264 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 09:47:05.463921 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 09:47:05.470284 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 09:47:05.473812 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 09:47:05.483696 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 09:47:05.493498 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 09:47:05.499934 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 09:47:05.506703 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 09:47:05.512927 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 09:47:05.519498 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 09:47:05.525980 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 09:47:05.535561 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 09:47:05.538854 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 09:47:05.545312 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 09:47:05.551870 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 09:47:05.555369 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 09:47:05.561787 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 09:47:05.564956 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 09:47:05.572074 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 09:47:05.575033 LPC: Trying to open IO window from 800 size 1ff
1340 09:47:05.584947 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 09:47:05.591327 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 09:47:05.601454 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 09:47:05.607736 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 09:47:05.614301 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 09:47:05.617704 Root Device assign_resources, bus 0 link: 0
1346 09:47:05.620951 Done setting resources.
1347 09:47:05.627362 Show resources in subtree (Root Device)...After assigning values.
1348 09:47:05.630695 Root Device child on link 0 CPU_CLUSTER: 0
1349 09:47:05.637237 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 09:47:05.637323 APIC: 00
1351 09:47:05.637391 APIC: 02
1352 09:47:05.640465 APIC: 01
1353 09:47:05.640551 APIC: 03
1354 09:47:05.643890 APIC: 05
1355 09:47:05.643975 APIC: 04
1356 09:47:05.644076 APIC: 06
1357 09:47:05.647159 APIC: 07
1358 09:47:05.650235 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 09:47:05.660133 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 09:47:05.669698 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 09:47:05.673046 PCI: 00:00.0
1362 09:47:05.683030 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 09:47:05.692597 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 09:47:05.702553 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 09:47:05.709165 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 09:47:05.718874 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 09:47:05.728748 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 09:47:05.738473 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 09:47:05.748496 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 09:47:05.758229 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 09:47:05.764823 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 09:47:05.774505 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 09:47:05.784362 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 09:47:05.794155 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 09:47:05.803913 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 09:47:05.813933 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 09:47:05.823663 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 09:47:05.823754 PCI: 00:02.0
1379 09:47:05.836722 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 09:47:05.846344 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 09:47:05.856235 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 09:47:05.856327 PCI: 00:04.0
1383 09:47:05.859328 PCI: 00:08.0
1384 09:47:05.869256 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 09:47:05.869346 PCI: 00:12.0
1386 09:47:05.879236 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 09:47:05.885880 PCI: 00:14.0 child on link 0 USB0 port 0
1388 09:47:05.895441 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 09:47:05.898837 USB0 port 0 child on link 0 USB2 port 0
1390 09:47:05.901918 USB2 port 0
1391 09:47:05.902005 USB2 port 1
1392 09:47:05.905263 USB2 port 2
1393 09:47:05.905350 USB2 port 3
1394 09:47:05.908585 USB2 port 5
1395 09:47:05.911708 USB2 port 6
1396 09:47:05.911793 USB2 port 9
1397 09:47:05.914913 USB3 port 0
1398 09:47:05.914995 USB3 port 1
1399 09:47:05.918557 USB3 port 2
1400 09:47:05.918643 USB3 port 3
1401 09:47:05.921895 USB3 port 4
1402 09:47:05.921981 PCI: 00:14.2
1403 09:47:05.931594 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 09:47:05.944406 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 09:47:05.944523 PCI: 00:14.3
1406 09:47:05.954329 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 09:47:05.960751 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 09:47:05.970782 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 09:47:05.970876 I2C: 01:15
1410 09:47:05.973712 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 09:47:05.986837 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 09:47:05.986964 I2C: 02:5d
1413 09:47:05.990121 GENERIC: 0.0
1414 09:47:05.990216 PCI: 00:16.0
1415 09:47:06.000086 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 09:47:06.003353 PCI: 00:17.0
1417 09:47:06.013451 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 09:47:06.023176 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 09:47:06.032955 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 09:47:06.042516 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 09:47:06.049179 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 09:47:06.059306 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 09:47:06.065652 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 09:47:06.075534 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 09:47:06.075621 I2C: 03:1a
1426 09:47:06.079114 I2C: 03:38
1427 09:47:06.079200 I2C: 03:39
1428 09:47:06.081978 I2C: 03:3a
1429 09:47:06.082063 I2C: 03:3b
1430 09:47:06.088518 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 09:47:06.095175 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 09:47:06.108067 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 09:47:06.117986 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 09:47:06.118073 PCI: 01:00.0
1435 09:47:06.130918 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 09:47:06.131018 PCI: 00:1e.0
1437 09:47:06.140707 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 09:47:06.153860 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 09:47:06.157193 PCI: 00:1e.2 child on link 0 SPI: 00
1440 09:47:06.167074 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 09:47:06.167161 SPI: 00
1442 09:47:06.173567 PCI: 00:1e.3 child on link 0 SPI: 01
1443 09:47:06.183331 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 09:47:06.183418 SPI: 01
1445 09:47:06.186525 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 09:47:06.196628 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 09:47:06.206165 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 09:47:06.206251 PNP: 0c09.0
1449 09:47:06.215953 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 09:47:06.216039 PCI: 00:1f.3
1451 09:47:06.229166 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 09:47:06.238873 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 09:47:06.239026 PCI: 00:1f.4
1454 09:47:06.248766 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 09:47:06.258867 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 09:47:06.261934 PCI: 00:1f.5
1457 09:47:06.271508 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 09:47:06.274923 Done allocating resources.
1459 09:47:06.278142 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 09:47:06.281542 Enabling resources...
1461 09:47:06.288126 PCI: 00:00.0 subsystem <- 8086/9b61
1462 09:47:06.288217 PCI: 00:00.0 cmd <- 06
1463 09:47:06.291263 PCI: 00:02.0 subsystem <- 8086/9b41
1464 09:47:06.294455 PCI: 00:02.0 cmd <- 03
1465 09:47:06.298141 PCI: 00:08.0 cmd <- 06
1466 09:47:06.301187 PCI: 00:12.0 subsystem <- 8086/02f9
1467 09:47:06.304375 PCI: 00:12.0 cmd <- 02
1468 09:47:06.307972 PCI: 00:14.0 subsystem <- 8086/02ed
1469 09:47:06.310869 PCI: 00:14.0 cmd <- 02
1470 09:47:06.314192 PCI: 00:14.2 cmd <- 02
1471 09:47:06.317606 PCI: 00:14.3 subsystem <- 8086/02f0
1472 09:47:06.321048 PCI: 00:14.3 cmd <- 02
1473 09:47:06.324160 PCI: 00:15.0 subsystem <- 8086/02e8
1474 09:47:06.327480 PCI: 00:15.0 cmd <- 02
1475 09:47:06.330521 PCI: 00:15.1 subsystem <- 8086/02e9
1476 09:47:06.330607 PCI: 00:15.1 cmd <- 02
1477 09:47:06.337292 PCI: 00:16.0 subsystem <- 8086/02e0
1478 09:47:06.337378 PCI: 00:16.0 cmd <- 02
1479 09:47:06.343722 PCI: 00:17.0 subsystem <- 8086/02d3
1480 09:47:06.343808 PCI: 00:17.0 cmd <- 03
1481 09:47:06.346888 PCI: 00:19.0 subsystem <- 8086/02c5
1482 09:47:06.350358 PCI: 00:19.0 cmd <- 02
1483 09:47:06.353480 PCI: 00:1d.0 bridge ctrl <- 0013
1484 09:47:06.356882 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 09:47:06.359941 PCI: 00:1d.0 cmd <- 06
1486 09:47:06.363202 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 09:47:06.366573 PCI: 00:1e.0 cmd <- 06
1488 09:47:06.369940 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 09:47:06.373015 PCI: 00:1e.2 cmd <- 06
1490 09:47:06.376057 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 09:47:06.379515 PCI: 00:1e.3 cmd <- 02
1492 09:47:06.382917 PCI: 00:1f.0 subsystem <- 8086/0284
1493 09:47:06.386051 PCI: 00:1f.0 cmd <- 407
1494 09:47:06.389336 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 09:47:06.392411 PCI: 00:1f.3 cmd <- 02
1496 09:47:06.395745 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 09:47:06.399287 PCI: 00:1f.4 cmd <- 03
1498 09:47:06.402149 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 09:47:06.405433 PCI: 00:1f.5 cmd <- 406
1500 09:47:06.413198 PCI: 01:00.0 cmd <- 02
1501 09:47:06.418578 done.
1502 09:47:06.428609 ME: Version: 14.0.39.1367
1503 09:47:06.435247 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1504 09:47:06.438589 Initializing devices...
1505 09:47:06.438695 Root Device init ...
1506 09:47:06.445069 Chrome EC: Set SMI mask to 0x0000000000000000
1507 09:47:06.448311 Chrome EC: clear events_b mask to 0x0000000000000000
1508 09:47:06.455068 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 09:47:06.461448 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 09:47:06.468243 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 09:47:06.471493 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 09:47:06.478379 Root Device init finished in 35178 usecs
1513 09:47:06.478558 CPU_CLUSTER: 0 init ...
1514 09:47:06.484252 CPU_CLUSTER: 0 init finished in 2450 usecs
1515 09:47:06.489433 PCI: 00:00.0 init ...
1516 09:47:06.492825 CPU TDP: 15 Watts
1517 09:47:06.496069 CPU PL2 = 64 Watts
1518 09:47:06.499344 PCI: 00:00.0 init finished in 7084 usecs
1519 09:47:06.502567 PCI: 00:02.0 init ...
1520 09:47:06.505772 PCI: 00:02.0 init finished in 2254 usecs
1521 09:47:06.509277 PCI: 00:08.0 init ...
1522 09:47:06.512395 PCI: 00:08.0 init finished in 2255 usecs
1523 09:47:06.515783 PCI: 00:12.0 init ...
1524 09:47:06.518853 PCI: 00:12.0 init finished in 2253 usecs
1525 09:47:06.522671 PCI: 00:14.0 init ...
1526 09:47:06.525541 PCI: 00:14.0 init finished in 2245 usecs
1527 09:47:06.529302 PCI: 00:14.2 init ...
1528 09:47:06.532406 PCI: 00:14.2 init finished in 2255 usecs
1529 09:47:06.535571 PCI: 00:14.3 init ...
1530 09:47:06.539028 PCI: 00:14.3 init finished in 2271 usecs
1531 09:47:06.542301 PCI: 00:15.0 init ...
1532 09:47:06.545319 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 09:47:06.551840 PCI: 00:15.0 init finished in 5982 usecs
1534 09:47:06.552237 PCI: 00:15.1 init ...
1535 09:47:06.555104 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 09:47:06.561981 PCI: 00:15.1 init finished in 5981 usecs
1537 09:47:06.565135 PCI: 00:16.0 init ...
1538 09:47:06.568156 PCI: 00:16.0 init finished in 2246 usecs
1539 09:47:06.571744 PCI: 00:19.0 init ...
1540 09:47:06.575111 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 09:47:06.578251 PCI: 00:19.0 init finished in 5981 usecs
1542 09:47:06.581376 PCI: 00:1d.0 init ...
1543 09:47:06.584575 Initializing PCH PCIe bridge.
1544 09:47:06.587612 PCI: 00:1d.0 init finished in 5289 usecs
1545 09:47:06.591341 PCI: 00:1f.0 init ...
1546 09:47:06.594831 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 09:47:06.601472 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 09:47:06.602043 IOAPIC: ID = 0x02
1549 09:47:06.604645 IOAPIC: Dumping registers
1550 09:47:06.607770 reg 0x0000: 0x02000000
1551 09:47:06.611289 reg 0x0001: 0x00770020
1552 09:47:06.614445 reg 0x0002: 0x00000000
1553 09:47:06.617850 PCI: 00:1f.0 init finished in 23557 usecs
1554 09:47:06.621393 PCI: 00:1f.4 init ...
1555 09:47:06.624511 PCI: 00:1f.4 init finished in 2263 usecs
1556 09:47:06.636305 PCI: 01:00.0 init ...
1557 09:47:06.639395 PCI: 01:00.0 init finished in 2253 usecs
1558 09:47:06.643642 PNP: 0c09.0 init ...
1559 09:47:06.649762 Google Chrome EC uptime: 11.158 seconds
1560 09:47:06.653466 Google Chrome AP resets since EC boot: 0
1561 09:47:06.656377 Google Chrome most recent AP reset causes:
1562 09:47:06.662974 Google Chrome EC reset flags at last EC boot: reset-pin
1563 09:47:06.666168 PNP: 0c09.0 init finished in 20585 usecs
1564 09:47:06.669518 Devices initialized
1565 09:47:06.672687 Show all devs... After init.
1566 09:47:06.673128 Root Device: enabled 1
1567 09:47:06.675901 CPU_CLUSTER: 0: enabled 1
1568 09:47:06.679853 DOMAIN: 0000: enabled 1
1569 09:47:06.682863 APIC: 00: enabled 1
1570 09:47:06.683441 PCI: 00:00.0: enabled 1
1571 09:47:06.685724 PCI: 00:02.0: enabled 1
1572 09:47:06.688978 PCI: 00:04.0: enabled 0
1573 09:47:06.692447 PCI: 00:05.0: enabled 0
1574 09:47:06.692914 PCI: 00:12.0: enabled 1
1575 09:47:06.695716 PCI: 00:12.5: enabled 0
1576 09:47:06.698646 PCI: 00:12.6: enabled 0
1577 09:47:06.701857 PCI: 00:14.0: enabled 1
1578 09:47:06.702262 PCI: 00:14.1: enabled 0
1579 09:47:06.705592 PCI: 00:14.3: enabled 1
1580 09:47:06.708706 PCI: 00:14.5: enabled 0
1581 09:47:06.711915 PCI: 00:15.0: enabled 1
1582 09:47:06.712364 PCI: 00:15.1: enabled 1
1583 09:47:06.715136 PCI: 00:15.2: enabled 0
1584 09:47:06.718509 PCI: 00:15.3: enabled 0
1585 09:47:06.718946 PCI: 00:16.0: enabled 1
1586 09:47:06.721970 PCI: 00:16.1: enabled 0
1587 09:47:06.724726 PCI: 00:16.2: enabled 0
1588 09:47:06.728019 PCI: 00:16.3: enabled 0
1589 09:47:06.728424 PCI: 00:16.4: enabled 0
1590 09:47:06.731499 PCI: 00:16.5: enabled 0
1591 09:47:06.735064 PCI: 00:17.0: enabled 1
1592 09:47:06.738164 PCI: 00:19.0: enabled 1
1593 09:47:06.738673 PCI: 00:19.1: enabled 0
1594 09:47:06.741551 PCI: 00:19.2: enabled 0
1595 09:47:06.744536 PCI: 00:1a.0: enabled 0
1596 09:47:06.747816 PCI: 00:1c.0: enabled 0
1597 09:47:06.748367 PCI: 00:1c.1: enabled 0
1598 09:47:06.751117 PCI: 00:1c.2: enabled 0
1599 09:47:06.754558 PCI: 00:1c.3: enabled 0
1600 09:47:06.757788 PCI: 00:1c.4: enabled 0
1601 09:47:06.758342 PCI: 00:1c.5: enabled 0
1602 09:47:06.760892 PCI: 00:1c.6: enabled 0
1603 09:47:06.764177 PCI: 00:1c.7: enabled 0
1604 09:47:06.767665 PCI: 00:1d.0: enabled 1
1605 09:47:06.768205 PCI: 00:1d.1: enabled 0
1606 09:47:06.770786 PCI: 00:1d.2: enabled 0
1607 09:47:06.774146 PCI: 00:1d.3: enabled 0
1608 09:47:06.777195 PCI: 00:1d.4: enabled 0
1609 09:47:06.777638 PCI: 00:1d.5: enabled 0
1610 09:47:06.780457 PCI: 00:1e.0: enabled 1
1611 09:47:06.783612 PCI: 00:1e.1: enabled 0
1612 09:47:06.786995 PCI: 00:1e.2: enabled 1
1613 09:47:06.787556 PCI: 00:1e.3: enabled 1
1614 09:47:06.789842 PCI: 00:1f.0: enabled 1
1615 09:47:06.793286 PCI: 00:1f.1: enabled 0
1616 09:47:06.796425 PCI: 00:1f.2: enabled 0
1617 09:47:06.796865 PCI: 00:1f.3: enabled 1
1618 09:47:06.799745 PCI: 00:1f.4: enabled 1
1619 09:47:06.802968 PCI: 00:1f.5: enabled 1
1620 09:47:06.806528 PCI: 00:1f.6: enabled 0
1621 09:47:06.807105 USB0 port 0: enabled 1
1622 09:47:06.809440 I2C: 01:15: enabled 1
1623 09:47:06.812726 I2C: 02:5d: enabled 1
1624 09:47:06.813143 GENERIC: 0.0: enabled 1
1625 09:47:06.815971 I2C: 03:1a: enabled 1
1626 09:47:06.819559 I2C: 03:38: enabled 1
1627 09:47:06.823060 I2C: 03:39: enabled 1
1628 09:47:06.823631 I2C: 03:3a: enabled 1
1629 09:47:06.826073 I2C: 03:3b: enabled 1
1630 09:47:06.829615 PCI: 00:00.0: enabled 1
1631 09:47:06.830151 SPI: 00: enabled 1
1632 09:47:06.832555 SPI: 01: enabled 1
1633 09:47:06.835827 PNP: 0c09.0: enabled 1
1634 09:47:06.836360 USB2 port 0: enabled 1
1635 09:47:06.839435 USB2 port 1: enabled 1
1636 09:47:06.842677 USB2 port 2: enabled 0
1637 09:47:06.843233 USB2 port 3: enabled 0
1638 09:47:06.845845 USB2 port 5: enabled 0
1639 09:47:06.848536 USB2 port 6: enabled 1
1640 09:47:06.852143 USB2 port 9: enabled 1
1641 09:47:06.852579 USB3 port 0: enabled 1
1642 09:47:06.855538 USB3 port 1: enabled 1
1643 09:47:06.858929 USB3 port 2: enabled 1
1644 09:47:06.859466 USB3 port 3: enabled 1
1645 09:47:06.861627 USB3 port 4: enabled 0
1646 09:47:06.865099 APIC: 02: enabled 1
1647 09:47:06.865528 APIC: 01: enabled 1
1648 09:47:06.868506 APIC: 03: enabled 1
1649 09:47:06.871818 APIC: 05: enabled 1
1650 09:47:06.872353 APIC: 04: enabled 1
1651 09:47:06.874936 APIC: 06: enabled 1
1652 09:47:06.877977 APIC: 07: enabled 1
1653 09:47:06.878408 PCI: 00:08.0: enabled 1
1654 09:47:06.881323 PCI: 00:14.2: enabled 1
1655 09:47:06.884942 PCI: 01:00.0: enabled 1
1656 09:47:06.887960 Disabling ACPI via APMC:
1657 09:47:06.891030 done.
1658 09:47:06.894328 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 09:47:06.897570 ELOG: NV offset 0xaf0000 size 0x4000
1660 09:47:06.904952 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 09:47:06.912083 ELOG: Event(17) added with size 13 at 2022-08-12 09:47:03 UTC
1662 09:47:06.918197 POST: Unexpected post code in previous boot: 0x73
1663 09:47:06.924701 ELOG: Event(A3) added with size 11 at 2022-08-12 09:47:03 UTC
1664 09:47:06.931546 ELOG: Event(92) added with size 9 at 2022-08-12 09:47:03 UTC
1665 09:47:06.937985 ELOG: Event(93) added with size 9 at 2022-08-12 09:47:03 UTC
1666 09:47:06.944669 ELOG: Event(9A) added with size 9 at 2022-08-12 09:47:03 UTC
1667 09:47:06.950696 ELOG: Event(9E) added with size 10 at 2022-08-12 09:47:03 UTC
1668 09:47:06.957815 ELOG: Event(9F) added with size 14 at 2022-08-12 09:47:04 UTC
1669 09:47:06.963763 ELOG: Event(16) added with size 11 at 2022-08-12 09:47:04 UTC
1670 09:47:06.967586 Erasing flash addr af0000 + 4 KiB
1671 09:47:07.032550 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 59
1672 09:47:07.038980 ELOG: Event(A1) added with size 10 at 2022-08-12 09:47:04 UTC
1673 09:47:07.048348 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1674 09:47:07.055050 ELOG: Event(A0) added with size 9 at 2022-08-12 09:47:04 UTC
1675 09:47:07.058556 elog_add_boot_reason: Logged dev mode boot
1676 09:47:07.059135 Finalize devices...
1677 09:47:07.061505 PCI: 00:17.0 final
1678 09:47:07.064818 Devices finalized
1679 09:47:07.067957 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1680 09:47:07.074871 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1681 09:47:07.077944 ME: HFSTS1 : 0x90000245
1682 09:47:07.081162 ME: HFSTS2 : 0x3B850126
1683 09:47:07.087455 ME: HFSTS3 : 0x00000020
1684 09:47:07.090858 ME: HFSTS4 : 0x00004800
1685 09:47:07.094284 ME: HFSTS5 : 0x00000000
1686 09:47:07.097382 ME: HFSTS6 : 0x40400006
1687 09:47:07.100805 ME: Manufacturing Mode : NO
1688 09:47:07.103977 ME: FW Partition Table : OK
1689 09:47:07.107141 ME: Bringup Loader Failure : NO
1690 09:47:07.113650 ME: Firmware Init Complete : YES
1691 09:47:07.117243 ME: Boot Options Present : NO
1692 09:47:07.120240 ME: Update In Progress : NO
1693 09:47:07.123503 ME: D0i3 Support : YES
1694 09:47:07.126605 ME: Low Power State Enabled : NO
1695 09:47:07.130248 ME: CPU Replaced : NO
1696 09:47:07.133477 ME: CPU Replacement Valid : YES
1697 09:47:07.136869 ME: Current Working State : 5
1698 09:47:07.140106 ME: Current Operation State : 1
1699 09:47:07.142844 ME: Current Operation Mode : 0
1700 09:47:07.146351 ME: Error Code : 0
1701 09:47:07.149289 ME: CPU Debug Disabled : YES
1702 09:47:07.152609 ME: TXT Support : NO
1703 09:47:07.156163 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1704 09:47:07.162718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 09:47:07.165977 CBFS @ c08000 size 3f8000
1706 09:47:07.172625 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 09:47:07.176021 CBFS: Locating 'fallback/dsdt.aml'
1708 09:47:07.178931 CBFS: Found @ offset 10bb80 size 3fa5
1709 09:47:07.182273 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1710 09:47:07.185333 CBFS @ c08000 size 3f8000
1711 09:47:07.191820 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1712 09:47:07.195092 CBFS: Locating 'fallback/slic'
1713 09:47:07.202128 CBFS: 'fallback/slic' not found.
1714 09:47:07.205644 ACPI: Writing ACPI tables at 99b3e000.
1715 09:47:07.206084 ACPI: * FACS
1716 09:47:07.208827 ACPI: * DSDT
1717 09:47:07.212171 Ramoops buffer: 0x100000@0x99a3d000.
1718 09:47:07.215064 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1719 09:47:07.221794 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1720 09:47:07.225045 Google Chrome EC: version:
1721 09:47:07.228593 ro: helios_v2.0.2659-56403530b
1722 09:47:07.231567 rw: helios_v2.0.2849-c41de27e7d
1723 09:47:07.232002 running image: 1
1724 09:47:07.236556 ACPI: * FADT
1725 09:47:07.237110 SCI is IRQ9
1726 09:47:07.242875 ACPI: added table 1/32, length now 40
1727 09:47:07.243445 ACPI: * SSDT
1728 09:47:07.246127 Found 1 CPU(s) with 8 core(s) each.
1729 09:47:07.252661 Error: Could not locate 'wifi_sar' in VPD.
1730 09:47:07.256170 Checking CBFS for default SAR values
1731 09:47:07.259332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1732 09:47:07.262538 CBFS @ c08000 size 3f8000
1733 09:47:07.268874 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1734 09:47:07.271957 CBFS: Locating 'wifi_sar_defaults.hex'
1735 09:47:07.275729 CBFS: Found @ offset 5fac0 size 77
1736 09:47:07.278646 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1737 09:47:07.285188 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1738 09:47:07.288552 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1739 09:47:07.294838 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1740 09:47:07.298113 failed to find key in VPD: dsm_calib_r0_0
1741 09:47:07.307922 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1742 09:47:07.314490 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1743 09:47:07.317829 failed to find key in VPD: dsm_calib_r0_1
1744 09:47:07.324703 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1745 09:47:07.330997 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1746 09:47:07.334319 failed to find key in VPD: dsm_calib_r0_2
1747 09:47:07.344458 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1748 09:47:07.350606 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1749 09:47:07.353849 failed to find key in VPD: dsm_calib_r0_3
1750 09:47:07.363394 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1751 09:47:07.366934 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1752 09:47:07.373703 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1753 09:47:07.376786 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1754 09:47:07.380277 EC returned error result code 1
1755 09:47:07.383569 EC returned error result code 1
1756 09:47:07.386804 EC returned error result code 1
1757 09:47:07.393204 PS2K: Bad resp from EC. Vivaldi disabled!
1758 09:47:07.399693 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1759 09:47:07.403094 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1760 09:47:07.409603 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1761 09:47:07.412752 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1762 09:47:07.419261 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1763 09:47:07.425735 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1764 09:47:07.432382 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1765 09:47:07.438946 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1766 09:47:07.442106 ACPI: added table 2/32, length now 44
1767 09:47:07.442553 ACPI: * MCFG
1768 09:47:07.445325 ACPI: added table 3/32, length now 48
1769 09:47:07.448630 ACPI: * TPM2
1770 09:47:07.451947 TPM2 log created at 99a2d000
1771 09:47:07.455179 ACPI: added table 4/32, length now 52
1772 09:47:07.458576 ACPI: * MADT
1773 09:47:07.459077 SCI is IRQ9
1774 09:47:07.461679 ACPI: added table 5/32, length now 56
1775 09:47:07.464666 current = 99b43ac0
1776 09:47:07.464982 ACPI: * DMAR
1777 09:47:07.467896 ACPI: added table 6/32, length now 60
1778 09:47:07.471229 ACPI: * IGD OpRegion
1779 09:47:07.474506 GMA: Found VBT in CBFS
1780 09:47:07.477542 GMA: Found valid VBT in CBFS
1781 09:47:07.481105 ACPI: added table 7/32, length now 64
1782 09:47:07.481287 ACPI: * HPET
1783 09:47:07.487391 ACPI: added table 8/32, length now 68
1784 09:47:07.487531 ACPI: done.
1785 09:47:07.490668 ACPI tables: 31744 bytes.
1786 09:47:07.494014 smbios_write_tables: 99a2c000
1787 09:47:07.497246 EC returned error result code 3
1788 09:47:07.500281 Couldn't obtain OEM name from CBI
1789 09:47:07.503569 Create SMBIOS type 17
1790 09:47:07.507176 PCI: 00:00.0 (Intel Cannonlake)
1791 09:47:07.510071 PCI: 00:14.3 (Intel WiFi)
1792 09:47:07.510158 SMBIOS tables: 939 bytes.
1793 09:47:07.516857 Writing table forward entry at 0x00000500
1794 09:47:07.520063 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1795 09:47:07.526568 Writing coreboot table at 0x99b62000
1796 09:47:07.529700 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1797 09:47:07.536249 1. 0000000000001000-000000000009ffff: RAM
1798 09:47:07.539369 2. 00000000000a0000-00000000000fffff: RESERVED
1799 09:47:07.546200 3. 0000000000100000-0000000099a2bfff: RAM
1800 09:47:07.549438 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1801 09:47:07.555968 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1802 09:47:07.562377 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1803 09:47:07.565884 7. 000000009a000000-000000009f7fffff: RESERVED
1804 09:47:07.569336 8. 00000000e0000000-00000000efffffff: RESERVED
1805 09:47:07.575881 9. 00000000fc000000-00000000fc000fff: RESERVED
1806 09:47:07.578968 10. 00000000fe000000-00000000fe00ffff: RESERVED
1807 09:47:07.585849 11. 00000000fed10000-00000000fed17fff: RESERVED
1808 09:47:07.588723 12. 00000000fed80000-00000000fed83fff: RESERVED
1809 09:47:07.595111 13. 00000000fed90000-00000000fed91fff: RESERVED
1810 09:47:07.598624 14. 00000000feda0000-00000000feda1fff: RESERVED
1811 09:47:07.605160 15. 0000000100000000-000000045e7fffff: RAM
1812 09:47:07.608361 Graphics framebuffer located at 0xc0000000
1813 09:47:07.611388 Passing 5 GPIOs to payload:
1814 09:47:07.615140 NAME | PORT | POLARITY | VALUE
1815 09:47:07.621645 write protect | undefined | high | low
1816 09:47:07.628111 lid | undefined | high | high
1817 09:47:07.631248 power | undefined | high | low
1818 09:47:07.638197 oprom | undefined | high | low
1819 09:47:07.641268 EC in RW | 0x000000cb | high | low
1820 09:47:07.644754 Board ID: 4
1821 09:47:07.647625 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1822 09:47:07.650949 CBFS @ c08000 size 3f8000
1823 09:47:07.657931 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1824 09:47:07.664279 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d36
1825 09:47:07.667647 coreboot table: 1492 bytes.
1826 09:47:07.670953 IMD ROOT 0. 99fff000 00001000
1827 09:47:07.674488 IMD SMALL 1. 99ffe000 00001000
1828 09:47:07.677354 FSP MEMORY 2. 99c4e000 003b0000
1829 09:47:07.680742 CONSOLE 3. 99c2e000 00020000
1830 09:47:07.683742 FMAP 4. 99c2d000 0000054e
1831 09:47:07.687306 TIME STAMP 5. 99c2c000 00000910
1832 09:47:07.690427 VBOOT WORK 6. 99c18000 00014000
1833 09:47:07.693686 MRC DATA 7. 99c16000 00001958
1834 09:47:07.697084 ROMSTG STCK 8. 99c15000 00001000
1835 09:47:07.700118 AFTER CAR 9. 99c0b000 0000a000
1836 09:47:07.703682 RAMSTAGE 10. 99baf000 0005c000
1837 09:47:07.706848 REFCODE 11. 99b7a000 00035000
1838 09:47:07.710321 SMM BACKUP 12. 99b6a000 00010000
1839 09:47:07.713407 COREBOOT 13. 99b62000 00008000
1840 09:47:07.716570 ACPI 14. 99b3e000 00024000
1841 09:47:07.719923 ACPI GNVS 15. 99b3d000 00001000
1842 09:47:07.723306 RAMOOPS 16. 99a3d000 00100000
1843 09:47:07.726261 TPM2 TCGLOG17. 99a2d000 00010000
1844 09:47:07.730009 SMBIOS 18. 99a2c000 00000800
1845 09:47:07.732934 IMD small region:
1846 09:47:07.736158 IMD ROOT 0. 99ffec00 00000400
1847 09:47:07.739392 FSP RUNTIME 1. 99ffebe0 00000004
1848 09:47:07.742656 EC HOSTEVENT 2. 99ffebc0 00000008
1849 09:47:07.745853 POWER STATE 3. 99ffeb80 00000040
1850 09:47:07.749285 ROMSTAGE 4. 99ffeb60 00000004
1851 09:47:07.752399 MEM INFO 5. 99ffe9a0 000001b9
1852 09:47:07.756215 VPD 6. 99ffe940 0000004c
1853 09:47:07.759401 MTRR: Physical address space:
1854 09:47:07.766058 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1855 09:47:07.772404 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1856 09:47:07.779067 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1857 09:47:07.785367 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1858 09:47:07.791812 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1859 09:47:07.794832 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1860 09:47:07.801551 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1861 09:47:07.807954 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 09:47:07.811347 MTRR: Fixed MSR 0x258 0x0606060606060606
1863 09:47:07.814710 MTRR: Fixed MSR 0x259 0x0000000000000000
1864 09:47:07.818098 MTRR: Fixed MSR 0x268 0x0606060606060606
1865 09:47:07.824223 MTRR: Fixed MSR 0x269 0x0606060606060606
1866 09:47:07.827583 MTRR: Fixed MSR 0x26a 0x0606060606060606
1867 09:47:07.830952 MTRR: Fixed MSR 0x26b 0x0606060606060606
1868 09:47:07.834427 MTRR: Fixed MSR 0x26c 0x0606060606060606
1869 09:47:07.841027 MTRR: Fixed MSR 0x26d 0x0606060606060606
1870 09:47:07.844163 MTRR: Fixed MSR 0x26e 0x0606060606060606
1871 09:47:07.847104 MTRR: Fixed MSR 0x26f 0x0606060606060606
1872 09:47:07.850674 call enable_fixed_mtrr()
1873 09:47:07.853746 CPU physical address size: 39 bits
1874 09:47:07.860628 MTRR: default type WB/UC MTRR counts: 6/8.
1875 09:47:07.863576 MTRR: WB selected as default type.
1876 09:47:07.870194 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1877 09:47:07.873788 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1878 09:47:07.880099 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1879 09:47:07.886343 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1880 09:47:07.893158 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1881 09:47:07.899446 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1882 09:47:07.906015 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 09:47:07.909379 MTRR: Fixed MSR 0x258 0x0606060606060606
1884 09:47:07.912663 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 09:47:07.915874 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 09:47:07.922469 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 09:47:07.925471 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 09:47:07.928889 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 09:47:07.932220 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 09:47:07.938980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 09:47:07.942129 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 09:47:07.945373 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 09:47:07.945932
1894 09:47:07.948565 MTRR check
1895 09:47:07.951853 Fixed MTRRs : Enabled
1896 09:47:07.952308 Variable MTRRs: Enabled
1897 09:47:07.952647
1898 09:47:07.954932 call enable_fixed_mtrr()
1899 09:47:07.961690 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1900 09:47:07.964730 CPU physical address size: 39 bits
1901 09:47:07.968193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1902 09:47:07.974702 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 09:47:07.978096 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 09:47:07.981140 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 09:47:07.984250 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 09:47:07.990842 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 09:47:07.994179 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 09:47:07.997439 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 09:47:08.000469 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 09:47:08.007314 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 09:47:08.010326 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 09:47:08.013550 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 09:47:08.016968 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 09:47:08.023400 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 09:47:08.027050 call enable_fixed_mtrr()
1916 09:47:08.030001 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 09:47:08.033196 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 09:47:08.036521 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 09:47:08.043156 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 09:47:08.046615 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 09:47:08.049796 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 09:47:08.052799 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 09:47:08.059450 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 09:47:08.062754 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 09:47:08.066224 CPU physical address size: 39 bits
1926 09:47:08.069470 call enable_fixed_mtrr()
1927 09:47:08.072509 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 09:47:08.075785 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 09:47:08.082148 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 09:47:08.085442 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 09:47:08.088729 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 09:47:08.092140 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 09:47:08.098505 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 09:47:08.101742 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 09:47:08.105310 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 09:47:08.108372 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 09:47:08.115012 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 09:47:08.118208 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 09:47:08.121378 call enable_fixed_mtrr()
1940 09:47:08.124656 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 09:47:08.128580 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 09:47:08.134989 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 09:47:08.137711 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 09:47:08.141536 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 09:47:08.144371 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 09:47:08.151191 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 09:47:08.154619 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 09:47:08.157335 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 09:47:08.160854 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 09:47:08.164330 CPU physical address size: 39 bits
1951 09:47:08.167810 call enable_fixed_mtrr()
1952 09:47:08.171038 CBFS @ c08000 size 3f8000
1953 09:47:08.177754 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1954 09:47:08.181053 CPU physical address size: 39 bits
1955 09:47:08.183725 CBFS: Locating 'fallback/payload'
1956 09:47:08.187603 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 09:47:08.190684 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 09:47:08.197064 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 09:47:08.200237 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 09:47:08.203519 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 09:47:08.207053 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 09:47:08.213166 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 09:47:08.216842 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 09:47:08.220053 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 09:47:08.223223 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 09:47:08.229722 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 09:47:08.232891 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 09:47:08.236146 MTRR: Fixed MSR 0x258 0x0606060606060606
1969 09:47:08.239831 call enable_fixed_mtrr()
1970 09:47:08.242607 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 09:47:08.249235 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 09:47:08.252454 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 09:47:08.255838 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 09:47:08.259251 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 09:47:08.265548 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 09:47:08.269035 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 09:47:08.272110 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 09:47:08.275810 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 09:47:08.281992 CPU physical address size: 39 bits
1980 09:47:08.282529 call enable_fixed_mtrr()
1981 09:47:08.288510 CBFS: Found @ offset 1c96c0 size 3f798
1982 09:47:08.291992 CPU physical address size: 39 bits
1983 09:47:08.295013 Checking segment from ROM address 0xffdd16f8
1984 09:47:08.298073 CPU physical address size: 39 bits
1985 09:47:08.301450 Checking segment from ROM address 0xffdd1714
1986 09:47:08.307767 Loading segment from ROM address 0xffdd16f8
1987 09:47:08.311080 code (compression=0)
1988 09:47:08.317995 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1989 09:47:08.327500 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1990 09:47:08.327950 it's not compressed!
1991 09:47:08.421355 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1992 09:47:08.427343 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1993 09:47:08.434077 Loading segment from ROM address 0xffdd1714
1994 09:47:08.434523 Entry Point 0x30000000
1995 09:47:08.437361 Loaded segments
1996 09:47:08.443010 Finalizing chipset.
1997 09:47:08.446346 Finalizing SMM.
1998 09:47:08.449591 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1999 09:47:08.452768 mp_park_aps done after 0 msecs.
2000 09:47:08.459410 Jumping to boot code at 30000000(99b62000)
2001 09:47:08.466115 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2002 09:47:08.466567
2003 09:47:08.469149 Starting depthcharge on Helios...
2004 09:47:08.470218 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2005 09:47:08.470746 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2006 09:47:08.471212 Setting prompt string to ['hatch:']
2007 09:47:08.471650 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2008 09:47:08.478945 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2009 09:47:08.485515 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2010 09:47:08.491984 board_setup: Info: eMMC controller not present; skipping
2011 09:47:08.495069 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 09:47:08.501698 board_setup: Info: SDHCI controller not present; skipping
2013 09:47:08.508172 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2014 09:47:08.508286 Wipe memory regions:
2015 09:47:08.514808 [0x00000000001000, 0x000000000a0000)
2016 09:47:08.517875 [0x00000000100000, 0x00000030000000)
2017 09:47:08.582442 [0x00000030657430, 0x00000099a2c000)
2018 09:47:08.716109 [0x00000100000000, 0x0000045e800000)
2019 09:47:10.034716 R8152: Initializing
2020 09:47:10.037759 Version 9 (ocp_data = 6010)
2021 09:47:10.041968 R8152: Done initializing
2022 09:47:10.045708 Adding net device
2023 09:47:10.415077 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2024 09:47:10.415636
2025 09:47:10.416425 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2027 09:47:10.518092 hatch: tftpboot 192.168.201.1 7022964/tftp-deploy-ltboiod1/kernel/bzImage 7022964/tftp-deploy-ltboiod1/kernel/cmdline 7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
2028 09:47:10.518781 Setting prompt string to 'Starting kernel'
2029 09:47:10.519193 Setting prompt string to ['Starting kernel']
2030 09:47:10.519542 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2031 09:47:10.519904 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
2032 09:47:10.523593 tftpboot 192.168.201.1 7022964/tftp-deploy-ltboiod1/kernel/bzImoy-ltboiod1/kernel/cmdline 7022964/tftp-deploy-ltboiod1/ramdisk/ramdisk.cpio.gz
2033 09:47:10.524047 Waiting for link
2034 09:47:10.724415 done.
2035 09:47:10.725010 MAC: f4:f5:e8:50:e7:f3
2036 09:47:10.727645 Sending DHCP discover... done.
2037 09:47:10.731261 Waiting for reply... done.
2038 09:47:10.734399 Sending DHCP request... done.
2039 09:47:10.741235 Waiting for reply... done.
2040 09:47:10.741862 My ip is 192.168.201.16
2041 09:47:10.744054 The DHCP server ip is 192.168.201.1
2042 09:47:10.750857 TFTP server IP predefined by user: 192.168.201.1
2043 09:47:10.757082 Bootfile predefined by user: 7022964/tftp-deploy-ltboiod1/kernel/bzImage
2044 09:47:10.760515 Sending tftp read request... done.
2045 09:47:10.767027 Waiting for the transfer...
2046 09:47:11.138934 00000000 ################################################################
2047 09:47:11.423007 00080000 ################################################################
2048 09:47:11.710257 00100000 ################################################################
2049 09:47:11.967876 00180000 ################################################################
2050 09:47:12.256626 00200000 ################################################################
2051 09:47:12.539866 00280000 ################################################################
2052 09:47:12.818601 00300000 ################################################################
2053 09:47:13.082473 00380000 ################################################################
2054 09:47:13.329116 00400000 ################################################################
2055 09:47:13.573214 00480000 ################################################################
2056 09:47:13.865984 00500000 ################################################################
2057 09:47:14.160128 00580000 ################################################################
2058 09:47:14.388311 00600000 ################################################################ done.
2059 09:47:14.391923 The bootfile was 6815632 bytes long.
2060 09:47:14.395087 Sending tftp read request... done.
2061 09:47:14.398161 Waiting for the transfer...
2062 09:47:14.627594 00000000 ################################################################
2063 09:47:14.857998 00080000 ################################################################
2064 09:47:15.098090 00100000 ################################################################
2065 09:47:15.345282 00180000 ################################################################
2066 09:47:15.576035 00200000 ################################################################
2067 09:47:15.807365 00280000 ################################################################
2068 09:47:16.041387 00300000 ################################################################
2069 09:47:16.281090 00380000 ################################################################
2070 09:47:16.511023 00400000 ################################################################
2071 09:47:16.747147 00480000 ################################################################
2072 09:47:16.855792 00500000 ############################# done.
2073 09:47:16.859051 Sending tftp read request... done.
2074 09:47:16.862218 Waiting for the transfer...
2075 09:47:16.862301 00000000 # done.
2076 09:47:16.872158 Command line loaded dynamically from TFTP file: 7022964/tftp-deploy-ltboiod1/kernel/cmdline
2077 09:47:16.898304 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7022964/extract-nfsrootfs-ge8l71s3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2078 09:47:16.904875 ec_init(0): CrosEC protocol v3 supported (256, 256)
2079 09:47:16.908414 Shutting down all USB controllers.
2080 09:47:16.911262 Removing current net device
2081 09:47:16.914750 Finalizing coreboot
2082 09:47:16.921191 Exiting depthcharge with code 4 at timestamp: 15813907
2083 09:47:16.921277
2084 09:47:16.921366 Starting kernel ...
2085 09:47:16.921686 end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
2086 09:47:16.921796 start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
2087 09:47:16.921882 Setting prompt string to ['Linux version [0-9]']
2088 09:47:16.921971 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2089 09:47:16.922056 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2090 09:47:16.924617
2091 09:47:16.924699
2093 09:51:49.923008 end: 2.2.5 auto-login-action (duration 00:04:33) [common]
2095 09:51:49.924835 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
2097 09:51:49.926227 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2100 09:51:49.928254 end: 2 depthcharge-action (duration 00:05:00) [common]
2102 09:51:49.929433 Cleaning after the job
2103 09:51:49.929869 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/ramdisk
2104 09:51:49.932222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/kernel
2105 09:51:49.934754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/nfsrootfs
2106 09:51:50.002073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7022964/tftp-deploy-ltboiod1/modules
2107 09:51:50.002387 start: 5.1 power-off (timeout 00:00:30) [common]
2108 09:51:50.002548 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
2109 09:51:50.021577 >> Command sent successfully.
2110 09:51:50.023479 Returned 0 in 0 seconds
2111 09:51:50.124816 end: 5.1 power-off (duration 00:00:00) [common]
2113 09:51:50.126385 start: 5.2 read-feedback (timeout 00:10:00) [common]
2114 09:51:50.127719 Listened to connection for namespace 'common' for up to 1s
2115 09:51:51.132120 Finalising connection for namespace 'common'
2116 09:51:51.132308 Disconnecting from shell: Finalise
2117 09:51:51.233233 end: 5.2 read-feedback (duration 00:00:01) [common]
2118 09:51:51.233404 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7022964
2119 09:51:51.325827 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7022964
2120 09:51:51.326031 JobError: Your job cannot terminate cleanly.