Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 09:46:43.317592 lava-dispatcher, installed at version: 2022.06
2 09:46:43.317778 start: 0 validate
3 09:46:43.317910 Start time: 2022-08-12 09:46:43.317903+00:00 (UTC)
4 09:46:43.318033 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:46:43.318158 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220805.0%2Famd64%2Finitrd.cpio.gz exists
6 09:46:43.613522 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:46:43.614320 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:46:46.621567 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:46:46.621760 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220805.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 09:46:46.913498 Using caching service: 'http://localhost/cache/?uri=%s'
11 09:46:46.913698 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st20-96-g74ff989472f09%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 09:46:46.916086 validate duration: 3.60
14 09:46:46.916342 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:46:46.916446 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:46:46.916535 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:46:46.916632 Not decompressing ramdisk as can be used compressed.
18 09:46:46.916713 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220805.0/amd64/initrd.cpio.gz
19 09:46:46.916777 saving as /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/ramdisk/initrd.cpio.gz
20 09:46:46.916839 total size: 5411025 (5MB)
21 09:46:46.917908 progress 0% (0MB)
22 09:46:46.919347 progress 5% (0MB)
23 09:46:46.920665 progress 10% (0MB)
24 09:46:46.922062 progress 15% (0MB)
25 09:46:46.923517 progress 20% (1MB)
26 09:46:46.924801 progress 25% (1MB)
27 09:46:46.926126 progress 30% (1MB)
28 09:46:46.927410 progress 35% (1MB)
29 09:46:46.928842 progress 40% (2MB)
30 09:46:46.930172 progress 45% (2MB)
31 09:46:46.931459 progress 50% (2MB)
32 09:46:46.932746 progress 55% (2MB)
33 09:46:46.934215 progress 60% (3MB)
34 09:46:46.935499 progress 65% (3MB)
35 09:46:46.936783 progress 70% (3MB)
36 09:46:46.938122 progress 75% (3MB)
37 09:46:46.939561 progress 80% (4MB)
38 09:46:46.940844 progress 85% (4MB)
39 09:46:46.942168 progress 90% (4MB)
40 09:46:46.943453 progress 95% (4MB)
41 09:46:46.944906 progress 100% (5MB)
42 09:46:46.945086 5MB downloaded in 0.03s (182.72MB/s)
43 09:46:46.945239 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:46:46.945532 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:46:46.945667 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:46:46.945755 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:46:46.945861 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 09:46:46.945929 saving as /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/kernel/bzImage
50 09:46:46.945989 total size: 6815632 (6MB)
51 09:46:46.946048 No compression specified
52 09:46:46.947189 progress 0% (0MB)
53 09:46:46.948962 progress 5% (0MB)
54 09:46:46.950627 progress 10% (0MB)
55 09:46:46.952449 progress 15% (1MB)
56 09:46:46.954091 progress 20% (1MB)
57 09:46:46.955706 progress 25% (1MB)
58 09:46:46.957472 progress 30% (1MB)
59 09:46:46.959116 progress 35% (2MB)
60 09:46:46.960866 progress 40% (2MB)
61 09:46:46.962653 progress 45% (2MB)
62 09:46:46.964366 progress 50% (3MB)
63 09:46:46.966193 progress 55% (3MB)
64 09:46:46.967884 progress 60% (3MB)
65 09:46:46.969784 progress 65% (4MB)
66 09:46:46.971382 progress 70% (4MB)
67 09:46:46.973075 progress 75% (4MB)
68 09:46:46.974951 progress 80% (5MB)
69 09:46:46.976545 progress 85% (5MB)
70 09:46:46.978466 progress 90% (5MB)
71 09:46:46.980168 progress 95% (6MB)
72 09:46:46.981933 progress 100% (6MB)
73 09:46:46.982221 6MB downloaded in 0.04s (179.42MB/s)
74 09:46:46.982367 end: 1.2.1 http-download (duration 00:00:00) [common]
76 09:46:46.982607 end: 1.2 download-retry (duration 00:00:00) [common]
77 09:46:46.982695 start: 1.3 download-retry (timeout 00:10:00) [common]
78 09:46:46.982781 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 09:46:46.982888 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220805.0/amd64/full.rootfs.tar.xz
80 09:46:46.982955 saving as /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/nfsrootfs/full.rootfs.tar
81 09:46:46.983016 total size: 133191700 (127MB)
82 09:46:46.983080 Using unxz to decompress xz
83 09:46:46.986476 progress 0% (0MB)
84 09:46:47.330597 progress 5% (6MB)
85 09:46:47.693292 progress 10% (12MB)
86 09:46:47.983662 progress 15% (19MB)
87 09:46:48.200581 progress 20% (25MB)
88 09:46:48.455995 progress 25% (31MB)
89 09:46:48.806542 progress 30% (38MB)
90 09:46:49.160219 progress 35% (44MB)
91 09:46:49.565294 progress 40% (50MB)
92 09:46:49.949869 progress 45% (57MB)
93 09:46:50.305559 progress 50% (63MB)
94 09:46:50.681778 progress 55% (69MB)
95 09:46:51.052340 progress 60% (76MB)
96 09:46:51.420769 progress 65% (82MB)
97 09:46:51.791298 progress 70% (88MB)
98 09:46:52.158071 progress 75% (95MB)
99 09:46:52.612998 progress 80% (101MB)
100 09:46:53.049719 progress 85% (107MB)
101 09:46:53.330156 progress 90% (114MB)
102 09:46:53.696478 progress 95% (120MB)
103 09:46:54.109879 progress 100% (127MB)
104 09:46:54.116040 127MB downloaded in 7.13s (17.81MB/s)
105 09:46:54.116307 end: 1.3.1 http-download (duration 00:00:07) [common]
107 09:46:54.116569 end: 1.3 download-retry (duration 00:00:07) [common]
108 09:46:54.116663 start: 1.4 download-retry (timeout 00:09:53) [common]
109 09:46:54.116751 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 09:46:54.116860 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st20-96-g74ff989472f09/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 09:46:54.116935 saving as /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/modules/modules.tar
112 09:46:54.116996 total size: 51724 (0MB)
113 09:46:54.117059 Using unxz to decompress xz
114 09:46:54.120302 progress 63% (0MB)
115 09:46:54.120696 progress 100% (0MB)
116 09:46:54.124106 0MB downloaded in 0.01s (6.95MB/s)
117 09:46:54.124340 end: 1.4.1 http-download (duration 00:00:00) [common]
119 09:46:54.124607 end: 1.4 download-retry (duration 00:00:00) [common]
120 09:46:54.124705 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 09:46:54.124802 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 09:46:55.368481 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7023008/extract-nfsrootfs-l0emi888
123 09:46:55.368694 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 09:46:55.368801 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 09:46:55.368941 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r
126 09:46:55.369047 makedir: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin
127 09:46:55.369134 makedir: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/tests
128 09:46:55.369215 makedir: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/results
129 09:46:55.369310 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-add-keys
130 09:46:55.369439 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-add-sources
131 09:46:55.369554 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-background-process-start
132 09:46:55.369711 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-background-process-stop
133 09:46:55.369823 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-common-functions
134 09:46:55.369933 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-echo-ipv4
135 09:46:55.370044 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-install-packages
136 09:46:55.370153 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-installed-packages
137 09:46:55.370261 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-os-build
138 09:46:55.370369 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-probe-channel
139 09:46:55.370477 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-probe-ip
140 09:46:55.370585 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-target-ip
141 09:46:55.370693 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-target-mac
142 09:46:55.370801 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-target-storage
143 09:46:55.370914 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-case
144 09:46:55.371023 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-event
145 09:46:55.371130 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-feedback
146 09:46:55.371238 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-raise
147 09:46:55.371345 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-reference
148 09:46:55.371451 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-runner
149 09:46:55.371559 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-set
150 09:46:55.371670 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-test-shell
151 09:46:55.371786 Updating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-install-packages (oe)
152 09:46:55.371905 Updating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/bin/lava-installed-packages (oe)
153 09:46:55.372002 Creating /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/environment
154 09:46:55.372088 LAVA metadata
155 09:46:55.372154 - LAVA_JOB_ID=7023008
156 09:46:55.372217 - LAVA_DISPATCHER_IP=192.168.201.1
157 09:46:55.372315 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 09:46:55.372380 skipped lava-vland-overlay
159 09:46:55.372455 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 09:46:55.372538 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 09:46:55.372613 skipped lava-multinode-overlay
162 09:46:55.372710 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 09:46:55.372794 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 09:46:55.372867 Loading test definitions
165 09:46:55.372958 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 09:46:55.373033 Using /lava-7023008 at stage 0
167 09:46:55.373289 uuid=7023008_1.5.2.3.1 testdef=None
168 09:46:55.373384 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 09:46:55.373477 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 09:46:55.373987 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 09:46:55.374219 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 09:46:55.374776 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 09:46:55.375013 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 09:46:55.375545 runner path: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/0/tests/0_dmesg test_uuid 7023008_1.5.2.3.1
177 09:46:55.375689 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 09:46:55.375922 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 09:46:55.375995 Using /lava-7023008 at stage 1
181 09:46:55.376236 uuid=7023008_1.5.2.3.5 testdef=None
182 09:46:55.376325 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 09:46:55.376411 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 09:46:55.376860 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 09:46:55.377090 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 09:46:55.377718 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 09:46:55.377961 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 09:46:55.378515 runner path: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/1/tests/1_bootrr test_uuid 7023008_1.5.2.3.5
191 09:46:55.378655 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 09:46:55.378865 Creating lava-test-runner.conf files
194 09:46:55.378928 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/0 for stage 0
195 09:46:55.379008 - 0_dmesg
196 09:46:55.379081 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7023008/lava-overlay-peno6_3r/lava-7023008/1 for stage 1
197 09:46:55.379163 - 1_bootrr
198 09:46:55.379254 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 09:46:55.379339 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 09:46:55.384853 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 09:46:55.384957 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 09:46:55.385045 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 09:46:55.385131 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 09:46:55.385218 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 09:46:55.488404 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 09:46:55.488853 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 09:46:55.489024 extracting modules file /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7023008/extract-nfsrootfs-l0emi888
208 09:46:55.495461 extracting modules file /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7023008/extract-overlay-ramdisk-s9issc0n/ramdisk
209 09:46:55.501474 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 09:46:55.501675 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 09:46:55.501779 [common] Applying overlay to NFS
212 09:46:55.501854 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7023008/compress-overlay-e3gesbwy/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7023008/extract-nfsrootfs-l0emi888
213 09:46:55.505543 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 09:46:55.505698 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 09:46:55.505794 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 09:46:55.505888 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 09:46:55.505967 Building ramdisk /var/lib/lava/dispatcher/tmp/7023008/extract-overlay-ramdisk-s9issc0n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7023008/extract-overlay-ramdisk-s9issc0n/ramdisk
218 09:46:55.539044 >> 24431 blocks
219 09:46:56.015446 rename /var/lib/lava/dispatcher/tmp/7023008/extract-overlay-ramdisk-s9issc0n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
220 09:46:56.015842 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 09:46:56.015971 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 09:46:56.016075 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 09:46:56.016175 No mkimage arch provided, not using FIT.
224 09:46:56.016267 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 09:46:56.016352 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 09:46:56.016446 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 09:46:56.016542 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 09:46:56.016621 No LXC device requested
229 09:46:56.016702 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 09:46:56.016789 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 09:46:56.016868 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 09:46:56.016935 Checking files for TFTP limit of 4294967296 bytes.
233 09:46:56.017309 end: 1 tftp-deploy (duration 00:00:09) [common]
234 09:46:56.017416 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 09:46:56.017511 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 09:46:56.017672 substitutions:
237 09:46:56.017742 - {DTB}: None
238 09:46:56.017807 - {INITRD}: 7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
239 09:46:56.017868 - {KERNEL}: 7023008/tftp-deploy-n0umc98g/kernel/bzImage
240 09:46:56.017927 - {LAVA_MAC}: None
241 09:46:56.017984 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7023008/extract-nfsrootfs-l0emi888
242 09:46:56.018043 - {NFS_SERVER_IP}: 192.168.201.1
243 09:46:56.018099 - {PRESEED_CONFIG}: None
244 09:46:56.018155 - {PRESEED_LOCAL}: None
245 09:46:56.018210 - {RAMDISK}: 7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
246 09:46:56.018266 - {ROOT_PART}: None
247 09:46:56.018321 - {ROOT}: None
248 09:46:56.018377 - {SERVER_IP}: 192.168.201.1
249 09:46:56.018433 - {TEE}: None
250 09:46:56.018488 Parsed boot commands:
251 09:46:56.018543 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 09:46:56.018693 Parsed boot commands: tftpboot 192.168.201.1 7023008/tftp-deploy-n0umc98g/kernel/bzImage 7023008/tftp-deploy-n0umc98g/kernel/cmdline 7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
253 09:46:56.018785 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 09:46:56.018874 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 09:46:56.018968 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 09:46:56.019057 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 09:46:56.019129 Not connected, no need to disconnect.
258 09:46:56.019208 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 09:46:56.019293 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 09:46:56.019360 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
261 09:46:56.022099 Setting prompt string to ['lava-test: # ']
262 09:46:56.022377 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 09:46:56.022480 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 09:46:56.022582 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 09:46:56.022678 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 09:46:56.022859 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
267 09:46:56.041527 >> Command sent successfully.
268 09:46:56.043511 Returned 0 in 0 seconds
269 09:46:56.144306 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 09:46:56.144637 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 09:46:56.144740 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 09:46:56.144833 Setting prompt string to 'Starting depthcharge on Voema...'
274 09:46:56.144899 Changing prompt to 'Starting depthcharge on Voema...'
275 09:46:56.144976 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 09:46:56.145240 [Enter `^Ec?' for help]
277 09:47:04.693726
278 09:47:04.693896
279 09:47:04.703746 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 09:47:04.707051 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 09:47:04.713553 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 09:47:04.717427 CPU: AES supported, TXT NOT supported, VT supported
283 09:47:04.724267 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 09:47:04.730369 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 09:47:04.734723 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 09:47:04.737059 VBOOT: Loading verstage.
287 09:47:04.740550 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 09:47:04.747497 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 09:47:04.750454 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 09:47:04.760874 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 09:47:04.767215 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 09:47:04.767312
293 09:47:04.767379
294 09:47:04.780484 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 09:47:04.794514 Probing TPM: . done!
296 09:47:04.797731 TPM ready after 0 ms
297 09:47:04.801347 Connected to device vid:did:rid of 1ae0:0028:00
298 09:47:04.812237 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 09:47:04.819057 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 09:47:04.822603 Initialized TPM device CR50 revision 0
301 09:47:04.872862 tlcl_send_startup: Startup return code is 0
302 09:47:04.873012 TPM: setup succeeded
303 09:47:04.888842 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 09:47:04.902331 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 09:47:04.915442 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 09:47:04.925165 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 09:47:04.929542 Chrome EC: UHEPI supported
308 09:47:04.933114 Phase 1
309 09:47:04.936327 FMAP: area GBB found @ 1805000 (458752 bytes)
310 09:47:04.946494 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 09:47:04.953333 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 09:47:04.959743 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 09:47:04.966467 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 09:47:04.969486 Recovery requested (1009000e)
315 09:47:04.972938 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 09:47:04.984958 tlcl_extend: response is 0
317 09:47:04.991589 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 09:47:05.001170 tlcl_extend: response is 0
319 09:47:05.007722 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 09:47:05.014514 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 09:47:05.021085 BS: verstage times (exec / console): total (unknown) / 142 ms
322 09:47:05.021172
323 09:47:05.021258
324 09:47:05.033925 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 09:47:05.041046 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 09:47:05.044432 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 09:47:05.047353 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 09:47:05.054600 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 09:47:05.057294 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 09:47:05.060570 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 09:47:05.063972 TCO_STS: 0000 0000
332 09:47:05.068057 GEN_PMCON: d0015038 00002200
333 09:47:05.070481 GBLRST_CAUSE: 00000000 00000000
334 09:47:05.070568 HPR_CAUSE0: 00000000
335 09:47:05.074311 prev_sleep_state 5
336 09:47:05.077125 Boot Count incremented to 10848
337 09:47:05.084372 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 09:47:05.090541 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 09:47:05.097056 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 09:47:05.104265 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 09:47:05.108407 Chrome EC: UHEPI supported
342 09:47:05.115408 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 09:47:05.129499 Probing TPM: done!
344 09:47:05.133522 Connected to device vid:did:rid of 1ae0:0028:00
345 09:47:05.144326 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 09:47:05.148084 Initialized TPM device CR50 revision 0
347 09:47:05.163144 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 09:47:05.170044 MRC: Hash idx 0x100b comparison successful.
349 09:47:05.172935 MRC cache found, size faa8
350 09:47:05.173021 bootmode is set to: 2
351 09:47:05.176306 SPD index = 0
352 09:47:05.183374 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 09:47:05.186517 SPD: module type is LPDDR4X
354 09:47:05.189685 SPD: module part number is MT53E512M64D4NW-046
355 09:47:05.196503 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 09:47:05.199982 SPD: device width 16 bits, bus width 16 bits
357 09:47:05.206266 SPD: module size is 1024 MB (per channel)
358 09:47:05.641330 CBMEM:
359 09:47:05.645125 IMD: root @ 0x76fff000 254 entries.
360 09:47:05.648260 IMD: root @ 0x76ffec00 62 entries.
361 09:47:05.651936 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 09:47:05.658198 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 09:47:05.661523 External stage cache:
364 09:47:05.664866 IMD: root @ 0x7b3ff000 254 entries.
365 09:47:05.668154 IMD: root @ 0x7b3fec00 62 entries.
366 09:47:05.683560 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 09:47:05.689857 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 09:47:05.696514 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 09:47:05.711294 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 09:47:05.714621 cse_lite: Skip switching to RW in the recovery path
371 09:47:05.718547 8 DIMMs found
372 09:47:05.718633 SMM Memory Map
373 09:47:05.721152 SMRAM : 0x7b000000 0x800000
374 09:47:05.724563 Subregion 0: 0x7b000000 0x200000
375 09:47:05.727940 Subregion 1: 0x7b200000 0x200000
376 09:47:05.731104 Subregion 2: 0x7b400000 0x400000
377 09:47:05.735138 top_of_ram = 0x77000000
378 09:47:05.741298 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 09:47:05.744593 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 09:47:05.751280 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 09:47:05.754278 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 09:47:05.764225 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 09:47:05.770862 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 09:47:05.781493 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 09:47:05.784798 Processing 211 relocs. Offset value of 0x74c0b000
386 09:47:05.793253 BS: romstage times (exec / console): total (unknown) / 277 ms
387 09:47:05.799526
388 09:47:05.799613
389 09:47:05.809352 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 09:47:05.812984 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 09:47:05.822664 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 09:47:05.829257 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 09:47:05.836224 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 09:47:05.842612 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 09:47:05.889416 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 09:47:05.895954 Processing 5008 relocs. Offset value of 0x75d98000
397 09:47:05.899803 BS: postcar times (exec / console): total (unknown) / 59 ms
398 09:47:05.903179
399 09:47:05.903266
400 09:47:05.913007 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 09:47:05.913095 Normal boot
402 09:47:05.916463 FW_CONFIG value is 0x804c02
403 09:47:05.919955 PCI: 00:07.0 disabled by fw_config
404 09:47:05.923692 PCI: 00:07.1 disabled by fw_config
405 09:47:05.926531 PCI: 00:0d.2 disabled by fw_config
406 09:47:05.929788 PCI: 00:1c.7 disabled by fw_config
407 09:47:05.937021 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 09:47:05.943196 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 09:47:05.946502 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 09:47:05.949525 GENERIC: 0.0 disabled by fw_config
411 09:47:05.952943 GENERIC: 1.0 disabled by fw_config
412 09:47:05.960163 fw_config match found: DB_USB=USB3_ACTIVE
413 09:47:05.963643 fw_config match found: DB_USB=USB3_ACTIVE
414 09:47:05.966497 fw_config match found: DB_USB=USB3_ACTIVE
415 09:47:05.969562 fw_config match found: DB_USB=USB3_ACTIVE
416 09:47:05.976242 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 09:47:05.983131 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 09:47:05.989798 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 09:47:05.999927 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 09:47:06.002760 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 09:47:06.009554 microcode: Update skipped, already up-to-date
422 09:47:06.016016 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 09:47:06.042931 Detected 4 core, 8 thread CPU.
424 09:47:06.046801 Setting up SMI for CPU
425 09:47:06.049857 IED base = 0x7b400000
426 09:47:06.049943 IED size = 0x00400000
427 09:47:06.053825 Will perform SMM setup.
428 09:47:06.059849 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 09:47:06.066196 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 09:47:06.073231 Processing 16 relocs. Offset value of 0x00030000
431 09:47:06.076424 Attempting to start 7 APs
432 09:47:06.079559 Waiting for 10ms after sending INIT.
433 09:47:06.095093 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
434 09:47:06.098646 AP: slot 7 apic_id 3.
435 09:47:06.101676 AP: slot 1 apic_id 2.
436 09:47:06.101758 AP: slot 3 apic_id 5.
437 09:47:06.104992 AP: slot 6 apic_id 4.
438 09:47:06.108373 AP: slot 5 apic_id 6.
439 09:47:06.108456 AP: slot 4 apic_id 7.
440 09:47:06.108521 done.
441 09:47:06.115045 Waiting for 2nd SIPI to complete...done.
442 09:47:06.121527 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 09:47:06.128195 Processing 13 relocs. Offset value of 0x00038000
444 09:47:06.131793 Unable to locate Global NVS
445 09:47:06.138216 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 09:47:06.141674 Installing permanent SMM handler to 0x7b000000
447 09:47:06.151518 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 09:47:06.154859 Processing 794 relocs. Offset value of 0x7b010000
449 09:47:06.164918 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 09:47:06.168438 Processing 13 relocs. Offset value of 0x7b008000
451 09:47:06.174612 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 09:47:06.181304 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 09:47:06.184723 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 09:47:06.191133 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 09:47:06.198003 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 09:47:06.204300 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 09:47:06.211419 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 09:47:06.214192 Unable to locate Global NVS
459 09:47:06.220973 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 09:47:06.224272 Clearing SMI status registers
461 09:47:06.224356 SMI_STS: PM1
462 09:47:06.227486 PM1_STS: PWRBTN
463 09:47:06.234347 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 09:47:06.237651 In relocation handler: CPU 0
465 09:47:06.241117 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 09:47:06.247355 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 09:47:06.247441 Relocation complete.
468 09:47:06.257684 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
469 09:47:06.260830 In relocation handler: CPU 2
470 09:47:06.264074 New SMBASE=0x7afff800 IEDBASE=0x7b400000
471 09:47:06.264158 Relocation complete.
472 09:47:06.273998 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
473 09:47:06.277512 In relocation handler: CPU 7
474 09:47:06.280526 New SMBASE=0x7affe400 IEDBASE=0x7b400000
475 09:47:06.280604 Relocation complete.
476 09:47:06.290881 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
477 09:47:06.290966 In relocation handler: CPU 1
478 09:47:06.297156 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
479 09:47:06.300771 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 09:47:06.304411 Relocation complete.
481 09:47:06.310749 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 09:47:06.314513 In relocation handler: CPU 3
483 09:47:06.317006 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 09:47:06.320689 Relocation complete.
485 09:47:06.327226 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
486 09:47:06.330254 In relocation handler: CPU 6
487 09:47:06.333861 New SMBASE=0x7affe800 IEDBASE=0x7b400000
488 09:47:06.340595 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 09:47:06.340681 Relocation complete.
490 09:47:06.346955 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 09:47:06.350356 In relocation handler: CPU 5
492 09:47:06.357007 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 09:47:06.360279 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 09:47:06.363706 Relocation complete.
495 09:47:06.370809 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
496 09:47:06.374438 In relocation handler: CPU 4
497 09:47:06.377690 New SMBASE=0x7afff000 IEDBASE=0x7b400000
498 09:47:06.377775 Relocation complete.
499 09:47:06.381057 Initializing CPU #0
500 09:47:06.384063 CPU: vendor Intel device 806c1
501 09:47:06.387626 CPU: family 06, model 8c, stepping 01
502 09:47:06.390884 Clearing out pending MCEs
503 09:47:06.394140 Setting up local APIC...
504 09:47:06.394225 apic_id: 0x00 done.
505 09:47:06.398421 Turbo is available but hidden
506 09:47:06.400771 Turbo is available and visible
507 09:47:06.407606 microcode: Update skipped, already up-to-date
508 09:47:06.407690 CPU #0 initialized
509 09:47:06.411060 Initializing CPU #3
510 09:47:06.414261 Initializing CPU #6
511 09:47:06.417384 CPU: vendor Intel device 806c1
512 09:47:06.420712 CPU: family 06, model 8c, stepping 01
513 09:47:06.424407 CPU: vendor Intel device 806c1
514 09:47:06.427577 CPU: family 06, model 8c, stepping 01
515 09:47:06.430775 Clearing out pending MCEs
516 09:47:06.430859 Clearing out pending MCEs
517 09:47:06.434160 Setting up local APIC...
518 09:47:06.437253 Initializing CPU #5
519 09:47:06.437337 Initializing CPU #4
520 09:47:06.440990 CPU: vendor Intel device 806c1
521 09:47:06.444202 CPU: family 06, model 8c, stepping 01
522 09:47:06.447890 CPU: vendor Intel device 806c1
523 09:47:06.454230 CPU: family 06, model 8c, stepping 01
524 09:47:06.454314 Clearing out pending MCEs
525 09:47:06.457172 Clearing out pending MCEs
526 09:47:06.460704 Setting up local APIC...
527 09:47:06.465409 Initializing CPU #7
528 09:47:06.465493 Initializing CPU #1
529 09:47:06.467595 CPU: vendor Intel device 806c1
530 09:47:06.471275 CPU: family 06, model 8c, stepping 01
531 09:47:06.474202 CPU: vendor Intel device 806c1
532 09:47:06.477549 CPU: family 06, model 8c, stepping 01
533 09:47:06.481248 Clearing out pending MCEs
534 09:47:06.484662 Clearing out pending MCEs
535 09:47:06.487329 Setting up local APIC...
536 09:47:06.487412 Initializing CPU #2
537 09:47:06.490550 apic_id: 0x07 done.
538 09:47:06.494016 Setting up local APIC...
539 09:47:06.497130 CPU: vendor Intel device 806c1
540 09:47:06.501117 CPU: family 06, model 8c, stepping 01
541 09:47:06.501244 apic_id: 0x06 done.
542 09:47:06.507747 microcode: Update skipped, already up-to-date
543 09:47:06.510653 microcode: Update skipped, already up-to-date
544 09:47:06.513762 CPU #4 initialized
545 09:47:06.513846 CPU #5 initialized
546 09:47:06.517479 Clearing out pending MCEs
547 09:47:06.520671 apic_id: 0x03 done.
548 09:47:06.520756 Setting up local APIC...
549 09:47:06.523895 apic_id: 0x05 done.
550 09:47:06.527676 Setting up local APIC...
551 09:47:06.530642 apic_id: 0x02 done.
552 09:47:06.534009 microcode: Update skipped, already up-to-date
553 09:47:06.537299 microcode: Update skipped, already up-to-date
554 09:47:06.540739 CPU #7 initialized
555 09:47:06.540823 CPU #1 initialized
556 09:47:06.544182 apic_id: 0x04 done.
557 09:47:06.547591 microcode: Update skipped, already up-to-date
558 09:47:06.554091 microcode: Update skipped, already up-to-date
559 09:47:06.554175 CPU #3 initialized
560 09:47:06.557249 CPU #6 initialized
561 09:47:06.560729 Setting up local APIC...
562 09:47:06.560813 apic_id: 0x01 done.
563 09:47:06.567156 microcode: Update skipped, already up-to-date
564 09:47:06.571116 CPU #2 initialized
565 09:47:06.573994 bsp_do_flight_plan done after 455 msecs.
566 09:47:06.577627 CPU: frequency set to 4000 MHz
567 09:47:06.577711 Enabling SMIs.
568 09:47:06.584065 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 09:47:06.600555 SATAXPCIE1 indicates PCIe NVMe is present
570 09:47:06.603683 Probing TPM: done!
571 09:47:06.607267 Connected to device vid:did:rid of 1ae0:0028:00
572 09:47:06.617780 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 09:47:06.621065 Initialized TPM device CR50 revision 0
574 09:47:06.624376 Enabling S0i3.4
575 09:47:06.631043 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 09:47:06.634369 Found a VBT of 8704 bytes after decompression
577 09:47:06.641223 cse_lite: CSE RO boot. HybridStorageMode disabled
578 09:47:06.647245 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 09:47:06.723577 FSPS returned 0
580 09:47:06.726895 Executing Phase 1 of FspMultiPhaseSiInit
581 09:47:06.737323 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 09:47:06.740729 port C0 DISC req: usage 1 usb3 1 usb2 5
583 09:47:06.743649 Raw Buffer output 0 00000511
584 09:47:06.747083 Raw Buffer output 1 00000000
585 09:47:06.750758 pmc_send_ipc_cmd succeeded
586 09:47:06.757722 port C1 DISC req: usage 1 usb3 2 usb2 3
587 09:47:06.757806 Raw Buffer output 0 00000321
588 09:47:06.760735 Raw Buffer output 1 00000000
589 09:47:06.764864 pmc_send_ipc_cmd succeeded
590 09:47:06.770078 Detected 4 core, 8 thread CPU.
591 09:47:06.773450 Detected 4 core, 8 thread CPU.
592 09:47:07.007635 Display FSP Version Info HOB
593 09:47:07.010842 Reference Code - CPU = a.0.4c.31
594 09:47:07.014211 uCode Version = 0.0.0.86
595 09:47:07.017553 TXT ACM version = ff.ff.ff.ffff
596 09:47:07.021172 Reference Code - ME = a.0.4c.31
597 09:47:07.024281 MEBx version = 0.0.0.0
598 09:47:07.027371 ME Firmware Version = Consumer SKU
599 09:47:07.030963 Reference Code - PCH = a.0.4c.31
600 09:47:07.034429 PCH-CRID Status = Disabled
601 09:47:07.037412 PCH-CRID Original Value = ff.ff.ff.ffff
602 09:47:07.040763 PCH-CRID New Value = ff.ff.ff.ffff
603 09:47:07.044187 OPROM - RST - RAID = ff.ff.ff.ffff
604 09:47:07.047576 PCH Hsio Version = 4.0.0.0
605 09:47:07.050975 Reference Code - SA - System Agent = a.0.4c.31
606 09:47:07.054213 Reference Code - MRC = 2.0.0.1
607 09:47:07.057718 SA - PCIe Version = a.0.4c.31
608 09:47:07.060579 SA-CRID Status = Disabled
609 09:47:07.064213 SA-CRID Original Value = 0.0.0.1
610 09:47:07.067501 SA-CRID New Value = 0.0.0.1
611 09:47:07.070635 OPROM - VBIOS = ff.ff.ff.ffff
612 09:47:07.074025 IO Manageability Engine FW Version = 11.1.4.0
613 09:47:07.077881 PHY Build Version = 0.0.0.e0
614 09:47:07.080863 Thunderbolt(TM) FW Version = 0.0.0.0
615 09:47:07.088116 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 09:47:07.090713 ITSS IRQ Polarities Before:
617 09:47:07.090796 IPC0: 0xffffffff
618 09:47:07.094770 IPC1: 0xffffffff
619 09:47:07.094854 IPC2: 0xffffffff
620 09:47:07.097299 IPC3: 0xffffffff
621 09:47:07.100994 ITSS IRQ Polarities After:
622 09:47:07.101077 IPC0: 0xffffffff
623 09:47:07.104103 IPC1: 0xffffffff
624 09:47:07.104186 IPC2: 0xffffffff
625 09:47:07.107680 IPC3: 0xffffffff
626 09:47:07.110733 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 09:47:07.124112 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 09:47:07.133920 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 09:47:07.147554 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 09:47:07.153818 BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
631 09:47:07.153903 Enumerating buses...
632 09:47:07.160719 Show all devs... Before device enumeration.
633 09:47:07.160803 Root Device: enabled 1
634 09:47:07.163880 DOMAIN: 0000: enabled 1
635 09:47:07.167370 CPU_CLUSTER: 0: enabled 1
636 09:47:07.170361 PCI: 00:00.0: enabled 1
637 09:47:07.170443 PCI: 00:02.0: enabled 1
638 09:47:07.173828 PCI: 00:04.0: enabled 1
639 09:47:07.177312 PCI: 00:05.0: enabled 1
640 09:47:07.180581 PCI: 00:06.0: enabled 0
641 09:47:07.180665 PCI: 00:07.0: enabled 0
642 09:47:07.184188 PCI: 00:07.1: enabled 0
643 09:47:07.187232 PCI: 00:07.2: enabled 0
644 09:47:07.190522 PCI: 00:07.3: enabled 0
645 09:47:07.190606 PCI: 00:08.0: enabled 1
646 09:47:07.193819 PCI: 00:09.0: enabled 0
647 09:47:07.197199 PCI: 00:0a.0: enabled 0
648 09:47:07.200784 PCI: 00:0d.0: enabled 1
649 09:47:07.200867 PCI: 00:0d.1: enabled 0
650 09:47:07.203837 PCI: 00:0d.2: enabled 0
651 09:47:07.207120 PCI: 00:0d.3: enabled 0
652 09:47:07.207203 PCI: 00:0e.0: enabled 0
653 09:47:07.210231 PCI: 00:10.2: enabled 1
654 09:47:07.213717 PCI: 00:10.6: enabled 0
655 09:47:07.217106 PCI: 00:10.7: enabled 0
656 09:47:07.217189 PCI: 00:12.0: enabled 0
657 09:47:07.220585 PCI: 00:12.6: enabled 0
658 09:47:07.223734 PCI: 00:13.0: enabled 0
659 09:47:07.226980 PCI: 00:14.0: enabled 1
660 09:47:07.227064 PCI: 00:14.1: enabled 0
661 09:47:07.230295 PCI: 00:14.2: enabled 1
662 09:47:07.233670 PCI: 00:14.3: enabled 1
663 09:47:07.237447 PCI: 00:15.0: enabled 1
664 09:47:07.237531 PCI: 00:15.1: enabled 1
665 09:47:07.240116 PCI: 00:15.2: enabled 1
666 09:47:07.243659 PCI: 00:15.3: enabled 1
667 09:47:07.247204 PCI: 00:16.0: enabled 1
668 09:47:07.247287 PCI: 00:16.1: enabled 0
669 09:47:07.250250 PCI: 00:16.2: enabled 0
670 09:47:07.253706 PCI: 00:16.3: enabled 0
671 09:47:07.253789 PCI: 00:16.4: enabled 0
672 09:47:07.257593 PCI: 00:16.5: enabled 0
673 09:47:07.260070 PCI: 00:17.0: enabled 1
674 09:47:07.263999 PCI: 00:19.0: enabled 0
675 09:47:07.264082 PCI: 00:19.1: enabled 1
676 09:47:07.267200 PCI: 00:19.2: enabled 0
677 09:47:07.270992 PCI: 00:1c.0: enabled 1
678 09:47:07.273866 PCI: 00:1c.1: enabled 0
679 09:47:07.273949 PCI: 00:1c.2: enabled 0
680 09:47:07.276906 PCI: 00:1c.3: enabled 0
681 09:47:07.280244 PCI: 00:1c.4: enabled 0
682 09:47:07.283704 PCI: 00:1c.5: enabled 0
683 09:47:07.283787 PCI: 00:1c.6: enabled 1
684 09:47:07.286752 PCI: 00:1c.7: enabled 0
685 09:47:07.290295 PCI: 00:1d.0: enabled 1
686 09:47:07.290378 PCI: 00:1d.1: enabled 0
687 09:47:07.293480 PCI: 00:1d.2: enabled 1
688 09:47:07.297019 PCI: 00:1d.3: enabled 0
689 09:47:07.300154 PCI: 00:1e.0: enabled 1
690 09:47:07.300237 PCI: 00:1e.1: enabled 0
691 09:47:07.303653 PCI: 00:1e.2: enabled 1
692 09:47:07.306876 PCI: 00:1e.3: enabled 1
693 09:47:07.310047 PCI: 00:1f.0: enabled 1
694 09:47:07.310130 PCI: 00:1f.1: enabled 0
695 09:47:07.313861 PCI: 00:1f.2: enabled 1
696 09:47:07.316851 PCI: 00:1f.3: enabled 1
697 09:47:07.320020 PCI: 00:1f.4: enabled 0
698 09:47:07.320103 PCI: 00:1f.5: enabled 1
699 09:47:07.323383 PCI: 00:1f.6: enabled 0
700 09:47:07.326782 PCI: 00:1f.7: enabled 0
701 09:47:07.326882 APIC: 00: enabled 1
702 09:47:07.330503 GENERIC: 0.0: enabled 1
703 09:47:07.333998 GENERIC: 0.0: enabled 1
704 09:47:07.337086 GENERIC: 1.0: enabled 1
705 09:47:07.337169 GENERIC: 0.0: enabled 1
706 09:47:07.339994 GENERIC: 1.0: enabled 1
707 09:47:07.343417 USB0 port 0: enabled 1
708 09:47:07.346581 GENERIC: 0.0: enabled 1
709 09:47:07.346663 USB0 port 0: enabled 1
710 09:47:07.350175 GENERIC: 0.0: enabled 1
711 09:47:07.353283 I2C: 00:1a: enabled 1
712 09:47:07.353366 I2C: 00:31: enabled 1
713 09:47:07.356740 I2C: 00:32: enabled 1
714 09:47:07.359845 I2C: 00:10: enabled 1
715 09:47:07.359928 I2C: 00:15: enabled 1
716 09:47:07.363458 GENERIC: 0.0: enabled 0
717 09:47:07.366770 GENERIC: 1.0: enabled 0
718 09:47:07.369850 GENERIC: 0.0: enabled 1
719 09:47:07.369933 SPI: 00: enabled 1
720 09:47:07.373693 SPI: 00: enabled 1
721 09:47:07.373776 PNP: 0c09.0: enabled 1
722 09:47:07.377006 GENERIC: 0.0: enabled 1
723 09:47:07.380177 USB3 port 0: enabled 1
724 09:47:07.383182 USB3 port 1: enabled 1
725 09:47:07.383265 USB3 port 2: enabled 0
726 09:47:07.386478 USB3 port 3: enabled 0
727 09:47:07.390180 USB2 port 0: enabled 0
728 09:47:07.390263 USB2 port 1: enabled 1
729 09:47:07.393378 USB2 port 2: enabled 1
730 09:47:07.396500 USB2 port 3: enabled 0
731 09:47:07.399721 USB2 port 4: enabled 1
732 09:47:07.399803 USB2 port 5: enabled 0
733 09:47:07.403243 USB2 port 6: enabled 0
734 09:47:07.406691 USB2 port 7: enabled 0
735 09:47:07.406774 USB2 port 8: enabled 0
736 09:47:07.410067 USB2 port 9: enabled 0
737 09:47:07.413473 USB3 port 0: enabled 0
738 09:47:07.413557 USB3 port 1: enabled 1
739 09:47:07.416664 USB3 port 2: enabled 0
740 09:47:07.420253 USB3 port 3: enabled 0
741 09:47:07.423955 GENERIC: 0.0: enabled 1
742 09:47:07.424039 GENERIC: 1.0: enabled 1
743 09:47:07.426326 APIC: 02: enabled 1
744 09:47:07.429901 APIC: 01: enabled 1
745 09:47:07.429983 APIC: 05: enabled 1
746 09:47:07.433126 APIC: 07: enabled 1
747 09:47:07.433209 APIC: 06: enabled 1
748 09:47:07.436749 APIC: 04: enabled 1
749 09:47:07.440119 APIC: 03: enabled 1
750 09:47:07.440201 Compare with tree...
751 09:47:07.443206 Root Device: enabled 1
752 09:47:07.446295 DOMAIN: 0000: enabled 1
753 09:47:07.449917 PCI: 00:00.0: enabled 1
754 09:47:07.450002 PCI: 00:02.0: enabled 1
755 09:47:07.453357 PCI: 00:04.0: enabled 1
756 09:47:07.456357 GENERIC: 0.0: enabled 1
757 09:47:07.459641 PCI: 00:05.0: enabled 1
758 09:47:07.463299 PCI: 00:06.0: enabled 0
759 09:47:07.463382 PCI: 00:07.0: enabled 0
760 09:47:07.466298 GENERIC: 0.0: enabled 1
761 09:47:07.469873 PCI: 00:07.1: enabled 0
762 09:47:07.473276 GENERIC: 1.0: enabled 1
763 09:47:07.476247 PCI: 00:07.2: enabled 0
764 09:47:07.476329 GENERIC: 0.0: enabled 1
765 09:47:07.479901 PCI: 00:07.3: enabled 0
766 09:47:07.482844 GENERIC: 1.0: enabled 1
767 09:47:07.486171 PCI: 00:08.0: enabled 1
768 09:47:07.489531 PCI: 00:09.0: enabled 0
769 09:47:07.489653 PCI: 00:0a.0: enabled 0
770 09:47:07.493965 PCI: 00:0d.0: enabled 1
771 09:47:07.496335 USB0 port 0: enabled 1
772 09:47:07.499651 USB3 port 0: enabled 1
773 09:47:07.503260 USB3 port 1: enabled 1
774 09:47:07.503343 USB3 port 2: enabled 0
775 09:47:07.506286 USB3 port 3: enabled 0
776 09:47:07.509718 PCI: 00:0d.1: enabled 0
777 09:47:07.512883 PCI: 00:0d.2: enabled 0
778 09:47:07.516302 GENERIC: 0.0: enabled 1
779 09:47:07.516385 PCI: 00:0d.3: enabled 0
780 09:47:07.519661 PCI: 00:0e.0: enabled 0
781 09:47:07.523960 PCI: 00:10.2: enabled 1
782 09:47:07.526307 PCI: 00:10.6: enabled 0
783 09:47:07.529849 PCI: 00:10.7: enabled 0
784 09:47:07.529932 PCI: 00:12.0: enabled 0
785 09:47:07.532681 PCI: 00:12.6: enabled 0
786 09:47:07.536312 PCI: 00:13.0: enabled 0
787 09:47:07.539670 PCI: 00:14.0: enabled 1
788 09:47:07.542872 USB0 port 0: enabled 1
789 09:47:07.542955 USB2 port 0: enabled 0
790 09:47:07.546398 USB2 port 1: enabled 1
791 09:47:07.549953 USB2 port 2: enabled 1
792 09:47:07.552793 USB2 port 3: enabled 0
793 09:47:07.556316 USB2 port 4: enabled 1
794 09:47:07.559403 USB2 port 5: enabled 0
795 09:47:07.559488 USB2 port 6: enabled 0
796 09:47:07.562545 USB2 port 7: enabled 0
797 09:47:07.566118 USB2 port 8: enabled 0
798 09:47:07.570255 USB2 port 9: enabled 0
799 09:47:07.572856 USB3 port 0: enabled 0
800 09:47:07.576698 USB3 port 1: enabled 1
801 09:47:07.576784 USB3 port 2: enabled 0
802 09:47:07.579393 USB3 port 3: enabled 0
803 09:47:07.582959 PCI: 00:14.1: enabled 0
804 09:47:07.585872 PCI: 00:14.2: enabled 1
805 09:47:07.589678 PCI: 00:14.3: enabled 1
806 09:47:07.589761 GENERIC: 0.0: enabled 1
807 09:47:07.592611 PCI: 00:15.0: enabled 1
808 09:47:07.595864 I2C: 00:1a: enabled 1
809 09:47:07.599487 I2C: 00:31: enabled 1
810 09:47:07.599572 I2C: 00:32: enabled 1
811 09:47:07.602789 PCI: 00:15.1: enabled 1
812 09:47:07.606385 I2C: 00:10: enabled 1
813 09:47:07.610012 PCI: 00:15.2: enabled 1
814 09:47:07.610096 PCI: 00:15.3: enabled 1
815 09:47:07.613350 PCI: 00:16.0: enabled 1
816 09:47:07.616731 PCI: 00:16.1: enabled 0
817 09:47:07.619929 PCI: 00:16.2: enabled 0
818 09:47:07.623335 PCI: 00:16.3: enabled 0
819 09:47:07.623420 PCI: 00:16.4: enabled 0
820 09:47:07.626671 PCI: 00:16.5: enabled 0
821 09:47:07.629926 PCI: 00:17.0: enabled 1
822 09:47:07.633330 PCI: 00:19.0: enabled 0
823 09:47:07.633415 PCI: 00:19.1: enabled 1
824 09:47:07.636567 I2C: 00:15: enabled 1
825 09:47:07.639948 PCI: 00:19.2: enabled 0
826 09:47:07.643801 PCI: 00:1d.0: enabled 1
827 09:47:07.646668 GENERIC: 0.0: enabled 1
828 09:47:07.646753 PCI: 00:1e.0: enabled 1
829 09:47:07.649913 PCI: 00:1e.1: enabled 0
830 09:47:07.653478 PCI: 00:1e.2: enabled 1
831 09:47:07.656617 SPI: 00: enabled 1
832 09:47:07.659996 PCI: 00:1e.3: enabled 1
833 09:47:07.660080 SPI: 00: enabled 1
834 09:47:07.663648 PCI: 00:1f.0: enabled 1
835 09:47:07.714713 PNP: 0c09.0: enabled 1
836 09:47:07.714803 PCI: 00:1f.1: enabled 0
837 09:47:07.714902 PCI: 00:1f.2: enabled 1
838 09:47:07.715184 GENERIC: 0.0: enabled 1
839 09:47:07.715250 GENERIC: 0.0: enabled 1
840 09:47:07.715311 GENERIC: 1.0: enabled 1
841 09:47:07.715370 PCI: 00:1f.3: enabled 1
842 09:47:07.715612 PCI: 00:1f.4: enabled 0
843 09:47:07.715676 PCI: 00:1f.5: enabled 1
844 09:47:07.715734 PCI: 00:1f.6: enabled 0
845 09:47:07.715790 PCI: 00:1f.7: enabled 0
846 09:47:07.715845 CPU_CLUSTER: 0: enabled 1
847 09:47:07.716135 APIC: 00: enabled 1
848 09:47:07.716218 APIC: 02: enabled 1
849 09:47:07.716316 APIC: 01: enabled 1
850 09:47:07.716565 APIC: 05: enabled 1
851 09:47:07.716631 APIC: 07: enabled 1
852 09:47:07.717091 APIC: 06: enabled 1
853 09:47:07.717174 APIC: 04: enabled 1
854 09:47:07.717240 APIC: 03: enabled 1
855 09:47:07.766059 Root Device scanning...
856 09:47:07.766147 scan_static_bus for Root Device
857 09:47:07.766401 DOMAIN: 0000 enabled
858 09:47:07.766502 CPU_CLUSTER: 0 enabled
859 09:47:07.766563 DOMAIN: 0000 scanning...
860 09:47:07.766807 PCI: pci_scan_bus for bus 00
861 09:47:07.766872 PCI: 00:00.0 [8086/0000] ops
862 09:47:07.766930 PCI: 00:00.0 [8086/9a12] enabled
863 09:47:07.766987 PCI: 00:02.0 [8086/0000] bus ops
864 09:47:07.767341 PCI: 00:02.0 [8086/9a40] enabled
865 09:47:07.767427 PCI: 00:04.0 [8086/0000] bus ops
866 09:47:07.767681 PCI: 00:04.0 [8086/9a03] enabled
867 09:47:07.767750 PCI: 00:05.0 [8086/9a19] enabled
868 09:47:07.768035 PCI: 00:07.0 [0000/0000] hidden
869 09:47:07.768101 PCI: 00:08.0 [8086/9a11] enabled
870 09:47:07.768348 PCI: 00:0a.0 [8086/9a0d] disabled
871 09:47:07.815437 PCI: 00:0d.0 [8086/0000] bus ops
872 09:47:07.815544 PCI: 00:0d.0 [8086/9a13] enabled
873 09:47:07.815808 PCI: 00:14.0 [8086/0000] bus ops
874 09:47:07.815877 PCI: 00:14.0 [8086/a0ed] enabled
875 09:47:07.816122 PCI: 00:14.2 [8086/a0ef] enabled
876 09:47:07.816187 PCI: 00:14.3 [8086/0000] bus ops
877 09:47:07.816430 PCI: 00:14.3 [8086/a0f0] enabled
878 09:47:07.816493 PCI: 00:15.0 [8086/0000] bus ops
879 09:47:07.816808 PCI: 00:15.0 [8086/a0e8] enabled
880 09:47:07.816871 PCI: 00:15.1 [8086/0000] bus ops
881 09:47:07.816929 PCI: 00:15.1 [8086/a0e9] enabled
882 09:47:07.816986 PCI: 00:15.2 [8086/0000] bus ops
883 09:47:07.817264 PCI: 00:15.2 [8086/a0ea] enabled
884 09:47:07.817329 PCI: 00:15.3 [8086/0000] bus ops
885 09:47:07.817574 PCI: 00:15.3 [8086/a0eb] enabled
886 09:47:07.817653 PCI: 00:16.0 [8086/0000] ops
887 09:47:07.843682 PCI: 00:16.0 [8086/a0e0] enabled
888 09:47:07.843770 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 09:47:07.843836 PCI: 00:19.0 [8086/0000] bus ops
890 09:47:07.843898 PCI: 00:19.0 [8086/a0c5] disabled
891 09:47:07.843976 PCI: 00:19.1 [8086/0000] bus ops
892 09:47:07.844240 PCI: 00:19.1 [8086/a0c6] enabled
893 09:47:07.847178 PCI: 00:1d.0 [8086/0000] bus ops
894 09:47:07.847263 PCI: 00:1d.0 [8086/a0b0] enabled
895 09:47:07.850373 PCI: 00:1e.0 [8086/0000] ops
896 09:47:07.854085 PCI: 00:1e.0 [8086/a0a8] enabled
897 09:47:07.857538 PCI: 00:1e.2 [8086/0000] bus ops
898 09:47:07.860404 PCI: 00:1e.2 [8086/a0aa] enabled
899 09:47:07.863567 PCI: 00:1e.3 [8086/0000] bus ops
900 09:47:07.866931 PCI: 00:1e.3 [8086/a0ab] enabled
901 09:47:07.870871 PCI: 00:1f.0 [8086/0000] bus ops
902 09:47:07.873850 PCI: 00:1f.0 [8086/a087] enabled
903 09:47:07.873934 RTC Init
904 09:47:07.877111 Set power on after power failure.
905 09:47:07.880157 Disabling Deep S3
906 09:47:07.880241 Disabling Deep S3
907 09:47:07.883595 Disabling Deep S4
908 09:47:07.883679 Disabling Deep S4
909 09:47:07.886810 Disabling Deep S5
910 09:47:07.886894 Disabling Deep S5
911 09:47:07.890413 PCI: 00:1f.2 [0000/0000] hidden
912 09:47:07.893732 PCI: 00:1f.3 [8086/0000] bus ops
913 09:47:07.896819 PCI: 00:1f.3 [8086/a0c8] enabled
914 09:47:07.900313 PCI: 00:1f.5 [8086/0000] bus ops
915 09:47:07.903891 PCI: 00:1f.5 [8086/a0a4] enabled
916 09:47:07.906794 PCI: Leftover static devices:
917 09:47:07.910282 PCI: 00:10.2
918 09:47:07.910365 PCI: 00:10.6
919 09:47:07.914121 PCI: 00:10.7
920 09:47:07.914205 PCI: 00:06.0
921 09:47:07.914271 PCI: 00:07.1
922 09:47:07.916805 PCI: 00:07.2
923 09:47:07.916888 PCI: 00:07.3
924 09:47:07.920222 PCI: 00:09.0
925 09:47:07.920307 PCI: 00:0d.1
926 09:47:07.920372 PCI: 00:0d.2
927 09:47:07.923651 PCI: 00:0d.3
928 09:47:07.923736 PCI: 00:0e.0
929 09:47:07.926694 PCI: 00:12.0
930 09:47:07.926778 PCI: 00:12.6
931 09:47:07.930043 PCI: 00:13.0
932 09:47:07.930127 PCI: 00:14.1
933 09:47:07.930193 PCI: 00:16.1
934 09:47:07.933441 PCI: 00:16.2
935 09:47:07.933525 PCI: 00:16.3
936 09:47:07.937034 PCI: 00:16.4
937 09:47:07.937118 PCI: 00:16.5
938 09:47:07.937185 PCI: 00:17.0
939 09:47:07.940578 PCI: 00:19.2
940 09:47:07.940663 PCI: 00:1e.1
941 09:47:07.943495 PCI: 00:1f.1
942 09:47:07.943580 PCI: 00:1f.4
943 09:47:07.947144 PCI: 00:1f.6
944 09:47:07.947228 PCI: 00:1f.7
945 09:47:07.949962 PCI: Check your devicetree.cb.
946 09:47:07.953475 PCI: 00:02.0 scanning...
947 09:47:07.956611 scan_generic_bus for PCI: 00:02.0
948 09:47:07.960004 scan_generic_bus for PCI: 00:02.0 done
949 09:47:07.963252 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 09:47:07.966642 PCI: 00:04.0 scanning...
951 09:47:07.970757 scan_generic_bus for PCI: 00:04.0
952 09:47:07.973163 GENERIC: 0.0 enabled
953 09:47:07.979884 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 09:47:07.983291 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 09:47:07.986429 PCI: 00:0d.0 scanning...
956 09:47:07.989945 scan_static_bus for PCI: 00:0d.0
957 09:47:07.993365 USB0 port 0 enabled
958 09:47:07.993450 USB0 port 0 scanning...
959 09:47:07.996450 scan_static_bus for USB0 port 0
960 09:47:07.999785 USB3 port 0 enabled
961 09:47:08.003351 USB3 port 1 enabled
962 09:47:08.003438 USB3 port 2 disabled
963 09:47:08.006850 USB3 port 3 disabled
964 09:47:08.009586 USB3 port 0 scanning...
965 09:47:08.012993 scan_static_bus for USB3 port 0
966 09:47:08.016432 scan_static_bus for USB3 port 0 done
967 09:47:08.019679 scan_bus: bus USB3 port 0 finished in 6 msecs
968 09:47:08.024091 USB3 port 1 scanning...
969 09:47:08.026339 scan_static_bus for USB3 port 1
970 09:47:08.029551 scan_static_bus for USB3 port 1 done
971 09:47:08.033485 scan_bus: bus USB3 port 1 finished in 6 msecs
972 09:47:08.039768 scan_static_bus for USB0 port 0 done
973 09:47:08.043337 scan_bus: bus USB0 port 0 finished in 43 msecs
974 09:47:08.046561 scan_static_bus for PCI: 00:0d.0 done
975 09:47:08.052818 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 09:47:08.052903 PCI: 00:14.0 scanning...
977 09:47:08.056480 scan_static_bus for PCI: 00:14.0
978 09:47:08.059538 USB0 port 0 enabled
979 09:47:08.062828 USB0 port 0 scanning...
980 09:47:08.066127 scan_static_bus for USB0 port 0
981 09:47:08.066212 USB2 port 0 disabled
982 09:47:08.069799 USB2 port 1 enabled
983 09:47:08.072886 USB2 port 2 enabled
984 09:47:08.072970 USB2 port 3 disabled
985 09:47:08.075910 USB2 port 4 enabled
986 09:47:08.079831 USB2 port 5 disabled
987 09:47:08.079915 USB2 port 6 disabled
988 09:47:08.082646 USB2 port 7 disabled
989 09:47:08.086108 USB2 port 8 disabled
990 09:47:08.086193 USB2 port 9 disabled
991 09:47:08.089363 USB3 port 0 disabled
992 09:47:08.089448 USB3 port 1 enabled
993 09:47:08.092961 USB3 port 2 disabled
994 09:47:08.096234 USB3 port 3 disabled
995 09:47:08.096320 USB2 port 1 scanning...
996 09:47:08.099611 scan_static_bus for USB2 port 1
997 09:47:08.105950 scan_static_bus for USB2 port 1 done
998 09:47:08.109428 scan_bus: bus USB2 port 1 finished in 6 msecs
999 09:47:08.112852 USB2 port 2 scanning...
1000 09:47:08.116266 scan_static_bus for USB2 port 2
1001 09:47:08.120006 scan_static_bus for USB2 port 2 done
1002 09:47:08.122765 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 09:47:08.126129 USB2 port 4 scanning...
1004 09:47:08.129669 scan_static_bus for USB2 port 4
1005 09:47:08.132840 scan_static_bus for USB2 port 4 done
1006 09:47:08.139441 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 09:47:08.139526 USB3 port 1 scanning...
1008 09:47:08.142699 scan_static_bus for USB3 port 1
1009 09:47:08.146214 scan_static_bus for USB3 port 1 done
1010 09:47:08.152429 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 09:47:08.156075 scan_static_bus for USB0 port 0 done
1012 09:47:08.159049 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 09:47:08.165775 scan_static_bus for PCI: 00:14.0 done
1014 09:47:08.169007 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 09:47:08.172877 PCI: 00:14.3 scanning...
1016 09:47:08.175834 scan_static_bus for PCI: 00:14.3
1017 09:47:08.175920 GENERIC: 0.0 enabled
1018 09:47:08.182406 scan_static_bus for PCI: 00:14.3 done
1019 09:47:08.186578 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 09:47:08.189788 PCI: 00:15.0 scanning...
1021 09:47:08.193525 scan_static_bus for PCI: 00:15.0
1022 09:47:08.193642 I2C: 00:1a enabled
1023 09:47:08.196640 I2C: 00:31 enabled
1024 09:47:08.196725 I2C: 00:32 enabled
1025 09:47:08.203147 scan_static_bus for PCI: 00:15.0 done
1026 09:47:08.206310 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 09:47:08.209836 PCI: 00:15.1 scanning...
1028 09:47:08.212971 scan_static_bus for PCI: 00:15.1
1029 09:47:08.213055 I2C: 00:10 enabled
1030 09:47:08.219577 scan_static_bus for PCI: 00:15.1 done
1031 09:47:08.222890 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 09:47:08.226221 PCI: 00:15.2 scanning...
1033 09:47:08.229597 scan_static_bus for PCI: 00:15.2
1034 09:47:08.232855 scan_static_bus for PCI: 00:15.2 done
1035 09:47:08.236133 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 09:47:08.239339 PCI: 00:15.3 scanning...
1037 09:47:08.242881 scan_static_bus for PCI: 00:15.3
1038 09:47:08.246550 scan_static_bus for PCI: 00:15.3 done
1039 09:47:08.252852 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 09:47:08.256176 PCI: 00:19.1 scanning...
1041 09:47:08.259350 scan_static_bus for PCI: 00:19.1
1042 09:47:08.259434 I2C: 00:15 enabled
1043 09:47:08.262956 scan_static_bus for PCI: 00:19.1 done
1044 09:47:08.269335 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 09:47:08.272396 PCI: 00:1d.0 scanning...
1046 09:47:08.275787 do_pci_scan_bridge for PCI: 00:1d.0
1047 09:47:08.279456 PCI: pci_scan_bus for bus 01
1048 09:47:08.282257 PCI: 01:00.0 [1c5c/174a] enabled
1049 09:47:08.282342 GENERIC: 0.0 enabled
1050 09:47:08.288929 Enabling Common Clock Configuration
1051 09:47:08.292656 L1 Sub-State supported from root port 29
1052 09:47:08.295708 L1 Sub-State Support = 0xf
1053 09:47:08.295793 CommonModeRestoreTime = 0x28
1054 09:47:08.302346 Power On Value = 0x16, Power On Scale = 0x0
1055 09:47:08.302432 ASPM: Enabled L1
1056 09:47:08.309284 PCIe: Max_Payload_Size adjusted to 128
1057 09:47:08.312320 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 09:47:08.315400 PCI: 00:1e.2 scanning...
1059 09:47:08.318710 scan_generic_bus for PCI: 00:1e.2
1060 09:47:08.318797 SPI: 00 enabled
1061 09:47:08.326108 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 09:47:08.332097 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 09:47:08.332182 PCI: 00:1e.3 scanning...
1064 09:47:08.338714 scan_generic_bus for PCI: 00:1e.3
1065 09:47:08.338798 SPI: 00 enabled
1066 09:47:08.345716 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 09:47:08.348782 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 09:47:08.352224 PCI: 00:1f.0 scanning...
1069 09:47:08.355605 scan_static_bus for PCI: 00:1f.0
1070 09:47:08.358488 PNP: 0c09.0 enabled
1071 09:47:08.358572 PNP: 0c09.0 scanning...
1072 09:47:08.362097 scan_static_bus for PNP: 0c09.0
1073 09:47:08.369370 scan_static_bus for PNP: 0c09.0 done
1074 09:47:08.372058 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 09:47:08.375452 scan_static_bus for PCI: 00:1f.0 done
1076 09:47:08.382295 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 09:47:08.382378 PCI: 00:1f.2 scanning...
1078 09:47:08.385934 scan_static_bus for PCI: 00:1f.2
1079 09:47:08.388974 GENERIC: 0.0 enabled
1080 09:47:08.392283 GENERIC: 0.0 scanning...
1081 09:47:08.395598 scan_static_bus for GENERIC: 0.0
1082 09:47:08.399089 GENERIC: 0.0 enabled
1083 09:47:08.399172 GENERIC: 1.0 enabled
1084 09:47:08.402171 scan_static_bus for GENERIC: 0.0 done
1085 09:47:08.408722 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 09:47:08.412150 scan_static_bus for PCI: 00:1f.2 done
1087 09:47:08.415708 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 09:47:08.418934 PCI: 00:1f.3 scanning...
1089 09:47:08.422109 scan_static_bus for PCI: 00:1f.3
1090 09:47:08.425327 scan_static_bus for PCI: 00:1f.3 done
1091 09:47:08.432717 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 09:47:08.432801 PCI: 00:1f.5 scanning...
1093 09:47:08.438931 scan_generic_bus for PCI: 00:1f.5
1094 09:47:08.442276 scan_generic_bus for PCI: 00:1f.5 done
1095 09:47:08.445551 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 09:47:08.452190 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 09:47:08.455609 scan_static_bus for Root Device done
1098 09:47:08.458737 scan_bus: bus Root Device finished in 737 msecs
1099 09:47:08.458822 done
1100 09:47:08.465397 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 09:47:08.468982 Chrome EC: UHEPI supported
1102 09:47:08.475726 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 09:47:08.482133 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 09:47:08.485485 SPI flash protection: WPSW=0 SRP0=0
1105 09:47:08.488591 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 09:47:08.495311 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 09:47:08.498736 found VGA at PCI: 00:02.0
1108 09:47:08.501793 Setting up VGA for PCI: 00:02.0
1109 09:47:08.505418 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 09:47:08.511935 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 09:47:08.515708 Allocating resources...
1112 09:47:08.515811 Reading resources...
1113 09:47:08.521933 Root Device read_resources bus 0 link: 0
1114 09:47:08.525218 DOMAIN: 0000 read_resources bus 0 link: 0
1115 09:47:08.528510 PCI: 00:04.0 read_resources bus 1 link: 0
1116 09:47:08.535471 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 09:47:08.538770 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 09:47:08.545507 USB0 port 0 read_resources bus 0 link: 0
1119 09:47:08.548759 USB0 port 0 read_resources bus 0 link: 0 done
1120 09:47:08.555443 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 09:47:08.558870 PCI: 00:14.0 read_resources bus 0 link: 0
1122 09:47:08.562267 USB0 port 0 read_resources bus 0 link: 0
1123 09:47:08.569808 USB0 port 0 read_resources bus 0 link: 0 done
1124 09:47:08.573618 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 09:47:08.579927 PCI: 00:14.3 read_resources bus 0 link: 0
1126 09:47:08.583190 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 09:47:08.590366 PCI: 00:15.0 read_resources bus 0 link: 0
1128 09:47:08.593307 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 09:47:08.599839 PCI: 00:15.1 read_resources bus 0 link: 0
1130 09:47:08.602984 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 09:47:08.610305 PCI: 00:19.1 read_resources bus 0 link: 0
1132 09:47:08.613606 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 09:47:08.620785 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 09:47:08.623988 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 09:47:08.630803 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 09:47:08.633542 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 09:47:08.640615 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 09:47:08.643669 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 09:47:08.650220 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 09:47:08.653460 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 09:47:08.657097 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 09:47:08.663622 GENERIC: 0.0 read_resources bus 0 link: 0
1143 09:47:08.667456 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 09:47:08.673745 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 09:47:08.681268 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 09:47:08.683693 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 09:47:08.687212 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 09:47:08.694140 Root Device read_resources bus 0 link: 0 done
1149 09:47:08.697595 Done reading resources.
1150 09:47:08.701433 Show resources in subtree (Root Device)...After reading.
1151 09:47:08.707221 Root Device child on link 0 DOMAIN: 0000
1152 09:47:08.710611 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 09:47:08.720612 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 09:47:08.730392 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 09:47:08.730477 PCI: 00:00.0
1156 09:47:08.740070 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 09:47:08.750344 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 09:47:08.760316 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 09:47:08.769773 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 09:47:08.776441 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 09:47:08.786495 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 09:47:08.796798 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 09:47:08.806455 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 09:47:08.816863 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 09:47:08.826435 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 09:47:08.832988 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 09:47:08.842965 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 09:47:08.853263 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 09:47:08.862948 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 09:47:08.872872 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 09:47:08.879423 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 09:47:08.892762 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 09:47:08.899419 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 09:47:08.909335 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 09:47:08.918985 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 09:47:08.922394 PCI: 00:02.0
1177 09:47:08.932275 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 09:47:08.942163 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 09:47:08.949332 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 09:47:08.955710 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 09:47:08.965527 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 09:47:08.965619 GENERIC: 0.0
1183 09:47:08.969022 PCI: 00:05.0
1184 09:47:08.978868 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 09:47:08.982076 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 09:47:08.985351 GENERIC: 0.0
1187 09:47:08.985434 PCI: 00:08.0
1188 09:47:08.995746 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 09:47:08.998863 PCI: 00:0a.0
1190 09:47:09.002602 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 09:47:09.011965 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 09:47:09.015390 USB0 port 0 child on link 0 USB3 port 0
1193 09:47:09.018655 USB3 port 0
1194 09:47:09.018738 USB3 port 1
1195 09:47:09.022011 USB3 port 2
1196 09:47:09.022094 USB3 port 3
1197 09:47:09.028874 PCI: 00:14.0 child on link 0 USB0 port 0
1198 09:47:09.038599 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 09:47:09.042064 USB0 port 0 child on link 0 USB2 port 0
1200 09:47:09.045359 USB2 port 0
1201 09:47:09.045442 USB2 port 1
1202 09:47:09.048525 USB2 port 2
1203 09:47:09.048609 USB2 port 3
1204 09:47:09.051934 USB2 port 4
1205 09:47:09.052018 USB2 port 5
1206 09:47:09.055554 USB2 port 6
1207 09:47:09.055637 USB2 port 7
1208 09:47:09.058964 USB2 port 8
1209 09:47:09.059047 USB2 port 9
1210 09:47:09.061978 USB3 port 0
1211 09:47:09.062064 USB3 port 1
1212 09:47:09.065616 USB3 port 2
1213 09:47:09.068641 USB3 port 3
1214 09:47:09.068724 PCI: 00:14.2
1215 09:47:09.078578 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 09:47:09.089062 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 09:47:09.092177 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 09:47:09.101856 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 09:47:09.105193 GENERIC: 0.0
1220 09:47:09.108863 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 09:47:09.118459 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 09:47:09.122003 I2C: 00:1a
1223 09:47:09.122087 I2C: 00:31
1224 09:47:09.125637 I2C: 00:32
1225 09:47:09.128449 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 09:47:09.138593 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 09:47:09.138678 I2C: 00:10
1228 09:47:09.141723 PCI: 00:15.2
1229 09:47:09.151740 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 09:47:09.151825 PCI: 00:15.3
1231 09:47:09.161865 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 09:47:09.165186 PCI: 00:16.0
1233 09:47:09.175118 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 09:47:09.175204 PCI: 00:19.0
1235 09:47:09.181555 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 09:47:09.191371 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 09:47:09.191457 I2C: 00:15
1238 09:47:09.198387 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 09:47:09.204874 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 09:47:09.214759 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 09:47:09.224552 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 09:47:09.224637 GENERIC: 0.0
1243 09:47:09.227930 PCI: 01:00.0
1244 09:47:09.238471 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 09:47:09.248173 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 09:47:09.257857 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 09:47:09.257942 PCI: 00:1e.0
1248 09:47:09.268002 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 09:47:09.275167 PCI: 00:1e.2 child on link 0 SPI: 00
1250 09:47:09.284705 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 09:47:09.284792 SPI: 00
1252 09:47:09.287633 PCI: 00:1e.3 child on link 0 SPI: 00
1253 09:47:09.297753 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 09:47:09.301707 SPI: 00
1255 09:47:09.304580 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 09:47:09.311105 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 09:47:09.314555 PNP: 0c09.0
1258 09:47:09.324139 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 09:47:09.327975 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 09:47:09.337492 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 09:47:09.347454 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 09:47:09.351208 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 09:47:09.353964 GENERIC: 0.0
1264 09:47:09.354048 GENERIC: 1.0
1265 09:47:09.357455 PCI: 00:1f.3
1266 09:47:09.367699 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 09:47:09.377680 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 09:47:09.377766 PCI: 00:1f.5
1269 09:47:09.387353 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 09:47:09.390994 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 09:47:09.393958 APIC: 00
1272 09:47:09.394042 APIC: 02
1273 09:47:09.394108 APIC: 01
1274 09:47:09.397458 APIC: 05
1275 09:47:09.397543 APIC: 07
1276 09:47:09.397647 APIC: 06
1277 09:47:09.400990 APIC: 04
1278 09:47:09.401074 APIC: 03
1279 09:47:09.410706 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 09:47:09.414068 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 09:47:09.420989 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 09:47:09.427565 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 09:47:09.430567 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 09:47:09.434502 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 09:47:09.440616 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 09:47:09.447280 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 09:47:09.454234 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 09:47:09.460557 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 09:47:09.470363 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 09:47:09.474080 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 09:47:09.483808 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 09:47:09.490573 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 09:47:09.497305 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 09:47:09.500464 DOMAIN: 0000: Resource ranges:
1295 09:47:09.503458 * Base: 1000, Size: 800, Tag: 100
1296 09:47:09.507131 * Base: 1900, Size: e700, Tag: 100
1297 09:47:09.513410 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 09:47:09.520045 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 09:47:09.526956 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 09:47:09.533253 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 09:47:09.543812 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 09:47:09.550022 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 09:47:09.557101 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 09:47:09.566549 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 09:47:09.573362 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 09:47:09.579797 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 09:47:09.590044 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 09:47:09.596494 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 09:47:09.602889 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 09:47:09.613023 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 09:47:09.619649 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 09:47:09.626474 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 09:47:09.636456 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 09:47:09.642913 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 09:47:09.649313 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 09:47:09.659215 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 09:47:09.666318 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 09:47:09.672681 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 09:47:09.682780 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 09:47:09.689612 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 09:47:09.695823 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 09:47:09.699416 DOMAIN: 0000: Resource ranges:
1323 09:47:09.705758 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 09:47:09.710186 * Base: d0000000, Size: 28000000, Tag: 200
1325 09:47:09.712612 * Base: fa000000, Size: 1000000, Tag: 200
1326 09:47:09.719075 * Base: fb001000, Size: 2fff000, Tag: 200
1327 09:47:09.722464 * Base: fe010000, Size: 2e000, Tag: 200
1328 09:47:09.725786 * Base: fe03f000, Size: d41000, Tag: 200
1329 09:47:09.729534 * Base: fed88000, Size: 8000, Tag: 200
1330 09:47:09.732295 * Base: fed93000, Size: d000, Tag: 200
1331 09:47:09.739383 * Base: feda2000, Size: 1e000, Tag: 200
1332 09:47:09.742705 * Base: fede0000, Size: 1220000, Tag: 200
1333 09:47:09.745688 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 09:47:09.755590 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 09:47:09.762267 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 09:47:09.769407 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 09:47:09.775532 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 09:47:09.782483 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 09:47:09.788576 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 09:47:09.795580 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 09:47:09.801883 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 09:47:09.808522 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 09:47:09.815654 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 09:47:09.821862 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 09:47:09.828739 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 09:47:09.835314 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 09:47:09.842278 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 09:47:09.848473 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 09:47:09.855113 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 09:47:09.862136 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 09:47:09.868339 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 09:47:09.875449 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 09:47:09.882245 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 09:47:09.888363 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 09:47:09.895007 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 09:47:09.901836 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 09:47:09.908208 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 09:47:09.911698 PCI: 00:1d.0: Resource ranges:
1359 09:47:09.915695 * Base: 7fc00000, Size: 100000, Tag: 200
1360 09:47:09.921268 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 09:47:09.928305 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 09:47:09.934646 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 09:47:09.944611 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 09:47:09.951525 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 09:47:09.954434 Root Device assign_resources, bus 0 link: 0
1366 09:47:09.961436 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 09:47:09.968074 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 09:47:09.978283 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 09:47:09.985170 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 09:47:09.994571 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 09:47:09.997773 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 09:47:10.004191 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 09:47:10.010817 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 09:47:10.017861 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 09:47:10.027864 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 09:47:10.031340 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 09:47:10.037582 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 09:47:10.044368 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 09:47:10.050977 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 09:47:10.054330 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 09:47:10.061053 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 09:47:10.071004 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 09:47:10.077726 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 09:47:10.084746 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 09:47:10.087549 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 09:47:10.097811 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 09:47:10.101213 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 09:47:10.104726 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 09:47:10.114162 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 09:47:10.117999 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 09:47:10.124243 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 09:47:10.131739 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 09:47:10.140784 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 09:47:10.147402 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 09:47:10.157248 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 09:47:10.160698 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 09:47:10.164326 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 09:47:10.173955 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 09:47:10.184173 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 09:47:10.193869 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 09:47:10.197487 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 09:47:10.203640 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 09:47:10.213524 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 09:47:10.220414 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 09:47:10.228160 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 09:47:10.234218 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 09:47:10.236614 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 09:47:10.243569 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 09:47:10.250700 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 09:47:10.257122 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 09:47:10.260120 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 09:47:10.267039 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 09:47:10.270148 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 09:47:10.273738 LPC: Trying to open IO window from 800 size 1ff
1415 09:47:10.283966 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 09:47:10.290913 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 09:47:10.300624 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 09:47:10.304712 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 09:47:10.310280 Root Device assign_resources, bus 0 link: 0
1420 09:47:10.310364 Done setting resources.
1421 09:47:10.318141 Show resources in subtree (Root Device)...After assigning values.
1422 09:47:10.324096 Root Device child on link 0 DOMAIN: 0000
1423 09:47:10.327519 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 09:47:10.337148 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 09:47:10.346823 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 09:47:10.346907 PCI: 00:00.0
1427 09:47:10.357023 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 09:47:10.366860 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 09:47:10.376543 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 09:47:10.386793 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 09:47:10.393181 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 09:47:10.403380 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 09:47:10.413045 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 09:47:10.422713 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 09:47:10.433392 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 09:47:10.443080 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 09:47:10.449511 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 09:47:10.459337 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 09:47:10.469223 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 09:47:10.479352 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 09:47:10.489302 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 09:47:10.496235 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 09:47:10.505862 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 09:47:10.515810 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 09:47:10.525887 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 09:47:10.535680 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 09:47:10.539022 PCI: 00:02.0
1448 09:47:10.549001 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 09:47:10.559186 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 09:47:10.569074 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 09:47:10.572452 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 09:47:10.582373 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 09:47:10.585954 GENERIC: 0.0
1454 09:47:10.586037 PCI: 00:05.0
1455 09:47:10.595606 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 09:47:10.602044 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 09:47:10.602129 GENERIC: 0.0
1458 09:47:10.605534 PCI: 00:08.0
1459 09:47:10.615423 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 09:47:10.615507 PCI: 00:0a.0
1461 09:47:10.622040 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 09:47:10.632178 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 09:47:10.635242 USB0 port 0 child on link 0 USB3 port 0
1464 09:47:10.638598 USB3 port 0
1465 09:47:10.638679 USB3 port 1
1466 09:47:10.642133 USB3 port 2
1467 09:47:10.642215 USB3 port 3
1468 09:47:10.648779 PCI: 00:14.0 child on link 0 USB0 port 0
1469 09:47:10.658778 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 09:47:10.662086 USB0 port 0 child on link 0 USB2 port 0
1471 09:47:10.665395 USB2 port 0
1472 09:47:10.665476 USB2 port 1
1473 09:47:10.668628 USB2 port 2
1474 09:47:10.668710 USB2 port 3
1475 09:47:10.672102 USB2 port 4
1476 09:47:10.672183 USB2 port 5
1477 09:47:10.675084 USB2 port 6
1478 09:47:10.675166 USB2 port 7
1479 09:47:10.678806 USB2 port 8
1480 09:47:10.678889 USB2 port 9
1481 09:47:10.682394 USB3 port 0
1482 09:47:10.682476 USB3 port 1
1483 09:47:10.685239 USB3 port 2
1484 09:47:10.689021 USB3 port 3
1485 09:47:10.689103 PCI: 00:14.2
1486 09:47:10.698778 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 09:47:10.708460 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 09:47:10.715528 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 09:47:10.725309 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 09:47:10.725393 GENERIC: 0.0
1491 09:47:10.731700 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 09:47:10.742221 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 09:47:10.742306 I2C: 00:1a
1494 09:47:10.745130 I2C: 00:31
1495 09:47:10.745213 I2C: 00:32
1496 09:47:10.748432 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 09:47:10.761627 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 09:47:10.761712 I2C: 00:10
1499 09:47:10.761777 PCI: 00:15.2
1500 09:47:10.774706 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 09:47:10.774790 PCI: 00:15.3
1502 09:47:10.784841 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 09:47:10.788041 PCI: 00:16.0
1504 09:47:10.798286 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 09:47:10.798389 PCI: 00:19.0
1506 09:47:10.804849 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 09:47:10.814749 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 09:47:10.814835 I2C: 00:15
1509 09:47:10.821484 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 09:47:10.828231 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 09:47:10.841317 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 09:47:10.851567 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 09:47:10.854856 GENERIC: 0.0
1514 09:47:10.854939 PCI: 01:00.0
1515 09:47:10.865037 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 09:47:10.874830 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 09:47:10.887569 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 09:47:10.887655 PCI: 00:1e.0
1519 09:47:10.897892 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 09:47:10.904656 PCI: 00:1e.2 child on link 0 SPI: 00
1521 09:47:10.914437 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 09:47:10.914523 SPI: 00
1523 09:47:10.917672 PCI: 00:1e.3 child on link 0 SPI: 00
1524 09:47:10.927630 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 09:47:10.931643 SPI: 00
1526 09:47:10.934636 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 09:47:10.944713 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 09:47:10.944798 PNP: 0c09.0
1529 09:47:10.954069 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 09:47:10.957532 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 09:47:10.967495 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 09:47:10.977750 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 09:47:10.980777 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 09:47:10.984189 GENERIC: 0.0
1535 09:47:10.984272 GENERIC: 1.0
1536 09:47:10.987678 PCI: 00:1f.3
1537 09:47:10.997470 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 09:47:11.007129 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 09:47:11.011175 PCI: 00:1f.5
1540 09:47:11.020500 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 09:47:11.023789 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 09:47:11.023875 APIC: 00
1543 09:47:11.027123 APIC: 02
1544 09:47:11.027207 APIC: 01
1545 09:47:11.030552 APIC: 05
1546 09:47:11.030636 APIC: 07
1547 09:47:11.030719 APIC: 06
1548 09:47:11.033825 APIC: 04
1549 09:47:11.033909 APIC: 03
1550 09:47:11.037260 Done allocating resources.
1551 09:47:11.044316 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 09:47:11.050482 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 09:47:11.053769 Configure GPIOs for I2S audio on UP4.
1554 09:47:11.060167 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 09:47:11.063482 Enabling resources...
1556 09:47:11.067231 PCI: 00:00.0 subsystem <- 8086/9a12
1557 09:47:11.067316 PCI: 00:00.0 cmd <- 06
1558 09:47:11.074260 PCI: 00:02.0 subsystem <- 8086/9a40
1559 09:47:11.074344 PCI: 00:02.0 cmd <- 03
1560 09:47:11.076961 PCI: 00:04.0 subsystem <- 8086/9a03
1561 09:47:11.080456 PCI: 00:04.0 cmd <- 02
1562 09:47:11.083556 PCI: 00:05.0 subsystem <- 8086/9a19
1563 09:47:11.087383 PCI: 00:05.0 cmd <- 02
1564 09:47:11.090339 PCI: 00:08.0 subsystem <- 8086/9a11
1565 09:47:11.093739 PCI: 00:08.0 cmd <- 06
1566 09:47:11.096903 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 09:47:11.100130 PCI: 00:0d.0 cmd <- 02
1568 09:47:11.103540 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 09:47:11.106789 PCI: 00:14.0 cmd <- 02
1570 09:47:11.110071 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 09:47:11.113551 PCI: 00:14.2 cmd <- 02
1572 09:47:11.116616 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 09:47:11.116701 PCI: 00:14.3 cmd <- 02
1574 09:47:11.123443 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 09:47:11.123528 PCI: 00:15.0 cmd <- 02
1576 09:47:11.126740 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 09:47:11.130139 PCI: 00:15.1 cmd <- 02
1578 09:47:11.133329 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 09:47:11.136577 PCI: 00:15.2 cmd <- 02
1580 09:47:11.140082 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 09:47:11.143195 PCI: 00:15.3 cmd <- 02
1582 09:47:11.146686 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 09:47:11.150340 PCI: 00:16.0 cmd <- 02
1584 09:47:11.153556 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 09:47:11.156568 PCI: 00:19.1 cmd <- 02
1586 09:47:11.160465 PCI: 00:1d.0 bridge ctrl <- 0013
1587 09:47:11.163444 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 09:47:11.163528 PCI: 00:1d.0 cmd <- 06
1589 09:47:11.170238 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 09:47:11.170321 PCI: 00:1e.0 cmd <- 06
1591 09:47:11.173414 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 09:47:11.176602 PCI: 00:1e.2 cmd <- 06
1593 09:47:11.179985 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 09:47:11.183452 PCI: 00:1e.3 cmd <- 02
1595 09:47:11.186631 PCI: 00:1f.0 subsystem <- 8086/a087
1596 09:47:11.189856 PCI: 00:1f.0 cmd <- 407
1597 09:47:11.193169 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 09:47:11.196638 PCI: 00:1f.3 cmd <- 02
1599 09:47:11.199695 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 09:47:11.203159 PCI: 00:1f.5 cmd <- 406
1601 09:47:11.207198 PCI: 01:00.0 cmd <- 02
1602 09:47:11.211085 done.
1603 09:47:11.214598 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 09:47:11.217743 Initializing devices...
1605 09:47:11.221039 Root Device init
1606 09:47:11.224380 Chrome EC: Set SMI mask to 0x0000000000000000
1607 09:47:11.231097 Chrome EC: clear events_b mask to 0x0000000000000000
1608 09:47:11.237947 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 09:47:11.240839 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 09:47:11.247604 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 09:47:11.254278 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 09:47:11.257543 fw_config match found: DB_USB=USB3_ACTIVE
1613 09:47:11.263932 Configure Right Type-C port orientation for retimer
1614 09:47:11.267677 Root Device init finished in 42 msecs
1615 09:47:11.271536 PCI: 00:00.0 init
1616 09:47:11.271620 CPU TDP = 9 Watts
1617 09:47:11.274389 CPU PL1 = 9 Watts
1618 09:47:11.277534 CPU PL2 = 40 Watts
1619 09:47:11.277638 CPU PL4 = 83 Watts
1620 09:47:11.280742 PCI: 00:00.0 init finished in 8 msecs
1621 09:47:11.284465 PCI: 00:02.0 init
1622 09:47:11.287551 GMA: Found VBT in CBFS
1623 09:47:11.291320 GMA: Found valid VBT in CBFS
1624 09:47:11.294208 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 09:47:11.304016 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 09:47:11.307537 PCI: 00:02.0 init finished in 18 msecs
1627 09:47:11.310856 PCI: 00:05.0 init
1628 09:47:11.314147 PCI: 00:05.0 init finished in 0 msecs
1629 09:47:11.314230 PCI: 00:08.0 init
1630 09:47:11.320471 PCI: 00:08.0 init finished in 0 msecs
1631 09:47:11.320555 PCI: 00:14.0 init
1632 09:47:11.327216 PCI: 00:14.0 init finished in 0 msecs
1633 09:47:11.327299 PCI: 00:14.2 init
1634 09:47:11.330523 PCI: 00:14.2 init finished in 0 msecs
1635 09:47:11.334448 PCI: 00:15.0 init
1636 09:47:11.337993 I2C bus 0 version 0x3230302a
1637 09:47:11.340948 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 09:47:11.344053 PCI: 00:15.0 init finished in 6 msecs
1639 09:47:11.347257 PCI: 00:15.1 init
1640 09:47:11.351258 I2C bus 1 version 0x3230302a
1641 09:47:11.354271 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 09:47:11.357247 PCI: 00:15.1 init finished in 6 msecs
1643 09:47:11.360726 PCI: 00:15.2 init
1644 09:47:11.363804 I2C bus 2 version 0x3230302a
1645 09:47:11.367406 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 09:47:11.370639 PCI: 00:15.2 init finished in 6 msecs
1647 09:47:11.370724 PCI: 00:15.3 init
1648 09:47:11.374255 I2C bus 3 version 0x3230302a
1649 09:47:11.377402 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 09:47:11.383989 PCI: 00:15.3 init finished in 6 msecs
1651 09:47:11.384073 PCI: 00:16.0 init
1652 09:47:11.387315 PCI: 00:16.0 init finished in 0 msecs
1653 09:47:11.391335 PCI: 00:19.1 init
1654 09:47:11.394361 I2C bus 5 version 0x3230302a
1655 09:47:11.397718 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 09:47:11.401344 PCI: 00:19.1 init finished in 6 msecs
1657 09:47:11.404299 PCI: 00:1d.0 init
1658 09:47:11.407651 Initializing PCH PCIe bridge.
1659 09:47:11.411138 PCI: 00:1d.0 init finished in 3 msecs
1660 09:47:11.414290 PCI: 00:1f.0 init
1661 09:47:11.417497 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 09:47:11.424661 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 09:47:11.424746 IOAPIC: ID = 0x02
1664 09:47:11.427386 IOAPIC: Dumping registers
1665 09:47:11.430559 reg 0x0000: 0x02000000
1666 09:47:11.430643 reg 0x0001: 0x00770020
1667 09:47:11.433908 reg 0x0002: 0x00000000
1668 09:47:11.437052 PCI: 00:1f.0 init finished in 21 msecs
1669 09:47:11.440688 PCI: 00:1f.2 init
1670 09:47:11.444752 Disabling ACPI via APMC.
1671 09:47:11.447518 APMC done.
1672 09:47:11.450999 PCI: 00:1f.2 init finished in 5 msecs
1673 09:47:11.462768 PCI: 01:00.0 init
1674 09:47:11.465084 PCI: 01:00.0 init finished in 0 msecs
1675 09:47:11.468467 PNP: 0c09.0 init
1676 09:47:11.475625 Google Chrome EC uptime: 8.438 seconds
1677 09:47:11.478373 Google Chrome AP resets since EC boot: 1
1678 09:47:11.481750 Google Chrome most recent AP reset causes:
1679 09:47:11.485001 0.349: 32775 shutdown: entering G3
1680 09:47:11.491724 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 09:47:11.494918 PNP: 0c09.0 init finished in 23 msecs
1682 09:47:11.501458 Devices initialized
1683 09:47:11.504658 Show all devs... After init.
1684 09:47:11.508192 Root Device: enabled 1
1685 09:47:11.508283 DOMAIN: 0000: enabled 1
1686 09:47:11.511932 CPU_CLUSTER: 0: enabled 1
1687 09:47:11.514914 PCI: 00:00.0: enabled 1
1688 09:47:11.518023 PCI: 00:02.0: enabled 1
1689 09:47:11.518109 PCI: 00:04.0: enabled 1
1690 09:47:11.521414 PCI: 00:05.0: enabled 1
1691 09:47:11.524684 PCI: 00:06.0: enabled 0
1692 09:47:11.528100 PCI: 00:07.0: enabled 0
1693 09:47:11.528190 PCI: 00:07.1: enabled 0
1694 09:47:11.531844 PCI: 00:07.2: enabled 0
1695 09:47:11.534900 PCI: 00:07.3: enabled 0
1696 09:47:11.538246 PCI: 00:08.0: enabled 1
1697 09:47:11.538332 PCI: 00:09.0: enabled 0
1698 09:47:11.541486 PCI: 00:0a.0: enabled 0
1699 09:47:11.544950 PCI: 00:0d.0: enabled 1
1700 09:47:11.545034 PCI: 00:0d.1: enabled 0
1701 09:47:11.549231 PCI: 00:0d.2: enabled 0
1702 09:47:11.551295 PCI: 00:0d.3: enabled 0
1703 09:47:11.554979 PCI: 00:0e.0: enabled 0
1704 09:47:11.555065 PCI: 00:10.2: enabled 1
1705 09:47:11.557946 PCI: 00:10.6: enabled 0
1706 09:47:11.561871 PCI: 00:10.7: enabled 0
1707 09:47:11.564425 PCI: 00:12.0: enabled 0
1708 09:47:11.564510 PCI: 00:12.6: enabled 0
1709 09:47:11.567975 PCI: 00:13.0: enabled 0
1710 09:47:11.571389 PCI: 00:14.0: enabled 1
1711 09:47:11.574599 PCI: 00:14.1: enabled 0
1712 09:47:11.574684 PCI: 00:14.2: enabled 1
1713 09:47:11.577914 PCI: 00:14.3: enabled 1
1714 09:47:11.581099 PCI: 00:15.0: enabled 1
1715 09:47:11.584819 PCI: 00:15.1: enabled 1
1716 09:47:11.584905 PCI: 00:15.2: enabled 1
1717 09:47:11.587993 PCI: 00:15.3: enabled 1
1718 09:47:11.591119 PCI: 00:16.0: enabled 1
1719 09:47:11.591204 PCI: 00:16.1: enabled 0
1720 09:47:11.595150 PCI: 00:16.2: enabled 0
1721 09:47:11.597838 PCI: 00:16.3: enabled 0
1722 09:47:11.600951 PCI: 00:16.4: enabled 0
1723 09:47:11.601040 PCI: 00:16.5: enabled 0
1724 09:47:11.604444 PCI: 00:17.0: enabled 0
1725 09:47:11.607952 PCI: 00:19.0: enabled 0
1726 09:47:11.611285 PCI: 00:19.1: enabled 1
1727 09:47:11.611370 PCI: 00:19.2: enabled 0
1728 09:47:11.614527 PCI: 00:1c.0: enabled 1
1729 09:47:11.618381 PCI: 00:1c.1: enabled 0
1730 09:47:11.621316 PCI: 00:1c.2: enabled 0
1731 09:47:11.621401 PCI: 00:1c.3: enabled 0
1732 09:47:11.624297 PCI: 00:1c.4: enabled 0
1733 09:47:11.627694 PCI: 00:1c.5: enabled 0
1734 09:47:11.627778 PCI: 00:1c.6: enabled 1
1735 09:47:11.631155 PCI: 00:1c.7: enabled 0
1736 09:47:11.634706 PCI: 00:1d.0: enabled 1
1737 09:47:11.637793 PCI: 00:1d.1: enabled 0
1738 09:47:11.637878 PCI: 00:1d.2: enabled 1
1739 09:47:11.641086 PCI: 00:1d.3: enabled 0
1740 09:47:11.644460 PCI: 00:1e.0: enabled 1
1741 09:47:11.647559 PCI: 00:1e.1: enabled 0
1742 09:47:11.647643 PCI: 00:1e.2: enabled 1
1743 09:47:11.651121 PCI: 00:1e.3: enabled 1
1744 09:47:11.654344 PCI: 00:1f.0: enabled 1
1745 09:47:11.657470 PCI: 00:1f.1: enabled 0
1746 09:47:11.657555 PCI: 00:1f.2: enabled 1
1747 09:47:11.660908 PCI: 00:1f.3: enabled 1
1748 09:47:11.664930 PCI: 00:1f.4: enabled 0
1749 09:47:11.667600 PCI: 00:1f.5: enabled 1
1750 09:47:11.667685 PCI: 00:1f.6: enabled 0
1751 09:47:11.671120 PCI: 00:1f.7: enabled 0
1752 09:47:11.674461 APIC: 00: enabled 1
1753 09:47:11.674545 GENERIC: 0.0: enabled 1
1754 09:47:11.677420 GENERIC: 0.0: enabled 1
1755 09:47:11.681018 GENERIC: 1.0: enabled 1
1756 09:47:11.684405 GENERIC: 0.0: enabled 1
1757 09:47:11.684489 GENERIC: 1.0: enabled 1
1758 09:47:11.687373 USB0 port 0: enabled 1
1759 09:47:11.690753 GENERIC: 0.0: enabled 1
1760 09:47:11.690838 USB0 port 0: enabled 1
1761 09:47:11.694230 GENERIC: 0.0: enabled 1
1762 09:47:11.697901 I2C: 00:1a: enabled 1
1763 09:47:11.700895 I2C: 00:31: enabled 1
1764 09:47:11.700982 I2C: 00:32: enabled 1
1765 09:47:11.704944 I2C: 00:10: enabled 1
1766 09:47:11.707327 I2C: 00:15: enabled 1
1767 09:47:11.707412 GENERIC: 0.0: enabled 0
1768 09:47:11.710648 GENERIC: 1.0: enabled 0
1769 09:47:11.714151 GENERIC: 0.0: enabled 1
1770 09:47:11.714236 SPI: 00: enabled 1
1771 09:47:11.717495 SPI: 00: enabled 1
1772 09:47:11.721006 PNP: 0c09.0: enabled 1
1773 09:47:11.721091 GENERIC: 0.0: enabled 1
1774 09:47:11.723939 USB3 port 0: enabled 1
1775 09:47:11.727164 USB3 port 1: enabled 1
1776 09:47:11.727250 USB3 port 2: enabled 0
1777 09:47:11.730572 USB3 port 3: enabled 0
1778 09:47:11.734141 USB2 port 0: enabled 0
1779 09:47:11.737680 USB2 port 1: enabled 1
1780 09:47:11.737765 USB2 port 2: enabled 1
1781 09:47:11.740613 USB2 port 3: enabled 0
1782 09:47:11.744035 USB2 port 4: enabled 1
1783 09:47:11.744120 USB2 port 5: enabled 0
1784 09:47:11.747249 USB2 port 6: enabled 0
1785 09:47:11.750555 USB2 port 7: enabled 0
1786 09:47:11.753746 USB2 port 8: enabled 0
1787 09:47:11.753830 USB2 port 9: enabled 0
1788 09:47:11.757032 USB3 port 0: enabled 0
1789 09:47:11.760548 USB3 port 1: enabled 1
1790 09:47:11.760633 USB3 port 2: enabled 0
1791 09:47:11.764087 USB3 port 3: enabled 0
1792 09:47:11.767169 GENERIC: 0.0: enabled 1
1793 09:47:11.770805 GENERIC: 1.0: enabled 1
1794 09:47:11.770889 APIC: 02: enabled 1
1795 09:47:11.774218 APIC: 01: enabled 1
1796 09:47:11.774302 APIC: 05: enabled 1
1797 09:47:11.777378 APIC: 07: enabled 1
1798 09:47:11.780325 APIC: 06: enabled 1
1799 09:47:11.780410 APIC: 04: enabled 1
1800 09:47:11.783545 APIC: 03: enabled 1
1801 09:47:11.786992 PCI: 01:00.0: enabled 1
1802 09:47:11.790916 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1803 09:47:11.796959 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 09:47:11.800309 ELOG: NV offset 0xf30000 size 0x1000
1805 09:47:11.806828 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 09:47:11.813548 ELOG: Event(17) added with size 13 at 2022-08-12 09:39:30 UTC
1807 09:47:11.820723 ELOG: Event(92) added with size 9 at 2022-08-12 09:39:30 UTC
1808 09:47:11.826980 ELOG: Event(93) added with size 9 at 2022-08-12 09:39:30 UTC
1809 09:47:11.833861 ELOG: Event(9E) added with size 10 at 2022-08-12 09:39:30 UTC
1810 09:47:11.840226 ELOG: Event(9F) added with size 14 at 2022-08-12 09:39:30 UTC
1811 09:47:11.843884 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 09:47:11.850312 ELOG: Event(A1) added with size 10 at 2022-08-12 09:39:30 UTC
1813 09:47:11.860206 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1814 09:47:11.867066 ELOG: Event(A0) added with size 9 at 2022-08-12 09:39:30 UTC
1815 09:47:11.870251 elog_add_boot_reason: Logged dev mode boot
1816 09:47:11.876895 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1817 09:47:11.876983 Finalize devices...
1818 09:47:11.880401 Devices finalized
1819 09:47:11.883404 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1820 09:47:11.890655 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1821 09:47:11.897026 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1822 09:47:11.900444 ME: HFSTS1 : 0x80030055
1823 09:47:11.904050 ME: HFSTS2 : 0x30280116
1824 09:47:11.909921 ME: HFSTS3 : 0x00000050
1825 09:47:11.913438 ME: HFSTS4 : 0x00004000
1826 09:47:11.916811 ME: HFSTS5 : 0x00000000
1827 09:47:11.923397 ME: HFSTS6 : 0x00400006
1828 09:47:11.926623 ME: Manufacturing Mode : YES
1829 09:47:11.930115 ME: SPI Protection Mode Enabled : NO
1830 09:47:11.933550 ME: FW Partition Table : OK
1831 09:47:11.936728 ME: Bringup Loader Failure : NO
1832 09:47:11.940134 ME: Firmware Init Complete : NO
1833 09:47:11.947037 ME: Boot Options Present : NO
1834 09:47:11.950478 ME: Update In Progress : NO
1835 09:47:11.953514 ME: D0i3 Support : YES
1836 09:47:11.956783 ME: Low Power State Enabled : NO
1837 09:47:11.959940 ME: CPU Replaced : YES
1838 09:47:11.963309 ME: CPU Replacement Valid : YES
1839 09:47:11.966814 ME: Current Working State : 5
1840 09:47:11.969964 ME: Current Operation State : 1
1841 09:47:11.976380 ME: Current Operation Mode : 3
1842 09:47:11.979655 ME: Error Code : 0
1843 09:47:11.983100 ME: Enhanced Debug Mode : NO
1844 09:47:11.986420 ME: CPU Debug Disabled : YES
1845 09:47:11.989850 ME: TXT Support : NO
1846 09:47:11.996355 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1847 09:47:12.003115 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1848 09:47:12.006309 CBFS: 'fallback/slic' not found.
1849 09:47:12.009766 ACPI: Writing ACPI tables at 76b01000.
1850 09:47:12.012747 ACPI: * FACS
1851 09:47:12.012831 ACPI: * DSDT
1852 09:47:12.016332 Ramoops buffer: 0x100000@0x76a00000.
1853 09:47:12.022718 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1854 09:47:12.026465 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1855 09:47:12.029860 Google Chrome EC: version:
1856 09:47:12.032885 ro: voema_v2.0.7540-147f8d37d1
1857 09:47:12.036522 rw: voema_v2.0.7540-147f8d37d1
1858 09:47:12.039713 running image: 2
1859 09:47:12.046756 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1860 09:47:12.049681 ACPI: * FADT
1861 09:47:12.049766 SCI is IRQ9
1862 09:47:12.053265 ACPI: added table 1/32, length now 40
1863 09:47:12.056220 ACPI: * SSDT
1864 09:47:12.059863 Found 1 CPU(s) with 8 core(s) each.
1865 09:47:12.062872 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1866 09:47:12.069467 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1867 09:47:12.072856 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1868 09:47:12.076058 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1869 09:47:12.082818 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1870 09:47:12.089291 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1871 09:47:12.092897 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1872 09:47:12.099191 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1873 09:47:12.105971 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1874 09:47:12.109235 \_SB.PCI0.RP09: Added StorageD3Enable property
1875 09:47:12.112645 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1876 09:47:12.119123 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1877 09:47:12.126195 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1878 09:47:12.129431 PS2K: Passing 80 keymaps to kernel
1879 09:47:12.136425 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1880 09:47:12.143209 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1881 09:47:12.149361 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1882 09:47:12.156273 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1883 09:47:12.162612 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1884 09:47:12.169233 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1885 09:47:12.175993 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1886 09:47:12.182758 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1887 09:47:12.185758 ACPI: added table 2/32, length now 44
1888 09:47:12.189879 ACPI: * MCFG
1889 09:47:12.192353 ACPI: added table 3/32, length now 48
1890 09:47:12.192437 ACPI: * TPM2
1891 09:47:12.196107 TPM2 log created at 0x769f0000
1892 09:47:12.199151 ACPI: added table 4/32, length now 52
1893 09:47:12.202555 ACPI: * MADT
1894 09:47:12.202643 SCI is IRQ9
1895 09:47:12.206652 ACPI: added table 5/32, length now 56
1896 09:47:12.209192 current = 76b09850
1897 09:47:12.209277 ACPI: * DMAR
1898 09:47:12.215739 ACPI: added table 6/32, length now 60
1899 09:47:12.220119 ACPI: added table 7/32, length now 64
1900 09:47:12.220204 ACPI: * HPET
1901 09:47:12.222763 ACPI: added table 8/32, length now 68
1902 09:47:12.225489 ACPI: done.
1903 09:47:12.228885 ACPI tables: 35216 bytes.
1904 09:47:12.228969 smbios_write_tables: 769ef000
1905 09:47:12.232363 EC returned error result code 3
1906 09:47:12.235565 Couldn't obtain OEM name from CBI
1907 09:47:12.239515 Create SMBIOS type 16
1908 09:47:12.242894 Create SMBIOS type 17
1909 09:47:12.246240 GENERIC: 0.0 (WIFI Device)
1910 09:47:12.246324 SMBIOS tables: 1750 bytes.
1911 09:47:12.253169 Writing table forward entry at 0x00000500
1912 09:47:12.259692 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1913 09:47:12.263326 Writing coreboot table at 0x76b25000
1914 09:47:12.269842 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1915 09:47:12.272982 1. 0000000000001000-000000000009ffff: RAM
1916 09:47:12.276356 2. 00000000000a0000-00000000000fffff: RESERVED
1917 09:47:12.282777 3. 0000000000100000-00000000769eefff: RAM
1918 09:47:12.286254 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1919 09:47:12.293050 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1920 09:47:12.299706 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1921 09:47:12.302866 7. 0000000077000000-000000007fbfffff: RESERVED
1922 09:47:12.306487 8. 00000000c0000000-00000000cfffffff: RESERVED
1923 09:47:12.312720 9. 00000000f8000000-00000000f9ffffff: RESERVED
1924 09:47:12.315946 10. 00000000fb000000-00000000fb000fff: RESERVED
1925 09:47:12.322770 11. 00000000fe000000-00000000fe00ffff: RESERVED
1926 09:47:12.325912 12. 00000000fed80000-00000000fed87fff: RESERVED
1927 09:47:12.332700 13. 00000000fed90000-00000000fed92fff: RESERVED
1928 09:47:12.335744 14. 00000000feda0000-00000000feda1fff: RESERVED
1929 09:47:12.342434 15. 00000000fedc0000-00000000feddffff: RESERVED
1930 09:47:12.345738 16. 0000000100000000-00000002803fffff: RAM
1931 09:47:12.349457 Passing 4 GPIOs to payload:
1932 09:47:12.352294 NAME | PORT | POLARITY | VALUE
1933 09:47:12.359021 lid | undefined | high | high
1934 09:47:12.362628 power | undefined | high | low
1935 09:47:12.369035 oprom | undefined | high | low
1936 09:47:12.375953 EC in RW | 0x000000e5 | high | high
1937 09:47:12.382457 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 9719
1938 09:47:12.382547 coreboot table: 1576 bytes.
1939 09:47:12.389219 IMD ROOT 0. 0x76fff000 0x00001000
1940 09:47:12.392070 IMD SMALL 1. 0x76ffe000 0x00001000
1941 09:47:12.395800 FSP MEMORY 2. 0x76c4e000 0x003b0000
1942 09:47:12.398926 VPD 3. 0x76c4d000 0x00000367
1943 09:47:12.402250 RO MCACHE 4. 0x76c4c000 0x00000fdc
1944 09:47:12.405678 CONSOLE 5. 0x76c2c000 0x00020000
1945 09:47:12.409004 FMAP 6. 0x76c2b000 0x00000578
1946 09:47:12.412311 TIME STAMP 7. 0x76c2a000 0x00000910
1947 09:47:12.418785 VBOOT WORK 8. 0x76c16000 0x00014000
1948 09:47:12.422081 ROMSTG STCK 9. 0x76c15000 0x00001000
1949 09:47:12.425532 AFTER CAR 10. 0x76c0a000 0x0000b000
1950 09:47:12.429873 RAMSTAGE 11. 0x76b97000 0x00073000
1951 09:47:12.432715 REFCODE 12. 0x76b42000 0x00055000
1952 09:47:12.435899 SMM BACKUP 13. 0x76b32000 0x00010000
1953 09:47:12.438782 4f444749 14. 0x76b30000 0x00002000
1954 09:47:12.442181 EXT VBT15. 0x76b2d000 0x0000219f
1955 09:47:12.445337 COREBOOT 16. 0x76b25000 0x00008000
1956 09:47:12.452009 ACPI 17. 0x76b01000 0x00024000
1957 09:47:12.455154 ACPI GNVS 18. 0x76b00000 0x00001000
1958 09:47:12.458627 RAMOOPS 19. 0x76a00000 0x00100000
1959 09:47:12.461840 TPM2 TCGLOG20. 0x769f0000 0x00010000
1960 09:47:12.465212 SMBIOS 21. 0x769ef000 0x00000800
1961 09:47:12.468642 IMD small region:
1962 09:47:12.471712 IMD ROOT 0. 0x76ffec00 0x00000400
1963 09:47:12.475000 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1964 09:47:12.478780 POWER STATE 2. 0x76ffeb80 0x00000044
1965 09:47:12.481892 ROMSTAGE 3. 0x76ffeb60 0x00000004
1966 09:47:12.485024 MEM INFO 4. 0x76ffe980 0x000001e0
1967 09:47:12.491674 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1968 09:47:12.494864 MTRR: Physical address space:
1969 09:47:12.501728 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1970 09:47:12.508642 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1971 09:47:12.515237 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1972 09:47:12.522023 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1973 09:47:12.528205 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1974 09:47:12.534600 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1975 09:47:12.538254 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1976 09:47:12.544931 MTRR: Fixed MSR 0x250 0x0606060606060606
1977 09:47:12.548398 MTRR: Fixed MSR 0x258 0x0606060606060606
1978 09:47:12.551306 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 09:47:12.554725 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 09:47:12.561575 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 09:47:12.564698 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 09:47:12.568262 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 09:47:12.571548 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 09:47:12.578217 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 09:47:12.581227 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 09:47:12.584600 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 09:47:12.587862 call enable_fixed_mtrr()
1988 09:47:12.591407 CPU physical address size: 39 bits
1989 09:47:12.597841 MTRR: default type WB/UC MTRR counts: 6/6.
1990 09:47:12.601171 MTRR: UC selected as default type.
1991 09:47:12.604527 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1992 09:47:12.611238 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1993 09:47:12.618046 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1994 09:47:12.624706 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1995 09:47:12.631051 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1996 09:47:12.637921 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1997 09:47:12.641097 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 09:47:12.647975 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 09:47:12.650786 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 09:47:12.654217 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 09:47:12.657789 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 09:47:12.664417 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 09:47:12.667603 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 09:47:12.670707 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 09:47:12.674423 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 09:47:12.681135 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 09:47:12.684672 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 09:47:12.684756
2009 09:47:12.687540 MTRR check
2010 09:47:12.687624 call enable_fixed_mtrr()
2011 09:47:12.691017 Fixed MTRRs : Enabled
2012 09:47:12.694304 Variable MTRRs: Enabled
2013 09:47:12.694388
2014 09:47:12.697719 CPU physical address size: 39 bits
2015 09:47:12.704162 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2016 09:47:12.707217 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 09:47:12.714555 MTRR: Fixed MSR 0x250 0x0606060606060606
2018 09:47:12.717326 MTRR: Fixed MSR 0x258 0x0606060606060606
2019 09:47:12.720651 MTRR: Fixed MSR 0x259 0x0000000000000000
2020 09:47:12.723793 MTRR: Fixed MSR 0x268 0x0606060606060606
2021 09:47:12.730465 MTRR: Fixed MSR 0x269 0x0606060606060606
2022 09:47:12.734656 MTRR: Fixed MSR 0x26a 0x0606060606060606
2023 09:47:12.737788 MTRR: Fixed MSR 0x26b 0x0606060606060606
2024 09:47:12.740490 MTRR: Fixed MSR 0x26c 0x0606060606060606
2025 09:47:12.743718 MTRR: Fixed MSR 0x26d 0x0606060606060606
2026 09:47:12.750857 MTRR: Fixed MSR 0x26e 0x0606060606060606
2027 09:47:12.753723 MTRR: Fixed MSR 0x26f 0x0606060606060606
2028 09:47:12.757098 MTRR: Fixed MSR 0x258 0x0606060606060606
2029 09:47:12.760278 call enable_fixed_mtrr()
2030 09:47:12.763556 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 09:47:12.770107 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 09:47:12.773853 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 09:47:12.777041 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 09:47:12.780423 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 09:47:12.787116 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 09:47:12.790159 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 09:47:12.793452 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 09:47:12.796927 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 09:47:12.800935 CPU physical address size: 39 bits
2040 09:47:12.807655 call enable_fixed_mtrr()
2041 09:47:12.810859 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 09:47:12.814795 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 09:47:12.817451 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 09:47:12.824155 MTRR: Fixed MSR 0x259 0x0000000000000000
2045 09:47:12.827577 MTRR: Fixed MSR 0x268 0x0606060606060606
2046 09:47:12.831502 MTRR: Fixed MSR 0x269 0x0606060606060606
2047 09:47:12.834518 MTRR: Fixed MSR 0x26a 0x0606060606060606
2048 09:47:12.838292 MTRR: Fixed MSR 0x26b 0x0606060606060606
2049 09:47:12.844173 MTRR: Fixed MSR 0x26c 0x0606060606060606
2050 09:47:12.847542 MTRR: Fixed MSR 0x26d 0x0606060606060606
2051 09:47:12.851067 MTRR: Fixed MSR 0x26e 0x0606060606060606
2052 09:47:12.854153 MTRR: Fixed MSR 0x26f 0x0606060606060606
2053 09:47:12.861706 MTRR: Fixed MSR 0x258 0x0606060606060606
2054 09:47:12.861792 call enable_fixed_mtrr()
2055 09:47:12.868240 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 09:47:12.871569 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 09:47:12.875206 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 09:47:12.878297 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 09:47:12.885152 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 09:47:12.888468 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 09:47:12.891600 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 09:47:12.894965 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 09:47:12.901718 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 09:47:12.904672 CPU physical address size: 39 bits
2065 09:47:12.907922 call enable_fixed_mtrr()
2066 09:47:12.911413 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 09:47:12.914835 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 09:47:12.921260 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 09:47:12.924905 MTRR: Fixed MSR 0x259 0x0000000000000000
2070 09:47:12.928279 MTRR: Fixed MSR 0x268 0x0606060606060606
2071 09:47:12.931559 MTRR: Fixed MSR 0x269 0x0606060606060606
2072 09:47:12.938138 MTRR: Fixed MSR 0x26a 0x0606060606060606
2073 09:47:12.941209 MTRR: Fixed MSR 0x26b 0x0606060606060606
2074 09:47:12.944985 MTRR: Fixed MSR 0x26c 0x0606060606060606
2075 09:47:12.947806 MTRR: Fixed MSR 0x26d 0x0606060606060606
2076 09:47:12.954458 MTRR: Fixed MSR 0x26e 0x0606060606060606
2077 09:47:12.957697 MTRR: Fixed MSR 0x26f 0x0606060606060606
2078 09:47:12.961060 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 09:47:12.967847 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 09:47:12.971422 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 09:47:12.974545 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 09:47:12.977849 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 09:47:12.984573 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 09:47:12.987537 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 09:47:12.991237 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 09:47:12.994578 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 09:47:13.001309 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 09:47:13.004189 call enable_fixed_mtrr()
2089 09:47:13.004273 call enable_fixed_mtrr()
2090 09:47:13.007785 CPU physical address size: 39 bits
2091 09:47:13.010862 Checking cr50 for pending updates
2092 09:47:13.014952 CPU physical address size: 39 bits
2093 09:47:13.022805 CPU physical address size: 39 bits
2094 09:47:13.022889 Reading cr50 TPM mode
2095 09:47:13.026191 CPU physical address size: 39 bits
2096 09:47:13.033448 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2097 09:47:13.042857 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2098 09:47:13.046117 Checking segment from ROM address 0xffc02b38
2099 09:47:13.050277 Checking segment from ROM address 0xffc02b54
2100 09:47:13.056134 Loading segment from ROM address 0xffc02b38
2101 09:47:13.056217 code (compression=0)
2102 09:47:13.066346 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2103 09:47:13.072979 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2104 09:47:13.076289 it's not compressed!
2105 09:47:13.215344 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2106 09:47:13.221904 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2107 09:47:13.228922 Loading segment from ROM address 0xffc02b54
2108 09:47:13.229005 Entry Point 0x30000000
2109 09:47:13.231910 Loaded segments
2110 09:47:13.238884 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2111 09:47:13.282368 Finalizing chipset.
2112 09:47:13.285477 Finalizing SMM.
2113 09:47:13.285596 APMC done.
2114 09:47:13.292838 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2115 09:47:13.295676 mp_park_aps done after 0 msecs.
2116 09:47:13.299283 Jumping to boot code at 0x30000000(0x76b25000)
2117 09:47:13.308638 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2118 09:47:13.308723
2119 09:47:13.312168 Starting depthcharge on Voema...
2120 09:47:13.312512 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2121 09:47:13.312615 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2122 09:47:13.312702 Setting prompt string to ['volteer:']
2123 09:47:13.312782 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2124 09:47:13.321921 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2125 09:47:13.328557 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2126 09:47:13.332086 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2127 09:47:13.338490 Failed to find eMMC card reader
2128 09:47:13.338586 Wipe memory regions:
2129 09:47:13.345253 [0x00000000001000, 0x000000000a0000)
2130 09:47:13.349073 [0x00000000100000, 0x00000030000000)
2131 09:47:13.377791 [0x00000032662db0, 0x000000769ef000)
2132 09:47:13.417504 [0x00000100000000, 0x00000280400000)
2133 09:47:13.621277 ec_init: CrosEC protocol v3 supported (256, 256)
2134 09:47:13.627833 update_port_state: port C0 state: usb enable 1 mux conn 0
2135 09:47:13.634558 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2136 09:47:13.643788 pmc_check_ipc_sts: STS_BUSY done after 2512 us
2137 09:47:13.646827 send_conn_disc_msg: pmc_send_cmd succeeded
2138 09:47:14.081933 R8152: Initializing
2139 09:47:14.084968 Version 6 (ocp_data = 5c30)
2140 09:47:14.087952 R8152: Done initializing
2141 09:47:14.091285 Adding net device
2142 09:47:14.397188 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2143 09:47:14.397772
2144 09:47:14.400738 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2146 09:47:14.502613 volteer: tftpboot 192.168.201.1 7023008/tftp-deploy-n0umc98g/kernel/bzImage 7023008/tftp-deploy-n0umc98g/kernel/cmdline 7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
2147 09:47:14.503271 Setting prompt string to 'Starting kernel'
2148 09:47:14.503674 Setting prompt string to ['Starting kernel']
2149 09:47:14.504129 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2150 09:47:14.504500 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2151 09:47:14.508359 tftpboot 192.168.201.1 7023008/tftp-deploy-n0umc98g/kernel/bzImoy-n0umc98g/kernel/cmdline 7023008/tftp-deploy-n0umc98g/ramdisk/ramdisk.cpio.gz
2152 09:47:14.508809 Waiting for link
2153 09:47:14.713068 done.
2154 09:47:14.713628 MAC: 00:24:32:30:78:74
2155 09:47:14.716274 Sending DHCP discover... done.
2156 09:47:14.719335 Waiting for reply... done.
2157 09:47:14.722771 Sending DHCP request... done.
2158 09:47:14.726103 Waiting for reply... done.
2159 09:47:14.729739 My ip is 192.168.201.10
2160 09:47:14.733718 The DHCP server ip is 192.168.201.1
2161 09:47:14.736180 TFTP server IP predefined by user: 192.168.201.1
2162 09:47:14.746227 Bootfile predefined by user: 7023008/tftp-deploy-n0umc98g/kernel/bzImage
2163 09:47:14.749342 Sending tftp read request... done.
2164 09:47:14.754724 Waiting for the transfer...
2165 09:47:15.406748 00000000 ################################################################
2166 09:47:16.065617 00080000 ################################################################
2167 09:47:16.751732 00100000 ################################################################
2168 09:47:17.438089 00180000 ################################################################
2169 09:47:18.129537 00200000 ################################################################
2170 09:47:18.823576 00280000 ################################################################
2171 09:47:19.494284 00300000 ################################################################
2172 09:47:20.135302 00380000 ################################################################
2173 09:47:20.821303 00400000 ################################################################
2174 09:47:21.493448 00480000 ################################################################
2175 09:47:22.179126 00500000 ################################################################
2176 09:47:22.876341 00580000 ################################################################
2177 09:47:23.565532 00600000 ################################################################ done.
2178 09:47:23.568639 The bootfile was 6815632 bytes long.
2179 09:47:23.571857 Sending tftp read request... done.
2180 09:47:23.575413 Waiting for the transfer...
2181 09:47:24.257892 00000000 ################################################################
2182 09:47:24.943444 00080000 ################################################################
2183 09:47:25.613533 00100000 ################################################################
2184 09:47:26.204372 00180000 ################################################################
2185 09:47:26.830769 00200000 ################################################################
2186 09:47:27.450966 00280000 ################################################################
2187 09:47:28.068169 00300000 ################################################################
2188 09:47:28.747689 00380000 ################################################################
2189 09:47:29.411437 00400000 ################################################################
2190 09:47:30.052668 00480000 ################################################################
2191 09:47:30.346793 00500000 ############################# done.
2192 09:47:30.350048 Sending tftp read request... done.
2193 09:47:30.353916 Waiting for the transfer...
2194 09:47:30.354012 00000000 # done.
2195 09:47:30.363432 Command line loaded dynamically from TFTP file: 7023008/tftp-deploy-n0umc98g/kernel/cmdline
2196 09:47:30.386829 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7023008/extract-nfsrootfs-l0emi888,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2197 09:47:30.394020 Shutting down all USB controllers.
2198 09:47:30.394317 Removing current net device
2199 09:47:30.397309 Finalizing coreboot
2200 09:47:30.403798 Exiting depthcharge with code 4 at timestamp: 25747818
2201 09:47:30.404188
2202 09:47:30.404452 Starting kernel ...
2203 09:47:30.404715
2204 09:47:30.404998
2205 09:47:30.405790 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2206 09:47:30.406238 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
2207 09:47:30.406584 Setting prompt string to ['Linux version [0-9]']
2208 09:47:30.406980 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2209 09:47:30.407311 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2211 09:51:56.407245 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
2213 09:51:56.408387 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
2215 09:51:56.409322 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2218 09:51:56.410865 end: 2 depthcharge-action (duration 00:05:00) [common]
2220 09:51:56.412138 Cleaning after the job
2221 09:51:56.412218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/ramdisk
2222 09:51:56.412663 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/kernel
2223 09:51:56.413160 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/nfsrootfs
2224 09:51:56.445353 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7023008/tftp-deploy-n0umc98g/modules
2225 09:51:56.445699 start: 5.1 power-off (timeout 00:00:30) [common]
2226 09:51:56.445862 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2227 09:51:56.464699 >> Command sent successfully.
2228 09:51:56.466455 Returned 0 in 0 seconds
2229 09:51:56.567918 end: 5.1 power-off (duration 00:00:00) [common]
2231 09:51:56.569722 start: 5.2 read-feedback (timeout 00:10:00) [common]
2232 09:51:56.570915 Listened to connection for namespace 'common' for up to 1s
2233 09:51:57.574613 Finalising connection for namespace 'common'
2234 09:51:57.574923 Disconnecting from shell: Finalise
2235 09:51:57.675733 end: 5.2 read-feedback (duration 00:00:01) [common]
2236 09:51:57.676435 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7023008
2237 09:51:57.773534 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7023008
2238 09:51:57.773798 JobError: Your job cannot terminate cleanly.