Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:34:53.024175 lava-dispatcher, installed at version: 2022.06
2 14:34:53.024388 start: 0 validate
3 14:34:53.024527 Start time: 2022-07-26 14:34:53.024519+00:00 (UTC)
4 14:34:53.024657 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:34:53.024794 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
6 14:34:53.315876 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:34:53.316626 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:34:53.613030 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:34:53.613805 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:34:53.909208 validate duration: 0.88
12 14:34:53.910433 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:34:53.910978 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:34:53.911433 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:34:53.911924 Not decompressing ramdisk as can be used compressed.
16 14:34:53.912360 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
17 14:34:53.912710 saving as /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/ramdisk/rootfs.cpio.gz
18 14:34:53.913035 total size: 8416091 (8MB)
19 14:34:53.917964 progress 0% (0MB)
20 14:34:53.928463 progress 5% (0MB)
21 14:34:53.937274 progress 10% (0MB)
22 14:34:53.943232 progress 15% (1MB)
23 14:34:53.947774 progress 20% (1MB)
24 14:34:53.951618 progress 25% (2MB)
25 14:34:53.955161 progress 30% (2MB)
26 14:34:53.958210 progress 35% (2MB)
27 14:34:53.961124 progress 40% (3MB)
28 14:34:53.963900 progress 45% (3MB)
29 14:34:53.966444 progress 50% (4MB)
30 14:34:53.968914 progress 55% (4MB)
31 14:34:53.971254 progress 60% (4MB)
32 14:34:53.973456 progress 65% (5MB)
33 14:34:53.975700 progress 70% (5MB)
34 14:34:53.978049 progress 75% (6MB)
35 14:34:53.980282 progress 80% (6MB)
36 14:34:53.982551 progress 85% (6MB)
37 14:34:53.984778 progress 90% (7MB)
38 14:34:53.986926 progress 95% (7MB)
39 14:34:53.989210 progress 100% (8MB)
40 14:34:53.989509 8MB downloaded in 0.08s (104.95MB/s)
41 14:34:53.989673 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:34:53.989941 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:34:53.990039 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:34:53.990134 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:34:53.990245 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:34:53.990319 saving as /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/kernel/bzImage
48 14:34:53.990387 total size: 6815632 (6MB)
49 14:34:53.990454 No compression specified
50 14:34:57.494685 progress 0% (0MB)
51 14:34:57.499950 progress 5% (0MB)
52 14:34:57.501726 progress 10% (0MB)
53 14:34:57.503579 progress 15% (1MB)
54 14:34:57.505414 progress 20% (1MB)
55 14:34:57.507095 progress 25% (1MB)
56 14:34:57.508996 progress 30% (1MB)
57 14:34:57.510712 progress 35% (2MB)
58 14:34:57.512578 progress 40% (2MB)
59 14:34:57.514280 progress 45% (2MB)
60 14:34:57.515940 progress 50% (3MB)
61 14:34:57.517800 progress 55% (3MB)
62 14:34:57.519453 progress 60% (3MB)
63 14:34:57.521356 progress 65% (4MB)
64 14:34:57.523010 progress 70% (4MB)
65 14:34:57.524661 progress 75% (4MB)
66 14:34:57.526537 progress 80% (5MB)
67 14:34:57.528195 progress 85% (5MB)
68 14:34:57.530043 progress 90% (5MB)
69 14:34:57.531739 progress 95% (6MB)
70 14:34:57.533488 progress 100% (6MB)
71 14:34:57.533782 6MB downloaded in 3.54s (1.83MB/s)
72 14:34:57.533938 end: 1.2.1 http-download (duration 00:00:04) [common]
74 14:34:57.534181 end: 1.2 download-retry (duration 00:00:04) [common]
75 14:34:57.534274 start: 1.3 download-retry (timeout 00:09:56) [common]
76 14:34:57.534364 start: 1.3.1 http-download (timeout 00:09:56) [common]
77 14:34:57.534473 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:34:57.534545 saving as /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/modules/modules.tar
79 14:34:57.534623 total size: 51868 (0MB)
80 14:34:57.534691 Using unxz to decompress xz
81 14:34:57.538287 progress 63% (0MB)
82 14:34:57.538682 progress 100% (0MB)
83 14:34:57.542227 0MB downloaded in 0.01s (6.51MB/s)
84 14:34:57.542465 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:34:57.542749 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:34:57.542855 start: 1.4 prepare-tftp-overlay (timeout 00:09:56) [common]
88 14:34:57.542960 start: 1.4.1 extract-nfsrootfs (timeout 00:09:56) [common]
89 14:34:57.543054 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:34:57.543151 start: 1.4.2 lava-overlay (timeout 00:09:56) [common]
91 14:34:57.543334 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i
92 14:34:57.543454 makedir: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin
93 14:34:57.543548 makedir: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/tests
94 14:34:57.543638 makedir: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/results
95 14:34:57.543752 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-add-keys
96 14:34:57.543893 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-add-sources
97 14:34:57.544021 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-background-process-start
98 14:34:57.544145 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-background-process-stop
99 14:34:57.544267 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-common-functions
100 14:34:57.544387 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-echo-ipv4
101 14:34:57.544513 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-install-packages
102 14:34:57.544636 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-installed-packages
103 14:34:57.544755 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-os-build
104 14:34:57.544875 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-probe-channel
105 14:34:57.544996 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-probe-ip
106 14:34:57.545169 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-target-ip
107 14:34:57.545291 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-target-mac
108 14:34:57.545411 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-target-storage
109 14:34:57.545535 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-case
110 14:34:57.545656 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-event
111 14:34:57.545777 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-feedback
112 14:34:57.545899 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-raise
113 14:34:57.546058 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-reference
114 14:34:57.546178 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-runner
115 14:34:57.546296 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-set
116 14:34:57.546415 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-test-shell
117 14:34:57.546535 Updating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-install-packages (oe)
118 14:34:57.546659 Updating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/bin/lava-installed-packages (oe)
119 14:34:57.546768 Creating /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/environment
120 14:34:57.546865 LAVA metadata
121 14:34:57.546943 - LAVA_JOB_ID=6895671
122 14:34:57.547015 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:34:57.547132 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:56) [common]
124 14:34:57.547204 skipped lava-vland-overlay
125 14:34:57.547289 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:34:57.547383 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
127 14:34:57.547453 skipped lava-multinode-overlay
128 14:34:57.547535 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:34:57.547626 start: 1.4.2.3 test-definition (timeout 00:09:56) [common]
130 14:34:57.547708 Loading test definitions
131 14:34:57.547813 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:56) [common]
132 14:34:57.547899 Using /lava-6895671 at stage 0
133 14:34:57.548216 uuid=6895671_1.4.2.3.1 testdef=None
134 14:34:57.548316 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:34:57.548413 start: 1.4.2.3.2 test-overlay (timeout 00:09:56) [common]
136 14:34:57.548939 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:34:57.549240 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:56) [common]
139 14:34:57.549878 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:34:57.550173 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
142 14:34:57.550769 runner path: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/0/tests/0_dmesg test_uuid 6895671_1.4.2.3.1
143 14:34:57.550933 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:34:57.551189 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:56) [common]
146 14:34:57.551270 Using /lava-6895671 at stage 1
147 14:34:57.551533 uuid=6895671_1.4.2.3.5 testdef=None
148 14:34:57.551633 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:34:57.551729 start: 1.4.2.3.6 test-overlay (timeout 00:09:56) [common]
150 14:34:57.552212 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:34:57.552461 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:56) [common]
153 14:34:57.553124 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:34:57.553401 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:56) [common]
156 14:34:57.554003 runner path: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/1/tests/1_bootrr test_uuid 6895671_1.4.2.3.5
157 14:34:57.554158 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:34:57.554390 Creating lava-test-runner.conf files
160 14:34:57.554461 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/0 for stage 0
161 14:34:57.554565 - 0_dmesg
162 14:34:57.554650 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895671/lava-overlay-mi6fqh8i/lava-6895671/1 for stage 1
163 14:34:57.554742 - 1_bootrr
164 14:34:57.554843 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:34:57.554938 start: 1.4.2.4 compress-overlay (timeout 00:09:56) [common]
166 14:34:57.561678 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:34:57.561798 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
168 14:34:57.561897 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:34:57.561993 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:34:57.562090 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
171 14:34:57.762543 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:34:57.762908 start: 1.4.4 extract-modules (timeout 00:09:56) [common]
173 14:34:57.763028 extracting modules file /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895671/extract-overlay-ramdisk-kp8a8vyi/ramdisk
174 14:34:57.767536 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:34:57.767659 start: 1.4.5 apply-overlay-tftp (timeout 00:09:56) [common]
176 14:34:57.767753 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895671/compress-overlay-xzggw0vq/overlay-1.4.2.4.tar.gz to ramdisk
177 14:34:57.767834 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895671/compress-overlay-xzggw0vq/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6895671/extract-overlay-ramdisk-kp8a8vyi/ramdisk
178 14:34:57.771961 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:34:57.772078 start: 1.4.6 configure-preseed-file (timeout 00:09:56) [common]
180 14:34:57.772177 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:34:57.772281 start: 1.4.7 compress-ramdisk (timeout 00:09:56) [common]
182 14:34:57.772368 Building ramdisk /var/lib/lava/dispatcher/tmp/6895671/extract-overlay-ramdisk-kp8a8vyi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6895671/extract-overlay-ramdisk-kp8a8vyi/ramdisk
183 14:34:57.841900 >> 48006 blocks
184 14:34:58.651562 rename /var/lib/lava/dispatcher/tmp/6895671/extract-overlay-ramdisk-kp8a8vyi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
185 14:34:58.652010 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:34:58.652140 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
187 14:34:58.652249 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
188 14:34:58.652351 No mkimage arch provided, not using FIT.
189 14:34:58.652447 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:34:58.652539 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:34:58.652648 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:34:58.652749 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
193 14:34:58.652830 No LXC device requested
194 14:34:58.652917 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:34:58.653014 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
196 14:34:58.653145 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:34:58.653224 Checking files for TFTP limit of 4294967296 bytes.
198 14:34:58.653635 end: 1 tftp-deploy (duration 00:00:05) [common]
199 14:34:58.653749 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:34:58.653855 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:34:58.653997 substitutions:
202 14:34:58.654070 - {DTB}: None
203 14:34:58.654145 - {INITRD}: 6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
204 14:34:58.654211 - {KERNEL}: 6895671/tftp-deploy-yu7m0mt5/kernel/bzImage
205 14:34:58.654275 - {LAVA_MAC}: None
206 14:34:58.654336 - {PRESEED_CONFIG}: None
207 14:34:58.654398 - {PRESEED_LOCAL}: None
208 14:34:58.654458 - {RAMDISK}: 6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
209 14:34:58.654519 - {ROOT_PART}: None
210 14:34:58.654579 - {ROOT}: None
211 14:34:58.654639 - {SERVER_IP}: 192.168.201.1
212 14:34:58.654698 - {TEE}: None
213 14:34:58.654757 Parsed boot commands:
214 14:34:58.654815 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:34:58.654980 Parsed boot commands: tftpboot 192.168.201.1 6895671/tftp-deploy-yu7m0mt5/kernel/bzImage 6895671/tftp-deploy-yu7m0mt5/kernel/cmdline 6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
216 14:34:58.655081 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:34:58.655182 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:34:58.655288 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:34:58.655386 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:34:58.655464 Not connected, no need to disconnect.
221 14:34:58.655548 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:34:58.655637 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:34:58.655711 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
224 14:34:58.658564 Setting prompt string to ['lava-test: # ']
225 14:34:58.658873 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:34:58.658984 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:34:58.659088 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:34:58.659186 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:34:58.659379 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
230 14:34:58.680709 >> Command sent successfully.
231 14:34:58.682770 Returned 0 in 0 seconds
232 14:34:58.783910 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:34:58.786379 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:34:58.786912 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:34:58.787348 Setting prompt string to 'Starting depthcharge on Voema...'
237 14:34:58.787690 Changing prompt to 'Starting depthcharge on Voema...'
238 14:34:58.788043 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 14:34:58.789013 [Enter `^Ec?' for help]
240 14:35:05.831747
241 14:35:05.832373
242 14:35:05.841978 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 14:35:05.844851 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 14:35:05.851683 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 14:35:05.855261 CPU: AES supported, TXT NOT supported, VT supported
246 14:35:05.861598 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 14:35:05.868569 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 14:35:05.871912 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 14:35:05.874812 VBOOT: Loading verstage.
250 14:35:05.878014 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
251 14:35:05.884745 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 14:35:05.888094 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 14:35:05.898812 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 14:35:05.905266 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 14:35:05.905838
256 14:35:05.906228
257 14:35:05.918200 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 14:35:05.932475 Probing TPM: . done!
259 14:35:05.935776 TPM ready after 0 ms
260 14:35:05.939193 Connected to device vid:did:rid of 1ae0:0028:00
261 14:35:05.950442 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
262 14:35:05.957222 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 14:35:05.960074 Initialized TPM device CR50 revision 0
264 14:35:06.010690 tlcl_send_startup: Startup return code is 0
265 14:35:06.011233 TPM: setup succeeded
266 14:35:06.029302 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 14:35:06.044162 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 14:35:06.057728 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 14:35:06.068241 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 14:35:06.071629 Chrome EC: UHEPI supported
271 14:35:06.075221 Phase 1
272 14:35:06.078385 FMAP: area GBB found @ 1805000 (458752 bytes)
273 14:35:06.087991 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 14:35:06.094884 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 14:35:06.101378 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 14:35:06.107952 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 14:35:06.111232 Recovery requested (1009000e)
278 14:35:06.115054 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 14:35:06.126544 tlcl_extend: response is 0
280 14:35:06.133096 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 14:35:06.143341 tlcl_extend: response is 0
282 14:35:06.149543 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 14:35:06.156277 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 14:35:06.163056 BS: verstage times (exec / console): total (unknown) / 142 ms
285 14:35:06.163646
286 14:35:06.164041
287 14:35:06.176288 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 14:35:06.182623 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 14:35:06.186035 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 14:35:06.189473 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 14:35:06.195935 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 14:35:06.199288 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 14:35:06.202524 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 14:35:06.205979 TCO_STS: 0000 0000
295 14:35:06.208935 GEN_PMCON: d0015038 00002200
296 14:35:06.212417 GBLRST_CAUSE: 00000000 00000000
297 14:35:06.212856 HPR_CAUSE0: 00000000
298 14:35:06.215807 prev_sleep_state 5
299 14:35:06.219082 Boot Count incremented to 8991
300 14:35:06.225772 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 14:35:06.232467 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 14:35:06.239155 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 14:35:06.245922 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 14:35:06.250689 Chrome EC: UHEPI supported
305 14:35:06.257046 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 14:35:06.270205 Probing TPM: done!
307 14:35:06.277010 Connected to device vid:did:rid of 1ae0:0028:00
308 14:35:06.287163 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
309 14:35:06.290448 Initialized TPM device CR50 revision 0
310 14:35:06.304667 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 14:35:06.311547 MRC: Hash idx 0x100b comparison successful.
312 14:35:06.314899 MRC cache found, size faa8
313 14:35:06.315491 bootmode is set to: 2
314 14:35:06.317907 SPD index = 0
315 14:35:06.325177 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 14:35:06.328023 SPD: module type is LPDDR4X
317 14:35:06.330965 SPD: module part number is MT53E512M64D4NW-046
318 14:35:06.338355 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 14:35:06.341412 SPD: device width 16 bits, bus width 16 bits
320 14:35:06.348040 SPD: module size is 1024 MB (per channel)
321 14:35:06.780346 CBMEM:
322 14:35:06.783935 IMD: root @ 0x76fff000 254 entries.
323 14:35:06.787155 IMD: root @ 0x76ffec00 62 entries.
324 14:35:06.791017 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 14:35:06.797623 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 14:35:06.800547 External stage cache:
327 14:35:06.803834 IMD: root @ 0x7b3ff000 254 entries.
328 14:35:06.806822 IMD: root @ 0x7b3fec00 62 entries.
329 14:35:06.822339 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 14:35:06.828892 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 14:35:06.835308 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 14:35:06.849947 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 14:35:06.853794 cse_lite: Skip switching to RW in the recovery path
334 14:35:06.857877 8 DIMMs found
335 14:35:06.858484 SMM Memory Map
336 14:35:06.860998 SMRAM : 0x7b000000 0x800000
337 14:35:06.864496 Subregion 0: 0x7b000000 0x200000
338 14:35:06.867772 Subregion 1: 0x7b200000 0x200000
339 14:35:06.871309 Subregion 2: 0x7b400000 0x400000
340 14:35:06.874264 top_of_ram = 0x77000000
341 14:35:06.881437 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
342 14:35:06.884048 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
343 14:35:06.890586 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
344 14:35:06.893960 MTRR Range: Start=ff000000 End=0 (Size 1000000)
345 14:35:06.903754 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
346 14:35:06.907062 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
347 14:35:06.919066 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
348 14:35:06.925599 Processing 211 relocs. Offset value of 0x74c0b000
349 14:35:06.932318 BS: romstage times (exec / console): total (unknown) / 277 ms
350 14:35:06.938309
351 14:35:06.938853
352 14:35:06.948339 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
353 14:35:06.951842 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
354 14:35:06.961612 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
355 14:35:06.968216 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
356 14:35:06.974831 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
357 14:35:06.981585 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
358 14:35:07.028391 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
359 14:35:07.035064 Processing 5008 relocs. Offset value of 0x75d98000
360 14:35:07.038536 BS: postcar times (exec / console): total (unknown) / 59 ms
361 14:35:07.042096
362 14:35:07.042683
363 14:35:07.051730 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
364 14:35:07.052300 Normal boot
365 14:35:07.055249 FW_CONFIG value is 0x804c02
366 14:35:07.058715 PCI: 00:07.0 disabled by fw_config
367 14:35:07.061756 PCI: 00:07.1 disabled by fw_config
368 14:35:07.065235 PCI: 00:0d.2 disabled by fw_config
369 14:35:07.068708 PCI: 00:1c.7 disabled by fw_config
370 14:35:07.075430 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
371 14:35:07.081970 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
372 14:35:07.085262 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 14:35:07.088241 GENERIC: 0.0 disabled by fw_config
374 14:35:07.091520 GENERIC: 1.0 disabled by fw_config
375 14:35:07.098287 fw_config match found: DB_USB=USB3_ACTIVE
376 14:35:07.101378 fw_config match found: DB_USB=USB3_ACTIVE
377 14:35:07.105177 fw_config match found: DB_USB=USB3_ACTIVE
378 14:35:07.111559 fw_config match found: DB_USB=USB3_ACTIVE
379 14:35:07.114966 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
380 14:35:07.121475 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
381 14:35:07.131614 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
382 14:35:07.138181 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
383 14:35:07.141500 microcode: sig=0x806c1 pf=0x80 revision=0x86
384 14:35:07.148487 microcode: Update skipped, already up-to-date
385 14:35:07.155073 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
386 14:35:07.182204 Detected 4 core, 8 thread CPU.
387 14:35:07.185124 Setting up SMI for CPU
388 14:35:07.188552 IED base = 0x7b400000
389 14:35:07.189215 IED size = 0x00400000
390 14:35:07.191776 Will perform SMM setup.
391 14:35:07.198622 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
392 14:35:07.205251 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
393 14:35:07.211571 Processing 16 relocs. Offset value of 0x00030000
394 14:35:07.215041 Attempting to start 7 APs
395 14:35:07.218339 Waiting for 10ms after sending INIT.
396 14:35:07.234036 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
397 14:35:07.234595 done.
398 14:35:07.237173 AP: slot 3 apic_id 2.
399 14:35:07.240892 AP: slot 6 apic_id 3.
400 14:35:07.241484 AP: slot 5 apic_id 6.
401 14:35:07.244128 AP: slot 2 apic_id 7.
402 14:35:07.247476 AP: slot 7 apic_id 5.
403 14:35:07.248014 AP: slot 4 apic_id 4.
404 14:35:07.254291 Waiting for 2nd SIPI to complete...done.
405 14:35:07.260550 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
406 14:35:07.267747 Processing 13 relocs. Offset value of 0x00038000
407 14:35:07.270735 Unable to locate Global NVS
408 14:35:07.277487 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
409 14:35:07.280690 Installing permanent SMM handler to 0x7b000000
410 14:35:07.290314 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
411 14:35:07.293755 Processing 794 relocs. Offset value of 0x7b010000
412 14:35:07.303575 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
413 14:35:07.306951 Processing 13 relocs. Offset value of 0x7b008000
414 14:35:07.313418 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
415 14:35:07.319867 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
416 14:35:07.323166 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
417 14:35:07.329804 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
418 14:35:07.336512 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
419 14:35:07.343571 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
420 14:35:07.349851 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
421 14:35:07.353538 Unable to locate Global NVS
422 14:35:07.359898 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
423 14:35:07.363005 Clearing SMI status registers
424 14:35:07.366615 SMI_STS: PM1
425 14:35:07.367205 PM1_STS: PWRBTN
426 14:35:07.373659 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
427 14:35:07.376622 In relocation handler: CPU 0
428 14:35:07.379727 New SMBASE=0x7b000000 IEDBASE=0x7b400000
429 14:35:07.386136 Writing SMRR. base = 0x7b000006, mask=0xff800c00
430 14:35:07.389801 Relocation complete.
431 14:35:07.395750 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
432 14:35:07.399695 In relocation handler: CPU 1
433 14:35:07.402424 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
434 14:35:07.406040 Relocation complete.
435 14:35:07.412314 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
436 14:35:07.415855 In relocation handler: CPU 5
437 14:35:07.418806 New SMBASE=0x7affec00 IEDBASE=0x7b400000
438 14:35:07.422175 Writing SMRR. base = 0x7b000006, mask=0xff800c00
439 14:35:07.425378 Relocation complete.
440 14:35:07.432228 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
441 14:35:07.435641 In relocation handler: CPU 2
442 14:35:07.439159 New SMBASE=0x7afff800 IEDBASE=0x7b400000
443 14:35:07.442128 Relocation complete.
444 14:35:07.448679 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
445 14:35:07.451982 In relocation handler: CPU 7
446 14:35:07.455384 New SMBASE=0x7affe400 IEDBASE=0x7b400000
447 14:35:07.458819 Relocation complete.
448 14:35:07.465402 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
449 14:35:07.468945 In relocation handler: CPU 4
450 14:35:07.472408 New SMBASE=0x7afff000 IEDBASE=0x7b400000
451 14:35:07.478541 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 14:35:07.479140 Relocation complete.
453 14:35:07.488572 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 14:35:07.491612 In relocation handler: CPU 3
455 14:35:07.495287 New SMBASE=0x7afff400 IEDBASE=0x7b400000
456 14:35:07.498379 Writing SMRR. base = 0x7b000006, mask=0xff800c00
457 14:35:07.501950 Relocation complete.
458 14:35:07.508406 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
459 14:35:07.511821 In relocation handler: CPU 6
460 14:35:07.515402 New SMBASE=0x7affe800 IEDBASE=0x7b400000
461 14:35:07.518694 Relocation complete.
462 14:35:07.519217 Initializing CPU #0
463 14:35:07.522209 CPU: vendor Intel device 806c1
464 14:35:07.526002 CPU: family 06, model 8c, stepping 01
465 14:35:07.529059 Clearing out pending MCEs
466 14:35:07.532390 Setting up local APIC...
467 14:35:07.535699 apic_id: 0x00 done.
468 14:35:07.538984 Turbo is available but hidden
469 14:35:07.542620 Turbo is available and visible
470 14:35:07.545858 microcode: Update skipped, already up-to-date
471 14:35:07.549119 CPU #0 initialized
472 14:35:07.549565 Initializing CPU #2
473 14:35:07.552257 Initializing CPU #3
474 14:35:07.552694 Initializing CPU #6
475 14:35:07.555699 CPU: vendor Intel device 806c1
476 14:35:07.562312 CPU: family 06, model 8c, stepping 01
477 14:35:07.562863 CPU: vendor Intel device 806c1
478 14:35:07.569004 CPU: family 06, model 8c, stepping 01
479 14:35:07.569596 Clearing out pending MCEs
480 14:35:07.572591 Clearing out pending MCEs
481 14:35:07.575708 Setting up local APIC...
482 14:35:07.579013 Initializing CPU #4
483 14:35:07.579564 Initializing CPU #7
484 14:35:07.582511 CPU: vendor Intel device 806c1
485 14:35:07.585734 CPU: family 06, model 8c, stepping 01
486 14:35:07.589093 CPU: vendor Intel device 806c1
487 14:35:07.592625 CPU: family 06, model 8c, stepping 01
488 14:35:07.595551 Clearing out pending MCEs
489 14:35:07.598539 Clearing out pending MCEs
490 14:35:07.602059 Setting up local APIC...
491 14:35:07.602627 Setting up local APIC...
492 14:35:07.605612 Initializing CPU #5
493 14:35:07.608745 CPU: vendor Intel device 806c1
494 14:35:07.612029 CPU: family 06, model 8c, stepping 01
495 14:35:07.615174 CPU: vendor Intel device 806c1
496 14:35:07.618735 CPU: family 06, model 8c, stepping 01
497 14:35:07.621672 Clearing out pending MCEs
498 14:35:07.625315 Clearing out pending MCEs
499 14:35:07.628705 Setting up local APIC...
500 14:35:07.629296 apic_id: 0x02 done.
501 14:35:07.631851 Setting up local APIC...
502 14:35:07.635222 apic_id: 0x03 done.
503 14:35:07.638277 microcode: Update skipped, already up-to-date
504 14:35:07.641877 microcode: Update skipped, already up-to-date
505 14:35:07.645146 CPU #3 initialized
506 14:35:07.648493 CPU #6 initialized
507 14:35:07.649045 apic_id: 0x07 done.
508 14:35:07.651752 apic_id: 0x06 done.
509 14:35:07.655325 microcode: Update skipped, already up-to-date
510 14:35:07.662024 microcode: Update skipped, already up-to-date
511 14:35:07.662624 CPU #2 initialized
512 14:35:07.665331 CPU #5 initialized
513 14:35:07.668631 apic_id: 0x04 done.
514 14:35:07.669253 Setting up local APIC...
515 14:35:07.671826 Initializing CPU #1
516 14:35:07.675405 apic_id: 0x05 done.
517 14:35:07.678551 microcode: Update skipped, already up-to-date
518 14:35:07.681953 microcode: Update skipped, already up-to-date
519 14:35:07.685217 CPU #4 initialized
520 14:35:07.685811 CPU #7 initialized
521 14:35:07.688496 CPU: vendor Intel device 806c1
522 14:35:07.695452 CPU: family 06, model 8c, stepping 01
523 14:35:07.696040 Clearing out pending MCEs
524 14:35:07.698293 Setting up local APIC...
525 14:35:07.701462 apic_id: 0x01 done.
526 14:35:07.704978 microcode: Update skipped, already up-to-date
527 14:35:07.707969 CPU #1 initialized
528 14:35:07.711323 bsp_do_flight_plan done after 455 msecs.
529 14:35:07.714940 CPU: frequency set to 4000 MHz
530 14:35:07.718293 Enabling SMIs.
531 14:35:07.724664 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
532 14:35:07.738896 SATAXPCIE1 indicates PCIe NVMe is present
533 14:35:07.742270 Probing TPM: done!
534 14:35:07.746092 Connected to device vid:did:rid of 1ae0:0028:00
535 14:35:07.756616 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
536 14:35:07.759847 Initialized TPM device CR50 revision 0
537 14:35:07.763254 Enabling S0i3.4
538 14:35:07.769775 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
539 14:35:07.773133 Found a VBT of 8704 bytes after decompression
540 14:35:07.779861 cse_lite: CSE RO boot. HybridStorageMode disabled
541 14:35:07.786150 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
542 14:35:07.861967 FSPS returned 0
543 14:35:07.865943 Executing Phase 1 of FspMultiPhaseSiInit
544 14:35:07.875116 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
545 14:35:07.878668 port C0 DISC req: usage 1 usb3 1 usb2 5
546 14:35:07.881820 Raw Buffer output 0 00000511
547 14:35:07.884997 Raw Buffer output 1 00000000
548 14:35:07.888991 pmc_send_ipc_cmd succeeded
549 14:35:07.895966 port C1 DISC req: usage 1 usb3 2 usb2 3
550 14:35:07.896554 Raw Buffer output 0 00000321
551 14:35:07.898964 Raw Buffer output 1 00000000
552 14:35:07.903290 pmc_send_ipc_cmd succeeded
553 14:35:07.908190 Detected 4 core, 8 thread CPU.
554 14:35:07.911206 Detected 4 core, 8 thread CPU.
555 14:35:08.145293 Display FSP Version Info HOB
556 14:35:08.147943 Reference Code - CPU = a.0.4c.31
557 14:35:08.152146 uCode Version = 0.0.0.86
558 14:35:08.154884 TXT ACM version = ff.ff.ff.ffff
559 14:35:08.158271 Reference Code - ME = a.0.4c.31
560 14:35:08.161690 MEBx version = 0.0.0.0
561 14:35:08.164574 ME Firmware Version = Consumer SKU
562 14:35:08.168487 Reference Code - PCH = a.0.4c.31
563 14:35:08.171569 PCH-CRID Status = Disabled
564 14:35:08.175001 PCH-CRID Original Value = ff.ff.ff.ffff
565 14:35:08.177687 PCH-CRID New Value = ff.ff.ff.ffff
566 14:35:08.181268 OPROM - RST - RAID = ff.ff.ff.ffff
567 14:35:08.184488 PCH Hsio Version = 4.0.0.0
568 14:35:08.187953 Reference Code - SA - System Agent = a.0.4c.31
569 14:35:08.190896 Reference Code - MRC = 2.0.0.1
570 14:35:08.194737 SA - PCIe Version = a.0.4c.31
571 14:35:08.198030 SA-CRID Status = Disabled
572 14:35:08.201229 SA-CRID Original Value = 0.0.0.1
573 14:35:08.204857 SA-CRID New Value = 0.0.0.1
574 14:35:08.207787 OPROM - VBIOS = ff.ff.ff.ffff
575 14:35:08.210573 IO Manageability Engine FW Version = 11.1.4.0
576 14:35:08.214107 PHY Build Version = 0.0.0.e0
577 14:35:08.217537 Thunderbolt(TM) FW Version = 0.0.0.0
578 14:35:08.223949 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
579 14:35:08.227426 ITSS IRQ Polarities Before:
580 14:35:08.227872 IPC0: 0xffffffff
581 14:35:08.230666 IPC1: 0xffffffff
582 14:35:08.231107 IPC2: 0xffffffff
583 14:35:08.233918 IPC3: 0xffffffff
584 14:35:08.237704 ITSS IRQ Polarities After:
585 14:35:08.238277 IPC0: 0xffffffff
586 14:35:08.240444 IPC1: 0xffffffff
587 14:35:08.240885 IPC2: 0xffffffff
588 14:35:08.243775 IPC3: 0xffffffff
589 14:35:08.247351 Found PCIe Root Port #9 at PCI: 00:1d.0.
590 14:35:08.260650 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
591 14:35:08.270713 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
592 14:35:08.284111 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
593 14:35:08.290212 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
594 14:35:08.293718 Enumerating buses...
595 14:35:08.297414 Show all devs... Before device enumeration.
596 14:35:08.300700 Root Device: enabled 1
597 14:35:08.301276 DOMAIN: 0000: enabled 1
598 14:35:08.303730 CPU_CLUSTER: 0: enabled 1
599 14:35:08.307191 PCI: 00:00.0: enabled 1
600 14:35:08.310175 PCI: 00:02.0: enabled 1
601 14:35:08.310764 PCI: 00:04.0: enabled 1
602 14:35:08.313761 PCI: 00:05.0: enabled 1
603 14:35:08.316875 PCI: 00:06.0: enabled 0
604 14:35:08.320431 PCI: 00:07.0: enabled 0
605 14:35:08.320883 PCI: 00:07.1: enabled 0
606 14:35:08.323470 PCI: 00:07.2: enabled 0
607 14:35:08.326579 PCI: 00:07.3: enabled 0
608 14:35:08.330044 PCI: 00:08.0: enabled 1
609 14:35:08.330487 PCI: 00:09.0: enabled 0
610 14:35:08.333595 PCI: 00:0a.0: enabled 0
611 14:35:08.336923 PCI: 00:0d.0: enabled 1
612 14:35:08.339856 PCI: 00:0d.1: enabled 0
613 14:35:08.340301 PCI: 00:0d.2: enabled 0
614 14:35:08.343879 PCI: 00:0d.3: enabled 0
615 14:35:08.346490 PCI: 00:0e.0: enabled 0
616 14:35:08.350010 PCI: 00:10.2: enabled 1
617 14:35:08.350451 PCI: 00:10.6: enabled 0
618 14:35:08.353388 PCI: 00:10.7: enabled 0
619 14:35:08.356683 PCI: 00:12.0: enabled 0
620 14:35:08.357153 PCI: 00:12.6: enabled 0
621 14:35:08.360061 PCI: 00:13.0: enabled 0
622 14:35:08.363548 PCI: 00:14.0: enabled 1
623 14:35:08.367088 PCI: 00:14.1: enabled 0
624 14:35:08.367650 PCI: 00:14.2: enabled 1
625 14:35:08.369872 PCI: 00:14.3: enabled 1
626 14:35:08.373446 PCI: 00:15.0: enabled 1
627 14:35:08.377095 PCI: 00:15.1: enabled 1
628 14:35:08.377635 PCI: 00:15.2: enabled 1
629 14:35:08.380120 PCI: 00:15.3: enabled 1
630 14:35:08.383265 PCI: 00:16.0: enabled 1
631 14:35:08.387127 PCI: 00:16.1: enabled 0
632 14:35:08.387668 PCI: 00:16.2: enabled 0
633 14:35:08.389931 PCI: 00:16.3: enabled 0
634 14:35:08.393276 PCI: 00:16.4: enabled 0
635 14:35:08.393721 PCI: 00:16.5: enabled 0
636 14:35:08.396954 PCI: 00:17.0: enabled 1
637 14:35:08.400257 PCI: 00:19.0: enabled 0
638 14:35:08.403390 PCI: 00:19.1: enabled 1
639 14:35:08.403941 PCI: 00:19.2: enabled 0
640 14:35:08.406318 PCI: 00:1c.0: enabled 1
641 14:35:08.409874 PCI: 00:1c.1: enabled 0
642 14:35:08.413275 PCI: 00:1c.2: enabled 0
643 14:35:08.413717 PCI: 00:1c.3: enabled 0
644 14:35:08.416605 PCI: 00:1c.4: enabled 0
645 14:35:08.419759 PCI: 00:1c.5: enabled 0
646 14:35:08.423202 PCI: 00:1c.6: enabled 1
647 14:35:08.423757 PCI: 00:1c.7: enabled 0
648 14:35:08.426625 PCI: 00:1d.0: enabled 1
649 14:35:08.429846 PCI: 00:1d.1: enabled 0
650 14:35:08.432959 PCI: 00:1d.2: enabled 1
651 14:35:08.433431 PCI: 00:1d.3: enabled 0
652 14:35:08.436593 PCI: 00:1e.0: enabled 1
653 14:35:08.439865 PCI: 00:1e.1: enabled 0
654 14:35:08.440460 PCI: 00:1e.2: enabled 1
655 14:35:08.442909 PCI: 00:1e.3: enabled 1
656 14:35:08.446473 PCI: 00:1f.0: enabled 1
657 14:35:08.449869 PCI: 00:1f.1: enabled 0
658 14:35:08.450407 PCI: 00:1f.2: enabled 1
659 14:35:08.452751 PCI: 00:1f.3: enabled 1
660 14:35:08.456265 PCI: 00:1f.4: enabled 0
661 14:35:08.459775 PCI: 00:1f.5: enabled 1
662 14:35:08.460322 PCI: 00:1f.6: enabled 0
663 14:35:08.463318 PCI: 00:1f.7: enabled 0
664 14:35:08.466427 APIC: 00: enabled 1
665 14:35:08.466865 GENERIC: 0.0: enabled 1
666 14:35:08.469820 GENERIC: 0.0: enabled 1
667 14:35:08.472978 GENERIC: 1.0: enabled 1
668 14:35:08.476962 GENERIC: 0.0: enabled 1
669 14:35:08.477544 GENERIC: 1.0: enabled 1
670 14:35:08.479921 USB0 port 0: enabled 1
671 14:35:08.483132 GENERIC: 0.0: enabled 1
672 14:35:08.486344 USB0 port 0: enabled 1
673 14:35:08.486891 GENERIC: 0.0: enabled 1
674 14:35:08.489428 I2C: 00:1a: enabled 1
675 14:35:08.492771 I2C: 00:31: enabled 1
676 14:35:08.493258 I2C: 00:32: enabled 1
677 14:35:08.496535 I2C: 00:10: enabled 1
678 14:35:08.499876 I2C: 00:15: enabled 1
679 14:35:08.500420 GENERIC: 0.0: enabled 0
680 14:35:08.502800 GENERIC: 1.0: enabled 0
681 14:35:08.506513 GENERIC: 0.0: enabled 1
682 14:35:08.507046 SPI: 00: enabled 1
683 14:35:08.509632 SPI: 00: enabled 1
684 14:35:08.512702 PNP: 0c09.0: enabled 1
685 14:35:08.513260 GENERIC: 0.0: enabled 1
686 14:35:08.516385 USB3 port 0: enabled 1
687 14:35:08.519693 USB3 port 1: enabled 1
688 14:35:08.522578 USB3 port 2: enabled 0
689 14:35:08.523024 USB3 port 3: enabled 0
690 14:35:08.526084 USB2 port 0: enabled 0
691 14:35:08.529672 USB2 port 1: enabled 1
692 14:35:08.530109 USB2 port 2: enabled 1
693 14:35:08.533094 USB2 port 3: enabled 0
694 14:35:08.535900 USB2 port 4: enabled 1
695 14:35:08.539599 USB2 port 5: enabled 0
696 14:35:08.540033 USB2 port 6: enabled 0
697 14:35:08.542537 USB2 port 7: enabled 0
698 14:35:08.546212 USB2 port 8: enabled 0
699 14:35:08.546750 USB2 port 9: enabled 0
700 14:35:08.549283 USB3 port 0: enabled 0
701 14:35:08.552897 USB3 port 1: enabled 1
702 14:35:08.553495 USB3 port 2: enabled 0
703 14:35:08.555914 USB3 port 3: enabled 0
704 14:35:08.559275 GENERIC: 0.0: enabled 1
705 14:35:08.562540 GENERIC: 1.0: enabled 1
706 14:35:08.563078 APIC: 01: enabled 1
707 14:35:08.565897 APIC: 07: enabled 1
708 14:35:08.566414 APIC: 02: enabled 1
709 14:35:08.569957 APIC: 04: enabled 1
710 14:35:08.572660 APIC: 06: enabled 1
711 14:35:08.573236 APIC: 03: enabled 1
712 14:35:08.576213 APIC: 05: enabled 1
713 14:35:08.579386 Compare with tree...
714 14:35:08.579926 Root Device: enabled 1
715 14:35:08.582957 DOMAIN: 0000: enabled 1
716 14:35:08.586275 PCI: 00:00.0: enabled 1
717 14:35:08.589285 PCI: 00:02.0: enabled 1
718 14:35:08.589719 PCI: 00:04.0: enabled 1
719 14:35:08.592536 GENERIC: 0.0: enabled 1
720 14:35:08.596068 PCI: 00:05.0: enabled 1
721 14:35:08.599578 PCI: 00:06.0: enabled 0
722 14:35:08.602693 PCI: 00:07.0: enabled 0
723 14:35:08.603232 GENERIC: 0.0: enabled 1
724 14:35:08.606034 PCI: 00:07.1: enabled 0
725 14:35:08.609257 GENERIC: 1.0: enabled 1
726 14:35:08.612851 PCI: 00:07.2: enabled 0
727 14:35:08.616036 GENERIC: 0.0: enabled 1
728 14:35:08.619542 PCI: 00:07.3: enabled 0
729 14:35:08.620094 GENERIC: 1.0: enabled 1
730 14:35:08.622396 PCI: 00:08.0: enabled 1
731 14:35:08.625771 PCI: 00:09.0: enabled 0
732 14:35:08.629057 PCI: 00:0a.0: enabled 0
733 14:35:08.632224 PCI: 00:0d.0: enabled 1
734 14:35:08.632663 USB0 port 0: enabled 1
735 14:35:08.636016 USB3 port 0: enabled 1
736 14:35:08.638797 USB3 port 1: enabled 1
737 14:35:08.642340 USB3 port 2: enabled 0
738 14:35:08.645517 USB3 port 3: enabled 0
739 14:35:08.646065 PCI: 00:0d.1: enabled 0
740 14:35:08.649120 PCI: 00:0d.2: enabled 0
741 14:35:08.652386 GENERIC: 0.0: enabled 1
742 14:35:08.655827 PCI: 00:0d.3: enabled 0
743 14:35:08.658962 PCI: 00:0e.0: enabled 0
744 14:35:08.659398 PCI: 00:10.2: enabled 1
745 14:35:08.662089 PCI: 00:10.6: enabled 0
746 14:35:08.665728 PCI: 00:10.7: enabled 0
747 14:35:08.668905 PCI: 00:12.0: enabled 0
748 14:35:08.672639 PCI: 00:12.6: enabled 0
749 14:35:08.673244 PCI: 00:13.0: enabled 0
750 14:35:08.675502 PCI: 00:14.0: enabled 1
751 14:35:08.679033 USB0 port 0: enabled 1
752 14:35:08.682563 USB2 port 0: enabled 0
753 14:35:08.685649 USB2 port 1: enabled 1
754 14:35:08.686195 USB2 port 2: enabled 1
755 14:35:08.688981 USB2 port 3: enabled 0
756 14:35:08.691933 USB2 port 4: enabled 1
757 14:35:08.695884 USB2 port 5: enabled 0
758 14:35:08.699336 USB2 port 6: enabled 0
759 14:35:08.702071 USB2 port 7: enabled 0
760 14:35:08.702616 USB2 port 8: enabled 0
761 14:35:08.705998 USB2 port 9: enabled 0
762 14:35:08.708646 USB3 port 0: enabled 0
763 14:35:08.712459 USB3 port 1: enabled 1
764 14:35:08.715399 USB3 port 2: enabled 0
765 14:35:08.715836 USB3 port 3: enabled 0
766 14:35:08.719303 PCI: 00:14.1: enabled 0
767 14:35:08.721832 PCI: 00:14.2: enabled 1
768 14:35:08.725587 PCI: 00:14.3: enabled 1
769 14:35:08.728641 GENERIC: 0.0: enabled 1
770 14:35:08.729143 PCI: 00:15.0: enabled 1
771 14:35:08.731927 I2C: 00:1a: enabled 1
772 14:35:08.735290 I2C: 00:31: enabled 1
773 14:35:08.739182 I2C: 00:32: enabled 1
774 14:35:08.742116 PCI: 00:15.1: enabled 1
775 14:35:08.742555 I2C: 00:10: enabled 1
776 14:35:08.745776 PCI: 00:15.2: enabled 1
777 14:35:08.748320 PCI: 00:15.3: enabled 1
778 14:35:08.751652 PCI: 00:16.0: enabled 1
779 14:35:08.755607 PCI: 00:16.1: enabled 0
780 14:35:08.756157 PCI: 00:16.2: enabled 0
781 14:35:08.759131 PCI: 00:16.3: enabled 0
782 14:35:08.762679 PCI: 00:16.4: enabled 0
783 14:35:08.763118 PCI: 00:16.5: enabled 0
784 14:35:08.766084 PCI: 00:17.0: enabled 1
785 14:35:08.769427 PCI: 00:19.0: enabled 0
786 14:35:08.773007 PCI: 00:19.1: enabled 1
787 14:35:08.775972 I2C: 00:15: enabled 1
788 14:35:08.776412 PCI: 00:19.2: enabled 0
789 14:35:08.779305 PCI: 00:1d.0: enabled 1
790 14:35:08.782976 GENERIC: 0.0: enabled 1
791 14:35:08.786021 PCI: 00:1e.0: enabled 1
792 14:35:08.836077 PCI: 00:1e.1: enabled 0
793 14:35:08.836686 PCI: 00:1e.2: enabled 1
794 14:35:08.837106 SPI: 00: enabled 1
795 14:35:08.837477 PCI: 00:1e.3: enabled 1
796 14:35:08.837831 SPI: 00: enabled 1
797 14:35:08.838171 PCI: 00:1f.0: enabled 1
798 14:35:08.838500 PNP: 0c09.0: enabled 1
799 14:35:08.838826 PCI: 00:1f.1: enabled 0
800 14:35:08.839557 PCI: 00:1f.2: enabled 1
801 14:35:08.839931 GENERIC: 0.0: enabled 1
802 14:35:08.840324 GENERIC: 0.0: enabled 1
803 14:35:08.840663 GENERIC: 1.0: enabled 1
804 14:35:08.840989 PCI: 00:1f.3: enabled 1
805 14:35:08.841357 PCI: 00:1f.4: enabled 0
806 14:35:08.841683 PCI: 00:1f.5: enabled 1
807 14:35:08.842003 PCI: 00:1f.6: enabled 0
808 14:35:08.842323 PCI: 00:1f.7: enabled 0
809 14:35:08.842636 CPU_CLUSTER: 0: enabled 1
810 14:35:08.842952 APIC: 00: enabled 1
811 14:35:08.843266 APIC: 01: enabled 1
812 14:35:08.888105 APIC: 07: enabled 1
813 14:35:08.888743 APIC: 02: enabled 1
814 14:35:08.889162 APIC: 04: enabled 1
815 14:35:08.889911 APIC: 06: enabled 1
816 14:35:08.890290 APIC: 03: enabled 1
817 14:35:08.890633 APIC: 05: enabled 1
818 14:35:08.890961 Root Device scanning...
819 14:35:08.891280 scan_static_bus for Root Device
820 14:35:08.891596 DOMAIN: 0000 enabled
821 14:35:08.891910 CPU_CLUSTER: 0 enabled
822 14:35:08.892344 DOMAIN: 0000 scanning...
823 14:35:08.892683 PCI: pci_scan_bus for bus 00
824 14:35:08.892998 PCI: 00:00.0 [8086/0000] ops
825 14:35:08.893340 PCI: 00:00.0 [8086/9a12] enabled
826 14:35:08.893651 PCI: 00:02.0 [8086/0000] bus ops
827 14:35:08.893956 PCI: 00:02.0 [8086/9a40] enabled
828 14:35:08.894262 PCI: 00:04.0 [8086/0000] bus ops
829 14:35:08.894566 PCI: 00:04.0 [8086/9a03] enabled
830 14:35:08.901724 PCI: 00:05.0 [8086/9a19] enabled
831 14:35:08.902154 PCI: 00:07.0 [0000/0000] hidden
832 14:35:08.902499 PCI: 00:08.0 [8086/9a11] enabled
833 14:35:08.902817 PCI: 00:0a.0 [8086/9a0d] disabled
834 14:35:08.904973 PCI: 00:0d.0 [8086/0000] bus ops
835 14:35:08.908432 PCI: 00:0d.0 [8086/9a13] enabled
836 14:35:08.911813 PCI: 00:14.0 [8086/0000] bus ops
837 14:35:08.914854 PCI: 00:14.0 [8086/a0ed] enabled
838 14:35:08.918458 PCI: 00:14.2 [8086/a0ef] enabled
839 14:35:08.921844 PCI: 00:14.3 [8086/0000] bus ops
840 14:35:08.925114 PCI: 00:14.3 [8086/a0f0] enabled
841 14:35:08.928539 PCI: 00:15.0 [8086/0000] bus ops
842 14:35:08.931552 PCI: 00:15.0 [8086/a0e8] enabled
843 14:35:08.934488 PCI: 00:15.1 [8086/0000] bus ops
844 14:35:08.937887 PCI: 00:15.1 [8086/a0e9] enabled
845 14:35:08.941291 PCI: 00:15.2 [8086/0000] bus ops
846 14:35:08.944720 PCI: 00:15.2 [8086/a0ea] enabled
847 14:35:08.948357 PCI: 00:15.3 [8086/0000] bus ops
848 14:35:08.951255 PCI: 00:15.3 [8086/a0eb] enabled
849 14:35:08.955141 PCI: 00:16.0 [8086/0000] ops
850 14:35:08.957894 PCI: 00:16.0 [8086/a0e0] enabled
851 14:35:08.964708 PCI: Static device PCI: 00:17.0 not found, disabling it.
852 14:35:08.967753 PCI: 00:19.0 [8086/0000] bus ops
853 14:35:08.971322 PCI: 00:19.0 [8086/a0c5] disabled
854 14:35:08.974828 PCI: 00:19.1 [8086/0000] bus ops
855 14:35:08.978203 PCI: 00:19.1 [8086/a0c6] enabled
856 14:35:08.981568 PCI: 00:1d.0 [8086/0000] bus ops
857 14:35:08.984531 PCI: 00:1d.0 [8086/a0b0] enabled
858 14:35:08.987995 PCI: 00:1e.0 [8086/0000] ops
859 14:35:08.990900 PCI: 00:1e.0 [8086/a0a8] enabled
860 14:35:08.994365 PCI: 00:1e.2 [8086/0000] bus ops
861 14:35:08.997952 PCI: 00:1e.2 [8086/a0aa] enabled
862 14:35:09.001446 PCI: 00:1e.3 [8086/0000] bus ops
863 14:35:09.004311 PCI: 00:1e.3 [8086/a0ab] enabled
864 14:35:09.007955 PCI: 00:1f.0 [8086/0000] bus ops
865 14:35:09.011328 PCI: 00:1f.0 [8086/a087] enabled
866 14:35:09.011870 RTC Init
867 14:35:09.015534 Set power on after power failure.
868 14:35:09.017369 Disabling Deep S3
869 14:35:09.017812 Disabling Deep S3
870 14:35:09.021151 Disabling Deep S4
871 14:35:09.021690 Disabling Deep S4
872 14:35:09.024162 Disabling Deep S5
873 14:35:09.024697 Disabling Deep S5
874 14:35:09.027394 PCI: 00:1f.2 [0000/0000] hidden
875 14:35:09.030620 PCI: 00:1f.3 [8086/0000] bus ops
876 14:35:09.034318 PCI: 00:1f.3 [8086/a0c8] enabled
877 14:35:09.037633 PCI: 00:1f.5 [8086/0000] bus ops
878 14:35:09.040921 PCI: 00:1f.5 [8086/a0a4] enabled
879 14:35:09.044136 PCI: Leftover static devices:
880 14:35:09.047570 PCI: 00:10.2
881 14:35:09.048117 PCI: 00:10.6
882 14:35:09.050843 PCI: 00:10.7
883 14:35:09.051293 PCI: 00:06.0
884 14:35:09.051735 PCI: 00:07.1
885 14:35:09.053977 PCI: 00:07.2
886 14:35:09.054425 PCI: 00:07.3
887 14:35:09.057223 PCI: 00:09.0
888 14:35:09.057677 PCI: 00:0d.1
889 14:35:09.058121 PCI: 00:0d.2
890 14:35:09.060850 PCI: 00:0d.3
891 14:35:09.061441 PCI: 00:0e.0
892 14:35:09.064199 PCI: 00:12.0
893 14:35:09.064749 PCI: 00:12.6
894 14:35:09.065255 PCI: 00:13.0
895 14:35:09.067443 PCI: 00:14.1
896 14:35:09.067888 PCI: 00:16.1
897 14:35:09.070578 PCI: 00:16.2
898 14:35:09.071026 PCI: 00:16.3
899 14:35:09.074188 PCI: 00:16.4
900 14:35:09.074638 PCI: 00:16.5
901 14:35:09.075084 PCI: 00:17.0
902 14:35:09.077220 PCI: 00:19.2
903 14:35:09.077670 PCI: 00:1e.1
904 14:35:09.080917 PCI: 00:1f.1
905 14:35:09.081528 PCI: 00:1f.4
906 14:35:09.081982 PCI: 00:1f.6
907 14:35:09.084379 PCI: 00:1f.7
908 14:35:09.087202 PCI: Check your devicetree.cb.
909 14:35:09.090821 PCI: 00:02.0 scanning...
910 14:35:09.094162 scan_generic_bus for PCI: 00:02.0
911 14:35:09.097649 scan_generic_bus for PCI: 00:02.0 done
912 14:35:09.100831 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
913 14:35:09.104350 PCI: 00:04.0 scanning...
914 14:35:09.107394 scan_generic_bus for PCI: 00:04.0
915 14:35:09.110968 GENERIC: 0.0 enabled
916 14:35:09.117395 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
917 14:35:09.120790 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
918 14:35:09.124158 PCI: 00:0d.0 scanning...
919 14:35:09.127500 scan_static_bus for PCI: 00:0d.0
920 14:35:09.130243 USB0 port 0 enabled
921 14:35:09.130755 USB0 port 0 scanning...
922 14:35:09.133828 scan_static_bus for USB0 port 0
923 14:35:09.137390 USB3 port 0 enabled
924 14:35:09.140526 USB3 port 1 enabled
925 14:35:09.141095 USB3 port 2 disabled
926 14:35:09.143656 USB3 port 3 disabled
927 14:35:09.147238 USB3 port 0 scanning...
928 14:35:09.150040 scan_static_bus for USB3 port 0
929 14:35:09.153485 scan_static_bus for USB3 port 0 done
930 14:35:09.157018 scan_bus: bus USB3 port 0 finished in 6 msecs
931 14:35:09.160140 USB3 port 1 scanning...
932 14:35:09.163698 scan_static_bus for USB3 port 1
933 14:35:09.166648 scan_static_bus for USB3 port 1 done
934 14:35:09.170320 scan_bus: bus USB3 port 1 finished in 6 msecs
935 14:35:09.177022 scan_static_bus for USB0 port 0 done
936 14:35:09.180477 scan_bus: bus USB0 port 0 finished in 43 msecs
937 14:35:09.183724 scan_static_bus for PCI: 00:0d.0 done
938 14:35:09.190074 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
939 14:35:09.190648 PCI: 00:14.0 scanning...
940 14:35:09.193401 scan_static_bus for PCI: 00:14.0
941 14:35:09.196880 USB0 port 0 enabled
942 14:35:09.200254 USB0 port 0 scanning...
943 14:35:09.203332 scan_static_bus for USB0 port 0
944 14:35:09.203917 USB2 port 0 disabled
945 14:35:09.206576 USB2 port 1 enabled
946 14:35:09.209928 USB2 port 2 enabled
947 14:35:09.210362 USB2 port 3 disabled
948 14:35:09.213151 USB2 port 4 enabled
949 14:35:09.216636 USB2 port 5 disabled
950 14:35:09.217211 USB2 port 6 disabled
951 14:35:09.220048 USB2 port 7 disabled
952 14:35:09.223843 USB2 port 8 disabled
953 14:35:09.224383 USB2 port 9 disabled
954 14:35:09.226656 USB3 port 0 disabled
955 14:35:09.227198 USB3 port 1 enabled
956 14:35:09.230036 USB3 port 2 disabled
957 14:35:09.233428 USB3 port 3 disabled
958 14:35:09.233886 USB2 port 1 scanning...
959 14:35:09.236887 scan_static_bus for USB2 port 1
960 14:35:09.243330 scan_static_bus for USB2 port 1 done
961 14:35:09.246508 scan_bus: bus USB2 port 1 finished in 6 msecs
962 14:35:09.249921 USB2 port 2 scanning...
963 14:35:09.253370 scan_static_bus for USB2 port 2
964 14:35:09.256660 scan_static_bus for USB2 port 2 done
965 14:35:09.259789 scan_bus: bus USB2 port 2 finished in 6 msecs
966 14:35:09.262928 USB2 port 4 scanning...
967 14:35:09.266899 scan_static_bus for USB2 port 4
968 14:35:09.269768 scan_static_bus for USB2 port 4 done
969 14:35:09.276751 scan_bus: bus USB2 port 4 finished in 6 msecs
970 14:35:09.277325 USB3 port 1 scanning...
971 14:35:09.280091 scan_static_bus for USB3 port 1
972 14:35:09.283592 scan_static_bus for USB3 port 1 done
973 14:35:09.289981 scan_bus: bus USB3 port 1 finished in 6 msecs
974 14:35:09.293301 scan_static_bus for USB0 port 0 done
975 14:35:09.296164 scan_bus: bus USB0 port 0 finished in 93 msecs
976 14:35:09.302868 scan_static_bus for PCI: 00:14.0 done
977 14:35:09.306354 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
978 14:35:09.309691 PCI: 00:14.3 scanning...
979 14:35:09.313141 scan_static_bus for PCI: 00:14.3
980 14:35:09.316352 GENERIC: 0.0 enabled
981 14:35:09.319410 scan_static_bus for PCI: 00:14.3 done
982 14:35:09.323059 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
983 14:35:09.326322 PCI: 00:15.0 scanning...
984 14:35:09.329496 scan_static_bus for PCI: 00:15.0
985 14:35:09.332998 I2C: 00:1a enabled
986 14:35:09.333521 I2C: 00:31 enabled
987 14:35:09.336486 I2C: 00:32 enabled
988 14:35:09.340386 scan_static_bus for PCI: 00:15.0 done
989 14:35:09.343444 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
990 14:35:09.346902 PCI: 00:15.1 scanning...
991 14:35:09.350009 scan_static_bus for PCI: 00:15.1
992 14:35:09.350474 I2C: 00:10 enabled
993 14:35:09.357199 scan_static_bus for PCI: 00:15.1 done
994 14:35:09.359778 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
995 14:35:09.363044 PCI: 00:15.2 scanning...
996 14:35:09.366483 scan_static_bus for PCI: 00:15.2
997 14:35:09.370082 scan_static_bus for PCI: 00:15.2 done
998 14:35:09.373707 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
999 14:35:09.376878 PCI: 00:15.3 scanning...
1000 14:35:09.380095 scan_static_bus for PCI: 00:15.3
1001 14:35:09.383199 scan_static_bus for PCI: 00:15.3 done
1002 14:35:09.390124 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1003 14:35:09.393215 PCI: 00:19.1 scanning...
1004 14:35:09.396128 scan_static_bus for PCI: 00:19.1
1005 14:35:09.396604 I2C: 00:15 enabled
1006 14:35:09.403227 scan_static_bus for PCI: 00:19.1 done
1007 14:35:09.406501 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1008 14:35:09.409508 PCI: 00:1d.0 scanning...
1009 14:35:09.412748 do_pci_scan_bridge for PCI: 00:1d.0
1010 14:35:09.416186 PCI: pci_scan_bus for bus 01
1011 14:35:09.419459 PCI: 01:00.0 [1c5c/174a] enabled
1012 14:35:09.420001 GENERIC: 0.0 enabled
1013 14:35:09.426025 Enabling Common Clock Configuration
1014 14:35:09.429009 L1 Sub-State supported from root port 29
1015 14:35:09.432390 L1 Sub-State Support = 0xf
1016 14:35:09.435847 CommonModeRestoreTime = 0x28
1017 14:35:09.439164 Power On Value = 0x16, Power On Scale = 0x0
1018 14:35:09.439653 ASPM: Enabled L1
1019 14:35:09.445568 PCIe: Max_Payload_Size adjusted to 128
1020 14:35:09.449179 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1021 14:35:09.452075 PCI: 00:1e.2 scanning...
1022 14:35:09.455176 scan_generic_bus for PCI: 00:1e.2
1023 14:35:09.458787 SPI: 00 enabled
1024 14:35:09.461708 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1025 14:35:09.468595 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1026 14:35:09.472136 PCI: 00:1e.3 scanning...
1027 14:35:09.475483 scan_generic_bus for PCI: 00:1e.3
1028 14:35:09.476025 SPI: 00 enabled
1029 14:35:09.481723 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1030 14:35:09.485621 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1031 14:35:09.488848 PCI: 00:1f.0 scanning...
1032 14:35:09.491862 scan_static_bus for PCI: 00:1f.0
1033 14:35:09.495284 PNP: 0c09.0 enabled
1034 14:35:09.498478 PNP: 0c09.0 scanning...
1035 14:35:09.501997 scan_static_bus for PNP: 0c09.0
1036 14:35:09.505192 scan_static_bus for PNP: 0c09.0 done
1037 14:35:09.508505 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1038 14:35:09.511863 scan_static_bus for PCI: 00:1f.0 done
1039 14:35:09.518255 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1040 14:35:09.522028 PCI: 00:1f.2 scanning...
1041 14:35:09.525222 scan_static_bus for PCI: 00:1f.2
1042 14:35:09.525808 GENERIC: 0.0 enabled
1043 14:35:09.528342 GENERIC: 0.0 scanning...
1044 14:35:09.531315 scan_static_bus for GENERIC: 0.0
1045 14:35:09.534685 GENERIC: 0.0 enabled
1046 14:35:09.535123 GENERIC: 1.0 enabled
1047 14:35:09.541939 scan_static_bus for GENERIC: 0.0 done
1048 14:35:09.544560 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1049 14:35:09.547919 scan_static_bus for PCI: 00:1f.2 done
1050 14:35:09.554510 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1051 14:35:09.554948 PCI: 00:1f.3 scanning...
1052 14:35:09.557914 scan_static_bus for PCI: 00:1f.3
1053 14:35:09.564452 scan_static_bus for PCI: 00:1f.3 done
1054 14:35:09.568000 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1055 14:35:09.571040 PCI: 00:1f.5 scanning...
1056 14:35:09.575131 scan_generic_bus for PCI: 00:1f.5
1057 14:35:09.577840 scan_generic_bus for PCI: 00:1f.5 done
1058 14:35:09.584228 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1059 14:35:09.587956 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1060 14:35:09.591079 scan_static_bus for Root Device done
1061 14:35:09.597320 scan_bus: bus Root Device finished in 736 msecs
1062 14:35:09.597766 done
1063 14:35:09.604480 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1064 14:35:09.607813 Chrome EC: UHEPI supported
1065 14:35:09.614614 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1066 14:35:09.621047 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1067 14:35:09.624409 SPI flash protection: WPSW=0 SRP0=0
1068 14:35:09.627915 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1069 14:35:09.634521 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1070 14:35:09.637749 found VGA at PCI: 00:02.0
1071 14:35:09.640936 Setting up VGA for PCI: 00:02.0
1072 14:35:09.644741 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1073 14:35:09.650938 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1074 14:35:09.653859 Allocating resources...
1075 14:35:09.654297 Reading resources...
1076 14:35:09.657323 Root Device read_resources bus 0 link: 0
1077 14:35:09.663952 DOMAIN: 0000 read_resources bus 0 link: 0
1078 14:35:09.667561 PCI: 00:04.0 read_resources bus 1 link: 0
1079 14:35:09.674182 PCI: 00:04.0 read_resources bus 1 link: 0 done
1080 14:35:09.677808 PCI: 00:0d.0 read_resources bus 0 link: 0
1081 14:35:09.683820 USB0 port 0 read_resources bus 0 link: 0
1082 14:35:09.687400 USB0 port 0 read_resources bus 0 link: 0 done
1083 14:35:09.693598 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1084 14:35:09.696871 PCI: 00:14.0 read_resources bus 0 link: 0
1085 14:35:09.700034 USB0 port 0 read_resources bus 0 link: 0
1086 14:35:09.708522 USB0 port 0 read_resources bus 0 link: 0 done
1087 14:35:09.710859 PCI: 00:14.0 read_resources bus 0 link: 0 done
1088 14:35:09.718194 PCI: 00:14.3 read_resources bus 0 link: 0
1089 14:35:09.721618 PCI: 00:14.3 read_resources bus 0 link: 0 done
1090 14:35:09.728110 PCI: 00:15.0 read_resources bus 0 link: 0
1091 14:35:09.731119 PCI: 00:15.0 read_resources bus 0 link: 0 done
1092 14:35:09.737960 PCI: 00:15.1 read_resources bus 0 link: 0
1093 14:35:09.741420 PCI: 00:15.1 read_resources bus 0 link: 0 done
1094 14:35:09.748589 PCI: 00:19.1 read_resources bus 0 link: 0
1095 14:35:09.751851 PCI: 00:19.1 read_resources bus 0 link: 0 done
1096 14:35:09.758362 PCI: 00:1d.0 read_resources bus 1 link: 0
1097 14:35:09.761785 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1098 14:35:09.768708 PCI: 00:1e.2 read_resources bus 2 link: 0
1099 14:35:09.771536 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1100 14:35:09.778452 PCI: 00:1e.3 read_resources bus 3 link: 0
1101 14:35:09.782015 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1102 14:35:09.788315 PCI: 00:1f.0 read_resources bus 0 link: 0
1103 14:35:09.791922 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1104 14:35:09.798141 PCI: 00:1f.2 read_resources bus 0 link: 0
1105 14:35:09.802028 GENERIC: 0.0 read_resources bus 0 link: 0
1106 14:35:09.808580 GENERIC: 0.0 read_resources bus 0 link: 0 done
1107 14:35:09.811901 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1108 14:35:09.817983 DOMAIN: 0000 read_resources bus 0 link: 0 done
1109 14:35:09.821507 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1110 14:35:09.827774 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1111 14:35:09.830832 Root Device read_resources bus 0 link: 0 done
1112 14:35:09.834481 Done reading resources.
1113 14:35:09.840856 Show resources in subtree (Root Device)...After reading.
1114 14:35:09.844499 Root Device child on link 0 DOMAIN: 0000
1115 14:35:09.847802 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1116 14:35:09.857463 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1117 14:35:09.867320 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1118 14:35:09.870599 PCI: 00:00.0
1119 14:35:09.877754 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1120 14:35:09.886998 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1121 14:35:09.897164 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1122 14:35:09.906935 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1123 14:35:09.917481 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1124 14:35:09.927191 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1125 14:35:09.933505 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1126 14:35:09.943565 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1127 14:35:09.953544 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1128 14:35:09.963134 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1129 14:35:09.973438 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1130 14:35:09.983686 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1131 14:35:09.990350 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1132 14:35:10.000071 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1133 14:35:10.009949 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1134 14:35:10.019788 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1135 14:35:10.029745 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1136 14:35:10.039770 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1137 14:35:10.046638 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1138 14:35:10.056288 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1139 14:35:10.059843 PCI: 00:02.0
1140 14:35:10.069680 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1141 14:35:10.079674 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1142 14:35:10.089494 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1143 14:35:10.092678 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1144 14:35:10.102609 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1145 14:35:10.106077 GENERIC: 0.0
1146 14:35:10.106563 PCI: 00:05.0
1147 14:35:10.116041 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1148 14:35:10.122752 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1149 14:35:10.123304 GENERIC: 0.0
1150 14:35:10.125946 PCI: 00:08.0
1151 14:35:10.135378 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:35:10.135997 PCI: 00:0a.0
1153 14:35:10.138916 PCI: 00:0d.0 child on link 0 USB0 port 0
1154 14:35:10.148979 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1155 14:35:10.155747 USB0 port 0 child on link 0 USB3 port 0
1156 14:35:10.156300 USB3 port 0
1157 14:35:10.159198 USB3 port 1
1158 14:35:10.159793 USB3 port 2
1159 14:35:10.162108 USB3 port 3
1160 14:35:10.165559 PCI: 00:14.0 child on link 0 USB0 port 0
1161 14:35:10.175456 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1162 14:35:10.182186 USB0 port 0 child on link 0 USB2 port 0
1163 14:35:10.182775 USB2 port 0
1164 14:35:10.185274 USB2 port 1
1165 14:35:10.185756 USB2 port 2
1166 14:35:10.188954 USB2 port 3
1167 14:35:10.189528 USB2 port 4
1168 14:35:10.192059 USB2 port 5
1169 14:35:10.192656 USB2 port 6
1170 14:35:10.195209 USB2 port 7
1171 14:35:10.195696 USB2 port 8
1172 14:35:10.198569 USB2 port 9
1173 14:35:10.199028 USB3 port 0
1174 14:35:10.202322 USB3 port 1
1175 14:35:10.205424 USB3 port 2
1176 14:35:10.206003 USB3 port 3
1177 14:35:10.208832 PCI: 00:14.2
1178 14:35:10.218528 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 14:35:10.228578 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1180 14:35:10.232165 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1181 14:35:10.241791 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 14:35:10.242238 GENERIC: 0.0
1183 14:35:10.248417 PCI: 00:15.0 child on link 0 I2C: 00:1a
1184 14:35:10.258152 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 14:35:10.258685 I2C: 00:1a
1186 14:35:10.261383 I2C: 00:31
1187 14:35:10.261822 I2C: 00:32
1188 14:35:10.267954 PCI: 00:15.1 child on link 0 I2C: 00:10
1189 14:35:10.278603 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 14:35:10.279153 I2C: 00:10
1191 14:35:10.279503 PCI: 00:15.2
1192 14:35:10.288124 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 14:35:10.291576 PCI: 00:15.3
1194 14:35:10.301297 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 14:35:10.305244 PCI: 00:16.0
1196 14:35:10.314678 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 14:35:10.315264 PCI: 00:19.0
1198 14:35:10.317986 PCI: 00:19.1 child on link 0 I2C: 00:15
1199 14:35:10.328329 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1200 14:35:10.331284 I2C: 00:15
1201 14:35:10.334333 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1202 14:35:10.344621 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1203 14:35:10.354711 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1204 14:35:10.360977 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1205 14:35:10.364344 GENERIC: 0.0
1206 14:35:10.367336 PCI: 01:00.0
1207 14:35:10.377412 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 14:35:10.384362 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1209 14:35:10.394168 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1210 14:35:10.397371 PCI: 00:1e.0
1211 14:35:10.407287 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1212 14:35:10.411009 PCI: 00:1e.2 child on link 0 SPI: 00
1213 14:35:10.421099 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 14:35:10.423887 SPI: 00
1215 14:35:10.427162 PCI: 00:1e.3 child on link 0 SPI: 00
1216 14:35:10.436871 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 14:35:10.437479 SPI: 00
1218 14:35:10.444158 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1219 14:35:10.450121 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1220 14:35:10.453750 PNP: 0c09.0
1221 14:35:10.460402 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1222 14:35:10.467032 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1223 14:35:10.476911 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 14:35:10.483411 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1225 14:35:10.489885 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1226 14:35:10.490452 GENERIC: 0.0
1227 14:35:10.493491 GENERIC: 1.0
1228 14:35:10.494075 PCI: 00:1f.3
1229 14:35:10.503353 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 14:35:10.513730 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1231 14:35:10.516771 PCI: 00:1f.5
1232 14:35:10.526339 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1233 14:35:10.530017 CPU_CLUSTER: 0 child on link 0 APIC: 00
1234 14:35:10.530678 APIC: 00
1235 14:35:10.533299 APIC: 01
1236 14:35:10.533785 APIC: 07
1237 14:35:10.534309 APIC: 02
1238 14:35:10.536243 APIC: 04
1239 14:35:10.536724 APIC: 06
1240 14:35:10.539477 APIC: 03
1241 14:35:10.539960 APIC: 05
1242 14:35:10.546613 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1243 14:35:10.553180 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1244 14:35:10.559831 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1245 14:35:10.566390 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1246 14:35:10.570004 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1247 14:35:10.572811 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1248 14:35:10.579269 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1249 14:35:10.586073 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1250 14:35:10.593110 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1251 14:35:10.599566 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1252 14:35:10.605979 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1253 14:35:10.613034 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1254 14:35:10.622493 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1255 14:35:10.629310 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1256 14:35:10.635523 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1257 14:35:10.638961 DOMAIN: 0000: Resource ranges:
1258 14:35:10.642389 * Base: 1000, Size: 800, Tag: 100
1259 14:35:10.645606 * Base: 1900, Size: e700, Tag: 100
1260 14:35:10.652209 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1261 14:35:10.659238 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1262 14:35:10.665770 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1263 14:35:10.672432 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1264 14:35:10.681800 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1265 14:35:10.688875 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1266 14:35:10.695233 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1267 14:35:10.705471 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1268 14:35:10.711803 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1269 14:35:10.718587 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1270 14:35:10.728798 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1271 14:35:10.735135 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1272 14:35:10.741564 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1273 14:35:10.752091 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1274 14:35:10.758278 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1275 14:35:10.764934 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1276 14:35:10.774928 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1277 14:35:10.781965 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1278 14:35:10.788009 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1279 14:35:10.798310 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1280 14:35:10.804818 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1281 14:35:10.811241 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1282 14:35:10.821218 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1283 14:35:10.827692 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1284 14:35:10.834648 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1285 14:35:10.837503 DOMAIN: 0000: Resource ranges:
1286 14:35:10.844465 * Base: 7fc00000, Size: 40400000, Tag: 200
1287 14:35:10.848207 * Base: d0000000, Size: 28000000, Tag: 200
1288 14:35:10.850932 * Base: fa000000, Size: 1000000, Tag: 200
1289 14:35:10.854872 * Base: fb001000, Size: 2fff000, Tag: 200
1290 14:35:10.861223 * Base: fe010000, Size: 2e000, Tag: 200
1291 14:35:10.864287 * Base: fe03f000, Size: d41000, Tag: 200
1292 14:35:10.868089 * Base: fed88000, Size: 8000, Tag: 200
1293 14:35:10.871054 * Base: fed93000, Size: d000, Tag: 200
1294 14:35:10.877594 * Base: feda2000, Size: 1e000, Tag: 200
1295 14:35:10.880879 * Base: fede0000, Size: 1220000, Tag: 200
1296 14:35:10.884852 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1297 14:35:10.894287 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1298 14:35:10.900779 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1299 14:35:10.907504 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1300 14:35:10.914439 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1301 14:35:10.920715 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1302 14:35:10.927163 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1303 14:35:10.933934 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1304 14:35:10.940517 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1305 14:35:10.947804 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1306 14:35:10.953802 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1307 14:35:10.960729 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1308 14:35:10.967508 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1309 14:35:10.974009 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1310 14:35:10.980519 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1311 14:35:10.987084 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1312 14:35:10.993661 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1313 14:35:11.000624 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1314 14:35:11.006723 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1315 14:35:11.013772 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1316 14:35:11.020552 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1317 14:35:11.027075 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1318 14:35:11.033275 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1319 14:35:11.039962 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1320 14:35:11.046838 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1321 14:35:11.049783 PCI: 00:1d.0: Resource ranges:
1322 14:35:11.053147 * Base: 7fc00000, Size: 100000, Tag: 200
1323 14:35:11.059930 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1324 14:35:11.066798 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1325 14:35:11.073158 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1326 14:35:11.083031 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1327 14:35:11.090098 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1328 14:35:11.092744 Root Device assign_resources, bus 0 link: 0
1329 14:35:11.099698 DOMAIN: 0000 assign_resources, bus 0 link: 0
1330 14:35:11.106294 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1331 14:35:11.116235 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1332 14:35:11.122694 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1333 14:35:11.132931 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1334 14:35:11.136319 PCI: 00:04.0 assign_resources, bus 1 link: 0
1335 14:35:11.142507 PCI: 00:04.0 assign_resources, bus 1 link: 0
1336 14:35:11.149607 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1337 14:35:11.158970 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1338 14:35:11.165646 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1339 14:35:11.169255 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1340 14:35:11.175826 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1341 14:35:11.182286 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1342 14:35:11.189024 PCI: 00:14.0 assign_resources, bus 0 link: 0
1343 14:35:11.192298 PCI: 00:14.0 assign_resources, bus 0 link: 0
1344 14:35:11.202162 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1345 14:35:11.208931 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1346 14:35:11.218513 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1347 14:35:11.222110 PCI: 00:14.3 assign_resources, bus 0 link: 0
1348 14:35:11.225250 PCI: 00:14.3 assign_resources, bus 0 link: 0
1349 14:35:11.235175 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1350 14:35:11.238602 PCI: 00:15.0 assign_resources, bus 0 link: 0
1351 14:35:11.245346 PCI: 00:15.0 assign_resources, bus 0 link: 0
1352 14:35:11.252102 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1353 14:35:11.255076 PCI: 00:15.1 assign_resources, bus 0 link: 0
1354 14:35:11.261753 PCI: 00:15.1 assign_resources, bus 0 link: 0
1355 14:35:11.268673 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1356 14:35:11.278478 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1357 14:35:11.284835 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1358 14:35:11.294938 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1359 14:35:11.297980 PCI: 00:19.1 assign_resources, bus 0 link: 0
1360 14:35:11.304637 PCI: 00:19.1 assign_resources, bus 0 link: 0
1361 14:35:11.311506 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1362 14:35:11.321230 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1363 14:35:11.331213 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1364 14:35:11.334645 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1365 14:35:11.344219 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1366 14:35:11.351059 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1367 14:35:11.357601 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1368 14:35:11.364181 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1369 14:35:11.370815 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1370 14:35:11.377637 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1371 14:35:11.381008 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1372 14:35:11.390942 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1373 14:35:11.394011 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1374 14:35:11.397214 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1375 14:35:11.404001 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1376 14:35:11.407394 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1377 14:35:11.414041 LPC: Trying to open IO window from 800 size 1ff
1378 14:35:11.420636 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1379 14:35:11.430372 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1380 14:35:11.437205 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1381 14:35:11.443649 DOMAIN: 0000 assign_resources, bus 0 link: 0
1382 14:35:11.446866 Root Device assign_resources, bus 0 link: 0
1383 14:35:11.450432 Done setting resources.
1384 14:35:11.457190 Show resources in subtree (Root Device)...After assigning values.
1385 14:35:11.460579 Root Device child on link 0 DOMAIN: 0000
1386 14:35:11.463482 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1387 14:35:11.474082 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1388 14:35:11.483556 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1389 14:35:11.487083 PCI: 00:00.0
1390 14:35:11.496587 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1391 14:35:11.503279 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1392 14:35:11.513411 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1393 14:35:11.523222 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1394 14:35:11.533138 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1395 14:35:11.543398 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1396 14:35:11.553225 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1397 14:35:11.559484 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1398 14:35:11.569716 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1399 14:35:11.579685 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1400 14:35:11.589984 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1401 14:35:11.599523 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1402 14:35:11.609389 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1403 14:35:11.615913 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1404 14:35:11.625971 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1405 14:35:11.635765 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1406 14:35:11.645530 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1407 14:35:11.656157 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1408 14:35:11.665731 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1409 14:35:11.675829 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1410 14:35:11.676415 PCI: 00:02.0
1411 14:35:11.685649 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1412 14:35:11.696045 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1413 14:35:11.705583 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1414 14:35:11.711951 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1415 14:35:11.722020 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1416 14:35:11.722613 GENERIC: 0.0
1417 14:35:11.725398 PCI: 00:05.0
1418 14:35:11.735410 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1419 14:35:11.738433 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1420 14:35:11.741748 GENERIC: 0.0
1421 14:35:11.742232 PCI: 00:08.0
1422 14:35:11.751853 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1423 14:35:11.755628 PCI: 00:0a.0
1424 14:35:11.759249 PCI: 00:0d.0 child on link 0 USB0 port 0
1425 14:35:11.768772 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1426 14:35:11.774912 USB0 port 0 child on link 0 USB3 port 0
1427 14:35:11.775499 USB3 port 0
1428 14:35:11.778525 USB3 port 1
1429 14:35:11.779110 USB3 port 2
1430 14:35:11.781822 USB3 port 3
1431 14:35:11.785131 PCI: 00:14.0 child on link 0 USB0 port 0
1432 14:35:11.795447 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1433 14:35:11.801625 USB0 port 0 child on link 0 USB2 port 0
1434 14:35:11.802211 USB2 port 0
1435 14:35:11.804941 USB2 port 1
1436 14:35:11.805456 USB2 port 2
1437 14:35:11.808361 USB2 port 3
1438 14:35:11.808938 USB2 port 4
1439 14:35:11.811417 USB2 port 5
1440 14:35:11.811904 USB2 port 6
1441 14:35:11.814756 USB2 port 7
1442 14:35:11.818225 USB2 port 8
1443 14:35:11.818818 USB2 port 9
1444 14:35:11.821452 USB3 port 0
1445 14:35:11.822048 USB3 port 1
1446 14:35:11.824945 USB3 port 2
1447 14:35:11.825565 USB3 port 3
1448 14:35:11.828165 PCI: 00:14.2
1449 14:35:11.838220 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1450 14:35:11.848016 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1451 14:35:11.851355 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1452 14:35:11.860847 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1453 14:35:11.864776 GENERIC: 0.0
1454 14:35:11.868140 PCI: 00:15.0 child on link 0 I2C: 00:1a
1455 14:35:11.877835 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1456 14:35:11.880822 I2C: 00:1a
1457 14:35:11.881292 I2C: 00:31
1458 14:35:11.884718 I2C: 00:32
1459 14:35:11.887768 PCI: 00:15.1 child on link 0 I2C: 00:10
1460 14:35:11.897593 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1461 14:35:11.901059 I2C: 00:10
1462 14:35:11.901702 PCI: 00:15.2
1463 14:35:11.910573 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1464 14:35:11.914004 PCI: 00:15.3
1465 14:35:11.924480 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1466 14:35:11.925110 PCI: 00:16.0
1467 14:35:11.937293 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1468 14:35:11.937872 PCI: 00:19.0
1469 14:35:11.940844 PCI: 00:19.1 child on link 0 I2C: 00:15
1470 14:35:11.950424 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1471 14:35:11.953779 I2C: 00:15
1472 14:35:11.956705 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1473 14:35:11.967719 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1474 14:35:11.980570 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1475 14:35:11.990289 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1476 14:35:11.990868 GENERIC: 0.0
1477 14:35:11.993424 PCI: 01:00.0
1478 14:35:12.003374 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1479 14:35:12.013222 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1480 14:35:12.023148 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1481 14:35:12.026933 PCI: 00:1e.0
1482 14:35:12.036824 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1483 14:35:12.039742 PCI: 00:1e.2 child on link 0 SPI: 00
1484 14:35:12.053285 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1485 14:35:12.053876 SPI: 00
1486 14:35:12.056711 PCI: 00:1e.3 child on link 0 SPI: 00
1487 14:35:12.066658 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1488 14:35:12.069635 SPI: 00
1489 14:35:12.073244 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1490 14:35:12.083165 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1491 14:35:12.083756 PNP: 0c09.0
1492 14:35:12.092705 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1493 14:35:12.096217 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1494 14:35:12.105922 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1495 14:35:12.116057 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1496 14:35:12.119348 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1497 14:35:12.122714 GENERIC: 0.0
1498 14:35:12.123177 GENERIC: 1.0
1499 14:35:12.125897 PCI: 00:1f.3
1500 14:35:12.136134 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1501 14:35:12.145588 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1502 14:35:12.148746 PCI: 00:1f.5
1503 14:35:12.158772 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1504 14:35:12.162132 CPU_CLUSTER: 0 child on link 0 APIC: 00
1505 14:35:12.162601 APIC: 00
1506 14:35:12.165659 APIC: 01
1507 14:35:12.166204 APIC: 07
1508 14:35:12.166556 APIC: 02
1509 14:35:12.169183 APIC: 04
1510 14:35:12.169717 APIC: 06
1511 14:35:12.172014 APIC: 03
1512 14:35:12.172456 APIC: 05
1513 14:35:12.175398 Done allocating resources.
1514 14:35:12.182542 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1515 14:35:12.189358 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1516 14:35:12.192105 Configure GPIOs for I2S audio on UP4.
1517 14:35:12.198767 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1518 14:35:12.202005 Enabling resources...
1519 14:35:12.205218 PCI: 00:00.0 subsystem <- 8086/9a12
1520 14:35:12.205786 PCI: 00:00.0 cmd <- 06
1521 14:35:12.212005 PCI: 00:02.0 subsystem <- 8086/9a40
1522 14:35:12.212590 PCI: 00:02.0 cmd <- 03
1523 14:35:12.214766 PCI: 00:04.0 subsystem <- 8086/9a03
1524 14:35:12.218227 PCI: 00:04.0 cmd <- 02
1525 14:35:12.221727 PCI: 00:05.0 subsystem <- 8086/9a19
1526 14:35:12.224895 PCI: 00:05.0 cmd <- 02
1527 14:35:12.228468 PCI: 00:08.0 subsystem <- 8086/9a11
1528 14:35:12.231790 PCI: 00:08.0 cmd <- 06
1529 14:35:12.235099 PCI: 00:0d.0 subsystem <- 8086/9a13
1530 14:35:12.238492 PCI: 00:0d.0 cmd <- 02
1531 14:35:12.241718 PCI: 00:14.0 subsystem <- 8086/a0ed
1532 14:35:12.244696 PCI: 00:14.0 cmd <- 02
1533 14:35:12.248099 PCI: 00:14.2 subsystem <- 8086/a0ef
1534 14:35:12.251492 PCI: 00:14.2 cmd <- 02
1535 14:35:12.255140 PCI: 00:14.3 subsystem <- 8086/a0f0
1536 14:35:12.255685 PCI: 00:14.3 cmd <- 02
1537 14:35:12.261261 PCI: 00:15.0 subsystem <- 8086/a0e8
1538 14:35:12.261705 PCI: 00:15.0 cmd <- 02
1539 14:35:12.264648 PCI: 00:15.1 subsystem <- 8086/a0e9
1540 14:35:12.268288 PCI: 00:15.1 cmd <- 02
1541 14:35:12.271604 PCI: 00:15.2 subsystem <- 8086/a0ea
1542 14:35:12.274663 PCI: 00:15.2 cmd <- 02
1543 14:35:12.277935 PCI: 00:15.3 subsystem <- 8086/a0eb
1544 14:35:12.281984 PCI: 00:15.3 cmd <- 02
1545 14:35:12.284873 PCI: 00:16.0 subsystem <- 8086/a0e0
1546 14:35:12.288425 PCI: 00:16.0 cmd <- 02
1547 14:35:12.291708 PCI: 00:19.1 subsystem <- 8086/a0c6
1548 14:35:12.294632 PCI: 00:19.1 cmd <- 02
1549 14:35:12.298321 PCI: 00:1d.0 bridge ctrl <- 0013
1550 14:35:12.301310 PCI: 00:1d.0 subsystem <- 8086/a0b0
1551 14:35:12.305288 PCI: 00:1d.0 cmd <- 06
1552 14:35:12.307973 PCI: 00:1e.0 subsystem <- 8086/a0a8
1553 14:35:12.308461 PCI: 00:1e.0 cmd <- 06
1554 14:35:12.314652 PCI: 00:1e.2 subsystem <- 8086/a0aa
1555 14:35:12.315241 PCI: 00:1e.2 cmd <- 06
1556 14:35:12.318061 PCI: 00:1e.3 subsystem <- 8086/a0ab
1557 14:35:12.321122 PCI: 00:1e.3 cmd <- 02
1558 14:35:12.324292 PCI: 00:1f.0 subsystem <- 8086/a087
1559 14:35:12.327301 PCI: 00:1f.0 cmd <- 407
1560 14:35:12.330845 PCI: 00:1f.3 subsystem <- 8086/a0c8
1561 14:35:12.333977 PCI: 00:1f.3 cmd <- 02
1562 14:35:12.337701 PCI: 00:1f.5 subsystem <- 8086/a0a4
1563 14:35:12.340972 PCI: 00:1f.5 cmd <- 406
1564 14:35:12.344285 PCI: 01:00.0 cmd <- 02
1565 14:35:12.349534 done.
1566 14:35:12.352333 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1567 14:35:12.355791 Initializing devices...
1568 14:35:12.359141 Root Device init
1569 14:35:12.362149 Chrome EC: Set SMI mask to 0x0000000000000000
1570 14:35:12.369746 Chrome EC: clear events_b mask to 0x0000000000000000
1571 14:35:12.376839 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1572 14:35:12.383709 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1573 14:35:12.389860 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1574 14:35:12.393232 Chrome EC: Set WAKE mask to 0x0000000000000000
1575 14:35:12.400543 fw_config match found: DB_USB=USB3_ACTIVE
1576 14:35:12.403632 Configure Right Type-C port orientation for retimer
1577 14:35:12.407222 Root Device init finished in 46 msecs
1578 14:35:12.411504 PCI: 00:00.0 init
1579 14:35:12.414435 CPU TDP = 9 Watts
1580 14:35:12.414924 CPU PL1 = 9 Watts
1581 14:35:12.417929 CPU PL2 = 40 Watts
1582 14:35:12.421287 CPU PL4 = 83 Watts
1583 14:35:12.424361 PCI: 00:00.0 init finished in 8 msecs
1584 14:35:12.424853 PCI: 00:02.0 init
1585 14:35:12.427594 GMA: Found VBT in CBFS
1586 14:35:12.430753 GMA: Found valid VBT in CBFS
1587 14:35:12.437454 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1588 14:35:12.444000 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1589 14:35:12.447190 PCI: 00:02.0 init finished in 18 msecs
1590 14:35:12.451105 PCI: 00:05.0 init
1591 14:35:12.453919 PCI: 00:05.0 init finished in 0 msecs
1592 14:35:12.457675 PCI: 00:08.0 init
1593 14:35:12.460746 PCI: 00:08.0 init finished in 0 msecs
1594 14:35:12.464172 PCI: 00:14.0 init
1595 14:35:12.467552 PCI: 00:14.0 init finished in 0 msecs
1596 14:35:12.470899 PCI: 00:14.2 init
1597 14:35:12.474230 PCI: 00:14.2 init finished in 0 msecs
1598 14:35:12.477586 PCI: 00:15.0 init
1599 14:35:12.478086 I2C bus 0 version 0x3230302a
1600 14:35:12.484235 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1601 14:35:12.487504 PCI: 00:15.0 init finished in 6 msecs
1602 14:35:12.488089 PCI: 00:15.1 init
1603 14:35:12.490772 I2C bus 1 version 0x3230302a
1604 14:35:12.493933 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1605 14:35:12.500662 PCI: 00:15.1 init finished in 6 msecs
1606 14:35:12.501284 PCI: 00:15.2 init
1607 14:35:12.504244 I2C bus 2 version 0x3230302a
1608 14:35:12.507376 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1609 14:35:12.510981 PCI: 00:15.2 init finished in 6 msecs
1610 14:35:12.514020 PCI: 00:15.3 init
1611 14:35:12.517421 I2C bus 3 version 0x3230302a
1612 14:35:12.520962 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1613 14:35:12.523698 PCI: 00:15.3 init finished in 6 msecs
1614 14:35:12.526894 PCI: 00:16.0 init
1615 14:35:12.530468 PCI: 00:16.0 init finished in 0 msecs
1616 14:35:12.533544 PCI: 00:19.1 init
1617 14:35:12.536857 I2C bus 5 version 0x3230302a
1618 14:35:12.540105 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1619 14:35:12.543379 PCI: 00:19.1 init finished in 6 msecs
1620 14:35:12.547093 PCI: 00:1d.0 init
1621 14:35:12.547534 Initializing PCH PCIe bridge.
1622 14:35:12.553713 PCI: 00:1d.0 init finished in 3 msecs
1623 14:35:12.556782 PCI: 00:1f.0 init
1624 14:35:12.560194 IOAPIC: Initializing IOAPIC at 0xfec00000
1625 14:35:12.563708 IOAPIC: Bootstrap Processor Local APIC = 0x00
1626 14:35:12.566576 IOAPIC: ID = 0x02
1627 14:35:12.570043 IOAPIC: Dumping registers
1628 14:35:12.570509 reg 0x0000: 0x02000000
1629 14:35:12.573617 reg 0x0001: 0x00770020
1630 14:35:12.576985 reg 0x0002: 0x00000000
1631 14:35:12.580207 PCI: 00:1f.0 init finished in 21 msecs
1632 14:35:12.583373 PCI: 00:1f.2 init
1633 14:35:12.587355 Disabling ACPI via APMC.
1634 14:35:12.590641 APMC done.
1635 14:35:12.593571 PCI: 00:1f.2 init finished in 6 msecs
1636 14:35:12.605102 PCI: 01:00.0 init
1637 14:35:12.608361 PCI: 01:00.0 init finished in 0 msecs
1638 14:35:12.611930 PNP: 0c09.0 init
1639 14:35:12.618159 Google Chrome EC uptime: 8.425 seconds
1640 14:35:12.621649 Google Chrome AP resets since EC boot: 0
1641 14:35:12.625097 Google Chrome most recent AP reset causes:
1642 14:35:12.631722 Google Chrome EC reset flags at last EC boot: reset-pin
1643 14:35:12.634669 PNP: 0c09.0 init finished in 19 msecs
1644 14:35:12.640215 Devices initialized
1645 14:35:12.643488 Show all devs... After init.
1646 14:35:12.646340 Root Device: enabled 1
1647 14:35:12.646830 DOMAIN: 0000: enabled 1
1648 14:35:12.650113 CPU_CLUSTER: 0: enabled 1
1649 14:35:12.653143 PCI: 00:00.0: enabled 1
1650 14:35:12.656577 PCI: 00:02.0: enabled 1
1651 14:35:12.657145 PCI: 00:04.0: enabled 1
1652 14:35:12.659879 PCI: 00:05.0: enabled 1
1653 14:35:12.663351 PCI: 00:06.0: enabled 0
1654 14:35:12.666188 PCI: 00:07.0: enabled 0
1655 14:35:12.666633 PCI: 00:07.1: enabled 0
1656 14:35:12.669887 PCI: 00:07.2: enabled 0
1657 14:35:12.673231 PCI: 00:07.3: enabled 0
1658 14:35:12.676288 PCI: 00:08.0: enabled 1
1659 14:35:12.676762 PCI: 00:09.0: enabled 0
1660 14:35:12.680091 PCI: 00:0a.0: enabled 0
1661 14:35:12.683655 PCI: 00:0d.0: enabled 1
1662 14:35:12.686221 PCI: 00:0d.1: enabled 0
1663 14:35:12.686662 PCI: 00:0d.2: enabled 0
1664 14:35:12.689567 PCI: 00:0d.3: enabled 0
1665 14:35:12.692975 PCI: 00:0e.0: enabled 0
1666 14:35:12.693448 PCI: 00:10.2: enabled 1
1667 14:35:12.696417 PCI: 00:10.6: enabled 0
1668 14:35:12.699809 PCI: 00:10.7: enabled 0
1669 14:35:12.703200 PCI: 00:12.0: enabled 0
1670 14:35:12.703758 PCI: 00:12.6: enabled 0
1671 14:35:12.706866 PCI: 00:13.0: enabled 0
1672 14:35:12.709924 PCI: 00:14.0: enabled 1
1673 14:35:12.713036 PCI: 00:14.1: enabled 0
1674 14:35:12.713605 PCI: 00:14.2: enabled 1
1675 14:35:12.716025 PCI: 00:14.3: enabled 1
1676 14:35:12.719356 PCI: 00:15.0: enabled 1
1677 14:35:12.722671 PCI: 00:15.1: enabled 1
1678 14:35:12.723115 PCI: 00:15.2: enabled 1
1679 14:35:12.726335 PCI: 00:15.3: enabled 1
1680 14:35:12.729626 PCI: 00:16.0: enabled 1
1681 14:35:12.730165 PCI: 00:16.1: enabled 0
1682 14:35:12.732822 PCI: 00:16.2: enabled 0
1683 14:35:12.736342 PCI: 00:16.3: enabled 0
1684 14:35:12.739242 PCI: 00:16.4: enabled 0
1685 14:35:12.739683 PCI: 00:16.5: enabled 0
1686 14:35:12.742635 PCI: 00:17.0: enabled 0
1687 14:35:12.746348 PCI: 00:19.0: enabled 0
1688 14:35:12.749242 PCI: 00:19.1: enabled 1
1689 14:35:12.749679 PCI: 00:19.2: enabled 0
1690 14:35:12.752661 PCI: 00:1c.0: enabled 1
1691 14:35:12.756212 PCI: 00:1c.1: enabled 0
1692 14:35:12.759797 PCI: 00:1c.2: enabled 0
1693 14:35:12.760330 PCI: 00:1c.3: enabled 0
1694 14:35:12.762715 PCI: 00:1c.4: enabled 0
1695 14:35:12.765724 PCI: 00:1c.5: enabled 0
1696 14:35:12.769606 PCI: 00:1c.6: enabled 1
1697 14:35:12.770043 PCI: 00:1c.7: enabled 0
1698 14:35:12.772781 PCI: 00:1d.0: enabled 1
1699 14:35:12.775952 PCI: 00:1d.1: enabled 0
1700 14:35:12.776394 PCI: 00:1d.2: enabled 1
1701 14:35:12.779580 PCI: 00:1d.3: enabled 0
1702 14:35:12.782796 PCI: 00:1e.0: enabled 1
1703 14:35:12.786029 PCI: 00:1e.1: enabled 0
1704 14:35:12.786574 PCI: 00:1e.2: enabled 1
1705 14:35:12.789455 PCI: 00:1e.3: enabled 1
1706 14:35:12.793193 PCI: 00:1f.0: enabled 1
1707 14:35:12.796347 PCI: 00:1f.1: enabled 0
1708 14:35:12.796929 PCI: 00:1f.2: enabled 1
1709 14:35:12.799589 PCI: 00:1f.3: enabled 1
1710 14:35:12.802631 PCI: 00:1f.4: enabled 0
1711 14:35:12.805860 PCI: 00:1f.5: enabled 1
1712 14:35:12.806300 PCI: 00:1f.6: enabled 0
1713 14:35:12.809113 PCI: 00:1f.7: enabled 0
1714 14:35:12.812564 APIC: 00: enabled 1
1715 14:35:12.813135 GENERIC: 0.0: enabled 1
1716 14:35:12.815855 GENERIC: 0.0: enabled 1
1717 14:35:12.819247 GENERIC: 1.0: enabled 1
1718 14:35:12.822373 GENERIC: 0.0: enabled 1
1719 14:35:12.822908 GENERIC: 1.0: enabled 1
1720 14:35:12.825839 USB0 port 0: enabled 1
1721 14:35:12.829237 GENERIC: 0.0: enabled 1
1722 14:35:12.832451 USB0 port 0: enabled 1
1723 14:35:12.833001 GENERIC: 0.0: enabled 1
1724 14:35:12.835933 I2C: 00:1a: enabled 1
1725 14:35:12.839036 I2C: 00:31: enabled 1
1726 14:35:12.839475 I2C: 00:32: enabled 1
1727 14:35:12.842592 I2C: 00:10: enabled 1
1728 14:35:12.845393 I2C: 00:15: enabled 1
1729 14:35:12.845834 GENERIC: 0.0: enabled 0
1730 14:35:12.848707 GENERIC: 1.0: enabled 0
1731 14:35:12.852390 GENERIC: 0.0: enabled 1
1732 14:35:12.853108 SPI: 00: enabled 1
1733 14:35:12.855609 SPI: 00: enabled 1
1734 14:35:12.859147 PNP: 0c09.0: enabled 1
1735 14:35:12.859698 GENERIC: 0.0: enabled 1
1736 14:35:12.862353 USB3 port 0: enabled 1
1737 14:35:12.865270 USB3 port 1: enabled 1
1738 14:35:12.868574 USB3 port 2: enabled 0
1739 14:35:12.869005 USB3 port 3: enabled 0
1740 14:35:12.871968 USB2 port 0: enabled 0
1741 14:35:12.875499 USB2 port 1: enabled 1
1742 14:35:12.876046 USB2 port 2: enabled 1
1743 14:35:12.878826 USB2 port 3: enabled 0
1744 14:35:12.881960 USB2 port 4: enabled 1
1745 14:35:12.885495 USB2 port 5: enabled 0
1746 14:35:12.885928 USB2 port 6: enabled 0
1747 14:35:12.888609 USB2 port 7: enabled 0
1748 14:35:12.892361 USB2 port 8: enabled 0
1749 14:35:12.892903 USB2 port 9: enabled 0
1750 14:35:12.895477 USB3 port 0: enabled 0
1751 14:35:12.898826 USB3 port 1: enabled 1
1752 14:35:12.899366 USB3 port 2: enabled 0
1753 14:35:12.901734 USB3 port 3: enabled 0
1754 14:35:12.905141 GENERIC: 0.0: enabled 1
1755 14:35:12.908531 GENERIC: 1.0: enabled 1
1756 14:35:12.909103 APIC: 01: enabled 1
1757 14:35:12.911486 APIC: 07: enabled 1
1758 14:35:12.915308 APIC: 02: enabled 1
1759 14:35:12.915841 APIC: 04: enabled 1
1760 14:35:12.918427 APIC: 06: enabled 1
1761 14:35:12.918963 APIC: 03: enabled 1
1762 14:35:12.921989 APIC: 05: enabled 1
1763 14:35:12.924994 PCI: 01:00.0: enabled 1
1764 14:35:12.928747 BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms
1765 14:35:12.935045 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1766 14:35:12.938079 ELOG: NV offset 0xf30000 size 0x1000
1767 14:35:12.945262 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1768 14:35:12.952219 ELOG: Event(17) added with size 13 at 2022-07-26 13:28:37 UTC
1769 14:35:12.958677 ELOG: Event(92) added with size 9 at 2022-07-26 13:28:37 UTC
1770 14:35:12.965039 ELOG: Event(93) added with size 9 at 2022-07-26 13:28:37 UTC
1771 14:35:12.971386 ELOG: Event(9E) added with size 10 at 2022-07-26 13:28:37 UTC
1772 14:35:12.977924 ELOG: Event(9F) added with size 14 at 2022-07-26 13:28:37 UTC
1773 14:35:12.984741 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1774 14:35:12.991497 ELOG: Event(A1) added with size 10 at 2022-07-26 13:28:37 UTC
1775 14:35:12.998495 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1776 14:35:13.004651 ELOG: Event(A0) added with size 9 at 2022-07-26 13:28:37 UTC
1777 14:35:13.008117 elog_add_boot_reason: Logged dev mode boot
1778 14:35:13.014785 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1779 14:35:13.015377 Finalize devices...
1780 14:35:13.018155 Devices finalized
1781 14:35:13.024813 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1782 14:35:13.027666 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1783 14:35:13.034287 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1784 14:35:13.037776 ME: HFSTS1 : 0x80030055
1785 14:35:13.044230 ME: HFSTS2 : 0x30280116
1786 14:35:13.047519 ME: HFSTS3 : 0x00000050
1787 14:35:13.050725 ME: HFSTS4 : 0x00004000
1788 14:35:13.057381 ME: HFSTS5 : 0x00000000
1789 14:35:13.061111 ME: HFSTS6 : 0x00400006
1790 14:35:13.064037 ME: Manufacturing Mode : YES
1791 14:35:13.067347 ME: SPI Protection Mode Enabled : NO
1792 14:35:13.074024 ME: FW Partition Table : OK
1793 14:35:13.077226 ME: Bringup Loader Failure : NO
1794 14:35:13.080637 ME: Firmware Init Complete : NO
1795 14:35:13.084002 ME: Boot Options Present : NO
1796 14:35:13.087571 ME: Update In Progress : NO
1797 14:35:13.091224 ME: D0i3 Support : YES
1798 14:35:13.093956 ME: Low Power State Enabled : NO
1799 14:35:13.097268 ME: CPU Replaced : YES
1800 14:35:13.103915 ME: CPU Replacement Valid : YES
1801 14:35:13.107209 ME: Current Working State : 5
1802 14:35:13.110267 ME: Current Operation State : 1
1803 14:35:13.113797 ME: Current Operation Mode : 3
1804 14:35:13.117265 ME: Error Code : 0
1805 14:35:13.120536 ME: Enhanced Debug Mode : NO
1806 14:35:13.123884 ME: CPU Debug Disabled : YES
1807 14:35:13.127225 ME: TXT Support : NO
1808 14:35:13.133535 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1809 14:35:13.143289 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1810 14:35:13.146738 CBFS: 'fallback/slic' not found.
1811 14:35:13.149768 ACPI: Writing ACPI tables at 76b01000.
1812 14:35:13.150306 ACPI: * FACS
1813 14:35:13.153213 ACPI: * DSDT
1814 14:35:13.156622 Ramoops buffer: 0x100000@0x76a00000.
1815 14:35:13.159445 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1816 14:35:13.166048 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1817 14:35:13.169423 Google Chrome EC: version:
1818 14:35:13.172666 ro: voema_v2.0.10114-a447f03e46
1819 14:35:13.176639 rw: voema_v2.0.10114-a447f03e46
1820 14:35:13.179399 running image: 1
1821 14:35:13.182849 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1822 14:35:13.187941 ACPI: * FADT
1823 14:35:13.188472 SCI is IRQ9
1824 14:35:13.195024 ACPI: added table 1/32, length now 40
1825 14:35:13.195575 ACPI: * SSDT
1826 14:35:13.197938 Found 1 CPU(s) with 8 core(s) each.
1827 14:35:13.205127 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1828 14:35:13.207865 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1829 14:35:13.211633 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1830 14:35:13.214833 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1831 14:35:13.221351 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1832 14:35:13.228164 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1833 14:35:13.232024 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1834 14:35:13.237703 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1835 14:35:13.244493 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1836 14:35:13.247878 \_SB.PCI0.RP09: Added StorageD3Enable property
1837 14:35:13.250956 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1838 14:35:13.257815 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1839 14:35:13.264691 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1840 14:35:13.267824 PS2K: Passing 80 keymaps to kernel
1841 14:35:13.274023 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1842 14:35:13.280807 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1843 14:35:13.287749 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1844 14:35:13.294807 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1845 14:35:13.301549 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1846 14:35:13.307344 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1847 14:35:13.313922 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1848 14:35:13.321326 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1849 14:35:13.324464 ACPI: added table 2/32, length now 44
1850 14:35:13.324996 ACPI: * MCFG
1851 14:35:13.331110 ACPI: added table 3/32, length now 48
1852 14:35:13.331644 ACPI: * TPM2
1853 14:35:13.333996 TPM2 log created at 0x769f0000
1854 14:35:13.337654 ACPI: added table 4/32, length now 52
1855 14:35:13.340708 ACPI: * MADT
1856 14:35:13.341266 SCI is IRQ9
1857 14:35:13.344088 ACPI: added table 5/32, length now 56
1858 14:35:13.347246 current = 76b09850
1859 14:35:13.347677 ACPI: * DMAR
1860 14:35:13.350472 ACPI: added table 6/32, length now 60
1861 14:35:13.357501 ACPI: added table 7/32, length now 64
1862 14:35:13.357951 ACPI: * HPET
1863 14:35:13.360742 ACPI: added table 8/32, length now 68
1864 14:35:13.363635 ACPI: done.
1865 14:35:13.364055 ACPI tables: 35216 bytes.
1866 14:35:13.367233 smbios_write_tables: 769ef000
1867 14:35:13.370759 EC returned error result code 3
1868 14:35:13.373584 Couldn't obtain OEM name from CBI
1869 14:35:13.377411 Create SMBIOS type 16
1870 14:35:13.380930 Create SMBIOS type 17
1871 14:35:13.383822 GENERIC: 0.0 (WIFI Device)
1872 14:35:13.387529 SMBIOS tables: 1750 bytes.
1873 14:35:13.390758 Writing table forward entry at 0x00000500
1874 14:35:13.397345 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1875 14:35:13.400726 Writing coreboot table at 0x76b25000
1876 14:35:13.407151 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1877 14:35:13.410698 1. 0000000000001000-000000000009ffff: RAM
1878 14:35:13.413668 2. 00000000000a0000-00000000000fffff: RESERVED
1879 14:35:13.420829 3. 0000000000100000-00000000769eefff: RAM
1880 14:35:13.423957 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1881 14:35:13.430845 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1882 14:35:13.437053 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1883 14:35:13.440815 7. 0000000077000000-000000007fbfffff: RESERVED
1884 14:35:13.446639 8. 00000000c0000000-00000000cfffffff: RESERVED
1885 14:35:13.450189 9. 00000000f8000000-00000000f9ffffff: RESERVED
1886 14:35:13.453405 10. 00000000fb000000-00000000fb000fff: RESERVED
1887 14:35:13.459950 11. 00000000fe000000-00000000fe00ffff: RESERVED
1888 14:35:13.463297 12. 00000000fed80000-00000000fed87fff: RESERVED
1889 14:35:13.470490 13. 00000000fed90000-00000000fed92fff: RESERVED
1890 14:35:13.473170 14. 00000000feda0000-00000000feda1fff: RESERVED
1891 14:35:13.480015 15. 00000000fedc0000-00000000feddffff: RESERVED
1892 14:35:13.483077 16. 0000000100000000-00000002803fffff: RAM
1893 14:35:13.486504 Passing 4 GPIOs to payload:
1894 14:35:13.489840 NAME | PORT | POLARITY | VALUE
1895 14:35:13.496922 lid | undefined | high | high
1896 14:35:13.503153 power | undefined | high | low
1897 14:35:13.506342 oprom | undefined | high | low
1898 14:35:13.512998 EC in RW | 0x000000e5 | high | low
1899 14:35:13.519862 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d0c8
1900 14:35:13.523451 coreboot table: 1576 bytes.
1901 14:35:13.526418 IMD ROOT 0. 0x76fff000 0x00001000
1902 14:35:13.530024 IMD SMALL 1. 0x76ffe000 0x00001000
1903 14:35:13.532732 FSP MEMORY 2. 0x76c4e000 0x003b0000
1904 14:35:13.536072 VPD 3. 0x76c4d000 0x00000367
1905 14:35:13.539494 RO MCACHE 4. 0x76c4c000 0x00000fdc
1906 14:35:13.542754 CONSOLE 5. 0x76c2c000 0x00020000
1907 14:35:13.549141 FMAP 6. 0x76c2b000 0x00000578
1908 14:35:13.552710 TIME STAMP 7. 0x76c2a000 0x00000910
1909 14:35:13.555804 VBOOT WORK 8. 0x76c16000 0x00014000
1910 14:35:13.559059 ROMSTG STCK 9. 0x76c15000 0x00001000
1911 14:35:13.562759 AFTER CAR 10. 0x76c0a000 0x0000b000
1912 14:35:13.565901 RAMSTAGE 11. 0x76b97000 0x00073000
1913 14:35:13.569006 REFCODE 12. 0x76b42000 0x00055000
1914 14:35:13.572721 SMM BACKUP 13. 0x76b32000 0x00010000
1915 14:35:13.579420 4f444749 14. 0x76b30000 0x00002000
1916 14:35:13.582367 EXT VBT15. 0x76b2d000 0x0000219f
1917 14:35:13.585918 COREBOOT 16. 0x76b25000 0x00008000
1918 14:35:13.589266 ACPI 17. 0x76b01000 0x00024000
1919 14:35:13.592277 ACPI GNVS 18. 0x76b00000 0x00001000
1920 14:35:13.595843 RAMOOPS 19. 0x76a00000 0x00100000
1921 14:35:13.598985 TPM2 TCGLOG20. 0x769f0000 0x00010000
1922 14:35:13.602281 SMBIOS 21. 0x769ef000 0x00000800
1923 14:35:13.605827 IMD small region:
1924 14:35:13.608943 IMD ROOT 0. 0x76ffec00 0x00000400
1925 14:35:13.612069 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1926 14:35:13.615795 POWER STATE 2. 0x76ffeb80 0x00000044
1927 14:35:13.622172 ROMSTAGE 3. 0x76ffeb60 0x00000004
1928 14:35:13.625830 MEM INFO 4. 0x76ffe980 0x000001e0
1929 14:35:13.632185 BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
1930 14:35:13.632734 MTRR: Physical address space:
1931 14:35:13.638773 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1932 14:35:13.645381 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1933 14:35:13.652401 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1934 14:35:13.658432 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1935 14:35:13.665124 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1936 14:35:13.672208 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1937 14:35:13.678117 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1938 14:35:13.681731 MTRR: Fixed MSR 0x250 0x0606060606060606
1939 14:35:13.685218 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 14:35:13.688510 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 14:35:13.695158 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 14:35:13.698513 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 14:35:13.701309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 14:35:13.704960 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 14:35:13.711614 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 14:35:13.714644 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 14:35:13.718203 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 14:35:13.721392 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 14:35:13.726046 call enable_fixed_mtrr()
1950 14:35:13.728670 CPU physical address size: 39 bits
1951 14:35:13.735795 MTRR: default type WB/UC MTRR counts: 6/6.
1952 14:35:13.738970 MTRR: UC selected as default type.
1953 14:35:13.745734 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1954 14:35:13.748967 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1955 14:35:13.755145 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1956 14:35:13.761853 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1957 14:35:13.768917 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1958 14:35:13.775359 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1959 14:35:13.781815 MTRR: Fixed MSR 0x250 0x0606060606060606
1960 14:35:13.785317 MTRR: Fixed MSR 0x258 0x0606060606060606
1961 14:35:13.788483 MTRR: Fixed MSR 0x259 0x0000000000000000
1962 14:35:13.791939 MTRR: Fixed MSR 0x268 0x0606060606060606
1963 14:35:13.798312 MTRR: Fixed MSR 0x269 0x0606060606060606
1964 14:35:13.801663 MTRR: Fixed MSR 0x26a 0x0606060606060606
1965 14:35:13.804719 MTRR: Fixed MSR 0x26b 0x0606060606060606
1966 14:35:13.808508 MTRR: Fixed MSR 0x26c 0x0606060606060606
1967 14:35:13.811966 MTRR: Fixed MSR 0x26d 0x0606060606060606
1968 14:35:13.818780 MTRR: Fixed MSR 0x26e 0x0606060606060606
1969 14:35:13.822246 MTRR: Fixed MSR 0x26f 0x0606060606060606
1970 14:35:13.822787
1971 14:35:13.825323 MTRR check
1972 14:35:13.825890 call enable_fixed_mtrr()
1973 14:35:13.828598 Fixed MTRRs : Enabled
1974 14:35:13.831714 Variable MTRRs: Enabled
1975 14:35:13.832293
1976 14:35:13.834822 CPU physical address size: 39 bits
1977 14:35:13.841997 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1978 14:35:13.845103 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 14:35:13.851305 MTRR: Fixed MSR 0x250 0x0606060606060606
1980 14:35:13.854749 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 14:35:13.858333 MTRR: Fixed MSR 0x259 0x0000000000000000
1982 14:35:13.861542 MTRR: Fixed MSR 0x268 0x0606060606060606
1983 14:35:13.868057 MTRR: Fixed MSR 0x269 0x0606060606060606
1984 14:35:13.871501 MTRR: Fixed MSR 0x26a 0x0606060606060606
1985 14:35:13.874711 MTRR: Fixed MSR 0x26b 0x0606060606060606
1986 14:35:13.877945 MTRR: Fixed MSR 0x26c 0x0606060606060606
1987 14:35:13.884986 MTRR: Fixed MSR 0x26d 0x0606060606060606
1988 14:35:13.888215 MTRR: Fixed MSR 0x26e 0x0606060606060606
1989 14:35:13.891521 MTRR: Fixed MSR 0x26f 0x0606060606060606
1990 14:35:13.898049 MTRR: Fixed MSR 0x258 0x0606060606060606
1991 14:35:13.898574 call enable_fixed_mtrr()
1992 14:35:13.904580 MTRR: Fixed MSR 0x259 0x0000000000000000
1993 14:35:13.907747 MTRR: Fixed MSR 0x268 0x0606060606060606
1994 14:35:13.911239 MTRR: Fixed MSR 0x269 0x0606060606060606
1995 14:35:13.914590 MTRR: Fixed MSR 0x26a 0x0606060606060606
1996 14:35:13.921330 MTRR: Fixed MSR 0x26b 0x0606060606060606
1997 14:35:13.924630 MTRR: Fixed MSR 0x26c 0x0606060606060606
1998 14:35:13.928247 MTRR: Fixed MSR 0x26d 0x0606060606060606
1999 14:35:13.931793 MTRR: Fixed MSR 0x26e 0x0606060606060606
2000 14:35:13.934497 MTRR: Fixed MSR 0x26f 0x0606060606060606
2001 14:35:13.941127 CPU physical address size: 39 bits
2002 14:35:13.944557 call enable_fixed_mtrr()
2003 14:35:13.948205 MTRR: Fixed MSR 0x250 0x0606060606060606
2004 14:35:13.950990 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 14:35:13.957342 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 14:35:13.961276 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 14:35:13.964186 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 14:35:13.967402 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 14:35:13.974098 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 14:35:13.977686 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 14:35:13.980668 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 14:35:13.984201 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 14:35:13.991008 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 14:35:13.994382 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 14:35:13.997280 MTRR: Fixed MSR 0x258 0x0606060606060606
2016 14:35:14.000810 call enable_fixed_mtrr()
2017 14:35:14.003828 MTRR: Fixed MSR 0x259 0x0000000000000000
2018 14:35:14.010890 MTRR: Fixed MSR 0x268 0x0606060606060606
2019 14:35:14.014207 MTRR: Fixed MSR 0x269 0x0606060606060606
2020 14:35:14.018400 MTRR: Fixed MSR 0x26a 0x0606060606060606
2021 14:35:14.020887 MTRR: Fixed MSR 0x26b 0x0606060606060606
2022 14:35:14.027309 MTRR: Fixed MSR 0x26c 0x0606060606060606
2023 14:35:14.030583 MTRR: Fixed MSR 0x26d 0x0606060606060606
2024 14:35:14.033840 MTRR: Fixed MSR 0x26e 0x0606060606060606
2025 14:35:14.037230 MTRR: Fixed MSR 0x26f 0x0606060606060606
2026 14:35:14.041135 CPU physical address size: 39 bits
2027 14:35:14.047653 call enable_fixed_mtrr()
2028 14:35:14.050922 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 14:35:14.054282 MTRR: Fixed MSR 0x250 0x0606060606060606
2030 14:35:14.057774 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 14:35:14.064234 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 14:35:14.067215 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 14:35:14.070304 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 14:35:14.073983 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 14:35:14.077473 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 14:35:14.083782 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 14:35:14.087519 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 14:35:14.090245 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 14:35:14.093511 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 14:35:14.100857 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 14:35:14.103295 call enable_fixed_mtrr()
2042 14:35:14.106863 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 14:35:14.109933 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 14:35:14.116759 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 14:35:14.120144 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 14:35:14.123439 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 14:35:14.127197 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 14:35:14.130475 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 14:35:14.136598 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 14:35:14.140031 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 14:35:14.142806 CPU physical address size: 39 bits
2052 14:35:14.147706 call enable_fixed_mtrr()
2053 14:35:14.150462 CPU physical address size: 39 bits
2054 14:35:14.154816 Checking cr50 for pending updates
2055 14:35:14.158677 CPU physical address size: 39 bits
2056 14:35:14.162460 CPU physical address size: 39 bits
2057 14:35:14.165581 Reading cr50 TPM mode
2058 14:35:14.174501 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2059 14:35:14.184052 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2060 14:35:14.187899 Checking segment from ROM address 0xffc02b38
2061 14:35:14.190982 Checking segment from ROM address 0xffc02b54
2062 14:35:14.197241 Loading segment from ROM address 0xffc02b38
2063 14:35:14.197811 code (compression=0)
2064 14:35:14.207191 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2065 14:35:14.217038 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2066 14:35:14.217662 it's not compressed!
2067 14:35:14.356892 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2068 14:35:14.363583 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2069 14:35:14.370316 Loading segment from ROM address 0xffc02b54
2070 14:35:14.370826 Entry Point 0x30000000
2071 14:35:14.373253 Loaded segments
2072 14:35:14.379681 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2073 14:35:14.422887 Finalizing chipset.
2074 14:35:14.426617 Finalizing SMM.
2075 14:35:14.427201 APMC done.
2076 14:35:14.433047 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2077 14:35:14.436600 mp_park_aps done after 0 msecs.
2078 14:35:14.439656 Jumping to boot code at 0x30000000(0x76b25000)
2079 14:35:14.449517 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2080 14:35:14.450111
2081 14:35:14.452451 Starting depthcharge on Voema...
2082 14:35:14.453874 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2083 14:35:14.454452 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2084 14:35:14.454886 Setting prompt string to ['volteer:']
2085 14:35:14.455287 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2086 14:35:14.462815 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2087 14:35:14.469206 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2088 14:35:14.475801 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2089 14:35:14.479248 Failed to find eMMC card reader
2090 14:35:14.479850 Wipe memory regions:
2091 14:35:14.485782 [0x00000000001000, 0x000000000a0000)
2092 14:35:14.488998 [0x00000000100000, 0x00000030000000)
2093 14:35:14.517717 [0x00000032662db0, 0x000000769ef000)
2094 14:35:14.555997 [0x00000100000000, 0x00000280400000)
2095 14:35:14.757213 ec_init: CrosEC protocol v3 supported (256, 256)
2096 14:35:15.189734 R8152: Initializing
2097 14:35:15.192783 Version 6 (ocp_data = 5c30)
2098 14:35:15.196362 R8152: Done initializing
2099 14:35:15.199276 Adding net device
2100 14:35:15.504448 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2101 14:35:15.505046
2102 14:35:15.507713 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2104 14:35:15.609360 volteer: tftpboot 192.168.201.1 6895671/tftp-deploy-yu7m0mt5/kernel/bzImage 6895671/tftp-deploy-yu7m0mt5/kernel/cmdline 6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
2105 14:35:15.610192 Setting prompt string to 'Starting kernel'
2106 14:35:15.610682 Setting prompt string to ['Starting kernel']
2107 14:35:15.611071 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2108 14:35:15.611474 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:43)
2109 14:35:15.614818 tftpboot 192.168.201.1 6895671/tftp-deploy-yu7m0mt5/kernel/bzImoy-yu7m0mt5/kernel/cmdline 6895671/tftp-deploy-yu7m0mt5/ramdisk/ramdisk.cpio.gz
2110 14:35:15.615331 Waiting for link
2111 14:35:15.818940 done.
2112 14:35:15.819521 MAC: 00:24:32:30:77:76
2113 14:35:15.821851 Sending DHCP discover... done.
2114 14:35:15.825238 Waiting for reply... done.
2115 14:35:15.828675 Sending DHCP request... done.
2116 14:35:15.831887 Waiting for reply... done.
2117 14:35:15.835297 My ip is 192.168.201.13
2118 14:35:15.838583 The DHCP server ip is 192.168.201.1
2119 14:35:15.841749 TFTP server IP predefined by user: 192.168.201.1
2120 14:35:15.852133 Bootfile predefined by user: 6895671/tftp-deploy-yu7m0mt5/kernel/bzImage
2121 14:35:15.855053 Sending tftp read request... done.
2122 14:35:15.860504 Waiting for the transfer...
2123 14:35:16.589729 00000000 ################################################################
2124 14:35:17.324512 00080000 ################################################################
2125 14:35:18.065845 00100000 ################################################################
2126 14:35:18.793139 00180000 ################################################################
2127 14:35:19.516196 00200000 ################################################################
2128 14:35:20.222361 00280000 ################################################################
2129 14:35:20.952028 00300000 ################################################################
2130 14:35:21.674530 00380000 ################################################################
2131 14:35:22.395311 00400000 ################################################################
2132 14:35:23.119268 00480000 ################################################################
2133 14:35:23.839734 00500000 ################################################################
2134 14:35:24.568582 00580000 ################################################################
2135 14:35:25.322209 00600000 ################################################################ done.
2136 14:35:25.325167 The bootfile was 6815632 bytes long.
2137 14:35:25.328882 Sending tftp read request... done.
2138 14:35:25.331751 Waiting for the transfer...
2139 14:35:26.070791 00000000 ################################################################
2140 14:35:26.807736 00080000 ################################################################
2141 14:35:27.548181 00100000 ################################################################
2142 14:35:28.273960 00180000 ################################################################
2143 14:35:28.974667 00200000 ################################################################
2144 14:35:29.681403 00280000 ################################################################
2145 14:35:30.423782 00300000 ################################################################
2146 14:35:31.164692 00380000 ################################################################
2147 14:35:31.908444 00400000 ################################################################
2148 14:35:32.641033 00480000 ################################################################
2149 14:35:33.350213 00500000 ################################################################
2150 14:35:34.064097 00580000 ################################################################
2151 14:35:34.794937 00600000 ################################################################
2152 14:35:35.515066 00680000 ################################################################
2153 14:35:36.258043 00700000 ################################################################
2154 14:35:37.016524 00780000 ################################################################
2155 14:35:37.245194 00800000 #################### done.
2156 14:35:37.248443 Sending tftp read request... done.
2157 14:35:37.251527 Waiting for the transfer...
2158 14:35:37.251983 00000000 # done.
2159 14:35:37.261768 Command line loaded dynamically from TFTP file: 6895671/tftp-deploy-yu7m0mt5/kernel/cmdline
2160 14:35:37.275460 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2161 14:35:37.281896 Shutting down all USB controllers.
2162 14:35:37.282436 Removing current net device
2163 14:35:37.285219 Finalizing coreboot
2164 14:35:37.292450 Exiting depthcharge with code 4 at timestamp: 31500645
2165 14:35:37.292993
2166 14:35:37.293393 Starting kernel ...
2167 14:35:37.293727
2168 14:35:37.294042
2169 14:35:37.294855 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2170 14:35:37.295339 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2171 14:35:37.295717 Setting prompt string to ['Linux version [0-9]']
2172 14:35:37.296072 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2173 14:35:37.296424 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2175 14:39:58.296359 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2177 14:39:58.297548 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2179 14:39:58.298402 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 14:39:58.299914 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 14:39:58.300855 Cleaning after the job
2185 14:39:58.300942 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/ramdisk
2186 14:39:58.301674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/kernel
2187 14:39:58.302212 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895671/tftp-deploy-yu7m0mt5/modules
2188 14:39:58.302414 start: 5.1 power-off (timeout 00:00:30) [common]
2189 14:39:58.302571 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2190 14:39:58.322941 >> Command sent successfully.
2191 14:39:58.324936 Returned 0 in 0 seconds
2192 14:39:58.425731 end: 5.1 power-off (duration 00:00:00) [common]
2194 14:39:58.427276 start: 5.2 read-feedback (timeout 00:10:00) [common]
2195 14:39:58.428488 Listened to connection for namespace 'common' for up to 1s
2196 14:39:59.433371 Finalising connection for namespace 'common'
2197 14:39:59.434101 Disconnecting from shell: Finalise
2198 14:39:59.535725 end: 5.2 read-feedback (duration 00:00:01) [common]
2199 14:39:59.536492 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6895671
2200 14:39:59.545087 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6895671
2201 14:39:59.545215 JobError: Your job cannot terminate cleanly.