Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:34:24.506110 lava-dispatcher, installed at version: 2022.06
2 14:34:24.506404 start: 0 validate
3 14:34:24.506535 Start time: 2022-07-26 14:34:24.506527+00:00 (UTC)
4 14:34:24.506657 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:34:24.506780 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220718.0%2Famd64%2Finitrd.cpio.gz exists
6 14:34:24.796225 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:34:24.796979 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:34:25.085821 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:34:25.086520 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220718.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:34:25.380233 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:34:25.381005 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:34:25.669561 validate duration: 1.16
14 14:34:25.669891 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:34:25.669997 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:34:25.670088 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:34:25.670185 Not decompressing ramdisk as can be used compressed.
18 14:34:25.670266 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220718.0/amd64/initrd.cpio.gz
19 14:34:25.670331 saving as /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/ramdisk/initrd.cpio.gz
20 14:34:25.670392 total size: 5411054 (5MB)
21 14:34:25.671519 progress 0% (0MB)
22 14:34:25.673053 progress 5% (0MB)
23 14:34:25.674425 progress 10% (0MB)
24 14:34:25.675784 progress 15% (0MB)
25 14:34:25.677233 progress 20% (1MB)
26 14:34:25.678568 progress 25% (1MB)
27 14:34:25.679859 progress 30% (1MB)
28 14:34:25.681199 progress 35% (1MB)
29 14:34:25.682694 progress 40% (2MB)
30 14:34:25.683982 progress 45% (2MB)
31 14:34:25.685264 progress 50% (2MB)
32 14:34:25.686558 progress 55% (2MB)
33 14:34:25.687993 progress 60% (3MB)
34 14:34:25.689274 progress 65% (3MB)
35 14:34:25.690564 progress 70% (3MB)
36 14:34:25.691849 progress 75% (3MB)
37 14:34:25.693284 progress 80% (4MB)
38 14:34:25.694577 progress 85% (4MB)
39 14:34:25.695862 progress 90% (4MB)
40 14:34:25.697145 progress 95% (4MB)
41 14:34:25.698606 progress 100% (5MB)
42 14:34:25.698780 5MB downloaded in 0.03s (181.81MB/s)
43 14:34:25.698928 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:34:25.699171 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:34:25.699261 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:34:25.699347 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:34:25.699447 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:34:25.699514 saving as /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/kernel/bzImage
50 14:34:25.699576 total size: 6815632 (6MB)
51 14:34:25.699637 No compression specified
52 14:34:27.206838 progress 0% (0MB)
53 14:34:27.211971 progress 5% (0MB)
54 14:34:27.213687 progress 10% (0MB)
55 14:34:27.215431 progress 15% (1MB)
56 14:34:27.217014 progress 20% (1MB)
57 14:34:27.218640 progress 25% (1MB)
58 14:34:27.220368 progress 30% (1MB)
59 14:34:27.222001 progress 35% (2MB)
60 14:34:27.223713 progress 40% (2MB)
61 14:34:27.225264 progress 45% (2MB)
62 14:34:27.226878 progress 50% (3MB)
63 14:34:27.228657 progress 55% (3MB)
64 14:34:27.230220 progress 60% (3MB)
65 14:34:27.231924 progress 65% (4MB)
66 14:34:27.233476 progress 70% (4MB)
67 14:34:27.235032 progress 75% (4MB)
68 14:34:27.236733 progress 80% (5MB)
69 14:34:27.238284 progress 85% (5MB)
70 14:34:27.239984 progress 90% (5MB)
71 14:34:27.241539 progress 95% (6MB)
72 14:34:27.243231 progress 100% (6MB)
73 14:34:27.243508 6MB downloaded in 1.54s (4.21MB/s)
74 14:34:27.243655 end: 1.2.1 http-download (duration 00:00:02) [common]
76 14:34:27.243887 end: 1.2 download-retry (duration 00:00:02) [common]
77 14:34:27.243977 start: 1.3 download-retry (timeout 00:09:58) [common]
78 14:34:27.244062 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 14:34:27.244168 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220718.0/amd64/full.rootfs.tar.xz
80 14:34:27.244234 saving as /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/nfsrootfs/full.rootfs.tar
81 14:34:27.244295 total size: 133216152 (127MB)
82 14:34:27.244355 Using unxz to decompress xz
83 14:34:27.247632 progress 0% (0MB)
84 14:34:27.575213 progress 5% (6MB)
85 14:34:27.929017 progress 10% (12MB)
86 14:34:28.213644 progress 15% (19MB)
87 14:34:28.426228 progress 20% (25MB)
88 14:34:28.671230 progress 25% (31MB)
89 14:34:29.003591 progress 30% (38MB)
90 14:34:29.345110 progress 35% (44MB)
91 14:34:29.732842 progress 40% (50MB)
92 14:34:30.108885 progress 45% (57MB)
93 14:34:30.455550 progress 50% (63MB)
94 14:34:30.818642 progress 55% (69MB)
95 14:34:31.173991 progress 60% (76MB)
96 14:34:31.528274 progress 65% (82MB)
97 14:34:31.884487 progress 70% (88MB)
98 14:34:32.244158 progress 75% (95MB)
99 14:34:32.676706 progress 80% (101MB)
100 14:34:33.108784 progress 85% (108MB)
101 14:34:33.369932 progress 90% (114MB)
102 14:34:33.707321 progress 95% (120MB)
103 14:34:34.091888 progress 100% (127MB)
104 14:34:34.097284 127MB downloaded in 6.85s (18.54MB/s)
105 14:34:34.097564 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:34:34.097877 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:34:34.097972 start: 1.4 download-retry (timeout 00:09:52) [common]
109 14:34:34.098062 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 14:34:34.098178 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:34:34.098251 saving as /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/modules/modules.tar
112 14:34:34.098314 total size: 51868 (0MB)
113 14:34:34.098377 Using unxz to decompress xz
114 14:34:34.101516 progress 63% (0MB)
115 14:34:34.101940 progress 100% (0MB)
116 14:34:34.105057 0MB downloaded in 0.01s (7.34MB/s)
117 14:34:34.105265 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:34:34.105515 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:34:34.105676 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 14:34:34.105776 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 14:34:35.333448 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6895605/extract-nfsrootfs-kf6m4yvs
123 14:34:35.333783 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 14:34:35.333894 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 14:34:35.334024 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8
126 14:34:35.334122 makedir: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin
127 14:34:35.334205 makedir: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/tests
128 14:34:35.334283 makedir: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/results
129 14:34:35.334376 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-add-keys
130 14:34:35.334503 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-add-sources
131 14:34:35.334611 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-background-process-start
132 14:34:35.334719 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-background-process-stop
133 14:34:35.334827 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-common-functions
134 14:34:35.334932 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-echo-ipv4
135 14:34:35.335036 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-install-packages
136 14:34:35.335140 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-installed-packages
137 14:34:35.335242 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-os-build
138 14:34:35.335345 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-probe-channel
139 14:34:35.335448 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-probe-ip
140 14:34:35.335561 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-target-ip
141 14:34:35.335668 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-target-mac
142 14:34:35.335771 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-target-storage
143 14:34:35.335876 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-case
144 14:34:35.335981 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-event
145 14:34:35.336084 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-feedback
146 14:34:35.336188 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-raise
147 14:34:35.336291 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-reference
148 14:34:35.336394 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-runner
149 14:34:35.336498 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-set
150 14:34:35.336599 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-test-shell
151 14:34:35.336703 Updating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-install-packages (oe)
152 14:34:35.336809 Updating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/bin/lava-installed-packages (oe)
153 14:34:35.336900 Creating /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/environment
154 14:34:35.336982 LAVA metadata
155 14:34:35.337044 - LAVA_JOB_ID=6895605
156 14:34:35.337104 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:34:35.337196 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 14:34:35.337260 skipped lava-vland-overlay
159 14:34:35.337332 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:34:35.337410 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 14:34:35.337470 skipped lava-multinode-overlay
162 14:34:35.337540 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:34:35.337680 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 14:34:35.337748 Loading test definitions
165 14:34:35.337835 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 14:34:35.337906 Using /lava-6895605 at stage 0
167 14:34:35.338145 uuid=6895605_1.5.2.3.1 testdef=None
168 14:34:35.338237 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 14:34:35.338324 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 14:34:35.338779 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 14:34:35.339003 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 14:34:35.339604 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 14:34:35.339835 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 14:34:35.340355 runner path: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/0/tests/0_dmesg test_uuid 6895605_1.5.2.3.1
177 14:34:35.340499 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 14:34:35.340724 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 14:34:35.340795 Using /lava-6895605 at stage 1
181 14:34:35.341027 uuid=6895605_1.5.2.3.5 testdef=None
182 14:34:35.341113 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 14:34:35.341197 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 14:34:35.341659 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 14:34:35.341875 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 14:34:35.342433 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 14:34:35.342662 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 14:34:35.343192 runner path: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/1/tests/1_bootrr test_uuid 6895605_1.5.2.3.5
191 14:34:35.343329 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 14:34:35.343531 Creating lava-test-runner.conf files
194 14:34:35.343592 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/0 for stage 0
195 14:34:35.343671 - 0_dmesg
196 14:34:35.343741 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895605/lava-overlay-nk5zp9o8/lava-6895605/1 for stage 1
197 14:34:35.343819 - 1_bootrr
198 14:34:35.343906 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 14:34:35.343989 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 14:34:35.349212 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 14:34:35.349311 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 14:34:35.349396 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 14:34:35.349481 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 14:34:35.349565 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 14:34:35.450186 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 14:34:35.450522 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
207 14:34:35.450633 extracting modules file /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895605/extract-nfsrootfs-kf6m4yvs
208 14:34:35.454593 extracting modules file /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895605/extract-overlay-ramdisk-q6kd9c6k/ramdisk
209 14:34:35.458214 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 14:34:35.458322 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
211 14:34:35.458406 [common] Applying overlay to NFS
212 14:34:35.458475 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895605/compress-overlay-d1uws4tk/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6895605/extract-nfsrootfs-kf6m4yvs
213 14:34:35.462156 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 14:34:35.462263 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
215 14:34:35.462357 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 14:34:35.462449 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
217 14:34:35.462527 Building ramdisk /var/lib/lava/dispatcher/tmp/6895605/extract-overlay-ramdisk-q6kd9c6k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6895605/extract-overlay-ramdisk-q6kd9c6k/ramdisk
218 14:34:35.495534 >> 24431 blocks
219 14:34:35.976399 rename /var/lib/lava/dispatcher/tmp/6895605/extract-overlay-ramdisk-q6kd9c6k/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
220 14:34:35.976812 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 14:34:35.976932 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
222 14:34:35.977033 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
223 14:34:35.977161 No mkimage arch provided, not using FIT.
224 14:34:35.977250 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 14:34:35.977333 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 14:34:35.977429 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 14:34:35.977523 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
228 14:34:35.977656 No LXC device requested
229 14:34:35.977742 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 14:34:35.977833 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
231 14:34:35.977915 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 14:34:35.977984 Checking files for TFTP limit of 4294967296 bytes.
233 14:34:35.978348 end: 1 tftp-deploy (duration 00:00:10) [common]
234 14:34:35.978451 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 14:34:35.978546 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 14:34:35.978671 substitutions:
237 14:34:35.978738 - {DTB}: None
238 14:34:35.978801 - {INITRD}: 6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
239 14:34:35.978861 - {KERNEL}: 6895605/tftp-deploy-ywbjgbt1/kernel/bzImage
240 14:34:35.978919 - {LAVA_MAC}: None
241 14:34:35.978975 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6895605/extract-nfsrootfs-kf6m4yvs
242 14:34:35.979032 - {NFS_SERVER_IP}: 192.168.201.1
243 14:34:35.979089 - {PRESEED_CONFIG}: None
244 14:34:35.979144 - {PRESEED_LOCAL}: None
245 14:34:35.979199 - {RAMDISK}: 6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
246 14:34:35.979254 - {ROOT_PART}: None
247 14:34:35.979308 - {ROOT}: None
248 14:34:35.979362 - {SERVER_IP}: 192.168.201.1
249 14:34:35.979416 - {TEE}: None
250 14:34:35.979471 Parsed boot commands:
251 14:34:35.979524 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 14:34:35.979670 Parsed boot commands: tftpboot 192.168.201.1 6895605/tftp-deploy-ywbjgbt1/kernel/bzImage 6895605/tftp-deploy-ywbjgbt1/kernel/cmdline 6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
253 14:34:35.979760 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 14:34:35.979851 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 14:34:35.979946 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 14:34:35.980033 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 14:34:35.980101 Not connected, no need to disconnect.
258 14:34:35.980177 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 14:34:35.980257 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 14:34:35.980324 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
261 14:34:35.983074 Setting prompt string to ['lava-test: # ']
262 14:34:35.983345 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 14:34:35.983447 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 14:34:35.983542 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 14:34:35.983630 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 14:34:35.983799 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
267 14:34:36.002789 >> Command sent successfully.
268 14:34:36.004595 Returned 0 in 0 seconds
269 14:34:36.105893 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 14:34:36.107218 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 14:34:36.107671 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 14:34:36.108071 Setting prompt string to 'Starting depthcharge on Voema...'
274 14:34:36.108385 Changing prompt to 'Starting depthcharge on Voema...'
275 14:34:36.108710 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 14:34:36.109794 [Enter `^Ec?' for help]
277 14:34:44.236998
278 14:34:44.237691
279 14:34:44.246671 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 14:34:44.253624 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 14:34:44.257193 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 14:34:44.260344 CPU: AES supported, TXT NOT supported, VT supported
283 14:34:44.266892 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 14:34:44.273316 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 14:34:44.276660 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 14:34:44.279924 VBOOT: Loading verstage.
287 14:34:44.286420 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
288 14:34:44.289955 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 14:34:44.293196 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 14:34:44.304433 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 14:34:44.310668 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 14:34:44.311256
293 14:34:44.311642
294 14:34:44.323654 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 14:34:44.337757 Probing TPM: . done!
296 14:34:44.340617 TPM ready after 0 ms
297 14:34:44.344491 Connected to device vid:did:rid of 1ae0:0028:00
298 14:34:44.355432 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 14:34:44.362256 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 14:34:44.365563 Initialized TPM device CR50 revision 0
301 14:34:44.414077 tlcl_send_startup: Startup return code is 0
302 14:34:44.414221 TPM: setup succeeded
303 14:34:44.429468 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 14:34:44.444079 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 14:34:44.456722 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 14:34:44.466462 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 14:34:44.470295 Chrome EC: UHEPI supported
308 14:34:44.473304 Phase 1
309 14:34:44.476857 FMAP: area GBB found @ 1805000 (458752 bytes)
310 14:34:44.486525 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 14:34:44.493184 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 14:34:44.499800 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 14:34:44.506647 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 14:34:44.510046 Recovery requested (1009000e)
315 14:34:44.512958 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 14:34:44.524858 tlcl_extend: response is 0
317 14:34:44.531463 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 14:34:44.541337 tlcl_extend: response is 0
319 14:34:44.548002 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 14:34:44.554284 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 14:34:44.561352 BS: verstage times (exec / console): total (unknown) / 142 ms
322 14:34:44.561479
323 14:34:44.561549
324 14:34:44.574258 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 14:34:44.581249 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 14:34:44.584229 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 14:34:44.587971 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 14:34:44.594453 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 14:34:44.597457 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 14:34:44.601258 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 14:34:44.604537 TCO_STS: 0000 0000
332 14:34:44.607763 GEN_PMCON: d0015038 00002200
333 14:34:44.610931 GBLRST_CAUSE: 00000000 00000000
334 14:34:44.611020 HPR_CAUSE0: 00000000
335 14:34:44.614066 prev_sleep_state 5
336 14:34:44.617484 Boot Count incremented to 8627
337 14:34:44.624182 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 14:34:44.631048 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 14:34:44.637418 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 14:34:44.643861 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 14:34:44.648691 Chrome EC: UHEPI supported
342 14:34:44.655555 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 14:34:44.668404 Probing TPM: done!
344 14:34:44.675138 Connected to device vid:did:rid of 1ae0:0028:00
345 14:34:44.685063 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 14:34:44.688933 Initialized TPM device CR50 revision 0
347 14:34:44.703204 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 14:34:44.709517 MRC: Hash idx 0x100b comparison successful.
349 14:34:44.712954 MRC cache found, size faa8
350 14:34:44.713040 bootmode is set to: 2
351 14:34:44.716495 SPD index = 0
352 14:34:44.722919 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 14:34:44.726299 SPD: module type is LPDDR4X
354 14:34:44.729511 SPD: module part number is MT53E512M64D4NW-046
355 14:34:44.736103 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 14:34:44.739383 SPD: device width 16 bits, bus width 16 bits
357 14:34:44.745892 SPD: module size is 1024 MB (per channel)
358 14:34:45.179401 CBMEM:
359 14:34:45.182920 IMD: root @ 0x76fff000 254 entries.
360 14:34:45.186158 IMD: root @ 0x76ffec00 62 entries.
361 14:34:45.189624 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 14:34:45.196667 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 14:34:45.199815 External stage cache:
364 14:34:45.202812 IMD: root @ 0x7b3ff000 254 entries.
365 14:34:45.206143 IMD: root @ 0x7b3fec00 62 entries.
366 14:34:45.221493 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 14:34:45.228329 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 14:34:45.234469 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 14:34:45.249660 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 14:34:45.252928 cse_lite: Skip switching to RW in the recovery path
371 14:34:45.256191 8 DIMMs found
372 14:34:45.256792 SMM Memory Map
373 14:34:45.259993 SMRAM : 0x7b000000 0x800000
374 14:34:45.263744 Subregion 0: 0x7b000000 0x200000
375 14:34:45.266615 Subregion 1: 0x7b200000 0x200000
376 14:34:45.269912 Subregion 2: 0x7b400000 0x400000
377 14:34:45.273494 top_of_ram = 0x77000000
378 14:34:45.280325 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 14:34:45.283437 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 14:34:45.290229 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 14:34:45.293193 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 14:34:45.302938 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 14:34:45.309532 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 14:34:45.319425 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 14:34:45.322481 Processing 211 relocs. Offset value of 0x74c0b000
386 14:34:45.331502 BS: romstage times (exec / console): total (unknown) / 277 ms
387 14:34:45.337298
388 14:34:45.337398
389 14:34:45.347733 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 14:34:45.350855 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 14:34:45.361009 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 14:34:45.367372 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 14:34:45.374017 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 14:34:45.380713 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 14:34:45.427579 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 14:34:45.434525 Processing 5008 relocs. Offset value of 0x75d98000
397 14:34:45.438012 BS: postcar times (exec / console): total (unknown) / 59 ms
398 14:34:45.440976
399 14:34:45.441557
400 14:34:45.451412 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 14:34:45.452163 Normal boot
402 14:34:45.455153 FW_CONFIG value is 0x804c02
403 14:34:45.458002 PCI: 00:07.0 disabled by fw_config
404 14:34:45.461466 PCI: 00:07.1 disabled by fw_config
405 14:34:45.464721 PCI: 00:0d.2 disabled by fw_config
406 14:34:45.467805 PCI: 00:1c.7 disabled by fw_config
407 14:34:45.474927 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 14:34:45.480971 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 14:34:45.484897 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 14:34:45.488193 GENERIC: 0.0 disabled by fw_config
411 14:34:45.490800 GENERIC: 1.0 disabled by fw_config
412 14:34:45.497254 fw_config match found: DB_USB=USB3_ACTIVE
413 14:34:45.500746 fw_config match found: DB_USB=USB3_ACTIVE
414 14:34:45.504219 fw_config match found: DB_USB=USB3_ACTIVE
415 14:34:45.510900 fw_config match found: DB_USB=USB3_ACTIVE
416 14:34:45.514219 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 14:34:45.520787 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 14:34:45.530563 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 14:34:45.536950 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 14:34:45.540505 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 14:34:45.547531 microcode: Update skipped, already up-to-date
422 14:34:45.553531 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 14:34:45.581658 Detected 4 core, 8 thread CPU.
424 14:34:45.584807 Setting up SMI for CPU
425 14:34:45.588133 IED base = 0x7b400000
426 14:34:45.588714 IED size = 0x00400000
427 14:34:45.591480 Will perform SMM setup.
428 14:34:45.598442 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 14:34:45.604801 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 14:34:45.611295 Processing 16 relocs. Offset value of 0x00030000
431 14:34:45.615025 Attempting to start 7 APs
432 14:34:45.617685 Waiting for 10ms after sending INIT.
433 14:34:45.633439 Waiting for 1st SIPI to complete...done.
434 14:34:45.633960 AP: slot 1 apic_id 1.
435 14:34:45.636759 AP: slot 6 apic_id 6.
436 14:34:45.640127 AP: slot 3 apic_id 7.
437 14:34:45.640609 AP: slot 4 apic_id 2.
438 14:34:45.643268 AP: slot 7 apic_id 3.
439 14:34:45.646999 AP: slot 2 apic_id 5.
440 14:34:45.647592 AP: slot 5 apic_id 4.
441 14:34:45.654126 Waiting for 2nd SIPI to complete...done.
442 14:34:45.660182 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 14:34:45.666742 Processing 13 relocs. Offset value of 0x00038000
444 14:34:45.667354 Unable to locate Global NVS
445 14:34:45.676343 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 14:34:45.680277 Installing permanent SMM handler to 0x7b000000
447 14:34:45.690135 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 14:34:45.693665 Processing 794 relocs. Offset value of 0x7b010000
449 14:34:45.704013 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 14:34:45.706974 Processing 13 relocs. Offset value of 0x7b008000
451 14:34:45.713143 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 14:34:45.719940 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 14:34:45.723254 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 14:34:45.729720 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 14:34:45.736312 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 14:34:45.742759 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 14:34:45.749485 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 14:34:45.750083 Unable to locate Global NVS
459 14:34:45.759251 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 14:34:45.762576 Clearing SMI status registers
461 14:34:45.763061 SMI_STS: PM1
462 14:34:45.766398 PM1_STS: PWRBTN
463 14:34:45.772625 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 14:34:45.775727 In relocation handler: CPU 0
465 14:34:45.779167 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 14:34:45.785344 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 14:34:45.785617 Relocation complete.
468 14:34:45.795372 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
469 14:34:45.798530 In relocation handler: CPU 3
470 14:34:45.802100 New SMBASE=0x7afff400 IEDBASE=0x7b400000
471 14:34:45.802243 Relocation complete.
472 14:34:45.811861 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 14:34:45.811971 In relocation handler: CPU 6
474 14:34:45.818582 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 14:34:45.821752 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 14:34:45.825254 Relocation complete.
477 14:34:45.831723 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 14:34:45.835081 In relocation handler: CPU 2
479 14:34:45.838578 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 14:34:45.842282 Relocation complete.
481 14:34:45.848237 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
482 14:34:45.851672 In relocation handler: CPU 7
483 14:34:45.854988 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 14:34:45.858237 Relocation complete.
485 14:34:45.864934 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 14:34:45.868264 In relocation handler: CPU 4
487 14:34:45.871762 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 14:34:45.878443 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 14:34:45.878540 Relocation complete.
490 14:34:45.884829 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
491 14:34:45.888150 In relocation handler: CPU 1
492 14:34:45.894973 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
493 14:34:45.895089 Relocation complete.
494 14:34:45.901554 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
495 14:34:45.904798 In relocation handler: CPU 5
496 14:34:45.908359 New SMBASE=0x7affec00 IEDBASE=0x7b400000
497 14:34:45.915402 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 14:34:45.918765 Relocation complete.
499 14:34:45.918867 Initializing CPU #0
500 14:34:45.922156 CPU: vendor Intel device 806c1
501 14:34:45.925707 CPU: family 06, model 8c, stepping 01
502 14:34:45.928919 Clearing out pending MCEs
503 14:34:45.932439 Setting up local APIC...
504 14:34:45.932533 apic_id: 0x00 done.
505 14:34:45.935994 Turbo is available but hidden
506 14:34:45.938758 Turbo is available and visible
507 14:34:45.946075 microcode: Update skipped, already up-to-date
508 14:34:45.946186 CPU #0 initialized
509 14:34:45.949342 Initializing CPU #2
510 14:34:45.952261 Initializing CPU #5
511 14:34:45.952352 CPU: vendor Intel device 806c1
512 14:34:45.958902 CPU: family 06, model 8c, stepping 01
513 14:34:45.962484 CPU: vendor Intel device 806c1
514 14:34:45.965764 CPU: family 06, model 8c, stepping 01
515 14:34:45.965857 Clearing out pending MCEs
516 14:34:45.968989 Clearing out pending MCEs
517 14:34:45.972184 Setting up local APIC...
518 14:34:45.975277 Initializing CPU #7
519 14:34:45.975364 Initializing CPU #4
520 14:34:45.978581 CPU: vendor Intel device 806c1
521 14:34:45.982204 CPU: family 06, model 8c, stepping 01
522 14:34:45.985352 CPU: vendor Intel device 806c1
523 14:34:45.988847 CPU: family 06, model 8c, stepping 01
524 14:34:45.992185 Clearing out pending MCEs
525 14:34:45.995191 Clearing out pending MCEs
526 14:34:45.999037 Initializing CPU #3
527 14:34:45.999129 Setting up local APIC...
528 14:34:46.002197 Initializing CPU #6
529 14:34:46.005524 CPU: vendor Intel device 806c1
530 14:34:46.008668 CPU: family 06, model 8c, stepping 01
531 14:34:46.012123 CPU: vendor Intel device 806c1
532 14:34:46.015439 CPU: family 06, model 8c, stepping 01
533 14:34:46.018362 Clearing out pending MCEs
534 14:34:46.021771 Clearing out pending MCEs
535 14:34:46.025607 Setting up local APIC...
536 14:34:46.025697 Initializing CPU #1
537 14:34:46.028602 Setting up local APIC...
538 14:34:46.031773 apic_id: 0x07 done.
539 14:34:46.031873 Setting up local APIC...
540 14:34:46.034991 CPU: vendor Intel device 806c1
541 14:34:46.038231 CPU: family 06, model 8c, stepping 01
542 14:34:46.041781 Clearing out pending MCEs
543 14:34:46.045527 apic_id: 0x06 done.
544 14:34:46.048534 microcode: Update skipped, already up-to-date
545 14:34:46.055393 microcode: Update skipped, already up-to-date
546 14:34:46.055487 CPU #3 initialized
547 14:34:46.058399 CPU #6 initialized
548 14:34:46.058487 apic_id: 0x04 done.
549 14:34:46.061584 apic_id: 0x05 done.
550 14:34:46.068490 microcode: Update skipped, already up-to-date
551 14:34:46.071542 microcode: Update skipped, already up-to-date
552 14:34:46.071633 CPU #5 initialized
553 14:34:46.075108 CPU #2 initialized
554 14:34:46.078480 Setting up local APIC...
555 14:34:46.078568 apic_id: 0x03 done.
556 14:34:46.081798 Setting up local APIC...
557 14:34:46.084957 apic_id: 0x01 done.
558 14:34:46.088190 microcode: Update skipped, already up-to-date
559 14:34:46.091879 apic_id: 0x02 done.
560 14:34:46.094833 CPU #7 initialized
561 14:34:46.098154 microcode: Update skipped, already up-to-date
562 14:34:46.101475 microcode: Update skipped, already up-to-date
563 14:34:46.105001 CPU #4 initialized
564 14:34:46.105091 CPU #1 initialized
565 14:34:46.111338 bsp_do_flight_plan done after 454 msecs.
566 14:34:46.114741 CPU: frequency set to 4000 MHz
567 14:34:46.114831 Enabling SMIs.
568 14:34:46.121241 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
569 14:34:46.137622 SATAXPCIE1 indicates PCIe NVMe is present
570 14:34:46.140962 Probing TPM: done!
571 14:34:46.144455 Connected to device vid:did:rid of 1ae0:0028:00
572 14:34:46.154751 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 14:34:46.158163 Initialized TPM device CR50 revision 0
574 14:34:46.161517 Enabling S0i3.4
575 14:34:46.167838 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 14:34:46.171116 Found a VBT of 8704 bytes after decompression
577 14:34:46.178302 cse_lite: CSE RO boot. HybridStorageMode disabled
578 14:34:46.184895 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 14:34:46.260410 FSPS returned 0
580 14:34:46.263747 Executing Phase 1 of FspMultiPhaseSiInit
581 14:34:46.274004 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 14:34:46.277617 port C0 DISC req: usage 1 usb3 1 usb2 5
583 14:34:46.280335 Raw Buffer output 0 00000511
584 14:34:46.283816 Raw Buffer output 1 00000000
585 14:34:46.287405 pmc_send_ipc_cmd succeeded
586 14:34:46.293921 port C1 DISC req: usage 1 usb3 2 usb2 3
587 14:34:46.294012 Raw Buffer output 0 00000321
588 14:34:46.297270 Raw Buffer output 1 00000000
589 14:34:46.301821 pmc_send_ipc_cmd succeeded
590 14:34:46.306891 Detected 4 core, 8 thread CPU.
591 14:34:46.310207 Detected 4 core, 8 thread CPU.
592 14:34:46.544137 Display FSP Version Info HOB
593 14:34:46.547758 Reference Code - CPU = a.0.4c.31
594 14:34:46.550765 uCode Version = 0.0.0.86
595 14:34:46.553958 TXT ACM version = ff.ff.ff.ffff
596 14:34:46.557311 Reference Code - ME = a.0.4c.31
597 14:34:46.560567 MEBx version = 0.0.0.0
598 14:34:46.563838 ME Firmware Version = Consumer SKU
599 14:34:46.567542 Reference Code - PCH = a.0.4c.31
600 14:34:46.570650 PCH-CRID Status = Disabled
601 14:34:46.573841 PCH-CRID Original Value = ff.ff.ff.ffff
602 14:34:46.577232 PCH-CRID New Value = ff.ff.ff.ffff
603 14:34:46.580575 OPROM - RST - RAID = ff.ff.ff.ffff
604 14:34:46.584153 PCH Hsio Version = 4.0.0.0
605 14:34:46.587312 Reference Code - SA - System Agent = a.0.4c.31
606 14:34:46.591074 Reference Code - MRC = 2.0.0.1
607 14:34:46.593803 SA - PCIe Version = a.0.4c.31
608 14:34:46.597182 SA-CRID Status = Disabled
609 14:34:46.600945 SA-CRID Original Value = 0.0.0.1
610 14:34:46.603982 SA-CRID New Value = 0.0.0.1
611 14:34:46.607381 OPROM - VBIOS = ff.ff.ff.ffff
612 14:34:46.610579 IO Manageability Engine FW Version = 11.1.4.0
613 14:34:46.613895 PHY Build Version = 0.0.0.e0
614 14:34:46.617293 Thunderbolt(TM) FW Version = 0.0.0.0
615 14:34:46.623770 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 14:34:46.627179 ITSS IRQ Polarities Before:
617 14:34:46.627267 IPC0: 0xffffffff
618 14:34:46.630669 IPC1: 0xffffffff
619 14:34:46.630758 IPC2: 0xffffffff
620 14:34:46.633711 IPC3: 0xffffffff
621 14:34:46.637162 ITSS IRQ Polarities After:
622 14:34:46.637250 IPC0: 0xffffffff
623 14:34:46.640780 IPC1: 0xffffffff
624 14:34:46.640868 IPC2: 0xffffffff
625 14:34:46.643604 IPC3: 0xffffffff
626 14:34:46.646984 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 14:34:46.661047 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 14:34:46.670280 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 14:34:46.683274 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 14:34:46.689983 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 14:34:46.693349 Enumerating buses...
632 14:34:46.696843 Show all devs... Before device enumeration.
633 14:34:46.699780 Root Device: enabled 1
634 14:34:46.699869 DOMAIN: 0000: enabled 1
635 14:34:46.703249 CPU_CLUSTER: 0: enabled 1
636 14:34:46.706645 PCI: 00:00.0: enabled 1
637 14:34:46.709742 PCI: 00:02.0: enabled 1
638 14:34:46.709831 PCI: 00:04.0: enabled 1
639 14:34:46.713115 PCI: 00:05.0: enabled 1
640 14:34:46.716832 PCI: 00:06.0: enabled 0
641 14:34:46.719853 PCI: 00:07.0: enabled 0
642 14:34:46.719940 PCI: 00:07.1: enabled 0
643 14:34:46.723234 PCI: 00:07.2: enabled 0
644 14:34:46.726672 PCI: 00:07.3: enabled 0
645 14:34:46.726759 PCI: 00:08.0: enabled 1
646 14:34:46.729723 PCI: 00:09.0: enabled 0
647 14:34:46.733044 PCI: 00:0a.0: enabled 0
648 14:34:46.736484 PCI: 00:0d.0: enabled 1
649 14:34:46.736589 PCI: 00:0d.1: enabled 0
650 14:34:46.739818 PCI: 00:0d.2: enabled 0
651 14:34:46.743388 PCI: 00:0d.3: enabled 0
652 14:34:46.746698 PCI: 00:0e.0: enabled 0
653 14:34:46.746786 PCI: 00:10.2: enabled 1
654 14:34:46.750002 PCI: 00:10.6: enabled 0
655 14:34:46.753410 PCI: 00:10.7: enabled 0
656 14:34:46.756622 PCI: 00:12.0: enabled 0
657 14:34:46.756710 PCI: 00:12.6: enabled 0
658 14:34:46.759981 PCI: 00:13.0: enabled 0
659 14:34:46.763026 PCI: 00:14.0: enabled 1
660 14:34:46.766829 PCI: 00:14.1: enabled 0
661 14:34:46.766920 PCI: 00:14.2: enabled 1
662 14:34:46.769916 PCI: 00:14.3: enabled 1
663 14:34:46.773023 PCI: 00:15.0: enabled 1
664 14:34:46.773111 PCI: 00:15.1: enabled 1
665 14:34:46.776521 PCI: 00:15.2: enabled 1
666 14:34:46.779822 PCI: 00:15.3: enabled 1
667 14:34:46.783044 PCI: 00:16.0: enabled 1
668 14:34:46.783130 PCI: 00:16.1: enabled 0
669 14:34:46.786458 PCI: 00:16.2: enabled 0
670 14:34:46.789969 PCI: 00:16.3: enabled 0
671 14:34:46.793176 PCI: 00:16.4: enabled 0
672 14:34:46.793265 PCI: 00:16.5: enabled 0
673 14:34:46.796196 PCI: 00:17.0: enabled 1
674 14:34:46.799687 PCI: 00:19.0: enabled 0
675 14:34:46.802915 PCI: 00:19.1: enabled 1
676 14:34:46.803002 PCI: 00:19.2: enabled 0
677 14:34:46.806162 PCI: 00:1c.0: enabled 1
678 14:34:46.809722 PCI: 00:1c.1: enabled 0
679 14:34:46.809850 PCI: 00:1c.2: enabled 0
680 14:34:46.813215 PCI: 00:1c.3: enabled 0
681 14:34:46.816408 PCI: 00:1c.4: enabled 0
682 14:34:46.819458 PCI: 00:1c.5: enabled 0
683 14:34:46.819545 PCI: 00:1c.6: enabled 1
684 14:34:46.822993 PCI: 00:1c.7: enabled 0
685 14:34:46.826331 PCI: 00:1d.0: enabled 1
686 14:34:46.829476 PCI: 00:1d.1: enabled 0
687 14:34:46.829560 PCI: 00:1d.2: enabled 1
688 14:34:46.832987 PCI: 00:1d.3: enabled 0
689 14:34:46.836375 PCI: 00:1e.0: enabled 1
690 14:34:46.839591 PCI: 00:1e.1: enabled 0
691 14:34:46.839679 PCI: 00:1e.2: enabled 1
692 14:34:46.842816 PCI: 00:1e.3: enabled 1
693 14:34:46.846277 PCI: 00:1f.0: enabled 1
694 14:34:46.849495 PCI: 00:1f.1: enabled 0
695 14:34:46.849618 PCI: 00:1f.2: enabled 1
696 14:34:46.852659 PCI: 00:1f.3: enabled 1
697 14:34:46.855998 PCI: 00:1f.4: enabled 0
698 14:34:46.856085 PCI: 00:1f.5: enabled 1
699 14:34:46.859771 PCI: 00:1f.6: enabled 0
700 14:34:46.862580 PCI: 00:1f.7: enabled 0
701 14:34:46.865883 APIC: 00: enabled 1
702 14:34:46.865973 GENERIC: 0.0: enabled 1
703 14:34:46.869497 GENERIC: 0.0: enabled 1
704 14:34:46.872838 GENERIC: 1.0: enabled 1
705 14:34:46.872925 GENERIC: 0.0: enabled 1
706 14:34:46.875801 GENERIC: 1.0: enabled 1
707 14:34:46.879386 USB0 port 0: enabled 1
708 14:34:46.882955 GENERIC: 0.0: enabled 1
709 14:34:46.883056 USB0 port 0: enabled 1
710 14:34:46.885908 GENERIC: 0.0: enabled 1
711 14:34:46.889621 I2C: 00:1a: enabled 1
712 14:34:46.889706 I2C: 00:31: enabled 1
713 14:34:46.892770 I2C: 00:32: enabled 1
714 14:34:46.895955 I2C: 00:10: enabled 1
715 14:34:46.896040 I2C: 00:15: enabled 1
716 14:34:46.899657 GENERIC: 0.0: enabled 0
717 14:34:46.902455 GENERIC: 1.0: enabled 0
718 14:34:46.906111 GENERIC: 0.0: enabled 1
719 14:34:46.906195 SPI: 00: enabled 1
720 14:34:46.909148 SPI: 00: enabled 1
721 14:34:46.912931 PNP: 0c09.0: enabled 1
722 14:34:46.913016 GENERIC: 0.0: enabled 1
723 14:34:46.916055 USB3 port 0: enabled 1
724 14:34:46.919568 USB3 port 1: enabled 1
725 14:34:46.919653 USB3 port 2: enabled 0
726 14:34:46.922540 USB3 port 3: enabled 0
727 14:34:46.925859 USB2 port 0: enabled 0
728 14:34:46.929074 USB2 port 1: enabled 1
729 14:34:46.929162 USB2 port 2: enabled 1
730 14:34:46.932926 USB2 port 3: enabled 0
731 14:34:46.935766 USB2 port 4: enabled 1
732 14:34:46.935852 USB2 port 5: enabled 0
733 14:34:46.939337 USB2 port 6: enabled 0
734 14:34:46.942688 USB2 port 7: enabled 0
735 14:34:46.942775 USB2 port 8: enabled 0
736 14:34:46.946020 USB2 port 9: enabled 0
737 14:34:46.949262 USB3 port 0: enabled 0
738 14:34:46.952616 USB3 port 1: enabled 1
739 14:34:46.952703 USB3 port 2: enabled 0
740 14:34:46.956034 USB3 port 3: enabled 0
741 14:34:46.958979 GENERIC: 0.0: enabled 1
742 14:34:46.959066 GENERIC: 1.0: enabled 1
743 14:34:46.962599 APIC: 01: enabled 1
744 14:34:46.966039 APIC: 05: enabled 1
745 14:34:46.966129 APIC: 07: enabled 1
746 14:34:46.968991 APIC: 02: enabled 1
747 14:34:46.972312 APIC: 04: enabled 1
748 14:34:46.972400 APIC: 06: enabled 1
749 14:34:46.975786 APIC: 03: enabled 1
750 14:34:46.975872 Compare with tree...
751 14:34:46.978937 Root Device: enabled 1
752 14:34:46.982376 DOMAIN: 0000: enabled 1
753 14:34:46.985829 PCI: 00:00.0: enabled 1
754 14:34:46.989321 PCI: 00:02.0: enabled 1
755 14:34:46.989406 PCI: 00:04.0: enabled 1
756 14:34:46.992587 GENERIC: 0.0: enabled 1
757 14:34:46.995730 PCI: 00:05.0: enabled 1
758 14:34:46.999154 PCI: 00:06.0: enabled 0
759 14:34:47.002603 PCI: 00:07.0: enabled 0
760 14:34:47.002689 GENERIC: 0.0: enabled 1
761 14:34:47.005454 PCI: 00:07.1: enabled 0
762 14:34:47.008986 GENERIC: 1.0: enabled 1
763 14:34:47.012239 PCI: 00:07.2: enabled 0
764 14:34:47.015602 GENERIC: 0.0: enabled 1
765 14:34:47.015689 PCI: 00:07.3: enabled 0
766 14:34:47.018859 GENERIC: 1.0: enabled 1
767 14:34:47.022214 PCI: 00:08.0: enabled 1
768 14:34:47.025560 PCI: 00:09.0: enabled 0
769 14:34:47.028737 PCI: 00:0a.0: enabled 0
770 14:34:47.028824 PCI: 00:0d.0: enabled 1
771 14:34:47.032446 USB0 port 0: enabled 1
772 14:34:47.035397 USB3 port 0: enabled 1
773 14:34:47.039111 USB3 port 1: enabled 1
774 14:34:47.041973 USB3 port 2: enabled 0
775 14:34:47.042059 USB3 port 3: enabled 0
776 14:34:47.045492 PCI: 00:0d.1: enabled 0
777 14:34:47.048674 PCI: 00:0d.2: enabled 0
778 14:34:47.052074 GENERIC: 0.0: enabled 1
779 14:34:47.055267 PCI: 00:0d.3: enabled 0
780 14:34:47.055354 PCI: 00:0e.0: enabled 0
781 14:34:47.058696 PCI: 00:10.2: enabled 1
782 14:34:47.061757 PCI: 00:10.6: enabled 0
783 14:34:47.065518 PCI: 00:10.7: enabled 0
784 14:34:47.068565 PCI: 00:12.0: enabled 0
785 14:34:47.068652 PCI: 00:12.6: enabled 0
786 14:34:47.071973 PCI: 00:13.0: enabled 0
787 14:34:47.075230 PCI: 00:14.0: enabled 1
788 14:34:47.078326 USB0 port 0: enabled 1
789 14:34:47.082062 USB2 port 0: enabled 0
790 14:34:47.085347 USB2 port 1: enabled 1
791 14:34:47.085434 USB2 port 2: enabled 1
792 14:34:47.088436 USB2 port 3: enabled 0
793 14:34:47.091733 USB2 port 4: enabled 1
794 14:34:47.095041 USB2 port 5: enabled 0
795 14:34:47.098380 USB2 port 6: enabled 0
796 14:34:47.098466 USB2 port 7: enabled 0
797 14:34:47.101829 USB2 port 8: enabled 0
798 14:34:47.105531 USB2 port 9: enabled 0
799 14:34:47.108750 USB3 port 0: enabled 0
800 14:34:47.111732 USB3 port 1: enabled 1
801 14:34:47.114844 USB3 port 2: enabled 0
802 14:34:47.114931 USB3 port 3: enabled 0
803 14:34:47.118521 PCI: 00:14.1: enabled 0
804 14:34:47.121489 PCI: 00:14.2: enabled 1
805 14:34:47.125039 PCI: 00:14.3: enabled 1
806 14:34:47.128733 GENERIC: 0.0: enabled 1
807 14:34:47.128819 PCI: 00:15.0: enabled 1
808 14:34:47.131723 I2C: 00:1a: enabled 1
809 14:34:47.135284 I2C: 00:31: enabled 1
810 14:34:47.138531 I2C: 00:32: enabled 1
811 14:34:47.138617 PCI: 00:15.1: enabled 1
812 14:34:47.141555 I2C: 00:10: enabled 1
813 14:34:47.144815 PCI: 00:15.2: enabled 1
814 14:34:47.148109 PCI: 00:15.3: enabled 1
815 14:34:47.151348 PCI: 00:16.0: enabled 1
816 14:34:47.151436 PCI: 00:16.1: enabled 0
817 14:34:47.154759 PCI: 00:16.2: enabled 0
818 14:34:47.158387 PCI: 00:16.3: enabled 0
819 14:34:47.161430 PCI: 00:16.4: enabled 0
820 14:34:47.165125 PCI: 00:16.5: enabled 0
821 14:34:47.165213 PCI: 00:17.0: enabled 1
822 14:34:47.168953 PCI: 00:19.0: enabled 0
823 14:34:47.172913 PCI: 00:19.1: enabled 1
824 14:34:47.173003 I2C: 00:15: enabled 1
825 14:34:47.176248 PCI: 00:19.2: enabled 0
826 14:34:47.179301 PCI: 00:1d.0: enabled 1
827 14:34:47.182811 GENERIC: 0.0: enabled 1
828 14:34:47.185827 PCI: 00:1e.0: enabled 1
829 14:34:47.185915 PCI: 00:1e.1: enabled 0
830 14:34:47.189227 PCI: 00:1e.2: enabled 1
831 14:34:47.192290 SPI: 00: enabled 1
832 14:34:47.195704 PCI: 00:1e.3: enabled 1
833 14:34:47.195791 SPI: 00: enabled 1
834 14:34:47.245831 PCI: 00:1f.0: enabled 1
835 14:34:47.245990 PNP: 0c09.0: enabled 1
836 14:34:47.246319 PCI: 00:1f.1: enabled 0
837 14:34:47.246451 PCI: 00:1f.2: enabled 1
838 14:34:47.246752 GENERIC: 0.0: enabled 1
839 14:34:47.246833 GENERIC: 0.0: enabled 1
840 14:34:47.246897 GENERIC: 1.0: enabled 1
841 14:34:47.246960 PCI: 00:1f.3: enabled 1
842 14:34:47.247020 PCI: 00:1f.4: enabled 0
843 14:34:47.247268 PCI: 00:1f.5: enabled 1
844 14:34:47.247336 PCI: 00:1f.6: enabled 0
845 14:34:47.247414 PCI: 00:1f.7: enabled 0
846 14:34:47.247535 CPU_CLUSTER: 0: enabled 1
847 14:34:47.247627 APIC: 00: enabled 1
848 14:34:47.247921 APIC: 01: enabled 1
849 14:34:47.247987 APIC: 05: enabled 1
850 14:34:47.248049 APIC: 07: enabled 1
851 14:34:47.248106 APIC: 02: enabled 1
852 14:34:47.248162 APIC: 04: enabled 1
853 14:34:47.250702 APIC: 06: enabled 1
854 14:34:47.250787 APIC: 03: enabled 1
855 14:34:47.254421 Root Device scanning...
856 14:34:47.257311 scan_static_bus for Root Device
857 14:34:47.260618 DOMAIN: 0000 enabled
858 14:34:47.260731 CPU_CLUSTER: 0 enabled
859 14:34:47.264025 DOMAIN: 0000 scanning...
860 14:34:47.267772 PCI: pci_scan_bus for bus 00
861 14:34:47.271244 PCI: 00:00.0 [8086/0000] ops
862 14:34:47.273947 PCI: 00:00.0 [8086/9a12] enabled
863 14:34:47.277325 PCI: 00:02.0 [8086/0000] bus ops
864 14:34:47.280404 PCI: 00:02.0 [8086/9a40] enabled
865 14:34:47.283969 PCI: 00:04.0 [8086/0000] bus ops
866 14:34:47.287252 PCI: 00:04.0 [8086/9a03] enabled
867 14:34:47.290532 PCI: 00:05.0 [8086/9a19] enabled
868 14:34:47.294038 PCI: 00:07.0 [0000/0000] hidden
869 14:34:47.297301 PCI: 00:08.0 [8086/9a11] enabled
870 14:34:47.300728 PCI: 00:0a.0 [8086/9a0d] disabled
871 14:34:47.303936 PCI: 00:0d.0 [8086/0000] bus ops
872 14:34:47.307116 PCI: 00:0d.0 [8086/9a13] enabled
873 14:34:47.310405 PCI: 00:14.0 [8086/0000] bus ops
874 14:34:47.313785 PCI: 00:14.0 [8086/a0ed] enabled
875 14:34:47.317266 PCI: 00:14.2 [8086/a0ef] enabled
876 14:34:47.320580 PCI: 00:14.3 [8086/0000] bus ops
877 14:34:47.323557 PCI: 00:14.3 [8086/a0f0] enabled
878 14:34:47.326830 PCI: 00:15.0 [8086/0000] bus ops
879 14:34:47.330304 PCI: 00:15.0 [8086/a0e8] enabled
880 14:34:47.333884 PCI: 00:15.1 [8086/0000] bus ops
881 14:34:47.337027 PCI: 00:15.1 [8086/a0e9] enabled
882 14:34:47.340403 PCI: 00:15.2 [8086/0000] bus ops
883 14:34:47.343653 PCI: 00:15.2 [8086/a0ea] enabled
884 14:34:47.346885 PCI: 00:15.3 [8086/0000] bus ops
885 14:34:47.350617 PCI: 00:15.3 [8086/a0eb] enabled
886 14:34:47.353439 PCI: 00:16.0 [8086/0000] ops
887 14:34:47.356814 PCI: 00:16.0 [8086/a0e0] enabled
888 14:34:47.363323 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 14:34:47.366839 PCI: 00:19.0 [8086/0000] bus ops
890 14:34:47.369880 PCI: 00:19.0 [8086/a0c5] disabled
891 14:34:47.373527 PCI: 00:19.1 [8086/0000] bus ops
892 14:34:47.377527 PCI: 00:19.1 [8086/a0c6] enabled
893 14:34:47.380267 PCI: 00:1d.0 [8086/0000] bus ops
894 14:34:47.383572 PCI: 00:1d.0 [8086/a0b0] enabled
895 14:34:47.386462 PCI: 00:1e.0 [8086/0000] ops
896 14:34:47.389834 PCI: 00:1e.0 [8086/a0a8] enabled
897 14:34:47.393026 PCI: 00:1e.2 [8086/0000] bus ops
898 14:34:47.396516 PCI: 00:1e.2 [8086/a0aa] enabled
899 14:34:47.399844 PCI: 00:1e.3 [8086/0000] bus ops
900 14:34:47.403005 PCI: 00:1e.3 [8086/a0ab] enabled
901 14:34:47.406391 PCI: 00:1f.0 [8086/0000] bus ops
902 14:34:47.409545 PCI: 00:1f.0 [8086/a087] enabled
903 14:34:47.409670 RTC Init
904 14:34:47.412857 Set power on after power failure.
905 14:34:47.416204 Disabling Deep S3
906 14:34:47.416292 Disabling Deep S3
907 14:34:47.419697 Disabling Deep S4
908 14:34:47.419784 Disabling Deep S4
909 14:34:47.422928 Disabling Deep S5
910 14:34:47.426256 Disabling Deep S5
911 14:34:47.429438 PCI: 00:1f.2 [0000/0000] hidden
912 14:34:47.433032 PCI: 00:1f.3 [8086/0000] bus ops
913 14:34:47.436007 PCI: 00:1f.3 [8086/a0c8] enabled
914 14:34:47.439371 PCI: 00:1f.5 [8086/0000] bus ops
915 14:34:47.442782 PCI: 00:1f.5 [8086/a0a4] enabled
916 14:34:47.446165 PCI: Leftover static devices:
917 14:34:47.446251 PCI: 00:10.2
918 14:34:47.446319 PCI: 00:10.6
919 14:34:47.449239 PCI: 00:10.7
920 14:34:47.449326 PCI: 00:06.0
921 14:34:47.453170 PCI: 00:07.1
922 14:34:47.453258 PCI: 00:07.2
923 14:34:47.453325 PCI: 00:07.3
924 14:34:47.456336 PCI: 00:09.0
925 14:34:47.456423 PCI: 00:0d.1
926 14:34:47.459468 PCI: 00:0d.2
927 14:34:47.459553 PCI: 00:0d.3
928 14:34:47.459619 PCI: 00:0e.0
929 14:34:47.462690 PCI: 00:12.0
930 14:34:47.462775 PCI: 00:12.6
931 14:34:47.466483 PCI: 00:13.0
932 14:34:47.466568 PCI: 00:14.1
933 14:34:47.469482 PCI: 00:16.1
934 14:34:47.469573 PCI: 00:16.2
935 14:34:47.469656 PCI: 00:16.3
936 14:34:47.472715 PCI: 00:16.4
937 14:34:47.472800 PCI: 00:16.5
938 14:34:47.476212 PCI: 00:17.0
939 14:34:47.476298 PCI: 00:19.2
940 14:34:47.476365 PCI: 00:1e.1
941 14:34:47.479053 PCI: 00:1f.1
942 14:34:47.479139 PCI: 00:1f.4
943 14:34:47.482745 PCI: 00:1f.6
944 14:34:47.482833 PCI: 00:1f.7
945 14:34:47.486062 PCI: Check your devicetree.cb.
946 14:34:47.489144 PCI: 00:02.0 scanning...
947 14:34:47.492502 scan_generic_bus for PCI: 00:02.0
948 14:34:47.495883 scan_generic_bus for PCI: 00:02.0 done
949 14:34:47.499068 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 14:34:47.502515 PCI: 00:04.0 scanning...
951 14:34:47.505544 scan_generic_bus for PCI: 00:04.0
952 14:34:47.508888 GENERIC: 0.0 enabled
953 14:34:47.515794 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 14:34:47.518941 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 14:34:47.522304 PCI: 00:0d.0 scanning...
956 14:34:47.525493 scan_static_bus for PCI: 00:0d.0
957 14:34:47.529064 USB0 port 0 enabled
958 14:34:47.529157 USB0 port 0 scanning...
959 14:34:47.532330 scan_static_bus for USB0 port 0
960 14:34:47.535744 USB3 port 0 enabled
961 14:34:47.539253 USB3 port 1 enabled
962 14:34:47.539350 USB3 port 2 disabled
963 14:34:47.542529 USB3 port 3 disabled
964 14:34:47.545993 USB3 port 0 scanning...
965 14:34:47.549028 scan_static_bus for USB3 port 0
966 14:34:47.552566 scan_static_bus for USB3 port 0 done
967 14:34:47.555735 scan_bus: bus USB3 port 0 finished in 6 msecs
968 14:34:47.559173 USB3 port 1 scanning...
969 14:34:47.562333 scan_static_bus for USB3 port 1
970 14:34:47.565460 scan_static_bus for USB3 port 1 done
971 14:34:47.572323 scan_bus: bus USB3 port 1 finished in 6 msecs
972 14:34:47.575508 scan_static_bus for USB0 port 0 done
973 14:34:47.578781 scan_bus: bus USB0 port 0 finished in 43 msecs
974 14:34:47.582264 scan_static_bus for PCI: 00:0d.0 done
975 14:34:47.589106 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 14:34:47.589203 PCI: 00:14.0 scanning...
977 14:34:47.592465 scan_static_bus for PCI: 00:14.0
978 14:34:47.595699 USB0 port 0 enabled
979 14:34:47.598996 USB0 port 0 scanning...
980 14:34:47.602307 scan_static_bus for USB0 port 0
981 14:34:47.605458 USB2 port 0 disabled
982 14:34:47.605547 USB2 port 1 enabled
983 14:34:47.608988 USB2 port 2 enabled
984 14:34:47.609074 USB2 port 3 disabled
985 14:34:47.611972 USB2 port 4 enabled
986 14:34:47.615504 USB2 port 5 disabled
987 14:34:47.615591 USB2 port 6 disabled
988 14:34:47.618706 USB2 port 7 disabled
989 14:34:47.621983 USB2 port 8 disabled
990 14:34:47.622071 USB2 port 9 disabled
991 14:34:47.625518 USB3 port 0 disabled
992 14:34:47.628825 USB3 port 1 enabled
993 14:34:47.628913 USB3 port 2 disabled
994 14:34:47.631946 USB3 port 3 disabled
995 14:34:47.635241 USB2 port 1 scanning...
996 14:34:47.638650 scan_static_bus for USB2 port 1
997 14:34:47.641767 scan_static_bus for USB2 port 1 done
998 14:34:47.645106 scan_bus: bus USB2 port 1 finished in 6 msecs
999 14:34:47.648390 USB2 port 2 scanning...
1000 14:34:47.651647 scan_static_bus for USB2 port 2
1001 14:34:47.655025 scan_static_bus for USB2 port 2 done
1002 14:34:47.658271 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 14:34:47.661821 USB2 port 4 scanning...
1004 14:34:47.664914 scan_static_bus for USB2 port 4
1005 14:34:47.668229 scan_static_bus for USB2 port 4 done
1006 14:34:47.675203 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 14:34:47.677883 USB3 port 1 scanning...
1008 14:34:47.681161 scan_static_bus for USB3 port 1
1009 14:34:47.684573 scan_static_bus for USB3 port 1 done
1010 14:34:47.687949 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 14:34:47.691273 scan_static_bus for USB0 port 0 done
1012 14:34:47.698110 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 14:34:47.701013 scan_static_bus for PCI: 00:14.0 done
1014 14:34:47.704870 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 14:34:47.707941 PCI: 00:14.3 scanning...
1016 14:34:47.710939 scan_static_bus for PCI: 00:14.3
1017 14:34:47.714250 GENERIC: 0.0 enabled
1018 14:34:47.717565 scan_static_bus for PCI: 00:14.3 done
1019 14:34:47.721332 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 14:34:47.724930 PCI: 00:15.0 scanning...
1021 14:34:47.727551 scan_static_bus for PCI: 00:15.0
1022 14:34:47.731394 I2C: 00:1a enabled
1023 14:34:47.731481 I2C: 00:31 enabled
1024 14:34:47.734309 I2C: 00:32 enabled
1025 14:34:47.737442 scan_static_bus for PCI: 00:15.0 done
1026 14:34:47.741433 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 14:34:47.744897 PCI: 00:15.1 scanning...
1028 14:34:47.748267 scan_static_bus for PCI: 00:15.1
1029 14:34:47.751747 I2C: 00:10 enabled
1030 14:34:47.754812 scan_static_bus for PCI: 00:15.1 done
1031 14:34:47.758263 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 14:34:47.761275 PCI: 00:15.2 scanning...
1033 14:34:47.764977 scan_static_bus for PCI: 00:15.2
1034 14:34:47.767896 scan_static_bus for PCI: 00:15.2 done
1035 14:34:47.774791 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 14:34:47.777940 PCI: 00:15.3 scanning...
1037 14:34:47.781377 scan_static_bus for PCI: 00:15.3
1038 14:34:47.784387 scan_static_bus for PCI: 00:15.3 done
1039 14:34:47.787936 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 14:34:47.791271 PCI: 00:19.1 scanning...
1041 14:34:47.794645 scan_static_bus for PCI: 00:19.1
1042 14:34:47.797905 I2C: 00:15 enabled
1043 14:34:47.801009 scan_static_bus for PCI: 00:19.1 done
1044 14:34:47.804559 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 14:34:47.807975 PCI: 00:1d.0 scanning...
1046 14:34:47.811273 do_pci_scan_bridge for PCI: 00:1d.0
1047 14:34:47.814578 PCI: pci_scan_bus for bus 01
1048 14:34:47.818017 PCI: 01:00.0 [1c5c/174a] enabled
1049 14:34:47.821081 GENERIC: 0.0 enabled
1050 14:34:47.824130 Enabling Common Clock Configuration
1051 14:34:47.827664 L1 Sub-State supported from root port 29
1052 14:34:47.831214 L1 Sub-State Support = 0xf
1053 14:34:47.834411 CommonModeRestoreTime = 0x28
1054 14:34:47.837577 Power On Value = 0x16, Power On Scale = 0x0
1055 14:34:47.841044 ASPM: Enabled L1
1056 14:34:47.844267 PCIe: Max_Payload_Size adjusted to 128
1057 14:34:47.847476 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 14:34:47.850818 PCI: 00:1e.2 scanning...
1059 14:34:47.854210 scan_generic_bus for PCI: 00:1e.2
1060 14:34:47.857258 SPI: 00 enabled
1061 14:34:47.864050 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 14:34:47.867291 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 14:34:47.870727 PCI: 00:1e.3 scanning...
1064 14:34:47.874113 scan_generic_bus for PCI: 00:1e.3
1065 14:34:47.874231 SPI: 00 enabled
1066 14:34:47.880817 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 14:34:47.887157 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 14:34:47.887270 PCI: 00:1f.0 scanning...
1069 14:34:47.890333 scan_static_bus for PCI: 00:1f.0
1070 14:34:47.893885 PNP: 0c09.0 enabled
1071 14:34:47.897200 PNP: 0c09.0 scanning...
1072 14:34:47.900250 scan_static_bus for PNP: 0c09.0
1073 14:34:47.903989 scan_static_bus for PNP: 0c09.0 done
1074 14:34:47.907682 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 14:34:47.913674 scan_static_bus for PCI: 00:1f.0 done
1076 14:34:47.916950 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 14:34:47.920136 PCI: 00:1f.2 scanning...
1078 14:34:47.923700 scan_static_bus for PCI: 00:1f.2
1079 14:34:47.923809 GENERIC: 0.0 enabled
1080 14:34:47.927093 GENERIC: 0.0 scanning...
1081 14:34:47.930141 scan_static_bus for GENERIC: 0.0
1082 14:34:47.933792 GENERIC: 0.0 enabled
1083 14:34:47.936797 GENERIC: 1.0 enabled
1084 14:34:47.940315 scan_static_bus for GENERIC: 0.0 done
1085 14:34:47.943527 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 14:34:47.947067 scan_static_bus for PCI: 00:1f.2 done
1087 14:34:47.953804 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 14:34:47.957031 PCI: 00:1f.3 scanning...
1089 14:34:47.960128 scan_static_bus for PCI: 00:1f.3
1090 14:34:47.963476 scan_static_bus for PCI: 00:1f.3 done
1091 14:34:47.966882 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 14:34:47.969920 PCI: 00:1f.5 scanning...
1093 14:34:47.973302 scan_generic_bus for PCI: 00:1f.5
1094 14:34:47.976570 scan_generic_bus for PCI: 00:1f.5 done
1095 14:34:47.983548 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 14:34:47.986437 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 14:34:47.989833 scan_static_bus for Root Device done
1098 14:34:47.996578 scan_bus: bus Root Device finished in 736 msecs
1099 14:34:47.996664 done
1100 14:34:48.002915 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 14:34:48.006536 Chrome EC: UHEPI supported
1102 14:34:48.012736 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 14:34:48.019399 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 14:34:48.022650 SPI flash protection: WPSW=0 SRP0=0
1105 14:34:48.026192 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 14:34:48.032823 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 14:34:48.036657 found VGA at PCI: 00:02.0
1108 14:34:48.039580 Setting up VGA for PCI: 00:02.0
1109 14:34:48.043012 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 14:34:48.049196 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 14:34:48.049283 Allocating resources...
1112 14:34:48.052794 Reading resources...
1113 14:34:48.056108 Root Device read_resources bus 0 link: 0
1114 14:34:48.062628 DOMAIN: 0000 read_resources bus 0 link: 0
1115 14:34:48.066151 PCI: 00:04.0 read_resources bus 1 link: 0
1116 14:34:48.072783 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 14:34:48.076581 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 14:34:48.082650 USB0 port 0 read_resources bus 0 link: 0
1119 14:34:48.085802 USB0 port 0 read_resources bus 0 link: 0 done
1120 14:34:48.092069 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 14:34:48.095360 PCI: 00:14.0 read_resources bus 0 link: 0
1122 14:34:48.099101 USB0 port 0 read_resources bus 0 link: 0
1123 14:34:48.106207 USB0 port 0 read_resources bus 0 link: 0 done
1124 14:34:48.109228 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 14:34:48.116333 PCI: 00:14.3 read_resources bus 0 link: 0
1126 14:34:48.119523 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 14:34:48.126149 PCI: 00:15.0 read_resources bus 0 link: 0
1128 14:34:48.129204 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 14:34:48.136055 PCI: 00:15.1 read_resources bus 0 link: 0
1130 14:34:48.139319 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 14:34:48.146588 PCI: 00:19.1 read_resources bus 0 link: 0
1132 14:34:48.149856 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 14:34:48.156609 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 14:34:48.159731 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 14:34:48.166504 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 14:34:48.170012 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 14:34:48.176207 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 14:34:48.179949 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 14:34:48.186324 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 14:34:48.189833 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 14:34:48.196047 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 14:34:48.199400 GENERIC: 0.0 read_resources bus 0 link: 0
1143 14:34:48.205869 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 14:34:48.209404 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 14:34:48.216299 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 14:34:48.219425 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 14:34:48.226076 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 14:34:48.229325 Root Device read_resources bus 0 link: 0 done
1149 14:34:48.232849 Done reading resources.
1150 14:34:48.239175 Show resources in subtree (Root Device)...After reading.
1151 14:34:48.242438 Root Device child on link 0 DOMAIN: 0000
1152 14:34:48.245709 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 14:34:48.256282 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 14:34:48.265935 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 14:34:48.266043 PCI: 00:00.0
1156 14:34:48.275460 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 14:34:48.285527 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 14:34:48.295379 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 14:34:48.305615 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 14:34:48.315569 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 14:34:48.325371 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 14:34:48.332057 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 14:34:48.341964 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 14:34:48.351750 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 14:34:48.361905 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 14:34:48.371846 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 14:34:48.378467 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 14:34:48.388326 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 14:34:48.398087 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 14:34:48.408245 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 14:34:48.418234 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 14:34:48.428323 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 14:34:48.438489 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 14:34:48.444719 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 14:34:48.454572 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 14:34:48.458294 PCI: 00:02.0
1177 14:34:48.467753 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 14:34:48.477546 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 14:34:48.487607 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 14:34:48.490721 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 14:34:48.501206 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 14:34:48.504432 GENERIC: 0.0
1183 14:34:48.504523 PCI: 00:05.0
1184 14:34:48.513986 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 14:34:48.517414 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 14:34:48.521093 GENERIC: 0.0
1187 14:34:48.524072 PCI: 00:08.0
1188 14:34:48.534344 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 14:34:48.534437 PCI: 00:0a.0
1190 14:34:48.537302 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 14:34:48.547511 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 14:34:48.554182 USB0 port 0 child on link 0 USB3 port 0
1193 14:34:48.554273 USB3 port 0
1194 14:34:48.557485 USB3 port 1
1195 14:34:48.557577 USB3 port 2
1196 14:34:48.560591 USB3 port 3
1197 14:34:48.563778 PCI: 00:14.0 child on link 0 USB0 port 0
1198 14:34:48.573622 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 14:34:48.580807 USB0 port 0 child on link 0 USB2 port 0
1200 14:34:48.580904 USB2 port 0
1201 14:34:48.583629 USB2 port 1
1202 14:34:48.583715 USB2 port 2
1203 14:34:48.587535 USB2 port 3
1204 14:34:48.587620 USB2 port 4
1205 14:34:48.590425 USB2 port 5
1206 14:34:48.590510 USB2 port 6
1207 14:34:48.593761 USB2 port 7
1208 14:34:48.593848 USB2 port 8
1209 14:34:48.596964 USB2 port 9
1210 14:34:48.597050 USB3 port 0
1211 14:34:48.600151 USB3 port 1
1212 14:34:48.600236 USB3 port 2
1213 14:34:48.603670 USB3 port 3
1214 14:34:48.603756 PCI: 00:14.2
1215 14:34:48.613473 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 14:34:48.623934 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 14:34:48.630337 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 14:34:48.640456 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:34:48.640549 GENERIC: 0.0
1220 14:34:48.646708 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 14:34:48.657001 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 14:34:48.657095 I2C: 00:1a
1223 14:34:48.660199 I2C: 00:31
1224 14:34:48.660285 I2C: 00:32
1225 14:34:48.663003 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 14:34:48.673241 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 14:34:48.676614 I2C: 00:10
1228 14:34:48.676701 PCI: 00:15.2
1229 14:34:48.686624 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 14:34:48.689985 PCI: 00:15.3
1231 14:34:48.699620 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 14:34:48.699723 PCI: 00:16.0
1233 14:34:48.709598 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 14:34:48.713490 PCI: 00:19.0
1235 14:34:48.716619 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 14:34:48.726708 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 14:34:48.729474 I2C: 00:15
1238 14:34:48.732748 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 14:34:48.743052 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 14:34:48.752862 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 14:34:48.759288 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 14:34:48.762905 GENERIC: 0.0
1243 14:34:48.762992 PCI: 01:00.0
1244 14:34:48.772548 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 14:34:48.782389 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 14:34:48.792755 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 14:34:48.795746 PCI: 00:1e.0
1248 14:34:48.805593 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 14:34:48.808969 PCI: 00:1e.2 child on link 0 SPI: 00
1250 14:34:48.818882 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 14:34:48.822256 SPI: 00
1252 14:34:48.825520 PCI: 00:1e.3 child on link 0 SPI: 00
1253 14:34:48.835595 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 14:34:48.835694 SPI: 00
1255 14:34:48.839016 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 14:34:48.848703 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 14:34:48.852311 PNP: 0c09.0
1258 14:34:48.858677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 14:34:48.865279 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 14:34:48.872016 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 14:34:48.881855 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 14:34:48.888420 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 14:34:48.888516 GENERIC: 0.0
1264 14:34:48.891720 GENERIC: 1.0
1265 14:34:48.891804 PCI: 00:1f.3
1266 14:34:48.901856 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 14:34:48.911951 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 14:34:48.914847 PCI: 00:1f.5
1269 14:34:48.925146 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 14:34:48.928387 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 14:34:48.928476 APIC: 00
1272 14:34:48.931466 APIC: 01
1273 14:34:48.931551 APIC: 05
1274 14:34:48.931617 APIC: 07
1275 14:34:48.934976 APIC: 02
1276 14:34:48.935063 APIC: 04
1277 14:34:48.938297 APIC: 06
1278 14:34:48.938426 APIC: 03
1279 14:34:48.944992 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 14:34:48.952000 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 14:34:48.958161 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 14:34:48.964684 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 14:34:48.967819 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 14:34:48.971520 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 14:34:48.978453 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 14:34:48.984592 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 14:34:48.991216 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 14:34:48.997720 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 14:34:49.004112 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 14:34:49.010890 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 14:34:49.020958 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 14:34:49.027722 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 14:34:49.034040 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 14:34:49.037453 DOMAIN: 0000: Resource ranges:
1295 14:34:49.040845 * Base: 1000, Size: 800, Tag: 100
1296 14:34:49.044361 * Base: 1900, Size: e700, Tag: 100
1297 14:34:49.051037 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 14:34:49.057461 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 14:34:49.064547 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 14:34:49.070457 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 14:34:49.080668 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 14:34:49.087567 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 14:34:49.094358 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 14:34:49.104062 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 14:34:49.110298 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 14:34:49.117157 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 14:34:49.126871 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 14:34:49.133603 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 14:34:49.140172 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 14:34:49.150247 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 14:34:49.156650 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 14:34:49.163430 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 14:34:49.170103 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 14:34:49.179914 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 14:34:49.186475 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 14:34:49.196618 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 14:34:49.203455 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 14:34:49.210007 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 14:34:49.216472 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 14:34:49.226307 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 14:34:49.232878 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 14:34:49.236231 DOMAIN: 0000: Resource ranges:
1323 14:34:49.239808 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 14:34:49.246378 * Base: d0000000, Size: 28000000, Tag: 200
1325 14:34:49.249849 * Base: fa000000, Size: 1000000, Tag: 200
1326 14:34:49.252925 * Base: fb001000, Size: 2fff000, Tag: 200
1327 14:34:49.259479 * Base: fe010000, Size: 2e000, Tag: 200
1328 14:34:49.262598 * Base: fe03f000, Size: d41000, Tag: 200
1329 14:34:49.265989 * Base: fed88000, Size: 8000, Tag: 200
1330 14:34:49.269588 * Base: fed93000, Size: d000, Tag: 200
1331 14:34:49.272642 * Base: feda2000, Size: 1e000, Tag: 200
1332 14:34:49.279339 * Base: fede0000, Size: 1220000, Tag: 200
1333 14:34:49.282709 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 14:34:49.289769 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 14:34:49.295892 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 14:34:49.302703 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 14:34:49.309529 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 14:34:49.316305 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 14:34:49.322725 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 14:34:49.329171 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 14:34:49.335765 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 14:34:49.342640 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 14:34:49.348961 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 14:34:49.355611 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 14:34:49.362115 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 14:34:49.369034 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 14:34:49.375631 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 14:34:49.381958 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 14:34:49.388797 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 14:34:49.395468 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 14:34:49.402087 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 14:34:49.408756 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 14:34:49.415771 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 14:34:49.422015 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 14:34:49.428328 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 14:34:49.438416 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 14:34:49.445303 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 14:34:49.448614 PCI: 00:1d.0: Resource ranges:
1359 14:34:49.451625 * Base: 7fc00000, Size: 100000, Tag: 200
1360 14:34:49.458607 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 14:34:49.464861 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 14:34:49.471330 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 14:34:49.481337 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 14:34:49.488197 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 14:34:49.491467 Root Device assign_resources, bus 0 link: 0
1366 14:34:49.498049 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 14:34:49.504923 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 14:34:49.514797 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 14:34:49.521093 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 14:34:49.531106 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 14:34:49.534283 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 14:34:49.537831 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 14:34:49.548125 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 14:34:49.554479 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 14:34:49.563988 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 14:34:49.568042 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 14:34:49.573972 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 14:34:49.580790 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 14:34:49.587547 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 14:34:49.590479 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 14:34:49.600497 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 14:34:49.607214 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 14:34:49.613848 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 14:34:49.620209 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 14:34:49.623698 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 14:34:49.633910 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 14:34:49.636927 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 14:34:49.643727 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 14:34:49.649900 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 14:34:49.653539 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 14:34:49.659719 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 14:34:49.666264 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 14:34:49.676310 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 14:34:49.683267 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 14:34:49.693007 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 14:34:49.696127 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 14:34:49.702856 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 14:34:49.709339 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 14:34:49.719381 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 14:34:49.729160 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 14:34:49.732635 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 14:34:49.742416 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 14:34:49.749310 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 14:34:49.756432 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 14:34:49.762248 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 14:34:49.769207 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 14:34:49.775753 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 14:34:49.778997 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 14:34:49.789156 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 14:34:49.792143 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 14:34:49.795335 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 14:34:49.802254 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 14:34:49.805889 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 14:34:49.812136 LPC: Trying to open IO window from 800 size 1ff
1415 14:34:49.818813 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 14:34:49.828820 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 14:34:49.835320 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 14:34:49.841816 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 14:34:49.845039 Root Device assign_resources, bus 0 link: 0
1420 14:34:49.848669 Done setting resources.
1421 14:34:49.855290 Show resources in subtree (Root Device)...After assigning values.
1422 14:34:49.858997 Root Device child on link 0 DOMAIN: 0000
1423 14:34:49.862011 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 14:34:49.871677 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 14:34:49.881788 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 14:34:49.884985 PCI: 00:00.0
1427 14:34:49.895125 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 14:34:49.901523 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 14:34:49.911930 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 14:34:49.921507 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 14:34:49.931721 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 14:34:49.941566 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 14:34:49.951209 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 14:34:49.957875 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 14:34:49.967539 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 14:34:49.977467 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 14:34:49.987309 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 14:34:49.997341 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 14:34:50.007158 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 14:34:50.014020 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 14:34:50.023719 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 14:34:50.033491 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 14:34:50.043558 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 14:34:50.053563 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 14:34:50.063493 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 14:34:50.073385 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 14:34:50.073480 PCI: 00:02.0
1448 14:34:50.083289 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 14:34:50.096547 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 14:34:50.103114 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 14:34:50.109765 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 14:34:50.119824 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 14:34:50.119925 GENERIC: 0.0
1454 14:34:50.123232 PCI: 00:05.0
1455 14:34:50.132905 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 14:34:50.139444 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 14:34:50.139540 GENERIC: 0.0
1458 14:34:50.142818 PCI: 00:08.0
1459 14:34:50.152493 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 14:34:50.152588 PCI: 00:0a.0
1461 14:34:50.159665 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 14:34:50.169244 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 14:34:50.172632 USB0 port 0 child on link 0 USB3 port 0
1464 14:34:50.175931 USB3 port 0
1465 14:34:50.176043 USB3 port 1
1466 14:34:50.179090 USB3 port 2
1467 14:34:50.179178 USB3 port 3
1468 14:34:50.182432 PCI: 00:14.0 child on link 0 USB0 port 0
1469 14:34:50.195937 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 14:34:50.199056 USB0 port 0 child on link 0 USB2 port 0
1471 14:34:50.202292 USB2 port 0
1472 14:34:50.202378 USB2 port 1
1473 14:34:50.205544 USB2 port 2
1474 14:34:50.205648 USB2 port 3
1475 14:34:50.208935 USB2 port 4
1476 14:34:50.209021 USB2 port 5
1477 14:34:50.212204 USB2 port 6
1478 14:34:50.212289 USB2 port 7
1479 14:34:50.215395 USB2 port 8
1480 14:34:50.215480 USB2 port 9
1481 14:34:50.218750 USB3 port 0
1482 14:34:50.218844 USB3 port 1
1483 14:34:50.222222 USB3 port 2
1484 14:34:50.222310 USB3 port 3
1485 14:34:50.225865 PCI: 00:14.2
1486 14:34:50.235372 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 14:34:50.245441 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 14:34:50.251780 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 14:34:50.261922 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 14:34:50.262021 GENERIC: 0.0
1491 14:34:50.268259 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 14:34:50.278458 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 14:34:50.278557 I2C: 00:1a
1494 14:34:50.281708 I2C: 00:31
1495 14:34:50.281799 I2C: 00:32
1496 14:34:50.285246 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 14:34:50.295147 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 14:34:50.298232 I2C: 00:10
1499 14:34:50.298324 PCI: 00:15.2
1500 14:34:50.311645 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 14:34:50.311745 PCI: 00:15.3
1502 14:34:50.321547 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 14:34:50.324618 PCI: 00:16.0
1504 14:34:50.334989 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 14:34:50.335092 PCI: 00:19.0
1506 14:34:50.341348 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 14:34:50.351284 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 14:34:50.351389 I2C: 00:15
1509 14:34:50.357811 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 14:34:50.364479 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 14:34:50.377776 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 14:34:50.387706 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 14:34:50.391055 GENERIC: 0.0
1514 14:34:50.391146 PCI: 01:00.0
1515 14:34:50.400802 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 14:34:50.410633 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 14:34:50.423776 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 14:34:50.423879 PCI: 00:1e.0
1519 14:34:50.433761 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 14:34:50.440717 PCI: 00:1e.2 child on link 0 SPI: 00
1521 14:34:50.450551 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 14:34:50.450661 SPI: 00
1523 14:34:50.453809 PCI: 00:1e.3 child on link 0 SPI: 00
1524 14:34:50.466872 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 14:34:50.466971 SPI: 00
1526 14:34:50.470055 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 14:34:50.480251 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 14:34:50.480350 PNP: 0c09.0
1529 14:34:50.489864 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 14:34:50.493271 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 14:34:50.503084 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 14:34:50.513164 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 14:34:50.516405 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 14:34:50.519738 GENERIC: 0.0
1535 14:34:50.522866 GENERIC: 1.0
1536 14:34:50.522957 PCI: 00:1f.3
1537 14:34:50.533084 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 14:34:50.542746 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 14:34:50.546102 PCI: 00:1f.5
1540 14:34:50.556269 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 14:34:50.559331 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 14:34:50.562921 APIC: 00
1543 14:34:50.563007 APIC: 01
1544 14:34:50.563074 APIC: 05
1545 14:34:50.566045 APIC: 07
1546 14:34:50.566130 APIC: 02
1547 14:34:50.569232 APIC: 04
1548 14:34:50.569318 APIC: 06
1549 14:34:50.569384 APIC: 03
1550 14:34:50.572820 Done allocating resources.
1551 14:34:50.579060 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 14:34:50.585992 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 14:34:50.589204 Configure GPIOs for I2S audio on UP4.
1554 14:34:50.595783 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 14:34:50.599106 Enabling resources...
1556 14:34:50.602474 PCI: 00:00.0 subsystem <- 8086/9a12
1557 14:34:50.605761 PCI: 00:00.0 cmd <- 06
1558 14:34:50.608993 PCI: 00:02.0 subsystem <- 8086/9a40
1559 14:34:50.612149 PCI: 00:02.0 cmd <- 03
1560 14:34:50.615699 PCI: 00:04.0 subsystem <- 8086/9a03
1561 14:34:50.619231 PCI: 00:04.0 cmd <- 02
1562 14:34:50.622209 PCI: 00:05.0 subsystem <- 8086/9a19
1563 14:34:50.622295 PCI: 00:05.0 cmd <- 02
1564 14:34:50.628725 PCI: 00:08.0 subsystem <- 8086/9a11
1565 14:34:50.628811 PCI: 00:08.0 cmd <- 06
1566 14:34:50.631893 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 14:34:50.635425 PCI: 00:0d.0 cmd <- 02
1568 14:34:50.638565 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 14:34:50.642033 PCI: 00:14.0 cmd <- 02
1570 14:34:50.645342 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 14:34:50.648455 PCI: 00:14.2 cmd <- 02
1572 14:34:50.651832 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 14:34:50.655264 PCI: 00:14.3 cmd <- 02
1574 14:34:50.658598 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 14:34:50.661636 PCI: 00:15.0 cmd <- 02
1576 14:34:50.665158 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 14:34:50.668327 PCI: 00:15.1 cmd <- 02
1578 14:34:50.671677 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 14:34:50.671761 PCI: 00:15.2 cmd <- 02
1580 14:34:50.679075 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 14:34:50.679161 PCI: 00:15.3 cmd <- 02
1582 14:34:50.681727 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 14:34:50.685249 PCI: 00:16.0 cmd <- 02
1584 14:34:50.688499 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 14:34:50.692045 PCI: 00:19.1 cmd <- 02
1586 14:34:50.695186 PCI: 00:1d.0 bridge ctrl <- 0013
1587 14:34:50.698358 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 14:34:50.701518 PCI: 00:1d.0 cmd <- 06
1589 14:34:50.704872 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 14:34:50.708036 PCI: 00:1e.0 cmd <- 06
1591 14:34:50.711508 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 14:34:50.714852 PCI: 00:1e.2 cmd <- 06
1593 14:34:50.717958 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 14:34:50.721560 PCI: 00:1e.3 cmd <- 02
1595 14:34:50.724676 PCI: 00:1f.0 subsystem <- 8086/a087
1596 14:34:50.724760 PCI: 00:1f.0 cmd <- 407
1597 14:34:50.731706 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 14:34:50.731790 PCI: 00:1f.3 cmd <- 02
1599 14:34:50.734651 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 14:34:50.738325 PCI: 00:1f.5 cmd <- 406
1601 14:34:50.742998 PCI: 01:00.0 cmd <- 02
1602 14:34:50.748078 done.
1603 14:34:50.751354 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 14:34:50.754601 Initializing devices...
1605 14:34:50.757272 Root Device init
1606 14:34:50.761132 Chrome EC: Set SMI mask to 0x0000000000000000
1607 14:34:50.767867 Chrome EC: clear events_b mask to 0x0000000000000000
1608 14:34:50.773871 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 14:34:50.781049 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 14:34:50.783745 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 14:34:50.791638 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 14:34:50.798989 fw_config match found: DB_USB=USB3_ACTIVE
1613 14:34:50.802093 Configure Right Type-C port orientation for retimer
1614 14:34:50.805422 Root Device init finished in 46 msecs
1615 14:34:50.809312 PCI: 00:00.0 init
1616 14:34:50.812618 CPU TDP = 9 Watts
1617 14:34:50.812704 CPU PL1 = 9 Watts
1618 14:34:50.815917 CPU PL2 = 40 Watts
1619 14:34:50.819642 CPU PL4 = 83 Watts
1620 14:34:50.822539 PCI: 00:00.0 init finished in 8 msecs
1621 14:34:50.822626 PCI: 00:02.0 init
1622 14:34:50.825952 GMA: Found VBT in CBFS
1623 14:34:50.829105 GMA: Found valid VBT in CBFS
1624 14:34:50.836125 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 14:34:50.842593 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 14:34:50.845730 PCI: 00:02.0 init finished in 18 msecs
1627 14:34:50.849302 PCI: 00:05.0 init
1628 14:34:50.852748 PCI: 00:05.0 init finished in 0 msecs
1629 14:34:50.855757 PCI: 00:08.0 init
1630 14:34:50.859062 PCI: 00:08.0 init finished in 0 msecs
1631 14:34:50.862326 PCI: 00:14.0 init
1632 14:34:50.865936 PCI: 00:14.0 init finished in 0 msecs
1633 14:34:50.868934 PCI: 00:14.2 init
1634 14:34:50.872122 PCI: 00:14.2 init finished in 0 msecs
1635 14:34:50.875794 PCI: 00:15.0 init
1636 14:34:50.879127 I2C bus 0 version 0x3230302a
1637 14:34:50.882316 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 14:34:50.885526 PCI: 00:15.0 init finished in 6 msecs
1639 14:34:50.885651 PCI: 00:15.1 init
1640 14:34:50.888708 I2C bus 1 version 0x3230302a
1641 14:34:50.892152 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 14:34:50.898985 PCI: 00:15.1 init finished in 6 msecs
1643 14:34:50.899073 PCI: 00:15.2 init
1644 14:34:50.902247 I2C bus 2 version 0x3230302a
1645 14:34:50.905874 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 14:34:50.908719 PCI: 00:15.2 init finished in 6 msecs
1647 14:34:50.912329 PCI: 00:15.3 init
1648 14:34:50.915363 I2C bus 3 version 0x3230302a
1649 14:34:50.919044 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 14:34:50.922181 PCI: 00:15.3 init finished in 6 msecs
1651 14:34:50.925606 PCI: 00:16.0 init
1652 14:34:50.928861 PCI: 00:16.0 init finished in 0 msecs
1653 14:34:50.931987 PCI: 00:19.1 init
1654 14:34:50.935410 I2C bus 5 version 0x3230302a
1655 14:34:50.938946 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 14:34:50.942347 PCI: 00:19.1 init finished in 6 msecs
1657 14:34:50.945542 PCI: 00:1d.0 init
1658 14:34:50.945650 Initializing PCH PCIe bridge.
1659 14:34:50.951935 PCI: 00:1d.0 init finished in 3 msecs
1660 14:34:50.955361 PCI: 00:1f.0 init
1661 14:34:50.958490 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 14:34:50.961544 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 14:34:50.965513 IOAPIC: ID = 0x02
1664 14:34:50.968299 IOAPIC: Dumping registers
1665 14:34:50.968384 reg 0x0000: 0x02000000
1666 14:34:50.971641 reg 0x0001: 0x00770020
1667 14:34:50.974920 reg 0x0002: 0x00000000
1668 14:34:50.978489 PCI: 00:1f.0 init finished in 21 msecs
1669 14:34:50.981695 PCI: 00:1f.2 init
1670 14:34:50.985295 Disabling ACPI via APMC.
1671 14:34:50.985380 APMC done.
1672 14:34:50.988479 PCI: 00:1f.2 init finished in 5 msecs
1673 14:34:51.001836 PCI: 01:00.0 init
1674 14:34:51.005150 PCI: 01:00.0 init finished in 0 msecs
1675 14:34:51.008494 PNP: 0c09.0 init
1676 14:34:51.012063 Google Chrome EC uptime: 8.409 seconds
1677 14:34:51.018388 Google Chrome AP resets since EC boot: 1
1678 14:34:51.021583 Google Chrome most recent AP reset causes:
1679 14:34:51.024973 0.347: 32775 shutdown: entering G3
1680 14:34:51.031725 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 14:34:51.034989 PNP: 0c09.0 init finished in 22 msecs
1682 14:34:51.041030 Devices initialized
1683 14:34:51.044606 Show all devs... After init.
1684 14:34:51.047574 Root Device: enabled 1
1685 14:34:51.047659 DOMAIN: 0000: enabled 1
1686 14:34:51.051070 CPU_CLUSTER: 0: enabled 1
1687 14:34:51.054348 PCI: 00:00.0: enabled 1
1688 14:34:51.057213 PCI: 00:02.0: enabled 1
1689 14:34:51.057297 PCI: 00:04.0: enabled 1
1690 14:34:51.060931 PCI: 00:05.0: enabled 1
1691 14:34:51.064405 PCI: 00:06.0: enabled 0
1692 14:34:51.067528 PCI: 00:07.0: enabled 0
1693 14:34:51.067612 PCI: 00:07.1: enabled 0
1694 14:34:51.070772 PCI: 00:07.2: enabled 0
1695 14:34:51.073918 PCI: 00:07.3: enabled 0
1696 14:34:51.077616 PCI: 00:08.0: enabled 1
1697 14:34:51.077699 PCI: 00:09.0: enabled 0
1698 14:34:51.080680 PCI: 00:0a.0: enabled 0
1699 14:34:51.084214 PCI: 00:0d.0: enabled 1
1700 14:34:51.087475 PCI: 00:0d.1: enabled 0
1701 14:34:51.087559 PCI: 00:0d.2: enabled 0
1702 14:34:51.090566 PCI: 00:0d.3: enabled 0
1703 14:34:51.094054 PCI: 00:0e.0: enabled 0
1704 14:34:51.094154 PCI: 00:10.2: enabled 1
1705 14:34:51.097516 PCI: 00:10.6: enabled 0
1706 14:34:51.100820 PCI: 00:10.7: enabled 0
1707 14:34:51.103771 PCI: 00:12.0: enabled 0
1708 14:34:51.103856 PCI: 00:12.6: enabled 0
1709 14:34:51.107397 PCI: 00:13.0: enabled 0
1710 14:34:51.111017 PCI: 00:14.0: enabled 1
1711 14:34:51.114108 PCI: 00:14.1: enabled 0
1712 14:34:51.114192 PCI: 00:14.2: enabled 1
1713 14:34:51.117330 PCI: 00:14.3: enabled 1
1714 14:34:51.120364 PCI: 00:15.0: enabled 1
1715 14:34:51.123867 PCI: 00:15.1: enabled 1
1716 14:34:51.123965 PCI: 00:15.2: enabled 1
1717 14:34:51.127227 PCI: 00:15.3: enabled 1
1718 14:34:51.131046 PCI: 00:16.0: enabled 1
1719 14:34:51.131130 PCI: 00:16.1: enabled 0
1720 14:34:51.133847 PCI: 00:16.2: enabled 0
1721 14:34:51.137159 PCI: 00:16.3: enabled 0
1722 14:34:51.140317 PCI: 00:16.4: enabled 0
1723 14:34:51.140403 PCI: 00:16.5: enabled 0
1724 14:34:51.143872 PCI: 00:17.0: enabled 0
1725 14:34:51.147715 PCI: 00:19.0: enabled 0
1726 14:34:51.150633 PCI: 00:19.1: enabled 1
1727 14:34:51.150731 PCI: 00:19.2: enabled 0
1728 14:34:51.153693 PCI: 00:1c.0: enabled 1
1729 14:34:51.156981 PCI: 00:1c.1: enabled 0
1730 14:34:51.160465 PCI: 00:1c.2: enabled 0
1731 14:34:51.160549 PCI: 00:1c.3: enabled 0
1732 14:34:51.163582 PCI: 00:1c.4: enabled 0
1733 14:34:51.167005 PCI: 00:1c.5: enabled 0
1734 14:34:51.170163 PCI: 00:1c.6: enabled 1
1735 14:34:51.170248 PCI: 00:1c.7: enabled 0
1736 14:34:51.173680 PCI: 00:1d.0: enabled 1
1737 14:34:51.176907 PCI: 00:1d.1: enabled 0
1738 14:34:51.176991 PCI: 00:1d.2: enabled 1
1739 14:34:51.180686 PCI: 00:1d.3: enabled 0
1740 14:34:51.183632 PCI: 00:1e.0: enabled 1
1741 14:34:51.187167 PCI: 00:1e.1: enabled 0
1742 14:34:51.187246 PCI: 00:1e.2: enabled 1
1743 14:34:51.190260 PCI: 00:1e.3: enabled 1
1744 14:34:51.193359 PCI: 00:1f.0: enabled 1
1745 14:34:51.196794 PCI: 00:1f.1: enabled 0
1746 14:34:51.196874 PCI: 00:1f.2: enabled 1
1747 14:34:51.200085 PCI: 00:1f.3: enabled 1
1748 14:34:51.203304 PCI: 00:1f.4: enabled 0
1749 14:34:51.207041 PCI: 00:1f.5: enabled 1
1750 14:34:51.207119 PCI: 00:1f.6: enabled 0
1751 14:34:51.210348 PCI: 00:1f.7: enabled 0
1752 14:34:51.213501 APIC: 00: enabled 1
1753 14:34:51.213582 GENERIC: 0.0: enabled 1
1754 14:34:51.216628 GENERIC: 0.0: enabled 1
1755 14:34:51.220452 GENERIC: 1.0: enabled 1
1756 14:34:51.223537 GENERIC: 0.0: enabled 1
1757 14:34:51.223644 GENERIC: 1.0: enabled 1
1758 14:34:51.226880 USB0 port 0: enabled 1
1759 14:34:51.229774 GENERIC: 0.0: enabled 1
1760 14:34:51.229859 USB0 port 0: enabled 1
1761 14:34:51.233236 GENERIC: 0.0: enabled 1
1762 14:34:51.237163 I2C: 00:1a: enabled 1
1763 14:34:51.239937 I2C: 00:31: enabled 1
1764 14:34:51.240026 I2C: 00:32: enabled 1
1765 14:34:51.243194 I2C: 00:10: enabled 1
1766 14:34:51.246676 I2C: 00:15: enabled 1
1767 14:34:51.246760 GENERIC: 0.0: enabled 0
1768 14:34:51.249778 GENERIC: 1.0: enabled 0
1769 14:34:51.253235 GENERIC: 0.0: enabled 1
1770 14:34:51.253320 SPI: 00: enabled 1
1771 14:34:51.256366 SPI: 00: enabled 1
1772 14:34:51.259676 PNP: 0c09.0: enabled 1
1773 14:34:51.259761 GENERIC: 0.0: enabled 1
1774 14:34:51.263347 USB3 port 0: enabled 1
1775 14:34:51.266655 USB3 port 1: enabled 1
1776 14:34:51.269810 USB3 port 2: enabled 0
1777 14:34:51.269895 USB3 port 3: enabled 0
1778 14:34:51.273128 USB2 port 0: enabled 0
1779 14:34:51.276219 USB2 port 1: enabled 1
1780 14:34:51.276303 USB2 port 2: enabled 1
1781 14:34:51.279717 USB2 port 3: enabled 0
1782 14:34:51.283031 USB2 port 4: enabled 1
1783 14:34:51.286266 USB2 port 5: enabled 0
1784 14:34:51.286350 USB2 port 6: enabled 0
1785 14:34:51.289512 USB2 port 7: enabled 0
1786 14:34:51.292827 USB2 port 8: enabled 0
1787 14:34:51.292926 USB2 port 9: enabled 0
1788 14:34:51.296074 USB3 port 0: enabled 0
1789 14:34:51.299615 USB3 port 1: enabled 1
1790 14:34:51.299700 USB3 port 2: enabled 0
1791 14:34:51.302894 USB3 port 3: enabled 0
1792 14:34:51.306417 GENERIC: 0.0: enabled 1
1793 14:34:51.309524 GENERIC: 1.0: enabled 1
1794 14:34:51.309644 APIC: 01: enabled 1
1795 14:34:51.313013 APIC: 05: enabled 1
1796 14:34:51.313097 APIC: 07: enabled 1
1797 14:34:51.316182 APIC: 02: enabled 1
1798 14:34:51.319497 APIC: 04: enabled 1
1799 14:34:51.319581 APIC: 06: enabled 1
1800 14:34:51.322764 APIC: 03: enabled 1
1801 14:34:51.326039 PCI: 01:00.0: enabled 1
1802 14:34:51.329821 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1803 14:34:51.336032 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 14:34:51.339242 ELOG: NV offset 0xf30000 size 0x1000
1805 14:34:51.346352 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 14:34:51.352591 ELOG: Event(17) added with size 13 at 2022-07-26 13:26:57 UTC
1807 14:34:51.359350 ELOG: Event(92) added with size 9 at 2022-07-26 13:26:57 UTC
1808 14:34:51.365822 ELOG: Event(93) added with size 9 at 2022-07-26 13:26:57 UTC
1809 14:34:51.372358 ELOG: Event(9E) added with size 10 at 2022-07-26 13:26:57 UTC
1810 14:34:51.379091 ELOG: Event(9F) added with size 14 at 2022-07-26 13:26:57 UTC
1811 14:34:51.385510 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 14:34:51.392076 ELOG: Event(A1) added with size 10 at 2022-07-26 13:26:57 UTC
1813 14:34:51.395666 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 14:34:51.401909 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 14:34:51.405349 Finalize devices...
1816 14:34:51.405436 Devices finalized
1817 14:34:51.411835 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 14:34:51.418656 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 14:34:51.421833 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 14:34:51.429234 ME: HFSTS1 : 0x80030055
1821 14:34:51.431844 ME: HFSTS2 : 0x30280116
1822 14:34:51.435348 ME: HFSTS3 : 0x00000050
1823 14:34:51.441729 ME: HFSTS4 : 0x00004000
1824 14:34:51.445383 ME: HFSTS5 : 0x00000000
1825 14:34:51.452317 ME: HFSTS6 : 0x00400006
1826 14:34:51.455087 ME: Manufacturing Mode : YES
1827 14:34:51.458497 ME: SPI Protection Mode Enabled : NO
1828 14:34:51.461864 ME: FW Partition Table : OK
1829 14:34:51.465087 ME: Bringup Loader Failure : NO
1830 14:34:51.468209 ME: Firmware Init Complete : NO
1831 14:34:51.471947 ME: Boot Options Present : NO
1832 14:34:51.475102 ME: Update In Progress : NO
1833 14:34:51.481736 ME: D0i3 Support : YES
1834 14:34:51.485161 ME: Low Power State Enabled : NO
1835 14:34:51.488143 ME: CPU Replaced : YES
1836 14:34:51.491692 ME: CPU Replacement Valid : YES
1837 14:34:51.495040 ME: Current Working State : 5
1838 14:34:51.498131 ME: Current Operation State : 1
1839 14:34:51.501390 ME: Current Operation Mode : 3
1840 14:34:51.504824 ME: Error Code : 0
1841 14:34:51.508292 ME: Enhanced Debug Mode : NO
1842 14:34:51.514592 ME: CPU Debug Disabled : YES
1843 14:34:51.518095 ME: TXT Support : NO
1844 14:34:51.524475 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 14:34:51.531169 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 14:34:51.534435 CBFS: 'fallback/slic' not found.
1847 14:34:51.537706 ACPI: Writing ACPI tables at 76b01000.
1848 14:34:51.540973 ACPI: * FACS
1849 14:34:51.541087 ACPI: * DSDT
1850 14:34:51.544566 Ramoops buffer: 0x100000@0x76a00000.
1851 14:34:51.551048 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 14:34:51.554408 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 14:34:51.557937 Google Chrome EC: version:
1854 14:34:51.561075 ro: voema_v2.0.7540-147f8d37d1
1855 14:34:51.564513 rw: voema_v2.0.7540-147f8d37d1
1856 14:34:51.567555 running image: 2
1857 14:34:51.574434 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 14:34:51.577999 ACPI: * FADT
1859 14:34:51.578087 SCI is IRQ9
1860 14:34:51.581053 ACPI: added table 1/32, length now 40
1861 14:34:51.584187 ACPI: * SSDT
1862 14:34:51.587532 Found 1 CPU(s) with 8 core(s) each.
1863 14:34:51.591145 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 14:34:51.597786 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 14:34:51.600473 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 14:34:51.603970 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 14:34:51.610858 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 14:34:51.617615 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 14:34:51.620525 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 14:34:51.627798 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 14:34:51.634066 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 14:34:51.637222 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 14:34:51.640620 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 14:34:51.647069 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 14:34:51.653892 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 14:34:51.657039 PS2K: Passing 80 keymaps to kernel
1877 14:34:51.663906 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 14:34:51.670163 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 14:34:51.676829 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 14:34:51.683299 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 14:34:51.690387 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 14:34:51.693499 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 14:34:51.699793 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 14:34:51.706737 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 14:34:51.713394 ACPI: added table 2/32, length now 44
1886 14:34:51.713488 ACPI: * MCFG
1887 14:34:51.716647 ACPI: added table 3/32, length now 48
1888 14:34:51.719835 ACPI: * TPM2
1889 14:34:51.723070 TPM2 log created at 0x769f0000
1890 14:34:51.726295 ACPI: added table 4/32, length now 52
1891 14:34:51.726383 ACPI: * MADT
1892 14:34:51.729756 SCI is IRQ9
1893 14:34:51.733323 ACPI: added table 5/32, length now 56
1894 14:34:51.733409 current = 76b09850
1895 14:34:51.736380 ACPI: * DMAR
1896 14:34:51.739814 ACPI: added table 6/32, length now 60
1897 14:34:51.743059 ACPI: added table 7/32, length now 64
1898 14:34:51.746468 ACPI: * HPET
1899 14:34:51.749829 ACPI: added table 8/32, length now 68
1900 14:34:51.749914 ACPI: done.
1901 14:34:51.752915 ACPI tables: 35216 bytes.
1902 14:34:51.756312 smbios_write_tables: 769ef000
1903 14:34:51.759880 EC returned error result code 3
1904 14:34:51.762996 Couldn't obtain OEM name from CBI
1905 14:34:51.766101 Create SMBIOS type 16
1906 14:34:51.769556 Create SMBIOS type 17
1907 14:34:51.769679 GENERIC: 0.0 (WIFI Device)
1908 14:34:51.773040 SMBIOS tables: 1750 bytes.
1909 14:34:51.779608 Writing table forward entry at 0x00000500
1910 14:34:51.782905 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 14:34:51.790127 Writing coreboot table at 0x76b25000
1912 14:34:51.792644 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 14:34:51.799431 1. 0000000000001000-000000000009ffff: RAM
1914 14:34:51.803427 2. 00000000000a0000-00000000000fffff: RESERVED
1915 14:34:51.806436 3. 0000000000100000-00000000769eefff: RAM
1916 14:34:51.812622 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 14:34:51.819646 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 14:34:51.822669 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 14:34:51.829197 7. 0000000077000000-000000007fbfffff: RESERVED
1920 14:34:51.832791 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 14:34:51.839426 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 14:34:51.842608 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 14:34:51.848989 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 14:34:51.852404 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 14:34:51.855577 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 14:34:51.862230 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 14:34:51.865476 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 14:34:51.872163 16. 0000000100000000-00000002803fffff: RAM
1929 14:34:51.875436 Passing 4 GPIOs to payload:
1930 14:34:51.878857 NAME | PORT | POLARITY | VALUE
1931 14:34:51.885719 lid | undefined | high | high
1932 14:34:51.889054 power | undefined | high | low
1933 14:34:51.895883 oprom | undefined | high | low
1934 14:34:51.899122 EC in RW | 0x000000e5 | high | high
1935 14:34:51.905995 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum c88d
1936 14:34:51.908763 coreboot table: 1576 bytes.
1937 14:34:51.912248 IMD ROOT 0. 0x76fff000 0x00001000
1938 14:34:51.918844 IMD SMALL 1. 0x76ffe000 0x00001000
1939 14:34:51.921828 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 14:34:51.925282 VPD 3. 0x76c4d000 0x00000367
1941 14:34:51.928908 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 14:34:51.932017 CONSOLE 5. 0x76c2c000 0x00020000
1943 14:34:51.935229 FMAP 6. 0x76c2b000 0x00000578
1944 14:34:51.938781 TIME STAMP 7. 0x76c2a000 0x00000910
1945 14:34:51.941679 VBOOT WORK 8. 0x76c16000 0x00014000
1946 14:34:51.948496 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 14:34:51.952175 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 14:34:51.955163 RAMSTAGE 11. 0x76b97000 0x00073000
1949 14:34:51.958519 REFCODE 12. 0x76b42000 0x00055000
1950 14:34:51.961793 SMM BACKUP 13. 0x76b32000 0x00010000
1951 14:34:51.964943 4f444749 14. 0x76b30000 0x00002000
1952 14:34:51.968176 EXT VBT15. 0x76b2d000 0x0000219f
1953 14:34:51.971545 COREBOOT 16. 0x76b25000 0x00008000
1954 14:34:51.974908 ACPI 17. 0x76b01000 0x00024000
1955 14:34:51.981297 ACPI GNVS 18. 0x76b00000 0x00001000
1956 14:34:51.984867 RAMOOPS 19. 0x76a00000 0x00100000
1957 14:34:51.988045 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 14:34:51.991561 SMBIOS 21. 0x769ef000 0x00000800
1959 14:34:51.991647 IMD small region:
1960 14:34:51.998050 IMD ROOT 0. 0x76ffec00 0x00000400
1961 14:34:52.001702 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 14:34:52.004692 POWER STATE 2. 0x76ffeb80 0x00000044
1963 14:34:52.008309 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 14:34:52.011134 MEM INFO 4. 0x76ffe980 0x000001e0
1965 14:34:52.017873 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 14:34:52.021359 MTRR: Physical address space:
1967 14:34:52.028468 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 14:34:52.034665 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 14:34:52.041196 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 14:34:52.047522 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 14:34:52.054180 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 14:34:52.057773 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 14:34:52.064326 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 14:34:52.070923 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 14:34:52.074718 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 14:34:52.077460 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 14:34:52.080754 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 14:34:52.087412 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 14:34:52.090726 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 14:34:52.094403 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 14:34:52.097490 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 14:34:52.101027 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 14:34:52.107276 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 14:34:52.110476 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 14:34:52.113775 call enable_fixed_mtrr()
1986 14:34:52.117187 CPU physical address size: 39 bits
1987 14:34:52.120392 MTRR: default type WB/UC MTRR counts: 6/6.
1988 14:34:52.127458 MTRR: UC selected as default type.
1989 14:34:52.130582 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 14:34:52.137438 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 14:34:52.143808 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 14:34:52.150555 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 14:34:52.156993 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 14:34:52.163522 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 14:34:52.163632
1996 14:34:52.166714 MTRR check
1997 14:34:52.166791 Fixed MTRRs : Enabled
1998 14:34:52.170336 Variable MTRRs: Enabled
1999 14:34:52.170425
2000 14:34:52.173495 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 14:34:52.180337 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 14:34:52.183908 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 14:34:52.187589 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 14:34:52.190140 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 14:34:52.197053 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 14:34:52.200087 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 14:34:52.203817 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 14:34:52.207142 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 14:34:52.213565 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 14:34:52.217861 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 14:34:52.223336 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2012 14:34:52.226581 call enable_fixed_mtrr()
2013 14:34:52.230066 Checking cr50 for pending updates
2014 14:34:52.234106 CPU physical address size: 39 bits
2015 14:34:52.237316 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 14:34:52.240862 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 14:34:52.243857 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 14:34:52.250784 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 14:34:52.253957 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 14:34:52.257171 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 14:34:52.260345 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 14:34:52.263780 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 14:34:52.270369 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 14:34:52.273858 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 14:34:52.277164 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 14:34:52.280186 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 14:34:52.287964 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 14:34:52.288053 call enable_fixed_mtrr()
2029 14:34:52.294930 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 14:34:52.298212 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 14:34:52.301535 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 14:34:52.304597 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 14:34:52.311206 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 14:34:52.314789 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 14:34:52.317907 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 14:34:52.320942 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 14:34:52.327643 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 14:34:52.331313 CPU physical address size: 39 bits
2039 14:34:52.334321 call enable_fixed_mtrr()
2040 14:34:52.337557 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 14:34:52.340775 MTRR: Fixed MSR 0x250 0x0606060606060606
2042 14:34:52.347251 MTRR: Fixed MSR 0x258 0x0606060606060606
2043 14:34:52.350909 MTRR: Fixed MSR 0x259 0x0000000000000000
2044 14:34:52.354013 MTRR: Fixed MSR 0x268 0x0606060606060606
2045 14:34:52.357518 MTRR: Fixed MSR 0x269 0x0606060606060606
2046 14:34:52.364781 MTRR: Fixed MSR 0x26a 0x0606060606060606
2047 14:34:52.368217 MTRR: Fixed MSR 0x26b 0x0606060606060606
2048 14:34:52.370561 MTRR: Fixed MSR 0x26c 0x0606060606060606
2049 14:34:52.374265 MTRR: Fixed MSR 0x26d 0x0606060606060606
2050 14:34:52.380553 MTRR: Fixed MSR 0x26e 0x0606060606060606
2051 14:34:52.383840 MTRR: Fixed MSR 0x26f 0x0606060606060606
2052 14:34:52.387502 MTRR: Fixed MSR 0x258 0x0606060606060606
2053 14:34:52.390912 call enable_fixed_mtrr()
2054 14:34:52.393969 MTRR: Fixed MSR 0x259 0x0000000000000000
2055 14:34:52.400487 MTRR: Fixed MSR 0x268 0x0606060606060606
2056 14:34:52.404060 MTRR: Fixed MSR 0x269 0x0606060606060606
2057 14:34:52.407267 MTRR: Fixed MSR 0x26a 0x0606060606060606
2058 14:34:52.410612 MTRR: Fixed MSR 0x26b 0x0606060606060606
2059 14:34:52.417169 MTRR: Fixed MSR 0x26c 0x0606060606060606
2060 14:34:52.420530 MTRR: Fixed MSR 0x26d 0x0606060606060606
2061 14:34:52.423561 MTRR: Fixed MSR 0x26e 0x0606060606060606
2062 14:34:52.427202 MTRR: Fixed MSR 0x26f 0x0606060606060606
2063 14:34:52.431164 CPU physical address size: 39 bits
2064 14:34:52.437833 call enable_fixed_mtrr()
2065 14:34:52.440800 CPU physical address size: 39 bits
2066 14:34:52.444209 MTRR: Fixed MSR 0x250 0x0606060606060606
2067 14:34:52.447509 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 14:34:52.451030 MTRR: Fixed MSR 0x258 0x0606060606060606
2069 14:34:52.457392 MTRR: Fixed MSR 0x259 0x0000000000000000
2070 14:34:52.460924 MTRR: Fixed MSR 0x268 0x0606060606060606
2071 14:34:52.464273 MTRR: Fixed MSR 0x269 0x0606060606060606
2072 14:34:52.467429 MTRR: Fixed MSR 0x26a 0x0606060606060606
2073 14:34:52.474191 MTRR: Fixed MSR 0x26b 0x0606060606060606
2074 14:34:52.477304 MTRR: Fixed MSR 0x26c 0x0606060606060606
2075 14:34:52.480550 MTRR: Fixed MSR 0x26d 0x0606060606060606
2076 14:34:52.484033 MTRR: Fixed MSR 0x26e 0x0606060606060606
2077 14:34:52.487341 MTRR: Fixed MSR 0x26f 0x0606060606060606
2078 14:34:52.494203 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 14:34:52.497508 call enable_fixed_mtrr()
2080 14:34:52.500630 MTRR: Fixed MSR 0x259 0x0000000000000000
2081 14:34:52.503928 MTRR: Fixed MSR 0x268 0x0606060606060606
2082 14:34:52.507144 MTRR: Fixed MSR 0x269 0x0606060606060606
2083 14:34:52.513745 MTRR: Fixed MSR 0x26a 0x0606060606060606
2084 14:34:52.517245 MTRR: Fixed MSR 0x26b 0x0606060606060606
2085 14:34:52.520872 MTRR: Fixed MSR 0x26c 0x0606060606060606
2086 14:34:52.524063 MTRR: Fixed MSR 0x26d 0x0606060606060606
2087 14:34:52.530725 MTRR: Fixed MSR 0x26e 0x0606060606060606
2088 14:34:52.534105 MTRR: Fixed MSR 0x26f 0x0606060606060606
2089 14:34:52.537342 CPU physical address size: 39 bits
2090 14:34:52.541166 call enable_fixed_mtrr()
2091 14:34:52.544356 CPU physical address size: 39 bits
2092 14:34:52.547818 CPU physical address size: 39 bits
2093 14:34:52.550750 Reading cr50 TPM mode
2094 14:34:52.560597 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2095 14:34:52.570824 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 14:34:52.574068 Checking segment from ROM address 0xffc02b38
2097 14:34:52.577466 Checking segment from ROM address 0xffc02b54
2098 14:34:52.584010 Loading segment from ROM address 0xffc02b38
2099 14:34:52.584129 code (compression=0)
2100 14:34:52.594156 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 14:34:52.603812 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 14:34:52.603919 it's not compressed!
2103 14:34:52.743297 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 14:34:52.750227 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 14:34:52.756454 Loading segment from ROM address 0xffc02b54
2106 14:34:52.756568 Entry Point 0x30000000
2107 14:34:52.759810 Loaded segments
2108 14:34:52.766614 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2109 14:34:52.809440 Finalizing chipset.
2110 14:34:52.812715 Finalizing SMM.
2111 14:34:52.812812 APMC done.
2112 14:34:52.819504 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 14:34:52.822770 mp_park_aps done after 0 msecs.
2114 14:34:52.826236 Jumping to boot code at 0x30000000(0x76b25000)
2115 14:34:52.835833 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 14:34:52.835975
2117 14:34:52.839213 Starting depthcharge on Voema...
2118 14:34:52.839673 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2119 14:34:52.839844 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2120 14:34:52.839991 Setting prompt string to ['volteer:']
2121 14:34:52.840124 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2122 14:34:52.849287 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2123 14:34:52.856004 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2124 14:34:52.862332 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2125 14:34:52.866106 Failed to find eMMC card reader
2126 14:34:52.866266 Wipe memory regions:
2127 14:34:52.872117 [0x00000000001000, 0x000000000a0000)
2128 14:34:52.875402 [0x00000000100000, 0x00000030000000)
2129 14:34:52.904915 [0x00000032662db0, 0x000000769ef000)
2130 14:34:52.943842 [0x00000100000000, 0x00000280400000)
2131 14:34:53.149419 ec_init: CrosEC protocol v3 supported (256, 256)
2132 14:34:53.155805 update_port_state: port C0 state: usb enable 1 mux conn 0
2133 14:34:53.165322 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2134 14:34:53.172154 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2135 14:34:53.175378 send_conn_disc_msg: pmc_send_cmd succeeded
2136 14:34:53.608871 R8152: Initializing
2137 14:34:53.611896 Version 6 (ocp_data = 5c30)
2138 14:34:53.615089 R8152: Done initializing
2139 14:34:53.618239 Adding net device
2140 14:34:53.924763 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2141 14:34:53.924914
2142 14:34:53.927867 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2144 14:34:54.028703 volteer: tftpboot 192.168.201.1 6895605/tftp-deploy-ywbjgbt1/kernel/bzImage 6895605/tftp-deploy-ywbjgbt1/kernel/cmdline 6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
2145 14:34:54.028890 Setting prompt string to 'Starting kernel'
2146 14:34:54.028988 Setting prompt string to ['Starting kernel']
2147 14:34:54.029058 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2148 14:34:54.029132 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:42)
2149 14:34:54.033529 tftpboot 192.168.201.1 6895605/tftp-deploy-ywbjgbt1/kernel/bzImoy-ywbjgbt1/kernel/cmdline 6895605/tftp-deploy-ywbjgbt1/ramdisk/ramdisk.cpio.gz
2150 14:34:54.033633 Waiting for link
2151 14:34:54.236818 done.
2152 14:34:54.236976 MAC: 00:24:32:30:7c:e4
2153 14:34:54.240407 Sending DHCP discover... done.
2154 14:34:54.243341 Waiting for reply... done.
2155 14:34:54.246681 Sending DHCP request... done.
2156 14:34:54.253158 Waiting for reply... done.
2157 14:34:54.253275 My ip is 192.168.201.12
2158 14:34:54.256910 The DHCP server ip is 192.168.201.1
2159 14:34:54.263512 TFTP server IP predefined by user: 192.168.201.1
2160 14:34:54.269979 Bootfile predefined by user: 6895605/tftp-deploy-ywbjgbt1/kernel/bzImage
2161 14:34:54.273536 Sending tftp read request... done.
2162 14:34:54.276745 Waiting for the transfer...
2163 14:34:54.889302 00000000 ################################################################
2164 14:34:55.473391 00080000 ################################################################
2165 14:34:56.064334 00100000 ################################################################
2166 14:34:56.681993 00180000 ################################################################
2167 14:34:57.317972 00200000 ################################################################
2168 14:34:57.938094 00280000 ################################################################
2169 14:34:58.555407 00300000 ################################################################
2170 14:34:59.164893 00380000 ################################################################
2171 14:34:59.737477 00400000 ################################################################
2172 14:35:00.270574 00480000 ################################################################
2173 14:35:00.826777 00500000 ################################################################
2174 14:35:01.393127 00580000 ################################################################
2175 14:35:01.912233 00600000 ################################################################ done.
2176 14:35:01.915134 The bootfile was 6815632 bytes long.
2177 14:35:01.918583 Sending tftp read request... done.
2178 14:35:01.921929 Waiting for the transfer...
2179 14:35:02.531390 00000000 ################################################################
2180 14:35:03.137944 00080000 ################################################################
2181 14:35:03.741155 00100000 ################################################################
2182 14:35:04.328644 00180000 ################################################################
2183 14:35:04.905976 00200000 ################################################################
2184 14:35:05.500379 00280000 ################################################################
2185 14:35:06.089834 00300000 ################################################################
2186 14:35:06.681753 00380000 ################################################################
2187 14:35:07.272171 00400000 ################################################################
2188 14:35:07.861814 00480000 ################################################################
2189 14:35:08.125709 00500000 ############################# done.
2190 14:35:08.129124 Sending tftp read request... done.
2191 14:35:08.132318 Waiting for the transfer...
2192 14:35:08.132404 00000000 # done.
2193 14:35:08.142152 Command line loaded dynamically from TFTP file: 6895605/tftp-deploy-ywbjgbt1/kernel/cmdline
2194 14:35:08.162020 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6895605/extract-nfsrootfs-kf6m4yvs,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2195 14:35:08.165689 Shutting down all USB controllers.
2196 14:35:08.168966 Removing current net device
2197 14:35:08.172236 Finalizing coreboot
2198 14:35:08.178599 Exiting depthcharge with code 4 at timestamp: 23978803
2199 14:35:08.178686
2200 14:35:08.178754 Starting kernel ...
2201 14:35:08.178819
2202 14:35:08.178879
2203 14:35:08.179169 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2204 14:35:08.179265 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2205 14:35:08.179342 Setting prompt string to ['Linux version [0-9]']
2206 14:35:08.179413 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2207 14:35:08.179483 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2209 14:39:36.180332 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2211 14:39:36.181512 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2213 14:39:36.182411 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2216 14:39:36.183991 end: 2 depthcharge-action (duration 00:05:00) [common]
2218 14:39:36.185085 Cleaning after the job
2219 14:39:36.185169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/ramdisk
2220 14:39:36.185703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/kernel
2221 14:39:36.186218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/nfsrootfs
2222 14:39:36.218428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895605/tftp-deploy-ywbjgbt1/modules
2223 14:39:36.218734 start: 5.1 power-off (timeout 00:00:30) [common]
2224 14:39:36.218896 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2225 14:39:36.237923 >> Command sent successfully.
2226 14:39:36.239639 Returned 0 in 0 seconds
2227 14:39:36.341111 end: 5.1 power-off (duration 00:00:00) [common]
2229 14:39:36.342684 start: 5.2 read-feedback (timeout 00:10:00) [common]
2230 14:39:36.343853 Listened to connection for namespace 'common' for up to 1s
2231 14:39:37.348743 Finalising connection for namespace 'common'
2232 14:39:37.349453 Disconnecting from shell: Finalise
2233 14:39:37.451153 end: 5.2 read-feedback (duration 00:00:01) [common]
2234 14:39:37.451784 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6895605
2235 14:39:37.548034 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6895605
2236 14:39:37.548237 JobError: Your job cannot terminate cleanly.