Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:45:16.780167 lava-dispatcher, installed at version: 2022.06
2 14:45:16.780346 start: 0 validate
3 14:45:16.780479 Start time: 2022-07-26 14:45:16.780474+00:00 (UTC)
4 14:45:16.780598 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:45:16.780723 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220718.0%2Fx86%2Frootfs.cpio.gz exists
6 14:45:17.073659 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:45:17.074346 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:45:17.367341 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:45:17.367508 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:45:17.666210 validate duration: 0.89
12 14:45:17.666481 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:45:17.666583 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:45:17.666675 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:45:17.666776 Not decompressing ramdisk as can be used compressed.
16 14:45:17.666865 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220718.0/x86/rootfs.cpio.gz
17 14:45:17.666929 saving as /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/ramdisk/rootfs.cpio.gz
18 14:45:17.666990 total size: 8416091 (8MB)
19 14:45:17.668037 progress 0% (0MB)
20 14:45:17.670173 progress 5% (0MB)
21 14:45:17.672300 progress 10% (0MB)
22 14:45:17.674424 progress 15% (1MB)
23 14:45:17.676484 progress 20% (1MB)
24 14:45:17.678560 progress 25% (2MB)
25 14:45:17.680639 progress 30% (2MB)
26 14:45:17.682596 progress 35% (2MB)
27 14:45:17.684660 progress 40% (3MB)
28 14:45:17.686725 progress 45% (3MB)
29 14:45:17.688761 progress 50% (4MB)
30 14:45:17.690798 progress 55% (4MB)
31 14:45:17.692869 progress 60% (4MB)
32 14:45:17.694770 progress 65% (5MB)
33 14:45:17.696778 progress 70% (5MB)
34 14:45:17.698810 progress 75% (6MB)
35 14:45:17.700837 progress 80% (6MB)
36 14:45:17.702867 progress 85% (6MB)
37 14:45:17.704898 progress 90% (7MB)
38 14:45:17.706746 progress 95% (7MB)
39 14:45:17.708749 progress 100% (8MB)
40 14:45:17.709012 8MB downloaded in 0.04s (191.02MB/s)
41 14:45:17.709160 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:45:17.709435 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:45:17.709524 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:45:17.709609 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:45:17.709711 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:45:17.709782 saving as /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/kernel/bzImage
48 14:45:17.709843 total size: 6815632 (6MB)
49 14:45:17.709903 No compression specified
50 14:45:17.710977 progress 0% (0MB)
51 14:45:17.712668 progress 5% (0MB)
52 14:45:17.714303 progress 10% (0MB)
53 14:45:17.716097 progress 15% (1MB)
54 14:45:17.717690 progress 20% (1MB)
55 14:45:17.719275 progress 25% (1MB)
56 14:45:17.721001 progress 30% (1MB)
57 14:45:17.722584 progress 35% (2MB)
58 14:45:17.724284 progress 40% (2MB)
59 14:45:17.725878 progress 45% (2MB)
60 14:45:17.727554 progress 50% (3MB)
61 14:45:17.729342 progress 55% (3MB)
62 14:45:17.731006 progress 60% (3MB)
63 14:45:17.732777 progress 65% (4MB)
64 14:45:17.734416 progress 70% (4MB)
65 14:45:17.735983 progress 75% (4MB)
66 14:45:17.737736 progress 80% (5MB)
67 14:45:17.739285 progress 85% (5MB)
68 14:45:17.740977 progress 90% (5MB)
69 14:45:17.742592 progress 95% (6MB)
70 14:45:17.744160 progress 100% (6MB)
71 14:45:17.744435 6MB downloaded in 0.03s (187.93MB/s)
72 14:45:17.744578 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:45:17.744809 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:45:17.744942 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:45:17.745041 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:45:17.745145 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:45:17.745215 saving as /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/modules/modules.tar
79 14:45:17.745303 total size: 51868 (0MB)
80 14:45:17.745389 Using unxz to decompress xz
81 14:45:17.748644 progress 63% (0MB)
82 14:45:17.749003 progress 100% (0MB)
83 14:45:17.752215 0MB downloaded in 0.01s (7.16MB/s)
84 14:45:17.752429 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:45:17.752683 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:45:17.752780 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 14:45:17.752877 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 14:45:17.752964 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:45:17.753053 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 14:45:17.753214 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc
92 14:45:17.753380 makedir: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin
93 14:45:17.753466 makedir: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/tests
94 14:45:17.753547 makedir: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/results
95 14:45:17.753646 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-add-keys
96 14:45:17.753775 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-add-sources
97 14:45:17.753890 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-background-process-start
98 14:45:17.754002 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-background-process-stop
99 14:45:17.754111 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-common-functions
100 14:45:17.754220 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-echo-ipv4
101 14:45:17.754330 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-install-packages
102 14:45:17.754438 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-installed-packages
103 14:45:17.754544 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-os-build
104 14:45:17.754651 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-probe-channel
105 14:45:17.754760 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-probe-ip
106 14:45:17.754868 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-target-ip
107 14:45:17.755005 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-target-mac
108 14:45:17.755112 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-target-storage
109 14:45:17.755221 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-case
110 14:45:17.755329 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-event
111 14:45:17.755436 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-feedback
112 14:45:17.755546 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-raise
113 14:45:17.755657 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-reference
114 14:45:17.755764 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-runner
115 14:45:17.755871 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-set
116 14:45:17.755978 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-test-shell
117 14:45:17.756087 Updating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-install-packages (oe)
118 14:45:17.756198 Updating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/bin/lava-installed-packages (oe)
119 14:45:17.756296 Creating /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/environment
120 14:45:17.756385 LAVA metadata
121 14:45:17.756455 - LAVA_JOB_ID=6895617
122 14:45:17.756520 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:45:17.756620 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 14:45:17.756685 skipped lava-vland-overlay
125 14:45:17.756760 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:45:17.756841 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 14:45:17.756904 skipped lava-multinode-overlay
128 14:45:17.756977 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:45:17.757060 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 14:45:17.757135 Loading test definitions
131 14:45:17.757234 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 14:45:17.757365 Using /lava-6895617 at stage 0
133 14:45:17.757636 uuid=6895617_1.4.2.3.1 testdef=None
134 14:45:17.757726 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:45:17.757816 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 14:45:17.758309 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:45:17.758539 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 14:45:17.759102 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:45:17.759340 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 14:45:17.759878 runner path: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/0/tests/0_dmesg test_uuid 6895617_1.4.2.3.1
143 14:45:17.760027 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:45:17.760262 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 14:45:17.760336 Using /lava-6895617 at stage 1
147 14:45:17.760576 uuid=6895617_1.4.2.3.5 testdef=None
148 14:45:17.760666 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:45:17.760754 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 14:45:17.761223 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:45:17.761555 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 14:45:17.762170 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:45:17.762408 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 14:45:17.762951 runner path: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/1/tests/1_bootrr test_uuid 6895617_1.4.2.3.5
157 14:45:17.763093 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:45:17.763302 Creating lava-test-runner.conf files
160 14:45:17.763367 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/0 for stage 0
161 14:45:17.763449 - 0_dmesg
162 14:45:17.763525 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895617/lava-overlay-m_d970oc/lava-6895617/1 for stage 1
163 14:45:17.763607 - 1_bootrr
164 14:45:17.763697 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:45:17.763784 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 14:45:17.769828 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:45:17.769933 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 14:45:17.770022 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:45:17.770109 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:45:17.770199 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 14:45:17.950010 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:45:17.950356 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 14:45:17.950464 extracting modules file /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895617/extract-overlay-ramdisk-a6opgz5n/ramdisk
174 14:45:17.954608 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:45:17.954735 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 14:45:17.954851 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895617/compress-overlay-31i6t3ot/overlay-1.4.2.4.tar.gz to ramdisk
177 14:45:17.954929 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895617/compress-overlay-31i6t3ot/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6895617/extract-overlay-ramdisk-a6opgz5n/ramdisk
178 14:45:17.958725 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:45:17.958829 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 14:45:17.958921 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:45:17.959012 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 14:45:17.959088 Building ramdisk /var/lib/lava/dispatcher/tmp/6895617/extract-overlay-ramdisk-a6opgz5n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6895617/extract-overlay-ramdisk-a6opgz5n/ramdisk
183 14:45:18.021460 >> 48006 blocks
184 14:45:18.747638 rename /var/lib/lava/dispatcher/tmp/6895617/extract-overlay-ramdisk-a6opgz5n/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
185 14:45:18.748050 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:45:18.748167 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 14:45:18.748268 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 14:45:18.748359 No mkimage arch provided, not using FIT.
189 14:45:18.748449 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:45:18.748534 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:45:18.748627 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:45:18.748721 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 14:45:18.748797 No LXC device requested
194 14:45:18.748876 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:45:18.748963 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 14:45:18.749045 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:45:18.749116 Checking files for TFTP limit of 4294967296 bytes.
198 14:45:18.749568 end: 1 tftp-deploy (duration 00:00:01) [common]
199 14:45:18.749677 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:45:18.749772 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:45:18.749904 substitutions:
202 14:45:18.749973 - {DTB}: None
203 14:45:18.750040 - {INITRD}: 6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
204 14:45:18.750102 - {KERNEL}: 6895617/tftp-deploy-vfkn_5gi/kernel/bzImage
205 14:45:18.750163 - {LAVA_MAC}: None
206 14:45:18.750222 - {PRESEED_CONFIG}: None
207 14:45:18.750279 - {PRESEED_LOCAL}: None
208 14:45:18.750337 - {RAMDISK}: 6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
209 14:45:18.750393 - {ROOT_PART}: None
210 14:45:18.750450 - {ROOT}: None
211 14:45:18.750505 - {SERVER_IP}: 192.168.201.1
212 14:45:18.750561 - {TEE}: None
213 14:45:18.750616 Parsed boot commands:
214 14:45:18.750671 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:45:18.750817 Parsed boot commands: tftpboot 192.168.201.1 6895617/tftp-deploy-vfkn_5gi/kernel/bzImage 6895617/tftp-deploy-vfkn_5gi/kernel/cmdline 6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
216 14:45:18.750908 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:45:18.750999 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:45:18.751095 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:45:18.751180 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:45:18.751249 Not connected, no need to disconnect.
221 14:45:18.751327 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:45:18.751408 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:45:18.751476 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
224 14:45:18.754117 Setting prompt string to ['lava-test: # ']
225 14:45:18.754399 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:45:18.754520 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:45:18.754632 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:45:18.754721 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:45:18.754897 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
230 14:45:18.773377 >> Command sent successfully.
231 14:45:18.775218 Returned 0 in 0 seconds
232 14:45:18.876518 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:45:18.878048 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:45:18.878569 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:45:18.878987 Setting prompt string to 'Starting depthcharge on Helios...'
237 14:45:18.879326 Changing prompt to 'Starting depthcharge on Helios...'
238 14:45:18.879687 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 14:45:18.880943 [Enter `^Ec?' for help]
240 14:45:25.777205
241 14:45:25.777846
242 14:45:25.786765 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 14:45:25.790214 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 14:45:25.796836 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 14:45:25.800067 CPU: AES supported, TXT NOT supported, VT supported
246 14:45:25.806303 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 14:45:25.813225 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 14:45:25.816287 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 14:45:25.819630 VBOOT: Loading verstage.
250 14:45:25.825998 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 14:45:25.829524 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 14:45:25.836315 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 14:45:25.839306 CBFS @ c08000 size 3f8000
254 14:45:25.842501 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 14:45:25.845940 CBFS: Locating 'fallback/verstage'
256 14:45:25.852558 CBFS: Found @ offset 10fb80 size 1072c
257 14:45:25.853108
258 14:45:25.853512
259 14:45:25.861743 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 14:45:25.878489 Probing TPM: . done!
261 14:45:25.881709 TPM ready after 0 ms
262 14:45:25.884932 Connected to device vid:did:rid of 1ae0:0028:00
263 14:45:25.895019 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 14:45:25.898198 Initialized TPM device CR50 revision 0
265 14:45:25.932579 tlcl_send_startup: Startup return code is 0
266 14:45:25.933119 TPM: setup succeeded
267 14:45:25.945382 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 14:45:25.948988 Chrome EC: UHEPI supported
269 14:45:25.952519 Phase 1
270 14:45:25.955448 FMAP: area GBB found @ c05000 (12288 bytes)
271 14:45:25.962225 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 14:45:25.965541 Phase 2
273 14:45:25.965997 Phase 3
274 14:45:25.969062 FMAP: area GBB found @ c05000 (12288 bytes)
275 14:45:25.975574 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 14:45:25.982153 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 14:45:25.985447 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 14:45:25.991896 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 14:45:26.008013 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 14:45:26.010889 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 14:45:26.017884 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 14:45:26.021919 Phase 4
283 14:45:26.025457 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 14:45:26.034675 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 14:45:26.211380 VB2:vb2_rsa_verify_digest() Digest check failed!
286 14:45:26.217840 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 14:45:26.218379 Saving nvdata
288 14:45:26.221445 Reboot requested (10020007)
289 14:45:26.224379 board_reset() called!
290 14:45:26.224907 full_reset() called!
291 14:45:30.743746
292 14:45:30.744245
293 14:45:30.753727 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 14:45:30.757617 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 14:45:30.763922 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 14:45:30.767226 CPU: AES supported, TXT NOT supported, VT supported
297 14:45:30.773629 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 14:45:30.780272 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 14:45:30.783681 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 14:45:30.787219 VBOOT: Loading verstage.
301 14:45:30.793081 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
302 14:45:30.797023 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 14:45:30.803721 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 14:45:30.804267 CBFS @ c08000 size 3f8000
305 14:45:30.809815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 14:45:30.812918 CBFS: Locating 'fallback/verstage'
307 14:45:30.819350 CBFS: Found @ offset 10fb80 size 1072c
308 14:45:30.819857
309 14:45:30.820207
310 14:45:30.829441 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 14:45:30.845332 Probing TPM: . done!
312 14:45:30.848699 TPM ready after 0 ms
313 14:45:30.851712 Connected to device vid:did:rid of 1ae0:0028:00
314 14:45:30.861796 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 14:45:30.865380 Initialized TPM device CR50 revision 0
316 14:45:30.899835 tlcl_send_startup: Startup return code is 0
317 14:45:30.900385 TPM: setup succeeded
318 14:45:30.912707 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 14:45:30.916628 Chrome EC: UHEPI supported
320 14:45:30.919801 Phase 1
321 14:45:30.922879 FMAP: area GBB found @ c05000 (12288 bytes)
322 14:45:30.929245 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 14:45:30.935815 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 14:45:30.939551 Recovery requested (1009000e)
325 14:45:30.945039 Saving nvdata
326 14:45:30.951301 tlcl_extend: response is 0
327 14:45:30.959916 tlcl_extend: response is 0
328 14:45:30.966999 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 14:45:30.970318 CBFS @ c08000 size 3f8000
330 14:45:30.977148 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 14:45:30.979877 CBFS: Locating 'fallback/romstage'
332 14:45:30.983503 CBFS: Found @ offset 80 size 145fc
333 14:45:30.986582 Accumulated console time in verstage 98 ms
334 14:45:30.987049
335 14:45:30.987451
336 14:45:30.999976 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 14:45:31.006435 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 14:45:31.009830 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 14:45:31.013089 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 14:45:31.019924 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 14:45:31.022771 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 14:45:31.026075 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
343 14:45:31.029609 TCO_STS: 0000 0000
344 14:45:31.033158 GEN_PMCON: e0015238 00000200
345 14:45:31.036545 GBLRST_CAUSE: 00000000 00000000
346 14:45:31.037092 prev_sleep_state 5
347 14:45:31.039843 Boot Count incremented to 26885
348 14:45:31.046766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 14:45:31.049589 CBFS @ c08000 size 3f8000
350 14:45:31.056702 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 14:45:31.057247 CBFS: Locating 'fspm.bin'
352 14:45:31.063692 CBFS: Found @ offset 5ffc0 size 71000
353 14:45:31.066384 Chrome EC: UHEPI supported
354 14:45:31.072925 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 14:45:31.076829 Probing TPM: done!
356 14:45:31.083418 Connected to device vid:did:rid of 1ae0:0028:00
357 14:45:31.092975 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 14:45:31.099128 Initialized TPM device CR50 revision 0
359 14:45:31.108459 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 14:45:31.114650 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 14:45:31.117742 MRC cache found, size 1948
362 14:45:31.121434 bootmode is set to: 2
363 14:45:31.124768 PRMRR disabled by config.
364 14:45:31.128082 SPD INDEX = 1
365 14:45:31.131329 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 14:45:31.134169 CBFS @ c08000 size 3f8000
367 14:45:31.141379 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 14:45:31.141939 CBFS: Locating 'spd.bin'
369 14:45:31.144200 CBFS: Found @ offset 5fb80 size 400
370 14:45:31.147715 SPD: module type is LPDDR3
371 14:45:31.150871 SPD: module part is
372 14:45:31.157511 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 14:45:31.160429 SPD: device width 4 bits, bus width 8 bits
374 14:45:31.164300 SPD: module size is 4096 MB (per channel)
375 14:45:31.167457 memory slot: 0 configuration done.
376 14:45:31.170611 memory slot: 2 configuration done.
377 14:45:31.222124 CBMEM:
378 14:45:31.225191 IMD: root @ 99fff000 254 entries.
379 14:45:31.228533 IMD: root @ 99ffec00 62 entries.
380 14:45:31.232011 External stage cache:
381 14:45:31.235143 IMD: root @ 9abff000 254 entries.
382 14:45:31.238623 IMD: root @ 9abfec00 62 entries.
383 14:45:31.245331 Chrome EC: clear events_b mask to 0x0000000020004000
384 14:45:31.257789 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 14:45:31.271257 tlcl_write: response is 0
386 14:45:31.280333 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 14:45:31.286730 MRC: TPM MRC hash updated successfully.
388 14:45:31.287231 2 DIMMs found
389 14:45:31.289973 SMM Memory Map
390 14:45:31.293335 SMRAM : 0x9a000000 0x1000000
391 14:45:31.296343 Subregion 0: 0x9a000000 0xa00000
392 14:45:31.299807 Subregion 1: 0x9aa00000 0x200000
393 14:45:31.303077 Subregion 2: 0x9ac00000 0x400000
394 14:45:31.306158 top_of_ram = 0x9a000000
395 14:45:31.309697 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 14:45:31.316422 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 14:45:31.319981 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 14:45:31.325890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 14:45:31.329383 CBFS @ c08000 size 3f8000
400 14:45:31.335836 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 14:45:31.339082 CBFS: Locating 'fallback/postcar'
402 14:45:31.342722 CBFS: Found @ offset 107000 size 4b44
403 14:45:31.348765 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 14:45:31.359122 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 14:45:31.362432 Processing 180 relocs. Offset value of 0x97c0c000
406 14:45:31.370720 Accumulated console time in romstage 286 ms
407 14:45:31.371297
408 14:45:31.371653
409 14:45:31.381175 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 14:45:31.387199 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 14:45:31.390658 CBFS @ c08000 size 3f8000
412 14:45:31.397259 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 14:45:31.400282 CBFS: Locating 'fallback/ramstage'
414 14:45:31.403894 CBFS: Found @ offset 43380 size 1b9e8
415 14:45:31.410323 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 14:45:31.442271 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 14:45:31.445555 Processing 3976 relocs. Offset value of 0x98db0000
418 14:45:31.452480 Accumulated console time in postcar 52 ms
419 14:45:31.452916
420 14:45:31.453293
421 14:45:31.462261 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 14:45:31.468926 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 14:45:31.472114 WARNING: RO_VPD is uninitialized or empty.
424 14:45:31.475287 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 14:45:31.481998 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 14:45:31.482535 Normal boot.
427 14:45:31.488177 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 14:45:31.491718 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 14:45:31.494956 CBFS @ c08000 size 3f8000
430 14:45:31.501352 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 14:45:31.504835 CBFS: Locating 'cpu_microcode_blob.bin'
432 14:45:31.508064 CBFS: Found @ offset 14700 size 2ec00
433 14:45:31.514478 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 14:45:31.515024 Skip microcode update
435 14:45:31.521395 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 14:45:31.524242 CBFS @ c08000 size 3f8000
437 14:45:31.528122 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 14:45:31.531226 CBFS: Locating 'fsps.bin'
439 14:45:31.534514 CBFS: Found @ offset d1fc0 size 35000
440 14:45:31.560899 Detected 4 core, 8 thread CPU.
441 14:45:31.563985 Setting up SMI for CPU
442 14:45:31.567712 IED base = 0x9ac00000
443 14:45:31.570846 IED size = 0x00400000
444 14:45:31.571381 Will perform SMM setup.
445 14:45:31.576960 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 14:45:31.583855 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 14:45:31.590298 Processing 16 relocs. Offset value of 0x00030000
448 14:45:31.590830 Attempting to start 7 APs
449 14:45:31.596589 Waiting for 10ms after sending INIT.
450 14:45:31.610032 Waiting for 1st SIPI to complete...done.
451 14:45:31.610529 AP: slot 1 apic_id 1.
452 14:45:31.617320 Waiting for 2nd SIPI to complete...done.
453 14:45:31.617859 AP: slot 5 apic_id 3.
454 14:45:31.620302 AP: slot 4 apic_id 2.
455 14:45:31.623935 AP: slot 6 apic_id 5.
456 14:45:31.624373 AP: slot 7 apic_id 4.
457 14:45:31.627085 AP: slot 2 apic_id 7.
458 14:45:31.630094 AP: slot 3 apic_id 6.
459 14:45:31.636877 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 14:45:31.643452 Processing 13 relocs. Offset value of 0x00038000
461 14:45:31.649878 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 14:45:31.652840 Installing SMM handler to 0x9a000000
463 14:45:31.659620 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 14:45:31.666337 Processing 658 relocs. Offset value of 0x9a010000
465 14:45:31.672806 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 14:45:31.676260 Processing 13 relocs. Offset value of 0x9a008000
467 14:45:31.682667 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 14:45:31.689586 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 14:45:31.695653 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 14:45:31.699040 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 14:45:31.705638 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 14:45:31.712145 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 14:45:31.719025 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 14:45:31.725522 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 14:45:31.728963 Clearing SMI status registers
476 14:45:31.729517 SMI_STS: PM1
477 14:45:31.732288 PM1_STS: PWRBTN
478 14:45:31.732806 TCO_STS: SECOND_TO
479 14:45:31.735593 New SMBASE 0x9a000000
480 14:45:31.738842 In relocation handler: CPU 0
481 14:45:31.742244 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 14:45:31.748380 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 14:45:31.748817 Relocation complete.
484 14:45:31.751578 New SMBASE 0x99fffc00
485 14:45:31.754935 In relocation handler: CPU 1
486 14:45:31.758497 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
487 14:45:31.765131 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 14:45:31.765688 Relocation complete.
489 14:45:31.768450 New SMBASE 0x99fff400
490 14:45:31.771606 In relocation handler: CPU 3
491 14:45:31.774869 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
492 14:45:31.781599 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 14:45:31.782158 Relocation complete.
494 14:45:31.784910 New SMBASE 0x99fff800
495 14:45:31.788152 In relocation handler: CPU 2
496 14:45:31.791663 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
497 14:45:31.797790 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 14:45:31.798312 Relocation complete.
499 14:45:31.801012 New SMBASE 0x99ffec00
500 14:45:31.804608 In relocation handler: CPU 5
501 14:45:31.807864 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
502 14:45:31.814494 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 14:45:31.814930 Relocation complete.
504 14:45:31.817825 New SMBASE 0x99fff000
505 14:45:31.821098 In relocation handler: CPU 4
506 14:45:31.824136 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
507 14:45:31.827870 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 14:45:31.831093 Relocation complete.
509 14:45:31.834159 New SMBASE 0x99ffe400
510 14:45:31.837487 In relocation handler: CPU 7
511 14:45:31.840920 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
512 14:45:31.843886 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 14:45:31.847313 Relocation complete.
514 14:45:31.850542 New SMBASE 0x99ffe800
515 14:45:31.853928 In relocation handler: CPU 6
516 14:45:31.857115 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
517 14:45:31.860443 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 14:45:31.863756 Relocation complete.
519 14:45:31.867122 Initializing CPU #0
520 14:45:31.870115 CPU: vendor Intel device 806ec
521 14:45:31.873818 CPU: family 06, model 8e, stepping 0c
522 14:45:31.876826 Clearing out pending MCEs
523 14:45:31.877255 Setting up local APIC...
524 14:45:31.880046 apic_id: 0x00 done.
525 14:45:31.883881 Turbo is available but hidden
526 14:45:31.886893 Turbo is available and visible
527 14:45:31.890336 VMX status: enabled
528 14:45:31.893712 IA32_FEATURE_CONTROL status: locked
529 14:45:31.894248 Skip microcode update
530 14:45:31.896499 CPU #0 initialized
531 14:45:31.899946 Initializing CPU #1
532 14:45:31.900482 Initializing CPU #6
533 14:45:31.903281 Initializing CPU #7
534 14:45:31.907030 CPU: vendor Intel device 806ec
535 14:45:31.909922 CPU: family 06, model 8e, stepping 0c
536 14:45:31.912926 CPU: vendor Intel device 806ec
537 14:45:31.916142 CPU: family 06, model 8e, stepping 0c
538 14:45:31.919530 Clearing out pending MCEs
539 14:45:31.922586 Initializing CPU #4
540 14:45:31.923015 Initializing CPU #5
541 14:45:31.926097 CPU: vendor Intel device 806ec
542 14:45:31.929156 CPU: family 06, model 8e, stepping 0c
543 14:45:31.932415 CPU: vendor Intel device 806ec
544 14:45:31.936051 CPU: family 06, model 8e, stepping 0c
545 14:45:31.939109 Clearing out pending MCEs
546 14:45:31.942592 Clearing out pending MCEs
547 14:45:31.945866 Setting up local APIC...
548 14:45:31.949162 Setting up local APIC...
549 14:45:31.949722 Initializing CPU #2
550 14:45:31.952704 Initializing CPU #3
551 14:45:31.955823 CPU: vendor Intel device 806ec
552 14:45:31.958770 CPU: family 06, model 8e, stepping 0c
553 14:45:31.962515 CPU: vendor Intel device 806ec
554 14:45:31.966139 CPU: family 06, model 8e, stepping 0c
555 14:45:31.969364 Clearing out pending MCEs
556 14:45:31.972135 Clearing out pending MCEs
557 14:45:31.972588 Setting up local APIC...
558 14:45:31.975883 CPU: vendor Intel device 806ec
559 14:45:31.978996 CPU: family 06, model 8e, stepping 0c
560 14:45:31.982176 Clearing out pending MCEs
561 14:45:31.985574 Clearing out pending MCEs
562 14:45:31.989258 Setting up local APIC...
563 14:45:31.989838 apic_id: 0x07 done.
564 14:45:31.992469 apic_id: 0x01 done.
565 14:45:31.995425 VMX status: enabled
566 14:45:31.995947 Setting up local APIC...
567 14:45:31.998940 Setting up local APIC...
568 14:45:32.002122 IA32_FEATURE_CONTROL status: locked
569 14:45:32.005571 apic_id: 0x06 done.
570 14:45:32.008910 Skip microcode update
571 14:45:32.009381 apic_id: 0x02 done.
572 14:45:32.011700 Setting up local APIC...
573 14:45:32.015097 VMX status: enabled
574 14:45:32.015533 CPU #2 initialized
575 14:45:32.018875 VMX status: enabled
576 14:45:32.021782 apic_id: 0x05 done.
577 14:45:32.022222 apic_id: 0x04 done.
578 14:45:32.024883 VMX status: enabled
579 14:45:32.025343 VMX status: enabled
580 14:45:32.031927 IA32_FEATURE_CONTROL status: locked
581 14:45:32.035000 IA32_FEATURE_CONTROL status: locked
582 14:45:32.035539 Skip microcode update
583 14:45:32.037988 Skip microcode update
584 14:45:32.041664 CPU #6 initialized
585 14:45:32.042211 CPU #7 initialized
586 14:45:32.044612 IA32_FEATURE_CONTROL status: locked
587 14:45:32.047770 apic_id: 0x03 done.
588 14:45:32.051199 VMX status: enabled
589 14:45:32.051637 VMX status: enabled
590 14:45:32.054473 IA32_FEATURE_CONTROL status: locked
591 14:45:32.057837 IA32_FEATURE_CONTROL status: locked
592 14:45:32.060849 Skip microcode update
593 14:45:32.064164 Skip microcode update
594 14:45:32.064596 CPU #4 initialized
595 14:45:32.067695 CPU #5 initialized
596 14:45:32.070781 IA32_FEATURE_CONTROL status: locked
597 14:45:32.074018 Skip microcode update
598 14:45:32.074454 Skip microcode update
599 14:45:32.077847 CPU #1 initialized
600 14:45:32.080706 CPU #3 initialized
601 14:45:32.084105 bsp_do_flight_plan done after 466 msecs.
602 14:45:32.087227 CPU: frequency set to 4200 MHz
603 14:45:32.087727 Enabling SMIs.
604 14:45:32.090267 Locking SMM.
605 14:45:32.104201 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 14:45:32.107553 CBFS @ c08000 size 3f8000
607 14:45:32.114182 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 14:45:32.114614 CBFS: Locating 'vbt.bin'
609 14:45:32.120590 CBFS: Found @ offset 5f5c0 size 499
610 14:45:32.124018 Found a VBT of 4608 bytes after decompression
611 14:45:32.304992 Display FSP Version Info HOB
612 14:45:32.308280 Reference Code - CPU = 9.0.1e.30
613 14:45:32.311622 uCode Version = 0.0.0.ca
614 14:45:32.314640 TXT ACM version = ff.ff.ff.ffff
615 14:45:32.317857 Display FSP Version Info HOB
616 14:45:32.321416 Reference Code - ME = 9.0.1e.30
617 14:45:32.324625 MEBx version = 0.0.0.0
618 14:45:32.327866 ME Firmware Version = Consumer SKU
619 14:45:32.331422 Display FSP Version Info HOB
620 14:45:32.334157 Reference Code - CML PCH = 9.0.1e.30
621 14:45:32.337806 PCH-CRID Status = Disabled
622 14:45:32.340981 PCH-CRID Original Value = ff.ff.ff.ffff
623 14:45:32.344138 PCH-CRID New Value = ff.ff.ff.ffff
624 14:45:32.347630 OPROM - RST - RAID = ff.ff.ff.ffff
625 14:45:32.351463 ChipsetInit Base Version = ff.ff.ff.ffff
626 14:45:32.357384 ChipsetInit Oem Version = ff.ff.ff.ffff
627 14:45:32.357883 Display FSP Version Info HOB
628 14:45:32.363673 Reference Code - SA - System Agent = 9.0.1e.30
629 14:45:32.366964 Reference Code - MRC = 0.7.1.6c
630 14:45:32.370231 SA - PCIe Version = 9.0.1e.30
631 14:45:32.373744 SA-CRID Status = Disabled
632 14:45:32.376930 SA-CRID Original Value = 0.0.0.c
633 14:45:32.377393 SA-CRID New Value = 0.0.0.c
634 14:45:32.380154 OPROM - VBIOS = ff.ff.ff.ffff
635 14:45:32.383855 RTC Init
636 14:45:32.386913 Set power on after power failure.
637 14:45:32.387311 Disabling Deep S3
638 14:45:32.390488 Disabling Deep S3
639 14:45:32.393548 Disabling Deep S4
640 14:45:32.393943 Disabling Deep S4
641 14:45:32.396982 Disabling Deep S5
642 14:45:32.397418 Disabling Deep S5
643 14:45:32.403313 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
644 14:45:32.406502 Enumerating buses...
645 14:45:32.409888 Show all devs... Before device enumeration.
646 14:45:32.412972 Root Device: enabled 1
647 14:45:32.416306 CPU_CLUSTER: 0: enabled 1
648 14:45:32.416699 DOMAIN: 0000: enabled 1
649 14:45:32.419708 APIC: 00: enabled 1
650 14:45:32.422969 PCI: 00:00.0: enabled 1
651 14:45:32.423367 PCI: 00:02.0: enabled 1
652 14:45:32.426255 PCI: 00:04.0: enabled 0
653 14:45:32.429418 PCI: 00:05.0: enabled 0
654 14:45:32.432547 PCI: 00:12.0: enabled 1
655 14:45:32.433015 PCI: 00:12.5: enabled 0
656 14:45:32.436324 PCI: 00:12.6: enabled 0
657 14:45:32.439206 PCI: 00:14.0: enabled 1
658 14:45:32.442402 PCI: 00:14.1: enabled 0
659 14:45:32.442832 PCI: 00:14.3: enabled 1
660 14:45:32.445712 PCI: 00:14.5: enabled 0
661 14:45:32.449002 PCI: 00:15.0: enabled 1
662 14:45:32.452289 PCI: 00:15.1: enabled 1
663 14:45:32.452810 PCI: 00:15.2: enabled 0
664 14:45:32.455979 PCI: 00:15.3: enabled 0
665 14:45:32.459015 PCI: 00:16.0: enabled 1
666 14:45:32.462180 PCI: 00:16.1: enabled 0
667 14:45:32.462609 PCI: 00:16.2: enabled 0
668 14:45:32.465300 PCI: 00:16.3: enabled 0
669 14:45:32.468507 PCI: 00:16.4: enabled 0
670 14:45:32.471885 PCI: 00:16.5: enabled 0
671 14:45:32.472372 PCI: 00:17.0: enabled 1
672 14:45:32.475254 PCI: 00:19.0: enabled 1
673 14:45:32.478709 PCI: 00:19.1: enabled 0
674 14:45:32.481732 PCI: 00:19.2: enabled 0
675 14:45:32.482240 PCI: 00:1a.0: enabled 0
676 14:45:32.484957 PCI: 00:1c.0: enabled 0
677 14:45:32.488522 PCI: 00:1c.1: enabled 0
678 14:45:32.491425 PCI: 00:1c.2: enabled 0
679 14:45:32.491853 PCI: 00:1c.3: enabled 0
680 14:45:32.494585 PCI: 00:1c.4: enabled 0
681 14:45:32.497768 PCI: 00:1c.5: enabled 0
682 14:45:32.501037 PCI: 00:1c.6: enabled 0
683 14:45:32.501534 PCI: 00:1c.7: enabled 0
684 14:45:32.504785 PCI: 00:1d.0: enabled 1
685 14:45:32.508088 PCI: 00:1d.1: enabled 0
686 14:45:32.511119 PCI: 00:1d.2: enabled 0
687 14:45:32.511660 PCI: 00:1d.3: enabled 0
688 14:45:32.514451 PCI: 00:1d.4: enabled 0
689 14:45:32.517539 PCI: 00:1d.5: enabled 1
690 14:45:32.521183 PCI: 00:1e.0: enabled 1
691 14:45:32.521738 PCI: 00:1e.1: enabled 0
692 14:45:32.524171 PCI: 00:1e.2: enabled 1
693 14:45:32.527683 PCI: 00:1e.3: enabled 1
694 14:45:32.528112 PCI: 00:1f.0: enabled 1
695 14:45:32.531185 PCI: 00:1f.1: enabled 1
696 14:45:32.533904 PCI: 00:1f.2: enabled 1
697 14:45:32.537706 PCI: 00:1f.3: enabled 1
698 14:45:32.538240 PCI: 00:1f.4: enabled 1
699 14:45:32.540974 PCI: 00:1f.5: enabled 1
700 14:45:32.544055 PCI: 00:1f.6: enabled 0
701 14:45:32.547747 USB0 port 0: enabled 1
702 14:45:32.548283 I2C: 00:15: enabled 1
703 14:45:32.550907 I2C: 00:5d: enabled 1
704 14:45:32.554153 GENERIC: 0.0: enabled 1
705 14:45:32.554693 I2C: 00:1a: enabled 1
706 14:45:32.556949 I2C: 00:38: enabled 1
707 14:45:32.560370 I2C: 00:39: enabled 1
708 14:45:32.563580 I2C: 00:3a: enabled 1
709 14:45:32.564014 I2C: 00:3b: enabled 1
710 14:45:32.566768 PCI: 00:00.0: enabled 1
711 14:45:32.569941 SPI: 00: enabled 1
712 14:45:32.570369 SPI: 01: enabled 1
713 14:45:32.573393 PNP: 0c09.0: enabled 1
714 14:45:32.576666 USB2 port 0: enabled 1
715 14:45:32.577198 USB2 port 1: enabled 1
716 14:45:32.580308 USB2 port 2: enabled 0
717 14:45:32.583492 USB2 port 3: enabled 0
718 14:45:32.584044 USB2 port 5: enabled 0
719 14:45:32.586400 USB2 port 6: enabled 1
720 14:45:32.589933 USB2 port 9: enabled 1
721 14:45:32.593160 USB3 port 0: enabled 1
722 14:45:32.593722 USB3 port 1: enabled 1
723 14:45:32.596280 USB3 port 2: enabled 1
724 14:45:32.599088 USB3 port 3: enabled 1
725 14:45:32.599698 USB3 port 4: enabled 0
726 14:45:32.602661 APIC: 01: enabled 1
727 14:45:32.605750 APIC: 07: enabled 1
728 14:45:32.606190 APIC: 06: enabled 1
729 14:45:32.608985 APIC: 02: enabled 1
730 14:45:32.612261 APIC: 03: enabled 1
731 14:45:32.612683 APIC: 05: enabled 1
732 14:45:32.615764 APIC: 04: enabled 1
733 14:45:32.616197 Compare with tree...
734 14:45:32.619128 Root Device: enabled 1
735 14:45:32.622197 CPU_CLUSTER: 0: enabled 1
736 14:45:32.625230 APIC: 00: enabled 1
737 14:45:32.625684 APIC: 01: enabled 1
738 14:45:32.628902 APIC: 07: enabled 1
739 14:45:32.632558 APIC: 06: enabled 1
740 14:45:32.633097 APIC: 02: enabled 1
741 14:45:32.635469 APIC: 03: enabled 1
742 14:45:32.638693 APIC: 05: enabled 1
743 14:45:32.641850 APIC: 04: enabled 1
744 14:45:32.642276 DOMAIN: 0000: enabled 1
745 14:45:32.645008 PCI: 00:00.0: enabled 1
746 14:45:32.648579 PCI: 00:02.0: enabled 1
747 14:45:32.652175 PCI: 00:04.0: enabled 0
748 14:45:32.652711 PCI: 00:05.0: enabled 0
749 14:45:32.654757 PCI: 00:12.0: enabled 1
750 14:45:32.658395 PCI: 00:12.5: enabled 0
751 14:45:32.661337 PCI: 00:12.6: enabled 0
752 14:45:32.665160 PCI: 00:14.0: enabled 1
753 14:45:32.668036 USB0 port 0: enabled 1
754 14:45:32.668463 USB2 port 0: enabled 1
755 14:45:32.671029 USB2 port 1: enabled 1
756 14:45:32.674464 USB2 port 2: enabled 0
757 14:45:32.677730 USB2 port 3: enabled 0
758 14:45:32.681213 USB2 port 5: enabled 0
759 14:45:32.681664 USB2 port 6: enabled 1
760 14:45:32.684184 USB2 port 9: enabled 1
761 14:45:32.687848 USB3 port 0: enabled 1
762 14:45:32.690838 USB3 port 1: enabled 1
763 14:45:32.694266 USB3 port 2: enabled 1
764 14:45:32.697477 USB3 port 3: enabled 1
765 14:45:32.697974 USB3 port 4: enabled 0
766 14:45:32.700449 PCI: 00:14.1: enabled 0
767 14:45:32.704031 PCI: 00:14.3: enabled 1
768 14:45:32.707141 PCI: 00:14.5: enabled 0
769 14:45:32.710512 PCI: 00:15.0: enabled 1
770 14:45:32.710902 I2C: 00:15: enabled 1
771 14:45:32.713857 PCI: 00:15.1: enabled 1
772 14:45:32.717234 I2C: 00:5d: enabled 1
773 14:45:32.720268 GENERIC: 0.0: enabled 1
774 14:45:32.723697 PCI: 00:15.2: enabled 0
775 14:45:32.724088 PCI: 00:15.3: enabled 0
776 14:45:32.726761 PCI: 00:16.0: enabled 1
777 14:45:32.730382 PCI: 00:16.1: enabled 0
778 14:45:32.733691 PCI: 00:16.2: enabled 0
779 14:45:32.736729 PCI: 00:16.3: enabled 0
780 14:45:32.740204 PCI: 00:16.4: enabled 0
781 14:45:32.740699 PCI: 00:16.5: enabled 0
782 14:45:32.743474 PCI: 00:17.0: enabled 1
783 14:45:32.746606 PCI: 00:19.0: enabled 1
784 14:45:32.749954 I2C: 00:1a: enabled 1
785 14:45:32.750455 I2C: 00:38: enabled 1
786 14:45:32.753027 I2C: 00:39: enabled 1
787 14:45:32.756391 I2C: 00:3a: enabled 1
788 14:45:32.759587 I2C: 00:3b: enabled 1
789 14:45:32.762762 PCI: 00:19.1: enabled 0
790 14:45:32.763206 PCI: 00:19.2: enabled 0
791 14:45:32.765932 PCI: 00:1a.0: enabled 0
792 14:45:32.769319 PCI: 00:1c.0: enabled 0
793 14:45:32.772684 PCI: 00:1c.1: enabled 0
794 14:45:32.775925 PCI: 00:1c.2: enabled 0
795 14:45:32.776371 PCI: 00:1c.3: enabled 0
796 14:45:32.779013 PCI: 00:1c.4: enabled 0
797 14:45:32.782571 PCI: 00:1c.5: enabled 0
798 14:45:32.785833 PCI: 00:1c.6: enabled 0
799 14:45:32.789362 PCI: 00:1c.7: enabled 0
800 14:45:32.789892 PCI: 00:1d.0: enabled 1
801 14:45:32.792276 PCI: 00:1d.1: enabled 0
802 14:45:32.795834 PCI: 00:1d.2: enabled 0
803 14:45:32.798688 PCI: 00:1d.3: enabled 0
804 14:45:32.801979 PCI: 00:1d.4: enabled 0
805 14:45:32.802411 PCI: 00:1d.5: enabled 1
806 14:45:32.805481 PCI: 00:00.0: enabled 1
807 14:45:32.809049 PCI: 00:1e.0: enabled 1
808 14:45:32.812279 PCI: 00:1e.1: enabled 0
809 14:45:32.815220 PCI: 00:1e.2: enabled 1
810 14:45:32.815772 SPI: 00: enabled 1
811 14:45:32.818278 PCI: 00:1e.3: enabled 1
812 14:45:32.821614 SPI: 01: enabled 1
813 14:45:32.825318 PCI: 00:1f.0: enabled 1
814 14:45:32.828221 PNP: 0c09.0: enabled 1
815 14:45:32.828651 PCI: 00:1f.1: enabled 1
816 14:45:32.831324 PCI: 00:1f.2: enabled 1
817 14:45:32.834888 PCI: 00:1f.3: enabled 1
818 14:45:32.838244 PCI: 00:1f.4: enabled 1
819 14:45:32.841293 PCI: 00:1f.5: enabled 1
820 14:45:32.841727 PCI: 00:1f.6: enabled 0
821 14:45:32.844572 Root Device scanning...
822 14:45:32.848004 scan_static_bus for Root Device
823 14:45:32.851454 CPU_CLUSTER: 0 enabled
824 14:45:32.854224 DOMAIN: 0000 enabled
825 14:45:32.854755 DOMAIN: 0000 scanning...
826 14:45:32.857954 PCI: pci_scan_bus for bus 00
827 14:45:32.861075 PCI: 00:00.0 [8086/0000] ops
828 14:45:32.863795 PCI: 00:00.0 [8086/9b61] enabled
829 14:45:32.867360 PCI: 00:02.0 [8086/0000] bus ops
830 14:45:32.870458 PCI: 00:02.0 [8086/9b41] enabled
831 14:45:32.873763 PCI: 00:04.0 [8086/1903] disabled
832 14:45:32.877132 PCI: 00:08.0 [8086/1911] enabled
833 14:45:32.880184 PCI: 00:12.0 [8086/02f9] enabled
834 14:45:32.883620 PCI: 00:14.0 [8086/0000] bus ops
835 14:45:32.887015 PCI: 00:14.0 [8086/02ed] enabled
836 14:45:32.890018 PCI: 00:14.2 [8086/02ef] enabled
837 14:45:32.893759 PCI: 00:14.3 [8086/02f0] enabled
838 14:45:32.896751 PCI: 00:15.0 [8086/0000] bus ops
839 14:45:32.899752 PCI: 00:15.0 [8086/02e8] enabled
840 14:45:32.906578 PCI: 00:15.1 [8086/0000] bus ops
841 14:45:32.909891 PCI: 00:15.1 [8086/02e9] enabled
842 14:45:32.910426 PCI: 00:16.0 [8086/0000] ops
843 14:45:32.913062 PCI: 00:16.0 [8086/02e0] enabled
844 14:45:32.916149 PCI: 00:17.0 [8086/0000] ops
845 14:45:32.919524 PCI: 00:17.0 [8086/02d3] enabled
846 14:45:32.923170 PCI: 00:19.0 [8086/0000] bus ops
847 14:45:32.925971 PCI: 00:19.0 [8086/02c5] enabled
848 14:45:32.929054 PCI: 00:1d.0 [8086/0000] bus ops
849 14:45:32.932192 PCI: 00:1d.0 [8086/02b0] enabled
850 14:45:32.938931 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 14:45:32.942365 PCI: 00:1e.0 [8086/0000] ops
852 14:45:32.945831 PCI: 00:1e.0 [8086/02a8] enabled
853 14:45:32.948947 PCI: 00:1e.2 [8086/0000] bus ops
854 14:45:32.952435 PCI: 00:1e.2 [8086/02aa] enabled
855 14:45:32.955341 PCI: 00:1e.3 [8086/0000] bus ops
856 14:45:32.958902 PCI: 00:1e.3 [8086/02ab] enabled
857 14:45:32.961839 PCI: 00:1f.0 [8086/0000] bus ops
858 14:45:32.964949 PCI: 00:1f.0 [8086/0284] enabled
859 14:45:32.971819 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 14:45:32.978201 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 14:45:32.981373 PCI: 00:1f.3 [8086/0000] bus ops
862 14:45:32.984765 PCI: 00:1f.3 [8086/02c8] enabled
863 14:45:32.988265 PCI: 00:1f.4 [8086/0000] bus ops
864 14:45:32.991495 PCI: 00:1f.4 [8086/02a3] enabled
865 14:45:32.994441 PCI: 00:1f.5 [8086/0000] bus ops
866 14:45:32.997962 PCI: 00:1f.5 [8086/02a4] enabled
867 14:45:33.000874 PCI: Leftover static devices:
868 14:45:33.001337 PCI: 00:05.0
869 14:45:33.004349 PCI: 00:12.5
870 14:45:33.004778 PCI: 00:12.6
871 14:45:33.005120 PCI: 00:14.1
872 14:45:33.007474 PCI: 00:14.5
873 14:45:33.007975 PCI: 00:15.2
874 14:45:33.010922 PCI: 00:15.3
875 14:45:33.011352 PCI: 00:16.1
876 14:45:33.011694 PCI: 00:16.2
877 14:45:33.014111 PCI: 00:16.3
878 14:45:33.014539 PCI: 00:16.4
879 14:45:33.017337 PCI: 00:16.5
880 14:45:33.017733 PCI: 00:19.1
881 14:45:33.020460 PCI: 00:19.2
882 14:45:33.020980 PCI: 00:1a.0
883 14:45:33.021325 PCI: 00:1c.0
884 14:45:33.023864 PCI: 00:1c.1
885 14:45:33.024345 PCI: 00:1c.2
886 14:45:33.026923 PCI: 00:1c.3
887 14:45:33.027322 PCI: 00:1c.4
888 14:45:33.027656 PCI: 00:1c.5
889 14:45:33.030266 PCI: 00:1c.6
890 14:45:33.030645 PCI: 00:1c.7
891 14:45:33.033531 PCI: 00:1d.1
892 14:45:33.033940 PCI: 00:1d.2
893 14:45:33.036649 PCI: 00:1d.3
894 14:45:33.037078 PCI: 00:1d.4
895 14:45:33.037426 PCI: 00:1d.5
896 14:45:33.040126 PCI: 00:1e.1
897 14:45:33.040521 PCI: 00:1f.1
898 14:45:33.043490 PCI: 00:1f.2
899 14:45:33.043884 PCI: 00:1f.6
900 14:45:33.046831 PCI: Check your devicetree.cb.
901 14:45:33.049830 PCI: 00:02.0 scanning...
902 14:45:33.053081 scan_generic_bus for PCI: 00:02.0
903 14:45:33.056648 scan_generic_bus for PCI: 00:02.0 done
904 14:45:33.062864 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
905 14:45:33.066464 PCI: 00:14.0 scanning...
906 14:45:33.069652 scan_static_bus for PCI: 00:14.0
907 14:45:33.070220 USB0 port 0 enabled
908 14:45:33.072936 USB0 port 0 scanning...
909 14:45:33.076114 scan_static_bus for USB0 port 0
910 14:45:33.079297 USB2 port 0 enabled
911 14:45:33.079681 USB2 port 1 enabled
912 14:45:33.082648 USB2 port 2 disabled
913 14:45:33.085928 USB2 port 3 disabled
914 14:45:33.086501 USB2 port 5 disabled
915 14:45:33.089093 USB2 port 6 enabled
916 14:45:33.092570 USB2 port 9 enabled
917 14:45:33.093005 USB3 port 0 enabled
918 14:45:33.095850 USB3 port 1 enabled
919 14:45:33.096253 USB3 port 2 enabled
920 14:45:33.098878 USB3 port 3 enabled
921 14:45:33.102049 USB3 port 4 disabled
922 14:45:33.102543 USB2 port 0 scanning...
923 14:45:33.105686 scan_static_bus for USB2 port 0
924 14:45:33.112448 scan_static_bus for USB2 port 0 done
925 14:45:33.115739 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
926 14:45:33.118973 USB2 port 1 scanning...
927 14:45:33.121930 scan_static_bus for USB2 port 1
928 14:45:33.125469 scan_static_bus for USB2 port 1 done
929 14:45:33.132136 scan_bus: scanning of bus USB2 port 1 took 9696 usecs
930 14:45:33.135492 USB2 port 6 scanning...
931 14:45:33.138256 scan_static_bus for USB2 port 6
932 14:45:33.141843 scan_static_bus for USB2 port 6 done
933 14:45:33.145046 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
934 14:45:33.148579 USB2 port 9 scanning...
935 14:45:33.151839 scan_static_bus for USB2 port 9
936 14:45:33.154920 scan_static_bus for USB2 port 9 done
937 14:45:33.161684 scan_bus: scanning of bus USB2 port 9 took 9706 usecs
938 14:45:33.164858 USB3 port 0 scanning...
939 14:45:33.167645 scan_static_bus for USB3 port 0
940 14:45:33.171228 scan_static_bus for USB3 port 0 done
941 14:45:33.177644 scan_bus: scanning of bus USB3 port 0 took 9709 usecs
942 14:45:33.178081 USB3 port 1 scanning...
943 14:45:33.180794 scan_static_bus for USB3 port 1
944 14:45:33.187609 scan_static_bus for USB3 port 1 done
945 14:45:33.191405 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
946 14:45:33.193796 USB3 port 2 scanning...
947 14:45:33.197259 scan_static_bus for USB3 port 2
948 14:45:33.200444 scan_static_bus for USB3 port 2 done
949 14:45:33.207406 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
950 14:45:33.210270 USB3 port 3 scanning...
951 14:45:33.213706 scan_static_bus for USB3 port 3
952 14:45:33.216708 scan_static_bus for USB3 port 3 done
953 14:45:33.220464 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
954 14:45:33.226509 scan_static_bus for USB0 port 0 done
955 14:45:33.229744 scan_bus: scanning of bus USB0 port 0 took 155407 usecs
956 14:45:33.233192 scan_static_bus for PCI: 00:14.0 done
957 14:45:33.240019 scan_bus: scanning of bus PCI: 00:14.0 took 173014 usecs
958 14:45:33.243230 PCI: 00:15.0 scanning...
959 14:45:33.246073 scan_generic_bus for PCI: 00:15.0
960 14:45:33.249327 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 14:45:33.255977 scan_generic_bus for PCI: 00:15.0 done
962 14:45:33.259349 scan_bus: scanning of bus PCI: 00:15.0 took 14297 usecs
963 14:45:33.262786 PCI: 00:15.1 scanning...
964 14:45:33.265820 scan_generic_bus for PCI: 00:15.1
965 14:45:33.268917 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 14:45:33.276047 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 14:45:33.278911 scan_generic_bus for PCI: 00:15.1 done
968 14:45:33.285814 scan_bus: scanning of bus PCI: 00:15.1 took 18613 usecs
969 14:45:33.286321 PCI: 00:19.0 scanning...
970 14:45:33.289165 scan_generic_bus for PCI: 00:19.0
971 14:45:33.295222 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 14:45:33.298729 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 14:45:33.301558 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 14:45:33.305009 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 14:45:33.311748 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 14:45:33.314675 scan_generic_bus for PCI: 00:19.0 done
977 14:45:33.321312 scan_bus: scanning of bus PCI: 00:19.0 took 30728 usecs
978 14:45:33.321759 PCI: 00:1d.0 scanning...
979 14:45:33.327766 do_pci_scan_bridge for PCI: 00:1d.0
980 14:45:33.328265 PCI: pci_scan_bus for bus 01
981 14:45:33.334310 PCI: 01:00.0 [1c5c/1327] enabled
982 14:45:33.337716 Enabling Common Clock Configuration
983 14:45:33.340964 L1 Sub-State supported from root port 29
984 14:45:33.344479 L1 Sub-State Support = 0xf
985 14:45:33.347764 CommonModeRestoreTime = 0x28
986 14:45:33.350674 Power On Value = 0x16, Power On Scale = 0x0
987 14:45:33.354108 ASPM: Enabled L1
988 14:45:33.357251 scan_bus: scanning of bus PCI: 00:1d.0 took 32806 usecs
989 14:45:33.360749 PCI: 00:1e.2 scanning...
990 14:45:33.364166 scan_generic_bus for PCI: 00:1e.2
991 14:45:33.367097 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 14:45:33.373939 scan_generic_bus for PCI: 00:1e.2 done
993 14:45:33.377143 scan_bus: scanning of bus PCI: 00:1e.2 took 13997 usecs
994 14:45:33.380376 PCI: 00:1e.3 scanning...
995 14:45:33.383524 scan_generic_bus for PCI: 00:1e.3
996 14:45:33.386946 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 14:45:33.390179 scan_generic_bus for PCI: 00:1e.3 done
998 14:45:33.396571 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
999 14:45:33.400255 PCI: 00:1f.0 scanning...
1000 14:45:33.403507 scan_static_bus for PCI: 00:1f.0
1001 14:45:33.406675 PNP: 0c09.0 enabled
1002 14:45:33.409606 scan_static_bus for PCI: 00:1f.0 done
1003 14:45:33.416390 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1004 14:45:33.416946 PCI: 00:1f.3 scanning...
1005 14:45:33.422968 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1006 14:45:33.426252 PCI: 00:1f.4 scanning...
1007 14:45:33.429335 scan_generic_bus for PCI: 00:1f.4
1008 14:45:33.432883 scan_generic_bus for PCI: 00:1f.4 done
1009 14:45:33.439366 scan_bus: scanning of bus PCI: 00:1f.4 took 10193 usecs
1010 14:45:33.442575 PCI: 00:1f.5 scanning...
1011 14:45:33.445769 scan_generic_bus for PCI: 00:1f.5
1012 14:45:33.449475 scan_generic_bus for PCI: 00:1f.5 done
1013 14:45:33.455824 scan_bus: scanning of bus PCI: 00:1f.5 took 10186 usecs
1014 14:45:33.458875 scan_bus: scanning of bus DOMAIN: 0000 took 605027 usecs
1015 14:45:33.465738 scan_static_bus for Root Device done
1016 14:45:33.468945 scan_bus: scanning of bus Root Device took 624889 usecs
1017 14:45:33.471759 done
1018 14:45:33.472285 Chrome EC: UHEPI supported
1019 14:45:33.478490 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 14:45:33.485239 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 14:45:33.491735 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 14:45:33.498285 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 14:45:33.501256 SPI flash protection: WPSW=0 SRP0=1
1024 14:45:33.507901 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 14:45:33.511338 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 14:45:33.514518 found VGA at PCI: 00:02.0
1027 14:45:33.517739 Setting up VGA for PCI: 00:02.0
1028 14:45:33.524575 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 14:45:33.527537 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 14:45:33.530778 Allocating resources...
1031 14:45:33.534606 Reading resources...
1032 14:45:33.537874 Root Device read_resources bus 0 link: 0
1033 14:45:33.540892 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 14:45:33.547628 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 14:45:33.550453 DOMAIN: 0000 read_resources bus 0 link: 0
1036 14:45:33.557801 PCI: 00:14.0 read_resources bus 0 link: 0
1037 14:45:33.561189 USB0 port 0 read_resources bus 0 link: 0
1038 14:45:33.569051 USB0 port 0 read_resources bus 0 link: 0 done
1039 14:45:33.572242 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 14:45:33.580039 PCI: 00:15.0 read_resources bus 1 link: 0
1041 14:45:33.583657 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 14:45:33.590201 PCI: 00:15.1 read_resources bus 2 link: 0
1043 14:45:33.593323 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 14:45:33.600687 PCI: 00:19.0 read_resources bus 3 link: 0
1045 14:45:33.607293 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 14:45:33.610476 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 14:45:33.617293 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 14:45:33.620298 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 14:45:33.626895 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 14:45:33.630374 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 14:45:33.636975 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 14:45:33.640054 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 14:45:33.646657 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 14:45:33.652915 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 14:45:33.656624 Root Device read_resources bus 0 link: 0 done
1056 14:45:33.659283 Done reading resources.
1057 14:45:33.665956 Show resources in subtree (Root Device)...After reading.
1058 14:45:33.669177 Root Device child on link 0 CPU_CLUSTER: 0
1059 14:45:33.673083 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 14:45:33.676165 APIC: 00
1061 14:45:33.676715 APIC: 01
1062 14:45:33.679641 APIC: 07
1063 14:45:33.680188 APIC: 06
1064 14:45:33.680595 APIC: 02
1065 14:45:33.682750 APIC: 03
1066 14:45:33.683302 APIC: 05
1067 14:45:33.685746 APIC: 04
1068 14:45:33.689142 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 14:45:33.698802 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 14:45:33.754896 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 14:45:33.755505 PCI: 00:00.0
1072 14:45:33.755869 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 14:45:33.756589 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 14:45:33.756943 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 14:45:33.757292 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 14:45:33.757613 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 14:45:33.804713 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 14:45:33.805639 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 14:45:33.806029 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 14:45:33.806371 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 14:45:33.807038 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 14:45:33.827590 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 14:45:33.828505 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 14:45:33.830918 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 14:45:33.841031 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 14:45:33.850841 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 14:45:33.860377 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 14:45:33.860913 PCI: 00:02.0
1089 14:45:33.870253 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 14:45:33.879672 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 14:45:33.889768 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 14:45:33.892745 PCI: 00:04.0
1093 14:45:33.893181 PCI: 00:08.0
1094 14:45:33.902748 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 14:45:33.905561 PCI: 00:12.0
1096 14:45:33.915683 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 14:45:33.918926 PCI: 00:14.0 child on link 0 USB0 port 0
1098 14:45:33.929104 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 14:45:33.931793 USB0 port 0 child on link 0 USB2 port 0
1100 14:45:33.935650 USB2 port 0
1101 14:45:33.936179 USB2 port 1
1102 14:45:33.938894 USB2 port 2
1103 14:45:33.942186 USB2 port 3
1104 14:45:33.942714 USB2 port 5
1105 14:45:33.945352 USB2 port 6
1106 14:45:33.945889 USB2 port 9
1107 14:45:33.948298 USB3 port 0
1108 14:45:33.948831 USB3 port 1
1109 14:45:33.951476 USB3 port 2
1110 14:45:33.951909 USB3 port 3
1111 14:45:33.955038 USB3 port 4
1112 14:45:33.955570 PCI: 00:14.2
1113 14:45:33.964762 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 14:45:33.974641 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 14:45:33.978016 PCI: 00:14.3
1116 14:45:33.987946 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 14:45:33.991179 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 14:45:34.001018 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 14:45:34.003864 I2C: 01:15
1120 14:45:34.007109 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 14:45:34.017069 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 14:45:34.020591 I2C: 02:5d
1123 14:45:34.021139 GENERIC: 0.0
1124 14:45:34.023621 PCI: 00:16.0
1125 14:45:34.033103 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 14:45:34.033670 PCI: 00:17.0
1127 14:45:34.043430 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 14:45:34.053022 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 14:45:34.059854 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 14:45:34.069286 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 14:45:34.076183 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 14:45:34.085994 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 14:45:34.089114 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 14:45:34.098984 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 14:45:34.101932 I2C: 03:1a
1136 14:45:34.102468 I2C: 03:38
1137 14:45:34.104926 I2C: 03:39
1138 14:45:34.105396 I2C: 03:3a
1139 14:45:34.108320 I2C: 03:3b
1140 14:45:34.111649 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 14:45:34.121547 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 14:45:34.131552 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 14:45:34.141345 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 14:45:34.141880 PCI: 01:00.0
1145 14:45:34.151114 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 14:45:34.154628 PCI: 00:1e.0
1147 14:45:34.164309 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 14:45:34.173986 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 14:45:34.177546 PCI: 00:1e.2 child on link 0 SPI: 00
1150 14:45:34.187019 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 14:45:34.190237 SPI: 00
1152 14:45:34.193650 PCI: 00:1e.3 child on link 0 SPI: 01
1153 14:45:34.203339 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:45:34.206266 SPI: 01
1155 14:45:34.209595 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 14:45:34.216447 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 14:45:34.226269 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 14:45:34.229075 PNP: 0c09.0
1159 14:45:34.235974 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 14:45:34.239481 PCI: 00:1f.3
1161 14:45:34.249246 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 14:45:34.258604 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 14:45:34.261791 PCI: 00:1f.4
1164 14:45:34.268559 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 14:45:34.278290 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 14:45:34.281904 PCI: 00:1f.5
1167 14:45:34.291789 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 14:45:34.298226 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 14:45:34.304591 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 14:45:34.311286 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 14:45:34.314418 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 14:45:34.317616 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 14:45:34.320835 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 14:45:34.323872 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 14:45:34.330588 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 14:45:34.337136 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 14:45:34.346730 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 14:45:34.353234 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 14:45:34.359938 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 14:45:34.363479 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 14:45:34.373388 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 14:45:34.376774 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 14:45:34.383293 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 14:45:34.386357 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 14:45:34.393180 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 14:45:34.396440 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 14:45:34.402773 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 14:45:34.406084 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 14:45:34.412050 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 14:45:34.415202 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 14:45:34.421847 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 14:45:34.425455 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 14:45:34.431874 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 14:45:34.435154 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 14:45:34.441617 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 14:45:34.445161 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 14:45:34.451641 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 14:45:34.454845 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 14:45:34.461382 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 14:45:34.464689 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 14:45:34.470924 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 14:45:34.474544 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 14:45:34.481032 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 14:45:34.483951 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 14:45:34.493941 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 14:45:34.497423 avoid_fixed_resources: DOMAIN: 0000
1207 14:45:34.503719 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 14:45:34.506718 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 14:45:34.517041 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 14:45:34.523253 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 14:45:34.529813 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 14:45:34.539735 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 14:45:34.546026 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 14:45:34.552802 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 14:45:34.562625 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 14:45:34.569084 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 14:45:34.575756 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 14:45:34.585566 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 14:45:34.586096 Setting resources...
1220 14:45:34.592199 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 14:45:34.595354 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 14:45:34.601826 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 14:45:34.605241 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 14:45:34.608345 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 14:45:34.614973 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 14:45:34.621670 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 14:45:34.627870 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 14:45:34.634181 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 14:45:34.641058 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 14:45:34.644417 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 14:45:34.650870 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 14:45:34.654187 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 14:45:34.660814 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 14:45:34.664093 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 14:45:34.670465 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 14:45:34.673585 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 14:45:34.680225 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 14:45:34.683342 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 14:45:34.690182 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 14:45:34.692935 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 14:45:34.699324 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 14:45:34.703205 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 14:45:34.709350 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 14:45:34.712840 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 14:45:34.719353 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 14:45:34.722512 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 14:45:34.728673 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 14:45:34.732019 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 14:45:34.738599 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 14:45:34.741774 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 14:45:34.745399 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 14:45:34.754803 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 14:45:34.761355 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 14:45:34.767904 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 14:45:34.777699 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 14:45:34.780641 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 14:45:34.787323 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 14:45:34.794002 Root Device assign_resources, bus 0 link: 0
1259 14:45:34.797115 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 14:45:34.806621 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 14:45:34.813394 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 14:45:34.823255 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 14:45:34.829839 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 14:45:34.839586 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 14:45:34.846043 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 14:45:34.852456 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 14:45:34.856062 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 14:45:34.865595 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 14:45:34.872221 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 14:45:34.881915 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 14:45:34.888441 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 14:45:34.895154 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 14:45:34.898284 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 14:45:34.908213 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 14:45:34.911456 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 14:45:34.914794 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 14:45:34.924464 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 14:45:34.930980 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 14:45:34.940848 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 14:45:34.947364 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 14:45:34.953905 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 14:45:34.963608 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 14:45:34.970028 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 14:45:34.980006 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 14:45:34.983123 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 14:45:34.989655 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 14:45:34.996377 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 14:45:35.006161 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 14:45:35.016031 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 14:45:35.019075 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 14:45:35.025672 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 14:45:35.032243 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 14:45:35.038907 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 14:45:35.048423 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 14:45:35.051921 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 14:45:35.058536 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 14:45:35.065298 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 14:45:35.071568 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 14:45:35.074823 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 14:45:35.081346 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 14:45:35.084653 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 14:45:35.090894 LPC: Trying to open IO window from 800 size 1ff
1303 14:45:35.097582 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 14:45:35.107329 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 14:45:35.113948 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 14:45:35.123486 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 14:45:35.126872 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 14:45:35.133478 Root Device assign_resources, bus 0 link: 0
1309 14:45:35.133560 Done setting resources.
1310 14:45:35.140019 Show resources in subtree (Root Device)...After assigning values.
1311 14:45:35.146671 Root Device child on link 0 CPU_CLUSTER: 0
1312 14:45:35.149629 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 14:45:35.149711 APIC: 00
1314 14:45:35.153094 APIC: 01
1315 14:45:35.153176 APIC: 07
1316 14:45:35.156063 APIC: 06
1317 14:45:35.156145 APIC: 02
1318 14:45:35.156209 APIC: 03
1319 14:45:35.159517 APIC: 05
1320 14:45:35.159599 APIC: 04
1321 14:45:35.162888 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 14:45:35.172526 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 14:45:35.185803 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 14:45:35.185890 PCI: 00:00.0
1325 14:45:35.195502 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 14:45:35.205218 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 14:45:35.215271 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 14:45:35.224720 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 14:45:35.234558 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 14:45:35.241134 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 14:45:35.251114 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 14:45:35.261055 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 14:45:35.270686 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 14:45:35.280461 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 14:45:35.290358 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 14:45:35.300191 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 14:45:35.309672 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 14:45:35.319577 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 14:45:35.325925 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 14:45:35.335546 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 14:45:35.338886 PCI: 00:02.0
1342 14:45:35.348676 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 14:45:35.358450 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 14:45:35.368217 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 14:45:35.371672 PCI: 00:04.0
1346 14:45:35.371749 PCI: 00:08.0
1347 14:45:35.381604 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 14:45:35.384570 PCI: 00:12.0
1349 14:45:35.394305 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 14:45:35.397814 PCI: 00:14.0 child on link 0 USB0 port 0
1351 14:45:35.407388 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 14:45:35.414300 USB0 port 0 child on link 0 USB2 port 0
1353 14:45:35.414387 USB2 port 0
1354 14:45:35.417198 USB2 port 1
1355 14:45:35.417303 USB2 port 2
1356 14:45:35.420699 USB2 port 3
1357 14:45:35.420769 USB2 port 5
1358 14:45:35.423800 USB2 port 6
1359 14:45:35.427015 USB2 port 9
1360 14:45:35.427093 USB3 port 0
1361 14:45:35.430267 USB3 port 1
1362 14:45:35.430339 USB3 port 2
1363 14:45:35.433606 USB3 port 3
1364 14:45:35.433678 USB3 port 4
1365 14:45:35.437141 PCI: 00:14.2
1366 14:45:35.446684 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 14:45:35.456526 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 14:45:35.459641 PCI: 00:14.3
1369 14:45:35.469529 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 14:45:35.472728 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 14:45:35.482455 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 14:45:35.485906 I2C: 01:15
1373 14:45:35.489383 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 14:45:35.498911 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 14:45:35.502451 I2C: 02:5d
1376 14:45:35.502523 GENERIC: 0.0
1377 14:45:35.505625 PCI: 00:16.0
1378 14:45:35.515384 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 14:45:35.515465 PCI: 00:17.0
1380 14:45:35.525001 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 14:45:35.538284 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 14:45:35.544782 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 14:45:35.554511 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 14:45:35.564342 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 14:45:35.574423 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 14:45:35.577608 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 14:45:35.587335 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 14:45:35.590459 I2C: 03:1a
1389 14:45:35.590531 I2C: 03:38
1390 14:45:35.593882 I2C: 03:39
1391 14:45:35.593952 I2C: 03:3a
1392 14:45:35.597015 I2C: 03:3b
1393 14:45:35.600275 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 14:45:35.610472 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 14:45:35.620096 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 14:45:35.629875 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 14:45:35.633037 PCI: 01:00.0
1398 14:45:35.642986 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 14:45:35.646243 PCI: 00:1e.0
1400 14:45:35.656141 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 14:45:35.665940 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 14:45:35.669383 PCI: 00:1e.2 child on link 0 SPI: 00
1403 14:45:35.679099 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 14:45:35.682306 SPI: 00
1405 14:45:35.685457 PCI: 00:1e.3 child on link 0 SPI: 01
1406 14:45:35.695446 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 14:45:35.698542 SPI: 01
1408 14:45:35.702014 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 14:45:35.711675 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 14:45:35.718407 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 14:45:35.721482 PNP: 0c09.0
1412 14:45:35.727849 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 14:45:35.731471 PCI: 00:1f.3
1414 14:45:35.741181 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 14:45:35.750920 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 14:45:35.754082 PCI: 00:1f.4
1417 14:45:35.764183 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 14:45:35.773737 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 14:45:35.773820 PCI: 00:1f.5
1420 14:45:35.783581 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 14:45:35.787138 Done allocating resources.
1422 14:45:35.793414 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 14:45:35.796777 Enabling resources...
1424 14:45:35.800087 PCI: 00:00.0 subsystem <- 8086/9b61
1425 14:45:35.803164 PCI: 00:00.0 cmd <- 06
1426 14:45:35.806330 PCI: 00:02.0 subsystem <- 8086/9b41
1427 14:45:35.809751 PCI: 00:02.0 cmd <- 03
1428 14:45:35.812946 PCI: 00:08.0 cmd <- 06
1429 14:45:35.816114 PCI: 00:12.0 subsystem <- 8086/02f9
1430 14:45:35.819670 PCI: 00:12.0 cmd <- 02
1431 14:45:35.822873 PCI: 00:14.0 subsystem <- 8086/02ed
1432 14:45:35.822957 PCI: 00:14.0 cmd <- 02
1433 14:45:35.826249 PCI: 00:14.2 cmd <- 02
1434 14:45:35.829301 PCI: 00:14.3 subsystem <- 8086/02f0
1435 14:45:35.832497 PCI: 00:14.3 cmd <- 02
1436 14:45:35.836083 PCI: 00:15.0 subsystem <- 8086/02e8
1437 14:45:35.839235 PCI: 00:15.0 cmd <- 02
1438 14:45:35.842261 PCI: 00:15.1 subsystem <- 8086/02e9
1439 14:45:35.845783 PCI: 00:15.1 cmd <- 02
1440 14:45:35.849114 PCI: 00:16.0 subsystem <- 8086/02e0
1441 14:45:35.852157 PCI: 00:16.0 cmd <- 02
1442 14:45:35.855699 PCI: 00:17.0 subsystem <- 8086/02d3
1443 14:45:35.858793 PCI: 00:17.0 cmd <- 03
1444 14:45:35.862140 PCI: 00:19.0 subsystem <- 8086/02c5
1445 14:45:35.865075 PCI: 00:19.0 cmd <- 02
1446 14:45:35.868634 PCI: 00:1d.0 bridge ctrl <- 0013
1447 14:45:35.871684 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 14:45:35.875179 PCI: 00:1d.0 cmd <- 06
1449 14:45:35.878273 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 14:45:35.881482 PCI: 00:1e.0 cmd <- 06
1451 14:45:35.884724 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 14:45:35.887850 PCI: 00:1e.2 cmd <- 06
1453 14:45:35.891334 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 14:45:35.891418 PCI: 00:1e.3 cmd <- 02
1455 14:45:35.898078 PCI: 00:1f.0 subsystem <- 8086/0284
1456 14:45:35.898162 PCI: 00:1f.0 cmd <- 407
1457 14:45:35.904335 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 14:45:35.904419 PCI: 00:1f.3 cmd <- 02
1459 14:45:35.907760 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 14:45:35.910945 PCI: 00:1f.4 cmd <- 03
1461 14:45:35.914360 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 14:45:35.917550 PCI: 00:1f.5 cmd <- 406
1463 14:45:35.926843 PCI: 01:00.0 cmd <- 02
1464 14:45:35.931991 done.
1465 14:45:35.944732 ME: Version: 14.0.39.1367
1466 14:45:35.951411 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1467 14:45:35.954516 Initializing devices...
1468 14:45:35.954599 Root Device init ...
1469 14:45:35.960847 Chrome EC: Set SMI mask to 0x0000000000000000
1470 14:45:35.967457 Chrome EC: clear events_b mask to 0x0000000000000000
1471 14:45:35.970524 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 14:45:35.977082 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 14:45:35.983855 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 14:45:35.987084 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 14:45:35.993421 Root Device init finished in 35164 usecs
1476 14:45:35.996696 CPU_CLUSTER: 0 init ...
1477 14:45:36.000307 CPU_CLUSTER: 0 init finished in 2448 usecs
1478 14:45:36.005390 PCI: 00:00.0 init ...
1479 14:45:36.008465 CPU TDP: 15 Watts
1480 14:45:36.012060 CPU PL2 = 64 Watts
1481 14:45:36.015105 PCI: 00:00.0 init finished in 7081 usecs
1482 14:45:36.018294 PCI: 00:02.0 init ...
1483 14:45:36.021747 PCI: 00:02.0 init finished in 2254 usecs
1484 14:45:36.024900 PCI: 00:08.0 init ...
1485 14:45:36.028333 PCI: 00:08.0 init finished in 2252 usecs
1486 14:45:36.031300 PCI: 00:12.0 init ...
1487 14:45:36.034652 PCI: 00:12.0 init finished in 2252 usecs
1488 14:45:36.037828 PCI: 00:14.0 init ...
1489 14:45:36.041418 PCI: 00:14.0 init finished in 2253 usecs
1490 14:45:36.044515 PCI: 00:14.2 init ...
1491 14:45:36.047725 PCI: 00:14.2 init finished in 2254 usecs
1492 14:45:36.051026 PCI: 00:14.3 init ...
1493 14:45:36.054205 PCI: 00:14.3 init finished in 2270 usecs
1494 14:45:36.057779 PCI: 00:15.0 init ...
1495 14:45:36.061199 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 14:45:36.067546 PCI: 00:15.0 init finished in 5978 usecs
1497 14:45:36.067629 PCI: 00:15.1 init ...
1498 14:45:36.073910 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 14:45:36.077260 PCI: 00:15.1 init finished in 5979 usecs
1500 14:45:36.080741 PCI: 00:16.0 init ...
1501 14:45:36.083938 PCI: 00:16.0 init finished in 2244 usecs
1502 14:45:36.087003 PCI: 00:19.0 init ...
1503 14:45:36.090190 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 14:45:36.093656 PCI: 00:19.0 init finished in 5977 usecs
1505 14:45:36.097079 PCI: 00:1d.0 init ...
1506 14:45:36.100360 Initializing PCH PCIe bridge.
1507 14:45:36.103523 PCI: 00:1d.0 init finished in 5276 usecs
1508 14:45:36.107174 PCI: 00:1f.0 init ...
1509 14:45:36.110651 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 14:45:36.116936 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 14:45:36.117020 IOAPIC: ID = 0x02
1512 14:45:36.120311 IOAPIC: Dumping registers
1513 14:45:36.123688 reg 0x0000: 0x02000000
1514 14:45:36.126827 reg 0x0001: 0x00770020
1515 14:45:36.129920 reg 0x0002: 0x00000000
1516 14:45:36.133372 PCI: 00:1f.0 init finished in 23538 usecs
1517 14:45:36.136529 PCI: 00:1f.4 init ...
1518 14:45:36.139622 PCI: 00:1f.4 init finished in 2262 usecs
1519 14:45:36.151898 PCI: 01:00.0 init ...
1520 14:45:36.154821 PCI: 01:00.0 init finished in 2254 usecs
1521 14:45:36.158964 PNP: 0c09.0 init ...
1522 14:45:36.165455 Google Chrome EC uptime: 11.103 seconds
1523 14:45:36.168865 Google Chrome AP resets since EC boot: 0
1524 14:45:36.172264 Google Chrome most recent AP reset causes:
1525 14:45:36.178778 Google Chrome EC reset flags at last EC boot: reset-pin
1526 14:45:36.182007 PNP: 0c09.0 init finished in 20574 usecs
1527 14:45:36.185004 Devices initialized
1528 14:45:36.188500 Show all devs... After init.
1529 14:45:36.188582 Root Device: enabled 1
1530 14:45:36.191637 CPU_CLUSTER: 0: enabled 1
1531 14:45:36.194740 DOMAIN: 0000: enabled 1
1532 14:45:36.198296 APIC: 00: enabled 1
1533 14:45:36.198399 PCI: 00:00.0: enabled 1
1534 14:45:36.201210 PCI: 00:02.0: enabled 1
1535 14:45:36.204679 PCI: 00:04.0: enabled 0
1536 14:45:36.208050 PCI: 00:05.0: enabled 0
1537 14:45:36.208132 PCI: 00:12.0: enabled 1
1538 14:45:36.211073 PCI: 00:12.5: enabled 0
1539 14:45:36.214614 PCI: 00:12.6: enabled 0
1540 14:45:36.217747 PCI: 00:14.0: enabled 1
1541 14:45:36.217828 PCI: 00:14.1: enabled 0
1542 14:45:36.220871 PCI: 00:14.3: enabled 1
1543 14:45:36.224470 PCI: 00:14.5: enabled 0
1544 14:45:36.224551 PCI: 00:15.0: enabled 1
1545 14:45:36.227568 PCI: 00:15.1: enabled 1
1546 14:45:36.230647 PCI: 00:15.2: enabled 0
1547 14:45:36.234065 PCI: 00:15.3: enabled 0
1548 14:45:36.234162 PCI: 00:16.0: enabled 1
1549 14:45:36.237202 PCI: 00:16.1: enabled 0
1550 14:45:36.240334 PCI: 00:16.2: enabled 0
1551 14:45:36.243916 PCI: 00:16.3: enabled 0
1552 14:45:36.243997 PCI: 00:16.4: enabled 0
1553 14:45:36.247054 PCI: 00:16.5: enabled 0
1554 14:45:36.250488 PCI: 00:17.0: enabled 1
1555 14:45:36.253723 PCI: 00:19.0: enabled 1
1556 14:45:36.253817 PCI: 00:19.1: enabled 0
1557 14:45:36.256856 PCI: 00:19.2: enabled 0
1558 14:45:36.260403 PCI: 00:1a.0: enabled 0
1559 14:45:36.263488 PCI: 00:1c.0: enabled 0
1560 14:45:36.263569 PCI: 00:1c.1: enabled 0
1561 14:45:36.266839 PCI: 00:1c.2: enabled 0
1562 14:45:36.269967 PCI: 00:1c.3: enabled 0
1563 14:45:36.273365 PCI: 00:1c.4: enabled 0
1564 14:45:36.273447 PCI: 00:1c.5: enabled 0
1565 14:45:36.276656 PCI: 00:1c.6: enabled 0
1566 14:45:36.279689 PCI: 00:1c.7: enabled 0
1567 14:45:36.283097 PCI: 00:1d.0: enabled 1
1568 14:45:36.283178 PCI: 00:1d.1: enabled 0
1569 14:45:36.286465 PCI: 00:1d.2: enabled 0
1570 14:45:36.289511 PCI: 00:1d.3: enabled 0
1571 14:45:36.293011 PCI: 00:1d.4: enabled 0
1572 14:45:36.293092 PCI: 00:1d.5: enabled 0
1573 14:45:36.296212 PCI: 00:1e.0: enabled 1
1574 14:45:36.299298 PCI: 00:1e.1: enabled 0
1575 14:45:36.302708 PCI: 00:1e.2: enabled 1
1576 14:45:36.302791 PCI: 00:1e.3: enabled 1
1577 14:45:36.306030 PCI: 00:1f.0: enabled 1
1578 14:45:36.309615 PCI: 00:1f.1: enabled 0
1579 14:45:36.312566 PCI: 00:1f.2: enabled 0
1580 14:45:36.312648 PCI: 00:1f.3: enabled 1
1581 14:45:36.315703 PCI: 00:1f.4: enabled 1
1582 14:45:36.318826 PCI: 00:1f.5: enabled 1
1583 14:45:36.322423 PCI: 00:1f.6: enabled 0
1584 14:45:36.322506 USB0 port 0: enabled 1
1585 14:45:36.325334 I2C: 01:15: enabled 1
1586 14:45:36.328922 I2C: 02:5d: enabled 1
1587 14:45:36.329005 GENERIC: 0.0: enabled 1
1588 14:45:36.332053 I2C: 03:1a: enabled 1
1589 14:45:36.335227 I2C: 03:38: enabled 1
1590 14:45:36.335309 I2C: 03:39: enabled 1
1591 14:45:36.338654 I2C: 03:3a: enabled 1
1592 14:45:36.341780 I2C: 03:3b: enabled 1
1593 14:45:36.341863 PCI: 00:00.0: enabled 1
1594 14:45:36.345318 SPI: 00: enabled 1
1595 14:45:36.348564 SPI: 01: enabled 1
1596 14:45:36.348647 PNP: 0c09.0: enabled 1
1597 14:45:36.351678 USB2 port 0: enabled 1
1598 14:45:36.354864 USB2 port 1: enabled 1
1599 14:45:36.358287 USB2 port 2: enabled 0
1600 14:45:36.358370 USB2 port 3: enabled 0
1601 14:45:36.361532 USB2 port 5: enabled 0
1602 14:45:36.364769 USB2 port 6: enabled 1
1603 14:45:36.364852 USB2 port 9: enabled 1
1604 14:45:36.368168 USB3 port 0: enabled 1
1605 14:45:36.371397 USB3 port 1: enabled 1
1606 14:45:36.374439 USB3 port 2: enabled 1
1607 14:45:36.374522 USB3 port 3: enabled 1
1608 14:45:36.377601 USB3 port 4: enabled 0
1609 14:45:36.380986 APIC: 01: enabled 1
1610 14:45:36.381069 APIC: 07: enabled 1
1611 14:45:36.384113 APIC: 06: enabled 1
1612 14:45:36.387504 APIC: 02: enabled 1
1613 14:45:36.387587 APIC: 03: enabled 1
1614 14:45:36.390909 APIC: 05: enabled 1
1615 14:45:36.390991 APIC: 04: enabled 1
1616 14:45:36.394055 PCI: 00:08.0: enabled 1
1617 14:45:36.397076 PCI: 00:14.2: enabled 1
1618 14:45:36.400612 PCI: 01:00.0: enabled 1
1619 14:45:36.404007 Disabling ACPI via APMC:
1620 14:45:36.407320 done.
1621 14:45:36.410673 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 14:45:36.413767 ELOG: NV offset 0xaf0000 size 0x4000
1623 14:45:36.420428 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 14:45:36.427432 ELOG: Event(17) added with size 13 at 2022-07-26 14:45:22 UTC
1625 14:45:36.433763 POST: Unexpected post code in previous boot: 0x73
1626 14:45:36.440402 ELOG: Event(A3) added with size 11 at 2022-07-26 14:45:22 UTC
1627 14:45:36.446622 ELOG: Event(A6) added with size 13 at 2022-07-26 14:45:22 UTC
1628 14:45:36.453343 ELOG: Event(92) added with size 9 at 2022-07-26 14:45:22 UTC
1629 14:45:36.459758 ELOG: Event(93) added with size 9 at 2022-07-26 14:45:22 UTC
1630 14:45:36.466292 ELOG: Event(9A) added with size 9 at 2022-07-26 14:45:22 UTC
1631 14:45:36.472761 ELOG: Event(9E) added with size 10 at 2022-07-26 14:45:22 UTC
1632 14:45:36.475824 ELOG: Event(9F) added with size 14 at 2022-07-26 14:45:22 UTC
1633 14:45:36.482517 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1634 14:45:36.489413 ELOG: Event(A1) added with size 10 at 2022-07-26 14:45:22 UTC
1635 14:45:36.498853 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1636 14:45:36.501980 ELOG: Event(A0) added with size 9 at 2022-07-26 14:45:22 UTC
1637 14:45:36.508585 elog_add_boot_reason: Logged dev mode boot
1638 14:45:36.508668 Finalize devices...
1639 14:45:36.511913 PCI: 00:17.0 final
1640 14:45:36.515163 Devices finalized
1641 14:45:36.518605 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1642 14:45:36.524922 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1643 14:45:36.528138 ME: HFSTS1 : 0x90000245
1644 14:45:36.531553 ME: HFSTS2 : 0x3B850126
1645 14:45:36.537874 ME: HFSTS3 : 0x00000020
1646 14:45:36.541403 ME: HFSTS4 : 0x00004800
1647 14:45:36.544559 ME: HFSTS5 : 0x00000000
1648 14:45:36.547815 ME: HFSTS6 : 0x40400006
1649 14:45:36.551044 ME: Manufacturing Mode : NO
1650 14:45:36.554563 ME: FW Partition Table : OK
1651 14:45:36.557667 ME: Bringup Loader Failure : NO
1652 14:45:36.561246 ME: Firmware Init Complete : YES
1653 14:45:36.564387 ME: Boot Options Present : NO
1654 14:45:36.567522 ME: Update In Progress : NO
1655 14:45:36.574014 ME: D0i3 Support : YES
1656 14:45:36.577499 ME: Low Power State Enabled : NO
1657 14:45:36.580602 ME: CPU Replaced : NO
1658 14:45:36.583732 ME: CPU Replacement Valid : YES
1659 14:45:36.587137 ME: Current Working State : 5
1660 14:45:36.590586 ME: Current Operation State : 1
1661 14:45:36.593735 ME: Current Operation Mode : 0
1662 14:45:36.596888 ME: Error Code : 0
1663 14:45:36.600103 ME: CPU Debug Disabled : YES
1664 14:45:36.603295 ME: TXT Support : NO
1665 14:45:36.606782 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1666 14:45:36.613112 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1667 14:45:36.616343 CBFS @ c08000 size 3f8000
1668 14:45:36.619862 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1669 14:45:36.623029 CBFS: Locating 'fallback/dsdt.aml'
1670 14:45:36.630084 CBFS: Found @ offset 10bb80 size 3fa5
1671 14:45:36.633341 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1672 14:45:36.636380 CBFS @ c08000 size 3f8000
1673 14:45:36.643150 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1674 14:45:36.646249 CBFS: Locating 'fallback/slic'
1675 14:45:36.649395 CBFS: 'fallback/slic' not found.
1676 14:45:36.655963 ACPI: Writing ACPI tables at 99b3e000.
1677 14:45:36.656046 ACPI: * FACS
1678 14:45:36.659080 ACPI: * DSDT
1679 14:45:36.662624 Ramoops buffer: 0x100000@0x99a3d000.
1680 14:45:36.665685 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1681 14:45:36.672523 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1682 14:45:36.675722 Google Chrome EC: version:
1683 14:45:36.678693 ro: helios_v2.0.2659-56403530b
1684 14:45:36.682083 rw: helios_v2.0.2849-c41de27e7d
1685 14:45:36.682166 running image: 1
1686 14:45:36.686326 ACPI: * FADT
1687 14:45:36.686408 SCI is IRQ9
1688 14:45:36.693338 ACPI: added table 1/32, length now 40
1689 14:45:36.693422 ACPI: * SSDT
1690 14:45:36.696267 Found 1 CPU(s) with 8 core(s) each.
1691 14:45:36.702851 Error: Could not locate 'wifi_sar' in VPD.
1692 14:45:36.705950 Checking CBFS for default SAR values
1693 14:45:36.709507 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 14:45:36.712376 CBFS @ c08000 size 3f8000
1695 14:45:36.719137 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 14:45:36.722331 CBFS: Locating 'wifi_sar_defaults.hex'
1697 14:45:36.725440 CBFS: Found @ offset 5fac0 size 77
1698 14:45:36.729069 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1699 14:45:36.735425 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1700 14:45:36.738620 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1701 14:45:36.745151 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1702 14:45:36.748461 failed to find key in VPD: dsm_calib_r0_0
1703 14:45:36.758222 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1704 14:45:36.764513 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1705 14:45:36.767976 failed to find key in VPD: dsm_calib_r0_1
1706 14:45:36.777624 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1707 14:45:36.781102 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1708 14:45:36.784067 failed to find key in VPD: dsm_calib_r0_2
1709 14:45:36.793892 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1710 14:45:36.800509 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1711 14:45:36.803681 failed to find key in VPD: dsm_calib_r0_3
1712 14:45:36.813682 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1713 14:45:36.817020 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1714 14:45:36.823520 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1715 14:45:36.827003 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1716 14:45:36.830300 EC returned error result code 1
1717 14:45:36.833393 EC returned error result code 1
1718 14:45:36.836854 EC returned error result code 1
1719 14:45:36.843530 PS2K: Bad resp from EC. Vivaldi disabled!
1720 14:45:36.849970 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1721 14:45:36.853200 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1722 14:45:36.859907 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1723 14:45:36.863026 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1724 14:45:36.869716 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1725 14:45:36.876216 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1726 14:45:36.882507 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1727 14:45:36.889109 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1728 14:45:36.892445 ACPI: added table 2/32, length now 44
1729 14:45:36.892529 ACPI: * MCFG
1730 14:45:36.895972 ACPI: added table 3/32, length now 48
1731 14:45:36.899326 ACPI: * TPM2
1732 14:45:36.902539 TPM2 log created at 99a2d000
1733 14:45:36.905552 ACPI: added table 4/32, length now 52
1734 14:45:36.905635 ACPI: * MADT
1735 14:45:36.908613 SCI is IRQ9
1736 14:45:36.912083 ACPI: added table 5/32, length now 56
1737 14:45:36.915510 current = 99b43ac0
1738 14:45:36.915593 ACPI: * DMAR
1739 14:45:36.918510 ACPI: added table 6/32, length now 60
1740 14:45:36.921930 ACPI: * IGD OpRegion
1741 14:45:36.925213 GMA: Found VBT in CBFS
1742 14:45:36.928302 GMA: Found valid VBT in CBFS
1743 14:45:36.931496 ACPI: added table 7/32, length now 64
1744 14:45:36.931579 ACPI: * HPET
1745 14:45:36.934907 ACPI: added table 8/32, length now 68
1746 14:45:36.938226 ACPI: done.
1747 14:45:36.941485 ACPI tables: 31744 bytes.
1748 14:45:36.944580 smbios_write_tables: 99a2c000
1749 14:45:36.948091 EC returned error result code 3
1750 14:45:36.951103 Couldn't obtain OEM name from CBI
1751 14:45:36.954359 Create SMBIOS type 17
1752 14:45:36.957831 PCI: 00:00.0 (Intel Cannonlake)
1753 14:45:36.957914 PCI: 00:14.3 (Intel WiFi)
1754 14:45:36.961044 SMBIOS tables: 939 bytes.
1755 14:45:36.967374 Writing table forward entry at 0x00000500
1756 14:45:36.970874 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1757 14:45:36.977280 Writing coreboot table at 0x99b62000
1758 14:45:36.980479 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1759 14:45:36.987197 1. 0000000000001000-000000000009ffff: RAM
1760 14:45:36.990441 2. 00000000000a0000-00000000000fffff: RESERVED
1761 14:45:36.993700 3. 0000000000100000-0000000099a2bfff: RAM
1762 14:45:37.000306 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1763 14:45:37.006664 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1764 14:45:37.013086 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1765 14:45:37.016582 7. 000000009a000000-000000009f7fffff: RESERVED
1766 14:45:37.019714 8. 00000000e0000000-00000000efffffff: RESERVED
1767 14:45:37.026491 9. 00000000fc000000-00000000fc000fff: RESERVED
1768 14:45:37.029663 10. 00000000fe000000-00000000fe00ffff: RESERVED
1769 14:45:37.036082 11. 00000000fed10000-00000000fed17fff: RESERVED
1770 14:45:37.039518 12. 00000000fed80000-00000000fed83fff: RESERVED
1771 14:45:37.045816 13. 00000000fed90000-00000000fed91fff: RESERVED
1772 14:45:37.049112 14. 00000000feda0000-00000000feda1fff: RESERVED
1773 14:45:37.052598 15. 0000000100000000-000000045e7fffff: RAM
1774 14:45:37.058863 Graphics framebuffer located at 0xc0000000
1775 14:45:37.062070 Passing 5 GPIOs to payload:
1776 14:45:37.065535 NAME | PORT | POLARITY | VALUE
1777 14:45:37.072204 write protect | undefined | high | low
1778 14:45:37.078372 lid | undefined | high | high
1779 14:45:37.081824 power | undefined | high | low
1780 14:45:37.088423 oprom | undefined | high | low
1781 14:45:37.091325 EC in RW | 0x000000cb | high | low
1782 14:45:37.094732 Board ID: 4
1783 14:45:37.098293 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1784 14:45:37.101178 CBFS @ c08000 size 3f8000
1785 14:45:37.107866 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1786 14:45:37.114205 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d3d
1787 14:45:37.117852 coreboot table: 1492 bytes.
1788 14:45:37.120669 IMD ROOT 0. 99fff000 00001000
1789 14:45:37.124095 IMD SMALL 1. 99ffe000 00001000
1790 14:45:37.127249 FSP MEMORY 2. 99c4e000 003b0000
1791 14:45:37.130582 CONSOLE 3. 99c2e000 00020000
1792 14:45:37.133696 FMAP 4. 99c2d000 0000054e
1793 14:45:37.136827 TIME STAMP 5. 99c2c000 00000910
1794 14:45:37.140294 VBOOT WORK 6. 99c18000 00014000
1795 14:45:37.143387 MRC DATA 7. 99c16000 00001958
1796 14:45:37.146861 ROMSTG STCK 8. 99c15000 00001000
1797 14:45:37.149919 AFTER CAR 9. 99c0b000 0000a000
1798 14:45:37.153379 RAMSTAGE 10. 99baf000 0005c000
1799 14:45:37.156494 REFCODE 11. 99b7a000 00035000
1800 14:45:37.160019 SMM BACKUP 12. 99b6a000 00010000
1801 14:45:37.163135 COREBOOT 13. 99b62000 00008000
1802 14:45:37.166250 ACPI 14. 99b3e000 00024000
1803 14:45:37.169890 ACPI GNVS 15. 99b3d000 00001000
1804 14:45:37.172902 RAMOOPS 16. 99a3d000 00100000
1805 14:45:37.176379 TPM2 TCGLOG17. 99a2d000 00010000
1806 14:45:37.179538 SMBIOS 18. 99a2c000 00000800
1807 14:45:37.182567 IMD small region:
1808 14:45:37.185950 IMD ROOT 0. 99ffec00 00000400
1809 14:45:37.189138 FSP RUNTIME 1. 99ffebe0 00000004
1810 14:45:37.192560 EC HOSTEVENT 2. 99ffebc0 00000008
1811 14:45:37.195755 POWER STATE 3. 99ffeb80 00000040
1812 14:45:37.198898 ROMSTAGE 4. 99ffeb60 00000004
1813 14:45:37.202398 MEM INFO 5. 99ffe9a0 000001b9
1814 14:45:37.205532 VPD 6. 99ffe960 00000036
1815 14:45:37.208696 MTRR: Physical address space:
1816 14:45:37.215539 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1817 14:45:37.221990 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1818 14:45:37.228535 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1819 14:45:37.234910 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1820 14:45:37.241465 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1821 14:45:37.247835 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1822 14:45:37.254728 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1823 14:45:37.257854 MTRR: Fixed MSR 0x250 0x0606060606060606
1824 14:45:37.261084 MTRR: Fixed MSR 0x258 0x0606060606060606
1825 14:45:37.264260 MTRR: Fixed MSR 0x259 0x0000000000000000
1826 14:45:37.270890 MTRR: Fixed MSR 0x268 0x0606060606060606
1827 14:45:37.274444 MTRR: Fixed MSR 0x269 0x0606060606060606
1828 14:45:37.277235 MTRR: Fixed MSR 0x26a 0x0606060606060606
1829 14:45:37.280507 MTRR: Fixed MSR 0x26b 0x0606060606060606
1830 14:45:37.286957 MTRR: Fixed MSR 0x26c 0x0606060606060606
1831 14:45:37.290360 MTRR: Fixed MSR 0x26d 0x0606060606060606
1832 14:45:37.293425 MTRR: Fixed MSR 0x26e 0x0606060606060606
1833 14:45:37.296957 MTRR: Fixed MSR 0x26f 0x0606060606060606
1834 14:45:37.300461 call enable_fixed_mtrr()
1835 14:45:37.303786 CPU physical address size: 39 bits
1836 14:45:37.310185 MTRR: default type WB/UC MTRR counts: 6/8.
1837 14:45:37.313712 MTRR: WB selected as default type.
1838 14:45:37.320057 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1839 14:45:37.323448 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1840 14:45:37.329908 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1841 14:45:37.336534 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1842 14:45:37.343194 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1843 14:45:37.349867 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1844 14:45:37.356032 MTRR: Fixed MSR 0x250 0x0606060606060606
1845 14:45:37.359497 MTRR: Fixed MSR 0x258 0x0606060606060606
1846 14:45:37.362953 MTRR: Fixed MSR 0x259 0x0000000000000000
1847 14:45:37.366020 MTRR: Fixed MSR 0x268 0x0606060606060606
1848 14:45:37.372552 MTRR: Fixed MSR 0x269 0x0606060606060606
1849 14:45:37.375948 MTRR: Fixed MSR 0x26a 0x0606060606060606
1850 14:45:37.379228 MTRR: Fixed MSR 0x26b 0x0606060606060606
1851 14:45:37.382357 MTRR: Fixed MSR 0x26c 0x0606060606060606
1852 14:45:37.389007 MTRR: Fixed MSR 0x26d 0x0606060606060606
1853 14:45:37.392077 MTRR: Fixed MSR 0x26e 0x0606060606060606
1854 14:45:37.395341 MTRR: Fixed MSR 0x26f 0x0606060606060606
1855 14:45:37.395425
1856 14:45:37.398829 MTRR check
1857 14:45:37.398911 Fixed MTRRs : Enabled
1858 14:45:37.401807 Variable MTRRs: Enabled
1859 14:45:37.401889
1860 14:45:37.405268 call enable_fixed_mtrr()
1861 14:45:37.411658 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1862 14:45:37.414802 CPU physical address size: 39 bits
1863 14:45:37.418669 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1864 14:45:37.424754 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 14:45:37.428317 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 14:45:37.431243 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 14:45:37.434521 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 14:45:37.441217 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 14:45:37.444330 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 14:45:37.447525 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 14:45:37.451059 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 14:45:37.457262 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 14:45:37.460759 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 14:45:37.463880 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 14:45:37.467413 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 14:45:37.474062 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 14:45:37.477391 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 14:45:37.480680 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 14:45:37.484027 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 14:45:37.490464 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 14:45:37.493787 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 14:45:37.496921 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 14:45:37.500339 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 14:45:37.506865 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 14:45:37.510021 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 14:45:37.513052 call enable_fixed_mtrr()
1887 14:45:37.516658 call enable_fixed_mtrr()
1888 14:45:37.519849 CPU physical address size: 39 bits
1889 14:45:37.523284 CPU physical address size: 39 bits
1890 14:45:37.526262 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 14:45:37.529640 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 14:45:37.535962 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 14:45:37.539611 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 14:45:37.542662 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 14:45:37.545771 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 14:45:37.552364 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 14:45:37.555858 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 14:45:37.559320 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 14:45:37.562683 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 14:45:37.565810 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 14:45:37.572056 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 14:45:37.575265 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 14:45:37.578660 MTRR: Fixed MSR 0x259 0x0000000000000000
1904 14:45:37.585344 MTRR: Fixed MSR 0x268 0x0606060606060606
1905 14:45:37.588472 MTRR: Fixed MSR 0x269 0x0606060606060606
1906 14:45:37.591906 MTRR: Fixed MSR 0x26a 0x0606060606060606
1907 14:45:37.595514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1908 14:45:37.601656 MTRR: Fixed MSR 0x26c 0x0606060606060606
1909 14:45:37.604721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1910 14:45:37.608196 MTRR: Fixed MSR 0x26e 0x0606060606060606
1911 14:45:37.611542 MTRR: Fixed MSR 0x26f 0x0606060606060606
1912 14:45:37.614619 call enable_fixed_mtrr()
1913 14:45:37.617821 call enable_fixed_mtrr()
1914 14:45:37.621417 MTRR: Fixed MSR 0x250 0x0606060606060606
1915 14:45:37.624507 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 14:45:37.631185 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 14:45:37.634236 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 14:45:37.637664 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 14:45:37.641105 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 14:45:37.647397 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 14:45:37.650848 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 14:45:37.653843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 14:45:37.657380 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 14:45:37.663951 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 14:45:37.667117 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 14:45:37.670299 MTRR: Fixed MSR 0x258 0x0606060606060606
1927 14:45:37.673378 call enable_fixed_mtrr()
1928 14:45:37.677122 MTRR: Fixed MSR 0x259 0x0000000000000000
1929 14:45:37.683319 MTRR: Fixed MSR 0x268 0x0606060606060606
1930 14:45:37.686716 MTRR: Fixed MSR 0x269 0x0606060606060606
1931 14:45:37.689886 MTRR: Fixed MSR 0x26a 0x0606060606060606
1932 14:45:37.693011 MTRR: Fixed MSR 0x26b 0x0606060606060606
1933 14:45:37.699455 MTRR: Fixed MSR 0x26c 0x0606060606060606
1934 14:45:37.702844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1935 14:45:37.706329 MTRR: Fixed MSR 0x26e 0x0606060606060606
1936 14:45:37.709481 MTRR: Fixed MSR 0x26f 0x0606060606060606
1937 14:45:37.715884 CPU physical address size: 39 bits
1938 14:45:37.715968 call enable_fixed_mtrr()
1939 14:45:37.719017 CBFS @ c08000 size 3f8000
1940 14:45:37.725824 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1941 14:45:37.729046 CBFS: Locating 'fallback/payload'
1942 14:45:37.732184 CPU physical address size: 39 bits
1943 14:45:37.735418 CPU physical address size: 39 bits
1944 14:45:37.742027 CBFS: Found @ offset 1c96c0 size 3f798
1945 14:45:37.745397 CPU physical address size: 39 bits
1946 14:45:37.748596 Checking segment from ROM address 0xffdd16f8
1947 14:45:37.751592 Checking segment from ROM address 0xffdd1714
1948 14:45:37.758289 Loading segment from ROM address 0xffdd16f8
1949 14:45:37.758384 code (compression=0)
1950 14:45:37.768051 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1951 14:45:37.777949 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1952 14:45:37.778033 it's not compressed!
1953 14:45:37.870962 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1954 14:45:37.877298 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1955 14:45:37.883737 Loading segment from ROM address 0xffdd1714
1956 14:45:37.883822 Entry Point 0x30000000
1957 14:45:37.887223 Loaded segments
1958 14:45:37.892976 Finalizing chipset.
1959 14:45:37.896300 Finalizing SMM.
1960 14:45:37.899610 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1961 14:45:37.902652 mp_park_aps done after 0 msecs.
1962 14:45:37.909442 Jumping to boot code at 30000000(99b62000)
1963 14:45:37.915781 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1964 14:45:37.915866
1965 14:45:37.919208 Starting depthcharge on Helios...
1966 14:45:37.919577 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
1967 14:45:37.919679 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
1968 14:45:37.919763 Setting prompt string to ['hatch:']
1969 14:45:37.919844 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
1970 14:45:37.929008 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1971 14:45:37.935727 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1972 14:45:37.942088 board_setup: Info: eMMC controller not present; skipping
1973 14:45:37.945110 New NVMe Controller 0x30053ac0 @ 00:1d:00
1974 14:45:37.951942 board_setup: Info: SDHCI controller not present; skipping
1975 14:45:37.958425 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1976 14:45:37.958510 Wipe memory regions:
1977 14:45:37.965145 [0x00000000001000, 0x000000000a0000)
1978 14:45:37.968382 [0x00000000100000, 0x00000030000000)
1979 14:45:38.035319 [0x00000030657430, 0x00000099a2c000)
1980 14:45:38.175471 [0x00000100000000, 0x0000045e800000)
1981 14:45:39.558545 R8152: Initializing
1982 14:45:39.561692 Version 9 (ocp_data = 6010)
1983 14:45:39.565991 R8152: Done initializing
1984 14:45:39.569289 Adding net device
1985 14:45:39.944387 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1986 14:45:39.944513
1987 14:45:39.944794 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1989 14:45:40.045583 hatch: tftpboot 192.168.201.1 6895617/tftp-deploy-vfkn_5gi/kernel/bzImage 6895617/tftp-deploy-vfkn_5gi/kernel/cmdline 6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
1990 14:45:40.045696 Setting prompt string to 'Starting kernel'
1991 14:45:40.045805 Setting prompt string to ['Starting kernel']
1992 14:45:40.045900 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
1993 14:45:40.045971 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
1994 14:45:40.049742 tftpboot 192.168.201.1 6895617/tftp-deploy-vfkn_5gi/kernel/bzImoy-vfkn_5gi/kernel/cmdline 6895617/tftp-deploy-vfkn_5gi/ramdisk/ramdisk.cpio.gz
1995 14:45:40.049829 Waiting for link
1996 14:45:40.250803 done.
1997 14:45:40.250915 MAC: f4:f5:e8:50:e5:3a
1998 14:45:40.253804 Sending DHCP discover... done.
1999 14:45:40.257178 Waiting for reply... done.
2000 14:45:40.260585 Sending DHCP request... done.
2001 14:45:40.263968 Waiting for reply... done.
2002 14:45:40.267011 My ip is 192.168.201.10
2003 14:45:40.270376 The DHCP server ip is 192.168.201.1
2004 14:45:40.273779 TFTP server IP predefined by user: 192.168.201.1
2005 14:45:40.280064 Bootfile predefined by user: 6895617/tftp-deploy-vfkn_5gi/kernel/bzImage
2006 14:45:40.283339 Sending tftp read request... done.
2007 14:45:40.286739 Waiting for the transfer...
2008 14:45:40.537622 00000000 ################################################################
2009 14:45:40.795627 00080000 ################################################################
2010 14:45:41.034747 00100000 ################################################################
2011 14:45:41.280479 00180000 ################################################################
2012 14:45:41.523349 00200000 ################################################################
2013 14:45:41.769921 00280000 ################################################################
2014 14:45:42.036214 00300000 ################################################################
2015 14:45:42.333289 00380000 ################################################################
2016 14:45:42.610053 00400000 ################################################################
2017 14:45:42.862981 00480000 ################################################################
2018 14:45:43.107679 00500000 ################################################################
2019 14:45:43.355703 00580000 ################################################################
2020 14:45:43.586978 00600000 ################################################################ done.
2021 14:45:43.590207 The bootfile was 6815632 bytes long.
2022 14:45:43.593508 Sending tftp read request... done.
2023 14:45:43.596914 Waiting for the transfer...
2024 14:45:43.849895 00000000 ################################################################
2025 14:45:44.079044 00080000 ################################################################
2026 14:45:44.303644 00100000 ################################################################
2027 14:45:44.533414 00180000 ################################################################
2028 14:45:44.761621 00200000 ################################################################
2029 14:45:44.989415 00280000 ################################################################
2030 14:45:45.220152 00300000 ################################################################
2031 14:45:45.452472 00380000 ################################################################
2032 14:45:45.680312 00400000 ################################################################
2033 14:45:45.910040 00480000 ################################################################
2034 14:45:46.137608 00500000 ################################################################
2035 14:45:46.363387 00580000 ################################################################
2036 14:45:46.589138 00600000 ################################################################
2037 14:45:46.814861 00680000 ################################################################
2038 14:45:47.040318 00700000 ################################################################
2039 14:45:47.266828 00780000 ################################################################
2040 14:45:47.338036 00800000 #################### done.
2041 14:45:47.341395 Sending tftp read request... done.
2042 14:45:47.341487 Waiting for the transfer...
2043 14:45:47.344568 00000000 # done.
2044 14:45:47.354743 Command line loaded dynamically from TFTP file: 6895617/tftp-deploy-vfkn_5gi/kernel/cmdline
2045 14:45:47.371119 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2046 14:45:47.377713 ec_init(0): CrosEC protocol v3 supported (256, 256)
2047 14:45:47.384892 Shutting down all USB controllers.
2048 14:45:47.385192 Removing current net device
2049 14:45:47.388680 Finalizing coreboot
2050 14:45:47.395427 Exiting depthcharge with code 4 at timestamp: 16759807
2051 14:45:47.395807
2052 14:45:47.396058 Starting kernel ...
2053 14:45:47.396291
2054 14:45:47.396514
2055 14:45:47.397148 end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
2056 14:45:47.397523 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2057 14:45:47.397796 Setting prompt string to ['Linux version [0-9]']
2058 14:45:47.398059 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2059 14:45:47.398313 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2061 14:50:18.397820 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2063 14:50:18.398038 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2065 14:50:18.398198 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2068 14:50:18.398455 end: 2 depthcharge-action (duration 00:05:00) [common]
2070 14:50:18.398641 Cleaning after the job
2071 14:50:18.398725 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/ramdisk
2072 14:50:18.399358 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/kernel
2073 14:50:18.399868 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895617/tftp-deploy-vfkn_5gi/modules
2074 14:50:18.400063 start: 5.1 power-off (timeout 00:00:30) [common]
2075 14:50:18.400213 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2076 14:50:18.419336 >> Command sent successfully.
2077 14:50:18.421376 Returned 0 in 0 seconds
2078 14:50:18.522161 end: 5.1 power-off (duration 00:00:00) [common]
2080 14:50:18.522487 start: 5.2 read-feedback (timeout 00:10:00) [common]
2081 14:50:18.522738 Listened to connection for namespace 'common' for up to 1s
2082 14:50:19.527715 Finalising connection for namespace 'common'
2083 14:50:19.527909 Disconnecting from shell: Finalise
2084 14:50:19.628677 end: 5.2 read-feedback (duration 00:00:01) [common]
2085 14:50:19.628842 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6895617
2086 14:50:19.633699 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6895617
2087 14:50:19.633817 JobError: Your job cannot terminate cleanly.