Boot log: asus-C436FA-Flip-hatch

    1 14:44:41.042409  lava-dispatcher, installed at version: 2022.06
    2 14:44:41.042600  start: 0 validate
    3 14:44:41.042733  Start time: 2022-07-26 14:44:41.042726+00:00 (UTC)
    4 14:44:41.042870  Using caching service: 'http://localhost/cache/?uri=%s'
    5 14:44:41.043012  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220718.0%2Famd64%2Finitrd.cpio.gz exists
    6 14:44:41.335726  Using caching service: 'http://localhost/cache/?uri=%s'
    7 14:44:41.335898  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 14:44:41.625202  Using caching service: 'http://localhost/cache/?uri=%s'
    9 14:44:41.625368  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20220718.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 14:44:41.916026  Using caching service: 'http://localhost/cache/?uri=%s'
   11 14:44:41.916181  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4-st5-586-geb97410e0086c%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 14:44:42.208107  validate duration: 1.17
   14 14:44:42.208442  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 14:44:42.208573  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 14:44:42.208692  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 14:44:42.208821  Not decompressing ramdisk as can be used compressed.
   18 14:44:42.208904  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220718.0/amd64/initrd.cpio.gz
   19 14:44:42.208978  saving as /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/ramdisk/initrd.cpio.gz
   20 14:44:42.209041  total size: 5411033 (5MB)
   21 14:44:42.210207  progress   0% (0MB)
   22 14:44:42.211649  progress   5% (0MB)
   23 14:44:42.213038  progress  10% (0MB)
   24 14:44:42.214469  progress  15% (0MB)
   25 14:44:42.215926  progress  20% (1MB)
   26 14:44:42.217399  progress  25% (1MB)
   27 14:44:42.218666  progress  30% (1MB)
   28 14:44:42.219950  progress  35% (1MB)
   29 14:44:42.221510  progress  40% (2MB)
   30 14:44:42.222771  progress  45% (2MB)
   31 14:44:42.224111  progress  50% (2MB)
   32 14:44:42.225460  progress  55% (2MB)
   33 14:44:42.226906  progress  60% (3MB)
   34 14:44:42.228238  progress  65% (3MB)
   35 14:44:42.229771  progress  70% (3MB)
   36 14:44:42.231175  progress  75% (3MB)
   37 14:44:42.232667  progress  80% (4MB)
   38 14:44:42.234041  progress  85% (4MB)
   39 14:44:42.235500  progress  90% (4MB)
   40 14:44:42.236882  progress  95% (4MB)
   41 14:44:42.238379  progress 100% (5MB)
   42 14:44:42.238564  5MB downloaded in 0.03s (174.82MB/s)
   43 14:44:42.238716  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 14:44:42.238962  end: 1.1 download-retry (duration 00:00:00) [common]
   46 14:44:42.239051  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 14:44:42.239138  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 14:44:42.239290  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 14:44:42.239385  saving as /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/kernel/bzImage
   50 14:44:42.239448  total size: 6815632 (6MB)
   51 14:44:42.239523  No compression specified
   52 14:44:42.240731  progress   0% (0MB)
   53 14:44:42.242475  progress   5% (0MB)
   54 14:44:42.244241  progress  10% (0MB)
   55 14:44:42.246104  progress  15% (1MB)
   56 14:44:42.247773  progress  20% (1MB)
   57 14:44:42.249419  progress  25% (1MB)
   58 14:44:42.251229  progress  30% (1MB)
   59 14:44:42.252893  progress  35% (2MB)
   60 14:44:42.254660  progress  40% (2MB)
   61 14:44:42.256215  progress  45% (2MB)
   62 14:44:42.257912  progress  50% (3MB)
   63 14:44:42.259725  progress  55% (3MB)
   64 14:44:42.261407  progress  60% (3MB)
   65 14:44:42.263241  progress  65% (4MB)
   66 14:44:42.264801  progress  70% (4MB)
   67 14:44:42.266485  progress  75% (4MB)
   68 14:44:42.268214  progress  80% (5MB)
   69 14:44:42.269878  progress  85% (5MB)
   70 14:44:42.271620  progress  90% (5MB)
   71 14:44:42.273278  progress  95% (6MB)
   72 14:44:42.274906  progress 100% (6MB)
   73 14:44:42.275201  6MB downloaded in 0.04s (181.83MB/s)
   74 14:44:42.275352  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 14:44:42.275593  end: 1.2 download-retry (duration 00:00:00) [common]
   77 14:44:42.275699  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 14:44:42.275789  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 14:44:42.275899  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20220718.0/amd64/full.rootfs.tar.xz
   80 14:44:42.275967  saving as /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/nfsrootfs/full.rootfs.tar
   81 14:44:42.276029  total size: 207105224 (197MB)
   82 14:44:42.276092  Using unxz to decompress xz
   83 14:44:42.279391  progress   0% (0MB)
   84 14:44:42.841086  progress   5% (9MB)
   85 14:44:43.385703  progress  10% (19MB)
   86 14:44:43.992925  progress  15% (29MB)
   87 14:44:44.361383  progress  20% (39MB)
   88 14:44:44.737399  progress  25% (49MB)
   89 14:44:45.348513  progress  30% (59MB)
   90 14:44:45.914653  progress  35% (69MB)
   91 14:44:46.526191  progress  40% (79MB)
   92 14:44:47.099746  progress  45% (88MB)
   93 14:44:47.693123  progress  50% (98MB)
   94 14:44:48.334517  progress  55% (108MB)
   95 14:44:49.029926  progress  60% (118MB)
   96 14:44:49.181790  progress  65% (128MB)
   97 14:44:49.329286  progress  70% (138MB)
   98 14:44:49.425196  progress  75% (148MB)
   99 14:44:49.499289  progress  80% (158MB)
  100 14:44:49.569898  progress  85% (167MB)
  101 14:44:49.673205  progress  90% (177MB)
  102 14:44:49.942037  progress  95% (187MB)
  103 14:44:50.534849  progress 100% (197MB)
  104 14:44:50.540138  197MB downloaded in 8.26s (23.90MB/s)
  105 14:44:50.540390  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 14:44:50.540664  end: 1.3 download-retry (duration 00:00:08) [common]
  108 14:44:50.540790  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 14:44:50.540954  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 14:44:50.541096  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4-st5-586-geb97410e0086c/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 14:44:50.541209  saving as /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/modules/modules.tar
  112 14:44:50.541310  total size: 51868 (0MB)
  113 14:44:50.541384  Using unxz to decompress xz
  114 14:44:50.544560  progress  63% (0MB)
  115 14:44:50.544964  progress 100% (0MB)
  116 14:44:50.548127  0MB downloaded in 0.01s (7.26MB/s)
  117 14:44:50.548351  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 14:44:50.548635  end: 1.4 download-retry (duration 00:00:00) [common]
  120 14:44:50.548742  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  121 14:44:50.548840  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  122 14:44:52.558445  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6895611/extract-nfsrootfs-qv4tkahi
  123 14:44:52.558662  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 14:44:52.558764  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  125 14:44:52.558901  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k
  126 14:44:52.559002  makedir: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin
  127 14:44:52.559085  makedir: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/tests
  128 14:44:52.559168  makedir: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/results
  129 14:44:52.559265  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-add-keys
  130 14:44:52.559401  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-add-sources
  131 14:44:52.559516  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-background-process-start
  132 14:44:52.559631  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-background-process-stop
  133 14:44:52.559740  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-common-functions
  134 14:44:52.559848  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-echo-ipv4
  135 14:44:52.559955  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-install-packages
  136 14:44:52.560063  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-installed-packages
  137 14:44:52.560169  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-os-build
  138 14:44:52.560274  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-probe-channel
  139 14:44:52.560381  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-probe-ip
  140 14:44:52.560488  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-target-ip
  141 14:44:52.560596  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-target-mac
  142 14:44:52.560702  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-target-storage
  143 14:44:52.560811  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-case
  144 14:44:52.560920  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-event
  145 14:44:52.561074  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-feedback
  146 14:44:52.561181  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-raise
  147 14:44:52.561287  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-reference
  148 14:44:52.561393  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-runner
  149 14:44:52.561501  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-set
  150 14:44:52.561606  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-test-shell
  151 14:44:52.561713  Updating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-add-keys (debian)
  152 14:44:52.561823  Updating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-add-sources (debian)
  153 14:44:52.561933  Updating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-install-packages (debian)
  154 14:44:52.562042  Updating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-installed-packages (debian)
  155 14:44:52.562150  Updating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/bin/lava-os-build (debian)
  156 14:44:52.562245  Creating /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/environment
  157 14:44:52.562331  LAVA metadata
  158 14:44:52.562396  - LAVA_JOB_ID=6895611
  159 14:44:52.562459  - LAVA_DISPATCHER_IP=192.168.201.1
  160 14:44:52.562556  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  161 14:44:52.562620  skipped lava-vland-overlay
  162 14:44:52.562694  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  163 14:44:52.562773  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  164 14:44:52.562834  skipped lava-multinode-overlay
  165 14:44:52.562905  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  166 14:44:52.562985  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  167 14:44:52.563054  Loading test definitions
  168 14:44:52.563143  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  169 14:44:52.563217  Using /lava-6895611 at stage 0
  170 14:44:52.563447  uuid=6895611_1.5.2.3.1 testdef=None
  171 14:44:52.563535  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  172 14:44:52.563621  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  173 14:44:52.564032  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  175 14:44:52.564261  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  176 14:44:52.564741  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  178 14:44:52.565019  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  179 14:44:52.565479  runner path: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/0/tests/0_timesync-off test_uuid 6895611_1.5.2.3.1
  180 14:44:52.565624  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  182 14:44:52.565856  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  183 14:44:52.565929  Using /lava-6895611 at stage 0
  184 14:44:52.566025  Fetching tests from https://github.com/kernelci/test-definitions.git
  185 14:44:52.566106  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/0/tests/1_kselftest-futex'
  186 14:44:56.562816  Running '/usr/bin/git checkout kernelci.org
  187 14:44:56.697050  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
  188 14:44:56.697723  uuid=6895611_1.5.2.3.5 testdef=None
  189 14:44:56.697881  end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
  191 14:44:56.698136  start: 1.5.2.3.6 test-overlay (timeout 00:09:46) [common]
  192 14:44:56.698818  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  194 14:44:56.699061  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:46) [common]
  195 14:44:56.699931  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  197 14:44:56.700181  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
  198 14:44:56.701134  runner path: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/0/tests/1_kselftest-futex test_uuid 6895611_1.5.2.3.5
  199 14:44:56.701225  BOARD='asus-C436FA-Flip-hatch'
  200 14:44:56.701293  BRANCH='cip-gitlab'
  201 14:44:56.701355  SKIPFILE='skipfile-lkft.yaml'
  202 14:44:56.701416  TESTPROG_URL='None'
  203 14:44:56.701474  TST_CASENAME=''
  204 14:44:56.701532  TST_CMDFILES='futex'
  205 14:44:56.701665  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  207 14:44:56.701880  Creating lava-test-runner.conf files
  208 14:44:56.701945  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6895611/lava-overlay-slokt19k/lava-6895611/0 for stage 0
  209 14:44:56.702028  - 0_timesync-off
  210 14:44:56.702098  - 1_kselftest-futex
  211 14:44:56.702188  end: 1.5.2.3 test-definition (duration 00:00:04) [common]
  212 14:44:56.702279  start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
  213 14:45:03.837504  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  214 14:45:03.837663  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
  215 14:45:03.837758  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  216 14:45:03.837858  end: 1.5.2 lava-overlay (duration 00:00:11) [common]
  217 14:45:03.837952  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
  218 14:45:03.940444  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  219 14:45:03.940781  start: 1.5.4 extract-modules (timeout 00:09:38) [common]
  220 14:45:03.940898  extracting modules file /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895611/extract-nfsrootfs-qv4tkahi
  221 14:45:03.945025  extracting modules file /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6895611/extract-overlay-ramdisk-2tyad3gn/ramdisk
  222 14:45:03.948815  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  223 14:45:03.948927  start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
  224 14:45:03.949053  [common] Applying overlay to NFS
  225 14:45:03.949124  [common] Applying overlay /var/lib/lava/dispatcher/tmp/6895611/compress-overlay-m3ryzylv/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6895611/extract-nfsrootfs-qv4tkahi
  226 14:45:04.391118  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  227 14:45:04.391279  start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
  228 14:45:04.391374  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  229 14:45:04.391468  start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
  230 14:45:04.391553  Building ramdisk /var/lib/lava/dispatcher/tmp/6895611/extract-overlay-ramdisk-2tyad3gn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6895611/extract-overlay-ramdisk-2tyad3gn/ramdisk
  231 14:45:04.424320  >> 24431 blocks

  232 14:45:04.888605  rename /var/lib/lava/dispatcher/tmp/6895611/extract-overlay-ramdisk-2tyad3gn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
  233 14:45:04.889039  end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
  234 14:45:04.889162  start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
  235 14:45:04.889265  start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
  236 14:45:04.889365  No mkimage arch provided, not using FIT.
  237 14:45:04.889454  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  238 14:45:04.889538  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  239 14:45:04.889634  end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
  240 14:45:04.889726  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  241 14:45:04.889807  No LXC device requested
  242 14:45:04.889890  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  243 14:45:04.889978  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  244 14:45:04.890060  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  245 14:45:04.890133  Checking files for TFTP limit of 4294967296 bytes.
  246 14:45:04.890519  end: 1 tftp-deploy (duration 00:00:23) [common]
  247 14:45:04.890628  start: 2 depthcharge-action (timeout 00:05:00) [common]
  248 14:45:04.890722  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  249 14:45:04.890848  substitutions:
  250 14:45:04.890916  - {DTB}: None
  251 14:45:04.890985  - {INITRD}: 6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
  252 14:45:04.891054  - {KERNEL}: 6895611/tftp-deploy-ssl4opx7/kernel/bzImage
  253 14:45:04.891121  - {LAVA_MAC}: None
  254 14:45:04.891188  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6895611/extract-nfsrootfs-qv4tkahi
  255 14:45:04.891256  - {NFS_SERVER_IP}: 192.168.201.1
  256 14:45:04.891319  - {PRESEED_CONFIG}: None
  257 14:45:04.891380  - {PRESEED_LOCAL}: None
  258 14:45:04.891438  - {RAMDISK}: 6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
  259 14:45:04.891496  - {ROOT_PART}: None
  260 14:45:04.891552  - {ROOT}: None
  261 14:45:04.891609  - {SERVER_IP}: 192.168.201.1
  262 14:45:04.891665  - {TEE}: None
  263 14:45:04.891721  Parsed boot commands:
  264 14:45:04.891776  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  265 14:45:04.891931  Parsed boot commands: tftpboot 192.168.201.1 6895611/tftp-deploy-ssl4opx7/kernel/bzImage 6895611/tftp-deploy-ssl4opx7/kernel/cmdline 6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
  266 14:45:04.892024  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  267 14:45:04.892114  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  268 14:45:04.892212  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  269 14:45:04.892302  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  270 14:45:04.892376  Not connected, no need to disconnect.
  271 14:45:04.892454  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  272 14:45:04.892535  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  273 14:45:04.892605  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
  274 14:45:04.895304  Setting prompt string to ['lava-test: # ']
  275 14:45:04.895592  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  276 14:45:04.895696  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  277 14:45:04.895797  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  278 14:45:04.895891  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  279 14:45:04.896070  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
  280 14:45:04.915689  >> Command sent successfully.

  281 14:45:04.917562  Returned 0 in 0 seconds
  282 14:45:05.018344  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  284 14:45:05.018667  end: 2.2.2 reset-device (duration 00:00:00) [common]
  285 14:45:05.018764  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  286 14:45:05.018855  Setting prompt string to 'Starting depthcharge on Helios...'
  287 14:45:05.018925  Changing prompt to 'Starting depthcharge on Helios...'
  288 14:45:05.018995  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  289 14:45:05.019263  [Enter `^Ec?' for help]
  290 14:45:11.490124  
  291 14:45:11.490282  
  292 14:45:11.500537  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  293 14:45:11.503270  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  294 14:45:11.510283  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  295 14:45:11.513606  CPU: AES supported, TXT NOT supported, VT supported
  296 14:45:11.519862  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  297 14:45:11.523271  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  298 14:45:11.529796  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  299 14:45:11.533545  VBOOT: Loading verstage.
  300 14:45:11.536736  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  301 14:45:11.543454  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  302 14:45:11.549933  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  303 14:45:11.550017  CBFS @ c08000 size 3f8000
  304 14:45:11.556680  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  305 14:45:11.559846  CBFS: Locating 'fallback/verstage'
  306 14:45:11.563201  CBFS: Found @ offset 10fb80 size 1072c
  307 14:45:11.567016  
  308 14:45:11.567100  
  309 14:45:11.576923  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  310 14:45:11.591649  Probing TPM: . done!
  311 14:45:11.594969  TPM ready after 0 ms
  312 14:45:11.598285  Connected to device vid:did:rid of 1ae0:0028:00
  313 14:45:11.608086  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  314 14:45:11.611883  Initialized TPM device CR50 revision 0
  315 14:45:11.646867  tlcl_send_startup: Startup return code is 0
  316 14:45:11.646959  TPM: setup succeeded
  317 14:45:11.659987  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  318 14:45:11.663837  Chrome EC: UHEPI supported
  319 14:45:11.667219  Phase 1
  320 14:45:11.670588  FMAP: area GBB found @ c05000 (12288 bytes)
  321 14:45:11.677161  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  322 14:45:11.680365  Phase 2
  323 14:45:11.680448  Phase 3
  324 14:45:11.683664  FMAP: area GBB found @ c05000 (12288 bytes)
  325 14:45:11.690236  VB2:vb2_report_dev_firmware() This is developer signed firmware
  326 14:45:11.696836  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  327 14:45:11.700217  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  328 14:45:11.706697  VB2:vb2_verify_keyblock() Checking keyblock signature...
  329 14:45:11.722462  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  330 14:45:11.725910  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
  331 14:45:11.732263  VB2:vb2_verify_fw_preamble() Verifying preamble.
  332 14:45:11.736597  Phase 4
  333 14:45:11.739928  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
  334 14:45:11.746796  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  335 14:45:11.926024  VB2:vb2_rsa_verify_digest() Digest check failed!
  336 14:45:11.932617  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  337 14:45:11.932708  Saving nvdata
  338 14:45:11.935950  Reboot requested (10020007)
  339 14:45:11.939136  board_reset() called!
  340 14:45:11.939215  full_reset() called!
  341 14:45:16.457911  
  342 14:45:16.458500  
  343 14:45:16.467767  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  344 14:45:16.471024  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  345 14:45:16.477556  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  346 14:45:16.481056  CPU: AES supported, TXT NOT supported, VT supported
  347 14:45:16.487846  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  348 14:45:16.490841  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  349 14:45:16.497287  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  350 14:45:16.501288  VBOOT: Loading verstage.
  351 14:45:16.503824  FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
  352 14:45:16.511147  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  353 14:45:16.517585  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  354 14:45:16.518083  CBFS @ c08000 size 3f8000
  355 14:45:16.524543  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  356 14:45:16.527645  CBFS: Locating 'fallback/verstage'
  357 14:45:16.531121  CBFS: Found @ offset 10fb80 size 1072c
  358 14:45:16.534782  
  359 14:45:16.535277  
  360 14:45:16.544667  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  361 14:45:16.559037  Probing TPM: . done!
  362 14:45:16.562363  TPM ready after 0 ms
  363 14:45:16.566215  Connected to device vid:did:rid of 1ae0:0028:00
  364 14:45:16.576123  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  365 14:45:16.579227  Initialized TPM device CR50 revision 0
  366 14:45:16.615083  tlcl_send_startup: Startup return code is 0
  367 14:45:16.615729  TPM: setup succeeded
  368 14:45:16.627851  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  369 14:45:16.631853  Chrome EC: UHEPI supported
  370 14:45:16.634748  Phase 1
  371 14:45:16.638161  FMAP: area GBB found @ c05000 (12288 bytes)
  372 14:45:16.644368  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  373 14:45:16.651563  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  374 14:45:16.654837  Recovery requested (1009000e)
  375 14:45:16.660484  Saving nvdata
  376 14:45:16.666588  tlcl_extend: response is 0
  377 14:45:16.675899  tlcl_extend: response is 0
  378 14:45:16.682624  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  379 14:45:16.685574  CBFS @ c08000 size 3f8000
  380 14:45:16.692544  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  381 14:45:16.695398  CBFS: Locating 'fallback/romstage'
  382 14:45:16.699098  CBFS: Found @ offset 80 size 145fc
  383 14:45:16.702512  Accumulated console time in verstage 99 ms
  384 14:45:16.702986  
  385 14:45:16.703355  
  386 14:45:16.715413  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  387 14:45:16.721808  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  388 14:45:16.724921  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  389 14:45:16.728520  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  390 14:45:16.735463  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  391 14:45:16.738693  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  392 14:45:16.741793  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  393 14:45:16.745254  TCO_STS:   0000 0000
  394 14:45:16.748699  GEN_PMCON: e0015238 00000200
  395 14:45:16.751762  GBLRST_CAUSE: 00000000 00000000
  396 14:45:16.752244  prev_sleep_state 5
  397 14:45:16.755247  Boot Count incremented to 33376
  398 14:45:16.761975  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  399 14:45:16.765291  CBFS @ c08000 size 3f8000
  400 14:45:16.771622  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  401 14:45:16.772106  CBFS: Locating 'fspm.bin'
  402 14:45:16.778594  CBFS: Found @ offset 5ffc0 size 71000
  403 14:45:16.781972  Chrome EC: UHEPI supported
  404 14:45:16.788447  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  405 14:45:16.792672  Probing TPM:  done!
  406 14:45:16.799192  Connected to device vid:did:rid of 1ae0:0028:00
  407 14:45:16.808664  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
  408 14:45:16.814667  Initialized TPM device CR50 revision 0
  409 14:45:16.823599  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  410 14:45:16.830106  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  411 14:45:16.833637  MRC cache found, size 1948
  412 14:45:16.836542  bootmode is set to: 2
  413 14:45:16.840307  PRMRR disabled by config.
  414 14:45:16.843420  SPD INDEX = 1
  415 14:45:16.846858  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  416 14:45:16.850004  CBFS @ c08000 size 3f8000
  417 14:45:16.856585  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  418 14:45:16.857105  CBFS: Locating 'spd.bin'
  419 14:45:16.859814  CBFS: Found @ offset 5fb80 size 400
  420 14:45:16.863041  SPD: module type is LPDDR3
  421 14:45:16.866305  SPD: module part is 
  422 14:45:16.873106  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  423 14:45:16.876504  SPD: device width 4 bits, bus width 8 bits
  424 14:45:16.879844  SPD: module size is 4096 MB (per channel)
  425 14:45:16.883114  memory slot: 0 configuration done.
  426 14:45:16.886467  memory slot: 2 configuration done.
  427 14:45:16.938528  CBMEM:
  428 14:45:16.941856  IMD: root @ 99fff000 254 entries.
  429 14:45:16.944602  IMD: root @ 99ffec00 62 entries.
  430 14:45:16.948270  External stage cache:
  431 14:45:16.951654  IMD: root @ 9abff000 254 entries.
  432 14:45:16.955115  IMD: root @ 9abfec00 62 entries.
  433 14:45:16.958358  Chrome EC: clear events_b mask to 0x0000000020004000
  434 14:45:16.974215  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  435 14:45:16.987576  tlcl_write: response is 0
  436 14:45:16.996578  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  437 14:45:17.003227  MRC: TPM MRC hash updated successfully.
  438 14:45:17.003803  2 DIMMs found
  439 14:45:17.006309  SMM Memory Map
  440 14:45:17.009633  SMRAM       : 0x9a000000 0x1000000
  441 14:45:17.012738   Subregion 0: 0x9a000000 0xa00000
  442 14:45:17.016275   Subregion 1: 0x9aa00000 0x200000
  443 14:45:17.019946   Subregion 2: 0x9ac00000 0x400000
  444 14:45:17.022877  top_of_ram = 0x9a000000
  445 14:45:17.026184  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  446 14:45:17.032835  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  447 14:45:17.036673  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  448 14:45:17.043116  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  449 14:45:17.046116  CBFS @ c08000 size 3f8000
  450 14:45:17.049485  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  451 14:45:17.052873  CBFS: Locating 'fallback/postcar'
  452 14:45:17.059560  CBFS: Found @ offset 107000 size 4b44
  453 14:45:17.065460  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  454 14:45:17.075514  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  455 14:45:17.078898  Processing 180 relocs. Offset value of 0x97c0c000
  456 14:45:17.087057  Accumulated console time in romstage 286 ms
  457 14:45:17.087563  
  458 14:45:17.087951  
  459 14:45:17.097003  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  460 14:45:17.104214  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 14:45:17.107606  CBFS @ c08000 size 3f8000
  462 14:45:17.110530  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 14:45:17.117062  CBFS: Locating 'fallback/ramstage'
  464 14:45:17.120476  CBFS: Found @ offset 43380 size 1b9e8
  465 14:45:17.127102  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  466 14:45:17.159367  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  467 14:45:17.162549  Processing 3976 relocs. Offset value of 0x98db0000
  468 14:45:17.169129  Accumulated console time in postcar 52 ms
  469 14:45:17.169703  
  470 14:45:17.170079  
  471 14:45:17.178972  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  472 14:45:17.185467  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  473 14:45:17.188770  WARNING: RO_VPD is uninitialized or empty.
  474 14:45:17.192315  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  475 14:45:17.198662  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  476 14:45:17.199145  Normal boot.
  477 14:45:17.205479  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  478 14:45:17.208766  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  479 14:45:17.212087  CBFS @ c08000 size 3f8000
  480 14:45:17.218958  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  481 14:45:17.222327  CBFS: Locating 'cpu_microcode_blob.bin'
  482 14:45:17.225797  CBFS: Found @ offset 14700 size 2ec00
  483 14:45:17.228772  microcode: sig=0x806ec pf=0x4 revision=0xc9
  484 14:45:17.231895  Skip microcode update
  485 14:45:17.235632  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  486 14:45:17.238408  CBFS @ c08000 size 3f8000
  487 14:45:17.244930  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  488 14:45:17.248282  CBFS: Locating 'fsps.bin'
  489 14:45:17.252070  CBFS: Found @ offset d1fc0 size 35000
  490 14:45:17.276820  Detected 4 core, 8 thread CPU.
  491 14:45:17.280141  Setting up SMI for CPU
  492 14:45:17.283203  IED base = 0x9ac00000
  493 14:45:17.283288  IED size = 0x00400000
  494 14:45:17.286919  Will perform SMM setup.
  495 14:45:17.293579  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  496 14:45:17.300151  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  497 14:45:17.302992  Processing 16 relocs. Offset value of 0x00030000
  498 14:45:17.306828  Attempting to start 7 APs
  499 14:45:17.310057  Waiting for 10ms after sending INIT.
  500 14:45:17.326708  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
  501 14:45:17.326794  done.
  502 14:45:17.329737  AP: slot 2 apic_id 7.
  503 14:45:17.333450  AP: slot 4 apic_id 6.
  504 14:45:17.336677  Waiting for 2nd SIPI to complete...done.
  505 14:45:17.339951  AP: slot 7 apic_id 4.
  506 14:45:17.340035  AP: slot 6 apic_id 5.
  507 14:45:17.343233  AP: slot 5 apic_id 3.
  508 14:45:17.346409  AP: slot 3 apic_id 2.
  509 14:45:17.352952  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  510 14:45:17.356609  Processing 13 relocs. Offset value of 0x00038000
  511 14:45:17.363165  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  512 14:45:17.369626  Installing SMM handler to 0x9a000000
  513 14:45:17.376069  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  514 14:45:17.379432  Processing 658 relocs. Offset value of 0x9a010000
  515 14:45:17.389567  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  516 14:45:17.392862  Processing 13 relocs. Offset value of 0x9a008000
  517 14:45:17.399433  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  518 14:45:17.405985  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  519 14:45:17.409205  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  520 14:45:17.416276  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  521 14:45:17.422772  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  522 14:45:17.429279  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  523 14:45:17.432421  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  524 14:45:17.438882  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  525 14:45:17.442838  Clearing SMI status registers
  526 14:45:17.446188  SMI_STS: PM1 
  527 14:45:17.446273  PM1_STS: PWRBTN 
  528 14:45:17.449400  TCO_STS: SECOND_TO 
  529 14:45:17.452606  New SMBASE 0x9a000000
  530 14:45:17.455932  In relocation handler: CPU 0
  531 14:45:17.459016  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  532 14:45:17.462355  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 14:45:17.465501  Relocation complete.
  534 14:45:17.469296  New SMBASE 0x99fffc00
  535 14:45:17.472534  In relocation handler: CPU 1
  536 14:45:17.475740  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  537 14:45:17.478988  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 14:45:17.482744  Relocation complete.
  539 14:45:17.485950  New SMBASE 0x99fff400
  540 14:45:17.486035  In relocation handler: CPU 3
  541 14:45:17.492422  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  542 14:45:17.495642  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 14:45:17.498815  Relocation complete.
  544 14:45:17.502117  New SMBASE 0x99ffec00
  545 14:45:17.502202  In relocation handler: CPU 5
  546 14:45:17.508679  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  547 14:45:17.511954  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 14:45:17.515279  Relocation complete.
  549 14:45:17.515392  New SMBASE 0x99fff000
  550 14:45:17.519104  In relocation handler: CPU 4
  551 14:45:17.525710  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  552 14:45:17.529035  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 14:45:17.532200  Relocation complete.
  554 14:45:17.532284  New SMBASE 0x99fff800
  555 14:45:17.535835  In relocation handler: CPU 2
  556 14:45:17.539007  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  557 14:45:17.545453  Writing SMRR. base = 0x9a000006, mask=0xff000800
  558 14:45:17.548761  Relocation complete.
  559 14:45:17.548844  New SMBASE 0x99ffe400
  560 14:45:17.552122  In relocation handler: CPU 7
  561 14:45:17.555275  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  562 14:45:17.561769  Writing SMRR. base = 0x9a000006, mask=0xff000800
  563 14:45:17.565575  Relocation complete.
  564 14:45:17.565670  New SMBASE 0x99ffe800
  565 14:45:17.568849  In relocation handler: CPU 6
  566 14:45:17.572077  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  567 14:45:17.578615  Writing SMRR. base = 0x9a000006, mask=0xff000800
  568 14:45:17.578700  Relocation complete.
  569 14:45:17.582013  Initializing CPU #0
  570 14:45:17.585159  CPU: vendor Intel device 806ec
  571 14:45:17.588328  CPU: family 06, model 8e, stepping 0c
  572 14:45:17.591710  Clearing out pending MCEs
  573 14:45:17.595365  Setting up local APIC...
  574 14:45:17.595449   apic_id: 0x00 done.
  575 14:45:17.598521  Turbo is available but hidden
  576 14:45:17.601933  Turbo is available and visible
  577 14:45:17.605156  VMX status: enabled
  578 14:45:17.608644  IA32_FEATURE_CONTROL status: locked
  579 14:45:17.611771  Skip microcode update
  580 14:45:17.611855  CPU #0 initialized
  581 14:45:17.615084  Initializing CPU #1
  582 14:45:17.618232  Initializing CPU #3
  583 14:45:17.618316  Initializing CPU #5
  584 14:45:17.622017  CPU: vendor Intel device 806ec
  585 14:45:17.625271  CPU: family 06, model 8e, stepping 0c
  586 14:45:17.628630  CPU: vendor Intel device 806ec
  587 14:45:17.631801  CPU: family 06, model 8e, stepping 0c
  588 14:45:17.635062  Clearing out pending MCEs
  589 14:45:17.638285  Clearing out pending MCEs
  590 14:45:17.641513  Setting up local APIC...
  591 14:45:17.641597  Initializing CPU #2
  592 14:45:17.644785  Initializing CPU #4
  593 14:45:17.648081  CPU: vendor Intel device 806ec
  594 14:45:17.651393  CPU: family 06, model 8e, stepping 0c
  595 14:45:17.654621  CPU: vendor Intel device 806ec
  596 14:45:17.657883  CPU: family 06, model 8e, stepping 0c
  597 14:45:17.661440  Clearing out pending MCEs
  598 14:45:17.665139  Clearing out pending MCEs
  599 14:45:17.665222  Setting up local APIC...
  600 14:45:17.668243  Initializing CPU #6
  601 14:45:17.671559  Initializing CPU #7
  602 14:45:17.674898  CPU: vendor Intel device 806ec
  603 14:45:17.678312  CPU: family 06, model 8e, stepping 0c
  604 14:45:17.681223  Setting up local APIC...
  605 14:45:17.684542  CPU: vendor Intel device 806ec
  606 14:45:17.687950  CPU: family 06, model 8e, stepping 0c
  607 14:45:17.688034  Clearing out pending MCEs
  608 14:45:17.691132   apic_id: 0x03 done.
  609 14:45:17.694506   apic_id: 0x02 done.
  610 14:45:17.694590  VMX status: enabled
  611 14:45:17.698089  VMX status: enabled
  612 14:45:17.701460  IA32_FEATURE_CONTROL status: locked
  613 14:45:17.704736  IA32_FEATURE_CONTROL status: locked
  614 14:45:17.708012  Skip microcode update
  615 14:45:17.711652  Skip microcode update
  616 14:45:17.711827  CPU #5 initialized
  617 14:45:17.714716  CPU #3 initialized
  618 14:45:17.714864  Clearing out pending MCEs
  619 14:45:17.717887  CPU: vendor Intel device 806ec
  620 14:45:17.724355  CPU: family 06, model 8e, stepping 0c
  621 14:45:17.724441  Setting up local APIC...
  622 14:45:17.727711   apic_id: 0x07 done.
  623 14:45:17.731119  Setting up local APIC...
  624 14:45:17.734276  Setting up local APIC...
  625 14:45:17.734360  Clearing out pending MCEs
  626 14:45:17.737500   apic_id: 0x05 done.
  627 14:45:17.741116  Setting up local APIC...
  628 14:45:17.741595   apic_id: 0x01 done.
  629 14:45:17.744806  VMX status: enabled
  630 14:45:17.748175   apic_id: 0x06 done.
  631 14:45:17.751460  IA32_FEATURE_CONTROL status: locked
  632 14:45:17.751949  VMX status: enabled
  633 14:45:17.754759  Skip microcode update
  634 14:45:17.757982  IA32_FEATURE_CONTROL status: locked
  635 14:45:17.761503  CPU #2 initialized
  636 14:45:17.761981   apic_id: 0x04 done.
  637 14:45:17.764721  VMX status: enabled
  638 14:45:17.768113  VMX status: enabled
  639 14:45:17.771369  IA32_FEATURE_CONTROL status: locked
  640 14:45:17.774868  IA32_FEATURE_CONTROL status: locked
  641 14:45:17.775452  Skip microcode update
  642 14:45:17.777941  Skip microcode update
  643 14:45:17.781318  CPU #6 initialized
  644 14:45:17.781901  CPU #7 initialized
  645 14:45:17.784378  VMX status: enabled
  646 14:45:17.787555  Skip microcode update
  647 14:45:17.790897  IA32_FEATURE_CONTROL status: locked
  648 14:45:17.791395  CPU #4 initialized
  649 14:45:17.794596  Skip microcode update
  650 14:45:17.797749  CPU #1 initialized
  651 14:45:17.801063  bsp_do_flight_plan done after 461 msecs.
  652 14:45:17.804661  CPU: frequency set to 4200 MHz
  653 14:45:17.805343  Enabling SMIs.
  654 14:45:17.807588  Locking SMM.
  655 14:45:17.820698  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  656 14:45:17.824456  CBFS @ c08000 size 3f8000
  657 14:45:17.831224  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  658 14:45:17.831404  CBFS: Locating 'vbt.bin'
  659 14:45:17.834458  CBFS: Found @ offset 5f5c0 size 499
  660 14:45:17.840956  Found a VBT of 4608 bytes after decompression
  661 14:45:18.024692  Display FSP Version Info HOB
  662 14:45:18.028035  Reference Code - CPU = 9.0.1e.30
  663 14:45:18.031499  uCode Version = 0.0.0.ca
  664 14:45:18.034665  TXT ACM version = ff.ff.ff.ffff
  665 14:45:18.037837  Display FSP Version Info HOB
  666 14:45:18.041153  Reference Code - ME = 9.0.1e.30
  667 14:45:18.044380  MEBx version = 0.0.0.0
  668 14:45:18.048173  ME Firmware Version = Consumer SKU
  669 14:45:18.051372  Display FSP Version Info HOB
  670 14:45:18.054503  Reference Code - CML PCH = 9.0.1e.30
  671 14:45:18.057889  PCH-CRID Status = Disabled
  672 14:45:18.061249  PCH-CRID Original Value = ff.ff.ff.ffff
  673 14:45:18.064502  PCH-CRID New Value = ff.ff.ff.ffff
  674 14:45:18.067741  OPROM - RST - RAID = ff.ff.ff.ffff
  675 14:45:18.070996  ChipsetInit Base Version = ff.ff.ff.ffff
  676 14:45:18.074758  ChipsetInit Oem Version = ff.ff.ff.ffff
  677 14:45:18.077916  Display FSP Version Info HOB
  678 14:45:18.084520  Reference Code - SA - System Agent = 9.0.1e.30
  679 14:45:18.087734  Reference Code - MRC = 0.7.1.6c
  680 14:45:18.088229  SA - PCIe Version = 9.0.1e.30
  681 14:45:18.090757  SA-CRID Status = Disabled
  682 14:45:18.094209  SA-CRID Original Value = 0.0.0.c
  683 14:45:18.097383  SA-CRID New Value = 0.0.0.c
  684 14:45:18.101227  OPROM - VBIOS = ff.ff.ff.ffff
  685 14:45:18.104390  RTC Init
  686 14:45:18.107413  Set power on after power failure.
  687 14:45:18.107904  Disabling Deep S3
  688 14:45:18.110812  Disabling Deep S3
  689 14:45:18.111296  Disabling Deep S4
  690 14:45:18.114110  Disabling Deep S4
  691 14:45:18.114592  Disabling Deep S5
  692 14:45:18.117395  Disabling Deep S5
  693 14:45:18.124034  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
  694 14:45:18.124619  Enumerating buses...
  695 14:45:18.130603  Show all devs... Before device enumeration.
  696 14:45:18.131176  Root Device: enabled 1
  697 14:45:18.133959  CPU_CLUSTER: 0: enabled 1
  698 14:45:18.137648  DOMAIN: 0000: enabled 1
  699 14:45:18.140444  APIC: 00: enabled 1
  700 14:45:18.141003  PCI: 00:00.0: enabled 1
  701 14:45:18.144435  PCI: 00:02.0: enabled 1
  702 14:45:18.147269  PCI: 00:04.0: enabled 0
  703 14:45:18.150438  PCI: 00:05.0: enabled 0
  704 14:45:18.150921  PCI: 00:12.0: enabled 1
  705 14:45:18.153609  PCI: 00:12.5: enabled 0
  706 14:45:18.157439  PCI: 00:12.6: enabled 0
  707 14:45:18.157921  PCI: 00:14.0: enabled 1
  708 14:45:18.160608  PCI: 00:14.1: enabled 0
  709 14:45:18.164188  PCI: 00:14.3: enabled 1
  710 14:45:18.167465  PCI: 00:14.5: enabled 0
  711 14:45:18.168053  PCI: 00:15.0: enabled 1
  712 14:45:18.170391  PCI: 00:15.1: enabled 1
  713 14:45:18.173493  PCI: 00:15.2: enabled 0
  714 14:45:18.177238  PCI: 00:15.3: enabled 0
  715 14:45:18.177726  PCI: 00:16.0: enabled 1
  716 14:45:18.180488  PCI: 00:16.1: enabled 0
  717 14:45:18.183440  PCI: 00:16.2: enabled 0
  718 14:45:18.186825  PCI: 00:16.3: enabled 0
  719 14:45:18.187323  PCI: 00:16.4: enabled 0
  720 14:45:18.190494  PCI: 00:16.5: enabled 0
  721 14:45:18.193780  PCI: 00:17.0: enabled 1
  722 14:45:18.197082  PCI: 00:19.0: enabled 1
  723 14:45:18.197562  PCI: 00:19.1: enabled 0
  724 14:45:18.200272  PCI: 00:19.2: enabled 0
  725 14:45:18.203675  PCI: 00:1a.0: enabled 0
  726 14:45:18.204155  PCI: 00:1c.0: enabled 0
  727 14:45:18.206656  PCI: 00:1c.1: enabled 0
  728 14:45:18.210489  PCI: 00:1c.2: enabled 0
  729 14:45:18.213233  PCI: 00:1c.3: enabled 0
  730 14:45:18.213718  PCI: 00:1c.4: enabled 0
  731 14:45:18.216612  PCI: 00:1c.5: enabled 0
  732 14:45:18.219997  PCI: 00:1c.6: enabled 0
  733 14:45:18.223653  PCI: 00:1c.7: enabled 0
  734 14:45:18.224130  PCI: 00:1d.0: enabled 1
  735 14:45:18.227003  PCI: 00:1d.1: enabled 0
  736 14:45:18.230271  PCI: 00:1d.2: enabled 0
  737 14:45:18.233251  PCI: 00:1d.3: enabled 0
  738 14:45:18.233815  PCI: 00:1d.4: enabled 0
  739 14:45:18.236886  PCI: 00:1d.5: enabled 1
  740 14:45:18.240069  PCI: 00:1e.0: enabled 1
  741 14:45:18.240542  PCI: 00:1e.1: enabled 0
  742 14:45:18.243386  PCI: 00:1e.2: enabled 1
  743 14:45:18.246674  PCI: 00:1e.3: enabled 1
  744 14:45:18.249870  PCI: 00:1f.0: enabled 1
  745 14:45:18.250347  PCI: 00:1f.1: enabled 1
  746 14:45:18.253102  PCI: 00:1f.2: enabled 1
  747 14:45:18.256588  PCI: 00:1f.3: enabled 1
  748 14:45:18.259844  PCI: 00:1f.4: enabled 1
  749 14:45:18.260331  PCI: 00:1f.5: enabled 1
  750 14:45:18.263209  PCI: 00:1f.6: enabled 0
  751 14:45:18.266522  USB0 port 0: enabled 1
  752 14:45:18.267001  I2C: 00:15: enabled 1
  753 14:45:18.269760  I2C: 00:5d: enabled 1
  754 14:45:18.273055  GENERIC: 0.0: enabled 1
  755 14:45:18.276192  I2C: 00:1a: enabled 1
  756 14:45:18.276691  I2C: 00:38: enabled 1
  757 14:45:18.280005  I2C: 00:39: enabled 1
  758 14:45:18.283082  I2C: 00:3a: enabled 1
  759 14:45:18.283570  I2C: 00:3b: enabled 1
  760 14:45:18.286198  PCI: 00:00.0: enabled 1
  761 14:45:18.289606  SPI: 00: enabled 1
  762 14:45:18.290099  SPI: 01: enabled 1
  763 14:45:18.293210  PNP: 0c09.0: enabled 1
  764 14:45:18.296639  USB2 port 0: enabled 1
  765 14:45:18.297143  USB2 port 1: enabled 1
  766 14:45:18.299946  USB2 port 2: enabled 0
  767 14:45:18.303410  USB2 port 3: enabled 0
  768 14:45:18.303985  USB2 port 5: enabled 0
  769 14:45:18.306508  USB2 port 6: enabled 1
  770 14:45:18.309482  USB2 port 9: enabled 1
  771 14:45:18.309962  USB3 port 0: enabled 1
  772 14:45:18.313159  USB3 port 1: enabled 1
  773 14:45:18.316473  USB3 port 2: enabled 1
  774 14:45:18.319713  USB3 port 3: enabled 1
  775 14:45:18.320191  USB3 port 4: enabled 0
  776 14:45:18.323254  APIC: 01: enabled 1
  777 14:45:18.326220  APIC: 07: enabled 1
  778 14:45:18.326701  APIC: 02: enabled 1
  779 14:45:18.329612  APIC: 06: enabled 1
  780 14:45:18.330091  APIC: 03: enabled 1
  781 14:45:18.332889  APIC: 05: enabled 1
  782 14:45:18.336136  APIC: 04: enabled 1
  783 14:45:18.336611  Compare with tree...
  784 14:45:18.339436  Root Device: enabled 1
  785 14:45:18.342647   CPU_CLUSTER: 0: enabled 1
  786 14:45:18.343128    APIC: 00: enabled 1
  787 14:45:18.345958    APIC: 01: enabled 1
  788 14:45:18.349147    APIC: 07: enabled 1
  789 14:45:18.352457    APIC: 02: enabled 1
  790 14:45:18.352936    APIC: 06: enabled 1
  791 14:45:18.356193    APIC: 03: enabled 1
  792 14:45:18.359334    APIC: 05: enabled 1
  793 14:45:18.359809    APIC: 04: enabled 1
  794 14:45:18.362650   DOMAIN: 0000: enabled 1
  795 14:45:18.366006    PCI: 00:00.0: enabled 1
  796 14:45:18.369323    PCI: 00:02.0: enabled 1
  797 14:45:18.369796    PCI: 00:04.0: enabled 0
  798 14:45:18.372665    PCI: 00:05.0: enabled 0
  799 14:45:18.375835    PCI: 00:12.0: enabled 1
  800 14:45:18.379028    PCI: 00:12.5: enabled 0
  801 14:45:18.382305    PCI: 00:12.6: enabled 0
  802 14:45:18.382788    PCI: 00:14.0: enabled 1
  803 14:45:18.385887     USB0 port 0: enabled 1
  804 14:45:18.388912      USB2 port 0: enabled 1
  805 14:45:18.392187      USB2 port 1: enabled 1
  806 14:45:18.395357      USB2 port 2: enabled 0
  807 14:45:18.395843      USB2 port 3: enabled 0
  808 14:45:18.399343      USB2 port 5: enabled 0
  809 14:45:18.402163      USB2 port 6: enabled 1
  810 14:45:18.405356      USB2 port 9: enabled 1
  811 14:45:18.408861      USB3 port 0: enabled 1
  812 14:45:18.412393      USB3 port 1: enabled 1
  813 14:45:18.412887      USB3 port 2: enabled 1
  814 14:45:18.415692      USB3 port 3: enabled 1
  815 14:45:18.419023      USB3 port 4: enabled 0
  816 14:45:18.421895    PCI: 00:14.1: enabled 0
  817 14:45:18.425273    PCI: 00:14.3: enabled 1
  818 14:45:18.425752    PCI: 00:14.5: enabled 0
  819 14:45:18.428620    PCI: 00:15.0: enabled 1
  820 14:45:18.431960     I2C: 00:15: enabled 1
  821 14:45:18.435120    PCI: 00:15.1: enabled 1
  822 14:45:18.438947     I2C: 00:5d: enabled 1
  823 14:45:18.439379     GENERIC: 0.0: enabled 1
  824 14:45:18.442336    PCI: 00:15.2: enabled 0
  825 14:45:18.445178    PCI: 00:15.3: enabled 0
  826 14:45:18.448696    PCI: 00:16.0: enabled 1
  827 14:45:18.451878    PCI: 00:16.1: enabled 0
  828 14:45:18.452312    PCI: 00:16.2: enabled 0
  829 14:45:18.455299    PCI: 00:16.3: enabled 0
  830 14:45:18.458572    PCI: 00:16.4: enabled 0
  831 14:45:18.461928    PCI: 00:16.5: enabled 0
  832 14:45:18.462476    PCI: 00:17.0: enabled 1
  833 14:45:18.465192    PCI: 00:19.0: enabled 1
  834 14:45:18.468609     I2C: 00:1a: enabled 1
  835 14:45:18.472248     I2C: 00:38: enabled 1
  836 14:45:18.475167     I2C: 00:39: enabled 1
  837 14:45:18.475758     I2C: 00:3a: enabled 1
  838 14:45:18.478211     I2C: 00:3b: enabled 1
  839 14:45:18.481908    PCI: 00:19.1: enabled 0
  840 14:45:18.485131    PCI: 00:19.2: enabled 0
  841 14:45:18.485618    PCI: 00:1a.0: enabled 0
  842 14:45:18.488524    PCI: 00:1c.0: enabled 0
  843 14:45:18.491442    PCI: 00:1c.1: enabled 0
  844 14:45:18.495068    PCI: 00:1c.2: enabled 0
  845 14:45:18.498524    PCI: 00:1c.3: enabled 0
  846 14:45:18.499064    PCI: 00:1c.4: enabled 0
  847 14:45:18.501720    PCI: 00:1c.5: enabled 0
  848 14:45:18.505110    PCI: 00:1c.6: enabled 0
  849 14:45:18.507960    PCI: 00:1c.7: enabled 0
  850 14:45:18.511847    PCI: 00:1d.0: enabled 1
  851 14:45:18.512389    PCI: 00:1d.1: enabled 0
  852 14:45:18.514781    PCI: 00:1d.2: enabled 0
  853 14:45:18.518133    PCI: 00:1d.3: enabled 0
  854 14:45:18.521317    PCI: 00:1d.4: enabled 0
  855 14:45:18.524702    PCI: 00:1d.5: enabled 1
  856 14:45:18.525182     PCI: 00:00.0: enabled 1
  857 14:45:18.528256    PCI: 00:1e.0: enabled 1
  858 14:45:18.531652    PCI: 00:1e.1: enabled 0
  859 14:45:18.534597    PCI: 00:1e.2: enabled 1
  860 14:45:18.535041     SPI: 00: enabled 1
  861 14:45:18.537863    PCI: 00:1e.3: enabled 1
  862 14:45:18.541108     SPI: 01: enabled 1
  863 14:45:18.544410    PCI: 00:1f.0: enabled 1
  864 14:45:18.547917     PNP: 0c09.0: enabled 1
  865 14:45:18.548472    PCI: 00:1f.1: enabled 1
  866 14:45:18.551155    PCI: 00:1f.2: enabled 1
  867 14:45:18.554388    PCI: 00:1f.3: enabled 1
  868 14:45:18.557676    PCI: 00:1f.4: enabled 1
  869 14:45:18.561269    PCI: 00:1f.5: enabled 1
  870 14:45:18.561737    PCI: 00:1f.6: enabled 0
  871 14:45:18.564820  Root Device scanning...
  872 14:45:18.568108  scan_static_bus for Root Device
  873 14:45:18.570925  CPU_CLUSTER: 0 enabled
  874 14:45:18.571373  DOMAIN: 0000 enabled
  875 14:45:18.574578  DOMAIN: 0000 scanning...
  876 14:45:18.578013  PCI: pci_scan_bus for bus 00
  877 14:45:18.581280  PCI: 00:00.0 [8086/0000] ops
  878 14:45:18.584209  PCI: 00:00.0 [8086/9b61] enabled
  879 14:45:18.587479  PCI: 00:02.0 [8086/0000] bus ops
  880 14:45:18.590722  PCI: 00:02.0 [8086/9b41] enabled
  881 14:45:18.594289  PCI: 00:04.0 [8086/1903] disabled
  882 14:45:18.597553  PCI: 00:08.0 [8086/1911] enabled
  883 14:45:18.601075  PCI: 00:12.0 [8086/02f9] enabled
  884 14:45:18.604591  PCI: 00:14.0 [8086/0000] bus ops
  885 14:45:18.607805  PCI: 00:14.0 [8086/02ed] enabled
  886 14:45:18.611090  PCI: 00:14.2 [8086/02ef] enabled
  887 14:45:18.614224  PCI: 00:14.3 [8086/02f0] enabled
  888 14:45:18.617485  PCI: 00:15.0 [8086/0000] bus ops
  889 14:45:18.620725  PCI: 00:15.0 [8086/02e8] enabled
  890 14:45:18.624446  PCI: 00:15.1 [8086/0000] bus ops
  891 14:45:18.627719  PCI: 00:15.1 [8086/02e9] enabled
  892 14:45:18.630876  PCI: 00:16.0 [8086/0000] ops
  893 14:45:18.634218  PCI: 00:16.0 [8086/02e0] enabled
  894 14:45:18.637615  PCI: 00:17.0 [8086/0000] ops
  895 14:45:18.640564  PCI: 00:17.0 [8086/02d3] enabled
  896 14:45:18.644383  PCI: 00:19.0 [8086/0000] bus ops
  897 14:45:18.647717  PCI: 00:19.0 [8086/02c5] enabled
  898 14:45:18.650421  PCI: 00:1d.0 [8086/0000] bus ops
  899 14:45:18.653871  PCI: 00:1d.0 [8086/02b0] enabled
  900 14:45:18.660374  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  901 14:45:18.663842  PCI: 00:1e.0 [8086/0000] ops
  902 14:45:18.667451  PCI: 00:1e.0 [8086/02a8] enabled
  903 14:45:18.670591  PCI: 00:1e.2 [8086/0000] bus ops
  904 14:45:18.673929  PCI: 00:1e.2 [8086/02aa] enabled
  905 14:45:18.677298  PCI: 00:1e.3 [8086/0000] bus ops
  906 14:45:18.680522  PCI: 00:1e.3 [8086/02ab] enabled
  907 14:45:18.683772  PCI: 00:1f.0 [8086/0000] bus ops
  908 14:45:18.686897  PCI: 00:1f.0 [8086/0284] enabled
  909 14:45:18.690726  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  910 14:45:18.696919  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  911 14:45:18.700273  PCI: 00:1f.3 [8086/0000] bus ops
  912 14:45:18.703381  PCI: 00:1f.3 [8086/02c8] enabled
  913 14:45:18.706832  PCI: 00:1f.4 [8086/0000] bus ops
  914 14:45:18.710170  PCI: 00:1f.4 [8086/02a3] enabled
  915 14:45:18.713473  PCI: 00:1f.5 [8086/0000] bus ops
  916 14:45:18.716622  PCI: 00:1f.5 [8086/02a4] enabled
  917 14:45:18.720333  PCI: Leftover static devices:
  918 14:45:18.720771  PCI: 00:05.0
  919 14:45:18.723613  PCI: 00:12.5
  920 14:45:18.724139  PCI: 00:12.6
  921 14:45:18.726835  PCI: 00:14.1
  922 14:45:18.727248  PCI: 00:14.5
  923 14:45:18.727587  PCI: 00:15.2
  924 14:45:18.730108  PCI: 00:15.3
  925 14:45:18.730551  PCI: 00:16.1
  926 14:45:18.733432  PCI: 00:16.2
  927 14:45:18.733871  PCI: 00:16.3
  928 14:45:18.734217  PCI: 00:16.4
  929 14:45:18.736969  PCI: 00:16.5
  930 14:45:18.737490  PCI: 00:19.1
  931 14:45:18.740051  PCI: 00:19.2
  932 14:45:18.740490  PCI: 00:1a.0
  933 14:45:18.743592  PCI: 00:1c.0
  934 14:45:18.744129  PCI: 00:1c.1
  935 14:45:18.744473  PCI: 00:1c.2
  936 14:45:18.746846  PCI: 00:1c.3
  937 14:45:18.747373  PCI: 00:1c.4
  938 14:45:18.750089  PCI: 00:1c.5
  939 14:45:18.750528  PCI: 00:1c.6
  940 14:45:18.750872  PCI: 00:1c.7
  941 14:45:18.753398  PCI: 00:1d.1
  942 14:45:18.753834  PCI: 00:1d.2
  943 14:45:18.756810  PCI: 00:1d.3
  944 14:45:18.757268  PCI: 00:1d.4
  945 14:45:18.757618  PCI: 00:1d.5
  946 14:45:18.760362  PCI: 00:1e.1
  947 14:45:18.760798  PCI: 00:1f.1
  948 14:45:18.763335  PCI: 00:1f.2
  949 14:45:18.763856  PCI: 00:1f.6
  950 14:45:18.766386  PCI: Check your devicetree.cb.
  951 14:45:18.770100  PCI: 00:02.0 scanning...
  952 14:45:18.773375  scan_generic_bus for PCI: 00:02.0
  953 14:45:18.776749  scan_generic_bus for PCI: 00:02.0 done
  954 14:45:18.783237  scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
  955 14:45:18.786495  PCI: 00:14.0 scanning...
  956 14:45:18.789662  scan_static_bus for PCI: 00:14.0
  957 14:45:18.790108  USB0 port 0 enabled
  958 14:45:18.792941  USB0 port 0 scanning...
  959 14:45:18.796299  scan_static_bus for USB0 port 0
  960 14:45:18.799440  USB2 port 0 enabled
  961 14:45:18.799877  USB2 port 1 enabled
  962 14:45:18.803228  USB2 port 2 disabled
  963 14:45:18.806560  USB2 port 3 disabled
  964 14:45:18.807000  USB2 port 5 disabled
  965 14:45:18.809805  USB2 port 6 enabled
  966 14:45:18.810241  USB2 port 9 enabled
  967 14:45:18.813224  USB3 port 0 enabled
  968 14:45:18.816141  USB3 port 1 enabled
  969 14:45:18.816576  USB3 port 2 enabled
  970 14:45:18.819587  USB3 port 3 enabled
  971 14:45:18.822853  USB3 port 4 disabled
  972 14:45:18.823293  USB2 port 0 scanning...
  973 14:45:18.826137  scan_static_bus for USB2 port 0
  974 14:45:18.832834  scan_static_bus for USB2 port 0 done
  975 14:45:18.836061  scan_bus: scanning of bus USB2 port 0 took 9702 usecs
  976 14:45:18.839236  USB2 port 1 scanning...
  977 14:45:18.842603  scan_static_bus for USB2 port 1
  978 14:45:18.845983  scan_static_bus for USB2 port 1 done
  979 14:45:18.852825  scan_bus: scanning of bus USB2 port 1 took 9713 usecs
  980 14:45:18.853305  USB2 port 6 scanning...
  981 14:45:18.856064  scan_static_bus for USB2 port 6
  982 14:45:18.862888  scan_static_bus for USB2 port 6 done
  983 14:45:18.866017  scan_bus: scanning of bus USB2 port 6 took 9709 usecs
  984 14:45:18.869228  USB2 port 9 scanning...
  985 14:45:18.872384  scan_static_bus for USB2 port 9
  986 14:45:18.875838  scan_static_bus for USB2 port 9 done
  987 14:45:18.882506  scan_bus: scanning of bus USB2 port 9 took 9711 usecs
  988 14:45:18.883014  USB3 port 0 scanning...
  989 14:45:18.886159  scan_static_bus for USB3 port 0
  990 14:45:18.892645  scan_static_bus for USB3 port 0 done
  991 14:45:18.895981  scan_bus: scanning of bus USB3 port 0 took 9703 usecs
  992 14:45:18.899382  USB3 port 1 scanning...
  993 14:45:18.902287  scan_static_bus for USB3 port 1
  994 14:45:18.905713  scan_static_bus for USB3 port 1 done
  995 14:45:18.912191  scan_bus: scanning of bus USB3 port 1 took 9712 usecs
  996 14:45:18.915497  USB3 port 2 scanning...
  997 14:45:18.918729  scan_static_bus for USB3 port 2
  998 14:45:18.922377  scan_static_bus for USB3 port 2 done
  999 14:45:18.925494  scan_bus: scanning of bus USB3 port 2 took 9704 usecs
 1000 14:45:18.928848  USB3 port 3 scanning...
 1001 14:45:18.932025  scan_static_bus for USB3 port 3
 1002 14:45:18.935459  scan_static_bus for USB3 port 3 done
 1003 14:45:18.942227  scan_bus: scanning of bus USB3 port 3 took 9707 usecs
 1004 14:45:18.945545  scan_static_bus for USB0 port 0 done
 1005 14:45:18.952378  scan_bus: scanning of bus USB0 port 0 took 155476 usecs
 1006 14:45:18.955718  scan_static_bus for PCI: 00:14.0 done
 1007 14:45:18.958754  scan_bus: scanning of bus PCI: 00:14.0 took 173089 usecs
 1008 14:45:18.961999  PCI: 00:15.0 scanning...
 1009 14:45:18.965644  scan_generic_bus for PCI: 00:15.0
 1010 14:45:18.972210  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1011 14:45:18.975567  scan_generic_bus for PCI: 00:15.0 done
 1012 14:45:18.978847  scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs
 1013 14:45:18.982065  PCI: 00:15.1 scanning...
 1014 14:45:18.985552  scan_generic_bus for PCI: 00:15.1
 1015 14:45:18.992135  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1016 14:45:18.995580  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1017 14:45:18.998771  scan_generic_bus for PCI: 00:15.1 done
 1018 14:45:19.005229  scan_bus: scanning of bus PCI: 00:15.1 took 18608 usecs
 1019 14:45:19.005712  PCI: 00:19.0 scanning...
 1020 14:45:19.011674  scan_generic_bus for PCI: 00:19.0
 1021 14:45:19.015114  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1022 14:45:19.018311  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1023 14:45:19.021677  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1024 14:45:19.025436  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1025 14:45:19.031989  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1026 14:45:19.035338  scan_generic_bus for PCI: 00:19.0 done
 1027 14:45:19.041835  scan_bus: scanning of bus PCI: 00:19.0 took 30771 usecs
 1028 14:45:19.042318  PCI: 00:1d.0 scanning...
 1029 14:45:19.048625  do_pci_scan_bridge for PCI: 00:1d.0
 1030 14:45:19.049217  PCI: pci_scan_bus for bus 01
 1031 14:45:19.051766  PCI: 01:00.0 [1c5c/1327] enabled
 1032 14:45:19.058356  Enabling Common Clock Configuration
 1033 14:45:19.061660  L1 Sub-State supported from root port 29
 1034 14:45:19.064894  L1 Sub-State Support = 0xf
 1035 14:45:19.068242  CommonModeRestoreTime = 0x28
 1036 14:45:19.071165  Power On Value = 0x16, Power On Scale = 0x0
 1037 14:45:19.071428  ASPM: Enabled L1
 1038 14:45:19.078310  scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs
 1039 14:45:19.081305  PCI: 00:1e.2 scanning...
 1040 14:45:19.084733  scan_generic_bus for PCI: 00:1e.2
 1041 14:45:19.088062  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1042 14:45:19.090920  scan_generic_bus for PCI: 00:1e.2 done
 1043 14:45:19.098167  scan_bus: scanning of bus PCI: 00:1e.2 took 14015 usecs
 1044 14:45:19.101275  PCI: 00:1e.3 scanning...
 1045 14:45:19.104391  scan_generic_bus for PCI: 00:1e.3
 1046 14:45:19.108101  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1047 14:45:19.111377  scan_generic_bus for PCI: 00:1e.3 done
 1048 14:45:19.117789  scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
 1049 14:45:19.121024  PCI: 00:1f.0 scanning...
 1050 14:45:19.124263  scan_static_bus for PCI: 00:1f.0
 1051 14:45:19.124548  PNP: 0c09.0 enabled
 1052 14:45:19.127605  scan_static_bus for PCI: 00:1f.0 done
 1053 14:45:19.134368  scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
 1054 14:45:19.137557  PCI: 00:1f.3 scanning...
 1055 14:45:19.144119  scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
 1056 14:45:19.144566  PCI: 00:1f.4 scanning...
 1057 14:45:19.151280  scan_generic_bus for PCI: 00:1f.4
 1058 14:45:19.154163  scan_generic_bus for PCI: 00:1f.4 done
 1059 14:45:19.157395  scan_bus: scanning of bus PCI: 00:1f.4 took 10204 usecs
 1060 14:45:19.161311  PCI: 00:1f.5 scanning...
 1061 14:45:19.164210  scan_generic_bus for PCI: 00:1f.5
 1062 14:45:19.167433  scan_generic_bus for PCI: 00:1f.5 done
 1063 14:45:19.173963  scan_bus: scanning of bus PCI: 00:1f.5 took 10203 usecs
 1064 14:45:19.181083  scan_bus: scanning of bus DOMAIN: 0000 took 605362 usecs
 1065 14:45:19.184352  scan_static_bus for Root Device done
 1066 14:45:19.190761  scan_bus: scanning of bus Root Device took 625257 usecs
 1067 14:45:19.191174  done
 1068 14:45:19.194202  Chrome EC: UHEPI supported
 1069 14:45:19.200708  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1070 14:45:19.203981  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1071 14:45:19.210391  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1072 14:45:19.218097  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1073 14:45:19.221202  SPI flash protection: WPSW=0 SRP0=0
 1074 14:45:19.228062  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1075 14:45:19.231182  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
 1076 14:45:19.234340  found VGA at PCI: 00:02.0
 1077 14:45:19.237905  Setting up VGA for PCI: 00:02.0
 1078 14:45:19.244239  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1079 14:45:19.247831  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1080 14:45:19.250986  Allocating resources...
 1081 14:45:19.254217  Reading resources...
 1082 14:45:19.257526  Root Device read_resources bus 0 link: 0
 1083 14:45:19.260741  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1084 14:45:19.267181  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1085 14:45:19.270439  DOMAIN: 0000 read_resources bus 0 link: 0
 1086 14:45:19.278590  PCI: 00:14.0 read_resources bus 0 link: 0
 1087 14:45:19.281932  USB0 port 0 read_resources bus 0 link: 0
 1088 14:45:19.289875  USB0 port 0 read_resources bus 0 link: 0 done
 1089 14:45:19.293134  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1090 14:45:19.300222  PCI: 00:15.0 read_resources bus 1 link: 0
 1091 14:45:19.303441  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1092 14:45:19.310429  PCI: 00:15.1 read_resources bus 2 link: 0
 1093 14:45:19.313779  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1094 14:45:19.320852  PCI: 00:19.0 read_resources bus 3 link: 0
 1095 14:45:19.327911  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1096 14:45:19.330969  PCI: 00:1d.0 read_resources bus 1 link: 0
 1097 14:45:19.337710  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1098 14:45:19.340984  PCI: 00:1e.2 read_resources bus 4 link: 0
 1099 14:45:19.347634  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1100 14:45:19.350931  PCI: 00:1e.3 read_resources bus 5 link: 0
 1101 14:45:19.357570  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1102 14:45:19.361147  PCI: 00:1f.0 read_resources bus 0 link: 0
 1103 14:45:19.367520  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1104 14:45:19.373783  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1105 14:45:19.377173  Root Device read_resources bus 0 link: 0 done
 1106 14:45:19.380817  Done reading resources.
 1107 14:45:19.384023  Show resources in subtree (Root Device)...After reading.
 1108 14:45:19.390731   Root Device child on link 0 CPU_CLUSTER: 0
 1109 14:45:19.394036    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1110 14:45:19.394515     APIC: 00
 1111 14:45:19.397371     APIC: 01
 1112 14:45:19.397842     APIC: 07
 1113 14:45:19.400642     APIC: 02
 1114 14:45:19.401150     APIC: 06
 1115 14:45:19.401530     APIC: 03
 1116 14:45:19.404299     APIC: 05
 1117 14:45:19.404776     APIC: 04
 1118 14:45:19.407539    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1119 14:45:19.417389    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1120 14:45:19.474071    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1121 14:45:19.474673     PCI: 00:00.0
 1122 14:45:19.475078     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1123 14:45:19.475846     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1124 14:45:19.476232     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1125 14:45:19.476582     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1126 14:45:19.484683     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1127 14:45:19.487641     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1128 14:45:19.494094     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1129 14:45:19.504061     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1130 14:45:19.513792     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1131 14:45:19.524149     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1132 14:45:19.530586     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1133 14:45:19.540222     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1134 14:45:19.550719     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1135 14:45:19.560190     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1136 14:45:19.570282     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1137 14:45:19.580877     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1138 14:45:19.581251     PCI: 00:02.0
 1139 14:45:19.590146     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1140 14:45:19.599908     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1141 14:45:19.610186     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1142 14:45:19.610449     PCI: 00:04.0
 1143 14:45:19.613545     PCI: 00:08.0
 1144 14:45:19.623837     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 14:45:19.624096     PCI: 00:12.0
 1146 14:45:19.633395     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1147 14:45:19.639912     PCI: 00:14.0 child on link 0 USB0 port 0
 1148 14:45:19.649746     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1149 14:45:19.653027      USB0 port 0 child on link 0 USB2 port 0
 1150 14:45:19.656432       USB2 port 0
 1151 14:45:19.656769       USB2 port 1
 1152 14:45:19.659783       USB2 port 2
 1153 14:45:19.660039       USB2 port 3
 1154 14:45:19.663185       USB2 port 5
 1155 14:45:19.663505       USB2 port 6
 1156 14:45:19.666424       USB2 port 9
 1157 14:45:19.666678       USB3 port 0
 1158 14:45:19.669777       USB3 port 1
 1159 14:45:19.670099       USB3 port 2
 1160 14:45:19.672996       USB3 port 3
 1161 14:45:19.673250       USB3 port 4
 1162 14:45:19.676275     PCI: 00:14.2
 1163 14:45:19.686371     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1164 14:45:19.696383     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1165 14:45:19.696651     PCI: 00:14.3
 1166 14:45:19.706284     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1167 14:45:19.713101     PCI: 00:15.0 child on link 0 I2C: 01:15
 1168 14:45:19.722942     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1169 14:45:19.723254      I2C: 01:15
 1170 14:45:19.729292     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1171 14:45:19.739596     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1172 14:45:19.739908      I2C: 02:5d
 1173 14:45:19.743050      GENERIC: 0.0
 1174 14:45:19.743398     PCI: 00:16.0
 1175 14:45:19.752771     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1176 14:45:19.755914     PCI: 00:17.0
 1177 14:45:19.762760     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1178 14:45:19.772789     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1179 14:45:19.779205     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1180 14:45:19.789561     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1181 14:45:19.799076     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1182 14:45:19.805580     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1183 14:45:19.812031     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1184 14:45:19.822387     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1185 14:45:19.822648      I2C: 03:1a
 1186 14:45:19.822904      I2C: 03:38
 1187 14:45:19.825606      I2C: 03:39
 1188 14:45:19.825839      I2C: 03:3a
 1189 14:45:19.828866      I2C: 03:3b
 1190 14:45:19.831803     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1191 14:45:19.842104     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1192 14:45:19.851959     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1193 14:45:19.862227     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1194 14:45:19.862570      PCI: 01:00.0
 1195 14:45:19.871840      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1196 14:45:19.875426     PCI: 00:1e.0
 1197 14:45:19.885231     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1198 14:45:19.894933     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1199 14:45:19.898107     PCI: 00:1e.2 child on link 0 SPI: 00
 1200 14:45:19.907919     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1201 14:45:19.911178      SPI: 00
 1202 14:45:19.915127     PCI: 00:1e.3 child on link 0 SPI: 01
 1203 14:45:19.924617     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1204 14:45:19.924880      SPI: 01
 1205 14:45:19.927721     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1206 14:45:19.938169     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1207 14:45:19.947894     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 14:45:19.948235      PNP: 0c09.0
 1209 14:45:19.958126      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 14:45:19.958378     PCI: 00:1f.3
 1211 14:45:19.967654     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 14:45:19.977899     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 14:45:19.981229     PCI: 00:1f.4
 1214 14:45:19.991020     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1215 14:45:20.001185     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1216 14:45:20.001438     PCI: 00:1f.5
 1217 14:45:20.011053     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1218 14:45:20.017472  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1219 14:45:20.024063  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1220 14:45:20.030557  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1221 14:45:20.033795  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1222 14:45:20.037313  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1223 14:45:20.040709  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1224 14:45:20.043975  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1225 14:45:20.050575  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1226 14:45:20.057140  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1227 14:45:20.067149  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1228 14:45:20.073675  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1229 14:45:20.080410  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1230 14:45:20.083542  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1231 14:45:20.093850  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1232 14:45:20.097112  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1233 14:45:20.104152  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1234 14:45:20.106829  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1235 14:45:20.113383  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1236 14:45:20.116777  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1237 14:45:20.123262  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1238 14:45:20.126746  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1239 14:45:20.129767  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1240 14:45:20.136759  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1241 14:45:20.140382  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1242 14:45:20.146724  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1243 14:45:20.149918  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1244 14:45:20.156562  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1245 14:45:20.159944  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1246 14:45:20.166661  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1247 14:45:20.169835  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1248 14:45:20.176425  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1249 14:45:20.180008  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1250 14:45:20.186295  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1251 14:45:20.189551  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1252 14:45:20.196194  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1253 14:45:20.199418  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1254 14:45:20.203180  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1255 14:45:20.212783  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1256 14:45:20.215998  avoid_fixed_resources: DOMAIN: 0000
 1257 14:45:20.223110  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1258 14:45:20.229239  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1259 14:45:20.236268  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1260 14:45:20.242389  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1261 14:45:20.252600  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1262 14:45:20.259257  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1263 14:45:20.265905  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1264 14:45:20.275888  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1265 14:45:20.282419  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1266 14:45:20.289162  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1267 14:45:20.295701  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1268 14:45:20.305579  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1269 14:45:20.306159  Setting resources...
 1270 14:45:20.312334  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1271 14:45:20.315665  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1272 14:45:20.322472  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1273 14:45:20.325726  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1274 14:45:20.328850  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1275 14:45:20.335487  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1276 14:45:20.342026  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1277 14:45:20.348488  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1278 14:45:20.355035  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1279 14:45:20.362194  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1280 14:45:20.365664  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1281 14:45:20.372273  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1282 14:45:20.375269  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1283 14:45:20.378673  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1284 14:45:20.385330  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1285 14:45:20.388247  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1286 14:45:20.395244  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1287 14:45:20.398633  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1288 14:45:20.405123  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1289 14:45:20.408211  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1290 14:45:20.414912  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1291 14:45:20.418011  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1292 14:45:20.424766  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1293 14:45:20.427977  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1294 14:45:20.434564  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1295 14:45:20.438314  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1296 14:45:20.445141  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1297 14:45:20.448057  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1298 14:45:20.454472  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1299 14:45:20.457678  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1300 14:45:20.461505  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1301 14:45:20.468271  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1302 14:45:20.474679  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1303 14:45:20.481275  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1304 14:45:20.491044  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1305 14:45:20.497501  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1306 14:45:20.501398  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1307 14:45:20.511246  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1308 14:45:20.514600  Root Device assign_resources, bus 0 link: 0
 1309 14:45:20.517718  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1310 14:45:20.528091  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1311 14:45:20.534411  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1312 14:45:20.544379  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1313 14:45:20.551558  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1314 14:45:20.561235  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1315 14:45:20.567663  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1316 14:45:20.574300  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1317 14:45:20.577540  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1318 14:45:20.584077  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1319 14:45:20.594066  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1320 14:45:20.600750  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1321 14:45:20.610668  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1322 14:45:20.613967  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1323 14:45:20.620647  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1324 14:45:20.627465  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1325 14:45:20.634126  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1326 14:45:20.637117  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1327 14:45:20.647157  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1328 14:45:20.653609  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1329 14:45:20.660169  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1330 14:45:20.670434  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1331 14:45:20.677070  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1332 14:45:20.683646  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1333 14:45:20.693364  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1334 14:45:20.700139  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1335 14:45:20.706762  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1336 14:45:20.709321  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1337 14:45:20.719755  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1338 14:45:20.726047  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1339 14:45:20.735838  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1340 14:45:20.739080  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1341 14:45:20.749583  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1342 14:45:20.752198  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1343 14:45:20.762592  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1344 14:45:20.768636  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1345 14:45:20.775756  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1346 14:45:20.779022  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1347 14:45:20.788745  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1348 14:45:20.792143  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1349 14:45:20.795075  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1350 14:45:20.802086  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1351 14:45:20.804898  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1352 14:45:20.812116  LPC: Trying to open IO window from 800 size 1ff
 1353 14:45:20.818804  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1354 14:45:20.828289  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1355 14:45:20.835322  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1356 14:45:20.845421  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1357 14:45:20.848209  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1358 14:45:20.855457  Root Device assign_resources, bus 0 link: 0
 1359 14:45:20.856018  Done setting resources.
 1360 14:45:20.861650  Show resources in subtree (Root Device)...After assigning values.
 1361 14:45:20.868040   Root Device child on link 0 CPU_CLUSTER: 0
 1362 14:45:20.871746    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1363 14:45:20.872309     APIC: 00
 1364 14:45:20.875061     APIC: 01
 1365 14:45:20.875636     APIC: 07
 1366 14:45:20.876006     APIC: 02
 1367 14:45:20.878179     APIC: 06
 1368 14:45:20.878675     APIC: 03
 1369 14:45:20.881353     APIC: 05
 1370 14:45:20.881818     APIC: 04
 1371 14:45:20.884654    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1372 14:45:20.894568    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1373 14:45:20.907981    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1374 14:45:20.908552     PCI: 00:00.0
 1375 14:45:20.917608     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1376 14:45:20.927552     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1377 14:45:20.937423     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1378 14:45:20.947374     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1379 14:45:20.954270     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1380 14:45:20.963872     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1381 14:45:20.974110     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1382 14:45:20.984006     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1383 14:45:20.993772     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1384 14:45:21.000131     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1385 14:45:21.009873     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1386 14:45:21.019677     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1387 14:45:21.029703     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1388 14:45:21.040000     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1389 14:45:21.049525     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1390 14:45:21.059578     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1391 14:45:21.060159     PCI: 00:02.0
 1392 14:45:21.069921     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1393 14:45:21.082848     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1394 14:45:21.089553     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1395 14:45:21.092798     PCI: 00:04.0
 1396 14:45:21.093417     PCI: 00:08.0
 1397 14:45:21.102583     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1398 14:45:21.105986     PCI: 00:12.0
 1399 14:45:21.115777     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1400 14:45:21.119289     PCI: 00:14.0 child on link 0 USB0 port 0
 1401 14:45:21.129080     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1402 14:45:21.135615      USB0 port 0 child on link 0 USB2 port 0
 1403 14:45:21.136214       USB2 port 0
 1404 14:45:21.139152       USB2 port 1
 1405 14:45:21.139714       USB2 port 2
 1406 14:45:21.142132       USB2 port 3
 1407 14:45:21.142594       USB2 port 5
 1408 14:45:21.145583       USB2 port 6
 1409 14:45:21.149422       USB2 port 9
 1410 14:45:21.149981       USB3 port 0
 1411 14:45:21.152772       USB3 port 1
 1412 14:45:21.153483       USB3 port 2
 1413 14:45:21.155918       USB3 port 3
 1414 14:45:21.156477       USB3 port 4
 1415 14:45:21.158966     PCI: 00:14.2
 1416 14:45:21.168715     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1417 14:45:21.179062     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1418 14:45:21.179668     PCI: 00:14.3
 1419 14:45:21.192211     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1420 14:45:21.195442     PCI: 00:15.0 child on link 0 I2C: 01:15
 1421 14:45:21.205022     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1422 14:45:21.205495      I2C: 01:15
 1423 14:45:21.211543     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1424 14:45:21.221937     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1425 14:45:21.222506      I2C: 02:5d
 1426 14:45:21.225111      GENERIC: 0.0
 1427 14:45:21.225737     PCI: 00:16.0
 1428 14:45:21.234936     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1429 14:45:21.238207     PCI: 00:17.0
 1430 14:45:21.248425     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1431 14:45:21.257913     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1432 14:45:21.268076     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1433 14:45:21.277620     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1434 14:45:21.284570     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1435 14:45:21.294572     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1436 14:45:21.301053     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1437 14:45:21.311128     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1438 14:45:21.311717      I2C: 03:1a
 1439 14:45:21.314214      I2C: 03:38
 1440 14:45:21.314689      I2C: 03:39
 1441 14:45:21.317413      I2C: 03:3a
 1442 14:45:21.317886      I2C: 03:3b
 1443 14:45:21.324589     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1444 14:45:21.330901     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1445 14:45:21.340763     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1446 14:45:21.353901     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1447 14:45:21.354493      PCI: 01:00.0
 1448 14:45:21.363500      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1449 14:45:21.367426     PCI: 00:1e.0
 1450 14:45:21.377451     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1451 14:45:21.386980     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1452 14:45:21.393581     PCI: 00:1e.2 child on link 0 SPI: 00
 1453 14:45:21.403270     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1454 14:45:21.403836      SPI: 00
 1455 14:45:21.406603     PCI: 00:1e.3 child on link 0 SPI: 01
 1456 14:45:21.416489     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1457 14:45:21.420035      SPI: 01
 1458 14:45:21.423005     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1459 14:45:21.433225     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1460 14:45:21.439525     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1461 14:45:21.443343      PNP: 0c09.0
 1462 14:45:21.453449      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1463 14:45:21.454038     PCI: 00:1f.3
 1464 14:45:21.463061     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1465 14:45:21.472925     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1466 14:45:21.476288     PCI: 00:1f.4
 1467 14:45:21.486046     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1468 14:45:21.495981     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1469 14:45:21.496544     PCI: 00:1f.5
 1470 14:45:21.505805     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1471 14:45:21.509122  Done allocating resources.
 1472 14:45:21.515587  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1473 14:45:21.519171  Enabling resources...
 1474 14:45:21.522069  PCI: 00:00.0 subsystem <- 8086/9b61
 1475 14:45:21.525443  PCI: 00:00.0 cmd <- 06
 1476 14:45:21.528687  PCI: 00:02.0 subsystem <- 8086/9b41
 1477 14:45:21.531862  PCI: 00:02.0 cmd <- 03
 1478 14:45:21.532336  PCI: 00:08.0 cmd <- 06
 1479 14:45:21.538723  PCI: 00:12.0 subsystem <- 8086/02f9
 1480 14:45:21.539205  PCI: 00:12.0 cmd <- 02
 1481 14:45:21.542025  PCI: 00:14.0 subsystem <- 8086/02ed
 1482 14:45:21.545209  PCI: 00:14.0 cmd <- 02
 1483 14:45:21.549239  PCI: 00:14.2 cmd <- 02
 1484 14:45:21.552300  PCI: 00:14.3 subsystem <- 8086/02f0
 1485 14:45:21.555698  PCI: 00:14.3 cmd <- 02
 1486 14:45:21.558732  PCI: 00:15.0 subsystem <- 8086/02e8
 1487 14:45:21.562042  PCI: 00:15.0 cmd <- 02
 1488 14:45:21.565156  PCI: 00:15.1 subsystem <- 8086/02e9
 1489 14:45:21.568570  PCI: 00:15.1 cmd <- 02
 1490 14:45:21.572397  PCI: 00:16.0 subsystem <- 8086/02e0
 1491 14:45:21.575243  PCI: 00:16.0 cmd <- 02
 1492 14:45:21.578267  PCI: 00:17.0 subsystem <- 8086/02d3
 1493 14:45:21.578746  PCI: 00:17.0 cmd <- 03
 1494 14:45:21.585335  PCI: 00:19.0 subsystem <- 8086/02c5
 1495 14:45:21.585897  PCI: 00:19.0 cmd <- 02
 1496 14:45:21.588671  PCI: 00:1d.0 bridge ctrl <- 0013
 1497 14:45:21.592086  PCI: 00:1d.0 subsystem <- 8086/02b0
 1498 14:45:21.595495  PCI: 00:1d.0 cmd <- 06
 1499 14:45:21.598654  PCI: 00:1e.0 subsystem <- 8086/02a8
 1500 14:45:21.602072  PCI: 00:1e.0 cmd <- 06
 1501 14:45:21.605315  PCI: 00:1e.2 subsystem <- 8086/02aa
 1502 14:45:21.608169  PCI: 00:1e.2 cmd <- 06
 1503 14:45:21.612226  PCI: 00:1e.3 subsystem <- 8086/02ab
 1504 14:45:21.614734  PCI: 00:1e.3 cmd <- 02
 1505 14:45:21.617994  PCI: 00:1f.0 subsystem <- 8086/0284
 1506 14:45:21.621349  PCI: 00:1f.0 cmd <- 407
 1507 14:45:21.624498  PCI: 00:1f.3 subsystem <- 8086/02c8
 1508 14:45:21.628064  PCI: 00:1f.3 cmd <- 02
 1509 14:45:21.631601  PCI: 00:1f.4 subsystem <- 8086/02a3
 1510 14:45:21.634884  PCI: 00:1f.4 cmd <- 03
 1511 14:45:21.638275  PCI: 00:1f.5 subsystem <- 8086/02a4
 1512 14:45:21.641302  PCI: 00:1f.5 cmd <- 406
 1513 14:45:21.648841  PCI: 01:00.0 cmd <- 02
 1514 14:45:21.654310  done.
 1515 14:45:21.665136  ME: Version: 14.0.39.1367
 1516 14:45:21.671571  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
 1517 14:45:21.675612  Initializing devices...
 1518 14:45:21.676185  Root Device init ...
 1519 14:45:21.681479  Chrome EC: Set SMI mask to 0x0000000000000000
 1520 14:45:21.685022  Chrome EC: clear events_b mask to 0x0000000000000000
 1521 14:45:21.691680  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1522 14:45:21.698740  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1523 14:45:21.704817  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1524 14:45:21.708084  Chrome EC: Set WAKE mask to 0x0000000000000000
 1525 14:45:21.714694  Root Device init finished in 35226 usecs
 1526 14:45:21.715171  CPU_CLUSTER: 0 init ...
 1527 14:45:21.721281  CPU_CLUSTER: 0 init finished in 2449 usecs
 1528 14:45:21.726216  PCI: 00:00.0 init ...
 1529 14:45:21.729117  CPU TDP: 15 Watts
 1530 14:45:21.732418  CPU PL2 = 64 Watts
 1531 14:45:21.736137  PCI: 00:00.0 init finished in 7078 usecs
 1532 14:45:21.739335  PCI: 00:02.0 init ...
 1533 14:45:21.742703  PCI: 00:02.0 init finished in 2255 usecs
 1534 14:45:21.745659  PCI: 00:08.0 init ...
 1535 14:45:21.748994  PCI: 00:08.0 init finished in 2253 usecs
 1536 14:45:21.752187  PCI: 00:12.0 init ...
 1537 14:45:21.755388  PCI: 00:12.0 init finished in 2254 usecs
 1538 14:45:21.759083  PCI: 00:14.0 init ...
 1539 14:45:21.762332  PCI: 00:14.0 init finished in 2245 usecs
 1540 14:45:21.765532  PCI: 00:14.2 init ...
 1541 14:45:21.768911  PCI: 00:14.2 init finished in 2245 usecs
 1542 14:45:21.772292  PCI: 00:14.3 init ...
 1543 14:45:21.775218  PCI: 00:14.3 init finished in 2269 usecs
 1544 14:45:21.778459  PCI: 00:15.0 init ...
 1545 14:45:21.781668  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1546 14:45:21.784905  PCI: 00:15.0 init finished in 5979 usecs
 1547 14:45:21.788601  PCI: 00:15.1 init ...
 1548 14:45:21.792237  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1549 14:45:21.798918  PCI: 00:15.1 init finished in 5980 usecs
 1550 14:45:21.799399  PCI: 00:16.0 init ...
 1551 14:45:21.805166  PCI: 00:16.0 init finished in 2244 usecs
 1552 14:45:21.808407  PCI: 00:19.0 init ...
 1553 14:45:21.812180  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1554 14:45:21.815233  PCI: 00:19.0 init finished in 5979 usecs
 1555 14:45:21.818458  PCI: 00:1d.0 init ...
 1556 14:45:21.821693  Initializing PCH PCIe bridge.
 1557 14:45:21.824924  PCI: 00:1d.0 init finished in 5286 usecs
 1558 14:45:21.828886  PCI: 00:1f.0 init ...
 1559 14:45:21.831571  IOAPIC: Initializing IOAPIC at 0xfec00000
 1560 14:45:21.838439  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1561 14:45:21.839045  IOAPIC: ID = 0x02
 1562 14:45:21.841669  IOAPIC: Dumping registers
 1563 14:45:21.845007    reg 0x0000: 0x02000000
 1564 14:45:21.848161    reg 0x0001: 0x00770020
 1565 14:45:21.848636    reg 0x0002: 0x00000000
 1566 14:45:21.854612  PCI: 00:1f.0 init finished in 23586 usecs
 1567 14:45:21.857959  PCI: 00:1f.4 init ...
 1568 14:45:21.861303  PCI: 00:1f.4 init finished in 2264 usecs
 1569 14:45:21.872236  PCI: 01:00.0 init ...
 1570 14:45:21.875362  PCI: 01:00.0 init finished in 2254 usecs
 1571 14:45:21.879584  PNP: 0c09.0 init ...
 1572 14:45:21.882968  Google Chrome EC uptime: 11.087 seconds
 1573 14:45:21.889853  Google Chrome AP resets since EC boot: 0
 1574 14:45:21.892796  Google Chrome most recent AP reset causes:
 1575 14:45:21.899330  Google Chrome EC reset flags at last EC boot: reset-pin
 1576 14:45:21.902546  PNP: 0c09.0 init finished in 20575 usecs
 1577 14:45:21.905757  Devices initialized
 1578 14:45:21.909117  Show all devs... After init.
 1579 14:45:21.909692  Root Device: enabled 1
 1580 14:45:21.912472  CPU_CLUSTER: 0: enabled 1
 1581 14:45:21.915867  DOMAIN: 0000: enabled 1
 1582 14:45:21.916444  APIC: 00: enabled 1
 1583 14:45:21.918944  PCI: 00:00.0: enabled 1
 1584 14:45:21.922177  PCI: 00:02.0: enabled 1
 1585 14:45:21.925787  PCI: 00:04.0: enabled 0
 1586 14:45:21.926259  PCI: 00:05.0: enabled 0
 1587 14:45:21.929175  PCI: 00:12.0: enabled 1
 1588 14:45:21.931952  PCI: 00:12.5: enabled 0
 1589 14:45:21.935862  PCI: 00:12.6: enabled 0
 1590 14:45:21.936496  PCI: 00:14.0: enabled 1
 1591 14:45:21.938984  PCI: 00:14.1: enabled 0
 1592 14:45:21.942487  PCI: 00:14.3: enabled 1
 1593 14:45:21.945498  PCI: 00:14.5: enabled 0
 1594 14:45:21.945967  PCI: 00:15.0: enabled 1
 1595 14:45:21.948823  PCI: 00:15.1: enabled 1
 1596 14:45:21.952021  PCI: 00:15.2: enabled 0
 1597 14:45:21.952551  PCI: 00:15.3: enabled 0
 1598 14:45:21.955130  PCI: 00:16.0: enabled 1
 1599 14:45:21.958502  PCI: 00:16.1: enabled 0
 1600 14:45:21.961839  PCI: 00:16.2: enabled 0
 1601 14:45:21.962326  PCI: 00:16.3: enabled 0
 1602 14:45:21.965576  PCI: 00:16.4: enabled 0
 1603 14:45:21.969166  PCI: 00:16.5: enabled 0
 1604 14:45:21.972233  PCI: 00:17.0: enabled 1
 1605 14:45:21.972806  PCI: 00:19.0: enabled 1
 1606 14:45:21.975313  PCI: 00:19.1: enabled 0
 1607 14:45:21.978786  PCI: 00:19.2: enabled 0
 1608 14:45:21.982184  PCI: 00:1a.0: enabled 0
 1609 14:45:21.982749  PCI: 00:1c.0: enabled 0
 1610 14:45:21.985442  PCI: 00:1c.1: enabled 0
 1611 14:45:21.988614  PCI: 00:1c.2: enabled 0
 1612 14:45:21.991818  PCI: 00:1c.3: enabled 0
 1613 14:45:21.992341  PCI: 00:1c.4: enabled 0
 1614 14:45:21.994987  PCI: 00:1c.5: enabled 0
 1615 14:45:21.998654  PCI: 00:1c.6: enabled 0
 1616 14:45:21.999133  PCI: 00:1c.7: enabled 0
 1617 14:45:22.001855  PCI: 00:1d.0: enabled 1
 1618 14:45:22.005257  PCI: 00:1d.1: enabled 0
 1619 14:45:22.008515  PCI: 00:1d.2: enabled 0
 1620 14:45:22.009025  PCI: 00:1d.3: enabled 0
 1621 14:45:22.011892  PCI: 00:1d.4: enabled 0
 1622 14:45:22.015253  PCI: 00:1d.5: enabled 0
 1623 14:45:22.018656  PCI: 00:1e.0: enabled 1
 1624 14:45:22.019136  PCI: 00:1e.1: enabled 0
 1625 14:45:22.021826  PCI: 00:1e.2: enabled 1
 1626 14:45:22.025035  PCI: 00:1e.3: enabled 1
 1627 14:45:22.028158  PCI: 00:1f.0: enabled 1
 1628 14:45:22.028628  PCI: 00:1f.1: enabled 0
 1629 14:45:22.031459  PCI: 00:1f.2: enabled 0
 1630 14:45:22.034777  PCI: 00:1f.3: enabled 1
 1631 14:45:22.035250  PCI: 00:1f.4: enabled 1
 1632 14:45:22.038228  PCI: 00:1f.5: enabled 1
 1633 14:45:22.041548  PCI: 00:1f.6: enabled 0
 1634 14:45:22.044697  USB0 port 0: enabled 1
 1635 14:45:22.045210  I2C: 01:15: enabled 1
 1636 14:45:22.047935  I2C: 02:5d: enabled 1
 1637 14:45:22.051246  GENERIC: 0.0: enabled 1
 1638 14:45:22.051717  I2C: 03:1a: enabled 1
 1639 14:45:22.054473  I2C: 03:38: enabled 1
 1640 14:45:22.058286  I2C: 03:39: enabled 1
 1641 14:45:22.058757  I2C: 03:3a: enabled 1
 1642 14:45:22.061090  I2C: 03:3b: enabled 1
 1643 14:45:22.064843  PCI: 00:00.0: enabled 1
 1644 14:45:22.065374  SPI: 00: enabled 1
 1645 14:45:22.068478  SPI: 01: enabled 1
 1646 14:45:22.071606  PNP: 0c09.0: enabled 1
 1647 14:45:22.072187  USB2 port 0: enabled 1
 1648 14:45:22.074770  USB2 port 1: enabled 1
 1649 14:45:22.077835  USB2 port 2: enabled 0
 1650 14:45:22.081064  USB2 port 3: enabled 0
 1651 14:45:22.081542  USB2 port 5: enabled 0
 1652 14:45:22.084449  USB2 port 6: enabled 1
 1653 14:45:22.087815  USB2 port 9: enabled 1
 1654 14:45:22.088297  USB3 port 0: enabled 1
 1655 14:45:22.091193  USB3 port 1: enabled 1
 1656 14:45:22.094564  USB3 port 2: enabled 1
 1657 14:45:22.097807  USB3 port 3: enabled 1
 1658 14:45:22.098337  USB3 port 4: enabled 0
 1659 14:45:22.101025  APIC: 01: enabled 1
 1660 14:45:22.101620  APIC: 07: enabled 1
 1661 14:45:22.104213  APIC: 02: enabled 1
 1662 14:45:22.107486  APIC: 06: enabled 1
 1663 14:45:22.107964  APIC: 03: enabled 1
 1664 14:45:22.110766  APIC: 05: enabled 1
 1665 14:45:22.113983  APIC: 04: enabled 1
 1666 14:45:22.114471  PCI: 00:08.0: enabled 1
 1667 14:45:22.117387  PCI: 00:14.2: enabled 1
 1668 14:45:22.120660  PCI: 01:00.0: enabled 1
 1669 14:45:22.124514  Disabling ACPI via APMC:
 1670 14:45:22.127424  done.
 1671 14:45:22.131137  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1672 14:45:22.134007  ELOG: NV offset 0xaf0000 size 0x4000
 1673 14:45:22.141244  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1674 14:45:22.148101  ELOG: Event(17) added with size 13 at 2022-07-26 14:45:03 UTC
 1675 14:45:22.154403  ELOG: Event(92) added with size 9 at 2022-07-26 14:45:03 UTC
 1676 14:45:22.161447  ELOG: Event(93) added with size 9 at 2022-07-26 14:45:03 UTC
 1677 14:45:22.167794  ELOG: Event(9A) added with size 9 at 2022-07-26 14:45:03 UTC
 1678 14:45:22.174277  ELOG: Event(9E) added with size 10 at 2022-07-26 14:45:03 UTC
 1679 14:45:22.180782  ELOG: Event(9F) added with size 14 at 2022-07-26 14:45:03 UTC
 1680 14:45:22.184487  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
 1681 14:45:22.191585  ELOG: Event(A1) added with size 10 at 2022-07-26 14:45:03 UTC
 1682 14:45:22.201185  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1683 14:45:22.208385  ELOG: Event(A0) added with size 9 at 2022-07-26 14:45:03 UTC
 1684 14:45:22.211604  elog_add_boot_reason: Logged dev mode boot
 1685 14:45:22.214960  Finalize devices...
 1686 14:45:22.215438  PCI: 00:17.0 final
 1687 14:45:22.218175  Devices finalized
 1688 14:45:22.221503  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1689 14:45:22.228416  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1690 14:45:22.231429  ME: HFSTS1                  : 0x90000245
 1691 14:45:22.234830  ME: HFSTS2                  : 0x3B850126
 1692 14:45:22.241369  ME: HFSTS3                  : 0x00000020
 1693 14:45:22.245066  ME: HFSTS4                  : 0x00004800
 1694 14:45:22.247821  ME: HFSTS5                  : 0x00000000
 1695 14:45:22.251382  ME: HFSTS6                  : 0x40400006
 1696 14:45:22.254455  ME: Manufacturing Mode      : NO
 1697 14:45:22.257787  ME: FW Partition Table      : OK
 1698 14:45:22.261014  ME: Bringup Loader Failure  : NO
 1699 14:45:22.264591  ME: Firmware Init Complete  : YES
 1700 14:45:22.267882  ME: Boot Options Present    : NO
 1701 14:45:22.271237  ME: Update In Progress      : NO
 1702 14:45:22.274529  ME: D0i3 Support            : YES
 1703 14:45:22.277728  ME: Low Power State Enabled : NO
 1704 14:45:22.280846  ME: CPU Replaced            : NO
 1705 14:45:22.284308  ME: CPU Replacement Valid   : YES
 1706 14:45:22.287535  ME: Current Working State   : 5
 1707 14:45:22.290813  ME: Current Operation State : 1
 1708 14:45:22.293901  ME: Current Operation Mode  : 0
 1709 14:45:22.297157  ME: Error Code              : 0
 1710 14:45:22.300532  ME: CPU Debug Disabled      : YES
 1711 14:45:22.304158  ME: TXT Support             : NO
 1712 14:45:22.310130  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1713 14:45:22.317068  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1714 14:45:22.317548  CBFS @ c08000 size 3f8000
 1715 14:45:22.323792  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1716 14:45:22.327281  CBFS: Locating 'fallback/dsdt.aml'
 1717 14:45:22.330761  CBFS: Found @ offset 10bb80 size 3fa5
 1718 14:45:22.337254  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1719 14:45:22.340541  CBFS @ c08000 size 3f8000
 1720 14:45:22.347163  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1721 14:45:22.347644  CBFS: Locating 'fallback/slic'
 1722 14:45:22.351936  CBFS: 'fallback/slic' not found.
 1723 14:45:22.358647  ACPI: Writing ACPI tables at 99b3e000.
 1724 14:45:22.359127  ACPI:    * FACS
 1725 14:45:22.362022  ACPI:    * DSDT
 1726 14:45:22.365256  Ramoops buffer: 0x100000@0x99a3d000.
 1727 14:45:22.368445  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1728 14:45:22.375870  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1729 14:45:22.378832  Google Chrome EC: version:
 1730 14:45:22.382115  	ro: helios_v2.0.2659-56403530b
 1731 14:45:22.384854  	rw: helios_v2.0.2849-c41de27e7d
 1732 14:45:22.385361    running image: 1
 1733 14:45:22.389701  ACPI:    * FADT
 1734 14:45:22.390180  SCI is IRQ9
 1735 14:45:22.396315  ACPI: added table 1/32, length now 40
 1736 14:45:22.396792  ACPI:     * SSDT
 1737 14:45:22.399577  Found 1 CPU(s) with 8 core(s) each.
 1738 14:45:22.402897  Error: Could not locate 'wifi_sar' in VPD.
 1739 14:45:22.409333  Checking CBFS for default SAR values
 1740 14:45:22.412552  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1741 14:45:22.415871  CBFS @ c08000 size 3f8000
 1742 14:45:22.422781  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1743 14:45:22.425974  CBFS: Locating 'wifi_sar_defaults.hex'
 1744 14:45:22.429612  CBFS: Found @ offset 5fac0 size 77
 1745 14:45:22.432548  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1746 14:45:22.438996  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1747 14:45:22.442689  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1748 14:45:22.449289  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1749 14:45:22.452636  failed to find key in VPD: dsm_calib_r0_0
 1750 14:45:22.462549  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1751 14:45:22.465846  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1752 14:45:22.469111  failed to find key in VPD: dsm_calib_r0_1
 1753 14:45:22.478886  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1754 14:45:22.485666  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1755 14:45:22.488675  failed to find key in VPD: dsm_calib_r0_2
 1756 14:45:22.498585  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1757 14:45:22.501734  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1758 14:45:22.508808  failed to find key in VPD: dsm_calib_r0_3
 1759 14:45:22.515601  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1760 14:45:22.522183  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1761 14:45:22.525229  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1762 14:45:22.528569  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1763 14:45:22.532398  EC returned error result code 1
 1764 14:45:22.536387  EC returned error result code 1
 1765 14:45:22.540191  EC returned error result code 1
 1766 14:45:22.546738  PS2K: Bad resp from EC. Vivaldi disabled!
 1767 14:45:22.550113  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1768 14:45:22.556408  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1769 14:45:22.562982  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1770 14:45:22.566133  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1771 14:45:22.573121  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1772 14:45:22.579620  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1773 14:45:22.586580  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1774 14:45:22.589672  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1775 14:45:22.596229  ACPI: added table 2/32, length now 44
 1776 14:45:22.596790  ACPI:    * MCFG
 1777 14:45:22.599657  ACPI: added table 3/32, length now 48
 1778 14:45:22.603031  ACPI:    * TPM2
 1779 14:45:22.606121  TPM2 log created at 99a2d000
 1780 14:45:22.609471  ACPI: added table 4/32, length now 52
 1781 14:45:22.609963  ACPI:    * MADT
 1782 14:45:22.612792  SCI is IRQ9
 1783 14:45:22.616024  ACPI: added table 5/32, length now 56
 1784 14:45:22.616499  current = 99b43ac0
 1785 14:45:22.619314  ACPI:    * DMAR
 1786 14:45:22.622810  ACPI: added table 6/32, length now 60
 1787 14:45:22.626010  ACPI:    * IGD OpRegion
 1788 14:45:22.626589  GMA: Found VBT in CBFS
 1789 14:45:22.629493  GMA: Found valid VBT in CBFS
 1790 14:45:22.632621  ACPI: added table 7/32, length now 64
 1791 14:45:22.635722  ACPI:    * HPET
 1792 14:45:22.639108  ACPI: added table 8/32, length now 68
 1793 14:45:22.639588  ACPI: done.
 1794 14:45:22.643088  ACPI tables: 31744 bytes.
 1795 14:45:22.646043  smbios_write_tables: 99a2c000
 1796 14:45:22.649325  EC returned error result code 3
 1797 14:45:22.652685  Couldn't obtain OEM name from CBI
 1798 14:45:22.656335  Create SMBIOS type 17
 1799 14:45:22.659246  PCI: 00:00.0 (Intel Cannonlake)
 1800 14:45:22.662360  PCI: 00:14.3 (Intel WiFi)
 1801 14:45:22.666243  SMBIOS tables: 939 bytes.
 1802 14:45:22.669279  Writing table forward entry at 0x00000500
 1803 14:45:22.675806  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1804 14:45:22.679067  Writing coreboot table at 0x99b62000
 1805 14:45:22.685880   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1806 14:45:22.689313   1. 0000000000001000-000000000009ffff: RAM
 1807 14:45:22.692251   2. 00000000000a0000-00000000000fffff: RESERVED
 1808 14:45:22.699279   3. 0000000000100000-0000000099a2bfff: RAM
 1809 14:45:22.705826   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1810 14:45:22.709059   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1811 14:45:22.715459   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1812 14:45:22.718730   7. 000000009a000000-000000009f7fffff: RESERVED
 1813 14:45:22.725453   8. 00000000e0000000-00000000efffffff: RESERVED
 1814 14:45:22.728778   9. 00000000fc000000-00000000fc000fff: RESERVED
 1815 14:45:22.735465  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1816 14:45:22.738755  11. 00000000fed10000-00000000fed17fff: RESERVED
 1817 14:45:22.742055  12. 00000000fed80000-00000000fed83fff: RESERVED
 1818 14:45:22.748608  13. 00000000fed90000-00000000fed91fff: RESERVED
 1819 14:45:22.751855  14. 00000000feda0000-00000000feda1fff: RESERVED
 1820 14:45:22.758222  15. 0000000100000000-000000045e7fffff: RAM
 1821 14:45:22.762048  Graphics framebuffer located at 0xc0000000
 1822 14:45:22.765242  Passing 5 GPIOs to payload:
 1823 14:45:22.768509              NAME |       PORT | POLARITY |     VALUE
 1824 14:45:22.775089     write protect |  undefined |     high |       low
 1825 14:45:22.781522               lid |  undefined |     high |      high
 1826 14:45:22.784835             power |  undefined |     high |       low
 1827 14:45:22.791706             oprom |  undefined |     high |       low
 1828 14:45:22.794956          EC in RW | 0x000000cb |     high |       low
 1829 14:45:22.798012  Board ID: 4
 1830 14:45:22.801700  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1831 14:45:22.804906  CBFS @ c08000 size 3f8000
 1832 14:45:22.811696  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1833 14:45:22.817983  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b60
 1834 14:45:22.818505  coreboot table: 1492 bytes.
 1835 14:45:22.821260  IMD ROOT    0. 99fff000 00001000
 1836 14:45:22.827875  IMD SMALL   1. 99ffe000 00001000
 1837 14:45:22.830964  FSP MEMORY  2. 99c4e000 003b0000
 1838 14:45:22.834337  CONSOLE     3. 99c2e000 00020000
 1839 14:45:22.837805  FMAP        4. 99c2d000 0000054e
 1840 14:45:22.841168  TIME STAMP  5. 99c2c000 00000910
 1841 14:45:22.844288  VBOOT WORK  6. 99c18000 00014000
 1842 14:45:22.847598  MRC DATA    7. 99c16000 00001958
 1843 14:45:22.850954  ROMSTG STCK 8. 99c15000 00001000
 1844 14:45:22.854225  AFTER CAR   9. 99c0b000 0000a000
 1845 14:45:22.857430  RAMSTAGE   10. 99baf000 0005c000
 1846 14:45:22.861107  REFCODE    11. 99b7a000 00035000
 1847 14:45:22.864644  SMM BACKUP 12. 99b6a000 00010000
 1848 14:45:22.867531  COREBOOT   13. 99b62000 00008000
 1849 14:45:22.870683  ACPI       14. 99b3e000 00024000
 1850 14:45:22.874393  ACPI GNVS  15. 99b3d000 00001000
 1851 14:45:22.877828  RAMOOPS    16. 99a3d000 00100000
 1852 14:45:22.881181  TPM2 TCGLOG17. 99a2d000 00010000
 1853 14:45:22.884354  SMBIOS     18. 99a2c000 00000800
 1854 14:45:22.884833  IMD small region:
 1855 14:45:22.887453    IMD ROOT    0. 99ffec00 00000400
 1856 14:45:22.890576    FSP RUNTIME 1. 99ffebe0 00000004
 1857 14:45:22.894335    EC HOSTEVENT 2. 99ffebc0 00000008
 1858 14:45:22.897662    POWER STATE 3. 99ffeb80 00000040
 1859 14:45:22.900919    ROMSTAGE    4. 99ffeb60 00000004
 1860 14:45:22.907422    MEM INFO    5. 99ffe9a0 000001b9
 1861 14:45:22.910681    VPD         6. 99ffe960 00000036
 1862 14:45:22.913731  MTRR: Physical address space:
 1863 14:45:22.917138  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1864 14:45:22.924062  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1865 14:45:22.930514  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1866 14:45:22.937178  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1867 14:45:22.943652  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1868 14:45:22.950416  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1869 14:45:22.957457  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1870 14:45:22.960048  MTRR: Fixed MSR 0x250 0x0606060606060606
 1871 14:45:22.963429  MTRR: Fixed MSR 0x258 0x0606060606060606
 1872 14:45:22.966610  MTRR: Fixed MSR 0x259 0x0000000000000000
 1873 14:45:22.973509  MTRR: Fixed MSR 0x268 0x0606060606060606
 1874 14:45:22.976739  MTRR: Fixed MSR 0x269 0x0606060606060606
 1875 14:45:22.980119  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1876 14:45:22.983328  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1877 14:45:22.990185  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1878 14:45:22.993160  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1879 14:45:22.996500  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1880 14:45:22.999716  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1881 14:45:23.003533  call enable_fixed_mtrr()
 1882 14:45:23.007048  CPU physical address size: 39 bits
 1883 14:45:23.013629  MTRR: default type WB/UC MTRR counts: 6/8.
 1884 14:45:23.017101  MTRR: WB selected as default type.
 1885 14:45:23.023628  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1886 14:45:23.026933  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1887 14:45:23.033636  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1888 14:45:23.040307  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1889 14:45:23.046701  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1890 14:45:23.053254  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1891 14:45:23.056503  MTRR: Fixed MSR 0x250 0x0606060606060606
 1892 14:45:23.063038  MTRR: Fixed MSR 0x258 0x0606060606060606
 1893 14:45:23.066219  MTRR: Fixed MSR 0x259 0x0000000000000000
 1894 14:45:23.069613  MTRR: Fixed MSR 0x268 0x0606060606060606
 1895 14:45:23.073326  MTRR: Fixed MSR 0x269 0x0606060606060606
 1896 14:45:23.079732  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1897 14:45:23.083532  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1898 14:45:23.086367  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1899 14:45:23.089703  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1900 14:45:23.095972  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1901 14:45:23.099797  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1902 14:45:23.100275  
 1903 14:45:23.100655  MTRR check
 1904 14:45:23.103056  Fixed MTRRs   : Enabled
 1905 14:45:23.106198  Variable MTRRs: Enabled
 1906 14:45:23.106673  
 1907 14:45:23.109516  call enable_fixed_mtrr()
 1908 14:45:23.112751  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1909 14:45:23.115996  CPU physical address size: 39 bits
 1910 14:45:23.123025  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1911 14:45:23.126332  MTRR: Fixed MSR 0x250 0x0606060606060606
 1912 14:45:23.129575  MTRR: Fixed MSR 0x250 0x0606060606060606
 1913 14:45:23.136110  MTRR: Fixed MSR 0x258 0x0606060606060606
 1914 14:45:23.139421  MTRR: Fixed MSR 0x259 0x0000000000000000
 1915 14:45:23.142970  MTRR: Fixed MSR 0x268 0x0606060606060606
 1916 14:45:23.146084  MTRR: Fixed MSR 0x269 0x0606060606060606
 1917 14:45:23.152614  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1918 14:45:23.155731  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1919 14:45:23.158923  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1920 14:45:23.162259  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1921 14:45:23.169077  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1922 14:45:23.172684  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1923 14:45:23.175644  MTRR: Fixed MSR 0x258 0x0606060606060606
 1924 14:45:23.178986  call enable_fixed_mtrr()
 1925 14:45:23.182249  MTRR: Fixed MSR 0x259 0x0000000000000000
 1926 14:45:23.185544  MTRR: Fixed MSR 0x268 0x0606060606060606
 1927 14:45:23.192082  MTRR: Fixed MSR 0x269 0x0606060606060606
 1928 14:45:23.195474  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1929 14:45:23.198542  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1930 14:45:23.202144  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1931 14:45:23.208494  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1932 14:45:23.211794  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1933 14:45:23.215094  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1934 14:45:23.218449  CPU physical address size: 39 bits
 1935 14:45:23.221751  call enable_fixed_mtrr()
 1936 14:45:23.225359  MTRR: Fixed MSR 0x250 0x0606060606060606
 1937 14:45:23.231955  MTRR: Fixed MSR 0x250 0x0606060606060606
 1938 14:45:23.235096  MTRR: Fixed MSR 0x258 0x0606060606060606
 1939 14:45:23.238369  MTRR: Fixed MSR 0x259 0x0000000000000000
 1940 14:45:23.241736  MTRR: Fixed MSR 0x268 0x0606060606060606
 1941 14:45:23.248325  MTRR: Fixed MSR 0x269 0x0606060606060606
 1942 14:45:23.251493  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1943 14:45:23.254964  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1944 14:45:23.258182  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1945 14:45:23.261580  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1946 14:45:23.268204  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1947 14:45:23.271207  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1948 14:45:23.274957  MTRR: Fixed MSR 0x258 0x0606060606060606
 1949 14:45:23.277999  call enable_fixed_mtrr()
 1950 14:45:23.281228  MTRR: Fixed MSR 0x259 0x0000000000000000
 1951 14:45:23.287794  MTRR: Fixed MSR 0x268 0x0606060606060606
 1952 14:45:23.291337  MTRR: Fixed MSR 0x269 0x0606060606060606
 1953 14:45:23.294500  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1954 14:45:23.298330  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1955 14:45:23.301420  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1956 14:45:23.307876  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1957 14:45:23.310823  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1958 14:45:23.314127  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1959 14:45:23.317999  CPU physical address size: 39 bits
 1960 14:45:23.320745  call enable_fixed_mtrr()
 1961 14:45:23.327526  MTRR: Fixed MSR 0x250 0x0606060606060606
 1962 14:45:23.330659  MTRR: Fixed MSR 0x250 0x0606060606060606
 1963 14:45:23.334288  MTRR: Fixed MSR 0x258 0x0606060606060606
 1964 14:45:23.337117  MTRR: Fixed MSR 0x259 0x0000000000000000
 1965 14:45:23.340477  MTRR: Fixed MSR 0x268 0x0606060606060606
 1966 14:45:23.347089  MTRR: Fixed MSR 0x269 0x0606060606060606
 1967 14:45:23.350229  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1968 14:45:23.353549  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1969 14:45:23.356891  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1970 14:45:23.363524  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1971 14:45:23.366700  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1972 14:45:23.369957  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1973 14:45:23.373538  MTRR: Fixed MSR 0x258 0x0606060606060606
 1974 14:45:23.376864  call enable_fixed_mtrr()
 1975 14:45:23.379998  MTRR: Fixed MSR 0x259 0x0000000000000000
 1976 14:45:23.386632  MTRR: Fixed MSR 0x268 0x0606060606060606
 1977 14:45:23.389906  MTRR: Fixed MSR 0x269 0x0606060606060606
 1978 14:45:23.393678  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1979 14:45:23.397006  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1980 14:45:23.403182  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1981 14:45:23.406959  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1982 14:45:23.410259  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1983 14:45:23.413285  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1984 14:45:23.419864  CPU physical address size: 39 bits
 1985 14:45:23.420340  call enable_fixed_mtrr()
 1986 14:45:23.423046  CPU physical address size: 39 bits
 1987 14:45:23.429550  CPU physical address size: 39 bits
 1988 14:45:23.433200  CPU physical address size: 39 bits
 1989 14:45:23.433801  CBFS @ c08000 size 3f8000
 1990 14:45:23.439821  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1991 14:45:23.443192  CBFS: Locating 'fallback/payload'
 1992 14:45:23.449729  CBFS: Found @ offset 1c96c0 size 3f798
 1993 14:45:23.453093  Checking segment from ROM address 0xffdd16f8
 1994 14:45:23.456365  Checking segment from ROM address 0xffdd1714
 1995 14:45:23.462753  Loading segment from ROM address 0xffdd16f8
 1996 14:45:23.463181    code (compression=0)
 1997 14:45:23.472501    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 1998 14:45:23.479371  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 1999 14:45:23.482451  it's not compressed!
 2000 14:45:23.575534  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2001 14:45:23.581879  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2002 14:45:23.588673  Loading segment from ROM address 0xffdd1714
 2003 14:45:23.589187    Entry Point 0x30000000
 2004 14:45:23.592072  Loaded segments
 2005 14:45:23.597549  Finalizing chipset.
 2006 14:45:23.601103  Finalizing SMM.
 2007 14:45:23.604116  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
 2008 14:45:23.607400  mp_park_aps done after 0 msecs.
 2009 14:45:23.614243  Jumping to boot code at 30000000(99b62000)
 2010 14:45:23.620522  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2011 14:45:23.621115  
 2012 14:45:23.624158  Starting depthcharge on Helios...
 2013 14:45:23.625353  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2014 14:45:23.625981  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2015 14:45:23.626458  Setting prompt string to ['hatch:']
 2016 14:45:23.626906  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2017 14:45:23.633823  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2018 14:45:23.640703  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2019 14:45:23.647284  board_setup: Info: eMMC controller not present; skipping
 2020 14:45:23.650555  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2021 14:45:23.657047  board_setup: Info: SDHCI controller not present; skipping
 2022 14:45:23.663742  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2023 14:45:23.664230  Wipe memory regions:
 2024 14:45:23.666880  	[0x00000000001000, 0x000000000a0000)
 2025 14:45:23.673449  	[0x00000000100000, 0x00000030000000)
 2026 14:45:23.739231  	[0x00000030657430, 0x00000099a2c000)
 2027 14:45:23.879643  	[0x00000100000000, 0x0000045e800000)
 2028 14:45:25.263217  R8152: Initializing
 2029 14:45:25.265613  Version 9 (ocp_data = 6010)
 2030 14:45:25.270549  R8152: Done initializing
 2031 14:45:25.273619  Adding net device
 2032 14:45:25.770365  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2033 14:45:25.770914  
 2034 14:45:25.771711  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2036 14:45:25.873484  hatch: tftpboot 192.168.201.1 6895611/tftp-deploy-ssl4opx7/kernel/bzImage 6895611/tftp-deploy-ssl4opx7/kernel/cmdline 6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
 2037 14:45:25.874163  Setting prompt string to 'Starting kernel'
 2038 14:45:25.874604  Setting prompt string to ['Starting kernel']
 2039 14:45:25.874976  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2040 14:45:25.875375  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:39)
 2041 14:45:25.878958  tftpboot 192.168.201.1 6895611/tftp-deploy-ssl4opx7/kernel/bzImagoy-ssl4opx7/kernel/cmdline 6895611/tftp-deploy-ssl4opx7/ramdisk/ramdisk.cpio.gz
 2042 14:45:25.879443  Waiting for link
 2043 14:45:26.079875  done.
 2044 14:45:26.080451  MAC: f4:f5:e8:50:dc:f7
 2045 14:45:26.083119  Sending DHCP discover... done.
 2046 14:45:26.086341  Waiting for reply... done.
 2047 14:45:26.089607  Sending DHCP request... done.
 2048 14:45:26.092889  Waiting for reply... done.
 2049 14:45:26.096521  My ip is 192.168.201.10
 2050 14:45:26.099698  The DHCP server ip is 192.168.201.1
 2051 14:45:26.103001  TFTP server IP predefined by user: 192.168.201.1
 2052 14:45:26.109496  Bootfile predefined by user: 6895611/tftp-deploy-ssl4opx7/kernel/bzImage
 2053 14:45:26.112853  Sending tftp read request... done.
 2054 14:45:26.119943  Waiting for the transfer... 
 2055 14:45:26.377533  00000000 ################################################################
 2056 14:45:26.607015  00080000 ################################################################
 2057 14:45:26.849205  00100000 ################################################################
 2058 14:45:27.096794  00180000 ################################################################
 2059 14:45:27.350909  00200000 ################################################################
 2060 14:45:27.586505  00280000 ################################################################
 2061 14:45:27.826174  00300000 ################################################################
 2062 14:45:28.060779  00380000 ################################################################
 2063 14:45:28.303909  00400000 ################################################################
 2064 14:45:28.550610  00480000 ################################################################
 2065 14:45:28.808760  00500000 ################################################################
 2066 14:45:29.072192  00580000 ################################################################
 2067 14:45:29.344955  00600000 ################################################################ done.
 2068 14:45:29.348094  The bootfile was 6815632 bytes long.
 2069 14:45:29.351324  Sending tftp read request... done.
 2070 14:45:29.355081  Waiting for the transfer... 
 2071 14:45:29.595275  00000000 ################################################################
 2072 14:45:29.834049  00080000 ################################################################
 2073 14:45:30.064648  00100000 ################################################################
 2074 14:45:30.291810  00180000 ################################################################
 2075 14:45:30.526745  00200000 ################################################################
 2076 14:45:30.759774  00280000 ################################################################
 2077 14:45:31.017267  00300000 ################################################################
 2078 14:45:31.260612  00380000 ################################################################
 2079 14:45:31.511908  00400000 ################################################################
 2080 14:45:31.736004  00480000 ################################################################
 2081 14:45:31.837735  00500000 ############################# done.
 2082 14:45:31.841208  Sending tftp read request... done.
 2083 14:45:31.844541  Waiting for the transfer... 
 2084 14:45:31.844627  00000000 # done.
 2085 14:45:31.854289  Command line loaded dynamically from TFTP file: 6895611/tftp-deploy-ssl4opx7/kernel/cmdline
 2086 14:45:31.877319  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6895611/extract-nfsrootfs-qv4tkahi,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2087 14:45:31.880700  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2088 14:45:31.889926  Shutting down all USB controllers.
 2089 14:45:31.890011  Removing current net device
 2090 14:45:31.893811  Finalizing coreboot
 2091 14:45:31.900377  Exiting depthcharge with code 4 at timestamp: 15544710
 2092 14:45:31.900462  
 2093 14:45:31.900528  Starting kernel ...
 2094 14:45:31.900589  
 2095 14:45:31.900648  
 2096 14:45:31.900941  end: 2.2.4 bootloader-commands (duration 00:00:08) [common]
 2097 14:45:31.901044  start: 2.2.5 auto-login-action (timeout 00:04:33) [common]
 2098 14:45:31.901119  Setting prompt string to ['Linux version [0-9]']
 2099 14:45:31.901188  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
 2100 14:45:31.901254  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
 2102 14:50:04.901277  end: 2.2.5 auto-login-action (duration 00:04:33) [common]
 2104 14:50:04.901489  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 273 seconds'
 2106 14:50:04.901644  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2109 14:50:04.901899  end: 2 depthcharge-action (duration 00:05:00) [common]
 2111 14:50:04.902155  Cleaning after the job
 2112 14:50:04.902237  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/ramdisk
 2113 14:50:04.902682  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/kernel
 2114 14:50:04.903168  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/nfsrootfs
 2115 14:50:04.939961  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6895611/tftp-deploy-ssl4opx7/modules
 2116 14:50:04.940267  start: 4.1 power-off (timeout 00:00:30) [common]
 2117 14:50:04.940439  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
 2118 14:50:04.960033  >> Command sent successfully.

 2119 14:50:04.961977  Returned 0 in 0 seconds
 2120 14:50:05.062777  end: 4.1 power-off (duration 00:00:00) [common]
 2122 14:50:05.063120  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2123 14:50:05.063367  Listened to connection for namespace 'common' for up to 1s
 2124 14:50:05.333312  Listened to connection for namespace 'common' for up to 1s
 2125 14:50:05.336919  Listened to connection for namespace 'common' for up to 1s
 2126 14:50:05.339448  Listened to connection for namespace 'common' for up to 1s
 2127 14:50:05.342763  Listened to connection for namespace 'common' for up to 1s
 2128 14:50:05.346010  Listened to connection for namespace 'common' for up to 1s
 2129 14:50:05.349742  Listened to connection for namespace 'common' for up to 1s
 2130 14:50:05.352551  Listened to connection for namespace 'common' for up to 1s
 2131 14:50:05.355882  Listened to connection for namespace 'common' for up to 1s
 2132 14:50:05.359277  Listened to connection for namespace 'common' for up to 1s
 2133 14:50:05.362648  Listened to connection for namespace 'common' for up to 1s
 2134 14:50:05.366240  Listened to connection for namespace 'common' for up to 1s
 2135 14:50:05.369246  Listened to connection for namespace 'common' for up to 1s
 2136 14:50:05.372855  Listened to connection for namespace 'common' for up to 1s
 2137 14:50:05.376713  Listened to connection for namespace 'common' for up to 1s
 2138 14:50:05.379481  Listened to connection for namespace 'common' for up to 1s
 2139 14:50:05.383018  Listened to connection for namespace 'common' for up to 1s
 2140 14:50:05.385791  Listened to connection for namespace 'common' for up to 1s
 2141 14:50:05.390250  Listened to connection for namespace 'common' for up to 1s
 2142 14:50:06.065069  Finalising connection for namespace 'common'
 2143 14:50:06.065244  Disconnecting from shell: Finalise
 2144 14:50:06.065327  
 2145 14:50:06.166082  end: 4.2 read-feedback (duration 00:00:01) [common]
 2146 14:50:06.166249  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6895611
 2147 14:50:06.337320  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6895611
 2148 14:50:06.337520  JobError: Your job cannot terminate cleanly.