Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 10:56:54.323029 lava-dispatcher, installed at version: 2022.10
2 10:56:54.323208 start: 0 validate
3 10:56:54.323343 Start time: 2022-11-22 10:56:54.323336+00:00 (UTC)
4 10:56:54.323463 Using caching service: 'http://localhost/cache/?uri=%s'
5 10:56:54.323590 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
6 10:56:54.326572 Using caching service: 'http://localhost/cache/?uri=%s'
7 10:56:54.326709 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 10:56:54.328628 Using caching service: 'http://localhost/cache/?uri=%s'
9 10:56:54.328739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-236-g69445bc0d4209%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 10:56:54.331614 validate duration: 0.01
12 10:56:54.331845 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 10:56:54.331945 start: 1.1 download-retry (timeout 00:10:00) [common]
14 10:56:54.332040 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 10:56:54.332149 Not decompressing ramdisk as can be used compressed.
16 10:56:54.332231 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
17 10:56:54.332296 saving as /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/ramdisk/rootfs.cpio.gz
18 10:56:54.332355 total size: 8415749 (8MB)
19 10:56:54.334347 progress 0% (0MB)
20 10:56:54.341803 progress 5% (0MB)
21 10:56:54.348267 progress 10% (0MB)
22 10:56:54.355582 progress 15% (1MB)
23 10:56:54.363032 progress 20% (1MB)
24 10:56:54.370743 progress 25% (2MB)
25 10:56:54.377269 progress 30% (2MB)
26 10:56:54.384112 progress 35% (2MB)
27 10:56:54.391866 progress 40% (3MB)
28 10:56:54.398389 progress 45% (3MB)
29 10:56:54.405668 progress 50% (4MB)
30 10:56:54.412977 progress 55% (4MB)
31 10:56:54.420435 progress 60% (4MB)
32 10:56:54.426933 progress 65% (5MB)
33 10:56:54.434059 progress 70% (5MB)
34 10:56:54.441570 progress 75% (6MB)
35 10:56:54.448861 progress 80% (6MB)
36 10:56:54.456540 progress 85% (6MB)
37 10:56:54.463221 progress 90% (7MB)
38 10:56:54.469954 progress 95% (7MB)
39 10:56:54.477164 progress 100% (8MB)
40 10:56:54.477457 8MB downloaded in 0.15s (55.32MB/s)
41 10:56:54.477655 end: 1.1.1 http-download (duration 00:00:00) [common]
43 10:56:54.477903 end: 1.1 download-retry (duration 00:00:00) [common]
44 10:56:54.477992 start: 1.2 download-retry (timeout 00:10:00) [common]
45 10:56:54.478098 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 10:56:54.478218 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 10:56:54.478288 saving as /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/kernel/bzImage
48 10:56:54.478349 total size: 7126928 (6MB)
49 10:56:54.478410 No compression specified
50 10:56:54.480636 progress 0% (0MB)
51 10:56:54.486246 progress 5% (0MB)
52 10:56:54.492336 progress 10% (0MB)
53 10:56:54.498529 progress 15% (1MB)
54 10:56:54.505644 progress 20% (1MB)
55 10:56:54.510811 progress 25% (1MB)
56 10:56:54.517119 progress 30% (2MB)
57 10:56:54.522888 progress 35% (2MB)
58 10:56:54.528791 progress 40% (2MB)
59 10:56:54.534598 progress 45% (3MB)
60 10:56:54.541283 progress 50% (3MB)
61 10:56:54.546870 progress 55% (3MB)
62 10:56:54.553153 progress 60% (4MB)
63 10:56:54.559937 progress 65% (4MB)
64 10:56:54.566087 progress 70% (4MB)
65 10:56:54.571771 progress 75% (5MB)
66 10:56:54.577785 progress 80% (5MB)
67 10:56:54.583359 progress 85% (5MB)
68 10:56:54.589326 progress 90% (6MB)
69 10:56:54.596002 progress 95% (6MB)
70 10:56:54.601215 progress 100% (6MB)
71 10:56:54.601445 6MB downloaded in 0.12s (55.22MB/s)
72 10:56:54.601641 end: 1.2.1 http-download (duration 00:00:00) [common]
74 10:56:54.601878 end: 1.2 download-retry (duration 00:00:00) [common]
75 10:56:54.602002 start: 1.3 download-retry (timeout 00:10:00) [common]
76 10:56:54.602088 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 10:56:54.602191 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-236-g69445bc0d4209/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 10:56:54.602259 saving as /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/modules/modules.tar
79 10:56:54.602321 total size: 52028 (0MB)
80 10:56:54.602382 Using unxz to decompress xz
81 10:56:54.616198 progress 62% (0MB)
82 10:56:54.616585 progress 100% (0MB)
83 10:56:54.619933 0MB downloaded in 0.02s (2.82MB/s)
84 10:56:54.620180 end: 1.3.1 http-download (duration 00:00:00) [common]
86 10:56:54.620457 end: 1.3 download-retry (duration 00:00:00) [common]
87 10:56:54.620561 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 10:56:54.620665 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 10:56:54.620757 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 10:56:54.620852 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 10:56:54.621024 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk
92 10:56:54.621139 makedir: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin
93 10:56:54.621231 makedir: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/tests
94 10:56:54.621319 makedir: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/results
95 10:56:54.621429 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-add-keys
96 10:56:54.621576 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-add-sources
97 10:56:54.621700 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-background-process-start
98 10:56:54.621820 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-background-process-stop
99 10:56:54.621940 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-common-functions
100 10:56:54.622057 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-echo-ipv4
101 10:56:54.622176 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-install-packages
102 10:56:54.622295 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-installed-packages
103 10:56:54.622415 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-os-build
104 10:56:54.622533 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-probe-channel
105 10:56:54.622651 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-probe-ip
106 10:56:54.622768 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-target-ip
107 10:56:54.622884 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-target-mac
108 10:56:54.622999 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-target-storage
109 10:56:54.623120 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-case
110 10:56:54.623236 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-event
111 10:56:54.623353 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-feedback
112 10:56:54.623471 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-raise
113 10:56:54.623591 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-reference
114 10:56:54.623706 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-runner
115 10:56:54.623821 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-set
116 10:56:54.623936 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-test-shell
117 10:56:54.624055 Updating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-install-packages (oe)
118 10:56:54.624174 Updating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/bin/lava-installed-packages (oe)
119 10:56:54.624280 Creating /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/environment
120 10:56:54.624392 LAVA metadata
121 10:56:54.624469 - LAVA_JOB_ID=8077853
122 10:56:54.624542 - LAVA_DISPATCHER_IP=192.168.201.1
123 10:56:54.624656 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 10:56:54.624731 skipped lava-vland-overlay
125 10:56:54.624813 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 10:56:54.624904 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 10:56:54.624973 skipped lava-multinode-overlay
128 10:56:54.625053 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 10:56:54.625142 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 10:56:54.625223 Loading test definitions
131 10:56:54.625328 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 10:56:54.625409 Using /lava-8077853 at stage 0
133 10:56:54.625722 uuid=8077853_1.4.2.3.1 testdef=None
134 10:56:54.625821 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 10:56:54.625917 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 10:56:54.626451 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 10:56:54.626697 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 10:56:54.627318 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 10:56:54.627575 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 10:56:54.628157 runner path: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/0/tests/0_dmesg test_uuid 8077853_1.4.2.3.1
143 10:56:54.628316 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 10:56:54.628569 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 10:56:54.628648 Using /lava-8077853 at stage 1
147 10:56:54.628911 uuid=8077853_1.4.2.3.5 testdef=None
148 10:56:54.629009 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 10:56:54.629103 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 10:56:54.629584 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 10:56:54.629827 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 10:56:54.630464 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 10:56:54.630721 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 10:56:54.631308 runner path: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/1/tests/1_bootrr test_uuid 8077853_1.4.2.3.5
157 10:56:54.631460 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 10:56:54.631686 Creating lava-test-runner.conf files
160 10:56:54.631756 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/0 for stage 0
161 10:56:54.631844 - 0_dmesg
162 10:56:54.631922 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8077853/lava-overlay-bo9t7rfk/lava-8077853/1 for stage 1
163 10:56:54.632010 - 1_bootrr
164 10:56:54.632107 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 10:56:54.632200 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 10:56:54.638567 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 10:56:54.638685 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 10:56:54.638783 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 10:56:54.638877 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 10:56:54.638971 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 10:56:54.821866 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 10:56:54.822192 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 10:56:54.822306 extracting modules file /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8077853/extract-overlay-ramdisk-p5t5wzd0/ramdisk
174 10:56:54.826392 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 10:56:54.826505 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 10:56:54.826593 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077853/compress-overlay-2gpsu_u9/overlay-1.4.2.4.tar.gz to ramdisk
177 10:56:54.826669 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8077853/compress-overlay-2gpsu_u9/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8077853/extract-overlay-ramdisk-p5t5wzd0/ramdisk
178 10:56:54.830453 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 10:56:54.830560 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 10:56:54.830651 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 10:56:54.830741 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 10:56:54.830823 Building ramdisk /var/lib/lava/dispatcher/tmp/8077853/extract-overlay-ramdisk-p5t5wzd0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8077853/extract-overlay-ramdisk-p5t5wzd0/ramdisk
183 10:56:54.893419 >> 48008 blocks
184 10:56:55.631289 rename /var/lib/lava/dispatcher/tmp/8077853/extract-overlay-ramdisk-p5t5wzd0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
185 10:56:55.631680 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 10:56:55.631799 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 10:56:55.631896 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 10:56:55.631993 No mkimage arch provided, not using FIT.
189 10:56:55.632084 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 10:56:55.632168 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 10:56:55.632261 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 10:56:55.632354 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 10:56:55.632432 No LXC device requested
194 10:56:55.632517 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 10:56:55.632606 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 10:56:55.632686 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 10:56:55.632760 Checking files for TFTP limit of 4294967296 bytes.
198 10:56:55.633156 end: 1 tftp-deploy (duration 00:00:01) [common]
199 10:56:55.633263 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 10:56:55.633360 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 10:56:55.633514 substitutions:
202 10:56:55.633598 - {DTB}: None
203 10:56:55.633665 - {INITRD}: 8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
204 10:56:55.633726 - {KERNEL}: 8077853/tftp-deploy-ireehjoo/kernel/bzImage
205 10:56:55.633786 - {LAVA_MAC}: None
206 10:56:55.633844 - {PRESEED_CONFIG}: None
207 10:56:55.633901 - {PRESEED_LOCAL}: None
208 10:56:55.633958 - {RAMDISK}: 8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
209 10:56:55.634014 - {ROOT_PART}: None
210 10:56:55.634071 - {ROOT}: None
211 10:56:55.634128 - {SERVER_IP}: 192.168.201.1
212 10:56:55.634184 - {TEE}: None
213 10:56:55.634240 Parsed boot commands:
214 10:56:55.634296 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 10:56:55.634446 Parsed boot commands: tftpboot 192.168.201.1 8077853/tftp-deploy-ireehjoo/kernel/bzImage 8077853/tftp-deploy-ireehjoo/kernel/cmdline 8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
216 10:56:55.634539 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 10:56:55.634634 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 10:56:55.634740 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 10:56:55.634827 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 10:56:55.634899 Not connected, no need to disconnect.
221 10:56:55.634978 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 10:56:55.635058 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 10:56:55.635124 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-7'
224 10:56:55.637683 Setting prompt string to ['lava-test: # ']
225 10:56:55.637966 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 10:56:55.638068 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 10:56:55.638169 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 10:56:55.638261 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 10:56:55.638432 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=reboot'
230 10:56:55.657548 >> Command sent successfully.
231 10:56:55.659511 Returned 0 in 0 seconds
232 10:56:55.760261 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 10:56:55.760820 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 10:56:55.760920 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 10:56:55.761007 Setting prompt string to 'Starting depthcharge on Voema...'
237 10:56:55.761081 Changing prompt to 'Starting depthcharge on Voema...'
238 10:56:55.761151 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 10:56:55.761415 [Enter `^Ec?' for help]
240 10:57:02.920435
241 10:57:02.921046
242 10:57:02.930218 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 10:57:02.933600 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 10:57:02.940192 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 10:57:02.943619 CPU: AES supported, TXT NOT supported, VT supported
246 10:57:02.949964 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 10:57:02.953269 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 10:57:02.960313 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
249 10:57:02.963298 VBOOT: Loading verstage.
250 10:57:02.966927 FMAP: Found "FLASH" version 1.1 at 0x1804000.
251 10:57:02.973558 FMAP: base = 0x0 size = 0x2000000 #areas = 32
252 10:57:02.976591 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
253 10:57:02.987062 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
254 10:57:02.994055 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
255 10:57:02.994371
256 10:57:02.994619
257 10:57:03.006972 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
258 10:57:03.020687 Probing TPM: . done!
259 10:57:03.024033 TPM ready after 0 ms
260 10:57:03.027358 Connected to device vid:did:rid of 1ae0:0028:00
261 10:57:03.038487 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
262 10:57:03.045036 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
263 10:57:03.048672 Initialized TPM device CR50 revision 0
264 10:57:03.102709 tlcl_send_startup: Startup return code is 0
265 10:57:03.103042 TPM: setup succeeded
266 10:57:03.117946 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
267 10:57:03.131994 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
268 10:57:03.145153 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
269 10:57:03.154998 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
270 10:57:03.158417 Chrome EC: UHEPI supported
271 10:57:03.161885 Phase 1
272 10:57:03.165035 FMAP: area GBB found @ 1805000 (458752 bytes)
273 10:57:03.171691 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
274 10:57:03.181595 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
275 10:57:03.188176 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
276 10:57:03.194486 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
277 10:57:03.198371 Recovery requested (1009000e)
278 10:57:03.201510 TPM: Extending digest for VBOOT: boot mode into PCR 0
279 10:57:03.212635 tlcl_extend: response is 0
280 10:57:03.219260 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
281 10:57:03.229129 tlcl_extend: response is 0
282 10:57:03.236033 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
283 10:57:03.242725 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
284 10:57:03.249538 BS: verstage times (exec / console): total (unknown) / 142 ms
285 10:57:03.249635
286 10:57:03.249705
287 10:57:03.262633 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
288 10:57:03.269234 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
289 10:57:03.272334 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
290 10:57:03.275850 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
291 10:57:03.282189 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
292 10:57:03.285675 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
293 10:57:03.289015 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
294 10:57:03.292462 TCO_STS: 0000 0000
295 10:57:03.295611 GEN_PMCON: d0015038 00002200
296 10:57:03.299187 GBLRST_CAUSE: 00000000 00000000
297 10:57:03.299274 HPR_CAUSE0: 00000000
298 10:57:03.302432 prev_sleep_state 5
299 10:57:03.305672 Boot Count incremented to 12332
300 10:57:03.312364 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
301 10:57:03.319357 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
302 10:57:03.325418 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
303 10:57:03.332169 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
304 10:57:03.336930 Chrome EC: UHEPI supported
305 10:57:03.343672 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
306 10:57:03.356086 Probing TPM: done!
307 10:57:03.362878 Connected to device vid:did:rid of 1ae0:0028:00
308 10:57:03.373794 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
309 10:57:03.381827 Initialized TPM device CR50 revision 0
310 10:57:03.392781 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 10:57:03.399216 MRC: Hash idx 0x100b comparison successful.
312 10:57:03.402507 MRC cache found, size faa8
313 10:57:03.402605 bootmode is set to: 2
314 10:57:03.405997 SPD index = 0
315 10:57:03.412217 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
316 10:57:03.415717 SPD: module type is LPDDR4X
317 10:57:03.418965 SPD: module part number is MT53E512M64D4NW-046
318 10:57:03.425628 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
319 10:57:03.432630 SPD: device width 16 bits, bus width 16 bits
320 10:57:03.435592 SPD: module size is 1024 MB (per channel)
321 10:57:03.870886 CBMEM:
322 10:57:03.874233 IMD: root @ 0x76fff000 254 entries.
323 10:57:03.877218 IMD: root @ 0x76ffec00 62 entries.
324 10:57:03.880504 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
325 10:57:03.887304 FMAP: area RW_VPD found @ f35000 (8192 bytes)
326 10:57:03.890638 External stage cache:
327 10:57:03.894152 IMD: root @ 0x7b3ff000 254 entries.
328 10:57:03.897332 IMD: root @ 0x7b3fec00 62 entries.
329 10:57:03.912529 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
330 10:57:03.919216 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
331 10:57:03.925699 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
332 10:57:03.940064 MRC: 'RECOVERY_MRC_CACHE' does not need update.
333 10:57:03.946160 cse_lite: Skip switching to RW in the recovery path
334 10:57:03.946249 8 DIMMs found
335 10:57:03.946338 SMM Memory Map
336 10:57:03.949693 SMRAM : 0x7b000000 0x800000
337 10:57:03.952826
338 10:57:03.956346 Subregion 0: 0x7b000000 0x200000
339 10:57:03.956434 Subregion 1: 0x7b200000 0x200000
340 10:57:03.960353 Subregion 2: 0x7b400000 0x400000
341 10:57:03.963932 top_of_ram = 0x77000000
342 10:57:03.970763 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
343 10:57:03.974057 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
344 10:57:03.980945 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
345 10:57:03.983961 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 10:57:03.993923 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
347 10:57:03.997382 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
348 10:57:04.000427
349 10:57:04.010572 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
350 10:57:04.013851 Processing 211 relocs. Offset value of 0x74c0b000
351 10:57:04.022547 BS: romstage times (exec / console): total (unknown) / 277 ms
352 10:57:04.028631
353 10:57:04.028720
354 10:57:04.038360 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
355 10:57:04.042139 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
356 10:57:04.051719 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
357 10:57:04.058286 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
358 10:57:04.064921 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
359 10:57:04.071915 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
360 10:57:04.118521 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
361 10:57:04.125249 Processing 5008 relocs. Offset value of 0x75d98000
362 10:57:04.128417 BS: postcar times (exec / console): total (unknown) / 59 ms
363 10:57:04.131860
364 10:57:04.131948
365 10:57:04.141797 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
366 10:57:04.141887 Normal boot
367 10:57:04.145029 FW_CONFIG value is 0x804c02
368 10:57:04.148745 PCI: 00:07.0 disabled by fw_config
369 10:57:04.152079 PCI: 00:07.1 disabled by fw_config
370 10:57:04.155124 PCI: 00:0d.2 disabled by fw_config
371 10:57:04.158476 PCI: 00:1c.7 disabled by fw_config
372 10:57:04.165015 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
373 10:57:04.171700 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
374 10:57:04.175235 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
375 10:57:04.178294 GENERIC: 0.0 disabled by fw_config
376 10:57:04.181893 GENERIC: 1.0 disabled by fw_config
377 10:57:04.188602 fw_config match found: DB_USB=USB3_ACTIVE
378 10:57:04.191948 fw_config match found: DB_USB=USB3_ACTIVE
379 10:57:04.194935 fw_config match found: DB_USB=USB3_ACTIVE
380 10:57:04.201829 fw_config match found: DB_USB=USB3_ACTIVE
381 10:57:04.204710 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
382 10:57:04.211769 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
383 10:57:04.221761 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
384 10:57:04.228524 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
385 10:57:04.231854 microcode: sig=0x806c1 pf=0x80 revision=0x86
386 10:57:04.238187 microcode: Update skipped, already up-to-date
387 10:57:04.245066 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
388 10:57:04.272324 Detected 4 core, 8 thread CPU.
389 10:57:04.275446 Setting up SMI for CPU
390 10:57:04.279228 IED base = 0x7b400000
391 10:57:04.279313 IED size = 0x00400000
392 10:57:04.282120 Will perform SMM setup.
393 10:57:04.288829 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
394 10:57:04.295657 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 10:57:04.302306 Processing 16 relocs. Offset value of 0x00030000
396 10:57:04.305471 Attempting to start 7 APs
397 10:57:04.308639 Waiting for 10ms after sending INIT.
398 10:57:04.324208 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
399 10:57:04.327653 AP: slot 4 apic_id 5.
400 10:57:04.331057 AP: slot 6 apic_id 2.
401 10:57:04.331142 AP: slot 2 apic_id 3.
402 10:57:04.334515 AP: slot 5 apic_id 4.
403 10:57:04.337313 AP: slot 7 apic_id 6.
404 10:57:04.337398 AP: slot 3 apic_id 7.
405 10:57:04.337465 done.
406 10:57:04.344593 Waiting for 2nd SIPI to complete...done.
407 10:57:04.351104 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
408 10:57:04.357673 Processing 13 relocs. Offset value of 0x00038000
409 10:57:04.357758 Unable to locate Global NVS
410 10:57:04.367347 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
411 10:57:04.370816 Installing permanent SMM handler to 0x7b000000
412 10:57:04.380651 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
413 10:57:04.384174 Processing 794 relocs. Offset value of 0x7b010000
414 10:57:04.390970 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
415 10:57:04.397622 Processing 13 relocs. Offset value of 0x7b008000
416 10:57:04.404142 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
417 10:57:04.410666 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
418 10:57:04.413771 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
419 10:57:04.420671 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
420 10:57:04.427661 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
421 10:57:04.433754 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
422 10:57:04.437134 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
423 10:57:04.440654
424 10:57:04.440739 Unable to locate Global NVS
425 10:57:04.447222 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
426 10:57:04.452221 Clearing SMI status registers
427 10:57:04.455242 SMI_STS: PM1
428 10:57:04.455328 PM1_STS: PWRBTN
429 10:57:04.465438 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
430 10:57:04.465535 In relocation handler: CPU 0
431 10:57:04.468398
432 10:57:04.471970 New SMBASE=0x7b000000 IEDBASE=0x7b400000
433 10:57:04.475318 Writing SMRR. base = 0x7b000006, mask=0xff800c00
434 10:57:04.478436 Relocation complete.
435 10:57:04.485327 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
436 10:57:04.488399 In relocation handler: CPU 1
437 10:57:04.491907 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
438 10:57:04.495142 Relocation complete.
439 10:57:04.501683 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
440 10:57:04.505091 In relocation handler: CPU 4
441 10:57:04.508589 New SMBASE=0x7afff000 IEDBASE=0x7b400000
442 10:57:04.511645 Relocation complete.
443 10:57:04.518419 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
444 10:57:04.521756 In relocation handler: CPU 5
445 10:57:04.525337 New SMBASE=0x7affec00 IEDBASE=0x7b400000
446 10:57:04.531776 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 10:57:04.531862 Relocation complete.
448 10:57:04.538524 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
449 10:57:04.541503 In relocation handler: CPU 7
450 10:57:04.548514 New SMBASE=0x7affe400 IEDBASE=0x7b400000
451 10:57:04.551809 Writing SMRR. base = 0x7b000006, mask=0xff800c00
452 10:57:04.554972 Relocation complete.
453 10:57:04.561447 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
454 10:57:04.564886 In relocation handler: CPU 3
455 10:57:04.567939 New SMBASE=0x7afff400 IEDBASE=0x7b400000
456 10:57:04.571465 Relocation complete.
457 10:57:04.578248 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
458 10:57:04.581671 In relocation handler: CPU 6
459 10:57:04.584809 New SMBASE=0x7affe800 IEDBASE=0x7b400000
460 10:57:04.588222 Writing SMRR. base = 0x7b000006, mask=0xff800c00
461 10:57:04.591213 Relocation complete.
462 10:57:04.598176 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
463 10:57:04.601193 In relocation handler: CPU 2
464 10:57:04.604677 New SMBASE=0x7afff800 IEDBASE=0x7b400000
465 10:57:04.607795 Relocation complete.
466 10:57:04.611237 Initializing CPU #0
467 10:57:04.614764 CPU: vendor Intel device 806c1
468 10:57:04.617974 CPU: family 06, model 8c, stepping 01
469 10:57:04.621327 Clearing out pending MCEs
470 10:57:04.621413 Setting up local APIC...
471 10:57:04.624940 apic_id: 0x00 done.
472 10:57:04.628395 Turbo is available but hidden
473 10:57:04.632177 Turbo is available and visible
474 10:57:04.635760 microcode: Update skipped, already up-to-date
475 10:57:04.639255 CPU #0 initialized
476 10:57:04.639341 Initializing CPU #6
477 10:57:04.642281 Initializing CPU #2
478 10:57:04.645686 CPU: vendor Intel device 806c1
479 10:57:04.648977 CPU: family 06, model 8c, stepping 01
480 10:57:04.652312 CPU: vendor Intel device 806c1
481 10:57:04.656085 CPU: family 06, model 8c, stepping 01
482 10:57:04.659067 Clearing out pending MCEs
483 10:57:04.662545 Clearing out pending MCEs
484 10:57:04.662632 Setting up local APIC...
485 10:57:04.665439 Initializing CPU #1
486 10:57:04.669020 Initializing CPU #7
487 10:57:04.669106 Initializing CPU #3
488 10:57:04.672650 CPU: vendor Intel device 806c1
489 10:57:04.675586 CPU: family 06, model 8c, stepping 01
490 10:57:04.679096 CPU: vendor Intel device 806c1
491 10:57:04.682361 CPU: family 06, model 8c, stepping 01
492 10:57:04.685620 Clearing out pending MCEs
493 10:57:04.688750 Clearing out pending MCEs
494 10:57:04.692431 Setting up local APIC...
495 10:57:04.695730 CPU: vendor Intel device 806c1
496 10:57:04.698660 CPU: family 06, model 8c, stepping 01
497 10:57:04.702280 Setting up local APIC...
498 10:57:04.702364 apic_id: 0x06 done.
499 10:57:04.705393 Setting up local APIC...
500 10:57:04.708886 apic_id: 0x02 done.
501 10:57:04.708970 apic_id: 0x03 done.
502 10:57:04.715588 microcode: Update skipped, already up-to-date
503 10:57:04.718989 microcode: Update skipped, already up-to-date
504 10:57:04.722101 CPU #6 initialized
505 10:57:04.722186 CPU #2 initialized
506 10:57:04.729108 microcode: Update skipped, already up-to-date
507 10:57:04.729193 apic_id: 0x07 done.
508 10:57:04.732464 CPU #7 initialized
509 10:57:04.735361 microcode: Update skipped, already up-to-date
510 10:57:04.738885 Clearing out pending MCEs
511 10:57:04.742253 Initializing CPU #4
512 10:57:04.742337 Initializing CPU #5
513 10:57:04.745439 CPU: vendor Intel device 806c1
514 10:57:04.748845 CPU: family 06, model 8c, stepping 01
515 10:57:04.752178 CPU: vendor Intel device 806c1
516 10:57:04.755122 CPU: family 06, model 8c, stepping 01
517 10:57:04.758650 Clearing out pending MCEs
518 10:57:04.761851 Clearing out pending MCEs
519 10:57:04.765402 Setting up local APIC...
520 10:57:04.768388 Setting up local APIC...
521 10:57:04.768472 apic_id: 0x05 done.
522 10:57:04.771948 Setting up local APIC...
523 10:57:04.775240 apic_id: 0x01 done.
524 10:57:04.775324 apic_id: 0x04 done.
525 10:57:04.781987 microcode: Update skipped, already up-to-date
526 10:57:04.785245 microcode: Update skipped, already up-to-date
527 10:57:04.788489 CPU #4 initialized
528 10:57:04.792046 microcode: Update skipped, already up-to-date
529 10:57:04.795100 CPU #5 initialized
530 10:57:04.795184 CPU #1 initialized
531 10:57:04.798474 CPU #3 initialized
532 10:57:04.801739 bsp_do_flight_plan done after 454 msecs.
533 10:57:04.805171 CPU: frequency set to 4000 MHz
534 10:57:04.805255 Enabling SMIs.
535 10:57:04.811731 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
536 10:57:04.828940 SATAXPCIE1 indicates PCIe NVMe is present
537 10:57:04.831967 Probing TPM: done!
538 10:57:04.835441 Connected to device vid:did:rid of 1ae0:0028:00
539 10:57:04.846234 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.6.20/cr50_v1.9308_B.947-551594aae6
540 10:57:04.849876 Initialized TPM device CR50 revision 0
541 10:57:04.853083 Enabling S0i3.4
542 10:57:04.859461 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
543 10:57:04.863260 Found a VBT of 8704 bytes after decompression
544 10:57:04.869641 cse_lite: CSE RO boot. HybridStorageMode disabled
545 10:57:04.876165 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
546 10:57:04.952307 FSPS returned 0
547 10:57:04.955311 Executing Phase 1 of FspMultiPhaseSiInit
548 10:57:04.965255 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
549 10:57:04.968799 port C0 DISC req: usage 1 usb3 1 usb2 5
550 10:57:04.972370 Raw Buffer output 0 00000511
551 10:57:04.975139 Raw Buffer output 1 00000000
552 10:57:04.979369 pmc_send_ipc_cmd succeeded
553 10:57:04.982319 port C1 DISC req: usage 1 usb3 2 usb2 3
554 10:57:04.985811
555 10:57:04.985895 Raw Buffer output 0 00000321
556 10:57:04.988954 Raw Buffer output 1 00000000
557 10:57:04.993136 pmc_send_ipc_cmd succeeded
558 10:57:04.998203 Detected 4 core, 8 thread CPU.
559 10:57:05.001615 Detected 4 core, 8 thread CPU.
560 10:57:05.235674 Display FSP Version Info HOB
561 10:57:05.238971 Reference Code - CPU = a.0.4c.31
562 10:57:05.242308 uCode Version = 0.0.0.86
563 10:57:05.245625 TXT ACM version = ff.ff.ff.ffff
564 10:57:05.248772 Reference Code - ME = a.0.4c.31
565 10:57:05.252130 MEBx version = 0.0.0.0
566 10:57:05.255743 ME Firmware Version = Consumer SKU
567 10:57:05.258698 Reference Code - PCH = a.0.4c.31
568 10:57:05.262393 PCH-CRID Status = Disabled
569 10:57:05.265382 PCH-CRID Original Value = ff.ff.ff.ffff
570 10:57:05.269154 PCH-CRID New Value = ff.ff.ff.ffff
571 10:57:05.272268 OPROM - RST - RAID = ff.ff.ff.ffff
572 10:57:05.275804 PCH Hsio Version = 4.0.0.0
573 10:57:05.278627 Reference Code - SA - System Agent = a.0.4c.31
574 10:57:05.282279 Reference Code - MRC = 2.0.0.1
575 10:57:05.285388 SA - PCIe Version = a.0.4c.31
576 10:57:05.288948 SA-CRID Status = Disabled
577 10:57:05.292057 SA-CRID Original Value = 0.0.0.1
578 10:57:05.295747 SA-CRID New Value = 0.0.0.1
579 10:57:05.298725 OPROM - VBIOS = ff.ff.ff.ffff
580 10:57:05.302370 IO Manageability Engine FW Version = 11.1.4.0
581 10:57:05.305243 PHY Build Version = 0.0.0.e0
582 10:57:05.308690 Thunderbolt(TM) FW Version = 0.0.0.0
583 10:57:05.315899 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
584 10:57:05.318830 ITSS IRQ Polarities Before:
585 10:57:05.318928 IPC0: 0xffffffff
586 10:57:05.322019 IPC1: 0xffffffff
587 10:57:05.322102 IPC2: 0xffffffff
588 10:57:05.325449 IPC3: 0xffffffff
589 10:57:05.328571 ITSS IRQ Polarities After:
590 10:57:05.328654 IPC0: 0xffffffff
591 10:57:05.332130 IPC1: 0xffffffff
592 10:57:05.332214 IPC2: 0xffffffff
593 10:57:05.335514 IPC3: 0xffffffff
594 10:57:05.339016 Found PCIe Root Port #9 at PCI: 00:1d.0.
595 10:57:05.352058 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
596 10:57:05.362174 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
597 10:57:05.375517 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
598 10:57:05.381956 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
599 10:57:05.382041 Enumerating buses...
600 10:57:05.388790 Show all devs... Before device enumeration.
601 10:57:05.388876 Root Device: enabled 1
602 10:57:05.392271 DOMAIN: 0000: enabled 1
603 10:57:05.395153 CPU_CLUSTER: 0: enabled 1
604 10:57:05.398874 PCI: 00:00.0: enabled 1
605 10:57:05.398958 PCI: 00:02.0: enabled 1
606 10:57:05.402215 PCI: 00:04.0: enabled 1
607 10:57:05.404984 PCI: 00:05.0: enabled 1
608 10:57:05.408503 PCI: 00:06.0: enabled 0
609 10:57:05.408594 PCI: 00:07.0: enabled 0
610 10:57:05.411743 PCI: 00:07.1: enabled 0
611 10:57:05.415062 PCI: 00:07.2: enabled 0
612 10:57:05.418570 PCI: 00:07.3: enabled 0
613 10:57:05.418654 PCI: 00:08.0: enabled 1
614 10:57:05.421631 PCI: 00:09.0: enabled 0
615 10:57:05.425159 PCI: 00:0a.0: enabled 0
616 10:57:05.428613 PCI: 00:0d.0: enabled 1
617 10:57:05.428698 PCI: 00:0d.1: enabled 0
618 10:57:05.431573 PCI: 00:0d.2: enabled 0
619 10:57:05.435197 PCI: 00:0d.3: enabled 0
620 10:57:05.435282 PCI: 00:0e.0: enabled 0
621 10:57:05.438441 PCI: 00:10.2: enabled 1
622 10:57:05.441930 PCI: 00:10.6: enabled 0
623 10:57:05.445287 PCI: 00:10.7: enabled 0
624 10:57:05.445372 PCI: 00:12.0: enabled 0
625 10:57:05.448492 PCI: 00:12.6: enabled 0
626 10:57:05.452181 PCI: 00:13.0: enabled 0
627 10:57:05.455376 PCI: 00:14.0: enabled 1
628 10:57:05.455460 PCI: 00:14.1: enabled 0
629 10:57:05.458704 PCI: 00:14.2: enabled 1
630 10:57:05.461654 PCI: 00:14.3: enabled 1
631 10:57:05.461738 PCI: 00:15.0: enabled 1
632 10:57:05.465421
633 10:57:05.465526 PCI: 00:15.1: enabled 1
634 10:57:05.468368 PCI: 00:15.2: enabled 1
635 10:57:05.472027 PCI: 00:15.3: enabled 1
636 10:57:05.472111 PCI: 00:16.0: enabled 1
637 10:57:05.475100 PCI: 00:16.1: enabled 0
638 10:57:05.478564 PCI: 00:16.2: enabled 0
639 10:57:05.481717 PCI: 00:16.3: enabled 0
640 10:57:05.481801 PCI: 00:16.4: enabled 0
641 10:57:05.485010 PCI: 00:16.5: enabled 0
642 10:57:05.488634 PCI: 00:17.0: enabled 1
643 10:57:05.492229 PCI: 00:19.0: enabled 0
644 10:57:05.492314 PCI: 00:19.1: enabled 1
645 10:57:05.494976 PCI: 00:19.2: enabled 0
646 10:57:05.498681 PCI: 00:1c.0: enabled 1
647 10:57:05.501675 PCI: 00:1c.1: enabled 0
648 10:57:05.501759 PCI: 00:1c.2: enabled 0
649 10:57:05.505307 PCI: 00:1c.3: enabled 0
650 10:57:05.508318 PCI: 00:1c.4: enabled 0
651 10:57:05.508403 PCI: 00:1c.5: enabled 0
652 10:57:05.512025 PCI: 00:1c.6: enabled 1
653 10:57:05.514876 PCI: 00:1c.7: enabled 0
654 10:57:05.518353 PCI: 00:1d.0: enabled 1
655 10:57:05.518445 PCI: 00:1d.1: enabled 0
656 10:57:05.522067 PCI: 00:1d.2: enabled 1
657 10:57:05.524828 PCI: 00:1d.3: enabled 0
658 10:57:05.528601 PCI: 00:1e.0: enabled 1
659 10:57:05.528680 PCI: 00:1e.1: enabled 0
660 10:57:05.531544 PCI: 00:1e.2: enabled 1
661 10:57:05.535186 PCI: 00:1e.3: enabled 1
662 10:57:05.538358 PCI: 00:1f.0: enabled 1
663 10:57:05.538442 PCI: 00:1f.1: enabled 0
664 10:57:05.541678 PCI: 00:1f.2: enabled 1
665 10:57:05.545235 PCI: 00:1f.3: enabled 1
666 10:57:05.545320 PCI: 00:1f.4: enabled 0
667 10:57:05.548279
668 10:57:05.548363 PCI: 00:1f.5: enabled 1
669 10:57:05.551677 PCI: 00:1f.6: enabled 0
670 10:57:05.555023 PCI: 00:1f.7: enabled 0
671 10:57:05.555106 APIC: 00: enabled 1
672 10:57:05.558253 GENERIC: 0.0: enabled 1
673 10:57:05.561719 GENERIC: 0.0: enabled 1
674 10:57:05.565040 GENERIC: 1.0: enabled 1
675 10:57:05.565124 GENERIC: 0.0: enabled 1
676 10:57:05.568276 GENERIC: 1.0: enabled 1
677 10:57:05.571769 USB0 port 0: enabled 1
678 10:57:05.571854 GENERIC: 0.0: enabled 1
679 10:57:05.574771 USB0 port 0: enabled 1
680 10:57:05.578468 GENERIC: 0.0: enabled 1
681 10:57:05.581309 I2C: 00:1a: enabled 1
682 10:57:05.581395 I2C: 00:31: enabled 1
683 10:57:05.585052 I2C: 00:32: enabled 1
684 10:57:05.588286 I2C: 00:10: enabled 1
685 10:57:05.588370 I2C: 00:15: enabled 1
686 10:57:05.591582 GENERIC: 0.0: enabled 0
687 10:57:05.594956 GENERIC: 1.0: enabled 0
688 10:57:05.595040 GENERIC: 0.0: enabled 1
689 10:57:05.598072 SPI: 00: enabled 1
690 10:57:05.601367 SPI: 00: enabled 1
691 10:57:05.601451 PNP: 0c09.0: enabled 1
692 10:57:05.605068 GENERIC: 0.0: enabled 1
693 10:57:05.608142 USB3 port 0: enabled 1
694 10:57:05.608226 USB3 port 1: enabled 1
695 10:57:05.611706
696 10:57:05.611791 USB3 port 2: enabled 0
697 10:57:05.614890 USB3 port 3: enabled 0
698 10:57:05.617949 USB2 port 0: enabled 0
699 10:57:05.618033 USB2 port 1: enabled 1
700 10:57:05.621303 USB2 port 2: enabled 1
701 10:57:05.624854 USB2 port 3: enabled 0
702 10:57:05.624939 USB2 port 4: enabled 1
703 10:57:05.628219 USB2 port 5: enabled 0
704 10:57:05.631244 USB2 port 6: enabled 0
705 10:57:05.634911 USB2 port 7: enabled 0
706 10:57:05.634996 USB2 port 8: enabled 0
707 10:57:05.638138 USB2 port 9: enabled 0
708 10:57:05.641316 USB3 port 0: enabled 0
709 10:57:05.641400 USB3 port 1: enabled 1
710 10:57:05.644389 USB3 port 2: enabled 0
711 10:57:05.647904 USB3 port 3: enabled 0
712 10:57:05.651605 GENERIC: 0.0: enabled 1
713 10:57:05.651691 GENERIC: 1.0: enabled 1
714 10:57:05.654776 APIC: 01: enabled 1
715 10:57:05.654861 APIC: 03: enabled 1
716 10:57:05.657821
717 10:57:05.657906 APIC: 07: enabled 1
718 10:57:05.661254 APIC: 05: enabled 1
719 10:57:05.661338 APIC: 04: enabled 1
720 10:57:05.664639 APIC: 02: enabled 1
721 10:57:05.668129 APIC: 06: enabled 1
722 10:57:05.668212 Compare with tree...
723 10:57:05.671356 Root Device: enabled 1
724 10:57:05.674436 DOMAIN: 0000: enabled 1
725 10:57:05.674521 PCI: 00:00.0: enabled 1
726 10:57:05.677858
727 10:57:05.677944 PCI: 00:02.0: enabled 1
728 10:57:05.681044 PCI: 00:04.0: enabled 1
729 10:57:05.684665 GENERIC: 0.0: enabled 1
730 10:57:05.688015 PCI: 00:05.0: enabled 1
731 10:57:05.688099 PCI: 00:06.0: enabled 0
732 10:57:05.691172
733 10:57:05.691256 PCI: 00:07.0: enabled 0
734 10:57:05.694719 GENERIC: 0.0: enabled 1
735 10:57:05.697682 PCI: 00:07.1: enabled 0
736 10:57:05.701249 GENERIC: 1.0: enabled 1
737 10:57:05.701333 PCI: 00:07.2: enabled 0
738 10:57:05.704560
739 10:57:05.704645 GENERIC: 0.0: enabled 1
740 10:57:05.707864 PCI: 00:07.3: enabled 0
741 10:57:05.711564 GENERIC: 1.0: enabled 1
742 10:57:05.714692 PCI: 00:08.0: enabled 1
743 10:57:05.718050 PCI: 00:09.0: enabled 0
744 10:57:05.718134 PCI: 00:0a.0: enabled 0
745 10:57:05.721125 PCI: 00:0d.0: enabled 1
746 10:57:05.724385 USB0 port 0: enabled 1
747 10:57:05.727720 USB3 port 0: enabled 1
748 10:57:05.731402 USB3 port 1: enabled 1
749 10:57:05.731486 USB3 port 2: enabled 0
750 10:57:05.734191 USB3 port 3: enabled 0
751 10:57:05.737815 PCI: 00:0d.1: enabled 0
752 10:57:05.741117 PCI: 00:0d.2: enabled 0
753 10:57:05.744421 GENERIC: 0.0: enabled 1
754 10:57:05.744506 PCI: 00:0d.3: enabled 0
755 10:57:05.747970 PCI: 00:0e.0: enabled 0
756 10:57:05.750841 PCI: 00:10.2: enabled 1
757 10:57:05.754125 PCI: 00:10.6: enabled 0
758 10:57:05.757642 PCI: 00:10.7: enabled 0
759 10:57:05.757726 PCI: 00:12.0: enabled 0
760 10:57:05.761176 PCI: 00:12.6: enabled 0
761 10:57:05.764535 PCI: 00:13.0: enabled 0
762 10:57:05.767339 PCI: 00:14.0: enabled 1
763 10:57:05.770734 USB0 port 0: enabled 1
764 10:57:05.770818 USB2 port 0: enabled 0
765 10:57:05.774377 USB2 port 1: enabled 1
766 10:57:05.777871 USB2 port 2: enabled 1
767 10:57:05.780892 USB2 port 3: enabled 0
768 10:57:05.784436 USB2 port 4: enabled 1
769 10:57:05.784520 USB2 port 5: enabled 0
770 10:57:05.787563
771 10:57:05.787648 USB2 port 6: enabled 0
772 10:57:05.790717 USB2 port 7: enabled 0
773 10:57:05.794201 USB2 port 8: enabled 0
774 10:57:05.797633 USB2 port 9: enabled 0
775 10:57:05.800629 USB3 port 0: enabled 0
776 10:57:05.800712 USB3 port 1: enabled 1
777 10:57:05.804377 USB3 port 2: enabled 0
778 10:57:05.807630 USB3 port 3: enabled 0
779 10:57:05.811013 PCI: 00:14.1: enabled 0
780 10:57:05.813812 PCI: 00:14.2: enabled 1
781 10:57:05.813894 PCI: 00:14.3: enabled 1
782 10:57:05.817343 GENERIC: 0.0: enabled 1
783 10:57:05.821432 PCI: 00:15.0: enabled 1
784 10:57:05.823957 I2C: 00:1a: enabled 1
785 10:57:05.827444 I2C: 00:31: enabled 1
786 10:57:05.827526 I2C: 00:32: enabled 1
787 10:57:05.831067 PCI: 00:15.1: enabled 1
788 10:57:05.834133 I2C: 00:10: enabled 1
789 10:57:05.837242 PCI: 00:15.2: enabled 1
790 10:57:05.837349 PCI: 00:15.3: enabled 1
791 10:57:05.840854
792 10:57:05.840937 PCI: 00:16.0: enabled 1
793 10:57:05.843986 PCI: 00:16.1: enabled 0
794 10:57:05.847594 PCI: 00:16.2: enabled 0
795 10:57:05.850843 PCI: 00:16.3: enabled 0
796 10:57:05.850926 PCI: 00:16.4: enabled 0
797 10:57:05.853923 PCI: 00:16.5: enabled 0
798 10:57:05.857491 PCI: 00:17.0: enabled 1
799 10:57:05.860649 PCI: 00:19.0: enabled 0
800 10:57:05.863821 PCI: 00:19.1: enabled 1
801 10:57:05.863904 I2C: 00:15: enabled 1
802 10:57:05.867198 PCI: 00:19.2: enabled 0
803 10:57:05.870560 PCI: 00:1d.0: enabled 1
804 10:57:05.874249 GENERIC: 0.0: enabled 1
805 10:57:05.877318 PCI: 00:1e.0: enabled 1
806 10:57:05.877400 PCI: 00:1e.1: enabled 0
807 10:57:05.881141 PCI: 00:1e.2: enabled 1
808 10:57:05.885192 SPI: 00: enabled 1
809 10:57:05.885274 PCI: 00:1e.3: enabled 1
810 10:57:05.888812 SPI: 00: enabled 1
811 10:57:05.938774 PCI: 00:1f.0: enabled 1
812 10:57:05.938862 PNP: 0c09.0: enabled 1
813 10:57:05.938927 PCI: 00:1f.1: enabled 0
814 10:57:05.939182 PCI: 00:1f.2: enabled 1
815 10:57:05.939250 GENERIC: 0.0: enabled 1
816 10:57:05.939312 GENERIC: 0.0: enabled 1
817 10:57:05.939370 GENERIC: 1.0: enabled 1
818 10:57:05.939449 PCI: 00:1f.3: enabled 1
819 10:57:05.939525 PCI: 00:1f.4: enabled 0
820 10:57:05.939582 PCI: 00:1f.5: enabled 1
821 10:57:05.939828 PCI: 00:1f.6: enabled 0
822 10:57:05.939890 PCI: 00:1f.7: enabled 0
823 10:57:05.939946 CPU_CLUSTER: 0: enabled 1
824 10:57:05.940000 APIC: 00: enabled 1
825 10:57:05.940054 APIC: 01: enabled 1
826 10:57:05.940107 APIC: 03: enabled 1
827 10:57:05.940160 APIC: 07: enabled 1
828 10:57:05.940398 APIC: 05: enabled 1
829 10:57:05.940457 APIC: 04: enabled 1
830 10:57:05.940510 APIC: 02: enabled 1
831 10:57:05.946762 APIC: 06: enabled 1
832 10:57:05.946844 Root Device scanning...
833 10:57:05.949745 scan_static_bus for Root Device
834 10:57:05.949827 DOMAIN: 0000 enabled
835 10:57:05.952737 CPU_CLUSTER: 0 enabled
836 10:57:05.956914 DOMAIN: 0000 scanning...
837 10:57:05.959363 PCI: pci_scan_bus for bus 00
838 10:57:05.962823 PCI: 00:00.0 [8086/0000] ops
839 10:57:05.966447 PCI: 00:00.0 [8086/9a12] enabled
840 10:57:05.969405 PCI: 00:02.0 [8086/0000] bus ops
841 10:57:05.972911 PCI: 00:02.0 [8086/9a40] enabled
842 10:57:05.976444 PCI: 00:04.0 [8086/0000] bus ops
843 10:57:05.979361 PCI: 00:04.0 [8086/9a03] enabled
844 10:57:05.983078 PCI: 00:05.0 [8086/9a19] enabled
845 10:57:05.986576 PCI: 00:07.0 [0000/0000] hidden
846 10:57:05.989784 PCI: 00:08.0 [8086/9a11] enabled
847 10:57:05.993193 PCI: 00:0a.0 [8086/9a0d] disabled
848 10:57:05.995970 PCI: 00:0d.0 [8086/0000] bus ops
849 10:57:05.999459 PCI: 00:0d.0 [8086/9a13] enabled
850 10:57:06.002847 PCI: 00:14.0 [8086/0000] bus ops
851 10:57:06.006369 PCI: 00:14.0 [8086/a0ed] enabled
852 10:57:06.009608 PCI: 00:14.2 [8086/a0ef] enabled
853 10:57:06.012659 PCI: 00:14.3 [8086/0000] bus ops
854 10:57:06.016146 PCI: 00:14.3 [8086/a0f0] enabled
855 10:57:06.019838 PCI: 00:15.0 [8086/0000] bus ops
856 10:57:06.022676 PCI: 00:15.0 [8086/a0e8] enabled
857 10:57:06.026144 PCI: 00:15.1 [8086/0000] bus ops
858 10:57:06.029693 PCI: 00:15.1 [8086/a0e9] enabled
859 10:57:06.032656 PCI: 00:15.2 [8086/0000] bus ops
860 10:57:06.036036 PCI: 00:15.2 [8086/a0ea] enabled
861 10:57:06.039655 PCI: 00:15.3 [8086/0000] bus ops
862 10:57:06.042715 PCI: 00:15.3 [8086/a0eb] enabled
863 10:57:06.045894 PCI: 00:16.0 [8086/0000] ops
864 10:57:06.049271 PCI: 00:16.0 [8086/a0e0] enabled
865 10:57:06.052608 PCI: Static device PCI: 00:17.0 not found, disabling it.
866 10:57:06.056234 PCI: 00:19.0 [8086/0000] bus ops
867 10:57:06.059453 PCI: 00:19.0 [8086/a0c5] disabled
868 10:57:06.062809 PCI: 00:19.1 [8086/0000] bus ops
869 10:57:06.066333 PCI: 00:19.1 [8086/a0c6] enabled
870 10:57:06.069387 PCI: 00:1d.0 [8086/0000] bus ops
871 10:57:06.072650 PCI: 00:1d.0 [8086/a0b0] enabled
872 10:57:06.076055 PCI: 00:1e.0 [8086/0000] ops
873 10:57:06.079304 PCI: 00:1e.0 [8086/a0a8] enabled
874 10:57:06.082993 PCI: 00:1e.2 [8086/0000] bus ops
875 10:57:06.086110 PCI: 00:1e.2 [8086/a0aa] enabled
876 10:57:06.089518 PCI: 00:1e.3 [8086/0000] bus ops
877 10:57:06.093193 PCI: 00:1e.3 [8086/a0ab] enabled
878 10:57:06.096016 PCI: 00:1f.0 [8086/0000] bus ops
879 10:57:06.099800 PCI: 00:1f.0 [8086/a087] enabled
880 10:57:06.102768 RTC Init
881 10:57:06.106247 Set power on after power failure.
882 10:57:06.106385 Disabling Deep S3
883 10:57:06.109325 Disabling Deep S3
884 10:57:06.109489 Disabling Deep S4
885 10:57:06.112914 Disabling Deep S4
886 10:57:06.113089 Disabling Deep S5
887 10:57:06.115890
888 10:57:06.116067 Disabling Deep S5
889 10:57:06.119554 PCI: 00:1f.2 [0000/0000] hidden
890 10:57:06.122912 PCI: 00:1f.3 [8086/0000] bus ops
891 10:57:06.126312 PCI: 00:1f.3 [8086/a0c8] enabled
892 10:57:06.129732 PCI: 00:1f.5 [8086/0000] bus ops
893 10:57:06.132997 PCI: 00:1f.5 [8086/a0a4] enabled
894 10:57:06.136460 PCI: Leftover static devices:
895 10:57:06.136930 PCI: 00:10.2
896 10:57:06.139477 PCI: 00:10.6
897 10:57:06.139908 PCI: 00:10.7
898 10:57:06.143076 PCI: 00:06.0
899 10:57:06.143501 PCI: 00:07.1
900 10:57:06.143834 PCI: 00:07.2
901 10:57:06.146382 PCI: 00:07.3
902 10:57:06.146811 PCI: 00:09.0
903 10:57:06.149875 PCI: 00:0d.1
904 10:57:06.150302 PCI: 00:0d.2
905 10:57:06.150645 PCI: 00:0d.3
906 10:57:06.152882
907 10:57:06.153398 PCI: 00:0e.0
908 10:57:06.153772 PCI: 00:12.0
909 10:57:06.156393 PCI: 00:12.6
910 10:57:06.156820 PCI: 00:13.0
911 10:57:06.159662 PCI: 00:14.1
912 10:57:06.160092 PCI: 00:16.1
913 10:57:06.160427 PCI: 00:16.2
914 10:57:06.163068 PCI: 00:16.3
915 10:57:06.163496 PCI: 00:16.4
916 10:57:06.166006 PCI: 00:16.5
917 10:57:06.166435 PCI: 00:17.0
918 10:57:06.166816 PCI: 00:19.2
919 10:57:06.169635 PCI: 00:1e.1
920 10:57:06.170073 PCI: 00:1f.1
921 10:57:06.172975 PCI: 00:1f.4
922 10:57:06.173425 PCI: 00:1f.6
923 10:57:06.176452 PCI: 00:1f.7
924 10:57:06.176882 PCI: Check your devicetree.cb.
925 10:57:06.179355 PCI: 00:02.0 scanning...
926 10:57:06.182851 scan_generic_bus for PCI: 00:02.0
927 10:57:06.186321 scan_generic_bus for PCI: 00:02.0 done
928 10:57:06.189392
929 10:57:06.193043 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
930 10:57:06.196153 PCI: 00:04.0 scanning...
931 10:57:06.199573 scan_generic_bus for PCI: 00:04.0
932 10:57:06.200002 GENERIC: 0.0 enabled
933 10:57:06.206095 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
934 10:57:06.212660 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
935 10:57:06.213115 PCI: 00:0d.0 scanning...
936 10:57:06.216267 scan_static_bus for PCI: 00:0d.0
937 10:57:06.219752 USB0 port 0 enabled
938 10:57:06.222852 USB0 port 0 scanning...
939 10:57:06.226328 scan_static_bus for USB0 port 0
940 10:57:06.226760 USB3 port 0 enabled
941 10:57:06.229764 USB3 port 1 enabled
942 10:57:06.233098 USB3 port 2 disabled
943 10:57:06.233580 USB3 port 3 disabled
944 10:57:06.236271 USB3 port 0 scanning...
945 10:57:06.239441 scan_static_bus for USB3 port 0
946 10:57:06.242736 scan_static_bus for USB3 port 0 done
947 10:57:06.249313 scan_bus: bus USB3 port 0 finished in 6 msecs
948 10:57:06.249785 USB3 port 1 scanning...
949 10:57:06.252789 scan_static_bus for USB3 port 1
950 10:57:06.259539 scan_static_bus for USB3 port 1 done
951 10:57:06.263086 scan_bus: bus USB3 port 1 finished in 6 msecs
952 10:57:06.266178 scan_static_bus for USB0 port 0 done
953 10:57:06.269443 scan_bus: bus USB0 port 0 finished in 43 msecs
954 10:57:06.275985 scan_static_bus for PCI: 00:0d.0 done
955 10:57:06.279551 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
956 10:57:06.282559 PCI: 00:14.0 scanning...
957 10:57:06.286157 scan_static_bus for PCI: 00:14.0
958 10:57:06.286588 USB0 port 0 enabled
959 10:57:06.289298
960 10:57:06.289749 USB0 port 0 scanning...
961 10:57:06.292877 scan_static_bus for USB0 port 0
962 10:57:06.295912 USB2 port 0 disabled
963 10:57:06.299145 USB2 port 1 enabled
964 10:57:06.299573 USB2 port 2 enabled
965 10:57:06.302536 USB2 port 3 disabled
966 10:57:06.302962 USB2 port 4 enabled
967 10:57:06.306020 USB2 port 5 disabled
968 10:57:06.309552 USB2 port 6 disabled
969 10:57:06.310005 USB2 port 7 disabled
970 10:57:06.312565 USB2 port 8 disabled
971 10:57:06.315746 USB2 port 9 disabled
972 10:57:06.316234 USB3 port 0 disabled
973 10:57:06.319310 USB3 port 1 enabled
974 10:57:06.322799 USB3 port 2 disabled
975 10:57:06.323194 USB3 port 3 disabled
976 10:57:06.325915 USB2 port 1 scanning...
977 10:57:06.329429 scan_static_bus for USB2 port 1
978 10:57:06.332565 scan_static_bus for USB2 port 1 done
979 10:57:06.336032 scan_bus: bus USB2 port 1 finished in 6 msecs
980 10:57:06.339240 USB2 port 2 scanning...
981 10:57:06.342906 scan_static_bus for USB2 port 2
982 10:57:06.345820 scan_static_bus for USB2 port 2 done
983 10:57:06.352430 scan_bus: bus USB2 port 2 finished in 6 msecs
984 10:57:06.352530 USB2 port 4 scanning...
985 10:57:06.355980 scan_static_bus for USB2 port 4
986 10:57:06.363139 scan_static_bus for USB2 port 4 done
987 10:57:06.365989 scan_bus: bus USB2 port 4 finished in 6 msecs
988 10:57:06.369206 USB3 port 1 scanning...
989 10:57:06.372258 scan_static_bus for USB3 port 1
990 10:57:06.375818 scan_static_bus for USB3 port 1 done
991 10:57:06.379206 scan_bus: bus USB3 port 1 finished in 6 msecs
992 10:57:06.382262 scan_static_bus for USB0 port 0 done
993 10:57:06.389178 scan_bus: bus USB0 port 0 finished in 93 msecs
994 10:57:06.392386 scan_static_bus for PCI: 00:14.0 done
995 10:57:06.396017 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
996 10:57:06.398989 PCI: 00:14.3 scanning...
997 10:57:06.402561 scan_static_bus for PCI: 00:14.3
998 10:57:06.405908 GENERIC: 0.0 enabled
999 10:57:06.409187 scan_static_bus for PCI: 00:14.3 done
1000 10:57:06.412747 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1001 10:57:06.415984 PCI: 00:15.0 scanning...
1002 10:57:06.419051 scan_static_bus for PCI: 00:15.0
1003 10:57:06.422820 I2C: 00:1a enabled
1004 10:57:06.423324 I2C: 00:31 enabled
1005 10:57:06.426153 I2C: 00:32 enabled
1006 10:57:06.429202 scan_static_bus for PCI: 00:15.0 done
1007 10:57:06.435623 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1008 10:57:06.436083 PCI: 00:15.1 scanning...
1009 10:57:06.438927 scan_static_bus for PCI: 00:15.1
1010 10:57:06.442259 I2C: 00:10 enabled
1011 10:57:06.445607 scan_static_bus for PCI: 00:15.1 done
1012 10:57:06.452840 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1013 10:57:06.453322 PCI: 00:15.2 scanning...
1014 10:57:06.455523 scan_static_bus for PCI: 00:15.2
1015 10:57:06.462468 scan_static_bus for PCI: 00:15.2 done
1016 10:57:06.466205 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1017 10:57:06.469685 PCI: 00:15.3 scanning...
1018 10:57:06.472628 scan_static_bus for PCI: 00:15.3
1019 10:57:06.476242 scan_static_bus for PCI: 00:15.3 done
1020 10:57:06.479211 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1021 10:57:06.482616 PCI: 00:19.1 scanning...
1022 10:57:06.485858 scan_static_bus for PCI: 00:19.1
1023 10:57:06.488896 I2C: 00:15 enabled
1024 10:57:06.493020 scan_static_bus for PCI: 00:19.1 done
1025 10:57:06.496308 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1026 10:57:06.499286 PCI: 00:1d.0 scanning...
1027 10:57:06.502275 do_pci_scan_bridge for PCI: 00:1d.0
1028 10:57:06.505957 PCI: pci_scan_bus for bus 01
1029 10:57:06.509110 PCI: 01:00.0 [1c5c/174a] enabled
1030 10:57:06.512733 GENERIC: 0.0 enabled
1031 10:57:06.515845 Enabling Common Clock Configuration
1032 10:57:06.519203 L1 Sub-State supported from root port 29
1033 10:57:06.522399 L1 Sub-State Support = 0xf
1034 10:57:06.525707 CommonModeRestoreTime = 0x28
1035 10:57:06.529406 Power On Value = 0x16, Power On Scale = 0x0
1036 10:57:06.532440 ASPM: Enabled L1
1037 10:57:06.535851 PCIe: Max_Payload_Size adjusted to 128
1038 10:57:06.538939 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1039 10:57:06.542287 PCI: 00:1e.2 scanning...
1040 10:57:06.546002 scan_generic_bus for PCI: 00:1e.2
1041 10:57:06.548969 SPI: 00 enabled
1042 10:57:06.555812 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1043 10:57:06.558906 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1044 10:57:06.562594 PCI: 00:1e.3 scanning...
1045 10:57:06.565556 scan_generic_bus for PCI: 00:1e.3
1046 10:57:06.566029 SPI: 00 enabled
1047 10:57:06.572520 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1048 10:57:06.578944 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1049 10:57:06.579496 PCI: 00:1f.0 scanning...
1050 10:57:06.582295 scan_static_bus for PCI: 00:1f.0
1051 10:57:06.585829 PNP: 0c09.0 enabled
1052 10:57:06.588942 PNP: 0c09.0 scanning...
1053 10:57:06.592090 scan_static_bus for PNP: 0c09.0
1054 10:57:06.595723 scan_static_bus for PNP: 0c09.0 done
1055 10:57:06.599225 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1056 10:57:06.605675 scan_static_bus for PCI: 00:1f.0 done
1057 10:57:06.608839 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1058 10:57:06.612253 PCI: 00:1f.2 scanning...
1059 10:57:06.615740 scan_static_bus for PCI: 00:1f.2
1060 10:57:06.616225 GENERIC: 0.0 enabled
1061 10:57:06.618678 GENERIC: 0.0 scanning...
1062 10:57:06.622256 scan_static_bus for GENERIC: 0.0
1063 10:57:06.625526 GENERIC: 0.0 enabled
1064 10:57:06.628913 GENERIC: 1.0 enabled
1065 10:57:06.632007 scan_static_bus for GENERIC: 0.0 done
1066 10:57:06.635671 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1067 10:57:06.638683 scan_static_bus for PCI: 00:1f.2 done
1068 10:57:06.645381 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1069 10:57:06.648754 PCI: 00:1f.3 scanning...
1070 10:57:06.652040 scan_static_bus for PCI: 00:1f.3
1071 10:57:06.655183 scan_static_bus for PCI: 00:1f.3 done
1072 10:57:06.658455 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1073 10:57:06.661867 PCI: 00:1f.5 scanning...
1074 10:57:06.665089 scan_generic_bus for PCI: 00:1f.5
1075 10:57:06.668349 scan_generic_bus for PCI: 00:1f.5 done
1076 10:57:06.675640 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1077 10:57:06.678311 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1078 10:57:06.681853 scan_static_bus for Root Device done
1079 10:57:06.688490 scan_bus: bus Root Device finished in 737 msecs
1080 10:57:06.688933 done
1081 10:57:06.695012 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1082 10:57:06.698385 Chrome EC: UHEPI supported
1083 10:57:06.705089 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1084 10:57:06.708111 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1085 10:57:06.715056 SPI flash protection: WPSW=0 SRP0=0
1086 10:57:06.718114 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1087 10:57:06.724686 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1088 10:57:06.728299 found VGA at PCI: 00:02.0
1089 10:57:06.728742 Setting up VGA for PCI: 00:02.0
1090 10:57:06.731753
1091 10:57:06.734747 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1092 10:57:06.741381 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1093 10:57:06.741864 Allocating resources...
1094 10:57:06.744820 Reading resources...
1095 10:57:06.748048 Root Device read_resources bus 0 link: 0
1096 10:57:06.751728 DOMAIN: 0000 read_resources bus 0 link: 0
1097 10:57:06.754696
1098 10:57:06.758370 PCI: 00:04.0 read_resources bus 1 link: 0
1099 10:57:06.764738 PCI: 00:04.0 read_resources bus 1 link: 0 done
1100 10:57:06.767849 PCI: 00:0d.0 read_resources bus 0 link: 0
1101 10:57:06.771383 USB0 port 0 read_resources bus 0 link: 0
1102 10:57:06.778574 USB0 port 0 read_resources bus 0 link: 0 done
1103 10:57:06.781381 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1104 10:57:06.788053 PCI: 00:14.0 read_resources bus 0 link: 0
1105 10:57:06.791496 USB0 port 0 read_resources bus 0 link: 0
1106 10:57:06.798279 USB0 port 0 read_resources bus 0 link: 0 done
1107 10:57:06.801682 PCI: 00:14.0 read_resources bus 0 link: 0 done
1108 10:57:06.807859 PCI: 00:14.3 read_resources bus 0 link: 0
1109 10:57:06.811459 PCI: 00:14.3 read_resources bus 0 link: 0 done
1110 10:57:06.818340 PCI: 00:15.0 read_resources bus 0 link: 0
1111 10:57:06.821407 PCI: 00:15.0 read_resources bus 0 link: 0 done
1112 10:57:06.828138 PCI: 00:15.1 read_resources bus 0 link: 0
1113 10:57:06.831159 PCI: 00:15.1 read_resources bus 0 link: 0 done
1114 10:57:06.838758 PCI: 00:19.1 read_resources bus 0 link: 0
1115 10:57:06.841917 PCI: 00:19.1 read_resources bus 0 link: 0 done
1116 10:57:06.848322 PCI: 00:1d.0 read_resources bus 1 link: 0
1117 10:57:06.851971 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1118 10:57:06.858685 PCI: 00:1e.2 read_resources bus 2 link: 0
1119 10:57:06.862006 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1120 10:57:06.868422 PCI: 00:1e.3 read_resources bus 3 link: 0
1121 10:57:06.871873 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1122 10:57:06.878586 PCI: 00:1f.0 read_resources bus 0 link: 0
1123 10:57:06.882088 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1124 10:57:06.885220 PCI: 00:1f.2 read_resources bus 0 link: 0
1125 10:57:06.892131 GENERIC: 0.0 read_resources bus 0 link: 0
1126 10:57:06.895447 GENERIC: 0.0 read_resources bus 0 link: 0 done
1127 10:57:06.902022 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1128 10:57:06.908742 DOMAIN: 0000 read_resources bus 0 link: 0 done
1129 10:57:06.911802 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1130 10:57:06.915426 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1131 10:57:06.918458
1132 10:57:06.921986 Root Device read_resources bus 0 link: 0 done
1133 10:57:06.925063 Done reading resources.
1134 10:57:06.928536 Show resources in subtree (Root Device)...After reading.
1135 10:57:06.935238 Root Device child on link 0 DOMAIN: 0000
1136 10:57:06.938678 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 10:57:06.948314 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 10:57:06.958514 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 10:57:06.958960 PCI: 00:00.0
1140 10:57:06.968385 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 10:57:06.978085 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 10:57:06.988105 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 10:57:06.998135 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 10:57:07.005095 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 10:57:07.007952
1146 10:57:07.014984 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1147 10:57:07.024708 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1148 10:57:07.034836 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1149 10:57:07.044404 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1150 10:57:07.054654 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1151 10:57:07.061191 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1152 10:57:07.071128 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1153 10:57:07.080996 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1154 10:57:07.090904 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1155 10:57:07.101156 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1156 10:57:07.107778 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1157 10:57:07.117584 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1158 10:57:07.121056
1159 10:57:07.127708 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1160 10:57:07.137622 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1161 10:57:07.147796 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1162 10:57:07.148250 PCI: 00:02.0
1163 10:57:07.150794
1164 10:57:07.160772 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1165 10:57:07.170789 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1166 10:57:07.177508 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1167 10:57:07.184151 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1168 10:57:07.194178 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1169 10:57:07.194669 GENERIC: 0.0
1170 10:57:07.197294 PCI: 00:05.0
1171 10:57:07.207296 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1172 10:57:07.210577 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1173 10:57:07.214200 GENERIC: 0.0
1174 10:57:07.214686 PCI: 00:08.0
1175 10:57:07.224226 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 10:57:07.227391 PCI: 00:0a.0
1177 10:57:07.230623 PCI: 00:0d.0 child on link 0 USB0 port 0
1178 10:57:07.240664 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1179 10:57:07.244096 USB0 port 0 child on link 0 USB3 port 0
1180 10:57:07.247143 USB3 port 0
1181 10:57:07.247609 USB3 port 1
1182 10:57:07.250736 USB3 port 2
1183 10:57:07.251180 USB3 port 3
1184 10:57:07.257043 PCI: 00:14.0 child on link 0 USB0 port 0
1185 10:57:07.267402 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1186 10:57:07.270413 USB0 port 0 child on link 0 USB2 port 0
1187 10:57:07.273838 USB2 port 0
1188 10:57:07.274281 USB2 port 1
1189 10:57:07.277101 USB2 port 2
1190 10:57:07.277567 USB2 port 3
1191 10:57:07.280215 USB2 port 4
1192 10:57:07.280661 USB2 port 5
1193 10:57:07.283494 USB2 port 6
1194 10:57:07.283940 USB2 port 7
1195 10:57:07.287167 USB2 port 8
1196 10:57:07.287608 USB2 port 9
1197 10:57:07.290490 USB3 port 0
1198 10:57:07.290955 USB3 port 1
1199 10:57:07.293811 USB3 port 2
1200 10:57:07.296877 USB3 port 3
1201 10:57:07.297321 PCI: 00:14.2
1202 10:57:07.306722 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 10:57:07.317132 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1204 10:57:07.320200 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1205 10:57:07.330168 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1206 10:57:07.333668 GENERIC: 0.0
1207 10:57:07.337074 PCI: 00:15.0 child on link 0 I2C: 00:1a
1208 10:57:07.346798 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 10:57:07.350258 I2C: 00:1a
1210 10:57:07.350699 I2C: 00:31
1211 10:57:07.353323 I2C: 00:32
1212 10:57:07.357063 PCI: 00:15.1 child on link 0 I2C: 00:10
1213 10:57:07.367012 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 10:57:07.367455 I2C: 00:10
1215 10:57:07.369913 PCI: 00:15.2
1216 10:57:07.379966 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1217 10:57:07.380410 PCI: 00:15.3
1218 10:57:07.390056 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 10:57:07.393400 PCI: 00:16.0
1220 10:57:07.403263 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1221 10:57:07.403708 PCI: 00:19.0
1222 10:57:07.410038 PCI: 00:19.1 child on link 0 I2C: 00:15
1223 10:57:07.419769 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 10:57:07.420304 I2C: 00:15
1225 10:57:07.423186 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1226 10:57:07.426583
1227 10:57:07.433249 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1228 10:57:07.443110 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1229 10:57:07.453402 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1230 10:57:07.453943 GENERIC: 0.0
1231 10:57:07.456211 PCI: 01:00.0
1232 10:57:07.466314 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 10:57:07.476081 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1234 10:57:07.483119 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1235 10:57:07.486062
1236 10:57:07.486692 PCI: 00:1e.0
1237 10:57:07.496647 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1238 10:57:07.503152 PCI: 00:1e.2 child on link 0 SPI: 00
1239 10:57:07.512603 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 10:57:07.513118 SPI: 00
1241 10:57:07.516217 PCI: 00:1e.3 child on link 0 SPI: 00
1242 10:57:07.526250 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 10:57:07.529295 SPI: 00
1244 10:57:07.532919 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1245 10:57:07.539548 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1246 10:57:07.542582 PNP: 0c09.0
1247 10:57:07.552819 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1248 10:57:07.555808 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1249 10:57:07.565810 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1250 10:57:07.576011 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1251 10:57:07.578955 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1252 10:57:07.582427 GENERIC: 0.0
1253 10:57:07.582868 GENERIC: 1.0
1254 10:57:07.586057 PCI: 00:1f.3
1255 10:57:07.596052 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1256 10:57:07.605985 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1257 10:57:07.606432 PCI: 00:1f.5
1258 10:57:07.615841 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1259 10:57:07.619421 CPU_CLUSTER: 0 child on link 0 APIC: 00
1260 10:57:07.622503 APIC: 00
1261 10:57:07.622948 APIC: 01
1262 10:57:07.623326 APIC: 03
1263 10:57:07.626202 APIC: 07
1264 10:57:07.626642 APIC: 05
1265 10:57:07.626991 APIC: 04
1266 10:57:07.629006 APIC: 02
1267 10:57:07.629456 APIC: 06
1268 10:57:07.639230 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1269 10:57:07.642696 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1270 10:57:07.649192 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1271 10:57:07.655801 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1272 10:57:07.659003 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1273 10:57:07.662548 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1274 10:57:07.668961 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1275 10:57:07.675525 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1276 10:57:07.682662 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1277 10:57:07.689215 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1278 10:57:07.698780 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1279 10:57:07.702345 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1280 10:57:07.712138 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1281 10:57:07.719102 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1282 10:57:07.725840 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1283 10:57:07.728908 DOMAIN: 0000: Resource ranges:
1284 10:57:07.732078 * Base: 1000, Size: 800, Tag: 100
1285 10:57:07.735499 * Base: 1900, Size: e700, Tag: 100
1286 10:57:07.742108 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1287 10:57:07.748802 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1288 10:57:07.755550 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1289 10:57:07.762129 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1290 10:57:07.772280 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1291 10:57:07.778598 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1292 10:57:07.785424 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1293 10:57:07.795007 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1294 10:57:07.801755 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1295 10:57:07.808647 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1296 10:57:07.818212 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1297 10:57:07.825300 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1298 10:57:07.831573 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1299 10:57:07.841763 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1300 10:57:07.848234 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1301 10:57:07.854960 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1302 10:57:07.865127 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1303 10:57:07.871656 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1304 10:57:07.878156 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1305 10:57:07.887962 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1306 10:57:07.894930 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1307 10:57:07.901301 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1308 10:57:07.911539 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1309 10:57:07.918269 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1310 10:57:07.924681 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1311 10:57:07.927857 DOMAIN: 0000: Resource ranges:
1312 10:57:07.934566 * Base: 7fc00000, Size: 40400000, Tag: 200
1313 10:57:07.938044 * Base: d0000000, Size: 28000000, Tag: 200
1314 10:57:07.941139 * Base: fa000000, Size: 1000000, Tag: 200
1315 10:57:07.944573 * Base: fb001000, Size: 2fff000, Tag: 200
1316 10:57:07.951241 * Base: fe010000, Size: 2e000, Tag: 200
1317 10:57:07.954354 * Base: fe03f000, Size: d41000, Tag: 200
1318 10:57:07.957846 * Base: fed88000, Size: 8000, Tag: 200
1319 10:57:07.960883 * Base: fed93000, Size: d000, Tag: 200
1320 10:57:07.967717 * Base: feda2000, Size: 1e000, Tag: 200
1321 10:57:07.971211 * Base: fede0000, Size: 1220000, Tag: 200
1322 10:57:07.974498 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1323 10:57:07.980990 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1324 10:57:07.987826 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1325 10:57:07.994197 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1326 10:57:08.001100 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1327 10:57:08.007772 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1328 10:57:08.014050 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1329 10:57:08.021113 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1330 10:57:08.027823 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1331 10:57:08.034500 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1332 10:57:08.040730 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1333 10:57:08.047468 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1334 10:57:08.054128 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1335 10:57:08.060751 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1336 10:57:08.067547 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1337 10:57:08.074065 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1338 10:57:08.080726 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1339 10:57:08.087341 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1340 10:57:08.093582 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1341 10:57:08.100514 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1342 10:57:08.106903 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1343 10:57:08.114012 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1344 10:57:08.120526 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1345 10:57:08.130119 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1346 10:57:08.136710 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1347 10:57:08.140439 PCI: 00:1d.0: Resource ranges:
1348 10:57:08.143448 * Base: 7fc00000, Size: 100000, Tag: 200
1349 10:57:08.150123 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1350 10:57:08.156767 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1351 10:57:08.163697 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1352 10:57:08.173314 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1353 10:57:08.180022 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1354 10:57:08.183351 Root Device assign_resources, bus 0 link: 0
1355 10:57:08.190035 DOMAIN: 0000 assign_resources, bus 0 link: 0
1356 10:57:08.196941 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1357 10:57:08.206605 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1358 10:57:08.213364 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1359 10:57:08.223230 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1360 10:57:08.226638 PCI: 00:04.0 assign_resources, bus 1 link: 0
1361 10:57:08.230166 PCI: 00:04.0 assign_resources, bus 1 link: 0
1362 10:57:08.239886 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1363 10:57:08.246774 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1364 10:57:08.256579 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1365 10:57:08.259546 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1366 10:57:08.266507 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1367 10:57:08.273197 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1368 10:57:08.276249 PCI: 00:14.0 assign_resources, bus 0 link: 0
1369 10:57:08.283130 PCI: 00:14.0 assign_resources, bus 0 link: 0
1370 10:57:08.290187 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1371 10:57:08.299710 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1372 10:57:08.306373 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1373 10:57:08.313156 PCI: 00:14.3 assign_resources, bus 0 link: 0
1374 10:57:08.316645 PCI: 00:14.3 assign_resources, bus 0 link: 0
1375 10:57:08.323247 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1376 10:57:08.329660 PCI: 00:15.0 assign_resources, bus 0 link: 0
1377 10:57:08.333338 PCI: 00:15.0 assign_resources, bus 0 link: 0
1378 10:57:08.343024 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1379 10:57:08.346689 PCI: 00:15.1 assign_resources, bus 0 link: 0
1380 10:57:08.349536 PCI: 00:15.1 assign_resources, bus 0 link: 0
1381 10:57:08.353128
1382 10:57:08.359847 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1383 10:57:08.366101 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1384 10:57:08.369755
1385 10:57:08.376168 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1386 10:57:08.383273 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1387 10:57:08.389670 PCI: 00:19.1 assign_resources, bus 0 link: 0
1388 10:57:08.392744 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 10:57:08.403176 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1390 10:57:08.412639 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1391 10:57:08.419311 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1392 10:57:08.426118 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1393 10:57:08.432937 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1394 10:57:08.442773 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1395 10:57:08.449473 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1396 10:57:08.452569 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1397 10:57:08.462925 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1398 10:57:08.465818 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1399 10:57:08.472963 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 10:57:08.479275 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1401 10:57:08.482561 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1402 10:57:08.489460 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 10:57:08.492850 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1404 10:57:08.499499 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 10:57:08.502736 LPC: Trying to open IO window from 800 size 1ff
1406 10:57:08.512848 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1407 10:57:08.519682 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1408 10:57:08.529289 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1409 10:57:08.532709 DOMAIN: 0000 assign_resources, bus 0 link: 0
1410 10:57:08.536114 Root Device assign_resources, bus 0 link: 0
1411 10:57:08.539205 Done setting resources.
1412 10:57:08.545734 Show resources in subtree (Root Device)...After assigning values.
1413 10:57:08.549349 Root Device child on link 0 DOMAIN: 0000
1414 10:57:08.555863 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1415 10:57:08.566034 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1416 10:57:08.572587 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1417 10:57:08.575525
1418 10:57:08.575983 PCI: 00:00.0
1419 10:57:08.585553 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 10:57:08.595902 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 10:57:08.605922 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 10:57:08.612192 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 10:57:08.622433 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 10:57:08.632351 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 10:57:08.642276 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 10:57:08.651950 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 10:57:08.661810 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 10:57:08.668725 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 10:57:08.678685 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 10:57:08.688775 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 10:57:08.698826 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 10:57:08.705422 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 10:57:08.714819 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 10:57:08.724798 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 10:57:08.735421 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 10:57:08.745323 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 10:57:08.755197 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 10:57:08.765123 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 10:57:08.765641 PCI: 00:02.0
1440 10:57:08.775291 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 10:57:08.788606 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 10:57:08.795005 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 10:57:08.801376 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 10:57:08.811747 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 10:57:08.812238 GENERIC: 0.0
1446 10:57:08.814847 PCI: 00:05.0
1447 10:57:08.824871 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 10:57:08.828502 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 10:57:08.831323
1450 10:57:08.831791 GENERIC: 0.0
1451 10:57:08.834888 PCI: 00:08.0
1452 10:57:08.844643 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1453 10:57:08.845171 PCI: 00:0a.0
1454 10:57:08.848200 PCI: 00:0d.0 child on link 0 USB0 port 0
1455 10:57:08.861270 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1456 10:57:08.864735 USB0 port 0 child on link 0 USB3 port 0
1457 10:57:08.865211 USB3 port 0
1458 10:57:08.868468 USB3 port 1
1459 10:57:08.868960 USB3 port 2
1460 10:57:08.871349
1461 10:57:08.871839 USB3 port 3
1462 10:57:08.874891 PCI: 00:14.0 child on link 0 USB0 port 0
1463 10:57:08.884931 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1464 10:57:08.888122
1465 10:57:08.891358 USB0 port 0 child on link 0 USB2 port 0
1466 10:57:08.891873 USB2 port 0
1467 10:57:08.894715 USB2 port 1
1468 10:57:08.895230 USB2 port 2
1469 10:57:08.897911 USB2 port 3
1470 10:57:08.898402 USB2 port 4
1471 10:57:08.901590 USB2 port 5
1472 10:57:08.904362 USB2 port 6
1473 10:57:08.904866 USB2 port 7
1474 10:57:08.908010 USB2 port 8
1475 10:57:08.908498 USB2 port 9
1476 10:57:08.911425 USB3 port 0
1477 10:57:08.911971 USB3 port 1
1478 10:57:08.914826 USB3 port 2
1479 10:57:08.915356 USB3 port 3
1480 10:57:08.918195 PCI: 00:14.2
1481 10:57:08.928090 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1482 10:57:08.937809 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1483 10:57:08.941116 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1484 10:57:08.951196 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1485 10:57:08.954976 GENERIC: 0.0
1486 10:57:08.957872 PCI: 00:15.0 child on link 0 I2C: 00:1a
1487 10:57:08.967723 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1488 10:57:08.971117 I2C: 00:1a
1489 10:57:08.971606 I2C: 00:31
1490 10:57:08.974273 I2C: 00:32
1491 10:57:08.977589 PCI: 00:15.1 child on link 0 I2C: 00:10
1492 10:57:08.987699 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1493 10:57:08.991306 I2C: 00:10
1494 10:57:08.991799 PCI: 00:15.2
1495 10:57:09.001088 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1496 10:57:09.004398 PCI: 00:15.3
1497 10:57:09.014391 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1498 10:57:09.014866 PCI: 00:16.0
1499 10:57:09.024563 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1500 10:57:09.027704
1501 10:57:09.028140 PCI: 00:19.0
1502 10:57:09.030760 PCI: 00:19.1 child on link 0 I2C: 00:15
1503 10:57:09.040726 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1504 10:57:09.044285 I2C: 00:15
1505 10:57:09.047346 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1506 10:57:09.057472 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1507 10:57:09.070593 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1508 10:57:09.080618 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1509 10:57:09.081088 GENERIC: 0.0
1510 10:57:09.084139 PCI: 01:00.0
1511 10:57:09.093940 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1512 10:57:09.103936 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1513 10:57:09.114103 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1514 10:57:09.117447 PCI: 00:1e.0
1515 10:57:09.127345 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1516 10:57:09.130435 PCI: 00:1e.2 child on link 0 SPI: 00
1517 10:57:09.140210 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1518 10:57:09.143681 SPI: 00
1519 10:57:09.146911 PCI: 00:1e.3 child on link 0 SPI: 00
1520 10:57:09.156931 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1521 10:57:09.157387 SPI: 00
1522 10:57:09.163496 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1523 10:57:09.170326 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1524 10:57:09.173543 PNP: 0c09.0
1525 10:57:09.183561 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1526 10:57:09.187019 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1527 10:57:09.197040 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1528 10:57:09.203954 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1529 10:57:09.207052
1530 10:57:09.210159 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1531 10:57:09.210630 GENERIC: 0.0
1532 10:57:09.213533 GENERIC: 1.0
1533 10:57:09.214032 PCI: 00:1f.3
1534 10:57:09.227298 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1535 10:57:09.236639 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1536 10:57:09.237148 PCI: 00:1f.5
1537 10:57:09.247053 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1538 10:57:09.253332 CPU_CLUSTER: 0 child on link 0 APIC: 00
1539 10:57:09.253894 APIC: 00
1540 10:57:09.254385 APIC: 01
1541 10:57:09.257101 APIC: 03
1542 10:57:09.257781 APIC: 07
1543 10:57:09.260177 APIC: 05
1544 10:57:09.260750 APIC: 04
1545 10:57:09.261255 APIC: 02
1546 10:57:09.263528 APIC: 06
1547 10:57:09.264042 Done allocating resources.
1548 10:57:09.266889
1549 10:57:09.270331 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1550 10:57:09.277267 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1551 10:57:09.280259 Configure GPIOs for I2S audio on UP4.
1552 10:57:09.287983 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1553 10:57:09.291378 Enabling resources...
1554 10:57:09.294226 PCI: 00:00.0 subsystem <- 8086/9a12
1555 10:57:09.297895 PCI: 00:00.0 cmd <- 06
1556 10:57:09.301251 PCI: 00:02.0 subsystem <- 8086/9a40
1557 10:57:09.304355 PCI: 00:02.0 cmd <- 03
1558 10:57:09.307674 PCI: 00:04.0 subsystem <- 8086/9a03
1559 10:57:09.308175 PCI: 00:04.0 cmd <- 02
1560 10:57:09.314823 PCI: 00:05.0 subsystem <- 8086/9a19
1561 10:57:09.315315 PCI: 00:05.0 cmd <- 02
1562 10:57:09.317941 PCI: 00:08.0 subsystem <- 8086/9a11
1563 10:57:09.321270 PCI: 00:08.0 cmd <- 06
1564 10:57:09.324753 PCI: 00:0d.0 subsystem <- 8086/9a13
1565 10:57:09.327567 PCI: 00:0d.0 cmd <- 02
1566 10:57:09.330904 PCI: 00:14.0 subsystem <- 8086/a0ed
1567 10:57:09.334621 PCI: 00:14.0 cmd <- 02
1568 10:57:09.337526 PCI: 00:14.2 subsystem <- 8086/a0ef
1569 10:57:09.341183 PCI: 00:14.2 cmd <- 02
1570 10:57:09.344247 PCI: 00:14.3 subsystem <- 8086/a0f0
1571 10:57:09.347768 PCI: 00:14.3 cmd <- 02
1572 10:57:09.351203 PCI: 00:15.0 subsystem <- 8086/a0e8
1573 10:57:09.354442 PCI: 00:15.0 cmd <- 02
1574 10:57:09.357391 PCI: 00:15.1 subsystem <- 8086/a0e9
1575 10:57:09.357865 PCI: 00:15.1 cmd <- 02
1576 10:57:09.364376 PCI: 00:15.2 subsystem <- 8086/a0ea
1577 10:57:09.364812 PCI: 00:15.2 cmd <- 02
1578 10:57:09.367426 PCI: 00:15.3 subsystem <- 8086/a0eb
1579 10:57:09.370915 PCI: 00:15.3 cmd <- 02
1580 10:57:09.374141 PCI: 00:16.0 subsystem <- 8086/a0e0
1581 10:57:09.377840 PCI: 00:16.0 cmd <- 02
1582 10:57:09.380749 PCI: 00:19.1 subsystem <- 8086/a0c6
1583 10:57:09.384514 PCI: 00:19.1 cmd <- 02
1584 10:57:09.387572 PCI: 00:1d.0 bridge ctrl <- 0013
1585 10:57:09.391121 PCI: 00:1d.0 subsystem <- 8086/a0b0
1586 10:57:09.394461 PCI: 00:1d.0 cmd <- 06
1587 10:57:09.397432 PCI: 00:1e.0 subsystem <- 8086/a0a8
1588 10:57:09.400922 PCI: 00:1e.0 cmd <- 06
1589 10:57:09.404161 PCI: 00:1e.2 subsystem <- 8086/a0aa
1590 10:57:09.404641 PCI: 00:1e.2 cmd <- 06
1591 10:57:09.407581
1592 10:57:09.410573 PCI: 00:1e.3 subsystem <- 8086/a0ab
1593 10:57:09.411009 PCI: 00:1e.3 cmd <- 02
1594 10:57:09.417384 PCI: 00:1f.0 subsystem <- 8086/a087
1595 10:57:09.417899 PCI: 00:1f.0 cmd <- 407
1596 10:57:09.420916 PCI: 00:1f.3 subsystem <- 8086/a0c8
1597 10:57:09.424190 PCI: 00:1f.3 cmd <- 02
1598 10:57:09.427340 PCI: 00:1f.5 subsystem <- 8086/a0a4
1599 10:57:09.430327 PCI: 00:1f.5 cmd <- 406
1600 10:57:09.435322 PCI: 01:00.0 cmd <- 02
1601 10:57:09.440104 done.
1602 10:57:09.443051 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1603 10:57:09.446297 Initializing devices...
1604 10:57:09.449874 Root Device init
1605 10:57:09.453309 Chrome EC: Set SMI mask to 0x0000000000000000
1606 10:57:09.459951 Chrome EC: clear events_b mask to 0x0000000000000000
1607 10:57:09.466501 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1608 10:57:09.473086 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1609 10:57:09.476192 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1610 10:57:09.483177 Chrome EC: Set WAKE mask to 0x0000000000000000
1611 10:57:09.486408 fw_config match found: DB_USB=USB3_ACTIVE
1612 10:57:09.492878 Configure Right Type-C port orientation for retimer
1613 10:57:09.495885 Root Device init finished in 43 msecs
1614 10:57:09.499632 PCI: 00:00.0 init
1615 10:57:09.502672 CPU TDP = 9 Watts
1616 10:57:09.503111 CPU PL1 = 9 Watts
1617 10:57:09.506113 CPU PL2 = 40 Watts
1618 10:57:09.509708 CPU PL4 = 83 Watts
1619 10:57:09.512966 PCI: 00:00.0 init finished in 8 msecs
1620 10:57:09.513399 PCI: 00:02.0 init
1621 10:57:09.516124 GMA: Found VBT in CBFS
1622 10:57:09.519585 GMA: Found valid VBT in CBFS
1623 10:57:09.525858 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1624 10:57:09.532895 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1625 10:57:09.536068 PCI: 00:02.0 init finished in 18 msecs
1626 10:57:09.539252 PCI: 00:05.0 init
1627 10:57:09.542752 PCI: 00:05.0 init finished in 0 msecs
1628 10:57:09.546060 PCI: 00:08.0 init
1629 10:57:09.549504 PCI: 00:08.0 init finished in 0 msecs
1630 10:57:09.552373 PCI: 00:14.0 init
1631 10:57:09.555943 PCI: 00:14.0 init finished in 0 msecs
1632 10:57:09.559306 PCI: 00:14.2 init
1633 10:57:09.562413 PCI: 00:14.2 init finished in 0 msecs
1634 10:57:09.562848 PCI: 00:15.0 init
1635 10:57:09.565834
1636 10:57:09.566269 I2C bus 0 version 0x3230302a
1637 10:57:09.569437 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 10:57:09.572440
1639 10:57:09.575778 PCI: 00:15.0 init finished in 6 msecs
1640 10:57:09.576215 PCI: 00:15.1 init
1641 10:57:09.579046 I2C bus 1 version 0x3230302a
1642 10:57:09.582194 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1643 10:57:09.585629 PCI: 00:15.1 init finished in 6 msecs
1644 10:57:09.589592 PCI: 00:15.2 init
1645 10:57:09.592966 I2C bus 2 version 0x3230302a
1646 10:57:09.595943 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1647 10:57:09.599066 PCI: 00:15.2 init finished in 6 msecs
1648 10:57:09.602219 PCI: 00:15.3 init
1649 10:57:09.605615 I2C bus 3 version 0x3230302a
1650 10:57:09.609274 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1651 10:57:09.612283 PCI: 00:15.3 init finished in 6 msecs
1652 10:57:09.616048 PCI: 00:16.0 init
1653 10:57:09.618948 PCI: 00:16.0 init finished in 0 msecs
1654 10:57:09.622511 PCI: 00:19.1 init
1655 10:57:09.622953 I2C bus 5 version 0x3230302a
1656 10:57:09.629101 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1657 10:57:09.632490 PCI: 00:19.1 init finished in 6 msecs
1658 10:57:09.632930 PCI: 00:1d.0 init
1659 10:57:09.635595 Initializing PCH PCIe bridge.
1660 10:57:09.638983 PCI: 00:1d.0 init finished in 3 msecs
1661 10:57:09.643277 PCI: 00:1f.0 init
1662 10:57:09.646768 IOAPIC: Initializing IOAPIC at 0xfec00000
1663 10:57:09.653339 IOAPIC: Bootstrap Processor Local APIC = 0x00
1664 10:57:09.653811 IOAPIC: ID = 0x02
1665 10:57:09.656829 IOAPIC: Dumping registers
1666 10:57:09.659837 reg 0x0000: 0x02000000
1667 10:57:09.663375 reg 0x0001: 0x00770020
1668 10:57:09.663818 reg 0x0002: 0x00000000
1669 10:57:09.670175 PCI: 00:1f.0 init finished in 21 msecs
1670 10:57:09.670620 PCI: 00:1f.2 init
1671 10:57:09.673140 Disabling ACPI via APMC.
1672 10:57:09.677639 APMC done.
1673 10:57:09.680392 PCI: 00:1f.2 init finished in 5 msecs
1674 10:57:09.692434 PCI: 01:00.0 init
1675 10:57:09.695902 PCI: 01:00.0 init finished in 0 msecs
1676 10:57:09.699120 PNP: 0c09.0 init
1677 10:57:09.702731 Google Chrome EC uptime: 8.351 seconds
1678 10:57:09.709427 Google Chrome AP resets since EC boot: 1
1679 10:57:09.712447 Google Chrome most recent AP reset causes:
1680 10:57:09.716063 0.346: 32775 shutdown: entering G3
1681 10:57:09.722320 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1682 10:57:09.725652 PNP: 0c09.0 init finished in 22 msecs
1683 10:57:09.731622 Devices initialized
1684 10:57:09.734994 Show all devs... After init.
1685 10:57:09.738011 Root Device: enabled 1
1686 10:57:09.738470 DOMAIN: 0000: enabled 1
1687 10:57:09.741546 CPU_CLUSTER: 0: enabled 1
1688 10:57:09.744530 PCI: 00:00.0: enabled 1
1689 10:57:09.748144 PCI: 00:02.0: enabled 1
1690 10:57:09.748605 PCI: 00:04.0: enabled 1
1691 10:57:09.751280 PCI: 00:05.0: enabled 1
1692 10:57:09.754789 PCI: 00:06.0: enabled 0
1693 10:57:09.758121 PCI: 00:07.0: enabled 0
1694 10:57:09.758556 PCI: 00:07.1: enabled 0
1695 10:57:09.761171 PCI: 00:07.2: enabled 0
1696 10:57:09.764751 PCI: 00:07.3: enabled 0
1697 10:57:09.767856 PCI: 00:08.0: enabled 1
1698 10:57:09.768295 PCI: 00:09.0: enabled 0
1699 10:57:09.771312 PCI: 00:0a.0: enabled 0
1700 10:57:09.774707 PCI: 00:0d.0: enabled 1
1701 10:57:09.778027 PCI: 00:0d.1: enabled 0
1702 10:57:09.778466 PCI: 00:0d.2: enabled 0
1703 10:57:09.781119 PCI: 00:0d.3: enabled 0
1704 10:57:09.784632 PCI: 00:0e.0: enabled 0
1705 10:57:09.785068 PCI: 00:10.2: enabled 1
1706 10:57:09.787777 PCI: 00:10.6: enabled 0
1707 10:57:09.791199 PCI: 00:10.7: enabled 0
1708 10:57:09.794619 PCI: 00:12.0: enabled 0
1709 10:57:09.795053 PCI: 00:12.6: enabled 0
1710 10:57:09.797817 PCI: 00:13.0: enabled 0
1711 10:57:09.801217 PCI: 00:14.0: enabled 1
1712 10:57:09.804311 PCI: 00:14.1: enabled 0
1713 10:57:09.804744 PCI: 00:14.2: enabled 1
1714 10:57:09.807927 PCI: 00:14.3: enabled 1
1715 10:57:09.811080 PCI: 00:15.0: enabled 1
1716 10:57:09.814503 PCI: 00:15.1: enabled 1
1717 10:57:09.814960 PCI: 00:15.2: enabled 1
1718 10:57:09.817457 PCI: 00:15.3: enabled 1
1719 10:57:09.821306 PCI: 00:16.0: enabled 1
1720 10:57:09.821781 PCI: 00:16.1: enabled 0
1721 10:57:09.824407 PCI: 00:16.2: enabled 0
1722 10:57:09.828040 PCI: 00:16.3: enabled 0
1723 10:57:09.831235 PCI: 00:16.4: enabled 0
1724 10:57:09.831674 PCI: 00:16.5: enabled 0
1725 10:57:09.834355 PCI: 00:17.0: enabled 0
1726 10:57:09.837873 PCI: 00:19.0: enabled 0
1727 10:57:09.841115 PCI: 00:19.1: enabled 1
1728 10:57:09.841592 PCI: 00:19.2: enabled 0
1729 10:57:09.844594 PCI: 00:1c.0: enabled 1
1730 10:57:09.847462 PCI: 00:1c.1: enabled 0
1731 10:57:09.851136 PCI: 00:1c.2: enabled 0
1732 10:57:09.851574 PCI: 00:1c.3: enabled 0
1733 10:57:09.854126 PCI: 00:1c.4: enabled 0
1734 10:57:09.857768 PCI: 00:1c.5: enabled 0
1735 10:57:09.858203 PCI: 00:1c.6: enabled 1
1736 10:57:09.861100
1737 10:57:09.861609 PCI: 00:1c.7: enabled 0
1738 10:57:09.864177 PCI: 00:1d.0: enabled 1
1739 10:57:09.867748 PCI: 00:1d.1: enabled 0
1740 10:57:09.868187 PCI: 00:1d.2: enabled 1
1741 10:57:09.870841 PCI: 00:1d.3: enabled 0
1742 10:57:09.873915 PCI: 00:1e.0: enabled 1
1743 10:57:09.877605 PCI: 00:1e.1: enabled 0
1744 10:57:09.878114 PCI: 00:1e.2: enabled 1
1745 10:57:09.881182 PCI: 00:1e.3: enabled 1
1746 10:57:09.884027 PCI: 00:1f.0: enabled 1
1747 10:57:09.887763 PCI: 00:1f.1: enabled 0
1748 10:57:09.888198 PCI: 00:1f.2: enabled 1
1749 10:57:09.890752 PCI: 00:1f.3: enabled 1
1750 10:57:09.894188 PCI: 00:1f.4: enabled 0
1751 10:57:09.897577 PCI: 00:1f.5: enabled 1
1752 10:57:09.898010 PCI: 00:1f.6: enabled 0
1753 10:57:09.900608 PCI: 00:1f.7: enabled 0
1754 10:57:09.904173 APIC: 00: enabled 1
1755 10:57:09.904606 GENERIC: 0.0: enabled 1
1756 10:57:09.907330 GENERIC: 0.0: enabled 1
1757 10:57:09.910594 GENERIC: 1.0: enabled 1
1758 10:57:09.913917 GENERIC: 0.0: enabled 1
1759 10:57:09.914350 GENERIC: 1.0: enabled 1
1760 10:57:09.917510 USB0 port 0: enabled 1
1761 10:57:09.920592 GENERIC: 0.0: enabled 1
1762 10:57:09.921037 USB0 port 0: enabled 1
1763 10:57:09.923997 GENERIC: 0.0: enabled 1
1764 10:57:09.927352 I2C: 00:1a: enabled 1
1765 10:57:09.930643 I2C: 00:31: enabled 1
1766 10:57:09.931079 I2C: 00:32: enabled 1
1767 10:57:09.933526 I2C: 00:10: enabled 1
1768 10:57:09.937501 I2C: 00:15: enabled 1
1769 10:57:09.937902 GENERIC: 0.0: enabled 0
1770 10:57:09.940544 GENERIC: 1.0: enabled 0
1771 10:57:09.944000 GENERIC: 0.0: enabled 1
1772 10:57:09.944427 SPI: 00: enabled 1
1773 10:57:09.947256 SPI: 00: enabled 1
1774 10:57:09.950315 PNP: 0c09.0: enabled 1
1775 10:57:09.950742 GENERIC: 0.0: enabled 1
1776 10:57:09.953972 USB3 port 0: enabled 1
1777 10:57:09.957166 USB3 port 1: enabled 1
1778 10:57:09.957641 USB3 port 2: enabled 0
1779 10:57:09.960987
1780 10:57:09.961418 USB3 port 3: enabled 0
1781 10:57:09.963678 USB2 port 0: enabled 0
1782 10:57:09.967044 USB2 port 1: enabled 1
1783 10:57:09.967471 USB2 port 2: enabled 1
1784 10:57:09.970740 USB2 port 3: enabled 0
1785 10:57:09.974048 USB2 port 4: enabled 1
1786 10:57:09.974478 USB2 port 5: enabled 0
1787 10:57:09.977159 USB2 port 6: enabled 0
1788 10:57:09.980223 USB2 port 7: enabled 0
1789 10:57:09.983564 USB2 port 8: enabled 0
1790 10:57:09.983993 USB2 port 9: enabled 0
1791 10:57:09.987104 USB3 port 0: enabled 0
1792 10:57:09.990264 USB3 port 1: enabled 1
1793 10:57:09.990742 USB3 port 2: enabled 0
1794 10:57:09.993673 USB3 port 3: enabled 0
1795 10:57:09.996727 GENERIC: 0.0: enabled 1
1796 10:57:10.000509 GENERIC: 1.0: enabled 1
1797 10:57:10.000991 APIC: 01: enabled 1
1798 10:57:10.003531 APIC: 03: enabled 1
1799 10:57:10.003965 APIC: 07: enabled 1
1800 10:57:10.007125 APIC: 05: enabled 1
1801 10:57:10.010162 APIC: 04: enabled 1
1802 10:57:10.010597 APIC: 02: enabled 1
1803 10:57:10.013665 APIC: 06: enabled 1
1804 10:57:10.016787 PCI: 01:00.0: enabled 1
1805 10:57:10.020405 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1806 10:57:10.026691 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1807 10:57:10.030042 ELOG: NV offset 0xf30000 size 0x1000
1808 10:57:10.036723 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1809 10:57:10.043557 ELOG: Event(17) added with size 13 at 2022-11-22 10:57:10 UTC
1810 10:57:10.049893 ELOG: Event(92) added with size 9 at 2022-11-22 10:57:10 UTC
1811 10:57:10.056673 ELOG: Event(93) added with size 9 at 2022-11-22 10:57:10 UTC
1812 10:57:10.063271 ELOG: Event(9E) added with size 10 at 2022-11-22 10:57:10 UTC
1813 10:57:10.070352 ELOG: Event(9F) added with size 14 at 2022-11-22 10:57:10 UTC
1814 10:57:10.073295 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1815 10:57:10.076433
1816 10:57:10.079871 ELOG: Event(A1) added with size 10 at 2022-11-22 10:57:10 UTC
1817 10:57:10.090235 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1818 10:57:10.096668 ELOG: Event(A0) added with size 9 at 2022-11-22 10:57:10 UTC
1819 10:57:10.099775 elog_add_boot_reason: Logged dev mode boot
1820 10:57:10.106335 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1821 10:57:10.106767 Finalize devices...
1822 10:57:10.109753 Devices finalized
1823 10:57:10.116352 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 10:57:10.120156 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 10:57:10.126406 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 10:57:10.129599 ME: HFSTS1 : 0x80030055
1827 10:57:10.136643 ME: HFSTS2 : 0x30280116
1828 10:57:10.139689 ME: HFSTS3 : 0x00000050
1829 10:57:10.142845 ME: HFSTS4 : 0x00004000
1830 10:57:10.149540 ME: HFSTS5 : 0x00000000
1831 10:57:10.153085 ME: HFSTS6 : 0x00400006
1832 10:57:10.156577 ME: Manufacturing Mode : YES
1833 10:57:10.159673 ME: SPI Protection Mode Enabled : NO
1834 10:57:10.162744 ME: FW Partition Table : OK
1835 10:57:10.166364 ME: Bringup Loader Failure : NO
1836 10:57:10.172941 ME: Firmware Init Complete : NO
1837 10:57:10.176063 ME: Boot Options Present : NO
1838 10:57:10.179523 ME: Update In Progress : NO
1839 10:57:10.183043 ME: D0i3 Support : YES
1840 10:57:10.186226 ME: Low Power State Enabled : NO
1841 10:57:10.189292 ME: CPU Replaced : YES
1842 10:57:10.192878 ME: CPU Replacement Valid : YES
1843 10:57:10.195908 ME: Current Working State : 5
1844 10:57:10.202601 ME: Current Operation State : 1
1845 10:57:10.206163 ME: Current Operation Mode : 3
1846 10:57:10.209692 ME: Error Code : 0
1847 10:57:10.212814 ME: Enhanced Debug Mode : NO
1848 10:57:10.215856 ME: CPU Debug Disabled : YES
1849 10:57:10.219528 ME: TXT Support : NO
1850 10:57:10.225691 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 10:57:10.232443 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 10:57:10.235741 CBFS: 'fallback/slic' not found.
1853 10:57:10.239102 ACPI: Writing ACPI tables at 76b01000.
1854 10:57:10.242389 ACPI: * FACS
1855 10:57:10.242829 ACPI: * DSDT
1856 10:57:10.248993 Ramoops buffer: 0x100000@0x76a00000.
1857 10:57:10.252346 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 10:57:10.255715 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 10:57:10.259857 Google Chrome EC: version:
1860 10:57:10.262672 ro: voema_v2.0.7540-147f8d37d1
1861 10:57:10.266389 rw: voema_v2.0.7540-147f8d37d1
1862 10:57:10.269748 running image: 2
1863 10:57:10.276063 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 10:57:10.279663 ACPI: * FADT
1865 10:57:10.280103 SCI is IRQ9
1866 10:57:10.282474 ACPI: added table 1/32, length now 40
1867 10:57:10.286323
1868 10:57:10.286764 ACPI: * SSDT
1869 10:57:10.289235 Found 1 CPU(s) with 8 core(s) each.
1870 10:57:10.295806 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 10:57:10.299305 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 10:57:10.302825 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 10:57:10.305971 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 10:57:10.312581 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 10:57:10.319247 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 10:57:10.322356 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 10:57:10.329020 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 10:57:10.335820 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 10:57:10.339021 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 10:57:10.342331 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 10:57:10.349406 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 10:57:10.355775 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 10:57:10.358820 PS2K: Passing 80 keymaps to kernel
1884 10:57:10.365891 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 10:57:10.372240 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 10:57:10.378692 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 10:57:10.385740 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 10:57:10.392393 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 10:57:10.398718 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 10:57:10.405050 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 10:57:10.411723 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 10:57:10.415529 ACPI: added table 2/32, length now 44
1893 10:57:10.415969 ACPI: * MCFG
1894 10:57:10.422203 ACPI: added table 3/32, length now 48
1895 10:57:10.422684 ACPI: * TPM2
1896 10:57:10.425228 TPM2 log created at 0x769f0000
1897 10:57:10.428694 ACPI: added table 4/32, length now 52
1898 10:57:10.432139 ACPI: * MADT
1899 10:57:10.432574 SCI is IRQ9
1900 10:57:10.435001 ACPI: added table 5/32, length now 56
1901 10:57:10.438356 current = 76b09850
1902 10:57:10.438790 ACPI: * DMAR
1903 10:57:10.441942 ACPI: added table 6/32, length now 60
1904 10:57:10.448327 ACPI: added table 7/32, length now 64
1905 10:57:10.448762 ACPI: * HPET
1906 10:57:10.452012 ACPI: added table 8/32, length now 68
1907 10:57:10.455046 ACPI: done.
1908 10:57:10.455481 ACPI tables: 35216 bytes.
1909 10:57:10.458397 smbios_write_tables: 769ef000
1910 10:57:10.462010 EC returned error result code 3
1911 10:57:10.464863 Couldn't obtain OEM name from CBI
1912 10:57:10.468766 Create SMBIOS type 16
1913 10:57:10.472355 Create SMBIOS type 17
1914 10:57:10.475669 GENERIC: 0.0 (WIFI Device)
1915 10:57:10.476156 SMBIOS tables: 1750 bytes.
1916 10:57:10.482205 Writing table forward entry at 0x00000500
1917 10:57:10.488964 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 10:57:10.491905 Writing coreboot table at 0x76b25000
1919 10:57:10.498755 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 10:57:10.501786 1. 0000000000001000-000000000009ffff: RAM
1921 10:57:10.505422 2. 00000000000a0000-00000000000fffff: RESERVED
1922 10:57:10.511903 3. 0000000000100000-00000000769eefff: RAM
1923 10:57:10.515362 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 10:57:10.522122 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 10:57:10.528697 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 10:57:10.531864 7. 0000000077000000-000000007fbfffff: RESERVED
1927 10:57:10.538046 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 10:57:10.541743 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 10:57:10.544932 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 10:57:10.551661 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 10:57:10.555203 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 10:57:10.561556 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 10:57:10.564475 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 10:57:10.571505 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 10:57:10.574615 16. 0000000100000000-00000002803fffff: RAM
1936 10:57:10.578235 Passing 4 GPIOs to payload:
1937 10:57:10.581168 NAME | PORT | POLARITY | VALUE
1938 10:57:10.588317 lid | undefined | high | high
1939 10:57:10.594403 power | undefined | high | low
1940 10:57:10.597704 oprom | undefined | high | low
1941 10:57:10.604325 EC in RW | 0x000000e5 | high | high
1942 10:57:10.610756 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum ad31
1943 10:57:10.614453 coreboot table: 1576 bytes.
1944 10:57:10.617945 IMD ROOT 0. 0x76fff000 0x00001000
1945 10:57:10.621021 IMD SMALL 1. 0x76ffe000 0x00001000
1946 10:57:10.624201 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 10:57:10.627776 VPD 3. 0x76c4d000 0x00000367
1948 10:57:10.630789 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 10:57:10.634566 CONSOLE 5. 0x76c2c000 0x00020000
1950 10:57:10.637452 FMAP 6. 0x76c2b000 0x00000578
1951 10:57:10.644259 TIME STAMP 7. 0x76c2a000 0x00000910
1952 10:57:10.647788 VBOOT WORK 8. 0x76c16000 0x00014000
1953 10:57:10.650783 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 10:57:10.654170 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 10:57:10.657622 RAMSTAGE 11. 0x76b97000 0x00073000
1956 10:57:10.660909 REFCODE 12. 0x76b42000 0x00055000
1957 10:57:10.664429 SMM BACKUP 13. 0x76b32000 0x00010000
1958 10:57:10.667372 4f444749 14. 0x76b30000 0x00002000
1959 10:57:10.671032 EXT VBT15. 0x76b2d000 0x0000219f
1960 10:57:10.677601 COREBOOT 16. 0x76b25000 0x00008000
1961 10:57:10.681059 ACPI 17. 0x76b01000 0x00024000
1962 10:57:10.684032 ACPI GNVS 18. 0x76b00000 0x00001000
1963 10:57:10.687706 RAMOOPS 19. 0x76a00000 0x00100000
1964 10:57:10.691097 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 10:57:10.694135 SMBIOS 21. 0x769ef000 0x00000800
1966 10:57:10.697237 IMD small region:
1967 10:57:10.700970 IMD ROOT 0. 0x76ffec00 0x00000400
1968 10:57:10.704260 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 10:57:10.707693 POWER STATE 2. 0x76ffeb80 0x00000044
1970 10:57:10.710876 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 10:57:10.717468 MEM INFO 4. 0x76ffe980 0x000001e0
1972 10:57:10.720946 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1973 10:57:10.723830 MTRR: Physical address space:
1974 10:57:10.730522 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 10:57:10.737076 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 10:57:10.743731 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 10:57:10.750327 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 10:57:10.757048 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 10:57:10.763586 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 10:57:10.770404 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 10:57:10.773501 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 10:57:10.777025 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 10:57:10.780125 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 10:57:10.783435 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 10:57:10.790118 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 10:57:10.793586 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 10:57:10.797176 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 10:57:10.800160 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 10:57:10.807074 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 10:57:10.809997 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 10:57:10.813578 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 10:57:10.816795 call enable_fixed_mtrr()
1993 10:57:10.820273 CPU physical address size: 39 bits
1994 10:57:10.826696 MTRR: default type WB/UC MTRR counts: 6/6.
1995 10:57:10.830378 MTRR: UC selected as default type.
1996 10:57:10.836732 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 10:57:10.839811 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 10:57:10.846650 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 10:57:10.853549 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 10:57:10.859920 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 10:57:10.866514 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 10:57:10.866956
2003 10:57:10.870008 MTRR check
2004 10:57:10.873028 Fixed MTRRs : Enabled
2005 10:57:10.873519 Variable MTRRs: Enabled
2006 10:57:10.874029
2007 10:57:10.879862 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 10:57:10.882911 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 10:57:10.886459 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 10:57:10.889804 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 10:57:10.893283 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 10:57:10.896303
2013 10:57:10.899864 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 10:57:10.903476 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 10:57:10.906414 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 10:57:10.909903 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 10:57:10.916271 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 10:57:10.919577 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 10:57:10.926321 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2020 10:57:10.929511 call enable_fixed_mtrr()
2021 10:57:10.933102 Checking cr50 for pending updates
2022 10:57:10.936629 CPU physical address size: 39 bits
2023 10:57:10.940122 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 10:57:10.943278 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 10:57:10.946546 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 10:57:10.953527 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 10:57:10.956480 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 10:57:10.960021 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 10:57:10.963495 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 10:57:10.970006 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 10:57:10.973434 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 10:57:10.976735 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 10:57:10.979625 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 10:57:10.986735 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 10:57:10.989657 MTRR: Fixed MSR 0x258 0x0606060606060606
2036 10:57:10.992978 call enable_fixed_mtrr()
2037 10:57:10.996109 MTRR: Fixed MSR 0x259 0x0000000000000000
2038 10:57:10.999439 MTRR: Fixed MSR 0x268 0x0606060606060606
2039 10:57:11.006311 MTRR: Fixed MSR 0x269 0x0606060606060606
2040 10:57:11.009849 MTRR: Fixed MSR 0x26a 0x0606060606060606
2041 10:57:11.012928 MTRR: Fixed MSR 0x26b 0x0606060606060606
2042 10:57:11.016132 MTRR: Fixed MSR 0x26c 0x0606060606060606
2043 10:57:11.022766 MTRR: Fixed MSR 0x26d 0x0606060606060606
2044 10:57:11.025987 MTRR: Fixed MSR 0x26e 0x0606060606060606
2045 10:57:11.029117 MTRR: Fixed MSR 0x26f 0x0606060606060606
2046 10:57:11.032747 CPU physical address size: 39 bits
2047 10:57:11.039350 call enable_fixed_mtrr()
2048 10:57:11.042721 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 10:57:11.045779 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 10:57:11.048984 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 10:57:11.052347 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 10:57:11.055897
2053 10:57:11.058963 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 10:57:11.062415 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 10:57:11.065730 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 10:57:11.069018 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 10:57:11.075708 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 10:57:11.079151 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 10:57:11.082684 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 10:57:11.085562 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 10:57:11.093129 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 10:57:11.096443 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 10:57:11.099984 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 10:57:11.103424 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 10:57:11.110304 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 10:57:11.113093 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 10:57:11.116608 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 10:57:11.119688 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 10:57:11.123218 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 10:57:11.126807
2071 10:57:11.129679 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 10:57:11.133267 call enable_fixed_mtrr()
2073 10:57:11.136215 call enable_fixed_mtrr()
2074 10:57:11.139929 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 10:57:11.142825 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 10:57:11.146191 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 10:57:11.153131 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 10:57:11.156411 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 10:57:11.159564 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 10:57:11.163035 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 10:57:11.166420 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 10:57:11.173119 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 10:57:11.176443 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 10:57:11.179816 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 10:57:11.182731 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 10:57:11.190425 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 10:57:11.190954 call enable_fixed_mtrr()
2088 10:57:11.196949 MTRR: Fixed MSR 0x259 0x0000000000000000
2089 10:57:11.200632 MTRR: Fixed MSR 0x268 0x0606060606060606
2090 10:57:11.203775 MTRR: Fixed MSR 0x269 0x0606060606060606
2091 10:57:11.207306 MTRR: Fixed MSR 0x26a 0x0606060606060606
2092 10:57:11.214076 MTRR: Fixed MSR 0x26b 0x0606060606060606
2093 10:57:11.217038 MTRR: Fixed MSR 0x26c 0x0606060606060606
2094 10:57:11.220108 MTRR: Fixed MSR 0x26d 0x0606060606060606
2095 10:57:11.223498 MTRR: Fixed MSR 0x26e 0x0606060606060606
2096 10:57:11.230371 MTRR: Fixed MSR 0x26f 0x0606060606060606
2097 10:57:11.233671 CPU physical address size: 39 bits
2098 10:57:11.236700 call enable_fixed_mtrr()
2099 10:57:11.240610 Reading cr50 TPM mode
2100 10:57:11.244192 CPU physical address size: 39 bits
2101 10:57:11.247276 CPU physical address size: 39 bits
2102 10:57:11.250775 CPU physical address size: 39 bits
2103 10:57:11.253781 CPU physical address size: 39 bits
2104 10:57:11.260464 BS: BS_PAYLOAD_LOAD entry times (exec / console): 312 / 6 ms
2105 10:57:11.267007 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2106 10:57:11.273894 Checking segment from ROM address 0xffc02b38
2107 10:57:11.277431 Checking segment from ROM address 0xffc02b54
2108 10:57:11.280608 Loading segment from ROM address 0xffc02b38
2109 10:57:11.283848 code (compression=0)
2110 10:57:11.293469 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 10:57:11.300459 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 10:57:11.303668 it's not compressed!
2113 10:57:11.441948 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 10:57:11.448775 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 10:57:11.455713 Loading segment from ROM address 0xffc02b54
2116 10:57:11.456187 Entry Point 0x30000000
2117 10:57:11.458600 Loaded segments
2118 10:57:11.465510 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2119 10:57:11.508107 Finalizing chipset.
2120 10:57:11.511676 Finalizing SMM.
2121 10:57:11.512110 APMC done.
2122 10:57:11.518077 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2123 10:57:11.521651 mp_park_aps done after 0 msecs.
2124 10:57:11.524842 Jumping to boot code at 0x30000000(0x76b25000)
2125 10:57:11.534678 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 10:57:11.535119
2127 10:57:11.535466
2128 10:57:11.535784
2129 10:57:11.538267 Starting depthcharge on Voema...
2130 10:57:11.538701
2131 10:57:11.539857 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2132 10:57:11.540487 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2133 10:57:11.540897 Setting prompt string to ['volteer:']
2134 10:57:11.541301 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2135 10:57:11.547879 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 10:57:11.548338
2137 10:57:11.554864 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2138 10:57:11.555302
2139 10:57:11.557916 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 10:57:11.561377
2141 10:57:11.564364 Failed to find eMMC card reader
2142 10:57:11.564900
2143 10:57:11.565303 Wipe memory regions:
2144 10:57:11.565672
2145 10:57:11.571293 [0x00000000001000, 0x000000000a0000)
2146 10:57:11.571741
2147 10:57:11.574287 [0x00000000100000, 0x00000030000000)
2148 10:57:11.574722
2149 10:57:11.603193 [0x00000032662db0, 0x000000769ef000)
2150 10:57:11.603629
2151 10:57:11.641667 [0x00000100000000, 0x00000280400000)
2152 10:57:11.642103
2153 10:57:11.845725 ec_init: CrosEC protocol v3 supported (256, 256)
2154 10:57:11.846208
2155 10:57:11.852475 update_port_state: port C0 state: usb enable 1 mux conn 0
2156 10:57:11.852915
2157 10:57:11.862825 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2158 10:57:11.863263
2159 10:57:11.869729 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2160 10:57:11.870193
2161 10:57:11.873286 send_conn_disc_msg: pmc_send_cmd succeeded
2162 10:57:11.873760
2163 10:57:12.307052 R8152: Initializing
2164 10:57:12.307754
2165 10:57:12.310326 Version 9 (ocp_data = 6010)
2166 10:57:12.310810
2167 10:57:12.313073 R8152: Done initializing
2168 10:57:12.313581
2169 10:57:12.316450 Adding net device
2170 10:57:12.316929
2171 10:57:12.621405 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2172 10:57:12.621959
2173 10:57:12.622324
2174 10:57:12.622646
2175 10:57:12.625166 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 10:57:12.727118 volteer: tftpboot 192.168.201.1 8077853/tftp-deploy-ireehjoo/kernel/bzImage 8077853/tftp-deploy-ireehjoo/kernel/cmdline 8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
2178 10:57:12.727966 Setting prompt string to 'Starting kernel'
2179 10:57:12.728388 Setting prompt string to ['Starting kernel']
2180 10:57:12.728770 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2181 10:57:12.729164 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2182 10:57:12.732697 tftpboot 192.168.201.1 8077853/tftp-deploy-ireehjoo/kernel/bzImoy-ireehjoo/kernel/cmdline 8077853/tftp-deploy-ireehjoo/ramdisk/ramdisk.cpio.gz
2183 10:57:12.733167
2184 10:57:12.733585 Waiting for link
2185 10:57:12.733983
2186 10:57:12.936196 done.
2187 10:57:12.936768
2188 10:57:12.937152 MAC: 00:e0:4c:71:a6:42
2189 10:57:12.937559
2190 10:57:12.939492 Sending DHCP discover... done.
2191 10:57:12.939977
2192 10:57:12.942627 Waiting for reply... done.
2193 10:57:12.943065
2194 10:57:12.946097 Sending DHCP request... done.
2195 10:57:12.946565
2196 10:57:12.949623 Waiting for reply... done.
2197 10:57:12.950110
2198 10:57:12.952690 My ip is 192.168.201.18
2199 10:57:12.953142
2200 10:57:12.956045 The DHCP server ip is 192.168.201.1
2201 10:57:12.956498
2202 10:57:12.962876 TFTP server IP predefined by user: 192.168.201.1
2203 10:57:12.963332
2204 10:57:12.969444 Bootfile predefined by user: 8077853/tftp-deploy-ireehjoo/kernel/bzImage
2205 10:57:12.970070
2206 10:57:12.972615 Sending tftp read request... done.
2207 10:57:12.973067
2208 10:57:12.975994 Waiting for the transfer...
2209 10:57:12.976467
2210 10:57:13.273635 00000000 ################################################################
2211 10:57:13.273785
2212 10:57:13.552610 00080000 ################################################################
2213 10:57:13.552756
2214 10:57:13.811342 00100000 ################################################################
2215 10:57:13.811482
2216 10:57:14.054950 00180000 ################################################################
2217 10:57:14.055096
2218 10:57:14.317385 00200000 ################################################################
2219 10:57:14.317569
2220 10:57:14.594950 00280000 ################################################################
2221 10:57:14.595090
2222 10:57:14.865093 00300000 ################################################################
2223 10:57:14.865232
2224 10:57:15.143336 00380000 ################################################################
2225 10:57:15.143473
2226 10:57:15.409909 00400000 ################################################################
2227 10:57:15.410049
2228 10:57:15.648327 00480000 ################################################################
2229 10:57:15.648461
2230 10:57:15.929035 00500000 ################################################################
2231 10:57:15.929180
2232 10:57:16.190838 00580000 ################################################################
2233 10:57:16.190974
2234 10:57:16.432876 00600000 ################################################################
2235 10:57:16.433013
2236 10:57:16.580266 00680000 ###################################### done.
2237 10:57:16.580425
2238 10:57:16.583232 The bootfile was 7126928 bytes long.
2239 10:57:16.583324
2240 10:57:16.587113 Sending tftp read request... done.
2241 10:57:16.587228
2242 10:57:16.590064 Waiting for the transfer...
2243 10:57:16.590150
2244 10:57:16.859195 00000000 ################################################################
2245 10:57:16.859336
2246 10:57:17.112625 00080000 ################################################################
2247 10:57:17.112788
2248 10:57:17.377046 00100000 ################################################################
2249 10:57:17.377181
2250 10:57:17.631158 00180000 ################################################################
2251 10:57:17.631302
2252 10:57:17.885263 00200000 ################################################################
2253 10:57:17.885422
2254 10:57:18.149358 00280000 ################################################################
2255 10:57:18.149523
2256 10:57:18.439865 00300000 ################################################################
2257 10:57:18.440006
2258 10:57:18.697893 00380000 ################################################################
2259 10:57:18.698047
2260 10:57:18.935537 00400000 ################################################################
2261 10:57:18.935681
2262 10:57:19.178485 00480000 ################################################################
2263 10:57:19.178625
2264 10:57:19.539115 00500000 ################################################################
2265 10:57:19.539259
2266 10:57:19.823154 00580000 ################################################################
2267 10:57:19.823293
2268 10:57:20.116341 00600000 ################################################################
2269 10:57:20.116477
2270 10:57:20.399185 00680000 ################################################################
2271 10:57:20.399317
2272 10:57:20.682190 00700000 ################################################################
2273 10:57:20.682333
2274 10:57:20.975935 00780000 ################################################################
2275 10:57:20.976065
2276 10:57:21.067330 00800000 #################### done.
2277 10:57:21.067456
2278 10:57:21.070569 Sending tftp read request... done.
2279 10:57:21.070651
2280 10:57:21.073652 Waiting for the transfer...
2281 10:57:21.073751
2282 10:57:21.073828 00000000 # done.
2283 10:57:21.073902
2284 10:57:21.083708 Command line loaded dynamically from TFTP file: 8077853/tftp-deploy-ireehjoo/kernel/cmdline
2285 10:57:21.083898
2286 10:57:21.097270 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2287 10:57:21.097503
2288 10:57:21.105740 Shutting down all USB controllers.
2289 10:57:21.106001
2290 10:57:21.106149 Removing current net device
2291 10:57:21.106281
2292 10:57:21.109152 Finalizing coreboot
2293 10:57:21.109429
2294 10:57:21.115882 Exiting depthcharge with code 4 at timestamp: 18230344
2295 10:57:21.116176
2296 10:57:21.116354
2297 10:57:21.116510 Starting kernel ...
2298 10:57:21.116657
2299 10:57:21.116799
2300 10:57:21.116937
2301 10:57:21.117684 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2302 10:57:21.117968 start: 2.2.5 auto-login-action (timeout 00:04:35) [common]
2303 10:57:21.118182 Setting prompt string to ['Linux version [0-9]']
2304 10:57:21.118384 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2305 10:57:21.118584 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2307 11:01:56.118988 end: 2.2.5 auto-login-action (duration 00:04:35) [common]
2309 11:01:56.120174 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 275 seconds'
2311 11:01:56.121043 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2314 11:01:56.121626 end: 2 depthcharge-action (duration 00:05:00) [common]
2316 11:01:56.121845 Cleaning after the job
2317 11:01:56.121932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/ramdisk
2318 11:01:56.122556 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/kernel
2319 11:01:56.123037 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8077853/tftp-deploy-ireehjoo/modules
2320 11:01:56.123217 start: 5.1 power-off (timeout 00:00:30) [common]
2321 11:01:56.123365 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-7' '--port=1' '--command=off'
2322 11:01:56.142207 >> Command sent successfully.
2323 11:01:56.144094 Returned 0 in 0 seconds
2324 11:01:56.245393 end: 5.1 power-off (duration 00:00:00) [common]
2326 11:01:56.246976 start: 5.2 read-feedback (timeout 00:10:00) [common]
2327 11:01:56.248148 Listened to connection for namespace 'common' for up to 1s
2328 11:01:57.253030 Finalising connection for namespace 'common'
2329 11:01:57.253809 Disconnecting from shell: Finalise
2330 11:01:57.355418 end: 5.2 read-feedback (duration 00:00:01) [common]
2331 11:01:57.356062 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8077853
2332 11:01:57.362268 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8077853
2333 11:01:57.362394 JobError: Your job cannot terminate cleanly.