Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 14:47:45.782644 lava-dispatcher, installed at version: 2022.06
2 14:47:45.782830 start: 0 validate
3 14:47:45.782964 Start time: 2022-09-30 14:47:45.782956+00:00 (UTC)
4 14:47:45.783095 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:47:45.783225 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220919.0%2Fx86%2Frootfs.cpio.gz exists
6 14:47:45.786051 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:47:45.786177 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:47:45.787697 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:47:45.787820 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:47:45.790461 validate duration: 0.01
12 14:47:45.790744 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:47:45.790854 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:47:45.790952 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:47:45.791049 Not decompressing ramdisk as can be used compressed.
16 14:47:45.791135 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220919.0/x86/rootfs.cpio.gz
17 14:47:45.791200 saving as /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/ramdisk/rootfs.cpio.gz
18 14:47:45.791269 total size: 8415689 (8MB)
19 14:47:45.793204 progress 0% (0MB)
20 14:47:45.797230 progress 5% (0MB)
21 14:47:45.801640 progress 10% (0MB)
22 14:47:45.805441 progress 15% (1MB)
23 14:47:45.809097 progress 20% (1MB)
24 14:47:45.813539 progress 25% (2MB)
25 14:47:45.817161 progress 30% (2MB)
26 14:47:45.821185 progress 35% (2MB)
27 14:47:45.825016 progress 40% (3MB)
28 14:47:45.829227 progress 45% (3MB)
29 14:47:45.832920 progress 50% (4MB)
30 14:47:45.837536 progress 55% (4MB)
31 14:47:45.840996 progress 60% (4MB)
32 14:47:45.844696 progress 65% (5MB)
33 14:47:45.848649 progress 70% (5MB)
34 14:47:45.853242 progress 75% (6MB)
35 14:47:45.856738 progress 80% (6MB)
36 14:47:45.861156 progress 85% (6MB)
37 14:47:45.864934 progress 90% (7MB)
38 14:47:45.868543 progress 95% (7MB)
39 14:47:45.872565 progress 100% (8MB)
40 14:47:45.872847 8MB downloaded in 0.08s (98.39MB/s)
41 14:47:45.873017 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:47:45.873276 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:47:45.873367 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:47:45.873453 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:47:45.873564 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:47:45.873633 saving as /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/kernel/bzImage
48 14:47:45.873701 total size: 7126928 (6MB)
49 14:47:45.873763 No compression specified
50 14:47:45.875487 progress 0% (0MB)
51 14:47:45.878564 progress 5% (0MB)
52 14:47:45.882588 progress 10% (0MB)
53 14:47:45.885470 progress 15% (1MB)
54 14:47:45.888928 progress 20% (1MB)
55 14:47:45.892566 progress 25% (1MB)
56 14:47:45.895965 progress 30% (2MB)
57 14:47:45.899100 progress 35% (2MB)
58 14:47:45.902207 progress 40% (2MB)
59 14:47:45.906222 progress 45% (3MB)
60 14:47:45.909481 progress 50% (3MB)
61 14:47:45.912557 progress 55% (3MB)
62 14:47:45.915853 progress 60% (4MB)
63 14:47:45.919876 progress 65% (4MB)
64 14:47:45.922524 progress 70% (4MB)
65 14:47:45.926350 progress 75% (5MB)
66 14:47:45.929429 progress 80% (5MB)
67 14:47:45.932512 progress 85% (5MB)
68 14:47:45.935973 progress 90% (6MB)
69 14:47:45.939634 progress 95% (6MB)
70 14:47:45.942530 progress 100% (6MB)
71 14:47:45.942775 6MB downloaded in 0.07s (98.41MB/s)
72 14:47:45.942948 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:47:45.943229 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:47:45.943320 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:47:45.943430 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:47:45.943540 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:47:45.943641 saving as /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/modules/modules.tar
79 14:47:45.943705 total size: 52080 (0MB)
80 14:47:45.943786 Using unxz to decompress xz
81 14:47:45.947812 progress 62% (0MB)
82 14:47:45.948223 progress 100% (0MB)
83 14:47:45.951437 0MB downloaded in 0.01s (6.43MB/s)
84 14:47:45.951715 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:47:45.951992 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:47:45.952091 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 14:47:45.952186 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 14:47:45.952278 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:47:45.952365 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 14:47:45.952536 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x
92 14:47:45.952650 makedir: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin
93 14:47:45.952735 makedir: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/tests
94 14:47:45.952822 makedir: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/results
95 14:47:45.952925 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-add-keys
96 14:47:45.953061 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-add-sources
97 14:47:45.953184 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-background-process-start
98 14:47:45.953298 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-background-process-stop
99 14:47:45.953417 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-common-functions
100 14:47:45.953530 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-echo-ipv4
101 14:47:45.953650 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-install-packages
102 14:47:45.953768 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-installed-packages
103 14:47:45.953879 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-os-build
104 14:47:45.953996 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-probe-channel
105 14:47:45.954113 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-probe-ip
106 14:47:45.954224 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-target-ip
107 14:47:45.954337 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-target-mac
108 14:47:45.954448 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-target-storage
109 14:47:45.954567 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-case
110 14:47:45.954677 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-event
111 14:47:45.954793 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-feedback
112 14:47:45.954907 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-raise
113 14:47:45.955020 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-reference
114 14:47:45.955137 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-runner
115 14:47:45.955247 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-set
116 14:47:45.955362 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-test-shell
117 14:47:45.955480 Updating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-install-packages (oe)
118 14:47:45.955640 Updating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/bin/lava-installed-packages (oe)
119 14:47:45.955748 Creating /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/environment
120 14:47:45.955841 LAVA metadata
121 14:47:45.955914 - LAVA_JOB_ID=7462852
122 14:47:45.955980 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:47:45.956087 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 14:47:45.956155 skipped lava-vland-overlay
125 14:47:45.956236 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:47:45.956325 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 14:47:45.956390 skipped lava-multinode-overlay
128 14:47:45.956473 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:47:45.956558 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 14:47:45.956640 Loading test definitions
131 14:47:45.956744 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 14:47:45.956827 Using /lava-7462852 at stage 0
133 14:47:45.957101 uuid=7462852_1.4.2.3.1 testdef=None
134 14:47:45.957202 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:47:45.957295 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 14:47:45.957806 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:47:45.958049 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 14:47:45.958643 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:47:45.958891 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 14:47:45.959461 runner path: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/0/tests/0_dmesg test_uuid 7462852_1.4.2.3.1
143 14:47:45.959657 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:47:45.959904 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 14:47:45.959981 Using /lava-7462852 at stage 1
147 14:47:45.960234 uuid=7462852_1.4.2.3.5 testdef=None
148 14:47:45.960331 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:47:45.960421 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 14:47:45.960886 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:47:45.961122 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 14:47:45.961720 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:47:45.961968 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 14:47:45.962545 runner path: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/1/tests/1_bootrr test_uuid 7462852_1.4.2.3.5
157 14:47:45.962697 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:47:45.962914 Creating lava-test-runner.conf files
160 14:47:45.962985 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/0 for stage 0
161 14:47:45.963068 - 0_dmesg
162 14:47:45.963146 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462852/lava-overlay-ro70164x/lava-7462852/1 for stage 1
163 14:47:45.963232 - 1_bootrr
164 14:47:45.963327 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:47:45.963426 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 14:47:45.969765 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:47:45.969879 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 14:47:45.969971 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:47:45.970064 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:47:45.970153 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 14:47:46.154243 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:47:46.154592 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 14:47:46.154707 extracting modules file /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462852/extract-overlay-ramdisk-mtooj023/ramdisk
174 14:47:46.159046 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:47:46.159164 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 14:47:46.159251 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462852/compress-overlay-qws3d3kj/overlay-1.4.2.4.tar.gz to ramdisk
177 14:47:46.159326 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462852/compress-overlay-qws3d3kj/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462852/extract-overlay-ramdisk-mtooj023/ramdisk
178 14:47:46.163299 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:47:46.163414 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 14:47:46.163508 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:47:46.163623 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 14:47:46.163705 Building ramdisk /var/lib/lava/dispatcher/tmp/7462852/extract-overlay-ramdisk-mtooj023/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462852/extract-overlay-ramdisk-mtooj023/ramdisk
183 14:47:46.228114 >> 48008 blocks
184 14:47:46.996677 rename /var/lib/lava/dispatcher/tmp/7462852/extract-overlay-ramdisk-mtooj023/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
185 14:47:46.997079 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:47:46.997213 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 14:47:46.997314 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 14:47:46.997410 No mkimage arch provided, not using FIT.
189 14:47:46.997503 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:47:46.997588 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:47:46.997706 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:47:46.997805 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 14:47:46.997886 No LXC device requested
194 14:47:46.997971 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:47:46.998064 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 14:47:46.998153 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:47:46.998226 Checking files for TFTP limit of 4294967296 bytes.
198 14:47:46.998623 end: 1 tftp-deploy (duration 00:00:01) [common]
199 14:47:46.998733 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:47:46.998830 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:47:46.998963 substitutions:
202 14:47:46.999033 - {DTB}: None
203 14:47:46.999106 - {INITRD}: 7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
204 14:47:46.999167 - {KERNEL}: 7462852/tftp-deploy-5ak0ho8d/kernel/bzImage
205 14:47:46.999230 - {LAVA_MAC}: None
206 14:47:46.999290 - {PRESEED_CONFIG}: None
207 14:47:46.999346 - {PRESEED_LOCAL}: None
208 14:47:46.999402 - {RAMDISK}: 7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
209 14:47:46.999464 - {ROOT_PART}: None
210 14:47:46.999521 - {ROOT}: None
211 14:47:46.999628 - {SERVER_IP}: 192.168.201.1
212 14:47:46.999706 - {TEE}: None
213 14:47:46.999793 Parsed boot commands:
214 14:47:46.999859 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:47:47.000021 Parsed boot commands: tftpboot 192.168.201.1 7462852/tftp-deploy-5ak0ho8d/kernel/bzImage 7462852/tftp-deploy-5ak0ho8d/kernel/cmdline 7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
216 14:47:47.000116 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:47:47.000208 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:47:47.000311 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:47:47.000404 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:47:47.000474 Not connected, no need to disconnect.
221 14:47:47.000551 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:47:47.000640 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:47:47.000709 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-8'
224 14:47:47.003475 Setting prompt string to ['lava-test: # ']
225 14:47:47.003826 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:47:47.003940 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:47:47.004044 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:47:47.004142 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:47:47.004331 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=reboot'
230 14:47:47.023229 >> Command sent successfully.
231 14:47:47.025073 Returned 0 in 0 seconds
232 14:47:47.125832 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:47:47.126402 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:47:47.126502 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:47:47.126597 Setting prompt string to 'Starting depthcharge on Magolor...'
237 14:47:47.126665 Changing prompt to 'Starting depthcharge on Magolor...'
238 14:47:47.126738 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
239 14:47:47.127019 [Enter `^Ec?' for help]
240 14:47:55.142795
241 14:47:55.142958
242 14:47:55.152697 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
243 14:47:55.155761 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
244 14:47:55.162585 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
245 14:47:55.165603 CPU: AES supported, TXT NOT supported, VT supported
246 14:47:55.172292 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
247 14:47:55.175252 PCH: device id 4d87 (rev 01) is Jasperlake Super
248 14:47:55.182231 IGD: device id 4e55 (rev 01) is Jasperlake GT4
249 14:47:55.182312 VBOOT: Loading verstage.
250 14:47:55.189491 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
251 14:47:55.192554 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
252 14:47:55.199332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 14:47:55.205545 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
254 14:47:55.205629
255 14:47:55.205697
256 14:47:55.215418 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
257 14:47:55.231227 Probing TPM: . done!
258 14:47:55.234705 TPM ready after 0 ms
259 14:47:55.238243 Connected to device vid:did:rid of 1ae0:0028:00
260 14:47:55.248772 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.51/cr50_v1.9311_mp.105-ccda2b7809
261 14:47:55.255409 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
262 14:47:55.258533 Initialized TPM device CR50 revision 0
263 14:47:55.313085 tlcl_send_startup: Startup return code is 0
264 14:47:55.313204 TPM: setup succeeded
265 14:47:55.327291 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
266 14:47:55.341503 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 14:47:55.356252 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
268 14:47:55.365362 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 14:47:55.369113 Chrome EC: UHEPI supported
270 14:47:55.372166 Phase 1
271 14:47:55.375885 FMAP: area GBB found @ c05000 (12288 bytes)
272 14:47:55.382128 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 14:47:55.389542 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 14:47:55.392630 Recovery requested (1009000e)
275 14:47:55.401778 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 14:47:55.408113 tlcl_extend: response is 0
277 14:47:55.415045 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 14:47:55.424253 tlcl_extend: response is 0
279 14:47:55.430442 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
280 14:47:55.434037 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
281 14:47:55.440171 BS: verstage times (exec / console): total (unknown) / 124 ms
282 14:47:55.444319
283 14:47:55.444399
284 14:47:55.453604 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
285 14:47:55.460499 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 14:47:55.463524 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 14:47:55.470238 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
288 14:47:55.473859 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 14:47:55.476949 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
290 14:47:55.479853 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
291 14:47:55.483616 TCO_STS: 0000 0001
292 14:47:55.486731 GEN_PMCON: d0015038 00002200
293 14:47:55.489872 GBLRST_CAUSE: 00000000 00000000
294 14:47:55.493010 prev_sleep_state 5
295 14:47:55.496647 Boot Count incremented to 1364
296 14:47:55.499770 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
297 14:47:55.506492 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
298 14:47:55.509557 Chrome EC: UHEPI supported
299 14:47:55.516297 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
300 14:47:55.521894 Probing TPM: done!
301 14:47:55.528588 Connected to device vid:did:rid of 1ae0:0028:00
302 14:47:55.538376 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.51/cr50_v1.9311_mp.105-ccda2b7809
303 14:47:55.541433 Initialized TPM device CR50 revision 0
304 14:47:55.557110 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
305 14:47:55.563796 MRC: Hash idx 0x100b comparison successful.
306 14:47:55.563878 MRC cache found, size 5458
307 14:47:55.566965 bootmode is set to: 2
308 14:47:55.570686 SPD INDEX = 0
309 14:47:55.573790 CBFS: Found 'spd.bin' @0x40c40 size 0x600
310 14:47:55.577368 SPD: module type is LPDDR4X
311 14:47:55.583518 SPD: module part number is MT53E512M32D2NP-046 WT:E
312 14:47:55.587404 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
313 14:47:55.593597 SPD: device width 16 bits, bus width 32 bits
314 14:47:55.596696 SPD: module size is 4096 MB (per channel)
315 14:47:55.600346 meminit_channels: DRAM half-populated
316 14:47:55.683069 CBMEM:
317 14:47:55.686023 IMD: root @ 0x76fff000 254 entries.
318 14:47:55.689189 IMD: root @ 0x76ffec00 62 entries.
319 14:47:55.692236 FMAP: area RO_VPD found @ c00000 (16384 bytes)
320 14:47:55.698968 WARNING: RO_VPD is uninitialized or empty.
321 14:47:55.702514 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
322 14:47:55.705682 WARNING: RW_VPD is uninitialized or empty.
323 14:47:55.710685 External stage cache:
324 14:47:55.713793 IMD: root @ 0x7b3ff000 254 entries.
325 14:47:55.716966 IMD: root @ 0x7b3fec00 62 entries.
326 14:47:55.726835 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
327 14:47:55.733345 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 14:47:55.740193 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
329 14:47:55.748642 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 14:47:55.755358 cse_lite: Skip switching to RW in the recovery path
331 14:47:55.755438 1 DIMMs found
332 14:47:55.755507 SMM Memory Map
333 14:47:55.758407 SMRAM : 0x7b000000 0x800000
334 14:47:55.765271 Subregion 0: 0x7b000000 0x200000
335 14:47:55.768267 Subregion 1: 0x7b200000 0x200000
336 14:47:55.771329 Subregion 2: 0x7b400000 0x400000
337 14:47:55.771407 top_of_ram = 0x77000000
338 14:47:55.777894 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 14:47:55.784482 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 14:47:55.787601 MTRR Range: Start=ff000000 End=0 (Size 1000000)
341 14:47:55.794428 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
342 14:47:55.801284 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
343 14:47:55.810971 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
344 14:47:55.814050 Processing 188 relocs. Offset value of 0x74c0e000
345 14:47:55.823959 BS: romstage times (exec / console): total (unknown) / 260 ms
346 14:47:55.828299
347 14:47:55.828384
348 14:47:55.838568 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
349 14:47:55.844631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 14:47:55.848324 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
351 14:47:55.855047 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
352 14:47:55.911388 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
353 14:47:55.917541 Processing 4805 relocs. Offset value of 0x75da8000
354 14:47:55.924398 BS: postcar times (exec / console): total (unknown) / 42 ms
355 14:47:55.924477
356 14:47:55.924549
357 14:47:55.933606 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
358 14:47:55.933683 Normal boot
359 14:47:55.938462 EC returned error result code 3
360 14:47:55.941570 FW_CONFIG value is 0x204
361 14:47:55.945342 GENERIC: 0.0 disabled by fw_config
362 14:47:55.951486 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
363 14:47:55.955216 I2C: 00:10 disabled by fw_config
364 14:47:55.958224 I2C: 00:10 disabled by fw_config
365 14:47:55.961309 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
366 14:47:55.968058 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
367 14:47:55.971787 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 14:47:55.977893 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
369 14:47:55.984687 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
370 14:47:55.988330 I2C: 00:10 disabled by fw_config
371 14:47:55.991282 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
372 14:47:55.997979 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
373 14:47:56.001120 I2C: 00:1a disabled by fw_config
374 14:47:56.004796 I2C: 00:1a disabled by fw_config
375 14:47:56.011396 fw_config match found: AUDIO_AMP=UNPROVISIONED
376 14:47:56.014476 fw_config match found: AUDIO_AMP=UNPROVISIONED
377 14:47:56.017525 GENERIC: 0.0 disabled by fw_config
378 14:47:56.024362 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 14:47:56.027404 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
380 14:47:56.034179 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
381 14:47:56.037744 microcode: Update skipped, already up-to-date
382 14:47:56.044322 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
383 14:47:56.070678 Detected 2 core, 2 thread CPU.
384 14:47:56.074255 Setting up SMI for CPU
385 14:47:56.077494 IED base = 0x7b400000
386 14:47:56.077580 IED size = 0x00400000
387 14:47:56.080603 Will perform SMM setup.
388 14:47:56.086773 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
389 14:47:56.093484 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 14:47:56.099733 Processing 16 relocs. Offset value of 0x00030000
391 14:47:56.103407 Attempting to start 1 APs
392 14:47:56.106312 Waiting for 10ms after sending INIT.
393 14:47:56.120451 Waiting for 1st SIPI to complete...done.
394 14:47:56.123521 Waiting for 2nd SIPI to complete...done.
395 14:47:56.127190 AP: slot 1 apic_id 2.
396 14:47:56.133410 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
397 14:47:56.139977 Processing 13 relocs. Offset value of 0x00038000
398 14:47:56.140061 Unable to locate Global NVS
399 14:47:56.149903 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
400 14:47:56.153109 Installing permanent SMM handler to 0x7b000000
401 14:47:56.162837 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
402 14:47:56.166314 Processing 704 relocs. Offset value of 0x7b010000
403 14:47:56.176264 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
404 14:47:56.179307 Processing 13 relocs. Offset value of 0x7b008000
405 14:47:56.186001 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
406 14:47:56.189506 Unable to locate Global NVS
407 14:47:56.195726 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
408 14:47:56.199374 Clearing SMI status registers
409 14:47:56.202502 SMI_STS: PM1
410 14:47:56.202586 PM1_STS: PWRBTN
411 14:47:56.205575 TCO_STS: INTRD_DET
412 14:47:56.212244 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
413 14:47:56.215346 In relocation handler: CPU 0
414 14:47:56.219088 New SMBASE=0x7b000000 IEDBASE=0x7b400000
415 14:47:56.222123 Writing SMRR. base = 0x7b000006, mask=0xff800800
416 14:47:56.225304 Relocation complete.
417 14:47:56.232164 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
418 14:47:56.235748 In relocation handler: CPU 1
419 14:47:56.239433 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
420 14:47:56.246019 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 14:47:56.246103 Relocation complete.
422 14:47:56.249186 Initializing CPU #0
423 14:47:56.252810 CPU: vendor Intel device 906c0
424 14:47:56.255978 CPU: family 06, model 9c, stepping 00
425 14:47:56.259118 Clearing out pending MCEs
426 14:47:56.262285 Setting up local APIC...
427 14:47:56.262369 apic_id: 0x00 done.
428 14:47:56.265953 Turbo is available but hidden
429 14:47:56.269004 Turbo is available and visible
430 14:47:56.275991 microcode: Update skipped, already up-to-date
431 14:47:56.276075 CPU #0 initialized
432 14:47:56.278989 Initializing CPU #1
433 14:47:56.282227 CPU: vendor Intel device 906c0
434 14:47:56.285448 CPU: family 06, model 9c, stepping 00
435 14:47:56.289118 Clearing out pending MCEs
436 14:47:56.292221 Setting up local APIC...
437 14:47:56.292304 apic_id: 0x02 done.
438 14:47:56.298971 microcode: Update skipped, already up-to-date
439 14:47:56.299055 CPU #1 initialized
440 14:47:56.305242 bsp_do_flight_plan done after 176 msecs.
441 14:47:56.305327 CPU: frequency set to 2800 MHz
442 14:47:56.309050 Enabling SMIs.
443 14:47:56.315492 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
444 14:47:56.324922 Probing TPM: done!
445 14:47:56.331137 Connected to device vid:did:rid of 1ae0:0028:00
446 14:47:56.341028 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.51/cr50_v1.9311_mp.105-ccda2b7809
447 14:47:56.344559 Initialized TPM device CR50 revision 0
448 14:47:56.350608 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
449 14:47:56.354242 Found a VBT of 7680 bytes after decompression
450 14:47:56.364056 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
451 14:47:56.397002 Detected 2 core, 2 thread CPU.
452 14:47:56.400028 Detected 2 core, 2 thread CPU.
453 14:47:56.761750 Display FSP Version Info HOB
454 14:47:56.765212 Reference Code - CPU = 8.7.22.30
455 14:47:56.768380 uCode Version = 24.0.0.1f
456 14:47:56.772043 TXT ACM version = ff.ff.ff.ffff
457 14:47:56.774952 Reference Code - ME = 8.7.22.30
458 14:47:56.778792 MEBx version = 0.0.0.0
459 14:47:56.781822 ME Firmware Version = Consumer SKU
460 14:47:56.784878 Reference Code - PCH = 8.7.22.30
461 14:47:56.788566 PCH-CRID Status = Disabled
462 14:47:56.791448 PCH-CRID Original Value = ff.ff.ff.ffff
463 14:47:56.795068 PCH-CRID New Value = ff.ff.ff.ffff
464 14:47:56.798131 OPROM - RST - RAID = ff.ff.ff.ffff
465 14:47:56.801730 PCH Hsio Version = 4.0.0.0
466 14:47:56.804646 Reference Code - SA - System Agent = 8.7.22.30
467 14:47:56.808926 Reference Code - MRC = 0.0.4.68
468 14:47:56.812117 SA - PCIe Version = 8.7.22.30
469 14:47:56.815939 SA-CRID Status = Disabled
470 14:47:56.819032 SA-CRID Original Value = 0.0.0.0
471 14:47:56.822066 SA-CRID New Value = 0.0.0.0
472 14:47:56.822379 OPROM - VBIOS = ff.ff.ff.ffff
473 14:47:56.829394 IO Manageability Engine FW Version = ff.ff.ff.ffff
474 14:47:56.832999 PHY Build Version = ff.ff.ff.ffff
475 14:47:56.836026 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
476 14:47:56.843003 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
477 14:47:56.846094 ITSS IRQ Polarities Before:
478 14:47:56.846402 IPC0: 0xffffffff
479 14:47:56.849142 IPC1: 0xffffffff
480 14:47:56.849450 IPC2: 0xffffffff
481 14:47:56.852948 IPC3: 0xffffffff
482 14:47:56.856009 ITSS IRQ Polarities After:
483 14:47:56.856316 IPC0: 0xffffffff
484 14:47:56.859592 IPC1: 0xffffffff
485 14:47:56.859899 IPC2: 0xffffffff
486 14:47:56.862838 IPC3: 0xffffffff
487 14:47:56.872400 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
488 14:47:56.879044 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
489 14:47:56.882642 Enumerating buses...
490 14:47:56.885778 Show all devs... Before device enumeration.
491 14:47:56.889354 Root Device: enabled 1
492 14:47:56.892436 CPU_CLUSTER: 0: enabled 1
493 14:47:56.895464 DOMAIN: 0000: enabled 1
494 14:47:56.895796 PCI: 00:00.0: enabled 1
495 14:47:56.899273 PCI: 00:02.0: enabled 1
496 14:47:56.902328 PCI: 00:04.0: enabled 1
497 14:47:56.905550 PCI: 00:05.0: enabled 1
498 14:47:56.905945 PCI: 00:09.0: enabled 0
499 14:47:56.909147 PCI: 00:12.6: enabled 0
500 14:47:56.912152 PCI: 00:14.0: enabled 1
501 14:47:56.915204 PCI: 00:14.1: enabled 0
502 14:47:56.915508 PCI: 00:14.2: enabled 0
503 14:47:56.919024 PCI: 00:14.3: enabled 1
504 14:47:56.922105 PCI: 00:14.5: enabled 1
505 14:47:56.925155 PCI: 00:15.0: enabled 1
506 14:47:56.925462 PCI: 00:15.1: enabled 1
507 14:47:56.928730 PCI: 00:15.2: enabled 1
508 14:47:56.931794 PCI: 00:15.3: enabled 1
509 14:47:56.932100 PCI: 00:16.0: enabled 1
510 14:47:56.935824 PCI: 00:16.1: enabled 0
511 14:47:56.938772 PCI: 00:16.4: enabled 0
512 14:47:56.941738 PCI: 00:16.5: enabled 0
513 14:47:56.942046 PCI: 00:17.0: enabled 0
514 14:47:56.945509 PCI: 00:19.0: enabled 1
515 14:47:56.948520 PCI: 00:19.1: enabled 0
516 14:47:56.951674 PCI: 00:19.2: enabled 1
517 14:47:56.951984 PCI: 00:1a.0: enabled 1
518 14:47:56.954824 PCI: 00:1c.0: enabled 0
519 14:47:56.957961 PCI: 00:1c.1: enabled 0
520 14:47:56.961678 PCI: 00:1c.2: enabled 0
521 14:47:56.961986 PCI: 00:1c.3: enabled 0
522 14:47:56.964675 PCI: 00:1c.4: enabled 0
523 14:47:56.968328 PCI: 00:1c.5: enabled 0
524 14:47:56.971389 PCI: 00:1c.6: enabled 0
525 14:47:56.971737 PCI: 00:1c.7: enabled 1
526 14:47:56.974498 PCI: 00:1e.0: enabled 0
527 14:47:56.977901 PCI: 00:1e.1: enabled 0
528 14:47:56.978209 PCI: 00:1e.2: enabled 1
529 14:47:56.980906 PCI: 00:1e.3: enabled 0
530 14:47:56.984583 PCI: 00:1f.0: enabled 1
531 14:47:56.987668 PCI: 00:1f.1: enabled 1
532 14:47:56.988038 PCI: 00:1f.2: enabled 1
533 14:47:56.991345 PCI: 00:1f.3: enabled 1
534 14:47:56.994440 PCI: 00:1f.4: enabled 0
535 14:47:56.997479 PCI: 00:1f.5: enabled 1
536 14:47:56.997720 PCI: 00:1f.7: enabled 0
537 14:47:57.000644 GENERIC: 0.0: enabled 1
538 14:47:57.004191 GENERIC: 0.0: enabled 1
539 14:47:57.007354 USB0 port 0: enabled 1
540 14:47:57.007628 GENERIC: 0.0: enabled 1
541 14:47:57.010580 I2C: 00:2c: enabled 1
542 14:47:57.014073 I2C: 00:15: enabled 1
543 14:47:57.014306 GENERIC: 0.0: enabled 0
544 14:47:57.017263 I2C: 00:15: enabled 1
545 14:47:57.020309 I2C: 00:10: enabled 0
546 14:47:57.020544 I2C: 00:10: enabled 0
547 14:47:57.024019 I2C: 00:2c: enabled 1
548 14:47:57.027190 I2C: 00:40: enabled 1
549 14:47:57.030166 I2C: 00:10: enabled 1
550 14:47:57.030399 I2C: 00:39: enabled 1
551 14:47:57.033841 I2C: 00:36: enabled 1
552 14:47:57.036955 I2C: 00:10: enabled 0
553 14:47:57.037189 I2C: 00:0c: enabled 1
554 14:47:57.040055 I2C: 00:50: enabled 1
555 14:47:57.043712 I2C: 00:1a: enabled 1
556 14:47:57.043946 I2C: 00:1a: enabled 0
557 14:47:57.046903 I2C: 00:1a: enabled 0
558 14:47:57.050003 I2C: 00:28: enabled 1
559 14:47:57.050236 I2C: 00:29: enabled 1
560 14:47:57.053221 PCI: 00:00.0: enabled 1
561 14:47:57.056893 SPI: 00: enabled 1
562 14:47:57.057126 PNP: 0c09.0: enabled 1
563 14:47:57.059978 GENERIC: 0.0: enabled 0
564 14:47:57.063079 USB2 port 0: enabled 1
565 14:47:57.066844 USB2 port 1: enabled 1
566 14:47:57.067076 USB2 port 2: enabled 1
567 14:47:57.069898 USB2 port 3: enabled 1
568 14:47:57.072987 USB2 port 4: enabled 0
569 14:47:57.073219 USB2 port 5: enabled 1
570 14:47:57.076707 USB2 port 6: enabled 0
571 14:47:57.079613 USB2 port 7: enabled 1
572 14:47:57.082639 USB3 port 0: enabled 1
573 14:47:57.082871 USB3 port 1: enabled 1
574 14:47:57.086325 USB3 port 2: enabled 1
575 14:47:57.089228 USB3 port 3: enabled 1
576 14:47:57.089303 APIC: 00: enabled 1
577 14:47:57.092845 APIC: 02: enabled 1
578 14:47:57.095952 Compare with tree...
579 14:47:57.096022 Root Device: enabled 1
580 14:47:57.099025 CPU_CLUSTER: 0: enabled 1
581 14:47:57.102783 APIC: 00: enabled 1
582 14:47:57.102857 APIC: 02: enabled 1
583 14:47:57.105854 DOMAIN: 0000: enabled 1
584 14:47:57.109390 PCI: 00:00.0: enabled 1
585 14:47:57.112342 PCI: 00:02.0: enabled 1
586 14:47:57.115495 PCI: 00:04.0: enabled 1
587 14:47:57.115604 GENERIC: 0.0: enabled 1
588 14:47:57.119237 PCI: 00:05.0: enabled 1
589 14:47:57.122500 GENERIC: 0.0: enabled 1
590 14:47:57.125593 PCI: 00:09.0: enabled 0
591 14:47:57.128612 PCI: 00:12.6: enabled 0
592 14:47:57.128681 PCI: 00:14.0: enabled 1
593 14:47:57.132271 USB0 port 0: enabled 1
594 14:47:57.135396 USB2 port 0: enabled 1
595 14:47:57.138539 USB2 port 1: enabled 1
596 14:47:57.141676 USB2 port 2: enabled 1
597 14:47:57.145304 USB2 port 3: enabled 1
598 14:47:57.145375 USB2 port 4: enabled 0
599 14:47:57.148310 USB2 port 5: enabled 1
600 14:47:57.152002 USB2 port 6: enabled 0
601 14:47:57.155229 USB2 port 7: enabled 1
602 14:47:57.158377 USB3 port 0: enabled 1
603 14:47:57.161466 USB3 port 1: enabled 1
604 14:47:57.161534 USB3 port 2: enabled 1
605 14:47:57.165143 USB3 port 3: enabled 1
606 14:47:57.168223 PCI: 00:14.1: enabled 0
607 14:47:57.171284 PCI: 00:14.2: enabled 0
608 14:47:57.175053 PCI: 00:14.3: enabled 1
609 14:47:57.175127 GENERIC: 0.0: enabled 1
610 14:47:57.177966 PCI: 00:14.5: enabled 1
611 14:47:57.181017 PCI: 00:15.0: enabled 1
612 14:47:57.184631 I2C: 00:2c: enabled 1
613 14:47:57.188170 I2C: 00:15: enabled 1
614 14:47:57.188246 PCI: 00:15.1: enabled 1
615 14:47:57.191369 PCI: 00:15.2: enabled 1
616 14:47:57.194335 GENERIC: 0.0: enabled 0
617 14:47:57.197535 I2C: 00:15: enabled 1
618 14:47:57.201262 I2C: 00:10: enabled 0
619 14:47:57.201331 I2C: 00:10: enabled 0
620 14:47:57.204337 I2C: 00:2c: enabled 1
621 14:47:57.207449 I2C: 00:40: enabled 1
622 14:47:57.211151 I2C: 00:10: enabled 1
623 14:47:57.211226 I2C: 00:39: enabled 1
624 14:47:57.214163 PCI: 00:15.3: enabled 1
625 14:47:57.217228 I2C: 00:36: enabled 1
626 14:47:57.220922 I2C: 00:10: enabled 0
627 14:47:57.220990 I2C: 00:0c: enabled 1
628 14:47:57.223953 I2C: 00:50: enabled 1
629 14:47:57.227759 PCI: 00:16.0: enabled 1
630 14:47:57.230668 PCI: 00:16.1: enabled 0
631 14:47:57.234269 PCI: 00:16.4: enabled 0
632 14:47:57.234337 PCI: 00:16.5: enabled 0
633 14:47:57.237257 PCI: 00:17.0: enabled 0
634 14:47:57.240430 PCI: 00:19.0: enabled 1
635 14:47:57.243496 I2C: 00:1a: enabled 1
636 14:47:57.246799 I2C: 00:1a: enabled 0
637 14:47:57.246869 I2C: 00:1a: enabled 0
638 14:47:57.250475 I2C: 00:28: enabled 1
639 14:47:57.253584 I2C: 00:29: enabled 1
640 14:47:57.256812 PCI: 00:19.1: enabled 0
641 14:47:57.256879 PCI: 00:19.2: enabled 1
642 14:47:57.260496 PCI: 00:1a.0: enabled 1
643 14:47:57.263537 PCI: 00:1e.0: enabled 0
644 14:47:57.266676 PCI: 00:1e.1: enabled 0
645 14:47:57.270256 PCI: 00:1e.2: enabled 1
646 14:47:57.270337 SPI: 00: enabled 1
647 14:47:57.273413 PCI: 00:1e.3: enabled 0
648 14:47:57.277021 PCI: 00:1f.0: enabled 1
649 14:47:57.280067 PNP: 0c09.0: enabled 1
650 14:47:57.283071 PCI: 00:1f.1: enabled 1
651 14:47:57.283142 PCI: 00:1f.2: enabled 1
652 14:47:57.286565 PCI: 00:1f.3: enabled 1
653 14:47:57.290120 GENERIC: 0.0: enabled 0
654 14:47:57.293237 PCI: 00:1f.4: enabled 0
655 14:47:57.296340 PCI: 00:1f.5: enabled 1
656 14:47:57.296408 PCI: 00:1f.7: enabled 0
657 14:47:57.299921 Root Device scanning...
658 14:47:57.302967 scan_static_bus for Root Device
659 14:47:57.306665 CPU_CLUSTER: 0 enabled
660 14:47:57.306740 DOMAIN: 0000 enabled
661 14:47:57.309763 DOMAIN: 0000 scanning...
662 14:47:57.312777 PCI: pci_scan_bus for bus 00
663 14:47:57.316404 PCI: 00:00.0 [8086/0000] ops
664 14:47:57.319383 PCI: 00:00.0 [8086/4e22] enabled
665 14:47:57.322960 PCI: 00:02.0 [8086/0000] bus ops
666 14:47:57.326158 PCI: 00:02.0 [8086/4e55] enabled
667 14:47:57.329256 PCI: 00:04.0 [8086/0000] bus ops
668 14:47:57.332380 PCI: 00:04.0 [8086/4e03] enabled
669 14:47:57.335947 PCI: 00:05.0 [8086/0000] bus ops
670 14:47:57.338992 PCI: 00:05.0 [8086/4e19] enabled
671 14:47:57.342638 PCI: 00:08.0 [8086/4e11] enabled
672 14:47:57.345764 PCI: 00:14.0 [8086/0000] bus ops
673 14:47:57.348921 PCI: 00:14.0 [8086/4ded] enabled
674 14:47:57.352057 PCI: 00:14.2 [8086/4def] disabled
675 14:47:57.355195 PCI: 00:14.3 [8086/0000] bus ops
676 14:47:57.358863 PCI: 00:14.3 [8086/4df0] enabled
677 14:47:57.361928 PCI: 00:14.5 [8086/0000] ops
678 14:47:57.365084 PCI: 00:14.5 [8086/4df8] enabled
679 14:47:57.368653 PCI: 00:15.0 [8086/0000] bus ops
680 14:47:57.371810 PCI: 00:15.0 [8086/4de8] enabled
681 14:47:57.375461 PCI: 00:15.1 [8086/0000] bus ops
682 14:47:57.378581 PCI: 00:15.1 [8086/4de9] enabled
683 14:47:57.382211 PCI: 00:15.2 [8086/0000] bus ops
684 14:47:57.385212 PCI: 00:15.2 [8086/4dea] enabled
685 14:47:57.388269 PCI: 00:15.3 [8086/0000] bus ops
686 14:47:57.392059 PCI: 00:15.3 [8086/4deb] enabled
687 14:47:57.395061 PCI: 00:16.0 [8086/0000] ops
688 14:47:57.398124 PCI: 00:16.0 [8086/4de0] enabled
689 14:47:57.401752 PCI: 00:19.0 [8086/0000] bus ops
690 14:47:57.404915 PCI: 00:19.0 [8086/4dc5] enabled
691 14:47:57.408006 PCI: 00:19.2 [8086/0000] ops
692 14:47:57.411651 PCI: 00:19.2 [8086/4dc7] enabled
693 14:47:57.414745 PCI: 00:1a.0 [8086/0000] ops
694 14:47:57.418466 PCI: 00:1a.0 [8086/4dc4] enabled
695 14:47:57.421438 PCI: 00:1e.0 [8086/0000] ops
696 14:47:57.425179 PCI: 00:1e.0 [8086/4da8] disabled
697 14:47:57.428303 PCI: 00:1e.2 [8086/0000] bus ops
698 14:47:57.431415 PCI: 00:1e.2 [8086/4daa] enabled
699 14:47:57.434417 PCI: 00:1f.0 [8086/0000] bus ops
700 14:47:57.437914 PCI: 00:1f.0 [8086/4d87] enabled
701 14:47:57.444483 PCI: Static device PCI: 00:1f.1 not found, disabling it.
702 14:47:57.444557 RTC Init
703 14:47:57.447504 Set power on after power failure.
704 14:47:57.451159 Disabling Deep S3
705 14:47:57.451229 Disabling Deep S3
706 14:47:57.454254 Disabling Deep S4
707 14:47:57.454328 Disabling Deep S4
708 14:47:57.457960 Disabling Deep S5
709 14:47:57.458032 Disabling Deep S5
710 14:47:57.460952 PCI: 00:1f.2 [0000/0000] hidden
711 14:47:57.464178 PCI: 00:1f.3 [8086/0000] bus ops
712 14:47:57.467428 PCI: 00:1f.3 [8086/4dc8] enabled
713 14:47:57.471121 PCI: 00:1f.5 [8086/0000] bus ops
714 14:47:57.474186 PCI: 00:1f.5 [8086/4da4] enabled
715 14:47:57.477234 PCI: Leftover static devices:
716 14:47:57.480887 PCI: 00:12.6
717 14:47:57.480958 PCI: 00:09.0
718 14:47:57.484007 PCI: 00:14.1
719 14:47:57.484074 PCI: 00:16.1
720 14:47:57.484133 PCI: 00:16.4
721 14:47:57.488097 PCI: 00:16.5
722 14:47:57.488167 PCI: 00:17.0
723 14:47:57.488229 PCI: 00:19.1
724 14:47:57.491772 PCI: 00:1e.1
725 14:47:57.491846 PCI: 00:1e.3
726 14:47:57.495396 PCI: 00:1f.1
727 14:47:57.495466 PCI: 00:1f.4
728 14:47:57.495524 PCI: 00:1f.7
729 14:47:57.498551 PCI: Check your devicetree.cb.
730 14:47:57.501549 PCI: 00:02.0 scanning...
731 14:47:57.505165 scan_generic_bus for PCI: 00:02.0
732 14:47:57.508238 scan_generic_bus for PCI: 00:02.0 done
733 14:47:57.514829 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
734 14:47:57.517823 PCI: 00:04.0 scanning...
735 14:47:57.521455 scan_generic_bus for PCI: 00:04.0
736 14:47:57.521526 GENERIC: 0.0 enabled
737 14:47:57.527766 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
738 14:47:57.534529 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
739 14:47:57.534602 PCI: 00:05.0 scanning...
740 14:47:57.537489 scan_generic_bus for PCI: 00:05.0
741 14:47:57.541069 GENERIC: 0.0 enabled
742 14:47:57.547892 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
743 14:47:57.550924 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
744 14:47:57.554327 PCI: 00:14.0 scanning...
745 14:47:57.557702 scan_static_bus for PCI: 00:14.0
746 14:47:57.560853 USB0 port 0 enabled
747 14:47:57.564530 USB0 port 0 scanning...
748 14:47:57.567514 scan_static_bus for USB0 port 0
749 14:47:57.567623 USB2 port 0 enabled
750 14:47:57.570802 USB2 port 1 enabled
751 14:47:57.570871 USB2 port 2 enabled
752 14:47:57.573866 USB2 port 3 enabled
753 14:47:57.577466 USB2 port 4 disabled
754 14:47:57.577548 USB2 port 5 enabled
755 14:47:57.580726 USB2 port 6 disabled
756 14:47:57.584375 USB2 port 7 enabled
757 14:47:57.584443 USB3 port 0 enabled
758 14:47:57.587302 USB3 port 1 enabled
759 14:47:57.587371 USB3 port 2 enabled
760 14:47:57.590444 USB3 port 3 enabled
761 14:47:57.594085 USB2 port 0 scanning...
762 14:47:57.597258 scan_static_bus for USB2 port 0
763 14:47:57.600813 scan_static_bus for USB2 port 0 done
764 14:47:57.603738 scan_bus: bus USB2 port 0 finished in 6 msecs
765 14:47:57.607359 USB2 port 1 scanning...
766 14:47:57.610456 scan_static_bus for USB2 port 1
767 14:47:57.614065 scan_static_bus for USB2 port 1 done
768 14:47:57.620122 scan_bus: bus USB2 port 1 finished in 6 msecs
769 14:47:57.620207 USB2 port 2 scanning...
770 14:47:57.623838 scan_static_bus for USB2 port 2
771 14:47:57.626802 scan_static_bus for USB2 port 2 done
772 14:47:57.633544 scan_bus: bus USB2 port 2 finished in 6 msecs
773 14:47:57.637231 USB2 port 3 scanning...
774 14:47:57.640104 scan_static_bus for USB2 port 3
775 14:47:57.643341 scan_static_bus for USB2 port 3 done
776 14:47:57.647078 scan_bus: bus USB2 port 3 finished in 6 msecs
777 14:47:57.650187 USB2 port 5 scanning...
778 14:47:57.653403 scan_static_bus for USB2 port 5
779 14:47:57.656453 scan_static_bus for USB2 port 5 done
780 14:47:57.660180 scan_bus: bus USB2 port 5 finished in 6 msecs
781 14:47:57.663279 USB2 port 7 scanning...
782 14:47:57.666351 scan_static_bus for USB2 port 7
783 14:47:57.670169 scan_static_bus for USB2 port 7 done
784 14:47:57.676228 scan_bus: bus USB2 port 7 finished in 6 msecs
785 14:47:57.676312 USB3 port 0 scanning...
786 14:47:57.679466 scan_static_bus for USB3 port 0
787 14:47:57.686204 scan_static_bus for USB3 port 0 done
788 14:47:57.689644 scan_bus: bus USB3 port 0 finished in 6 msecs
789 14:47:57.692655 USB3 port 1 scanning...
790 14:47:57.696284 scan_static_bus for USB3 port 1
791 14:47:57.699248 scan_static_bus for USB3 port 1 done
792 14:47:57.702866 scan_bus: bus USB3 port 1 finished in 6 msecs
793 14:47:57.705874 USB3 port 2 scanning...
794 14:47:57.709507 scan_static_bus for USB3 port 2
795 14:47:57.712558 scan_static_bus for USB3 port 2 done
796 14:47:57.716215 scan_bus: bus USB3 port 2 finished in 6 msecs
797 14:47:57.719255 USB3 port 3 scanning...
798 14:47:57.722957 scan_static_bus for USB3 port 3
799 14:47:57.726034 scan_static_bus for USB3 port 3 done
800 14:47:57.732772 scan_bus: bus USB3 port 3 finished in 6 msecs
801 14:47:57.735896 scan_static_bus for USB0 port 0 done
802 14:47:57.739100 scan_bus: bus USB0 port 0 finished in 172 msecs
803 14:47:57.742165 scan_static_bus for PCI: 00:14.0 done
804 14:47:57.748807 scan_bus: bus PCI: 00:14.0 finished in 188 msecs
805 14:47:57.752607 PCI: 00:14.3 scanning...
806 14:47:57.755797 scan_static_bus for PCI: 00:14.3
807 14:47:57.755881 GENERIC: 0.0 enabled
808 14:47:57.758819 scan_static_bus for PCI: 00:14.3 done
809 14:47:57.765801 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
810 14:47:57.768896 PCI: 00:15.0 scanning...
811 14:47:57.772071 scan_static_bus for PCI: 00:15.0
812 14:47:57.772155 I2C: 00:2c enabled
813 14:47:57.775259 I2C: 00:15 enabled
814 14:47:57.778930 scan_static_bus for PCI: 00:15.0 done
815 14:47:57.785179 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
816 14:47:57.785264 PCI: 00:15.1 scanning...
817 14:47:57.788762 scan_static_bus for PCI: 00:15.1
818 14:47:57.795408 scan_static_bus for PCI: 00:15.1 done
819 14:47:57.798380 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
820 14:47:57.801934 PCI: 00:15.2 scanning...
821 14:47:57.805027 scan_static_bus for PCI: 00:15.2
822 14:47:57.805111 GENERIC: 0.0 disabled
823 14:47:57.808493 I2C: 00:15 enabled
824 14:47:57.811477 I2C: 00:10 disabled
825 14:47:57.811583 I2C: 00:10 disabled
826 14:47:57.815310 I2C: 00:2c enabled
827 14:47:57.815394 I2C: 00:40 enabled
828 14:47:57.818406 I2C: 00:10 enabled
829 14:47:57.821399 I2C: 00:39 enabled
830 14:47:57.825074 scan_static_bus for PCI: 00:15.2 done
831 14:47:57.828229 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
832 14:47:57.831255 PCI: 00:15.3 scanning...
833 14:47:57.834956 scan_static_bus for PCI: 00:15.3
834 14:47:57.838177 I2C: 00:36 enabled
835 14:47:57.838261 I2C: 00:10 disabled
836 14:47:57.841203 I2C: 00:0c enabled
837 14:47:57.841287 I2C: 00:50 enabled
838 14:47:57.847847 scan_static_bus for PCI: 00:15.3 done
839 14:47:57.851352 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
840 14:47:57.854491 PCI: 00:19.0 scanning...
841 14:47:57.857675 scan_static_bus for PCI: 00:19.0
842 14:47:57.857758 I2C: 00:1a enabled
843 14:47:57.861373 I2C: 00:1a disabled
844 14:47:57.864441 I2C: 00:1a disabled
845 14:47:57.864524 I2C: 00:28 enabled
846 14:47:57.867500 I2C: 00:29 enabled
847 14:47:57.871224 scan_static_bus for PCI: 00:19.0 done
848 14:47:57.874300 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
849 14:47:57.877365 PCI: 00:1e.2 scanning...
850 14:47:57.881045 scan_generic_bus for PCI: 00:1e.2
851 14:47:57.883947 SPI: 00 enabled
852 14:47:57.890746 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
853 14:47:57.894270 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
854 14:47:57.897402 PCI: 00:1f.0 scanning...
855 14:47:57.900885 scan_static_bus for PCI: 00:1f.0
856 14:47:57.903853 PNP: 0c09.0 enabled
857 14:47:57.903938 PNP: 0c09.0 scanning...
858 14:47:57.907505 scan_static_bus for PNP: 0c09.0
859 14:47:57.910729 scan_static_bus for PNP: 0c09.0 done
860 14:47:57.917498 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
861 14:47:57.920614 scan_static_bus for PCI: 00:1f.0 done
862 14:47:57.923523 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
863 14:47:57.927374 PCI: 00:1f.3 scanning...
864 14:47:57.930479 scan_static_bus for PCI: 00:1f.3
865 14:47:57.934003 GENERIC: 0.0 disabled
866 14:47:57.937166 scan_static_bus for PCI: 00:1f.3 done
867 14:47:57.943408 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
868 14:47:57.943493 PCI: 00:1f.5 scanning...
869 14:47:57.947120 scan_generic_bus for PCI: 00:1f.5
870 14:47:57.953269 scan_generic_bus for PCI: 00:1f.5 done
871 14:47:57.956990 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
872 14:47:57.960007 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
873 14:47:57.966821 scan_static_bus for Root Device done
874 14:47:57.969809 scan_bus: bus Root Device finished in 665 msecs
875 14:47:57.969893 done
876 14:47:57.976815 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1084 ms
877 14:47:57.979935 Chrome EC: UHEPI supported
878 14:47:57.986523 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
879 14:47:57.993319 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
880 14:47:57.996254 SPI flash protection: WPSW=0 SRP0=1
881 14:47:57.999234 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
882 14:47:58.006009 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
883 14:47:58.009710 found VGA at PCI: 00:02.0
884 14:47:58.012801 Setting up VGA for PCI: 00:02.0
885 14:47:58.019487 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
886 14:47:58.022552 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
887 14:47:58.025669 Allocating resources...
888 14:47:58.025754 Reading resources...
889 14:47:58.032528 Root Device read_resources bus 0 link: 0
890 14:47:58.035458 CPU_CLUSTER: 0 read_resources bus 0 link: 0
891 14:47:58.042400 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
892 14:47:58.045475 DOMAIN: 0000 read_resources bus 0 link: 0
893 14:47:58.052555 PCI: 00:04.0 read_resources bus 1 link: 0
894 14:47:58.055692 PCI: 00:04.0 read_resources bus 1 link: 0 done
895 14:47:58.058852 PCI: 00:05.0 read_resources bus 2 link: 0
896 14:47:58.065566 PCI: 00:05.0 read_resources bus 2 link: 0 done
897 14:47:58.069278 PCI: 00:14.0 read_resources bus 0 link: 0
898 14:47:58.072473 USB0 port 0 read_resources bus 0 link: 0
899 14:47:58.133012 USB0 port 0 read_resources bus 0 link: 0 done
900 14:47:58.133123 PCI: 00:14.0 read_resources bus 0 link: 0 done
901 14:47:58.133753 PCI: 00:14.3 read_resources bus 0 link: 0
902 14:47:58.134040 PCI: 00:14.3 read_resources bus 0 link: 0 done
903 14:47:58.134111 PCI: 00:15.0 read_resources bus 0 link: 0
904 14:47:58.134175 PCI: 00:15.0 read_resources bus 0 link: 0 done
905 14:47:58.134235 PCI: 00:15.2 read_resources bus 0 link: 0
906 14:47:58.134484 PCI: 00:15.2 read_resources bus 0 link: 0 done
907 14:47:58.134547 PCI: 00:15.3 read_resources bus 0 link: 0
908 14:47:58.134605 PCI: 00:15.3 read_resources bus 0 link: 0 done
909 14:47:58.134662 PCI: 00:19.0 read_resources bus 0 link: 0
910 14:47:58.184161 PCI: 00:19.0 read_resources bus 0 link: 0 done
911 14:47:58.184304 PCI: 00:1e.2 read_resources bus 3 link: 0
912 14:47:58.184634 PCI: 00:1e.2 read_resources bus 3 link: 0 done
913 14:47:58.184707 PCI: 00:1f.0 read_resources bus 0 link: 0
914 14:47:58.184800 PCI: 00:1f.0 read_resources bus 0 link: 0 done
915 14:47:58.184861 PCI: 00:1f.3 read_resources bus 0 link: 0
916 14:47:58.184934 PCI: 00:1f.3 read_resources bus 0 link: 0 done
917 14:47:58.185181 DOMAIN: 0000 read_resources bus 0 link: 0 done
918 14:47:58.185246 Root Device read_resources bus 0 link: 0 done
919 14:47:58.185494 Done reading resources.
920 14:47:58.188511 Show resources in subtree (Root Device)...After reading.
921 14:47:58.188596 Root Device child on link 0 CPU_CLUSTER: 0
922 14:47:58.191697 CPU_CLUSTER: 0 child on link 0 APIC: 00
923 14:47:58.191785 APIC: 00
924 14:47:58.191850 APIC: 02
925 14:47:58.198252 DOMAIN: 0000 child on link 0 PCI: 00:00.0
926 14:47:58.207980 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
927 14:47:58.217881 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
928 14:47:58.217966 PCI: 00:00.0
929 14:47:58.227824 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
930 14:47:58.237692 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
931 14:47:58.247691 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
932 14:47:58.254417 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
933 14:47:58.264023 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
934 14:47:58.274058 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
935 14:47:58.283964 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
936 14:47:58.293616 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
937 14:47:58.303580 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
938 14:47:58.310192 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
939 14:47:58.320571 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
940 14:47:58.330486 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
941 14:47:58.340304 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
942 14:47:58.350133 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
943 14:47:58.356832 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
944 14:47:58.366683 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
945 14:47:58.376234 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
946 14:47:58.386087 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
947 14:47:58.396401 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
948 14:47:58.396481 PCI: 00:02.0
949 14:47:58.405857 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
950 14:47:58.419269 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
951 14:47:58.426048 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
952 14:47:58.429240 PCI: 00:04.0 child on link 0 GENERIC: 0.0
953 14:47:58.442641 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
954 14:47:58.442721 GENERIC: 0.0
955 14:47:58.445817 PCI: 00:05.0 child on link 0 GENERIC: 0.0
956 14:47:58.458828 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
957 14:47:58.458910 GENERIC: 0.0
958 14:47:58.462570 PCI: 00:08.0
959 14:47:58.471978 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
960 14:47:58.475656 PCI: 00:14.0 child on link 0 USB0 port 0
961 14:47:58.485091 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
962 14:47:58.488874 USB0 port 0 child on link 0 USB2 port 0
963 14:47:58.491891 USB2 port 0
964 14:47:58.491961 USB2 port 1
965 14:47:58.495415 USB2 port 2
966 14:47:58.495483 USB2 port 3
967 14:47:58.498450 USB2 port 4
968 14:47:58.498518 USB2 port 5
969 14:47:58.502127 USB2 port 6
970 14:47:58.505093 USB2 port 7
971 14:47:58.505162 USB3 port 0
972 14:47:58.508541 USB3 port 1
973 14:47:58.508617 USB3 port 2
974 14:47:58.511595 USB3 port 3
975 14:47:58.511675 PCI: 00:14.2
976 14:47:58.518455 PCI: 00:14.3 child on link 0 GENERIC: 0.0
977 14:47:58.528163 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
978 14:47:58.528243 GENERIC: 0.0
979 14:47:58.531252 PCI: 00:14.5
980 14:47:58.541163 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
981 14:47:58.544871 PCI: 00:15.0 child on link 0 I2C: 00:2c
982 14:47:58.554389 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
983 14:47:58.554480 I2C: 00:2c
984 14:47:58.557979 I2C: 00:15
985 14:47:58.558054 PCI: 00:15.1
986 14:47:58.567720 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 14:47:58.574435 PCI: 00:15.2 child on link 0 GENERIC: 0.0
988 14:47:58.584425 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 14:47:58.584505 GENERIC: 0.0
990 14:47:58.587466 I2C: 00:15
991 14:47:58.587561 I2C: 00:10
992 14:47:58.590675 I2C: 00:10
993 14:47:58.590746 I2C: 00:2c
994 14:47:58.593855 I2C: 00:40
995 14:47:58.593928 I2C: 00:10
996 14:47:58.597502 I2C: 00:39
997 14:47:58.600619 PCI: 00:15.3 child on link 0 I2C: 00:36
998 14:47:58.610813 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 14:47:58.610894 I2C: 00:36
1000 14:47:58.613964 I2C: 00:10
1001 14:47:58.614043 I2C: 00:0c
1002 14:47:58.617034 I2C: 00:50
1003 14:47:58.617110 PCI: 00:16.0
1004 14:47:58.626802 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 14:47:58.633612 PCI: 00:19.0 child on link 0 I2C: 00:1a
1006 14:47:58.643479 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1007 14:47:58.643594 I2C: 00:1a
1008 14:47:58.647086 I2C: 00:1a
1009 14:47:58.647159 I2C: 00:1a
1010 14:47:58.647221 I2C: 00:28
1011 14:47:58.650166 I2C: 00:29
1012 14:47:58.650236 PCI: 00:19.2
1013 14:47:58.663465 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1014 14:47:58.673373 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1015 14:47:58.673457 PCI: 00:1a.0
1016 14:47:58.682718 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 14:47:58.686454 PCI: 00:1e.0
1018 14:47:58.689395 PCI: 00:1e.2 child on link 0 SPI: 00
1019 14:47:58.699705 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1020 14:47:58.699785 SPI: 00
1021 14:47:58.706389 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1022 14:47:58.712870 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1023 14:47:58.715994 PNP: 0c09.0
1024 14:47:58.725687 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1025 14:47:58.725770 PCI: 00:1f.2
1026 14:47:58.736071 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1027 14:47:58.746256 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1028 14:47:58.749974 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1029 14:47:58.760052 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1030 14:47:58.769832 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1031 14:47:58.769919 GENERIC: 0.0
1032 14:47:58.772923 PCI: 00:1f.5
1033 14:47:58.783358 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1034 14:47:58.789470 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1035 14:47:58.796214 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1036 14:47:58.802758 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1037 14:47:58.809418 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1038 14:47:58.819115 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1039 14:47:58.825898 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1040 14:47:58.828869 DOMAIN: 0000: Resource ranges:
1041 14:47:58.832418 * Base: 1000, Size: 800, Tag: 100
1042 14:47:58.835508 * Base: 1900, Size: e700, Tag: 100
1043 14:47:58.842319 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1044 14:47:58.848387 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1045 14:47:58.855189 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1046 14:47:58.862030 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1047 14:47:58.868584 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1048 14:47:58.878688 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1049 14:47:58.884867 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1050 14:47:58.891719 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1051 14:47:58.901452 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1052 14:47:58.908169 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1053 14:47:58.914681 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1054 14:47:58.924242 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1055 14:47:58.931214 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1056 14:47:58.938031 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1057 14:47:58.947861 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1058 14:47:58.954635 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1059 14:47:58.960915 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1060 14:47:58.970599 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1061 14:47:58.977337 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1062 14:47:58.984254 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1063 14:47:58.994090 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1064 14:47:59.000284 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1065 14:47:59.006945 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1066 14:47:59.016713 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1067 14:47:59.020306 DOMAIN: 0000: Resource ranges:
1068 14:47:59.023236 * Base: 7fc00000, Size: 40400000, Tag: 200
1069 14:47:59.026764 * Base: d0000000, Size: 2b000000, Tag: 200
1070 14:47:59.033552 * Base: fb001000, Size: 2fff000, Tag: 200
1071 14:47:59.036573 * Base: fe010000, Size: 22000, Tag: 200
1072 14:47:59.039781 * Base: fe033000, Size: a4d000, Tag: 200
1073 14:47:59.043516 * Base: fea88000, Size: 2f8000, Tag: 200
1074 14:47:59.049600 * Base: fed88000, Size: 8000, Tag: 200
1075 14:47:59.053268 * Base: fed93000, Size: d000, Tag: 200
1076 14:47:59.056293 * Base: feda2000, Size: 125e000, Tag: 200
1077 14:47:59.062941 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1078 14:47:59.069878 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1079 14:47:59.075930 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1080 14:47:59.082772 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1081 14:47:59.089484 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1082 14:47:59.096339 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1083 14:47:59.102497 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1084 14:47:59.109335 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1085 14:47:59.116067 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1086 14:47:59.122304 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1087 14:47:59.128965 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1088 14:47:59.135900 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1089 14:47:59.141996 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1090 14:47:59.148839 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1091 14:47:59.155488 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1092 14:47:59.162183 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1093 14:47:59.168422 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1094 14:47:59.175242 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1095 14:47:59.181903 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1096 14:47:59.188110 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1097 14:47:59.194767 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1098 14:47:59.201638 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1099 14:47:59.207995 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1100 14:47:59.211466 Root Device assign_resources, bus 0 link: 0
1101 14:47:59.218215 DOMAIN: 0000 assign_resources, bus 0 link: 0
1102 14:47:59.224756 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1103 14:47:59.234657 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1104 14:47:59.241284 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1105 14:47:59.251155 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1106 14:47:59.254258 PCI: 00:04.0 assign_resources, bus 1 link: 0
1107 14:47:59.257348 PCI: 00:04.0 assign_resources, bus 1 link: 0
1108 14:47:59.267733 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1109 14:47:59.270743 PCI: 00:05.0 assign_resources, bus 2 link: 0
1110 14:47:59.277335 PCI: 00:05.0 assign_resources, bus 2 link: 0
1111 14:47:59.284144 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1112 14:47:59.294002 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1113 14:47:59.297641 PCI: 00:14.0 assign_resources, bus 0 link: 0
1114 14:47:59.300790 PCI: 00:14.0 assign_resources, bus 0 link: 0
1115 14:47:59.310532 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1116 14:47:59.313546 PCI: 00:14.3 assign_resources, bus 0 link: 0
1117 14:47:59.320256 PCI: 00:14.3 assign_resources, bus 0 link: 0
1118 14:47:59.327465 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1119 14:47:59.334213 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1120 14:47:59.340795 PCI: 00:15.0 assign_resources, bus 0 link: 0
1121 14:47:59.343850 PCI: 00:15.0 assign_resources, bus 0 link: 0
1122 14:47:59.353904 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1123 14:47:59.360731 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1124 14:47:59.367056 PCI: 00:15.2 assign_resources, bus 0 link: 0
1125 14:47:59.370081 PCI: 00:15.2 assign_resources, bus 0 link: 0
1126 14:47:59.376791 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1127 14:47:59.383567 PCI: 00:15.3 assign_resources, bus 0 link: 0
1128 14:47:59.386639 PCI: 00:15.3 assign_resources, bus 0 link: 0
1129 14:47:59.397121 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1130 14:47:59.403293 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1131 14:47:59.406947 PCI: 00:19.0 assign_resources, bus 0 link: 0
1132 14:47:59.413058 PCI: 00:19.0 assign_resources, bus 0 link: 0
1133 14:47:59.419687 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1134 14:47:59.429980 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1135 14:47:59.436525 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1136 14:47:59.443004 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1137 14:47:59.445968 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1138 14:47:59.449674 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1139 14:47:59.456506 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1140 14:47:59.459488 LPC: Trying to open IO window from 800 size 1ff
1141 14:47:59.469436 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1142 14:47:59.476214 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1143 14:47:59.482592 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1144 14:47:59.485704 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1145 14:47:59.492363 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1146 14:47:59.499144 DOMAIN: 0000 assign_resources, bus 0 link: 0
1147 14:47:59.502882 Root Device assign_resources, bus 0 link: 0
1148 14:47:59.505954 Done setting resources.
1149 14:47:59.512786 Show resources in subtree (Root Device)...After assigning values.
1150 14:47:59.515726 Root Device child on link 0 CPU_CLUSTER: 0
1151 14:47:59.522369 CPU_CLUSTER: 0 child on link 0 APIC: 00
1152 14:47:59.522454 APIC: 00
1153 14:47:59.522520 APIC: 02
1154 14:47:59.528907 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1155 14:47:59.535706 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1156 14:47:59.545592 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1157 14:47:59.548621 PCI: 00:00.0
1158 14:47:59.558546 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1159 14:47:59.568294 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1160 14:47:59.578180 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1161 14:47:59.584868 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1162 14:47:59.595245 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1163 14:47:59.604568 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1164 14:47:59.614445 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1165 14:47:59.624753 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1166 14:47:59.631249 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1167 14:47:59.640959 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1168 14:47:59.651412 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1169 14:47:59.661165 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1170 14:47:59.671101 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1171 14:47:59.677232 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1172 14:47:59.687457 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1173 14:47:59.697384 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1174 14:47:59.707318 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1175 14:47:59.717064 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1176 14:47:59.726848 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1177 14:47:59.726933 PCI: 00:02.0
1178 14:47:59.737149 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1179 14:47:59.749898 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1180 14:47:59.756535 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1181 14:47:59.763322 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1182 14:47:59.773315 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1183 14:47:59.773404 GENERIC: 0.0
1184 14:47:59.780050 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1185 14:47:59.789709 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1186 14:47:59.792893 GENERIC: 0.0
1187 14:47:59.792977 PCI: 00:08.0
1188 14:47:59.802743 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1189 14:47:59.809532 PCI: 00:14.0 child on link 0 USB0 port 0
1190 14:47:59.819672 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1191 14:47:59.822680 USB0 port 0 child on link 0 USB2 port 0
1192 14:47:59.825852 USB2 port 0
1193 14:47:59.825940 USB2 port 1
1194 14:47:59.829457 USB2 port 2
1195 14:47:59.829560 USB2 port 3
1196 14:47:59.832432 USB2 port 4
1197 14:47:59.832515 USB2 port 5
1198 14:47:59.835950 USB2 port 6
1199 14:47:59.836037 USB2 port 7
1200 14:47:59.839103 USB3 port 0
1201 14:47:59.839186 USB3 port 1
1202 14:47:59.842684 USB3 port 2
1203 14:47:59.842768 USB3 port 3
1204 14:47:59.845686 PCI: 00:14.2
1205 14:47:59.849324 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1206 14:47:59.858916 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1207 14:47:59.862151 GENERIC: 0.0
1208 14:47:59.865125 PCI: 00:14.5
1209 14:47:59.875490 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1210 14:47:59.878563 PCI: 00:15.0 child on link 0 I2C: 00:2c
1211 14:47:59.888276 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1212 14:47:59.892072 I2C: 00:2c
1213 14:47:59.892156 I2C: 00:15
1214 14:47:59.895202 PCI: 00:15.1
1215 14:47:59.904961 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1216 14:47:59.908073 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1217 14:47:59.918170 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1218 14:47:59.921809 GENERIC: 0.0
1219 14:47:59.921894 I2C: 00:15
1220 14:47:59.924817 I2C: 00:10
1221 14:47:59.924902 I2C: 00:10
1222 14:47:59.928339 I2C: 00:2c
1223 14:47:59.928423 I2C: 00:40
1224 14:47:59.928489 I2C: 00:10
1225 14:47:59.931418 I2C: 00:39
1226 14:47:59.935070 PCI: 00:15.3 child on link 0 I2C: 00:36
1227 14:47:59.944825 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1228 14:47:59.948087 I2C: 00:36
1229 14:47:59.948173 I2C: 00:10
1230 14:47:59.951102 I2C: 00:0c
1231 14:47:59.951186 I2C: 00:50
1232 14:47:59.954188 PCI: 00:16.0
1233 14:47:59.964513 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1234 14:47:59.967572 PCI: 00:19.0 child on link 0 I2C: 00:1a
1235 14:47:59.977813 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1236 14:47:59.980871 I2C: 00:1a
1237 14:47:59.980956 I2C: 00:1a
1238 14:47:59.984159 I2C: 00:1a
1239 14:47:59.984244 I2C: 00:28
1240 14:47:59.987356 I2C: 00:29
1241 14:47:59.987440 PCI: 00:19.2
1242 14:48:00.000769 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1243 14:48:00.010696 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1244 14:48:00.010783 PCI: 00:1a.0
1245 14:48:00.020755 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1246 14:48:00.023777 PCI: 00:1e.0
1247 14:48:00.026830 PCI: 00:1e.2 child on link 0 SPI: 00
1248 14:48:00.036990 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1249 14:48:00.039997 SPI: 00
1250 14:48:00.043526 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1251 14:48:00.050287 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1252 14:48:00.053242 PNP: 0c09.0
1253 14:48:00.063355 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1254 14:48:00.063436 PCI: 00:1f.2
1255 14:48:00.072989 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1256 14:48:00.082806 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1257 14:48:00.086619 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1258 14:48:00.096241 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1259 14:48:00.105938 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1260 14:48:00.109691 GENERIC: 0.0
1261 14:48:00.109778 PCI: 00:1f.5
1262 14:48:00.122614 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1263 14:48:00.122703 Done allocating resources.
1264 14:48:00.129409 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2097 ms
1265 14:48:00.132560 Enabling resources...
1266 14:48:00.135510 PCI: 00:00.0 subsystem <- 8086/4e22
1267 14:48:00.139158 PCI: 00:00.0 cmd <- 06
1268 14:48:00.142066 PCI: 00:02.0 subsystem <- 8086/4e55
1269 14:48:00.145901 PCI: 00:02.0 cmd <- 03
1270 14:48:00.148945 PCI: 00:04.0 subsystem <- 8086/4e03
1271 14:48:00.152111 PCI: 00:04.0 cmd <- 02
1272 14:48:00.155717 PCI: 00:05.0 bridge ctrl <- 0003
1273 14:48:00.158685 PCI: 00:05.0 subsystem <- 8086/4e19
1274 14:48:00.162315 PCI: 00:05.0 cmd <- 02
1275 14:48:00.162409 PCI: 00:08.0 cmd <- 06
1276 14:48:00.168954 PCI: 00:14.0 subsystem <- 8086/4ded
1277 14:48:00.169034 PCI: 00:14.0 cmd <- 02
1278 14:48:00.171942 PCI: 00:14.3 subsystem <- 8086/4df0
1279 14:48:00.175557 PCI: 00:14.3 cmd <- 02
1280 14:48:00.178764 PCI: 00:14.5 subsystem <- 8086/4df8
1281 14:48:00.181791 PCI: 00:14.5 cmd <- 06
1282 14:48:00.185487 PCI: 00:15.0 subsystem <- 8086/4de8
1283 14:48:00.188804 PCI: 00:15.0 cmd <- 02
1284 14:48:00.191842 PCI: 00:15.1 subsystem <- 8086/4de9
1285 14:48:00.194823 PCI: 00:15.1 cmd <- 02
1286 14:48:00.198467 PCI: 00:15.2 subsystem <- 8086/4dea
1287 14:48:00.201663 PCI: 00:15.2 cmd <- 02
1288 14:48:00.204659 PCI: 00:15.3 subsystem <- 8086/4deb
1289 14:48:00.204739 PCI: 00:15.3 cmd <- 02
1290 14:48:00.211472 PCI: 00:16.0 subsystem <- 8086/4de0
1291 14:48:00.211596 PCI: 00:16.0 cmd <- 02
1292 14:48:00.214615 PCI: 00:19.0 subsystem <- 8086/4dc5
1293 14:48:00.218327 PCI: 00:19.0 cmd <- 02
1294 14:48:00.221375 PCI: 00:19.2 subsystem <- 8086/4dc7
1295 14:48:00.224608 PCI: 00:19.2 cmd <- 06
1296 14:48:00.227578 PCI: 00:1a.0 subsystem <- 8086/4dc4
1297 14:48:00.231280 PCI: 00:1a.0 cmd <- 06
1298 14:48:00.234480 PCI: 00:1e.2 subsystem <- 8086/4daa
1299 14:48:00.237780 PCI: 00:1e.2 cmd <- 06
1300 14:48:00.241144 PCI: 00:1f.0 subsystem <- 8086/4d87
1301 14:48:00.244477 PCI: 00:1f.0 cmd <- 407
1302 14:48:00.247488 PCI: 00:1f.3 subsystem <- 8086/4dc8
1303 14:48:00.247601 PCI: 00:1f.3 cmd <- 02
1304 14:48:00.254318 PCI: 00:1f.5 subsystem <- 8086/4da4
1305 14:48:00.254429 PCI: 00:1f.5 cmd <- 406
1306 14:48:00.259893 done.
1307 14:48:00.262947 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1308 14:48:00.266045 Initializing devices...
1309 14:48:00.269790 Root Device init
1310 14:48:00.269941 mainboard: EC init
1311 14:48:00.276482 Chrome EC: Set SMI mask to 0x0000000000000000
1312 14:48:00.279537 Chrome EC: clear events_b mask to 0x0000000000000000
1313 14:48:00.286520 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1314 14:48:00.293484 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1315 14:48:00.299977 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1316 14:48:00.303184 Chrome EC: Set WAKE mask to 0x0000000000000000
1317 14:48:00.306288 Root Device init finished in 35 msecs
1318 14:48:00.310664 PCI: 00:00.0 init
1319 14:48:00.313909 CPU TDP = 6 Watts
1320 14:48:00.314372 CPU PL1 = 7 Watts
1321 14:48:00.316994 CPU PL2 = 12 Watts
1322 14:48:00.320696 PCI: 00:00.0 init finished in 6 msecs
1323 14:48:00.323851 PCI: 00:02.0 init
1324 14:48:00.326710 GMA: Found VBT in CBFS
1325 14:48:00.330451 GMA: Found valid VBT in CBFS
1326 14:48:00.333485 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1327 14:48:00.343158 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1328 14:48:00.346734 PCI: 00:02.0 init finished in 18 msecs
1329 14:48:00.349805 PCI: 00:08.0 init
1330 14:48:00.353025 PCI: 00:08.0 init finished in 0 msecs
1331 14:48:00.353430 PCI: 00:14.0 init
1332 14:48:00.360229 XHCI: Updated LFPS sampling OFF time to 9 ms
1333 14:48:00.363016 PCI: 00:14.0 init finished in 4 msecs
1334 14:48:00.366657 PCI: 00:15.0 init
1335 14:48:00.369698 I2C bus 0 version 0x3230302a
1336 14:48:00.373423 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1337 14:48:00.376396 PCI: 00:15.0 init finished in 6 msecs
1338 14:48:00.379047 PCI: 00:15.1 init
1339 14:48:00.379130 I2C bus 1 version 0x3230302a
1340 14:48:00.385892 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1341 14:48:00.389622 PCI: 00:15.1 init finished in 6 msecs
1342 14:48:00.389706 PCI: 00:15.2 init
1343 14:48:00.392804 I2C bus 2 version 0x3230302a
1344 14:48:00.396587 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1345 14:48:00.399506 PCI: 00:15.2 init finished in 6 msecs
1346 14:48:00.402466 PCI: 00:15.3 init
1347 14:48:00.406238 I2C bus 3 version 0x3230302a
1348 14:48:00.409317 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1349 14:48:00.412397 PCI: 00:15.3 init finished in 6 msecs
1350 14:48:00.415481 PCI: 00:16.0 init
1351 14:48:00.419286 PCI: 00:16.0 init finished in 0 msecs
1352 14:48:00.422348 PCI: 00:19.0 init
1353 14:48:00.425453 I2C bus 4 version 0x3230302a
1354 14:48:00.428441 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1355 14:48:00.432256 PCI: 00:19.0 init finished in 6 msecs
1356 14:48:00.435275 PCI: 00:1a.0 init
1357 14:48:00.438429 PCI: 00:1a.0 init finished in 0 msecs
1358 14:48:00.441828 PCI: 00:1f.0 init
1359 14:48:00.444971 IOAPIC: Initializing IOAPIC at 0xfec00000
1360 14:48:00.448525 IOAPIC: Bootstrap Processor Local APIC = 0x00
1361 14:48:00.451492 IOAPIC: ID = 0x02
1362 14:48:00.455160 IOAPIC: Dumping registers
1363 14:48:00.455262 reg 0x0000: 0x02000000
1364 14:48:00.458223 reg 0x0001: 0x00770020
1365 14:48:00.461708 reg 0x0002: 0x00000000
1366 14:48:00.465322 PCI: 00:1f.0 init finished in 21 msecs
1367 14:48:00.468310 PCI: 00:1f.2 init
1368 14:48:00.471374 Disabling ACPI via APMC.
1369 14:48:00.471457 APMC done.
1370 14:48:00.478108 PCI: 00:1f.2 init finished in 5 msecs
1371 14:48:00.488330 PNP: 0c09.0 init
1372 14:48:00.491427 Google Chrome EC uptime: 6.546 seconds
1373 14:48:00.497707 Google Chrome AP resets since EC boot: 0
1374 14:48:00.501362 Google Chrome most recent AP reset causes:
1375 14:48:00.508016 Google Chrome EC reset flags at last EC boot: reset-pin
1376 14:48:00.511379 PNP: 0c09.0 init finished in 18 msecs
1377 14:48:00.514416 Devices initialized
1378 14:48:00.514500 Show all devs... After init.
1379 14:48:00.517533 Root Device: enabled 1
1380 14:48:00.520694 CPU_CLUSTER: 0: enabled 1
1381 14:48:00.524432 DOMAIN: 0000: enabled 1
1382 14:48:00.524517 PCI: 00:00.0: enabled 1
1383 14:48:00.527467 PCI: 00:02.0: enabled 1
1384 14:48:00.531246 PCI: 00:04.0: enabled 1
1385 14:48:00.534257 PCI: 00:05.0: enabled 1
1386 14:48:00.534341 PCI: 00:09.0: enabled 0
1387 14:48:00.537316 PCI: 00:12.6: enabled 0
1388 14:48:00.541076 PCI: 00:14.0: enabled 1
1389 14:48:00.544093 PCI: 00:14.1: enabled 0
1390 14:48:00.544178 PCI: 00:14.2: enabled 0
1391 14:48:00.547102 PCI: 00:14.3: enabled 1
1392 14:48:00.550660 PCI: 00:14.5: enabled 1
1393 14:48:00.550744 PCI: 00:15.0: enabled 1
1394 14:48:00.554248 PCI: 00:15.1: enabled 1
1395 14:48:00.557346 PCI: 00:15.2: enabled 1
1396 14:48:00.560415 PCI: 00:15.3: enabled 1
1397 14:48:00.560499 PCI: 00:16.0: enabled 1
1398 14:48:00.563864 PCI: 00:16.1: enabled 0
1399 14:48:00.566870 PCI: 00:16.4: enabled 0
1400 14:48:00.570541 PCI: 00:16.5: enabled 0
1401 14:48:00.570626 PCI: 00:17.0: enabled 0
1402 14:48:00.573505 PCI: 00:19.0: enabled 1
1403 14:48:00.577170 PCI: 00:19.1: enabled 0
1404 14:48:00.580191 PCI: 00:19.2: enabled 1
1405 14:48:00.580275 PCI: 00:1a.0: enabled 1
1406 14:48:00.583604 PCI: 00:1c.0: enabled 0
1407 14:48:00.587334 PCI: 00:1c.1: enabled 0
1408 14:48:00.590233 PCI: 00:1c.2: enabled 0
1409 14:48:00.590318 PCI: 00:1c.3: enabled 0
1410 14:48:00.593322 PCI: 00:1c.4: enabled 0
1411 14:48:00.597030 PCI: 00:1c.5: enabled 0
1412 14:48:00.597114 PCI: 00:1c.6: enabled 0
1413 14:48:00.600161 PCI: 00:1c.7: enabled 1
1414 14:48:00.603714 PCI: 00:1e.0: enabled 0
1415 14:48:00.606805 PCI: 00:1e.1: enabled 0
1416 14:48:00.606888 PCI: 00:1e.2: enabled 1
1417 14:48:00.609849 PCI: 00:1e.3: enabled 0
1418 14:48:00.613556 PCI: 00:1f.0: enabled 1
1419 14:48:00.616592 PCI: 00:1f.1: enabled 0
1420 14:48:00.616676 PCI: 00:1f.2: enabled 1
1421 14:48:00.620164 PCI: 00:1f.3: enabled 1
1422 14:48:00.623295 PCI: 00:1f.4: enabled 0
1423 14:48:00.626328 PCI: 00:1f.5: enabled 1
1424 14:48:00.626412 PCI: 00:1f.7: enabled 0
1425 14:48:00.629455 GENERIC: 0.0: enabled 1
1426 14:48:00.633209 GENERIC: 0.0: enabled 1
1427 14:48:00.636347 USB0 port 0: enabled 1
1428 14:48:00.636432 GENERIC: 0.0: enabled 1
1429 14:48:00.639987 I2C: 00:2c: enabled 1
1430 14:48:00.643070 I2C: 00:15: enabled 1
1431 14:48:00.643154 GENERIC: 0.0: enabled 0
1432 14:48:00.646214 I2C: 00:15: enabled 1
1433 14:48:00.649302 I2C: 00:10: enabled 0
1434 14:48:00.649386 I2C: 00:10: enabled 0
1435 14:48:00.652973 I2C: 00:2c: enabled 1
1436 14:48:00.655971 I2C: 00:40: enabled 1
1437 14:48:00.656054 I2C: 00:10: enabled 1
1438 14:48:00.659698 I2C: 00:39: enabled 1
1439 14:48:00.662633 I2C: 00:36: enabled 1
1440 14:48:00.662717 I2C: 00:10: enabled 0
1441 14:48:00.666259 I2C: 00:0c: enabled 1
1442 14:48:00.669405 I2C: 00:50: enabled 1
1443 14:48:00.669519 I2C: 00:1a: enabled 1
1444 14:48:00.673075 I2C: 00:1a: enabled 0
1445 14:48:00.676196 I2C: 00:1a: enabled 0
1446 14:48:00.679339 I2C: 00:28: enabled 1
1447 14:48:00.679439 I2C: 00:29: enabled 1
1448 14:48:00.683015 PCI: 00:00.0: enabled 1
1449 14:48:00.686075 SPI: 00: enabled 1
1450 14:48:00.686161 PNP: 0c09.0: enabled 1
1451 14:48:00.689050 GENERIC: 0.0: enabled 0
1452 14:48:00.692596 USB2 port 0: enabled 1
1453 14:48:00.692680 USB2 port 1: enabled 1
1454 14:48:00.695488 USB2 port 2: enabled 1
1455 14:48:00.699299 USB2 port 3: enabled 1
1456 14:48:00.702298 USB2 port 4: enabled 0
1457 14:48:00.702382 USB2 port 5: enabled 1
1458 14:48:00.705958 USB2 port 6: enabled 0
1459 14:48:00.708920 USB2 port 7: enabled 1
1460 14:48:00.709012 USB3 port 0: enabled 1
1461 14:48:00.712094 USB3 port 1: enabled 1
1462 14:48:00.715867 USB3 port 2: enabled 1
1463 14:48:00.715952 USB3 port 3: enabled 1
1464 14:48:00.718910 APIC: 00: enabled 1
1465 14:48:00.722107 APIC: 02: enabled 1
1466 14:48:00.722192 PCI: 00:08.0: enabled 1
1467 14:48:00.728917 BS: BS_DEV_INIT run times (exec / console): 22 / 437 ms
1468 14:48:00.735212 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1469 14:48:00.738860 ELOG: NV offset 0xbfa000 size 0x1000
1470 14:48:00.744995 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1471 14:48:00.751768 ELOG: Event(17) added with size 13 at 2022-07-08 02:43:08 UTC
1472 14:48:00.758268 ELOG: Event(92) added with size 9 at 2022-07-08 02:43:08 UTC
1473 14:48:00.764863 ELOG: Event(93) added with size 9 at 2022-07-08 02:43:08 UTC
1474 14:48:00.771448 ELOG: Event(9E) added with size 10 at 2022-07-08 02:43:08 UTC
1475 14:48:00.778294 ELOG: Event(9F) added with size 14 at 2022-07-08 02:43:08 UTC
1476 14:48:00.781341 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1477 14:48:00.788083 ELOG: Event(A1) added with size 10 at 2022-07-08 02:43:08 UTC
1478 14:48:00.797817 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1479 14:48:00.800888 ELOG: Event(A0) added with size 9 at 2022-07-08 02:43:08 UTC
1480 14:48:00.807485 elog_add_boot_reason: Logged dev mode boot
1481 14:48:00.814223 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1482 14:48:00.814316 Finalize devices...
1483 14:48:00.817452 Devices finalized
1484 14:48:00.821250 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1485 14:48:00.827316 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1486 14:48:00.833964 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1487 14:48:00.837783 ME: HFSTS1 : 0x80030045
1488 14:48:00.841032 ME: HFSTS2 : 0x30280136
1489 14:48:00.843886 ME: HFSTS3 : 0x00000050
1490 14:48:00.850695 ME: HFSTS4 : 0x00004000
1491 14:48:00.854408 ME: HFSTS5 : 0x00000000
1492 14:48:00.857475 ME: HFSTS6 : 0x40400006
1493 14:48:00.860973 ME: Manufacturing Mode : NO
1494 14:48:00.864176 ME: FW Partition Table : OK
1495 14:48:00.867671 ME: Bringup Loader Failure : NO
1496 14:48:00.870842 ME: Firmware Init Complete : NO
1497 14:48:00.873987 ME: Boot Options Present : NO
1498 14:48:00.877627 ME: Update In Progress : NO
1499 14:48:00.880607 ME: D0i3 Support : YES
1500 14:48:00.884376 ME: Low Power State Enabled : NO
1501 14:48:00.887281 ME: CPU Replaced : YES
1502 14:48:00.890938 ME: CPU Replacement Valid : YES
1503 14:48:00.894024 ME: Current Working State : 5
1504 14:48:00.897191 ME: Current Operation State : 1
1505 14:48:00.900909 ME: Current Operation Mode : 3
1506 14:48:00.904032 ME: Error Code : 0
1507 14:48:00.906969 ME: CPU Debug Disabled : YES
1508 14:48:00.910528 ME: TXT Support : NO
1509 14:48:00.917103 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1510 14:48:00.923467 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1511 14:48:00.927234 ACPI: Writing ACPI tables at 76b27000.
1512 14:48:00.927731 ACPI: * FACS
1513 14:48:00.930313 ACPI: * DSDT
1514 14:48:00.933412 Ramoops buffer: 0x100000@0x76a26000.
1515 14:48:00.940053 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1516 14:48:00.943090 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1517 14:48:00.946870 Google Chrome EC: version:
1518 14:48:00.949987 ro: magolor_1.1.9999-103b6f9
1519 14:48:00.953025 rw: magolor_1.1.9999-103b6f9
1520 14:48:00.956150 running image: 1
1521 14:48:00.963120 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1522 14:48:00.966149 ACPI: * FADT
1523 14:48:00.966287 SCI is IRQ9
1524 14:48:00.969777 ACPI: added table 1/32, length now 40
1525 14:48:00.972930 ACPI: * SSDT
1526 14:48:00.976010 Found 1 CPU(s) with 2 core(s) each.
1527 14:48:00.979516 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1528 14:48:00.985749 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1529 14:48:00.989239 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1530 14:48:00.995900 WARNING: RO_VPD is uninitialized or empty.
1531 14:48:00.999146 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1532 14:48:01.002149 WARNING: RW_VPD is uninitialized or empty.
1533 14:48:01.005946 Could not locate 'wifi_sar' in VPD.
1534 14:48:01.012417 Checking CBFS for default SAR values
1535 14:48:01.015431 wifi_sar_defaults.hex has bad len in CBFS
1536 14:48:01.018566 failed from getting SAR limits!
1537 14:48:01.021725 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1538 14:48:01.028681 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1539 14:48:01.031703 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1540 14:48:01.038488 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1541 14:48:01.041732 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1542 14:48:01.048455 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1543 14:48:01.054673 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1544 14:48:01.058479 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1545 14:48:01.064848 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1546 14:48:01.071511 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1547 14:48:01.078181 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1548 14:48:01.081725 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1549 14:48:01.087888 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1550 14:48:01.094490 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1551 14:48:01.097749 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1552 14:48:01.104365 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1553 14:48:01.108163 PS2K: Passing 101 keymaps to kernel
1554 14:48:01.114241 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1555 14:48:01.120963 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1556 14:48:01.124034 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1557 14:48:01.130995 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1558 14:48:01.138066 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1559 14:48:01.140920 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1560 14:48:01.147317 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1561 14:48:01.153598 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1562 14:48:01.156810 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1563 14:48:01.163392 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1564 14:48:01.167051 ACPI: added table 2/32, length now 44
1565 14:48:01.170410 ACPI: * MCFG
1566 14:48:01.173720 ACPI: added table 3/32, length now 48
1567 14:48:01.176995 ACPI: * TPM2
1568 14:48:01.179886 TPM2 log created at 0x76a16000
1569 14:48:01.183002 ACPI: added table 4/32, length now 52
1570 14:48:01.183487 ACPI: * MADT
1571 14:48:01.186748 SCI is IRQ9
1572 14:48:01.189780 ACPI: added table 5/32, length now 56
1573 14:48:01.190262 current = 76b2d580
1574 14:48:01.192910 ACPI: * DMAR
1575 14:48:01.196542 ACPI: added table 6/32, length now 60
1576 14:48:01.199803 ACPI: added table 7/32, length now 64
1577 14:48:01.203219 ACPI: * HPET
1578 14:48:01.206720 ACPI: added table 8/32, length now 68
1579 14:48:01.207317 ACPI: done.
1580 14:48:01.209464 ACPI tables: 26304 bytes.
1581 14:48:01.213126 smbios_write_tables: 76a15000
1582 14:48:01.216268 EC returned error result code 3
1583 14:48:01.219199 Couldn't obtain OEM name from CBI
1584 14:48:01.222768 Create SMBIOS type 16
1585 14:48:01.226166 Create SMBIOS type 17
1586 14:48:01.226788 GENERIC: 0.0 (WIFI Device)
1587 14:48:01.229557 SMBIOS tables: 913 bytes.
1588 14:48:01.232863 Writing table forward entry at 0x00000500
1589 14:48:01.239212 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1590 14:48:01.243097 Writing coreboot table at 0x76b4b000
1591 14:48:01.249051 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1592 14:48:01.255981 1. 0000000000001000-000000000009ffff: RAM
1593 14:48:01.259583 2. 00000000000a0000-00000000000fffff: RESERVED
1594 14:48:01.262652 3. 0000000000100000-0000000076a14fff: RAM
1595 14:48:01.269613 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1596 14:48:01.275954 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1597 14:48:01.279002 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1598 14:48:01.285738 7. 0000000077000000-000000007fbfffff: RESERVED
1599 14:48:01.288790 8. 00000000c0000000-00000000cfffffff: RESERVED
1600 14:48:01.295660 9. 00000000fb000000-00000000fb000fff: RESERVED
1601 14:48:01.298573 10. 00000000fe000000-00000000fe00ffff: RESERVED
1602 14:48:01.305269 11. 00000000fea80000-00000000fea87fff: RESERVED
1603 14:48:01.308252 12. 00000000fed80000-00000000fed87fff: RESERVED
1604 14:48:01.312219 13. 00000000fed90000-00000000fed92fff: RESERVED
1605 14:48:01.318447 14. 00000000feda0000-00000000feda1fff: RESERVED
1606 14:48:01.321960 15. 0000000100000000-00000001803fffff: RAM
1607 14:48:01.324837 Passing 4 GPIOs to payload:
1608 14:48:01.331175 NAME | PORT | POLARITY | VALUE
1609 14:48:01.335037 lid | undefined | high | high
1610 14:48:01.342027 power | undefined | high | low
1611 14:48:01.347974 oprom | undefined | high | low
1612 14:48:01.351173 EC in RW | 0x000000b9 | high | low
1613 14:48:01.357962 Wrote coreboot table at: 0x76b4b000, 0x5a0 bytes, checksum 60f6
1614 14:48:01.361096 coreboot table: 1464 bytes.
1615 14:48:01.364292 IMD ROOT 0. 0x76fff000 0x00001000
1616 14:48:01.367809 IMD SMALL 1. 0x76ffe000 0x00001000
1617 14:48:01.370819 FSP MEMORY 2. 0x76c4e000 0x003b0000
1618 14:48:01.374695 CONSOLE 3. 0x76c2e000 0x00020000
1619 14:48:01.380619 FMAP 4. 0x76c2d000 0x00000578
1620 14:48:01.384406 TIME STAMP 5. 0x76c2c000 0x00000910
1621 14:48:01.387536 VBOOT WORK 6. 0x76c18000 0x00014000
1622 14:48:01.391320 ROMSTG STCK 7. 0x76c17000 0x00001000
1623 14:48:01.394338 AFTER CAR 8. 0x76c0d000 0x0000a000
1624 14:48:01.397531 RAMSTAGE 9. 0x76ba7000 0x00066000
1625 14:48:01.400910 REFCODE 10. 0x76b67000 0x00040000
1626 14:48:01.403966 SMM BACKUP 11. 0x76b57000 0x00010000
1627 14:48:01.407913 4f444749 12. 0x76b55000 0x00002000
1628 14:48:01.413919 EXT VBT13. 0x76b53000 0x00001c43
1629 14:48:01.416914 COREBOOT 14. 0x76b4b000 0x00008000
1630 14:48:01.420626 ACPI 15. 0x76b27000 0x00024000
1631 14:48:01.423743 ACPI GNVS 16. 0x76b26000 0x00001000
1632 14:48:01.427328 RAMOOPS 17. 0x76a26000 0x00100000
1633 14:48:01.430638 TPM2 TCGLOG18. 0x76a16000 0x00010000
1634 14:48:01.433930 SMBIOS 19. 0x76a15000 0x00000800
1635 14:48:01.436678 IMD small region:
1636 14:48:01.440492 IMD ROOT 0. 0x76ffec00 0x00000400
1637 14:48:01.443638 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1638 14:48:01.446496 POWER STATE 2. 0x76ffeba0 0x00000040
1639 14:48:01.453500 ROMSTAGE 3. 0x76ffeb80 0x00000004
1640 14:48:01.456419 MEM INFO 4. 0x76ffe9a0 0x000001e0
1641 14:48:01.463158 BS: BS_WRITE_TABLES run times (exec / console): 8 / 531 ms
1642 14:48:01.463736 MTRR: Physical address space:
1643 14:48:01.469957 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1644 14:48:01.476779 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1645 14:48:01.482943 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1646 14:48:01.489668 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1647 14:48:01.496558 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1648 14:48:01.503072 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1649 14:48:01.509578 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1650 14:48:01.512826 MTRR: Fixed MSR 0x250 0x0606060606060606
1651 14:48:01.515844 MTRR: Fixed MSR 0x258 0x0606060606060606
1652 14:48:01.518962 MTRR: Fixed MSR 0x259 0x0000000000000000
1653 14:48:01.525849 MTRR: Fixed MSR 0x268 0x0606060606060606
1654 14:48:01.528967 MTRR: Fixed MSR 0x269 0x0606060606060606
1655 14:48:01.532549 MTRR: Fixed MSR 0x26a 0x0606060606060606
1656 14:48:01.535971 MTRR: Fixed MSR 0x26b 0x0606060606060606
1657 14:48:01.542787 MTRR: Fixed MSR 0x26c 0x0606060606060606
1658 14:48:01.545694 MTRR: Fixed MSR 0x26d 0x0606060606060606
1659 14:48:01.549087 MTRR: Fixed MSR 0x26e 0x0606060606060606
1660 14:48:01.552263 MTRR: Fixed MSR 0x26f 0x0606060606060606
1661 14:48:01.555902 call enable_fixed_mtrr()
1662 14:48:01.558965 CPU physical address size: 39 bits
1663 14:48:01.565401 MTRR: default type WB/UC MTRR counts: 6/5.
1664 14:48:01.568765 MTRR: UC selected as default type.
1665 14:48:01.575805 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1666 14:48:01.578555 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1667 14:48:01.585558 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1668 14:48:01.591570 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1669 14:48:01.598727 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1670 14:48:01.599302
1671 14:48:01.601707 MTRR check
1672 14:48:01.602176 Fixed MTRRs : Enabled
1673 14:48:01.605085 Variable MTRRs: Enabled
1674 14:48:01.605738
1675 14:48:01.608238 MTRR: Fixed MSR 0x250 0x0606060606060606
1676 14:48:01.614980 MTRR: Fixed MSR 0x258 0x0606060606060606
1677 14:48:01.617991 MTRR: Fixed MSR 0x259 0x0000000000000000
1678 14:48:01.621947 MTRR: Fixed MSR 0x268 0x0606060606060606
1679 14:48:01.625146 MTRR: Fixed MSR 0x269 0x0606060606060606
1680 14:48:01.631231 MTRR: Fixed MSR 0x26a 0x0606060606060606
1681 14:48:01.634783 MTRR: Fixed MSR 0x26b 0x0606060606060606
1682 14:48:01.637963 MTRR: Fixed MSR 0x26c 0x0606060606060606
1683 14:48:01.640934 MTRR: Fixed MSR 0x26d 0x0606060606060606
1684 14:48:01.647755 MTRR: Fixed MSR 0x26e 0x0606060606060606
1685 14:48:01.651047 MTRR: Fixed MSR 0x26f 0x0606060606060606
1686 14:48:01.657607 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1687 14:48:01.658184 call enable_fixed_mtrr()
1688 14:48:01.661345 Checking cr50 for pending updates
1689 14:48:01.664545 CPU physical address size: 39 bits
1690 14:48:01.669773 Reading cr50 TPM mode
1691 14:48:01.679278 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1692 14:48:01.686575 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1693 14:48:01.689665 Checking segment from ROM address 0xfff9d5b8
1694 14:48:01.696486 Checking segment from ROM address 0xfff9d5d4
1695 14:48:01.699471 Loading segment from ROM address 0xfff9d5b8
1696 14:48:01.703604 code (compression=0)
1697 14:48:01.709886 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1698 14:48:01.719686 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1699 14:48:01.722992 it's not compressed!
1700 14:48:01.848104 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1701 14:48:01.854680 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1702 14:48:01.861989 Loading segment from ROM address 0xfff9d5d4
1703 14:48:01.865888 Entry Point 0x30000000
1704 14:48:01.866481 Loaded segments
1705 14:48:01.871952 BS: BS_PAYLOAD_LOAD run times (exec / console): 125 / 60 ms
1706 14:48:01.888424 Finalizing chipset.
1707 14:48:01.891233 Finalizing SMM.
1708 14:48:01.891750 APMC done.
1709 14:48:01.897952 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1710 14:48:01.901234 mp_park_aps done after 0 msecs.
1711 14:48:01.904797 Jumping to boot code at 0x30000000(0x76b4b000)
1712 14:48:01.914437 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1713 14:48:01.915011
1714 14:48:01.917461 Starting depthcharge on Magolor...
1715 14:48:01.918773 end: 2.2.3 depthcharge-start (duration 00:00:15) [common]
1716 14:48:01.919392 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
1717 14:48:01.919910 Setting prompt string to ['dedede:']
1718 14:48:01.920356 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:45)
1719 14:48:01.928172 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1720 14:48:01.933845 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1721 14:48:01.937135 fw_config match found: AUDIO_AMP=UNPROVISIONED
1722 14:48:01.940940 Wipe memory regions:
1723 14:48:01.943767 [0x00000000001000, 0x000000000a0000)
1724 14:48:01.947424 [0x00000000100000, 0x00000030000000)
1725 14:48:02.079732 [0x00000031062170, 0x00000076a15000)
1726 14:48:02.252070 [0x00000100000000, 0x00000180400000)
1727 14:48:03.314138 R8152: Initializing
1728 14:48:03.317140 Version 6 (ocp_data = 5c30)
1729 14:48:03.320647 R8152: Done initializing
1730 14:48:03.324497 Adding net device
1731 14:48:03.327617 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1732 14:48:03.330689
1733 14:48:03.331576 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1735 14:48:03.433544 dedede: tftpboot 192.168.201.1 7462852/tftp-deploy-5ak0ho8d/kernel/bzImage 7462852/tftp-deploy-5ak0ho8d/kernel/cmdline 7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
1736 14:48:03.434163 Setting prompt string to 'Starting kernel'
1737 14:48:03.434537 Setting prompt string to ['Starting kernel']
1738 14:48:03.434877 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1739 14:48:03.435254 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:44)
1740 14:48:03.438683 tftpboot 192.168.201.1 7462852/tftp-deploy-5ak0ho8d/kernel/bzImoy-5ak0ho8d/kernel/cmdline 7462852/tftp-deploy-5ak0ho8d/ramdisk/ramdisk.cpio.gz
1741 14:48:03.439113 Waiting for link
1742 14:48:03.640837 done.
1743 14:48:03.641344 MAC: 00:24:32:30:7b:c4
1744 14:48:03.643735 Sending DHCP discover... done.
1745 14:48:03.647400 Waiting for reply... done.
1746 14:48:03.650430 Sending DHCP request... done.
1747 14:48:03.657210 Waiting for reply... done.
1748 14:48:03.657689 My ip is 192.168.201.12
1749 14:48:03.660032 The DHCP server ip is 192.168.201.1
1750 14:48:03.666840 TFTP server IP predefined by user: 192.168.201.1
1751 14:48:03.673740 Bootfile predefined by user: 7462852/tftp-deploy-5ak0ho8d/kernel/bzImage
1752 14:48:03.676762 Sending tftp read request... done.
1753 14:48:03.683753 Waiting for the transfer...
1754 14:48:04.357695 00000000 ################################################################
1755 14:48:05.030993 00080000 ################################################################
1756 14:48:05.734554 00100000 ################################################################
1757 14:48:06.454984 00180000 ################################################################
1758 14:48:07.046490 00200000 ################################################################
1759 14:48:07.617901 00280000 ################################################################
1760 14:48:08.202819 00300000 ################################################################
1761 14:48:08.806497 00380000 ################################################################
1762 14:48:09.394257 00400000 ################################################################
1763 14:48:09.981620 00480000 ################################################################
1764 14:48:10.551200 00500000 ################################################################
1765 14:48:11.121338 00580000 ################################################################
1766 14:48:11.688252 00600000 ################################################################
1767 14:48:12.025090 00680000 ###################################### done.
1768 14:48:12.028142 The bootfile was 7126928 bytes long.
1769 14:48:12.031173 Sending tftp read request... done.
1770 14:48:12.034556 Waiting for the transfer...
1771 14:48:12.580278 00000000 ################################################################
1772 14:48:13.141451 00080000 ################################################################
1773 14:48:13.691708 00100000 ################################################################
1774 14:48:14.263492 00180000 ################################################################
1775 14:48:14.832916 00200000 ################################################################
1776 14:48:15.437123 00280000 ################################################################
1777 14:48:16.115028 00300000 ################################################################
1778 14:48:16.764129 00380000 ################################################################
1779 14:48:17.367179 00400000 ################################################################
1780 14:48:17.993436 00480000 ################################################################
1781 14:48:18.626282 00500000 ################################################################
1782 14:48:19.240038 00580000 ################################################################
1783 14:48:19.779053 00600000 ################################################################
1784 14:48:20.311890 00680000 ################################################################
1785 14:48:20.849676 00700000 ################################################################
1786 14:48:21.386925 00780000 ################################################################
1787 14:48:21.560194 00800000 #################### done.
1788 14:48:21.563970 Sending tftp read request... done.
1789 14:48:21.567058 Waiting for the transfer...
1790 14:48:21.567143 00000000 # done.
1791 14:48:21.576980 Command line loaded dynamically from TFTP file: 7462852/tftp-deploy-5ak0ho8d/kernel/cmdline
1792 14:48:21.589976 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1793 14:48:21.593069 ec_init: CrosEC protocol v3 supported (256, 256)
1794 14:48:21.603896 Shutting down all USB controllers.
1795 14:48:21.603980 Removing current net device
1796 14:48:21.607009 Finalizing coreboot
1797 14:48:21.613624 Exiting depthcharge with code 4 at timestamp: 26513183
1798 14:48:21.613708
1799 14:48:21.613775 Starting kernel ...
1800 14:48:21.613837
1801 14:48:21.613895
1802 14:48:21.614302 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
1803 14:48:21.614403 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
1804 14:48:21.614479 Setting prompt string to ['Linux version [0-9]']
1805 14:48:21.614558 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1806 14:48:21.614628 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1808 14:52:46.614686 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
1810 14:52:46.615000 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
1812 14:52:46.615243 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1815 14:52:46.615674 end: 2 depthcharge-action (duration 00:05:00) [common]
1817 14:52:46.615871 Cleaning after the job
1818 14:52:46.615959 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/ramdisk
1819 14:52:46.616636 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/kernel
1820 14:52:46.617172 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462852/tftp-deploy-5ak0ho8d/modules
1821 14:52:46.617364 start: 5.1 power-off (timeout 00:00:30) [common]
1822 14:52:46.617540 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-8' '--port=1' '--command=off'
1823 14:52:46.636910 >> Command sent successfully.
1824 14:52:46.639448 Returned 0 in 0 seconds
1825 14:52:46.740276 end: 5.1 power-off (duration 00:00:00) [common]
1827 14:52:46.740631 start: 5.2 read-feedback (timeout 00:10:00) [common]
1828 14:52:46.740892 Listened to connection for namespace 'common' for up to 1s
1829 14:52:47.626455 Listened to connection for namespace 'common' for up to 1s
1830 14:52:47.631171 Listened to connection for namespace 'common' for up to 1s
1831 14:52:47.635196 Listened to connection for namespace 'common' for up to 1s
1832 14:52:47.638701 Listened to connection for namespace 'common' for up to 1s
1833 14:52:47.642453 Listened to connection for namespace 'common' for up to 1s
1834 14:52:47.645543 Listened to connection for namespace 'common' for up to 1s
1835 14:52:47.649775 Listened to connection for namespace 'common' for up to 1s
1836 14:52:47.653715 Listened to connection for namespace 'common' for up to 1s
1837 14:52:47.657282 Listened to connection for namespace 'common' for up to 1s
1838 14:52:47.661598 Listened to connection for namespace 'common' for up to 1s
1839 14:52:47.665127 Listened to connection for namespace 'common' for up to 1s
1840 14:52:47.669358 Listened to connection for namespace 'common' for up to 1s
1841 14:52:47.680986 Listened to connection for namespace 'common' for up to 1s
1842 14:52:47.681302 Listened to connection for namespace 'common' for up to 1s
1843 14:52:47.697638 Listened to connection for namespace 'common' for up to 1s
1844 14:52:47.697993 Listened to connection for namespace 'common' for up to 1s
1845 14:52:47.701144 Listened to connection for namespace 'common' for up to 1s
1846 14:52:47.741014 Finalising connection for namespace 'common'
1847 14:52:47.741233 Disconnecting from shell: Finalise
1848 14:52:47.741321
1849 14:52:47.842060 end: 5.2 read-feedback (duration 00:00:01) [common]
1850 14:52:47.842228 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462852
1851 14:52:47.847243 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462852
1852 14:52:47.847388 JobError: Your job cannot terminate cleanly.