Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 14:47:35.918244 lava-dispatcher, installed at version: 2022.06
2 14:47:35.918454 start: 0 validate
3 14:47:35.918601 Start time: 2022-09-30 14:47:35.918592+00:00 (UTC)
4 14:47:35.918744 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:47:35.918891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20220919.0%2Fx86%2Frootfs.cpio.gz exists
6 14:47:35.933587 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:47:35.933768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:47:35.935777 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:47:35.935906 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:47:35.938975 validate duration: 0.02
12 14:47:35.939251 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:47:35.939373 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:47:35.939483 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:47:35.939592 Not decompressing ramdisk as can be used compressed.
16 14:47:35.939689 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20220919.0/x86/rootfs.cpio.gz
17 14:47:35.939767 saving as /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/ramdisk/rootfs.cpio.gz
18 14:47:35.939839 total size: 8415689 (8MB)
19 14:47:35.978516 progress 0% (0MB)
20 14:47:36.026107 progress 5% (0MB)
21 14:47:36.051916 progress 10% (0MB)
22 14:47:36.081160 progress 15% (1MB)
23 14:47:36.108586 progress 20% (1MB)
24 14:47:36.126895 progress 25% (2MB)
25 14:47:36.142525 progress 30% (2MB)
26 14:47:36.157371 progress 35% (2MB)
27 14:47:36.176439 progress 40% (3MB)
28 14:47:36.194681 progress 45% (3MB)
29 14:47:36.221477 progress 50% (4MB)
30 14:47:36.251272 progress 55% (4MB)
31 14:47:36.280919 progress 60% (4MB)
32 14:47:36.321438 progress 65% (5MB)
33 14:47:36.340280 progress 70% (5MB)
34 14:47:36.354216 progress 75% (6MB)
35 14:47:36.368941 progress 80% (6MB)
36 14:47:36.381632 progress 85% (6MB)
37 14:47:36.397887 progress 90% (7MB)
38 14:47:36.411864 progress 95% (7MB)
39 14:47:36.426347 progress 100% (8MB)
40 14:47:36.427311 8MB downloaded in 0.49s (16.46MB/s)
41 14:47:36.427838 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:47:36.428811 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:47:36.429180 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:47:36.429506 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:47:36.429871 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:47:36.430138 saving as /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/kernel/bzImage
48 14:47:36.430369 total size: 7126928 (6MB)
49 14:47:36.430595 No compression specified
50 14:47:36.434188 progress 0% (0MB)
51 14:47:36.440161 progress 5% (0MB)
52 14:47:36.445874 progress 10% (0MB)
53 14:47:36.452116 progress 15% (1MB)
54 14:47:36.459270 progress 20% (1MB)
55 14:47:36.464432 progress 25% (1MB)
56 14:47:36.470573 progress 30% (2MB)
57 14:47:36.476908 progress 35% (2MB)
58 14:47:36.482290 progress 40% (2MB)
59 14:47:36.488592 progress 45% (3MB)
60 14:47:36.495524 progress 50% (3MB)
61 14:47:36.501266 progress 55% (3MB)
62 14:47:36.508194 progress 60% (4MB)
63 14:47:36.513734 progress 65% (4MB)
64 14:47:36.519872 progress 70% (4MB)
65 14:47:36.526012 progress 75% (5MB)
66 14:47:36.531758 progress 80% (5MB)
67 14:47:36.537730 progress 85% (5MB)
68 14:47:36.544472 progress 90% (6MB)
69 14:47:36.550035 progress 95% (6MB)
70 14:47:36.555794 progress 100% (6MB)
71 14:47:36.556043 6MB downloaded in 0.13s (54.08MB/s)
72 14:47:36.556223 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:47:36.556491 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:47:36.556591 start: 1.3 download-retry (timeout 00:09:59) [common]
76 14:47:36.556687 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 14:47:36.556802 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:47:36.556879 saving as /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/modules/modules.tar
79 14:47:36.556948 total size: 52080 (0MB)
80 14:47:36.557016 Using unxz to decompress xz
81 14:47:36.561579 progress 62% (0MB)
82 14:47:36.561989 progress 100% (0MB)
83 14:47:36.565598 0MB downloaded in 0.01s (5.75MB/s)
84 14:47:36.565840 end: 1.3.1 http-download (duration 00:00:00) [common]
86 14:47:36.566123 end: 1.3 download-retry (duration 00:00:00) [common]
87 14:47:36.566233 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 14:47:36.566343 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 14:47:36.566439 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 14:47:36.566536 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 14:47:36.566717 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul
92 14:47:36.566838 makedir: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin
93 14:47:36.566932 makedir: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/tests
94 14:47:36.567025 makedir: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/results
95 14:47:36.567143 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-add-keys
96 14:47:36.567287 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-add-sources
97 14:47:36.567416 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-background-process-start
98 14:47:36.567543 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-background-process-stop
99 14:47:36.567667 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-common-functions
100 14:47:36.567788 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-echo-ipv4
101 14:47:36.567913 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-install-packages
102 14:47:36.568040 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-installed-packages
103 14:47:36.568160 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-os-build
104 14:47:36.568290 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-probe-channel
105 14:47:36.568413 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-probe-ip
106 14:47:36.568534 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-target-ip
107 14:47:36.568656 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-target-mac
108 14:47:36.568775 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-target-storage
109 14:47:36.568899 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-case
110 14:47:36.569020 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-event
111 14:47:36.569141 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-feedback
112 14:47:36.569264 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-raise
113 14:47:36.569388 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-reference
114 14:47:36.569511 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-runner
115 14:47:36.569632 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-set
116 14:47:36.569752 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-test-shell
117 14:47:36.569875 Updating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-install-packages (oe)
118 14:47:36.569999 Updating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/bin/lava-installed-packages (oe)
119 14:47:36.570110 Creating /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/environment
120 14:47:36.570208 LAVA metadata
121 14:47:36.570284 - LAVA_JOB_ID=7462819
122 14:47:36.570356 - LAVA_DISPATCHER_IP=192.168.201.1
123 14:47:36.570470 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 14:47:36.570542 skipped lava-vland-overlay
125 14:47:36.570628 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 14:47:36.570723 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 14:47:36.570793 skipped lava-multinode-overlay
128 14:47:36.570876 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 14:47:36.570967 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 14:47:36.571050 Loading test definitions
131 14:47:36.571159 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 14:47:36.571243 Using /lava-7462819 at stage 0
133 14:47:36.571538 uuid=7462819_1.4.2.3.1 testdef=None
134 14:47:36.571640 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 14:47:36.571739 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 14:47:36.572298 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 14:47:36.572555 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 14:47:36.573198 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 14:47:36.573467 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 14:47:36.574074 runner path: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/0/tests/0_dmesg test_uuid 7462819_1.4.2.3.1
143 14:47:36.574241 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 14:47:36.574502 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
146 14:47:36.574586 Using /lava-7462819 at stage 1
147 14:47:36.574857 uuid=7462819_1.4.2.3.5 testdef=None
148 14:47:36.574959 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 14:47:36.575058 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
150 14:47:36.575557 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 14:47:36.575810 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
153 14:47:36.576468 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 14:47:36.576735 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
156 14:47:36.577353 runner path: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/1/tests/1_bootrr test_uuid 7462819_1.4.2.3.5
157 14:47:36.577512 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 14:47:36.577750 Creating lava-test-runner.conf files
160 14:47:36.577823 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/0 for stage 0
161 14:47:36.577915 - 0_dmesg
162 14:47:36.577997 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462819/lava-overlay-4dq_9lul/lava-7462819/1 for stage 1
163 14:47:36.578088 - 1_bootrr
164 14:47:36.578189 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 14:47:36.578285 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
166 14:47:36.585037 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 14:47:36.585156 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
168 14:47:36.585260 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 14:47:36.585369 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 14:47:36.585491 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
171 14:47:36.787673 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 14:47:36.788053 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 14:47:36.788202 extracting modules file /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462819/extract-overlay-ramdisk-s1b7auvi/ramdisk
174 14:47:36.792805 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 14:47:36.792928 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 14:47:36.793025 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462819/compress-overlay-qylyr4rd/overlay-1.4.2.4.tar.gz to ramdisk
177 14:47:36.793108 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462819/compress-overlay-qylyr4rd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462819/extract-overlay-ramdisk-s1b7auvi/ramdisk
178 14:47:36.797327 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 14:47:36.797447 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 14:47:36.797547 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 14:47:36.797646 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 14:47:36.797732 Building ramdisk /var/lib/lava/dispatcher/tmp/7462819/extract-overlay-ramdisk-s1b7auvi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462819/extract-overlay-ramdisk-s1b7auvi/ramdisk
183 14:47:36.867142 >> 48008 blocks
184 14:47:37.689407 rename /var/lib/lava/dispatcher/tmp/7462819/extract-overlay-ramdisk-s1b7auvi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
185 14:47:37.689830 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 14:47:37.689961 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 14:47:37.690068 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 14:47:37.690170 No mkimage arch provided, not using FIT.
189 14:47:37.690269 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 14:47:37.690363 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 14:47:37.690469 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 14:47:37.690576 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 14:47:37.690661 No LXC device requested
194 14:47:37.690750 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 14:47:37.690847 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 14:47:37.690966 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 14:47:37.691043 Checking files for TFTP limit of 4294967296 bytes.
198 14:47:37.691571 end: 1 tftp-deploy (duration 00:00:02) [common]
199 14:47:37.691689 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 14:47:37.691792 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 14:47:37.691936 substitutions:
202 14:47:37.692013 - {DTB}: None
203 14:47:37.692115 - {INITRD}: 7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
204 14:47:37.692190 - {KERNEL}: 7462819/tftp-deploy-0agpnbn4/kernel/bzImage
205 14:47:37.692257 - {LAVA_MAC}: None
206 14:47:37.692336 - {PRESEED_CONFIG}: None
207 14:47:37.692400 - {PRESEED_LOCAL}: None
208 14:47:37.692463 - {RAMDISK}: 7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
209 14:47:37.692525 - {ROOT_PART}: None
210 14:47:37.692586 - {ROOT}: None
211 14:47:37.692647 - {SERVER_IP}: 192.168.201.1
212 14:47:37.692708 - {TEE}: None
213 14:47:37.692769 Parsed boot commands:
214 14:47:37.692830 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 14:47:37.692990 Parsed boot commands: tftpboot 192.168.201.1 7462819/tftp-deploy-0agpnbn4/kernel/bzImage 7462819/tftp-deploy-0agpnbn4/kernel/cmdline 7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
216 14:47:37.693092 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 14:47:37.693195 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 14:47:37.693330 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 14:47:37.693425 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 14:47:37.693508 Not connected, no need to disconnect.
221 14:47:37.693596 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 14:47:37.693686 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 14:47:37.693766 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-1'
224 14:47:37.696664 Setting prompt string to ['lava-test: # ']
225 14:47:37.696978 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 14:47:37.697102 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 14:47:37.697215 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 14:47:37.697317 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 14:47:37.697555 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-1' '--port=1' '--command=reboot'
230 14:47:37.718402 >> Command sent successfully.
231 14:47:37.720563 Returned 0 in 0 seconds
232 14:47:37.821678 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 14:47:37.824088 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 14:47:37.824693 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 14:47:37.825166 Setting prompt string to 'Starting depthcharge on sarien...'
237 14:47:37.825573 Changing prompt to 'Starting depthcharge on sarien...'
238 14:47:37.825929 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
239 14:47:37.826891 [Enter `^Ec?' for help]
240 14:47:51.790067
241 14:47:51.790984
242 14:47:51.799326 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
243 14:47:51.803158 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
244 14:47:51.808009 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
245 14:47:51.812837 CPU: AES supported, TXT supported, VT supported
246 14:47:51.818413 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
247 14:47:51.823652 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
248 14:47:51.828901 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
249 14:47:51.832352 VBOOT: Loading verstage.
250 14:47:51.835100 CBFS @ 1d00000 size 300000
251 14:47:51.840773 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
252 14:47:51.844678 CBFS: Locating 'fallback/verstage'
253 14:47:51.848719 CBFS: Found @ offset 10f6c0 size 1435c
254 14:47:51.864256
255 14:47:51.865037
256 14:47:51.872969 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
257 14:47:51.880015 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
258 14:47:51.883039 done! DID_VID 0x00281ae0
259 14:47:51.885974 TPM ready after 0 ms
260 14:47:51.889444 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
261 14:47:51.958153 tlcl_send_startup: Startup return code is 0
262 14:47:51.960847 TPM: setup succeeded
263 14:47:51.979066 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
264 14:47:51.982812 Checking cr50 for recovery request
265 14:47:51.992693 Phase 1
266 14:47:51.996908 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
267 14:47:52.002045 FMAP: base = fe000000 size = 2000000 #areas = 37
268 14:47:52.006477 FMAP: area GBB found @ 1c11000 (978944 bytes)
269 14:47:52.013612 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
270 14:47:52.014712 Phase 2
271 14:47:52.015454 Phase 3
272 14:47:52.020604 FMAP: area GBB found @ 1c11000 (978944 bytes)
273 14:47:52.027052 VB2:vb2_report_dev_firmware() This is developer signed firmware
274 14:47:52.032434 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
275 14:47:52.036988 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
276 14:47:52.042795 VB2:vb2_verify_keyblock() Checking key block signature...
277 14:47:52.057225 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
278 14:47:52.062644 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
279 14:47:52.067515 VB2:vb2_verify_fw_preamble() Verifying preamble.
280 14:47:52.070999 Phase 4
281 14:47:52.076252 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
282 14:47:52.083846 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
283 14:47:52.253699 VB2:vb2_rsa_verify_digest() Digest check failed!
284 14:47:52.259324 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
285 14:47:52.260535 Saving nvdata
286 14:47:52.263783 Reboot requested (10020007)
287 14:47:52.266548 board_reset() called!
288 14:47:52.268140 full_reset() called!
289 14:47:56.867558
290 14:47:56.867709
291 14:47:56.875509 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
292 14:47:56.880504 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
293 14:47:56.884603 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
294 14:47:56.890144 CPU: AES supported, TXT supported, VT supported
295 14:47:56.895329 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
296 14:47:56.900533 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
297 14:47:56.905122 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
298 14:47:56.909109 VBOOT: Loading verstage.
299 14:47:56.911575 CBFS @ 1d00000 size 300000
300 14:47:56.918137 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
301 14:47:56.921688 CBFS: Locating 'fallback/verstage'
302 14:47:56.925400 CBFS: Found @ offset 10f6c0 size 1435c
303 14:47:56.940003
304 14:47:56.940113
305 14:47:56.948118 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
306 14:47:56.955804 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
307 14:47:57.076440 .done! DID_VID 0x00281ae0
308 14:47:57.078201 TPM ready after 0 ms
309 14:47:57.082384 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
310 14:47:57.151162 tlcl_send_startup: Startup return code is 0
311 14:47:57.153237 TPM: setup succeeded
312 14:47:57.172434 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
313 14:47:57.176096 Checking cr50 for recovery request
314 14:47:57.185350 Phase 1
315 14:47:57.190550 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
316 14:47:57.195011 FMAP: base = fe000000 size = 2000000 #areas = 37
317 14:47:57.199948 FMAP: area GBB found @ 1c11000 (978944 bytes)
318 14:47:57.207281 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 14:47:57.213389 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
320 14:47:57.215853 Recovery requested (1009000e)
321 14:47:57.217710 Saving nvdata
322 14:47:57.234250 tlcl_extend: response is 0
323 14:47:57.249270 tlcl_extend: response is 0
324 14:47:57.253300 CBFS @ 1d00000 size 300000
325 14:47:57.259486 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
326 14:47:57.263176 CBFS: Locating 'fallback/romstage'
327 14:47:57.266732 CBFS: Found @ offset 80 size 15b2c
328 14:47:57.267867
329 14:47:57.267962
330 14:47:57.276300 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
331 14:47:57.281489 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
332 14:47:57.285730 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
333 14:47:57.289917 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 14:47:57.294684 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
335 14:47:57.298481 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
336 14:47:57.300638 TCO_STS: 0000 0004
337 14:47:57.303750 GEN_PMCON: d0015209 00002200
338 14:47:57.307550 GBLRST_CAUSE: 00000000 00000000
339 14:47:57.309551 prev_sleep_state 5
340 14:47:57.313159 Boot Count incremented to 9578
341 14:47:57.315726 CBFS @ 1d00000 size 300000
342 14:47:57.321890 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
343 14:47:57.324752 CBFS: Locating 'fspm.bin'
344 14:47:57.328043 CBFS: Found @ offset 60fc0 size 70000
345 14:47:57.333691 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
346 14:47:57.338563 FMAP: base = fe000000 size = 2000000 #areas = 37
347 14:47:57.344050 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
348 14:47:57.351000 Probing TPM I2C: done! DID_VID 0x00281ae0
349 14:47:57.353649 Locality already claimed
350 14:47:57.357473 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
351 14:47:57.376460 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
352 14:47:57.382618 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
353 14:47:57.386336 MRC cache found, size 18e0
354 14:47:57.388133 bootmode is set to :2
355 14:47:57.481129 CBMEM:
356 14:47:57.484494 IMD: root @ 89fff000 254 entries.
357 14:47:57.487405 IMD: root @ 89ffec00 62 entries.
358 14:47:57.490595 External stage cache:
359 14:47:57.493664 IMD: root @ 8abff000 254 entries.
360 14:47:57.496880 IMD: root @ 8abfec00 62 entries.
361 14:47:57.502685 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
362 14:47:57.506499 creating vboot_handoff structure
363 14:47:57.527555 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
364 14:47:57.542686 tlcl_write: response is 0
365 14:47:57.562135 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
366 14:47:57.565866 MRC: TPM MRC hash updated successfully.
367 14:47:57.567428 1 DIMMs found
368 14:47:57.570284 top_of_ram = 0x8a000000
369 14:47:57.575566 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
370 14:47:57.580082 MTRR Range: Start=ff000000 End=0 (Size 1000000)
371 14:47:57.582540 CBFS @ 1d00000 size 300000
372 14:47:57.589315 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
373 14:47:57.592209 CBFS: Locating 'fallback/postcar'
374 14:47:57.596360 CBFS: Found @ offset 107000 size 41a4
375 14:47:57.602733 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
376 14:47:57.613026 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
377 14:47:57.617568 Processing 126 relocs. Offset value of 0x87cdd000
378 14:47:57.621129
379 14:47:57.621408
380 14:47:57.629790 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
381 14:47:57.631902 CBFS @ 1d00000 size 300000
382 14:47:57.638266 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
383 14:47:57.641931 CBFS: Locating 'fallback/ramstage'
384 14:47:57.646107 CBFS: Found @ offset 458c0 size 1a8a8
385 14:47:57.652908 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
386 14:47:57.681363 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
387 14:47:57.686324 Processing 3754 relocs. Offset value of 0x88e81000
388 14:47:57.692644
389 14:47:57.693263
390 14:47:57.701200 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
391 14:47:57.705839 FMAP: Found \"FLASH\" version 1.1 at 1c10000.
392 14:47:57.711196 FMAP: base = fe000000 size = 2000000 #areas = 37
393 14:47:57.715828 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
394 14:47:57.719790 WARNING: RO_VPD is uninitialized or empty.
395 14:47:57.724812 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
396 14:47:57.729439 WARNING: RW_VPD is uninitialized or empty.
397 14:47:57.730352 Normal boot.
398 14:47:57.737055 BS: BS_PRE_DEVICE times (us): entry 0 run 58 exit 1160
399 14:47:57.739525 CBFS @ 1d00000 size 300000
400 14:47:57.746229 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
401 14:47:57.749665 CBFS: Locating 'cpu_microcode_blob.bin'
402 14:47:57.753965 CBFS: Found @ offset 15c40 size 2fc00
403 14:47:57.758635 microcode: sig=0x806ec pf=0x80 revision=0xb7
404 14:47:57.760543 Skip microcode update
405 14:47:57.762804 CBFS @ 1d00000 size 300000
406 14:47:57.769345 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 14:47:57.771993 CBFS: Locating 'fsps.bin'
408 14:47:57.776700 CBFS: Found @ offset d1fc0 size 35000
409 14:47:57.810503 Detected 4 core, 8 thread CPU.
410 14:47:57.812918 Setting up SMI for CPU
411 14:47:57.816071 IED base = 0x8ac00000
412 14:47:57.817423 IED size = 0x00400000
413 14:47:57.821187 Will perform SMM setup.
414 14:47:57.825357 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
415 14:47:57.833232 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
416 14:47:57.837966 Processing 16 relocs. Offset value of 0x00030000
417 14:47:57.841198 Attempting to start 7 APs
418 14:47:57.844574 Waiting for 10ms after sending INIT.
419 14:47:57.860145 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
420 14:47:57.861381 done.
421 14:47:57.863569 AP: slot 5 apic_id 5.
422 14:47:57.865622 AP: slot 6 apic_id 4.
423 14:47:57.868119 AP: slot 7 apic_id 7.
424 14:47:57.869970 AP: slot 2 apic_id 6.
425 14:47:57.872538 AP: slot 1 apic_id 3.
426 14:47:57.874200 AP: slot 4 apic_id 2.
427 14:47:57.879241 Waiting for 2nd SIPI to complete...done.
428 14:47:57.886686 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 14:47:57.891223 Processing 13 relocs. Offset value of 0x00038000
430 14:47:57.897684 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 14:47:57.901407 Installing SMM handler to 0x8a000000
432 14:47:57.908980 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 14:47:57.915242 Processing 867 relocs. Offset value of 0x8a010000
434 14:47:57.923032 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 14:47:57.928344 Processing 13 relocs. Offset value of 0x8a008000
436 14:47:57.933528 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 14:47:57.939584 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
438 14:47:57.945371 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
439 14:47:57.950959 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
440 14:47:57.956447 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
441 14:47:57.962312 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
442 14:47:57.968284 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
443 14:47:57.974579 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
444 14:47:57.977964 Clearing SMI status registers
445 14:47:57.979734 SMI_STS: PM1
446 14:47:57.981629 PM1_STS: WAK PWRBTN
447 14:47:57.984273 TCO_STS: BOOT SECOND_TO
448 14:47:57.985826 GPE0 STD STS: eSPI
449 14:47:57.988138 New SMBASE 0x8a000000
450 14:47:57.991058 In relocation handler: CPU 0
451 14:47:57.995955 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
452 14:47:57.999954 Writing SMRR. base = 0x8a000006, mask=0xff000800
453 14:47:58.002996 Relocation complete.
454 14:47:58.004489 New SMBASE 0x89fff400
455 14:47:58.007337 In relocation handler: CPU 3
456 14:47:58.012042 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
457 14:47:58.017008 Writing SMRR. base = 0x8a000006, mask=0xff000800
458 14:47:58.018623 Relocation complete.
459 14:47:58.021412 New SMBASE 0x89fffc00
460 14:47:58.024387 In relocation handler: CPU 1
461 14:47:58.028409 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
462 14:47:58.032667 Writing SMRR. base = 0x8a000006, mask=0xff000800
463 14:47:58.035489 Relocation complete.
464 14:47:58.037104 New SMBASE 0x89fff000
465 14:47:58.040472 In relocation handler: CPU 4
466 14:47:58.044276 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
467 14:47:58.049747 Writing SMRR. base = 0x8a000006, mask=0xff000800
468 14:47:58.051635 Relocation complete.
469 14:47:58.053440 New SMBASE 0x89ffe400
470 14:47:58.056437 In relocation handler: CPU 7
471 14:47:58.060601 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
472 14:47:58.066090 Writing SMRR. base = 0x8a000006, mask=0xff000800
473 14:47:58.067339 Relocation complete.
474 14:47:58.070213 New SMBASE 0x89fff800
475 14:47:58.072677 In relocation handler: CPU 2
476 14:47:58.077053 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
477 14:47:58.081556 Writing SMRR. base = 0x8a000006, mask=0xff000800
478 14:47:58.084198 Relocation complete.
479 14:47:58.086613 New SMBASE 0x89ffec00
480 14:47:58.089606 In relocation handler: CPU 5
481 14:47:58.093928 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
482 14:47:58.098059 Writing SMRR. base = 0x8a000006, mask=0xff000800
483 14:47:58.099942 Relocation complete.
484 14:47:58.102303 New SMBASE 0x89ffe800
485 14:47:58.105660 In relocation handler: CPU 6
486 14:47:58.110144 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
487 14:47:58.114821 Writing SMRR. base = 0x8a000006, mask=0xff000800
488 14:47:58.116283 Relocation complete.
489 14:47:58.118870 Initializing CPU #0
490 14:47:58.122190 CPU: vendor Intel device 806ec
491 14:47:58.126395 CPU: family 06, model 8e, stepping 0c
492 14:47:58.128203 Clearing out pending MCEs
493 14:47:58.132565 Setting up local APIC... apic_id: 0x00 done.
494 14:47:58.136146 Turbo is available but hidden
495 14:47:58.138663 Turbo has been enabled
496 14:47:58.140165 VMX status: enabled
497 14:47:58.144368 IA32_FEATURE_CONTROL status: locked
498 14:47:58.146325 Skip microcode update
499 14:47:58.148584 CPU #0 initialized
500 14:47:58.150904 Initializing CPU #3
501 14:47:58.152820 Initializing CPU #6
502 14:47:58.154562 Initializing CPU #5
503 14:47:58.157161 CPU: vendor Intel device 806ec
504 14:47:58.161011 CPU: family 06, model 8e, stepping 0c
505 14:47:58.164296 CPU: vendor Intel device 806ec
506 14:47:58.168263 CPU: family 06, model 8e, stepping 0c
507 14:47:58.170736 Clearing out pending MCEs
508 14:47:58.172792 Initializing CPU #2
509 14:47:58.175385 Initializing CPU #7
510 14:47:58.178292 CPU: vendor Intel device 806ec
511 14:47:58.182300 CPU: family 06, model 8e, stepping 0c
512 14:47:58.185278 CPU: vendor Intel device 806ec
513 14:47:58.188725 CPU: family 06, model 8e, stepping 0c
514 14:47:58.191798 Clearing out pending MCEs
515 14:47:58.193683 Clearing out pending MCEs
516 14:47:58.198325 Setting up local APIC...Initializing CPU #1
517 14:47:58.205223 Setting up local APIC...Setting up local APIC... apic_id: 0x01 done.
518 14:47:58.208243 Clearing out pending MCEs
519 14:47:58.210793 CPU: vendor Intel device 806ec
520 14:47:58.214765 CPU: family 06, model 8e, stepping 0c
521 14:47:58.219979 Setting up local APIC...CPU: vendor Intel device 806ec
522 14:47:58.224744 CPU: family 06, model 8e, stepping 0c
523 14:47:58.226110 Initializing CPU #4
524 14:47:58.229067 Clearing out pending MCEs
525 14:47:58.232073 CPU: vendor Intel device 806ec
526 14:47:58.235757 CPU: family 06, model 8e, stepping 0c
527 14:47:58.240178 Setting up local APIC...VMX status: enabled
528 14:47:58.242086 apic_id: 0x07 done.
529 14:47:58.244149 apic_id: 0x06 done.
530 14:47:58.246182 VMX status: enabled
531 14:47:58.247971 VMX status: enabled
532 14:47:58.251781 IA32_FEATURE_CONTROL status: locked
533 14:47:58.255072 IA32_FEATURE_CONTROL status: locked
534 14:47:58.257664 Skip microcode update
535 14:47:58.260600 Skip microcode update
536 14:47:58.261473 CPU #7 initialized
537 14:47:58.264184 CPU #2 initialized
538 14:47:58.266885 Clearing out pending MCEs
539 14:47:58.269139 apic_id: 0x03 done.
540 14:47:58.274594 Setting up local APIC...IA32_FEATURE_CONTROL status: locked
541 14:47:58.276363 VMX status: enabled
542 14:47:58.278560 apic_id: 0x02 done.
543 14:47:58.282234 IA32_FEATURE_CONTROL status: locked
544 14:47:58.284688 VMX status: enabled
545 14:47:58.286423 Skip microcode update
546 14:47:58.290704 IA32_FEATURE_CONTROL status: locked
547 14:47:58.291997 CPU #1 initialized
548 14:47:58.294430 Skip microcode update
549 14:47:58.296823 Clearing out pending MCEs
550 14:47:58.298928 apic_id: 0x04 done.
551 14:47:58.303796 Setting up local APIC...Skip microcode update
552 14:47:58.305684 apic_id: 0x05 done.
553 14:47:58.307961 VMX status: enabled
554 14:47:58.310140 VMX status: enabled
555 14:47:58.314120 IA32_FEATURE_CONTROL status: locked
556 14:47:58.317395 IA32_FEATURE_CONTROL status: locked
557 14:47:58.319613 Skip microcode update
558 14:47:58.321342 Skip microcode update
559 14:47:58.323458 CPU #6 initialized
560 14:47:58.325968 CPU #5 initialized
561 14:47:58.327113 CPU #4 initialized
562 14:47:58.329105 CPU #3 initialized
563 14:47:58.333196 bsp_do_flight_plan done after 450 msecs.
564 14:47:58.336864 CPU: frequency set to 4800 MHz
565 14:47:58.338052 Enabling SMIs.
566 14:47:58.339513 Locking SMM.
567 14:47:58.342205 CBFS @ 1d00000 size 300000
568 14:47:58.348980 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
569 14:47:58.351271 CBFS: Locating 'vbt.bin'
570 14:47:58.355840 CBFS: Found @ offset 60a40 size 4a0
571 14:47:58.359940 Found a VBT of 4608 bytes after decompression
572 14:47:58.373179 FMAP: area GBB found @ 1c11000 (978944 bytes)
573 14:47:58.434286 Detected 4 core, 8 thread CPU.
574 14:47:58.437538 Detected 4 core, 8 thread CPU.
575 14:47:58.664050 Display FSP Version Info HOB
576 14:47:58.667399 Reference Code - CPU = 7.0.5e.40
577 14:47:58.670367 uCode Version = 0.0.0.b8
578 14:47:58.673441 Display FSP Version Info HOB
579 14:47:58.676643 Reference Code - ME = 7.0.5e.40
580 14:47:58.678827 MEBx version = 0.0.0.0
581 14:47:58.681738 ME Firmware Version = Consumer SKU
582 14:47:58.685486 Display FSP Version Info HOB
583 14:47:58.688375 Reference Code - CNL PCH = 7.0.5e.40
584 14:47:58.691613 PCH-CRID Status = Disabled
585 14:47:58.695105 CNL PCH H A0 Hsio Version = 2.0.0.0
586 14:47:58.698616 CNL PCH H Ax Hsio Version = 9.0.0.0
587 14:47:58.702145 CNL PCH H Bx Hsio Version = a.0.0.0
588 14:47:58.706326 CNL PCH LP B0 Hsio Version = 7.0.0.0
589 14:47:58.709144 CNL PCH LP Bx Hsio Version = 6.0.0.0
590 14:47:58.713038 CNL PCH LP Dx Hsio Version = 7.0.0.0
591 14:47:58.716333 Display FSP Version Info HOB
592 14:47:58.720595 Reference Code - SA - System Agent = 7.0.5e.40
593 14:47:58.724182 Reference Code - MRC = 0.7.1.68
594 14:47:58.726647 SA - PCIe Version = 7.0.5e.40
595 14:47:58.729792 SA-CRID Status = Disabled
596 14:47:58.733236 SA-CRID Original Value = 0.0.0.c
597 14:47:58.735754 SA-CRID New Value = 0.0.0.c
598 14:47:58.754784 RTC Init
599 14:47:58.757818 Set power off after power failure.
600 14:47:58.760064 Disabling Deep S3
601 14:47:58.761805 Disabling Deep S3
602 14:47:58.763808 Disabling Deep S4
603 14:47:58.765824 Disabling Deep S4
604 14:47:58.767456 Disabling Deep S5
605 14:47:58.768772 Disabling Deep S5
606 14:47:58.775711 BS: BS_DEV_INIT_CHIPS times (us): entry 602536 run 413381 exit 16246
607 14:47:58.778626 Enumerating buses...
608 14:47:58.782685 Show all devs... Before device enumeration.
609 14:47:58.784964 Root Device: enabled 1
610 14:47:58.787680 CPU_CLUSTER: 0: enabled 1
611 14:47:58.789765 DOMAIN: 0000: enabled 1
612 14:47:58.791903 APIC: 00: enabled 1
613 14:47:58.794498 PCI: 00:00.0: enabled 1
614 14:47:58.797015 PCI: 00:02.0: enabled 1
615 14:47:58.799066 PCI: 00:04.0: enabled 1
616 14:47:58.801418 PCI: 00:12.0: enabled 1
617 14:47:58.804124 PCI: 00:12.5: enabled 0
618 14:47:58.806868 PCI: 00:12.6: enabled 0
619 14:47:58.808825 PCI: 00:13.0: enabled 0
620 14:47:58.811801 PCI: 00:14.0: enabled 1
621 14:47:58.813523 PCI: 00:14.1: enabled 0
622 14:47:58.815880 PCI: 00:14.3: enabled 1
623 14:47:58.818867 PCI: 00:14.5: enabled 0
624 14:47:58.820899 PCI: 00:15.0: enabled 1
625 14:47:58.823065 PCI: 00:15.1: enabled 1
626 14:47:58.826096 PCI: 00:15.2: enabled 0
627 14:47:58.828663 PCI: 00:15.3: enabled 0
628 14:47:58.830591 PCI: 00:16.0: enabled 1
629 14:47:58.833813 PCI: 00:16.1: enabled 0
630 14:47:58.836077 PCI: 00:16.2: enabled 0
631 14:47:58.838263 PCI: 00:16.3: enabled 0
632 14:47:58.840339 PCI: 00:16.4: enabled 0
633 14:47:58.843060 PCI: 00:16.5: enabled 0
634 14:47:58.845562 PCI: 00:17.0: enabled 1
635 14:47:58.848121 PCI: 00:19.0: enabled 1
636 14:47:58.850299 PCI: 00:19.1: enabled 0
637 14:47:58.852833 PCI: 00:19.2: enabled 1
638 14:47:58.855422 PCI: 00:1a.0: enabled 0
639 14:47:58.857509 PCI: 00:1c.0: enabled 1
640 14:47:58.860156 PCI: 00:1c.1: enabled 0
641 14:47:58.862450 PCI: 00:1c.2: enabled 0
642 14:47:58.864802 PCI: 00:1c.3: enabled 0
643 14:47:58.867588 PCI: 00:1c.4: enabled 0
644 14:47:58.869836 PCI: 00:1c.5: enabled 0
645 14:47:58.872287 PCI: 00:1c.6: enabled 0
646 14:47:58.874934 PCI: 00:1c.7: enabled 1
647 14:47:58.876644 PCI: 00:1d.0: enabled 1
648 14:47:58.879763 PCI: 00:1d.1: enabled 1
649 14:47:58.882073 PCI: 00:1d.2: enabled 0
650 14:47:58.884258 PCI: 00:1d.3: enabled 0
651 14:47:58.886509 PCI: 00:1d.4: enabled 1
652 14:47:58.889270 PCI: 00:1e.0: enabled 0
653 14:47:58.891773 PCI: 00:1e.1: enabled 0
654 14:47:58.894117 PCI: 00:1e.2: enabled 0
655 14:47:58.896971 PCI: 00:1e.3: enabled 0
656 14:47:58.898960 PCI: 00:1f.0: enabled 1
657 14:47:58.901384 PCI: 00:1f.1: enabled 1
658 14:47:58.904146 PCI: 00:1f.2: enabled 1
659 14:47:58.905982 PCI: 00:1f.3: enabled 1
660 14:47:58.909126 PCI: 00:1f.4: enabled 1
661 14:47:58.911534 PCI: 00:1f.5: enabled 1
662 14:47:58.913586 PCI: 00:1f.6: enabled 1
663 14:47:58.916191 USB0 port 0: enabled 1
664 14:47:58.918313 I2C: 00:10: enabled 1
665 14:47:58.920190 I2C: 00:10: enabled 1
666 14:47:58.922296 I2C: 00:34: enabled 1
667 14:47:58.924639 I2C: 00:2c: enabled 1
668 14:47:58.927517 I2C: 00:50: enabled 1
669 14:47:58.929250 PNP: 0c09.0: enabled 1
670 14:47:58.931862 USB2 port 0: enabled 1
671 14:47:58.934327 USB2 port 1: enabled 1
672 14:47:58.936805 USB2 port 2: enabled 1
673 14:47:58.939082 USB2 port 4: enabled 1
674 14:47:58.940593 USB2 port 5: enabled 1
675 14:47:58.943633 USB2 port 6: enabled 1
676 14:47:58.945702 USB2 port 7: enabled 1
677 14:47:58.948204 USB2 port 8: enabled 1
678 14:47:58.950806 USB2 port 9: enabled 1
679 14:47:58.952795 USB3 port 0: enabled 1
680 14:47:58.955149 USB3 port 1: enabled 1
681 14:47:58.957302 USB3 port 2: enabled 1
682 14:47:58.959785 USB3 port 3: enabled 1
683 14:47:58.962338 USB3 port 4: enabled 1
684 14:47:58.963701 APIC: 03: enabled 1
685 14:47:58.965980 APIC: 06: enabled 1
686 14:47:58.968485 APIC: 01: enabled 1
687 14:47:58.970604 APIC: 02: enabled 1
688 14:47:58.972544 APIC: 05: enabled 1
689 14:47:58.974705 APIC: 04: enabled 1
690 14:47:58.975980 APIC: 07: enabled 1
691 14:47:58.978723 Compare with tree...
692 14:47:58.981042 Root Device: enabled 1
693 14:47:58.983804 CPU_CLUSTER: 0: enabled 1
694 14:47:58.985753 APIC: 00: enabled 1
695 14:47:58.987975 APIC: 03: enabled 1
696 14:47:58.990286 APIC: 06: enabled 1
697 14:47:58.992443 APIC: 01: enabled 1
698 14:47:58.994834 APIC: 02: enabled 1
699 14:47:58.997076 APIC: 05: enabled 1
700 14:47:58.998953 APIC: 04: enabled 1
701 14:47:59.000984 APIC: 07: enabled 1
702 14:47:59.003546 DOMAIN: 0000: enabled 1
703 14:47:59.006947 PCI: 00:00.0: enabled 1
704 14:47:59.009402 PCI: 00:02.0: enabled 1
705 14:47:59.011817 PCI: 00:04.0: enabled 1
706 14:47:59.013981 PCI: 00:12.0: enabled 1
707 14:47:59.017355 PCI: 00:12.5: enabled 0
708 14:47:59.020187 PCI: 00:12.6: enabled 0
709 14:47:59.022434 PCI: 00:13.0: enabled 0
710 14:47:59.024869 PCI: 00:14.0: enabled 1
711 14:47:59.027631 USB0 port 0: enabled 1
712 14:47:59.030275 USB2 port 0: enabled 1
713 14:47:59.033156 USB2 port 1: enabled 1
714 14:47:59.035586 USB2 port 2: enabled 1
715 14:47:59.038125 USB2 port 4: enabled 1
716 14:47:59.041535 USB2 port 5: enabled 1
717 14:47:59.044086 USB2 port 6: enabled 1
718 14:47:59.046546 USB2 port 7: enabled 1
719 14:47:59.049765 USB2 port 8: enabled 1
720 14:47:59.051915 USB2 port 9: enabled 1
721 14:47:59.054371 USB3 port 0: enabled 1
722 14:47:59.057590 USB3 port 1: enabled 1
723 14:47:59.060059 USB3 port 2: enabled 1
724 14:47:59.063573 USB3 port 3: enabled 1
725 14:47:59.066272 USB3 port 4: enabled 1
726 14:47:59.068566 PCI: 00:14.1: enabled 0
727 14:47:59.070737 PCI: 00:14.3: enabled 1
728 14:47:59.073925 PCI: 00:14.5: enabled 0
729 14:47:59.076211 PCI: 00:15.0: enabled 1
730 14:47:59.078906 I2C: 00:10: enabled 1
731 14:47:59.081428 I2C: 00:10: enabled 1
732 14:47:59.083679 I2C: 00:34: enabled 1
733 14:47:59.085969 PCI: 00:15.1: enabled 1
734 14:47:59.089282 I2C: 00:2c: enabled 1
735 14:47:59.091342 PCI: 00:15.2: enabled 0
736 14:47:59.094253 PCI: 00:15.3: enabled 0
737 14:47:59.097185 PCI: 00:16.0: enabled 1
738 14:47:59.099823 PCI: 00:16.1: enabled 0
739 14:47:59.102297 PCI: 00:16.2: enabled 0
740 14:47:59.104430 PCI: 00:16.3: enabled 0
741 14:47:59.107077 PCI: 00:16.4: enabled 0
742 14:47:59.110206 PCI: 00:16.5: enabled 0
743 14:47:59.112981 PCI: 00:17.0: enabled 1
744 14:47:59.115233 PCI: 00:19.0: enabled 1
745 14:47:59.117481 I2C: 00:50: enabled 1
746 14:47:59.120150 PCI: 00:19.1: enabled 0
747 14:47:59.123362 PCI: 00:19.2: enabled 1
748 14:47:59.125802 PCI: 00:1a.0: enabled 0
749 14:47:59.128132 PCI: 00:1c.0: enabled 1
750 14:47:59.131079 PCI: 00:1c.1: enabled 0
751 14:47:59.133385 PCI: 00:1c.2: enabled 0
752 14:47:59.136206 PCI: 00:1c.3: enabled 0
753 14:47:59.138739 PCI: 00:1c.4: enabled 0
754 14:47:59.141149 PCI: 00:1c.5: enabled 0
755 14:47:59.143489 PCI: 00:1c.6: enabled 0
756 14:47:59.146822 PCI: 00:1c.7: enabled 1
757 14:47:59.149438 PCI: 00:1d.0: enabled 1
758 14:47:59.151957 PCI: 00:1d.1: enabled 1
759 14:47:59.154364 PCI: 00:1d.2: enabled 0
760 14:47:59.156755 PCI: 00:1d.3: enabled 0
761 14:47:59.159963 PCI: 00:1d.4: enabled 1
762 14:47:59.162265 PCI: 00:1e.0: enabled 0
763 14:47:59.165660 PCI: 00:1e.1: enabled 0
764 14:47:59.167293 PCI: 00:1e.2: enabled 0
765 14:47:59.170287 PCI: 00:1e.3: enabled 0
766 14:47:59.173006 PCI: 00:1f.0: enabled 1
767 14:47:59.176021 PNP: 0c09.0: enabled 1
768 14:47:59.177949 PCI: 00:1f.1: enabled 1
769 14:47:59.180476 PCI: 00:1f.2: enabled 1
770 14:47:59.182962 PCI: 00:1f.3: enabled 1
771 14:47:59.185938 PCI: 00:1f.4: enabled 1
772 14:47:59.188552 PCI: 00:1f.5: enabled 1
773 14:47:59.190944 PCI: 00:1f.6: enabled 1
774 14:47:59.193584 Root Device scanning...
775 14:47:59.197430 root_dev_scan_bus for Root Device
776 14:47:59.199942 CPU_CLUSTER: 0 enabled
777 14:47:59.201577 DOMAIN: 0000 enabled
778 14:47:59.204427 DOMAIN: 0000 scanning...
779 14:47:59.207174 PCI: pci_scan_bus for bus 00
780 14:47:59.210168 PCI: 00:00.0 [8086/0000] ops
781 14:47:59.213643 PCI: 00:00.0 [8086/3e34] enabled
782 14:47:59.216723 PCI: 00:02.0 [8086/0000] ops
783 14:47:59.220111 PCI: 00:02.0 [8086/3ea0] enabled
784 14:47:59.223119 PCI: 00:04.0 [8086/1903] enabled
785 14:47:59.226471 PCI: 00:08.0 [8086/1911] enabled
786 14:47:59.229888 PCI: 00:12.0 [8086/9df9] enabled
787 14:47:59.233563 PCI: 00:14.0 [8086/0000] bus ops
788 14:47:59.237163 PCI: 00:14.0 [8086/9ded] enabled
789 14:47:59.239878 PCI: 00:14.2 [8086/9def] enabled
790 14:47:59.243439 PCI: 00:14.3 [8086/9df0] enabled
791 14:47:59.246600 PCI: 00:15.0 [8086/0000] bus ops
792 14:47:59.250712 PCI: 00:15.0 [8086/9de8] enabled
793 14:47:59.253449 PCI: 00:15.1 [8086/0000] bus ops
794 14:47:59.256810 PCI: 00:15.1 [8086/9de9] enabled
795 14:47:59.259304 PCI: 00:16.0 [8086/0000] ops
796 14:47:59.263284 PCI: 00:16.0 [8086/9de0] enabled
797 14:47:59.266091 PCI: 00:17.0 [8086/0000] ops
798 14:47:59.269239 PCI: 00:17.0 [8086/9dd3] enabled
799 14:47:59.273195 PCI: 00:19.0 [8086/0000] bus ops
800 14:47:59.276047 PCI: 00:19.0 [8086/9dc5] enabled
801 14:47:59.278923 PCI: 00:19.2 [8086/0000] ops
802 14:47:59.282533 PCI: 00:19.2 [8086/9dc7] enabled
803 14:47:59.285124 PCI: 00:1c.0 [8086/0000] bus ops
804 14:47:59.288942 PCI: 00:1c.0 [8086/9dbf] enabled
805 14:47:59.294865 PCI: Static device PCI: 00:1c.7 not found, disabling it.
806 14:47:59.298096 PCI: 00:1d.0 [8086/0000] bus ops
807 14:47:59.300929 PCI: 00:1d.0 [8086/9db4] enabled
808 14:47:59.306341 PCI: Static device PCI: 00:1d.1 not found, disabling it.
809 14:47:59.311908 PCI: Static device PCI: 00:1d.4 not found, disabling it.
810 14:47:59.315999 PCI: 00:1f.0 [8086/0000] bus ops
811 14:47:59.319133 PCI: 00:1f.0 [8086/9d84] enabled
812 14:47:59.325351 PCI: Static device PCI: 00:1f.1 not found, disabling it.
813 14:47:59.330608 PCI: Static device PCI: 00:1f.2 not found, disabling it.
814 14:47:59.333781 PCI: 00:1f.3 [8086/0000] bus ops
815 14:47:59.336783 PCI: 00:1f.3 [8086/9dc8] enabled
816 14:47:59.340163 PCI: 00:1f.4 [8086/0000] bus ops
817 14:47:59.344032 PCI: 00:1f.4 [8086/9da3] enabled
818 14:47:59.346737 PCI: 00:1f.5 [8086/0000] bus ops
819 14:47:59.349795 PCI: 00:1f.5 [8086/9da4] enabled
820 14:47:59.353579 PCI: 00:1f.6 [8086/15be] enabled
821 14:47:59.356209 PCI: Leftover static devices:
822 14:47:59.358098 PCI: 00:12.5
823 14:47:59.359159 PCI: 00:12.6
824 14:47:59.360912 PCI: 00:13.0
825 14:47:59.361777 PCI: 00:14.1
826 14:47:59.363293 PCI: 00:14.5
827 14:47:59.364723 PCI: 00:15.2
828 14:47:59.366246 PCI: 00:15.3
829 14:47:59.367000 PCI: 00:16.1
830 14:47:59.369340 PCI: 00:16.2
831 14:47:59.370226 PCI: 00:16.3
832 14:47:59.371819 PCI: 00:16.4
833 14:47:59.372663 PCI: 00:16.5
834 14:47:59.374620 PCI: 00:19.1
835 14:47:59.375260 PCI: 00:1a.0
836 14:47:59.377312 PCI: 00:1c.1
837 14:47:59.378466 PCI: 00:1c.2
838 14:47:59.379657 PCI: 00:1c.3
839 14:47:59.380797 PCI: 00:1c.4
840 14:47:59.382871 PCI: 00:1c.5
841 14:47:59.383854 PCI: 00:1c.6
842 14:47:59.384785 PCI: 00:1c.7
843 14:47:59.386366 PCI: 00:1d.1
844 14:47:59.387813 PCI: 00:1d.2
845 14:47:59.389288 PCI: 00:1d.3
846 14:47:59.390438 PCI: 00:1d.4
847 14:47:59.392573 PCI: 00:1e.0
848 14:47:59.393227 PCI: 00:1e.1
849 14:47:59.394579 PCI: 00:1e.2
850 14:47:59.396664 PCI: 00:1e.3
851 14:47:59.397484 PCI: 00:1f.1
852 14:47:59.398837 PCI: 00:1f.2
853 14:47:59.401906 PCI: Check your devicetree.cb.
854 14:47:59.404260 PCI: 00:14.0 scanning...
855 14:47:59.407334 scan_usb_bus for PCI: 00:14.0
856 14:47:59.409750 USB0 port 0 enabled
857 14:47:59.412001 USB0 port 0 scanning...
858 14:47:59.415720 scan_usb_bus for USB0 port 0
859 14:47:59.417119 USB2 port 0 enabled
860 14:47:59.419715 USB2 port 1 enabled
861 14:47:59.421738 USB2 port 2 enabled
862 14:47:59.424181 USB2 port 4 enabled
863 14:47:59.426163 USB2 port 5 enabled
864 14:47:59.427366 USB2 port 6 enabled
865 14:47:59.429633 USB2 port 7 enabled
866 14:47:59.431751 USB2 port 8 enabled
867 14:47:59.433688 USB2 port 9 enabled
868 14:47:59.435612 USB3 port 0 enabled
869 14:47:59.437830 USB3 port 1 enabled
870 14:47:59.440130 USB3 port 2 enabled
871 14:47:59.442381 USB3 port 3 enabled
872 14:47:59.443945 USB3 port 4 enabled
873 14:47:59.446884 USB2 port 0 scanning...
874 14:47:59.449927 scan_usb_bus for USB2 port 0
875 14:47:59.453531 scan_usb_bus for USB2 port 0 done
876 14:47:59.458349 scan_bus: scanning of bus USB2 port 0 took 9061 usecs
877 14:47:59.461177 USB2 port 1 scanning...
878 14:47:59.464145 scan_usb_bus for USB2 port 1
879 14:47:59.468379 scan_usb_bus for USB2 port 1 done
880 14:47:59.472949 scan_bus: scanning of bus USB2 port 1 took 9062 usecs
881 14:47:59.475543 USB2 port 2 scanning...
882 14:47:59.478624 scan_usb_bus for USB2 port 2
883 14:47:59.482352 scan_usb_bus for USB2 port 2 done
884 14:47:59.487674 scan_bus: scanning of bus USB2 port 2 took 9061 usecs
885 14:47:59.490023 USB2 port 4 scanning...
886 14:47:59.493553 scan_usb_bus for USB2 port 4
887 14:47:59.496363 scan_usb_bus for USB2 port 4 done
888 14:47:59.501939 scan_bus: scanning of bus USB2 port 4 took 9059 usecs
889 14:47:59.504338 USB2 port 5 scanning...
890 14:47:59.507317 scan_usb_bus for USB2 port 5
891 14:47:59.511259 scan_usb_bus for USB2 port 5 done
892 14:47:59.516952 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
893 14:47:59.518773 USB2 port 6 scanning...
894 14:47:59.522052 scan_usb_bus for USB2 port 6
895 14:47:59.525119 scan_usb_bus for USB2 port 6 done
896 14:47:59.530390 scan_bus: scanning of bus USB2 port 6 took 9062 usecs
897 14:47:59.533149 USB2 port 7 scanning...
898 14:47:59.536065 scan_usb_bus for USB2 port 7
899 14:47:59.540440 scan_usb_bus for USB2 port 7 done
900 14:47:59.544689 scan_bus: scanning of bus USB2 port 7 took 9058 usecs
901 14:47:59.547636 USB2 port 8 scanning...
902 14:47:59.550531 scan_usb_bus for USB2 port 8
903 14:47:59.554661 scan_usb_bus for USB2 port 8 done
904 14:47:59.559682 scan_bus: scanning of bus USB2 port 8 took 9062 usecs
905 14:47:59.561708 USB2 port 9 scanning...
906 14:47:59.565046 scan_usb_bus for USB2 port 9
907 14:47:59.568568 scan_usb_bus for USB2 port 9 done
908 14:47:59.573905 scan_bus: scanning of bus USB2 port 9 took 9060 usecs
909 14:47:59.576440 USB3 port 0 scanning...
910 14:47:59.579360 scan_usb_bus for USB3 port 0
911 14:47:59.582819 scan_usb_bus for USB3 port 0 done
912 14:47:59.588085 scan_bus: scanning of bus USB3 port 0 took 9059 usecs
913 14:47:59.590480 USB3 port 1 scanning...
914 14:47:59.593555 scan_usb_bus for USB3 port 1
915 14:47:59.597104 scan_usb_bus for USB3 port 1 done
916 14:47:59.602791 scan_bus: scanning of bus USB3 port 1 took 9062 usecs
917 14:47:59.604904 USB3 port 2 scanning...
918 14:47:59.608634 scan_usb_bus for USB3 port 2
919 14:47:59.611363 scan_usb_bus for USB3 port 2 done
920 14:47:59.617023 scan_bus: scanning of bus USB3 port 2 took 9062 usecs
921 14:47:59.619145 USB3 port 3 scanning...
922 14:47:59.622802 scan_usb_bus for USB3 port 3
923 14:47:59.626282 scan_usb_bus for USB3 port 3 done
924 14:47:59.631332 scan_bus: scanning of bus USB3 port 3 took 9059 usecs
925 14:47:59.634397 USB3 port 4 scanning...
926 14:47:59.636501 scan_usb_bus for USB3 port 4
927 14:47:59.640431 scan_usb_bus for USB3 port 4 done
928 14:47:59.645784 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
929 14:47:59.649198 scan_usb_bus for USB0 port 0 done
930 14:47:59.654409 scan_bus: scanning of bus USB0 port 0 took 239301 usecs
931 14:47:59.658612 scan_usb_bus for PCI: 00:14.0 done
932 14:47:59.663624 scan_bus: scanning of bus PCI: 00:14.0 took 256236 usecs
933 14:47:59.666545 PCI: 00:15.0 scanning...
934 14:47:59.670124 scan_generic_bus for PCI: 00:15.0
935 14:47:59.673928 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
936 14:47:59.678272 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
937 14:47:59.682080 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
938 14:47:59.686395 scan_generic_bus for PCI: 00:15.0 done
939 14:47:59.691714 scan_bus: scanning of bus PCI: 00:15.0 took 22412 usecs
940 14:47:59.694083 PCI: 00:15.1 scanning...
941 14:47:59.698073 scan_generic_bus for PCI: 00:15.1
942 14:47:59.702037 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
943 14:47:59.706204 scan_generic_bus for PCI: 00:15.1 done
944 14:47:59.711955 scan_bus: scanning of bus PCI: 00:15.1 took 14213 usecs
945 14:47:59.714046 PCI: 00:19.0 scanning...
946 14:47:59.717981 scan_generic_bus for PCI: 00:19.0
947 14:47:59.721896 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
948 14:47:59.725955 scan_generic_bus for PCI: 00:19.0 done
949 14:47:59.731560 scan_bus: scanning of bus PCI: 00:19.0 took 14210 usecs
950 14:47:59.734145 PCI: 00:1c.0 scanning...
951 14:47:59.737731 do_pci_scan_bridge for PCI: 00:1c.0
952 14:47:59.741066 PCI: pci_scan_bus for bus 01
953 14:47:59.743731 PCI: 01:00.0 [10ec/525a] enabled
954 14:47:59.747256 Capability: type 0x01 @ 0x80
955 14:47:59.750477 Capability: type 0x05 @ 0x90
956 14:47:59.753190 Capability: type 0x10 @ 0xb0
957 14:47:59.756097 Capability: type 0x10 @ 0x40
958 14:47:59.759899 Enabling Common Clock Configuration
959 14:47:59.764099 L1 Sub-State supported from root port 28
960 14:47:59.765994 L1 Sub-State Support = 0xf
961 14:47:59.769524 CommonModeRestoreTime = 0x3c
962 14:47:59.773601 Power On Value = 0x6, Power On Scale = 0x1
963 14:47:59.776195 ASPM: Enabled L0s and L1
964 14:47:59.778984 Capability: type 0x01 @ 0x80
965 14:47:59.782188 Capability: type 0x05 @ 0x90
966 14:47:59.785173 Capability: type 0x10 @ 0xb0
967 14:47:59.790625 scan_bus: scanning of bus PCI: 00:1c.0 took 53672 usecs
968 14:47:59.793113 PCI: 00:1d.0 scanning...
969 14:47:59.797005 do_pci_scan_bridge for PCI: 00:1d.0
970 14:47:59.800293 PCI: pci_scan_bus for bus 02
971 14:47:59.803378 PCI: 02:00.0 [1217/8620] enabled
972 14:47:59.806161 Capability: type 0x01 @ 0x6c
973 14:47:59.809679 Capability: type 0x05 @ 0x48
974 14:47:59.812487 Capability: type 0x10 @ 0x80
975 14:47:59.815526 Capability: type 0x10 @ 0x40
976 14:47:59.819440 L1 Sub-State supported from root port 29
977 14:47:59.822369 L1 Sub-State Support = 0xf
978 14:47:59.825409 CommonModeRestoreTime = 0x78
979 14:47:59.829874 Power On Value = 0x16, Power On Scale = 0x0
980 14:47:59.830858 ASPM: Enabled L1
981 14:47:59.835664 Capability: type 0x01 @ 0x6c
982 14:47:59.840107 Capability: type 0x05 @ 0x48
983 14:47:59.845438 Capability: type 0x10 @ 0x80
984 14:47:59.852357 scan_bus: scanning of bus PCI: 00:1d.0 took 56046 usecs
985 14:47:59.854498 PCI: 00:1f.0 scanning...
986 14:47:59.858156 scan_lpc_bus for PCI: 00:1f.0
987 14:47:59.860097 PNP: 0c09.0 enabled
988 14:47:59.863767 scan_lpc_bus for PCI: 00:1f.0 done
989 14:47:59.869158 scan_bus: scanning of bus PCI: 00:1f.0 took 11400 usecs
990 14:47:59.871397 PCI: 00:1f.3 scanning...
991 14:47:59.877130 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
992 14:47:59.880032 PCI: 00:1f.4 scanning...
993 14:47:59.883845 scan_generic_bus for PCI: 00:1f.4
994 14:47:59.887627 scan_generic_bus for PCI: 00:1f.4 done
995 14:47:59.893059 scan_bus: scanning of bus PCI: 00:1f.4 took 10133 usecs
996 14:47:59.895381 PCI: 00:1f.5 scanning...
997 14:47:59.899532 scan_generic_bus for PCI: 00:1f.5
998 14:47:59.903462 scan_generic_bus for PCI: 00:1f.5 done
999 14:47:59.908321 scan_bus: scanning of bus PCI: 00:1f.5 took 10135 usecs
1000 14:47:59.914738 scan_bus: scanning of bus DOMAIN: 0000 took 706841 usecs
1001 14:47:59.918418 root_dev_scan_bus for Root Device done
1002 14:47:59.924477 scan_bus: scanning of bus Root Device took 726983 usecs
1003 14:47:59.924581 done
1004 14:47:59.930628 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1005 14:47:59.937075 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1006 14:47:59.944980 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1007 14:47:59.951131 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1008 14:47:59.954589 SPI flash protection: WPSW=1 SRP0=1
1009 14:47:59.962370 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1010 14:47:59.967843 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1011 14:47:59.973898 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148714 exit 42628
1012 14:47:59.976037 found VGA at PCI: 00:02.0
1013 14:47:59.979185 Setting up VGA for PCI: 00:02.0
1014 14:47:59.984416 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1015 14:47:59.989410 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1016 14:47:59.992226 Allocating resources...
1017 14:47:59.994307 Reading resources...
1018 14:47:59.998526 Root Device read_resources bus 0 link: 0
1019 14:48:00.002668 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1020 14:48:00.008185 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1021 14:48:00.012667 DOMAIN: 0000 read_resources bus 0 link: 0
1022 14:48:00.019112 PCI: 00:14.0 read_resources bus 0 link: 0
1023 14:48:00.022821 USB0 port 0 read_resources bus 0 link: 0
1024 14:48:00.032182 USB0 port 0 read_resources bus 0 link: 0 done
1025 14:48:00.037445 PCI: 00:14.0 read_resources bus 0 link: 0 done
1026 14:48:00.042794 PCI: 00:15.0 read_resources bus 1 link: 0
1027 14:48:00.048788 PCI: 00:15.0 read_resources bus 1 link: 0 done
1028 14:48:00.053410 PCI: 00:15.1 read_resources bus 2 link: 0
1029 14:48:00.058337 PCI: 00:15.1 read_resources bus 2 link: 0 done
1030 14:48:00.063591 PCI: 00:19.0 read_resources bus 3 link: 0
1031 14:48:00.069035 PCI: 00:19.0 read_resources bus 3 link: 0 done
1032 14:48:00.074671 PCI: 00:1c.0 read_resources bus 1 link: 0
1033 14:48:00.079232 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1034 14:48:00.083749 PCI: 00:1d.0 read_resources bus 2 link: 0
1035 14:48:00.090888 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1036 14:48:00.095220 PCI: 00:1f.0 read_resources bus 0 link: 0
1037 14:48:00.100890 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1038 14:48:00.107230 DOMAIN: 0000 read_resources bus 0 link: 0 done
1039 14:48:00.112719 Root Device read_resources bus 0 link: 0 done
1040 14:48:00.114286 Done reading resources.
1041 14:48:00.120213 Show resources in subtree (Root Device)...After reading.
1042 14:48:00.124859 Root Device child on link 0 CPU_CLUSTER: 0
1043 14:48:00.128927 CPU_CLUSTER: 0 child on link 0 APIC: 00
1044 14:48:00.129618 APIC: 00
1045 14:48:00.131753 APIC: 03
1046 14:48:00.132711 APIC: 06
1047 14:48:00.134170 APIC: 01
1048 14:48:00.135415 APIC: 02
1049 14:48:00.136481 APIC: 05
1050 14:48:00.137791 APIC: 04
1051 14:48:00.138999 APIC: 07
1052 14:48:00.142952 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1053 14:48:00.152736 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1054 14:48:00.161831 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1055 14:48:00.163490 PCI: 00:00.0
1056 14:48:00.173731 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1057 14:48:00.182569 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1058 14:48:00.192293 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1059 14:48:00.202358 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1060 14:48:00.210704 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1061 14:48:00.220503 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1062 14:48:00.229678 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1063 14:48:00.238105 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1064 14:48:00.247648 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1065 14:48:00.256947 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1066 14:48:00.266968 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1067 14:48:00.276855 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1068 14:48:00.285646 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1069 14:48:00.295749 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1070 14:48:00.296863 PCI: 00:02.0
1071 14:48:00.307097 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1072 14:48:00.317581 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1073 14:48:00.326141 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1074 14:48:00.327611 PCI: 00:04.0
1075 14:48:00.337615 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1076 14:48:00.339105 PCI: 00:08.0
1077 14:48:00.349313 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1078 14:48:00.350754 PCI: 00:12.0
1079 14:48:00.360673 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1080 14:48:00.365241 PCI: 00:14.0 child on link 0 USB0 port 0
1081 14:48:00.375039 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1082 14:48:00.379693 USB0 port 0 child on link 0 USB2 port 0
1083 14:48:00.381499 USB2 port 0
1084 14:48:00.383440 USB2 port 1
1085 14:48:00.384578 USB2 port 2
1086 14:48:00.386521 USB2 port 4
1087 14:48:00.388360 USB2 port 5
1088 14:48:00.389514 USB2 port 6
1089 14:48:00.392145 USB2 port 7
1090 14:48:00.393794 USB2 port 8
1091 14:48:00.394884 USB2 port 9
1092 14:48:00.396581 USB3 port 0
1093 14:48:00.398675 USB3 port 1
1094 14:48:00.400923 USB3 port 2
1095 14:48:00.401812 USB3 port 3
1096 14:48:00.404036 USB3 port 4
1097 14:48:00.405853 PCI: 00:14.2
1098 14:48:00.415730 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1099 14:48:00.425123 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1100 14:48:00.427080 PCI: 00:14.3
1101 14:48:00.437170 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1102 14:48:00.441784 PCI: 00:15.0 child on link 0 I2C: 01:10
1103 14:48:00.450788 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1104 14:48:00.452162 I2C: 01:10
1105 14:48:00.454190 I2C: 01:10
1106 14:48:00.455637 I2C: 01:34
1107 14:48:00.460517 PCI: 00:15.1 child on link 0 I2C: 02:2c
1108 14:48:00.469754 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1109 14:48:00.471700 I2C: 02:2c
1110 14:48:00.473211 PCI: 00:16.0
1111 14:48:00.483484 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1112 14:48:00.484438 PCI: 00:17.0
1113 14:48:00.493844 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1114 14:48:00.503565 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1115 14:48:00.511356 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1116 14:48:00.519347 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1117 14:48:00.528121 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1118 14:48:00.536628 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1119 14:48:00.541277 PCI: 00:19.0 child on link 0 I2C: 03:50
1120 14:48:00.551283 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1121 14:48:00.561054 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1122 14:48:00.563258 I2C: 03:50
1123 14:48:00.564128 PCI: 00:19.2
1124 14:48:00.575164 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1125 14:48:00.584911 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1126 14:48:00.590064 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1127 14:48:00.597873 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1128 14:48:00.608059 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1129 14:48:00.616887 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1130 14:48:00.619221 PCI: 01:00.0
1131 14:48:00.628132 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1132 14:48:00.632939 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1133 14:48:00.641534 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1134 14:48:00.650839 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1135 14:48:00.659927 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1136 14:48:00.661584 PCI: 02:00.0
1137 14:48:00.671299 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1138 14:48:00.679925 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1139 14:48:00.684079 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1140 14:48:00.693187 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1141 14:48:00.701825 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1142 14:48:00.704272 PNP: 0c09.0
1143 14:48:00.712415 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1144 14:48:00.720562 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1145 14:48:00.730007 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1146 14:48:00.731206 PCI: 00:1f.3
1147 14:48:00.741403 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1148 14:48:00.751605 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1149 14:48:00.753248 PCI: 00:1f.4
1150 14:48:00.761487 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1151 14:48:00.772052 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1152 14:48:00.773037 PCI: 00:1f.5
1153 14:48:00.783092 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1154 14:48:00.784514 PCI: 00:1f.6
1155 14:48:00.793911 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1156 14:48:00.799633 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1157 14:48:00.805820 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1158 14:48:00.813113 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1159 14:48:00.819480 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1160 14:48:00.826472 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1161 14:48:00.830020 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1162 14:48:00.833356 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1163 14:48:00.837060 PCI: 00:17.0 18 * [0x60 - 0x67] io
1164 14:48:00.840632 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1165 14:48:00.847531 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1166 14:48:00.853886 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1167 14:48:00.861865 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1168 14:48:00.870259 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1169 14:48:00.877196 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1170 14:48:00.880728 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1171 14:48:00.888553 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1172 14:48:00.896851 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1173 14:48:00.905254 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1174 14:48:00.911711 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1175 14:48:00.915560 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1176 14:48:00.920034 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1177 14:48:00.928397 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1178 14:48:00.932086 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1179 14:48:00.937286 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1180 14:48:00.941914 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1181 14:48:00.947554 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1182 14:48:00.951450 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1183 14:48:00.957252 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1184 14:48:00.961149 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1185 14:48:00.966836 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1186 14:48:00.971035 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1187 14:48:00.976369 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1188 14:48:00.981160 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1189 14:48:00.985714 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1190 14:48:00.990579 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1191 14:48:00.996097 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1192 14:48:01.000421 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1193 14:48:01.005244 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1194 14:48:01.010237 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1195 14:48:01.015143 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1196 14:48:01.019909 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1197 14:48:01.024951 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1198 14:48:01.029958 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1199 14:48:01.034147 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1200 14:48:01.039050 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1201 14:48:01.044398 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1202 14:48:01.049175 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1203 14:48:01.057912 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1204 14:48:01.061008 avoid_fixed_resources: DOMAIN: 0000
1205 14:48:01.067664 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1206 14:48:01.073540 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1207 14:48:01.081139 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1208 14:48:01.088683 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1209 14:48:01.095941 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1210 14:48:01.103768 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1211 14:48:01.111076 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1212 14:48:01.118948 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1213 14:48:01.126430 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1214 14:48:01.134102 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1215 14:48:01.141383 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1216 14:48:01.149336 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1217 14:48:01.150498 Setting resources...
1218 14:48:01.156766 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1219 14:48:01.160944 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1220 14:48:01.165455 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1221 14:48:01.168915 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1222 14:48:01.173051 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1223 14:48:01.179219 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1224 14:48:01.185497 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1225 14:48:01.191498 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1226 14:48:01.197915 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 14:48:01.204782 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 14:48:01.212464 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1229 14:48:01.217476 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 14:48:01.222738 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 14:48:01.227390 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 14:48:01.232012 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1233 14:48:01.237165 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1234 14:48:01.242015 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1235 14:48:01.246922 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1236 14:48:01.252046 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1237 14:48:01.256511 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1238 14:48:01.260961 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1239 14:48:01.266199 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1240 14:48:01.270901 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1241 14:48:01.275561 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1242 14:48:01.280864 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1243 14:48:01.286008 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1244 14:48:01.290339 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1245 14:48:01.294906 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1246 14:48:01.300196 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1247 14:48:01.305645 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1248 14:48:01.309536 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1249 14:48:01.314612 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1250 14:48:01.319631 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1251 14:48:01.324447 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1252 14:48:01.329710 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1253 14:48:01.333863 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1254 14:48:01.341725 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1255 14:48:01.348924 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1256 14:48:01.356723 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1257 14:48:01.364148 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1258 14:48:01.368616 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1259 14:48:01.375635 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1260 14:48:01.383309 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1261 14:48:01.390885 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1262 14:48:01.398427 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1263 14:48:01.403309 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1264 14:48:01.407792 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1265 14:48:01.415490 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1266 14:48:01.419663 Root Device assign_resources, bus 0 link: 0
1267 14:48:01.424743 DOMAIN: 0000 assign_resources, bus 0 link: 0
1268 14:48:01.434230 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1269 14:48:01.441434 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1270 14:48:01.449317 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1271 14:48:01.457446 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1272 14:48:01.465722 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1273 14:48:01.473834 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1274 14:48:01.481941 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1275 14:48:01.486877 PCI: 00:14.0 assign_resources, bus 0 link: 0
1276 14:48:01.491735 PCI: 00:14.0 assign_resources, bus 0 link: 0
1277 14:48:01.499810 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1278 14:48:01.507908 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1279 14:48:01.516133 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1280 14:48:01.524263 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1281 14:48:01.529151 PCI: 00:15.0 assign_resources, bus 1 link: 0
1282 14:48:01.533738 PCI: 00:15.0 assign_resources, bus 1 link: 0
1283 14:48:01.541649 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1284 14:48:01.546291 PCI: 00:15.1 assign_resources, bus 2 link: 0
1285 14:48:01.551348 PCI: 00:15.1 assign_resources, bus 2 link: 0
1286 14:48:01.559389 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1287 14:48:01.567303 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1288 14:48:01.575107 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1289 14:48:01.582691 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1290 14:48:01.590750 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1291 14:48:01.598246 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1292 14:48:01.606176 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1293 14:48:01.614783 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1294 14:48:01.622423 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1295 14:48:01.626567 PCI: 00:19.0 assign_resources, bus 3 link: 0
1296 14:48:01.631842 PCI: 00:19.0 assign_resources, bus 3 link: 0
1297 14:48:01.640668 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1298 14:48:01.648183 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1299 14:48:01.657659 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1300 14:48:01.665859 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1301 14:48:01.670446 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1302 14:48:01.678632 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1303 14:48:01.682980 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1304 14:48:01.692291 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1305 14:48:01.701066 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1306 14:48:01.709584 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1307 14:48:01.714168 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1308 14:48:01.723775 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1309 14:48:01.732941 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1310 14:48:01.740123 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1311 14:48:01.744567 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1312 14:48:01.749205 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1313 14:48:01.754013 LPC: Trying to open IO window from 930 size 8
1314 14:48:01.758402 LPC: Trying to open IO window from 940 size 8
1315 14:48:01.763207 LPC: Trying to open IO window from 950 size 10
1316 14:48:01.771723 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1317 14:48:01.779818 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1318 14:48:01.787365 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1319 14:48:01.795901 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1320 14:48:01.804273 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1321 14:48:01.809128 DOMAIN: 0000 assign_resources, bus 0 link: 0
1322 14:48:01.813504 Root Device assign_resources, bus 0 link: 0
1323 14:48:01.815820 Done setting resources.
1324 14:48:01.822312 Show resources in subtree (Root Device)...After assigning values.
1325 14:48:01.826826 Root Device child on link 0 CPU_CLUSTER: 0
1326 14:48:01.830552 CPU_CLUSTER: 0 child on link 0 APIC: 00
1327 14:48:01.832215 APIC: 00
1328 14:48:01.833442 APIC: 03
1329 14:48:01.834851 APIC: 06
1330 14:48:01.835609 APIC: 01
1331 14:48:01.837740 APIC: 02
1332 14:48:01.838922 APIC: 05
1333 14:48:01.840198 APIC: 04
1334 14:48:01.841542 APIC: 07
1335 14:48:01.845204 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1336 14:48:01.855052 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1337 14:48:01.866236 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1338 14:48:01.868079 PCI: 00:00.0
1339 14:48:01.877200 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1340 14:48:01.887374 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1341 14:48:01.895922 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1342 14:48:01.905872 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1343 14:48:01.915308 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1344 14:48:01.924758 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1345 14:48:01.933390 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1346 14:48:01.942715 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1347 14:48:01.951661 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1348 14:48:01.962474 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1349 14:48:01.971987 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1350 14:48:01.981559 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1351 14:48:01.989821 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1352 14:48:01.998941 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1353 14:48:02.000717 PCI: 00:02.0
1354 14:48:02.011179 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1355 14:48:02.022258 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1356 14:48:02.031542 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1357 14:48:02.033899 PCI: 00:04.0
1358 14:48:02.043815 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1359 14:48:02.045269 PCI: 00:08.0
1360 14:48:02.055213 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1361 14:48:02.057091 PCI: 00:12.0
1362 14:48:02.067119 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1363 14:48:02.071630 PCI: 00:14.0 child on link 0 USB0 port 0
1364 14:48:02.081991 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1365 14:48:02.086647 USB0 port 0 child on link 0 USB2 port 0
1366 14:48:02.088993 USB2 port 0
1367 14:48:02.089696 USB2 port 1
1368 14:48:02.091692 USB2 port 2
1369 14:48:02.093425 USB2 port 4
1370 14:48:02.095140 USB2 port 5
1371 14:48:02.097226 USB2 port 6
1372 14:48:02.098900 USB2 port 7
1373 14:48:02.100729 USB2 port 8
1374 14:48:02.102922 USB2 port 9
1375 14:48:02.104492 USB3 port 0
1376 14:48:02.106327 USB3 port 1
1377 14:48:02.107482 USB3 port 2
1378 14:48:02.108977 USB3 port 3
1379 14:48:02.111591 USB3 port 4
1380 14:48:02.112654 PCI: 00:14.2
1381 14:48:02.123033 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1382 14:48:02.133661 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1383 14:48:02.135310 PCI: 00:14.3
1384 14:48:02.145191 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1385 14:48:02.149442 PCI: 00:15.0 child on link 0 I2C: 01:10
1386 14:48:02.159546 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1387 14:48:02.162076 I2C: 01:10
1388 14:48:02.163199 I2C: 01:10
1389 14:48:02.164787 I2C: 01:34
1390 14:48:02.169129 PCI: 00:15.1 child on link 0 I2C: 02:2c
1391 14:48:02.179377 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1392 14:48:02.181017 I2C: 02:2c
1393 14:48:02.182153 PCI: 00:16.0
1394 14:48:02.193381 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1395 14:48:02.194700 PCI: 00:17.0
1396 14:48:02.205021 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1397 14:48:02.214912 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1398 14:48:02.223955 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1399 14:48:02.232612 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1400 14:48:02.241537 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1401 14:48:02.251830 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1402 14:48:02.256878 PCI: 00:19.0 child on link 0 I2C: 03:50
1403 14:48:02.266397 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1404 14:48:02.277664 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1405 14:48:02.278562 I2C: 03:50
1406 14:48:02.280114 PCI: 00:19.2
1407 14:48:02.291746 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1408 14:48:02.301377 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1409 14:48:02.306235 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1410 14:48:02.315726 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1411 14:48:02.324993 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1412 14:48:02.335382 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1413 14:48:02.337072 PCI: 01:00.0
1414 14:48:02.347859 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1415 14:48:02.352767 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1416 14:48:02.361655 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1417 14:48:02.372000 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1418 14:48:02.382569 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1419 14:48:02.383814 PCI: 02:00.0
1420 14:48:02.394176 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1421 14:48:02.404719 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1422 14:48:02.409149 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1423 14:48:02.417728 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1424 14:48:02.426699 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1425 14:48:02.427853 PNP: 0c09.0
1426 14:48:02.436441 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1427 14:48:02.445069 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1428 14:48:02.453929 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1429 14:48:02.455287 PCI: 00:1f.3
1430 14:48:02.466499 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1431 14:48:02.476369 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1432 14:48:02.478071 PCI: 00:1f.4
1433 14:48:02.486921 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1434 14:48:02.497284 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1435 14:48:02.498962 PCI: 00:1f.5
1436 14:48:02.509451 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1437 14:48:02.511105 PCI: 00:1f.6
1438 14:48:02.521055 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1439 14:48:02.524293 Done allocating resources.
1440 14:48:02.530856 BS: BS_DEV_RESOURCES times (us): entry 0 run 2550381 exit 21
1441 14:48:02.532996 Enabling resources...
1442 14:48:02.537351 PCI: 00:00.0 subsystem <- 1028/3e34
1443 14:48:02.539931 PCI: 00:00.0 cmd <- 06
1444 14:48:02.544157 PCI: 00:02.0 subsystem <- 1028/3ea0
1445 14:48:02.546030 PCI: 00:02.0 cmd <- 03
1446 14:48:02.550324 PCI: 00:04.0 subsystem <- 1028/1903
1447 14:48:02.552565 PCI: 00:04.0 cmd <- 02
1448 14:48:02.555239 PCI: 00:08.0 cmd <- 06
1449 14:48:02.559254 PCI: 00:12.0 subsystem <- 1028/9df9
1450 14:48:02.561675 PCI: 00:12.0 cmd <- 02
1451 14:48:02.565497 PCI: 00:14.0 subsystem <- 1028/9ded
1452 14:48:02.567594 PCI: 00:14.0 cmd <- 02
1453 14:48:02.569801 PCI: 00:14.2 cmd <- 02
1454 14:48:02.573815 PCI: 00:14.3 subsystem <- 1028/9df0
1455 14:48:02.576299 PCI: 00:14.3 cmd <- 02
1456 14:48:02.579925 PCI: 00:15.0 subsystem <- 1028/9de8
1457 14:48:02.582823 PCI: 00:15.0 cmd <- 02
1458 14:48:02.586819 PCI: 00:15.1 subsystem <- 1028/9de9
1459 14:48:02.589053 PCI: 00:15.1 cmd <- 02
1460 14:48:02.592637 PCI: 00:16.0 subsystem <- 1028/9de0
1461 14:48:02.595042 PCI: 00:16.0 cmd <- 02
1462 14:48:02.598735 PCI: 00:17.0 subsystem <- 1028/9dd3
1463 14:48:02.601508 PCI: 00:17.0 cmd <- 03
1464 14:48:02.605115 PCI: 00:19.0 subsystem <- 1028/9dc5
1465 14:48:02.607951 PCI: 00:19.0 cmd <- 06
1466 14:48:02.611802 PCI: 00:19.2 subsystem <- 1028/9dc7
1467 14:48:02.613776 PCI: 00:19.2 cmd <- 06
1468 14:48:02.617345 PCI: 00:1c.0 bridge ctrl <- 0003
1469 14:48:02.621013 PCI: 00:1c.0 subsystem <- 1028/9dbf
1470 14:48:02.624639 Capability: type 0x10 @ 0x40
1471 14:48:02.626782 Capability: type 0x05 @ 0x80
1472 14:48:02.630429 Capability: type 0x0d @ 0x90
1473 14:48:02.632183 PCI: 00:1c.0 cmd <- 06
1474 14:48:02.635668 PCI: 00:1d.0 bridge ctrl <- 0003
1475 14:48:02.639212 PCI: 00:1d.0 subsystem <- 1028/9db4
1476 14:48:02.642751 Capability: type 0x10 @ 0x40
1477 14:48:02.645896 Capability: type 0x05 @ 0x80
1478 14:48:02.648607 Capability: type 0x0d @ 0x90
1479 14:48:02.650513 PCI: 00:1d.0 cmd <- 06
1480 14:48:02.654845 PCI: 00:1f.0 subsystem <- 1028/9d84
1481 14:48:02.656613 PCI: 00:1f.0 cmd <- 407
1482 14:48:02.660348 PCI: 00:1f.3 subsystem <- 1028/9dc8
1483 14:48:02.663421 PCI: 00:1f.3 cmd <- 02
1484 14:48:02.667527 PCI: 00:1f.4 subsystem <- 1028/9da3
1485 14:48:02.669513 PCI: 00:1f.4 cmd <- 03
1486 14:48:02.673915 PCI: 00:1f.5 subsystem <- 1028/9da4
1487 14:48:02.676028 PCI: 00:1f.5 cmd <- 406
1488 14:48:02.679251 PCI: 00:1f.6 subsystem <- 1028/15be
1489 14:48:02.682244 PCI: 00:1f.6 cmd <- 02
1490 14:48:02.692817 PCI: 01:00.0 cmd <- 02
1491 14:48:02.697776 PCI: 02:00.0 cmd <- 06
1492 14:48:02.700819 done.
1493 14:48:02.707234 BS: BS_DEV_ENABLE times (us): entry 461 run 170642 exit 0
1494 14:48:02.709848 Initializing devices...
1495 14:48:02.712378 Root Device init ...
1496 14:48:02.715971 Root Device init finished in 2141 usecs
1497 14:48:02.718669 CPU_CLUSTER: 0 init ...
1498 14:48:02.722527 CPU_CLUSTER: 0 init finished in 2433 usecs
1499 14:48:02.729070 PCI: 00:00.0 init ...
1500 14:48:02.731784 CPU TDP: 15 Watts
1501 14:48:02.734196 CPU PL2 = 51 Watts
1502 14:48:02.738737 PCI: 00:00.0 init finished in 7045 usecs
1503 14:48:02.741346 PCI: 00:02.0 init ...
1504 14:48:02.744911 PCI: 00:02.0 init finished in 2238 usecs
1505 14:48:02.747911 PCI: 00:04.0 init ...
1506 14:48:02.751813 PCI: 00:04.0 init finished in 2238 usecs
1507 14:48:02.753656 PCI: 00:08.0 init ...
1508 14:48:02.757983 PCI: 00:08.0 init finished in 2238 usecs
1509 14:48:02.760648 PCI: 00:12.0 init ...
1510 14:48:02.764941 PCI: 00:12.0 init finished in 2239 usecs
1511 14:48:02.768018 PCI: 00:14.0 init ...
1512 14:48:02.771273 PCI: 00:14.0 init finished in 2238 usecs
1513 14:48:02.774385 PCI: 00:14.2 init ...
1514 14:48:02.778980 PCI: 00:14.2 init finished in 2238 usecs
1515 14:48:02.781285 PCI: 00:14.3 init ...
1516 14:48:02.785148 PCI: 00:14.3 init finished in 2243 usecs
1517 14:48:02.787648 PCI: 00:15.0 init ...
1518 14:48:02.791579 DW I2C bus 0 at 0xd1347000 (400 KHz)
1519 14:48:02.795744 PCI: 00:15.0 init finished in 5932 usecs
1520 14:48:02.798724 PCI: 00:15.1 init ...
1521 14:48:02.801699 DW I2C bus 1 at 0xd1348000 (400 KHz)
1522 14:48:02.805899 PCI: 00:15.1 init finished in 5941 usecs
1523 14:48:02.809376 PCI: 00:16.0 init ...
1524 14:48:02.812500 PCI: 00:16.0 init finished in 2238 usecs
1525 14:48:02.816408 PCI: 00:19.0 init ...
1526 14:48:02.819647 DW I2C bus 4 at 0xd134a000 (400 KHz)
1527 14:48:02.823441 PCI: 00:19.0 init finished in 5931 usecs
1528 14:48:02.826526 PCI: 00:1c.0 init ...
1529 14:48:02.830031 Initializing PCH PCIe bridge.
1530 14:48:02.834156 PCI: 00:1c.0 init finished in 5255 usecs
1531 14:48:02.836510 PCI: 00:1d.0 init ...
1532 14:48:02.839262 Initializing PCH PCIe bridge.
1533 14:48:02.843278 PCI: 00:1d.0 init finished in 5254 usecs
1534 14:48:02.845880 PCI: 00:1f.0 init ...
1535 14:48:02.851036 IOAPIC: Initializing IOAPIC at 0xfec00000
1536 14:48:02.855405 IOAPIC: Bootstrap Processor Local APIC = 0x00
1537 14:48:02.857253 IOAPIC: ID = 0x02
1538 14:48:02.860085 IOAPIC: Dumping registers
1539 14:48:02.862510 reg 0x0000: 0x02000000
1540 14:48:02.864381 reg 0x0001: 0x00770020
1541 14:48:02.867221 reg 0x0002: 0x00000000
1542 14:48:02.873663 PCI: 00:1f.0 init finished in 25040 usecs
1543 14:48:02.875331 PCI: 00:1f.3 init ...
1544 14:48:02.881281 HDA: codec_mask = 05
1545 14:48:02.883932 HDA: Initializing codec #2
1546 14:48:02.887460 HDA: codec viddid: 8086280b
1547 14:48:02.889847 HDA: No verb table entry found
1548 14:48:02.892055 HDA: Initializing codec #0
1549 14:48:02.894830 HDA: codec viddid: 10ec0236
1550 14:48:02.901764 HDA: verb loaded.
1551 14:48:02.907086 PCI: 00:1f.3 init finished in 28858 usecs
1552 14:48:02.909200 PCI: 00:1f.4 init ...
1553 14:48:02.913172 PCI: 00:1f.4 init finished in 2248 usecs
1554 14:48:02.916910 PCI: 00:1f.6 init ...
1555 14:48:02.920653 PCI: 00:1f.6 init finished in 2238 usecs
1556 14:48:02.931177 PCI: 01:00.0 init ...
1557 14:48:02.935285 PCI: 01:00.0 init finished in 2230 usecs
1558 14:48:02.938831 PCI: 02:00.0 init ...
1559 14:48:02.941912 PCI: 02:00.0 init finished in 2238 usecs
1560 14:48:02.945520 PNP: 0c09.0 init ...
1561 14:48:02.949279 EC Label : 00.00.20
1562 14:48:02.952655 EC Revision : 9ca674bba
1563 14:48:02.956417 EC Model Num : 08B9
1564 14:48:02.959044 EC Build Date : 05/10/19
1565 14:48:02.969311 PNP: 0c09.0 init finished in 21778 usecs
1566 14:48:02.970565 Devices initialized
1567 14:48:02.973423 Show all devs... After init.
1568 14:48:02.975835 Root Device: enabled 1
1569 14:48:02.978693 CPU_CLUSTER: 0: enabled 1
1570 14:48:02.981554 DOMAIN: 0000: enabled 1
1571 14:48:02.982656 APIC: 00: enabled 1
1572 14:48:02.986450 PCI: 00:00.0: enabled 1
1573 14:48:02.988427 PCI: 00:02.0: enabled 1
1574 14:48:02.990549 PCI: 00:04.0: enabled 1
1575 14:48:02.993540 PCI: 00:12.0: enabled 1
1576 14:48:02.994849 PCI: 00:12.5: enabled 0
1577 14:48:02.997709 PCI: 00:12.6: enabled 0
1578 14:48:03.000741 PCI: 00:13.0: enabled 0
1579 14:48:03.002327 PCI: 00:14.0: enabled 1
1580 14:48:03.005463 PCI: 00:14.1: enabled 0
1581 14:48:03.007823 PCI: 00:14.3: enabled 1
1582 14:48:03.010305 PCI: 00:14.5: enabled 0
1583 14:48:03.012064 PCI: 00:15.0: enabled 1
1584 14:48:03.015027 PCI: 00:15.1: enabled 1
1585 14:48:03.017342 PCI: 00:15.2: enabled 0
1586 14:48:03.019968 PCI: 00:15.3: enabled 0
1587 14:48:03.021890 PCI: 00:16.0: enabled 1
1588 14:48:03.024028 PCI: 00:16.1: enabled 0
1589 14:48:03.027110 PCI: 00:16.2: enabled 0
1590 14:48:03.029156 PCI: 00:16.3: enabled 0
1591 14:48:03.031888 PCI: 00:16.4: enabled 0
1592 14:48:03.034395 PCI: 00:16.5: enabled 0
1593 14:48:03.037093 PCI: 00:17.0: enabled 1
1594 14:48:03.040045 PCI: 00:19.0: enabled 1
1595 14:48:03.041154 PCI: 00:19.1: enabled 0
1596 14:48:03.043905 PCI: 00:19.2: enabled 1
1597 14:48:03.046271 PCI: 00:1a.0: enabled 0
1598 14:48:03.048586 PCI: 00:1c.0: enabled 1
1599 14:48:03.050882 PCI: 00:1c.1: enabled 0
1600 14:48:03.053865 PCI: 00:1c.2: enabled 0
1601 14:48:03.056191 PCI: 00:1c.3: enabled 0
1602 14:48:03.058668 PCI: 00:1c.4: enabled 0
1603 14:48:03.061210 PCI: 00:1c.5: enabled 0
1604 14:48:03.063498 PCI: 00:1c.6: enabled 0
1605 14:48:03.066049 PCI: 00:1c.7: enabled 0
1606 14:48:03.068407 PCI: 00:1d.0: enabled 1
1607 14:48:03.071464 PCI: 00:1d.1: enabled 0
1608 14:48:03.073469 PCI: 00:1d.2: enabled 0
1609 14:48:03.075703 PCI: 00:1d.3: enabled 0
1610 14:48:03.077822 PCI: 00:1d.4: enabled 0
1611 14:48:03.080334 PCI: 00:1e.0: enabled 0
1612 14:48:03.083084 PCI: 00:1e.1: enabled 0
1613 14:48:03.085555 PCI: 00:1e.2: enabled 0
1614 14:48:03.087810 PCI: 00:1e.3: enabled 0
1615 14:48:03.090078 PCI: 00:1f.0: enabled 1
1616 14:48:03.092805 PCI: 00:1f.1: enabled 0
1617 14:48:03.094799 PCI: 00:1f.2: enabled 0
1618 14:48:03.097606 PCI: 00:1f.3: enabled 1
1619 14:48:03.100285 PCI: 00:1f.4: enabled 1
1620 14:48:03.102385 PCI: 00:1f.5: enabled 1
1621 14:48:03.104469 PCI: 00:1f.6: enabled 1
1622 14:48:03.107548 USB0 port 0: enabled 1
1623 14:48:03.109542 I2C: 01:10: enabled 1
1624 14:48:03.112087 I2C: 01:10: enabled 1
1625 14:48:03.113473 I2C: 01:34: enabled 1
1626 14:48:03.115969 I2C: 02:2c: enabled 1
1627 14:48:03.118160 I2C: 03:50: enabled 1
1628 14:48:03.121064 PNP: 0c09.0: enabled 1
1629 14:48:03.123263 USB2 port 0: enabled 1
1630 14:48:03.126063 USB2 port 1: enabled 1
1631 14:48:03.127716 USB2 port 2: enabled 1
1632 14:48:03.130427 USB2 port 4: enabled 1
1633 14:48:03.132093 USB2 port 5: enabled 1
1634 14:48:03.134524 USB2 port 6: enabled 1
1635 14:48:03.137151 USB2 port 7: enabled 1
1636 14:48:03.139030 USB2 port 8: enabled 1
1637 14:48:03.141439 USB2 port 9: enabled 1
1638 14:48:03.144213 USB3 port 0: enabled 1
1639 14:48:03.146756 USB3 port 1: enabled 1
1640 14:48:03.148912 USB3 port 2: enabled 1
1641 14:48:03.151210 USB3 port 3: enabled 1
1642 14:48:03.153112 USB3 port 4: enabled 1
1643 14:48:03.155322 APIC: 03: enabled 1
1644 14:48:03.157517 APIC: 06: enabled 1
1645 14:48:03.159616 APIC: 01: enabled 1
1646 14:48:03.161147 APIC: 02: enabled 1
1647 14:48:03.164659 APIC: 05: enabled 1
1648 14:48:03.166174 APIC: 04: enabled 1
1649 14:48:03.167550 APIC: 07: enabled 1
1650 14:48:03.170227 PCI: 00:08.0: enabled 1
1651 14:48:03.173019 PCI: 00:14.2: enabled 1
1652 14:48:03.175259 PCI: 01:00.0: enabled 1
1653 14:48:03.177526 PCI: 02:00.0: enabled 1
1654 14:48:03.182841 Disabling ACPI via APMC:
1655 14:48:03.184215 done.
1656 14:48:03.189381 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1657 14:48:03.193187 ELOG: NV offset 0x1bf0000 size 0x4000
1658 14:48:03.200583 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 14:48:03.207228 ELOG: Event(17) added with size 13 at 2022-09-30 14:39:41 UTC
1660 14:48:03.212062 POST: Unexpected post code in previous boot: 0x55
1661 14:48:03.219537 ELOG: Event(A3) added with size 11 at 2022-09-30 14:39:41 UTC
1662 14:48:03.224627 ELOG: Event(A6) added with size 13 at 2022-09-30 14:39:41 UTC
1663 14:48:03.231572 ELOG: Event(92) added with size 9 at 2022-09-30 14:39:41 UTC
1664 14:48:03.237246 ELOG: Event(93) added with size 9 at 2022-09-30 14:39:41 UTC
1665 14:48:03.244069 ELOG: Event(9A) added with size 9 at 2022-09-30 14:39:41 UTC
1666 14:48:03.250145 ELOG: Event(9E) added with size 10 at 2022-09-30 14:39:41 UTC
1667 14:48:03.256212 ELOG: Event(9F) added with size 14 at 2022-09-30 14:39:41 UTC
1668 14:48:03.262712 BS: BS_DEV_INIT times (us): entry 0 run 470246 exit 78923
1669 14:48:03.268749 ELOG: Event(A1) added with size 10 at 2022-09-30 14:39:41 UTC
1670 14:48:03.276735 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1671 14:48:03.282599 ELOG: Event(A0) added with size 9 at 2022-09-30 14:39:41 UTC
1672 14:48:03.287454 elog_add_boot_reason: Logged dev mode boot
1673 14:48:03.289522 Finalize devices...
1674 14:48:03.291296 PCI: 00:17.0 final
1675 14:48:03.293217 Devices finalized
1676 14:48:03.298690 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1677 14:48:03.304165 BS: BS_POST_DEVICE times (us): entry 24806 run 5937 exit 5369
1678 14:48:03.310745 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1679 14:48:03.318354 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1680 14:48:03.322844 disable_unused_touchscreen: Disable ACPI0C50
1681 14:48:03.327651 disable_unused_touchscreen: Enable ELAN900C
1682 14:48:03.329945 CBFS @ 1d00000 size 300000
1683 14:48:03.336189 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1684 14:48:03.340655 CBFS: Locating 'fallback/dsdt.aml'
1685 14:48:03.344166 CBFS: Found @ offset 10b200 size 4448
1686 14:48:03.346761 CBFS @ 1d00000 size 300000
1687 14:48:03.353063 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1688 14:48:03.356677 CBFS: Locating 'fallback/slic'
1689 14:48:03.361629 CBFS: 'fallback/slic' not found.
1690 14:48:03.366230 ACPI: Writing ACPI tables at 89c0f000.
1691 14:48:03.367829 ACPI: * FACS
1692 14:48:03.368609 ACPI: * DSDT
1693 14:48:03.372714 Ramoops buffer: 0x100000@0x89b0e000.
1694 14:48:03.377415 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1695 14:48:03.382005 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1696 14:48:03.385833 ACPI: * FADT
1697 14:48:03.386837 SCI is IRQ9
1698 14:48:03.391013 ACPI: added table 1/32, length now 40
1699 14:48:03.393278 ACPI: * SSDT
1700 14:48:03.396564 Found 1 CPU(s) with 8 core(s) each.
1701 14:48:03.400499 Error: Could not locate 'wifi_sar' in VPD.
1702 14:48:03.404725 Error: failed from getting SAR limits!
1703 14:48:03.408900 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1704 14:48:03.413182 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1705 14:48:03.416772 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1706 14:48:03.420993 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1707 14:48:03.425861 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1708 14:48:03.431870 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1709 14:48:03.436774 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1710 14:48:03.440306 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1711 14:48:03.446851 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1712 14:48:03.452832 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1713 14:48:03.458567 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1714 14:48:03.464374 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1715 14:48:03.468882 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1716 14:48:03.473298 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1717 14:48:03.477758 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1718 14:48:03.483218 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1719 14:48:03.487677 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1720 14:48:03.494108 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1721 14:48:03.500035 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1722 14:48:03.505190 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1723 14:48:03.511623 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1724 14:48:03.515964 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1725 14:48:03.519792 ACPI: added table 2/32, length now 44
1726 14:48:03.521462 ACPI: * MCFG
1727 14:48:03.525445 ACPI: added table 3/32, length now 48
1728 14:48:03.526754 ACPI: * TPM2
1729 14:48:03.530345 TPM2 log created at 89afe000
1730 14:48:03.533952 ACPI: added table 4/32, length now 52
1731 14:48:03.535444 ACPI: * MADT
1732 14:48:03.536766 SCI is IRQ9
1733 14:48:03.540994 ACPI: added table 5/32, length now 56
1734 14:48:03.542356 current = 89c14bd0
1735 14:48:03.545236 ACPI: * IGD OpRegion
1736 14:48:03.546894 GMA: Found VBT in CBFS
1737 14:48:03.550655 GMA: Found valid VBT in CBFS
1738 14:48:03.554293 ACPI: added table 6/32, length now 60
1739 14:48:03.555844 ACPI: * HPET
1740 14:48:03.560074 ACPI: added table 7/32, length now 64
1741 14:48:03.560924 ACPI: done.
1742 14:48:03.563518 ACPI tables: 31872 bytes.
1743 14:48:03.566471 smbios_write_tables: 89afd000
1744 14:48:03.568784 recv_ec_data: 0x01
1745 14:48:03.571050 Create SMBIOS type 17
1746 14:48:03.573769 PCI: 00:14.3 (Intel WiFi)
1747 14:48:03.576381 SMBIOS tables: 708 bytes.
1748 14:48:03.580925 Writing table forward entry at 0x00000500
1749 14:48:03.586410 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1750 14:48:03.590201 Writing coreboot table at 0x89c33000
1751 14:48:03.596534 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1752 14:48:03.600068 1. 0000000000001000-000000000009ffff: RAM
1753 14:48:03.605484 2. 00000000000a0000-00000000000fffff: RESERVED
1754 14:48:03.609124 3. 0000000000100000-0000000089afcfff: RAM
1755 14:48:03.615746 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1756 14:48:03.619959 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1757 14:48:03.626321 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1758 14:48:03.631241 7. 000000008a000000-000000008f7fffff: RESERVED
1759 14:48:03.635336 8. 00000000e0000000-00000000efffffff: RESERVED
1760 14:48:03.641182 9. 00000000fc000000-00000000fc000fff: RESERVED
1761 14:48:03.645413 10. 00000000fe000000-00000000fe00ffff: RESERVED
1762 14:48:03.650352 11. 00000000fed10000-00000000fed17fff: RESERVED
1763 14:48:03.654754 12. 00000000fed80000-00000000fed83fff: RESERVED
1764 14:48:03.659230 13. 00000000feda0000-00000000feda1fff: RESERVED
1765 14:48:03.663316 14. 0000000100000000-000000026e7fffff: RAM
1766 14:48:03.668515 Graphics framebuffer located at 0xc0000000
1767 14:48:03.671182 Passing 6 GPIOs to payload:
1768 14:48:03.675605 NAME | PORT | POLARITY | VALUE
1769 14:48:03.681293 write protect | 0x000000dc | high | high
1770 14:48:03.687099 recovery | 0x000000d5 | low | high
1771 14:48:03.692014 lid | undefined | high | high
1772 14:48:03.697510 power | undefined | high | low
1773 14:48:03.702656 oprom | undefined | high | low
1774 14:48:03.708073 EC in RW | undefined | high | low
1775 14:48:03.709839 recv_ec_data: 0x01
1776 14:48:03.711289 SKU ID: 3
1777 14:48:03.714075 CBFS @ 1d00000 size 300000
1778 14:48:03.719790 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1779 14:48:03.725601 Wrote coreboot table at: 89c33000, 0x58c bytes, checksum 3403
1780 14:48:03.728574 coreboot table: 1444 bytes.
1781 14:48:03.732400 IMD ROOT 0. 89fff000 00001000
1782 14:48:03.735884 IMD SMALL 1. 89ffe000 00001000
1783 14:48:03.738178 FSP MEMORY 2. 89d0e000 002f0000
1784 14:48:03.742331 CONSOLE 3. 89cee000 00020000
1785 14:48:03.745457 TIME STAMP 4. 89ced000 00000910
1786 14:48:03.749176 VBOOT WORK 5. 89cea000 00003000
1787 14:48:03.751964 VBOOT 6. 89ce9000 00000c0c
1788 14:48:03.755739 MRC DATA 7. 89ce7000 000018f0
1789 14:48:03.758842 ROMSTG STCK 8. 89ce6000 00000400
1790 14:48:03.761955 AFTER CAR 9. 89cdc000 0000a000
1791 14:48:03.764842 RAMSTAGE 10. 89c80000 0005c000
1792 14:48:03.768283 REFCODE 11. 89c4b000 00035000
1793 14:48:03.772132 SMM BACKUP 12. 89c3b000 00010000
1794 14:48:03.775355 COREBOOT 13. 89c33000 00008000
1795 14:48:03.779079 ACPI 14. 89c0f000 00024000
1796 14:48:03.782194 ACPI GNVS 15. 89c0e000 00001000
1797 14:48:03.785353 RAMOOPS 16. 89b0e000 00100000
1798 14:48:03.788176 TPM2 TCGLOG17. 89afe000 00010000
1799 14:48:03.792321 SMBIOS 18. 89afd000 00000800
1800 14:48:03.793749 IMD small region:
1801 14:48:03.797009 IMD ROOT 0. 89ffec00 00000400
1802 14:48:03.800778 FSP RUNTIME 1. 89ffebe0 00000004
1803 14:48:03.804077 POWER STATE 2. 89ffeba0 00000040
1804 14:48:03.808080 ROMSTAGE 3. 89ffeb80 00000004
1805 14:48:03.810959 MEM INFO 4. 89ffe9c0 000001a9
1806 14:48:03.814416 COREBOOTFWD 5. 89ffe980 00000028
1807 14:48:03.818241 MTRR: Physical address space:
1808 14:48:03.823818 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1809 14:48:03.829940 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1810 14:48:03.837011 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1811 14:48:03.843639 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1812 14:48:03.848948 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1813 14:48:03.855266 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1814 14:48:03.861244 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1815 14:48:03.865590 MTRR: Fixed MSR 0x250 0x0606060606060606
1816 14:48:03.869504 MTRR: Fixed MSR 0x258 0x0606060606060606
1817 14:48:03.873440 MTRR: Fixed MSR 0x259 0x0000000000000000
1818 14:48:03.878062 MTRR: Fixed MSR 0x268 0x0606060606060606
1819 14:48:03.882378 MTRR: Fixed MSR 0x269 0x0606060606060606
1820 14:48:03.886186 MTRR: Fixed MSR 0x26a 0x0606060606060606
1821 14:48:03.889990 MTRR: Fixed MSR 0x26b 0x0606060606060606
1822 14:48:03.894719 MTRR: Fixed MSR 0x26c 0x0606060606060606
1823 14:48:03.898158 MTRR: Fixed MSR 0x26d 0x0606060606060606
1824 14:48:03.902641 MTRR: Fixed MSR 0x26e 0x0606060606060606
1825 14:48:03.906347 MTRR: Fixed MSR 0x26f 0x0606060606060606
1826 14:48:03.910227 call enable_fixed_mtrr()
1827 14:48:03.913758 CPU physical address size: 39 bits
1828 14:48:03.918210 MTRR: default type WB/UC MTRR counts: 7/7.
1829 14:48:03.921816 MTRR: UC selected as default type.
1830 14:48:03.927493 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1831 14:48:03.933773 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1832 14:48:03.939908 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1833 14:48:03.946572 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1834 14:48:03.952226 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1835 14:48:03.959070 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1836 14:48:03.965156 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1837 14:48:03.965944
1838 14:48:03.967006 MTRR check
1839 14:48:03.969769 Fixed MTRRs : Enabled
1840 14:48:03.972105 Variable MTRRs: Enabled
1841 14:48:03.972895
1842 14:48:03.976317 MTRR: Fixed MSR 0x250 0x0606060606060606
1843 14:48:03.980495 MTRR: Fixed MSR 0x258 0x0606060606060606
1844 14:48:03.985229 MTRR: Fixed MSR 0x259 0x0000000000000000
1845 14:48:03.988195 MTRR: Fixed MSR 0x268 0x0606060606060606
1846 14:48:03.992811 MTRR: Fixed MSR 0x269 0x0606060606060606
1847 14:48:03.996382 MTRR: Fixed MSR 0x26a 0x0606060606060606
1848 14:48:04.000571 MTRR: Fixed MSR 0x26b 0x0606060606060606
1849 14:48:04.004554 MTRR: Fixed MSR 0x26c 0x0606060606060606
1850 14:48:04.009130 MTRR: Fixed MSR 0x26d 0x0606060606060606
1851 14:48:04.013382 MTRR: Fixed MSR 0x26e 0x0606060606060606
1852 14:48:04.017096 MTRR: Fixed MSR 0x26f 0x0606060606060606
1853 14:48:04.023458 BS: BS_WRITE_TABLES times (us): entry 17216 run 487313 exit 157316
1854 14:48:04.026583 call enable_fixed_mtrr()
1855 14:48:04.029512 CBFS @ 1d00000 size 300000
1856 14:48:04.032201 CPU physical address size: 39 bits
1857 14:48:04.039665 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1858 14:48:04.043129 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 14:48:04.047057 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 14:48:04.051646 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 14:48:04.055871 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 14:48:04.059475 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 14:48:04.063551 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 14:48:04.068316 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 14:48:04.072133 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 14:48:04.075918 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 14:48:04.079843 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 14:48:04.084462 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 14:48:04.088093 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 14:48:04.092694 MTRR: Fixed MSR 0x258 0x0606060606060606
1871 14:48:04.095210 call enable_fixed_mtrr()
1872 14:48:04.099270 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 14:48:04.103050 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 14:48:04.107315 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 14:48:04.111571 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 14:48:04.115834 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 14:48:04.119457 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 14:48:04.123900 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 14:48:04.128366 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 14:48:04.132091 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 14:48:04.135668 CPU physical address size: 39 bits
1882 14:48:04.138552 call enable_fixed_mtrr()
1883 14:48:04.142858 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 14:48:04.147169 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 14:48:04.151117 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 14:48:04.154922 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 14:48:04.159279 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 14:48:04.164104 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 14:48:04.167372 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 14:48:04.171590 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 14:48:04.175488 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 14:48:04.179545 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 14:48:04.183382 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 14:48:04.187607 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 14:48:04.192647 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 14:48:04.194838 call enable_fixed_mtrr()
1897 14:48:04.198677 MTRR: Fixed MSR 0x259 0x0000000000000000
1898 14:48:04.203065 MTRR: Fixed MSR 0x268 0x0606060606060606
1899 14:48:04.207251 MTRR: Fixed MSR 0x269 0x0606060606060606
1900 14:48:04.211435 MTRR: Fixed MSR 0x26a 0x0606060606060606
1901 14:48:04.215396 MTRR: Fixed MSR 0x26b 0x0606060606060606
1902 14:48:04.219541 MTRR: Fixed MSR 0x26c 0x0606060606060606
1903 14:48:04.223211 MTRR: Fixed MSR 0x26d 0x0606060606060606
1904 14:48:04.228018 MTRR: Fixed MSR 0x26e 0x0606060606060606
1905 14:48:04.232215 MTRR: Fixed MSR 0x26f 0x0606060606060606
1906 14:48:04.234839 CPU physical address size: 39 bits
1907 14:48:04.238290 call enable_fixed_mtrr()
1908 14:48:04.241526 CPU physical address size: 39 bits
1909 14:48:04.245878 MTRR: Fixed MSR 0x250 0x0606060606060606
1910 14:48:04.249409 MTRR: Fixed MSR 0x250 0x0606060606060606
1911 14:48:04.254080 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 14:48:04.258007 MTRR: Fixed MSR 0x259 0x0000000000000000
1913 14:48:04.262062 MTRR: Fixed MSR 0x268 0x0606060606060606
1914 14:48:04.266797 MTRR: Fixed MSR 0x269 0x0606060606060606
1915 14:48:04.270209 MTRR: Fixed MSR 0x26a 0x0606060606060606
1916 14:48:04.274060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1917 14:48:04.278329 MTRR: Fixed MSR 0x26c 0x0606060606060606
1918 14:48:04.282280 MTRR: Fixed MSR 0x26d 0x0606060606060606
1919 14:48:04.286115 MTRR: Fixed MSR 0x26e 0x0606060606060606
1920 14:48:04.290852 MTRR: Fixed MSR 0x26f 0x0606060606060606
1921 14:48:04.295800 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 14:48:04.297544 call enable_fixed_mtrr()
1923 14:48:04.301917 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 14:48:04.305138 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 14:48:04.309892 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 14:48:04.313514 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 14:48:04.318488 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 14:48:04.321731 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 14:48:04.326775 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 14:48:04.330066 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 14:48:04.334538 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 14:48:04.338098 CPU physical address size: 39 bits
1933 14:48:04.341372 call enable_fixed_mtrr()
1934 14:48:04.344784 CBFS: Locating 'fallback/payload'
1935 14:48:04.348478 CPU physical address size: 39 bits
1936 14:48:04.351726 CPU physical address size: 39 bits
1937 14:48:04.355558 CBFS: Found @ offset 1cf4c0 size 3a954
1938 14:48:04.359382 Checking segment from ROM address 0xffecf4f8
1939 14:48:04.364548 Checking segment from ROM address 0xffecf514
1940 14:48:04.369046 Loading segment from ROM address 0xffecf4f8
1941 14:48:04.371419 code (compression=0)
1942 14:48:04.379818 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1943 14:48:04.388641 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1944 14:48:04.390756 it's not compressed!
1945 14:48:04.472311 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1946 14:48:04.478572 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1947 14:48:04.486891 Loading segment from ROM address 0xffecf514
1948 14:48:04.489477 Entry Point 0x30100018
1949 14:48:04.491220 Loaded segments
1950 14:48:04.500749 Finalizing chipset.
1951 14:48:04.502574 Finalizing SMM.
1952 14:48:04.508401 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466963 exit 11531
1953 14:48:04.511800 mp_park_aps done after 0 msecs.
1954 14:48:04.516256 Jumping to boot code at 30100018(89c33000)
1955 14:48:04.525311 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1956 14:48:04.525763
1957 14:48:04.528653 Starting depthcharge on sarien...
1958 14:48:04.531074 end: 2.2.3 depthcharge-start (duration 00:00:27) [common]
1959 14:48:04.531655 start: 2.2.4 bootloader-commands (timeout 00:04:33) [common]
1960 14:48:04.532094 Setting prompt string to ['sarien:']
1961 14:48:04.532551 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:33)
1962 14:48:04.536149 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1963 14:48:04.543659 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1964 14:48:04.552224 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1965 14:48:04.553494 BIOS MMAP details:
1966 14:48:04.556307 IFD Base Offset : 0x1000000
1967 14:48:04.559711 IFD End Offset : 0x2000000
1968 14:48:04.562312 MMAP Size : 0x1000000
1969 14:48:04.565500 MMAP Start : 0xff000000
1970 14:48:04.572343 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1971 14:48:04.580917 New NVMe Controller 0x3214e110 @ 00:1d:04
1972 14:48:04.585075 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1973 14:48:04.590994 The GBB signature is at 0x30000014 and is: 24 47 42 42
1974 14:48:04.596567 Wipe memory regions:
1975 14:48:04.600556 [0x00000000001000, 0x000000000a0000)
1976 14:48:04.604302 [0x00000000100000, 0x00000030000000)
1977 14:48:04.690626 [0x00000032751910, 0x00000089afd000)
1978 14:48:04.843677 [0x00000100000000, 0x0000026e800000)
1979 14:48:05.856799 R8152: Initializing
1980 14:48:05.859899 Version 6 (ocp_data = 5c30)
1981 14:48:05.863236 R8152: Done initializing
1982 14:48:05.864880 Adding net device
1983 14:48:05.870805 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1984 14:48:05.871251
1985 14:48:05.872301 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1987 14:48:05.973987 sarien: tftpboot 192.168.201.1 7462819/tftp-deploy-0agpnbn4/kernel/bzImage 7462819/tftp-deploy-0agpnbn4/kernel/cmdline 7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
1988 14:48:05.974639 Setting prompt string to 'Starting kernel'
1989 14:48:05.975174 Setting prompt string to ['Starting kernel']
1990 14:48:05.975545 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1991 14:48:05.976022 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:32)
1992 14:48:05.979436 tftpboot 192.168.201.1 7462819/tftp-deploy-0agpnbn4/kernel/bzImage 7462819/tftp-deploy-0agpnbn4/kernel/cmdline 7462819/tftp-deploy-0agpnbn4/ramdisk/ramdisk.cpio.gz
1993 14:48:05.979696 Waiting for link
1994 14:48:06.179111 done.
1995 14:48:06.181172 MAC: 00:24:32:30:78:08
1996 14:48:06.183919 Sending DHCP discover... done.
1997 14:48:06.186307 Waiting for reply... done.
1998 14:48:06.190039 Sending DHCP request... done.
1999 14:48:06.195597 Waiting for reply... done.
2000 14:48:06.198009 My ip is 192.168.201.222
2001 14:48:06.201849 The DHCP server ip is 192.168.201.1
2002 14:48:06.206934 TFTP server IP predefined by user: 192.168.201.1
2003 14:48:06.213954 Bootfile predefined by user: 7462819/tftp-deploy-0agpnbn4/kernel/bzImage
2004 14:48:06.217314 Sending tftp read request... done.
2005 14:48:06.221692 Waiting for the transfer...
2006 14:48:06.926403 00000000 ################################################################
2007 14:48:07.610341 00080000 ################################################################
2008 14:48:08.316831 00100000 ################################################################
2009 14:48:09.046823 00180000 ################################################################
2010 14:48:09.764067 00200000 ################################################################
2011 14:48:10.340361 00280000 ################################################################
2012 14:48:10.904698 00300000 ################################################################
2013 14:48:11.508747 00380000 ################################################################
2014 14:48:12.185341 00400000 ################################################################
2015 14:48:12.767116 00480000 ################################################################
2016 14:48:13.462695 00500000 ################################################################
2017 14:48:14.121782 00580000 ################################################################
2018 14:48:14.656615 00600000 ################################################################
2019 14:48:14.987026 00680000 ###################################### done.
2020 14:48:14.990661 The bootfile was 7126928 bytes long.
2021 14:48:14.993881 Sending tftp read request... done.
2022 14:48:14.996944 Waiting for the transfer...
2023 14:48:15.571253 00000000 ################################################################
2024 14:48:16.112593 00080000 ################################################################
2025 14:48:16.656695 00100000 ################################################################
2026 14:48:17.281961 00180000 ################################################################
2027 14:48:17.969630 00200000 ################################################################
2028 14:48:18.535207 00280000 ################################################################
2029 14:48:19.103180 00300000 ################################################################
2030 14:48:19.643748 00380000 ################################################################
2031 14:48:20.166667 00400000 ################################################################
2032 14:48:20.689606 00480000 ################################################################
2033 14:48:21.239607 00500000 ################################################################
2034 14:48:21.809394 00580000 ################################################################
2035 14:48:22.336797 00600000 ################################################################
2036 14:48:22.884471 00680000 ################################################################
2037 14:48:23.403769 00700000 ################################################################
2038 14:48:23.935846 00780000 ################################################################
2039 14:48:24.102841 00800000 #################### done.
2040 14:48:24.105834 Sending tftp read request... done.
2041 14:48:24.109293 Waiting for the transfer...
2042 14:48:24.110503 00000000 # done.
2043 14:48:24.119477 Command line loaded dynamically from TFTP file: 7462819/tftp-deploy-0agpnbn4/kernel/cmdline
2044 14:48:24.136941 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2045 14:48:24.144399 Shutting down all USB controllers.
2046 14:48:24.147187 Removing current net device
2047 14:48:24.150742 EC: exit firmware mode
2048 14:48:24.154020 Finalizing coreboot
2049 14:48:24.160636 Exiting depthcharge with code 4 at timestamp: 27312832
2050 14:48:24.161125
2051 14:48:24.162298 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2052 14:48:24.162412 start: 2.2.5 auto-login-action (timeout 00:04:14) [common]
2053 14:48:24.162501 Setting prompt string to ['Linux version [0-9]']
2054 14:48:24.162582 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2055 14:48:24.162663 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2056 14:48:24.162870 Starting kernel ...
2057 14:48:24.163251
2058 14:48:24.163346
2060 14:52:38.162711 end: 2.2.5 auto-login-action (duration 00:04:14) [common]
2062 14:52:38.162971 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 254 seconds'
2064 14:52:38.163169 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2067 14:52:38.163526 end: 2 depthcharge-action (duration 00:05:00) [common]
2069 14:52:38.163799 Cleaning after the job
2070 14:52:38.163891 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/ramdisk
2071 14:52:38.164672 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/kernel
2072 14:52:38.165277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462819/tftp-deploy-0agpnbn4/modules
2073 14:52:38.165494 start: 5.1 power-off (timeout 00:00:30) [common]
2074 14:52:38.165783 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-1' '--port=1' '--command=off'
2075 14:52:38.187703 >> Command sent successfully.
2076 14:52:38.189879 Returned 0 in 0 seconds
2077 14:52:38.290641 end: 5.1 power-off (duration 00:00:00) [common]
2079 14:52:38.290999 start: 5.2 read-feedback (timeout 00:10:00) [common]
2080 14:52:38.291278 Listened to connection for namespace 'common' for up to 1s
2081 14:52:39.292371 Finalising connection for namespace 'common'
2082 14:52:39.293085 Disconnecting from shell: Finalise
2083 14:52:39.394461 end: 5.2 read-feedback (duration 00:00:01) [common]
2084 14:52:39.395008 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462819
2085 14:52:39.418273 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462819
2086 14:52:39.418888 JobError: Your job cannot terminate cleanly.