Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 14:47:10.146526 lava-dispatcher, installed at version: 2022.06
2 14:47:10.146711 start: 0 validate
3 14:47:10.146839 Start time: 2022-09-30 14:47:10.146832+00:00 (UTC)
4 14:47:10.146982 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:47:10.147110 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Finitrd.cpio.gz exists
6 14:47:10.440161 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:47:10.440362 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:47:10.744822 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:47:10.744974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20220826.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:47:11.036498 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:47:11.036766 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-98-gb2bfffe124dae%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:47:11.337558 validate duration: 1.19
14 14:47:11.337874 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:47:11.337988 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:47:11.338090 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:47:11.338198 Not decompressing ramdisk as can be used compressed.
18 14:47:11.338293 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/initrd.cpio.gz
19 14:47:11.338373 saving as /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/ramdisk/initrd.cpio.gz
20 14:47:11.338454 total size: 5411075 (5MB)
21 14:47:11.341451 progress 0% (0MB)
22 14:47:11.343858 progress 5% (0MB)
23 14:47:11.345895 progress 10% (0MB)
24 14:47:11.348071 progress 15% (0MB)
25 14:47:11.350591 progress 20% (1MB)
26 14:47:11.352902 progress 25% (1MB)
27 14:47:11.355019 progress 30% (1MB)
28 14:47:11.357276 progress 35% (1MB)
29 14:47:11.359967 progress 40% (2MB)
30 14:47:11.362076 progress 45% (2MB)
31 14:47:11.364201 progress 50% (2MB)
32 14:47:11.366491 progress 55% (2MB)
33 14:47:11.369027 progress 60% (3MB)
34 14:47:11.371319 progress 65% (3MB)
35 14:47:11.373424 progress 70% (3MB)
36 14:47:11.375722 progress 75% (3MB)
37 14:47:11.378212 progress 80% (4MB)
38 14:47:11.380551 progress 85% (4MB)
39 14:47:11.382625 progress 90% (4MB)
40 14:47:11.384928 progress 95% (4MB)
41 14:47:11.387231 progress 100% (5MB)
42 14:47:11.387418 5MB downloaded in 0.05s (105.40MB/s)
43 14:47:11.387579 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:47:11.387859 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:47:11.387964 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:47:11.388065 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:47:11.388184 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:47:11.388258 saving as /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/kernel/bzImage
50 14:47:11.388338 total size: 7126928 (6MB)
51 14:47:11.388415 No compression specified
52 14:47:12.895622 progress 0% (0MB)
53 14:47:12.898694 progress 5% (0MB)
54 14:47:12.901534 progress 10% (0MB)
55 14:47:12.904426 progress 15% (1MB)
56 14:47:12.907360 progress 20% (1MB)
57 14:47:12.910408 progress 25% (1MB)
58 14:47:12.913709 progress 30% (2MB)
59 14:47:12.916784 progress 35% (2MB)
60 14:47:12.919362 progress 40% (2MB)
61 14:47:12.922358 progress 45% (3MB)
62 14:47:12.925645 progress 50% (3MB)
63 14:47:12.928533 progress 55% (3MB)
64 14:47:12.931803 progress 60% (4MB)
65 14:47:12.934655 progress 65% (4MB)
66 14:47:12.937709 progress 70% (4MB)
67 14:47:12.940735 progress 75% (5MB)
68 14:47:12.943593 progress 80% (5MB)
69 14:47:12.946652 progress 85% (5MB)
70 14:47:12.949731 progress 90% (6MB)
71 14:47:12.952783 progress 95% (6MB)
72 14:47:12.955979 progress 100% (6MB)
73 14:47:12.956278 6MB downloaded in 1.57s (4.33MB/s)
74 14:47:12.956477 end: 1.2.1 http-download (duration 00:00:02) [common]
76 14:47:12.956828 end: 1.2 download-retry (duration 00:00:02) [common]
77 14:47:12.956950 start: 1.3 download-retry (timeout 00:09:58) [common]
78 14:47:12.957070 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 14:47:12.957213 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20220826.0/amd64/full.rootfs.tar.xz
80 14:47:12.957308 saving as /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/nfsrootfs/full.rootfs.tar
81 14:47:12.957397 total size: 122682368 (116MB)
82 14:47:12.957489 Using unxz to decompress xz
83 14:47:12.963691 progress 0% (0MB)
84 14:47:13.427285 progress 5% (5MB)
85 14:47:13.900383 progress 10% (11MB)
86 14:47:14.368554 progress 15% (17MB)
87 14:47:14.827435 progress 20% (23MB)
88 14:47:15.141709 progress 25% (29MB)
89 14:47:15.476462 progress 30% (35MB)
90 14:47:15.718279 progress 35% (40MB)
91 14:47:15.930776 progress 40% (46MB)
92 14:47:16.276465 progress 45% (52MB)
93 14:47:16.629880 progress 50% (58MB)
94 14:47:16.975651 progress 55% (64MB)
95 14:47:17.331780 progress 60% (70MB)
96 14:47:17.669173 progress 65% (76MB)
97 14:47:18.053663 progress 70% (81MB)
98 14:47:18.459334 progress 75% (87MB)
99 14:47:18.880288 progress 80% (93MB)
100 14:47:18.995215 progress 85% (99MB)
101 14:47:19.163095 progress 90% (105MB)
102 14:47:19.492197 progress 95% (111MB)
103 14:47:19.851369 progress 100% (116MB)
104 14:47:19.857876 116MB downloaded in 6.90s (16.96MB/s)
105 14:47:19.858143 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:47:19.858414 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:47:19.858508 start: 1.4 download-retry (timeout 00:09:51) [common]
109 14:47:19.858595 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 14:47:19.858714 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-98-gb2bfffe124dae/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:47:19.858788 saving as /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/modules/modules.tar
112 14:47:19.858852 total size: 52080 (0MB)
113 14:47:19.858915 Using unxz to decompress xz
114 14:47:19.863439 progress 62% (0MB)
115 14:47:19.863866 progress 100% (0MB)
116 14:47:19.867115 0MB downloaded in 0.01s (6.02MB/s)
117 14:47:19.867331 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:47:19.867592 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:47:19.867690 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 14:47:19.867828 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 14:47:21.524316 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7462808/extract-nfsrootfs-nnhukygd
123 14:47:21.524519 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 14:47:21.524624 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 14:47:21.524762 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n
126 14:47:21.524864 makedir: /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin
127 14:47:21.524948 makedir: /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/tests
128 14:47:21.525029 makedir: /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/results
129 14:47:21.525127 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-add-keys
130 14:47:21.525259 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-add-sources
131 14:47:21.525381 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-background-process-start
132 14:47:21.525498 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-background-process-stop
133 14:47:21.525610 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-common-functions
134 14:47:21.525721 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-echo-ipv4
135 14:47:21.525833 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-install-packages
136 14:47:21.525943 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-installed-packages
137 14:47:21.526053 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-os-build
138 14:47:21.526163 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-probe-channel
139 14:47:21.526273 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-probe-ip
140 14:47:21.526383 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-target-ip
141 14:47:21.526493 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-target-mac
142 14:47:21.526600 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-target-storage
143 14:47:21.526711 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-case
144 14:47:21.526820 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-event
145 14:47:21.526932 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-feedback
146 14:47:21.527041 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-raise
147 14:47:21.527149 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-reference
148 14:47:21.527258 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-runner
149 14:47:21.527368 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-set
150 14:47:21.527476 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-test-shell
151 14:47:21.527586 Updating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-install-packages (oe)
152 14:47:21.527699 Updating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/bin/lava-installed-packages (oe)
153 14:47:21.527838 Creating /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/environment
154 14:47:21.527926 LAVA metadata
155 14:47:21.527993 - LAVA_JOB_ID=7462808
156 14:47:21.528057 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:47:21.528156 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 14:47:21.528222 skipped lava-vland-overlay
159 14:47:21.528298 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:47:21.528379 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 14:47:21.528440 skipped lava-multinode-overlay
162 14:47:21.528514 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:47:21.528595 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 14:47:21.528665 Loading test definitions
165 14:47:21.528754 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 14:47:21.528826 Using /lava-7462808 at stage 0
167 14:47:21.528921 Fetching tests from https://github.com/kernelci/test-definitions
168 14:47:21.528999 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/0/tests/0_ltp-ipc'
169 14:47:23.894496 Running '/usr/bin/git checkout kernelci.org
170 14:47:24.028235 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 14:47:24.028998 uuid=7462808_1.5.2.3.1 testdef=None
172 14:47:24.029159 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 14:47:24.029411 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
175 14:47:24.030179 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 14:47:24.030418 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
178 14:47:24.031369 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 14:47:24.031620 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
181 14:47:24.032601 runner path: /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/0/tests/0_ltp-ipc test_uuid 7462808_1.5.2.3.1
182 14:47:24.032698 SKIPFILE='skipfile-lkft.yaml'
183 14:47:24.032766 SKIP_INSTALL='true'
184 14:47:24.032828 TST_CMDFILES='ipc'
185 14:47:24.032964 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 14:47:24.033199 Creating lava-test-runner.conf files
188 14:47:24.033266 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7462808/lava-overlay-v2scp61n/lava-7462808/0 for stage 0
189 14:47:24.033352 - 0_ltp-ipc
190 14:47:24.033450 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 14:47:24.033547 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
192 14:47:31.378146 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 14:47:31.378312 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
194 14:47:31.378410 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 14:47:31.378517 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
196 14:47:31.378608 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
197 14:47:31.480126 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 14:47:31.480472 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 14:47:31.480588 extracting modules file /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462808/extract-nfsrootfs-nnhukygd
200 14:47:31.484722 extracting modules file /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7462808/extract-overlay-ramdisk-qlibp4jm/ramdisk
201 14:47:31.488484 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 14:47:31.488592 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 14:47:31.488675 [common] Applying overlay to NFS
204 14:47:31.488749 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7462808/compress-overlay-u5z62mfy/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7462808/extract-nfsrootfs-nnhukygd
205 14:47:31.929032 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 14:47:31.929204 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 14:47:31.929303 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 14:47:31.929395 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 14:47:31.929478 Building ramdisk /var/lib/lava/dispatcher/tmp/7462808/extract-overlay-ramdisk-qlibp4jm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7462808/extract-overlay-ramdisk-qlibp4jm/ramdisk
210 14:47:31.962210 >> 24434 blocks
211 14:47:32.421685 rename /var/lib/lava/dispatcher/tmp/7462808/extract-overlay-ramdisk-qlibp4jm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
212 14:47:32.422103 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 14:47:32.422226 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
214 14:47:32.422331 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
215 14:47:32.422430 No mkimage arch provided, not using FIT.
216 14:47:32.422520 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 14:47:32.422607 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 14:47:32.422712 end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
219 14:47:32.422808 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
220 14:47:32.422888 No LXC device requested
221 14:47:32.422972 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 14:47:32.423062 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
223 14:47:32.423145 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 14:47:32.423220 Checking files for TFTP limit of 4294967296 bytes.
225 14:47:32.423610 end: 1 tftp-deploy (duration 00:00:21) [common]
226 14:47:32.423725 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 14:47:32.423822 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 14:47:32.423952 substitutions:
229 14:47:32.424023 - {DTB}: None
230 14:47:32.424088 - {INITRD}: 7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
231 14:47:32.424152 - {KERNEL}: 7462808/tftp-deploy-hisg471z/kernel/bzImage
232 14:47:32.424213 - {LAVA_MAC}: None
233 14:47:32.424272 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7462808/extract-nfsrootfs-nnhukygd
234 14:47:32.424333 - {NFS_SERVER_IP}: 192.168.201.1
235 14:47:32.424391 - {PRESEED_CONFIG}: None
236 14:47:32.424449 - {PRESEED_LOCAL}: None
237 14:47:32.424506 - {RAMDISK}: 7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
238 14:47:32.424563 - {ROOT_PART}: None
239 14:47:32.424620 - {ROOT}: None
240 14:47:32.424676 - {SERVER_IP}: 192.168.201.1
241 14:47:32.424732 - {TEE}: None
242 14:47:32.424788 Parsed boot commands:
243 14:47:32.424845 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 14:47:32.425000 Parsed boot commands: tftpboot 192.168.201.1 7462808/tftp-deploy-hisg471z/kernel/bzImage 7462808/tftp-deploy-hisg471z/kernel/cmdline 7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
245 14:47:32.425094 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 14:47:32.425183 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 14:47:32.425276 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 14:47:32.425364 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 14:47:32.425437 Not connected, no need to disconnect.
250 14:47:32.425515 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 14:47:32.425598 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 14:47:32.425665 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-5'
253 14:47:32.428322 Setting prompt string to ['lava-test: # ']
254 14:47:32.428610 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 14:47:32.428711 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 14:47:32.428814 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 14:47:32.428906 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 14:47:32.429081 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=reboot'
259 14:47:32.447596 >> Command sent successfully.
260 14:47:32.449537 Returned 0 in 0 seconds
261 14:47:32.550287 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 14:47:32.550593 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 14:47:32.550712 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 14:47:32.550817 Setting prompt string to 'Starting depthcharge on Voema...'
266 14:47:32.550883 Changing prompt to 'Starting depthcharge on Voema...'
267 14:47:32.550952 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 14:47:32.551222 [Enter `^Ec?' for help]
269 14:47:40.470482
270 14:47:40.471070
271 14:47:40.480496 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 14:47:40.484031 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 14:47:40.490940 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 14:47:40.493568 CPU: AES supported, TXT NOT supported, VT supported
275 14:47:40.500387 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 14:47:40.504197 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 14:47:40.510312 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 14:47:40.514120 VBOOT: Loading verstage.
279 14:47:40.516959 FMAP: Found \"FLASH\" version 1.1 at 0x1804000.
280 14:47:40.523911 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 14:47:40.527068 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 14:47:40.537733 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
283 14:47:40.544258 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
284 14:47:40.544715
285 14:47:40.545163
286 14:47:40.557376 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
287 14:47:40.571361 Probing TPM: . done!
288 14:47:40.575033 TPM ready after 0 ms
289 14:47:40.577547 Connected to device vid:did:rid of 1ae0:0028:00
290 14:47:40.589284 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
291 14:47:40.596138 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
292 14:47:40.599384 Initialized TPM device CR50 revision 0
293 14:47:40.650031 tlcl_send_startup: Startup return code is 0
294 14:47:40.650620 TPM: setup succeeded
295 14:47:40.665145 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
296 14:47:40.679238 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
297 14:47:40.691873 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
298 14:47:40.701637 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
299 14:47:40.705560 Chrome EC: UHEPI supported
300 14:47:40.709247 Phase 1
301 14:47:40.712334 FMAP: area GBB found @ 1805000 (458752 bytes)
302 14:47:40.719183 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
303 14:47:40.729172 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
304 14:47:40.735573 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
305 14:47:40.742690 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
306 14:47:40.745464 Recovery requested (1009000e)
307 14:47:40.749031 TPM: Extending digest for VBOOT: boot mode into PCR 0
308 14:47:40.760200 tlcl_extend: response is 0
309 14:47:40.767194 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
310 14:47:40.776667 tlcl_extend: response is 0
311 14:47:40.783218 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
312 14:47:40.790088 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
313 14:47:40.796611 BS: verstage times (exec / console): total (unknown) / 142 ms
314 14:47:40.797153
315 14:47:40.797510
316 14:47:40.809980 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
317 14:47:40.816326 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
318 14:47:40.820260 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
319 14:47:40.823211 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
320 14:47:40.830464 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
321 14:47:40.833092 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
322 14:47:40.836500 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
323 14:47:40.840283 TCO_STS: 0000 0000
324 14:47:40.843288 GEN_PMCON: d0015038 00002200
325 14:47:40.846205 GBLRST_CAUSE: 00000000 00000000
326 14:47:40.846648 HPR_CAUSE0: 00000000
327 14:47:40.849653 prev_sleep_state 5
328 14:47:40.853322 Boot Count incremented to 10489
329 14:47:40.859676 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
330 14:47:40.866777 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 14:47:40.873557 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 14:47:40.879779 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
333 14:47:40.884128 Chrome EC: UHEPI supported
334 14:47:40.891467 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
335 14:47:40.904255 Probing TPM: done!
336 14:47:40.911274 Connected to device vid:did:rid of 1ae0:0028:00
337 14:47:40.922101 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
338 14:47:40.929021 Initialized TPM device CR50 revision 0
339 14:47:40.939735 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
340 14:47:40.945864 MRC: Hash idx 0x100b comparison successful.
341 14:47:40.949016 MRC cache found, size faa8
342 14:47:40.949450 bootmode is set to: 2
343 14:47:40.952712 SPD index = 0
344 14:47:40.959353 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
345 14:47:40.962401 SPD: module type is LPDDR4X
346 14:47:40.965492 SPD: module part number is MT53E512M64D4NW-046
347 14:47:40.972642 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
348 14:47:40.976113 SPD: device width 16 bits, bus width 16 bits
349 14:47:40.982563 SPD: module size is 1024 MB (per channel)
350 14:47:41.413059 CBMEM:
351 14:47:41.416450 IMD: root @ 0x76fff000 254 entries.
352 14:47:41.420189 IMD: root @ 0x76ffec00 62 entries.
353 14:47:41.423584 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
354 14:47:41.429888 FMAP: area RW_VPD found @ f35000 (8192 bytes)
355 14:47:41.433169 External stage cache:
356 14:47:41.436705 IMD: root @ 0x7b3ff000 254 entries.
357 14:47:41.439865 IMD: root @ 0x7b3fec00 62 entries.
358 14:47:41.455069 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
359 14:47:41.461895 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
360 14:47:41.468329 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
361 14:47:41.482637 MRC: 'RECOVERY_MRC_CACHE' does not need update.
362 14:47:41.489343 cse_lite: Skip switching to RW in the recovery path
363 14:47:41.489790 8 DIMMs found
364 14:47:41.490149 SMM Memory Map
365 14:47:41.492632 SMRAM : 0x7b000000 0x800000
366 14:47:41.496880 Subregion 0: 0x7b000000 0x200000
367 14:47:41.500096 Subregion 1: 0x7b200000 0x200000
368 14:47:41.503446 Subregion 2: 0x7b400000 0x400000
369 14:47:41.506777 top_of_ram = 0x77000000
370 14:47:41.513832 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
371 14:47:41.517052 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
372 14:47:41.523582 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
373 14:47:41.527309 MTRR Range: Start=ff000000 End=0 (Size 1000000)
374 14:47:41.533941 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
375 14:47:41.540490 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
376 14:47:41.552657 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
377 14:47:41.558800 Processing 211 relocs. Offset value of 0x74c0b000
378 14:47:41.565370 BS: romstage times (exec / console): total (unknown) / 277 ms
379 14:47:41.571539
380 14:47:41.572123
381 14:47:41.581492 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
382 14:47:41.584979 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
383 14:47:41.594850 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
384 14:47:41.600935 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
385 14:47:41.607792 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
386 14:47:41.614394 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
387 14:47:41.661479 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
388 14:47:41.668005 Processing 5008 relocs. Offset value of 0x75d98000
389 14:47:41.670761 BS: postcar times (exec / console): total (unknown) / 59 ms
390 14:47:41.674266
391 14:47:41.674501
392 14:47:41.684828 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
393 14:47:41.685027 Normal boot
394 14:47:41.687693 FW_CONFIG value is 0x804c02
395 14:47:41.691149 PCI: 00:07.0 disabled by fw_config
396 14:47:41.694551 PCI: 00:07.1 disabled by fw_config
397 14:47:41.697361 PCI: 00:0d.2 disabled by fw_config
398 14:47:41.700832 PCI: 00:1c.7 disabled by fw_config
399 14:47:41.707277 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
400 14:47:41.713939 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
401 14:47:41.717295 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
402 14:47:41.720645 GENERIC: 0.0 disabled by fw_config
403 14:47:41.727429 GENERIC: 1.0 disabled by fw_config
404 14:47:41.730455 fw_config match found: DB_USB=USB3_ACTIVE
405 14:47:41.733832 fw_config match found: DB_USB=USB3_ACTIVE
406 14:47:41.737298 fw_config match found: DB_USB=USB3_ACTIVE
407 14:47:41.743684 fw_config match found: DB_USB=USB3_ACTIVE
408 14:47:41.747331 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
409 14:47:41.753715 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
410 14:47:41.763828 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
411 14:47:41.770353 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
412 14:47:41.774005 microcode: sig=0x806c1 pf=0x80 revision=0x86
413 14:47:41.780262 microcode: Update skipped, already up-to-date
414 14:47:41.787019 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
415 14:47:41.814575 Detected 4 core, 8 thread CPU.
416 14:47:41.817899 Setting up SMI for CPU
417 14:47:41.821062 IED base = 0x7b400000
418 14:47:41.821228 IED size = 0x00400000
419 14:47:41.824312 Will perform SMM setup.
420 14:47:41.831075 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
421 14:47:41.838172 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
422 14:47:41.844564 Processing 16 relocs. Offset value of 0x00030000
423 14:47:41.847987 Attempting to start 7 APs
424 14:47:41.851655 Waiting for 10ms after sending INIT.
425 14:47:41.867425 Waiting for 1st SIPI to complete...done.
426 14:47:41.868172 AP: slot 1 apic_id 1.
427 14:47:41.870346 AP: slot 6 apic_id 3.
428 14:47:41.874029 AP: slot 3 apic_id 2.
429 14:47:41.874576 AP: slot 7 apic_id 5.
430 14:47:41.877469 AP: slot 4 apic_id 4.
431 14:47:41.880072 Waiting for 2nd SIPI to complete...done.
432 14:47:41.883399 AP: slot 5 apic_id 6.
433 14:47:41.886720 AP: slot 2 apic_id 7.
434 14:47:41.893779 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
435 14:47:41.900281 Processing 13 relocs. Offset value of 0x00038000
436 14:47:41.900717 Unable to locate Global NVS
437 14:47:41.910168 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
438 14:47:41.913961 Installing permanent SMM handler to 0x7b000000
439 14:47:41.923746 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
440 14:47:41.926855 Processing 794 relocs. Offset value of 0x7b010000
441 14:47:41.936882 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
442 14:47:41.940247 Processing 13 relocs. Offset value of 0x7b008000
443 14:47:41.946309 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
444 14:47:41.953151 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
445 14:47:41.956822 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
446 14:47:41.963528 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
447 14:47:41.970042 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
448 14:47:41.977036 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
449 14:47:41.983330 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
450 14:47:41.983928 Unable to locate Global NVS
451 14:47:41.992979 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
452 14:47:41.996368 Clearing SMI status registers
453 14:47:41.996802 SMI_STS: PM1
454 14:47:42.000038 PM1_STS: PWRBTN
455 14:47:42.006459 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
456 14:47:42.009911 In relocation handler: CPU 0
457 14:47:42.013340 New SMBASE=0x7b000000 IEDBASE=0x7b400000
458 14:47:42.019420 Writing SMRR. base = 0x7b000006, mask=0xff800c00
459 14:47:42.019893 Relocation complete.
460 14:47:42.029404 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
461 14:47:42.029952 In relocation handler: CPU 1
462 14:47:42.036201 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
463 14:47:42.036757 Relocation complete.
464 14:47:42.042648 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
465 14:47:42.046133 In relocation handler: CPU 3
466 14:47:42.053600 New SMBASE=0x7afff400 IEDBASE=0x7b400000
467 14:47:42.056297 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 14:47:42.059690 Relocation complete.
469 14:47:42.066641 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
470 14:47:42.069417 In relocation handler: CPU 6
471 14:47:42.072854 New SMBASE=0x7affe800 IEDBASE=0x7b400000
472 14:47:42.076711 Relocation complete.
473 14:47:42.082893 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
474 14:47:42.086582 In relocation handler: CPU 5
475 14:47:42.089885 New SMBASE=0x7affec00 IEDBASE=0x7b400000
476 14:47:42.092822 Writing SMRR. base = 0x7b000006, mask=0xff800c00
477 14:47:42.096298 Relocation complete.
478 14:47:42.102983 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
479 14:47:42.106463 In relocation handler: CPU 2
480 14:47:42.110199 New SMBASE=0x7afff800 IEDBASE=0x7b400000
481 14:47:42.112973 Relocation complete.
482 14:47:42.119817 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 14:47:42.123217 In relocation handler: CPU 7
484 14:47:42.126762 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 14:47:42.129961 Relocation complete.
486 14:47:42.136806 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
487 14:47:42.139547 In relocation handler: CPU 4
488 14:47:42.143153 New SMBASE=0x7afff000 IEDBASE=0x7b400000
489 14:47:42.149979 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 14:47:42.150524 Relocation complete.
491 14:47:42.152823 Initializing CPU #0
492 14:47:42.156285 CPU: vendor Intel device 806c1
493 14:47:42.160010 CPU: family 06, model 8c, stepping 01
494 14:47:42.164368 Clearing out pending MCEs
495 14:47:42.164934 Setting up local APIC...
496 14:47:42.167866 apic_id: 0x00 done.
497 14:47:42.170849 Turbo is available but hidden
498 14:47:42.174083 Turbo is available and visible
499 14:47:42.177544 microcode: Update skipped, already up-to-date
500 14:47:42.180796 CPU #0 initialized
501 14:47:42.183980 Initializing CPU #7
502 14:47:42.184473 Initializing CPU #4
503 14:47:42.187421 CPU: vendor Intel device 806c1
504 14:47:42.190492 CPU: family 06, model 8c, stepping 01
505 14:47:42.194274 CPU: vendor Intel device 806c1
506 14:47:42.197377 CPU: family 06, model 8c, stepping 01
507 14:47:42.200369 Clearing out pending MCEs
508 14:47:42.203781 Clearing out pending MCEs
509 14:47:42.207187 Setting up local APIC...
510 14:47:42.207628 Initializing CPU #1
511 14:47:42.210653 Setting up local APIC...
512 14:47:42.214226 Initializing CPU #6
513 14:47:42.214770 Initializing CPU #3
514 14:47:42.217383 CPU: vendor Intel device 806c1
515 14:47:42.220365 CPU: family 06, model 8c, stepping 01
516 14:47:42.223617 CPU: vendor Intel device 806c1
517 14:47:42.230522 CPU: family 06, model 8c, stepping 01
518 14:47:42.231088 Clearing out pending MCEs
519 14:47:42.233652 Clearing out pending MCEs
520 14:47:42.237106 Setting up local APIC...
521 14:47:42.237660 apic_id: 0x04 done.
522 14:47:42.240602 apic_id: 0x05 done.
523 14:47:42.247508 microcode: Update skipped, already up-to-date
524 14:47:42.250225 microcode: Update skipped, already up-to-date
525 14:47:42.250669 CPU #4 initialized
526 14:47:42.253638 CPU #7 initialized
527 14:47:42.257185 Initializing CPU #2
528 14:47:42.257726 Initializing CPU #5
529 14:47:42.260619 CPU: vendor Intel device 806c1
530 14:47:42.264252 CPU: family 06, model 8c, stepping 01
531 14:47:42.267290 CPU: vendor Intel device 806c1
532 14:47:42.270452 CPU: family 06, model 8c, stepping 01
533 14:47:42.274188 Clearing out pending MCEs
534 14:47:42.277527 Clearing out pending MCEs
535 14:47:42.280280 Setting up local APIC...
536 14:47:42.284277 CPU: vendor Intel device 806c1
537 14:47:42.287159 CPU: family 06, model 8c, stepping 01
538 14:47:42.290270 apic_id: 0x03 done.
539 14:47:42.290708 Setting up local APIC...
540 14:47:42.293693 Clearing out pending MCEs
541 14:47:42.297261 apic_id: 0x02 done.
542 14:47:42.300460 microcode: Update skipped, already up-to-date
543 14:47:42.307045 microcode: Update skipped, already up-to-date
544 14:47:42.307485 CPU #6 initialized
545 14:47:42.310285 CPU #3 initialized
546 14:47:42.310680 Setting up local APIC...
547 14:47:42.313987 Setting up local APIC...
548 14:47:42.317306 apic_id: 0x07 done.
549 14:47:42.320538 apic_id: 0x06 done.
550 14:47:42.323536 microcode: Update skipped, already up-to-date
551 14:47:42.327032 microcode: Update skipped, already up-to-date
552 14:47:42.330139 CPU #2 initialized
553 14:47:42.330590 CPU #5 initialized
554 14:47:42.333514 apic_id: 0x01 done.
555 14:47:42.337137 microcode: Update skipped, already up-to-date
556 14:47:42.340445 CPU #1 initialized
557 14:47:42.343755 bsp_do_flight_plan done after 459 msecs.
558 14:47:42.347364 CPU: frequency set to 4000 MHz
559 14:47:42.350570 Enabling SMIs.
560 14:47:42.357277 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
561 14:47:42.372025 SATAXPCIE1 indicates PCIe NVMe is present
562 14:47:42.375353 Probing TPM: done!
563 14:47:42.379033 Connected to device vid:did:rid of 1ae0:0028:00
564 14:47:42.389320 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
565 14:47:42.392356 Initialized TPM device CR50 revision 0
566 14:47:42.395876 Enabling S0i3.4
567 14:47:42.402463 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
568 14:47:42.406182 Found a VBT of 8704 bytes after decompression
569 14:47:42.412926 cse_lite: CSE RO boot. HybridStorageMode disabled
570 14:47:42.419792 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
571 14:47:42.494574 FSPS returned 0
572 14:47:42.497710 Executing Phase 1 of FspMultiPhaseSiInit
573 14:47:42.507449 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
574 14:47:42.510772 port C0 DISC req: usage 1 usb3 1 usb2 5
575 14:47:42.514515 Raw Buffer output 0 00000511
576 14:47:42.517682 Raw Buffer output 1 00000000
577 14:47:42.521255 pmc_send_ipc_cmd succeeded
578 14:47:42.528272 port C1 DISC req: usage 1 usb3 2 usb2 3
579 14:47:42.528818 Raw Buffer output 0 00000321
580 14:47:42.531300 Raw Buffer output 1 00000000
581 14:47:42.535583 pmc_send_ipc_cmd succeeded
582 14:47:42.540753 Detected 4 core, 8 thread CPU.
583 14:47:42.543945 Detected 4 core, 8 thread CPU.
584 14:47:42.777382 Display FSP Version Info HOB
585 14:47:42.780750 Reference Code - CPU = a.0.4c.31
586 14:47:42.783710 uCode Version = 0.0.0.86
587 14:47:42.787385 TXT ACM version = ff.ff.ff.ffff
588 14:47:42.790345 Reference Code - ME = a.0.4c.31
589 14:47:42.793744 MEBx version = 0.0.0.0
590 14:47:42.797687 ME Firmware Version = Consumer SKU
591 14:47:42.800683 Reference Code - PCH = a.0.4c.31
592 14:47:42.803508 PCH-CRID Status = Disabled
593 14:47:42.807171 PCH-CRID Original Value = ff.ff.ff.ffff
594 14:47:42.810375 PCH-CRID New Value = ff.ff.ff.ffff
595 14:47:42.813964 OPROM - RST - RAID = ff.ff.ff.ffff
596 14:47:42.817655 PCH Hsio Version = 4.0.0.0
597 14:47:42.820247 Reference Code - SA - System Agent = a.0.4c.31
598 14:47:42.823752 Reference Code - MRC = 2.0.0.1
599 14:47:42.827194 SA - PCIe Version = a.0.4c.31
600 14:47:42.830978 SA-CRID Status = Disabled
601 14:47:42.833691 SA-CRID Original Value = 0.0.0.1
602 14:47:42.837361 SA-CRID New Value = 0.0.0.1
603 14:47:42.840786 OPROM - VBIOS = ff.ff.ff.ffff
604 14:47:42.844471 IO Manageability Engine FW Version = 11.1.4.0
605 14:47:42.847124 PHY Build Version = 0.0.0.e0
606 14:47:42.850702 Thunderbolt(TM) FW Version = 0.0.0.0
607 14:47:42.857156 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
608 14:47:42.861113 ITSS IRQ Polarities Before:
609 14:47:42.861546 IPC0: 0xffffffff
610 14:47:42.863747 IPC1: 0xffffffff
611 14:47:42.864178 IPC2: 0xffffffff
612 14:47:42.867408 IPC3: 0xffffffff
613 14:47:42.871061 ITSS IRQ Polarities After:
614 14:47:42.871627 IPC0: 0xffffffff
615 14:47:42.873988 IPC1: 0xffffffff
616 14:47:42.874442 IPC2: 0xffffffff
617 14:47:42.877386 IPC3: 0xffffffff
618 14:47:42.881204 Found PCIe Root Port #9 at PCI: 00:1d.0.
619 14:47:42.893956 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
620 14:47:42.904045 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
621 14:47:42.917288 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
622 14:47:42.924339 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
623 14:47:42.924877 Enumerating buses...
624 14:47:42.930893 Show all devs... Before device enumeration.
625 14:47:42.931449 Root Device: enabled 1
626 14:47:42.933962 DOMAIN: 0000: enabled 1
627 14:47:42.936933 CPU_CLUSTER: 0: enabled 1
628 14:47:42.940566 PCI: 00:00.0: enabled 1
629 14:47:42.940992 PCI: 00:02.0: enabled 1
630 14:47:42.943991 PCI: 00:04.0: enabled 1
631 14:47:42.946846 PCI: 00:05.0: enabled 1
632 14:47:42.950366 PCI: 00:06.0: enabled 0
633 14:47:42.950808 PCI: 00:07.0: enabled 0
634 14:47:42.953646 PCI: 00:07.1: enabled 0
635 14:47:42.956893 PCI: 00:07.2: enabled 0
636 14:47:42.960190 PCI: 00:07.3: enabled 0
637 14:47:42.960619 PCI: 00:08.0: enabled 1
638 14:47:42.964040 PCI: 00:09.0: enabled 0
639 14:47:42.966963 PCI: 00:0a.0: enabled 0
640 14:47:42.970209 PCI: 00:0d.0: enabled 1
641 14:47:42.970740 PCI: 00:0d.1: enabled 0
642 14:47:42.973456 PCI: 00:0d.2: enabled 0
643 14:47:42.976918 PCI: 00:0d.3: enabled 0
644 14:47:42.977347 PCI: 00:0e.0: enabled 0
645 14:47:42.980693 PCI: 00:10.2: enabled 1
646 14:47:42.983622 PCI: 00:10.6: enabled 0
647 14:47:42.987139 PCI: 00:10.7: enabled 0
648 14:47:42.987573 PCI: 00:12.0: enabled 0
649 14:47:42.990337 PCI: 00:12.6: enabled 0
650 14:47:42.993827 PCI: 00:13.0: enabled 0
651 14:47:42.997522 PCI: 00:14.0: enabled 1
652 14:47:42.998057 PCI: 00:14.1: enabled 0
653 14:47:43.000340 PCI: 00:14.2: enabled 1
654 14:47:43.003492 PCI: 00:14.3: enabled 1
655 14:47:43.006804 PCI: 00:15.0: enabled 1
656 14:47:43.007233 PCI: 00:15.1: enabled 1
657 14:47:43.010541 PCI: 00:15.2: enabled 1
658 14:47:43.014311 PCI: 00:15.3: enabled 1
659 14:47:43.014841 PCI: 00:16.0: enabled 1
660 14:47:43.016967 PCI: 00:16.1: enabled 0
661 14:47:43.020265 PCI: 00:16.2: enabled 0
662 14:47:43.023852 PCI: 00:16.3: enabled 0
663 14:47:43.024384 PCI: 00:16.4: enabled 0
664 14:47:43.027521 PCI: 00:16.5: enabled 0
665 14:47:43.030350 PCI: 00:17.0: enabled 1
666 14:47:43.033698 PCI: 00:19.0: enabled 0
667 14:47:43.034137 PCI: 00:19.1: enabled 1
668 14:47:43.037387 PCI: 00:19.2: enabled 0
669 14:47:43.040350 PCI: 00:1c.0: enabled 1
670 14:47:43.043976 PCI: 00:1c.1: enabled 0
671 14:47:43.044515 PCI: 00:1c.2: enabled 0
672 14:47:43.046705 PCI: 00:1c.3: enabled 0
673 14:47:43.050427 PCI: 00:1c.4: enabled 0
674 14:47:43.051006 PCI: 00:1c.5: enabled 0
675 14:47:43.053904 PCI: 00:1c.6: enabled 1
676 14:47:43.056759 PCI: 00:1c.7: enabled 0
677 14:47:43.060829 PCI: 00:1d.0: enabled 1
678 14:47:43.061378 PCI: 00:1d.1: enabled 0
679 14:47:43.063729 PCI: 00:1d.2: enabled 1
680 14:47:43.066915 PCI: 00:1d.3: enabled 0
681 14:47:43.070323 PCI: 00:1e.0: enabled 1
682 14:47:43.070757 PCI: 00:1e.1: enabled 0
683 14:47:43.073753 PCI: 00:1e.2: enabled 1
684 14:47:43.077420 PCI: 00:1e.3: enabled 1
685 14:47:43.080639 PCI: 00:1f.0: enabled 1
686 14:47:43.081178 PCI: 00:1f.1: enabled 0
687 14:47:43.084025 PCI: 00:1f.2: enabled 1
688 14:47:43.087361 PCI: 00:1f.3: enabled 1
689 14:47:43.087982 PCI: 00:1f.4: enabled 0
690 14:47:43.090125 PCI: 00:1f.5: enabled 1
691 14:47:43.093714 PCI: 00:1f.6: enabled 0
692 14:47:43.097203 PCI: 00:1f.7: enabled 0
693 14:47:43.097740 APIC: 00: enabled 1
694 14:47:43.100158 GENERIC: 0.0: enabled 1
695 14:47:43.103861 GENERIC: 0.0: enabled 1
696 14:47:43.104405 GENERIC: 1.0: enabled 1
697 14:47:43.107019 GENERIC: 0.0: enabled 1
698 14:47:43.110025 GENERIC: 1.0: enabled 1
699 14:47:43.113913 USB0 port 0: enabled 1
700 14:47:43.114452 GENERIC: 0.0: enabled 1
701 14:47:43.116952 USB0 port 0: enabled 1
702 14:47:43.120367 GENERIC: 0.0: enabled 1
703 14:47:43.123794 I2C: 00:1a: enabled 1
704 14:47:43.124228 I2C: 00:31: enabled 1
705 14:47:43.127025 I2C: 00:32: enabled 1
706 14:47:43.130309 I2C: 00:10: enabled 1
707 14:47:43.130743 I2C: 00:15: enabled 1
708 14:47:43.133923 GENERIC: 0.0: enabled 0
709 14:47:43.136710 GENERIC: 1.0: enabled 0
710 14:47:43.137318 GENERIC: 0.0: enabled 1
711 14:47:43.140236 SPI: 00: enabled 1
712 14:47:43.143667 SPI: 00: enabled 1
713 14:47:43.144125 PNP: 0c09.0: enabled 1
714 14:47:43.146554 GENERIC: 0.0: enabled 1
715 14:47:43.150137 USB3 port 0: enabled 1
716 14:47:43.150567 USB3 port 1: enabled 1
717 14:47:43.153598 USB3 port 2: enabled 0
718 14:47:43.156929 USB3 port 3: enabled 0
719 14:47:43.159769 USB2 port 0: enabled 0
720 14:47:43.160147 USB2 port 1: enabled 1
721 14:47:43.163149 USB2 port 2: enabled 1
722 14:47:43.166853 USB2 port 3: enabled 0
723 14:47:43.167280 USB2 port 4: enabled 1
724 14:47:43.170340 USB2 port 5: enabled 0
725 14:47:43.173141 USB2 port 6: enabled 0
726 14:47:43.176804 USB2 port 7: enabled 0
727 14:47:43.177339 USB2 port 8: enabled 0
728 14:47:43.180343 USB2 port 9: enabled 0
729 14:47:43.183846 USB3 port 0: enabled 0
730 14:47:43.184369 USB3 port 1: enabled 1
731 14:47:43.186834 USB3 port 2: enabled 0
732 14:47:43.190235 USB3 port 3: enabled 0
733 14:47:43.190682 GENERIC: 0.0: enabled 1
734 14:47:43.193105 GENERIC: 1.0: enabled 1
735 14:47:43.196853 APIC: 01: enabled 1
736 14:47:43.197377 APIC: 07: enabled 1
737 14:47:43.199881 APIC: 02: enabled 1
738 14:47:43.203645 APIC: 04: enabled 1
739 14:47:43.204251 APIC: 06: enabled 1
740 14:47:43.206870 APIC: 03: enabled 1
741 14:47:43.210274 APIC: 05: enabled 1
742 14:47:43.210823 Compare with tree...
743 14:47:43.213475 Root Device: enabled 1
744 14:47:43.217321 DOMAIN: 0000: enabled 1
745 14:47:43.217916 PCI: 00:00.0: enabled 1
746 14:47:43.219775 PCI: 00:02.0: enabled 1
747 14:47:43.223443 PCI: 00:04.0: enabled 1
748 14:47:43.226907 GENERIC: 0.0: enabled 1
749 14:47:43.230207 PCI: 00:05.0: enabled 1
750 14:47:43.230659 PCI: 00:06.0: enabled 0
751 14:47:43.233570 PCI: 00:07.0: enabled 0
752 14:47:43.236605 GENERIC: 0.0: enabled 1
753 14:47:43.239805 PCI: 00:07.1: enabled 0
754 14:47:43.243045 GENERIC: 1.0: enabled 1
755 14:47:43.243625 PCI: 00:07.2: enabled 0
756 14:47:43.246596 GENERIC: 0.0: enabled 1
757 14:47:43.250098 PCI: 00:07.3: enabled 0
758 14:47:43.253363 GENERIC: 1.0: enabled 1
759 14:47:43.256865 PCI: 00:08.0: enabled 1
760 14:47:43.257439 PCI: 00:09.0: enabled 0
761 14:47:43.259825 PCI: 00:0a.0: enabled 0
762 14:47:43.263477 PCI: 00:0d.0: enabled 1
763 14:47:43.266563 USB0 port 0: enabled 1
764 14:47:43.270207 USB3 port 0: enabled 1
765 14:47:43.273355 USB3 port 1: enabled 1
766 14:47:43.273843 USB3 port 2: enabled 0
767 14:47:43.276708 USB3 port 3: enabled 0
768 14:47:43.280265 PCI: 00:0d.1: enabled 0
769 14:47:43.283309 PCI: 00:0d.2: enabled 0
770 14:47:43.286855 GENERIC: 0.0: enabled 1
771 14:47:43.287383 PCI: 00:0d.3: enabled 0
772 14:47:43.289938 PCI: 00:0e.0: enabled 0
773 14:47:43.292896 PCI: 00:10.2: enabled 1
774 14:47:43.296458 PCI: 00:10.6: enabled 0
775 14:47:43.300235 PCI: 00:10.7: enabled 0
776 14:47:43.300761 PCI: 00:12.0: enabled 0
777 14:47:43.303656 PCI: 00:12.6: enabled 0
778 14:47:43.306846 PCI: 00:13.0: enabled 0
779 14:47:43.310097 PCI: 00:14.0: enabled 1
780 14:47:43.310685 USB0 port 0: enabled 1
781 14:47:43.313523 USB2 port 0: enabled 0
782 14:47:43.316990 USB2 port 1: enabled 1
783 14:47:43.320091 USB2 port 2: enabled 1
784 14:47:43.323383 USB2 port 3: enabled 0
785 14:47:43.326641 USB2 port 4: enabled 1
786 14:47:43.327170 USB2 port 5: enabled 0
787 14:47:43.330332 USB2 port 6: enabled 0
788 14:47:43.332842 USB2 port 7: enabled 0
789 14:47:43.337143 USB2 port 8: enabled 0
790 14:47:43.339856 USB2 port 9: enabled 0
791 14:47:43.340379 USB3 port 0: enabled 0
792 14:47:43.343258 USB3 port 1: enabled 1
793 14:47:43.346575 USB3 port 2: enabled 0
794 14:47:43.349873 USB3 port 3: enabled 0
795 14:47:43.352827 PCI: 00:14.1: enabled 0
796 14:47:43.356110 PCI: 00:14.2: enabled 1
797 14:47:43.356503 PCI: 00:14.3: enabled 1
798 14:47:43.359952 GENERIC: 0.0: enabled 1
799 14:47:43.363434 PCI: 00:15.0: enabled 1
800 14:47:43.366646 I2C: 00:1a: enabled 1
801 14:47:43.367072 I2C: 00:31: enabled 1
802 14:47:43.370362 I2C: 00:32: enabled 1
803 14:47:43.372814 PCI: 00:15.1: enabled 1
804 14:47:43.376413 I2C: 00:10: enabled 1
805 14:47:43.380374 PCI: 00:15.2: enabled 1
806 14:47:43.380901 PCI: 00:15.3: enabled 1
807 14:47:43.383757 PCI: 00:16.0: enabled 1
808 14:47:43.386188 PCI: 00:16.1: enabled 0
809 14:47:43.389466 PCI: 00:16.2: enabled 0
810 14:47:43.393061 PCI: 00:16.3: enabled 0
811 14:47:43.393484 PCI: 00:16.4: enabled 0
812 14:47:43.396126 PCI: 00:16.5: enabled 0
813 14:47:43.400057 PCI: 00:17.0: enabled 1
814 14:47:43.404140 PCI: 00:19.0: enabled 0
815 14:47:43.404700 PCI: 00:19.1: enabled 1
816 14:47:43.407258 I2C: 00:15: enabled 1
817 14:47:43.410987 PCI: 00:19.2: enabled 0
818 14:47:43.411511 PCI: 00:1d.0: enabled 1
819 14:47:43.414432 GENERIC: 0.0: enabled 1
820 14:47:43.418208 PCI: 00:1e.0: enabled 1
821 14:47:43.420761 PCI: 00:1e.1: enabled 0
822 14:47:43.424375 PCI: 00:1e.2: enabled 1
823 14:47:43.424798 SPI: 00: enabled 1
824 14:47:43.428139 PCI: 00:1e.3: enabled 1
825 14:47:43.431366 SPI: 00: enabled 1
826 14:47:43.434083 PCI: 00:1f.0: enabled 1
827 14:47:43.434504 PNP: 0c09.0: enabled 1
828 14:47:43.437992 PCI: 00:1f.1: enabled 0
829 14:47:43.441158 PCI: 00:1f.2: enabled 1
830 14:47:43.444508 GENERIC: 0.0: enabled 1
831 14:47:43.496372 GENERIC: 0.0: enabled 1
832 14:47:43.496955 GENERIC: 1.0: enabled 1
833 14:47:43.497307 PCI: 00:1f.3: enabled 1
834 14:47:43.497624 PCI: 00:1f.4: enabled 0
835 14:47:43.497929 PCI: 00:1f.5: enabled 1
836 14:47:43.498224 PCI: 00:1f.6: enabled 0
837 14:47:43.498515 PCI: 00:1f.7: enabled 0
838 14:47:43.499180 CPU_CLUSTER: 0: enabled 1
839 14:47:43.499501 APIC: 00: enabled 1
840 14:47:43.499824 APIC: 01: enabled 1
841 14:47:43.500114 APIC: 07: enabled 1
842 14:47:43.500397 APIC: 02: enabled 1
843 14:47:43.500674 APIC: 04: enabled 1
844 14:47:43.500950 APIC: 06: enabled 1
845 14:47:43.501226 APIC: 03: enabled 1
846 14:47:43.501520 APIC: 05: enabled 1
847 14:47:43.501795 Root Device scanning...
848 14:47:43.502069 scan_static_bus for Root Device
849 14:47:43.502341 DOMAIN: 0000 enabled
850 14:47:43.502615 CPU_CLUSTER: 0 enabled
851 14:47:43.502887 DOMAIN: 0000 scanning...
852 14:47:43.546667 PCI: pci_scan_bus for bus 00
853 14:47:43.547204 PCI: 00:00.0 [8086/0000] ops
854 14:47:43.547546 PCI: 00:00.0 [8086/9a12] enabled
855 14:47:43.547912 PCI: 00:02.0 [8086/0000] bus ops
856 14:47:43.548225 PCI: 00:02.0 [8086/9a40] enabled
857 14:47:43.548926 PCI: 00:04.0 [8086/0000] bus ops
858 14:47:43.549266 PCI: 00:04.0 [8086/9a03] enabled
859 14:47:43.549562 PCI: 00:05.0 [8086/9a19] enabled
860 14:47:43.549851 PCI: 00:07.0 [0000/0000] hidden
861 14:47:43.550135 PCI: 00:08.0 [8086/9a11] enabled
862 14:47:43.550416 PCI: 00:0a.0 [8086/9a0d] disabled
863 14:47:43.550750 PCI: 00:0d.0 [8086/0000] bus ops
864 14:47:43.551032 PCI: 00:0d.0 [8086/9a13] enabled
865 14:47:43.551307 PCI: 00:14.0 [8086/0000] bus ops
866 14:47:43.551579 PCI: 00:14.0 [8086/a0ed] enabled
867 14:47:43.556060 PCI: 00:14.2 [8086/a0ef] enabled
868 14:47:43.556485 PCI: 00:14.3 [8086/0000] bus ops
869 14:47:43.559450 PCI: 00:14.3 [8086/a0f0] enabled
870 14:47:43.559898 PCI: 00:15.0 [8086/0000] bus ops
871 14:47:43.563072 PCI: 00:15.0 [8086/a0e8] enabled
872 14:47:43.565995 PCI: 00:15.1 [8086/0000] bus ops
873 14:47:43.569396 PCI: 00:15.1 [8086/a0e9] enabled
874 14:47:43.572551 PCI: 00:15.2 [8086/0000] bus ops
875 14:47:43.576234 PCI: 00:15.2 [8086/a0ea] enabled
876 14:47:43.578930 PCI: 00:15.3 [8086/0000] bus ops
877 14:47:43.582456 PCI: 00:15.3 [8086/a0eb] enabled
878 14:47:43.586144 PCI: 00:16.0 [8086/0000] ops
879 14:47:43.589246 PCI: 00:16.0 [8086/a0e0] enabled
880 14:47:43.595828 PCI: Static device PCI: 00:17.0 not found, disabling it.
881 14:47:43.598803 PCI: 00:19.0 [8086/0000] bus ops
882 14:47:43.602656 PCI: 00:19.0 [8086/a0c5] disabled
883 14:47:43.605901 PCI: 00:19.1 [8086/0000] bus ops
884 14:47:43.608799 PCI: 00:19.1 [8086/a0c6] enabled
885 14:47:43.612439 PCI: 00:1d.0 [8086/0000] bus ops
886 14:47:43.616254 PCI: 00:1d.0 [8086/a0b0] enabled
887 14:47:43.618828 PCI: 00:1e.0 [8086/0000] ops
888 14:47:43.622448 PCI: 00:1e.0 [8086/a0a8] enabled
889 14:47:43.625737 PCI: 00:1e.2 [8086/0000] bus ops
890 14:47:43.629353 PCI: 00:1e.2 [8086/a0aa] enabled
891 14:47:43.632323 PCI: 00:1e.3 [8086/0000] bus ops
892 14:47:43.635981 PCI: 00:1e.3 [8086/a0ab] enabled
893 14:47:43.639169 PCI: 00:1f.0 [8086/0000] bus ops
894 14:47:43.642847 PCI: 00:1f.0 [8086/a087] enabled
895 14:47:43.643380 RTC Init
896 14:47:43.645369 Set power on after power failure.
897 14:47:43.649059 Disabling Deep S3
898 14:47:43.652260 Disabling Deep S3
899 14:47:43.652786 Disabling Deep S4
900 14:47:43.655680 Disabling Deep S4
901 14:47:43.656170 Disabling Deep S5
902 14:47:43.658897 Disabling Deep S5
903 14:47:43.662225 PCI: 00:1f.2 [0000/0000] hidden
904 14:47:43.666219 PCI: 00:1f.3 [8086/0000] bus ops
905 14:47:43.669082 PCI: 00:1f.3 [8086/a0c8] enabled
906 14:47:43.672645 PCI: 00:1f.5 [8086/0000] bus ops
907 14:47:43.675820 PCI: 00:1f.5 [8086/a0a4] enabled
908 14:47:43.678542 PCI: Leftover static devices:
909 14:47:43.678976 PCI: 00:10.2
910 14:47:43.682243 PCI: 00:10.6
911 14:47:43.682796 PCI: 00:10.7
912 14:47:43.683140 PCI: 00:06.0
913 14:47:43.685383 PCI: 00:07.1
914 14:47:43.685807 PCI: 00:07.2
915 14:47:43.689232 PCI: 00:07.3
916 14:47:43.689911 PCI: 00:09.0
917 14:47:43.690449 PCI: 00:0d.1
918 14:47:43.692223 PCI: 00:0d.2
919 14:47:43.692644 PCI: 00:0d.3
920 14:47:43.695779 PCI: 00:0e.0
921 14:47:43.696204 PCI: 00:12.0
922 14:47:43.696543 PCI: 00:12.6
923 14:47:43.698989 PCI: 00:13.0
924 14:47:43.699414 PCI: 00:14.1
925 14:47:43.702826 PCI: 00:16.1
926 14:47:43.703360 PCI: 00:16.2
927 14:47:43.705435 PCI: 00:16.3
928 14:47:43.705903 PCI: 00:16.4
929 14:47:43.706251 PCI: 00:16.5
930 14:47:43.709379 PCI: 00:17.0
931 14:47:43.709906 PCI: 00:19.2
932 14:47:43.711836 PCI: 00:1e.1
933 14:47:43.712265 PCI: 00:1f.1
934 14:47:43.712601 PCI: 00:1f.4
935 14:47:43.715661 PCI: 00:1f.6
936 14:47:43.716230 PCI: 00:1f.7
937 14:47:43.719222 PCI: Check your devicetree.cb.
938 14:47:43.722504 PCI: 00:02.0 scanning...
939 14:47:43.725713 scan_generic_bus for PCI: 00:02.0
940 14:47:43.729379 scan_generic_bus for PCI: 00:02.0 done
941 14:47:43.735536 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
942 14:47:43.736115 PCI: 00:04.0 scanning...
943 14:47:43.739129 scan_generic_bus for PCI: 00:04.0
944 14:47:43.742368 GENERIC: 0.0 enabled
945 14:47:43.749151 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
946 14:47:43.752198 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
947 14:47:43.755105 PCI: 00:0d.0 scanning...
948 14:47:43.758857 scan_static_bus for PCI: 00:0d.0
949 14:47:43.762029 USB0 port 0 enabled
950 14:47:43.765743 USB0 port 0 scanning...
951 14:47:43.768774 scan_static_bus for USB0 port 0
952 14:47:43.769204 USB3 port 0 enabled
953 14:47:43.772080 USB3 port 1 enabled
954 14:47:43.775004 USB3 port 2 disabled
955 14:47:43.775430 USB3 port 3 disabled
956 14:47:43.778858 USB3 port 0 scanning...
957 14:47:43.782122 scan_static_bus for USB3 port 0
958 14:47:43.785224 scan_static_bus for USB3 port 0 done
959 14:47:43.788439 scan_bus: bus USB3 port 0 finished in 6 msecs
960 14:47:43.791820 USB3 port 1 scanning...
961 14:47:43.794961 scan_static_bus for USB3 port 1
962 14:47:43.798696 scan_static_bus for USB3 port 1 done
963 14:47:43.805307 scan_bus: bus USB3 port 1 finished in 6 msecs
964 14:47:43.808625 scan_static_bus for USB0 port 0 done
965 14:47:43.811652 scan_bus: bus USB0 port 0 finished in 43 msecs
966 14:47:43.814817 scan_static_bus for PCI: 00:0d.0 done
967 14:47:43.822060 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
968 14:47:43.825167 PCI: 00:14.0 scanning...
969 14:47:43.828442 scan_static_bus for PCI: 00:14.0
970 14:47:43.828972 USB0 port 0 enabled
971 14:47:43.831984 USB0 port 0 scanning...
972 14:47:43.835215 scan_static_bus for USB0 port 0
973 14:47:43.838319 USB2 port 0 disabled
974 14:47:43.838859 USB2 port 1 enabled
975 14:47:43.841784 USB2 port 2 enabled
976 14:47:43.845138 USB2 port 3 disabled
977 14:47:43.845726 USB2 port 4 enabled
978 14:47:43.848246 USB2 port 5 disabled
979 14:47:43.851502 USB2 port 6 disabled
980 14:47:43.852105 USB2 port 7 disabled
981 14:47:43.854814 USB2 port 8 disabled
982 14:47:43.855238 USB2 port 9 disabled
983 14:47:43.858227 USB3 port 0 disabled
984 14:47:43.861559 USB3 port 1 enabled
985 14:47:43.861989 USB3 port 2 disabled
986 14:47:43.864849 USB3 port 3 disabled
987 14:47:43.868025 USB2 port 1 scanning...
988 14:47:43.871672 scan_static_bus for USB2 port 1
989 14:47:43.875005 scan_static_bus for USB2 port 1 done
990 14:47:43.878389 scan_bus: bus USB2 port 1 finished in 6 msecs
991 14:47:43.881547 USB2 port 2 scanning...
992 14:47:43.885154 scan_static_bus for USB2 port 2
993 14:47:43.888391 scan_static_bus for USB2 port 2 done
994 14:47:43.894592 scan_bus: bus USB2 port 2 finished in 6 msecs
995 14:47:43.895126 USB2 port 4 scanning...
996 14:47:43.898238 scan_static_bus for USB2 port 4
997 14:47:43.901903 scan_static_bus for USB2 port 4 done
998 14:47:43.908204 scan_bus: bus USB2 port 4 finished in 6 msecs
999 14:47:43.911837 USB3 port 1 scanning...
1000 14:47:43.915019 scan_static_bus for USB3 port 1
1001 14:47:43.918527 scan_static_bus for USB3 port 1 done
1002 14:47:43.921470 scan_bus: bus USB3 port 1 finished in 6 msecs
1003 14:47:43.924857 scan_static_bus for USB0 port 0 done
1004 14:47:43.931577 scan_bus: bus USB0 port 0 finished in 93 msecs
1005 14:47:43.934956 scan_static_bus for PCI: 00:14.0 done
1006 14:47:43.937908 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1007 14:47:43.941227 PCI: 00:14.3 scanning...
1008 14:47:43.944684 scan_static_bus for PCI: 00:14.3
1009 14:47:43.948420 GENERIC: 0.0 enabled
1010 14:47:43.951685 scan_static_bus for PCI: 00:14.3 done
1011 14:47:43.954860 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1012 14:47:43.958242 PCI: 00:15.0 scanning...
1013 14:47:43.961235 scan_static_bus for PCI: 00:15.0
1014 14:47:43.964740 I2C: 00:1a enabled
1015 14:47:43.965162 I2C: 00:31 enabled
1016 14:47:43.968067 I2C: 00:32 enabled
1017 14:47:43.971479 scan_static_bus for PCI: 00:15.0 done
1018 14:47:43.974421 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1019 14:47:43.977974 PCI: 00:15.1 scanning...
1020 14:47:43.981854 scan_static_bus for PCI: 00:15.1
1021 14:47:43.985055 I2C: 00:10 enabled
1022 14:47:43.988648 scan_static_bus for PCI: 00:15.1 done
1023 14:47:43.991746 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1024 14:47:43.995261 PCI: 00:15.2 scanning...
1025 14:47:43.998213 scan_static_bus for PCI: 00:15.2
1026 14:47:44.001966 scan_static_bus for PCI: 00:15.2 done
1027 14:47:44.008061 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1028 14:47:44.008596 PCI: 00:15.3 scanning...
1029 14:47:44.011852 scan_static_bus for PCI: 00:15.3
1030 14:47:44.019049 scan_static_bus for PCI: 00:15.3 done
1031 14:47:44.021808 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1032 14:47:44.024947 PCI: 00:19.1 scanning...
1033 14:47:44.028635 scan_static_bus for PCI: 00:19.1
1034 14:47:44.029165 I2C: 00:15 enabled
1035 14:47:44.035131 scan_static_bus for PCI: 00:19.1 done
1036 14:47:44.038141 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1037 14:47:44.041693 PCI: 00:1d.0 scanning...
1038 14:47:44.044748 do_pci_scan_bridge for PCI: 00:1d.0
1039 14:47:44.048292 PCI: pci_scan_bus for bus 01
1040 14:47:44.051364 PCI: 01:00.0 [1c5c/174a] enabled
1041 14:47:44.054957 GENERIC: 0.0 enabled
1042 14:47:44.058317 Enabling Common Clock Configuration
1043 14:47:44.061516 L1 Sub-State supported from root port 29
1044 14:47:44.064792 L1 Sub-State Support = 0xf
1045 14:47:44.068289 CommonModeRestoreTime = 0x28
1046 14:47:44.071526 Power On Value = 0x16, Power On Scale = 0x0
1047 14:47:44.075249 ASPM: Enabled L1
1048 14:47:44.078581 PCIe: Max_Payload_Size adjusted to 128
1049 14:47:44.081635 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1050 14:47:44.084942 PCI: 00:1e.2 scanning...
1051 14:47:44.088213 scan_generic_bus for PCI: 00:1e.2
1052 14:47:44.091606 SPI: 00 enabled
1053 14:47:44.094782 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1054 14:47:44.101711 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1055 14:47:44.104884 PCI: 00:1e.3 scanning...
1056 14:47:44.108034 scan_generic_bus for PCI: 00:1e.3
1057 14:47:44.108589 SPI: 00 enabled
1058 14:47:44.114829 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1059 14:47:44.118363 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1060 14:47:44.121047 PCI: 00:1f.0 scanning...
1061 14:47:44.124405 scan_static_bus for PCI: 00:1f.0
1062 14:47:44.128067 PNP: 0c09.0 enabled
1063 14:47:44.130845 PNP: 0c09.0 scanning...
1064 14:47:44.134460 scan_static_bus for PNP: 0c09.0
1065 14:47:44.137917 scan_static_bus for PNP: 0c09.0 done
1066 14:47:44.141207 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1067 14:47:44.144269 scan_static_bus for PCI: 00:1f.0 done
1068 14:47:44.151312 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1069 14:47:44.154574 PCI: 00:1f.2 scanning...
1070 14:47:44.157241 scan_static_bus for PCI: 00:1f.2
1071 14:47:44.157687 GENERIC: 0.0 enabled
1072 14:47:44.160779 GENERIC: 0.0 scanning...
1073 14:47:44.164174 scan_static_bus for GENERIC: 0.0
1074 14:47:44.167688 GENERIC: 0.0 enabled
1075 14:47:44.168171 GENERIC: 1.0 enabled
1076 14:47:44.174061 scan_static_bus for GENERIC: 0.0 done
1077 14:47:44.177498 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1078 14:47:44.180999 scan_static_bus for PCI: 00:1f.2 done
1079 14:47:44.187806 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1080 14:47:44.188342 PCI: 00:1f.3 scanning...
1081 14:47:44.191171 scan_static_bus for PCI: 00:1f.3
1082 14:47:44.197214 scan_static_bus for PCI: 00:1f.3 done
1083 14:47:44.200671 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1084 14:47:44.204598 PCI: 00:1f.5 scanning...
1085 14:47:44.207629 scan_generic_bus for PCI: 00:1f.5
1086 14:47:44.210924 scan_generic_bus for PCI: 00:1f.5 done
1087 14:47:44.214494 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1088 14:47:44.221026 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1089 14:47:44.224227 scan_static_bus for Root Device done
1090 14:47:44.227376 scan_bus: bus Root Device finished in 737 msecs
1091 14:47:44.231192 done
1092 14:47:44.237468 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1093 14:47:44.237915 Chrome EC: UHEPI supported
1094 14:47:44.244336 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1095 14:47:44.251410 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1096 14:47:44.254241 SPI flash protection: WPSW=0 SRP0=0
1097 14:47:44.260948 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1098 14:47:44.263938 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1099 14:47:44.267884 found VGA at PCI: 00:02.0
1100 14:47:44.271138 Setting up VGA for PCI: 00:02.0
1101 14:47:44.277206 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1102 14:47:44.280786 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1103 14:47:44.284448 Allocating resources...
1104 14:47:44.287732 Reading resources...
1105 14:47:44.290955 Root Device read_resources bus 0 link: 0
1106 14:47:44.293733 DOMAIN: 0000 read_resources bus 0 link: 0
1107 14:47:44.300428 PCI: 00:04.0 read_resources bus 1 link: 0
1108 14:47:44.303826 PCI: 00:04.0 read_resources bus 1 link: 0 done
1109 14:47:44.311242 PCI: 00:0d.0 read_resources bus 0 link: 0
1110 14:47:44.314509 USB0 port 0 read_resources bus 0 link: 0
1111 14:47:44.320959 USB0 port 0 read_resources bus 0 link: 0 done
1112 14:47:44.323976 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1113 14:47:44.330941 PCI: 00:14.0 read_resources bus 0 link: 0
1114 14:47:44.333713 USB0 port 0 read_resources bus 0 link: 0
1115 14:47:44.340849 USB0 port 0 read_resources bus 0 link: 0 done
1116 14:47:44.343782 PCI: 00:14.0 read_resources bus 0 link: 0 done
1117 14:47:44.350534 PCI: 00:14.3 read_resources bus 0 link: 0
1118 14:47:44.353990 PCI: 00:14.3 read_resources bus 0 link: 0 done
1119 14:47:44.357380 PCI: 00:15.0 read_resources bus 0 link: 0
1120 14:47:44.364311 PCI: 00:15.0 read_resources bus 0 link: 0 done
1121 14:47:44.367892 PCI: 00:15.1 read_resources bus 0 link: 0
1122 14:47:44.374439 PCI: 00:15.1 read_resources bus 0 link: 0 done
1123 14:47:44.377457 PCI: 00:19.1 read_resources bus 0 link: 0
1124 14:47:44.384875 PCI: 00:19.1 read_resources bus 0 link: 0 done
1125 14:47:44.388543 PCI: 00:1d.0 read_resources bus 1 link: 0
1126 14:47:44.394429 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1127 14:47:44.397779 PCI: 00:1e.2 read_resources bus 2 link: 0
1128 14:47:44.404543 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1129 14:47:44.408323 PCI: 00:1e.3 read_resources bus 3 link: 0
1130 14:47:44.414804 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1131 14:47:44.418141 PCI: 00:1f.0 read_resources bus 0 link: 0
1132 14:47:44.424665 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1133 14:47:44.428294 PCI: 00:1f.2 read_resources bus 0 link: 0
1134 14:47:44.431897 GENERIC: 0.0 read_resources bus 0 link: 0
1135 14:47:44.438867 GENERIC: 0.0 read_resources bus 0 link: 0 done
1136 14:47:44.441628 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1137 14:47:44.448972 DOMAIN: 0000 read_resources bus 0 link: 0 done
1138 14:47:44.452345 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1139 14:47:44.458573 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1140 14:47:44.462364 Root Device read_resources bus 0 link: 0 done
1141 14:47:44.465601 Done reading resources.
1142 14:47:44.472214 Show resources in subtree (Root Device)...After reading.
1143 14:47:44.475570 Root Device child on link 0 DOMAIN: 0000
1144 14:47:44.479443 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1145 14:47:44.489097 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1146 14:47:44.498613 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1147 14:47:44.502087 PCI: 00:00.0
1148 14:47:44.508904 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1149 14:47:44.518365 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1150 14:47:44.528441 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1151 14:47:44.538876 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1152 14:47:44.548642 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1153 14:47:44.558466 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1154 14:47:44.565492 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1155 14:47:44.575045 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1156 14:47:44.584734 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1157 14:47:44.595167 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1158 14:47:44.604783 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1159 14:47:44.614959 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1160 14:47:44.621702 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1161 14:47:44.631752 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1162 14:47:44.641525 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1163 14:47:44.651432 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1164 14:47:44.660952 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1165 14:47:44.671236 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1166 14:47:44.677884 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1167 14:47:44.688095 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1168 14:47:44.691790 PCI: 00:02.0
1169 14:47:44.701123 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 14:47:44.710671 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1171 14:47:44.720687 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1172 14:47:44.724234 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1173 14:47:44.734076 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1174 14:47:44.737618 GENERIC: 0.0
1175 14:47:44.738057 PCI: 00:05.0
1176 14:47:44.747725 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1177 14:47:44.750896 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1178 14:47:44.754119 GENERIC: 0.0
1179 14:47:44.757588 PCI: 00:08.0
1180 14:47:44.767179 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 14:47:44.767744 PCI: 00:0a.0
1182 14:47:44.770690 PCI: 00:0d.0 child on link 0 USB0 port 0
1183 14:47:44.781122 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1184 14:47:44.787686 USB0 port 0 child on link 0 USB3 port 0
1185 14:47:44.788266 USB3 port 0
1186 14:47:44.790769 USB3 port 1
1187 14:47:44.791308 USB3 port 2
1188 14:47:44.794021 USB3 port 3
1189 14:47:44.797390 PCI: 00:14.0 child on link 0 USB0 port 0
1190 14:47:44.807018 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1191 14:47:44.810579 USB0 port 0 child on link 0 USB2 port 0
1192 14:47:44.814027 USB2 port 0
1193 14:47:44.817637 USB2 port 1
1194 14:47:44.818182 USB2 port 2
1195 14:47:44.820814 USB2 port 3
1196 14:47:44.821250 USB2 port 4
1197 14:47:44.823899 USB2 port 5
1198 14:47:44.824439 USB2 port 6
1199 14:47:44.827247 USB2 port 7
1200 14:47:44.827689 USB2 port 8
1201 14:47:44.830684 USB2 port 9
1202 14:47:44.831122 USB3 port 0
1203 14:47:44.834081 USB3 port 1
1204 14:47:44.834517 USB3 port 2
1205 14:47:44.837098 USB3 port 3
1206 14:47:44.837534 PCI: 00:14.2
1207 14:47:44.847597 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1208 14:47:44.857897 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1209 14:47:44.863994 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1210 14:47:44.874621 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1211 14:47:44.875211 GENERIC: 0.0
1212 14:47:44.880536 PCI: 00:15.0 child on link 0 I2C: 00:1a
1213 14:47:44.890815 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1214 14:47:44.891349 I2C: 00:1a
1215 14:47:44.891699 I2C: 00:31
1216 14:47:44.893729 I2C: 00:32
1217 14:47:44.897138 PCI: 00:15.1 child on link 0 I2C: 00:10
1218 14:47:44.907381 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1219 14:47:44.910467 I2C: 00:10
1220 14:47:44.910953 PCI: 00:15.2
1221 14:47:44.920577 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 14:47:44.924199 PCI: 00:15.3
1223 14:47:44.933994 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1224 14:47:44.934546 PCI: 00:16.0
1225 14:47:44.943963 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 14:47:44.946989 PCI: 00:19.0
1227 14:47:44.950662 PCI: 00:19.1 child on link 0 I2C: 00:15
1228 14:47:44.960396 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 14:47:44.960930 I2C: 00:15
1230 14:47:44.967097 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1231 14:47:44.973598 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1232 14:47:44.983803 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1233 14:47:44.993787 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1234 14:47:44.996853 GENERIC: 0.0
1235 14:47:44.997304 PCI: 01:00.0
1236 14:47:45.007343 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1237 14:47:45.016700 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1238 14:47:45.026755 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1239 14:47:45.027316 PCI: 00:1e.0
1240 14:47:45.039975 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1241 14:47:45.043729 PCI: 00:1e.2 child on link 0 SPI: 00
1242 14:47:45.053886 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 14:47:45.054425 SPI: 00
1244 14:47:45.056849 PCI: 00:1e.3 child on link 0 SPI: 00
1245 14:47:45.066781 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 14:47:45.070098 SPI: 00
1247 14:47:45.073246 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1248 14:47:45.083640 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1249 14:47:45.084211 PNP: 0c09.0
1250 14:47:45.093507 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1251 14:47:45.096598 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1252 14:47:45.107004 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1253 14:47:45.116099 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1254 14:47:45.120032 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1255 14:47:45.123158 GENERIC: 0.0
1256 14:47:45.123687 GENERIC: 1.0
1257 14:47:45.126845 PCI: 00:1f.3
1258 14:47:45.136318 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 14:47:45.146258 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1260 14:47:45.146807 PCI: 00:1f.5
1261 14:47:45.156568 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1262 14:47:45.159398 CPU_CLUSTER: 0 child on link 0 APIC: 00
1263 14:47:45.163028 APIC: 00
1264 14:47:45.163500 APIC: 01
1265 14:47:45.166014 APIC: 07
1266 14:47:45.166456 APIC: 02
1267 14:47:45.166807 APIC: 04
1268 14:47:45.169529 APIC: 06
1269 14:47:45.169972 APIC: 03
1270 14:47:45.173126 APIC: 05
1271 14:47:45.179424 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1272 14:47:45.186289 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1273 14:47:45.189817 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1274 14:47:45.196209 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1275 14:47:45.202848 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1276 14:47:45.205669 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1277 14:47:45.209427 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1278 14:47:45.216028 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1279 14:47:45.222638 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1280 14:47:45.232753 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1281 14:47:45.239424 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1282 14:47:45.246376 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1283 14:47:45.252498 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1284 14:47:45.259228 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1285 14:47:45.269147 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1286 14:47:45.272131 DOMAIN: 0000: Resource ranges:
1287 14:47:45.275885 * Base: 1000, Size: 800, Tag: 100
1288 14:47:45.279088 * Base: 1900, Size: e700, Tag: 100
1289 14:47:45.282990 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1290 14:47:45.288952 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1291 14:47:45.295666 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1292 14:47:45.305521 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1293 14:47:45.312446 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1294 14:47:45.319116 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1295 14:47:45.328835 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1296 14:47:45.336321 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1297 14:47:45.342811 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1298 14:47:45.352436 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1299 14:47:45.359001 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1300 14:47:45.365788 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1301 14:47:45.375337 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1302 14:47:45.382506 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1303 14:47:45.388676 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1304 14:47:45.398453 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1305 14:47:45.405363 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1306 14:47:45.411570 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1307 14:47:45.421997 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1308 14:47:45.428716 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1309 14:47:45.435450 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1310 14:47:45.445123 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1311 14:47:45.451967 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1312 14:47:45.458207 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1313 14:47:45.468785 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1314 14:47:45.471736 DOMAIN: 0000: Resource ranges:
1315 14:47:45.475086 * Base: 7fc00000, Size: 40400000, Tag: 200
1316 14:47:45.478472 * Base: d0000000, Size: 28000000, Tag: 200
1317 14:47:45.481959 * Base: fa000000, Size: 1000000, Tag: 200
1318 14:47:45.488638 * Base: fb001000, Size: 2fff000, Tag: 200
1319 14:47:45.491858 * Base: fe010000, Size: 2e000, Tag: 200
1320 14:47:45.495333 * Base: fe03f000, Size: d41000, Tag: 200
1321 14:47:45.498560 * Base: fed88000, Size: 8000, Tag: 200
1322 14:47:45.504751 * Base: fed93000, Size: d000, Tag: 200
1323 14:47:45.508207 * Base: feda2000, Size: 1e000, Tag: 200
1324 14:47:45.511749 * Base: fede0000, Size: 1220000, Tag: 200
1325 14:47:45.517809 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1326 14:47:45.524857 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1327 14:47:45.531463 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1328 14:47:45.538266 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1329 14:47:45.544737 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1330 14:47:45.552118 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1331 14:47:45.558098 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1332 14:47:45.564289 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1333 14:47:45.571141 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1334 14:47:45.578355 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1335 14:47:45.584441 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1336 14:47:45.591686 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1337 14:47:45.598064 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1338 14:47:45.604281 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1339 14:47:45.611317 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1340 14:47:45.617985 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1341 14:47:45.624459 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1342 14:47:45.631376 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1343 14:47:45.637540 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1344 14:47:45.644374 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1345 14:47:45.650819 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1346 14:47:45.657964 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1347 14:47:45.663908 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1348 14:47:45.671190 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1349 14:47:45.677899 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1350 14:47:45.680764 PCI: 00:1d.0: Resource ranges:
1351 14:47:45.687686 * Base: 7fc00000, Size: 100000, Tag: 200
1352 14:47:45.694187 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1353 14:47:45.700599 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1354 14:47:45.707155 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1355 14:47:45.714100 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1356 14:47:45.720665 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1357 14:47:45.727184 Root Device assign_resources, bus 0 link: 0
1358 14:47:45.730445 DOMAIN: 0000 assign_resources, bus 0 link: 0
1359 14:47:45.740590 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1360 14:47:45.747071 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1361 14:47:45.756938 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1362 14:47:45.763289 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1363 14:47:45.766761 PCI: 00:04.0 assign_resources, bus 1 link: 0
1364 14:47:45.773879 PCI: 00:04.0 assign_resources, bus 1 link: 0
1365 14:47:45.780138 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1366 14:47:45.789753 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1367 14:47:45.796490 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1368 14:47:45.803153 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1369 14:47:45.805933 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1370 14:47:45.816136 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1371 14:47:45.819846 PCI: 00:14.0 assign_resources, bus 0 link: 0
1372 14:47:45.822932 PCI: 00:14.0 assign_resources, bus 0 link: 0
1373 14:47:45.832683 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1374 14:47:45.839521 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1375 14:47:45.849569 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1376 14:47:45.852968 PCI: 00:14.3 assign_resources, bus 0 link: 0
1377 14:47:45.859609 PCI: 00:14.3 assign_resources, bus 0 link: 0
1378 14:47:45.865905 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1379 14:47:45.869257 PCI: 00:15.0 assign_resources, bus 0 link: 0
1380 14:47:45.876232 PCI: 00:15.0 assign_resources, bus 0 link: 0
1381 14:47:45.882362 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1382 14:47:45.889609 PCI: 00:15.1 assign_resources, bus 0 link: 0
1383 14:47:45.892278 PCI: 00:15.1 assign_resources, bus 0 link: 0
1384 14:47:45.902824 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1385 14:47:45.909123 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1386 14:47:45.919330 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1387 14:47:45.925616 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1388 14:47:45.929056 PCI: 00:19.1 assign_resources, bus 0 link: 0
1389 14:47:45.935580 PCI: 00:19.1 assign_resources, bus 0 link: 0
1390 14:47:45.942180 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1391 14:47:45.952014 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1392 14:47:45.962311 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1393 14:47:45.965589 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 14:47:45.975476 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1395 14:47:45.982436 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1396 14:47:45.989061 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1397 14:47:45.995623 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1398 14:47:46.002469 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1399 14:47:46.008800 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1400 14:47:46.012420 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1401 14:47:46.022396 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1402 14:47:46.025830 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1403 14:47:46.028791 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1404 14:47:46.035632 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1405 14:47:46.038864 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1406 14:47:46.045716 LPC: Trying to open IO window from 800 size 1ff
1407 14:47:46.052355 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1408 14:47:46.062190 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1409 14:47:46.069168 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1410 14:47:46.075462 DOMAIN: 0000 assign_resources, bus 0 link: 0
1411 14:47:46.079180 Root Device assign_resources, bus 0 link: 0
1412 14:47:46.082233 Done setting resources.
1413 14:47:46.088956 Show resources in subtree (Root Device)...After assigning values.
1414 14:47:46.092211 Root Device child on link 0 DOMAIN: 0000
1415 14:47:46.095195 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1416 14:47:46.105206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1417 14:47:46.115585 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1418 14:47:46.118692 PCI: 00:00.0
1419 14:47:46.128382 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1420 14:47:46.135455 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1421 14:47:46.145121 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1422 14:47:46.155393 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1423 14:47:46.164905 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1424 14:47:46.175217 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1425 14:47:46.182210 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1426 14:47:46.191505 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1427 14:47:46.201671 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1428 14:47:46.211262 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1429 14:47:46.221451 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1430 14:47:46.231987 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1431 14:47:46.237920 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1432 14:47:46.248052 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1433 14:47:46.258031 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1434 14:47:46.268040 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1435 14:47:46.277732 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1436 14:47:46.287980 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1437 14:47:46.294132 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1438 14:47:46.304304 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1439 14:47:46.307170 PCI: 00:02.0
1440 14:47:46.317614 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1441 14:47:46.327299 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1442 14:47:46.337415 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1443 14:47:46.340643 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1444 14:47:46.354365 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1445 14:47:46.354933 GENERIC: 0.0
1446 14:47:46.357835 PCI: 00:05.0
1447 14:47:46.367752 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1448 14:47:46.370737 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1449 14:47:46.374302 GENERIC: 0.0
1450 14:47:46.374840 PCI: 00:08.0
1451 14:47:46.383828 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1452 14:47:46.387838 PCI: 00:0a.0
1453 14:47:46.390734 PCI: 00:0d.0 child on link 0 USB0 port 0
1454 14:47:46.400485 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1455 14:47:46.407247 USB0 port 0 child on link 0 USB3 port 0
1456 14:47:46.407688 USB3 port 0
1457 14:47:46.410713 USB3 port 1
1458 14:47:46.411107 USB3 port 2
1459 14:47:46.414559 USB3 port 3
1460 14:47:46.417163 PCI: 00:14.0 child on link 0 USB0 port 0
1461 14:47:46.427385 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1462 14:47:46.430464 USB0 port 0 child on link 0 USB2 port 0
1463 14:47:46.434160 USB2 port 0
1464 14:47:46.437844 USB2 port 1
1465 14:47:46.438402 USB2 port 2
1466 14:47:46.440410 USB2 port 3
1467 14:47:46.440863 USB2 port 4
1468 14:47:46.443866 USB2 port 5
1469 14:47:46.444397 USB2 port 6
1470 14:47:46.447366 USB2 port 7
1471 14:47:46.447943 USB2 port 8
1472 14:47:46.450632 USB2 port 9
1473 14:47:46.451103 USB3 port 0
1474 14:47:46.453808 USB3 port 1
1475 14:47:46.454345 USB3 port 2
1476 14:47:46.457443 USB3 port 3
1477 14:47:46.457990 PCI: 00:14.2
1478 14:47:46.470625 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1479 14:47:46.480618 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1480 14:47:46.483857 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1481 14:47:46.493956 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1482 14:47:46.497169 GENERIC: 0.0
1483 14:47:46.501038 PCI: 00:15.0 child on link 0 I2C: 00:1a
1484 14:47:46.510319 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1485 14:47:46.513696 I2C: 00:1a
1486 14:47:46.514138 I2C: 00:31
1487 14:47:46.514486 I2C: 00:32
1488 14:47:46.520335 PCI: 00:15.1 child on link 0 I2C: 00:10
1489 14:47:46.530224 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1490 14:47:46.530667 I2C: 00:10
1491 14:47:46.533997 PCI: 00:15.2
1492 14:47:46.543887 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1493 14:47:46.544440 PCI: 00:15.3
1494 14:47:46.556865 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1495 14:47:46.557413 PCI: 00:16.0
1496 14:47:46.566945 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1497 14:47:46.569830 PCI: 00:19.0
1498 14:47:46.573444 PCI: 00:19.1 child on link 0 I2C: 00:15
1499 14:47:46.583523 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1500 14:47:46.586672 I2C: 00:15
1501 14:47:46.590084 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1502 14:47:46.600111 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1503 14:47:46.609811 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1504 14:47:46.620129 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1505 14:47:46.623524 GENERIC: 0.0
1506 14:47:46.624101 PCI: 01:00.0
1507 14:47:46.636223 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1508 14:47:46.646533 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1509 14:47:46.656241 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1510 14:47:46.656783 PCI: 00:1e.0
1511 14:47:46.669246 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1512 14:47:46.672957 PCI: 00:1e.2 child on link 0 SPI: 00
1513 14:47:46.683296 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1514 14:47:46.683883 SPI: 00
1515 14:47:46.690126 PCI: 00:1e.3 child on link 0 SPI: 00
1516 14:47:46.699637 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1517 14:47:46.700202 SPI: 00
1518 14:47:46.703273 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1519 14:47:46.712909 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1520 14:47:46.716254 PNP: 0c09.0
1521 14:47:46.722670 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1522 14:47:46.729701 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1523 14:47:46.736078 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1524 14:47:46.746336 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1525 14:47:46.753260 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1526 14:47:46.753803 GENERIC: 0.0
1527 14:47:46.756017 GENERIC: 1.0
1528 14:47:46.756449 PCI: 00:1f.3
1529 14:47:46.766289 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1530 14:47:46.776294 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1531 14:47:46.779812 PCI: 00:1f.5
1532 14:47:46.789399 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1533 14:47:46.792509 CPU_CLUSTER: 0 child on link 0 APIC: 00
1534 14:47:46.796150 APIC: 00
1535 14:47:46.796685 APIC: 01
1536 14:47:46.797036 APIC: 07
1537 14:47:46.799517 APIC: 02
1538 14:47:46.799990 APIC: 04
1539 14:47:46.802589 APIC: 06
1540 14:47:46.803051 APIC: 03
1541 14:47:46.803401 APIC: 05
1542 14:47:46.805837 Done allocating resources.
1543 14:47:46.812733 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1544 14:47:46.819588 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 14:47:46.822366 Configure GPIOs for I2S audio on UP4.
1546 14:47:46.829287 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 14:47:46.832600 Enabling resources...
1548 14:47:46.836176 PCI: 00:00.0 subsystem <- 8086/9a12
1549 14:47:46.839543 PCI: 00:00.0 cmd <- 06
1550 14:47:46.842903 PCI: 00:02.0 subsystem <- 8086/9a40
1551 14:47:46.846271 PCI: 00:02.0 cmd <- 03
1552 14:47:46.849126 PCI: 00:04.0 subsystem <- 8086/9a03
1553 14:47:46.849571 PCI: 00:04.0 cmd <- 02
1554 14:47:46.855892 PCI: 00:05.0 subsystem <- 8086/9a19
1555 14:47:46.856441 PCI: 00:05.0 cmd <- 02
1556 14:47:46.859425 PCI: 00:08.0 subsystem <- 8086/9a11
1557 14:47:46.862717 PCI: 00:08.0 cmd <- 06
1558 14:47:46.865745 PCI: 00:0d.0 subsystem <- 8086/9a13
1559 14:47:46.869312 PCI: 00:0d.0 cmd <- 02
1560 14:47:46.872596 PCI: 00:14.0 subsystem <- 8086/a0ed
1561 14:47:46.876200 PCI: 00:14.0 cmd <- 02
1562 14:47:46.878950 PCI: 00:14.2 subsystem <- 8086/a0ef
1563 14:47:46.882623 PCI: 00:14.2 cmd <- 02
1564 14:47:46.885607 PCI: 00:14.3 subsystem <- 8086/a0f0
1565 14:47:46.889288 PCI: 00:14.3 cmd <- 02
1566 14:47:46.892615 PCI: 00:15.0 subsystem <- 8086/a0e8
1567 14:47:46.895428 PCI: 00:15.0 cmd <- 02
1568 14:47:46.899050 PCI: 00:15.1 subsystem <- 8086/a0e9
1569 14:47:46.899673 PCI: 00:15.1 cmd <- 02
1570 14:47:46.905498 PCI: 00:15.2 subsystem <- 8086/a0ea
1571 14:47:46.906174 PCI: 00:15.2 cmd <- 02
1572 14:47:46.908718 PCI: 00:15.3 subsystem <- 8086/a0eb
1573 14:47:46.912125 PCI: 00:15.3 cmd <- 02
1574 14:47:46.915658 PCI: 00:16.0 subsystem <- 8086/a0e0
1575 14:47:46.919244 PCI: 00:16.0 cmd <- 02
1576 14:47:46.922482 PCI: 00:19.1 subsystem <- 8086/a0c6
1577 14:47:46.925312 PCI: 00:19.1 cmd <- 02
1578 14:47:46.928912 PCI: 00:1d.0 bridge ctrl <- 0013
1579 14:47:46.932454 PCI: 00:1d.0 subsystem <- 8086/a0b0
1580 14:47:46.935844 PCI: 00:1d.0 cmd <- 06
1581 14:47:46.938785 PCI: 00:1e.0 subsystem <- 8086/a0a8
1582 14:47:46.941960 PCI: 00:1e.0 cmd <- 06
1583 14:47:46.945336 PCI: 00:1e.2 subsystem <- 8086/a0aa
1584 14:47:46.945782 PCI: 00:1e.2 cmd <- 06
1585 14:47:46.952287 PCI: 00:1e.3 subsystem <- 8086/a0ab
1586 14:47:46.952724 PCI: 00:1e.3 cmd <- 02
1587 14:47:46.955519 PCI: 00:1f.0 subsystem <- 8086/a087
1588 14:47:46.959038 PCI: 00:1f.0 cmd <- 407
1589 14:47:46.962403 PCI: 00:1f.3 subsystem <- 8086/a0c8
1590 14:47:46.966035 PCI: 00:1f.3 cmd <- 02
1591 14:47:46.969144 PCI: 00:1f.5 subsystem <- 8086/a0a4
1592 14:47:46.972645 PCI: 00:1f.5 cmd <- 406
1593 14:47:46.976485 PCI: 01:00.0 cmd <- 02
1594 14:47:46.981184 done.
1595 14:47:46.984621 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1596 14:47:46.988025 Initializing devices...
1597 14:47:46.991457 Root Device init
1598 14:47:46.994744 Chrome EC: Set SMI mask to 0x0000000000000000
1599 14:47:47.001172 Chrome EC: clear events_b mask to 0x0000000000000000
1600 14:47:47.007923 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1601 14:47:47.010685 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1602 14:47:47.017588 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1603 14:47:47.024039 Chrome EC: Set WAKE mask to 0x0000000000000000
1604 14:47:47.027891 fw_config match found: DB_USB=USB3_ACTIVE
1605 14:47:47.034075 Configure Right Type-C port orientation for retimer
1606 14:47:47.037517 Root Device init finished in 42 msecs
1607 14:47:47.040645 PCI: 00:00.0 init
1608 14:47:47.041079 CPU TDP = 9 Watts
1609 14:47:47.044132 CPU PL1 = 9 Watts
1610 14:47:47.046887 CPU PL2 = 40 Watts
1611 14:47:47.047317 CPU PL4 = 83 Watts
1612 14:47:47.050683 PCI: 00:00.0 init finished in 8 msecs
1613 14:47:47.054237 PCI: 00:02.0 init
1614 14:47:47.057269 GMA: Found VBT in CBFS
1615 14:47:47.060504 GMA: Found valid VBT in CBFS
1616 14:47:47.063772 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1617 14:47:47.073956 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1618 14:47:47.077046 PCI: 00:02.0 init finished in 18 msecs
1619 14:47:47.080597 PCI: 00:05.0 init
1620 14:47:47.084144 PCI: 00:05.0 init finished in 0 msecs
1621 14:47:47.084710 PCI: 00:08.0 init
1622 14:47:47.090707 PCI: 00:08.0 init finished in 0 msecs
1623 14:47:47.091238 PCI: 00:14.0 init
1624 14:47:47.097203 PCI: 00:14.0 init finished in 0 msecs
1625 14:47:47.097744 PCI: 00:14.2 init
1626 14:47:47.100242 PCI: 00:14.2 init finished in 0 msecs
1627 14:47:47.103808 PCI: 00:15.0 init
1628 14:47:47.107206 I2C bus 0 version 0x3230302a
1629 14:47:47.110783 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1630 14:47:47.114044 PCI: 00:15.0 init finished in 6 msecs
1631 14:47:47.117353 PCI: 00:15.1 init
1632 14:47:47.120684 I2C bus 1 version 0x3230302a
1633 14:47:47.123994 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1634 14:47:47.127073 PCI: 00:15.1 init finished in 6 msecs
1635 14:47:47.130323 PCI: 00:15.2 init
1636 14:47:47.134003 I2C bus 2 version 0x3230302a
1637 14:47:47.137534 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1638 14:47:47.140802 PCI: 00:15.2 init finished in 6 msecs
1639 14:47:47.141247 PCI: 00:15.3 init
1640 14:47:47.143530 I2C bus 3 version 0x3230302a
1641 14:47:47.147360 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1642 14:47:47.153905 PCI: 00:15.3 init finished in 6 msecs
1643 14:47:47.154442 PCI: 00:16.0 init
1644 14:47:47.156778 PCI: 00:16.0 init finished in 0 msecs
1645 14:47:47.160642 PCI: 00:19.1 init
1646 14:47:47.164016 I2C bus 5 version 0x3230302a
1647 14:47:47.167389 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1648 14:47:47.170643 PCI: 00:19.1 init finished in 6 msecs
1649 14:47:47.174132 PCI: 00:1d.0 init
1650 14:47:47.178071 Initializing PCH PCIe bridge.
1651 14:47:47.180712 PCI: 00:1d.0 init finished in 3 msecs
1652 14:47:47.184535 PCI: 00:1f.0 init
1653 14:47:47.188073 IOAPIC: Initializing IOAPIC at 0xfec00000
1654 14:47:47.191090 IOAPIC: Bootstrap Processor Local APIC = 0x00
1655 14:47:47.194484 IOAPIC: ID = 0x02
1656 14:47:47.197977 IOAPIC: Dumping registers
1657 14:47:47.200516 reg 0x0000: 0x02000000
1658 14:47:47.200951 reg 0x0001: 0x00770020
1659 14:47:47.204112 reg 0x0002: 0x00000000
1660 14:47:47.207876 PCI: 00:1f.0 init finished in 21 msecs
1661 14:47:47.211216 PCI: 00:1f.2 init
1662 14:47:47.214190 Disabling ACPI via APMC.
1663 14:47:47.217116 APMC done.
1664 14:47:47.220869 PCI: 00:1f.2 init finished in 5 msecs
1665 14:47:47.231854 PCI: 01:00.0 init
1666 14:47:47.234911 PCI: 01:00.0 init finished in 0 msecs
1667 14:47:47.238400 PNP: 0c09.0 init
1668 14:47:47.241528 Google Chrome EC uptime: 8.398 seconds
1669 14:47:47.248087 Google Chrome AP resets since EC boot: 1
1670 14:47:47.251471 Google Chrome most recent AP reset causes:
1671 14:47:47.254862 0.349: 32775 shutdown: entering G3
1672 14:47:47.261285 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1673 14:47:47.264524 PNP: 0c09.0 init finished in 22 msecs
1674 14:47:47.270674 Devices initialized
1675 14:47:47.274105 Show all devs... After init.
1676 14:47:47.277254 Root Device: enabled 1
1677 14:47:47.277886 DOMAIN: 0000: enabled 1
1678 14:47:47.280804 CPU_CLUSTER: 0: enabled 1
1679 14:47:47.284082 PCI: 00:00.0: enabled 1
1680 14:47:47.287446 PCI: 00:02.0: enabled 1
1681 14:47:47.288020 PCI: 00:04.0: enabled 1
1682 14:47:47.291064 PCI: 00:05.0: enabled 1
1683 14:47:47.293979 PCI: 00:06.0: enabled 0
1684 14:47:47.297335 PCI: 00:07.0: enabled 0
1685 14:47:47.297876 PCI: 00:07.1: enabled 0
1686 14:47:47.300375 PCI: 00:07.2: enabled 0
1687 14:47:47.303623 PCI: 00:07.3: enabled 0
1688 14:47:47.307475 PCI: 00:08.0: enabled 1
1689 14:47:47.308061 PCI: 00:09.0: enabled 0
1690 14:47:47.309981 PCI: 00:0a.0: enabled 0
1691 14:47:47.313941 PCI: 00:0d.0: enabled 1
1692 14:47:47.316919 PCI: 00:0d.1: enabled 0
1693 14:47:47.317356 PCI: 00:0d.2: enabled 0
1694 14:47:47.320470 PCI: 00:0d.3: enabled 0
1695 14:47:47.324039 PCI: 00:0e.0: enabled 0
1696 14:47:47.324664 PCI: 00:10.2: enabled 1
1697 14:47:47.327187 PCI: 00:10.6: enabled 0
1698 14:47:47.330698 PCI: 00:10.7: enabled 0
1699 14:47:47.333504 PCI: 00:12.0: enabled 0
1700 14:47:47.333947 PCI: 00:12.6: enabled 0
1701 14:47:47.337040 PCI: 00:13.0: enabled 0
1702 14:47:47.340054 PCI: 00:14.0: enabled 1
1703 14:47:47.343522 PCI: 00:14.1: enabled 0
1704 14:47:47.343987 PCI: 00:14.2: enabled 1
1705 14:47:47.346993 PCI: 00:14.3: enabled 1
1706 14:47:47.350768 PCI: 00:15.0: enabled 1
1707 14:47:47.353485 PCI: 00:15.1: enabled 1
1708 14:47:47.353922 PCI: 00:15.2: enabled 1
1709 14:47:47.356663 PCI: 00:15.3: enabled 1
1710 14:47:47.360613 PCI: 00:16.0: enabled 1
1711 14:47:47.361168 PCI: 00:16.1: enabled 0
1712 14:47:47.363156 PCI: 00:16.2: enabled 0
1713 14:47:47.366478 PCI: 00:16.3: enabled 0
1714 14:47:47.370441 PCI: 00:16.4: enabled 0
1715 14:47:47.370977 PCI: 00:16.5: enabled 0
1716 14:47:47.373220 PCI: 00:17.0: enabled 0
1717 14:47:47.376711 PCI: 00:19.0: enabled 0
1718 14:47:47.380296 PCI: 00:19.1: enabled 1
1719 14:47:47.380958 PCI: 00:19.2: enabled 0
1720 14:47:47.383806 PCI: 00:1c.0: enabled 1
1721 14:47:47.386701 PCI: 00:1c.1: enabled 0
1722 14:47:47.390224 PCI: 00:1c.2: enabled 0
1723 14:47:47.390779 PCI: 00:1c.3: enabled 0
1724 14:47:47.393767 PCI: 00:1c.4: enabled 0
1725 14:47:47.397135 PCI: 00:1c.5: enabled 0
1726 14:47:47.397674 PCI: 00:1c.6: enabled 1
1727 14:47:47.400305 PCI: 00:1c.7: enabled 0
1728 14:47:47.403670 PCI: 00:1d.0: enabled 1
1729 14:47:47.406605 PCI: 00:1d.1: enabled 0
1730 14:47:47.407146 PCI: 00:1d.2: enabled 1
1731 14:47:47.409860 PCI: 00:1d.3: enabled 0
1732 14:47:47.413383 PCI: 00:1e.0: enabled 1
1733 14:47:47.416344 PCI: 00:1e.1: enabled 0
1734 14:47:47.416781 PCI: 00:1e.2: enabled 1
1735 14:47:47.419691 PCI: 00:1e.3: enabled 1
1736 14:47:47.422976 PCI: 00:1f.0: enabled 1
1737 14:47:47.426990 PCI: 00:1f.1: enabled 0
1738 14:47:47.427531 PCI: 00:1f.2: enabled 1
1739 14:47:47.429984 PCI: 00:1f.3: enabled 1
1740 14:47:47.433448 PCI: 00:1f.4: enabled 0
1741 14:47:47.436888 PCI: 00:1f.5: enabled 1
1742 14:47:47.437424 PCI: 00:1f.6: enabled 0
1743 14:47:47.439891 PCI: 00:1f.7: enabled 0
1744 14:47:47.443461 APIC: 00: enabled 1
1745 14:47:47.444054 GENERIC: 0.0: enabled 1
1746 14:47:47.446611 GENERIC: 0.0: enabled 1
1747 14:47:47.449630 GENERIC: 1.0: enabled 1
1748 14:47:47.453274 GENERIC: 0.0: enabled 1
1749 14:47:47.453817 GENERIC: 1.0: enabled 1
1750 14:47:47.456410 USB0 port 0: enabled 1
1751 14:47:47.460152 GENERIC: 0.0: enabled 1
1752 14:47:47.460736 USB0 port 0: enabled 1
1753 14:47:47.463180 GENERIC: 0.0: enabled 1
1754 14:47:47.466243 I2C: 00:1a: enabled 1
1755 14:47:47.469516 I2C: 00:31: enabled 1
1756 14:47:47.469950 I2C: 00:32: enabled 1
1757 14:47:47.473309 I2C: 00:10: enabled 1
1758 14:47:47.476439 I2C: 00:15: enabled 1
1759 14:47:47.476986 GENERIC: 0.0: enabled 0
1760 14:47:47.479985 GENERIC: 1.0: enabled 0
1761 14:47:47.483300 GENERIC: 0.0: enabled 1
1762 14:47:47.483869 SPI: 00: enabled 1
1763 14:47:47.486745 SPI: 00: enabled 1
1764 14:47:47.489686 PNP: 0c09.0: enabled 1
1765 14:47:47.490222 GENERIC: 0.0: enabled 1
1766 14:47:47.492925 USB3 port 0: enabled 1
1767 14:47:47.496617 USB3 port 1: enabled 1
1768 14:47:47.497151 USB3 port 2: enabled 0
1769 14:47:47.499608 USB3 port 3: enabled 0
1770 14:47:47.503256 USB2 port 0: enabled 0
1771 14:47:47.506748 USB2 port 1: enabled 1
1772 14:47:47.507285 USB2 port 2: enabled 1
1773 14:47:47.509234 USB2 port 3: enabled 0
1774 14:47:47.512464 USB2 port 4: enabled 1
1775 14:47:47.512901 USB2 port 5: enabled 0
1776 14:47:47.516171 USB2 port 6: enabled 0
1777 14:47:47.519561 USB2 port 7: enabled 0
1778 14:47:47.522813 USB2 port 8: enabled 0
1779 14:47:47.523354 USB2 port 9: enabled 0
1780 14:47:47.526162 USB3 port 0: enabled 0
1781 14:47:47.529566 USB3 port 1: enabled 1
1782 14:47:47.530067 USB3 port 2: enabled 0
1783 14:47:47.533262 USB3 port 3: enabled 0
1784 14:47:47.535943 GENERIC: 0.0: enabled 1
1785 14:47:47.539573 GENERIC: 1.0: enabled 1
1786 14:47:47.540155 APIC: 01: enabled 1
1787 14:47:47.542717 APIC: 07: enabled 1
1788 14:47:47.543159 APIC: 02: enabled 1
1789 14:47:47.546039 APIC: 04: enabled 1
1790 14:47:47.549116 APIC: 06: enabled 1
1791 14:47:47.549550 APIC: 03: enabled 1
1792 14:47:47.552489 APIC: 05: enabled 1
1793 14:47:47.556050 PCI: 01:00.0: enabled 1
1794 14:47:47.559271 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1795 14:47:47.566119 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1796 14:47:47.568889 ELOG: NV offset 0xf30000 size 0x1000
1797 14:47:47.575744 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1798 14:47:47.582253 ELOG: Event(17) added with size 13 at 2022-09-30 14:40:16 UTC
1799 14:47:47.589355 ELOG: Event(92) added with size 9 at 2022-09-30 14:40:16 UTC
1800 14:47:47.595559 ELOG: Event(93) added with size 9 at 2022-09-30 14:40:16 UTC
1801 14:47:47.602661 ELOG: Event(9E) added with size 10 at 2022-09-30 14:40:16 UTC
1802 14:47:47.609153 ELOG: Event(9F) added with size 14 at 2022-09-30 14:40:16 UTC
1803 14:47:47.612232 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1804 14:47:47.619109 ELOG: Event(A1) added with size 10 at 2022-09-30 14:40:16 UTC
1805 14:47:47.626275 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1806 14:47:47.632523 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1807 14:47:47.636460 Finalize devices...
1808 14:47:47.637011 Devices finalized
1809 14:47:47.642121 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1810 14:47:47.645846 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1811 14:47:47.652808 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1812 14:47:47.655528 ME: HFSTS1 : 0x80030055
1813 14:47:47.662424 ME: HFSTS2 : 0x30280116
1814 14:47:47.665674 ME: HFSTS3 : 0x00000050
1815 14:47:47.672162 ME: HFSTS4 : 0x00004000
1816 14:47:47.675575 ME: HFSTS5 : 0x00000000
1817 14:47:47.679385 ME: HFSTS6 : 0x00400006
1818 14:47:47.682815 ME: Manufacturing Mode : YES
1819 14:47:47.685557 ME: SPI Protection Mode Enabled : NO
1820 14:47:47.692642 ME: FW Partition Table : OK
1821 14:47:47.696263 ME: Bringup Loader Failure : NO
1822 14:47:47.699344 ME: Firmware Init Complete : NO
1823 14:47:47.702555 ME: Boot Options Present : NO
1824 14:47:47.705685 ME: Update In Progress : NO
1825 14:47:47.709104 ME: D0i3 Support : YES
1826 14:47:47.712593 ME: Low Power State Enabled : NO
1827 14:47:47.715686 ME: CPU Replaced : YES
1828 14:47:47.722200 ME: CPU Replacement Valid : YES
1829 14:47:47.725400 ME: Current Working State : 5
1830 14:47:47.728855 ME: Current Operation State : 1
1831 14:47:47.732256 ME: Current Operation Mode : 3
1832 14:47:47.735547 ME: Error Code : 0
1833 14:47:47.739434 ME: Enhanced Debug Mode : NO
1834 14:47:47.742634 ME: CPU Debug Disabled : YES
1835 14:47:47.745895 ME: TXT Support : NO
1836 14:47:47.752689 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1837 14:47:47.759167 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1838 14:47:47.762371 CBFS: 'fallback/slic' not found.
1839 14:47:47.768583 ACPI: Writing ACPI tables at 76b01000.
1840 14:47:47.769088 ACPI: * FACS
1841 14:47:47.772038 ACPI: * DSDT
1842 14:47:47.775519 Ramoops buffer: 0x100000@0x76a00000.
1843 14:47:47.779086 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1844 14:47:47.785499 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1845 14:47:47.788825 Google Chrome EC: version:
1846 14:47:47.791795 ro: voema_v2.0.7540-147f8d37d1
1847 14:47:47.795199 rw: voema_v2.0.7540-147f8d37d1
1848 14:47:47.798671 running image: 2
1849 14:47:47.801800 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1850 14:47:47.807655 ACPI: * FADT
1851 14:47:47.808214 SCI is IRQ9
1852 14:47:47.813990 ACPI: added table 1/32, length now 40
1853 14:47:47.814436 ACPI: * SSDT
1854 14:47:47.817497 Found 1 CPU(s) with 8 core(s) each.
1855 14:47:47.823954 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1856 14:47:47.827089 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1857 14:47:47.830766 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1858 14:47:47.833725 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1859 14:47:47.840237 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1860 14:47:47.847316 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1861 14:47:47.850576 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1862 14:47:47.857110 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1863 14:47:47.863938 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1864 14:47:47.867364 \_SB.PCI0.RP09: Added StorageD3Enable property
1865 14:47:47.870037 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1866 14:47:47.877192 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1867 14:47:47.884179 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1868 14:47:47.887016 PS2K: Passing 80 keymaps to kernel
1869 14:47:47.893680 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1870 14:47:47.900339 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1871 14:47:47.907396 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1872 14:47:47.913524 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1873 14:47:47.920365 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1874 14:47:47.926768 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1875 14:47:47.930807 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1876 14:47:47.937339 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1877 14:47:47.943310 ACPI: added table 2/32, length now 44
1878 14:47:47.943870 ACPI: * MCFG
1879 14:47:47.946709 ACPI: added table 3/32, length now 48
1880 14:47:47.950304 ACPI: * TPM2
1881 14:47:47.953595 TPM2 log created at 0x769f0000
1882 14:47:47.956977 ACPI: added table 4/32, length now 52
1883 14:47:47.957523 ACPI: * MADT
1884 14:47:47.960308 SCI is IRQ9
1885 14:47:47.963426 ACPI: added table 5/32, length now 56
1886 14:47:47.964006 current = 76b09850
1887 14:47:47.967025 ACPI: * DMAR
1888 14:47:47.969974 ACPI: added table 6/32, length now 60
1889 14:47:47.973614 ACPI: added table 7/32, length now 64
1890 14:47:47.977001 ACPI: * HPET
1891 14:47:47.979728 ACPI: added table 8/32, length now 68
1892 14:47:47.980173 ACPI: done.
1893 14:47:47.983187 ACPI tables: 35216 bytes.
1894 14:47:47.986608 smbios_write_tables: 769ef000
1895 14:47:47.989850 EC returned error result code 3
1896 14:47:47.993139 Couldn't obtain OEM name from CBI
1897 14:47:47.996576 Create SMBIOS type 16
1898 14:47:47.999943 Create SMBIOS type 17
1899 14:47:48.002958 GENERIC: 0.0 (WIFI Device)
1900 14:47:48.003504 SMBIOS tables: 1750 bytes.
1901 14:47:48.010197 Writing table forward entry at 0x00000500
1902 14:47:48.016318 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1903 14:47:48.019784 Writing coreboot table at 0x76b25000
1904 14:47:48.023022 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1905 14:47:48.029636 1. 0000000000001000-000000000009ffff: RAM
1906 14:47:48.032404 2. 00000000000a0000-00000000000fffff: RESERVED
1907 14:47:48.036154 3. 0000000000100000-00000000769eefff: RAM
1908 14:47:48.042843 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1909 14:47:48.049426 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1910 14:47:48.056309 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1911 14:47:48.059497 7. 0000000077000000-000000007fbfffff: RESERVED
1912 14:47:48.062582 8. 00000000c0000000-00000000cfffffff: RESERVED
1913 14:47:48.068854 9. 00000000f8000000-00000000f9ffffff: RESERVED
1914 14:47:48.072478 10. 00000000fb000000-00000000fb000fff: RESERVED
1915 14:47:48.079407 11. 00000000fe000000-00000000fe00ffff: RESERVED
1916 14:47:48.082523 12. 00000000fed80000-00000000fed87fff: RESERVED
1917 14:47:48.089343 13. 00000000fed90000-00000000fed92fff: RESERVED
1918 14:47:48.092397 14. 00000000feda0000-00000000feda1fff: RESERVED
1919 14:47:48.095546 15. 00000000fedc0000-00000000feddffff: RESERVED
1920 14:47:48.102310 16. 0000000100000000-00000002803fffff: RAM
1921 14:47:48.105477 Passing 4 GPIOs to payload:
1922 14:47:48.109205 NAME | PORT | POLARITY | VALUE
1923 14:47:48.115355 lid | undefined | high | high
1924 14:47:48.119102 power | undefined | high | low
1925 14:47:48.125629 oprom | undefined | high | low
1926 14:47:48.132182 EC in RW | 0x000000e5 | high | high
1927 14:47:48.135803 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7ada
1928 14:47:48.138961 coreboot table: 1576 bytes.
1929 14:47:48.142083 IMD ROOT 0. 0x76fff000 0x00001000
1930 14:47:48.148976 IMD SMALL 1. 0x76ffe000 0x00001000
1931 14:47:48.152149 FSP MEMORY 2. 0x76c4e000 0x003b0000
1932 14:47:48.155508 VPD 3. 0x76c4d000 0x00000367
1933 14:47:48.159065 RO MCACHE 4. 0x76c4c000 0x00000fdc
1934 14:47:48.162552 CONSOLE 5. 0x76c2c000 0x00020000
1935 14:47:48.165404 FMAP 6. 0x76c2b000 0x00000578
1936 14:47:48.168914 TIME STAMP 7. 0x76c2a000 0x00000910
1937 14:47:48.172467 VBOOT WORK 8. 0x76c16000 0x00014000
1938 14:47:48.179062 ROMSTG STCK 9. 0x76c15000 0x00001000
1939 14:47:48.182319 AFTER CAR 10. 0x76c0a000 0x0000b000
1940 14:47:48.185651 RAMSTAGE 11. 0x76b97000 0x00073000
1941 14:47:48.189308 REFCODE 12. 0x76b42000 0x00055000
1942 14:47:48.192309 SMM BACKUP 13. 0x76b32000 0x00010000
1943 14:47:48.195342 4f444749 14. 0x76b30000 0x00002000
1944 14:47:48.198963 EXT VBT15. 0x76b2d000 0x0000219f
1945 14:47:48.202142 COREBOOT 16. 0x76b25000 0x00008000
1946 14:47:48.205659 ACPI 17. 0x76b01000 0x00024000
1947 14:47:48.208766 ACPI GNVS 18. 0x76b00000 0x00001000
1948 14:47:48.215393 RAMOOPS 19. 0x76a00000 0x00100000
1949 14:47:48.218920 TPM2 TCGLOG20. 0x769f0000 0x00010000
1950 14:47:48.222486 SMBIOS 21. 0x769ef000 0x00000800
1951 14:47:48.222932 IMD small region:
1952 14:47:48.228780 IMD ROOT 0. 0x76ffec00 0x00000400
1953 14:47:48.232559 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1954 14:47:48.235380 POWER STATE 2. 0x76ffeb80 0x00000044
1955 14:47:48.238926 ROMSTAGE 3. 0x76ffeb60 0x00000004
1956 14:47:48.242321 MEM INFO 4. 0x76ffe980 0x000001e0
1957 14:47:48.249168 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1958 14:47:48.252653 MTRR: Physical address space:
1959 14:47:48.258933 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1960 14:47:48.265179 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1961 14:47:48.271768 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1962 14:47:48.275136 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1963 14:47:48.282235 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1964 14:47:48.288971 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1965 14:47:48.295446 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1966 14:47:48.298470 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 14:47:48.305398 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 14:47:48.308929 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 14:47:48.311767 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 14:47:48.315524 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 14:47:48.321810 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 14:47:48.325073 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 14:47:48.328423 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 14:47:48.331441 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 14:47:48.335486 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 14:47:48.341688 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 14:47:48.344948 call enable_fixed_mtrr()
1978 14:47:48.348445 CPU physical address size: 39 bits
1979 14:47:48.351505 MTRR: default type WB/UC MTRR counts: 6/6.
1980 14:47:48.355085 MTRR: UC selected as default type.
1981 14:47:48.361734 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1982 14:47:48.368120 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1983 14:47:48.374903 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1984 14:47:48.381812 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1985 14:47:48.388285 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1986 14:47:48.394758 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1987 14:47:48.395305
1988 14:47:48.395803 MTRR check
1989 14:47:48.397935 Fixed MTRRs : Enabled
1990 14:47:48.401298 Variable MTRRs: Enabled
1991 14:47:48.401748
1992 14:47:48.404698 MTRR: Fixed MSR 0x250 0x0606060606060606
1993 14:47:48.407775 MTRR: Fixed MSR 0x258 0x0606060606060606
1994 14:47:48.414499 MTRR: Fixed MSR 0x259 0x0000000000000000
1995 14:47:48.418017 MTRR: Fixed MSR 0x268 0x0606060606060606
1996 14:47:48.421056 MTRR: Fixed MSR 0x269 0x0606060606060606
1997 14:47:48.424727 MTRR: Fixed MSR 0x26a 0x0606060606060606
1998 14:47:48.431215 MTRR: Fixed MSR 0x26b 0x0606060606060606
1999 14:47:48.434763 MTRR: Fixed MSR 0x26c 0x0606060606060606
2000 14:47:48.437886 MTRR: Fixed MSR 0x26d 0x0606060606060606
2001 14:47:48.441210 MTRR: Fixed MSR 0x26e 0x0606060606060606
2002 14:47:48.447628 MTRR: Fixed MSR 0x26f 0x0606060606060606
2003 14:47:48.454667 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2004 14:47:48.455199 call enable_fixed_mtrr()
2005 14:47:48.458227 Checking cr50 for pending updates
2006 14:47:48.462201 CPU physical address size: 39 bits
2007 14:47:48.468204 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 14:47:48.471563 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 14:47:48.474785 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 14:47:48.477972 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 14:47:48.484880 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 14:47:48.488158 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 14:47:48.491636 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 14:47:48.494463 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 14:47:48.501401 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 14:47:48.504683 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 14:47:48.507511 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 14:47:48.511311 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 14:47:48.518210 MTRR: Fixed MSR 0x258 0x0606060606060606
2020 14:47:48.521683 MTRR: Fixed MSR 0x259 0x0000000000000000
2021 14:47:48.524691 MTRR: Fixed MSR 0x268 0x0606060606060606
2022 14:47:48.528155 MTRR: Fixed MSR 0x269 0x0606060606060606
2023 14:47:48.534708 MTRR: Fixed MSR 0x26a 0x0606060606060606
2024 14:47:48.538114 MTRR: Fixed MSR 0x26b 0x0606060606060606
2025 14:47:48.541455 MTRR: Fixed MSR 0x26c 0x0606060606060606
2026 14:47:48.544502 MTRR: Fixed MSR 0x26d 0x0606060606060606
2027 14:47:48.551403 MTRR: Fixed MSR 0x26e 0x0606060606060606
2028 14:47:48.554989 MTRR: Fixed MSR 0x26f 0x0606060606060606
2029 14:47:48.557752 call enable_fixed_mtrr()
2030 14:47:48.561279 call enable_fixed_mtrr()
2031 14:47:48.564682 MTRR: Fixed MSR 0x250 0x0606060606060606
2032 14:47:48.568159 MTRR: Fixed MSR 0x250 0x0606060606060606
2033 14:47:48.571308 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 14:47:48.578099 MTRR: Fixed MSR 0x259 0x0000000000000000
2035 14:47:48.581073 MTRR: Fixed MSR 0x268 0x0606060606060606
2036 14:47:48.584612 MTRR: Fixed MSR 0x269 0x0606060606060606
2037 14:47:48.587912 MTRR: Fixed MSR 0x26a 0x0606060606060606
2038 14:47:48.591298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2039 14:47:48.597614 MTRR: Fixed MSR 0x26c 0x0606060606060606
2040 14:47:48.601052 MTRR: Fixed MSR 0x26d 0x0606060606060606
2041 14:47:48.604446 MTRR: Fixed MSR 0x26e 0x0606060606060606
2042 14:47:48.607636 MTRR: Fixed MSR 0x26f 0x0606060606060606
2043 14:47:48.615263 MTRR: Fixed MSR 0x258 0x0606060606060606
2044 14:47:48.615819 call enable_fixed_mtrr()
2045 14:47:48.622406 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 14:47:48.625589 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 14:47:48.628953 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 14:47:48.632276 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 14:47:48.638749 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 14:47:48.642386 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 14:47:48.645277 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 14:47:48.648835 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 14:47:48.655141 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 14:47:48.658459 CPU physical address size: 39 bits
2055 14:47:48.662044 call enable_fixed_mtrr()
2056 14:47:48.664970 CPU physical address size: 39 bits
2057 14:47:48.668636 CPU physical address size: 39 bits
2058 14:47:48.674996 MTRR: Fixed MSR 0x250 0x0606060606060606
2059 14:47:48.678414 MTRR: Fixed MSR 0x250 0x0606060606060606
2060 14:47:48.682152 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 14:47:48.684905 MTRR: Fixed MSR 0x259 0x0000000000000000
2062 14:47:48.691798 MTRR: Fixed MSR 0x268 0x0606060606060606
2063 14:47:48.694814 MTRR: Fixed MSR 0x269 0x0606060606060606
2064 14:47:48.698248 MTRR: Fixed MSR 0x26a 0x0606060606060606
2065 14:47:48.702141 MTRR: Fixed MSR 0x26b 0x0606060606060606
2066 14:47:48.708216 MTRR: Fixed MSR 0x26c 0x0606060606060606
2067 14:47:48.711982 MTRR: Fixed MSR 0x26d 0x0606060606060606
2068 14:47:48.714859 MTRR: Fixed MSR 0x26e 0x0606060606060606
2069 14:47:48.718273 MTRR: Fixed MSR 0x26f 0x0606060606060606
2070 14:47:48.725377 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 14:47:48.725824 call enable_fixed_mtrr()
2072 14:47:48.732397 MTRR: Fixed MSR 0x259 0x0000000000000000
2073 14:47:48.735510 MTRR: Fixed MSR 0x268 0x0606060606060606
2074 14:47:48.738906 MTRR: Fixed MSR 0x269 0x0606060606060606
2075 14:47:48.742434 MTRR: Fixed MSR 0x26a 0x0606060606060606
2076 14:47:48.748859 MTRR: Fixed MSR 0x26b 0x0606060606060606
2077 14:47:48.752585 MTRR: Fixed MSR 0x26c 0x0606060606060606
2078 14:47:48.755862 MTRR: Fixed MSR 0x26d 0x0606060606060606
2079 14:47:48.758602 MTRR: Fixed MSR 0x26e 0x0606060606060606
2080 14:47:48.765248 MTRR: Fixed MSR 0x26f 0x0606060606060606
2081 14:47:48.768721 CPU physical address size: 39 bits
2082 14:47:48.772141 call enable_fixed_mtrr()
2083 14:47:48.776399 Reading cr50 TPM mode
2084 14:47:48.776917 CPU physical address size: 39 bits
2085 14:47:48.779853 CPU physical address size: 39 bits
2086 14:47:48.787003 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2087 14:47:48.796784 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2088 14:47:48.799476 Checking segment from ROM address 0xffc02b38
2089 14:47:48.803010 Checking segment from ROM address 0xffc02b54
2090 14:47:48.809728 Loading segment from ROM address 0xffc02b38
2091 14:47:48.810165 code (compression=0)
2092 14:47:48.819895 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2093 14:47:48.826478 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2094 14:47:48.829908 it's not compressed!
2095 14:47:48.969055 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2096 14:47:48.975569 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2097 14:47:48.982336 Loading segment from ROM address 0xffc02b54
2098 14:47:48.982840 Entry Point 0x30000000
2099 14:47:48.985196 Loaded segments
2100 14:47:48.992215 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2101 14:47:49.035257 Finalizing chipset.
2102 14:47:49.038222 Finalizing SMM.
2103 14:47:49.038735 APMC done.
2104 14:47:49.045581 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2105 14:47:49.048081 mp_park_aps done after 0 msecs.
2106 14:47:49.051637 Jumping to boot code at 0x30000000(0x76b25000)
2107 14:47:49.061719 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2108 14:47:49.062275
2109 14:47:49.065261 Starting depthcharge on Voema...
2110 14:47:49.066333 end: 2.2.3 depthcharge-start (duration 00:00:17) [common]
2111 14:47:49.066855 start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
2112 14:47:49.067301 Setting prompt string to ['volteer:']
2113 14:47:49.067958 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
2114 14:47:49.074987 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2115 14:47:49.081622 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2116 14:47:49.085246 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2117 14:47:49.089294 Failed to find eMMC card reader
2118 14:47:49.092618 Wipe memory regions:
2119 14:47:49.095866 [0x00000000001000, 0x000000000a0000)
2120 14:47:49.099401 [0x00000000100000, 0x00000030000000)
2121 14:47:49.130328 [0x00000032662db0, 0x000000769ef000)
2122 14:47:49.168596 [0x00000100000000, 0x00000280400000)
2123 14:47:49.372738 ec_init: CrosEC protocol v3 supported (256, 256)
2124 14:47:49.379630 update_port_state: port C0 state: usb enable 1 mux conn 0
2125 14:47:49.389338 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2126 14:47:49.392825 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2127 14:47:49.399127 send_conn_disc_msg: pmc_send_cmd succeeded
2128 14:47:49.830311 R8152: Initializing
2129 14:47:49.833350 Version 6 (ocp_data = 5c30)
2130 14:47:49.836551 R8152: Done initializing
2131 14:47:49.840039 Adding net device
2132 14:47:50.145954 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2133 14:47:50.146461
2134 14:47:50.149509 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2136 14:47:50.251242 volteer: tftpboot 192.168.201.1 7462808/tftp-deploy-hisg471z/kernel/bzImage 7462808/tftp-deploy-hisg471z/kernel/cmdline 7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
2137 14:47:50.252006 Setting prompt string to 'Starting kernel'
2138 14:47:50.252415 Setting prompt string to ['Starting kernel']
2139 14:47:50.252767 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2140 14:47:50.253155 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2141 14:47:50.256780 tftpboot 192.168.201.1 7462808/tftp-deploy-hisg471z/kernel/bzImy-hisg471z/kernel/cmdline 7462808/tftp-deploy-hisg471z/ramdisk/ramdisk.cpio.gz
2142 14:47:50.257235 Waiting for link
2143 14:47:50.460314 done.
2144 14:47:50.460824 MAC: 00:24:32:30:7d:bc
2145 14:47:50.463825 Sending DHCP discover... done.
2146 14:47:50.467125 Waiting for reply... done.
2147 14:47:50.470349 Sending DHCP request... done.
2148 14:47:50.477207 Waiting for reply... done.
2149 14:47:50.477752 My ip is 192.168.201.22
2150 14:47:50.480533 The DHCP server ip is 192.168.201.1
2151 14:47:50.486869 TFTP server IP predefined by user: 192.168.201.1
2152 14:47:50.493959 Bootfile predefined by user: 7462808/tftp-deploy-hisg471z/kernel/bzImage
2153 14:47:50.497027 Sending tftp read request... done.
2154 14:47:50.503725 Waiting for the transfer...
2155 14:47:51.189568 00000000 ################################################################
2156 14:47:51.894439 00080000 ################################################################
2157 14:47:52.577758 00100000 ################################################################
2158 14:47:53.123715 00180000 ################################################################
2159 14:47:53.689604 00200000 ################################################################
2160 14:47:54.260102 00280000 ################################################################
2161 14:47:54.830714 00300000 ################################################################
2162 14:47:55.393713 00380000 ################################################################
2163 14:47:55.942941 00400000 ################################################################
2164 14:47:56.517895 00480000 ################################################################
2165 14:47:57.083700 00500000 ################################################################
2166 14:47:57.647980 00580000 ################################################################
2167 14:47:58.196129 00600000 ################################################################
2168 14:47:58.509871 00680000 ###################################### done.
2169 14:47:58.513225 The bootfile was 7126928 bytes long.
2170 14:47:58.516612 Sending tftp read request... done.
2171 14:47:58.519407 Waiting for the transfer...
2172 14:47:59.059192 00000000 ################################################################
2173 14:47:59.624852 00080000 ################################################################
2174 14:48:00.367781 00100000 ################################################################
2175 14:48:01.109155 00180000 ################################################################
2176 14:48:01.834031 00200000 ################################################################
2177 14:48:02.502210 00280000 ################################################################
2178 14:48:03.138348 00300000 ################################################################
2179 14:48:03.808411 00380000 ################################################################
2180 14:48:04.529017 00400000 ################################################################
2181 14:48:05.239485 00480000 ################################################################
2182 14:48:05.570527 00500000 ############################# done.
2183 14:48:05.573476 Sending tftp read request... done.
2184 14:48:05.576875 Waiting for the transfer...
2185 14:48:05.577340 00000000 # done.
2186 14:48:05.586881 Command line loaded dynamically from TFTP file: 7462808/tftp-deploy-hisg471z/kernel/cmdline
2187 14:48:05.606726 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7462808/extract-nfsrootfs-nnhukygd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2188 14:48:05.609961 Shutting down all USB controllers.
2189 14:48:05.613309 Removing current net device
2190 14:48:05.616486 Finalizing coreboot
2191 14:48:05.623360 Exiting depthcharge with code 4 at timestamp: 25190378
2192 14:48:05.623985
2193 14:48:05.624369 Starting kernel ...
2194 14:48:05.624706
2195 14:48:05.625030
2196 14:48:05.626167 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2197 14:48:05.626672 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2198 14:48:05.627063 Setting prompt string to ['Linux version [0-9]']
2199 14:48:05.627432 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2200 14:48:05.627839 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2202 14:52:32.627543 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2204 14:52:32.628633 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2206 14:52:32.629434 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2209 14:52:32.630920 end: 2 depthcharge-action (duration 00:05:00) [common]
2211 14:52:32.632008 Cleaning after the job
2212 14:52:32.632431 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/ramdisk
2213 14:52:32.632906 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/kernel
2214 14:52:32.633421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/nfsrootfs
2215 14:52:32.679098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7462808/tftp-deploy-hisg471z/modules
2216 14:52:32.679411 start: 4.1 power-off (timeout 00:00:30) [common]
2217 14:52:32.679577 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-5' '--port=1' '--command=off'
2218 14:52:32.698842 >> Command sent successfully.
2219 14:52:32.700786 Returned 0 in 0 seconds
2220 14:52:32.801513 end: 4.1 power-off (duration 00:00:00) [common]
2222 14:52:32.802963 start: 4.2 read-feedback (timeout 00:10:00) [common]
2223 14:52:32.804032 Listened to connection for namespace 'common' for up to 1s
2224 14:52:33.808009 Finalising connection for namespace 'common'
2225 14:52:33.808647 Disconnecting from shell: Finalise
2226 14:52:33.910099 end: 4.2 read-feedback (duration 00:00:01) [common]
2227 14:52:33.910691 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7462808
2228 14:52:34.098343 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7462808
2229 14:52:34.098529 JobError: Your job cannot terminate cleanly.