Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 14:07:23.912493 lava-dispatcher, installed at version: 2022.06
2 14:07:23.912675 start: 0 validate
3 14:07:23.912807 Start time: 2022-08-03 14:07:23.912800+00:00 (UTC)
4 14:07:23.912934 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:07:23.913067 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220718.0%2Famd64%2Finitrd.cpio.gz exists
6 14:07:24.199967 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:07:24.200218 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:07:24.490036 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:07:24.490267 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20220718.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:07:24.776408 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:07:24.776757 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip70-rt40%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:07:25.067385 validate duration: 1.15
14 14:07:25.067704 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:07:25.067823 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:07:25.067927 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:07:25.068069 Not decompressing ramdisk as can be used compressed.
18 14:07:25.068180 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220718.0/amd64/initrd.cpio.gz
19 14:07:25.068262 saving as /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/ramdisk/initrd.cpio.gz
20 14:07:25.068335 total size: 5411054 (5MB)
21 14:07:25.069546 progress 0% (0MB)
22 14:07:25.071049 progress 5% (0MB)
23 14:07:25.072443 progress 10% (0MB)
24 14:07:25.073924 progress 15% (0MB)
25 14:07:25.075380 progress 20% (1MB)
26 14:07:25.076727 progress 25% (1MB)
27 14:07:25.078079 progress 30% (1MB)
28 14:07:25.079348 progress 35% (1MB)
29 14:07:25.080759 progress 40% (2MB)
30 14:07:25.082119 progress 45% (2MB)
31 14:07:25.083444 progress 50% (2MB)
32 14:07:25.084722 progress 55% (2MB)
33 14:07:25.086193 progress 60% (3MB)
34 14:07:25.087456 progress 65% (3MB)
35 14:07:25.088749 progress 70% (3MB)
36 14:07:25.090069 progress 75% (3MB)
37 14:07:25.091497 progress 80% (4MB)
38 14:07:25.092764 progress 85% (4MB)
39 14:07:25.094108 progress 90% (4MB)
40 14:07:25.095372 progress 95% (4MB)
41 14:07:25.096799 progress 100% (5MB)
42 14:07:25.097027 5MB downloaded in 0.03s (179.96MB/s)
43 14:07:25.097185 end: 1.1.1 http-download (duration 00:00:00) [common]
45 14:07:25.097433 end: 1.1 download-retry (duration 00:00:00) [common]
46 14:07:25.097523 start: 1.2 download-retry (timeout 00:10:00) [common]
47 14:07:25.097609 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 14:07:25.097717 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:07:25.097784 saving as /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/kernel/bzImage
50 14:07:25.097847 total size: 6815632 (6MB)
51 14:07:25.097908 No compression specified
52 14:07:25.098974 progress 0% (0MB)
53 14:07:25.100766 progress 5% (0MB)
54 14:07:25.102451 progress 10% (0MB)
55 14:07:25.104203 progress 15% (1MB)
56 14:07:25.105812 progress 20% (1MB)
57 14:07:25.107402 progress 25% (1MB)
58 14:07:25.109171 progress 30% (1MB)
59 14:07:25.110770 progress 35% (2MB)
60 14:07:25.112480 progress 40% (2MB)
61 14:07:25.114080 progress 45% (2MB)
62 14:07:25.115650 progress 50% (3MB)
63 14:07:25.117368 progress 55% (3MB)
64 14:07:25.118932 progress 60% (3MB)
65 14:07:25.120638 progress 65% (4MB)
66 14:07:25.122232 progress 70% (4MB)
67 14:07:25.123825 progress 75% (4MB)
68 14:07:25.125589 progress 80% (5MB)
69 14:07:25.127197 progress 85% (5MB)
70 14:07:25.128903 progress 90% (5MB)
71 14:07:25.130565 progress 95% (6MB)
72 14:07:25.132327 progress 100% (6MB)
73 14:07:25.132609 6MB downloaded in 0.03s (187.01MB/s)
74 14:07:25.132756 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:07:25.133040 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:07:25.133131 start: 1.3 download-retry (timeout 00:10:00) [common]
78 14:07:25.133219 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 14:07:25.133326 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20220718.0/amd64/full.rootfs.tar.xz
80 14:07:25.133394 saving as /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/nfsrootfs/full.rootfs.tar
81 14:07:25.133455 total size: 133216152 (127MB)
82 14:07:25.133517 Using unxz to decompress xz
83 14:07:25.136940 progress 0% (0MB)
84 14:07:25.469854 progress 5% (6MB)
85 14:07:25.827870 progress 10% (12MB)
86 14:07:26.115295 progress 15% (19MB)
87 14:07:26.333020 progress 20% (25MB)
88 14:07:26.585350 progress 25% (31MB)
89 14:07:26.925168 progress 30% (38MB)
90 14:07:27.273279 progress 35% (44MB)
91 14:07:27.666509 progress 40% (50MB)
92 14:07:28.047717 progress 45% (57MB)
93 14:07:28.402860 progress 50% (63MB)
94 14:07:28.774825 progress 55% (69MB)
95 14:07:29.137956 progress 60% (76MB)
96 14:07:29.500259 progress 65% (82MB)
97 14:07:29.864420 progress 70% (88MB)
98 14:07:30.229372 progress 75% (95MB)
99 14:07:30.670138 progress 80% (101MB)
100 14:07:31.111693 progress 85% (108MB)
101 14:07:31.377108 progress 90% (114MB)
102 14:07:31.728153 progress 95% (120MB)
103 14:07:32.126956 progress 100% (127MB)
104 14:07:32.132595 127MB downloaded in 7.00s (18.15MB/s)
105 14:07:32.132877 end: 1.3.1 http-download (duration 00:00:07) [common]
107 14:07:32.133247 end: 1.3 download-retry (duration 00:00:07) [common]
108 14:07:32.133418 start: 1.4 download-retry (timeout 00:09:53) [common]
109 14:07:32.133522 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 14:07:32.133660 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip70-rt40/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:07:32.133748 saving as /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/modules/modules.tar
112 14:07:32.133813 total size: 54904 (0MB)
113 14:07:32.133878 Using unxz to decompress xz
114 14:07:32.137261 progress 59% (0MB)
115 14:07:32.137642 progress 100% (0MB)
116 14:07:32.141100 0MB downloaded in 0.01s (7.19MB/s)
117 14:07:32.141329 end: 1.4.1 http-download (duration 00:00:00) [common]
119 14:07:32.141604 end: 1.4 download-retry (duration 00:00:00) [common]
120 14:07:32.141718 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 14:07:32.141819 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 14:07:33.463117 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/6961124/extract-nfsrootfs-ry6zij56
123 14:07:33.463337 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 14:07:33.463459 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 14:07:33.463597 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve
126 14:07:33.463701 makedir: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin
127 14:07:33.463787 makedir: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/tests
128 14:07:33.463870 makedir: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/results
129 14:07:33.463965 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-add-keys
130 14:07:33.464093 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-add-sources
131 14:07:33.464217 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-background-process-start
132 14:07:33.464331 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-background-process-stop
133 14:07:33.464445 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-common-functions
134 14:07:33.464554 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-echo-ipv4
135 14:07:33.464664 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-install-packages
136 14:07:33.464773 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-installed-packages
137 14:07:33.464881 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-os-build
138 14:07:33.465031 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-probe-channel
139 14:07:33.465141 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-probe-ip
140 14:07:33.465249 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-target-ip
141 14:07:33.465356 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-target-mac
142 14:07:33.465463 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-target-storage
143 14:07:33.465574 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-case
144 14:07:33.465683 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-event
145 14:07:33.465791 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-feedback
146 14:07:33.465902 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-raise
147 14:07:33.466019 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-reference
148 14:07:33.466126 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-runner
149 14:07:33.466233 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-set
150 14:07:33.466340 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-test-shell
151 14:07:33.466448 Updating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-install-packages (oe)
152 14:07:33.466562 Updating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/bin/lava-installed-packages (oe)
153 14:07:33.466658 Creating /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/environment
154 14:07:33.466744 LAVA metadata
155 14:07:33.466810 - LAVA_JOB_ID=6961124
156 14:07:33.466877 - LAVA_DISPATCHER_IP=192.168.201.1
157 14:07:33.466975 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 14:07:33.467043 skipped lava-vland-overlay
159 14:07:33.467120 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 14:07:33.467202 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 14:07:33.467265 skipped lava-multinode-overlay
162 14:07:33.467340 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 14:07:33.467427 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 14:07:33.467502 Loading test definitions
165 14:07:33.467594 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 14:07:33.467668 Using /lava-6961124 at stage 0
167 14:07:33.467923 uuid=6961124_1.5.2.3.1 testdef=None
168 14:07:33.468018 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 14:07:33.468111 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 14:07:33.468580 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 14:07:33.468815 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 14:07:33.469418 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 14:07:33.469661 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 14:07:33.470207 runner path: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/0/tests/0_dmesg test_uuid 6961124_1.5.2.3.1
177 14:07:33.470361 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 14:07:33.470607 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 14:07:33.470681 Using /lava-6961124 at stage 1
181 14:07:33.470930 uuid=6961124_1.5.2.3.5 testdef=None
182 14:07:33.471023 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 14:07:33.471111 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 14:07:33.471620 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 14:07:33.471857 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 14:07:33.472462 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 14:07:33.472725 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 14:07:33.473450 runner path: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/1/tests/1_bootrr test_uuid 6961124_1.5.2.3.5
191 14:07:33.473601 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 14:07:33.473825 Creating lava-test-runner.conf files
194 14:07:33.473899 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/0 for stage 0
195 14:07:33.473988 - 0_dmesg
196 14:07:33.474063 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/6961124/lava-overlay-lss6wzve/lava-6961124/1 for stage 1
197 14:07:33.474154 - 1_bootrr
198 14:07:33.474253 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 14:07:33.474347 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 14:07:33.479975 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 14:07:33.480097 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 14:07:33.480188 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 14:07:33.480277 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 14:07:33.480364 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 14:07:33.583593 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 14:07:33.583951 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 14:07:33.584082 extracting modules file /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961124/extract-nfsrootfs-ry6zij56
208 14:07:33.588530 extracting modules file /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/6961124/extract-overlay-ramdisk-k6svn5zl/ramdisk
209 14:07:33.592723 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 14:07:33.592858 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 14:07:33.592976 [common] Applying overlay to NFS
212 14:07:33.593061 [common] Applying overlay /var/lib/lava/dispatcher/tmp/6961124/compress-overlay-g00p9owp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/6961124/extract-nfsrootfs-ry6zij56
213 14:07:33.597150 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 14:07:33.597258 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 14:07:33.597381 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 14:07:33.597525 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 14:07:33.597628 Building ramdisk /var/lib/lava/dispatcher/tmp/6961124/extract-overlay-ramdisk-k6svn5zl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/6961124/extract-overlay-ramdisk-k6svn5zl/ramdisk
218 14:07:33.632311 >> 24470 blocks
219 14:07:34.100717 rename /var/lib/lava/dispatcher/tmp/6961124/extract-overlay-ramdisk-k6svn5zl/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
220 14:07:34.101172 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 14:07:34.101302 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 14:07:34.101417 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 14:07:34.101522 No mkimage arch provided, not using FIT.
224 14:07:34.101617 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 14:07:34.101729 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 14:07:34.101836 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 14:07:34.101935 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 14:07:34.102017 No LXC device requested
229 14:07:34.102123 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 14:07:34.102216 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 14:07:34.102309 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 14:07:34.102382 Checking files for TFTP limit of 4294967296 bytes.
233 14:07:34.102786 end: 1 tftp-deploy (duration 00:00:09) [common]
234 14:07:34.102894 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 14:07:34.102990 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 14:07:34.103121 substitutions:
237 14:07:34.103192 - {DTB}: None
238 14:07:34.103258 - {INITRD}: 6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
239 14:07:34.103328 - {KERNEL}: 6961124/tftp-deploy-iaxf4ii7/kernel/bzImage
240 14:07:34.103390 - {LAVA_MAC}: None
241 14:07:34.103449 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/6961124/extract-nfsrootfs-ry6zij56
242 14:07:34.103510 - {NFS_SERVER_IP}: 192.168.201.1
243 14:07:34.103574 - {PRESEED_CONFIG}: None
244 14:07:34.103633 - {PRESEED_LOCAL}: None
245 14:07:34.103697 - {RAMDISK}: 6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
246 14:07:34.103755 - {ROOT_PART}: None
247 14:07:34.103818 - {ROOT}: None
248 14:07:34.103875 - {SERVER_IP}: 192.168.201.1
249 14:07:34.103931 - {TEE}: None
250 14:07:34.103987 Parsed boot commands:
251 14:07:34.104047 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 14:07:34.104203 Parsed boot commands: tftpboot 192.168.201.1 6961124/tftp-deploy-iaxf4ii7/kernel/bzImage 6961124/tftp-deploy-iaxf4ii7/kernel/cmdline 6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
253 14:07:34.104306 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 14:07:34.104403 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 14:07:34.104498 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 14:07:34.104597 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 14:07:34.104673 Not connected, no need to disconnect.
258 14:07:34.104752 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 14:07:34.104846 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 14:07:34.104916 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
261 14:07:34.107677 Setting prompt string to ['lava-test: # ']
262 14:07:34.107963 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 14:07:34.108074 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 14:07:34.108177 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 14:07:34.108278 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 14:07:34.108462 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
267 14:07:34.127498 >> Command sent successfully.
268 14:07:34.129387 Returned 0 in 0 seconds
269 14:07:34.230148 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 14:07:34.230475 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 14:07:34.230575 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 14:07:34.230664 Setting prompt string to 'Starting depthcharge on Helios...'
274 14:07:34.230740 Changing prompt to 'Starting depthcharge on Helios...'
275 14:07:34.230816 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 14:07:34.231082 [Enter `^Ec?' for help]
277 14:07:41.386643
278 14:07:41.386814
279 14:07:41.396931 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 14:07:41.400123 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 14:07:41.406731 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 14:07:41.409865 CPU: AES supported, TXT NOT supported, VT supported
283 14:07:41.416484 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 14:07:41.419941 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 14:07:41.426796 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 14:07:41.429745 VBOOT: Loading verstage.
287 14:07:41.433186 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
288 14:07:41.439938 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 14:07:41.443897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 14:07:41.446656 CBFS @ c08000 size 3f8000
291 14:07:41.453531 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 14:07:41.456459 CBFS: Locating 'fallback/verstage'
293 14:07:41.459568 CBFS: Found @ offset 10fb80 size 1072c
294 14:07:41.463741
295 14:07:41.463828
296 14:07:41.473682 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 14:07:41.487977 Probing TPM: . done!
298 14:07:41.491292 TPM ready after 0 ms
299 14:07:41.494609 Connected to device vid:did:rid of 1ae0:0028:00
300 14:07:41.504601 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
301 14:07:41.508501 Initialized TPM device CR50 revision 0
302 14:07:41.543944 tlcl_send_startup: Startup return code is 0
303 14:07:41.544052 TPM: setup succeeded
304 14:07:41.556438 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 14:07:41.560327 Chrome EC: UHEPI supported
306 14:07:41.563693 Phase 1
307 14:07:41.567492 FMAP: area GBB found @ c05000 (12288 bytes)
308 14:07:41.573802 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 14:07:41.573889 Phase 2
310 14:07:41.576811 Phase 3
311 14:07:41.580522 FMAP: area GBB found @ c05000 (12288 bytes)
312 14:07:41.587378 VB2:vb2_report_dev_firmware() This is developer signed firmware
313 14:07:41.593567 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 14:07:41.597332 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
315 14:07:41.603642 VB2:vb2_verify_keyblock() Checking keyblock signature...
316 14:07:41.619268 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 14:07:41.622830 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 14:07:41.629772 VB2:vb2_verify_fw_preamble() Verifying preamble.
319 14:07:41.633650 Phase 4
320 14:07:41.636715 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
321 14:07:41.643447 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
322 14:07:41.823067 VB2:vb2_rsa_verify_digest() Digest check failed!
323 14:07:41.829540 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
324 14:07:41.829637 Saving nvdata
325 14:07:41.832135 Reboot requested (10020007)
326 14:07:41.835992 board_reset() called!
327 14:07:41.836079 full_reset() called!
328 14:07:46.354268
329 14:07:46.354861
330 14:07:46.364658 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
331 14:07:46.368158 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
332 14:07:46.374330 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
333 14:07:46.377992 CPU: AES supported, TXT NOT supported, VT supported
334 14:07:46.384937 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
335 14:07:46.387678 PCH: device id 0284 (rev 00) is Cometlake-U Premium
336 14:07:46.394220 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
337 14:07:46.396928 VBOOT: Loading verstage.
338 14:07:46.400662 FMAP: Found \"FLASH\" version 1.1 at 0xc04000.
339 14:07:46.407789 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
340 14:07:46.414037 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
341 14:07:46.414543 CBFS @ c08000 size 3f8000
342 14:07:46.421054 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
343 14:07:46.423929 CBFS: Locating 'fallback/verstage'
344 14:07:46.427347 CBFS: Found @ offset 10fb80 size 1072c
345 14:07:46.431144
346 14:07:46.431631
347 14:07:46.441873 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
348 14:07:46.456478 Probing TPM: . done!
349 14:07:46.459390 TPM ready after 0 ms
350 14:07:46.462149 Connected to device vid:did:rid of 1ae0:0028:00
351 14:07:46.472370 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
352 14:07:46.476414 Initialized TPM device CR50 revision 0
353 14:07:46.511840 tlcl_send_startup: Startup return code is 0
354 14:07:46.512427 TPM: setup succeeded
355 14:07:46.523944 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
356 14:07:46.528500 Chrome EC: UHEPI supported
357 14:07:46.531469 Phase 1
358 14:07:46.534789 FMAP: area GBB found @ c05000 (12288 bytes)
359 14:07:46.540821 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
360 14:07:46.547604 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
361 14:07:46.551160 Recovery requested (1009000e)
362 14:07:46.556613 Saving nvdata
363 14:07:46.562904 tlcl_extend: response is 0
364 14:07:46.571578 tlcl_extend: response is 0
365 14:07:46.578829 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 14:07:46.581920 CBFS @ c08000 size 3f8000
367 14:07:46.588282 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 14:07:46.591860 CBFS: Locating 'fallback/romstage'
369 14:07:46.595233 CBFS: Found @ offset 80 size 145fc
370 14:07:46.598299 Accumulated console time in verstage 99 ms
371 14:07:46.598648
372 14:07:46.598925
373 14:07:46.611624 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
374 14:07:46.618362 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
375 14:07:46.622068 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
376 14:07:46.624926 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
377 14:07:46.631409 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
378 14:07:46.634998 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
379 14:07:46.638379 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
380 14:07:46.641385 TCO_STS: 0000 0000
381 14:07:46.644969 GEN_PMCON: e0015238 00000200
382 14:07:46.647778 GBLRST_CAUSE: 00000000 00000000
383 14:07:46.647981 prev_sleep_state 5
384 14:07:46.651510 Boot Count incremented to 34224
385 14:07:46.658146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 14:07:46.661759 CBFS @ c08000 size 3f8000
387 14:07:46.668004 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 14:07:46.668207 CBFS: Locating 'fspm.bin'
389 14:07:46.674452 CBFS: Found @ offset 5ffc0 size 71000
390 14:07:46.677834 Chrome EC: UHEPI supported
391 14:07:46.685170 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
392 14:07:46.688220 Probing TPM: done!
393 14:07:46.694374 Connected to device vid:did:rid of 1ae0:0028:00
394 14:07:46.704698 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
395 14:07:46.711127 Initialized TPM device CR50 revision 0
396 14:07:46.719504 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
397 14:07:46.726476 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
398 14:07:46.729547 MRC cache found, size 1948
399 14:07:46.732877 bootmode is set to: 2
400 14:07:46.736384 PRMRR disabled by config.
401 14:07:46.736471 SPD INDEX = 1
402 14:07:46.742787 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
403 14:07:46.746203 CBFS @ c08000 size 3f8000
404 14:07:46.752575 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
405 14:07:46.752662 CBFS: Locating 'spd.bin'
406 14:07:46.756049 CBFS: Found @ offset 5fb80 size 400
407 14:07:46.759360 SPD: module type is LPDDR3
408 14:07:46.762413 SPD: module part is
409 14:07:46.769647 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
410 14:07:46.772558 SPD: device width 4 bits, bus width 8 bits
411 14:07:46.776534 SPD: module size is 4096 MB (per channel)
412 14:07:46.779058 memory slot: 0 configuration done.
413 14:07:46.782622 memory slot: 2 configuration done.
414 14:07:46.834285 CBMEM:
415 14:07:46.837770 IMD: root @ 99fff000 254 entries.
416 14:07:46.841264 IMD: root @ 99ffec00 62 entries.
417 14:07:46.844365 External stage cache:
418 14:07:46.847420 IMD: root @ 9abff000 254 entries.
419 14:07:46.850895 IMD: root @ 9abfec00 62 entries.
420 14:07:46.854453 Chrome EC: clear events_b mask to 0x0000000020004000
421 14:07:46.870161 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 14:07:46.884195 tlcl_write: response is 0
423 14:07:46.893140 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 14:07:46.899559 MRC: TPM MRC hash updated successfully.
425 14:07:46.899647 2 DIMMs found
426 14:07:46.902788 SMM Memory Map
427 14:07:46.906363 SMRAM : 0x9a000000 0x1000000
428 14:07:46.909109 Subregion 0: 0x9a000000 0xa00000
429 14:07:46.912940 Subregion 1: 0x9aa00000 0x200000
430 14:07:46.915764 Subregion 2: 0x9ac00000 0x400000
431 14:07:46.919548 top_of_ram = 0x9a000000
432 14:07:46.922354 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
433 14:07:46.929267 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
434 14:07:46.932318 MTRR Range: Start=ff000000 End=0 (Size 1000000)
435 14:07:46.939071 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 14:07:46.942252 CBFS @ c08000 size 3f8000
437 14:07:46.945645 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 14:07:46.948911 CBFS: Locating 'fallback/postcar'
439 14:07:46.955634 CBFS: Found @ offset 107000 size 4b44
440 14:07:46.958645 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
441 14:07:46.971469 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
442 14:07:46.974631 Processing 180 relocs. Offset value of 0x97c0c000
443 14:07:46.983555 Accumulated console time in romstage 286 ms
444 14:07:46.983643
445 14:07:46.983711
446 14:07:46.993674 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
447 14:07:46.999860 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
448 14:07:47.003242 CBFS @ c08000 size 3f8000
449 14:07:47.006956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
450 14:07:47.013111 CBFS: Locating 'fallback/ramstage'
451 14:07:47.017281 CBFS: Found @ offset 43380 size 1b9e8
452 14:07:47.023100 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
453 14:07:47.055248 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
454 14:07:47.058451 Processing 3976 relocs. Offset value of 0x98db0000
455 14:07:47.065085 Accumulated console time in postcar 52 ms
456 14:07:47.065172
457 14:07:47.065239
458 14:07:47.075451 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
459 14:07:47.081733 FMAP: area RO_VPD found @ c00000 (16384 bytes)
460 14:07:47.085004 WARNING: RO_VPD is uninitialized or empty.
461 14:07:47.088490 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 14:07:47.095874 FMAP: area RW_VPD found @ af8000 (8192 bytes)
463 14:07:47.095961 Normal boot.
464 14:07:47.101707 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
465 14:07:47.105348 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 14:07:47.108226 CBFS @ c08000 size 3f8000
467 14:07:47.114882 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 14:07:47.118165 CBFS: Locating 'cpu_microcode_blob.bin'
469 14:07:47.121503 CBFS: Found @ offset 14700 size 2ec00
470 14:07:47.125127 microcode: sig=0x806ec pf=0x4 revision=0xc9
471 14:07:47.128549 Skip microcode update
472 14:07:47.131890 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
473 14:07:47.134828 CBFS @ c08000 size 3f8000
474 14:07:47.141331 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
475 14:07:47.144547 CBFS: Locating 'fsps.bin'
476 14:07:47.148037 CBFS: Found @ offset d1fc0 size 35000
477 14:07:47.173045 Detected 4 core, 8 thread CPU.
478 14:07:47.176650 Setting up SMI for CPU
479 14:07:47.180447 IED base = 0x9ac00000
480 14:07:47.180534 IED size = 0x00400000
481 14:07:47.183176 Will perform SMM setup.
482 14:07:47.189777 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
483 14:07:47.196492 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
484 14:07:47.202886 Processing 16 relocs. Offset value of 0x00030000
485 14:07:47.202974 Attempting to start 7 APs
486 14:07:47.209478 Waiting for 10ms after sending INIT.
487 14:07:47.223032 Waiting for 1st SIPI to complete...done.
488 14:07:47.223121 AP: slot 1 apic_id 2.
489 14:07:47.226556 AP: slot 3 apic_id 3.
490 14:07:47.229659 AP: slot 4 apic_id 7.
491 14:07:47.229740 AP: slot 5 apic_id 6.
492 14:07:47.232680 AP: slot 6 apic_id 5.
493 14:07:47.235952 AP: slot 7 apic_id 4.
494 14:07:47.239805 AP: slot 2 apic_id 1.
495 14:07:47.242811 Waiting for 2nd SIPI to complete...done.
496 14:07:47.249692 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
497 14:07:47.255841 Processing 13 relocs. Offset value of 0x00038000
498 14:07:47.262421 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
499 14:07:47.265968 Installing SMM handler to 0x9a000000
500 14:07:47.272315 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
501 14:07:47.279296 Processing 658 relocs. Offset value of 0x9a010000
502 14:07:47.285885 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
503 14:07:47.288846 Processing 13 relocs. Offset value of 0x9a008000
504 14:07:47.295534 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
505 14:07:47.302088 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
506 14:07:47.309545 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
507 14:07:47.312374 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
508 14:07:47.318815 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
509 14:07:47.325302 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
510 14:07:47.331823 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
511 14:07:47.338777 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
512 14:07:47.341552 Clearing SMI status registers
513 14:07:47.341633 SMI_STS: PM1
514 14:07:47.344995 PM1_STS: PWRBTN
515 14:07:47.345071 TCO_STS: SECOND_TO
516 14:07:47.348801 New SMBASE 0x9a000000
517 14:07:47.352139 In relocation handler: CPU 0
518 14:07:47.355137 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
519 14:07:47.358735 Writing SMRR. base = 0x9a000006, mask=0xff000800
520 14:07:47.362332 Relocation complete.
521 14:07:47.365364 New SMBASE 0x99fff800
522 14:07:47.368297 In relocation handler: CPU 2
523 14:07:47.371529 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
524 14:07:47.375622 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 14:07:47.378562 Relocation complete.
526 14:07:47.381698 New SMBASE 0x99fff400
527 14:07:47.385285 In relocation handler: CPU 3
528 14:07:47.388920 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
529 14:07:47.392082 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 14:07:47.395063 Relocation complete.
531 14:07:47.397963 New SMBASE 0x99fffc00
532 14:07:47.401822 In relocation handler: CPU 1
533 14:07:47.404623 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
534 14:07:47.407898 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 14:07:47.411865 Relocation complete.
536 14:07:47.414794 New SMBASE 0x99ffe800
537 14:07:47.414872 In relocation handler: CPU 6
538 14:07:47.422089 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
539 14:07:47.425476 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 14:07:47.427827 Relocation complete.
541 14:07:47.431277 New SMBASE 0x99ffe400
542 14:07:47.431355 In relocation handler: CPU 7
543 14:07:47.438110 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
544 14:07:47.441115 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 14:07:47.444844 Relocation complete.
546 14:07:47.447783 New SMBASE 0x99fff000
547 14:07:47.447860 In relocation handler: CPU 4
548 14:07:47.454261 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
549 14:07:47.457965 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 14:07:47.460775 Relocation complete.
551 14:07:47.464634 New SMBASE 0x99ffec00
552 14:07:47.464710 In relocation handler: CPU 5
553 14:07:47.470782 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
554 14:07:47.474330 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 14:07:47.477801 Relocation complete.
556 14:07:47.477876 Initializing CPU #0
557 14:07:47.480537 CPU: vendor Intel device 806ec
558 14:07:47.487638 CPU: family 06, model 8e, stepping 0c
559 14:07:47.487719 Clearing out pending MCEs
560 14:07:47.490891 Setting up local APIC...
561 14:07:47.494494 apic_id: 0x00 done.
562 14:07:47.498103 Turbo is available but hidden
563 14:07:47.500953 Turbo is available and visible
564 14:07:47.501075 VMX status: enabled
565 14:07:47.504417 IA32_FEATURE_CONTROL status: locked
566 14:07:47.507511 Skip microcode update
567 14:07:47.510703 CPU #0 initialized
568 14:07:47.510780 Initializing CPU #2
569 14:07:47.513979 Initializing CPU #6
570 14:07:47.514055 Initializing CPU #7
571 14:07:47.517681 CPU: vendor Intel device 806ec
572 14:07:47.524290 CPU: family 06, model 8e, stepping 0c
573 14:07:47.524367 CPU: vendor Intel device 806ec
574 14:07:47.530545 CPU: family 06, model 8e, stepping 0c
575 14:07:47.530630 Clearing out pending MCEs
576 14:07:47.534014 Clearing out pending MCEs
577 14:07:47.537143 Setting up local APIC...
578 14:07:47.540563 CPU: vendor Intel device 806ec
579 14:07:47.543997 CPU: family 06, model 8e, stepping 0c
580 14:07:47.547278 Clearing out pending MCEs
581 14:07:47.550451 Setting up local APIC...
582 14:07:47.550534 Setting up local APIC...
583 14:07:47.553650 Initializing CPU #3
584 14:07:47.557221 Initializing CPU #1
585 14:07:47.560522 CPU: vendor Intel device 806ec
586 14:07:47.563738 CPU: family 06, model 8e, stepping 0c
587 14:07:47.567191 CPU: vendor Intel device 806ec
588 14:07:47.570166 CPU: family 06, model 8e, stepping 0c
589 14:07:47.573769 Clearing out pending MCEs
590 14:07:47.573854 Clearing out pending MCEs
591 14:07:47.577528 Setting up local APIC...
592 14:07:47.580763 Initializing CPU #5
593 14:07:47.580848 Initializing CPU #4
594 14:07:47.583340 apic_id: 0x03 done.
595 14:07:47.587480 Setting up local APIC...
596 14:07:47.587565 apic_id: 0x05 done.
597 14:07:47.590193 apic_id: 0x04 done.
598 14:07:47.593272 VMX status: enabled
599 14:07:47.593357 VMX status: enabled
600 14:07:47.596967 IA32_FEATURE_CONTROL status: locked
601 14:07:47.603225 IA32_FEATURE_CONTROL status: locked
602 14:07:47.603310 Skip microcode update
603 14:07:47.606748 Skip microcode update
604 14:07:47.606837 CPU #6 initialized
605 14:07:47.609929 apic_id: 0x01 done.
606 14:07:47.614098 CPU: vendor Intel device 806ec
607 14:07:47.616445 CPU: family 06, model 8e, stepping 0c
608 14:07:47.620262 CPU #7 initialized
609 14:07:47.620347 VMX status: enabled
610 14:07:47.623435 apic_id: 0x02 done.
611 14:07:47.626985 VMX status: enabled
612 14:07:47.627060 VMX status: enabled
613 14:07:47.630018 IA32_FEATURE_CONTROL status: locked
614 14:07:47.632838 IA32_FEATURE_CONTROL status: locked
615 14:07:47.636656 Skip microcode update
616 14:07:47.639863 Skip microcode update
617 14:07:47.639938 CPU #3 initialized
618 14:07:47.643249 CPU #1 initialized
619 14:07:47.646348 Clearing out pending MCEs
620 14:07:47.649522 CPU: vendor Intel device 806ec
621 14:07:47.652868 CPU: family 06, model 8e, stepping 0c
622 14:07:47.657208 Clearing out pending MCEs
623 14:07:47.657293 Setting up local APIC...
624 14:07:47.662864 IA32_FEATURE_CONTROL status: locked
625 14:07:47.662949 apic_id: 0x06 done.
626 14:07:47.666291 Setting up local APIC...
627 14:07:47.669617 Skip microcode update
628 14:07:47.669702 VMX status: enabled
629 14:07:47.673110 apic_id: 0x07 done.
630 14:07:47.676701 IA32_FEATURE_CONTROL status: locked
631 14:07:47.679556 VMX status: enabled
632 14:07:47.679640 Skip microcode update
633 14:07:47.683163 IA32_FEATURE_CONTROL status: locked
634 14:07:47.686012 CPU #5 initialized
635 14:07:47.689680 Skip microcode update
636 14:07:47.689765 CPU #2 initialized
637 14:07:47.692741 CPU #4 initialized
638 14:07:47.696005 bsp_do_flight_plan done after 452 msecs.
639 14:07:47.699184 CPU: frequency set to 4200 MHz
640 14:07:47.699268 Enabling SMIs.
641 14:07:47.702566 Locking SMM.
642 14:07:47.717799 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
643 14:07:47.720141 CBFS @ c08000 size 3f8000
644 14:07:47.727340 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
645 14:07:47.727427 CBFS: Locating 'vbt.bin'
646 14:07:47.730104 CBFS: Found @ offset 5f5c0 size 499
647 14:07:47.736883 Found a VBT of 4608 bytes after decompression
648 14:07:47.917326 Display FSP Version Info HOB
649 14:07:47.920249 Reference Code - CPU = 9.0.1e.30
650 14:07:47.923471 uCode Version = 0.0.0.ca
651 14:07:47.926805 TXT ACM version = ff.ff.ff.ffff
652 14:07:47.929949 Display FSP Version Info HOB
653 14:07:47.933535 Reference Code - ME = 9.0.1e.30
654 14:07:47.936410 MEBx version = 0.0.0.0
655 14:07:47.940258 ME Firmware Version = Consumer SKU
656 14:07:47.943440 Display FSP Version Info HOB
657 14:07:47.946790 Reference Code - CML PCH = 9.0.1e.30
658 14:07:47.949965 PCH-CRID Status = Disabled
659 14:07:47.953175 PCH-CRID Original Value = ff.ff.ff.ffff
660 14:07:47.956859 PCH-CRID New Value = ff.ff.ff.ffff
661 14:07:47.959896 OPROM - RST - RAID = ff.ff.ff.ffff
662 14:07:47.964189 ChipsetInit Base Version = ff.ff.ff.ffff
663 14:07:47.966623 ChipsetInit Oem Version = ff.ff.ff.ffff
664 14:07:47.969691 Display FSP Version Info HOB
665 14:07:47.976782 Reference Code - SA - System Agent = 9.0.1e.30
666 14:07:47.980235 Reference Code - MRC = 0.7.1.6c
667 14:07:47.980324 SA - PCIe Version = 9.0.1e.30
668 14:07:47.983095 SA-CRID Status = Disabled
669 14:07:47.986570 SA-CRID Original Value = 0.0.0.c
670 14:07:47.989799 SA-CRID New Value = 0.0.0.c
671 14:07:47.993215 OPROM - VBIOS = ff.ff.ff.ffff
672 14:07:47.996623 RTC Init
673 14:07:48.000098 Set power on after power failure.
674 14:07:48.000185 Disabling Deep S3
675 14:07:48.003615 Disabling Deep S3
676 14:07:48.003701 Disabling Deep S4
677 14:07:48.006530 Disabling Deep S4
678 14:07:48.006616 Disabling Deep S5
679 14:07:48.009506 Disabling Deep S5
680 14:07:48.016199 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
681 14:07:48.016287 Enumerating buses...
682 14:07:48.023332 Show all devs... Before device enumeration.
683 14:07:48.023420 Root Device: enabled 1
684 14:07:48.026106 CPU_CLUSTER: 0: enabled 1
685 14:07:48.029583 DOMAIN: 0000: enabled 1
686 14:07:48.032939 APIC: 00: enabled 1
687 14:07:48.033030 PCI: 00:00.0: enabled 1
688 14:07:48.036120 PCI: 00:02.0: enabled 1
689 14:07:48.039418 PCI: 00:04.0: enabled 0
690 14:07:48.043223 PCI: 00:05.0: enabled 0
691 14:07:48.043310 PCI: 00:12.0: enabled 1
692 14:07:48.046167 PCI: 00:12.5: enabled 0
693 14:07:48.049517 PCI: 00:12.6: enabled 0
694 14:07:48.049604 PCI: 00:14.0: enabled 1
695 14:07:48.052748 PCI: 00:14.1: enabled 0
696 14:07:48.055958 PCI: 00:14.3: enabled 1
697 14:07:48.059552 PCI: 00:14.5: enabled 0
698 14:07:48.059639 PCI: 00:15.0: enabled 1
699 14:07:48.062840 PCI: 00:15.1: enabled 1
700 14:07:48.066096 PCI: 00:15.2: enabled 0
701 14:07:48.069934 PCI: 00:15.3: enabled 0
702 14:07:48.070021 PCI: 00:16.0: enabled 1
703 14:07:48.072612 PCI: 00:16.1: enabled 0
704 14:07:48.076702 PCI: 00:16.2: enabled 0
705 14:07:48.079140 PCI: 00:16.3: enabled 0
706 14:07:48.079226 PCI: 00:16.4: enabled 0
707 14:07:48.082762 PCI: 00:16.5: enabled 0
708 14:07:48.085995 PCI: 00:17.0: enabled 1
709 14:07:48.086081 PCI: 00:19.0: enabled 1
710 14:07:48.089346 PCI: 00:19.1: enabled 0
711 14:07:48.092727 PCI: 00:19.2: enabled 0
712 14:07:48.095724 PCI: 00:1a.0: enabled 0
713 14:07:48.095811 PCI: 00:1c.0: enabled 0
714 14:07:48.099020 PCI: 00:1c.1: enabled 0
715 14:07:48.102993 PCI: 00:1c.2: enabled 0
716 14:07:48.106012 PCI: 00:1c.3: enabled 0
717 14:07:48.106098 PCI: 00:1c.4: enabled 0
718 14:07:48.108890 PCI: 00:1c.5: enabled 0
719 14:07:48.112895 PCI: 00:1c.6: enabled 0
720 14:07:48.116240 PCI: 00:1c.7: enabled 0
721 14:07:48.116326 PCI: 00:1d.0: enabled 1
722 14:07:48.119051 PCI: 00:1d.1: enabled 0
723 14:07:48.122212 PCI: 00:1d.2: enabled 0
724 14:07:48.122299 PCI: 00:1d.3: enabled 0
725 14:07:48.125794 PCI: 00:1d.4: enabled 0
726 14:07:48.128782 PCI: 00:1d.5: enabled 1
727 14:07:48.132480 PCI: 00:1e.0: enabled 1
728 14:07:48.132571 PCI: 00:1e.1: enabled 0
729 14:07:48.135906 PCI: 00:1e.2: enabled 1
730 14:07:48.139286 PCI: 00:1e.3: enabled 1
731 14:07:48.142340 PCI: 00:1f.0: enabled 1
732 14:07:48.142428 PCI: 00:1f.1: enabled 1
733 14:07:48.145608 PCI: 00:1f.2: enabled 1
734 14:07:48.149660 PCI: 00:1f.3: enabled 1
735 14:07:48.152798 PCI: 00:1f.4: enabled 1
736 14:07:48.152884 PCI: 00:1f.5: enabled 1
737 14:07:48.155319 PCI: 00:1f.6: enabled 0
738 14:07:48.158714 USB0 port 0: enabled 1
739 14:07:48.158801 I2C: 00:15: enabled 1
740 14:07:48.162340 I2C: 00:5d: enabled 1
741 14:07:48.165779 GENERIC: 0.0: enabled 1
742 14:07:48.168705 I2C: 00:1a: enabled 1
743 14:07:48.168791 I2C: 00:38: enabled 1
744 14:07:48.171879 I2C: 00:39: enabled 1
745 14:07:48.175557 I2C: 00:3a: enabled 1
746 14:07:48.175643 I2C: 00:3b: enabled 1
747 14:07:48.179136 PCI: 00:00.0: enabled 1
748 14:07:48.182341 SPI: 00: enabled 1
749 14:07:48.182431 SPI: 01: enabled 1
750 14:07:48.185186 PNP: 0c09.0: enabled 1
751 14:07:48.188573 USB2 port 0: enabled 1
752 14:07:48.188659 USB2 port 1: enabled 1
753 14:07:48.192932 USB2 port 2: enabled 0
754 14:07:48.195488 USB2 port 3: enabled 0
755 14:07:48.195568 USB2 port 5: enabled 0
756 14:07:48.199302 USB2 port 6: enabled 1
757 14:07:48.202180 USB2 port 9: enabled 1
758 14:07:48.202267 USB3 port 0: enabled 1
759 14:07:48.205330 USB3 port 1: enabled 1
760 14:07:48.208754 USB3 port 2: enabled 1
761 14:07:48.211643 USB3 port 3: enabled 1
762 14:07:48.211731 USB3 port 4: enabled 0
763 14:07:48.215544 APIC: 02: enabled 1
764 14:07:48.215630 APIC: 01: enabled 1
765 14:07:48.218956 APIC: 03: enabled 1
766 14:07:48.221818 APIC: 07: enabled 1
767 14:07:48.221905 APIC: 06: enabled 1
768 14:07:48.224966 APIC: 05: enabled 1
769 14:07:48.228319 APIC: 04: enabled 1
770 14:07:48.228406 Compare with tree...
771 14:07:48.231759 Root Device: enabled 1
772 14:07:48.234937 CPU_CLUSTER: 0: enabled 1
773 14:07:48.235023 APIC: 00: enabled 1
774 14:07:48.238528 APIC: 02: enabled 1
775 14:07:48.242383 APIC: 01: enabled 1
776 14:07:48.242469 APIC: 03: enabled 1
777 14:07:48.245149 APIC: 07: enabled 1
778 14:07:48.248475 APIC: 06: enabled 1
779 14:07:48.248562 APIC: 05: enabled 1
780 14:07:48.251673 APIC: 04: enabled 1
781 14:07:48.254947 DOMAIN: 0000: enabled 1
782 14:07:48.258675 PCI: 00:00.0: enabled 1
783 14:07:48.258761 PCI: 00:02.0: enabled 1
784 14:07:48.261554 PCI: 00:04.0: enabled 0
785 14:07:48.265436 PCI: 00:05.0: enabled 0
786 14:07:48.268142 PCI: 00:12.0: enabled 1
787 14:07:48.271463 PCI: 00:12.5: enabled 0
788 14:07:48.271550 PCI: 00:12.6: enabled 0
789 14:07:48.275253 PCI: 00:14.0: enabled 1
790 14:07:48.278672 USB0 port 0: enabled 1
791 14:07:48.281583 USB2 port 0: enabled 1
792 14:07:48.284879 USB2 port 1: enabled 1
793 14:07:48.285001 USB2 port 2: enabled 0
794 14:07:48.288225 USB2 port 3: enabled 0
795 14:07:48.291620 USB2 port 5: enabled 0
796 14:07:48.294629 USB2 port 6: enabled 1
797 14:07:48.298517 USB2 port 9: enabled 1
798 14:07:48.301906 USB3 port 0: enabled 1
799 14:07:48.301993 USB3 port 1: enabled 1
800 14:07:48.304564 USB3 port 2: enabled 1
801 14:07:48.308419 USB3 port 3: enabled 1
802 14:07:48.311622 USB3 port 4: enabled 0
803 14:07:48.314739 PCI: 00:14.1: enabled 0
804 14:07:48.314825 PCI: 00:14.3: enabled 1
805 14:07:48.317846 PCI: 00:14.5: enabled 0
806 14:07:48.321179 PCI: 00:15.0: enabled 1
807 14:07:48.324469 I2C: 00:15: enabled 1
808 14:07:48.327999 PCI: 00:15.1: enabled 1
809 14:07:48.328085 I2C: 00:5d: enabled 1
810 14:07:48.331646 GENERIC: 0.0: enabled 1
811 14:07:48.334389 PCI: 00:15.2: enabled 0
812 14:07:48.338204 PCI: 00:15.3: enabled 0
813 14:07:48.341708 PCI: 00:16.0: enabled 1
814 14:07:48.341796 PCI: 00:16.1: enabled 0
815 14:07:48.344463 PCI: 00:16.2: enabled 0
816 14:07:48.347628 PCI: 00:16.3: enabled 0
817 14:07:48.350990 PCI: 00:16.4: enabled 0
818 14:07:48.354269 PCI: 00:16.5: enabled 0
819 14:07:48.354356 PCI: 00:17.0: enabled 1
820 14:07:48.358045 PCI: 00:19.0: enabled 1
821 14:07:48.360785 I2C: 00:1a: enabled 1
822 14:07:48.364523 I2C: 00:38: enabled 1
823 14:07:48.364609 I2C: 00:39: enabled 1
824 14:07:48.368183 I2C: 00:3a: enabled 1
825 14:07:48.371435 I2C: 00:3b: enabled 1
826 14:07:48.374495 PCI: 00:19.1: enabled 0
827 14:07:48.377598 PCI: 00:19.2: enabled 0
828 14:07:48.377685 PCI: 00:1a.0: enabled 0
829 14:07:48.381530 PCI: 00:1c.0: enabled 0
830 14:07:48.384519 PCI: 00:1c.1: enabled 0
831 14:07:48.387842 PCI: 00:1c.2: enabled 0
832 14:07:48.387929 PCI: 00:1c.3: enabled 0
833 14:07:48.390903 PCI: 00:1c.4: enabled 0
834 14:07:48.394474 PCI: 00:1c.5: enabled 0
835 14:07:48.397614 PCI: 00:1c.6: enabled 0
836 14:07:48.400624 PCI: 00:1c.7: enabled 0
837 14:07:48.400711 PCI: 00:1d.0: enabled 1
838 14:07:48.404244 PCI: 00:1d.1: enabled 0
839 14:07:48.407509 PCI: 00:1d.2: enabled 0
840 14:07:48.410773 PCI: 00:1d.3: enabled 0
841 14:07:48.414202 PCI: 00:1d.4: enabled 0
842 14:07:48.414289 PCI: 00:1d.5: enabled 1
843 14:07:48.417854 PCI: 00:00.0: enabled 1
844 14:07:48.420796 PCI: 00:1e.0: enabled 1
845 14:07:48.423987 PCI: 00:1e.1: enabled 0
846 14:07:48.427425 PCI: 00:1e.2: enabled 1
847 14:07:48.427515 SPI: 00: enabled 1
848 14:07:48.430796 PCI: 00:1e.3: enabled 1
849 14:07:48.434123 SPI: 01: enabled 1
850 14:07:48.437460 PCI: 00:1f.0: enabled 1
851 14:07:48.437546 PNP: 0c09.0: enabled 1
852 14:07:48.440476 PCI: 00:1f.1: enabled 1
853 14:07:48.444478 PCI: 00:1f.2: enabled 1
854 14:07:48.447351 PCI: 00:1f.3: enabled 1
855 14:07:48.450683 PCI: 00:1f.4: enabled 1
856 14:07:48.450771 PCI: 00:1f.5: enabled 1
857 14:07:48.454050 PCI: 00:1f.6: enabled 0
858 14:07:48.457099 Root Device scanning...
859 14:07:48.460415 scan_static_bus for Root Device
860 14:07:48.463973 CPU_CLUSTER: 0 enabled
861 14:07:48.464059 DOMAIN: 0000 enabled
862 14:07:48.467643 DOMAIN: 0000 scanning...
863 14:07:48.470494 PCI: pci_scan_bus for bus 00
864 14:07:48.474468 PCI: 00:00.0 [8086/0000] ops
865 14:07:48.477367 PCI: 00:00.0 [8086/9b61] enabled
866 14:07:48.480770 PCI: 00:02.0 [8086/0000] bus ops
867 14:07:48.483657 PCI: 00:02.0 [8086/9b41] enabled
868 14:07:48.487010 PCI: 00:04.0 [8086/1903] disabled
869 14:07:48.490801 PCI: 00:08.0 [8086/1911] enabled
870 14:07:48.493628 PCI: 00:12.0 [8086/02f9] enabled
871 14:07:48.497182 PCI: 00:14.0 [8086/0000] bus ops
872 14:07:48.500471 PCI: 00:14.0 [8086/02ed] enabled
873 14:07:48.504078 PCI: 00:14.2 [8086/02ef] enabled
874 14:07:48.506851 PCI: 00:14.3 [8086/02f0] enabled
875 14:07:48.510630 PCI: 00:15.0 [8086/0000] bus ops
876 14:07:48.514069 PCI: 00:15.0 [8086/02e8] enabled
877 14:07:48.517124 PCI: 00:15.1 [8086/0000] bus ops
878 14:07:48.520398 PCI: 00:15.1 [8086/02e9] enabled
879 14:07:48.524484 PCI: 00:16.0 [8086/0000] ops
880 14:07:48.526823 PCI: 00:16.0 [8086/02e0] enabled
881 14:07:48.530180 PCI: 00:17.0 [8086/0000] ops
882 14:07:48.533203 PCI: 00:17.0 [8086/02d3] enabled
883 14:07:48.536516 PCI: 00:19.0 [8086/0000] bus ops
884 14:07:48.539977 PCI: 00:19.0 [8086/02c5] enabled
885 14:07:48.544139 PCI: 00:1d.0 [8086/0000] bus ops
886 14:07:48.547243 PCI: 00:1d.0 [8086/02b0] enabled
887 14:07:48.550006 PCI: Static device PCI: 00:1d.5 not found, disabling it.
888 14:07:48.553452 PCI: 00:1e.0 [8086/0000] ops
889 14:07:48.556900 PCI: 00:1e.0 [8086/02a8] enabled
890 14:07:48.560201 PCI: 00:1e.2 [8086/0000] bus ops
891 14:07:48.563225 PCI: 00:1e.2 [8086/02aa] enabled
892 14:07:48.566870 PCI: 00:1e.3 [8086/0000] bus ops
893 14:07:48.570218 PCI: 00:1e.3 [8086/02ab] enabled
894 14:07:48.573394 PCI: 00:1f.0 [8086/0000] bus ops
895 14:07:48.576671 PCI: 00:1f.0 [8086/0284] enabled
896 14:07:48.583067 PCI: Static device PCI: 00:1f.1 not found, disabling it.
897 14:07:48.590647 PCI: Static device PCI: 00:1f.2 not found, disabling it.
898 14:07:48.593329 PCI: 00:1f.3 [8086/0000] bus ops
899 14:07:48.596278 PCI: 00:1f.3 [8086/02c8] enabled
900 14:07:48.600089 PCI: 00:1f.4 [8086/0000] bus ops
901 14:07:48.603227 PCI: 00:1f.4 [8086/02a3] enabled
902 14:07:48.606584 PCI: 00:1f.5 [8086/0000] bus ops
903 14:07:48.609878 PCI: 00:1f.5 [8086/02a4] enabled
904 14:07:48.613089 PCI: Leftover static devices:
905 14:07:48.613176 PCI: 00:05.0
906 14:07:48.616587 PCI: 00:12.5
907 14:07:48.616674 PCI: 00:12.6
908 14:07:48.616742 PCI: 00:14.1
909 14:07:48.619816 PCI: 00:14.5
910 14:07:48.619902 PCI: 00:15.2
911 14:07:48.623045 PCI: 00:15.3
912 14:07:48.623131 PCI: 00:16.1
913 14:07:48.623200 PCI: 00:16.2
914 14:07:48.626427 PCI: 00:16.3
915 14:07:48.626514 PCI: 00:16.4
916 14:07:48.629586 PCI: 00:16.5
917 14:07:48.629672 PCI: 00:19.1
918 14:07:48.629745 PCI: 00:19.2
919 14:07:48.633254 PCI: 00:1a.0
920 14:07:48.633325 PCI: 00:1c.0
921 14:07:48.636499 PCI: 00:1c.1
922 14:07:48.636568 PCI: 00:1c.2
923 14:07:48.639948 PCI: 00:1c.3
924 14:07:48.640017 PCI: 00:1c.4
925 14:07:48.640079 PCI: 00:1c.5
926 14:07:48.643069 PCI: 00:1c.6
927 14:07:48.643138 PCI: 00:1c.7
928 14:07:48.646110 PCI: 00:1d.1
929 14:07:48.646177 PCI: 00:1d.2
930 14:07:48.646240 PCI: 00:1d.3
931 14:07:48.649537 PCI: 00:1d.4
932 14:07:48.649607 PCI: 00:1d.5
933 14:07:48.652984 PCI: 00:1e.1
934 14:07:48.653061 PCI: 00:1f.1
935 14:07:48.653125 PCI: 00:1f.2
936 14:07:48.655924 PCI: 00:1f.6
937 14:07:48.659218 PCI: Check your devicetree.cb.
938 14:07:48.662573 PCI: 00:02.0 scanning...
939 14:07:48.665770 scan_generic_bus for PCI: 00:02.0
940 14:07:48.669190 scan_generic_bus for PCI: 00:02.0 done
941 14:07:48.676013 scan_bus: scanning of bus PCI: 00:02.0 took 10182 usecs
942 14:07:48.676092 PCI: 00:14.0 scanning...
943 14:07:48.679139 scan_static_bus for PCI: 00:14.0
944 14:07:48.682621 USB0 port 0 enabled
945 14:07:48.686331 USB0 port 0 scanning...
946 14:07:48.689517 scan_static_bus for USB0 port 0
947 14:07:48.689585 USB2 port 0 enabled
948 14:07:48.692317 USB2 port 1 enabled
949 14:07:48.695678 USB2 port 2 disabled
950 14:07:48.695756 USB2 port 3 disabled
951 14:07:48.699011 USB2 port 5 disabled
952 14:07:48.703127 USB2 port 6 enabled
953 14:07:48.703196 USB2 port 9 enabled
954 14:07:48.705540 USB3 port 0 enabled
955 14:07:48.705611 USB3 port 1 enabled
956 14:07:48.709136 USB3 port 2 enabled
957 14:07:48.712300 USB3 port 3 enabled
958 14:07:48.712374 USB3 port 4 disabled
959 14:07:48.715822 USB2 port 0 scanning...
960 14:07:48.718936 scan_static_bus for USB2 port 0
961 14:07:48.722641 scan_static_bus for USB2 port 0 done
962 14:07:48.728838 scan_bus: scanning of bus USB2 port 0 took 9705 usecs
963 14:07:48.732072 USB2 port 1 scanning...
964 14:07:48.735932 scan_static_bus for USB2 port 1
965 14:07:48.738884 scan_static_bus for USB2 port 1 done
966 14:07:48.742859 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
967 14:07:48.745845 USB2 port 6 scanning...
968 14:07:48.749119 scan_static_bus for USB2 port 6
969 14:07:48.752479 scan_static_bus for USB2 port 6 done
970 14:07:48.758817 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
971 14:07:48.761948 USB2 port 9 scanning...
972 14:07:48.765664 scan_static_bus for USB2 port 9
973 14:07:48.769193 scan_static_bus for USB2 port 9 done
974 14:07:48.772123 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
975 14:07:48.775289 USB3 port 0 scanning...
976 14:07:48.778914 scan_static_bus for USB3 port 0
977 14:07:48.782556 scan_static_bus for USB3 port 0 done
978 14:07:48.788625 scan_bus: scanning of bus USB3 port 0 took 9700 usecs
979 14:07:48.791818 USB3 port 1 scanning...
980 14:07:48.795062 scan_static_bus for USB3 port 1
981 14:07:48.798728 scan_static_bus for USB3 port 1 done
982 14:07:48.802209 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
983 14:07:48.805403 USB3 port 2 scanning...
984 14:07:48.808613 scan_static_bus for USB3 port 2
985 14:07:48.811802 scan_static_bus for USB3 port 2 done
986 14:07:48.818510 scan_bus: scanning of bus USB3 port 2 took 9708 usecs
987 14:07:48.821953 USB3 port 3 scanning...
988 14:07:48.824919 scan_static_bus for USB3 port 3
989 14:07:48.828191 scan_static_bus for USB3 port 3 done
990 14:07:48.835100 scan_bus: scanning of bus USB3 port 3 took 9697 usecs
991 14:07:48.838577 scan_static_bus for USB0 port 0 done
992 14:07:48.841774 scan_bus: scanning of bus USB0 port 0 took 155374 usecs
993 14:07:48.844919 scan_static_bus for PCI: 00:14.0 done
994 14:07:48.852509 scan_bus: scanning of bus PCI: 00:14.0 took 172975 usecs
995 14:07:48.855151 PCI: 00:15.0 scanning...
996 14:07:48.858275 scan_generic_bus for PCI: 00:15.0
997 14:07:48.861573 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
998 14:07:48.864763 scan_generic_bus for PCI: 00:15.0 done
999 14:07:48.871379 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1000 14:07:48.874830 PCI: 00:15.1 scanning...
1001 14:07:48.878163 scan_generic_bus for PCI: 00:15.1
1002 14:07:48.881813 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1003 14:07:48.887807 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1004 14:07:48.891545 scan_generic_bus for PCI: 00:15.1 done
1005 14:07:48.894696 scan_bus: scanning of bus PCI: 00:15.1 took 18656 usecs
1006 14:07:48.898034 PCI: 00:19.0 scanning...
1007 14:07:48.901567 scan_generic_bus for PCI: 00:19.0
1008 14:07:48.908139 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1009 14:07:48.911130 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1010 14:07:48.914642 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1011 14:07:48.917775 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1012 14:07:48.921538 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1013 14:07:48.929085 scan_generic_bus for PCI: 00:19.0 done
1014 14:07:48.931200 scan_bus: scanning of bus PCI: 00:19.0 took 30731 usecs
1015 14:07:48.934820 PCI: 00:1d.0 scanning...
1016 14:07:48.937720 do_pci_scan_bridge for PCI: 00:1d.0
1017 14:07:48.941275 PCI: pci_scan_bus for bus 01
1018 14:07:48.944722 PCI: 01:00.0 [1c5c/1327] enabled
1019 14:07:48.948036 Enabling Common Clock Configuration
1020 14:07:48.954671 L1 Sub-State supported from root port 29
1021 14:07:48.954747 L1 Sub-State Support = 0xf
1022 14:07:48.958091 CommonModeRestoreTime = 0x28
1023 14:07:48.964609 Power On Value = 0x16, Power On Scale = 0x0
1024 14:07:48.964686 ASPM: Enabled L1
1025 14:07:48.970889 scan_bus: scanning of bus PCI: 00:1d.0 took 32797 usecs
1026 14:07:48.974631 PCI: 00:1e.2 scanning...
1027 14:07:48.977753 scan_generic_bus for PCI: 00:1e.2
1028 14:07:48.981335 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1029 14:07:48.984124 scan_generic_bus for PCI: 00:1e.2 done
1030 14:07:48.991329 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1031 14:07:48.991403 PCI: 00:1e.3 scanning...
1032 14:07:48.998152 scan_generic_bus for PCI: 00:1e.3
1033 14:07:49.001118 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1034 14:07:49.004440 scan_generic_bus for PCI: 00:1e.3 done
1035 14:07:49.010878 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1036 14:07:49.010962 PCI: 00:1f.0 scanning...
1037 14:07:49.014537 scan_static_bus for PCI: 00:1f.0
1038 14:07:49.017532 PNP: 0c09.0 enabled
1039 14:07:49.021067 scan_static_bus for PCI: 00:1f.0 done
1040 14:07:49.028096 scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
1041 14:07:49.030661 PCI: 00:1f.3 scanning...
1042 14:07:49.034169 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1043 14:07:49.037192 PCI: 00:1f.4 scanning...
1044 14:07:49.040403 scan_generic_bus for PCI: 00:1f.4
1045 14:07:49.043719 scan_generic_bus for PCI: 00:1f.4 done
1046 14:07:49.050588 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1047 14:07:49.054082 PCI: 00:1f.5 scanning...
1048 14:07:49.057486 scan_generic_bus for PCI: 00:1f.5
1049 14:07:49.061156 scan_generic_bus for PCI: 00:1f.5 done
1050 14:07:49.067237 scan_bus: scanning of bus PCI: 00:1f.5 took 10200 usecs
1051 14:07:49.073801 scan_bus: scanning of bus DOMAIN: 0000 took 605176 usecs
1052 14:07:49.077168 scan_static_bus for Root Device done
1053 14:07:49.080769 scan_bus: scanning of bus Root Device took 625039 usecs
1054 14:07:49.083631 done
1055 14:07:49.083702 Chrome EC: UHEPI supported
1056 14:07:49.090667 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1057 14:07:49.097703 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1058 14:07:49.104185 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1059 14:07:49.111030 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1060 14:07:49.114306 SPI flash protection: WPSW=0 SRP0=0
1061 14:07:49.120552 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1062 14:07:49.124696 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1063 14:07:49.126839 found VGA at PCI: 00:02.0
1064 14:07:49.130523 Setting up VGA for PCI: 00:02.0
1065 14:07:49.136862 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1066 14:07:49.140131 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1067 14:07:49.143863 Allocating resources...
1068 14:07:49.144025 Reading resources...
1069 14:07:49.150569 Root Device read_resources bus 0 link: 0
1070 14:07:49.153744 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1071 14:07:49.160442 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1072 14:07:49.163747 DOMAIN: 0000 read_resources bus 0 link: 0
1073 14:07:49.170506 PCI: 00:14.0 read_resources bus 0 link: 0
1074 14:07:49.173887 USB0 port 0 read_resources bus 0 link: 0
1075 14:07:49.182237 USB0 port 0 read_resources bus 0 link: 0 done
1076 14:07:49.185520 PCI: 00:14.0 read_resources bus 0 link: 0 done
1077 14:07:49.192739 PCI: 00:15.0 read_resources bus 1 link: 0
1078 14:07:49.195949 PCI: 00:15.0 read_resources bus 1 link: 0 done
1079 14:07:49.202497 PCI: 00:15.1 read_resources bus 2 link: 0
1080 14:07:49.205747 PCI: 00:15.1 read_resources bus 2 link: 0 done
1081 14:07:49.213375 PCI: 00:19.0 read_resources bus 3 link: 0
1082 14:07:49.220349 PCI: 00:19.0 read_resources bus 3 link: 0 done
1083 14:07:49.223895 PCI: 00:1d.0 read_resources bus 1 link: 0
1084 14:07:49.229818 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1085 14:07:49.233307 PCI: 00:1e.2 read_resources bus 4 link: 0
1086 14:07:49.240090 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1087 14:07:49.242727 PCI: 00:1e.3 read_resources bus 5 link: 0
1088 14:07:49.249729 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1089 14:07:49.253206 PCI: 00:1f.0 read_resources bus 0 link: 0
1090 14:07:49.259680 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1091 14:07:49.266370 DOMAIN: 0000 read_resources bus 0 link: 0 done
1092 14:07:49.269725 Root Device read_resources bus 0 link: 0 done
1093 14:07:49.273232 Done reading resources.
1094 14:07:49.279591 Show resources in subtree (Root Device)...After reading.
1095 14:07:49.283848 Root Device child on link 0 CPU_CLUSTER: 0
1096 14:07:49.286266 CPU_CLUSTER: 0 child on link 0 APIC: 00
1097 14:07:49.286755 APIC: 00
1098 14:07:49.289561 APIC: 02
1099 14:07:49.290086 APIC: 01
1100 14:07:49.293181 APIC: 03
1101 14:07:49.293669 APIC: 07
1102 14:07:49.294050 APIC: 06
1103 14:07:49.296340 APIC: 05
1104 14:07:49.296783 APIC: 04
1105 14:07:49.299325 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 14:07:49.309600 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 14:07:49.319057 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1108 14:07:49.322481 PCI: 00:00.0
1109 14:07:49.373227 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 14:07:49.374121 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 14:07:49.374546 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 14:07:49.375350 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 14:07:49.376086 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 14:07:49.422696 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 14:07:49.423664 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 14:07:49.424472 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 14:07:49.425230 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 14:07:49.425972 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1119 14:07:49.439257 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1120 14:07:49.439748 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1121 14:07:49.446108 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1122 14:07:49.452601 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1123 14:07:49.462477 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1124 14:07:49.472576 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1125 14:07:49.473099 PCI: 00:02.0
1126 14:07:49.482331 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1127 14:07:49.495652 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1128 14:07:49.501886 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1129 14:07:49.505341 PCI: 00:04.0
1130 14:07:49.505440 PCI: 00:08.0
1131 14:07:49.514842 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 14:07:49.518087 PCI: 00:12.0
1133 14:07:49.528379 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 14:07:49.531596 PCI: 00:14.0 child on link 0 USB0 port 0
1135 14:07:49.542091 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1136 14:07:49.544960 USB0 port 0 child on link 0 USB2 port 0
1137 14:07:49.547942 USB2 port 0
1138 14:07:49.548028 USB2 port 1
1139 14:07:49.551470 USB2 port 2
1140 14:07:49.551545 USB2 port 3
1141 14:07:49.554607 USB2 port 5
1142 14:07:49.554693 USB2 port 6
1143 14:07:49.558071 USB2 port 9
1144 14:07:49.561912 USB3 port 0
1145 14:07:49.561997 USB3 port 1
1146 14:07:49.564643 USB3 port 2
1147 14:07:49.564728 USB3 port 3
1148 14:07:49.569007 USB3 port 4
1149 14:07:49.569091 PCI: 00:14.2
1150 14:07:49.578352 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1151 14:07:49.588272 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1152 14:07:49.591653 PCI: 00:14.3
1153 14:07:49.601048 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 14:07:49.604360 PCI: 00:15.0 child on link 0 I2C: 01:15
1155 14:07:49.614392 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 14:07:49.614482 I2C: 01:15
1157 14:07:49.621074 PCI: 00:15.1 child on link 0 I2C: 02:5d
1158 14:07:49.630548 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1159 14:07:49.630633 I2C: 02:5d
1160 14:07:49.634161 GENERIC: 0.0
1161 14:07:49.634245 PCI: 00:16.0
1162 14:07:49.645393 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 14:07:49.647368 PCI: 00:17.0
1164 14:07:49.654082 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1165 14:07:49.664115 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1166 14:07:49.674398 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1167 14:07:49.680464 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1168 14:07:49.690796 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1169 14:07:49.697136 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1170 14:07:49.703692 PCI: 00:19.0 child on link 0 I2C: 03:1a
1171 14:07:49.713981 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 14:07:49.714068 I2C: 03:1a
1173 14:07:49.717274 I2C: 03:38
1174 14:07:49.717358 I2C: 03:39
1175 14:07:49.720256 I2C: 03:3a
1176 14:07:49.720370 I2C: 03:3b
1177 14:07:49.723654 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1178 14:07:49.733431 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1179 14:07:49.743363 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1180 14:07:49.753568 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1181 14:07:49.753658 PCI: 01:00.0
1182 14:07:49.763655 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1183 14:07:49.766778 PCI: 00:1e.0
1184 14:07:49.776710 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1185 14:07:49.786562 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 14:07:49.790141 PCI: 00:1e.2 child on link 0 SPI: 00
1187 14:07:49.799735 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 14:07:49.803970 SPI: 00
1189 14:07:49.806652 PCI: 00:1e.3 child on link 0 SPI: 01
1190 14:07:49.816194 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:07:49.816281 SPI: 01
1192 14:07:49.822890 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1193 14:07:49.829539 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1194 14:07:49.839937 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1195 14:07:49.840024 PNP: 0c09.0
1196 14:07:49.849996 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1197 14:07:49.853266 PCI: 00:1f.3
1198 14:07:49.862631 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 14:07:49.872573 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1200 14:07:49.872660 PCI: 00:1f.4
1201 14:07:49.882642 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1202 14:07:49.892657 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1203 14:07:49.892744 PCI: 00:1f.5
1204 14:07:49.902266 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1205 14:07:49.908871 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1206 14:07:49.916554 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1207 14:07:49.923057 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1208 14:07:49.925615 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1209 14:07:49.928823 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1210 14:07:49.932842 PCI: 00:17.0 18 * [0x60 - 0x67] io
1211 14:07:49.935889 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1212 14:07:49.942527 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1213 14:07:49.949159 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1214 14:07:49.959267 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1215 14:07:49.966010 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1216 14:07:49.972355 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1217 14:07:49.975477 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1218 14:07:49.985500 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1219 14:07:49.988654 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1220 14:07:49.995583 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1221 14:07:49.998766 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1222 14:07:50.005220 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1223 14:07:50.008629 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1224 14:07:50.015287 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1225 14:07:50.018985 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1226 14:07:50.025417 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1227 14:07:50.028413 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1228 14:07:50.035019 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1229 14:07:50.038975 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1230 14:07:50.041619 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1231 14:07:50.048246 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1232 14:07:50.052887 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1233 14:07:50.058545 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1234 14:07:50.061554 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1235 14:07:50.068165 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1236 14:07:50.071340 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1237 14:07:50.077926 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1238 14:07:50.081781 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1239 14:07:50.087974 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1240 14:07:50.091850 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1241 14:07:50.098045 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1242 14:07:50.104453 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1243 14:07:50.108138 avoid_fixed_resources: DOMAIN: 0000
1244 14:07:50.114311 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1245 14:07:50.120795 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1246 14:07:50.128233 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1247 14:07:50.137718 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1248 14:07:50.144849 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1249 14:07:50.150696 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1250 14:07:50.160755 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1251 14:07:50.167594 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1252 14:07:50.174075 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1253 14:07:50.180692 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1254 14:07:50.190305 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1255 14:07:50.196993 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1256 14:07:50.197431 Setting resources...
1257 14:07:50.204024 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1258 14:07:50.210389 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1259 14:07:50.213875 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1260 14:07:50.217266 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1261 14:07:50.220473 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1262 14:07:50.227411 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1263 14:07:50.234026 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1264 14:07:50.240808 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1265 14:07:50.247178 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1266 14:07:50.253774 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1267 14:07:50.257403 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1268 14:07:50.263897 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1269 14:07:50.267304 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1270 14:07:50.273767 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1271 14:07:50.277114 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1272 14:07:50.284281 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1273 14:07:50.286782 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1274 14:07:50.290544 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1275 14:07:50.296810 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1276 14:07:50.300223 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1277 14:07:50.306698 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1278 14:07:50.309947 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1279 14:07:50.316681 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1280 14:07:50.319753 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1281 14:07:50.326181 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1282 14:07:50.329767 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1283 14:07:50.336419 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1284 14:07:50.339527 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1285 14:07:50.346668 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1286 14:07:50.349613 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1287 14:07:50.352896 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1288 14:07:50.360249 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1289 14:07:50.366176 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1290 14:07:50.372912 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1291 14:07:50.382508 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1292 14:07:50.389234 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1293 14:07:50.392783 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1294 14:07:50.402490 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1295 14:07:50.406020 Root Device assign_resources, bus 0 link: 0
1296 14:07:50.409315 DOMAIN: 0000 assign_resources, bus 0 link: 0
1297 14:07:50.421066 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1298 14:07:50.426076 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1299 14:07:50.436219 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1300 14:07:50.442671 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1301 14:07:50.452276 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1302 14:07:50.459511 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1303 14:07:50.465408 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 14:07:50.468666 PCI: 00:14.0 assign_resources, bus 0 link: 0
1305 14:07:50.478925 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1306 14:07:50.485721 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1307 14:07:50.495136 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1308 14:07:50.501789 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1309 14:07:50.505176 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 14:07:50.512801 PCI: 00:15.0 assign_resources, bus 1 link: 0
1311 14:07:50.518494 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1312 14:07:50.525228 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 14:07:50.528334 PCI: 00:15.1 assign_resources, bus 2 link: 0
1314 14:07:50.538724 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1315 14:07:50.545151 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1316 14:07:50.551611 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1317 14:07:50.561771 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1318 14:07:50.568099 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1319 14:07:50.575045 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1320 14:07:50.585153 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1321 14:07:50.591507 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1322 14:07:50.597794 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 14:07:50.601492 PCI: 00:19.0 assign_resources, bus 3 link: 0
1324 14:07:50.611184 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1325 14:07:50.617941 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1326 14:07:50.627698 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1327 14:07:50.630912 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 14:07:50.640905 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1329 14:07:50.644876 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1330 14:07:50.654451 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1331 14:07:50.660643 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1332 14:07:50.668297 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 14:07:50.671066 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1334 14:07:50.680467 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1335 14:07:50.683791 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 14:07:50.687576 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1337 14:07:50.693757 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 14:07:50.697404 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1339 14:07:50.703632 LPC: Trying to open IO window from 800 size 1ff
1340 14:07:50.710504 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1341 14:07:50.720273 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1342 14:07:50.727058 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1343 14:07:50.737024 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1344 14:07:50.740262 DOMAIN: 0000 assign_resources, bus 0 link: 0
1345 14:07:50.746625 Root Device assign_resources, bus 0 link: 0
1346 14:07:50.746711 Done setting resources.
1347 14:07:50.753633 Show resources in subtree (Root Device)...After assigning values.
1348 14:07:50.759588 Root Device child on link 0 CPU_CLUSTER: 0
1349 14:07:50.763247 CPU_CLUSTER: 0 child on link 0 APIC: 00
1350 14:07:50.763332 APIC: 00
1351 14:07:50.766409 APIC: 02
1352 14:07:50.766494 APIC: 01
1353 14:07:50.766561 APIC: 03
1354 14:07:50.769857 APIC: 07
1355 14:07:50.769941 APIC: 06
1356 14:07:50.773507 APIC: 05
1357 14:07:50.773590 APIC: 04
1358 14:07:50.776506 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1359 14:07:50.786698 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1360 14:07:50.799851 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1361 14:07:50.799936 PCI: 00:00.0
1362 14:07:50.809423 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1363 14:07:50.819632 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1364 14:07:50.829474 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1365 14:07:50.835794 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1366 14:07:50.846002 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1367 14:07:50.855859 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1368 14:07:50.865781 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1369 14:07:50.875856 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1370 14:07:50.886021 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1371 14:07:50.892293 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1372 14:07:50.901998 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1373 14:07:50.911742 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1374 14:07:50.921973 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1375 14:07:50.931784 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1376 14:07:50.941725 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1377 14:07:50.948005 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1378 14:07:50.951830 PCI: 00:02.0
1379 14:07:50.961554 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1380 14:07:50.972270 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1381 14:07:50.981211 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1382 14:07:50.984681 PCI: 00:04.0
1383 14:07:50.984755 PCI: 00:08.0
1384 14:07:50.994385 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1385 14:07:50.998235 PCI: 00:12.0
1386 14:07:51.008181 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1387 14:07:51.011060 PCI: 00:14.0 child on link 0 USB0 port 0
1388 14:07:51.021180 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1389 14:07:51.028421 USB0 port 0 child on link 0 USB2 port 0
1390 14:07:51.028530 USB2 port 0
1391 14:07:51.031292 USB2 port 1
1392 14:07:51.031376 USB2 port 2
1393 14:07:51.034535 USB2 port 3
1394 14:07:51.034620 USB2 port 5
1395 14:07:51.038145 USB2 port 6
1396 14:07:51.038230 USB2 port 9
1397 14:07:51.041141 USB3 port 0
1398 14:07:51.044258 USB3 port 1
1399 14:07:51.044479 USB3 port 2
1400 14:07:51.047666 USB3 port 3
1401 14:07:51.047820 USB3 port 4
1402 14:07:51.051451 PCI: 00:14.2
1403 14:07:51.060764 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1404 14:07:51.071261 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1405 14:07:51.071455 PCI: 00:14.3
1406 14:07:51.081363 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1407 14:07:51.087575 PCI: 00:15.0 child on link 0 I2C: 01:15
1408 14:07:51.097262 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1409 14:07:51.097648 I2C: 01:15
1410 14:07:51.104111 PCI: 00:15.1 child on link 0 I2C: 02:5d
1411 14:07:51.114563 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1412 14:07:51.115068 I2C: 02:5d
1413 14:07:51.117923 GENERIC: 0.0
1414 14:07:51.118418 PCI: 00:16.0
1415 14:07:51.127736 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1416 14:07:51.130646 PCI: 00:17.0
1417 14:07:51.141382 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1418 14:07:51.150290 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1419 14:07:51.160374 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1420 14:07:51.170322 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1421 14:07:51.177308 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1422 14:07:51.187107 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1423 14:07:51.193240 PCI: 00:19.0 child on link 0 I2C: 03:1a
1424 14:07:51.202901 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1425 14:07:51.202992 I2C: 03:1a
1426 14:07:51.206426 I2C: 03:38
1427 14:07:51.206512 I2C: 03:39
1428 14:07:51.209349 I2C: 03:3a
1429 14:07:51.209436 I2C: 03:3b
1430 14:07:51.216160 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1431 14:07:51.222889 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1432 14:07:51.232536 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1433 14:07:51.245841 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1434 14:07:51.245930 PCI: 01:00.0
1435 14:07:51.256175 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1436 14:07:51.259264 PCI: 00:1e.0
1437 14:07:51.269222 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1438 14:07:51.278894 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1439 14:07:51.282543 PCI: 00:1e.2 child on link 0 SPI: 00
1440 14:07:51.292449 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1441 14:07:51.295684 SPI: 00
1442 14:07:51.299523 PCI: 00:1e.3 child on link 0 SPI: 01
1443 14:07:51.308993 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1444 14:07:51.312313 SPI: 01
1445 14:07:51.315485 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1446 14:07:51.325939 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1447 14:07:51.332228 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1448 14:07:51.335613 PNP: 0c09.0
1449 14:07:51.342146 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1450 14:07:51.345455 PCI: 00:1f.3
1451 14:07:51.354969 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1452 14:07:51.364780 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1453 14:07:51.368038 PCI: 00:1f.4
1454 14:07:51.375628 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1455 14:07:51.387907 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1456 14:07:51.387999 PCI: 00:1f.5
1457 14:07:51.397993 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1458 14:07:51.401208 Done allocating resources.
1459 14:07:51.408284 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1460 14:07:51.408372 Enabling resources...
1461 14:07:51.415244 PCI: 00:00.0 subsystem <- 8086/9b61
1462 14:07:51.415330 PCI: 00:00.0 cmd <- 06
1463 14:07:51.418436 PCI: 00:02.0 subsystem <- 8086/9b41
1464 14:07:51.421658 PCI: 00:02.0 cmd <- 03
1465 14:07:51.425166 PCI: 00:08.0 cmd <- 06
1466 14:07:51.428710 PCI: 00:12.0 subsystem <- 8086/02f9
1467 14:07:51.431979 PCI: 00:12.0 cmd <- 02
1468 14:07:51.434837 PCI: 00:14.0 subsystem <- 8086/02ed
1469 14:07:51.438463 PCI: 00:14.0 cmd <- 02
1470 14:07:51.441643 PCI: 00:14.2 cmd <- 02
1471 14:07:51.444751 PCI: 00:14.3 subsystem <- 8086/02f0
1472 14:07:51.448230 PCI: 00:14.3 cmd <- 02
1473 14:07:51.451472 PCI: 00:15.0 subsystem <- 8086/02e8
1474 14:07:51.451558 PCI: 00:15.0 cmd <- 02
1475 14:07:51.458457 PCI: 00:15.1 subsystem <- 8086/02e9
1476 14:07:51.458543 PCI: 00:15.1 cmd <- 02
1477 14:07:51.461414 PCI: 00:16.0 subsystem <- 8086/02e0
1478 14:07:51.465145 PCI: 00:16.0 cmd <- 02
1479 14:07:51.468328 PCI: 00:17.0 subsystem <- 8086/02d3
1480 14:07:51.471425 PCI: 00:17.0 cmd <- 03
1481 14:07:51.474548 PCI: 00:19.0 subsystem <- 8086/02c5
1482 14:07:51.477711 PCI: 00:19.0 cmd <- 02
1483 14:07:51.481300 PCI: 00:1d.0 bridge ctrl <- 0013
1484 14:07:51.484224 PCI: 00:1d.0 subsystem <- 8086/02b0
1485 14:07:51.487877 PCI: 00:1d.0 cmd <- 06
1486 14:07:51.491054 PCI: 00:1e.0 subsystem <- 8086/02a8
1487 14:07:51.494156 PCI: 00:1e.0 cmd <- 06
1488 14:07:51.497266 PCI: 00:1e.2 subsystem <- 8086/02aa
1489 14:07:51.500638 PCI: 00:1e.2 cmd <- 06
1490 14:07:51.504061 PCI: 00:1e.3 subsystem <- 8086/02ab
1491 14:07:51.507210 PCI: 00:1e.3 cmd <- 02
1492 14:07:51.510691 PCI: 00:1f.0 subsystem <- 8086/0284
1493 14:07:51.513820 PCI: 00:1f.0 cmd <- 407
1494 14:07:51.517148 PCI: 00:1f.3 subsystem <- 8086/02c8
1495 14:07:51.517228 PCI: 00:1f.3 cmd <- 02
1496 14:07:51.524343 PCI: 00:1f.4 subsystem <- 8086/02a3
1497 14:07:51.524424 PCI: 00:1f.4 cmd <- 03
1498 14:07:51.530852 PCI: 00:1f.5 subsystem <- 8086/02a4
1499 14:07:51.530935 PCI: 00:1f.5 cmd <- 406
1500 14:07:51.540776 PCI: 01:00.0 cmd <- 02
1501 14:07:51.546268 done.
1502 14:07:51.556810 ME: Version: 14.0.39.1367
1503 14:07:51.563602 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1504 14:07:51.566692 Initializing devices...
1505 14:07:51.566772 Root Device init ...
1506 14:07:51.573438 Chrome EC: Set SMI mask to 0x0000000000000000
1507 14:07:51.576497 Chrome EC: clear events_b mask to 0x0000000000000000
1508 14:07:51.583903 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1509 14:07:51.590211 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1510 14:07:51.596394 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1511 14:07:51.599772 Chrome EC: Set WAKE mask to 0x0000000000000000
1512 14:07:51.602856 Root Device init finished in 35171 usecs
1513 14:07:51.606540 CPU_CLUSTER: 0 init ...
1514 14:07:51.613032 CPU_CLUSTER: 0 init finished in 2449 usecs
1515 14:07:51.617273 PCI: 00:00.0 init ...
1516 14:07:51.620758 CPU TDP: 15 Watts
1517 14:07:51.623916 CPU PL2 = 64 Watts
1518 14:07:51.627526 PCI: 00:00.0 init finished in 7083 usecs
1519 14:07:51.630882 PCI: 00:02.0 init ...
1520 14:07:51.633899 PCI: 00:02.0 init finished in 2253 usecs
1521 14:07:51.637692 PCI: 00:08.0 init ...
1522 14:07:51.640739 PCI: 00:08.0 init finished in 2253 usecs
1523 14:07:51.643968 PCI: 00:12.0 init ...
1524 14:07:51.646997 PCI: 00:12.0 init finished in 2254 usecs
1525 14:07:51.650470 PCI: 00:14.0 init ...
1526 14:07:51.654036 PCI: 00:14.0 init finished in 2253 usecs
1527 14:07:51.657231 PCI: 00:14.2 init ...
1528 14:07:51.660897 PCI: 00:14.2 init finished in 2253 usecs
1529 14:07:51.663989 PCI: 00:14.3 init ...
1530 14:07:51.667256 PCI: 00:14.3 init finished in 2270 usecs
1531 14:07:51.670329 PCI: 00:15.0 init ...
1532 14:07:51.674087 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 14:07:51.677329 PCI: 00:15.0 init finished in 5972 usecs
1534 14:07:51.680319 PCI: 00:15.1 init ...
1535 14:07:51.683855 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 14:07:51.690081 PCI: 00:15.1 init finished in 5980 usecs
1537 14:07:51.690161 PCI: 00:16.0 init ...
1538 14:07:51.697180 PCI: 00:16.0 init finished in 2244 usecs
1539 14:07:51.697262 PCI: 00:19.0 init ...
1540 14:07:51.703255 DW I2C bus 4 at 0xd1222000 (400 KHz)
1541 14:07:51.706788 PCI: 00:19.0 init finished in 5977 usecs
1542 14:07:51.710297 PCI: 00:1d.0 init ...
1543 14:07:51.713782 Initializing PCH PCIe bridge.
1544 14:07:51.716676 PCI: 00:1d.0 init finished in 5287 usecs
1545 14:07:51.720243 PCI: 00:1f.0 init ...
1546 14:07:51.723354 IOAPIC: Initializing IOAPIC at 0xfec00000
1547 14:07:51.730163 IOAPIC: Bootstrap Processor Local APIC = 0x00
1548 14:07:51.730241 IOAPIC: ID = 0x02
1549 14:07:51.733516 IOAPIC: Dumping registers
1550 14:07:51.736356 reg 0x0000: 0x02000000
1551 14:07:51.739872 reg 0x0001: 0x00770020
1552 14:07:51.739953 reg 0x0002: 0x00000000
1553 14:07:51.747056 PCI: 00:1f.0 init finished in 23558 usecs
1554 14:07:51.749773 PCI: 00:1f.4 init ...
1555 14:07:51.752931 PCI: 00:1f.4 init finished in 2263 usecs
1556 14:07:51.763592 PCI: 01:00.0 init ...
1557 14:07:51.766559 PCI: 01:00.0 init finished in 2252 usecs
1558 14:07:51.771692 PNP: 0c09.0 init ...
1559 14:07:51.774700 Google Chrome EC uptime: 11.087 seconds
1560 14:07:51.780789 Google Chrome AP resets since EC boot: 0
1561 14:07:51.784333 Google Chrome most recent AP reset causes:
1562 14:07:51.791041 Google Chrome EC reset flags at last EC boot: reset-pin
1563 14:07:51.794348 PNP: 0c09.0 init finished in 20634 usecs
1564 14:07:51.798002 Devices initialized
1565 14:07:51.800902 Show all devs... After init.
1566 14:07:51.801026 Root Device: enabled 1
1567 14:07:51.804147 CPU_CLUSTER: 0: enabled 1
1568 14:07:51.808010 DOMAIN: 0000: enabled 1
1569 14:07:51.808099 APIC: 00: enabled 1
1570 14:07:51.811012 PCI: 00:00.0: enabled 1
1571 14:07:51.814082 PCI: 00:02.0: enabled 1
1572 14:07:51.817410 PCI: 00:04.0: enabled 0
1573 14:07:51.817519 PCI: 00:05.0: enabled 0
1574 14:07:51.820507 PCI: 00:12.0: enabled 1
1575 14:07:51.824655 PCI: 00:12.5: enabled 0
1576 14:07:51.827498 PCI: 00:12.6: enabled 0
1577 14:07:51.827571 PCI: 00:14.0: enabled 1
1578 14:07:51.831164 PCI: 00:14.1: enabled 0
1579 14:07:51.833893 PCI: 00:14.3: enabled 1
1580 14:07:51.833973 PCI: 00:14.5: enabled 0
1581 14:07:51.837870 PCI: 00:15.0: enabled 1
1582 14:07:51.840390 PCI: 00:15.1: enabled 1
1583 14:07:51.843619 PCI: 00:15.2: enabled 0
1584 14:07:51.843716 PCI: 00:15.3: enabled 0
1585 14:07:51.847075 PCI: 00:16.0: enabled 1
1586 14:07:51.850221 PCI: 00:16.1: enabled 0
1587 14:07:51.854049 PCI: 00:16.2: enabled 0
1588 14:07:51.854150 PCI: 00:16.3: enabled 0
1589 14:07:51.857594 PCI: 00:16.4: enabled 0
1590 14:07:51.860673 PCI: 00:16.5: enabled 0
1591 14:07:51.863834 PCI: 00:17.0: enabled 1
1592 14:07:51.863912 PCI: 00:19.0: enabled 1
1593 14:07:51.867704 PCI: 00:19.1: enabled 0
1594 14:07:51.870261 PCI: 00:19.2: enabled 0
1595 14:07:51.873895 PCI: 00:1a.0: enabled 0
1596 14:07:51.873974 PCI: 00:1c.0: enabled 0
1597 14:07:51.876834 PCI: 00:1c.1: enabled 0
1598 14:07:51.880349 PCI: 00:1c.2: enabled 0
1599 14:07:51.880430 PCI: 00:1c.3: enabled 0
1600 14:07:51.883642 PCI: 00:1c.4: enabled 0
1601 14:07:51.887212 PCI: 00:1c.5: enabled 0
1602 14:07:51.890573 PCI: 00:1c.6: enabled 0
1603 14:07:51.890659 PCI: 00:1c.7: enabled 0
1604 14:07:51.893633 PCI: 00:1d.0: enabled 1
1605 14:07:51.896862 PCI: 00:1d.1: enabled 0
1606 14:07:51.900397 PCI: 00:1d.2: enabled 0
1607 14:07:51.900483 PCI: 00:1d.3: enabled 0
1608 14:07:51.903215 PCI: 00:1d.4: enabled 0
1609 14:07:51.906715 PCI: 00:1d.5: enabled 0
1610 14:07:51.910332 PCI: 00:1e.0: enabled 1
1611 14:07:51.910417 PCI: 00:1e.1: enabled 0
1612 14:07:51.913966 PCI: 00:1e.2: enabled 1
1613 14:07:51.917373 PCI: 00:1e.3: enabled 1
1614 14:07:51.920223 PCI: 00:1f.0: enabled 1
1615 14:07:51.920308 PCI: 00:1f.1: enabled 0
1616 14:07:51.923342 PCI: 00:1f.2: enabled 0
1617 14:07:51.927102 PCI: 00:1f.3: enabled 1
1618 14:07:51.927188 PCI: 00:1f.4: enabled 1
1619 14:07:51.929684 PCI: 00:1f.5: enabled 1
1620 14:07:51.932936 PCI: 00:1f.6: enabled 0
1621 14:07:51.937162 USB0 port 0: enabled 1
1622 14:07:51.937248 I2C: 01:15: enabled 1
1623 14:07:51.940557 I2C: 02:5d: enabled 1
1624 14:07:51.942940 GENERIC: 0.0: enabled 1
1625 14:07:51.943025 I2C: 03:1a: enabled 1
1626 14:07:51.945989 I2C: 03:38: enabled 1
1627 14:07:51.949416 I2C: 03:39: enabled 1
1628 14:07:51.949502 I2C: 03:3a: enabled 1
1629 14:07:51.954056 I2C: 03:3b: enabled 1
1630 14:07:51.955950 PCI: 00:00.0: enabled 1
1631 14:07:51.956036 SPI: 00: enabled 1
1632 14:07:51.959431 SPI: 01: enabled 1
1633 14:07:51.962840 PNP: 0c09.0: enabled 1
1634 14:07:51.962925 USB2 port 0: enabled 1
1635 14:07:51.965864 USB2 port 1: enabled 1
1636 14:07:51.969373 USB2 port 2: enabled 0
1637 14:07:51.972680 USB2 port 3: enabled 0
1638 14:07:51.972766 USB2 port 5: enabled 0
1639 14:07:51.975971 USB2 port 6: enabled 1
1640 14:07:51.979191 USB2 port 9: enabled 1
1641 14:07:51.979277 USB3 port 0: enabled 1
1642 14:07:51.982691 USB3 port 1: enabled 1
1643 14:07:51.986029 USB3 port 2: enabled 1
1644 14:07:51.989480 USB3 port 3: enabled 1
1645 14:07:51.989566 USB3 port 4: enabled 0
1646 14:07:51.992838 APIC: 02: enabled 1
1647 14:07:51.992925 APIC: 01: enabled 1
1648 14:07:51.995781 APIC: 03: enabled 1
1649 14:07:51.998893 APIC: 07: enabled 1
1650 14:07:51.998979 APIC: 06: enabled 1
1651 14:07:52.002747 APIC: 05: enabled 1
1652 14:07:52.006264 APIC: 04: enabled 1
1653 14:07:52.006350 PCI: 00:08.0: enabled 1
1654 14:07:52.009372 PCI: 00:14.2: enabled 1
1655 14:07:52.012455 PCI: 01:00.0: enabled 1
1656 14:07:52.016226 Disabling ACPI via APMC:
1657 14:07:52.019562 done.
1658 14:07:52.022891 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1659 14:07:52.026718 ELOG: NV offset 0xaf0000 size 0x4000
1660 14:07:52.032880 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1661 14:07:52.039551 ELOG: Event(17) added with size 13 at 2022-08-03 14:07:44 UTC
1662 14:07:52.045823 ELOG: Event(92) added with size 9 at 2022-08-03 14:07:44 UTC
1663 14:07:52.052864 ELOG: Event(93) added with size 9 at 2022-08-03 14:07:44 UTC
1664 14:07:52.058954 ELOG: Event(9A) added with size 9 at 2022-08-03 14:07:44 UTC
1665 14:07:52.065711 ELOG: Event(9E) added with size 10 at 2022-08-03 14:07:44 UTC
1666 14:07:52.072336 ELOG: Event(9F) added with size 14 at 2022-08-03 14:07:44 UTC
1667 14:07:52.075726 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1668 14:07:52.083712 ELOG: Event(A1) added with size 10 at 2022-08-03 14:07:44 UTC
1669 14:07:52.093117 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1670 14:07:52.099795 ELOG: Event(A0) added with size 9 at 2022-08-03 14:07:44 UTC
1671 14:07:52.102975 elog_add_boot_reason: Logged dev mode boot
1672 14:07:52.106303 Finalize devices...
1673 14:07:52.106389 PCI: 00:17.0 final
1674 14:07:52.109633 Devices finalized
1675 14:07:52.113212 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1676 14:07:52.119785 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1677 14:07:52.123421 ME: HFSTS1 : 0x90000245
1678 14:07:52.126435 ME: HFSTS2 : 0x3B850126
1679 14:07:52.132997 ME: HFSTS3 : 0x00000020
1680 14:07:52.135876 ME: HFSTS4 : 0x00004800
1681 14:07:52.139670 ME: HFSTS5 : 0x00000000
1682 14:07:52.142528 ME: HFSTS6 : 0x40400006
1683 14:07:52.146063 ME: Manufacturing Mode : NO
1684 14:07:52.149239 ME: FW Partition Table : OK
1685 14:07:52.152618 ME: Bringup Loader Failure : NO
1686 14:07:52.155578 ME: Firmware Init Complete : YES
1687 14:07:52.159116 ME: Boot Options Present : NO
1688 14:07:52.162382 ME: Update In Progress : NO
1689 14:07:52.166830 ME: D0i3 Support : YES
1690 14:07:52.169037 ME: Low Power State Enabled : NO
1691 14:07:52.172066 ME: CPU Replaced : NO
1692 14:07:52.175895 ME: CPU Replacement Valid : YES
1693 14:07:52.179171 ME: Current Working State : 5
1694 14:07:52.182090 ME: Current Operation State : 1
1695 14:07:52.185324 ME: Current Operation Mode : 0
1696 14:07:52.188511 ME: Error Code : 0
1697 14:07:52.192146 ME: CPU Debug Disabled : YES
1698 14:07:52.195442 ME: TXT Support : NO
1699 14:07:52.201737 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1700 14:07:52.208856 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 14:07:52.208947 CBFS @ c08000 size 3f8000
1702 14:07:52.215042 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 14:07:52.218424 CBFS: Locating 'fallback/dsdt.aml'
1704 14:07:52.224732 CBFS: Found @ offset 10bb80 size 3fa5
1705 14:07:52.228149 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 14:07:52.231595 CBFS @ c08000 size 3f8000
1707 14:07:52.238018 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 14:07:52.241301 CBFS: Locating 'fallback/slic'
1709 14:07:52.244818 CBFS: 'fallback/slic' not found.
1710 14:07:52.248313 ACPI: Writing ACPI tables at 99b3e000.
1711 14:07:52.251353 ACPI: * FACS
1712 14:07:52.251439 ACPI: * DSDT
1713 14:07:52.257966 Ramoops buffer: 0x100000@0x99a3d000.
1714 14:07:52.261581 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1715 14:07:52.264632 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1716 14:07:52.267964 Google Chrome EC: version:
1717 14:07:52.271141 ro: helios_v2.0.2659-56403530b
1718 14:07:52.274707 rw: helios_v2.0.2849-c41de27e7d
1719 14:07:52.277682 running image: 1
1720 14:07:52.281914 ACPI: * FADT
1721 14:07:52.281999 SCI is IRQ9
1722 14:07:52.284761 ACPI: added table 1/32, length now 40
1723 14:07:52.287842 ACPI: * SSDT
1724 14:07:52.291349 Found 1 CPU(s) with 8 core(s) each.
1725 14:07:52.294744 Error: Could not locate 'wifi_sar' in VPD.
1726 14:07:52.301239 Checking CBFS for default SAR values
1727 14:07:52.304449 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1728 14:07:52.307891 CBFS @ c08000 size 3f8000
1729 14:07:52.314341 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1730 14:07:52.317691 CBFS: Locating 'wifi_sar_defaults.hex'
1731 14:07:52.320567 CBFS: Found @ offset 5fac0 size 77
1732 14:07:52.324237 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1733 14:07:52.330832 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1734 14:07:52.334003 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1735 14:07:52.340668 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1736 14:07:52.344289 failed to find key in VPD: dsm_calib_r0_0
1737 14:07:52.354353 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1738 14:07:52.357258 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1739 14:07:52.361216 failed to find key in VPD: dsm_calib_r0_1
1740 14:07:52.371113 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1741 14:07:52.377136 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1742 14:07:52.380939 failed to find key in VPD: dsm_calib_r0_2
1743 14:07:52.390410 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1744 14:07:52.394079 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1745 14:07:52.400415 failed to find key in VPD: dsm_calib_r0_3
1746 14:07:52.407398 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1747 14:07:52.413672 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1748 14:07:52.417426 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1749 14:07:52.420420 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1750 14:07:52.424330 EC returned error result code 1
1751 14:07:52.428076 EC returned error result code 1
1752 14:07:52.431472 EC returned error result code 1
1753 14:07:52.438260 PS2K: Bad resp from EC. Vivaldi disabled!
1754 14:07:52.441579 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1755 14:07:52.448923 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1756 14:07:52.455098 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1757 14:07:52.458088 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1758 14:07:52.465484 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1759 14:07:52.471476 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1760 14:07:52.478794 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1761 14:07:52.481217 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1762 14:07:52.488112 ACPI: added table 2/32, length now 44
1763 14:07:52.488605 ACPI: * MCFG
1764 14:07:52.491732 ACPI: added table 3/32, length now 48
1765 14:07:52.494926 ACPI: * TPM2
1766 14:07:52.498583 TPM2 log created at 99a2d000
1767 14:07:52.501098 ACPI: added table 4/32, length now 52
1768 14:07:52.501598 ACPI: * MADT
1769 14:07:52.504914 SCI is IRQ9
1770 14:07:52.508024 ACPI: added table 5/32, length now 56
1771 14:07:52.508511 current = 99b43ac0
1772 14:07:52.510898 ACPI: * DMAR
1773 14:07:52.514336 ACPI: added table 6/32, length now 60
1774 14:07:52.517898 ACPI: * IGD OpRegion
1775 14:07:52.518422 GMA: Found VBT in CBFS
1776 14:07:52.521880 GMA: Found valid VBT in CBFS
1777 14:07:52.524455 ACPI: added table 7/32, length now 64
1778 14:07:52.528261 ACPI: * HPET
1779 14:07:52.530845 ACPI: added table 8/32, length now 68
1780 14:07:52.534421 ACPI: done.
1781 14:07:52.534962 ACPI tables: 31744 bytes.
1782 14:07:52.538529 smbios_write_tables: 99a2c000
1783 14:07:52.541675 EC returned error result code 3
1784 14:07:52.544483 Couldn't obtain OEM name from CBI
1785 14:07:52.548128 Create SMBIOS type 17
1786 14:07:52.551041 PCI: 00:00.0 (Intel Cannonlake)
1787 14:07:52.554915 PCI: 00:14.3 (Intel WiFi)
1788 14:07:52.558009 SMBIOS tables: 939 bytes.
1789 14:07:52.560874 Writing table forward entry at 0x00000500
1790 14:07:52.567598 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1791 14:07:52.571252 Writing coreboot table at 0x99b62000
1792 14:07:52.577507 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1793 14:07:52.581047 1. 0000000000001000-000000000009ffff: RAM
1794 14:07:52.584124 2. 00000000000a0000-00000000000fffff: RESERVED
1795 14:07:52.590890 3. 0000000000100000-0000000099a2bfff: RAM
1796 14:07:52.597161 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1797 14:07:52.600934 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1798 14:07:52.607519 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1799 14:07:52.610658 7. 000000009a000000-000000009f7fffff: RESERVED
1800 14:07:52.617269 8. 00000000e0000000-00000000efffffff: RESERVED
1801 14:07:52.620262 9. 00000000fc000000-00000000fc000fff: RESERVED
1802 14:07:52.628056 10. 00000000fe000000-00000000fe00ffff: RESERVED
1803 14:07:52.630480 11. 00000000fed10000-00000000fed17fff: RESERVED
1804 14:07:52.633674 12. 00000000fed80000-00000000fed83fff: RESERVED
1805 14:07:52.640179 13. 00000000fed90000-00000000fed91fff: RESERVED
1806 14:07:52.643588 14. 00000000feda0000-00000000feda1fff: RESERVED
1807 14:07:52.650185 15. 0000000100000000-000000045e7fffff: RAM
1808 14:07:52.653642 Graphics framebuffer located at 0xc0000000
1809 14:07:52.657077 Passing 5 GPIOs to payload:
1810 14:07:52.660135 NAME | PORT | POLARITY | VALUE
1811 14:07:52.667427 write protect | undefined | high | low
1812 14:07:52.674377 lid | undefined | high | high
1813 14:07:52.677118 power | undefined | high | low
1814 14:07:52.683520 oprom | undefined | high | low
1815 14:07:52.686253 EC in RW | 0x000000cb | high | low
1816 14:07:52.689631 Board ID: 4
1817 14:07:52.693443 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1818 14:07:52.696600 CBFS @ c08000 size 3f8000
1819 14:07:52.703253 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1820 14:07:52.710300 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6b8a
1821 14:07:52.710386 coreboot table: 1492 bytes.
1822 14:07:52.712985 IMD ROOT 0. 99fff000 00001000
1823 14:07:52.716357 IMD SMALL 1. 99ffe000 00001000
1824 14:07:52.719334 FSP MEMORY 2. 99c4e000 003b0000
1825 14:07:52.722668 CONSOLE 3. 99c2e000 00020000
1826 14:07:52.726344 FMAP 4. 99c2d000 0000054e
1827 14:07:52.729188 TIME STAMP 5. 99c2c000 00000910
1828 14:07:52.732911 VBOOT WORK 6. 99c18000 00014000
1829 14:07:52.736209 MRC DATA 7. 99c16000 00001958
1830 14:07:52.739421 ROMSTG STCK 8. 99c15000 00001000
1831 14:07:52.745851 AFTER CAR 9. 99c0b000 0000a000
1832 14:07:52.749161 RAMSTAGE 10. 99baf000 0005c000
1833 14:07:52.752690 REFCODE 11. 99b7a000 00035000
1834 14:07:52.755701 SMM BACKUP 12. 99b6a000 00010000
1835 14:07:52.758951 COREBOOT 13. 99b62000 00008000
1836 14:07:52.762687 ACPI 14. 99b3e000 00024000
1837 14:07:52.765516 ACPI GNVS 15. 99b3d000 00001000
1838 14:07:52.768714 RAMOOPS 16. 99a3d000 00100000
1839 14:07:52.772156 TPM2 TCGLOG17. 99a2d000 00010000
1840 14:07:52.775475 SMBIOS 18. 99a2c000 00000800
1841 14:07:52.775562 IMD small region:
1842 14:07:52.778763 IMD ROOT 0. 99ffec00 00000400
1843 14:07:52.782505 FSP RUNTIME 1. 99ffebe0 00000004
1844 14:07:52.785394 EC HOSTEVENT 2. 99ffebc0 00000008
1845 14:07:52.788618 POWER STATE 3. 99ffeb80 00000040
1846 14:07:52.792047 ROMSTAGE 4. 99ffeb60 00000004
1847 14:07:52.798728 MEM INFO 5. 99ffe9a0 000001b9
1848 14:07:52.801816 VPD 6. 99ffe940 0000004c
1849 14:07:52.805764 MTRR: Physical address space:
1850 14:07:52.808811 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1851 14:07:52.816117 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1852 14:07:52.822114 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1853 14:07:52.828434 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1854 14:07:52.835072 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1855 14:07:52.841990 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1856 14:07:52.848201 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1857 14:07:52.851835 MTRR: Fixed MSR 0x250 0x0606060606060606
1858 14:07:52.855249 MTRR: Fixed MSR 0x258 0x0606060606060606
1859 14:07:52.858770 MTRR: Fixed MSR 0x259 0x0000000000000000
1860 14:07:52.865073 MTRR: Fixed MSR 0x268 0x0606060606060606
1861 14:07:52.868350 MTRR: Fixed MSR 0x269 0x0606060606060606
1862 14:07:52.871803 MTRR: Fixed MSR 0x26a 0x0606060606060606
1863 14:07:52.875875 MTRR: Fixed MSR 0x26b 0x0606060606060606
1864 14:07:52.881715 MTRR: Fixed MSR 0x26c 0x0606060606060606
1865 14:07:52.884844 MTRR: Fixed MSR 0x26d 0x0606060606060606
1866 14:07:52.888487 MTRR: Fixed MSR 0x26e 0x0606060606060606
1867 14:07:52.891517 MTRR: Fixed MSR 0x26f 0x0606060606060606
1868 14:07:52.895159 call enable_fixed_mtrr()
1869 14:07:52.898687 CPU physical address size: 39 bits
1870 14:07:52.905553 MTRR: default type WB/UC MTRR counts: 6/8.
1871 14:07:52.908767 MTRR: WB selected as default type.
1872 14:07:52.914701 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1873 14:07:52.917962 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1874 14:07:52.924849 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1875 14:07:52.931069 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1876 14:07:52.937680 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1877 14:07:52.944601 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1878 14:07:52.950815 MTRR: Fixed MSR 0x250 0x0606060606060606
1879 14:07:52.954296 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 14:07:52.957738 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 14:07:52.960954 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 14:07:52.964508 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 14:07:52.970951 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 14:07:52.974120 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 14:07:52.977669 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 14:07:52.980824 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 14:07:52.987779 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 14:07:52.990963 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 14:07:52.991049
1890 14:07:52.991118 MTRR check
1891 14:07:52.994579 Fixed MTRRs : Enabled
1892 14:07:52.997345 Variable MTRRs: Enabled
1893 14:07:52.997431
1894 14:07:53.000575 call enable_fixed_mtrr()
1895 14:07:53.004181 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1896 14:07:53.007689 CPU physical address size: 39 bits
1897 14:07:53.013850 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1898 14:07:53.017339 CBFS @ c08000 size 3f8000
1899 14:07:53.024365 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1900 14:07:53.027300 CBFS: Locating 'fallback/payload'
1901 14:07:53.031152 MTRR: Fixed MSR 0x250 0x0606060606060606
1902 14:07:53.033776 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 14:07:53.037391 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 14:07:53.040462 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 14:07:53.047033 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 14:07:53.051520 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 14:07:53.053766 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 14:07:53.056909 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 14:07:53.063677 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 14:07:53.066978 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 14:07:53.070235 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 14:07:53.073737 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 14:07:53.080394 MTRR: Fixed MSR 0x250 0x0606060606060606
1914 14:07:53.083838 call enable_fixed_mtrr()
1915 14:07:53.086528 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 14:07:53.090129 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 14:07:53.093547 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 14:07:53.096399 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 14:07:53.102983 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 14:07:53.106825 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 14:07:53.109968 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 14:07:53.113123 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 14:07:53.120281 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 14:07:53.122843 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 14:07:53.126523 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 14:07:53.129787 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 14:07:53.132910 call enable_fixed_mtrr()
1928 14:07:53.136804 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 14:07:53.142890 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 14:07:53.145988 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 14:07:53.149391 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 14:07:53.153688 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 14:07:53.159268 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 14:07:53.163178 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 14:07:53.166243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 14:07:53.169829 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 14:07:53.176040 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 14:07:53.179686 CPU physical address size: 39 bits
1939 14:07:53.182405 call enable_fixed_mtrr()
1940 14:07:53.186142 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 14:07:53.189374 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 14:07:53.193112 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 14:07:53.199397 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 14:07:53.202048 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 14:07:53.205711 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 14:07:53.208815 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 14:07:53.212359 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 14:07:53.218967 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 14:07:53.222442 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 14:07:53.225632 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 14:07:53.232181 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 14:07:53.232268 call enable_fixed_mtrr()
1953 14:07:53.238769 MTRR: Fixed MSR 0x259 0x0000000000000000
1954 14:07:53.241975 MTRR: Fixed MSR 0x268 0x0606060606060606
1955 14:07:53.245328 MTRR: Fixed MSR 0x269 0x0606060606060606
1956 14:07:53.248699 MTRR: Fixed MSR 0x26a 0x0606060606060606
1957 14:07:53.251791 MTRR: Fixed MSR 0x26b 0x0606060606060606
1958 14:07:53.258446 MTRR: Fixed MSR 0x26c 0x0606060606060606
1959 14:07:53.261565 MTRR: Fixed MSR 0x26d 0x0606060606060606
1960 14:07:53.264867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1961 14:07:53.268895 MTRR: Fixed MSR 0x26f 0x0606060606060606
1962 14:07:53.275250 CPU physical address size: 39 bits
1963 14:07:53.275336 call enable_fixed_mtrr()
1964 14:07:53.281332 CBFS: Found @ offset 1c96c0 size 3f798
1965 14:07:53.284793 CPU physical address size: 39 bits
1966 14:07:53.288301 CPU physical address size: 39 bits
1967 14:07:53.291791 Checking segment from ROM address 0xffdd16f8
1968 14:07:53.294567 CPU physical address size: 39 bits
1969 14:07:53.301791 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 14:07:53.304652 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 14:07:53.308242 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 14:07:53.311553 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 14:07:53.317818 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 14:07:53.321706 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 14:07:53.324486 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 14:07:53.327604 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 14:07:53.331023 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 14:07:53.337659 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 14:07:53.341109 Checking segment from ROM address 0xffdd1714
1980 14:07:53.344704 call enable_fixed_mtrr()
1981 14:07:53.347491 Loading segment from ROM address 0xffdd16f8
1982 14:07:53.350894 CPU physical address size: 39 bits
1983 14:07:53.354416 code (compression=0)
1984 14:07:53.360754 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1985 14:07:53.370834 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1986 14:07:53.373979 it's not compressed!
1987 14:07:53.465132 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1988 14:07:53.471708 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1989 14:07:53.475342 Loading segment from ROM address 0xffdd1714
1990 14:07:53.478500 Entry Point 0x30000000
1991 14:07:53.481607 Loaded segments
1992 14:07:53.487183 Finalizing chipset.
1993 14:07:53.490640 Finalizing SMM.
1994 14:07:53.493917 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1995 14:07:53.497462 mp_park_aps done after 0 msecs.
1996 14:07:53.503484 Jumping to boot code at 30000000(99b62000)
1997 14:07:53.510688 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1998 14:07:53.510774
1999 14:07:53.513731 Starting depthcharge on Helios...
2000 14:07:53.514105 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2001 14:07:53.514211 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2002 14:07:53.514297 Setting prompt string to ['hatch:']
2003 14:07:53.514413 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2004 14:07:53.523158 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2005 14:07:53.530642 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2006 14:07:53.536656 board_setup: Info: eMMC controller not present; skipping
2007 14:07:53.540143 New NVMe Controller 0x30053ac0 @ 00:1d:00
2008 14:07:53.546416 board_setup: Info: SDHCI controller not present; skipping
2009 14:07:53.553094 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2010 14:07:53.553194 Wipe memory regions:
2011 14:07:53.556951 [0x00000000001000, 0x000000000a0000)
2012 14:07:53.563110 [0x00000000100000, 0x00000030000000)
2013 14:07:53.629578 [0x00000030657430, 0x00000099a2c000)
2014 14:07:53.769715 [0x00000100000000, 0x0000045e800000)
2015 14:07:55.152556 R8152: Initializing
2016 14:07:55.155599 Version 9 (ocp_data = 6010)
2017 14:07:55.159977 R8152: Done initializing
2018 14:07:55.162670 Adding net device
2019 14:07:55.659875 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2020 14:07:55.660007
2021 14:07:55.660289 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2023 14:07:55.761093 hatch: tftpboot 192.168.201.1 6961124/tftp-deploy-iaxf4ii7/kernel/bzImage 6961124/tftp-deploy-iaxf4ii7/kernel/cmdline 6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
2024 14:07:55.761323 Setting prompt string to 'Starting kernel'
2025 14:07:55.761447 Setting prompt string to ['Starting kernel']
2026 14:07:55.761614 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2027 14:07:55.761756 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:04:38)
2028 14:07:55.766059 tftpboot 192.168.201.1 6961124/tftp-deploy-iaxf4ii7/kernel/bzImaoy-iaxf4ii7/kernel/cmdline 6961124/tftp-deploy-iaxf4ii7/ramdisk/ramdisk.cpio.gz
2029 14:07:55.766278 Waiting for link
2030 14:07:55.967182 done.
2031 14:07:55.967326 MAC: f4:f5:e8:50:dc:f7
2032 14:07:55.970298 Sending DHCP discover... done.
2033 14:07:55.973402 Waiting for reply... done.
2034 14:07:55.976717 Sending DHCP request... done.
2035 14:07:55.980128 Waiting for reply... done.
2036 14:07:55.983266 My ip is 192.168.201.10
2037 14:07:55.986906 The DHCP server ip is 192.168.201.1
2038 14:07:55.993594 TFTP server IP predefined by user: 192.168.201.1
2039 14:07:55.999607 Bootfile predefined by user: 6961124/tftp-deploy-iaxf4ii7/kernel/bzImage
2040 14:07:56.003486 Sending tftp read request... done.
2041 14:07:56.006811 Waiting for the transfer...
2042 14:07:56.345418 00000000 ################################################################
2043 14:07:56.696619 00080000 ################################################################
2044 14:07:57.041866 00100000 ################################################################
2045 14:07:57.385873 00180000 ################################################################
2046 14:07:57.727049 00200000 ################################################################
2047 14:07:58.070317 00280000 ################################################################
2048 14:07:58.418762 00300000 ################################################################
2049 14:07:58.744516 00380000 ################################################################
2050 14:07:59.082717 00400000 ################################################################
2051 14:07:59.428470 00480000 ################################################################
2052 14:07:59.775194 00500000 ################################################################
2053 14:08:00.124162 00580000 ################################################################
2054 14:08:00.462332 00600000 ################################################################ done.
2055 14:08:00.465612 The bootfile was 6815632 bytes long.
2056 14:08:00.468739 Sending tftp read request... done.
2057 14:08:00.471629 Waiting for the transfer...
2058 14:08:00.814981 00000000 ################################################################
2059 14:08:01.163534 00080000 ################################################################
2060 14:08:01.506719 00100000 ################################################################
2061 14:08:01.807856 00180000 ################################################################
2062 14:08:02.058147 00200000 ################################################################
2063 14:08:02.328194 00280000 ################################################################
2064 14:08:02.569881 00300000 ################################################################
2065 14:08:02.832866 00380000 ################################################################
2066 14:08:03.083733 00400000 ################################################################
2067 14:08:03.320075 00480000 ################################################################
2068 14:08:03.437963 00500000 ############################## done.
2069 14:08:03.440657 Sending tftp read request... done.
2070 14:08:03.444333 Waiting for the transfer...
2071 14:08:03.447578 00000000 # done.
2072 14:08:03.457560 Command line loaded dynamically from TFTP file: 6961124/tftp-deploy-iaxf4ii7/kernel/cmdline
2073 14:08:03.484165 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/6961124/extract-nfsrootfs-ry6zij56,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2074 14:08:03.486983 ec_init(0): CrosEC protocol v3 supported (256, 256)
2075 14:08:03.495542 Shutting down all USB controllers.
2076 14:08:03.495624 Removing current net device
2077 14:08:03.499257 Finalizing coreboot
2078 14:08:03.505520 Exiting depthcharge with code 4 at timestamp: 17263472
2079 14:08:03.505604
2080 14:08:03.505683 Starting kernel ...
2081 14:08:03.505752
2082 14:08:03.506048 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
2083 14:08:03.506145 start: 2.2.5 auto-login-action (timeout 00:04:31) [common]
2084 14:08:03.506231 Setting prompt string to ['Linux version [0-9]']
2085 14:08:03.506302 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+']
2086 14:08:03.506371 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+'] (timeout 00:05:00)
2087 14:08:03.508567
2089 14:12:34.507067 end: 2.2.5 auto-login-action (duration 00:04:31) [common]
2091 14:12:34.508302 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 271 seconds'
2093 14:12:34.509186 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2096 14:12:34.510823 end: 2 depthcharge-action (duration 00:05:00) [common]
2098 14:12:34.512028 Cleaning after the job
2099 14:12:34.512489 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/ramdisk
2100 14:12:34.514881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/kernel
2101 14:12:34.517486 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/nfsrootfs
2102 14:12:34.580971 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/6961124/tftp-deploy-iaxf4ii7/modules
2103 14:12:34.581290 start: 5.1 power-off (timeout 00:00:30) [common]
2104 14:12:34.581463 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2105 14:12:34.600690 >> Command sent successfully.
2106 14:12:34.602503 Returned 0 in 0 seconds
2107 14:12:34.703742 end: 5.1 power-off (duration 00:00:00) [common]
2109 14:12:34.705490 start: 5.2 read-feedback (timeout 00:10:00) [common]
2110 14:12:34.706749 Listened to connection for namespace 'common' for up to 1s
2111 14:12:35.197114 Listened to connection for namespace 'common' for up to 1s
2112 14:12:35.200147 Listened to connection for namespace 'common' for up to 1s
2113 14:12:35.203668 Listened to connection for namespace 'common' for up to 1s
2114 14:12:35.206879 Listened to connection for namespace 'common' for up to 1s
2115 14:12:35.211186 Listened to connection for namespace 'common' for up to 1s
2116 14:12:35.213657 Listened to connection for namespace 'common' for up to 1s
2117 14:12:35.217313 Listened to connection for namespace 'common' for up to 1s
2118 14:12:35.220635 Listened to connection for namespace 'common' for up to 1s
2119 14:12:35.223734 Listened to connection for namespace 'common' for up to 1s
2120 14:12:35.227220 Listened to connection for namespace 'common' for up to 1s
2121 14:12:35.230277 Listened to connection for namespace 'common' for up to 1s
2122 14:12:35.235338 Listened to connection for namespace 'common' for up to 1s
2123 14:12:35.239422 Listened to connection for namespace 'common' for up to 1s
2124 14:12:35.708620 Finalising connection for namespace 'common'
2125 14:12:35.709352 Disconnecting from shell: Finalise
2126 14:12:35.709809
2127 14:12:35.811428 end: 5.2 read-feedback (duration 00:00:01) [common]
2128 14:12:35.812068 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/6961124
2129 14:12:35.947183 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/6961124
2130 14:12:35.947381 JobError: Your job cannot terminate cleanly.