Boot log: acer-cb317-1h-c3z6-dedede
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 03:32:42.840179 lava-dispatcher, installed at version: 2024.01
2 03:32:42.840387 start: 0 validate
3 03:32:42.840515 Start time: 2024-02-07 03:32:42.840508+00:00 (UTC)
4 03:32:42.840642 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:32:42.840773 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 03:32:43.109575 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:32:43.109739 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-1250-g39ff255b75f5%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:32:43.378305 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:32:43.378478 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-1250-g39ff255b75f5%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 03:32:45.819568 validate duration: 2.98
12 03:32:45.820302 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:32:45.820485 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:32:45.820585 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:32:45.820710 Not decompressing ramdisk as can be used compressed.
16 03:32:45.820793 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 03:32:45.820855 saving as /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/ramdisk/rootfs.cpio.gz
18 03:32:45.820918 total size: 8418130 (8 MB)
19 03:32:46.348011 progress 0 % (0 MB)
20 03:32:46.354041 progress 5 % (0 MB)
21 03:32:46.356300 progress 10 % (0 MB)
22 03:32:46.358702 progress 15 % (1 MB)
23 03:32:46.361016 progress 20 % (1 MB)
24 03:32:46.363232 progress 25 % (2 MB)
25 03:32:46.365628 progress 30 % (2 MB)
26 03:32:46.367687 progress 35 % (2 MB)
27 03:32:46.369965 progress 40 % (3 MB)
28 03:32:46.372252 progress 45 % (3 MB)
29 03:32:46.374468 progress 50 % (4 MB)
30 03:32:46.376742 progress 55 % (4 MB)
31 03:32:46.378928 progress 60 % (4 MB)
32 03:32:46.381001 progress 65 % (5 MB)
33 03:32:46.383168 progress 70 % (5 MB)
34 03:32:46.385432 progress 75 % (6 MB)
35 03:32:46.387645 progress 80 % (6 MB)
36 03:32:46.389892 progress 85 % (6 MB)
37 03:32:46.392115 progress 90 % (7 MB)
38 03:32:46.394321 progress 95 % (7 MB)
39 03:32:46.396388 progress 100 % (8 MB)
40 03:32:46.396616 8 MB downloaded in 0.58 s (13.95 MB/s)
41 03:32:46.396775 end: 1.1.1 http-download (duration 00:00:01) [common]
43 03:32:46.397016 end: 1.1 download-retry (duration 00:00:01) [common]
44 03:32:46.397106 start: 1.2 download-retry (timeout 00:09:59) [common]
45 03:32:46.397191 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 03:32:46.397332 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-1250-g39ff255b75f5/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 03:32:46.397401 saving as /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/kernel/bzImage
48 03:32:46.397461 total size: 8576912 (8 MB)
49 03:32:46.397522 No compression specified
50 03:32:46.398655 progress 0 % (0 MB)
51 03:32:46.401030 progress 5 % (0 MB)
52 03:32:46.403300 progress 10 % (0 MB)
53 03:32:46.405564 progress 15 % (1 MB)
54 03:32:46.407848 progress 20 % (1 MB)
55 03:32:46.410133 progress 25 % (2 MB)
56 03:32:46.412411 progress 30 % (2 MB)
57 03:32:46.414673 progress 35 % (2 MB)
58 03:32:46.417079 progress 40 % (3 MB)
59 03:32:46.419458 progress 45 % (3 MB)
60 03:32:46.421743 progress 50 % (4 MB)
61 03:32:46.424073 progress 55 % (4 MB)
62 03:32:46.426464 progress 60 % (4 MB)
63 03:32:46.428688 progress 65 % (5 MB)
64 03:32:46.431053 progress 70 % (5 MB)
65 03:32:46.433347 progress 75 % (6 MB)
66 03:32:46.435569 progress 80 % (6 MB)
67 03:32:46.437833 progress 85 % (6 MB)
68 03:32:46.440049 progress 90 % (7 MB)
69 03:32:46.442309 progress 95 % (7 MB)
70 03:32:46.444583 progress 100 % (8 MB)
71 03:32:46.444801 8 MB downloaded in 0.05 s (172.80 MB/s)
72 03:32:46.444951 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:32:46.445184 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:32:46.445278 start: 1.3 download-retry (timeout 00:09:59) [common]
76 03:32:46.445363 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 03:32:46.445509 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-1250-g39ff255b75f5/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 03:32:46.445579 saving as /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/modules/modules.tar
79 03:32:46.445640 total size: 251020 (0 MB)
80 03:32:46.445702 Using unxz to decompress xz
81 03:32:46.450036 progress 13 % (0 MB)
82 03:32:46.450453 progress 26 % (0 MB)
83 03:32:46.450691 progress 39 % (0 MB)
84 03:32:46.452346 progress 52 % (0 MB)
85 03:32:46.454242 progress 65 % (0 MB)
86 03:32:46.456135 progress 78 % (0 MB)
87 03:32:46.457976 progress 91 % (0 MB)
88 03:32:46.459896 progress 100 % (0 MB)
89 03:32:46.465461 0 MB downloaded in 0.02 s (12.08 MB/s)
90 03:32:46.465707 end: 1.3.1 http-download (duration 00:00:00) [common]
92 03:32:46.465981 end: 1.3 download-retry (duration 00:00:00) [common]
93 03:32:46.466079 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 03:32:46.466182 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 03:32:46.466268 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 03:32:46.466361 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 03:32:46.466597 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj
98 03:32:46.466740 makedir: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin
99 03:32:46.466851 makedir: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/tests
100 03:32:46.466951 makedir: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/results
101 03:32:46.467072 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-add-keys
102 03:32:46.467219 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-add-sources
103 03:32:46.467350 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-background-process-start
104 03:32:46.467484 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-background-process-stop
105 03:32:46.467613 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-common-functions
106 03:32:46.467741 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-echo-ipv4
107 03:32:46.467869 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-install-packages
108 03:32:46.467994 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-installed-packages
109 03:32:46.468160 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-os-build
110 03:32:46.468290 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-probe-channel
111 03:32:46.468419 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-probe-ip
112 03:32:46.468546 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-target-ip
113 03:32:46.468673 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-target-mac
114 03:32:46.468872 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-target-storage
115 03:32:46.469009 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-case
116 03:32:46.469138 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-event
117 03:32:46.469264 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-feedback
118 03:32:46.469390 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-raise
119 03:32:46.469520 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-reference
120 03:32:46.469652 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-runner
121 03:32:46.469779 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-set
122 03:32:46.469909 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-test-shell
123 03:32:46.470040 Updating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-install-packages (oe)
124 03:32:46.470198 Updating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/bin/lava-installed-packages (oe)
125 03:32:46.470325 Creating /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/environment
126 03:32:46.470426 LAVA metadata
127 03:32:46.470501 - LAVA_JOB_ID=12711071
128 03:32:46.470565 - LAVA_DISPATCHER_IP=192.168.201.1
129 03:32:46.470671 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 03:32:46.470737 skipped lava-vland-overlay
131 03:32:46.470814 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 03:32:46.470892 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 03:32:46.470958 skipped lava-multinode-overlay
134 03:32:46.471029 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 03:32:46.471119 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 03:32:46.471195 Loading test definitions
137 03:32:46.471287 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 03:32:46.471361 Using /lava-12711071 at stage 0
139 03:32:46.471700 uuid=12711071_1.4.2.3.1 testdef=None
140 03:32:46.471788 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 03:32:46.471876 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 03:32:46.472504 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 03:32:46.472731 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 03:32:46.473412 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 03:32:46.473640 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 03:32:46.474263 runner path: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/0/tests/0_dmesg test_uuid 12711071_1.4.2.3.1
149 03:32:46.474420 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 03:32:46.474646 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 03:32:46.474718 Using /lava-12711071 at stage 1
153 03:32:46.475019 uuid=12711071_1.4.2.3.5 testdef=None
154 03:32:46.475106 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 03:32:46.475190 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 03:32:46.475664 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 03:32:46.475883 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 03:32:46.476564 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 03:32:46.476790 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 03:32:46.477586 runner path: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/1/tests/1_bootrr test_uuid 12711071_1.4.2.3.5
163 03:32:46.477741 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 03:32:46.477949 Creating lava-test-runner.conf files
166 03:32:46.478014 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/0 for stage 0
167 03:32:46.478104 - 0_dmesg
168 03:32:46.478183 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711071/lava-overlay-zugdlnrj/lava-12711071/1 for stage 1
169 03:32:46.478274 - 1_bootrr
170 03:32:46.478369 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 03:32:46.478451 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 03:32:46.486463 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 03:32:46.486566 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 03:32:46.486650 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 03:32:46.486734 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 03:32:46.486817 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 03:32:46.757693 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 03:32:46.758084 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 03:32:46.758201 extracting modules file /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12711071/extract-overlay-ramdisk-mrle6c81/ramdisk
180 03:32:46.772216 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 03:32:46.772374 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 03:32:46.772468 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711071/compress-overlay-1ht1__sl/overlay-1.4.2.4.tar.gz to ramdisk
183 03:32:46.772549 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711071/compress-overlay-1ht1__sl/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12711071/extract-overlay-ramdisk-mrle6c81/ramdisk
184 03:32:46.781489 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 03:32:46.781664 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 03:32:46.781788 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 03:32:46.781907 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 03:32:46.782022 Building ramdisk /var/lib/lava/dispatcher/tmp/12711071/extract-overlay-ramdisk-mrle6c81/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12711071/extract-overlay-ramdisk-mrle6c81/ramdisk
189 03:32:46.950294 >> 49790 blocks
190 03:32:47.854924 rename /var/lib/lava/dispatcher/tmp/12711071/extract-overlay-ramdisk-mrle6c81/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
191 03:32:47.855400 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 03:32:47.855532 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 03:32:47.855677 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 03:32:47.855779 No mkimage arch provided, not using FIT.
195 03:32:47.855872 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 03:32:47.855959 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 03:32:47.856071 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 03:32:47.856169 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 03:32:47.856256 No LXC device requested
200 03:32:47.856340 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 03:32:47.856426 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 03:32:47.856507 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 03:32:47.856587 Checking files for TFTP limit of 4294967296 bytes.
204 03:32:47.857008 end: 1 tftp-deploy (duration 00:00:02) [common]
205 03:32:47.857114 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 03:32:47.857205 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 03:32:47.857334 substitutions:
208 03:32:47.857400 - {DTB}: None
209 03:32:47.857462 - {INITRD}: 12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
210 03:32:47.857521 - {KERNEL}: 12711071/tftp-deploy-xljxrie4/kernel/bzImage
211 03:32:47.857578 - {LAVA_MAC}: None
212 03:32:47.857634 - {PRESEED_CONFIG}: None
213 03:32:47.857689 - {PRESEED_LOCAL}: None
214 03:32:47.857743 - {RAMDISK}: 12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
215 03:32:47.857797 - {ROOT_PART}: None
216 03:32:47.857851 - {ROOT}: None
217 03:32:47.857904 - {SERVER_IP}: 192.168.201.1
218 03:32:47.857958 - {TEE}: None
219 03:32:47.858011 Parsed boot commands:
220 03:32:47.858064 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 03:32:47.858251 Parsed boot commands: tftpboot 192.168.201.1 12711071/tftp-deploy-xljxrie4/kernel/bzImage 12711071/tftp-deploy-xljxrie4/kernel/cmdline 12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
222 03:32:47.858340 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 03:32:47.858426 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 03:32:47.858520 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 03:32:47.858608 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 03:32:47.858679 Not connected, no need to disconnect.
227 03:32:47.858755 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 03:32:47.858939 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 03:32:47.859013 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-1'
230 03:32:47.863424 Setting prompt string to ['lava-test: # ']
231 03:32:47.863915 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 03:32:47.864080 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 03:32:47.864183 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 03:32:47.864275 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 03:32:47.864695 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=reboot'
236 03:32:52.999500 >> Command sent successfully.
237 03:32:53.002239 Returned 0 in 5 seconds
238 03:32:53.102615 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 03:32:53.102952 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 03:32:53.103050 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 03:32:53.103135 Setting prompt string to 'Starting depthcharge on Magolor...'
243 03:32:53.103203 Changing prompt to 'Starting depthcharge on Magolor...'
244 03:32:53.103268 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 03:32:53.103537 [Enter `^Ec?' for help]
246 03:32:54.244771
247 03:32:54.244930
248 03:32:54.254653 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 03:32:54.258079 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 03:32:54.264590 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 03:32:54.268592 CPU: AES supported, TXT NOT supported, VT supported
252 03:32:54.274660 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 03:32:54.278352 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 03:32:54.281166 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 03:32:54.285174 VBOOT: Loading verstage.
256 03:32:54.293338 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 03:32:54.295910 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 03:32:54.303042 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 03:32:54.306020 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 03:32:54.306104
261 03:32:54.309966
262 03:32:54.319243 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 03:32:54.333490 Probing TPM: . done!
264 03:32:54.337327 TPM ready after 0 ms
265 03:32:54.340375 Connected to device vid:did:rid of 1ae0:0028:00
266 03:32:54.352271 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
267 03:32:54.359958 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 03:32:54.410948 Initialized TPM device CR50 revision 0
269 03:32:54.427560 tlcl_send_startup: Startup return code is 0
270 03:32:54.427689 TPM: setup succeeded
271 03:32:54.437074 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 03:32:54.451979 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 03:32:54.459724 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 03:32:54.475949 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 03:32:54.479196 Chrome EC: UHEPI supported
276 03:32:54.482774 Phase 1
277 03:32:54.486048 FMAP: area GBB found @ c05000 (12288 bytes)
278 03:32:54.492795 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 03:32:54.499488 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 03:32:54.502623 Recovery requested (1009000e)
281 03:32:54.512308 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 03:32:54.518300 tlcl_extend: response is 0
283 03:32:54.525176 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 03:32:54.534865 tlcl_extend: response is 0
285 03:32:54.541184 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 03:32:54.544590 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 03:32:54.551588 BS: verstage times (exec / console): total (unknown) / 124 ms
288 03:32:54.551673
289 03:32:54.554447
290 03:32:54.564495 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 03:32:54.571425 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 03:32:54.575437 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 03:32:54.577993 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 03:32:54.584230 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 03:32:54.587692 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 03:32:54.591338 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
297 03:32:54.594322 TCO_STS: 0000 0001
298 03:32:54.597681 GEN_PMCON: d0015038 00002200
299 03:32:54.601196 GBLRST_CAUSE: 00000000 00000000
300 03:32:54.601279 prev_sleep_state 5
301 03:32:54.604934 Boot Count incremented to 8531
302 03:32:54.611425 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 03:32:54.615119 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 03:32:54.619597 Chrome EC: UHEPI supported
305 03:32:54.625628 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 03:32:54.631748 Probing TPM: done!
307 03:32:54.638416 Connected to device vid:did:rid of 1ae0:0028:00
308 03:32:54.648329 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
309 03:32:54.651985 Initialized TPM device CR50 revision 0
310 03:32:54.666253 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 03:32:54.672462 MRC: Hash idx 0x100b comparison successful.
312 03:32:54.676288 MRC cache found, size 5458
313 03:32:54.676403 bootmode is set to: 2
314 03:32:54.679718 SPD INDEX = 0
315 03:32:54.682558 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 03:32:54.686170 SPD: module type is LPDDR4X
317 03:32:54.692567 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 03:32:54.698992 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 03:32:54.702300 SPD: device width 16 bits, bus width 32 bits
320 03:32:54.705708 SPD: module size is 4096 MB (per channel)
321 03:32:54.709171 meminit_channels: DRAM half-populated
322 03:32:54.792409 CBMEM:
323 03:32:54.796005 IMD: root @ 0x76fff000 254 entries.
324 03:32:54.799144 IMD: root @ 0x76ffec00 62 entries.
325 03:32:54.802369 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 03:32:54.809292 WARNING: RO_VPD is uninitialized or empty.
327 03:32:54.812248 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 03:32:54.816021 External stage cache:
329 03:32:54.819992 IMD: root @ 0x7b3ff000 254 entries.
330 03:32:54.822722 IMD: root @ 0x7b3fec00 62 entries.
331 03:32:54.832599 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 03:32:54.839405 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 03:32:54.846478 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 03:32:54.854691 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 03:32:54.857686 cse_lite: Skip switching to RW in the recovery path
336 03:32:54.861273 1 DIMMs found
337 03:32:54.861359 SMM Memory Map
338 03:32:54.864607 SMRAM : 0x7b000000 0x800000
339 03:32:54.867466 Subregion 0: 0x7b000000 0x200000
340 03:32:54.871436 Subregion 1: 0x7b200000 0x200000
341 03:32:54.877999 Subregion 2: 0x7b400000 0x400000
342 03:32:54.878154 top_of_ram = 0x77000000
343 03:32:54.884477 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 03:32:54.887686 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 03:32:54.894965 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 03:32:54.897895 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 03:32:54.904177 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 03:32:54.916867 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 03:32:54.922837 Processing 188 relocs. Offset value of 0x74c0e000
350 03:32:54.929575 BS: romstage times (exec / console): total (unknown) / 255 ms
351 03:32:54.934040
352 03:32:54.934133
353 03:32:54.944576 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 03:32:54.948015 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 03:32:54.954357 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 03:32:54.961053 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 03:32:55.016875 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 03:32:55.023513 Processing 4805 relocs. Offset value of 0x75da8000
359 03:32:55.027523 BS: postcar times (exec / console): total (unknown) / 42 ms
360 03:32:55.031061
361 03:32:55.031157
362 03:32:55.040365 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 03:32:55.040469 Normal boot
364 03:32:55.044025 EC returned error result code 3
365 03:32:55.047370 FW_CONFIG value is 0x204
366 03:32:55.050946 GENERIC: 0.0 disabled by fw_config
367 03:32:55.057022 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 03:32:55.060476 I2C: 00:10 disabled by fw_config
369 03:32:55.063964 I2C: 00:10 disabled by fw_config
370 03:32:55.067652 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 03:32:55.074162 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 03:32:55.078271 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 03:32:55.081502 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 03:32:55.088322 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 03:32:55.091579 I2C: 00:10 disabled by fw_config
376 03:32:55.098271 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 03:32:55.105389 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 03:32:55.108474 I2C: 00:1a disabled by fw_config
379 03:32:55.111429 I2C: 00:1a disabled by fw_config
380 03:32:55.115283 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 03:32:55.121760 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 03:32:55.124966 GENERIC: 0.0 disabled by fw_config
383 03:32:55.128040 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 03:32:55.135831 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 03:32:55.138201 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 03:32:55.145061 microcode: Update skipped, already up-to-date
387 03:32:55.148191 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 03:32:55.175778 Detected 2 core, 2 thread CPU.
389 03:32:55.179499 Setting up SMI for CPU
390 03:32:55.182183 IED base = 0x7b400000
391 03:32:55.182273 IED size = 0x00400000
392 03:32:55.185618 Will perform SMM setup.
393 03:32:55.188959 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 03:32:55.199010 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 03:32:55.202086 Processing 16 relocs. Offset value of 0x00030000
396 03:32:55.206096 Attempting to start 1 APs
397 03:32:55.209331 Waiting for 10ms after sending INIT.
398 03:32:55.225997 Waiting for 1st SIPI to complete...done.
399 03:32:55.226190 AP: slot 1 apic_id 2.
400 03:32:55.232463 Waiting for 2nd SIPI to complete...done.
401 03:32:55.239423 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 03:32:55.246437 Processing 13 relocs. Offset value of 0x00038000
403 03:32:55.246538 Unable to locate Global NVS
404 03:32:55.255574 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 03:32:55.259155 Installing permanent SMM handler to 0x7b000000
406 03:32:55.268472 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 03:32:55.272188 Processing 704 relocs. Offset value of 0x7b010000
408 03:32:55.278900 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 03:32:55.285168 Processing 13 relocs. Offset value of 0x7b008000
410 03:32:55.293221 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 03:32:55.295310 Unable to locate Global NVS
412 03:32:55.301865 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 03:32:55.305612 Clearing SMI status registers
414 03:32:55.305704 SMI_STS: PM1
415 03:32:55.308672 PM1_STS: PWRBTN
416 03:32:55.308763 TCO_STS: INTRD_DET
417 03:32:55.312192 GPE0 STD STS:
418 03:32:55.319133 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
419 03:32:55.322575 In relocation handler: CPU 0
420 03:32:55.325456 New SMBASE=0x7b000000 IEDBASE=0x7b400000
421 03:32:55.332505 Writing SMRR. base = 0x7b000006, mask=0xff800800
422 03:32:55.332644 Relocation complete.
423 03:32:55.339023 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
424 03:32:55.341826 In relocation handler: CPU 1
425 03:32:55.348498 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
426 03:32:55.351709 Writing SMRR. base = 0x7b000006, mask=0xff800800
427 03:32:55.355033 Relocation complete.
428 03:32:55.355137 Initializing CPU #0
429 03:32:55.358702 CPU: vendor Intel device 906c0
430 03:32:55.361691 CPU: family 06, model 9c, stepping 00
431 03:32:55.365442 Clearing out pending MCEs
432 03:32:55.368438 Setting up local APIC...
433 03:32:55.372034 apic_id: 0x00 done.
434 03:32:55.372164 Turbo is available but hidden
435 03:32:55.375140 Turbo is available and visible
436 03:32:55.382037 microcode: Update skipped, already up-to-date
437 03:32:55.382162 CPU #0 initialized
438 03:32:55.385271 Initializing CPU #1
439 03:32:55.388744 CPU: vendor Intel device 906c0
440 03:32:55.391716 CPU: family 06, model 9c, stepping 00
441 03:32:55.395930 Clearing out pending MCEs
442 03:32:55.399079 Setting up local APIC...
443 03:32:55.399186 apic_id: 0x02 done.
444 03:32:55.405812 microcode: Update skipped, already up-to-date
445 03:32:55.405949 CPU #1 initialized
446 03:32:55.411697 bsp_do_flight_plan done after 175 msecs.
447 03:32:55.415184 CPU: frequency set to 2800 MHz
448 03:32:55.415292 Enabling SMIs.
449 03:32:55.421799 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 85 / 289 ms
450 03:32:55.431823 Probing TPM: done!
451 03:32:55.438411 Connected to device vid:did:rid of 1ae0:0028:00
452 03:32:55.448277 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
453 03:32:55.451638 Initialized TPM device CR50 revision 0
454 03:32:55.455419 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
455 03:32:55.461715 Found a VBT of 7680 bytes after decompression
456 03:32:55.468262 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
457 03:32:55.503937 Detected 2 core, 2 thread CPU.
458 03:32:55.507160 Detected 2 core, 2 thread CPU.
459 03:32:55.868563 Display FSP Version Info HOB
460 03:32:55.871656 Reference Code - CPU = 8.7.22.30
461 03:32:55.875551 uCode Version = 24.0.0.1f
462 03:32:55.878956 TXT ACM version = ff.ff.ff.ffff
463 03:32:55.881675 Reference Code - ME = 8.7.22.30
464 03:32:55.885223 MEBx version = 0.0.0.0
465 03:32:55.888237 ME Firmware Version = Consumer SKU
466 03:32:55.891744 Reference Code - PCH = 8.7.22.30
467 03:32:55.895059 PCH-CRID Status = Disabled
468 03:32:55.898196 PCH-CRID Original Value = ff.ff.ff.ffff
469 03:32:55.901362 PCH-CRID New Value = ff.ff.ff.ffff
470 03:32:55.905582 OPROM - RST - RAID = ff.ff.ff.ffff
471 03:32:55.908310 PCH Hsio Version = 4.0.0.0
472 03:32:55.911618 Reference Code - SA - System Agent = 8.7.22.30
473 03:32:55.915034 Reference Code - MRC = 0.0.4.68
474 03:32:55.918337 SA - PCIe Version = 8.7.22.30
475 03:32:55.922001 SA-CRID Status = Disabled
476 03:32:55.924963 SA-CRID Original Value = 0.0.0.0
477 03:32:55.928281 SA-CRID New Value = 0.0.0.0
478 03:32:55.931522 OPROM - VBIOS = ff.ff.ff.ffff
479 03:32:55.935128 IO Manageability Engine FW Version = ff.ff.ff.ffff
480 03:32:55.938553 PHY Build Version = ff.ff.ff.ffff
481 03:32:55.941738 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
482 03:32:55.948462 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
483 03:32:55.951525 ITSS IRQ Polarities Before:
484 03:32:55.955067 IPC0: 0xffffffff
485 03:32:55.955209 IPC1: 0xffffffff
486 03:32:55.958477 IPC2: 0xffffffff
487 03:32:55.958601 IPC3: 0xffffffff
488 03:32:55.961899 ITSS IRQ Polarities After:
489 03:32:55.965354 IPC0: 0xffffffff
490 03:32:55.965488 IPC1: 0xffffffff
491 03:32:55.968332 IPC2: 0xffffffff
492 03:32:55.968444 IPC3: 0xffffffff
493 03:32:55.981799 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
494 03:32:55.988164 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
495 03:32:55.988315 Enumerating buses...
496 03:32:55.994792 Show all devs... Before device enumeration.
497 03:32:55.994937 Root Device: enabled 1
498 03:32:55.998074 CPU_CLUSTER: 0: enabled 1
499 03:32:56.001615 DOMAIN: 0000: enabled 1
500 03:32:56.005790 PCI: 00:00.0: enabled 1
501 03:32:56.005917 PCI: 00:02.0: enabled 1
502 03:32:56.008189 PCI: 00:04.0: enabled 1
503 03:32:56.011225 PCI: 00:05.0: enabled 1
504 03:32:56.015151 PCI: 00:09.0: enabled 0
505 03:32:56.015260 PCI: 00:12.6: enabled 0
506 03:32:56.018409 PCI: 00:14.0: enabled 1
507 03:32:56.021228 PCI: 00:14.1: enabled 0
508 03:32:56.024810 PCI: 00:14.2: enabled 0
509 03:32:56.024916 PCI: 00:14.3: enabled 1
510 03:32:56.027884 PCI: 00:14.5: enabled 1
511 03:32:56.031412 PCI: 00:15.0: enabled 1
512 03:32:56.031527 PCI: 00:15.1: enabled 1
513 03:32:56.034631 PCI: 00:15.2: enabled 1
514 03:32:56.037801 PCI: 00:15.3: enabled 1
515 03:32:56.041201 PCI: 00:16.0: enabled 1
516 03:32:56.041304 PCI: 00:16.1: enabled 0
517 03:32:56.044563 PCI: 00:16.4: enabled 0
518 03:32:56.048197 PCI: 00:16.5: enabled 0
519 03:32:56.051195 PCI: 00:17.0: enabled 0
520 03:32:56.051298 PCI: 00:19.0: enabled 1
521 03:32:56.054636 PCI: 00:19.1: enabled 0
522 03:32:56.057827 PCI: 00:19.2: enabled 1
523 03:32:56.060886 PCI: 00:1a.0: enabled 1
524 03:32:56.060997 PCI: 00:1c.0: enabled 0
525 03:32:56.064219 PCI: 00:1c.1: enabled 0
526 03:32:56.067667 PCI: 00:1c.2: enabled 0
527 03:32:56.070996 PCI: 00:1c.3: enabled 0
528 03:32:56.071106 PCI: 00:1c.4: enabled 0
529 03:32:56.074112 PCI: 00:1c.5: enabled 0
530 03:32:56.077660 PCI: 00:1c.6: enabled 0
531 03:32:56.081080 PCI: 00:1c.7: enabled 1
532 03:32:56.081199 PCI: 00:1e.0: enabled 0
533 03:32:56.084044 PCI: 00:1e.1: enabled 0
534 03:32:56.087233 PCI: 00:1e.2: enabled 1
535 03:32:56.087341 PCI: 00:1e.3: enabled 0
536 03:32:56.091011 PCI: 00:1f.0: enabled 1
537 03:32:56.094285 PCI: 00:1f.1: enabled 1
538 03:32:56.097794 PCI: 00:1f.2: enabled 1
539 03:32:56.097905 PCI: 00:1f.3: enabled 1
540 03:32:56.100457 PCI: 00:1f.4: enabled 0
541 03:32:56.104149 PCI: 00:1f.5: enabled 1
542 03:32:56.106991 PCI: 00:1f.7: enabled 0
543 03:32:56.107153 GENERIC: 0.0: enabled 1
544 03:32:56.110634 GENERIC: 0.0: enabled 1
545 03:32:56.113931 USB0 port 0: enabled 1
546 03:32:56.117260 GENERIC: 0.0: enabled 1
547 03:32:56.117413 I2C: 00:2c: enabled 1
548 03:32:56.120659 I2C: 00:15: enabled 1
549 03:32:56.123966 GENERIC: 0.0: enabled 0
550 03:32:56.124147 I2C: 00:15: enabled 1
551 03:32:56.126948 I2C: 00:10: enabled 0
552 03:32:56.130311 I2C: 00:10: enabled 0
553 03:32:56.130441 I2C: 00:2c: enabled 1
554 03:32:56.133773 I2C: 00:40: enabled 1
555 03:32:56.137244 I2C: 00:10: enabled 1
556 03:32:56.137361 I2C: 00:39: enabled 1
557 03:32:56.140381 I2C: 00:36: enabled 1
558 03:32:56.143958 I2C: 00:10: enabled 0
559 03:32:56.144090 I2C: 00:0c: enabled 1
560 03:32:56.147203 I2C: 00:50: enabled 1
561 03:32:56.150377 I2C: 00:1a: enabled 1
562 03:32:56.150483 I2C: 00:1a: enabled 0
563 03:32:56.154084 I2C: 00:1a: enabled 0
564 03:32:56.157187 I2C: 00:28: enabled 1
565 03:32:56.157300 I2C: 00:29: enabled 1
566 03:32:56.160247 PCI: 00:00.0: enabled 1
567 03:32:56.163947 SPI: 00: enabled 1
568 03:32:56.164086 PNP: 0c09.0: enabled 1
569 03:32:56.167052 GENERIC: 0.0: enabled 0
570 03:32:56.170309 USB2 port 0: enabled 1
571 03:32:56.173567 USB2 port 1: enabled 1
572 03:32:56.173696 USB2 port 2: enabled 1
573 03:32:56.176965 USB2 port 3: enabled 1
574 03:32:56.180496 USB2 port 4: enabled 0
575 03:32:56.180597 USB2 port 5: enabled 1
576 03:32:56.183435 USB2 port 6: enabled 0
577 03:32:56.186809 USB2 port 7: enabled 1
578 03:32:56.186894 USB3 port 0: enabled 1
579 03:32:56.190530 USB3 port 1: enabled 1
580 03:32:56.193854 USB3 port 2: enabled 1
581 03:32:56.196681 USB3 port 3: enabled 1
582 03:32:56.196767 APIC: 00: enabled 1
583 03:32:56.200285 APIC: 02: enabled 1
584 03:32:56.200370 Compare with tree...
585 03:32:56.203452 Root Device: enabled 1
586 03:32:56.207301 CPU_CLUSTER: 0: enabled 1
587 03:32:56.209959 APIC: 00: enabled 1
588 03:32:56.210050 APIC: 02: enabled 1
589 03:32:56.213540 DOMAIN: 0000: enabled 1
590 03:32:56.216744 PCI: 00:00.0: enabled 1
591 03:32:56.220654 PCI: 00:02.0: enabled 1
592 03:32:56.223267 PCI: 00:04.0: enabled 1
593 03:32:56.223359 GENERIC: 0.0: enabled 1
594 03:32:56.226941 PCI: 00:05.0: enabled 1
595 03:32:56.230191 GENERIC: 0.0: enabled 1
596 03:32:56.233492 PCI: 00:09.0: enabled 0
597 03:32:56.236372 PCI: 00:12.6: enabled 0
598 03:32:56.236518 PCI: 00:14.0: enabled 1
599 03:32:56.239816 USB0 port 0: enabled 1
600 03:32:56.243187 USB2 port 0: enabled 1
601 03:32:56.246707 USB2 port 1: enabled 1
602 03:32:56.250110 USB2 port 2: enabled 1
603 03:32:56.250200 USB2 port 3: enabled 1
604 03:32:56.253272 USB2 port 4: enabled 0
605 03:32:56.256687 USB2 port 5: enabled 1
606 03:32:56.259942 USB2 port 6: enabled 0
607 03:32:56.263689 USB2 port 7: enabled 1
608 03:32:56.263775 USB3 port 0: enabled 1
609 03:32:56.266561 USB3 port 1: enabled 1
610 03:32:56.269795 USB3 port 2: enabled 1
611 03:32:56.273253 USB3 port 3: enabled 1
612 03:32:56.276805 PCI: 00:14.1: enabled 0
613 03:32:56.280333 PCI: 00:14.2: enabled 0
614 03:32:56.280424 PCI: 00:14.3: enabled 1
615 03:32:56.283468 GENERIC: 0.0: enabled 1
616 03:32:56.286685 PCI: 00:14.5: enabled 1
617 03:32:56.289722 PCI: 00:15.0: enabled 1
618 03:32:56.289808 I2C: 00:2c: enabled 1
619 03:32:56.293607 I2C: 00:15: enabled 1
620 03:32:56.296617 PCI: 00:15.1: enabled 1
621 03:32:56.300020 PCI: 00:15.2: enabled 1
622 03:32:56.303275 GENERIC: 0.0: enabled 0
623 03:32:56.303360 I2C: 00:15: enabled 1
624 03:32:56.307107 I2C: 00:10: enabled 0
625 03:32:56.310374 I2C: 00:10: enabled 0
626 03:32:56.313510 I2C: 00:2c: enabled 1
627 03:32:56.313612 I2C: 00:40: enabled 1
628 03:32:56.316784 I2C: 00:10: enabled 1
629 03:32:56.319935 I2C: 00:39: enabled 1
630 03:32:56.323287 PCI: 00:15.3: enabled 1
631 03:32:56.326706 I2C: 00:36: enabled 1
632 03:32:56.326799 I2C: 00:10: enabled 0
633 03:32:56.330086 I2C: 00:0c: enabled 1
634 03:32:56.333088 I2C: 00:50: enabled 1
635 03:32:56.337196 PCI: 00:16.0: enabled 1
636 03:32:56.337296 PCI: 00:16.1: enabled 0
637 03:32:56.341592 PCI: 00:16.4: enabled 0
638 03:32:56.344562 PCI: 00:16.5: enabled 0
639 03:32:56.344682 PCI: 00:17.0: enabled 0
640 03:32:56.347948 PCI: 00:19.0: enabled 1
641 03:32:56.351326 I2C: 00:1a: enabled 1
642 03:32:56.354568 I2C: 00:1a: enabled 0
643 03:32:56.354695 I2C: 00:1a: enabled 0
644 03:32:56.358046 I2C: 00:28: enabled 1
645 03:32:56.361573 I2C: 00:29: enabled 1
646 03:32:56.364742 PCI: 00:19.1: enabled 0
647 03:32:56.364830 PCI: 00:19.2: enabled 1
648 03:32:56.367809 PCI: 00:1a.0: enabled 1
649 03:32:56.370882 PCI: 00:1e.0: enabled 0
650 03:32:56.374787 PCI: 00:1e.1: enabled 0
651 03:32:56.377949 PCI: 00:1e.2: enabled 1
652 03:32:56.378037 SPI: 00: enabled 1
653 03:32:56.381500 PCI: 00:1e.3: enabled 0
654 03:32:56.384389 PCI: 00:1f.0: enabled 1
655 03:32:56.388258 PNP: 0c09.0: enabled 1
656 03:32:56.388349 PCI: 00:1f.1: enabled 1
657 03:32:56.391728 PCI: 00:1f.2: enabled 1
658 03:32:56.394801 PCI: 00:1f.3: enabled 1
659 03:32:56.397914 GENERIC: 0.0: enabled 0
660 03:32:56.401108 PCI: 00:1f.4: enabled 0
661 03:32:56.401216 PCI: 00:1f.5: enabled 1
662 03:32:56.404457 PCI: 00:1f.7: enabled 0
663 03:32:56.407532 Root Device scanning...
664 03:32:56.411225 scan_static_bus for Root Device
665 03:32:56.414323 CPU_CLUSTER: 0 enabled
666 03:32:56.414421 DOMAIN: 0000 enabled
667 03:32:56.417997 DOMAIN: 0000 scanning...
668 03:32:56.421018 PCI: pci_scan_bus for bus 00
669 03:32:56.424493 PCI: 00:00.0 [8086/0000] ops
670 03:32:56.427963 PCI: 00:00.0 [8086/4e22] enabled
671 03:32:56.431173 PCI: 00:02.0 [8086/0000] bus ops
672 03:32:56.434405 PCI: 00:02.0 [8086/4e55] enabled
673 03:32:56.437864 PCI: 00:04.0 [8086/0000] bus ops
674 03:32:56.440913 PCI: 00:04.0 [8086/4e03] enabled
675 03:32:56.444418 PCI: 00:05.0 [8086/0000] bus ops
676 03:32:56.447905 PCI: 00:05.0 [8086/4e19] enabled
677 03:32:56.451665 PCI: 00:08.0 [8086/4e11] enabled
678 03:32:56.454449 PCI: 00:14.0 [8086/0000] bus ops
679 03:32:56.457702 PCI: 00:14.0 [8086/4ded] enabled
680 03:32:56.461037 PCI: 00:14.2 [8086/4def] disabled
681 03:32:56.464874 PCI: 00:14.3 [8086/0000] bus ops
682 03:32:56.467709 PCI: 00:14.3 [8086/4df0] enabled
683 03:32:56.471031 PCI: 00:14.5 [8086/0000] ops
684 03:32:56.474540 PCI: 00:14.5 [8086/4df8] enabled
685 03:32:56.477663 PCI: 00:15.0 [8086/0000] bus ops
686 03:32:56.481152 PCI: 00:15.0 [8086/4de8] enabled
687 03:32:56.484550 PCI: 00:15.1 [8086/0000] bus ops
688 03:32:56.487894 PCI: 00:15.1 [8086/4de9] enabled
689 03:32:56.491225 PCI: 00:15.2 [8086/0000] bus ops
690 03:32:56.494199 PCI: 00:15.2 [8086/4dea] enabled
691 03:32:56.497433 PCI: 00:15.3 [8086/0000] bus ops
692 03:32:56.500758 PCI: 00:15.3 [8086/4deb] enabled
693 03:32:56.504368 PCI: 00:16.0 [8086/0000] ops
694 03:32:56.507997 PCI: 00:16.0 [8086/4de0] enabled
695 03:32:56.511094 PCI: 00:19.0 [8086/0000] bus ops
696 03:32:56.514195 PCI: 00:19.0 [8086/4dc5] enabled
697 03:32:56.517462 PCI: 00:19.2 [8086/0000] ops
698 03:32:56.520719 PCI: 00:19.2 [8086/4dc7] enabled
699 03:32:56.520823 PCI: 00:1a.0 [8086/0000] ops
700 03:32:56.524290 PCI: 00:1a.0 [8086/4dc4] enabled
701 03:32:56.527502 PCI: 00:1e.0 [8086/0000] ops
702 03:32:56.530597 PCI: 00:1e.0 [8086/4da8] disabled
703 03:32:56.534106 PCI: 00:1e.2 [8086/0000] bus ops
704 03:32:56.537417 PCI: 00:1e.2 [8086/4daa] enabled
705 03:32:56.540491 PCI: 00:1f.0 [8086/0000] bus ops
706 03:32:56.544280 PCI: 00:1f.0 [8086/4d87] enabled
707 03:32:56.550754 PCI: Static device PCI: 00:1f.1 not found, disabling it.
708 03:32:56.550860 RTC Init
709 03:32:56.554557 Set power on after power failure.
710 03:32:56.557410 Disabling Deep S3
711 03:32:56.560525 Disabling Deep S3
712 03:32:56.560609 Disabling Deep S4
713 03:32:56.564426 Disabling Deep S4
714 03:32:56.564512 Disabling Deep S5
715 03:32:56.567161 Disabling Deep S5
716 03:32:56.570551 PCI: 00:1f.2 [0000/0000] hidden
717 03:32:56.574326 PCI: 00:1f.3 [8086/0000] bus ops
718 03:32:56.577283 PCI: 00:1f.3 [8086/4dc8] enabled
719 03:32:56.580369 PCI: 00:1f.5 [8086/0000] bus ops
720 03:32:56.583829 PCI: 00:1f.5 [8086/4da4] enabled
721 03:32:56.587285 PCI: Leftover static devices:
722 03:32:56.587374 PCI: 00:12.6
723 03:32:56.591071 PCI: 00:09.0
724 03:32:56.591159 PCI: 00:14.1
725 03:32:56.591226 PCI: 00:16.1
726 03:32:56.594092 PCI: 00:16.4
727 03:32:56.594175 PCI: 00:16.5
728 03:32:56.597325 PCI: 00:17.0
729 03:32:56.597426 PCI: 00:19.1
730 03:32:56.597524 PCI: 00:1e.1
731 03:32:56.600782 PCI: 00:1e.3
732 03:32:56.600867 PCI: 00:1f.1
733 03:32:56.604210 PCI: 00:1f.4
734 03:32:56.604294 PCI: 00:1f.7
735 03:32:56.607205 PCI: Check your devicetree.cb.
736 03:32:56.610400 PCI: 00:02.0 scanning...
737 03:32:56.613936 scan_generic_bus for PCI: 00:02.0
738 03:32:56.617419 scan_generic_bus for PCI: 00:02.0 done
739 03:32:56.620695 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
740 03:32:56.624313 PCI: 00:04.0 scanning...
741 03:32:56.627425 scan_generic_bus for PCI: 00:04.0
742 03:32:56.630362 GENERIC: 0.0 enabled
743 03:32:56.636959 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
744 03:32:56.640791 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
745 03:32:56.643973 PCI: 00:05.0 scanning...
746 03:32:56.646833 scan_generic_bus for PCI: 00:05.0
747 03:32:56.650621 GENERIC: 0.0 enabled
748 03:32:56.657047 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
749 03:32:56.660426 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
750 03:32:56.663899 PCI: 00:14.0 scanning...
751 03:32:56.667026 scan_static_bus for PCI: 00:14.0
752 03:32:56.667115 USB0 port 0 enabled
753 03:32:56.670114 USB0 port 0 scanning...
754 03:32:56.673355 scan_static_bus for USB0 port 0
755 03:32:56.676907 USB2 port 0 enabled
756 03:32:56.677028 USB2 port 1 enabled
757 03:32:56.680216 USB2 port 2 enabled
758 03:32:56.683911 USB2 port 3 enabled
759 03:32:56.684033 USB2 port 4 disabled
760 03:32:56.686955 USB2 port 5 enabled
761 03:32:56.690378 USB2 port 6 disabled
762 03:32:56.690470 USB2 port 7 enabled
763 03:32:56.693566 USB3 port 0 enabled
764 03:32:56.693650 USB3 port 1 enabled
765 03:32:56.697263 USB3 port 2 enabled
766 03:32:56.699869 USB3 port 3 enabled
767 03:32:56.699958 USB2 port 0 scanning...
768 03:32:56.703199 scan_static_bus for USB2 port 0
769 03:32:56.709837 scan_static_bus for USB2 port 0 done
770 03:32:56.713411 scan_bus: bus USB2 port 0 finished in 6 msecs
771 03:32:56.716629 USB2 port 1 scanning...
772 03:32:56.720156 scan_static_bus for USB2 port 1
773 03:32:56.723009 scan_static_bus for USB2 port 1 done
774 03:32:56.726607 scan_bus: bus USB2 port 1 finished in 6 msecs
775 03:32:56.729672 USB2 port 2 scanning...
776 03:32:56.733047 scan_static_bus for USB2 port 2
777 03:32:56.736459 scan_static_bus for USB2 port 2 done
778 03:32:56.739996 scan_bus: bus USB2 port 2 finished in 6 msecs
779 03:32:56.743204 USB2 port 3 scanning...
780 03:32:56.746333 scan_static_bus for USB2 port 3
781 03:32:56.749961 scan_static_bus for USB2 port 3 done
782 03:32:56.756727 scan_bus: bus USB2 port 3 finished in 6 msecs
783 03:32:56.756838 USB2 port 5 scanning...
784 03:32:56.759615 scan_static_bus for USB2 port 5
785 03:32:56.766723 scan_static_bus for USB2 port 5 done
786 03:32:56.769959 scan_bus: bus USB2 port 5 finished in 6 msecs
787 03:32:56.773041 USB2 port 7 scanning...
788 03:32:56.776639 scan_static_bus for USB2 port 7
789 03:32:56.779727 scan_static_bus for USB2 port 7 done
790 03:32:56.783413 scan_bus: bus USB2 port 7 finished in 6 msecs
791 03:32:56.786387 USB3 port 0 scanning...
792 03:32:56.789813 scan_static_bus for USB3 port 0
793 03:32:56.793119 scan_static_bus for USB3 port 0 done
794 03:32:56.796269 scan_bus: bus USB3 port 0 finished in 6 msecs
795 03:32:56.799411 USB3 port 1 scanning...
796 03:32:56.802942 scan_static_bus for USB3 port 1
797 03:32:56.806083 scan_static_bus for USB3 port 1 done
798 03:32:56.812768 scan_bus: bus USB3 port 1 finished in 6 msecs
799 03:32:56.812859 USB3 port 2 scanning...
800 03:32:56.816366 scan_static_bus for USB3 port 2
801 03:32:56.820175 scan_static_bus for USB3 port 2 done
802 03:32:56.826622 scan_bus: bus USB3 port 2 finished in 6 msecs
803 03:32:56.829304 USB3 port 3 scanning...
804 03:32:56.833146 scan_static_bus for USB3 port 3
805 03:32:56.836148 scan_static_bus for USB3 port 3 done
806 03:32:56.839579 scan_bus: bus USB3 port 3 finished in 6 msecs
807 03:32:56.842647 scan_static_bus for USB0 port 0 done
808 03:32:56.849660 scan_bus: bus USB0 port 0 finished in 172 msecs
809 03:32:56.852669 scan_static_bus for PCI: 00:14.0 done
810 03:32:56.855972 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
811 03:32:56.859296 PCI: 00:14.3 scanning...
812 03:32:56.863305 scan_static_bus for PCI: 00:14.3
813 03:32:56.866054 GENERIC: 0.0 enabled
814 03:32:56.869814 scan_static_bus for PCI: 00:14.3 done
815 03:32:56.872981 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
816 03:32:56.876644 PCI: 00:15.0 scanning...
817 03:32:56.879298 scan_static_bus for PCI: 00:15.0
818 03:32:56.882677 I2C: 00:2c enabled
819 03:32:56.882769 I2C: 00:15 enabled
820 03:32:56.886498 scan_static_bus for PCI: 00:15.0 done
821 03:32:56.892599 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
822 03:32:56.896188 PCI: 00:15.1 scanning...
823 03:32:56.899692 scan_static_bus for PCI: 00:15.1
824 03:32:56.902697 scan_static_bus for PCI: 00:15.1 done
825 03:32:56.906058 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
826 03:32:56.909907 PCI: 00:15.2 scanning...
827 03:32:56.912938 scan_static_bus for PCI: 00:15.2
828 03:32:56.916727 GENERIC: 0.0 disabled
829 03:32:56.916820 I2C: 00:15 enabled
830 03:32:56.920157 I2C: 00:10 disabled
831 03:32:56.920248 I2C: 00:10 disabled
832 03:32:56.923848 I2C: 00:2c enabled
833 03:32:56.923985 I2C: 00:40 enabled
834 03:32:56.927056 I2C: 00:10 enabled
835 03:32:56.927147 I2C: 00:39 enabled
836 03:32:56.934799 scan_static_bus for PCI: 00:15.2 done
837 03:32:56.938012 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
838 03:32:56.941423 PCI: 00:15.3 scanning...
839 03:32:56.944575 scan_static_bus for PCI: 00:15.3
840 03:32:56.944669 I2C: 00:36 enabled
841 03:32:56.948075 I2C: 00:10 disabled
842 03:32:56.948181 I2C: 00:0c enabled
843 03:32:56.951489 I2C: 00:50 enabled
844 03:32:56.954742 scan_static_bus for PCI: 00:15.3 done
845 03:32:56.961470 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
846 03:32:56.961590 PCI: 00:19.0 scanning...
847 03:32:56.964632 scan_static_bus for PCI: 00:19.0
848 03:32:56.968630 I2C: 00:1a enabled
849 03:32:56.971133 I2C: 00:1a disabled
850 03:32:56.971228 I2C: 00:1a disabled
851 03:32:56.974552 I2C: 00:28 enabled
852 03:32:56.974644 I2C: 00:29 enabled
853 03:32:56.981777 scan_static_bus for PCI: 00:19.0 done
854 03:32:56.984291 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
855 03:32:56.987715 PCI: 00:1e.2 scanning...
856 03:32:56.990966 scan_generic_bus for PCI: 00:1e.2
857 03:32:56.991079 SPI: 00 enabled
858 03:32:56.997576 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
859 03:32:57.004510 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
860 03:32:57.004647 PCI: 00:1f.0 scanning...
861 03:32:57.007732 scan_static_bus for PCI: 00:1f.0
862 03:32:57.011113 PNP: 0c09.0 enabled
863 03:32:57.014114 PNP: 0c09.0 scanning...
864 03:32:57.017671 scan_static_bus for PNP: 0c09.0
865 03:32:57.021453 scan_static_bus for PNP: 0c09.0 done
866 03:32:57.024280 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
867 03:32:57.027746 scan_static_bus for PCI: 00:1f.0 done
868 03:32:57.034395 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
869 03:32:57.037680 PCI: 00:1f.3 scanning...
870 03:32:57.040923 scan_static_bus for PCI: 00:1f.3
871 03:32:57.041082 GENERIC: 0.0 disabled
872 03:32:57.044613 scan_static_bus for PCI: 00:1f.3 done
873 03:32:57.050962 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
874 03:32:57.054137 PCI: 00:1f.5 scanning...
875 03:32:57.057576 scan_generic_bus for PCI: 00:1f.5
876 03:32:57.061315 scan_generic_bus for PCI: 00:1f.5 done
877 03:32:57.064394 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
878 03:32:57.070986 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
879 03:32:57.074236 scan_static_bus for Root Device done
880 03:32:57.077481 scan_bus: bus Root Device finished in 666 msecs
881 03:32:57.081114 done
882 03:32:57.084367 BS: BS_DEV_ENUMERATE run times (exec / console): 7 / 1086 ms
883 03:32:57.087696 Chrome EC: UHEPI supported
884 03:32:57.094289 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
885 03:32:57.101077 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
886 03:32:57.104545 SPI flash protection: WPSW=0 SRP0=0
887 03:32:57.107780 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
888 03:32:57.114331 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
889 03:32:57.117515 found VGA at PCI: 00:02.0
890 03:32:57.121070 Setting up VGA for PCI: 00:02.0
891 03:32:57.127336 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
892 03:32:57.130814 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
893 03:32:57.134331 Allocating resources...
894 03:32:57.134449 Reading resources...
895 03:32:57.140584 Root Device read_resources bus 0 link: 0
896 03:32:57.144410 CPU_CLUSTER: 0 read_resources bus 0 link: 0
897 03:32:57.150454 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
898 03:32:57.153986 DOMAIN: 0000 read_resources bus 0 link: 0
899 03:32:57.160805 PCI: 00:04.0 read_resources bus 1 link: 0
900 03:32:57.163923 PCI: 00:04.0 read_resources bus 1 link: 0 done
901 03:32:57.167498 PCI: 00:05.0 read_resources bus 2 link: 0
902 03:32:57.174701 PCI: 00:05.0 read_resources bus 2 link: 0 done
903 03:32:57.177565 PCI: 00:14.0 read_resources bus 0 link: 0
904 03:32:57.180687 USB0 port 0 read_resources bus 0 link: 0
905 03:32:57.189534 USB0 port 0 read_resources bus 0 link: 0 done
906 03:32:57.193090 PCI: 00:14.0 read_resources bus 0 link: 0 done
907 03:32:57.199355 PCI: 00:14.3 read_resources bus 0 link: 0
908 03:32:57.202973 PCI: 00:14.3 read_resources bus 0 link: 0 done
909 03:32:57.262522 PCI: 00:15.0 read_resources bus 0 link: 0
910 03:32:57.262860 PCI: 00:15.0 read_resources bus 0 link: 0 done
911 03:32:57.263356 PCI: 00:15.2 read_resources bus 0 link: 0
912 03:32:57.263575 PCI: 00:15.2 read_resources bus 0 link: 0 done
913 03:32:57.263755 PCI: 00:15.3 read_resources bus 0 link: 0
914 03:32:57.263928 PCI: 00:15.3 read_resources bus 0 link: 0 done
915 03:32:57.264158 PCI: 00:19.0 read_resources bus 0 link: 0
916 03:32:57.264336 PCI: 00:19.0 read_resources bus 0 link: 0 done
917 03:32:57.264503 PCI: 00:1e.2 read_resources bus 3 link: 0
918 03:32:57.264700 PCI: 00:1e.2 read_resources bus 3 link: 0 done
919 03:32:57.264868 PCI: 00:1f.0 read_resources bus 0 link: 0
920 03:32:57.265033 PCI: 00:1f.0 read_resources bus 0 link: 0 done
921 03:32:57.303219 PCI: 00:1f.3 read_resources bus 0 link: 0
922 03:32:57.303742 PCI: 00:1f.3 read_resources bus 0 link: 0 done
923 03:32:57.304620 DOMAIN: 0000 read_resources bus 0 link: 0 done
924 03:32:57.305083 Root Device read_resources bus 0 link: 0 done
925 03:32:57.305389 Done reading resources.
926 03:32:57.305670 Show resources in subtree (Root Device)...After reading.
927 03:32:57.305942 Root Device child on link 0 CPU_CLUSTER: 0
928 03:32:57.306206 CPU_CLUSTER: 0 child on link 0 APIC: 00
929 03:32:57.306518 APIC: 00
930 03:32:57.306968 APIC: 02
931 03:32:57.307493 DOMAIN: 0000 child on link 0 PCI: 00:00.0
932 03:32:57.314250 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
933 03:32:57.323696 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
934 03:32:57.326792 PCI: 00:00.0
935 03:32:57.337167 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
936 03:32:57.347328 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
937 03:32:57.353719 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
938 03:32:57.363176 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
939 03:32:57.373519 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
940 03:32:57.383265 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
941 03:32:57.393433 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
942 03:32:57.403437 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
943 03:32:57.410125 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
944 03:32:57.420079 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
945 03:32:57.429775 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
946 03:32:57.440129 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
947 03:32:57.450061 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
948 03:32:57.456554 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
949 03:32:57.466447 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
950 03:32:57.476517 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
951 03:32:57.486520 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
952 03:32:57.496392 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
953 03:32:57.506196 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
954 03:32:57.506660 PCI: 00:02.0
955 03:32:57.516317 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
956 03:32:57.526448 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
957 03:32:57.536015 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
958 03:32:57.539519 PCI: 00:04.0 child on link 0 GENERIC: 0.0
959 03:32:57.549661 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
960 03:32:57.553224 GENERIC: 0.0
961 03:32:57.556133 PCI: 00:05.0 child on link 0 GENERIC: 0.0
962 03:32:57.566071 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
963 03:32:57.569605 GENERIC: 0.0
964 03:32:57.570030 PCI: 00:08.0
965 03:32:57.579301 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
966 03:32:57.582963 PCI: 00:14.0 child on link 0 USB0 port 0
967 03:32:57.592850 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
968 03:32:57.599978 USB0 port 0 child on link 0 USB2 port 0
969 03:32:57.600459 USB2 port 0
970 03:32:57.603701 USB2 port 1
971 03:32:57.604165 USB2 port 2
972 03:32:57.604514 USB2 port 3
973 03:32:57.608012 USB2 port 4
974 03:32:57.608490 USB2 port 5
975 03:32:57.610751 USB2 port 6
976 03:32:57.614177 USB2 port 7
977 03:32:57.614696 USB3 port 0
978 03:32:57.617020 USB3 port 1
979 03:32:57.617444 USB3 port 2
980 03:32:57.620435 USB3 port 3
981 03:32:57.620859 PCI: 00:14.2
982 03:32:57.627061 PCI: 00:14.3 child on link 0 GENERIC: 0.0
983 03:32:57.634161 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
984 03:32:57.637077 GENERIC: 0.0
985 03:32:57.640575 PCI: 00:14.5
986 03:32:57.650391 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
987 03:32:57.653933 PCI: 00:15.0 child on link 0 I2C: 00:2c
988 03:32:57.663526 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
989 03:32:57.663923 I2C: 00:2c
990 03:32:57.666917 I2C: 00:15
991 03:32:57.667344 PCI: 00:15.1
992 03:32:57.676811 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 03:32:57.683632 PCI: 00:15.2 child on link 0 GENERIC: 0.0
994 03:32:57.693698 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 03:32:57.694190 GENERIC: 0.0
996 03:32:57.696884 I2C: 00:15
997 03:32:57.697295 I2C: 00:10
998 03:32:57.697612 I2C: 00:10
999 03:32:57.700038 I2C: 00:2c
1000 03:32:57.700499 I2C: 00:40
1001 03:32:57.703692 I2C: 00:10
1002 03:32:57.704170 I2C: 00:39
1003 03:32:57.710090 PCI: 00:15.3 child on link 0 I2C: 00:36
1004 03:32:57.719986 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 03:32:57.720594 I2C: 00:36
1006 03:32:57.723537 I2C: 00:10
1007 03:32:57.724277 I2C: 00:0c
1008 03:32:57.726765 I2C: 00:50
1009 03:32:57.727421 PCI: 00:16.0
1010 03:32:57.736873 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 03:32:57.739536 PCI: 00:19.0 child on link 0 I2C: 00:1a
1012 03:32:57.749653 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 03:32:57.752921 I2C: 00:1a
1014 03:32:57.753207 I2C: 00:1a
1015 03:32:57.756256 I2C: 00:1a
1016 03:32:57.756536 I2C: 00:28
1017 03:32:57.759909 I2C: 00:29
1018 03:32:57.760336 PCI: 00:19.2
1019 03:32:57.772817 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1020 03:32:57.782948 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1021 03:32:57.783242 PCI: 00:1a.0
1022 03:32:57.793021 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1023 03:32:57.796328 PCI: 00:1e.0
1024 03:32:57.799501 PCI: 00:1e.2 child on link 0 SPI: 00
1025 03:32:57.809395 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1026 03:32:57.809544 SPI: 00
1027 03:32:57.812805 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1028 03:32:57.823268 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1029 03:32:57.826120 PNP: 0c09.0
1030 03:32:57.832403 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1031 03:32:57.835821 PCI: 00:1f.2
1032 03:32:57.846028 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1033 03:32:57.852827 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1034 03:32:57.858962 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1035 03:32:57.869011 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1036 03:32:57.879254 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1037 03:32:57.879647 GENERIC: 0.0
1038 03:32:57.882571 PCI: 00:1f.5
1039 03:32:57.892570 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1040 03:32:57.898825 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1041 03:32:57.905486 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1042 03:32:57.912403 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1043 03:32:57.918829 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1044 03:32:57.925486 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1045 03:32:57.935288 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1046 03:32:57.938336 DOMAIN: 0000: Resource ranges:
1047 03:32:57.942008 * Base: 1000, Size: 800, Tag: 100
1048 03:32:57.945405 * Base: 1900, Size: e700, Tag: 100
1049 03:32:57.948565 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1050 03:32:57.955160 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1051 03:32:57.961733 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1052 03:32:57.972109 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1053 03:32:57.978665 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1054 03:32:57.985155 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1055 03:32:57.995192 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1056 03:32:58.001477 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1057 03:32:58.008444 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1058 03:32:58.017975 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1059 03:32:58.024927 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1060 03:32:58.031556 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1061 03:32:58.041323 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1062 03:32:58.047776 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1063 03:32:58.054378 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1064 03:32:58.064345 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1065 03:32:58.070719 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1066 03:32:58.077607 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1067 03:32:58.087451 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1068 03:32:58.094085 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1069 03:32:58.101528 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1070 03:32:58.110915 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1071 03:32:58.117812 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1072 03:32:58.124503 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1073 03:32:58.127902 DOMAIN: 0000: Resource ranges:
1074 03:32:58.130784 * Base: 7fc00000, Size: 40400000, Tag: 200
1075 03:32:58.137362 * Base: d0000000, Size: 2b000000, Tag: 200
1076 03:32:58.141524 * Base: fb001000, Size: 2fff000, Tag: 200
1077 03:32:58.144101 * Base: fe010000, Size: 22000, Tag: 200
1078 03:32:58.150953 * Base: fe033000, Size: a4d000, Tag: 200
1079 03:32:58.154336 * Base: fea88000, Size: 2f8000, Tag: 200
1080 03:32:58.157383 * Base: fed88000, Size: 8000, Tag: 200
1081 03:32:58.160686 * Base: fed93000, Size: d000, Tag: 200
1082 03:32:58.167518 * Base: feda2000, Size: 125e000, Tag: 200
1083 03:32:58.170379 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1084 03:32:58.177840 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1085 03:32:58.184862 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1086 03:32:58.191094 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1087 03:32:58.198276 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1088 03:32:58.204728 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1089 03:32:58.211688 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1090 03:32:58.221442 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1091 03:32:58.224625 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1092 03:32:58.231694 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1093 03:32:58.238512 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1094 03:32:58.244624 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1095 03:32:58.250925 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1096 03:32:58.257579 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1097 03:32:58.264088 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1098 03:32:58.271195 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1099 03:32:58.277440 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1100 03:32:58.284016 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1101 03:32:58.291329 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1102 03:32:58.297799 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1103 03:32:58.304043 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1104 03:32:58.310678 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1105 03:32:58.317407 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1106 03:32:58.321057 Root Device assign_resources, bus 0 link: 0
1107 03:32:58.327419 DOMAIN: 0000 assign_resources, bus 0 link: 0
1108 03:32:58.334491 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1109 03:32:58.344553 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1110 03:32:58.351148 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1111 03:32:58.360821 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1112 03:32:58.364661 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 03:32:58.367600 PCI: 00:04.0 assign_resources, bus 1 link: 0
1114 03:32:58.377558 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1115 03:32:58.380771 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 03:32:58.387131 PCI: 00:05.0 assign_resources, bus 2 link: 0
1117 03:32:58.394173 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1118 03:32:58.400660 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1119 03:32:58.407277 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 03:32:58.410824 PCI: 00:14.0 assign_resources, bus 0 link: 0
1121 03:32:58.420318 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1122 03:32:58.423946 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 03:32:58.427521 PCI: 00:14.3 assign_resources, bus 0 link: 0
1124 03:32:58.437499 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1125 03:32:58.443948 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1126 03:32:58.450530 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 03:32:58.453747 PCI: 00:15.0 assign_resources, bus 0 link: 0
1128 03:32:58.463621 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1129 03:32:58.470251 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1130 03:32:58.473575 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 03:32:58.480145 PCI: 00:15.2 assign_resources, bus 0 link: 0
1132 03:32:58.486910 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1133 03:32:58.493517 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 03:32:58.496852 PCI: 00:15.3 assign_resources, bus 0 link: 0
1135 03:32:58.503306 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1136 03:32:58.513673 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1137 03:32:58.517224 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 03:32:58.523476 PCI: 00:19.0 assign_resources, bus 0 link: 0
1139 03:32:58.529918 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1140 03:32:58.540214 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1141 03:32:58.546772 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1142 03:32:58.550350 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 03:32:58.556738 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1144 03:32:58.559882 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 03:32:58.566855 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1146 03:32:58.570448 LPC: Trying to open IO window from 800 size 1ff
1147 03:32:58.579917 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1148 03:32:58.586463 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1149 03:32:58.589950 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 03:32:58.596633 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1151 03:32:58.603563 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1152 03:32:58.610021 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 03:32:58.613349 Root Device assign_resources, bus 0 link: 0
1154 03:32:58.616407 Done setting resources.
1155 03:32:58.622943 Show resources in subtree (Root Device)...After assigning values.
1156 03:32:58.626650 Root Device child on link 0 CPU_CLUSTER: 0
1157 03:32:58.629720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1158 03:32:58.632965 APIC: 00
1159 03:32:58.633282 APIC: 02
1160 03:32:58.635962 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1161 03:32:58.646060 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1162 03:32:58.655865 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1163 03:32:58.659693 PCI: 00:00.0
1164 03:32:58.669623 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1165 03:32:58.676296 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1166 03:32:58.686461 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1167 03:32:58.696026 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1168 03:32:58.706098 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1169 03:32:58.715634 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1170 03:32:58.722934 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1171 03:32:58.732614 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1172 03:32:58.742350 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1173 03:32:58.752495 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1174 03:32:58.762779 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1175 03:32:58.769397 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1176 03:32:58.779029 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1177 03:32:58.789212 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1178 03:32:58.798518 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1179 03:32:58.808675 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1180 03:32:58.818437 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1181 03:32:58.825296 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1182 03:32:58.835357 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1183 03:32:58.838488 PCI: 00:02.0
1184 03:32:58.848342 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1185 03:32:58.858904 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1186 03:32:58.868702 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1187 03:32:58.872279 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 03:32:58.881685 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1189 03:32:58.885086 GENERIC: 0.0
1190 03:32:58.888641 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1191 03:32:58.898302 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1192 03:32:58.901419 GENERIC: 0.0
1193 03:32:58.901662 PCI: 00:08.0
1194 03:32:58.914719 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1195 03:32:58.918312 PCI: 00:14.0 child on link 0 USB0 port 0
1196 03:32:58.928159 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1197 03:32:58.931620 USB0 port 0 child on link 0 USB2 port 0
1198 03:32:58.935090 USB2 port 0
1199 03:32:58.935333 USB2 port 1
1200 03:32:58.938074 USB2 port 2
1201 03:32:58.938218 USB2 port 3
1202 03:32:58.941258 USB2 port 4
1203 03:32:58.945081 USB2 port 5
1204 03:32:58.945227 USB2 port 6
1205 03:32:58.948116 USB2 port 7
1206 03:32:58.948242 USB3 port 0
1207 03:32:58.951444 USB3 port 1
1208 03:32:58.951595 USB3 port 2
1209 03:32:58.954520 USB3 port 3
1210 03:32:58.954651 PCI: 00:14.2
1211 03:32:58.961579 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1212 03:32:58.971735 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1213 03:32:58.972283 GENERIC: 0.0
1214 03:32:58.975255 PCI: 00:14.5
1215 03:32:58.984806 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1216 03:32:58.988217 PCI: 00:15.0 child on link 0 I2C: 00:2c
1217 03:32:58.998025 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1218 03:32:59.005223 I2C: 00:2c
1219 03:32:59.005422 I2C: 00:15
1220 03:32:59.005783 PCI: 00:15.1
1221 03:32:59.014550 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1222 03:32:59.017746 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1223 03:32:59.027747 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1224 03:32:59.030952 GENERIC: 0.0
1225 03:32:59.031147 I2C: 00:15
1226 03:32:59.034221 I2C: 00:10
1227 03:32:59.034363 I2C: 00:10
1228 03:32:59.037459 I2C: 00:2c
1229 03:32:59.037618 I2C: 00:40
1230 03:32:59.040652 I2C: 00:10
1231 03:32:59.040820 I2C: 00:39
1232 03:32:59.044484 PCI: 00:15.3 child on link 0 I2C: 00:36
1233 03:32:59.053948 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1234 03:32:59.057551 I2C: 00:36
1235 03:32:59.057696 I2C: 00:10
1236 03:32:59.060753 I2C: 00:0c
1237 03:32:59.060892 I2C: 00:50
1238 03:32:59.063945 PCI: 00:16.0
1239 03:32:59.073895 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1240 03:32:59.077561 PCI: 00:19.0 child on link 0 I2C: 00:1a
1241 03:32:59.087275 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1242 03:32:59.091061 I2C: 00:1a
1243 03:32:59.091441 I2C: 00:1a
1244 03:32:59.094301 I2C: 00:1a
1245 03:32:59.094682 I2C: 00:28
1246 03:32:59.097558 I2C: 00:29
1247 03:32:59.097940 PCI: 00:19.2
1248 03:32:59.110852 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 03:32:59.120691 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1250 03:32:59.120968 PCI: 00:1a.0
1251 03:32:59.130372 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1252 03:32:59.133672 PCI: 00:1e.0
1253 03:32:59.137088 PCI: 00:1e.2 child on link 0 SPI: 00
1254 03:32:59.146961 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1255 03:32:59.147044 SPI: 00
1256 03:32:59.153581 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1257 03:32:59.160120 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1258 03:32:59.163363 PNP: 0c09.0
1259 03:32:59.170543 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1260 03:32:59.173439 PCI: 00:1f.2
1261 03:32:59.183369 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1262 03:32:59.193819 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1263 03:32:59.196528 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1264 03:32:59.206904 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1265 03:32:59.216937 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1266 03:32:59.219885 GENERIC: 0.0
1267 03:32:59.219966 PCI: 00:1f.5
1268 03:32:59.230291 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1269 03:32:59.233546 Done allocating resources.
1270 03:32:59.240415 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2099 ms
1271 03:32:59.243217 Enabling resources...
1272 03:32:59.246707 PCI: 00:00.0 subsystem <- 8086/4e22
1273 03:32:59.249738 PCI: 00:00.0 cmd <- 06
1274 03:32:59.253084 PCI: 00:02.0 subsystem <- 8086/4e55
1275 03:32:59.256403 PCI: 00:02.0 cmd <- 03
1276 03:32:59.259755 PCI: 00:04.0 subsystem <- 8086/4e03
1277 03:32:59.259837 PCI: 00:04.0 cmd <- 02
1278 03:32:59.262925 PCI: 00:05.0 bridge ctrl <- 0003
1279 03:32:59.269609 PCI: 00:05.0 subsystem <- 8086/4e19
1280 03:32:59.269689 PCI: 00:05.0 cmd <- 02
1281 03:32:59.272884 PCI: 00:08.0 cmd <- 06
1282 03:32:59.276529 PCI: 00:14.0 subsystem <- 8086/4ded
1283 03:32:59.279874 PCI: 00:14.0 cmd <- 02
1284 03:32:59.282877 PCI: 00:14.3 subsystem <- 8086/4df0
1285 03:32:59.286578 PCI: 00:14.3 cmd <- 02
1286 03:32:59.289566 PCI: 00:14.5 subsystem <- 8086/4df8
1287 03:32:59.293524 PCI: 00:14.5 cmd <- 06
1288 03:32:59.296211 PCI: 00:15.0 subsystem <- 8086/4de8
1289 03:32:59.296292 PCI: 00:15.0 cmd <- 02
1290 03:32:59.303223 PCI: 00:15.1 subsystem <- 8086/4de9
1291 03:32:59.303319 PCI: 00:15.1 cmd <- 02
1292 03:32:59.306498 PCI: 00:15.2 subsystem <- 8086/4dea
1293 03:32:59.309652 PCI: 00:15.2 cmd <- 02
1294 03:32:59.312931 PCI: 00:15.3 subsystem <- 8086/4deb
1295 03:32:59.316087 PCI: 00:15.3 cmd <- 02
1296 03:32:59.319413 PCI: 00:16.0 subsystem <- 8086/4de0
1297 03:32:59.322683 PCI: 00:16.0 cmd <- 02
1298 03:32:59.326845 PCI: 00:19.0 subsystem <- 8086/4dc5
1299 03:32:59.329588 PCI: 00:19.0 cmd <- 02
1300 03:32:59.333158 PCI: 00:19.2 subsystem <- 8086/4dc7
1301 03:32:59.333269 PCI: 00:19.2 cmd <- 06
1302 03:32:59.339443 PCI: 00:1a.0 subsystem <- 8086/4dc4
1303 03:32:59.339524 PCI: 00:1a.0 cmd <- 06
1304 03:32:59.342994 PCI: 00:1e.2 subsystem <- 8086/4daa
1305 03:32:59.346539 PCI: 00:1e.2 cmd <- 06
1306 03:32:59.349741 PCI: 00:1f.0 subsystem <- 8086/4d87
1307 03:32:59.353046 PCI: 00:1f.0 cmd <- 407
1308 03:32:59.356121 PCI: 00:1f.3 subsystem <- 8086/4dc8
1309 03:32:59.359864 PCI: 00:1f.3 cmd <- 02
1310 03:32:59.362823 PCI: 00:1f.5 subsystem <- 8086/4da4
1311 03:32:59.366168 PCI: 00:1f.5 cmd <- 406
1312 03:32:59.369419 done.
1313 03:32:59.373034 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1314 03:32:59.376094 Initializing devices...
1315 03:32:59.379373 Root Device init
1316 03:32:59.379453 mainboard: EC init
1317 03:32:59.386383 Chrome EC: Set SMI mask to 0x0000000000000000
1318 03:32:59.389609 Chrome EC: clear events_b mask to 0x0000000000000000
1319 03:32:59.396378 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1320 03:32:59.402871 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1321 03:32:59.409830 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1322 03:32:59.413404 Chrome EC: Set WAKE mask to 0x0000000000000000
1323 03:32:59.416397 Root Device init finished in 35 msecs
1324 03:32:59.420747 PCI: 00:00.0 init
1325 03:32:59.423872 CPU TDP = 6 Watts
1326 03:32:59.424550 CPU PL1 = 7 Watts
1327 03:32:59.427254 CPU PL2 = 12 Watts
1328 03:32:59.430885 PCI: 00:00.0 init finished in 6 msecs
1329 03:32:59.434023 PCI: 00:02.0 init
1330 03:32:59.434531 GMA: Found VBT in CBFS
1331 03:32:59.437484 GMA: Found valid VBT in CBFS
1332 03:32:59.443840 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1333 03:32:59.450366 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1334 03:32:59.456589 PCI: 00:02.0 init finished in 18 msecs
1335 03:32:59.456672 PCI: 00:08.0 init
1336 03:32:59.460591 PCI: 00:08.0 init finished in 0 msecs
1337 03:32:59.463981 PCI: 00:14.0 init
1338 03:32:59.466960 XHCI: Updated LFPS sampling OFF time to 9 ms
1339 03:32:59.474357 PCI: 00:14.0 init finished in 4 msecs
1340 03:32:59.474791 PCI: 00:15.0 init
1341 03:32:59.477341 I2C bus 0 version 0x3230302a
1342 03:32:59.480502 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1343 03:32:59.487400 PCI: 00:15.0 init finished in 6 msecs
1344 03:32:59.487863 PCI: 00:15.1 init
1345 03:32:59.490647 I2C bus 1 version 0x3230302a
1346 03:32:59.494262 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1347 03:32:59.497129 PCI: 00:15.1 init finished in 6 msecs
1348 03:32:59.500327 PCI: 00:15.2 init
1349 03:32:59.503987 I2C bus 2 version 0x3230302a
1350 03:32:59.507196 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1351 03:32:59.510453 PCI: 00:15.2 init finished in 6 msecs
1352 03:32:59.514095 PCI: 00:15.3 init
1353 03:32:59.517256 I2C bus 3 version 0x3230302a
1354 03:32:59.520332 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1355 03:32:59.523767 PCI: 00:15.3 init finished in 6 msecs
1356 03:32:59.523946 PCI: 00:16.0 init
1357 03:32:59.530357 PCI: 00:16.0 init finished in 0 msecs
1358 03:32:59.530516 PCI: 00:19.0 init
1359 03:32:59.533419 I2C bus 4 version 0x3230302a
1360 03:32:59.537044 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1361 03:32:59.539949 PCI: 00:19.0 init finished in 6 msecs
1362 03:32:59.543686 PCI: 00:1a.0 init
1363 03:32:59.547172 PCI: 00:1a.0 init finished in 0 msecs
1364 03:32:59.550195 PCI: 00:1f.0 init
1365 03:32:59.553519 IOAPIC: Initializing IOAPIC at 0xfec00000
1366 03:32:59.560041 IOAPIC: Bootstrap Processor Local APIC = 0x00
1367 03:32:59.560143 IOAPIC: ID = 0x02
1368 03:32:59.563435 IOAPIC: Dumping registers
1369 03:32:59.567066 reg 0x0000: 0x02000000
1370 03:32:59.570182 reg 0x0001: 0x00770020
1371 03:32:59.570255 reg 0x0002: 0x00000000
1372 03:32:59.577174 PCI: 00:1f.0 init finished in 21 msecs
1373 03:32:59.577255 PCI: 00:1f.2 init
1374 03:32:59.580301 Disabling ACPI via APMC.
1375 03:32:59.583694 APMC done.
1376 03:32:59.586807 PCI: 00:1f.2 init finished in 5 msecs
1377 03:32:59.597842 PNP: 0c09.0 init
1378 03:32:59.601136 Google Chrome EC uptime: 6.537 seconds
1379 03:32:59.608329 Google Chrome AP resets since EC boot: 0
1380 03:32:59.611753 Google Chrome most recent AP reset causes:
1381 03:32:59.617849 Google Chrome EC reset flags at last EC boot: reset-pin
1382 03:32:59.621741 PNP: 0c09.0 init finished in 18 msecs
1383 03:32:59.621912 Devices initialized
1384 03:32:59.624510 Show all devs... After init.
1385 03:32:59.628228 Root Device: enabled 1
1386 03:32:59.631346 CPU_CLUSTER: 0: enabled 1
1387 03:32:59.634405 DOMAIN: 0000: enabled 1
1388 03:32:59.634527 PCI: 00:00.0: enabled 1
1389 03:32:59.637801 PCI: 00:02.0: enabled 1
1390 03:32:59.641693 PCI: 00:04.0: enabled 1
1391 03:32:59.641802 PCI: 00:05.0: enabled 1
1392 03:32:59.644500 PCI: 00:09.0: enabled 0
1393 03:32:59.648113 PCI: 00:12.6: enabled 0
1394 03:32:59.651780 PCI: 00:14.0: enabled 1
1395 03:32:59.651872 PCI: 00:14.1: enabled 0
1396 03:32:59.654448 PCI: 00:14.2: enabled 0
1397 03:32:59.658079 PCI: 00:14.3: enabled 1
1398 03:32:59.661594 PCI: 00:14.5: enabled 1
1399 03:32:59.661676 PCI: 00:15.0: enabled 1
1400 03:32:59.664938 PCI: 00:15.1: enabled 1
1401 03:32:59.668031 PCI: 00:15.2: enabled 1
1402 03:32:59.668176 PCI: 00:15.3: enabled 1
1403 03:32:59.671358 PCI: 00:16.0: enabled 1
1404 03:32:59.674719 PCI: 00:16.1: enabled 0
1405 03:32:59.678124 PCI: 00:16.4: enabled 0
1406 03:32:59.678211 PCI: 00:16.5: enabled 0
1407 03:32:59.681092 PCI: 00:17.0: enabled 0
1408 03:32:59.684706 PCI: 00:19.0: enabled 1
1409 03:32:59.687837 PCI: 00:19.1: enabled 0
1410 03:32:59.687923 PCI: 00:19.2: enabled 1
1411 03:32:59.691512 PCI: 00:1a.0: enabled 1
1412 03:32:59.694591 PCI: 00:1c.0: enabled 0
1413 03:32:59.698076 PCI: 00:1c.1: enabled 0
1414 03:32:59.698187 PCI: 00:1c.2: enabled 0
1415 03:32:59.701144 PCI: 00:1c.3: enabled 0
1416 03:32:59.704325 PCI: 00:1c.4: enabled 0
1417 03:32:59.704436 PCI: 00:1c.5: enabled 0
1418 03:32:59.707920 PCI: 00:1c.6: enabled 0
1419 03:32:59.711309 PCI: 00:1c.7: enabled 1
1420 03:32:59.714721 PCI: 00:1e.0: enabled 0
1421 03:32:59.714856 PCI: 00:1e.1: enabled 0
1422 03:32:59.718265 PCI: 00:1e.2: enabled 1
1423 03:32:59.721464 PCI: 00:1e.3: enabled 0
1424 03:32:59.724439 PCI: 00:1f.0: enabled 1
1425 03:32:59.724590 PCI: 00:1f.1: enabled 0
1426 03:32:59.728072 PCI: 00:1f.2: enabled 1
1427 03:32:59.731158 PCI: 00:1f.3: enabled 1
1428 03:32:59.731330 PCI: 00:1f.4: enabled 0
1429 03:32:59.734811 PCI: 00:1f.5: enabled 1
1430 03:32:59.737706 PCI: 00:1f.7: enabled 0
1431 03:32:59.741321 GENERIC: 0.0: enabled 1
1432 03:32:59.741494 GENERIC: 0.0: enabled 1
1433 03:32:59.744576 USB0 port 0: enabled 1
1434 03:32:59.747761 GENERIC: 0.0: enabled 1
1435 03:32:59.750930 I2C: 00:2c: enabled 1
1436 03:32:59.751101 I2C: 00:15: enabled 1
1437 03:32:59.754453 GENERIC: 0.0: enabled 0
1438 03:32:59.758041 I2C: 00:15: enabled 1
1439 03:32:59.758213 I2C: 00:10: enabled 0
1440 03:32:59.760773 I2C: 00:10: enabled 0
1441 03:32:59.764207 I2C: 00:2c: enabled 1
1442 03:32:59.764378 I2C: 00:40: enabled 1
1443 03:32:59.767625 I2C: 00:10: enabled 1
1444 03:32:59.770919 I2C: 00:39: enabled 1
1445 03:32:59.771090 I2C: 00:36: enabled 1
1446 03:32:59.774716 I2C: 00:10: enabled 0
1447 03:32:59.777605 I2C: 00:0c: enabled 1
1448 03:32:59.777777 I2C: 00:50: enabled 1
1449 03:32:59.781346 I2C: 00:1a: enabled 1
1450 03:32:59.784030 I2C: 00:1a: enabled 0
1451 03:32:59.784244 I2C: 00:1a: enabled 0
1452 03:32:59.787496 I2C: 00:28: enabled 1
1453 03:32:59.791010 I2C: 00:29: enabled 1
1454 03:32:59.791182 PCI: 00:00.0: enabled 1
1455 03:32:59.794177 SPI: 00: enabled 1
1456 03:32:59.797465 PNP: 0c09.0: enabled 1
1457 03:32:59.800804 GENERIC: 0.0: enabled 0
1458 03:32:59.800986 USB2 port 0: enabled 1
1459 03:32:59.804588 USB2 port 1: enabled 1
1460 03:32:59.807410 USB2 port 2: enabled 1
1461 03:32:59.807636 USB2 port 3: enabled 1
1462 03:32:59.810950 USB2 port 4: enabled 0
1463 03:32:59.814789 USB2 port 5: enabled 1
1464 03:32:59.815210 USB2 port 6: enabled 0
1465 03:32:59.817684 USB2 port 7: enabled 1
1466 03:32:59.820751 USB3 port 0: enabled 1
1467 03:32:59.824401 USB3 port 1: enabled 1
1468 03:32:59.824817 USB3 port 2: enabled 1
1469 03:32:59.827648 USB3 port 3: enabled 1
1470 03:32:59.831025 APIC: 00: enabled 1
1471 03:32:59.831446 APIC: 02: enabled 1
1472 03:32:59.834515 PCI: 00:08.0: enabled 1
1473 03:32:59.840697 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1474 03:32:59.843835 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1475 03:32:59.846844 ELOG: NV offset 0xbfa000 size 0x1000
1476 03:32:59.854637 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1477 03:32:59.861093 ELOG: Event(17) added with size 13 at 2024-02-07 03:32:59 UTC
1478 03:32:59.867680 ELOG: Event(92) added with size 9 at 2024-02-07 03:32:59 UTC
1479 03:32:59.874305 ELOG: Event(93) added with size 9 at 2024-02-07 03:32:59 UTC
1480 03:32:59.881249 ELOG: Event(9E) added with size 10 at 2024-02-07 03:32:59 UTC
1481 03:32:59.887649 ELOG: Event(9F) added with size 14 at 2024-02-07 03:32:59 UTC
1482 03:32:59.891312 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1483 03:32:59.897928 ELOG: Event(A1) added with size 10 at 2024-02-07 03:32:59 UTC
1484 03:32:59.907828 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1485 03:32:59.911189 ELOG: Event(A0) added with size 9 at 2024-02-07 03:32:59 UTC
1486 03:32:59.917864 elog_add_boot_reason: Logged dev mode boot
1487 03:32:59.924433 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1488 03:32:59.924627 Finalize devices...
1489 03:32:59.927773 Devices finalized
1490 03:32:59.931396 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1491 03:32:59.938054 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1492 03:32:59.944496 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1493 03:32:59.948148 ME: HFSTS1 : 0x80030045
1494 03:32:59.951422 ME: HFSTS2 : 0x30280136
1495 03:32:59.954575 ME: HFSTS3 : 0x00000050
1496 03:32:59.961240 ME: HFSTS4 : 0x00004000
1497 03:32:59.964593 ME: HFSTS5 : 0x00000000
1498 03:32:59.967721 ME: HFSTS6 : 0x40400006
1499 03:32:59.971089 ME: Manufacturing Mode : NO
1500 03:32:59.974351 ME: FW Partition Table : OK
1501 03:32:59.977831 ME: Bringup Loader Failure : NO
1502 03:32:59.980982 ME: Firmware Init Complete : NO
1503 03:32:59.984674 ME: Boot Options Present : NO
1504 03:32:59.987657 ME: Update In Progress : NO
1505 03:32:59.991124 ME: D0i3 Support : YES
1506 03:32:59.994700 ME: Low Power State Enabled : NO
1507 03:32:59.997800 ME: CPU Replaced : YES
1508 03:33:00.000873 ME: CPU Replacement Valid : YES
1509 03:33:00.004569 ME: Current Working State : 5
1510 03:33:00.007641 ME: Current Operation State : 1
1511 03:33:00.011134 ME: Current Operation Mode : 3
1512 03:33:00.014145 ME: Error Code : 0
1513 03:33:00.017800 ME: CPU Debug Disabled : YES
1514 03:33:00.020972 ME: TXT Support : NO
1515 03:33:00.027502 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1516 03:33:00.030983 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1517 03:33:00.037761 ACPI: Writing ACPI tables at 76b27000.
1518 03:33:00.037857 ACPI: * FACS
1519 03:33:00.040912 ACPI: * DSDT
1520 03:33:00.044403 Ramoops buffer: 0x100000@0x76a26000.
1521 03:33:00.048186 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1522 03:33:00.054555 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1523 03:33:00.057862 Google Chrome EC: version:
1524 03:33:00.061288 ro: magolor_1.1.9999-103b6f9
1525 03:33:00.061375 rw: magolor_1.1.9999-103b6f9
1526 03:33:00.064374 running image: 1
1527 03:33:00.071194 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1528 03:33:00.074369 ACPI: * FADT
1529 03:33:00.074450 SCI is IRQ9
1530 03:33:00.078062 ACPI: added table 1/32, length now 40
1531 03:33:00.081430 ACPI: * SSDT
1532 03:33:00.084861 Found 1 CPU(s) with 2 core(s) each.
1533 03:33:00.088165 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1534 03:33:00.094565 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1535 03:33:00.098093 Could not locate 'wifi_sar' in VPD.
1536 03:33:00.101335 Checking CBFS for default SAR values
1537 03:33:00.108335 wifi_sar_defaults.hex has bad len in CBFS
1538 03:33:00.111471 failed from getting SAR limits!
1539 03:33:00.114833 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1540 03:33:00.117740 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1541 03:33:00.124768 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1542 03:33:00.127487 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1543 03:33:00.134437 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1544 03:33:00.137839 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1545 03:33:00.144331 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1546 03:33:00.151104 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1547 03:33:00.157608 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1548 03:33:00.161177 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1549 03:33:00.167590 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1550 03:33:00.174086 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1551 03:33:00.177681 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1552 03:33:00.184889 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1553 03:33:00.187714 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1554 03:33:00.194957 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1555 03:33:00.198076 PS2K: Passing 101 keymaps to kernel
1556 03:33:00.204775 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1557 03:33:00.211471 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1558 03:33:00.214532 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1559 03:33:00.220929 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1560 03:33:00.227844 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1561 03:33:00.231297 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1562 03:33:00.237803 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1563 03:33:00.245041 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1564 03:33:00.248333 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1565 03:33:00.254415 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1566 03:33:00.258089 ACPI: added table 2/32, length now 44
1567 03:33:00.261336 ACPI: * MCFG
1568 03:33:00.264485 ACPI: added table 3/32, length now 48
1569 03:33:00.265036 ACPI: * TPM2
1570 03:33:00.267764 TPM2 log created at 0x76a16000
1571 03:33:00.271215 ACPI: added table 4/32, length now 52
1572 03:33:00.274356 ACPI: * MADT
1573 03:33:00.274753 SCI is IRQ9
1574 03:33:00.277590 ACPI: added table 5/32, length now 56
1575 03:33:00.280977 current = 76b2d580
1576 03:33:00.281157 ACPI: * DMAR
1577 03:33:00.287935 ACPI: added table 6/32, length now 60
1578 03:33:00.291031 ACPI: added table 7/32, length now 64
1579 03:33:00.291180 ACPI: * HPET
1580 03:33:00.294155 ACPI: added table 8/32, length now 68
1581 03:33:00.297432 ACPI: done.
1582 03:33:00.300738 ACPI tables: 26304 bytes.
1583 03:33:00.304165 smbios_write_tables: 76a15000
1584 03:33:00.307672 EC returned error result code 3
1585 03:33:00.310679 Couldn't obtain OEM name from CBI
1586 03:33:00.310829 Create SMBIOS type 16
1587 03:33:00.314145 Create SMBIOS type 17
1588 03:33:00.317874 GENERIC: 0.0 (WIFI Device)
1589 03:33:00.320835 SMBIOS tables: 913 bytes.
1590 03:33:00.324516 Writing table forward entry at 0x00000500
1591 03:33:00.330751 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1592 03:33:00.334149 Writing coreboot table at 0x76b4b000
1593 03:33:00.340612 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1594 03:33:00.344176 1. 0000000000001000-000000000009ffff: RAM
1595 03:33:00.350621 2. 00000000000a0000-00000000000fffff: RESERVED
1596 03:33:00.354175 3. 0000000000100000-0000000076a14fff: RAM
1597 03:33:00.360775 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1598 03:33:00.363972 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1599 03:33:00.370743 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1600 03:33:00.373838 7. 0000000077000000-000000007fbfffff: RESERVED
1601 03:33:00.380950 8. 00000000c0000000-00000000cfffffff: RESERVED
1602 03:33:00.383753 9. 00000000fb000000-00000000fb000fff: RESERVED
1603 03:33:00.390497 10. 00000000fe000000-00000000fe00ffff: RESERVED
1604 03:33:00.393728 11. 00000000fea80000-00000000fea87fff: RESERVED
1605 03:33:00.396885 12. 00000000fed80000-00000000fed87fff: RESERVED
1606 03:33:00.404070 13. 00000000fed90000-00000000fed92fff: RESERVED
1607 03:33:00.407206 14. 00000000feda0000-00000000feda1fff: RESERVED
1608 03:33:00.413416 15. 0000000100000000-00000001803fffff: RAM
1609 03:33:00.413592 Passing 4 GPIOs to payload:
1610 03:33:00.420313 NAME | PORT | POLARITY | VALUE
1611 03:33:00.426792 lid | undefined | high | high
1612 03:33:00.430205 power | undefined | high | low
1613 03:33:00.437083 oprom | undefined | high | low
1614 03:33:00.440045 EC in RW | 0x000000b9 | high | low
1615 03:33:00.447007 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 41a8
1616 03:33:00.450407 coreboot table: 1504 bytes.
1617 03:33:00.453702 IMD ROOT 0. 0x76fff000 0x00001000
1618 03:33:00.456857 IMD SMALL 1. 0x76ffe000 0x00001000
1619 03:33:00.460382 FSP MEMORY 2. 0x76c4e000 0x003b0000
1620 03:33:00.467710 CONSOLE 3. 0x76c2e000 0x00020000
1621 03:33:00.470781 FMAP 4. 0x76c2d000 0x00000578
1622 03:33:00.474093 TIME STAMP 5. 0x76c2c000 0x00000910
1623 03:33:00.477059 VBOOT WORK 6. 0x76c18000 0x00014000
1624 03:33:00.480862 ROMSTG STCK 7. 0x76c17000 0x00001000
1625 03:33:00.484509 AFTER CAR 8. 0x76c0d000 0x0000a000
1626 03:33:00.486958 RAMSTAGE 9. 0x76ba7000 0x00066000
1627 03:33:00.490549 REFCODE 10. 0x76b67000 0x00040000
1628 03:33:00.497479 SMM BACKUP 11. 0x76b57000 0x00010000
1629 03:33:00.500267 4f444749 12. 0x76b55000 0x00002000
1630 03:33:00.503765 EXT VBT13. 0x76b53000 0x00001c43
1631 03:33:00.506944 COREBOOT 14. 0x76b4b000 0x00008000
1632 03:33:00.510211 ACPI 15. 0x76b27000 0x00024000
1633 03:33:00.513764 ACPI GNVS 16. 0x76b26000 0x00001000
1634 03:33:00.517174 RAMOOPS 17. 0x76a26000 0x00100000
1635 03:33:00.520343 TPM2 TCGLOG18. 0x76a16000 0x00010000
1636 03:33:00.523866 SMBIOS 19. 0x76a15000 0x00000800
1637 03:33:00.526795 IMD small region:
1638 03:33:00.530157 IMD ROOT 0. 0x76ffec00 0x00000400
1639 03:33:00.533625 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1640 03:33:00.536902 VPD 2. 0x76ffeb60 0x0000006c
1641 03:33:00.543554 POWER STATE 3. 0x76ffeb20 0x00000040
1642 03:33:00.547112 ROMSTAGE 4. 0x76ffeb00 0x00000004
1643 03:33:00.550135 MEM INFO 5. 0x76ffe920 0x000001e0
1644 03:33:00.556871 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1645 03:33:00.559964 MTRR: Physical address space:
1646 03:33:00.566895 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1647 03:33:00.570092 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1648 03:33:00.577283 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1649 03:33:00.583312 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1650 03:33:00.590211 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1651 03:33:00.596628 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1652 03:33:00.603280 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1653 03:33:00.606342 MTRR: Fixed MSR 0x250 0x0606060606060606
1654 03:33:00.609683 MTRR: Fixed MSR 0x258 0x0606060606060606
1655 03:33:00.613186 MTRR: Fixed MSR 0x259 0x0000000000000000
1656 03:33:00.619588 MTRR: Fixed MSR 0x268 0x0606060606060606
1657 03:33:00.623347 MTRR: Fixed MSR 0x269 0x0606060606060606
1658 03:33:00.626325 MTRR: Fixed MSR 0x26a 0x0606060606060606
1659 03:33:00.629641 MTRR: Fixed MSR 0x26b 0x0606060606060606
1660 03:33:00.636559 MTRR: Fixed MSR 0x26c 0x0606060606060606
1661 03:33:00.639457 MTRR: Fixed MSR 0x26d 0x0606060606060606
1662 03:33:00.642952 MTRR: Fixed MSR 0x26e 0x0606060606060606
1663 03:33:00.646554 MTRR: Fixed MSR 0x26f 0x0606060606060606
1664 03:33:00.649576 call enable_fixed_mtrr()
1665 03:33:00.652884 CPU physical address size: 39 bits
1666 03:33:00.659998 MTRR: default type WB/UC MTRR counts: 6/5.
1667 03:33:00.663107 MTRR: UC selected as default type.
1668 03:33:00.669423 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1669 03:33:00.673071 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1670 03:33:00.679890 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1671 03:33:00.686495 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1672 03:33:00.692859 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1673 03:33:00.693280
1674 03:33:00.696134 MTRR check
1675 03:33:00.696718 Fixed MTRRs : Enabled
1676 03:33:00.699357 Variable MTRRs: Enabled
1677 03:33:00.699936
1678 03:33:00.703005 MTRR: Fixed MSR 0x250 0x0606060606060606
1679 03:33:00.709646 MTRR: Fixed MSR 0x258 0x0606060606060606
1680 03:33:00.712907 MTRR: Fixed MSR 0x259 0x0000000000000000
1681 03:33:00.716257 MTRR: Fixed MSR 0x268 0x0606060606060606
1682 03:33:00.720263 MTRR: Fixed MSR 0x269 0x0606060606060606
1683 03:33:00.723044 MTRR: Fixed MSR 0x26a 0x0606060606060606
1684 03:33:00.729702 MTRR: Fixed MSR 0x26b 0x0606060606060606
1685 03:33:00.732865 MTRR: Fixed MSR 0x26c 0x0606060606060606
1686 03:33:00.736252 MTRR: Fixed MSR 0x26d 0x0606060606060606
1687 03:33:00.739252 MTRR: Fixed MSR 0x26e 0x0606060606060606
1688 03:33:00.746386 MTRR: Fixed MSR 0x26f 0x0606060606060606
1689 03:33:00.749347 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1690 03:33:00.752609 call enable_fixed_mtrr()
1691 03:33:00.757254 Checking cr50 for pending updates
1692 03:33:00.760703 CPU physical address size: 39 bits
1693 03:33:00.763992 Reading cr50 TPM mode
1694 03:33:00.774005 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1695 03:33:00.780970 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1696 03:33:00.784402 Checking segment from ROM address 0xfff9d5b8
1697 03:33:00.791207 Checking segment from ROM address 0xfff9d5d4
1698 03:33:00.794342 Loading segment from ROM address 0xfff9d5b8
1699 03:33:00.797535 code (compression=0)
1700 03:33:00.804173 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1701 03:33:00.814184 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1702 03:33:00.817616 it's not compressed!
1703 03:33:00.942617 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1704 03:33:00.949626 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1705 03:33:00.957305 Loading segment from ROM address 0xfff9d5d4
1706 03:33:00.960197 Entry Point 0x30000000
1707 03:33:00.960721 Loaded segments
1708 03:33:00.966817 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1709 03:33:00.983053 Finalizing chipset.
1710 03:33:00.986141 Finalizing SMM.
1711 03:33:00.986620 APMC done.
1712 03:33:00.992534 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1713 03:33:00.996241 mp_park_aps done after 0 msecs.
1714 03:33:00.999771 Jumping to boot code at 0x30000000(0x76b4b000)
1715 03:33:01.009504 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1716 03:33:01.009927
1717 03:33:01.010239
1718 03:33:01.010530
1719 03:33:01.012743 Starting depthcharge on Magolor...
1720 03:33:01.013280
1721 03:33:01.014269 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1722 03:33:01.014719 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1723 03:33:01.015088 Setting prompt string to ['dedede:']
1724 03:33:01.015445 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1725 03:33:01.022687 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1726 03:33:01.023126
1727 03:33:01.029216 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1728 03:33:01.029829
1729 03:33:01.032680 fw_config match found: AUDIO_AMP=UNPROVISIONED
1730 03:33:01.033196
1731 03:33:01.035579 Wipe memory regions:
1732 03:33:01.035886
1733 03:33:01.039354 [0x00000000001000, 0x000000000a0000)
1734 03:33:01.039660
1735 03:33:01.042416 [0x00000000100000, 0x00000030000000)
1736 03:33:01.171373
1737 03:33:01.174779 [0x00000031062170, 0x00000076a15000)
1738 03:33:01.343501
1739 03:33:01.346768 [0x00000100000000, 0x00000180400000)
1740 03:33:02.409573
1741 03:33:02.409711 R8152: Initializing
1742 03:33:02.409779
1743 03:33:02.413022 Version 6 (ocp_data = 5c30)
1744 03:33:02.416587
1745 03:33:02.416669 R8152: Done initializing
1746 03:33:02.416734
1747 03:33:02.419457 Adding net device
1748 03:33:02.419539
1749 03:33:02.423179 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1750 03:33:02.426425
1751 03:33:02.426506
1752 03:33:02.426570
1753 03:33:02.426856 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1755 03:33:02.527199 dedede: tftpboot 192.168.201.1 12711071/tftp-deploy-xljxrie4/kernel/bzImage 12711071/tftp-deploy-xljxrie4/kernel/cmdline 12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
1756 03:33:02.527352 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1757 03:33:02.527433 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1758 03:33:02.531945 tftpboot 192.168.201.1 12711071/tftp-deploy-xljxrie4/kernel/bzIploy-xljxrie4/kernel/cmdline 12711071/tftp-deploy-xljxrie4/ramdisk/ramdisk.cpio.gz
1759 03:33:02.532032
1760 03:33:02.532144 Waiting for link
1761 03:33:02.733534
1762 03:33:02.733676 done.
1763 03:33:02.733743
1764 03:33:02.733804 MAC: 00:24:32:30:7a:67
1765 03:33:02.733861
1766 03:33:02.736712 Sending DHCP discover... done.
1767 03:33:02.736815
1768 03:33:02.740271 Waiting for reply... done.
1769 03:33:02.740356
1770 03:33:02.745175 Sending DHCP request... done.
1771 03:33:02.745264
1772 03:33:02.750404 Waiting for reply... done.
1773 03:33:02.750490
1774 03:33:02.750577 My ip is 192.168.201.15
1775 03:33:02.750659
1776 03:33:02.754021 The DHCP server ip is 192.168.201.1
1777 03:33:02.757153
1778 03:33:02.760442 TFTP server IP predefined by user: 192.168.201.1
1779 03:33:02.760526
1780 03:33:02.767023 Bootfile predefined by user: 12711071/tftp-deploy-xljxrie4/kernel/bzImage
1781 03:33:02.767107
1782 03:33:02.770320 Sending tftp read request... done.
1783 03:33:02.770408
1784 03:33:02.773316 Waiting for the transfer...
1785 03:33:02.776812
1786 03:33:03.355920 00000000 ################################################################
1787 03:33:03.356062
1788 03:33:03.919515 00080000 ################################################################
1789 03:33:03.919649
1790 03:33:04.481293 00100000 ################################################################
1791 03:33:04.481431
1792 03:33:05.034568 00180000 ################################################################
1793 03:33:05.034740
1794 03:33:05.579126 00200000 ################################################################
1795 03:33:05.579261
1796 03:33:06.130835 00280000 ################################################################
1797 03:33:06.130973
1798 03:33:06.686009 00300000 ################################################################
1799 03:33:06.686148
1800 03:33:07.236004 00380000 ################################################################
1801 03:33:07.236186
1802 03:33:07.777215 00400000 ################################################################
1803 03:33:07.777351
1804 03:33:08.327427 00480000 ################################################################
1805 03:33:08.327568
1806 03:33:08.884118 00500000 ################################################################
1807 03:33:08.884257
1808 03:33:09.445177 00580000 ################################################################
1809 03:33:09.445310
1810 03:33:09.996026 00600000 ################################################################
1811 03:33:09.996200
1812 03:33:10.535364 00680000 ################################################################
1813 03:33:10.535516
1814 03:33:11.074221 00700000 ################################################################
1815 03:33:11.074354
1816 03:33:11.603224 00780000 ################################################################
1817 03:33:11.603434
1818 03:33:11.804384 00800000 ####################### done.
1819 03:33:11.804522
1820 03:33:11.807940 The bootfile was 8576912 bytes long.
1821 03:33:11.808040
1822 03:33:11.811183 Sending tftp read request... done.
1823 03:33:11.811265
1824 03:33:11.814410 Waiting for the transfer...
1825 03:33:11.814493
1826 03:33:12.400307 00000000 ################################################################
1827 03:33:12.400452
1828 03:33:13.002101 00080000 ################################################################
1829 03:33:13.002253
1830 03:33:13.556868 00100000 ################################################################
1831 03:33:13.557012
1832 03:33:14.155832 00180000 ################################################################
1833 03:33:14.156004
1834 03:33:14.740083 00200000 ################################################################
1835 03:33:14.740240
1836 03:33:15.293961 00280000 ################################################################
1837 03:33:15.294103
1838 03:33:15.832767 00300000 ################################################################
1839 03:33:15.832911
1840 03:33:16.379377 00380000 ################################################################
1841 03:33:16.379523
1842 03:33:16.916021 00400000 ################################################################
1843 03:33:16.916170
1844 03:33:17.465471 00480000 ################################################################
1845 03:33:17.465617
1846 03:33:18.023437 00500000 ################################################################
1847 03:33:18.023586
1848 03:33:18.566924 00580000 ################################################################
1849 03:33:18.567074
1850 03:33:19.092521 00600000 ################################################################
1851 03:33:19.092677
1852 03:33:19.621300 00680000 ################################################################
1853 03:33:19.621462
1854 03:33:20.141410 00700000 ################################################################
1855 03:33:20.141567
1856 03:33:20.683101 00780000 ################################################################
1857 03:33:20.683246
1858 03:33:21.131504 00800000 #################################################### done.
1859 03:33:21.131653
1860 03:33:21.134714 Sending tftp read request... done.
1861 03:33:21.134795
1862 03:33:21.138512 Waiting for the transfer...
1863 03:33:21.138590
1864 03:33:21.138690 00000000 # done.
1865 03:33:21.138792
1866 03:33:21.148299 Command line loaded dynamically from TFTP file: 12711071/tftp-deploy-xljxrie4/kernel/cmdline
1867 03:33:21.148383
1868 03:33:21.164730 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1869 03:33:21.164821
1870 03:33:21.167814 ec_init: CrosEC protocol v3 supported (256, 256)
1871 03:33:21.174704
1872 03:33:21.177893 Shutting down all USB controllers.
1873 03:33:21.178006
1874 03:33:21.178112 Removing current net device
1875 03:33:21.178212
1876 03:33:21.181761 Finalizing coreboot
1877 03:33:21.181840
1878 03:33:21.187850 Exiting depthcharge with code 4 at timestamp: 26985880
1879 03:33:21.187928
1880 03:33:21.188028
1881 03:33:21.188144 Starting kernel ...
1882 03:33:21.188223
1883 03:33:21.188302
1884 03:33:21.188688 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
1885 03:33:21.188796 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
1886 03:33:21.188887 Setting prompt string to ['Linux version [0-9]']
1887 03:33:21.188993 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1888 03:33:21.189101 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1890 03:37:48.189169 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
1892 03:37:48.189428 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
1894 03:37:48.189683 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1897 03:37:48.190080 end: 2 depthcharge-action (duration 00:05:00) [common]
1899 03:37:48.190390 Cleaning after the job
1900 03:37:48.190494 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/ramdisk
1901 03:37:48.191947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/kernel
1902 03:37:48.193591 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711071/tftp-deploy-xljxrie4/modules
1903 03:37:48.194112 start: 5.1 power-off (timeout 00:00:30) [common]
1904 03:37:48.194363 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-1' '--port=1' '--command=off'
1905 03:37:48.277442 >> Command sent successfully.
1906 03:37:48.289425 Returned 0 in 0 seconds
1907 03:37:48.390868 end: 5.1 power-off (duration 00:00:00) [common]
1909 03:37:48.392469 start: 5.2 read-feedback (timeout 00:10:00) [common]
1910 03:37:48.393873 Listened to connection for namespace 'common' for up to 1s
1912 03:37:48.395246 Listened to connection for namespace 'common' for up to 1s
1913 03:37:49.394439 Finalising connection for namespace 'common'
1914 03:37:49.395124 Disconnecting from shell: Finalise
1915 03:37:49.395530
1916 03:37:49.496318 end: 5.2 read-feedback (duration 00:00:01) [common]
1917 03:37:49.496522 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12711071
1918 03:37:49.515804 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12711071
1919 03:37:49.516001 JobError: Your job cannot terminate cleanly.