Boot log: asus-C436FA-Flip-hatch
- Kernel Warnings: 0
- Warnings: 0
- Boot result: FAIL
- Kernel Errors: 0
- Errors: 2
1 03:35:37.774171 lava-dispatcher, installed at version: 2024.01
2 03:35:37.774398 start: 0 validate
3 03:35:37.774529 Start time: 2024-02-07 03:35:37.774522+00:00 (UTC)
4 03:35:37.774659 Using caching service: 'http://localhost/cache/?uri=%s'
5 03:35:37.774792 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 03:35:38.042016 Using caching service: 'http://localhost/cache/?uri=%s'
7 03:35:38.042178 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-1250-g39ff255b75f5%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 03:35:38.298920 Using caching service: 'http://localhost/cache/?uri=%s'
9 03:35:38.299090 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-1250-g39ff255b75f5%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 03:35:38.558399 validate duration: 0.78
12 03:35:38.558678 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 03:35:38.558789 start: 1.1 download-retry (timeout 00:10:00) [common]
14 03:35:38.558897 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 03:35:38.559023 Not decompressing ramdisk as can be used compressed.
16 03:35:38.559107 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 03:35:38.559205 saving as /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/ramdisk/rootfs.cpio.gz
18 03:35:38.559304 total size: 8418130 (8 MB)
19 03:35:38.560456 progress 0 % (0 MB)
20 03:35:38.562756 progress 5 % (0 MB)
21 03:35:38.565084 progress 10 % (0 MB)
22 03:35:38.567332 progress 15 % (1 MB)
23 03:35:38.569661 progress 20 % (1 MB)
24 03:35:38.571909 progress 25 % (2 MB)
25 03:35:38.574199 progress 30 % (2 MB)
26 03:35:38.576283 progress 35 % (2 MB)
27 03:35:38.578697 progress 40 % (3 MB)
28 03:35:38.581014 progress 45 % (3 MB)
29 03:35:38.583272 progress 50 % (4 MB)
30 03:35:38.585578 progress 55 % (4 MB)
31 03:35:38.587799 progress 60 % (4 MB)
32 03:35:38.589881 progress 65 % (5 MB)
33 03:35:38.592074 progress 70 % (5 MB)
34 03:35:38.594324 progress 75 % (6 MB)
35 03:35:38.596562 progress 80 % (6 MB)
36 03:35:38.598760 progress 85 % (6 MB)
37 03:35:38.601019 progress 90 % (7 MB)
38 03:35:38.603216 progress 95 % (7 MB)
39 03:35:38.605320 progress 100 % (8 MB)
40 03:35:38.605548 8 MB downloaded in 0.05 s (173.61 MB/s)
41 03:35:38.605705 end: 1.1.1 http-download (duration 00:00:00) [common]
43 03:35:38.605944 end: 1.1 download-retry (duration 00:00:00) [common]
44 03:35:38.606031 start: 1.2 download-retry (timeout 00:10:00) [common]
45 03:35:38.606115 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 03:35:38.606250 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-1250-g39ff255b75f5/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 03:35:38.606317 saving as /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/kernel/bzImage
48 03:35:38.606378 total size: 8576912 (8 MB)
49 03:35:38.606437 No compression specified
50 03:35:38.607546 progress 0 % (0 MB)
51 03:35:38.609930 progress 5 % (0 MB)
52 03:35:38.612173 progress 10 % (0 MB)
53 03:35:38.614469 progress 15 % (1 MB)
54 03:35:38.616907 progress 20 % (1 MB)
55 03:35:38.619295 progress 25 % (2 MB)
56 03:35:38.621608 progress 30 % (2 MB)
57 03:35:38.623858 progress 35 % (2 MB)
58 03:35:38.626181 progress 40 % (3 MB)
59 03:35:38.628443 progress 45 % (3 MB)
60 03:35:38.630727 progress 50 % (4 MB)
61 03:35:38.633024 progress 55 % (4 MB)
62 03:35:38.635404 progress 60 % (4 MB)
63 03:35:38.637699 progress 65 % (5 MB)
64 03:35:38.639960 progress 70 % (5 MB)
65 03:35:38.642208 progress 75 % (6 MB)
66 03:35:38.644412 progress 80 % (6 MB)
67 03:35:38.646625 progress 85 % (6 MB)
68 03:35:38.648985 progress 90 % (7 MB)
69 03:35:38.651183 progress 95 % (7 MB)
70 03:35:38.653424 progress 100 % (8 MB)
71 03:35:38.653631 8 MB downloaded in 0.05 s (173.12 MB/s)
72 03:35:38.653777 end: 1.2.1 http-download (duration 00:00:00) [common]
74 03:35:38.654007 end: 1.2 download-retry (duration 00:00:00) [common]
75 03:35:38.654097 start: 1.3 download-retry (timeout 00:10:00) [common]
76 03:35:38.654180 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 03:35:38.654323 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-1250-g39ff255b75f5/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 03:35:38.654391 saving as /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/modules/modules.tar
79 03:35:38.654449 total size: 251020 (0 MB)
80 03:35:38.654509 Using unxz to decompress xz
81 03:35:38.658644 progress 13 % (0 MB)
82 03:35:38.659058 progress 26 % (0 MB)
83 03:35:38.659296 progress 39 % (0 MB)
84 03:35:38.660905 progress 52 % (0 MB)
85 03:35:38.662827 progress 65 % (0 MB)
86 03:35:38.664724 progress 78 % (0 MB)
87 03:35:38.666467 progress 91 % (0 MB)
88 03:35:38.668414 progress 100 % (0 MB)
89 03:35:38.673807 0 MB downloaded in 0.02 s (12.37 MB/s)
90 03:35:38.674040 end: 1.3.1 http-download (duration 00:00:00) [common]
92 03:35:38.674310 end: 1.3 download-retry (duration 00:00:00) [common]
93 03:35:38.674405 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 03:35:38.674497 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 03:35:38.674578 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 03:35:38.674664 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 03:35:38.674885 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq
98 03:35:38.675028 makedir: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin
99 03:35:38.675132 makedir: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/tests
100 03:35:38.675230 makedir: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/results
101 03:35:38.675345 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-add-keys
102 03:35:38.675490 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-add-sources
103 03:35:38.675620 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-background-process-start
104 03:35:38.675751 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-background-process-stop
105 03:35:38.675878 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-common-functions
106 03:35:38.676003 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-echo-ipv4
107 03:35:38.676131 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-install-packages
108 03:35:38.676258 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-installed-packages
109 03:35:38.676427 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-os-build
110 03:35:38.676553 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-probe-channel
111 03:35:38.676678 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-probe-ip
112 03:35:38.676805 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-target-ip
113 03:35:38.676929 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-target-mac
114 03:35:38.677052 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-target-storage
115 03:35:38.677181 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-case
116 03:35:38.677307 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-event
117 03:35:38.677433 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-feedback
118 03:35:38.677558 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-raise
119 03:35:38.677688 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-reference
120 03:35:38.677842 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-runner
121 03:35:38.677972 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-set
122 03:35:38.678132 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-test-shell
123 03:35:38.678279 Updating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-install-packages (oe)
124 03:35:38.678456 Updating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/bin/lava-installed-packages (oe)
125 03:35:38.678624 Creating /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/environment
126 03:35:38.678742 LAVA metadata
127 03:35:38.678827 - LAVA_JOB_ID=12711088
128 03:35:38.678905 - LAVA_DISPATCHER_IP=192.168.201.1
129 03:35:38.679035 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 03:35:38.679107 skipped lava-vland-overlay
131 03:35:38.679229 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 03:35:38.679358 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 03:35:38.679454 skipped lava-multinode-overlay
134 03:35:38.679571 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 03:35:38.679704 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 03:35:38.679815 Loading test definitions
137 03:35:38.679958 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 03:35:38.680069 Using /lava-12711088 at stage 0
139 03:35:38.680553 uuid=12711088_1.4.2.3.1 testdef=None
140 03:35:38.680676 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 03:35:38.680800 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 03:35:38.681564 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 03:35:38.681846 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 03:35:38.682510 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 03:35:38.682768 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 03:35:38.683660 runner path: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/0/tests/0_dmesg test_uuid 12711088_1.4.2.3.1
149 03:35:38.683853 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 03:35:38.684108 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 03:35:38.684213 Using /lava-12711088 at stage 1
153 03:35:38.684602 uuid=12711088_1.4.2.3.5 testdef=None
154 03:35:38.684699 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 03:35:38.684799 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 03:35:38.685291 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 03:35:38.685542 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 03:35:38.686198 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 03:35:38.686452 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 03:35:38.687364 runner path: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/1/tests/1_bootrr test_uuid 12711088_1.4.2.3.5
163 03:35:38.687552 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 03:35:38.687782 Creating lava-test-runner.conf files
166 03:35:38.687881 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/0 for stage 0
167 03:35:38.688016 - 0_dmesg
168 03:35:38.688131 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12711088/lava-overlay-av68qvbq/lava-12711088/1 for stage 1
169 03:35:38.688264 - 1_bootrr
170 03:35:38.688445 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 03:35:38.688565 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 03:35:38.698159 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 03:35:38.698274 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 03:35:38.698373 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 03:35:38.698476 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 03:35:38.698579 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 03:35:38.973127 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 03:35:38.973514 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 03:35:38.973644 extracting modules file /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12711088/extract-overlay-ramdisk-og3m1ztt/ramdisk
180 03:35:38.987692 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 03:35:38.987856 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 03:35:38.987973 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711088/compress-overlay-wvd2r7nh/overlay-1.4.2.4.tar.gz to ramdisk
183 03:35:38.988079 [common] Applying overlay /var/lib/lava/dispatcher/tmp/12711088/compress-overlay-wvd2r7nh/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12711088/extract-overlay-ramdisk-og3m1ztt/ramdisk
184 03:35:39.000253 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 03:35:39.000444 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 03:35:39.000558 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 03:35:39.000663 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 03:35:39.000766 Building ramdisk /var/lib/lava/dispatcher/tmp/12711088/extract-overlay-ramdisk-og3m1ztt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12711088/extract-overlay-ramdisk-og3m1ztt/ramdisk
189 03:35:39.135531 >> 49790 blocks
190 03:35:39.984523 rename /var/lib/lava/dispatcher/tmp/12711088/extract-overlay-ramdisk-og3m1ztt/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
191 03:35:39.984978 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 03:35:39.985109 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 03:35:39.985221 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 03:35:39.985360 No mkimage arch provided, not using FIT.
195 03:35:39.985459 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 03:35:39.985583 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 03:35:39.985722 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 03:35:39.985854 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 03:35:39.985974 No LXC device requested
200 03:35:39.986101 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 03:35:39.986236 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 03:35:39.986359 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 03:35:39.986477 Checking files for TFTP limit of 4294967296 bytes.
204 03:35:39.987007 end: 1 tftp-deploy (duration 00:00:01) [common]
205 03:35:39.987145 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 03:35:39.987277 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 03:35:39.987451 substitutions:
208 03:35:39.987549 - {DTB}: None
209 03:35:39.987649 - {INITRD}: 12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
210 03:35:39.987747 - {KERNEL}: 12711088/tftp-deploy-e3dbypen/kernel/bzImage
211 03:35:39.987844 - {LAVA_MAC}: None
212 03:35:39.987939 - {PRESEED_CONFIG}: None
213 03:35:39.988032 - {PRESEED_LOCAL}: None
214 03:35:39.988125 - {RAMDISK}: 12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
215 03:35:39.988218 - {ROOT_PART}: None
216 03:35:39.988358 - {ROOT}: None
217 03:35:39.988452 - {SERVER_IP}: 192.168.201.1
218 03:35:39.988544 - {TEE}: None
219 03:35:39.988637 Parsed boot commands:
220 03:35:39.988728 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 03:35:39.988963 Parsed boot commands: tftpboot 192.168.201.1 12711088/tftp-deploy-e3dbypen/kernel/bzImage 12711088/tftp-deploy-e3dbypen/kernel/cmdline 12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
222 03:35:39.989088 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 03:35:39.989217 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 03:35:39.989349 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 03:35:39.989477 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 03:35:39.989584 Not connected, no need to disconnect.
227 03:35:39.989702 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 03:35:39.989961 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 03:35:39.990068 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
230 03:35:39.994201 Setting prompt string to ['lava-test: # ']
231 03:35:39.994628 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 03:35:39.994759 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 03:35:39.994901 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 03:35:39.995066 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 03:35:39.995462 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
236 03:35:45.139542 >> Command sent successfully.
237 03:35:45.142276 Returned 0 in 5 seconds
238 03:35:45.242726 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 03:35:45.243151 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 03:35:45.243328 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 03:35:45.243443 Setting prompt string to 'Starting depthcharge on Helios...'
243 03:35:45.243552 Changing prompt to 'Starting depthcharge on Helios...'
244 03:35:45.243634 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
245 03:35:45.243958 [Enter `^Ec?' for help]
246 03:35:45.864005
247 03:35:45.864176
248 03:35:45.874912 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
249 03:35:45.878585 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
250 03:35:45.881643 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
251 03:35:45.888153 CPU: AES supported, TXT NOT supported, VT supported
252 03:35:45.895120 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
253 03:35:45.898156 PCH: device id 0284 (rev 00) is Cometlake-U Premium
254 03:35:45.904720 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
255 03:35:45.908034 VBOOT: Loading verstage.
256 03:35:45.911278 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 03:35:45.918257 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
258 03:35:45.921221 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 03:35:45.924360 CBFS @ c08000 size 3f8000
260 03:35:45.931442 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
261 03:35:45.934786 CBFS: Locating 'fallback/verstage'
262 03:35:45.937956 CBFS: Found @ offset 10fb80 size 1072c
263 03:35:45.938058
264 03:35:45.938148
265 03:35:45.950927 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
266 03:35:45.965153 Probing TPM: . done!
267 03:35:45.968292 TPM ready after 0 ms
268 03:35:45.971956 Connected to device vid:did:rid of 1ae0:0028:00
269 03:35:45.982244 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
270 03:35:45.985451 Initialized TPM device CR50 revision 0
271 03:35:46.029857 tlcl_send_startup: Startup return code is 0
272 03:35:46.030016 TPM: setup succeeded
273 03:35:46.042448 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
274 03:35:46.046478 Chrome EC: UHEPI supported
275 03:35:46.049614 Phase 1
276 03:35:46.052889 FMAP: area GBB found @ c05000 (12288 bytes)
277 03:35:46.059647 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
278 03:35:46.059756 Phase 2
279 03:35:46.062987 Phase 3
280 03:35:46.066480 FMAP: area GBB found @ c05000 (12288 bytes)
281 03:35:46.073073 VB2:vb2_report_dev_firmware() This is developer signed firmware
282 03:35:46.080026 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
283 03:35:46.083321 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
284 03:35:46.089581 VB2:vb2_verify_keyblock() Checking keyblock signature...
285 03:35:46.104936 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
286 03:35:46.108417 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
287 03:35:46.115218 VB2:vb2_verify_fw_preamble() Verifying preamble.
288 03:35:46.119227 Phase 4
289 03:35:46.122457 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
290 03:35:46.129248 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
291 03:35:46.308849 VB2:vb2_rsa_verify_digest() Digest check failed!
292 03:35:46.315412 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
293 03:35:46.315505 Saving nvdata
294 03:35:46.319121 Reboot requested (10020007)
295 03:35:46.322266 board_reset() called!
296 03:35:46.322370 full_reset() called!
297 03:35:50.830591
298 03:35:50.830769
299 03:35:50.840638 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 03:35:50.843910 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 03:35:50.850440 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 03:35:50.853938 CPU: AES supported, TXT NOT supported, VT supported
303 03:35:50.860582 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 03:35:50.863972 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 03:35:50.870692 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 03:35:50.873558 VBOOT: Loading verstage.
307 03:35:50.876866 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 03:35:50.883358 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 03:35:50.886695 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 03:35:50.890177 CBFS @ c08000 size 3f8000
311 03:35:50.897057 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 03:35:50.900188 CBFS: Locating 'fallback/verstage'
313 03:35:50.903532 CBFS: Found @ offset 10fb80 size 1072c
314 03:35:50.907730
315 03:35:50.907842
316 03:35:50.917064 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 03:35:50.931387 Probing TPM: . done!
318 03:35:50.934510 TPM ready after 0 ms
319 03:35:50.938629 Connected to device vid:did:rid of 1ae0:0028:00
320 03:35:50.948371 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 03:35:50.951698 Initialized TPM device CR50 revision 0
322 03:35:50.996812 tlcl_send_startup: Startup return code is 0
323 03:35:50.996933 TPM: setup succeeded
324 03:35:51.009236 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 03:35:51.012680 Chrome EC: UHEPI supported
326 03:35:51.016564 Phase 1
327 03:35:51.019721 FMAP: area GBB found @ c05000 (12288 bytes)
328 03:35:51.026060 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
329 03:35:51.032495 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
330 03:35:51.035844 Recovery requested (1009000e)
331 03:35:51.041751 Saving nvdata
332 03:35:51.047870 tlcl_extend: response is 0
333 03:35:51.056563 tlcl_extend: response is 0
334 03:35:51.063664 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
335 03:35:51.066750 CBFS @ c08000 size 3f8000
336 03:35:51.073452 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
337 03:35:51.077087 CBFS: Locating 'fallback/romstage'
338 03:35:51.080587 CBFS: Found @ offset 80 size 145fc
339 03:35:51.083905 Accumulated console time in verstage 98 ms
340 03:35:51.084013
341 03:35:51.084118
342 03:35:51.096608 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
343 03:35:51.103258 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
344 03:35:51.106923 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
345 03:35:51.110289 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 03:35:51.116851 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
347 03:35:51.119948 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 03:35:51.123117 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
349 03:35:51.126889 TCO_STS: 0000 0000
350 03:35:51.130027 GEN_PMCON: e0015238 00000200
351 03:35:51.133494 GBLRST_CAUSE: 00000000 00000000
352 03:35:51.133590 prev_sleep_state 5
353 03:35:51.136686 Boot Count incremented to 4949
354 03:35:51.143254 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 03:35:51.146725 CBFS @ c08000 size 3f8000
356 03:35:51.153577 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
357 03:35:51.153676 CBFS: Locating 'fspm.bin'
358 03:35:51.159692 CBFS: Found @ offset 5ffc0 size 71000
359 03:35:51.162895 Chrome EC: UHEPI supported
360 03:35:51.169620 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
361 03:35:51.173160 Probing TPM: done!
362 03:35:51.179802 Connected to device vid:did:rid of 1ae0:0028:00
363 03:35:51.190103 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
364 03:35:51.195518 Initialized TPM device CR50 revision 0
365 03:35:51.204899 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
366 03:35:51.211648 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
367 03:35:51.214900 MRC cache found, size 1948
368 03:35:51.218156 bootmode is set to: 2
369 03:35:51.221493 PRMRR disabled by config.
370 03:35:51.224808 SPD INDEX = 1
371 03:35:51.228299 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 03:35:51.231398 CBFS @ c08000 size 3f8000
373 03:35:51.237980 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 03:35:51.238105 CBFS: Locating 'spd.bin'
375 03:35:51.241266 CBFS: Found @ offset 5fb80 size 400
376 03:35:51.244765 SPD: module type is LPDDR3
377 03:35:51.247877 SPD: module part is
378 03:35:51.254575 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
379 03:35:51.257945 SPD: device width 4 bits, bus width 8 bits
380 03:35:51.261473 SPD: module size is 4096 MB (per channel)
381 03:35:51.264819 memory slot: 0 configuration done.
382 03:35:51.267684 memory slot: 2 configuration done.
383 03:35:51.319731 CBMEM:
384 03:35:51.322703 IMD: root @ 99fff000 254 entries.
385 03:35:51.326357 IMD: root @ 99ffec00 62 entries.
386 03:35:51.329283 External stage cache:
387 03:35:51.333161 IMD: root @ 9abff000 254 entries.
388 03:35:51.336129 IMD: root @ 9abfec00 62 entries.
389 03:35:51.339630 Chrome EC: clear events_b mask to 0x0000000020004000
390 03:35:51.355728 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
391 03:35:51.368499 tlcl_write: response is 0
392 03:35:51.377963 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
393 03:35:51.384175 MRC: TPM MRC hash updated successfully.
394 03:35:51.384302 2 DIMMs found
395 03:35:51.387432 SMM Memory Map
396 03:35:51.390678 SMRAM : 0x9a000000 0x1000000
397 03:35:51.394062 Subregion 0: 0x9a000000 0xa00000
398 03:35:51.397367 Subregion 1: 0x9aa00000 0x200000
399 03:35:51.400879 Subregion 2: 0x9ac00000 0x400000
400 03:35:51.404279 top_of_ram = 0x9a000000
401 03:35:51.407629 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
402 03:35:51.414351 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
403 03:35:51.417630 MTRR Range: Start=ff000000 End=0 (Size 1000000)
404 03:35:51.424067 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 03:35:51.427208 CBFS @ c08000 size 3f8000
406 03:35:51.430777 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 03:35:51.433941 CBFS: Locating 'fallback/postcar'
408 03:35:51.440205 CBFS: Found @ offset 107000 size 4b44
409 03:35:51.444149 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
410 03:35:51.456372 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
411 03:35:51.459893 Processing 180 relocs. Offset value of 0x97c0c000
412 03:35:51.468290 Accumulated console time in romstage 285 ms
413 03:35:51.468376
414 03:35:51.468443
415 03:35:51.477855 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
416 03:35:51.484438 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
417 03:35:51.487509 CBFS @ c08000 size 3f8000
418 03:35:51.490972 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
419 03:35:51.497688 CBFS: Locating 'fallback/ramstage'
420 03:35:51.500828 CBFS: Found @ offset 43380 size 1b9e8
421 03:35:51.507568 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
422 03:35:51.539853 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
423 03:35:51.543148 Processing 3976 relocs. Offset value of 0x98db0000
424 03:35:51.549505 Accumulated console time in postcar 52 ms
425 03:35:51.549622
426 03:35:51.549733
427 03:35:51.559580 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
428 03:35:51.566235 FMAP: area RO_VPD found @ c00000 (16384 bytes)
429 03:35:51.569661 WARNING: RO_VPD is uninitialized or empty.
430 03:35:51.572825 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 03:35:51.579083 FMAP: area RW_VPD found @ af8000 (8192 bytes)
432 03:35:51.579192 Normal boot.
433 03:35:51.586160 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
434 03:35:51.588838 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 03:35:51.592409 CBFS @ c08000 size 3f8000
436 03:35:51.598788 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 03:35:51.602390 CBFS: Locating 'cpu_microcode_blob.bin'
438 03:35:51.605734 CBFS: Found @ offset 14700 size 2ec00
439 03:35:51.608723 microcode: sig=0x806ec pf=0x4 revision=0xc9
440 03:35:51.612306 Skip microcode update
441 03:35:51.618593 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 03:35:51.618686 CBFS @ c08000 size 3f8000
443 03:35:51.625189 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 03:35:51.628528 CBFS: Locating 'fsps.bin'
445 03:35:51.631968 CBFS: Found @ offset d1fc0 size 35000
446 03:35:51.657898 Detected 4 core, 8 thread CPU.
447 03:35:51.661226 Setting up SMI for CPU
448 03:35:51.664828 IED base = 0x9ac00000
449 03:35:51.664981 IED size = 0x00400000
450 03:35:51.667304 Will perform SMM setup.
451 03:35:51.674332 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 03:35:51.681062 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 03:35:51.684181 Processing 16 relocs. Offset value of 0x00030000
454 03:35:51.687753 Attempting to start 7 APs
455 03:35:51.690975 Waiting for 10ms after sending INIT.
456 03:35:51.707235 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 03:35:51.707444 done.
458 03:35:51.710860 AP: slot 4 apic_id 2.
459 03:35:51.714297 AP: slot 1 apic_id 3.
460 03:35:51.714421 AP: slot 7 apic_id 7.
461 03:35:51.717383 AP: slot 2 apic_id 6.
462 03:35:51.720558 Waiting for 2nd SIPI to complete...done.
463 03:35:51.724039 AP: slot 5 apic_id 4.
464 03:35:51.727403 AP: slot 6 apic_id 5.
465 03:35:51.733929 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 03:35:51.737254 Processing 13 relocs. Offset value of 0x00038000
467 03:35:51.744073 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 03:35:51.750582 Installing SMM handler to 0x9a000000
469 03:35:51.757409 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
470 03:35:51.760574 Processing 658 relocs. Offset value of 0x9a010000
471 03:35:51.770468 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
472 03:35:51.773793 Processing 13 relocs. Offset value of 0x9a008000
473 03:35:51.779938 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
474 03:35:51.786683 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
475 03:35:51.793228 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
476 03:35:51.796711 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
477 03:35:51.803667 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
478 03:35:51.809662 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
479 03:35:51.813037 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
480 03:35:51.820019 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
481 03:35:51.823754 Clearing SMI status registers
482 03:35:51.827166 SMI_STS: PM1
483 03:35:51.827275 PM1_STS: PWRBTN
484 03:35:51.830296 TCO_STS: SECOND_TO
485 03:35:51.833251 New SMBASE 0x9a000000
486 03:35:51.836547 In relocation handler: CPU 0
487 03:35:51.839894 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
488 03:35:51.843639 Writing SMRR. base = 0x9a000006, mask=0xff000800
489 03:35:51.846488 Relocation complete.
490 03:35:51.849900 New SMBASE 0x99fff400
491 03:35:51.850021 In relocation handler: CPU 3
492 03:35:51.856847 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
493 03:35:51.860239 Writing SMRR. base = 0x9a000006, mask=0xff000800
494 03:35:51.863576 Relocation complete.
495 03:35:51.866839 New SMBASE 0x99ffe800
496 03:35:51.866963 In relocation handler: CPU 6
497 03:35:51.873666 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
498 03:35:51.876910 Writing SMRR. base = 0x9a000006, mask=0xff000800
499 03:35:51.880265 Relocation complete.
500 03:35:51.880397 New SMBASE 0x99ffec00
501 03:35:51.883693 In relocation handler: CPU 5
502 03:35:51.889803 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
503 03:35:51.893081 Writing SMRR. base = 0x9a000006, mask=0xff000800
504 03:35:51.896377 Relocation complete.
505 03:35:51.896486 New SMBASE 0x99fffc00
506 03:35:51.899846 In relocation handler: CPU 1
507 03:35:51.906541 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
508 03:35:51.909710 Writing SMRR. base = 0x9a000006, mask=0xff000800
509 03:35:51.913182 Relocation complete.
510 03:35:51.913294 New SMBASE 0x99fff000
511 03:35:51.916538 In relocation handler: CPU 4
512 03:35:51.919910 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
513 03:35:51.926417 Writing SMRR. base = 0x9a000006, mask=0xff000800
514 03:35:51.929698 Relocation complete.
515 03:35:51.929816 New SMBASE 0x99ffe400
516 03:35:51.933579 In relocation handler: CPU 7
517 03:35:51.936660 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
518 03:35:51.943326 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 03:35:51.943447 Relocation complete.
520 03:35:51.946718 New SMBASE 0x99fff800
521 03:35:51.949849 In relocation handler: CPU 2
522 03:35:51.952914 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
523 03:35:51.960037 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 03:35:51.960161 Relocation complete.
525 03:35:51.963214 Initializing CPU #0
526 03:35:51.966487 CPU: vendor Intel device 806ec
527 03:35:51.969808 CPU: family 06, model 8e, stepping 0c
528 03:35:51.973001 Clearing out pending MCEs
529 03:35:51.976254 Setting up local APIC...
530 03:35:51.976379 apic_id: 0x00 done.
531 03:35:51.979598 Turbo is available but hidden
532 03:35:51.983046 Turbo is available and visible
533 03:35:51.986558 VMX status: enabled
534 03:35:51.989421 IA32_FEATURE_CONTROL status: locked
535 03:35:51.992676 Skip microcode update
536 03:35:51.992802 CPU #0 initialized
537 03:35:51.996151 Initializing CPU #3
538 03:35:51.996263 Initializing CPU #2
539 03:35:51.999654 Initializing CPU #7
540 03:35:52.003073 CPU: vendor Intel device 806ec
541 03:35:52.006302 CPU: family 06, model 8e, stepping 0c
542 03:35:52.009379 Initializing CPU #5
543 03:35:52.009493 Initializing CPU #6
544 03:35:52.012862 CPU: vendor Intel device 806ec
545 03:35:52.016180 CPU: family 06, model 8e, stepping 0c
546 03:35:52.019607 Initializing CPU #1
547 03:35:52.023000 Initializing CPU #4
548 03:35:52.026386 CPU: vendor Intel device 806ec
549 03:35:52.029737 CPU: family 06, model 8e, stepping 0c
550 03:35:52.032497 CPU: vendor Intel device 806ec
551 03:35:52.035785 CPU: family 06, model 8e, stepping 0c
552 03:35:52.039237 Clearing out pending MCEs
553 03:35:52.039366 Clearing out pending MCEs
554 03:35:52.042428 Setting up local APIC...
555 03:35:52.045991 CPU: vendor Intel device 806ec
556 03:35:52.049225 CPU: family 06, model 8e, stepping 0c
557 03:35:52.052662 Clearing out pending MCEs
558 03:35:52.056152 Clearing out pending MCEs
559 03:35:52.059141 Setting up local APIC...
560 03:35:52.059246 apic_id: 0x03 done.
561 03:35:52.063014 Setting up local APIC...
562 03:35:52.065768 CPU: vendor Intel device 806ec
563 03:35:52.069053 CPU: family 06, model 8e, stepping 0c
564 03:35:52.072463 Clearing out pending MCEs
565 03:35:52.076214 CPU: vendor Intel device 806ec
566 03:35:52.078934 CPU: family 06, model 8e, stepping 0c
567 03:35:52.082260 Clearing out pending MCEs
568 03:35:52.085636 Clearing out pending MCEs
569 03:35:52.085740 Setting up local APIC...
570 03:35:52.089148 VMX status: enabled
571 03:35:52.092068 apic_id: 0x02 done.
572 03:35:52.095973 IA32_FEATURE_CONTROL status: locked
573 03:35:52.096086 VMX status: enabled
574 03:35:52.099352 Skip microcode update
575 03:35:52.102088 IA32_FEATURE_CONTROL status: locked
576 03:35:52.105440 CPU #1 initialized
577 03:35:52.105562 Skip microcode update
578 03:35:52.108847 Setting up local APIC...
579 03:35:52.112385 Setting up local APIC...
580 03:35:52.115656 apic_id: 0x06 done.
581 03:35:52.115769 Setting up local APIC...
582 03:35:52.118616 CPU #4 initialized
583 03:35:52.121968 apic_id: 0x01 done.
584 03:35:52.122074 apic_id: 0x04 done.
585 03:35:52.125398 apic_id: 0x05 done.
586 03:35:52.125502 VMX status: enabled
587 03:35:52.128711 VMX status: enabled
588 03:35:52.131960 IA32_FEATURE_CONTROL status: locked
589 03:35:52.135189 IA32_FEATURE_CONTROL status: locked
590 03:35:52.138428 VMX status: enabled
591 03:35:52.141961 Skip microcode update
592 03:35:52.142071 Skip microcode update
593 03:35:52.145264 CPU #6 initialized
594 03:35:52.145377 CPU #5 initialized
595 03:35:52.148590 IA32_FEATURE_CONTROL status: locked
596 03:35:52.151738 apic_id: 0x07 done.
597 03:35:52.155179 VMX status: enabled
598 03:35:52.155286 VMX status: enabled
599 03:35:52.158993 IA32_FEATURE_CONTROL status: locked
600 03:35:52.165037 IA32_FEATURE_CONTROL status: locked
601 03:35:52.165149 Skip microcode update
602 03:35:52.168726 Skip microcode update
603 03:35:52.168830 CPU #2 initialized
604 03:35:52.172103 CPU #7 initialized
605 03:35:52.175556 Skip microcode update
606 03:35:52.175658 CPU #3 initialized
607 03:35:52.181646 bsp_do_flight_plan done after 457 msecs.
608 03:35:52.184887 CPU: frequency set to 4200 MHz
609 03:35:52.185072 Enabling SMIs.
610 03:35:52.185184 Locking SMM.
611 03:35:52.201269 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
612 03:35:52.204592 CBFS @ c08000 size 3f8000
613 03:35:52.211264 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
614 03:35:52.211381 CBFS: Locating 'vbt.bin'
615 03:35:52.214624 CBFS: Found @ offset 5f5c0 size 499
616 03:35:52.221557 Found a VBT of 4608 bytes after decompression
617 03:35:52.403327 Display FSP Version Info HOB
618 03:35:52.406842 Reference Code - CPU = 9.0.1e.30
619 03:35:52.410209 uCode Version = 0.0.0.ca
620 03:35:52.413470 TXT ACM version = ff.ff.ff.ffff
621 03:35:52.416809 Display FSP Version Info HOB
622 03:35:52.420147 Reference Code - ME = 9.0.1e.30
623 03:35:52.423439 MEBx version = 0.0.0.0
624 03:35:52.426882 ME Firmware Version = Consumer SKU
625 03:35:52.430177 Display FSP Version Info HOB
626 03:35:52.433411 Reference Code - CML PCH = 9.0.1e.30
627 03:35:52.436951 PCH-CRID Status = Disabled
628 03:35:52.439998 PCH-CRID Original Value = ff.ff.ff.ffff
629 03:35:52.443072 PCH-CRID New Value = ff.ff.ff.ffff
630 03:35:52.446971 OPROM - RST - RAID = ff.ff.ff.ffff
631 03:35:52.450008 ChipsetInit Base Version = ff.ff.ff.ffff
632 03:35:52.453496 ChipsetInit Oem Version = ff.ff.ff.ffff
633 03:35:52.456492 Display FSP Version Info HOB
634 03:35:52.463124 Reference Code - SA - System Agent = 9.0.1e.30
635 03:35:52.466397 Reference Code - MRC = 0.7.1.6c
636 03:35:52.466506 SA - PCIe Version = 9.0.1e.30
637 03:35:52.469778 SA-CRID Status = Disabled
638 03:35:52.472965 SA-CRID Original Value = 0.0.0.c
639 03:35:52.476466 SA-CRID New Value = 0.0.0.c
640 03:35:52.479604 OPROM - VBIOS = ff.ff.ff.ffff
641 03:35:52.483584 RTC Init
642 03:35:52.486246 Set power on after power failure.
643 03:35:52.486323 Disabling Deep S3
644 03:35:52.489534 Disabling Deep S3
645 03:35:52.489606 Disabling Deep S4
646 03:35:52.493159 Disabling Deep S4
647 03:35:52.493263 Disabling Deep S5
648 03:35:52.496761 Disabling Deep S5
649 03:35:52.503450 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
650 03:35:52.503569 Enumerating buses...
651 03:35:52.509603 Show all devs... Before device enumeration.
652 03:35:52.509715 Root Device: enabled 1
653 03:35:52.513073 CPU_CLUSTER: 0: enabled 1
654 03:35:52.516315 DOMAIN: 0000: enabled 1
655 03:35:52.519501 APIC: 00: enabled 1
656 03:35:52.519583 PCI: 00:00.0: enabled 1
657 03:35:52.522748 PCI: 00:02.0: enabled 1
658 03:35:52.526208 PCI: 00:04.0: enabled 0
659 03:35:52.526311 PCI: 00:05.0: enabled 0
660 03:35:52.529406 PCI: 00:12.0: enabled 1
661 03:35:52.532919 PCI: 00:12.5: enabled 0
662 03:35:52.535966 PCI: 00:12.6: enabled 0
663 03:35:52.536071 PCI: 00:14.0: enabled 1
664 03:35:52.539443 PCI: 00:14.1: enabled 0
665 03:35:52.542957 PCI: 00:14.3: enabled 1
666 03:35:52.545865 PCI: 00:14.5: enabled 0
667 03:35:52.545942 PCI: 00:15.0: enabled 1
668 03:35:52.549157 PCI: 00:15.1: enabled 1
669 03:35:52.552527 PCI: 00:15.2: enabled 0
670 03:35:52.555827 PCI: 00:15.3: enabled 0
671 03:35:52.555905 PCI: 00:16.0: enabled 1
672 03:35:52.559043 PCI: 00:16.1: enabled 0
673 03:35:52.562310 PCI: 00:16.2: enabled 0
674 03:35:52.565826 PCI: 00:16.3: enabled 0
675 03:35:52.565912 PCI: 00:16.4: enabled 0
676 03:35:52.569014 PCI: 00:16.5: enabled 0
677 03:35:52.572507 PCI: 00:17.0: enabled 1
678 03:35:52.575437 PCI: 00:19.0: enabled 1
679 03:35:52.575539 PCI: 00:19.1: enabled 0
680 03:35:52.578999 PCI: 00:19.2: enabled 0
681 03:35:52.582197 PCI: 00:1a.0: enabled 0
682 03:35:52.582274 PCI: 00:1c.0: enabled 0
683 03:35:52.585596 PCI: 00:1c.1: enabled 0
684 03:35:52.589192 PCI: 00:1c.2: enabled 0
685 03:35:52.591998 PCI: 00:1c.3: enabled 0
686 03:35:52.592074 PCI: 00:1c.4: enabled 0
687 03:35:52.595599 PCI: 00:1c.5: enabled 0
688 03:35:52.598827 PCI: 00:1c.6: enabled 0
689 03:35:52.601909 PCI: 00:1c.7: enabled 0
690 03:35:52.602014 PCI: 00:1d.0: enabled 1
691 03:35:52.605618 PCI: 00:1d.1: enabled 0
692 03:35:52.608993 PCI: 00:1d.2: enabled 0
693 03:35:52.612363 PCI: 00:1d.3: enabled 0
694 03:35:52.612468 PCI: 00:1d.4: enabled 0
695 03:35:52.615855 PCI: 00:1d.5: enabled 1
696 03:35:52.618647 PCI: 00:1e.0: enabled 1
697 03:35:52.618750 PCI: 00:1e.1: enabled 0
698 03:35:52.621938 PCI: 00:1e.2: enabled 1
699 03:35:52.625319 PCI: 00:1e.3: enabled 1
700 03:35:52.628576 PCI: 00:1f.0: enabled 1
701 03:35:52.628649 PCI: 00:1f.1: enabled 1
702 03:35:52.632100 PCI: 00:1f.2: enabled 1
703 03:35:52.635277 PCI: 00:1f.3: enabled 1
704 03:35:52.638979 PCI: 00:1f.4: enabled 1
705 03:35:52.639092 PCI: 00:1f.5: enabled 1
706 03:35:52.641730 PCI: 00:1f.6: enabled 0
707 03:35:52.645194 USB0 port 0: enabled 1
708 03:35:52.645268 I2C: 00:15: enabled 1
709 03:35:52.648728 I2C: 00:5d: enabled 1
710 03:35:52.652301 GENERIC: 0.0: enabled 1
711 03:35:52.654857 I2C: 00:1a: enabled 1
712 03:35:52.654955 I2C: 00:38: enabled 1
713 03:35:52.658321 I2C: 00:39: enabled 1
714 03:35:52.661500 I2C: 00:3a: enabled 1
715 03:35:52.661577 I2C: 00:3b: enabled 1
716 03:35:52.665554 PCI: 00:00.0: enabled 1
717 03:35:52.668224 SPI: 00: enabled 1
718 03:35:52.668332 SPI: 01: enabled 1
719 03:35:52.671543 PNP: 0c09.0: enabled 1
720 03:35:52.674842 USB2 port 0: enabled 1
721 03:35:52.674917 USB2 port 1: enabled 1
722 03:35:52.678168 USB2 port 2: enabled 0
723 03:35:52.681272 USB2 port 3: enabled 0
724 03:35:52.681359 USB2 port 5: enabled 0
725 03:35:52.684975 USB2 port 6: enabled 1
726 03:35:52.688089 USB2 port 9: enabled 1
727 03:35:52.691474 USB3 port 0: enabled 1
728 03:35:52.691579 USB3 port 1: enabled 1
729 03:35:52.694815 USB3 port 2: enabled 1
730 03:35:52.697851 USB3 port 3: enabled 1
731 03:35:52.697923 USB3 port 4: enabled 0
732 03:35:52.701014 APIC: 03: enabled 1
733 03:35:52.704717 APIC: 06: enabled 1
734 03:35:52.704798 APIC: 01: enabled 1
735 03:35:52.708318 APIC: 02: enabled 1
736 03:35:52.708418 APIC: 04: enabled 1
737 03:35:52.711063 APIC: 05: enabled 1
738 03:35:52.714751 APIC: 07: enabled 1
739 03:35:52.714851 Compare with tree...
740 03:35:52.717835 Root Device: enabled 1
741 03:35:52.721191 CPU_CLUSTER: 0: enabled 1
742 03:35:52.724553 APIC: 00: enabled 1
743 03:35:52.724628 APIC: 03: enabled 1
744 03:35:52.727892 APIC: 06: enabled 1
745 03:35:52.731377 APIC: 01: enabled 1
746 03:35:52.731483 APIC: 02: enabled 1
747 03:35:52.734685 APIC: 04: enabled 1
748 03:35:52.738041 APIC: 05: enabled 1
749 03:35:52.738125 APIC: 07: enabled 1
750 03:35:52.741122 DOMAIN: 0000: enabled 1
751 03:35:52.744311 PCI: 00:00.0: enabled 1
752 03:35:52.747416 PCI: 00:02.0: enabled 1
753 03:35:52.747496 PCI: 00:04.0: enabled 0
754 03:35:52.750891 PCI: 00:05.0: enabled 0
755 03:35:52.754254 PCI: 00:12.0: enabled 1
756 03:35:52.757840 PCI: 00:12.5: enabled 0
757 03:35:52.761119 PCI: 00:12.6: enabled 0
758 03:35:52.761223 PCI: 00:14.0: enabled 1
759 03:35:52.764598 USB0 port 0: enabled 1
760 03:35:52.767745 USB2 port 0: enabled 1
761 03:35:52.770646 USB2 port 1: enabled 1
762 03:35:52.773876 USB2 port 2: enabled 0
763 03:35:52.777243 USB2 port 3: enabled 0
764 03:35:52.777321 USB2 port 5: enabled 0
765 03:35:52.780560 USB2 port 6: enabled 1
766 03:35:52.784066 USB2 port 9: enabled 1
767 03:35:52.787271 USB3 port 0: enabled 1
768 03:35:52.790596 USB3 port 1: enabled 1
769 03:35:52.793883 USB3 port 2: enabled 1
770 03:35:52.793958 USB3 port 3: enabled 1
771 03:35:52.797089 USB3 port 4: enabled 0
772 03:35:52.800195 PCI: 00:14.1: enabled 0
773 03:35:52.803305 PCI: 00:14.3: enabled 1
774 03:35:52.807221 PCI: 00:14.5: enabled 0
775 03:35:52.807327 PCI: 00:15.0: enabled 1
776 03:35:52.810358 I2C: 00:15: enabled 1
777 03:35:52.813643 PCI: 00:15.1: enabled 1
778 03:35:52.816776 I2C: 00:5d: enabled 1
779 03:35:52.820033 GENERIC: 0.0: enabled 1
780 03:35:52.820137 PCI: 00:15.2: enabled 0
781 03:35:52.823723 PCI: 00:15.3: enabled 0
782 03:35:52.826639 PCI: 00:16.0: enabled 1
783 03:35:52.830262 PCI: 00:16.1: enabled 0
784 03:35:52.830370 PCI: 00:16.2: enabled 0
785 03:35:52.833314 PCI: 00:16.3: enabled 0
786 03:35:52.836797 PCI: 00:16.4: enabled 0
787 03:35:52.840230 PCI: 00:16.5: enabled 0
788 03:35:52.843572 PCI: 00:17.0: enabled 1
789 03:35:52.843681 PCI: 00:19.0: enabled 1
790 03:35:52.846807 I2C: 00:1a: enabled 1
791 03:35:52.850144 I2C: 00:38: enabled 1
792 03:35:52.853262 I2C: 00:39: enabled 1
793 03:35:52.856398 I2C: 00:3a: enabled 1
794 03:35:52.856475 I2C: 00:3b: enabled 1
795 03:35:52.859546 PCI: 00:19.1: enabled 0
796 03:35:52.862853 PCI: 00:19.2: enabled 0
797 03:35:52.866291 PCI: 00:1a.0: enabled 0
798 03:35:52.866393 PCI: 00:1c.0: enabled 0
799 03:35:52.869737 PCI: 00:1c.1: enabled 0
800 03:35:52.872669 PCI: 00:1c.2: enabled 0
801 03:35:52.876292 PCI: 00:1c.3: enabled 0
802 03:35:52.879409 PCI: 00:1c.4: enabled 0
803 03:35:52.879495 PCI: 00:1c.5: enabled 0
804 03:35:52.882833 PCI: 00:1c.6: enabled 0
805 03:35:52.886197 PCI: 00:1c.7: enabled 0
806 03:35:52.889657 PCI: 00:1d.0: enabled 1
807 03:35:52.892940 PCI: 00:1d.1: enabled 0
808 03:35:52.893015 PCI: 00:1d.2: enabled 0
809 03:35:52.895752 PCI: 00:1d.3: enabled 0
810 03:35:52.899178 PCI: 00:1d.4: enabled 0
811 03:35:52.902477 PCI: 00:1d.5: enabled 1
812 03:35:52.905825 PCI: 00:00.0: enabled 1
813 03:35:52.905931 PCI: 00:1e.0: enabled 1
814 03:35:52.909471 PCI: 00:1e.1: enabled 0
815 03:35:52.912473 PCI: 00:1e.2: enabled 1
816 03:35:52.915646 SPI: 00: enabled 1
817 03:35:52.918995 PCI: 00:1e.3: enabled 1
818 03:35:52.919103 SPI: 01: enabled 1
819 03:35:52.922301 PCI: 00:1f.0: enabled 1
820 03:35:52.925573 PNP: 0c09.0: enabled 1
821 03:35:52.928996 PCI: 00:1f.1: enabled 1
822 03:35:52.929098 PCI: 00:1f.2: enabled 1
823 03:35:52.932106 PCI: 00:1f.3: enabled 1
824 03:35:52.935520 PCI: 00:1f.4: enabled 1
825 03:35:52.939197 PCI: 00:1f.5: enabled 1
826 03:35:52.942656 PCI: 00:1f.6: enabled 0
827 03:35:52.942762 Root Device scanning...
828 03:35:52.945442 scan_static_bus for Root Device
829 03:35:52.949196 CPU_CLUSTER: 0 enabled
830 03:35:52.952444 DOMAIN: 0000 enabled
831 03:35:52.952519 DOMAIN: 0000 scanning...
832 03:35:52.955864 PCI: pci_scan_bus for bus 00
833 03:35:52.959160 PCI: 00:00.0 [8086/0000] ops
834 03:35:52.962585 PCI: 00:00.0 [8086/9b61] enabled
835 03:35:52.965651 PCI: 00:02.0 [8086/0000] bus ops
836 03:35:52.968908 PCI: 00:02.0 [8086/9b41] enabled
837 03:35:52.972160 PCI: 00:04.0 [8086/1903] disabled
838 03:35:52.975551 PCI: 00:08.0 [8086/1911] enabled
839 03:35:52.978967 PCI: 00:12.0 [8086/02f9] enabled
840 03:35:52.982426 PCI: 00:14.0 [8086/0000] bus ops
841 03:35:52.985578 PCI: 00:14.0 [8086/02ed] enabled
842 03:35:52.989199 PCI: 00:14.2 [8086/02ef] enabled
843 03:35:52.991989 PCI: 00:14.3 [8086/02f0] enabled
844 03:35:52.995218 PCI: 00:15.0 [8086/0000] bus ops
845 03:35:52.998638 PCI: 00:15.0 [8086/02e8] enabled
846 03:35:53.001950 PCI: 00:15.1 [8086/0000] bus ops
847 03:35:53.005409 PCI: 00:15.1 [8086/02e9] enabled
848 03:35:53.008916 PCI: 00:16.0 [8086/0000] ops
849 03:35:53.012131 PCI: 00:16.0 [8086/02e0] enabled
850 03:35:53.015288 PCI: 00:17.0 [8086/0000] ops
851 03:35:53.019213 PCI: 00:17.0 [8086/02d3] enabled
852 03:35:53.022109 PCI: 00:19.0 [8086/0000] bus ops
853 03:35:53.025281 PCI: 00:19.0 [8086/02c5] enabled
854 03:35:53.028651 PCI: 00:1d.0 [8086/0000] bus ops
855 03:35:53.032279 PCI: 00:1d.0 [8086/02b0] enabled
856 03:35:53.038913 PCI: Static device PCI: 00:1d.5 not found, disabling it.
857 03:35:53.042239 PCI: 00:1e.0 [8086/0000] ops
858 03:35:53.045500 PCI: 00:1e.0 [8086/02a8] enabled
859 03:35:53.048706 PCI: 00:1e.2 [8086/0000] bus ops
860 03:35:53.051669 PCI: 00:1e.2 [8086/02aa] enabled
861 03:35:53.055114 PCI: 00:1e.3 [8086/0000] bus ops
862 03:35:53.058794 PCI: 00:1e.3 [8086/02ab] enabled
863 03:35:53.061793 PCI: 00:1f.0 [8086/0000] bus ops
864 03:35:53.065127 PCI: 00:1f.0 [8086/0284] enabled
865 03:35:53.068401 PCI: Static device PCI: 00:1f.1 not found, disabling it.
866 03:35:53.075123 PCI: Static device PCI: 00:1f.2 not found, disabling it.
867 03:35:53.078712 PCI: 00:1f.3 [8086/0000] bus ops
868 03:35:53.081891 PCI: 00:1f.3 [8086/02c8] enabled
869 03:35:53.085177 PCI: 00:1f.4 [8086/0000] bus ops
870 03:35:53.088622 PCI: 00:1f.4 [8086/02a3] enabled
871 03:35:53.092081 PCI: 00:1f.5 [8086/0000] bus ops
872 03:35:53.095318 PCI: 00:1f.5 [8086/02a4] enabled
873 03:35:53.098506 PCI: Leftover static devices:
874 03:35:53.101488 PCI: 00:05.0
875 03:35:53.101573 PCI: 00:12.5
876 03:35:53.101639 PCI: 00:12.6
877 03:35:53.104904 PCI: 00:14.1
878 03:35:53.104988 PCI: 00:14.5
879 03:35:53.108391 PCI: 00:15.2
880 03:35:53.108501 PCI: 00:15.3
881 03:35:53.108598 PCI: 00:16.1
882 03:35:53.111892 PCI: 00:16.2
883 03:35:53.111995 PCI: 00:16.3
884 03:35:53.115243 PCI: 00:16.4
885 03:35:53.115319 PCI: 00:16.5
886 03:35:53.115392 PCI: 00:19.1
887 03:35:53.118717 PCI: 00:19.2
888 03:35:53.118826 PCI: 00:1a.0
889 03:35:53.121515 PCI: 00:1c.0
890 03:35:53.121617 PCI: 00:1c.1
891 03:35:53.124973 PCI: 00:1c.2
892 03:35:53.125088 PCI: 00:1c.3
893 03:35:53.125184 PCI: 00:1c.4
894 03:35:53.128179 PCI: 00:1c.5
895 03:35:53.128306 PCI: 00:1c.6
896 03:35:53.131475 PCI: 00:1c.7
897 03:35:53.131581 PCI: 00:1d.1
898 03:35:53.131673 PCI: 00:1d.2
899 03:35:53.134618 PCI: 00:1d.3
900 03:35:53.134725 PCI: 00:1d.4
901 03:35:53.138163 PCI: 00:1d.5
902 03:35:53.138276 PCI: 00:1e.1
903 03:35:53.138371 PCI: 00:1f.1
904 03:35:53.141610 PCI: 00:1f.2
905 03:35:53.141718 PCI: 00:1f.6
906 03:35:53.144687 PCI: Check your devicetree.cb.
907 03:35:53.148004 PCI: 00:02.0 scanning...
908 03:35:53.151339 scan_generic_bus for PCI: 00:02.0
909 03:35:53.154618 scan_generic_bus for PCI: 00:02.0 done
910 03:35:53.161196 scan_bus: scanning of bus PCI: 00:02.0 took 10205 usecs
911 03:35:53.164801 PCI: 00:14.0 scanning...
912 03:35:53.168151 scan_static_bus for PCI: 00:14.0
913 03:35:53.168256 USB0 port 0 enabled
914 03:35:53.171089 USB0 port 0 scanning...
915 03:35:53.174754 scan_static_bus for USB0 port 0
916 03:35:53.177655 USB2 port 0 enabled
917 03:35:53.177737 USB2 port 1 enabled
918 03:35:53.181303 USB2 port 2 disabled
919 03:35:53.184602 USB2 port 3 disabled
920 03:35:53.184707 USB2 port 5 disabled
921 03:35:53.187809 USB2 port 6 enabled
922 03:35:53.191224 USB2 port 9 enabled
923 03:35:53.191327 USB3 port 0 enabled
924 03:35:53.194666 USB3 port 1 enabled
925 03:35:53.194769 USB3 port 2 enabled
926 03:35:53.198241 USB3 port 3 enabled
927 03:35:53.200936 USB3 port 4 disabled
928 03:35:53.201013 USB2 port 0 scanning...
929 03:35:53.204815 scan_static_bus for USB2 port 0
930 03:35:53.211535 scan_static_bus for USB2 port 0 done
931 03:35:53.214632 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
932 03:35:53.218073 USB2 port 1 scanning...
933 03:35:53.221609 scan_static_bus for USB2 port 1
934 03:35:53.224189 scan_static_bus for USB2 port 1 done
935 03:35:53.230944 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
936 03:35:53.231057 USB2 port 6 scanning...
937 03:35:53.235014 scan_static_bus for USB2 port 6
938 03:35:53.241068 scan_static_bus for USB2 port 6 done
939 03:35:53.245034 scan_bus: scanning of bus USB2 port 6 took 9701 usecs
940 03:35:53.247948 USB2 port 9 scanning...
941 03:35:53.251406 scan_static_bus for USB2 port 9
942 03:35:53.254919 scan_static_bus for USB2 port 9 done
943 03:35:53.261491 scan_bus: scanning of bus USB2 port 9 took 9690 usecs
944 03:35:53.261610 USB3 port 0 scanning...
945 03:35:53.264624 scan_static_bus for USB3 port 0
946 03:35:53.271500 scan_static_bus for USB3 port 0 done
947 03:35:53.274766 scan_bus: scanning of bus USB3 port 0 took 9698 usecs
948 03:35:53.278055 USB3 port 1 scanning...
949 03:35:53.281321 scan_static_bus for USB3 port 1
950 03:35:53.284667 scan_static_bus for USB3 port 1 done
951 03:35:53.291060 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
952 03:35:53.291179 USB3 port 2 scanning...
953 03:35:53.294444 scan_static_bus for USB3 port 2
954 03:35:53.301496 scan_static_bus for USB3 port 2 done
955 03:35:53.304337 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
956 03:35:53.308152 USB3 port 3 scanning...
957 03:35:53.311537 scan_static_bus for USB3 port 3
958 03:35:53.314348 scan_static_bus for USB3 port 3 done
959 03:35:53.321239 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
960 03:35:53.324462 scan_static_bus for USB0 port 0 done
961 03:35:53.331289 scan_bus: scanning of bus USB0 port 0 took 155391 usecs
962 03:35:53.334589 scan_static_bus for PCI: 00:14.0 done
963 03:35:53.338082 scan_bus: scanning of bus PCI: 00:14.0 took 173012 usecs
964 03:35:53.340792 PCI: 00:15.0 scanning...
965 03:35:53.344212 scan_generic_bus for PCI: 00:15.0
966 03:35:53.347680 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
967 03:35:53.354290 scan_generic_bus for PCI: 00:15.0 done
968 03:35:53.357684 scan_bus: scanning of bus PCI: 00:15.0 took 14285 usecs
969 03:35:53.360933 PCI: 00:15.1 scanning...
970 03:35:53.364144 scan_generic_bus for PCI: 00:15.1
971 03:35:53.367522 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
972 03:35:53.374284 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
973 03:35:53.377315 scan_generic_bus for PCI: 00:15.1 done
974 03:35:53.383995 scan_bus: scanning of bus PCI: 00:15.1 took 18592 usecs
975 03:35:53.384079 PCI: 00:19.0 scanning...
976 03:35:53.387698 scan_generic_bus for PCI: 00:19.0
977 03:35:53.394210 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
978 03:35:53.397588 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
979 03:35:53.401540 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
980 03:35:53.403959 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
981 03:35:53.411026 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
982 03:35:53.413897 scan_generic_bus for PCI: 00:19.0 done
983 03:35:53.417196 scan_bus: scanning of bus PCI: 00:19.0 took 30750 usecs
984 03:35:53.420546 PCI: 00:1d.0 scanning...
985 03:35:53.423816 do_pci_scan_bridge for PCI: 00:1d.0
986 03:35:53.427168 PCI: pci_scan_bus for bus 01
987 03:35:53.430409 PCI: 01:00.0 [1c5c/1327] enabled
988 03:35:53.433580 Enabling Common Clock Configuration
989 03:35:53.440495 L1 Sub-State supported from root port 29
990 03:35:53.443922 L1 Sub-State Support = 0xf
991 03:35:53.444008 CommonModeRestoreTime = 0x28
992 03:35:53.450568 Power On Value = 0x16, Power On Scale = 0x0
993 03:35:53.450655 ASPM: Enabled L1
994 03:35:53.456901 scan_bus: scanning of bus PCI: 00:1d.0 took 32782 usecs
995 03:35:53.460165 PCI: 00:1e.2 scanning...
996 03:35:53.463559 scan_generic_bus for PCI: 00:1e.2
997 03:35:53.466923 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
998 03:35:53.470165 scan_generic_bus for PCI: 00:1e.2 done
999 03:35:53.476983 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1000 03:35:53.480520 PCI: 00:1e.3 scanning...
1001 03:35:53.483064 scan_generic_bus for PCI: 00:1e.3
1002 03:35:53.486889 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1003 03:35:53.490015 scan_generic_bus for PCI: 00:1e.3 done
1004 03:35:53.497091 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1005 03:35:53.499476 PCI: 00:1f.0 scanning...
1006 03:35:53.502985 scan_static_bus for PCI: 00:1f.0
1007 03:35:53.503082 PNP: 0c09.0 enabled
1008 03:35:53.506345 scan_static_bus for PCI: 00:1f.0 done
1009 03:35:53.513131 scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs
1010 03:35:53.516391 PCI: 00:1f.3 scanning...
1011 03:35:53.523128 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1012 03:35:53.523211 PCI: 00:1f.4 scanning...
1013 03:35:53.529485 scan_generic_bus for PCI: 00:1f.4
1014 03:35:53.532766 scan_generic_bus for PCI: 00:1f.4 done
1015 03:35:53.536008 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1016 03:35:53.539252 PCI: 00:1f.5 scanning...
1017 03:35:53.542579 scan_generic_bus for PCI: 00:1f.5
1018 03:35:53.546120 scan_generic_bus for PCI: 00:1f.5 done
1019 03:35:53.552835 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1020 03:35:53.559072 scan_bus: scanning of bus DOMAIN: 0000 took 605060 usecs
1021 03:35:53.562359 scan_static_bus for Root Device done
1022 03:35:53.569601 scan_bus: scanning of bus Root Device took 624913 usecs
1023 03:35:53.569690 done
1024 03:35:53.572960 Chrome EC: UHEPI supported
1025 03:35:53.579090 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1026 03:35:53.582332 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1027 03:35:53.589121 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1028 03:35:53.596535 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1029 03:35:53.599590 SPI flash protection: WPSW=0 SRP0=0
1030 03:35:53.606381 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1031 03:35:53.609536 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1032 03:35:53.612773 found VGA at PCI: 00:02.0
1033 03:35:53.616301 Setting up VGA for PCI: 00:02.0
1034 03:35:53.623016 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1035 03:35:53.626186 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1036 03:35:53.629462 Allocating resources...
1037 03:35:53.632784 Reading resources...
1038 03:35:53.636309 Root Device read_resources bus 0 link: 0
1039 03:35:53.639240 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1040 03:35:53.645816 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1041 03:35:53.649633 DOMAIN: 0000 read_resources bus 0 link: 0
1042 03:35:53.656630 PCI: 00:14.0 read_resources bus 0 link: 0
1043 03:35:53.660079 USB0 port 0 read_resources bus 0 link: 0
1044 03:35:53.668147 USB0 port 0 read_resources bus 0 link: 0 done
1045 03:35:53.671515 PCI: 00:14.0 read_resources bus 0 link: 0 done
1046 03:35:53.678873 PCI: 00:15.0 read_resources bus 1 link: 0
1047 03:35:53.682158 PCI: 00:15.0 read_resources bus 1 link: 0 done
1048 03:35:53.688228 PCI: 00:15.1 read_resources bus 2 link: 0
1049 03:35:53.691582 PCI: 00:15.1 read_resources bus 2 link: 0 done
1050 03:35:53.699147 PCI: 00:19.0 read_resources bus 3 link: 0
1051 03:35:53.705751 PCI: 00:19.0 read_resources bus 3 link: 0 done
1052 03:35:53.709315 PCI: 00:1d.0 read_resources bus 1 link: 0
1053 03:35:53.715510 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1054 03:35:53.719395 PCI: 00:1e.2 read_resources bus 4 link: 0
1055 03:35:53.725518 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1056 03:35:53.729326 PCI: 00:1e.3 read_resources bus 5 link: 0
1057 03:35:53.735773 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1058 03:35:53.739349 PCI: 00:1f.0 read_resources bus 0 link: 0
1059 03:35:53.745467 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1060 03:35:53.752503 DOMAIN: 0000 read_resources bus 0 link: 0 done
1061 03:35:53.755684 Root Device read_resources bus 0 link: 0 done
1062 03:35:53.758975 Done reading resources.
1063 03:35:53.762413 Show resources in subtree (Root Device)...After reading.
1064 03:35:53.768640 Root Device child on link 0 CPU_CLUSTER: 0
1065 03:35:53.772057 CPU_CLUSTER: 0 child on link 0 APIC: 00
1066 03:35:53.772141 APIC: 00
1067 03:35:53.775405 APIC: 03
1068 03:35:53.775490 APIC: 06
1069 03:35:53.778758 APIC: 01
1070 03:35:53.778843 APIC: 02
1071 03:35:53.778906 APIC: 04
1072 03:35:53.782118 APIC: 05
1073 03:35:53.782195 APIC: 07
1074 03:35:53.785590 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1075 03:35:53.795079 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1076 03:35:53.848615 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1077 03:35:53.849381 PCI: 00:00.0
1078 03:35:53.849668 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1079 03:35:53.849769 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1080 03:35:53.849861 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1081 03:35:53.851430 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1082 03:35:53.898407 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1083 03:35:53.898787 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1084 03:35:53.898894 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1085 03:35:53.899012 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1086 03:35:53.899129 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1087 03:35:53.945851 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1088 03:35:53.946164 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1089 03:35:53.946245 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1090 03:35:53.947120 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1091 03:35:53.947424 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1092 03:35:53.950368 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1093 03:35:53.957201 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1094 03:35:53.960560 PCI: 00:02.0
1095 03:35:53.970635 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1096 03:35:53.980574 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1097 03:35:53.986926 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1098 03:35:53.990474 PCI: 00:04.0
1099 03:35:53.990557 PCI: 00:08.0
1100 03:35:54.000479 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1101 03:35:54.003407 PCI: 00:12.0
1102 03:35:54.013474 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1103 03:35:54.017019 PCI: 00:14.0 child on link 0 USB0 port 0
1104 03:35:54.026466 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1105 03:35:54.030402 USB0 port 0 child on link 0 USB2 port 0
1106 03:35:54.033140 USB2 port 0
1107 03:35:54.037231 USB2 port 1
1108 03:35:54.037336 USB2 port 2
1109 03:35:54.040118 USB2 port 3
1110 03:35:54.040237 USB2 port 5
1111 03:35:54.043334 USB2 port 6
1112 03:35:54.043449 USB2 port 9
1113 03:35:54.046405 USB3 port 0
1114 03:35:54.046516 USB3 port 1
1115 03:35:54.049872 USB3 port 2
1116 03:35:54.049986 USB3 port 3
1117 03:35:54.053472 USB3 port 4
1118 03:35:54.053604 PCI: 00:14.2
1119 03:35:54.063578 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1120 03:35:54.072935 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1121 03:35:54.076579 PCI: 00:14.3
1122 03:35:54.086602 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1123 03:35:54.089403 PCI: 00:15.0 child on link 0 I2C: 01:15
1124 03:35:54.099201 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 03:35:54.102887 I2C: 01:15
1126 03:35:54.106269 PCI: 00:15.1 child on link 0 I2C: 02:5d
1127 03:35:54.116115 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1128 03:35:54.116255 I2C: 02:5d
1129 03:35:54.119574 GENERIC: 0.0
1130 03:35:54.119682 PCI: 00:16.0
1131 03:35:54.129180 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 03:35:54.132380 PCI: 00:17.0
1133 03:35:54.142527 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1134 03:35:54.149001 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1135 03:35:54.158981 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1136 03:35:54.165541 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1137 03:35:54.175898 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1138 03:35:54.185583 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1139 03:35:54.188834 PCI: 00:19.0 child on link 0 I2C: 03:1a
1140 03:35:54.198403 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1141 03:35:54.198565 I2C: 03:1a
1142 03:35:54.201854 I2C: 03:38
1143 03:35:54.201970 I2C: 03:39
1144 03:35:54.205099 I2C: 03:3a
1145 03:35:54.205210 I2C: 03:3b
1146 03:35:54.211741 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1147 03:35:54.218587 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1148 03:35:54.229060 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1149 03:35:54.238713 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1150 03:35:54.238845 PCI: 01:00.0
1151 03:35:54.248786 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 03:35:54.252169 PCI: 00:1e.0
1153 03:35:54.261585 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1154 03:35:54.271757 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1155 03:35:54.278137 PCI: 00:1e.2 child on link 0 SPI: 00
1156 03:35:54.288404 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 03:35:54.288557 SPI: 00
1158 03:35:54.291837 PCI: 00:1e.3 child on link 0 SPI: 01
1159 03:35:54.301477 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 03:35:54.301631 SPI: 01
1161 03:35:54.307931 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1162 03:35:54.314689 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1163 03:35:54.324377 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1164 03:35:54.328147 PNP: 0c09.0
1165 03:35:54.334489 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1166 03:35:54.337875 PCI: 00:1f.3
1167 03:35:54.347877 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 03:35:54.358086 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1169 03:35:54.358202 PCI: 00:1f.4
1170 03:35:54.367718 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1171 03:35:54.377756 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1172 03:35:54.377879 PCI: 00:1f.5
1173 03:35:54.387302 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1174 03:35:54.394207 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1175 03:35:54.400735 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1176 03:35:54.407586 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1177 03:35:54.410972 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1178 03:35:54.414140 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1179 03:35:54.417195 PCI: 00:17.0 18 * [0x60 - 0x67] io
1180 03:35:54.421131 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1181 03:35:54.430308 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1182 03:35:54.437551 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1183 03:35:54.443476 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1184 03:35:54.453670 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1185 03:35:54.460552 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1186 03:35:54.463291 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1187 03:35:54.469995 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1188 03:35:54.476885 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1189 03:35:54.480240 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1190 03:35:54.483628 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1191 03:35:54.490268 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1192 03:35:54.493587 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1193 03:35:54.500130 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1194 03:35:54.503102 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1195 03:35:54.510172 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1196 03:35:54.513070 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1197 03:35:54.520088 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1198 03:35:54.523088 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1199 03:35:54.529855 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1200 03:35:54.532967 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1201 03:35:54.539792 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1202 03:35:54.542889 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1203 03:35:54.549531 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1204 03:35:54.552689 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1205 03:35:54.556614 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1206 03:35:54.562903 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1207 03:35:54.566257 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1208 03:35:54.572339 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1209 03:35:54.575780 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1210 03:35:54.582583 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1211 03:35:54.589239 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1212 03:35:54.596123 avoid_fixed_resources: DOMAIN: 0000
1213 03:35:54.599440 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1214 03:35:54.605766 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1215 03:35:54.612398 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1216 03:35:54.622481 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1217 03:35:54.628748 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1218 03:35:54.635362 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1219 03:35:54.645093 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1220 03:35:54.651589 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1221 03:35:54.658582 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1222 03:35:54.668277 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1223 03:35:54.674807 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1224 03:35:54.681456 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1225 03:35:54.684875 Setting resources...
1226 03:35:54.691623 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1227 03:35:54.695048 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1228 03:35:54.698493 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1229 03:35:54.701407 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1230 03:35:54.705059 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1231 03:35:54.711092 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1232 03:35:54.718012 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 03:35:54.724968 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 03:35:54.731539 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1235 03:35:54.737651 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 03:35:54.744728 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 03:35:54.747852 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 03:35:54.750842 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1239 03:35:54.758136 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1240 03:35:54.760921 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1241 03:35:54.767310 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1242 03:35:54.771040 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1243 03:35:54.777124 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1244 03:35:54.780554 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1245 03:35:54.787063 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1246 03:35:54.790966 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1247 03:35:54.797603 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1248 03:35:54.800446 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1249 03:35:54.807170 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1250 03:35:54.809947 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1251 03:35:54.817023 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1252 03:35:54.820507 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1253 03:35:54.826678 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1254 03:35:54.830218 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1255 03:35:54.836924 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1256 03:35:54.839968 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1257 03:35:54.843452 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1258 03:35:54.853382 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1259 03:35:54.860136 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1260 03:35:54.866316 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1261 03:35:54.872859 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1262 03:35:54.879487 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1263 03:35:54.886463 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1264 03:35:54.889416 Root Device assign_resources, bus 0 link: 0
1265 03:35:54.896541 DOMAIN: 0000 assign_resources, bus 0 link: 0
1266 03:35:54.902793 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1267 03:35:54.912761 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1268 03:35:54.919551 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1269 03:35:54.929365 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1270 03:35:54.935559 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1271 03:35:54.945727 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1272 03:35:54.949000 PCI: 00:14.0 assign_resources, bus 0 link: 0
1273 03:35:54.955981 PCI: 00:14.0 assign_resources, bus 0 link: 0
1274 03:35:54.962835 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1275 03:35:54.972690 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1276 03:35:54.979033 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1277 03:35:54.988997 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1278 03:35:54.992082 PCI: 00:15.0 assign_resources, bus 1 link: 0
1279 03:35:54.995705 PCI: 00:15.0 assign_resources, bus 1 link: 0
1280 03:35:55.005284 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1281 03:35:55.008436 PCI: 00:15.1 assign_resources, bus 2 link: 0
1282 03:35:55.015148 PCI: 00:15.1 assign_resources, bus 2 link: 0
1283 03:35:55.021586 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1284 03:35:55.031505 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1285 03:35:55.038538 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1286 03:35:55.044652 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1287 03:35:55.055071 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1288 03:35:55.061333 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1289 03:35:55.067991 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1290 03:35:55.078319 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1291 03:35:55.080949 PCI: 00:19.0 assign_resources, bus 3 link: 0
1292 03:35:55.087711 PCI: 00:19.0 assign_resources, bus 3 link: 0
1293 03:35:55.094535 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1294 03:35:55.104388 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1295 03:35:55.114111 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1296 03:35:55.117314 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1297 03:35:55.124204 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1298 03:35:55.130687 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1299 03:35:55.137460 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1300 03:35:55.147577 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1301 03:35:55.151016 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1302 03:35:55.157710 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1303 03:35:55.164111 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1304 03:35:55.170526 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1305 03:35:55.174055 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1306 03:35:55.177134 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1307 03:35:55.184398 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1308 03:35:55.187683 LPC: Trying to open IO window from 800 size 1ff
1309 03:35:55.197199 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1310 03:35:55.204004 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1311 03:35:55.213775 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1312 03:35:55.220690 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1313 03:35:55.226911 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 03:35:55.230126 Root Device assign_resources, bus 0 link: 0
1315 03:35:55.233871 Done setting resources.
1316 03:35:55.240140 Show resources in subtree (Root Device)...After assigning values.
1317 03:35:55.243951 Root Device child on link 0 CPU_CLUSTER: 0
1318 03:35:55.247207 CPU_CLUSTER: 0 child on link 0 APIC: 00
1319 03:35:55.250512 APIC: 00
1320 03:35:55.250617 APIC: 03
1321 03:35:55.250710 APIC: 06
1322 03:35:55.254057 APIC: 01
1323 03:35:55.254140 APIC: 02
1324 03:35:55.257071 APIC: 04
1325 03:35:55.257157 APIC: 05
1326 03:35:55.257221 APIC: 07
1327 03:35:55.263269 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1328 03:35:55.273182 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1329 03:35:55.283275 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1330 03:35:55.283394 PCI: 00:00.0
1331 03:35:55.293241 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1332 03:35:55.303143 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1333 03:35:55.313101 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1334 03:35:55.322921 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1335 03:35:55.332742 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1336 03:35:55.343086 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1337 03:35:55.349091 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1338 03:35:55.359242 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1339 03:35:55.369384 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1340 03:35:55.379439 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1341 03:35:55.388805 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1342 03:35:55.395835 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1343 03:35:55.405472 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1344 03:35:55.415518 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1345 03:35:55.425265 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1346 03:35:55.435197 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1347 03:35:55.435291 PCI: 00:02.0
1348 03:35:55.448523 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1349 03:35:55.458850 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1350 03:35:55.468317 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1351 03:35:55.468405 PCI: 00:04.0
1352 03:35:55.471319 PCI: 00:08.0
1353 03:35:55.481492 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1354 03:35:55.481581 PCI: 00:12.0
1355 03:35:55.491236 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1356 03:35:55.497856 PCI: 00:14.0 child on link 0 USB0 port 0
1357 03:35:55.507956 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1358 03:35:55.511414 USB0 port 0 child on link 0 USB2 port 0
1359 03:35:55.514350 USB2 port 0
1360 03:35:55.514448 USB2 port 1
1361 03:35:55.517673 USB2 port 2
1362 03:35:55.517777 USB2 port 3
1363 03:35:55.521219 USB2 port 5
1364 03:35:55.521325 USB2 port 6
1365 03:35:55.524228 USB2 port 9
1366 03:35:55.524336 USB3 port 0
1367 03:35:55.528391 USB3 port 1
1368 03:35:55.528474 USB3 port 2
1369 03:35:55.530941 USB3 port 3
1370 03:35:55.531023 USB3 port 4
1371 03:35:55.534352 PCI: 00:14.2
1372 03:35:55.544239 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1373 03:35:55.553991 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1374 03:35:55.557213 PCI: 00:14.3
1375 03:35:55.567153 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1376 03:35:55.570675 PCI: 00:15.0 child on link 0 I2C: 01:15
1377 03:35:55.580849 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1378 03:35:55.584120 I2C: 01:15
1379 03:35:55.587298 PCI: 00:15.1 child on link 0 I2C: 02:5d
1380 03:35:55.596859 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1381 03:35:55.600730 I2C: 02:5d
1382 03:35:55.600825 GENERIC: 0.0
1383 03:35:55.603768 PCI: 00:16.0
1384 03:35:55.613439 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1385 03:35:55.613529 PCI: 00:17.0
1386 03:35:55.623760 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1387 03:35:55.633793 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1388 03:35:55.643530 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1389 03:35:55.653282 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1390 03:35:55.663109 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1391 03:35:55.672937 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1392 03:35:55.676278 PCI: 00:19.0 child on link 0 I2C: 03:1a
1393 03:35:55.686907 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1394 03:35:55.689541 I2C: 03:1a
1395 03:35:55.689639 I2C: 03:38
1396 03:35:55.692881 I2C: 03:39
1397 03:35:55.692966 I2C: 03:3a
1398 03:35:55.693052 I2C: 03:3b
1399 03:35:55.699720 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1400 03:35:55.709729 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1401 03:35:55.719957 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1402 03:35:55.729477 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1403 03:35:55.729564 PCI: 01:00.0
1404 03:35:55.742872 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1405 03:35:55.742963 PCI: 00:1e.0
1406 03:35:55.752673 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1407 03:35:55.762332 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1408 03:35:55.769204 PCI: 00:1e.2 child on link 0 SPI: 00
1409 03:35:55.779006 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1410 03:35:55.779117 SPI: 00
1411 03:35:55.782145 PCI: 00:1e.3 child on link 0 SPI: 01
1412 03:35:55.795436 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1413 03:35:55.795523 SPI: 01
1414 03:35:55.798879 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1415 03:35:55.808592 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1416 03:35:55.818509 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1417 03:35:55.818624 PNP: 0c09.0
1418 03:35:55.828778 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1419 03:35:55.828865 PCI: 00:1f.3
1420 03:35:55.838511 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1421 03:35:55.848294 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1422 03:35:55.851554 PCI: 00:1f.4
1423 03:35:55.861301 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1424 03:35:55.871728 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1425 03:35:55.871811 PCI: 00:1f.5
1426 03:35:55.881662 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1427 03:35:55.885137 Done allocating resources.
1428 03:35:55.891680 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1429 03:35:55.895345 Enabling resources...
1430 03:35:55.898023 PCI: 00:00.0 subsystem <- 8086/9b61
1431 03:35:55.901641 PCI: 00:00.0 cmd <- 06
1432 03:35:55.904871 PCI: 00:02.0 subsystem <- 8086/9b41
1433 03:35:55.908267 PCI: 00:02.0 cmd <- 03
1434 03:35:55.908386 PCI: 00:08.0 cmd <- 06
1435 03:35:55.914899 PCI: 00:12.0 subsystem <- 8086/02f9
1436 03:35:55.915014 PCI: 00:12.0 cmd <- 02
1437 03:35:55.918032 PCI: 00:14.0 subsystem <- 8086/02ed
1438 03:35:55.921930 PCI: 00:14.0 cmd <- 02
1439 03:35:55.924989 PCI: 00:14.2 cmd <- 02
1440 03:35:55.928176 PCI: 00:14.3 subsystem <- 8086/02f0
1441 03:35:55.931535 PCI: 00:14.3 cmd <- 02
1442 03:35:55.934750 PCI: 00:15.0 subsystem <- 8086/02e8
1443 03:35:55.938086 PCI: 00:15.0 cmd <- 02
1444 03:35:55.941366 PCI: 00:15.1 subsystem <- 8086/02e9
1445 03:35:55.944639 PCI: 00:15.1 cmd <- 02
1446 03:35:55.947833 PCI: 00:16.0 subsystem <- 8086/02e0
1447 03:35:55.951149 PCI: 00:16.0 cmd <- 02
1448 03:35:55.954448 PCI: 00:17.0 subsystem <- 8086/02d3
1449 03:35:55.954529 PCI: 00:17.0 cmd <- 03
1450 03:35:55.961326 PCI: 00:19.0 subsystem <- 8086/02c5
1451 03:35:55.961407 PCI: 00:19.0 cmd <- 02
1452 03:35:55.964606 PCI: 00:1d.0 bridge ctrl <- 0013
1453 03:35:55.967652 PCI: 00:1d.0 subsystem <- 8086/02b0
1454 03:35:55.971268 PCI: 00:1d.0 cmd <- 06
1455 03:35:55.974805 PCI: 00:1e.0 subsystem <- 8086/02a8
1456 03:35:55.978041 PCI: 00:1e.0 cmd <- 06
1457 03:35:55.981273 PCI: 00:1e.2 subsystem <- 8086/02aa
1458 03:35:55.984687 PCI: 00:1e.2 cmd <- 06
1459 03:35:55.988132 PCI: 00:1e.3 subsystem <- 8086/02ab
1460 03:35:55.991477 PCI: 00:1e.3 cmd <- 02
1461 03:35:55.994901 PCI: 00:1f.0 subsystem <- 8086/0284
1462 03:35:55.997613 PCI: 00:1f.0 cmd <- 407
1463 03:35:56.001327 PCI: 00:1f.3 subsystem <- 8086/02c8
1464 03:35:56.004594 PCI: 00:1f.3 cmd <- 02
1465 03:35:56.008021 PCI: 00:1f.4 subsystem <- 8086/02a3
1466 03:35:56.010809 PCI: 00:1f.4 cmd <- 03
1467 03:35:56.014084 PCI: 00:1f.5 subsystem <- 8086/02a4
1468 03:35:56.014165 PCI: 00:1f.5 cmd <- 406
1469 03:35:56.024684 PCI: 01:00.0 cmd <- 02
1470 03:35:56.029824 done.
1471 03:35:56.043536 ME: Version: 14.0.39.1367
1472 03:35:56.050179 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1473 03:35:56.053558 Initializing devices...
1474 03:35:56.053677 Root Device init ...
1475 03:35:56.060397 Chrome EC: Set SMI mask to 0x0000000000000000
1476 03:35:56.063107 Chrome EC: clear events_b mask to 0x0000000000000000
1477 03:35:56.069956 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1478 03:35:56.076263 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1479 03:35:56.083133 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1480 03:35:56.086799 Chrome EC: Set WAKE mask to 0x0000000000000000
1481 03:35:56.089853 Root Device init finished in 35213 usecs
1482 03:35:56.093352 CPU_CLUSTER: 0 init ...
1483 03:35:56.099673 CPU_CLUSTER: 0 init finished in 2447 usecs
1484 03:35:56.104005 PCI: 00:00.0 init ...
1485 03:35:56.107347 CPU TDP: 15 Watts
1486 03:35:56.110886 CPU PL2 = 64 Watts
1487 03:35:56.114220 PCI: 00:00.0 init finished in 7078 usecs
1488 03:35:56.117624 PCI: 00:02.0 init ...
1489 03:35:56.120727 PCI: 00:02.0 init finished in 2244 usecs
1490 03:35:56.124430 PCI: 00:08.0 init ...
1491 03:35:56.127096 PCI: 00:08.0 init finished in 2254 usecs
1492 03:35:56.130663 PCI: 00:12.0 init ...
1493 03:35:56.134077 PCI: 00:12.0 init finished in 2252 usecs
1494 03:35:56.137255 PCI: 00:14.0 init ...
1495 03:35:56.140716 PCI: 00:14.0 init finished in 2252 usecs
1496 03:35:56.144032 PCI: 00:14.2 init ...
1497 03:35:56.147506 PCI: 00:14.2 init finished in 2252 usecs
1498 03:35:56.150644 PCI: 00:14.3 init ...
1499 03:35:56.154028 PCI: 00:14.3 init finished in 2272 usecs
1500 03:35:56.157330 PCI: 00:15.0 init ...
1501 03:35:56.161116 DW I2C bus 0 at 0xd121f000 (400 KHz)
1502 03:35:56.164174 PCI: 00:15.0 init finished in 5976 usecs
1503 03:35:56.167488 PCI: 00:15.1 init ...
1504 03:35:56.170384 DW I2C bus 1 at 0xd1220000 (400 KHz)
1505 03:35:56.173802 PCI: 00:15.1 init finished in 5980 usecs
1506 03:35:56.177976 PCI: 00:16.0 init ...
1507 03:35:56.180790 PCI: 00:16.0 init finished in 2252 usecs
1508 03:35:56.184359 PCI: 00:19.0 init ...
1509 03:35:56.188264 DW I2C bus 4 at 0xd1222000 (400 KHz)
1510 03:35:56.194990 PCI: 00:19.0 init finished in 5978 usecs
1511 03:35:56.195073 PCI: 00:1d.0 init ...
1512 03:35:56.198332 Initializing PCH PCIe bridge.
1513 03:35:56.201437 PCI: 00:1d.0 init finished in 5286 usecs
1514 03:35:56.205966 PCI: 00:1f.0 init ...
1515 03:35:56.209781 IOAPIC: Initializing IOAPIC at 0xfec00000
1516 03:35:56.216056 IOAPIC: Bootstrap Processor Local APIC = 0x00
1517 03:35:56.216164 IOAPIC: ID = 0x02
1518 03:35:56.219357 IOAPIC: Dumping registers
1519 03:35:56.222799 reg 0x0000: 0x02000000
1520 03:35:56.226348 reg 0x0001: 0x00770020
1521 03:35:56.226450 reg 0x0002: 0x00000000
1522 03:35:56.232884 PCI: 00:1f.0 init finished in 23551 usecs
1523 03:35:56.236000 PCI: 00:1f.4 init ...
1524 03:35:56.239538 PCI: 00:1f.4 init finished in 2263 usecs
1525 03:35:56.250181 PCI: 01:00.0 init ...
1526 03:35:56.253870 PCI: 01:00.0 init finished in 2251 usecs
1527 03:35:56.258006 PNP: 0c09.0 init ...
1528 03:35:56.261451 Google Chrome EC uptime: 11.092 seconds
1529 03:35:56.268280 Google Chrome AP resets since EC boot: 0
1530 03:35:56.270891 Google Chrome most recent AP reset causes:
1531 03:35:56.277668 Google Chrome EC reset flags at last EC boot: reset-pin
1532 03:35:56.281047 PNP: 0c09.0 init finished in 20630 usecs
1533 03:35:56.284249 Devices initialized
1534 03:35:56.287804 Show all devs... After init.
1535 03:35:56.287892 Root Device: enabled 1
1536 03:35:56.291312 CPU_CLUSTER: 0: enabled 1
1537 03:35:56.293953 DOMAIN: 0000: enabled 1
1538 03:35:56.294039 APIC: 00: enabled 1
1539 03:35:56.297963 PCI: 00:00.0: enabled 1
1540 03:35:56.300879 PCI: 00:02.0: enabled 1
1541 03:35:56.304260 PCI: 00:04.0: enabled 0
1542 03:35:56.304360 PCI: 00:05.0: enabled 0
1543 03:35:56.308166 PCI: 00:12.0: enabled 1
1544 03:35:56.310803 PCI: 00:12.5: enabled 0
1545 03:35:56.314093 PCI: 00:12.6: enabled 0
1546 03:35:56.314215 PCI: 00:14.0: enabled 1
1547 03:35:56.317514 PCI: 00:14.1: enabled 0
1548 03:35:56.321019 PCI: 00:14.3: enabled 1
1549 03:35:56.321096 PCI: 00:14.5: enabled 0
1550 03:35:56.323912 PCI: 00:15.0: enabled 1
1551 03:35:56.327547 PCI: 00:15.1: enabled 1
1552 03:35:56.330987 PCI: 00:15.2: enabled 0
1553 03:35:56.331096 PCI: 00:15.3: enabled 0
1554 03:35:56.333772 PCI: 00:16.0: enabled 1
1555 03:35:56.337504 PCI: 00:16.1: enabled 0
1556 03:35:56.340807 PCI: 00:16.2: enabled 0
1557 03:35:56.340891 PCI: 00:16.3: enabled 0
1558 03:35:56.344153 PCI: 00:16.4: enabled 0
1559 03:35:56.347512 PCI: 00:16.5: enabled 0
1560 03:35:56.350864 PCI: 00:17.0: enabled 1
1561 03:35:56.350946 PCI: 00:19.0: enabled 1
1562 03:35:56.353812 PCI: 00:19.1: enabled 0
1563 03:35:56.357002 PCI: 00:19.2: enabled 0
1564 03:35:56.357087 PCI: 00:1a.0: enabled 0
1565 03:35:56.360815 PCI: 00:1c.0: enabled 0
1566 03:35:56.363694 PCI: 00:1c.1: enabled 0
1567 03:35:56.366906 PCI: 00:1c.2: enabled 0
1568 03:35:56.366981 PCI: 00:1c.3: enabled 0
1569 03:35:56.370919 PCI: 00:1c.4: enabled 0
1570 03:35:56.373543 PCI: 00:1c.5: enabled 0
1571 03:35:56.376973 PCI: 00:1c.6: enabled 0
1572 03:35:56.377076 PCI: 00:1c.7: enabled 0
1573 03:35:56.380655 PCI: 00:1d.0: enabled 1
1574 03:35:56.383978 PCI: 00:1d.1: enabled 0
1575 03:35:56.387047 PCI: 00:1d.2: enabled 0
1576 03:35:56.387130 PCI: 00:1d.3: enabled 0
1577 03:35:56.390253 PCI: 00:1d.4: enabled 0
1578 03:35:56.393728 PCI: 00:1d.5: enabled 0
1579 03:35:56.397226 PCI: 00:1e.0: enabled 1
1580 03:35:56.397310 PCI: 00:1e.1: enabled 0
1581 03:35:56.400008 PCI: 00:1e.2: enabled 1
1582 03:35:56.404063 PCI: 00:1e.3: enabled 1
1583 03:35:56.404146 PCI: 00:1f.0: enabled 1
1584 03:35:56.406811 PCI: 00:1f.1: enabled 0
1585 03:35:56.410432 PCI: 00:1f.2: enabled 0
1586 03:35:56.413760 PCI: 00:1f.3: enabled 1
1587 03:35:56.413844 PCI: 00:1f.4: enabled 1
1588 03:35:56.416759 PCI: 00:1f.5: enabled 1
1589 03:35:56.420062 PCI: 00:1f.6: enabled 0
1590 03:35:56.423620 USB0 port 0: enabled 1
1591 03:35:56.423703 I2C: 01:15: enabled 1
1592 03:35:56.426763 I2C: 02:5d: enabled 1
1593 03:35:56.430491 GENERIC: 0.0: enabled 1
1594 03:35:56.430574 I2C: 03:1a: enabled 1
1595 03:35:56.433505 I2C: 03:38: enabled 1
1596 03:35:56.436568 I2C: 03:39: enabled 1
1597 03:35:56.436678 I2C: 03:3a: enabled 1
1598 03:35:56.440164 I2C: 03:3b: enabled 1
1599 03:35:56.443707 PCI: 00:00.0: enabled 1
1600 03:35:56.443790 SPI: 00: enabled 1
1601 03:35:56.446619 SPI: 01: enabled 1
1602 03:35:56.450084 PNP: 0c09.0: enabled 1
1603 03:35:56.450167 USB2 port 0: enabled 1
1604 03:35:56.453507 USB2 port 1: enabled 1
1605 03:35:56.456836 USB2 port 2: enabled 0
1606 03:35:56.456946 USB2 port 3: enabled 0
1607 03:35:56.460161 USB2 port 5: enabled 0
1608 03:35:56.463152 USB2 port 6: enabled 1
1609 03:35:56.466561 USB2 port 9: enabled 1
1610 03:35:56.466644 USB3 port 0: enabled 1
1611 03:35:56.469519 USB3 port 1: enabled 1
1612 03:35:56.473047 USB3 port 2: enabled 1
1613 03:35:56.473130 USB3 port 3: enabled 1
1614 03:35:56.476729 USB3 port 4: enabled 0
1615 03:35:56.479664 APIC: 03: enabled 1
1616 03:35:56.479773 APIC: 06: enabled 1
1617 03:35:56.483518 APIC: 01: enabled 1
1618 03:35:56.486658 APIC: 02: enabled 1
1619 03:35:56.486735 APIC: 04: enabled 1
1620 03:35:56.489665 APIC: 05: enabled 1
1621 03:35:56.489748 APIC: 07: enabled 1
1622 03:35:56.492822 PCI: 00:08.0: enabled 1
1623 03:35:56.496523 PCI: 00:14.2: enabled 1
1624 03:35:56.499847 PCI: 01:00.0: enabled 1
1625 03:35:56.502882 Disabling ACPI via APMC:
1626 03:35:56.502986 done.
1627 03:35:56.509731 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1628 03:35:56.513290 ELOG: NV offset 0xaf0000 size 0x4000
1629 03:35:56.519502 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1630 03:35:56.526772 ELOG: Event(17) added with size 13 at 2024-02-07 03:33:12 UTC
1631 03:35:56.533463 ELOG: Event(92) added with size 9 at 2024-02-07 03:33:12 UTC
1632 03:35:56.539928 ELOG: Event(93) added with size 9 at 2024-02-07 03:33:12 UTC
1633 03:35:56.546155 ELOG: Event(9A) added with size 9 at 2024-02-07 03:33:12 UTC
1634 03:35:56.553298 ELOG: Event(9E) added with size 10 at 2024-02-07 03:33:12 UTC
1635 03:35:56.559492 ELOG: Event(9F) added with size 14 at 2024-02-07 03:33:12 UTC
1636 03:35:56.563176 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1637 03:35:56.570120 ELOG: Event(A1) added with size 10 at 2024-02-07 03:33:12 UTC
1638 03:35:56.580156 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1639 03:35:56.586385 ELOG: Event(A0) added with size 9 at 2024-02-07 03:33:13 UTC
1640 03:35:56.590046 elog_add_boot_reason: Logged dev mode boot
1641 03:35:56.593193 Finalize devices...
1642 03:35:56.593277 PCI: 00:17.0 final
1643 03:35:56.596385 Devices finalized
1644 03:35:56.600008 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1645 03:35:56.606210 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1646 03:35:56.609420 ME: HFSTS1 : 0x90000245
1647 03:35:56.612996 ME: HFSTS2 : 0x3B850126
1648 03:35:56.619909 ME: HFSTS3 : 0x00000020
1649 03:35:56.622538 ME: HFSTS4 : 0x00004800
1650 03:35:56.625950 ME: HFSTS5 : 0x00000000
1651 03:35:56.629534 ME: HFSTS6 : 0x40400006
1652 03:35:56.632788 ME: Manufacturing Mode : NO
1653 03:35:56.636084 ME: FW Partition Table : OK
1654 03:35:56.639473 ME: Bringup Loader Failure : NO
1655 03:35:56.642338 ME: Firmware Init Complete : YES
1656 03:35:56.645804 ME: Boot Options Present : NO
1657 03:35:56.649488 ME: Update In Progress : NO
1658 03:35:56.652964 ME: D0i3 Support : YES
1659 03:35:56.655660 ME: Low Power State Enabled : NO
1660 03:35:56.659389 ME: CPU Replaced : NO
1661 03:35:56.662208 ME: CPU Replacement Valid : YES
1662 03:35:56.665493 ME: Current Working State : 5
1663 03:35:56.669099 ME: Current Operation State : 1
1664 03:35:56.672718 ME: Current Operation Mode : 0
1665 03:35:56.675494 ME: Error Code : 0
1666 03:35:56.678941 ME: CPU Debug Disabled : YES
1667 03:35:56.682162 ME: TXT Support : NO
1668 03:35:56.688575 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1669 03:35:56.695775 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1670 03:35:56.695886 CBFS @ c08000 size 3f8000
1671 03:35:56.701955 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1672 03:35:56.705258 CBFS: Locating 'fallback/dsdt.aml'
1673 03:35:56.708255 CBFS: Found @ offset 10bb80 size 3fa5
1674 03:35:56.715209 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1675 03:35:56.718447 CBFS @ c08000 size 3f8000
1676 03:35:56.725111 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1677 03:35:56.725201 CBFS: Locating 'fallback/slic'
1678 03:35:56.730707 CBFS: 'fallback/slic' not found.
1679 03:35:56.737395 ACPI: Writing ACPI tables at 99b3e000.
1680 03:35:56.737483 ACPI: * FACS
1681 03:35:56.740349 ACPI: * DSDT
1682 03:35:56.743475 Ramoops buffer: 0x100000@0x99a3d000.
1683 03:35:56.746927 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1684 03:35:56.753564 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1685 03:35:56.757096 Google Chrome EC: version:
1686 03:35:56.761365 ro: helios_v2.0.2659-56403530b
1687 03:35:56.763862 rw: helios_v2.0.2849-c41de27e7d
1688 03:35:56.763948 running image: 1
1689 03:35:56.768040 ACPI: * FADT
1690 03:35:56.768126 SCI is IRQ9
1691 03:35:56.774464 ACPI: added table 1/32, length now 40
1692 03:35:56.774549 ACPI: * SSDT
1693 03:35:56.777915 Found 1 CPU(s) with 8 core(s) each.
1694 03:35:56.780965 Error: Could not locate 'wifi_sar' in VPD.
1695 03:35:56.787749 Checking CBFS for default SAR values
1696 03:35:56.791074 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1697 03:35:56.794662 CBFS @ c08000 size 3f8000
1698 03:35:56.800811 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1699 03:35:56.804433 CBFS: Locating 'wifi_sar_defaults.hex'
1700 03:35:56.807966 CBFS: Found @ offset 5fac0 size 77
1701 03:35:56.810628 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1702 03:35:56.817848 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1703 03:35:56.820872 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1704 03:35:56.827421 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1705 03:35:56.830930 failed to find key in VPD: dsm_calib_r0_0
1706 03:35:56.840878 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1707 03:35:56.843874 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1708 03:35:56.847113 failed to find key in VPD: dsm_calib_r0_1
1709 03:35:56.857394 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1710 03:35:56.863619 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1711 03:35:56.866848 failed to find key in VPD: dsm_calib_r0_2
1712 03:35:56.876707 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1713 03:35:56.880195 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1714 03:35:56.886425 failed to find key in VPD: dsm_calib_r0_3
1715 03:35:56.893434 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1716 03:35:56.900034 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1717 03:35:56.903574 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1718 03:35:56.909799 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1719 03:35:56.913454 EC returned error result code 1
1720 03:35:56.917114 EC returned error result code 1
1721 03:35:56.920483 EC returned error result code 1
1722 03:35:56.923413 PS2K: Bad resp from EC. Vivaldi disabled!
1723 03:35:56.930306 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 03:35:56.936723 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1725 03:35:56.940001 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1726 03:35:56.947070 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1727 03:35:56.950133 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1728 03:35:56.956842 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1729 03:35:56.963180 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1730 03:35:56.969938 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1731 03:35:56.973369 ACPI: added table 2/32, length now 44
1732 03:35:56.973452 ACPI: * MCFG
1733 03:35:56.979892 ACPI: added table 3/32, length now 48
1734 03:35:56.979975 ACPI: * TPM2
1735 03:35:56.983724 TPM2 log created at 99a2d000
1736 03:35:56.986203 ACPI: added table 4/32, length now 52
1737 03:35:56.989940 ACPI: * MADT
1738 03:35:56.990032 SCI is IRQ9
1739 03:35:56.993473 ACPI: added table 5/32, length now 56
1740 03:35:56.996601 current = 99b43ac0
1741 03:35:56.996712 ACPI: * DMAR
1742 03:35:56.999791 ACPI: added table 6/32, length now 60
1743 03:35:57.003148 ACPI: * IGD OpRegion
1744 03:35:57.006437 GMA: Found VBT in CBFS
1745 03:35:57.009774 GMA: Found valid VBT in CBFS
1746 03:35:57.013273 ACPI: added table 7/32, length now 64
1747 03:35:57.013357 ACPI: * HPET
1748 03:35:57.016059 ACPI: added table 8/32, length now 68
1749 03:35:57.019579 ACPI: done.
1750 03:35:57.023089 ACPI tables: 31744 bytes.
1751 03:35:57.026626 smbios_write_tables: 99a2c000
1752 03:35:57.029265 EC returned error result code 3
1753 03:35:57.032881 Couldn't obtain OEM name from CBI
1754 03:35:57.036417 Create SMBIOS type 17
1755 03:35:57.036528 PCI: 00:00.0 (Intel Cannonlake)
1756 03:35:57.039830 PCI: 00:14.3 (Intel WiFi)
1757 03:35:57.042526 SMBIOS tables: 939 bytes.
1758 03:35:57.046016 Writing table forward entry at 0x00000500
1759 03:35:57.052690 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1760 03:35:57.055975 Writing coreboot table at 0x99b62000
1761 03:35:57.062750 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1762 03:35:57.066156 1. 0000000000001000-000000000009ffff: RAM
1763 03:35:57.073039 2. 00000000000a0000-00000000000fffff: RESERVED
1764 03:35:57.076303 3. 0000000000100000-0000000099a2bfff: RAM
1765 03:35:57.082719 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1766 03:35:57.086047 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1767 03:35:57.092458 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1768 03:35:57.098837 7. 000000009a000000-000000009f7fffff: RESERVED
1769 03:35:57.102589 8. 00000000e0000000-00000000efffffff: RESERVED
1770 03:35:57.106288 9. 00000000fc000000-00000000fc000fff: RESERVED
1771 03:35:57.112076 10. 00000000fe000000-00000000fe00ffff: RESERVED
1772 03:35:57.115527 11. 00000000fed10000-00000000fed17fff: RESERVED
1773 03:35:57.122590 12. 00000000fed80000-00000000fed83fff: RESERVED
1774 03:35:57.125855 13. 00000000fed90000-00000000fed91fff: RESERVED
1775 03:35:57.132328 14. 00000000feda0000-00000000feda1fff: RESERVED
1776 03:35:57.135697 15. 0000000100000000-000000045e7fffff: RAM
1777 03:35:57.138434 Graphics framebuffer located at 0xc0000000
1778 03:35:57.141807 Passing 5 GPIOs to payload:
1779 03:35:57.148677 NAME | PORT | POLARITY | VALUE
1780 03:35:57.152172 write protect | undefined | high | low
1781 03:35:57.158741 lid | undefined | high | high
1782 03:35:57.161865 power | undefined | high | low
1783 03:35:57.168943 oprom | undefined | high | low
1784 03:35:57.175094 EC in RW | 0x000000cb | high | low
1785 03:35:57.175208 Board ID: 4
1786 03:35:57.181827 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1787 03:35:57.181915 CBFS @ c08000 size 3f8000
1788 03:35:57.188147 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1789 03:35:57.195175 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1790 03:35:57.198528 coreboot table: 1492 bytes.
1791 03:35:57.201409 IMD ROOT 0. 99fff000 00001000
1792 03:35:57.204773 IMD SMALL 1. 99ffe000 00001000
1793 03:35:57.208363 FSP MEMORY 2. 99c4e000 003b0000
1794 03:35:57.211944 CONSOLE 3. 99c2e000 00020000
1795 03:35:57.214945 FMAP 4. 99c2d000 0000054e
1796 03:35:57.218429 TIME STAMP 5. 99c2c000 00000910
1797 03:35:57.221911 VBOOT WORK 6. 99c18000 00014000
1798 03:35:57.225154 MRC DATA 7. 99c16000 00001958
1799 03:35:57.227980 ROMSTG STCK 8. 99c15000 00001000
1800 03:35:57.231618 AFTER CAR 9. 99c0b000 0000a000
1801 03:35:57.235221 RAMSTAGE 10. 99baf000 0005c000
1802 03:35:57.237966 REFCODE 11. 99b7a000 00035000
1803 03:35:57.241497 SMM BACKUP 12. 99b6a000 00010000
1804 03:35:57.244634 COREBOOT 13. 99b62000 00008000
1805 03:35:57.248748 ACPI 14. 99b3e000 00024000
1806 03:35:57.251316 ACPI GNVS 15. 99b3d000 00001000
1807 03:35:57.254641 RAMOOPS 16. 99a3d000 00100000
1808 03:35:57.258176 TPM2 TCGLOG17. 99a2d000 00010000
1809 03:35:57.261616 SMBIOS 18. 99a2c000 00000800
1810 03:35:57.261725 IMD small region:
1811 03:35:57.264960 IMD ROOT 0. 99ffec00 00000400
1812 03:35:57.268185 FSP RUNTIME 1. 99ffebe0 00000004
1813 03:35:57.275043 EC HOSTEVENT 2. 99ffebc0 00000008
1814 03:35:57.278384 POWER STATE 3. 99ffeb80 00000040
1815 03:35:57.281370 ROMSTAGE 4. 99ffeb60 00000004
1816 03:35:57.284629 MEM INFO 5. 99ffe9a0 000001b9
1817 03:35:57.287908 VPD 6. 99ffe920 0000006c
1818 03:35:57.291410 MTRR: Physical address space:
1819 03:35:57.298333 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1820 03:35:57.301458 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1821 03:35:57.308101 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1822 03:35:57.314634 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1823 03:35:57.321526 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1824 03:35:57.327787 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1825 03:35:57.334806 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1826 03:35:57.337769 MTRR: Fixed MSR 0x250 0x0606060606060606
1827 03:35:57.341252 MTRR: Fixed MSR 0x258 0x0606060606060606
1828 03:35:57.347678 MTRR: Fixed MSR 0x259 0x0000000000000000
1829 03:35:57.350803 MTRR: Fixed MSR 0x268 0x0606060606060606
1830 03:35:57.354486 MTRR: Fixed MSR 0x269 0x0606060606060606
1831 03:35:57.357599 MTRR: Fixed MSR 0x26a 0x0606060606060606
1832 03:35:57.363943 MTRR: Fixed MSR 0x26b 0x0606060606060606
1833 03:35:57.367463 MTRR: Fixed MSR 0x26c 0x0606060606060606
1834 03:35:57.370843 MTRR: Fixed MSR 0x26d 0x0606060606060606
1835 03:35:57.374080 MTRR: Fixed MSR 0x26e 0x0606060606060606
1836 03:35:57.380467 MTRR: Fixed MSR 0x26f 0x0606060606060606
1837 03:35:57.383840 call enable_fixed_mtrr()
1838 03:35:57.387417 CPU physical address size: 39 bits
1839 03:35:57.390849 MTRR: default type WB/UC MTRR counts: 6/8.
1840 03:35:57.393725 MTRR: WB selected as default type.
1841 03:35:57.400525 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1842 03:35:57.407388 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1843 03:35:57.414084 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1844 03:35:57.417059 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1845 03:35:57.424165 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1846 03:35:57.430547 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1847 03:35:57.436842 MTRR: Fixed MSR 0x250 0x0606060606060606
1848 03:35:57.440558 MTRR: Fixed MSR 0x258 0x0606060606060606
1849 03:35:57.444004 MTRR: Fixed MSR 0x259 0x0000000000000000
1850 03:35:57.447304 MTRR: Fixed MSR 0x268 0x0606060606060606
1851 03:35:57.453667 MTRR: Fixed MSR 0x269 0x0606060606060606
1852 03:35:57.457261 MTRR: Fixed MSR 0x26a 0x0606060606060606
1853 03:35:57.460493 MTRR: Fixed MSR 0x26b 0x0606060606060606
1854 03:35:57.463410 MTRR: Fixed MSR 0x26c 0x0606060606060606
1855 03:35:57.470440 MTRR: Fixed MSR 0x26d 0x0606060606060606
1856 03:35:57.473666 MTRR: Fixed MSR 0x26e 0x0606060606060606
1857 03:35:57.476696 MTRR: Fixed MSR 0x26f 0x0606060606060606
1858 03:35:57.476779
1859 03:35:57.480254 MTRR check
1860 03:35:57.480368 Fixed MTRRs : Enabled
1861 03:35:57.483591 Variable MTRRs: Enabled
1862 03:35:57.483669
1863 03:35:57.486374 call enable_fixed_mtrr()
1864 03:35:57.493558 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1865 03:35:57.496739 CPU physical address size: 39 bits
1866 03:35:57.499809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1867 03:35:57.503398 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 03:35:57.509624 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 03:35:57.513383 MTRR: Fixed MSR 0x250 0x0606060606060606
1870 03:35:57.516745 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 03:35:57.520052 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 03:35:57.526435 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 03:35:57.529916 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 03:35:57.533110 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 03:35:57.536736 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 03:35:57.543036 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 03:35:57.546004 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 03:35:57.549610 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 03:35:57.552956 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 03:35:57.559428 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 03:35:57.562886 MTRR: Fixed MSR 0x258 0x0606060606060606
1882 03:35:57.566354 call enable_fixed_mtrr()
1883 03:35:57.569126 MTRR: Fixed MSR 0x259 0x0000000000000000
1884 03:35:57.572705 MTRR: Fixed MSR 0x268 0x0606060606060606
1885 03:35:57.576409 MTRR: Fixed MSR 0x269 0x0606060606060606
1886 03:35:57.582660 MTRR: Fixed MSR 0x26a 0x0606060606060606
1887 03:35:57.586468 MTRR: Fixed MSR 0x26b 0x0606060606060606
1888 03:35:57.589068 MTRR: Fixed MSR 0x26c 0x0606060606060606
1889 03:35:57.592605 MTRR: Fixed MSR 0x26d 0x0606060606060606
1890 03:35:57.599415 MTRR: Fixed MSR 0x26e 0x0606060606060606
1891 03:35:57.602620 MTRR: Fixed MSR 0x26f 0x0606060606060606
1892 03:35:57.606095 CPU physical address size: 39 bits
1893 03:35:57.609403 call enable_fixed_mtrr()
1894 03:35:57.612533 MTRR: Fixed MSR 0x258 0x0606060606060606
1895 03:35:57.615582 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 03:35:57.618943 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 03:35:57.625662 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 03:35:57.628716 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 03:35:57.632169 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 03:35:57.635193 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 03:35:57.642358 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 03:35:57.645579 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 03:35:57.648926 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 03:35:57.652304 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 03:35:57.658719 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 03:35:57.661914 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 03:35:57.665401 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 03:35:57.668686 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 03:35:57.675103 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 03:35:57.678616 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 03:35:57.682100 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 03:35:57.684993 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 03:35:57.692005 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 03:35:57.692113 call enable_fixed_mtrr()
1915 03:35:57.695128 call enable_fixed_mtrr()
1916 03:35:57.698319 CPU physical address size: 39 bits
1917 03:35:57.701652 CPU physical address size: 39 bits
1918 03:35:57.705243 CBFS @ c08000 size 3f8000
1919 03:35:57.711599 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1920 03:35:57.715053 CBFS: Locating 'fallback/payload'
1921 03:35:57.718475 CPU physical address size: 39 bits
1922 03:35:57.721491 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 03:35:57.728356 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 03:35:57.731743 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 03:35:57.735118 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 03:35:57.738594 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 03:35:57.741084 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 03:35:57.747845 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 03:35:57.751333 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 03:35:57.754313 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 03:35:57.757873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 03:35:57.764726 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 03:35:57.767740 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 03:35:57.771101 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 03:35:57.774445 call enable_fixed_mtrr()
1936 03:35:57.777686 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 03:35:57.780895 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 03:35:57.787480 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 03:35:57.790743 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 03:35:57.794276 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 03:35:57.798088 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 03:35:57.804412 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 03:35:57.807016 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 03:35:57.810638 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 03:35:57.813990 CPU physical address size: 39 bits
1946 03:35:57.817442 call enable_fixed_mtrr()
1947 03:35:57.820595 CBFS: Found @ offset 1c96c0 size 3f798
1948 03:35:57.824040 CPU physical address size: 39 bits
1949 03:35:57.830492 Checking segment from ROM address 0xffdd16f8
1950 03:35:57.833810 Checking segment from ROM address 0xffdd1714
1951 03:35:57.837598 Loading segment from ROM address 0xffdd16f8
1952 03:35:57.840163 code (compression=0)
1953 03:35:57.850490 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1954 03:35:57.856709 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1955 03:35:57.860200 it's not compressed!
1956 03:35:57.952632 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1957 03:35:57.959198 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1958 03:35:57.961993 Loading segment from ROM address 0xffdd1714
1959 03:35:57.965763 Entry Point 0x30000000
1960 03:35:57.969060 Loaded segments
1961 03:35:57.974299 Finalizing chipset.
1962 03:35:57.977408 Finalizing SMM.
1963 03:35:57.980877 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1964 03:35:57.983982 mp_park_aps done after 0 msecs.
1965 03:35:57.991029 Jumping to boot code at 30000000(99b62000)
1966 03:35:57.997794 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1967 03:35:57.997878
1968 03:35:57.997944
1969 03:35:57.998005
1970 03:35:58.000658 Starting depthcharge on Helios...
1971 03:35:58.000742
1972 03:35:58.001127 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1973 03:35:58.001228 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1974 03:35:58.001309 Setting prompt string to ['hatch:']
1975 03:35:58.001390 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1976 03:35:58.010709 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1977 03:35:58.010797
1978 03:35:58.017067 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1979 03:35:58.017176
1980 03:35:58.023746 board_setup: Info: eMMC controller not present; skipping
1981 03:35:58.023847
1982 03:35:58.026966 New NVMe Controller 0x30053ac0 @ 00:1d:00
1983 03:35:58.027070
1984 03:35:58.033599 board_setup: Info: SDHCI controller not present; skipping
1985 03:35:58.033704
1986 03:35:58.040393 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1987 03:35:58.040505
1988 03:35:58.040598 Wipe memory regions:
1989 03:35:58.040687
1990 03:35:58.043885 [0x00000000001000, 0x000000000a0000)
1991 03:35:58.043989
1992 03:35:58.047260 [0x00000000100000, 0x00000030000000)
1993 03:35:58.113734
1994 03:35:58.116743 [0x00000030657430, 0x00000099a2c000)
1995 03:35:58.254742
1996 03:35:58.257833 [0x00000100000000, 0x0000045e800000)
1997 03:35:59.640127
1998 03:35:59.640265 R8152: Initializing
1999 03:35:59.640348
2000 03:35:59.643216 Version 9 (ocp_data = 6010)
2001 03:35:59.647866
2002 03:35:59.647981 R8152: Done initializing
2003 03:35:59.648076
2004 03:35:59.651078 Adding net device
2005 03:36:00.133383
2006 03:36:00.133556 R8152: Initializing
2007 03:36:00.133654
2008 03:36:00.136971 Version 6 (ocp_data = 5c30)
2009 03:36:00.137048
2010 03:36:00.140483 R8152: Done initializing
2011 03:36:00.140562
2012 03:36:00.143386 net_add_device: Attemp to include the same device
2013 03:36:00.146818
2014 03:36:00.154133 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2015 03:36:00.154233
2016 03:36:00.154299
2017 03:36:00.154359
2018 03:36:00.154639 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2020 03:36:00.255039 hatch: tftpboot 192.168.201.1 12711088/tftp-deploy-e3dbypen/kernel/bzImage 12711088/tftp-deploy-e3dbypen/kernel/cmdline 12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
2021 03:36:00.255200 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2022 03:36:00.255287 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2023 03:36:00.259812 tftpboot 192.168.201.1 12711088/tftp-deploy-e3dbypen/kernel/bzImploy-e3dbypen/kernel/cmdline 12711088/tftp-deploy-e3dbypen/ramdisk/ramdisk.cpio.gz
2024 03:36:00.259944
2025 03:36:00.260018 Waiting for link
2026 03:36:00.460716
2027 03:36:00.460854 done.
2028 03:36:00.460921
2029 03:36:00.460982 MAC: 00:24:32:50:19:be
2030 03:36:00.461041
2031 03:36:00.463611 Sending DHCP discover... done.
2032 03:36:00.463721
2033 03:36:00.467371 Waiting for reply... done.
2034 03:36:00.467480
2035 03:36:00.470069 Sending DHCP request... done.
2036 03:36:00.470208
2037 03:36:00.478251 Waiting for reply... done.
2038 03:36:00.478370
2039 03:36:00.478467 My ip is 192.168.201.15
2040 03:36:00.478560
2041 03:36:00.481186 The DHCP server ip is 192.168.201.1
2042 03:36:00.485019
2043 03:36:00.488417 TFTP server IP predefined by user: 192.168.201.1
2044 03:36:00.488527
2045 03:36:00.494878 Bootfile predefined by user: 12711088/tftp-deploy-e3dbypen/kernel/bzImage
2046 03:36:00.494981
2047 03:36:00.498250 Sending tftp read request... done.
2048 03:36:00.498338
2049 03:36:00.501177 Waiting for the transfer...
2050 03:36:00.504382
2051 03:36:01.015148 00000000 ################################################################
2052 03:36:01.015284
2053 03:36:01.522945 00080000 ################################################################
2054 03:36:01.523110
2055 03:36:02.040044 00100000 ################################################################
2056 03:36:02.040179
2057 03:36:02.564196 00180000 ################################################################
2058 03:36:02.564340
2059 03:36:03.099916 00200000 ################################################################
2060 03:36:03.100052
2061 03:36:03.617917 00280000 ################################################################
2062 03:36:03.618046
2063 03:36:04.135582 00300000 ################################################################
2064 03:36:04.135780
2065 03:36:04.661654 00380000 ################################################################
2066 03:36:04.661790
2067 03:36:05.205172 00400000 ################################################################
2068 03:36:05.205300
2069 03:36:05.732563 00480000 ################################################################
2070 03:36:05.732720
2071 03:36:06.245765 00500000 ################################################################
2072 03:36:06.245904
2073 03:36:06.766050 00580000 ################################################################
2074 03:36:06.766226
2075 03:36:07.282835 00600000 ################################################################
2076 03:36:07.282972
2077 03:36:07.798353 00680000 ################################################################
2078 03:36:07.798490
2079 03:36:08.326062 00700000 ################################################################
2080 03:36:08.326205
2081 03:36:08.851745 00780000 ################################################################
2082 03:36:08.851885
2083 03:36:09.039397 00800000 ####################### done.
2084 03:36:09.039570
2085 03:36:09.042886 The bootfile was 8576912 bytes long.
2086 03:36:09.043006
2087 03:36:09.046397 Sending tftp read request... done.
2088 03:36:09.046509
2089 03:36:09.049131 Waiting for the transfer...
2090 03:36:09.049246
2091 03:36:09.576267 00000000 ################################################################
2092 03:36:09.576418
2093 03:36:10.111571 00080000 ################################################################
2094 03:36:10.111739
2095 03:36:10.640724 00100000 ################################################################
2096 03:36:10.640895
2097 03:36:11.171127 00180000 ################################################################
2098 03:36:11.171288
2099 03:36:11.696576 00200000 ################################################################
2100 03:36:11.696786
2101 03:36:12.226400 00280000 ################################################################
2102 03:36:12.226537
2103 03:36:12.861340 00300000 ################################################################
2104 03:36:12.861910
2105 03:36:13.554138 00380000 ################################################################
2106 03:36:13.554770
2107 03:36:14.243143 00400000 ################################################################
2108 03:36:14.243629
2109 03:36:14.944947 00480000 ################################################################
2110 03:36:14.945448
2111 03:36:15.656036 00500000 ################################################################
2112 03:36:15.656688
2113 03:36:16.366937 00580000 ################################################################
2114 03:36:16.367420
2115 03:36:17.090175 00600000 ################################################################
2116 03:36:17.090700
2117 03:36:17.748592 00680000 ################################################################
2118 03:36:17.748740
2119 03:36:18.461099 00700000 ################################################################
2120 03:36:18.461637
2121 03:36:19.184769 00780000 ################################################################
2122 03:36:19.185342
2123 03:36:19.776585 00800000 ####################################################### done.
2124 03:36:19.777100
2125 03:36:19.779676 Sending tftp read request... done.
2126 03:36:19.780133
2127 03:36:19.783042 Waiting for the transfer...
2128 03:36:19.783459
2129 03:36:19.786457 00000000 # done.
2130 03:36:19.786886
2131 03:36:19.796492 Command line loaded dynamically from TFTP file: 12711088/tftp-deploy-e3dbypen/kernel/cmdline
2132 03:36:19.797014
2133 03:36:19.816550 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2134 03:36:19.817169
2135 03:36:19.819938 ec_init(0): CrosEC protocol v3 supported (256, 256)
2136 03:36:19.825158
2137 03:36:19.828738 Shutting down all USB controllers.
2138 03:36:19.829233
2139 03:36:19.829730 Removing current net device
2140 03:36:19.832074
2141 03:36:19.832611 Finalizing coreboot
2142 03:36:19.832938
2143 03:36:19.839174 Exiting depthcharge with code 4 at timestamp: 29186810
2144 03:36:19.839630
2145 03:36:19.840057
2146 03:36:19.840433 Starting kernel ...
2147 03:36:19.840911
2148 03:36:19.841373
2149 03:36:19.842992 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2150 03:36:19.843553 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2151 03:36:19.844031 Setting prompt string to ['Linux version [0-9]']
2152 03:36:19.844617 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2153 03:36:19.845146 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2155 03:40:39.844569 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2157 03:40:39.845671 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2159 03:40:39.846543 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2162 03:40:39.847982 end: 2 depthcharge-action (duration 00:05:00) [common]
2164 03:40:39.849306 Cleaning after the job
2165 03:40:39.849390 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/ramdisk
2166 03:40:39.850745 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/kernel
2167 03:40:39.852053 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12711088/tftp-deploy-e3dbypen/modules
2168 03:40:39.852469 start: 5.1 power-off (timeout 00:00:30) [common]
2169 03:40:39.852628 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2170 03:40:39.931847 >> Command sent successfully.
2171 03:40:39.942601 Returned 0 in 0 seconds
2172 03:40:40.043458 end: 5.1 power-off (duration 00:00:00) [common]
2174 03:40:40.043794 start: 5.2 read-feedback (timeout 00:10:00) [common]
2175 03:40:40.044058 Listened to connection for namespace 'common' for up to 1s
2177 03:40:40.044442 Listened to connection for namespace 'common' for up to 1s
2178 03:40:41.044711 Finalising connection for namespace 'common'
2179 03:40:41.045373 Disconnecting from shell: Finalise
2180 03:40:41.045800
2181 03:40:41.147022 end: 5.2 read-feedback (duration 00:00:01) [common]
2182 03:40:41.147641 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12711088
2183 03:40:41.203526 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12711088
2184 03:40:41.203754 JobError: Your job cannot terminate cleanly.