Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:04:44.593532 lava-dispatcher, installed at version: 2022.11
2 07:04:44.593746 start: 0 validate
3 07:04:44.593881 Start time: 2023-02-07 07:04:44.593874+00:00 (UTC)
4 07:04:44.594015 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:44.594146 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230203.0%2Fx86%2Frootfs.cpio.gz exists
6 07:04:44.887211 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:44.887371 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:45.179918 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:45.180097 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:04:45.189862 validate duration: 0.60
12 07:04:45.190129 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:04:45.190257 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:04:45.190353 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:04:45.190454 Not decompressing ramdisk as can be used compressed.
16 07:04:45.190673 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230203.0/x86/rootfs.cpio.gz
17 07:04:45.190748 saving as /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/ramdisk/rootfs.cpio.gz
18 07:04:45.190814 total size: 8423718 (8MB)
19 07:04:45.199557 progress 0% (0MB)
20 07:04:45.210820 progress 5% (0MB)
21 07:04:45.218620 progress 10% (0MB)
22 07:04:45.225950 progress 15% (1MB)
23 07:04:45.233335 progress 20% (1MB)
24 07:04:45.240895 progress 25% (2MB)
25 07:04:45.248383 progress 30% (2MB)
26 07:04:45.254710 progress 35% (2MB)
27 07:04:45.262009 progress 40% (3MB)
28 07:04:45.269517 progress 45% (3MB)
29 07:04:45.277119 progress 50% (4MB)
30 07:04:45.283303 progress 55% (4MB)
31 07:04:45.290718 progress 60% (4MB)
32 07:04:45.298393 progress 65% (5MB)
33 07:04:45.304367 progress 70% (5MB)
34 07:04:45.312189 progress 75% (6MB)
35 07:04:45.319032 progress 80% (6MB)
36 07:04:45.326470 progress 85% (6MB)
37 07:04:45.333547 progress 90% (7MB)
38 07:04:45.341017 progress 95% (7MB)
39 07:04:45.348713 progress 100% (8MB)
40 07:04:45.348918 8MB downloaded in 0.16s (50.81MB/s)
41 07:04:45.349100 end: 1.1.1 http-download (duration 00:00:00) [common]
43 07:04:45.349373 end: 1.1 download-retry (duration 00:00:00) [common]
44 07:04:45.349472 start: 1.2 download-retry (timeout 00:10:00) [common]
45 07:04:45.349567 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 07:04:45.349688 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:04:45.349767 saving as /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/kernel/bzImage
48 07:04:45.349840 total size: 7573392 (7MB)
49 07:04:45.349908 No compression specified
50 07:04:45.356752 progress 0% (0MB)
51 07:04:45.376913 progress 5% (0MB)
52 07:04:45.390732 progress 10% (0MB)
53 07:04:45.398764 progress 15% (1MB)
54 07:04:45.409492 progress 20% (1MB)
55 07:04:45.418328 progress 25% (1MB)
56 07:04:45.429484 progress 30% (2MB)
57 07:04:45.437293 progress 35% (2MB)
58 07:04:45.448687 progress 40% (2MB)
59 07:04:45.458255 progress 45% (3MB)
60 07:04:45.467504 progress 50% (3MB)
61 07:04:45.476723 progress 55% (4MB)
62 07:04:45.486336 progress 60% (4MB)
63 07:04:45.498438 progress 65% (4MB)
64 07:04:45.510752 progress 70% (5MB)
65 07:04:45.520301 progress 75% (5MB)
66 07:04:45.529814 progress 80% (5MB)
67 07:04:45.538831 progress 85% (6MB)
68 07:04:45.547130 progress 90% (6MB)
69 07:04:45.555358 progress 95% (6MB)
70 07:04:45.564107 progress 100% (7MB)
71 07:04:45.564295 7MB downloaded in 0.21s (33.68MB/s)
72 07:04:45.564455 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:04:45.564704 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:04:45.564809 start: 1.3 download-retry (timeout 00:10:00) [common]
76 07:04:45.564920 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 07:04:45.565049 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:04:45.565127 saving as /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/modules/modules.tar
79 07:04:45.565213 total size: 54868 (0MB)
80 07:04:45.565294 Using unxz to decompress xz
81 07:04:45.570890 progress 59% (0MB)
82 07:04:45.571415 progress 100% (0MB)
83 07:04:45.575130 0MB downloaded in 0.01s (5.29MB/s)
84 07:04:45.575448 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:04:45.575819 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:04:45.575925 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 07:04:45.576026 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 07:04:45.576119 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 07:04:45.576239 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 07:04:45.576442 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs
92 07:04:45.576614 makedir: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin
93 07:04:45.576766 makedir: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/tests
94 07:04:45.576872 makedir: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/results
95 07:04:45.577042 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-add-keys
96 07:04:45.577201 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-add-sources
97 07:04:45.577349 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-background-process-start
98 07:04:45.577515 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-background-process-stop
99 07:04:45.577650 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-common-functions
100 07:04:45.577781 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-echo-ipv4
101 07:04:45.577918 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-install-packages
102 07:04:45.578055 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-installed-packages
103 07:04:45.578198 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-os-build
104 07:04:45.578351 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-probe-channel
105 07:04:45.578487 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-probe-ip
106 07:04:45.578663 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-target-ip
107 07:04:45.578798 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-target-mac
108 07:04:45.578930 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-target-storage
109 07:04:45.579066 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-case
110 07:04:45.579199 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-event
111 07:04:45.579331 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-feedback
112 07:04:45.579463 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-raise
113 07:04:45.579599 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-reference
114 07:04:45.579728 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-runner
115 07:04:45.579864 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-set
116 07:04:45.580027 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-test-shell
117 07:04:45.580180 Updating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-install-packages (oe)
118 07:04:45.580332 Updating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/bin/lava-installed-packages (oe)
119 07:04:45.580450 Creating /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/environment
120 07:04:45.580561 LAVA metadata
121 07:04:45.580644 - LAVA_JOB_ID=9045507
122 07:04:45.580731 - LAVA_DISPATCHER_IP=192.168.201.1
123 07:04:45.580861 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 07:04:45.580939 skipped lava-vland-overlay
125 07:04:45.581045 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 07:04:45.581163 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 07:04:45.581240 skipped lava-multinode-overlay
128 07:04:45.581347 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 07:04:45.581454 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 07:04:45.581551 Loading test definitions
131 07:04:45.581674 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 07:04:45.581765 Using /lava-9045507 at stage 0
133 07:04:45.582064 uuid=9045507_1.4.2.3.1 testdef=None
134 07:04:45.582169 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 07:04:45.582282 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 07:04:45.582855 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 07:04:45.583127 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 07:04:45.583736 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 07:04:45.584018 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 07:04:45.584605 runner path: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/0/tests/0_dmesg test_uuid 9045507_1.4.2.3.1
143 07:04:45.584771 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 07:04:45.585043 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 07:04:45.585131 Using /lava-9045507 at stage 1
147 07:04:45.585420 uuid=9045507_1.4.2.3.5 testdef=None
148 07:04:45.585528 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 07:04:45.585637 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 07:04:45.586118 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 07:04:45.586383 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 07:04:45.587032 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 07:04:45.587315 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 07:04:45.587904 runner path: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/1/tests/1_bootrr test_uuid 9045507_1.4.2.3.5
157 07:04:45.588067 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 07:04:45.588309 Creating lava-test-runner.conf files
160 07:04:45.588421 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/0 for stage 0
161 07:04:45.588531 - 0_dmesg
162 07:04:45.588629 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045507/lava-overlay-y2xm_6xs/lava-9045507/1 for stage 1
163 07:04:45.588735 - 1_bootrr
164 07:04:45.588851 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 07:04:45.588976 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 07:04:45.595458 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 07:04:45.595592 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 07:04:45.595702 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 07:04:45.595814 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 07:04:45.595928 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 07:04:45.784176 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 07:04:45.784531 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 07:04:45.784649 extracting modules file /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045507/extract-overlay-ramdisk-qjgqc7l7/ramdisk
174 07:04:45.789476 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 07:04:45.789618 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 07:04:45.789732 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045507/compress-overlay-vhlcyitd/overlay-1.4.2.4.tar.gz to ramdisk
177 07:04:45.789820 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045507/compress-overlay-vhlcyitd/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045507/extract-overlay-ramdisk-qjgqc7l7/ramdisk
178 07:04:45.794047 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 07:04:45.794192 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 07:04:45.794304 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 07:04:45.794404 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 07:04:45.794500 Building ramdisk /var/lib/lava/dispatcher/tmp/9045507/extract-overlay-ramdisk-qjgqc7l7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045507/extract-overlay-ramdisk-qjgqc7l7/ramdisk
183 07:04:45.860160 >> 48158 blocks
184 07:04:46.624511 rename /var/lib/lava/dispatcher/tmp/9045507/extract-overlay-ramdisk-qjgqc7l7/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
185 07:04:46.624920 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 07:04:46.625065 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 07:04:46.625200 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 07:04:46.625303 No mkimage arch provided, not using FIT.
189 07:04:46.625398 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 07:04:46.625489 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 07:04:46.625589 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 07:04:46.625690 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 07:04:46.625773 No LXC device requested
194 07:04:46.625857 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 07:04:46.625954 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 07:04:46.626039 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 07:04:46.626112 Checking files for TFTP limit of 4294967296 bytes.
198 07:04:46.626506 end: 1 tftp-deploy (duration 00:00:01) [common]
199 07:04:46.626626 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 07:04:46.626727 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 07:04:46.626858 substitutions:
202 07:04:46.626930 - {DTB}: None
203 07:04:46.626997 - {INITRD}: 9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
204 07:04:46.627071 - {KERNEL}: 9045507/tftp-deploy-97apsx9d/kernel/bzImage
205 07:04:46.627133 - {LAVA_MAC}: None
206 07:04:46.627194 - {PRESEED_CONFIG}: None
207 07:04:46.627253 - {PRESEED_LOCAL}: None
208 07:04:46.627312 - {RAMDISK}: 9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
209 07:04:46.627373 - {ROOT_PART}: None
210 07:04:46.627431 - {ROOT}: None
211 07:04:46.627489 - {SERVER_IP}: 192.168.201.1
212 07:04:46.627547 - {TEE}: None
213 07:04:46.627604 Parsed boot commands:
214 07:04:46.627661 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 07:04:46.627812 Parsed boot commands: tftpboot 192.168.201.1 9045507/tftp-deploy-97apsx9d/kernel/bzImage 9045507/tftp-deploy-97apsx9d/kernel/cmdline 9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
216 07:04:46.627906 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 07:04:46.627997 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 07:04:46.628094 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 07:04:46.628184 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 07:04:46.628255 Not connected, no need to disconnect.
221 07:04:46.628334 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 07:04:46.628419 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 07:04:46.628490 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
224 07:04:46.631437 Setting prompt string to ['lava-test: # ']
225 07:04:46.631734 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 07:04:46.631847 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 07:04:46.631953 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 07:04:46.632049 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 07:04:46.632458 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
230 07:04:55.954420 >> Command sent successfully.
231 07:04:55.960421 Returned 0 in 9 seconds
232 07:04:56.061229 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
234 07:04:56.061565 end: 2.2.2 reset-device (duration 00:00:09) [common]
235 07:04:56.061672 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
236 07:04:56.061764 Setting prompt string to 'Starting depthcharge on Helios...'
237 07:04:56.061834 Changing prompt to 'Starting depthcharge on Helios...'
238 07:04:56.061903 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 07:04:56.062178 [Enter `^Ec?' for help]
240 07:04:56.062262
241 07:04:56.062332
242 07:04:56.062398 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 07:04:56.062466 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 07:04:56.062553 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 07:04:56.062629 CPU: AES supported, TXT NOT supported, VT supported
246 07:04:56.062689 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 07:04:56.062749 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 07:04:56.062808 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 07:04:56.062866 VBOOT: Loading verstage.
250 07:04:56.062925 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 07:04:56.062984 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 07:04:56.063043 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 07:04:56.063101 CBFS @ c08000 size 3f8000
254 07:04:56.063159 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 07:04:56.063217 CBFS: Locating 'fallback/verstage'
256 07:04:56.063274 CBFS: Found @ offset 10fb80 size 1072c
257 07:04:56.063332
258 07:04:56.063389
259 07:04:56.063446 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 07:04:56.063505 Probing TPM: . done!
261 07:04:56.063563 TPM ready after 0 ms
262 07:04:56.063620 Connected to device vid:did:rid of 1ae0:0028:00
263 07:04:56.063678 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
264 07:04:56.063740 Initialized TPM device CR50 revision 0
265 07:04:56.063798 tlcl_send_startup: Startup return code is 0
266 07:04:56.063856 TPM: setup succeeded
267 07:04:56.063914 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 07:04:56.063972 Chrome EC: UHEPI supported
269 07:04:56.064029 Phase 1
270 07:04:56.064086 FMAP: area GBB found @ c05000 (12288 bytes)
271 07:04:56.064144 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 07:04:56.064202 Phase 2
273 07:04:56.064258 Phase 3
274 07:04:56.064314 FMAP: area GBB found @ c05000 (12288 bytes)
275 07:04:56.064372 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 07:04:56.064430 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
277 07:04:56.064488 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
278 07:04:56.064545 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 07:04:56.064602 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
280 07:04:56.064659 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
281 07:04:56.064716 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 07:04:56.064772 Phase 4
283 07:04:56.064829 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
284 07:04:56.064887 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 07:04:56.064944 VB2:vb2_rsa_verify_digest() Digest check failed!
286 07:04:56.065001 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 07:04:56.065058 Saving nvdata
288 07:04:56.065114 Reboot requested (10020007)
289 07:04:56.065171 board_reset() called!
290 07:04:56.065227 full_reset() called!
291 07:04:59.636388
292 07:04:59.637200
293 07:04:59.646118 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
294 07:04:59.649754 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
295 07:04:59.656237 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
296 07:04:59.659240 CPU: AES supported, TXT NOT supported, VT supported
297 07:04:59.666153 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
298 07:04:59.668929 PCH: device id 0284 (rev 00) is Cometlake-U Premium
299 07:04:59.676190 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
300 07:04:59.678884 VBOOT: Loading verstage.
301 07:04:59.682510 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 07:04:59.689071 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
303 07:04:59.695683 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 07:04:59.695899 CBFS @ c08000 size 3f8000
305 07:04:59.702552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
306 07:04:59.705946 CBFS: Locating 'fallback/verstage'
307 07:04:59.708892 CBFS: Found @ offset 10fb80 size 1072c
308 07:04:59.712981
309 07:04:59.713192
310 07:04:59.723285 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
311 07:04:59.737797 Probing TPM: . done!
312 07:04:59.741258 TPM ready after 0 ms
313 07:04:59.744132 Connected to device vid:did:rid of 1ae0:0028:00
314 07:04:59.754593 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
315 07:04:59.758144 Initialized TPM device CR50 revision 0
316 07:04:59.800453 tlcl_send_startup: Startup return code is 0
317 07:04:59.801043 TPM: setup succeeded
318 07:04:59.812810 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
319 07:04:59.817031 Chrome EC: UHEPI supported
320 07:04:59.819932 Phase 1
321 07:04:59.823814 FMAP: area GBB found @ c05000 (12288 bytes)
322 07:04:59.830088 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
323 07:04:59.836648 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
324 07:04:59.839489 Recovery requested (1009000e)
325 07:04:59.845482 Saving nvdata
326 07:04:59.851885 tlcl_extend: response is 0
327 07:04:59.860411 tlcl_extend: response is 0
328 07:04:59.867448 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
329 07:04:59.870927 CBFS @ c08000 size 3f8000
330 07:04:59.877520 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
331 07:04:59.880536 CBFS: Locating 'fallback/romstage'
332 07:04:59.883980 CBFS: Found @ offset 80 size 145fc
333 07:04:59.886871 Accumulated console time in verstage 98 ms
334 07:04:59.887395
335 07:04:59.890452
336 07:04:59.900266 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
337 07:04:59.906798 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 07:04:59.909690 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 07:04:59.913369 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 07:04:59.919816 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
341 07:04:59.922885 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
342 07:04:59.926330 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
343 07:04:59.929587 TCO_STS: 0000 0000
344 07:04:59.933243 GEN_PMCON: e0015238 00000200
345 07:04:59.936498 GBLRST_CAUSE: 00000000 00000000
346 07:04:59.936955 prev_sleep_state 5
347 07:04:59.940105 Boot Count incremented to 46450
348 07:04:59.947212 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
349 07:04:59.950166 CBFS @ c08000 size 3f8000
350 07:04:59.957202 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
351 07:04:59.957712 CBFS: Locating 'fspm.bin'
352 07:04:59.963037 CBFS: Found @ offset 5ffc0 size 71000
353 07:04:59.966710 Chrome EC: UHEPI supported
354 07:04:59.972846 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
355 07:04:59.977043 Probing TPM: done!
356 07:04:59.983535 Connected to device vid:did:rid of 1ae0:0028:00
357 07:04:59.993658 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
358 07:04:59.999485 Initialized TPM device CR50 revision 0
359 07:05:00.008045 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
360 07:05:00.017864 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
361 07:05:00.018071 MRC cache found, size 1948
362 07:05:00.021301 bootmode is set to: 2
363 07:05:00.024852 PRMRR disabled by config.
364 07:05:00.027823 SPD INDEX = 1
365 07:05:00.031299 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
366 07:05:00.034377 CBFS @ c08000 size 3f8000
367 07:05:00.045171 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
368 07:05:00.045373 CBFS: Locating 'spd.bin'
369 07:05:00.047811 CBFS: Found @ offset 5fb80 size 400
370 07:05:00.048011 SPD: module type is LPDDR3
371 07:05:00.050552 SPD: module part is
372 07:05:00.057554 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
373 07:05:00.060881 SPD: device width 4 bits, bus width 8 bits
374 07:05:00.063946 SPD: module size is 4096 MB (per channel)
375 07:05:00.067420 memory slot: 0 configuration done.
376 07:05:00.073982 memory slot: 2 configuration done.
377 07:05:00.122614 CBMEM:
378 07:05:00.126403 IMD: root @ 99fff000 254 entries.
379 07:05:00.129246 IMD: root @ 99ffec00 62 entries.
380 07:05:00.132747 External stage cache:
381 07:05:00.136244 IMD: root @ 9abff000 254 entries.
382 07:05:00.139163 IMD: root @ 9abfec00 62 entries.
383 07:05:00.145830 Chrome EC: clear events_b mask to 0x0000000020004000
384 07:05:00.158950 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
385 07:05:00.171811 tlcl_write: response is 0
386 07:05:00.180667 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
387 07:05:00.187221 MRC: TPM MRC hash updated successfully.
388 07:05:00.187311 2 DIMMs found
389 07:05:00.190747 SMM Memory Map
390 07:05:00.193780 SMRAM : 0x9a000000 0x1000000
391 07:05:00.197288 Subregion 0: 0x9a000000 0xa00000
392 07:05:00.200207 Subregion 1: 0x9aa00000 0x200000
393 07:05:00.203678 Subregion 2: 0x9ac00000 0x400000
394 07:05:00.207313 top_of_ram = 0x9a000000
395 07:05:00.210293 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
396 07:05:00.216940 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
397 07:05:00.220541 MTRR Range: Start=ff000000 End=0 (Size 1000000)
398 07:05:00.226875 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
399 07:05:00.230439 CBFS @ c08000 size 3f8000
400 07:05:00.233285 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
401 07:05:00.236850 CBFS: Locating 'fallback/postcar'
402 07:05:00.243190 CBFS: Found @ offset 107000 size 4b44
403 07:05:00.250200 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
404 07:05:00.259545 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
405 07:05:00.262996 Processing 180 relocs. Offset value of 0x97c0c000
406 07:05:00.271258 Accumulated console time in romstage 286 ms
407 07:05:00.271342
408 07:05:00.271411
409 07:05:00.280922 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
410 07:05:00.287612 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
411 07:05:00.290545 CBFS @ c08000 size 3f8000
412 07:05:00.297467 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
413 07:05:00.300840 CBFS: Locating 'fallback/ramstage'
414 07:05:00.303821 CBFS: Found @ offset 43380 size 1b9e8
415 07:05:00.310242 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
416 07:05:00.342441 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
417 07:05:00.346102 Processing 3976 relocs. Offset value of 0x98db0000
418 07:05:00.352809 Accumulated console time in postcar 52 ms
419 07:05:00.352890
420 07:05:00.352957
421 07:05:00.362723 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
422 07:05:00.368947 FMAP: area RO_VPD found @ c00000 (16384 bytes)
423 07:05:00.372548 WARNING: RO_VPD is uninitialized or empty.
424 07:05:00.375541 FMAP: area RW_VPD found @ af8000 (8192 bytes)
425 07:05:00.382220 FMAP: area RW_VPD found @ af8000 (8192 bytes)
426 07:05:00.382304 Normal boot.
427 07:05:00.388871 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
428 07:05:00.391792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 07:05:00.395367 CBFS @ c08000 size 3f8000
430 07:05:00.402156 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 07:05:00.404887 CBFS: Locating 'cpu_microcode_blob.bin'
432 07:05:00.408438 CBFS: Found @ offset 14700 size 2ec00
433 07:05:00.411943 microcode: sig=0x806ec pf=0x4 revision=0xc9
434 07:05:00.414960 Skip microcode update
435 07:05:00.421441 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
436 07:05:00.424914 CBFS @ c08000 size 3f8000
437 07:05:00.428307 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
438 07:05:00.431289 CBFS: Locating 'fsps.bin'
439 07:05:00.434879 CBFS: Found @ offset d1fc0 size 35000
440 07:05:00.460749 Detected 4 core, 8 thread CPU.
441 07:05:00.464233 Setting up SMI for CPU
442 07:05:00.467660 IED base = 0x9ac00000
443 07:05:00.470489 IED size = 0x00400000
444 07:05:00.470618 Will perform SMM setup.
445 07:05:00.477233 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
446 07:05:00.483899 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
447 07:05:00.490282 Processing 16 relocs. Offset value of 0x00030000
448 07:05:00.490372 Attempting to start 7 APs
449 07:05:00.496824 Waiting for 10ms after sending INIT.
450 07:05:00.510324 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
451 07:05:00.510414 done.
452 07:05:00.514202 AP: slot 5 apic_id 5.
453 07:05:00.516890 AP: slot 4 apic_id 4.
454 07:05:00.516978 AP: slot 6 apic_id 6.
455 07:05:00.523433 Waiting for 2nd SIPI to complete...done.
456 07:05:00.523522 AP: slot 3 apic_id 3.
457 07:05:00.527101 AP: slot 1 apic_id 2.
458 07:05:00.529963 AP: slot 7 apic_id 7.
459 07:05:00.537092 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
460 07:05:00.543575 Processing 13 relocs. Offset value of 0x00038000
461 07:05:00.549979 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
462 07:05:00.553050 Installing SMM handler to 0x9a000000
463 07:05:00.560086 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
464 07:05:00.566486 Processing 658 relocs. Offset value of 0x9a010000
465 07:05:00.572861 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
466 07:05:00.579577 Processing 13 relocs. Offset value of 0x9a008000
467 07:05:00.583447 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
468 07:05:00.589409 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
469 07:05:00.595921 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
470 07:05:00.599495 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
471 07:05:00.605936 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
472 07:05:00.612400 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
473 07:05:00.619396 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
474 07:05:00.625554 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
475 07:05:00.629165 Clearing SMI status registers
476 07:05:00.629254 SMI_STS: PM1
477 07:05:00.632514 PM1_STS: PWRBTN
478 07:05:00.632602 TCO_STS: SECOND_TO
479 07:05:00.635544 New SMBASE 0x9a000000
480 07:05:00.639026 In relocation handler: CPU 0
481 07:05:00.642493 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
482 07:05:00.648604 Writing SMRR. base = 0x9a000006, mask=0xff000800
483 07:05:00.648694 Relocation complete.
484 07:05:00.651638 New SMBASE 0x99fff800
485 07:05:00.655408 In relocation handler: CPU 2
486 07:05:00.658225 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
487 07:05:00.665138 Writing SMRR. base = 0x9a000006, mask=0xff000800
488 07:05:00.665227 Relocation complete.
489 07:05:00.668082 New SMBASE 0x99ffec00
490 07:05:00.671678 In relocation handler: CPU 5
491 07:05:00.675210 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
492 07:05:00.681206 Writing SMRR. base = 0x9a000006, mask=0xff000800
493 07:05:00.681300 Relocation complete.
494 07:05:00.684860 New SMBASE 0x99fff000
495 07:05:00.687880 In relocation handler: CPU 4
496 07:05:00.691538 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
497 07:05:00.698048 Writing SMRR. base = 0x9a000006, mask=0xff000800
498 07:05:00.698137 Relocation complete.
499 07:05:00.701054 New SMBASE 0x99ffe800
500 07:05:00.704696 In relocation handler: CPU 6
501 07:05:00.707679 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
502 07:05:00.714400 Writing SMRR. base = 0x9a000006, mask=0xff000800
503 07:05:00.714491 Relocation complete.
504 07:05:00.717551 New SMBASE 0x99ffe400
505 07:05:00.720992 In relocation handler: CPU 7
506 07:05:00.723954 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
507 07:05:00.730566 Writing SMRR. base = 0x9a000006, mask=0xff000800
508 07:05:00.730656 Relocation complete.
509 07:05:00.733917 New SMBASE 0x99fff400
510 07:05:00.737007 In relocation handler: CPU 3
511 07:05:00.740383 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
512 07:05:00.747206 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 07:05:00.747295 Relocation complete.
514 07:05:00.750378 New SMBASE 0x99fffc00
515 07:05:00.753940 In relocation handler: CPU 1
516 07:05:00.757010 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
517 07:05:00.763507 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 07:05:00.763600 Relocation complete.
519 07:05:00.766923 Initializing CPU #0
520 07:05:00.769838 CPU: vendor Intel device 806ec
521 07:05:00.773652 CPU: family 06, model 8e, stepping 0c
522 07:05:00.776862 Clearing out pending MCEs
523 07:05:00.779766 Setting up local APIC...
524 07:05:00.779842 apic_id: 0x00 done.
525 07:05:00.783324 Turbo is available but hidden
526 07:05:00.786406 Turbo is available and visible
527 07:05:00.789910 VMX status: enabled
528 07:05:00.793022 IA32_FEATURE_CONTROL status: locked
529 07:05:00.793100 Skip microcode update
530 07:05:00.796499 CPU #0 initialized
531 07:05:00.800066 Initializing CPU #2
532 07:05:00.800149 Initializing CPU #6
533 07:05:00.803052 Initializing CPU #7
534 07:05:00.806730 Initializing CPU #5
535 07:05:00.806811 Initializing CPU #4
536 07:05:00.809715 CPU: vendor Intel device 806ec
537 07:05:00.813346 CPU: family 06, model 8e, stepping 0c
538 07:05:00.816696 CPU: vendor Intel device 806ec
539 07:05:00.819678 CPU: family 06, model 8e, stepping 0c
540 07:05:00.823254 Initializing CPU #3
541 07:05:00.826217 Initializing CPU #1
542 07:05:00.829731 CPU: vendor Intel device 806ec
543 07:05:00.832725 CPU: family 06, model 8e, stepping 0c
544 07:05:00.836263 CPU: vendor Intel device 806ec
545 07:05:00.839767 CPU: family 06, model 8e, stepping 0c
546 07:05:00.842719 Clearing out pending MCEs
547 07:05:00.842798 Clearing out pending MCEs
548 07:05:00.846166 Setting up local APIC...
549 07:05:00.849577 CPU: vendor Intel device 806ec
550 07:05:00.852588 CPU: family 06, model 8e, stepping 0c
551 07:05:00.856421 Clearing out pending MCEs
552 07:05:00.859434 CPU: vendor Intel device 806ec
553 07:05:00.862636 CPU: family 06, model 8e, stepping 0c
554 07:05:00.866159 CPU: vendor Intel device 806ec
555 07:05:00.869333 CPU: family 06, model 8e, stepping 0c
556 07:05:00.872173 Clearing out pending MCEs
557 07:05:00.875636 Clearing out pending MCEs
558 07:05:00.879001 Setting up local APIC...
559 07:05:00.879091 Setting up local APIC...
560 07:05:00.882048 Setting up local APIC...
561 07:05:00.885642 Clearing out pending MCEs
562 07:05:00.888736 Clearing out pending MCEs
563 07:05:00.892160 Setting up local APIC...
564 07:05:00.892240 apic_id: 0x02 done.
565 07:05:00.895365 apic_id: 0x03 done.
566 07:05:00.895443 VMX status: enabled
567 07:05:00.898810 VMX status: enabled
568 07:05:00.902407 IA32_FEATURE_CONTROL status: locked
569 07:05:00.905348 IA32_FEATURE_CONTROL status: locked
570 07:05:00.908925 Skip microcode update
571 07:05:00.912177 Skip microcode update
572 07:05:00.912264 CPU #1 initialized
573 07:05:00.915203 CPU #3 initialized
574 07:05:00.918687 Setting up local APIC...
575 07:05:00.918775 apic_id: 0x07 done.
576 07:05:00.921696 apic_id: 0x06 done.
577 07:05:00.925322 VMX status: enabled
578 07:05:00.925409 VMX status: enabled
579 07:05:00.928276 IA32_FEATURE_CONTROL status: locked
580 07:05:00.931940 IA32_FEATURE_CONTROL status: locked
581 07:05:00.935017 Skip microcode update
582 07:05:00.938665 Skip microcode update
583 07:05:00.938753 CPU #7 initialized
584 07:05:00.941744 CPU #6 initialized
585 07:05:00.945479 apic_id: 0x01 done.
586 07:05:00.945566 Setting up local APIC...
587 07:05:00.948090 VMX status: enabled
588 07:05:00.951723 apic_id: 0x04 done.
589 07:05:00.951810 apic_id: 0x05 done.
590 07:05:00.955244 VMX status: enabled
591 07:05:00.955330 VMX status: enabled
592 07:05:00.961505 IA32_FEATURE_CONTROL status: locked
593 07:05:00.965088 IA32_FEATURE_CONTROL status: locked
594 07:05:00.965177 Skip microcode update
595 07:05:00.968313 Skip microcode update
596 07:05:00.971501 CPU #4 initialized
597 07:05:00.971594 CPU #5 initialized
598 07:05:00.974871 IA32_FEATURE_CONTROL status: locked
599 07:05:00.977757 Skip microcode update
600 07:05:00.981232 CPU #2 initialized
601 07:05:00.984258 bsp_do_flight_plan done after 459 msecs.
602 07:05:00.987921 CPU: frequency set to 4200 MHz
603 07:05:00.988007 Enabling SMIs.
604 07:05:00.990878 Locking SMM.
605 07:05:01.004904 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
606 07:05:01.008483 CBFS @ c08000 size 3f8000
607 07:05:01.015098 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
608 07:05:01.015185 CBFS: Locating 'vbt.bin'
609 07:05:01.021583 CBFS: Found @ offset 5f5c0 size 499
610 07:05:01.024500 Found a VBT of 4608 bytes after decompression
611 07:05:01.207141 Display FSP Version Info HOB
612 07:05:01.210694 Reference Code - CPU = 9.0.1e.30
613 07:05:01.213707 uCode Version = 0.0.0.ca
614 07:05:01.216774 TXT ACM version = ff.ff.ff.ffff
615 07:05:01.220203 Display FSP Version Info HOB
616 07:05:01.223797 Reference Code - ME = 9.0.1e.30
617 07:05:01.226752 MEBx version = 0.0.0.0
618 07:05:01.229743 ME Firmware Version = Consumer SKU
619 07:05:01.233271 Display FSP Version Info HOB
620 07:05:01.236257 Reference Code - CML PCH = 9.0.1e.30
621 07:05:01.239753 PCH-CRID Status = Disabled
622 07:05:01.242728 PCH-CRID Original Value = ff.ff.ff.ffff
623 07:05:01.246085 PCH-CRID New Value = ff.ff.ff.ffff
624 07:05:01.249266 OPROM - RST - RAID = ff.ff.ff.ffff
625 07:05:01.252630 ChipsetInit Base Version = ff.ff.ff.ffff
626 07:05:01.259454 ChipsetInit Oem Version = ff.ff.ff.ffff
627 07:05:01.259534 Display FSP Version Info HOB
628 07:05:01.265964 Reference Code - SA - System Agent = 9.0.1e.30
629 07:05:01.269049 Reference Code - MRC = 0.7.1.6c
630 07:05:01.272507 SA - PCIe Version = 9.0.1e.30
631 07:05:01.275404 SA-CRID Status = Disabled
632 07:05:01.278763 SA-CRID Original Value = 0.0.0.c
633 07:05:01.281703 SA-CRID New Value = 0.0.0.c
634 07:05:01.281789 OPROM - VBIOS = ff.ff.ff.ffff
635 07:05:01.285764 RTC Init
636 07:05:01.289300 Set power on after power failure.
637 07:05:01.289382 Disabling Deep S3
638 07:05:01.292303 Disabling Deep S3
639 07:05:01.295472 Disabling Deep S4
640 07:05:01.295549 Disabling Deep S4
641 07:05:01.299108 Disabling Deep S5
642 07:05:01.299183 Disabling Deep S5
643 07:05:01.305565 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
644 07:05:01.308506 Enumerating buses...
645 07:05:01.312167 Show all devs... Before device enumeration.
646 07:05:01.315157 Root Device: enabled 1
647 07:05:01.318753 CPU_CLUSTER: 0: enabled 1
648 07:05:01.318827 DOMAIN: 0000: enabled 1
649 07:05:01.321857 APIC: 00: enabled 1
650 07:05:01.325276 PCI: 00:00.0: enabled 1
651 07:05:01.325346 PCI: 00:02.0: enabled 1
652 07:05:01.328045 PCI: 00:04.0: enabled 0
653 07:05:01.331631 PCI: 00:05.0: enabled 0
654 07:05:01.334687 PCI: 00:12.0: enabled 1
655 07:05:01.334759 PCI: 00:12.5: enabled 0
656 07:05:01.338195 PCI: 00:12.6: enabled 0
657 07:05:01.341754 PCI: 00:14.0: enabled 1
658 07:05:01.344690 PCI: 00:14.1: enabled 0
659 07:05:01.344764 PCI: 00:14.3: enabled 1
660 07:05:01.348233 PCI: 00:14.5: enabled 0
661 07:05:01.351126 PCI: 00:15.0: enabled 1
662 07:05:01.354689 PCI: 00:15.1: enabled 1
663 07:05:01.354774 PCI: 00:15.2: enabled 0
664 07:05:01.357468 PCI: 00:15.3: enabled 0
665 07:05:01.360933 PCI: 00:16.0: enabled 1
666 07:05:01.364375 PCI: 00:16.1: enabled 0
667 07:05:01.364446 PCI: 00:16.2: enabled 0
668 07:05:01.367233 PCI: 00:16.3: enabled 0
669 07:05:01.370848 PCI: 00:16.4: enabled 0
670 07:05:01.373738 PCI: 00:16.5: enabled 0
671 07:05:01.373809 PCI: 00:17.0: enabled 1
672 07:05:01.377300 PCI: 00:19.0: enabled 1
673 07:05:01.380827 PCI: 00:19.1: enabled 0
674 07:05:01.383848 PCI: 00:19.2: enabled 0
675 07:05:01.383928 PCI: 00:1a.0: enabled 0
676 07:05:01.387274 PCI: 00:1c.0: enabled 0
677 07:05:01.390192 PCI: 00:1c.1: enabled 0
678 07:05:01.393742 PCI: 00:1c.2: enabled 0
679 07:05:01.393823 PCI: 00:1c.3: enabled 0
680 07:05:01.396627 PCI: 00:1c.4: enabled 0
681 07:05:01.400275 PCI: 00:1c.5: enabled 0
682 07:05:01.403234 PCI: 00:1c.6: enabled 0
683 07:05:01.403309 PCI: 00:1c.7: enabled 0
684 07:05:01.406830 PCI: 00:1d.0: enabled 1
685 07:05:01.409733 PCI: 00:1d.1: enabled 0
686 07:05:01.413245 PCI: 00:1d.2: enabled 0
687 07:05:01.413323 PCI: 00:1d.3: enabled 0
688 07:05:01.416244 PCI: 00:1d.4: enabled 0
689 07:05:01.419903 PCI: 00:1d.5: enabled 1
690 07:05:01.422840 PCI: 00:1e.0: enabled 1
691 07:05:01.422913 PCI: 00:1e.1: enabled 0
692 07:05:01.426369 PCI: 00:1e.2: enabled 1
693 07:05:01.429351 PCI: 00:1e.3: enabled 1
694 07:05:01.432770 PCI: 00:1f.0: enabled 1
695 07:05:01.432848 PCI: 00:1f.1: enabled 1
696 07:05:01.435850 PCI: 00:1f.2: enabled 1
697 07:05:01.439741 PCI: 00:1f.3: enabled 1
698 07:05:01.439817 PCI: 00:1f.4: enabled 1
699 07:05:01.442660 PCI: 00:1f.5: enabled 1
700 07:05:01.445625 PCI: 00:1f.6: enabled 0
701 07:05:01.448976 USB0 port 0: enabled 1
702 07:05:01.449060 I2C: 00:15: enabled 1
703 07:05:01.452611 I2C: 00:5d: enabled 1
704 07:05:01.455707 GENERIC: 0.0: enabled 1
705 07:05:01.458707 I2C: 00:1a: enabled 1
706 07:05:01.458788 I2C: 00:38: enabled 1
707 07:05:01.462194 I2C: 00:39: enabled 1
708 07:05:01.465104 I2C: 00:3a: enabled 1
709 07:05:01.465180 I2C: 00:3b: enabled 1
710 07:05:01.468587 PCI: 00:00.0: enabled 1
711 07:05:01.472038 SPI: 00: enabled 1
712 07:05:01.472114 SPI: 01: enabled 1
713 07:05:01.475090 PNP: 0c09.0: enabled 1
714 07:05:01.478719 USB2 port 0: enabled 1
715 07:05:01.478797 USB2 port 1: enabled 1
716 07:05:01.481486 USB2 port 2: enabled 0
717 07:05:01.484997 USB2 port 3: enabled 0
718 07:05:01.485077 USB2 port 5: enabled 0
719 07:05:01.487992 USB2 port 6: enabled 1
720 07:05:01.491422 USB2 port 9: enabled 1
721 07:05:01.494489 USB3 port 0: enabled 1
722 07:05:01.494572 USB3 port 1: enabled 1
723 07:05:01.498027 USB3 port 2: enabled 1
724 07:05:01.501801 USB3 port 3: enabled 1
725 07:05:01.501878 USB3 port 4: enabled 0
726 07:05:01.504811 APIC: 02: enabled 1
727 07:05:01.508125 APIC: 01: enabled 1
728 07:05:01.508213 APIC: 03: enabled 1
729 07:05:01.511418 APIC: 04: enabled 1
730 07:05:01.514411 APIC: 05: enabled 1
731 07:05:01.514499 APIC: 06: enabled 1
732 07:05:01.518102 APIC: 07: enabled 1
733 07:05:01.518190 Compare with tree...
734 07:05:01.521299 Root Device: enabled 1
735 07:05:01.523991 CPU_CLUSTER: 0: enabled 1
736 07:05:01.527415 APIC: 00: enabled 1
737 07:05:01.527503 APIC: 02: enabled 1
738 07:05:01.530393 APIC: 01: enabled 1
739 07:05:01.533862 APIC: 03: enabled 1
740 07:05:01.533951 APIC: 04: enabled 1
741 07:05:01.536910 APIC: 05: enabled 1
742 07:05:01.540436 APIC: 06: enabled 1
743 07:05:01.543445 APIC: 07: enabled 1
744 07:05:01.543534 DOMAIN: 0000: enabled 1
745 07:05:01.547026 PCI: 00:00.0: enabled 1
746 07:05:01.550046 PCI: 00:02.0: enabled 1
747 07:05:01.553241 PCI: 00:04.0: enabled 0
748 07:05:01.556640 PCI: 00:05.0: enabled 0
749 07:05:01.556729 PCI: 00:12.0: enabled 1
750 07:05:01.560209 PCI: 00:12.5: enabled 0
751 07:05:01.563072 PCI: 00:12.6: enabled 0
752 07:05:01.566728 PCI: 00:14.0: enabled 1
753 07:05:01.569608 USB0 port 0: enabled 1
754 07:05:01.569696 USB2 port 0: enabled 1
755 07:05:01.573295 USB2 port 1: enabled 1
756 07:05:01.576098 USB2 port 2: enabled 0
757 07:05:01.579761 USB2 port 3: enabled 0
758 07:05:01.583099 USB2 port 5: enabled 0
759 07:05:01.586096 USB2 port 6: enabled 1
760 07:05:01.586185 USB2 port 9: enabled 1
761 07:05:01.589587 USB3 port 0: enabled 1
762 07:05:01.592549 USB3 port 1: enabled 1
763 07:05:01.596080 USB3 port 2: enabled 1
764 07:05:01.599132 USB3 port 3: enabled 1
765 07:05:01.602740 USB3 port 4: enabled 0
766 07:05:01.602829 PCI: 00:14.1: enabled 0
767 07:05:01.605785 PCI: 00:14.3: enabled 1
768 07:05:01.608789 PCI: 00:14.5: enabled 0
769 07:05:01.612435 PCI: 00:15.0: enabled 1
770 07:05:01.615465 I2C: 00:15: enabled 1
771 07:05:01.615554 PCI: 00:15.1: enabled 1
772 07:05:01.618590 I2C: 00:5d: enabled 1
773 07:05:01.622033 GENERIC: 0.0: enabled 1
774 07:05:01.625090 PCI: 00:15.2: enabled 0
775 07:05:01.628758 PCI: 00:15.3: enabled 0
776 07:05:01.628846 PCI: 00:16.0: enabled 1
777 07:05:01.631532 PCI: 00:16.1: enabled 0
778 07:05:01.634828 PCI: 00:16.2: enabled 0
779 07:05:01.638428 PCI: 00:16.3: enabled 0
780 07:05:01.641687 PCI: 00:16.4: enabled 0
781 07:05:01.641776 PCI: 00:16.5: enabled 0
782 07:05:01.645110 PCI: 00:17.0: enabled 1
783 07:05:01.647939 PCI: 00:19.0: enabled 1
784 07:05:01.651504 I2C: 00:1a: enabled 1
785 07:05:01.655299 I2C: 00:38: enabled 1
786 07:05:01.655387 I2C: 00:39: enabled 1
787 07:05:01.657909 I2C: 00:3a: enabled 1
788 07:05:01.661492 I2C: 00:3b: enabled 1
789 07:05:01.664462 PCI: 00:19.1: enabled 0
790 07:05:01.664551 PCI: 00:19.2: enabled 0
791 07:05:01.668096 PCI: 00:1a.0: enabled 0
792 07:05:01.670918 PCI: 00:1c.0: enabled 0
793 07:05:01.674406 PCI: 00:1c.1: enabled 0
794 07:05:01.678058 PCI: 00:1c.2: enabled 0
795 07:05:01.680868 PCI: 00:1c.3: enabled 0
796 07:05:01.680957 PCI: 00:1c.4: enabled 0
797 07:05:01.683899 PCI: 00:1c.5: enabled 0
798 07:05:01.687192 PCI: 00:1c.6: enabled 0
799 07:05:01.690896 PCI: 00:1c.7: enabled 0
800 07:05:01.694024 PCI: 00:1d.0: enabled 1
801 07:05:01.694112 PCI: 00:1d.1: enabled 0
802 07:05:01.697245 PCI: 00:1d.2: enabled 0
803 07:05:01.700218 PCI: 00:1d.3: enabled 0
804 07:05:01.703778 PCI: 00:1d.4: enabled 0
805 07:05:01.706802 PCI: 00:1d.5: enabled 1
806 07:05:01.706910 PCI: 00:00.0: enabled 1
807 07:05:01.710466 PCI: 00:1e.0: enabled 1
808 07:05:01.713474 PCI: 00:1e.1: enabled 0
809 07:05:01.717029 PCI: 00:1e.2: enabled 1
810 07:05:01.717117 SPI: 00: enabled 1
811 07:05:01.720067 PCI: 00:1e.3: enabled 1
812 07:05:01.723174 SPI: 01: enabled 1
813 07:05:01.726832 PCI: 00:1f.0: enabled 1
814 07:05:01.730202 PNP: 0c09.0: enabled 1
815 07:05:01.730290 PCI: 00:1f.1: enabled 1
816 07:05:01.733195 PCI: 00:1f.2: enabled 1
817 07:05:01.736669 PCI: 00:1f.3: enabled 1
818 07:05:01.739643 PCI: 00:1f.4: enabled 1
819 07:05:01.743216 PCI: 00:1f.5: enabled 1
820 07:05:01.743306 PCI: 00:1f.6: enabled 0
821 07:05:01.746248 Root Device scanning...
822 07:05:01.749266 scan_static_bus for Root Device
823 07:05:01.752897 CPU_CLUSTER: 0 enabled
824 07:05:01.756253 DOMAIN: 0000 enabled
825 07:05:01.756342 DOMAIN: 0000 scanning...
826 07:05:01.759193 PCI: pci_scan_bus for bus 00
827 07:05:01.762742 PCI: 00:00.0 [8086/0000] ops
828 07:05:01.765638 PCI: 00:00.0 [8086/9b61] enabled
829 07:05:01.769134 PCI: 00:02.0 [8086/0000] bus ops
830 07:05:01.772691 PCI: 00:02.0 [8086/9b41] enabled
831 07:05:01.775635 PCI: 00:04.0 [8086/1903] disabled
832 07:05:01.779097 PCI: 00:08.0 [8086/1911] enabled
833 07:05:01.781997 PCI: 00:12.0 [8086/02f9] enabled
834 07:05:01.785667 PCI: 00:14.0 [8086/0000] bus ops
835 07:05:01.788519 PCI: 00:14.0 [8086/02ed] enabled
836 07:05:01.791949 PCI: 00:14.2 [8086/02ef] enabled
837 07:05:01.794945 PCI: 00:14.3 [8086/02f0] enabled
838 07:05:01.798432 PCI: 00:15.0 [8086/0000] bus ops
839 07:05:01.802060 PCI: 00:15.0 [8086/02e8] enabled
840 07:05:01.808097 PCI: 00:15.1 [8086/0000] bus ops
841 07:05:01.811760 PCI: 00:15.1 [8086/02e9] enabled
842 07:05:01.811848 PCI: 00:16.0 [8086/0000] ops
843 07:05:01.814832 PCI: 00:16.0 [8086/02e0] enabled
844 07:05:01.818415 PCI: 00:17.0 [8086/0000] ops
845 07:05:01.821355 PCI: 00:17.0 [8086/02d3] enabled
846 07:05:01.824376 PCI: 00:19.0 [8086/0000] bus ops
847 07:05:01.827960 PCI: 00:19.0 [8086/02c5] enabled
848 07:05:01.830904 PCI: 00:1d.0 [8086/0000] bus ops
849 07:05:01.834568 PCI: 00:1d.0 [8086/02b0] enabled
850 07:05:01.840759 PCI: Static device PCI: 00:1d.5 not found, disabling it.
851 07:05:01.844376 PCI: 00:1e.0 [8086/0000] ops
852 07:05:01.847542 PCI: 00:1e.0 [8086/02a8] enabled
853 07:05:01.850727 PCI: 00:1e.2 [8086/0000] bus ops
854 07:05:01.853683 PCI: 00:1e.2 [8086/02aa] enabled
855 07:05:01.857187 PCI: 00:1e.3 [8086/0000] bus ops
856 07:05:01.860806 PCI: 00:1e.3 [8086/02ab] enabled
857 07:05:01.863806 PCI: 00:1f.0 [8086/0000] bus ops
858 07:05:01.867096 PCI: 00:1f.0 [8086/0284] enabled
859 07:05:01.873647 PCI: Static device PCI: 00:1f.1 not found, disabling it.
860 07:05:01.880075 PCI: Static device PCI: 00:1f.2 not found, disabling it.
861 07:05:01.883651 PCI: 00:1f.3 [8086/0000] bus ops
862 07:05:01.886680 PCI: 00:1f.3 [8086/02c8] enabled
863 07:05:01.890099 PCI: 00:1f.4 [8086/0000] bus ops
864 07:05:01.892886 PCI: 00:1f.4 [8086/02a3] enabled
865 07:05:01.896438 PCI: 00:1f.5 [8086/0000] bus ops
866 07:05:01.899895 PCI: 00:1f.5 [8086/02a4] enabled
867 07:05:01.903159 PCI: Leftover static devices:
868 07:05:01.903238 PCI: 00:05.0
869 07:05:01.906420 PCI: 00:12.5
870 07:05:01.906495 PCI: 00:12.6
871 07:05:01.906609 PCI: 00:14.1
872 07:05:01.909530 PCI: 00:14.5
873 07:05:01.909603 PCI: 00:15.2
874 07:05:01.912568 PCI: 00:15.3
875 07:05:01.912644 PCI: 00:16.1
876 07:05:01.912707 PCI: 00:16.2
877 07:05:01.916403 PCI: 00:16.3
878 07:05:01.916480 PCI: 00:16.4
879 07:05:01.919203 PCI: 00:16.5
880 07:05:01.919284 PCI: 00:19.1
881 07:05:01.923186 PCI: 00:19.2
882 07:05:01.923263 PCI: 00:1a.0
883 07:05:01.923342 PCI: 00:1c.0
884 07:05:01.925794 PCI: 00:1c.1
885 07:05:01.925874 PCI: 00:1c.2
886 07:05:01.928880 PCI: 00:1c.3
887 07:05:01.928955 PCI: 00:1c.4
888 07:05:01.929017 PCI: 00:1c.5
889 07:05:01.932453 PCI: 00:1c.6
890 07:05:01.932539 PCI: 00:1c.7
891 07:05:01.935424 PCI: 00:1d.1
892 07:05:01.935500 PCI: 00:1d.2
893 07:05:01.938914 PCI: 00:1d.3
894 07:05:01.938994 PCI: 00:1d.4
895 07:05:01.939075 PCI: 00:1d.5
896 07:05:01.942280 PCI: 00:1e.1
897 07:05:01.942368 PCI: 00:1f.1
898 07:05:01.945499 PCI: 00:1f.2
899 07:05:01.945582 PCI: 00:1f.6
900 07:05:01.949043 PCI: Check your devicetree.cb.
901 07:05:01.951830 PCI: 00:02.0 scanning...
902 07:05:01.955206 scan_generic_bus for PCI: 00:02.0
903 07:05:01.958798 scan_generic_bus for PCI: 00:02.0 done
904 07:05:01.965231 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
905 07:05:01.968734 PCI: 00:14.0 scanning...
906 07:05:01.971466 scan_static_bus for PCI: 00:14.0
907 07:05:01.971563 USB0 port 0 enabled
908 07:05:01.974932 USB0 port 0 scanning...
909 07:05:01.977910 scan_static_bus for USB0 port 0
910 07:05:01.981326 USB2 port 0 enabled
911 07:05:01.981404 USB2 port 1 enabled
912 07:05:01.984357 USB2 port 2 disabled
913 07:05:01.987965 USB2 port 3 disabled
914 07:05:01.988050 USB2 port 5 disabled
915 07:05:01.991480 USB2 port 6 enabled
916 07:05:01.994678 USB2 port 9 enabled
917 07:05:01.994762 USB3 port 0 enabled
918 07:05:01.997833 USB3 port 1 enabled
919 07:05:01.997922 USB3 port 2 enabled
920 07:05:02.000746 USB3 port 3 enabled
921 07:05:02.004158 USB3 port 4 disabled
922 07:05:02.004246 USB2 port 0 scanning...
923 07:05:02.007816 scan_static_bus for USB2 port 0
924 07:05:02.014251 scan_static_bus for USB2 port 0 done
925 07:05:02.017387 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
926 07:05:02.020920 USB2 port 1 scanning...
927 07:05:02.023966 scan_static_bus for USB2 port 1
928 07:05:02.027609 scan_static_bus for USB2 port 1 done
929 07:05:02.034251 scan_bus: scanning of bus USB2 port 1 took 9685 usecs
930 07:05:02.037154 USB2 port 6 scanning...
931 07:05:02.040448 scan_static_bus for USB2 port 6
932 07:05:02.043885 scan_static_bus for USB2 port 6 done
933 07:05:02.046786 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
934 07:05:02.050428 USB2 port 9 scanning...
935 07:05:02.053432 scan_static_bus for USB2 port 9
936 07:05:02.056755 scan_static_bus for USB2 port 9 done
937 07:05:02.063172 scan_bus: scanning of bus USB2 port 9 took 9702 usecs
938 07:05:02.066785 USB3 port 0 scanning...
939 07:05:02.070408 scan_static_bus for USB3 port 0
940 07:05:02.073064 scan_static_bus for USB3 port 0 done
941 07:05:02.079662 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
942 07:05:02.079760 USB3 port 1 scanning...
943 07:05:02.083192 scan_static_bus for USB3 port 1
944 07:05:02.089463 scan_static_bus for USB3 port 1 done
945 07:05:02.092848 scan_bus: scanning of bus USB3 port 1 took 9686 usecs
946 07:05:02.095751 USB3 port 2 scanning...
947 07:05:02.099216 scan_static_bus for USB3 port 2
948 07:05:02.102281 scan_static_bus for USB3 port 2 done
949 07:05:02.109292 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
950 07:05:02.112246 USB3 port 3 scanning...
951 07:05:02.115447 scan_static_bus for USB3 port 3
952 07:05:02.118712 scan_static_bus for USB3 port 3 done
953 07:05:02.122381 scan_bus: scanning of bus USB3 port 3 took 9705 usecs
954 07:05:02.128710 scan_static_bus for USB0 port 0 done
955 07:05:02.131716 scan_bus: scanning of bus USB0 port 0 took 155305 usecs
956 07:05:02.134750 scan_static_bus for PCI: 00:14.0 done
957 07:05:02.141411 scan_bus: scanning of bus PCI: 00:14.0 took 172927 usecs
958 07:05:02.144995 PCI: 00:15.0 scanning...
959 07:05:02.148395 scan_generic_bus for PCI: 00:15.0
960 07:05:02.151443 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
961 07:05:02.154442 scan_generic_bus for PCI: 00:15.0 done
962 07:05:02.160933 scan_bus: scanning of bus PCI: 00:15.0 took 14299 usecs
963 07:05:02.164493 PCI: 00:15.1 scanning...
964 07:05:02.167918 scan_generic_bus for PCI: 00:15.1
965 07:05:02.170878 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
966 07:05:02.177365 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
967 07:05:02.180989 scan_generic_bus for PCI: 00:15.1 done
968 07:05:02.187447 scan_bus: scanning of bus PCI: 00:15.1 took 18595 usecs
969 07:05:02.187540 PCI: 00:19.0 scanning...
970 07:05:02.190459 scan_generic_bus for PCI: 00:19.0
971 07:05:02.196936 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
972 07:05:02.200413 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
973 07:05:02.203829 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
974 07:05:02.206662 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
975 07:05:02.213328 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
976 07:05:02.216297 scan_generic_bus for PCI: 00:19.0 done
977 07:05:02.223064 scan_bus: scanning of bus PCI: 00:19.0 took 30701 usecs
978 07:05:02.223150 PCI: 00:1d.0 scanning...
979 07:05:02.229679 do_pci_scan_bridge for PCI: 00:1d.0
980 07:05:02.229779 PCI: pci_scan_bus for bus 01
981 07:05:02.236449 PCI: 01:00.0 [1c5c/1327] enabled
982 07:05:02.239282 Enabling Common Clock Configuration
983 07:05:02.242913 L1 Sub-State supported from root port 29
984 07:05:02.245871 L1 Sub-State Support = 0xf
985 07:05:02.249221 CommonModeRestoreTime = 0x28
986 07:05:02.252206 Power On Value = 0x16, Power On Scale = 0x0
987 07:05:02.255817 ASPM: Enabled L1
988 07:05:02.258810 scan_bus: scanning of bus PCI: 00:1d.0 took 32771 usecs
989 07:05:02.262285 PCI: 00:1e.2 scanning...
990 07:05:02.265217 scan_generic_bus for PCI: 00:1e.2
991 07:05:02.268898 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
992 07:05:02.275159 scan_generic_bus for PCI: 00:1e.2 done
993 07:05:02.278860 scan_bus: scanning of bus PCI: 00:1e.2 took 13980 usecs
994 07:05:02.281797 PCI: 00:1e.3 scanning...
995 07:05:02.285436 scan_generic_bus for PCI: 00:1e.3
996 07:05:02.288357 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
997 07:05:02.294975 scan_generic_bus for PCI: 00:1e.3 done
998 07:05:02.298531 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
999 07:05:02.301358 PCI: 00:1f.0 scanning...
1000 07:05:02.304808 scan_static_bus for PCI: 00:1f.0
1001 07:05:02.307715 PNP: 0c09.0 enabled
1002 07:05:02.311357 scan_static_bus for PCI: 00:1f.0 done
1003 07:05:02.318108 scan_bus: scanning of bus PCI: 00:1f.0 took 12040 usecs
1004 07:05:02.318211 PCI: 00:1f.3 scanning...
1005 07:05:02.324713 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1006 07:05:02.327702 PCI: 00:1f.4 scanning...
1007 07:05:02.330896 scan_generic_bus for PCI: 00:1f.4
1008 07:05:02.334251 scan_generic_bus for PCI: 00:1f.4 done
1009 07:05:02.340906 scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
1010 07:05:02.343834 PCI: 00:1f.5 scanning...
1011 07:05:02.347392 scan_generic_bus for PCI: 00:1f.5
1012 07:05:02.350395 scan_generic_bus for PCI: 00:1f.5 done
1013 07:05:02.356937 scan_bus: scanning of bus PCI: 00:1f.5 took 10176 usecs
1014 07:05:02.359959 scan_bus: scanning of bus DOMAIN: 0000 took 604693 usecs
1015 07:05:02.366906 scan_static_bus for Root Device done
1016 07:05:02.369868 scan_bus: scanning of bus Root Device took 624551 usecs
1017 07:05:02.373368 done
1018 07:05:02.373457 Chrome EC: UHEPI supported
1019 07:05:02.380174 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1020 07:05:02.386617 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1021 07:05:02.393440 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1022 07:05:02.399838 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1023 07:05:02.402817 SPI flash protection: WPSW=0 SRP0=0
1024 07:05:02.409883 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1025 07:05:02.412939 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1026 07:05:02.416197 found VGA at PCI: 00:02.0
1027 07:05:02.419503 Setting up VGA for PCI: 00:02.0
1028 07:05:02.426440 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1029 07:05:02.429175 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1030 07:05:02.432687 Allocating resources...
1031 07:05:02.435589 Reading resources...
1032 07:05:02.439415 Root Device read_resources bus 0 link: 0
1033 07:05:02.442430 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1034 07:05:02.449041 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1035 07:05:02.451917 DOMAIN: 0000 read_resources bus 0 link: 0
1036 07:05:02.459721 PCI: 00:14.0 read_resources bus 0 link: 0
1037 07:05:02.462770 USB0 port 0 read_resources bus 0 link: 0
1038 07:05:02.471049 USB0 port 0 read_resources bus 0 link: 0 done
1039 07:05:02.474062 PCI: 00:14.0 read_resources bus 0 link: 0 done
1040 07:05:02.481412 PCI: 00:15.0 read_resources bus 1 link: 0
1041 07:05:02.484942 PCI: 00:15.0 read_resources bus 1 link: 0 done
1042 07:05:02.491349 PCI: 00:15.1 read_resources bus 2 link: 0
1043 07:05:02.494283 PCI: 00:15.1 read_resources bus 2 link: 0 done
1044 07:05:02.501966 PCI: 00:19.0 read_resources bus 3 link: 0
1045 07:05:02.508553 PCI: 00:19.0 read_resources bus 3 link: 0 done
1046 07:05:02.512013 PCI: 00:1d.0 read_resources bus 1 link: 0
1047 07:05:02.518710 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1048 07:05:02.521710 PCI: 00:1e.2 read_resources bus 4 link: 0
1049 07:05:02.528457 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1050 07:05:02.531319 PCI: 00:1e.3 read_resources bus 5 link: 0
1051 07:05:02.538040 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1052 07:05:02.541676 PCI: 00:1f.0 read_resources bus 0 link: 0
1053 07:05:02.548120 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1054 07:05:02.554745 DOMAIN: 0000 read_resources bus 0 link: 0 done
1055 07:05:02.558017 Root Device read_resources bus 0 link: 0 done
1056 07:05:02.560953 Done reading resources.
1057 07:05:02.567606 Show resources in subtree (Root Device)...After reading.
1058 07:05:02.571070 Root Device child on link 0 CPU_CLUSTER: 0
1059 07:05:02.574040 CPU_CLUSTER: 0 child on link 0 APIC: 00
1060 07:05:02.577446 APIC: 00
1061 07:05:02.577538 APIC: 02
1062 07:05:02.580411 APIC: 01
1063 07:05:02.580491 APIC: 03
1064 07:05:02.580557 APIC: 04
1065 07:05:02.583917 APIC: 05
1066 07:05:02.584006 APIC: 06
1067 07:05:02.586865 APIC: 07
1068 07:05:02.590458 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1069 07:05:02.643644 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1070 07:05:02.643970 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1071 07:05:02.644058 PCI: 00:00.0
1072 07:05:02.644349 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1073 07:05:02.645172 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1074 07:05:02.645459 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1075 07:05:02.649269 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1076 07:05:02.658781 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1077 07:05:02.665203 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1078 07:05:02.675267 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1079 07:05:02.685222 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1080 07:05:02.694655 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1081 07:05:02.704384 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1082 07:05:02.714389 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1083 07:05:02.723817 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1084 07:05:02.730322 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1085 07:05:02.744064 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1086 07:05:02.750204 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1087 07:05:02.760611 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1088 07:05:02.763576 PCI: 00:02.0
1089 07:05:02.773664 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1090 07:05:02.783297 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1091 07:05:02.789753 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1092 07:05:02.792638 PCI: 00:04.0
1093 07:05:02.796108 PCI: 00:08.0
1094 07:05:02.805722 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1095 07:05:02.805809 PCI: 00:12.0
1096 07:05:02.815472 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1097 07:05:02.818922 PCI: 00:14.0 child on link 0 USB0 port 0
1098 07:05:02.828474 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1099 07:05:02.835226 USB0 port 0 child on link 0 USB2 port 0
1100 07:05:02.835323 USB2 port 0
1101 07:05:02.838161 USB2 port 1
1102 07:05:02.838250 USB2 port 2
1103 07:05:02.841759 USB2 port 3
1104 07:05:02.841849 USB2 port 5
1105 07:05:02.844733 USB2 port 6
1106 07:05:02.848351 USB2 port 9
1107 07:05:02.848441 USB3 port 0
1108 07:05:02.851328 USB3 port 1
1109 07:05:02.851417 USB3 port 2
1110 07:05:02.854886 USB3 port 3
1111 07:05:02.855061 USB3 port 4
1112 07:05:02.858279 PCI: 00:14.2
1113 07:05:02.867824 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1114 07:05:02.877722 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1115 07:05:02.877816 PCI: 00:14.3
1116 07:05:02.887443 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1117 07:05:02.894056 PCI: 00:15.0 child on link 0 I2C: 01:15
1118 07:05:02.904015 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 07:05:02.904111 I2C: 01:15
1120 07:05:02.907055 PCI: 00:15.1 child on link 0 I2C: 02:5d
1121 07:05:02.920178 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 07:05:02.920270 I2C: 02:5d
1123 07:05:02.923667 GENERIC: 0.0
1124 07:05:02.923750 PCI: 00:16.0
1125 07:05:02.933367 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 07:05:02.936471 PCI: 00:17.0
1127 07:05:02.942898 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1128 07:05:02.953104 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1129 07:05:02.962602 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1130 07:05:02.969175 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1131 07:05:02.979036 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1132 07:05:02.985311 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1133 07:05:02.992114 PCI: 00:19.0 child on link 0 I2C: 03:1a
1134 07:05:03.002117 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1135 07:05:03.002211 I2C: 03:1a
1136 07:05:03.005038 I2C: 03:38
1137 07:05:03.005127 I2C: 03:39
1138 07:05:03.008895 I2C: 03:3a
1139 07:05:03.008983 I2C: 03:3b
1140 07:05:03.015109 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1141 07:05:03.021509 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1142 07:05:03.031170 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1143 07:05:03.041482 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1144 07:05:03.044338 PCI: 01:00.0
1145 07:05:03.054731 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 07:05:03.054861 PCI: 00:1e.0
1147 07:05:03.064092 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1148 07:05:03.073828 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1149 07:05:03.080487 PCI: 00:1e.2 child on link 0 SPI: 00
1150 07:05:03.090084 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 07:05:03.090185 SPI: 00
1152 07:05:03.093609 PCI: 00:1e.3 child on link 0 SPI: 01
1153 07:05:03.103174 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 07:05:03.107003 SPI: 01
1155 07:05:03.109700 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1156 07:05:03.119674 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1157 07:05:03.129189 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1158 07:05:03.129284 PNP: 0c09.0
1159 07:05:03.139504 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1160 07:05:03.139620 PCI: 00:1f.3
1161 07:05:03.149075 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1162 07:05:03.158676 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1163 07:05:03.162162 PCI: 00:1f.4
1164 07:05:03.171997 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1165 07:05:03.182178 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1166 07:05:03.182290 PCI: 00:1f.5
1167 07:05:03.191836 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1168 07:05:03.198466 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1169 07:05:03.204516 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1170 07:05:03.211345 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1171 07:05:03.214174 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1172 07:05:03.217656 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1173 07:05:03.221240 PCI: 00:17.0 18 * [0x60 - 0x67] io
1174 07:05:03.224095 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1175 07:05:03.230660 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1176 07:05:03.237463 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1177 07:05:03.247231 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1178 07:05:03.253840 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1179 07:05:03.259872 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1180 07:05:03.266441 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1181 07:05:03.273760 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1182 07:05:03.276627 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1183 07:05:03.283077 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1184 07:05:03.286133 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1185 07:05:03.292902 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1186 07:05:03.295795 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1187 07:05:03.302469 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1188 07:05:03.305514 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1189 07:05:03.312228 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1190 07:05:03.315704 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1191 07:05:03.322121 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1192 07:05:03.325289 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1193 07:05:03.332122 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1194 07:05:03.335292 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1195 07:05:03.341892 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1196 07:05:03.344938 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1197 07:05:03.351677 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1198 07:05:03.354665 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1199 07:05:03.361326 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1200 07:05:03.365028 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1201 07:05:03.371430 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1202 07:05:03.374330 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1203 07:05:03.380931 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1204 07:05:03.383966 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1205 07:05:03.394073 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1206 07:05:03.397527 avoid_fixed_resources: DOMAIN: 0000
1207 07:05:03.403514 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1208 07:05:03.410031 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1209 07:05:03.417130 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1210 07:05:03.423350 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1211 07:05:03.432964 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1212 07:05:03.440086 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1213 07:05:03.446126 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1214 07:05:03.455963 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1215 07:05:03.462495 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1216 07:05:03.469144 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1217 07:05:03.475849 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1218 07:05:03.485603 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1219 07:05:03.485702 Setting resources...
1220 07:05:03.492107 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1221 07:05:03.498283 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1222 07:05:03.501936 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1223 07:05:03.504956 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1224 07:05:03.508402 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1225 07:05:03.515138 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1226 07:05:03.521194 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1227 07:05:03.527881 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1228 07:05:03.534308 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1229 07:05:03.540629 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1230 07:05:03.544376 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1231 07:05:03.550399 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1232 07:05:03.554066 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1233 07:05:03.560502 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1234 07:05:03.563631 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1235 07:05:03.570007 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1236 07:05:03.573681 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1237 07:05:03.579793 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1238 07:05:03.583214 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1239 07:05:03.589959 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1240 07:05:03.592941 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1241 07:05:03.599356 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1242 07:05:03.603031 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1243 07:05:03.609100 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1244 07:05:03.612495 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1245 07:05:03.619279 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1246 07:05:03.622348 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1247 07:05:03.628721 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1248 07:05:03.632276 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1249 07:05:03.638453 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1250 07:05:03.641983 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1251 07:05:03.648617 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1252 07:05:03.655269 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1253 07:05:03.661799 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1254 07:05:03.667784 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1255 07:05:03.677940 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1256 07:05:03.681080 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1257 07:05:03.687724 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1258 07:05:03.694326 Root Device assign_resources, bus 0 link: 0
1259 07:05:03.697203 DOMAIN: 0000 assign_resources, bus 0 link: 0
1260 07:05:03.707123 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1261 07:05:03.713739 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1262 07:05:03.723655 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1263 07:05:03.730068 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1264 07:05:03.739815 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1265 07:05:03.746441 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1266 07:05:03.753149 PCI: 00:14.0 assign_resources, bus 0 link: 0
1267 07:05:03.756235 PCI: 00:14.0 assign_resources, bus 0 link: 0
1268 07:05:03.765841 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1269 07:05:03.772542 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1270 07:05:03.782550 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1271 07:05:03.789010 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1272 07:05:03.795781 PCI: 00:15.0 assign_resources, bus 1 link: 0
1273 07:05:03.798655 PCI: 00:15.0 assign_resources, bus 1 link: 0
1274 07:05:03.808362 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1275 07:05:03.812154 PCI: 00:15.1 assign_resources, bus 2 link: 0
1276 07:05:03.818065 PCI: 00:15.1 assign_resources, bus 2 link: 0
1277 07:05:03.824552 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1278 07:05:03.834289 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1279 07:05:03.841098 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1280 07:05:03.847412 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1281 07:05:03.857029 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1282 07:05:03.864193 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1283 07:05:03.870773 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1284 07:05:03.880152 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1285 07:05:03.883060 PCI: 00:19.0 assign_resources, bus 3 link: 0
1286 07:05:03.889842 PCI: 00:19.0 assign_resources, bus 3 link: 0
1287 07:05:03.896489 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1288 07:05:03.905996 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1289 07:05:03.915907 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1290 07:05:03.918879 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1291 07:05:03.929076 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1292 07:05:03.931955 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1293 07:05:03.941716 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1294 07:05:03.948711 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1295 07:05:03.954822 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1296 07:05:03.958464 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1297 07:05:03.967988 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1298 07:05:03.971116 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1299 07:05:03.974630 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1300 07:05:03.981098 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1301 07:05:03.984735 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1302 07:05:03.991358 LPC: Trying to open IO window from 800 size 1ff
1303 07:05:03.997428 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1304 07:05:04.007452 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1305 07:05:04.013737 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1306 07:05:04.023518 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1307 07:05:04.026997 DOMAIN: 0000 assign_resources, bus 0 link: 0
1308 07:05:04.034163 Root Device assign_resources, bus 0 link: 0
1309 07:05:04.036947 Done setting resources.
1310 07:05:04.043481 Show resources in subtree (Root Device)...After assigning values.
1311 07:05:04.046404 Root Device child on link 0 CPU_CLUSTER: 0
1312 07:05:04.049841 CPU_CLUSTER: 0 child on link 0 APIC: 00
1313 07:05:04.052859 APIC: 00
1314 07:05:04.052944 APIC: 02
1315 07:05:04.053012 APIC: 01
1316 07:05:04.056498 APIC: 03
1317 07:05:04.056584 APIC: 04
1318 07:05:04.056652 APIC: 05
1319 07:05:04.059497 APIC: 06
1320 07:05:04.059584 APIC: 07
1321 07:05:04.066010 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1322 07:05:04.075693 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1323 07:05:04.085642 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1324 07:05:04.085738 PCI: 00:00.0
1325 07:05:04.095370 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1326 07:05:04.105588 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1327 07:05:04.114666 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1328 07:05:04.124888 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1329 07:05:04.134313 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1330 07:05:04.144063 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1331 07:05:04.154404 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1332 07:05:04.164062 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1333 07:05:04.170060 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1334 07:05:04.180183 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1335 07:05:04.189840 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1336 07:05:04.199491 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1337 07:05:04.209492 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1338 07:05:04.219446 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1339 07:05:04.228999 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1340 07:05:04.235509 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1341 07:05:04.238965 PCI: 00:02.0
1342 07:05:04.248755 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1343 07:05:04.258599 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1344 07:05:04.268368 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1345 07:05:04.271301 PCI: 00:04.0
1346 07:05:04.271390 PCI: 00:08.0
1347 07:05:04.281412 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1348 07:05:04.284475 PCI: 00:12.0
1349 07:05:04.294704 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1350 07:05:04.297692 PCI: 00:14.0 child on link 0 USB0 port 0
1351 07:05:04.310795 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1352 07:05:04.313750 USB0 port 0 child on link 0 USB2 port 0
1353 07:05:04.317403 USB2 port 0
1354 07:05:04.317501 USB2 port 1
1355 07:05:04.320206 USB2 port 2
1356 07:05:04.320286 USB2 port 3
1357 07:05:04.323759 USB2 port 5
1358 07:05:04.323839 USB2 port 6
1359 07:05:04.326698 USB2 port 9
1360 07:05:04.326776 USB3 port 0
1361 07:05:04.330419 USB3 port 1
1362 07:05:04.330496 USB3 port 2
1363 07:05:04.333308 USB3 port 3
1364 07:05:04.333385 USB3 port 4
1365 07:05:04.336914 PCI: 00:14.2
1366 07:05:04.346691 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1367 07:05:04.356274 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1368 07:05:04.359906 PCI: 00:14.3
1369 07:05:04.369554 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1370 07:05:04.372898 PCI: 00:15.0 child on link 0 I2C: 01:15
1371 07:05:04.382698 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1372 07:05:04.385652 I2C: 01:15
1373 07:05:04.389280 PCI: 00:15.1 child on link 0 I2C: 02:5d
1374 07:05:04.398972 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1375 07:05:04.401973 I2C: 02:5d
1376 07:05:04.402064 GENERIC: 0.0
1377 07:05:04.404958 PCI: 00:16.0
1378 07:05:04.415217 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1379 07:05:04.418405 PCI: 00:17.0
1380 07:05:04.428371 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1381 07:05:04.437829 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1382 07:05:04.444364 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1383 07:05:04.454678 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1384 07:05:04.464184 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1385 07:05:04.474391 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1386 07:05:04.477425 PCI: 00:19.0 child on link 0 I2C: 03:1a
1387 07:05:04.490622 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1388 07:05:04.490720 I2C: 03:1a
1389 07:05:04.490793 I2C: 03:38
1390 07:05:04.494054 I2C: 03:39
1391 07:05:04.494144 I2C: 03:3a
1392 07:05:04.497129 I2C: 03:3b
1393 07:05:04.500164 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1394 07:05:04.510401 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1395 07:05:04.520102 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1396 07:05:04.530049 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1397 07:05:04.533500 PCI: 01:00.0
1398 07:05:04.543212 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1399 07:05:04.546601 PCI: 00:1e.0
1400 07:05:04.556299 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1401 07:05:04.565830 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1402 07:05:04.568935 PCI: 00:1e.2 child on link 0 SPI: 00
1403 07:05:04.579185 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1404 07:05:04.582135 SPI: 00
1405 07:05:04.585783 PCI: 00:1e.3 child on link 0 SPI: 01
1406 07:05:04.595364 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1407 07:05:04.598352 SPI: 01
1408 07:05:04.602098 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1409 07:05:04.611538 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1410 07:05:04.617967 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1411 07:05:04.621394 PNP: 0c09.0
1412 07:05:04.631489 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1413 07:05:04.631582 PCI: 00:1f.3
1414 07:05:04.641710 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1415 07:05:04.651241 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1416 07:05:04.654695 PCI: 00:1f.4
1417 07:05:04.664102 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1418 07:05:04.674292 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1419 07:05:04.674387 PCI: 00:1f.5
1420 07:05:04.683647 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1421 07:05:04.687191 Done allocating resources.
1422 07:05:04.693828 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1423 07:05:04.696690 Enabling resources...
1424 07:05:04.700419 PCI: 00:00.0 subsystem <- 8086/9b61
1425 07:05:04.703469 PCI: 00:00.0 cmd <- 06
1426 07:05:04.706446 PCI: 00:02.0 subsystem <- 8086/9b41
1427 07:05:04.710094 PCI: 00:02.0 cmd <- 03
1428 07:05:04.713329 PCI: 00:08.0 cmd <- 06
1429 07:05:04.716634 PCI: 00:12.0 subsystem <- 8086/02f9
1430 07:05:04.719562 PCI: 00:12.0 cmd <- 02
1431 07:05:04.722886 PCI: 00:14.0 subsystem <- 8086/02ed
1432 07:05:04.722974 PCI: 00:14.0 cmd <- 02
1433 07:05:04.726442 PCI: 00:14.2 cmd <- 02
1434 07:05:04.729372 PCI: 00:14.3 subsystem <- 8086/02f0
1435 07:05:04.732889 PCI: 00:14.3 cmd <- 02
1436 07:05:04.735840 PCI: 00:15.0 subsystem <- 8086/02e8
1437 07:05:04.739552 PCI: 00:15.0 cmd <- 02
1438 07:05:04.742496 PCI: 00:15.1 subsystem <- 8086/02e9
1439 07:05:04.745968 PCI: 00:15.1 cmd <- 02
1440 07:05:04.748907 PCI: 00:16.0 subsystem <- 8086/02e0
1441 07:05:04.752402 PCI: 00:16.0 cmd <- 02
1442 07:05:04.756002 PCI: 00:17.0 subsystem <- 8086/02d3
1443 07:05:04.758871 PCI: 00:17.0 cmd <- 03
1444 07:05:04.762298 PCI: 00:19.0 subsystem <- 8086/02c5
1445 07:05:04.765283 PCI: 00:19.0 cmd <- 02
1446 07:05:04.768879 PCI: 00:1d.0 bridge ctrl <- 0013
1447 07:05:04.771887 PCI: 00:1d.0 subsystem <- 8086/02b0
1448 07:05:04.774903 PCI: 00:1d.0 cmd <- 06
1449 07:05:04.778450 PCI: 00:1e.0 subsystem <- 8086/02a8
1450 07:05:04.781605 PCI: 00:1e.0 cmd <- 06
1451 07:05:04.785030 PCI: 00:1e.2 subsystem <- 8086/02aa
1452 07:05:04.785120 PCI: 00:1e.2 cmd <- 06
1453 07:05:04.791700 PCI: 00:1e.3 subsystem <- 8086/02ab
1454 07:05:04.791790 PCI: 00:1e.3 cmd <- 02
1455 07:05:04.795053 PCI: 00:1f.0 subsystem <- 8086/0284
1456 07:05:04.798755 PCI: 00:1f.0 cmd <- 407
1457 07:05:04.801844 PCI: 00:1f.3 subsystem <- 8086/02c8
1458 07:05:04.804957 PCI: 00:1f.3 cmd <- 02
1459 07:05:04.808400 PCI: 00:1f.4 subsystem <- 8086/02a3
1460 07:05:04.811461 PCI: 00:1f.4 cmd <- 03
1461 07:05:04.814638 PCI: 00:1f.5 subsystem <- 8086/02a4
1462 07:05:04.818210 PCI: 00:1f.5 cmd <- 406
1463 07:05:04.827046 PCI: 01:00.0 cmd <- 02
1464 07:05:04.832338 done.
1465 07:05:04.841225 ME: Version: 14.0.39.1367
1466 07:05:04.847693 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 8
1467 07:05:04.850691 Initializing devices...
1468 07:05:04.850811 Root Device init ...
1469 07:05:04.857548 Chrome EC: Set SMI mask to 0x0000000000000000
1470 07:05:04.860786 Chrome EC: clear events_b mask to 0x0000000000000000
1471 07:05:04.867252 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1472 07:05:04.873986 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1473 07:05:04.880470 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1474 07:05:04.883786 Chrome EC: Set WAKE mask to 0x0000000000000000
1475 07:05:04.890239 Root Device init finished in 35172 usecs
1476 07:05:04.890332 CPU_CLUSTER: 0 init ...
1477 07:05:04.896760 CPU_CLUSTER: 0 init finished in 2440 usecs
1478 07:05:04.901542 PCI: 00:00.0 init ...
1479 07:05:04.905053 CPU TDP: 15 Watts
1480 07:05:04.908234 CPU PL2 = 64 Watts
1481 07:05:04.911253 PCI: 00:00.0 init finished in 7084 usecs
1482 07:05:04.914835 PCI: 00:02.0 init ...
1483 07:05:04.917869 PCI: 00:02.0 init finished in 2245 usecs
1484 07:05:04.921368 PCI: 00:08.0 init ...
1485 07:05:04.924405 PCI: 00:08.0 init finished in 2253 usecs
1486 07:05:04.927773 PCI: 00:12.0 init ...
1487 07:05:04.931062 PCI: 00:12.0 init finished in 2252 usecs
1488 07:05:04.934146 PCI: 00:14.0 init ...
1489 07:05:04.937693 PCI: 00:14.0 init finished in 2252 usecs
1490 07:05:04.940669 PCI: 00:14.2 init ...
1491 07:05:04.943816 PCI: 00:14.2 init finished in 2254 usecs
1492 07:05:04.947281 PCI: 00:14.3 init ...
1493 07:05:04.950358 PCI: 00:14.3 init finished in 2270 usecs
1494 07:05:04.953777 PCI: 00:15.0 init ...
1495 07:05:04.957303 DW I2C bus 0 at 0xd121f000 (400 KHz)
1496 07:05:04.963850 PCI: 00:15.0 init finished in 5979 usecs
1497 07:05:04.963944 PCI: 00:15.1 init ...
1498 07:05:04.970704 DW I2C bus 1 at 0xd1220000 (400 KHz)
1499 07:05:04.973611 PCI: 00:15.1 init finished in 5979 usecs
1500 07:05:04.976688 PCI: 00:16.0 init ...
1501 07:05:04.980250 PCI: 00:16.0 init finished in 2243 usecs
1502 07:05:04.983288 PCI: 00:19.0 init ...
1503 07:05:04.986881 DW I2C bus 4 at 0xd1222000 (400 KHz)
1504 07:05:04.989782 PCI: 00:19.0 init finished in 5979 usecs
1505 07:05:04.993435 PCI: 00:1d.0 init ...
1506 07:05:04.996703 Initializing PCH PCIe bridge.
1507 07:05:05.000139 PCI: 00:1d.0 init finished in 5288 usecs
1508 07:05:05.003678 PCI: 00:1f.0 init ...
1509 07:05:05.006639 IOAPIC: Initializing IOAPIC at 0xfec00000
1510 07:05:05.013656 IOAPIC: Bootstrap Processor Local APIC = 0x00
1511 07:05:05.013748 IOAPIC: ID = 0x02
1512 07:05:05.016403 IOAPIC: Dumping registers
1513 07:05:05.020035 reg 0x0000: 0x02000000
1514 07:05:05.022989 reg 0x0001: 0x00770020
1515 07:05:05.026510 reg 0x0002: 0x00000000
1516 07:05:05.029374 PCI: 00:1f.0 init finished in 23542 usecs
1517 07:05:05.032952 PCI: 00:1f.4 init ...
1518 07:05:05.036410 PCI: 00:1f.4 init finished in 2264 usecs
1519 07:05:05.048034 PCI: 01:00.0 init ...
1520 07:05:05.050880 PCI: 01:00.0 init finished in 2252 usecs
1521 07:05:05.056055 PNP: 0c09.0 init ...
1522 07:05:05.059030 Google Chrome EC uptime: 11.048 seconds
1523 07:05:05.065546 Google Chrome AP resets since EC boot: 0
1524 07:05:05.068748 Google Chrome most recent AP reset causes:
1525 07:05:05.075070 Google Chrome EC reset flags at last EC boot: reset-pin
1526 07:05:05.078126 PNP: 0c09.0 init finished in 20570 usecs
1527 07:05:05.081604 Devices initialized
1528 07:05:05.084677 Show all devs... After init.
1529 07:05:05.084765 Root Device: enabled 1
1530 07:05:05.088237 CPU_CLUSTER: 0: enabled 1
1531 07:05:05.091254 DOMAIN: 0000: enabled 1
1532 07:05:05.091341 APIC: 00: enabled 1
1533 07:05:05.094749 PCI: 00:00.0: enabled 1
1534 07:05:05.097748 PCI: 00:02.0: enabled 1
1535 07:05:05.101190 PCI: 00:04.0: enabled 0
1536 07:05:05.101301 PCI: 00:05.0: enabled 0
1537 07:05:05.104210 PCI: 00:12.0: enabled 1
1538 07:05:05.107846 PCI: 00:12.5: enabled 0
1539 07:05:05.110923 PCI: 00:12.6: enabled 0
1540 07:05:05.111011 PCI: 00:14.0: enabled 1
1541 07:05:05.114483 PCI: 00:14.1: enabled 0
1542 07:05:05.117530 PCI: 00:14.3: enabled 1
1543 07:05:05.120570 PCI: 00:14.5: enabled 0
1544 07:05:05.120658 PCI: 00:15.0: enabled 1
1545 07:05:05.124148 PCI: 00:15.1: enabled 1
1546 07:05:05.127581 PCI: 00:15.2: enabled 0
1547 07:05:05.130542 PCI: 00:15.3: enabled 0
1548 07:05:05.130644 PCI: 00:16.0: enabled 1
1549 07:05:05.133929 PCI: 00:16.1: enabled 0
1550 07:05:05.137369 PCI: 00:16.2: enabled 0
1551 07:05:05.140421 PCI: 00:16.3: enabled 0
1552 07:05:05.140509 PCI: 00:16.4: enabled 0
1553 07:05:05.143807 PCI: 00:16.5: enabled 0
1554 07:05:05.146874 PCI: 00:17.0: enabled 1
1555 07:05:05.149824 PCI: 00:19.0: enabled 1
1556 07:05:05.149912 PCI: 00:19.1: enabled 0
1557 07:05:05.153503 PCI: 00:19.2: enabled 0
1558 07:05:05.157114 PCI: 00:1a.0: enabled 0
1559 07:05:05.159798 PCI: 00:1c.0: enabled 0
1560 07:05:05.159890 PCI: 00:1c.1: enabled 0
1561 07:05:05.163311 PCI: 00:1c.2: enabled 0
1562 07:05:05.166245 PCI: 00:1c.3: enabled 0
1563 07:05:05.169640 PCI: 00:1c.4: enabled 0
1564 07:05:05.169722 PCI: 00:1c.5: enabled 0
1565 07:05:05.173198 PCI: 00:1c.6: enabled 0
1566 07:05:05.176250 PCI: 00:1c.7: enabled 0
1567 07:05:05.179823 PCI: 00:1d.0: enabled 1
1568 07:05:05.179919 PCI: 00:1d.1: enabled 0
1569 07:05:05.182997 PCI: 00:1d.2: enabled 0
1570 07:05:05.185937 PCI: 00:1d.3: enabled 0
1571 07:05:05.189581 PCI: 00:1d.4: enabled 0
1572 07:05:05.189670 PCI: 00:1d.5: enabled 0
1573 07:05:05.192682 PCI: 00:1e.0: enabled 1
1574 07:05:05.195945 PCI: 00:1e.1: enabled 0
1575 07:05:05.199451 PCI: 00:1e.2: enabled 1
1576 07:05:05.199556 PCI: 00:1e.3: enabled 1
1577 07:05:05.202141 PCI: 00:1f.0: enabled 1
1578 07:05:05.205805 PCI: 00:1f.1: enabled 0
1579 07:05:05.205907 PCI: 00:1f.2: enabled 0
1580 07:05:05.208947 PCI: 00:1f.3: enabled 1
1581 07:05:05.212618 PCI: 00:1f.4: enabled 1
1582 07:05:05.215636 PCI: 00:1f.5: enabled 1
1583 07:05:05.215754 PCI: 00:1f.6: enabled 0
1584 07:05:05.218534 USB0 port 0: enabled 1
1585 07:05:05.222291 I2C: 01:15: enabled 1
1586 07:05:05.225152 I2C: 02:5d: enabled 1
1587 07:05:05.225239 GENERIC: 0.0: enabled 1
1588 07:05:05.228625 I2C: 03:1a: enabled 1
1589 07:05:05.231905 I2C: 03:38: enabled 1
1590 07:05:05.231992 I2C: 03:39: enabled 1
1591 07:05:05.235162 I2C: 03:3a: enabled 1
1592 07:05:05.238104 I2C: 03:3b: enabled 1
1593 07:05:05.238215 PCI: 00:00.0: enabled 1
1594 07:05:05.241742 SPI: 00: enabled 1
1595 07:05:05.244897 SPI: 01: enabled 1
1596 07:05:05.245008 PNP: 0c09.0: enabled 1
1597 07:05:05.247872 USB2 port 0: enabled 1
1598 07:05:05.251533 USB2 port 1: enabled 1
1599 07:05:05.255101 USB2 port 2: enabled 0
1600 07:05:05.255249 USB2 port 3: enabled 0
1601 07:05:05.257955 USB2 port 5: enabled 0
1602 07:05:05.261289 USB2 port 6: enabled 1
1603 07:05:05.261455 USB2 port 9: enabled 1
1604 07:05:05.264939 USB3 port 0: enabled 1
1605 07:05:05.267869 USB3 port 1: enabled 1
1606 07:05:05.271339 USB3 port 2: enabled 1
1607 07:05:05.271561 USB3 port 3: enabled 1
1608 07:05:05.274685 USB3 port 4: enabled 0
1609 07:05:05.278135 APIC: 02: enabled 1
1610 07:05:05.278498 APIC: 01: enabled 1
1611 07:05:05.281288 APIC: 03: enabled 1
1612 07:05:05.281613 APIC: 04: enabled 1
1613 07:05:05.284330 APIC: 05: enabled 1
1614 07:05:05.287915 APIC: 06: enabled 1
1615 07:05:05.288355 APIC: 07: enabled 1
1616 07:05:05.290919 PCI: 00:08.0: enabled 1
1617 07:05:05.294065 PCI: 00:14.2: enabled 1
1618 07:05:05.297649 PCI: 01:00.0: enabled 1
1619 07:05:05.300829 Disabling ACPI via APMC:
1620 07:05:05.301312 done.
1621 07:05:05.307424 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1622 07:05:05.310938 ELOG: NV offset 0xaf0000 size 0x4000
1623 07:05:05.317420 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1624 07:05:05.324086 ELOG: Event(17) added with size 13 at 2023-02-07 07:05:04 UTC
1625 07:05:05.330594 POST: Unexpected post code in previous boot: 0x25
1626 07:05:05.337227 ELOG: Event(A3) added with size 11 at 2023-02-07 07:05:04 UTC
1627 07:05:05.343426 ELOG: Event(A6) added with size 13 at 2023-02-07 07:05:04 UTC
1628 07:05:05.349991 ELOG: Event(92) added with size 9 at 2023-02-07 07:05:04 UTC
1629 07:05:05.356572 ELOG: Event(93) added with size 9 at 2023-02-07 07:05:04 UTC
1630 07:05:05.362843 ELOG: Event(9A) added with size 9 at 2023-02-07 07:05:04 UTC
1631 07:05:05.369590 ELOG: Event(9E) added with size 10 at 2023-02-07 07:05:04 UTC
1632 07:05:05.372907 ELOG: Event(9F) added with size 14 at 2023-02-07 07:05:04 UTC
1633 07:05:05.379226 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1634 07:05:05.385701 ELOG: Event(A1) added with size 10 at 2023-02-07 07:05:04 UTC
1635 07:05:05.395546 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1636 07:05:05.402281 ELOG: Event(A0) added with size 9 at 2023-02-07 07:05:04 UTC
1637 07:05:05.405110 elog_add_boot_reason: Logged dev mode boot
1638 07:05:05.405568 Finalize devices...
1639 07:05:05.408575 PCI: 00:17.0 final
1640 07:05:05.412035 Devices finalized
1641 07:05:05.415159 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1642 07:05:05.421831 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1643 07:05:05.424763 ME: HFSTS1 : 0x90000245
1644 07:05:05.427918 ME: HFSTS2 : 0x3B850126
1645 07:05:05.434375 ME: HFSTS3 : 0x00000020
1646 07:05:05.437921 ME: HFSTS4 : 0x00004800
1647 07:05:05.441384 ME: HFSTS5 : 0x00000000
1648 07:05:05.444241 ME: HFSTS6 : 0x40400006
1649 07:05:05.447795 ME: Manufacturing Mode : NO
1650 07:05:05.451240 ME: FW Partition Table : OK
1651 07:05:05.454170 ME: Bringup Loader Failure : NO
1652 07:05:05.460775 ME: Firmware Init Complete : YES
1653 07:05:05.463803 ME: Boot Options Present : NO
1654 07:05:05.467292 ME: Update In Progress : NO
1655 07:05:05.470317 ME: D0i3 Support : YES
1656 07:05:05.473979 ME: Low Power State Enabled : NO
1657 07:05:05.476883 ME: CPU Replaced : NO
1658 07:05:05.480314 ME: CPU Replacement Valid : YES
1659 07:05:05.483733 ME: Current Working State : 5
1660 07:05:05.486999 ME: Current Operation State : 1
1661 07:05:05.490085 ME: Current Operation Mode : 0
1662 07:05:05.493153 ME: Error Code : 0
1663 07:05:05.496940 ME: CPU Debug Disabled : YES
1664 07:05:05.499581 ME: TXT Support : NO
1665 07:05:05.503356 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1666 07:05:05.509896 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1667 07:05:05.512813 CBFS @ c08000 size 3f8000
1668 07:05:05.519528 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1669 07:05:05.522565 CBFS: Locating 'fallback/dsdt.aml'
1670 07:05:05.525880 CBFS: Found @ offset 10bb80 size 3fa5
1671 07:05:05.529219 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1672 07:05:05.532106 CBFS @ c08000 size 3f8000
1673 07:05:05.539328 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1674 07:05:05.541955 CBFS: Locating 'fallback/slic'
1675 07:05:05.548823 CBFS: 'fallback/slic' not found.
1676 07:05:05.552414 ACPI: Writing ACPI tables at 99b3e000.
1677 07:05:05.552867 ACPI: * FACS
1678 07:05:05.555501 ACPI: * DSDT
1679 07:05:05.559290 Ramoops buffer: 0x100000@0x99a3d000.
1680 07:05:05.561868 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1681 07:05:05.569087 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1682 07:05:05.572117 Google Chrome EC: version:
1683 07:05:05.575179 ro: helios_v2.0.2659-56403530b
1684 07:05:05.578894 rw: helios_v2.0.2849-c41de27e7d
1685 07:05:05.579415 running image: 1
1686 07:05:05.583475 ACPI: * FADT
1687 07:05:05.583930 SCI is IRQ9
1688 07:05:05.589533 ACPI: added table 1/32, length now 40
1689 07:05:05.590009 ACPI: * SSDT
1690 07:05:05.593140 Found 1 CPU(s) with 8 core(s) each.
1691 07:05:05.599817 Error: Could not locate 'wifi_sar' in VPD.
1692 07:05:05.602730 Checking CBFS for default SAR values
1693 07:05:05.605846 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 07:05:05.609366 CBFS @ c08000 size 3f8000
1695 07:05:05.616252 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 07:05:05.618790 CBFS: Locating 'wifi_sar_defaults.hex'
1697 07:05:05.622577 CBFS: Found @ offset 5fac0 size 77
1698 07:05:05.625544 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1699 07:05:05.632009 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1700 07:05:05.635284 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1701 07:05:05.641853 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1702 07:05:05.645318 failed to find key in VPD: dsm_calib_r0_0
1703 07:05:05.654758 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1704 07:05:05.661121 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1705 07:05:05.665063 failed to find key in VPD: dsm_calib_r0_1
1706 07:05:05.674857 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1707 07:05:05.677885 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1708 07:05:05.680756 failed to find key in VPD: dsm_calib_r0_2
1709 07:05:05.690910 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1710 07:05:05.697492 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1711 07:05:05.700885 failed to find key in VPD: dsm_calib_r0_3
1712 07:05:05.710711 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1713 07:05:05.713867 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1714 07:05:05.720242 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1715 07:05:05.723904 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1716 07:05:05.727002 EC returned error result code 1
1717 07:05:05.730423 EC returned error result code 1
1718 07:05:05.733512 EC returned error result code 1
1719 07:05:05.740122 PS2K: Bad resp from EC. Vivaldi disabled!
1720 07:05:05.747022 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1721 07:05:05.749850 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1722 07:05:05.756290 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1723 07:05:05.759857 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1724 07:05:05.766425 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1725 07:05:05.772771 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1726 07:05:05.779530 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1727 07:05:05.786101 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1728 07:05:05.789013 ACPI: added table 2/32, length now 44
1729 07:05:05.789503 ACPI: * MCFG
1730 07:05:05.792716 ACPI: added table 3/32, length now 48
1731 07:05:05.795546 ACPI: * TPM2
1732 07:05:05.799117 TPM2 log created at 99a2d000
1733 07:05:05.801964 ACPI: added table 4/32, length now 52
1734 07:05:05.802484 ACPI: * MADT
1735 07:05:05.805501 SCI is IRQ9
1736 07:05:05.808536 ACPI: added table 5/32, length now 56
1737 07:05:05.812166 current = 99b43ac0
1738 07:05:05.812623 ACPI: * DMAR
1739 07:05:05.815275 ACPI: added table 6/32, length now 60
1740 07:05:05.818723 ACPI: * IGD OpRegion
1741 07:05:05.821666 GMA: Found VBT in CBFS
1742 07:05:05.825133 GMA: Found valid VBT in CBFS
1743 07:05:05.828188 ACPI: added table 7/32, length now 64
1744 07:05:05.828639 ACPI: * HPET
1745 07:05:05.834711 ACPI: added table 8/32, length now 68
1746 07:05:05.835233 ACPI: done.
1747 07:05:05.838245 ACPI tables: 31744 bytes.
1748 07:05:05.841249 smbios_write_tables: 99a2c000
1749 07:05:05.844713 EC returned error result code 3
1750 07:05:05.847507 Couldn't obtain OEM name from CBI
1751 07:05:05.850889 Create SMBIOS type 17
1752 07:05:05.854469 PCI: 00:00.0 (Intel Cannonlake)
1753 07:05:05.854958 PCI: 00:14.3 (Intel WiFi)
1754 07:05:05.857476 SMBIOS tables: 939 bytes.
1755 07:05:05.864224 Writing table forward entry at 0x00000500
1756 07:05:05.867168 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1757 07:05:05.873810 Writing coreboot table at 0x99b62000
1758 07:05:05.877235 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1759 07:05:05.883840 1. 0000000000001000-000000000009ffff: RAM
1760 07:05:05.886828 2. 00000000000a0000-00000000000fffff: RESERVED
1761 07:05:05.889829 3. 0000000000100000-0000000099a2bfff: RAM
1762 07:05:05.896713 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1763 07:05:05.903123 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1764 07:05:05.909840 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1765 07:05:05.912890 7. 000000009a000000-000000009f7fffff: RESERVED
1766 07:05:05.915916 8. 00000000e0000000-00000000efffffff: RESERVED
1767 07:05:05.922381 9. 00000000fc000000-00000000fc000fff: RESERVED
1768 07:05:05.926144 10. 00000000fe000000-00000000fe00ffff: RESERVED
1769 07:05:05.932069 11. 00000000fed10000-00000000fed17fff: RESERVED
1770 07:05:05.935553 12. 00000000fed80000-00000000fed83fff: RESERVED
1771 07:05:05.942412 13. 00000000fed90000-00000000fed91fff: RESERVED
1772 07:05:05.945184 14. 00000000feda0000-00000000feda1fff: RESERVED
1773 07:05:05.951917 15. 0000000100000000-000000045e7fffff: RAM
1774 07:05:05.955519 Graphics framebuffer located at 0xc0000000
1775 07:05:05.958326 Passing 5 GPIOs to payload:
1776 07:05:05.961611 NAME | PORT | POLARITY | VALUE
1777 07:05:05.968058 write protect | undefined | high | low
1778 07:05:05.974587 lid | undefined | high | high
1779 07:05:05.978375 power | undefined | high | low
1780 07:05:05.984392 oprom | undefined | high | low
1781 07:05:05.987917 EC in RW | 0x000000cb | high | low
1782 07:05:05.990942 Board ID: 4
1783 07:05:05.994544 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1784 07:05:05.997598 CBFS @ c08000 size 3f8000
1785 07:05:06.003928 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1786 07:05:06.010887 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861
1787 07:05:06.013976 coreboot table: 1492 bytes.
1788 07:05:06.016984 IMD ROOT 0. 99fff000 00001000
1789 07:05:06.020566 IMD SMALL 1. 99ffe000 00001000
1790 07:05:06.023535 FSP MEMORY 2. 99c4e000 003b0000
1791 07:05:06.026995 CONSOLE 3. 99c2e000 00020000
1792 07:05:06.030532 FMAP 4. 99c2d000 0000054e
1793 07:05:06.033522 TIME STAMP 5. 99c2c000 00000910
1794 07:05:06.037156 VBOOT WORK 6. 99c18000 00014000
1795 07:05:06.039838 MRC DATA 7. 99c16000 00001958
1796 07:05:06.043130 ROMSTG STCK 8. 99c15000 00001000
1797 07:05:06.046510 AFTER CAR 9. 99c0b000 0000a000
1798 07:05:06.049974 RAMSTAGE 10. 99baf000 0005c000
1799 07:05:06.052927 REFCODE 11. 99b7a000 00035000
1800 07:05:06.056538 SMM BACKUP 12. 99b6a000 00010000
1801 07:05:06.059586 COREBOOT 13. 99b62000 00008000
1802 07:05:06.062972 ACPI 14. 99b3e000 00024000
1803 07:05:06.065915 ACPI GNVS 15. 99b3d000 00001000
1804 07:05:06.069321 RAMOOPS 16. 99a3d000 00100000
1805 07:05:06.072762 TPM2 TCGLOG17. 99a2d000 00010000
1806 07:05:06.075818 SMBIOS 18. 99a2c000 00000800
1807 07:05:06.078943 IMD small region:
1808 07:05:06.082592 IMD ROOT 0. 99ffec00 00000400
1809 07:05:06.085606 FSP RUNTIME 1. 99ffebe0 00000004
1810 07:05:06.088775 EC HOSTEVENT 2. 99ffebc0 00000008
1811 07:05:06.092158 POWER STATE 3. 99ffeb80 00000040
1812 07:05:06.095214 ROMSTAGE 4. 99ffeb60 00000004
1813 07:05:06.098345 MEM INFO 5. 99ffe9a0 000001b9
1814 07:05:06.101847 VPD 6. 99ffe920 0000006c
1815 07:05:06.104799 MTRR: Physical address space:
1816 07:05:06.111799 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1817 07:05:06.117880 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1818 07:05:06.124525 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1819 07:05:06.130879 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1820 07:05:06.137621 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1821 07:05:06.144235 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1822 07:05:06.150710 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1823 07:05:06.153681 MTRR: Fixed MSR 0x250 0x0606060606060606
1824 07:05:06.157098 MTRR: Fixed MSR 0x258 0x0606060606060606
1825 07:05:06.159935 MTRR: Fixed MSR 0x259 0x0000000000000000
1826 07:05:06.166967 MTRR: Fixed MSR 0x268 0x0606060606060606
1827 07:05:06.170086 MTRR: Fixed MSR 0x269 0x0606060606060606
1828 07:05:06.173112 MTRR: Fixed MSR 0x26a 0x0606060606060606
1829 07:05:06.176627 MTRR: Fixed MSR 0x26b 0x0606060606060606
1830 07:05:06.183213 MTRR: Fixed MSR 0x26c 0x0606060606060606
1831 07:05:06.186080 MTRR: Fixed MSR 0x26d 0x0606060606060606
1832 07:05:06.189827 MTRR: Fixed MSR 0x26e 0x0606060606060606
1833 07:05:06.192688 MTRR: Fixed MSR 0x26f 0x0606060606060606
1834 07:05:06.196899 call enable_fixed_mtrr()
1835 07:05:06.199882 CPU physical address size: 39 bits
1836 07:05:06.206751 MTRR: default type WB/UC MTRR counts: 6/8.
1837 07:05:06.209675 MTRR: WB selected as default type.
1838 07:05:06.216116 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1839 07:05:06.223161 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1840 07:05:06.226119 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1841 07:05:06.232700 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1842 07:05:06.239397 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1843 07:05:06.245442 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1844 07:05:06.252401 MTRR: Fixed MSR 0x250 0x0606060606060606
1845 07:05:06.255478 MTRR: Fixed MSR 0x258 0x0606060606060606
1846 07:05:06.258746 MTRR: Fixed MSR 0x259 0x0000000000000000
1847 07:05:06.265431 MTRR: Fixed MSR 0x268 0x0606060606060606
1848 07:05:06.268615 MTRR: Fixed MSR 0x269 0x0606060606060606
1849 07:05:06.271865 MTRR: Fixed MSR 0x26a 0x0606060606060606
1850 07:05:06.275102 MTRR: Fixed MSR 0x26b 0x0606060606060606
1851 07:05:06.281606 MTRR: Fixed MSR 0x26c 0x0606060606060606
1852 07:05:06.284534 MTRR: Fixed MSR 0x26d 0x0606060606060606
1853 07:05:06.288140 MTRR: Fixed MSR 0x26e 0x0606060606060606
1854 07:05:06.291108 MTRR: Fixed MSR 0x26f 0x0606060606060606
1855 07:05:06.291231
1856 07:05:06.294951 MTRR check
1857 07:05:06.297953 Fixed MTRRs : Enabled
1858 07:05:06.298057 Variable MTRRs: Enabled
1859 07:05:06.298136
1860 07:05:06.301575 call enable_fixed_mtrr()
1861 07:05:06.307989 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1862 07:05:06.310851 CPU physical address size: 39 bits
1863 07:05:06.314235 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1864 07:05:06.317688 CBFS @ c08000 size 3f8000
1865 07:05:06.323952 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1866 07:05:06.327200 CBFS: Locating 'fallback/payload'
1867 07:05:06.330841 MTRR: Fixed MSR 0x250 0x0606060606060606
1868 07:05:06.337077 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 07:05:06.340170 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 07:05:06.343698 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 07:05:06.346702 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 07:05:06.353313 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 07:05:06.356950 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 07:05:06.359830 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 07:05:06.363260 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 07:05:06.369764 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 07:05:06.373430 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 07:05:06.376172 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 07:05:06.379653 MTRR: Fixed MSR 0x258 0x0606060606060606
1880 07:05:06.385934 MTRR: Fixed MSR 0x259 0x0000000000000000
1881 07:05:06.389531 MTRR: Fixed MSR 0x268 0x0606060606060606
1882 07:05:06.392596 MTRR: Fixed MSR 0x269 0x0606060606060606
1883 07:05:06.395519 MTRR: Fixed MSR 0x26a 0x0606060606060606
1884 07:05:06.402087 MTRR: Fixed MSR 0x26b 0x0606060606060606
1885 07:05:06.405736 MTRR: Fixed MSR 0x26c 0x0606060606060606
1886 07:05:06.408734 MTRR: Fixed MSR 0x26d 0x0606060606060606
1887 07:05:06.415050 MTRR: Fixed MSR 0x26e 0x0606060606060606
1888 07:05:06.418477 MTRR: Fixed MSR 0x26f 0x0606060606060606
1889 07:05:06.422009 call enable_fixed_mtrr()
1890 07:05:06.422103 call enable_fixed_mtrr()
1891 07:05:06.425127 CPU physical address size: 39 bits
1892 07:05:06.431776 CBFS: Found @ offset 1c96c0 size 3f798
1893 07:05:06.434712 CPU physical address size: 39 bits
1894 07:05:06.438181 Checking segment from ROM address 0xffdd16f8
1895 07:05:06.441254 MTRR: Fixed MSR 0x250 0x0606060606060606
1896 07:05:06.447912 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 07:05:06.451513 MTRR: Fixed MSR 0x258 0x0606060606060606
1898 07:05:06.454575 MTRR: Fixed MSR 0x259 0x0000000000000000
1899 07:05:06.457471 MTRR: Fixed MSR 0x268 0x0606060606060606
1900 07:05:06.463925 MTRR: Fixed MSR 0x269 0x0606060606060606
1901 07:05:06.467549 MTRR: Fixed MSR 0x26a 0x0606060606060606
1902 07:05:06.470448 MTRR: Fixed MSR 0x26b 0x0606060606060606
1903 07:05:06.474085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1904 07:05:06.480249 MTRR: Fixed MSR 0x26d 0x0606060606060606
1905 07:05:06.483768 MTRR: Fixed MSR 0x26e 0x0606060606060606
1906 07:05:06.486946 MTRR: Fixed MSR 0x26f 0x0606060606060606
1907 07:05:06.493491 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 07:05:06.493586 call enable_fixed_mtrr()
1909 07:05:06.500013 MTRR: Fixed MSR 0x259 0x0000000000000000
1910 07:05:06.503622 MTRR: Fixed MSR 0x268 0x0606060606060606
1911 07:05:06.506733 MTRR: Fixed MSR 0x269 0x0606060606060606
1912 07:05:06.510101 MTRR: Fixed MSR 0x26a 0x0606060606060606
1913 07:05:06.516732 MTRR: Fixed MSR 0x26b 0x0606060606060606
1914 07:05:06.519529 MTRR: Fixed MSR 0x26c 0x0606060606060606
1915 07:05:06.523120 MTRR: Fixed MSR 0x26d 0x0606060606060606
1916 07:05:06.526048 MTRR: Fixed MSR 0x26e 0x0606060606060606
1917 07:05:06.532652 MTRR: Fixed MSR 0x26f 0x0606060606060606
1918 07:05:06.536193 CPU physical address size: 39 bits
1919 07:05:06.539226 call enable_fixed_mtrr()
1920 07:05:06.542519 Checking segment from ROM address 0xffdd1714
1921 07:05:06.545489 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 07:05:06.552202 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 07:05:06.555277 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 07:05:06.558889 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 07:05:06.561749 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 07:05:06.568515 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 07:05:06.571548 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 07:05:06.574995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 07:05:06.578118 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 07:05:06.585009 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 07:05:06.588470 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 07:05:06.591693 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 07:05:06.594496 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 07:05:06.598092 call enable_fixed_mtrr()
1935 07:05:06.601118 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 07:05:06.607583 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 07:05:06.611212 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 07:05:06.614231 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 07:05:06.617710 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 07:05:06.624302 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 07:05:06.627306 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 07:05:06.630450 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 07:05:06.633974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 07:05:06.640536 CPU physical address size: 39 bits
1945 07:05:06.643445 call enable_fixed_mtrr()
1946 07:05:06.647104 Loading segment from ROM address 0xffdd16f8
1947 07:05:06.650103 CPU physical address size: 39 bits
1948 07:05:06.653758 CPU physical address size: 39 bits
1949 07:05:06.656745 code (compression=0)
1950 07:05:06.663300 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1951 07:05:06.673363 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1952 07:05:06.676174 it's not compressed!
1953 07:05:06.767162 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1954 07:05:06.773793 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1955 07:05:06.780357 Loading segment from ROM address 0xffdd1714
1956 07:05:06.780446 Entry Point 0x30000000
1957 07:05:06.783393 Loaded segments
1958 07:05:06.789523 Finalizing chipset.
1959 07:05:06.792878 Finalizing SMM.
1960 07:05:06.795716 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1961 07:05:06.799397 mp_park_aps done after 0 msecs.
1962 07:05:06.805786 Jumping to boot code at 30000000(99b62000)
1963 07:05:06.811779 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1964 07:05:06.811867
1965 07:05:06.811959
1966 07:05:06.812045
1967 07:05:06.815415 Starting depthcharge on Helios...
1968 07:05:06.815788 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1969 07:05:06.815912 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1970 07:05:06.816011 Setting prompt string to ['hatch:']
1971 07:05:06.816116 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1972 07:05:06.818512
1973 07:05:06.825340 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1974 07:05:06.825427
1975 07:05:06.831853 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1976 07:05:06.831941
1977 07:05:06.838105 board_setup: Info: eMMC controller not present; skipping
1978 07:05:06.838190
1979 07:05:06.841284 New NVMe Controller 0x30053ac0 @ 00:1d:00
1980 07:05:06.841387
1981 07:05:06.847705 board_setup: Info: SDHCI controller not present; skipping
1982 07:05:06.847792
1983 07:05:06.854572 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1984 07:05:06.854661
1985 07:05:06.857672 Wipe memory regions:
1986 07:05:06.857764
1987 07:05:06.860679 [0x00000000001000, 0x000000000a0000)
1988 07:05:06.860760
1989 07:05:06.864330 [0x00000000100000, 0x00000030000000)
1990 07:05:06.928278
1991 07:05:06.931170 [0x00000030657430, 0x00000099a2c000)
1992 07:05:07.068827
1993 07:05:07.071836 [0x00000100000000, 0x0000045e800000)
1994 07:05:08.454880
1995 07:05:08.455027 R8152: Initializing
1996 07:05:08.455124
1997 07:05:08.457744 Version 9 (ocp_data = 6010)
1998 07:05:08.462160
1999 07:05:08.462244 R8152: Done initializing
2000 07:05:08.462332
2001 07:05:08.465250 Adding net device
2002 07:05:09.070259
2003 07:05:09.070409 R8152: Initializing
2004 07:05:09.070537
2005 07:05:09.073536 Version 6 (ocp_data = 5c30)
2006 07:05:09.073653
2007 07:05:09.076987 R8152: Done initializing
2008 07:05:09.077076
2009 07:05:09.083047 net_add_device: Attemp to include the same device
2010 07:05:09.083128
2011 07:05:09.090166 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2012 07:05:09.090271
2013 07:05:09.090360
2014 07:05:09.090426
2015 07:05:09.090697 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2017 07:05:09.191408 hatch: tftpboot 192.168.201.1 9045507/tftp-deploy-97apsx9d/kernel/bzImage 9045507/tftp-deploy-97apsx9d/kernel/cmdline 9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
2018 07:05:09.191559 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 07:05:09.191645 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2020 07:05:09.196024 tftpboot 192.168.201.1 9045507/tftp-deploy-97apsx9d/kernel/bzImy-97apsx9d/kernel/cmdline 9045507/tftp-deploy-97apsx9d/ramdisk/ramdisk.cpio.gz
2021 07:05:09.196115
2022 07:05:09.196182 Waiting for link
2023 07:05:09.396273
2024 07:05:09.396420 done.
2025 07:05:09.396515
2026 07:05:09.396612 MAC: 00:24:32:30:7f:7f
2027 07:05:09.396709
2028 07:05:09.399662 Sending DHCP discover... done.
2029 07:05:09.399746
2030 07:05:09.403353 Waiting for reply... done.
2031 07:05:09.403430
2032 07:05:09.406323 Sending DHCP request... done.
2033 07:05:09.406402
2034 07:05:09.409489 Waiting for reply... done.
2035 07:05:09.409569
2036 07:05:09.412787 My ip is 192.168.201.15
2037 07:05:09.412862
2038 07:05:09.415806 The DHCP server ip is 192.168.201.1
2039 07:05:09.415916
2040 07:05:09.419381 TFTP server IP predefined by user: 192.168.201.1
2041 07:05:09.419476
2042 07:05:09.425864 Bootfile predefined by user: 9045507/tftp-deploy-97apsx9d/kernel/bzImage
2043 07:05:09.429284
2044 07:05:09.432220 Sending tftp read request... done.
2045 07:05:09.432308
2046 07:05:09.435867 Waiting for the transfer...
2047 07:05:09.435955
2048 07:05:09.960523 00000000 ################################################################
2049 07:05:09.960671
2050 07:05:10.484325 00080000 ################################################################
2051 07:05:10.484491
2052 07:05:11.010324 00100000 ################################################################
2053 07:05:11.010480
2054 07:05:11.535931 00180000 ################################################################
2055 07:05:11.536091
2056 07:05:12.056891 00200000 ################################################################
2057 07:05:12.057033
2058 07:05:12.583112 00280000 ################################################################
2059 07:05:12.583258
2060 07:05:13.104748 00300000 ################################################################
2061 07:05:13.104966
2062 07:05:13.619996 00380000 ################################################################
2063 07:05:13.620151
2064 07:05:14.147691 00400000 ################################################################
2065 07:05:14.147875
2066 07:05:14.678237 00480000 ################################################################
2067 07:05:14.678382
2068 07:05:15.222884 00500000 ################################################################
2069 07:05:15.223048
2070 07:05:15.757062 00580000 ################################################################
2071 07:05:15.757224
2072 07:05:16.296327 00600000 ################################################################
2073 07:05:16.296498
2074 07:05:16.842913 00680000 ################################################################
2075 07:05:16.843055
2076 07:05:17.087317 00700000 ############################# done.
2077 07:05:17.087458
2078 07:05:17.090767 The bootfile was 7573392 bytes long.
2079 07:05:17.090860
2080 07:05:17.093991 Sending tftp read request... done.
2081 07:05:17.094081
2082 07:05:17.097393 Waiting for the transfer...
2083 07:05:17.097482
2084 07:05:17.615374 00000000 ################################################################
2085 07:05:17.615531
2086 07:05:18.141429 00080000 ################################################################
2087 07:05:18.141573
2088 07:05:18.670929 00100000 ################################################################
2089 07:05:18.671119
2090 07:05:19.200484 00180000 ################################################################
2091 07:05:19.200623
2092 07:05:19.728105 00200000 ################################################################
2093 07:05:19.728244
2094 07:05:20.246720 00280000 ################################################################
2095 07:05:20.246863
2096 07:05:20.780229 00300000 ################################################################
2097 07:05:20.780379
2098 07:05:21.327979 00380000 ################################################################
2099 07:05:21.328125
2100 07:05:21.877303 00400000 ################################################################
2101 07:05:21.877447
2102 07:05:22.416893 00480000 ################################################################
2103 07:05:22.417037
2104 07:05:22.950378 00500000 ################################################################
2105 07:05:22.950542
2106 07:05:23.494182 00580000 ################################################################
2107 07:05:23.494325
2108 07:05:24.025622 00600000 ################################################################
2109 07:05:24.025770
2110 07:05:24.566562 00680000 ################################################################
2111 07:05:24.566712
2112 07:05:25.096749 00700000 ################################################################
2113 07:05:25.096892
2114 07:05:25.621479 00780000 ################################################################
2115 07:05:25.621627
2116 07:05:25.793908 00800000 ##################### done.
2117 07:05:25.794054
2118 07:05:25.797289 Sending tftp read request... done.
2119 07:05:25.797378
2120 07:05:25.800727 Waiting for the transfer...
2121 07:05:25.800815
2122 07:05:25.800885 00000000 # done.
2123 07:05:25.800951
2124 07:05:25.810462 Command line loaded dynamically from TFTP file: 9045507/tftp-deploy-97apsx9d/kernel/cmdline
2125 07:05:25.810586
2126 07:05:25.826741 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2127 07:05:25.826836
2128 07:05:25.833163 ec_init(0): CrosEC protocol v3 supported (256, 256)
2129 07:05:25.837968
2130 07:05:25.841428 Shutting down all USB controllers.
2131 07:05:25.841516
2132 07:05:25.841586 Removing current net device
2133 07:05:25.849310
2134 07:05:25.849403 Finalizing coreboot
2135 07:05:25.849473
2136 07:05:25.856203 Exiting depthcharge with code 4 at timestamp: 26383124
2137 07:05:25.856303
2138 07:05:25.856392
2139 07:05:25.856482 Starting kernel ...
2140 07:05:25.856567
2141 07:05:25.856647
2142 07:05:25.857056 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2143 07:05:25.857169 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2144 07:05:25.857264 Setting prompt string to ['Linux version [0-9]']
2145 07:05:25.857357 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2146 07:05:25.857443 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2148 07:09:46.858329 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2150 07:09:46.860207 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2152 07:09:46.861612 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2155 07:09:46.862662 end: 2 depthcharge-action (duration 00:05:00) [common]
2157 07:09:46.862889 Cleaning after the job
2158 07:09:46.862973 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/ramdisk
2159 07:09:46.863601 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/kernel
2160 07:09:46.864131 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045507/tftp-deploy-97apsx9d/modules
2161 07:09:46.864308 start: 5.1 power-off (timeout 00:00:30) [common]
2162 07:09:46.864457 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
2163 07:09:49.030057 >> Command sent successfully.
2164 07:09:49.036302 Returned 0 in 2 seconds
2165 07:09:49.137646 end: 5.1 power-off (duration 00:00:02) [common]
2167 07:09:49.139466 start: 5.2 read-feedback (timeout 00:09:58) [common]
2168 07:09:49.140778 Listened to connection for namespace 'common' for up to 1s
2170 07:09:49.142415 Listened to connection for namespace 'common' for up to 1s
2171 07:09:49.142809 Listened to connection for namespace 'common' for up to 1s
2172 07:09:49.143153 Listened to connection for namespace 'common' for up to 1s
2173 07:09:49.143498 Listened to connection for namespace 'common' for up to 1s
2174 07:09:50.142778 Finalising connection for namespace 'common'
2175 07:09:50.143583 Disconnecting from shell: Finalise
2176 07:09:50.144114
2177 07:09:50.246671 end: 5.2 read-feedback (duration 00:00:01) [common]
2178 07:09:50.247380 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045507
2179 07:09:50.255494 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045507
2180 07:09:50.255627 JobError: Your job cannot terminate cleanly.