Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:04:32.557934 lava-dispatcher, installed at version: 2022.11
2 07:04:32.558117 start: 0 validate
3 07:04:32.558249 Start time: 2023-02-07 07:04:32.558237+00:00 (UTC)
4 07:04:32.558377 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:32.558505 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
6 07:04:32.859163 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:32.859929 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:33.155303 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:33.155974 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:04:33.449806 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:04:33.450554 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:04:33.752492 validate duration: 1.19
14 07:04:33.753857 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:04:33.754383 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:04:33.754839 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:04:33.755305 Not decompressing ramdisk as can be used compressed.
18 07:04:33.756231 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230203.0/amd64/initrd.cpio.gz
19 07:04:33.756612 saving as /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/ramdisk/initrd.cpio.gz
20 07:04:33.756975 total size: 5432090 (5MB)
21 07:04:33.767623 progress 0% (0MB)
22 07:04:33.780125 progress 5% (0MB)
23 07:04:33.788981 progress 10% (0MB)
24 07:04:33.793527 progress 15% (0MB)
25 07:04:33.797532 progress 20% (1MB)
26 07:04:33.800712 progress 25% (1MB)
27 07:04:33.803363 progress 30% (1MB)
28 07:04:33.806192 progress 35% (1MB)
29 07:04:33.808518 progress 40% (2MB)
30 07:04:33.810704 progress 45% (2MB)
31 07:04:33.812613 progress 50% (2MB)
32 07:04:33.814804 progress 55% (2MB)
33 07:04:33.816622 progress 60% (3MB)
34 07:04:33.818232 progress 65% (3MB)
35 07:04:33.820018 progress 70% (3MB)
36 07:04:33.821494 progress 75% (3MB)
37 07:04:33.822941 progress 80% (4MB)
38 07:04:33.824371 progress 85% (4MB)
39 07:04:33.825936 progress 90% (4MB)
40 07:04:33.827241 progress 95% (4MB)
41 07:04:33.828587 progress 100% (5MB)
42 07:04:33.828853 5MB downloaded in 0.07s (72.07MB/s)
43 07:04:33.829014 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:04:33.829266 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:04:33.829358 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:04:33.829448 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:04:33.829553 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:04:33.829629 saving as /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/kernel/bzImage
50 07:04:33.829693 total size: 7573392 (7MB)
51 07:04:33.829770 No compression specified
52 07:04:33.831924 progress 0% (0MB)
53 07:04:33.838060 progress 5% (0MB)
54 07:04:33.845047 progress 10% (0MB)
55 07:04:33.851899 progress 15% (1MB)
56 07:04:33.858030 progress 20% (1MB)
57 07:04:33.864138 progress 25% (1MB)
58 07:04:33.870864 progress 30% (2MB)
59 07:04:33.876999 progress 35% (2MB)
60 07:04:33.883492 progress 40% (2MB)
61 07:04:33.890242 progress 45% (3MB)
62 07:04:33.896041 progress 50% (3MB)
63 07:04:33.902947 progress 55% (4MB)
64 07:04:33.909069 progress 60% (4MB)
65 07:04:33.915637 progress 65% (4MB)
66 07:04:33.922373 progress 70% (5MB)
67 07:04:33.926754 progress 75% (5MB)
68 07:04:33.931323 progress 80% (5MB)
69 07:04:33.938847 progress 85% (6MB)
70 07:04:33.945757 progress 90% (6MB)
71 07:04:33.952864 progress 95% (6MB)
72 07:04:33.958977 progress 100% (7MB)
73 07:04:33.959151 7MB downloaded in 0.13s (55.79MB/s)
74 07:04:33.959303 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:04:33.959536 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:04:33.959623 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:04:33.959709 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:04:33.959812 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230203.0/amd64/full.rootfs.tar.xz
80 07:04:33.959879 saving as /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/nfsrootfs/full.rootfs.tar
81 07:04:33.959940 total size: 133333188 (127MB)
82 07:04:33.960001 Using unxz to decompress xz
83 07:04:33.970553 progress 0% (0MB)
84 07:04:34.322079 progress 5% (6MB)
85 07:04:34.692145 progress 10% (12MB)
86 07:04:34.989008 progress 15% (19MB)
87 07:04:35.201007 progress 20% (25MB)
88 07:04:35.455816 progress 25% (31MB)
89 07:04:35.806848 progress 30% (38MB)
90 07:04:36.165619 progress 35% (44MB)
91 07:04:36.571451 progress 40% (50MB)
92 07:04:36.959498 progress 45% (57MB)
93 07:04:37.319662 progress 50% (63MB)
94 07:04:37.694861 progress 55% (69MB)
95 07:04:38.062705 progress 60% (76MB)
96 07:04:38.431556 progress 65% (82MB)
97 07:04:38.795808 progress 70% (89MB)
98 07:04:39.163868 progress 75% (95MB)
99 07:04:39.608266 progress 80% (101MB)
100 07:04:40.046750 progress 85% (108MB)
101 07:04:40.320103 progress 90% (114MB)
102 07:04:40.666037 progress 95% (120MB)
103 07:04:41.062345 progress 100% (127MB)
104 07:04:41.067096 127MB downloaded in 7.11s (17.89MB/s)
105 07:04:41.067339 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:04:41.067604 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:04:41.067694 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:04:41.067783 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:04:41.067901 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:04:41.067973 saving as /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/modules/modules.tar
112 07:04:41.068035 total size: 54868 (0MB)
113 07:04:41.068101 Using unxz to decompress xz
114 07:04:41.072387 progress 59% (0MB)
115 07:04:41.072798 progress 100% (0MB)
116 07:04:41.076206 0MB downloaded in 0.01s (6.41MB/s)
117 07:04:41.076417 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:04:41.076674 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:04:41.076767 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 07:04:41.076866 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 07:04:42.330102 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9045479/extract-nfsrootfs-011sxgvy
123 07:04:42.330296 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 07:04:42.330403 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 07:04:42.330544 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_
126 07:04:42.330647 makedir: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin
127 07:04:42.330740 makedir: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/tests
128 07:04:42.330827 makedir: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/results
129 07:04:42.330926 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-add-keys
130 07:04:42.331060 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-add-sources
131 07:04:42.331179 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-background-process-start
132 07:04:42.331294 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-background-process-stop
133 07:04:42.331407 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-common-functions
134 07:04:42.331518 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-echo-ipv4
135 07:04:42.331628 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-install-packages
136 07:04:42.331739 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-installed-packages
137 07:04:42.331848 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-os-build
138 07:04:42.331957 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-probe-channel
139 07:04:42.332066 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-probe-ip
140 07:04:42.332174 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-target-ip
141 07:04:42.332283 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-target-mac
142 07:04:42.332392 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-target-storage
143 07:04:42.332504 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-case
144 07:04:42.332615 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-event
145 07:04:42.332724 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-feedback
146 07:04:42.332833 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-raise
147 07:04:42.332941 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-reference
148 07:04:42.333050 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-runner
149 07:04:42.333159 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-set
150 07:04:42.333269 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-test-shell
151 07:04:42.333380 Updating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-install-packages (oe)
152 07:04:42.333493 Updating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/bin/lava-installed-packages (oe)
153 07:04:42.333590 Creating /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/environment
154 07:04:42.333677 LAVA metadata
155 07:04:42.333788 - LAVA_JOB_ID=9045479
156 07:04:42.333900 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:04:42.334014 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 07:04:42.334079 skipped lava-vland-overlay
159 07:04:42.334157 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:04:42.334238 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 07:04:42.334301 skipped lava-multinode-overlay
162 07:04:42.334375 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:04:42.334457 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 07:04:42.334529 Loading test definitions
165 07:04:42.334619 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 07:04:42.334691 Using /lava-9045479 at stage 0
167 07:04:42.334953 uuid=9045479_1.5.2.3.1 testdef=None
168 07:04:42.335076 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 07:04:42.335166 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 07:04:42.335672 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 07:04:42.335908 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 07:04:42.336505 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 07:04:42.336747 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 07:04:42.337303 runner path: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/0/tests/0_dmesg test_uuid 9045479_1.5.2.3.1
177 07:04:42.337452 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 07:04:42.337687 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 07:04:42.337806 Using /lava-9045479 at stage 1
181 07:04:42.338046 uuid=9045479_1.5.2.3.5 testdef=None
182 07:04:42.338138 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 07:04:42.338226 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 07:04:42.338668 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 07:04:42.338897 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 07:04:42.339550 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 07:04:42.339791 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 07:04:42.340342 runner path: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/1/tests/1_bootrr test_uuid 9045479_1.5.2.3.5
191 07:04:42.340485 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 07:04:42.340698 Creating lava-test-runner.conf files
194 07:04:42.340763 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/0 for stage 0
195 07:04:42.340846 - 0_dmesg
196 07:04:42.340921 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045479/lava-overlay-77248vo_/lava-9045479/1 for stage 1
197 07:04:42.341006 - 1_bootrr
198 07:04:42.341099 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 07:04:42.341185 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 07:04:42.346853 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 07:04:42.346960 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 07:04:42.347050 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 07:04:42.347140 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 07:04:42.347228 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 07:04:42.451174 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 07:04:42.451515 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 07:04:42.451657 extracting modules file /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045479/extract-nfsrootfs-011sxgvy
208 07:04:42.455904 extracting modules file /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045479/extract-overlay-ramdisk-ptd5untk/ramdisk
209 07:04:42.459944 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 07:04:42.460059 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 07:04:42.460150 [common] Applying overlay to NFS
212 07:04:42.460243 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045479/compress-overlay-o2bh47wq/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045479/extract-nfsrootfs-011sxgvy
213 07:04:42.464107 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 07:04:42.464217 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 07:04:42.464311 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 07:04:42.464409 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 07:04:42.464491 Building ramdisk /var/lib/lava/dispatcher/tmp/9045479/extract-overlay-ramdisk-ptd5untk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045479/extract-overlay-ramdisk-ptd5untk/ramdisk
218 07:04:42.497889 >> 24584 blocks
219 07:04:42.976830 rename /var/lib/lava/dispatcher/tmp/9045479/extract-overlay-ramdisk-ptd5untk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
220 07:04:42.977223 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 07:04:42.977347 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 07:04:42.977451 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 07:04:42.977550 No mkimage arch provided, not using FIT.
224 07:04:42.977638 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 07:04:42.977751 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 07:04:42.977866 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 07:04:42.977959 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 07:04:42.978037 No LXC device requested
229 07:04:42.978119 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 07:04:42.978209 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 07:04:42.978295 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 07:04:42.978366 Checking files for TFTP limit of 4294967296 bytes.
233 07:04:42.978749 end: 1 tftp-deploy (duration 00:00:09) [common]
234 07:04:42.978856 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 07:04:42.978960 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 07:04:42.979087 substitutions:
237 07:04:42.979153 - {DTB}: None
238 07:04:42.979217 - {INITRD}: 9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
239 07:04:42.979278 - {KERNEL}: 9045479/tftp-deploy-i73jg55n/kernel/bzImage
240 07:04:42.979335 - {LAVA_MAC}: None
241 07:04:42.979392 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9045479/extract-nfsrootfs-011sxgvy
242 07:04:42.979452 - {NFS_SERVER_IP}: 192.168.201.1
243 07:04:42.979508 - {PRESEED_CONFIG}: None
244 07:04:42.979565 - {PRESEED_LOCAL}: None
245 07:04:42.979645 - {RAMDISK}: 9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
246 07:04:42.979704 - {ROOT_PART}: None
247 07:04:42.979760 - {ROOT}: None
248 07:04:42.979815 - {SERVER_IP}: 192.168.201.1
249 07:04:42.979870 - {TEE}: None
250 07:04:42.979926 Parsed boot commands:
251 07:04:42.979980 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 07:04:42.980133 Parsed boot commands: tftpboot 192.168.201.1 9045479/tftp-deploy-i73jg55n/kernel/bzImage 9045479/tftp-deploy-i73jg55n/kernel/cmdline 9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
253 07:04:42.980225 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 07:04:42.980315 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 07:04:42.980406 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 07:04:42.980492 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 07:04:42.980560 Not connected, no need to disconnect.
258 07:04:42.980637 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 07:04:42.980718 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 07:04:42.980785 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-3'
261 07:04:42.983704 Setting prompt string to ['lava-test: # ']
262 07:04:42.983994 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 07:04:42.984102 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 07:04:42.984204 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 07:04:42.984297 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 07:04:42.984476 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=reboot'
267 07:04:52.304170 >> Command sent successfully.
268 07:04:52.306356 Returned 0 in 9 seconds
269 07:04:52.407122 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
271 07:04:52.407445 end: 2.2.2 reset-device (duration 00:00:09) [common]
272 07:04:52.407573 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
273 07:04:52.407666 Setting prompt string to 'Starting depthcharge on Voema...'
274 07:04:52.407749 Changing prompt to 'Starting depthcharge on Voema...'
275 07:04:52.407818 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 07:04:52.408115 [Enter `^Ec?' for help]
277 07:04:52.408225
278 07:04:52.408310
279 07:04:52.408375 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 07:04:52.408455 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
281 07:04:52.408518 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 07:04:52.408577 CPU: AES supported, TXT NOT supported, VT supported
283 07:04:52.408636 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 07:04:52.408708 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 07:04:52.408767 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 07:04:52.408824 VBOOT: Loading verstage.
287 07:04:52.408881 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 07:04:52.408952 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 07:04:52.409012 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 07:04:52.409068 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 07:04:52.409126 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 07:04:52.409197
293 07:04:52.409253
294 07:04:52.409308 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 07:04:52.409366 Probing TPM: . done!
296 07:04:52.409435 TPM ready after 0 ms
297 07:04:52.409495 Connected to device vid:did:rid of 1ae0:0028:00
298 07:04:52.409552 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
299 07:04:52.409614 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 07:04:52.409682 Initialized TPM device CR50 revision 0
301 07:04:52.409770 tlcl_send_startup: Startup return code is 0
302 07:04:52.409840 TPM: setup succeeded
303 07:04:52.409912 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 07:04:52.409969 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 07:04:52.410025 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 07:04:52.410081 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 07:04:52.410154 Chrome EC: UHEPI supported
308 07:04:52.410211 Phase 1
309 07:04:52.410268 FMAP: area GBB found @ 1805000 (458752 bytes)
310 07:04:52.410345 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 07:04:52.410416 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 07:04:52.410476 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 07:04:52.410536 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 07:04:52.410608 Recovery requested (1009000e)
315 07:04:52.410673 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 07:04:52.410733 tlcl_extend: response is 0
317 07:04:52.410793 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 07:04:52.410867 tlcl_extend: response is 0
319 07:04:52.410928 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 07:04:52.410989 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 07:04:52.411049 BS: verstage times (exec / console): total (unknown) / 142 ms
322 07:04:52.411123
323 07:04:52.411183
324 07:04:52.411252 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 07:04:52.411320 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 07:04:52.411386 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 07:04:52.411446 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 07:04:52.411505 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 07:04:52.411575 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 07:04:52.411639 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
331 07:04:52.411698 TCO_STS: 0000 0000
332 07:04:52.411766 GEN_PMCON: d0015038 00002200
333 07:04:52.411841 GBLRST_CAUSE: 00000000 00000000
334 07:04:52.411906 HPR_CAUSE0: 00000000
335 07:04:52.411980 prev_sleep_state 5
336 07:04:52.412049 Boot Count incremented to 15785
337 07:04:52.412115 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 07:04:52.412175 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 07:04:52.412234 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 07:04:52.412504 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 07:04:52.414458 Chrome EC: UHEPI supported
342 07:04:52.420942 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 07:04:52.432251 Probing TPM: done!
344 07:04:52.439890 Connected to device vid:did:rid of 1ae0:0028:00
345 07:04:52.450662 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
346 07:04:52.456895 Initialized TPM device CR50 revision 0
347 07:04:52.466871 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 07:04:52.473740 MRC: Hash idx 0x100b comparison successful.
349 07:04:52.476874 MRC cache found, size faa8
350 07:04:52.476964 bootmode is set to: 2
351 07:04:52.480475 SPD index = 0
352 07:04:52.487217 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 07:04:52.490391 SPD: module type is LPDDR4X
354 07:04:52.493641 SPD: module part number is MT53E512M64D4NW-046
355 07:04:52.500022 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
356 07:04:52.503630 SPD: device width 16 bits, bus width 16 bits
357 07:04:52.510200 SPD: module size is 1024 MB (per channel)
358 07:04:52.945006 CBMEM:
359 07:04:52.948457 IMD: root @ 0x76fff000 254 entries.
360 07:04:52.951683 IMD: root @ 0x76ffec00 62 entries.
361 07:04:52.954941 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 07:04:52.961545 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 07:04:52.964904 External stage cache:
364 07:04:52.968140 IMD: root @ 0x7b3ff000 254 entries.
365 07:04:52.971402 IMD: root @ 0x7b3fec00 62 entries.
366 07:04:52.986839 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 07:04:52.993339 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 07:04:52.999493 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 07:04:53.014239 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 07:04:53.017642 cse_lite: Skip switching to RW in the recovery path
371 07:04:53.021313 8 DIMMs found
372 07:04:53.021444 SMM Memory Map
373 07:04:53.024789 SMRAM : 0x7b000000 0x800000
374 07:04:53.028197 Subregion 0: 0x7b000000 0x200000
375 07:04:53.031212 Subregion 1: 0x7b200000 0x200000
376 07:04:53.034572 Subregion 2: 0x7b400000 0x400000
377 07:04:53.038129 top_of_ram = 0x77000000
378 07:04:53.044805 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
379 07:04:53.047951 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
380 07:04:53.054742 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
381 07:04:53.058108 MTRR Range: Start=ff000000 End=0 (Size 1000000)
382 07:04:53.067802 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
383 07:04:53.074546 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
384 07:04:53.084504 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
385 07:04:53.087781 Processing 211 relocs. Offset value of 0x74c0b000
386 07:04:53.096900 BS: romstage times (exec / console): total (unknown) / 277 ms
387 07:04:53.102953
388 07:04:53.103042
389 07:04:53.112873 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
390 07:04:53.116037 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
391 07:04:53.126123 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
392 07:04:53.132670 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
393 07:04:53.139392 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
394 07:04:53.145931 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
395 07:04:53.192810 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
396 07:04:53.199496 Processing 5008 relocs. Offset value of 0x75d98000
397 07:04:53.202629 BS: postcar times (exec / console): total (unknown) / 59 ms
398 07:04:53.206017
399 07:04:53.206125
400 07:04:53.216495 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
401 07:04:53.216597 Normal boot
402 07:04:53.219662 FW_CONFIG value is 0x804c02
403 07:04:53.222922 PCI: 00:07.0 disabled by fw_config
404 07:04:53.226633 PCI: 00:07.1 disabled by fw_config
405 07:04:53.229912 PCI: 00:0d.2 disabled by fw_config
406 07:04:53.233183 PCI: 00:1c.7 disabled by fw_config
407 07:04:53.239826 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
408 07:04:53.246528 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
409 07:04:53.249812 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 07:04:53.253140 GENERIC: 0.0 disabled by fw_config
411 07:04:53.256121 GENERIC: 1.0 disabled by fw_config
412 07:04:53.262745 fw_config match found: DB_USB=USB3_ACTIVE
413 07:04:53.266114 fw_config match found: DB_USB=USB3_ACTIVE
414 07:04:53.269543 fw_config match found: DB_USB=USB3_ACTIVE
415 07:04:53.272823 fw_config match found: DB_USB=USB3_ACTIVE
416 07:04:53.279368 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
417 07:04:53.286035 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
418 07:04:53.295932 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
419 07:04:53.302786 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
420 07:04:53.306090 microcode: sig=0x806c1 pf=0x80 revision=0x86
421 07:04:53.312707 microcode: Update skipped, already up-to-date
422 07:04:53.319158 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
423 07:04:53.346342 Detected 4 core, 8 thread CPU.
424 07:04:53.349700 Setting up SMI for CPU
425 07:04:53.353145 IED base = 0x7b400000
426 07:04:53.353232 IED size = 0x00400000
427 07:04:53.356430 Will perform SMM setup.
428 07:04:53.363088 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
429 07:04:53.369610 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
430 07:04:53.376120 Processing 16 relocs. Offset value of 0x00030000
431 07:04:53.379522 Attempting to start 7 APs
432 07:04:53.382944 Waiting for 10ms after sending INIT.
433 07:04:53.398573 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
434 07:04:53.401830 AP: slot 2 apic_id 3.
435 07:04:53.405190 AP: slot 6 apic_id 2.
436 07:04:53.405274 AP: slot 7 apic_id 4.
437 07:04:53.408487 AP: slot 3 apic_id 5.
438 07:04:53.411697 AP: slot 5 apic_id 6.
439 07:04:53.411793 AP: slot 4 apic_id 7.
440 07:04:53.411883 done.
441 07:04:53.418543 Waiting for 2nd SIPI to complete...done.
442 07:04:53.424873 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
443 07:04:53.431683 Processing 13 relocs. Offset value of 0x00038000
444 07:04:53.434794 Unable to locate Global NVS
445 07:04:53.441537 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
446 07:04:53.444903 Installing permanent SMM handler to 0x7b000000
447 07:04:53.454853 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
448 07:04:53.458136 Processing 794 relocs. Offset value of 0x7b010000
449 07:04:53.468267 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
450 07:04:53.471217 Processing 13 relocs. Offset value of 0x7b008000
451 07:04:53.477832 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
452 07:04:53.484598 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
453 07:04:53.488118 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
454 07:04:53.494534 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
455 07:04:53.501249 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
456 07:04:53.507818 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
457 07:04:53.514655 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
458 07:04:53.514775 Unable to locate Global NVS
459 07:04:53.524363 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
460 07:04:53.527654 Clearing SMI status registers
461 07:04:53.527764 SMI_STS: PM1
462 07:04:53.530953 PM1_STS: PWRBTN
463 07:04:53.537844 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 07:04:53.540798 In relocation handler: CPU 0
465 07:04:53.544325 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 07:04:53.550894 Writing SMRR. base = 0x7b000006, mask=0xff800c00
467 07:04:53.551000 Relocation complete.
468 07:04:53.560652 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 07:04:53.564038 In relocation handler: CPU 1
470 07:04:53.567417 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 07:04:53.567528 Relocation complete.
472 07:04:53.577345 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
473 07:04:53.577457 In relocation handler: CPU 6
474 07:04:53.584035 New SMBASE=0x7affe800 IEDBASE=0x7b400000
475 07:04:53.587334 Writing SMRR. base = 0x7b000006, mask=0xff800c00
476 07:04:53.590769 Relocation complete.
477 07:04:53.597355 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
478 07:04:53.600654 In relocation handler: CPU 2
479 07:04:53.603989 New SMBASE=0x7afff800 IEDBASE=0x7b400000
480 07:04:53.607176 Relocation complete.
481 07:04:53.614133 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
482 07:04:53.617320 In relocation handler: CPU 7
483 07:04:53.620728 New SMBASE=0x7affe400 IEDBASE=0x7b400000
484 07:04:53.627169 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 07:04:53.627308 Relocation complete.
486 07:04:53.633978 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
487 07:04:53.637341 In relocation handler: CPU 3
488 07:04:53.643934 New SMBASE=0x7afff400 IEDBASE=0x7b400000
489 07:04:53.644059 Relocation complete.
490 07:04:53.650373 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
491 07:04:53.653644 In relocation handler: CPU 5
492 07:04:53.660416 New SMBASE=0x7affec00 IEDBASE=0x7b400000
493 07:04:53.663898 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 07:04:53.667176 Relocation complete.
495 07:04:53.673601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
496 07:04:53.676979 In relocation handler: CPU 4
497 07:04:53.681073 New SMBASE=0x7afff000 IEDBASE=0x7b400000
498 07:04:53.681182 Relocation complete.
499 07:04:53.684670 Initializing CPU #0
500 07:04:53.688416 CPU: vendor Intel device 806c1
501 07:04:53.691760 CPU: family 06, model 8c, stepping 01
502 07:04:53.694939 Clearing out pending MCEs
503 07:04:53.698400 Setting up local APIC...
504 07:04:53.698508 apic_id: 0x00 done.
505 07:04:53.701278 Turbo is available but hidden
506 07:04:53.704712 Turbo is available and visible
507 07:04:53.711545 microcode: Update skipped, already up-to-date
508 07:04:53.711667 CPU #0 initialized
509 07:04:53.714901 Initializing CPU #4
510 07:04:53.715018 Initializing CPU #5
511 07:04:53.718133 CPU: vendor Intel device 806c1
512 07:04:53.724297 CPU: family 06, model 8c, stepping 01
513 07:04:53.727761 CPU: vendor Intel device 806c1
514 07:04:53.731064 CPU: family 06, model 8c, stepping 01
515 07:04:53.731191 Clearing out pending MCEs
516 07:04:53.734390 Clearing out pending MCEs
517 07:04:53.737786 Setting up local APIC...
518 07:04:53.741122 Initializing CPU #2
519 07:04:53.741243 Initializing CPU #6
520 07:04:53.744336 CPU: vendor Intel device 806c1
521 07:04:53.747665 CPU: family 06, model 8c, stepping 01
522 07:04:53.751019 apic_id: 0x07 done.
523 07:04:53.754530 Setting up local APIC...
524 07:04:53.754655 Initializing CPU #1
525 07:04:53.757685 CPU: vendor Intel device 806c1
526 07:04:53.761132 CPU: family 06, model 8c, stepping 01
527 07:04:53.764344 Clearing out pending MCEs
528 07:04:53.767583 Clearing out pending MCEs
529 07:04:53.770892 Setting up local APIC...
530 07:04:53.771016 Initializing CPU #7
531 07:04:53.774314 Initializing CPU #3
532 07:04:53.777440 CPU: vendor Intel device 806c1
533 07:04:53.780752 CPU: family 06, model 8c, stepping 01
534 07:04:53.784316 apic_id: 0x06 done.
535 07:04:53.787720 microcode: Update skipped, already up-to-date
536 07:04:53.794220 microcode: Update skipped, already up-to-date
537 07:04:53.794353 CPU #4 initialized
538 07:04:53.797500 CPU #5 initialized
539 07:04:53.797619 apic_id: 0x03 done.
540 07:04:53.800891 Setting up local APIC...
541 07:04:53.804075 Clearing out pending MCEs
542 07:04:53.807321 CPU: vendor Intel device 806c1
543 07:04:53.810861 CPU: family 06, model 8c, stepping 01
544 07:04:53.814089 Setting up local APIC...
545 07:04:53.814215 apic_id: 0x02 done.
546 07:04:53.820852 microcode: Update skipped, already up-to-date
547 07:04:53.824052 microcode: Update skipped, already up-to-date
548 07:04:53.827479 CPU #2 initialized
549 07:04:53.827588 CPU #6 initialized
550 07:04:53.830550 Clearing out pending MCEs
551 07:04:53.833965 apic_id: 0x04 done.
552 07:04:53.837140 Setting up local APIC...
553 07:04:53.840791 CPU: vendor Intel device 806c1
554 07:04:53.844068 CPU: family 06, model 8c, stepping 01
555 07:04:53.847359 microcode: Update skipped, already up-to-date
556 07:04:53.850570 apic_id: 0x05 done.
557 07:04:53.850655 CPU #7 initialized
558 07:04:53.857410 microcode: Update skipped, already up-to-date
559 07:04:53.857517 Clearing out pending MCEs
560 07:04:53.860708 CPU #3 initialized
561 07:04:53.863998 Setting up local APIC...
562 07:04:53.867087 apic_id: 0x01 done.
563 07:04:53.870405 microcode: Update skipped, already up-to-date
564 07:04:53.873712 CPU #1 initialized
565 07:04:53.877009 bsp_do_flight_plan done after 455 msecs.
566 07:04:53.880352 CPU: frequency set to 4000 MHz
567 07:04:53.880470 Enabling SMIs.
568 07:04:53.887306 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
569 07:04:53.903399 SATAXPCIE1 indicates PCIe NVMe is present
570 07:04:53.906810 Probing TPM: done!
571 07:04:53.910454 Connected to device vid:did:rid of 1ae0:0028:00
572 07:04:53.920815 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
573 07:04:53.924366 Initialized TPM device CR50 revision 0
574 07:04:53.927741 Enabling S0i3.4
575 07:04:53.934143 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
576 07:04:53.937713 Found a VBT of 8704 bytes after decompression
577 07:04:53.944039 cse_lite: CSE RO boot. HybridStorageMode disabled
578 07:04:53.950789 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
579 07:04:54.026466 FSPS returned 0
580 07:04:54.029692 Executing Phase 1 of FspMultiPhaseSiInit
581 07:04:54.039412 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
582 07:04:54.042820 port C0 DISC req: usage 1 usb3 1 usb2 5
583 07:04:54.046245 Raw Buffer output 0 00000511
584 07:04:54.049435 Raw Buffer output 1 00000000
585 07:04:54.053381 pmc_send_ipc_cmd succeeded
586 07:04:54.059971 port C1 DISC req: usage 1 usb3 2 usb2 3
587 07:04:54.060103 Raw Buffer output 0 00000321
588 07:04:54.063285 Raw Buffer output 1 00000000
589 07:04:54.067238 pmc_send_ipc_cmd succeeded
590 07:04:54.072769 Detected 4 core, 8 thread CPU.
591 07:04:54.075846 Detected 4 core, 8 thread CPU.
592 07:04:54.310521 Display FSP Version Info HOB
593 07:04:54.313435 Reference Code - CPU = a.0.4c.31
594 07:04:54.316940 uCode Version = 0.0.0.86
595 07:04:54.320113 TXT ACM version = ff.ff.ff.ffff
596 07:04:54.323155 Reference Code - ME = a.0.4c.31
597 07:04:54.326563 MEBx version = 0.0.0.0
598 07:04:54.329954 ME Firmware Version = Consumer SKU
599 07:04:54.333199 Reference Code - PCH = a.0.4c.31
600 07:04:54.336605 PCH-CRID Status = Disabled
601 07:04:54.340013 PCH-CRID Original Value = ff.ff.ff.ffff
602 07:04:54.343386 PCH-CRID New Value = ff.ff.ff.ffff
603 07:04:54.346805 OPROM - RST - RAID = ff.ff.ff.ffff
604 07:04:54.350066 PCH Hsio Version = 4.0.0.0
605 07:04:54.353104 Reference Code - SA - System Agent = a.0.4c.31
606 07:04:54.356564 Reference Code - MRC = 2.0.0.1
607 07:04:54.359839 SA - PCIe Version = a.0.4c.31
608 07:04:54.363285 SA-CRID Status = Disabled
609 07:04:54.366367 SA-CRID Original Value = 0.0.0.1
610 07:04:54.369779 SA-CRID New Value = 0.0.0.1
611 07:04:54.373287 OPROM - VBIOS = ff.ff.ff.ffff
612 07:04:54.376613 IO Manageability Engine FW Version = 11.1.4.0
613 07:04:54.379856 PHY Build Version = 0.0.0.e0
614 07:04:54.383236 Thunderbolt(TM) FW Version = 0.0.0.0
615 07:04:54.389622 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
616 07:04:54.392936 ITSS IRQ Polarities Before:
617 07:04:54.393037 IPC0: 0xffffffff
618 07:04:54.396266 IPC1: 0xffffffff
619 07:04:54.396354 IPC2: 0xffffffff
620 07:04:54.399691 IPC3: 0xffffffff
621 07:04:54.403015 ITSS IRQ Polarities After:
622 07:04:54.403117 IPC0: 0xffffffff
623 07:04:54.406334 IPC1: 0xffffffff
624 07:04:54.406422 IPC2: 0xffffffff
625 07:04:54.409551 IPC3: 0xffffffff
626 07:04:54.413028 Found PCIe Root Port #9 at PCI: 00:1d.0.
627 07:04:54.426237 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
628 07:04:54.436098 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
629 07:04:54.449138 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
630 07:04:54.455981 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
631 07:04:54.459237 Enumerating buses...
632 07:04:54.462540 Show all devs... Before device enumeration.
633 07:04:54.465922 Root Device: enabled 1
634 07:04:54.466014 DOMAIN: 0000: enabled 1
635 07:04:54.469118 CPU_CLUSTER: 0: enabled 1
636 07:04:54.472405 PCI: 00:00.0: enabled 1
637 07:04:54.475704 PCI: 00:02.0: enabled 1
638 07:04:54.475811 PCI: 00:04.0: enabled 1
639 07:04:54.479112 PCI: 00:05.0: enabled 1
640 07:04:54.482528 PCI: 00:06.0: enabled 0
641 07:04:54.485569 PCI: 00:07.0: enabled 0
642 07:04:54.485661 PCI: 00:07.1: enabled 0
643 07:04:54.488851 PCI: 00:07.2: enabled 0
644 07:04:54.492186 PCI: 00:07.3: enabled 0
645 07:04:54.495470 PCI: 00:08.0: enabled 1
646 07:04:54.495567 PCI: 00:09.0: enabled 0
647 07:04:54.498930 PCI: 00:0a.0: enabled 0
648 07:04:54.502370 PCI: 00:0d.0: enabled 1
649 07:04:54.505292 PCI: 00:0d.1: enabled 0
650 07:04:54.505368 PCI: 00:0d.2: enabled 0
651 07:04:54.508830 PCI: 00:0d.3: enabled 0
652 07:04:54.512074 PCI: 00:0e.0: enabled 0
653 07:04:54.512166 PCI: 00:10.2: enabled 1
654 07:04:54.515710 PCI: 00:10.6: enabled 0
655 07:04:54.518608 PCI: 00:10.7: enabled 0
656 07:04:54.522089 PCI: 00:12.0: enabled 0
657 07:04:54.522190 PCI: 00:12.6: enabled 0
658 07:04:54.525376 PCI: 00:13.0: enabled 0
659 07:04:54.528891 PCI: 00:14.0: enabled 1
660 07:04:54.531810 PCI: 00:14.1: enabled 0
661 07:04:54.531905 PCI: 00:14.2: enabled 1
662 07:04:54.535370 PCI: 00:14.3: enabled 1
663 07:04:54.538465 PCI: 00:15.0: enabled 1
664 07:04:54.541830 PCI: 00:15.1: enabled 1
665 07:04:54.541929 PCI: 00:15.2: enabled 1
666 07:04:54.545192 PCI: 00:15.3: enabled 1
667 07:04:54.548457 PCI: 00:16.0: enabled 1
668 07:04:54.551744 PCI: 00:16.1: enabled 0
669 07:04:54.551840 PCI: 00:16.2: enabled 0
670 07:04:54.555182 PCI: 00:16.3: enabled 0
671 07:04:54.558507 PCI: 00:16.4: enabled 0
672 07:04:54.561886 PCI: 00:16.5: enabled 0
673 07:04:54.561993 PCI: 00:17.0: enabled 1
674 07:04:54.565195 PCI: 00:19.0: enabled 0
675 07:04:54.568597 PCI: 00:19.1: enabled 1
676 07:04:54.568693 PCI: 00:19.2: enabled 0
677 07:04:54.571729 PCI: 00:1c.0: enabled 1
678 07:04:54.575203 PCI: 00:1c.1: enabled 0
679 07:04:54.578485 PCI: 00:1c.2: enabled 0
680 07:04:54.578578 PCI: 00:1c.3: enabled 0
681 07:04:54.581890 PCI: 00:1c.4: enabled 0
682 07:04:54.584999 PCI: 00:1c.5: enabled 0
683 07:04:54.588315 PCI: 00:1c.6: enabled 1
684 07:04:54.588396 PCI: 00:1c.7: enabled 0
685 07:04:54.591802 PCI: 00:1d.0: enabled 1
686 07:04:54.594805 PCI: 00:1d.1: enabled 0
687 07:04:54.598027 PCI: 00:1d.2: enabled 1
688 07:04:54.598116 PCI: 00:1d.3: enabled 0
689 07:04:54.601353 PCI: 00:1e.0: enabled 1
690 07:04:54.604780 PCI: 00:1e.1: enabled 0
691 07:04:54.608098 PCI: 00:1e.2: enabled 1
692 07:04:54.608191 PCI: 00:1e.3: enabled 1
693 07:04:54.611633 PCI: 00:1f.0: enabled 1
694 07:04:54.614660 PCI: 00:1f.1: enabled 0
695 07:04:54.614765 PCI: 00:1f.2: enabled 1
696 07:04:54.617983 PCI: 00:1f.3: enabled 1
697 07:04:54.621522 PCI: 00:1f.4: enabled 0
698 07:04:54.624914 PCI: 00:1f.5: enabled 1
699 07:04:54.625006 PCI: 00:1f.6: enabled 0
700 07:04:54.627929 PCI: 00:1f.7: enabled 0
701 07:04:54.631161 APIC: 00: enabled 1
702 07:04:54.631292 GENERIC: 0.0: enabled 1
703 07:04:54.634486 GENERIC: 0.0: enabled 1
704 07:04:54.638093 GENERIC: 1.0: enabled 1
705 07:04:54.641476 GENERIC: 0.0: enabled 1
706 07:04:54.641575 GENERIC: 1.0: enabled 1
707 07:04:54.644542 USB0 port 0: enabled 1
708 07:04:54.648012 GENERIC: 0.0: enabled 1
709 07:04:54.651331 USB0 port 0: enabled 1
710 07:04:54.651421 GENERIC: 0.0: enabled 1
711 07:04:54.654426 I2C: 00:1a: enabled 1
712 07:04:54.657852 I2C: 00:31: enabled 1
713 07:04:54.657938 I2C: 00:32: enabled 1
714 07:04:54.661330 I2C: 00:10: enabled 1
715 07:04:54.664636 I2C: 00:15: enabled 1
716 07:04:54.664738 GENERIC: 0.0: enabled 0
717 07:04:54.667911 GENERIC: 1.0: enabled 0
718 07:04:54.671160 GENERIC: 0.0: enabled 1
719 07:04:54.674399 SPI: 00: enabled 1
720 07:04:54.674495 SPI: 00: enabled 1
721 07:04:54.677811 PNP: 0c09.0: enabled 1
722 07:04:54.680937 GENERIC: 0.0: enabled 1
723 07:04:54.681025 USB3 port 0: enabled 1
724 07:04:54.684361 USB3 port 1: enabled 1
725 07:04:54.687832 USB3 port 2: enabled 0
726 07:04:54.687917 USB3 port 3: enabled 0
727 07:04:54.690829 USB2 port 0: enabled 0
728 07:04:54.694202 USB2 port 1: enabled 1
729 07:04:54.697600 USB2 port 2: enabled 1
730 07:04:54.697693 USB2 port 3: enabled 0
731 07:04:54.700896 USB2 port 4: enabled 1
732 07:04:54.704295 USB2 port 5: enabled 0
733 07:04:54.704384 USB2 port 6: enabled 0
734 07:04:54.707808 USB2 port 7: enabled 0
735 07:04:54.710861 USB2 port 8: enabled 0
736 07:04:54.710981 USB2 port 9: enabled 0
737 07:04:54.714326 USB3 port 0: enabled 0
738 07:04:54.717306 USB3 port 1: enabled 1
739 07:04:54.720845 USB3 port 2: enabled 0
740 07:04:54.720947 USB3 port 3: enabled 0
741 07:04:54.724145 GENERIC: 0.0: enabled 1
742 07:04:54.727514 GENERIC: 1.0: enabled 1
743 07:04:54.727596 APIC: 01: enabled 1
744 07:04:54.730851 APIC: 03: enabled 1
745 07:04:54.734143 APIC: 05: enabled 1
746 07:04:54.734232 APIC: 07: enabled 1
747 07:04:54.737513 APIC: 06: enabled 1
748 07:04:54.737596 APIC: 02: enabled 1
749 07:04:54.740749 APIC: 04: enabled 1
750 07:04:54.744102 Compare with tree...
751 07:04:54.744186 Root Device: enabled 1
752 07:04:54.747514 DOMAIN: 0000: enabled 1
753 07:04:54.750492 PCI: 00:00.0: enabled 1
754 07:04:54.753884 PCI: 00:02.0: enabled 1
755 07:04:54.757187 PCI: 00:04.0: enabled 1
756 07:04:54.757310 GENERIC: 0.0: enabled 1
757 07:04:54.760589 PCI: 00:05.0: enabled 1
758 07:04:54.763837 PCI: 00:06.0: enabled 0
759 07:04:54.767190 PCI: 00:07.0: enabled 0
760 07:04:54.770523 GENERIC: 0.0: enabled 1
761 07:04:54.770642 PCI: 00:07.1: enabled 0
762 07:04:54.773819 GENERIC: 1.0: enabled 1
763 07:04:54.777036 PCI: 00:07.2: enabled 0
764 07:04:54.780289 GENERIC: 0.0: enabled 1
765 07:04:54.783680 PCI: 00:07.3: enabled 0
766 07:04:54.787087 GENERIC: 1.0: enabled 1
767 07:04:54.787180 PCI: 00:08.0: enabled 1
768 07:04:54.790128 PCI: 00:09.0: enabled 0
769 07:04:54.793791 PCI: 00:0a.0: enabled 0
770 07:04:54.797290 PCI: 00:0d.0: enabled 1
771 07:04:54.800296 USB0 port 0: enabled 1
772 07:04:54.800409 USB3 port 0: enabled 1
773 07:04:54.803646 USB3 port 1: enabled 1
774 07:04:54.807055 USB3 port 2: enabled 0
775 07:04:54.810125 USB3 port 3: enabled 0
776 07:04:54.813643 PCI: 00:0d.1: enabled 0
777 07:04:54.813739 PCI: 00:0d.2: enabled 0
778 07:04:54.817009 GENERIC: 0.0: enabled 1
779 07:04:54.820344 PCI: 00:0d.3: enabled 0
780 07:04:54.823437 PCI: 00:0e.0: enabled 0
781 07:04:54.826946 PCI: 00:10.2: enabled 1
782 07:04:54.827043 PCI: 00:10.6: enabled 0
783 07:04:54.830187 PCI: 00:10.7: enabled 0
784 07:04:54.833477 PCI: 00:12.0: enabled 0
785 07:04:54.836910 PCI: 00:12.6: enabled 0
786 07:04:54.840105 PCI: 00:13.0: enabled 0
787 07:04:54.840195 PCI: 00:14.0: enabled 1
788 07:04:54.843288 USB0 port 0: enabled 1
789 07:04:54.846691 USB2 port 0: enabled 0
790 07:04:54.850059 USB2 port 1: enabled 1
791 07:04:54.853434 USB2 port 2: enabled 1
792 07:04:54.853528 USB2 port 3: enabled 0
793 07:04:54.856806 USB2 port 4: enabled 1
794 07:04:54.859882 USB2 port 5: enabled 0
795 07:04:54.863305 USB2 port 6: enabled 0
796 07:04:54.866694 USB2 port 7: enabled 0
797 07:04:54.869928 USB2 port 8: enabled 0
798 07:04:54.870017 USB2 port 9: enabled 0
799 07:04:54.873249 USB3 port 0: enabled 0
800 07:04:54.876625 USB3 port 1: enabled 1
801 07:04:54.879979 USB3 port 2: enabled 0
802 07:04:54.882952 USB3 port 3: enabled 0
803 07:04:54.886229 PCI: 00:14.1: enabled 0
804 07:04:54.886317 PCI: 00:14.2: enabled 1
805 07:04:54.889750 PCI: 00:14.3: enabled 1
806 07:04:54.893033 GENERIC: 0.0: enabled 1
807 07:04:54.896368 PCI: 00:15.0: enabled 1
808 07:04:54.899557 I2C: 00:1a: enabled 1
809 07:04:54.899658 I2C: 00:31: enabled 1
810 07:04:54.902797 I2C: 00:32: enabled 1
811 07:04:54.906079 PCI: 00:15.1: enabled 1
812 07:04:54.909523 I2C: 00:10: enabled 1
813 07:04:54.909609 PCI: 00:15.2: enabled 1
814 07:04:54.912851 PCI: 00:15.3: enabled 1
815 07:04:54.916301 PCI: 00:16.0: enabled 1
816 07:04:54.919667 PCI: 00:16.1: enabled 0
817 07:04:54.923074 PCI: 00:16.2: enabled 0
818 07:04:54.923180 PCI: 00:16.3: enabled 0
819 07:04:54.926484 PCI: 00:16.4: enabled 0
820 07:04:54.930184 PCI: 00:16.5: enabled 0
821 07:04:54.933537 PCI: 00:17.0: enabled 1
822 07:04:54.933624 PCI: 00:19.0: enabled 0
823 07:04:54.936880 PCI: 00:19.1: enabled 1
824 07:04:54.940260 I2C: 00:15: enabled 1
825 07:04:54.943481 PCI: 00:19.2: enabled 0
826 07:04:54.946806 PCI: 00:1d.0: enabled 1
827 07:04:54.946893 GENERIC: 0.0: enabled 1
828 07:04:54.950178 PCI: 00:1e.0: enabled 1
829 07:04:54.953560 PCI: 00:1e.1: enabled 0
830 07:04:54.956928 PCI: 00:1e.2: enabled 1
831 07:04:54.957014 SPI: 00: enabled 1
832 07:04:54.959998 PCI: 00:1e.3: enabled 1
833 07:04:54.963372 SPI: 00: enabled 1
834 07:04:55.013462 PCI: 00:1f.0: enabled 1
835 07:04:55.013631 PNP: 0c09.0: enabled 1
836 07:04:55.013713 PCI: 00:1f.1: enabled 0
837 07:04:55.014025 PCI: 00:1f.2: enabled 1
838 07:04:55.014113 GENERIC: 0.0: enabled 1
839 07:04:55.014217 GENERIC: 0.0: enabled 1
840 07:04:55.014284 GENERIC: 1.0: enabled 1
841 07:04:55.014380 PCI: 00:1f.3: enabled 1
842 07:04:55.014444 PCI: 00:1f.4: enabled 0
843 07:04:55.014528 PCI: 00:1f.5: enabled 1
844 07:04:55.014794 PCI: 00:1f.6: enabled 0
845 07:04:55.014874 PCI: 00:1f.7: enabled 0
846 07:04:55.014958 CPU_CLUSTER: 0: enabled 1
847 07:04:55.015022 APIC: 00: enabled 1
848 07:04:55.015117 APIC: 01: enabled 1
849 07:04:55.015180 APIC: 03: enabled 1
850 07:04:55.015255 APIC: 05: enabled 1
851 07:04:55.015342 APIC: 07: enabled 1
852 07:04:55.015402 APIC: 06: enabled 1
853 07:04:55.015494 APIC: 02: enabled 1
854 07:04:55.065542 APIC: 04: enabled 1
855 07:04:55.065699 Root Device scanning...
856 07:04:55.066017 scan_static_bus for Root Device
857 07:04:55.066106 DOMAIN: 0000 enabled
858 07:04:55.066186 CPU_CLUSTER: 0 enabled
859 07:04:55.066447 DOMAIN: 0000 scanning...
860 07:04:55.066531 PCI: pci_scan_bus for bus 00
861 07:04:55.066597 PCI: 00:00.0 [8086/0000] ops
862 07:04:55.066658 PCI: 00:00.0 [8086/9a12] enabled
863 07:04:55.066719 PCI: 00:02.0 [8086/0000] bus ops
864 07:04:55.066779 PCI: 00:02.0 [8086/9a40] enabled
865 07:04:55.066846 PCI: 00:04.0 [8086/0000] bus ops
866 07:04:55.066919 PCI: 00:04.0 [8086/9a03] enabled
867 07:04:55.066979 PCI: 00:05.0 [8086/9a19] enabled
868 07:04:55.067037 PCI: 00:07.0 [0000/0000] hidden
869 07:04:55.067281 PCI: 00:08.0 [8086/9a11] enabled
870 07:04:55.067347 PCI: 00:0a.0 [8086/9a0d] disabled
871 07:04:55.115873 PCI: 00:0d.0 [8086/0000] bus ops
872 07:04:55.116029 PCI: 00:0d.0 [8086/9a13] enabled
873 07:04:55.116320 PCI: 00:14.0 [8086/0000] bus ops
874 07:04:55.116404 PCI: 00:14.0 [8086/a0ed] enabled
875 07:04:55.116479 PCI: 00:14.2 [8086/a0ef] enabled
876 07:04:55.116557 PCI: 00:14.3 [8086/0000] bus ops
877 07:04:55.116636 PCI: 00:14.3 [8086/a0f0] enabled
878 07:04:55.116908 PCI: 00:15.0 [8086/0000] bus ops
879 07:04:55.116996 PCI: 00:15.0 [8086/a0e8] enabled
880 07:04:55.117073 PCI: 00:15.1 [8086/0000] bus ops
881 07:04:55.117153 PCI: 00:15.1 [8086/a0e9] enabled
882 07:04:55.117417 PCI: 00:15.2 [8086/0000] bus ops
883 07:04:55.117518 PCI: 00:15.2 [8086/a0ea] enabled
884 07:04:55.117622 PCI: 00:15.3 [8086/0000] bus ops
885 07:04:55.117728 PCI: 00:15.3 [8086/a0eb] enabled
886 07:04:55.133203 PCI: 00:16.0 [8086/0000] ops
887 07:04:55.133342 PCI: 00:16.0 [8086/a0e0] enabled
888 07:04:55.133609 PCI: Static device PCI: 00:17.0 not found, disabling it.
889 07:04:55.136591 PCI: 00:19.0 [8086/0000] bus ops
890 07:04:55.136685 PCI: 00:19.0 [8086/a0c5] disabled
891 07:04:55.139702 PCI: 00:19.1 [8086/0000] bus ops
892 07:04:55.143002 PCI: 00:19.1 [8086/a0c6] enabled
893 07:04:55.146278 PCI: 00:1d.0 [8086/0000] bus ops
894 07:04:55.149728 PCI: 00:1d.0 [8086/a0b0] enabled
895 07:04:55.153108 PCI: 00:1e.0 [8086/0000] ops
896 07:04:55.156521 PCI: 00:1e.0 [8086/a0a8] enabled
897 07:04:55.159852 PCI: 00:1e.2 [8086/0000] bus ops
898 07:04:55.162803 PCI: 00:1e.2 [8086/a0aa] enabled
899 07:04:55.166188 PCI: 00:1e.3 [8086/0000] bus ops
900 07:04:55.169739 PCI: 00:1e.3 [8086/a0ab] enabled
901 07:04:55.172968 PCI: 00:1f.0 [8086/0000] bus ops
902 07:04:55.176282 PCI: 00:1f.0 [8086/a087] enabled
903 07:04:55.176405 RTC Init
904 07:04:55.179565 Set power on after power failure.
905 07:04:55.182802 Disabling Deep S3
906 07:04:55.182924 Disabling Deep S3
907 07:04:55.186014 Disabling Deep S4
908 07:04:55.186135 Disabling Deep S4
909 07:04:55.189358 Disabling Deep S5
910 07:04:55.189479 Disabling Deep S5
911 07:04:55.192750 PCI: 00:1f.2 [0000/0000] hidden
912 07:04:55.196122 PCI: 00:1f.3 [8086/0000] bus ops
913 07:04:55.199229 PCI: 00:1f.3 [8086/a0c8] enabled
914 07:04:55.202680 PCI: 00:1f.5 [8086/0000] bus ops
915 07:04:55.205973 PCI: 00:1f.5 [8086/a0a4] enabled
916 07:04:55.209342 PCI: Leftover static devices:
917 07:04:55.212574 PCI: 00:10.2
918 07:04:55.212682 PCI: 00:10.6
919 07:04:55.215909 PCI: 00:10.7
920 07:04:55.216001 PCI: 00:06.0
921 07:04:55.216072 PCI: 00:07.1
922 07:04:55.219459 PCI: 00:07.2
923 07:04:55.219550 PCI: 00:07.3
924 07:04:55.222548 PCI: 00:09.0
925 07:04:55.222665 PCI: 00:0d.1
926 07:04:55.222773 PCI: 00:0d.2
927 07:04:55.225908 PCI: 00:0d.3
928 07:04:55.226006 PCI: 00:0e.0
929 07:04:55.229459 PCI: 00:12.0
930 07:04:55.229550 PCI: 00:12.6
931 07:04:55.232540 PCI: 00:13.0
932 07:04:55.232629 PCI: 00:14.1
933 07:04:55.232700 PCI: 00:16.1
934 07:04:55.235981 PCI: 00:16.2
935 07:04:55.236070 PCI: 00:16.3
936 07:04:55.239379 PCI: 00:16.4
937 07:04:55.239470 PCI: 00:16.5
938 07:04:55.239545 PCI: 00:17.0
939 07:04:55.242511 PCI: 00:19.2
940 07:04:55.242590 PCI: 00:1e.1
941 07:04:55.245835 PCI: 00:1f.1
942 07:04:55.245928 PCI: 00:1f.4
943 07:04:55.245999 PCI: 00:1f.6
944 07:04:55.249104 PCI: 00:1f.7
945 07:04:55.252660 PCI: Check your devicetree.cb.
946 07:04:55.255754 PCI: 00:02.0 scanning...
947 07:04:55.259140 scan_generic_bus for PCI: 00:02.0
948 07:04:55.262535 scan_generic_bus for PCI: 00:02.0 done
949 07:04:55.265598 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
950 07:04:55.269029 PCI: 00:04.0 scanning...
951 07:04:55.272503 scan_generic_bus for PCI: 00:04.0
952 07:04:55.275690 GENERIC: 0.0 enabled
953 07:04:55.282352 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
954 07:04:55.285641 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
955 07:04:55.289011 PCI: 00:0d.0 scanning...
956 07:04:55.292342 scan_static_bus for PCI: 00:0d.0
957 07:04:55.295393 USB0 port 0 enabled
958 07:04:55.295497 USB0 port 0 scanning...
959 07:04:55.298829 scan_static_bus for USB0 port 0
960 07:04:55.302148 USB3 port 0 enabled
961 07:04:55.305505 USB3 port 1 enabled
962 07:04:55.305594 USB3 port 2 disabled
963 07:04:55.308876 USB3 port 3 disabled
964 07:04:55.312137 USB3 port 0 scanning...
965 07:04:55.315488 scan_static_bus for USB3 port 0
966 07:04:55.318609 scan_static_bus for USB3 port 0 done
967 07:04:55.322024 scan_bus: bus USB3 port 0 finished in 6 msecs
968 07:04:55.325385 USB3 port 1 scanning...
969 07:04:55.328722 scan_static_bus for USB3 port 1
970 07:04:55.331849 scan_static_bus for USB3 port 1 done
971 07:04:55.335269 scan_bus: bus USB3 port 1 finished in 6 msecs
972 07:04:55.341802 scan_static_bus for USB0 port 0 done
973 07:04:55.345111 scan_bus: bus USB0 port 0 finished in 43 msecs
974 07:04:55.348467 scan_static_bus for PCI: 00:0d.0 done
975 07:04:55.355328 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
976 07:04:55.355428 PCI: 00:14.0 scanning...
977 07:04:55.358340 scan_static_bus for PCI: 00:14.0
978 07:04:55.361758 USB0 port 0 enabled
979 07:04:55.364971 USB0 port 0 scanning...
980 07:04:55.368477 scan_static_bus for USB0 port 0
981 07:04:55.371645 USB2 port 0 disabled
982 07:04:55.371732 USB2 port 1 enabled
983 07:04:55.375039 USB2 port 2 enabled
984 07:04:55.375127 USB2 port 3 disabled
985 07:04:55.378359 USB2 port 4 enabled
986 07:04:55.381634 USB2 port 5 disabled
987 07:04:55.381726 USB2 port 6 disabled
988 07:04:55.384876 USB2 port 7 disabled
989 07:04:55.388481 USB2 port 8 disabled
990 07:04:55.388570 USB2 port 9 disabled
991 07:04:55.391562 USB3 port 0 disabled
992 07:04:55.394807 USB3 port 1 enabled
993 07:04:55.394893 USB3 port 2 disabled
994 07:04:55.398203 USB3 port 3 disabled
995 07:04:55.401643 USB2 port 1 scanning...
996 07:04:55.404676 scan_static_bus for USB2 port 1
997 07:04:55.408005 scan_static_bus for USB2 port 1 done
998 07:04:55.411524 scan_bus: bus USB2 port 1 finished in 6 msecs
999 07:04:55.414713 USB2 port 2 scanning...
1000 07:04:55.418049 scan_static_bus for USB2 port 2
1001 07:04:55.421211 scan_static_bus for USB2 port 2 done
1002 07:04:55.424722 scan_bus: bus USB2 port 2 finished in 6 msecs
1003 07:04:55.428068 USB2 port 4 scanning...
1004 07:04:55.431211 scan_static_bus for USB2 port 4
1005 07:04:55.434783 scan_static_bus for USB2 port 4 done
1006 07:04:55.441301 scan_bus: bus USB2 port 4 finished in 6 msecs
1007 07:04:55.441409 USB3 port 1 scanning...
1008 07:04:55.444719 scan_static_bus for USB3 port 1
1009 07:04:55.451429 scan_static_bus for USB3 port 1 done
1010 07:04:55.454678 scan_bus: bus USB3 port 1 finished in 6 msecs
1011 07:04:55.457905 scan_static_bus for USB0 port 0 done
1012 07:04:55.461350 scan_bus: bus USB0 port 0 finished in 93 msecs
1013 07:04:55.467931 scan_static_bus for PCI: 00:14.0 done
1014 07:04:55.471003 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1015 07:04:55.474383 PCI: 00:14.3 scanning...
1016 07:04:55.477759 scan_static_bus for PCI: 00:14.3
1017 07:04:55.481028 GENERIC: 0.0 enabled
1018 07:04:55.484322 scan_static_bus for PCI: 00:14.3 done
1019 07:04:55.487718 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1020 07:04:55.490989 PCI: 00:15.0 scanning...
1021 07:04:55.494412 scan_static_bus for PCI: 00:15.0
1022 07:04:55.497827 I2C: 00:1a enabled
1023 07:04:55.497915 I2C: 00:31 enabled
1024 07:04:55.501237 I2C: 00:32 enabled
1025 07:04:55.505058 scan_static_bus for PCI: 00:15.0 done
1026 07:04:55.508406 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1027 07:04:55.511779 PCI: 00:15.1 scanning...
1028 07:04:55.515057 scan_static_bus for PCI: 00:15.1
1029 07:04:55.518254 I2C: 00:10 enabled
1030 07:04:55.521674 scan_static_bus for PCI: 00:15.1 done
1031 07:04:55.524698 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1032 07:04:55.528085 PCI: 00:15.2 scanning...
1033 07:04:55.531471 scan_static_bus for PCI: 00:15.2
1034 07:04:55.534815 scan_static_bus for PCI: 00:15.2 done
1035 07:04:55.541457 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1036 07:04:55.541561 PCI: 00:15.3 scanning...
1037 07:04:55.544869 scan_static_bus for PCI: 00:15.3
1038 07:04:55.551310 scan_static_bus for PCI: 00:15.3 done
1039 07:04:55.554682 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1040 07:04:55.558197 PCI: 00:19.1 scanning...
1041 07:04:55.561228 scan_static_bus for PCI: 00:19.1
1042 07:04:55.561331 I2C: 00:15 enabled
1043 07:04:55.568016 scan_static_bus for PCI: 00:19.1 done
1044 07:04:55.571255 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1045 07:04:55.574688 PCI: 00:1d.0 scanning...
1046 07:04:55.577781 do_pci_scan_bridge for PCI: 00:1d.0
1047 07:04:55.581187 PCI: pci_scan_bus for bus 01
1048 07:04:55.584368 PCI: 01:00.0 [1c5c/174a] enabled
1049 07:04:55.584462 GENERIC: 0.0 enabled
1050 07:04:55.591034 Enabling Common Clock Configuration
1051 07:04:55.594374 L1 Sub-State supported from root port 29
1052 07:04:55.597813 L1 Sub-State Support = 0xf
1053 07:04:55.601137 CommonModeRestoreTime = 0x28
1054 07:04:55.604534 Power On Value = 0x16, Power On Scale = 0x0
1055 07:04:55.604628 ASPM: Enabled L1
1056 07:04:55.610920 PCIe: Max_Payload_Size adjusted to 128
1057 07:04:55.614181 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1058 07:04:55.617640 PCI: 00:1e.2 scanning...
1059 07:04:55.620992 scan_generic_bus for PCI: 00:1e.2
1060 07:04:55.621074 SPI: 00 enabled
1061 07:04:55.627570 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1062 07:04:55.634259 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1063 07:04:55.637263 PCI: 00:1e.3 scanning...
1064 07:04:55.640640 scan_generic_bus for PCI: 00:1e.3
1065 07:04:55.640732 SPI: 00 enabled
1066 07:04:55.647369 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1067 07:04:55.650752 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1068 07:04:55.653944 PCI: 00:1f.0 scanning...
1069 07:04:55.657143 scan_static_bus for PCI: 00:1f.0
1070 07:04:55.660602 PNP: 0c09.0 enabled
1071 07:04:55.663677 PNP: 0c09.0 scanning...
1072 07:04:55.667141 scan_static_bus for PNP: 0c09.0
1073 07:04:55.670567 scan_static_bus for PNP: 0c09.0 done
1074 07:04:55.673643 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1075 07:04:55.677105 scan_static_bus for PCI: 00:1f.0 done
1076 07:04:55.683500 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1077 07:04:55.687052 PCI: 00:1f.2 scanning...
1078 07:04:55.690310 scan_static_bus for PCI: 00:1f.2
1079 07:04:55.690417 GENERIC: 0.0 enabled
1080 07:04:55.693706 GENERIC: 0.0 scanning...
1081 07:04:55.696943 scan_static_bus for GENERIC: 0.0
1082 07:04:55.700380 GENERIC: 0.0 enabled
1083 07:04:55.700472 GENERIC: 1.0 enabled
1084 07:04:55.706904 scan_static_bus for GENERIC: 0.0 done
1085 07:04:55.710346 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1086 07:04:55.713609 scan_static_bus for PCI: 00:1f.2 done
1087 07:04:55.720174 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1088 07:04:55.720285 PCI: 00:1f.3 scanning...
1089 07:04:55.723508 scan_static_bus for PCI: 00:1f.3
1090 07:04:55.729972 scan_static_bus for PCI: 00:1f.3 done
1091 07:04:55.733457 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1092 07:04:55.736779 PCI: 00:1f.5 scanning...
1093 07:04:55.739859 scan_generic_bus for PCI: 00:1f.5
1094 07:04:55.743294 scan_generic_bus for PCI: 00:1f.5 done
1095 07:04:55.746758 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1096 07:04:55.753063 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1097 07:04:55.756526 scan_static_bus for Root Device done
1098 07:04:55.763135 scan_bus: bus Root Device finished in 737 msecs
1099 07:04:55.763245 done
1100 07:04:55.769938 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1101 07:04:55.772819 Chrome EC: UHEPI supported
1102 07:04:55.776181 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1103 07:04:55.783012 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1104 07:04:55.786478 SPI flash protection: WPSW=0 SRP0=0
1105 07:04:55.793081 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1106 07:04:55.799735 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1107 07:04:55.799852 found VGA at PCI: 00:02.0
1108 07:04:55.802647 Setting up VGA for PCI: 00:02.0
1109 07:04:55.809532 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1110 07:04:55.812630 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1111 07:04:55.815980 Allocating resources...
1112 07:04:55.819277 Reading resources...
1113 07:04:55.822873 Root Device read_resources bus 0 link: 0
1114 07:04:55.825850 DOMAIN: 0000 read_resources bus 0 link: 0
1115 07:04:55.833110 PCI: 00:04.0 read_resources bus 1 link: 0
1116 07:04:55.836592 PCI: 00:04.0 read_resources bus 1 link: 0 done
1117 07:04:55.843392 PCI: 00:0d.0 read_resources bus 0 link: 0
1118 07:04:55.846849 USB0 port 0 read_resources bus 0 link: 0
1119 07:04:55.853672 USB0 port 0 read_resources bus 0 link: 0 done
1120 07:04:55.856631 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1121 07:04:55.863527 PCI: 00:14.0 read_resources bus 0 link: 0
1122 07:04:55.866510 USB0 port 0 read_resources bus 0 link: 0
1123 07:04:55.873239 USB0 port 0 read_resources bus 0 link: 0 done
1124 07:04:55.876394 PCI: 00:14.0 read_resources bus 0 link: 0 done
1125 07:04:55.883135 PCI: 00:14.3 read_resources bus 0 link: 0
1126 07:04:55.886552 PCI: 00:14.3 read_resources bus 0 link: 0 done
1127 07:04:55.889797 PCI: 00:15.0 read_resources bus 0 link: 0
1128 07:04:55.897161 PCI: 00:15.0 read_resources bus 0 link: 0 done
1129 07:04:55.900561 PCI: 00:15.1 read_resources bus 0 link: 0
1130 07:04:55.907182 PCI: 00:15.1 read_resources bus 0 link: 0 done
1131 07:04:55.910700 PCI: 00:19.1 read_resources bus 0 link: 0
1132 07:04:55.917762 PCI: 00:19.1 read_resources bus 0 link: 0 done
1133 07:04:55.921048 PCI: 00:1d.0 read_resources bus 1 link: 0
1134 07:04:55.927650 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1135 07:04:55.930671 PCI: 00:1e.2 read_resources bus 2 link: 0
1136 07:04:55.937588 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1137 07:04:55.940990 PCI: 00:1e.3 read_resources bus 3 link: 0
1138 07:04:55.947386 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1139 07:04:55.950903 PCI: 00:1f.0 read_resources bus 0 link: 0
1140 07:04:55.957284 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1141 07:04:55.960618 PCI: 00:1f.2 read_resources bus 0 link: 0
1142 07:04:55.963871 GENERIC: 0.0 read_resources bus 0 link: 0
1143 07:04:55.971171 GENERIC: 0.0 read_resources bus 0 link: 0 done
1144 07:04:55.974501 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1145 07:04:55.981573 DOMAIN: 0000 read_resources bus 0 link: 0 done
1146 07:04:55.985307 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1147 07:04:55.991637 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1148 07:04:55.994967 Root Device read_resources bus 0 link: 0 done
1149 07:04:55.998248 Done reading resources.
1150 07:04:56.004943 Show resources in subtree (Root Device)...After reading.
1151 07:04:56.008247 Root Device child on link 0 DOMAIN: 0000
1152 07:04:56.011352 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1153 07:04:56.021506 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1154 07:04:56.031329 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1155 07:04:56.034852 PCI: 00:00.0
1156 07:04:56.044631 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1157 07:04:56.051254 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1158 07:04:56.061374 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1159 07:04:56.071257 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1160 07:04:56.081110 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1161 07:04:56.091286 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1162 07:04:56.101051 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1163 07:04:56.107755 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1164 07:04:56.117566 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1165 07:04:56.127865 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1166 07:04:56.137543 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1167 07:04:56.147751 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1168 07:04:56.154173 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1169 07:04:56.164044 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1170 07:04:56.174069 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1171 07:04:56.183876 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1172 07:04:56.193859 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1173 07:04:56.203761 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1174 07:04:56.210404 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1175 07:04:56.220681 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1176 07:04:56.223768 PCI: 00:02.0
1177 07:04:56.233802 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1178 07:04:56.243649 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1179 07:04:56.253505 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1180 07:04:56.257028 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1181 07:04:56.266984 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1182 07:04:56.270353 GENERIC: 0.0
1183 07:04:56.270453 PCI: 00:05.0
1184 07:04:56.280317 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 07:04:56.286767 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1186 07:04:56.286871 GENERIC: 0.0
1187 07:04:56.290241 PCI: 00:08.0
1188 07:04:56.300022 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 07:04:56.300124 PCI: 00:0a.0
1190 07:04:56.303300 PCI: 00:0d.0 child on link 0 USB0 port 0
1191 07:04:56.313303 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1192 07:04:56.320101 USB0 port 0 child on link 0 USB3 port 0
1193 07:04:56.320199 USB3 port 0
1194 07:04:56.323550 USB3 port 1
1195 07:04:56.323639 USB3 port 2
1196 07:04:56.326745 USB3 port 3
1197 07:04:56.329971 PCI: 00:14.0 child on link 0 USB0 port 0
1198 07:04:56.339893 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 07:04:56.346426 USB0 port 0 child on link 0 USB2 port 0
1200 07:04:56.346525 USB2 port 0
1201 07:04:56.349763 USB2 port 1
1202 07:04:56.349845 USB2 port 2
1203 07:04:56.353321 USB2 port 3
1204 07:04:56.353411 USB2 port 4
1205 07:04:56.356426 USB2 port 5
1206 07:04:56.356515 USB2 port 6
1207 07:04:56.359752 USB2 port 7
1208 07:04:56.359841 USB2 port 8
1209 07:04:56.363128 USB2 port 9
1210 07:04:56.363218 USB3 port 0
1211 07:04:56.366340 USB3 port 1
1212 07:04:56.369732 USB3 port 2
1213 07:04:56.369821 USB3 port 3
1214 07:04:56.373012 PCI: 00:14.2
1215 07:04:56.383024 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 07:04:56.393071 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1217 07:04:56.396335 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 07:04:56.406221 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 07:04:56.406325 GENERIC: 0.0
1220 07:04:56.413121 PCI: 00:15.0 child on link 0 I2C: 00:1a
1221 07:04:56.422897 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1222 07:04:56.422998 I2C: 00:1a
1223 07:04:56.426425 I2C: 00:31
1224 07:04:56.426514 I2C: 00:32
1225 07:04:56.429367 PCI: 00:15.1 child on link 0 I2C: 00:10
1226 07:04:56.439273 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 07:04:56.442781 I2C: 00:10
1228 07:04:56.442866 PCI: 00:15.2
1229 07:04:56.452553 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1230 07:04:56.455882 PCI: 00:15.3
1231 07:04:56.466029 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 07:04:56.466155 PCI: 00:16.0
1233 07:04:56.476021 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 07:04:56.479387 PCI: 00:19.0
1235 07:04:56.482768 PCI: 00:19.1 child on link 0 I2C: 00:15
1236 07:04:56.492655 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 07:04:56.495762 I2C: 00:15
1238 07:04:56.499126 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1239 07:04:56.508936 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1240 07:04:56.518915 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1241 07:04:56.525642 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1242 07:04:56.529062 GENERIC: 0.0
1243 07:04:56.529156 PCI: 01:00.0
1244 07:04:56.538792 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1245 07:04:56.548900 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1246 07:04:56.558722 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1247 07:04:56.562109 PCI: 00:1e.0
1248 07:04:56.572186 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1249 07:04:56.575462 PCI: 00:1e.2 child on link 0 SPI: 00
1250 07:04:56.585439 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 07:04:56.585540 SPI: 00
1252 07:04:56.591868 PCI: 00:1e.3 child on link 0 SPI: 00
1253 07:04:56.601993 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 07:04:56.602095 SPI: 00
1255 07:04:56.605252 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 07:04:56.615217 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 07:04:56.618391 PNP: 0c09.0
1258 07:04:56.625256 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 07:04:56.632001 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1260 07:04:56.638318 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 07:04:56.648283 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1262 07:04:56.655203 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1263 07:04:56.655300 GENERIC: 0.0
1264 07:04:56.658608 GENERIC: 1.0
1265 07:04:56.658698 PCI: 00:1f.3
1266 07:04:56.668258 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1267 07:04:56.678010 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1268 07:04:56.681371 PCI: 00:1f.5
1269 07:04:56.688246 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1270 07:04:56.694627 CPU_CLUSTER: 0 child on link 0 APIC: 00
1271 07:04:56.694726 APIC: 00
1272 07:04:56.698044 APIC: 01
1273 07:04:56.698135 APIC: 03
1274 07:04:56.698206 APIC: 05
1275 07:04:56.701367 APIC: 07
1276 07:04:56.701458 APIC: 06
1277 07:04:56.701529 APIC: 02
1278 07:04:56.704775 APIC: 04
1279 07:04:56.711551 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1280 07:04:56.718016 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1281 07:04:56.724791 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1282 07:04:56.731212 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1283 07:04:56.734604 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1284 07:04:56.737911 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1285 07:04:56.741269 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1286 07:04:56.751267 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1287 07:04:56.757656 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1288 07:04:56.764385 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1289 07:04:56.771134 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1290 07:04:56.777677 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1291 07:04:56.784119 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1292 07:04:56.794123 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1293 07:04:56.800698 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1294 07:04:56.804115 DOMAIN: 0000: Resource ranges:
1295 07:04:56.807469 * Base: 1000, Size: 800, Tag: 100
1296 07:04:56.810929 * Base: 1900, Size: e700, Tag: 100
1297 07:04:56.817580 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1298 07:04:56.824190 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1299 07:04:56.830870 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1300 07:04:56.837285 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1301 07:04:56.843869 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1302 07:04:56.853841 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1303 07:04:56.860743 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1304 07:04:56.867250 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1305 07:04:56.877070 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1306 07:04:56.883697 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1307 07:04:56.890197 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1308 07:04:56.900166 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1309 07:04:56.906900 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1310 07:04:56.913602 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1311 07:04:56.923472 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1312 07:04:56.930247 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1313 07:04:56.936714 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1314 07:04:56.946681 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1315 07:04:56.953344 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1316 07:04:56.960142 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1317 07:04:56.969970 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1318 07:04:56.976433 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1319 07:04:56.983065 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1320 07:04:56.992979 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1321 07:04:56.999690 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1322 07:04:57.003138 DOMAIN: 0000: Resource ranges:
1323 07:04:57.006544 * Base: 7fc00000, Size: 40400000, Tag: 200
1324 07:04:57.012893 * Base: d0000000, Size: 28000000, Tag: 200
1325 07:04:57.016144 * Base: fa000000, Size: 1000000, Tag: 200
1326 07:04:57.019635 * Base: fb001000, Size: 2fff000, Tag: 200
1327 07:04:57.022914 * Base: fe010000, Size: 2e000, Tag: 200
1328 07:04:57.029759 * Base: fe03f000, Size: d41000, Tag: 200
1329 07:04:57.032826 * Base: fed88000, Size: 8000, Tag: 200
1330 07:04:57.036399 * Base: fed93000, Size: d000, Tag: 200
1331 07:04:57.039478 * Base: feda2000, Size: 1e000, Tag: 200
1332 07:04:57.046130 * Base: fede0000, Size: 1220000, Tag: 200
1333 07:04:57.049645 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1334 07:04:57.056083 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1335 07:04:57.062959 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1336 07:04:57.069593 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1337 07:04:57.076088 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1338 07:04:57.082964 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1339 07:04:57.089530 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1340 07:04:57.095918 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1341 07:04:57.102562 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1342 07:04:57.109217 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1343 07:04:57.115961 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1344 07:04:57.122459 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1345 07:04:57.129141 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1346 07:04:57.135850 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1347 07:04:57.142313 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1348 07:04:57.149146 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1349 07:04:57.155668 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1350 07:04:57.162439 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1351 07:04:57.169163 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1352 07:04:57.175636 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1353 07:04:57.182253 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1354 07:04:57.188910 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1355 07:04:57.195403 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1356 07:04:57.202135 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1357 07:04:57.211886 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1358 07:04:57.215229 PCI: 00:1d.0: Resource ranges:
1359 07:04:57.218658 * Base: 7fc00000, Size: 100000, Tag: 200
1360 07:04:57.225182 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1361 07:04:57.231834 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1362 07:04:57.238620 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1363 07:04:57.248765 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1364 07:04:57.255379 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1365 07:04:57.258312 Root Device assign_resources, bus 0 link: 0
1366 07:04:57.264801 DOMAIN: 0000 assign_resources, bus 0 link: 0
1367 07:04:57.271658 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1368 07:04:57.281692 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1369 07:04:57.288246 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1370 07:04:57.294713 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1371 07:04:57.301195 PCI: 00:04.0 assign_resources, bus 1 link: 0
1372 07:04:57.304531 PCI: 00:04.0 assign_resources, bus 1 link: 0
1373 07:04:57.314774 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1374 07:04:57.321228 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1375 07:04:57.331219 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1376 07:04:57.334562 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1377 07:04:57.341025 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1378 07:04:57.347721 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1379 07:04:57.350922 PCI: 00:14.0 assign_resources, bus 0 link: 0
1380 07:04:57.357380 PCI: 00:14.0 assign_resources, bus 0 link: 0
1381 07:04:57.363974 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1382 07:04:57.373974 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1383 07:04:57.380786 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1384 07:04:57.387466 PCI: 00:14.3 assign_resources, bus 0 link: 0
1385 07:04:57.390804 PCI: 00:14.3 assign_resources, bus 0 link: 0
1386 07:04:57.400647 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1387 07:04:57.403657 PCI: 00:15.0 assign_resources, bus 0 link: 0
1388 07:04:57.407000 PCI: 00:15.0 assign_resources, bus 0 link: 0
1389 07:04:57.416906 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1390 07:04:57.420237 PCI: 00:15.1 assign_resources, bus 0 link: 0
1391 07:04:57.426866 PCI: 00:15.1 assign_resources, bus 0 link: 0
1392 07:04:57.433573 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1393 07:04:57.443291 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1394 07:04:57.449848 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1395 07:04:57.459731 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1396 07:04:57.463210 PCI: 00:19.1 assign_resources, bus 0 link: 0
1397 07:04:57.466679 PCI: 00:19.1 assign_resources, bus 0 link: 0
1398 07:04:57.476621 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1399 07:04:57.486529 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1400 07:04:57.496334 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1401 07:04:57.499853 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1402 07:04:57.506199 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1403 07:04:57.516369 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1404 07:04:57.522935 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1405 07:04:57.529305 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 07:04:57.536203 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1407 07:04:57.542725 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1408 07:04:57.546163 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1409 07:04:57.552524 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1410 07:04:57.559196 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1411 07:04:57.562508 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1412 07:04:57.569046 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1413 07:04:57.572642 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1414 07:04:57.579032 LPC: Trying to open IO window from 800 size 1ff
1415 07:04:57.585891 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1416 07:04:57.595685 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1417 07:04:57.602186 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1418 07:04:57.605675 DOMAIN: 0000 assign_resources, bus 0 link: 0
1419 07:04:57.612335 Root Device assign_resources, bus 0 link: 0
1420 07:04:57.615751 Done setting resources.
1421 07:04:57.622174 Show resources in subtree (Root Device)...After assigning values.
1422 07:04:57.625493 Root Device child on link 0 DOMAIN: 0000
1423 07:04:57.628830 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1424 07:04:57.638921 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1425 07:04:57.648661 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1426 07:04:57.648784 PCI: 00:00.0
1427 07:04:57.658969 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1428 07:04:57.668598 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1429 07:04:57.678740 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1430 07:04:57.688660 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1431 07:04:57.698782 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1432 07:04:57.705247 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1433 07:04:57.715313 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1434 07:04:57.724954 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1435 07:04:57.735036 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1436 07:04:57.745051 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1437 07:04:57.754896 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1438 07:04:57.761563 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1439 07:04:57.771389 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1440 07:04:57.781621 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1441 07:04:57.791478 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1442 07:04:57.801267 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1443 07:04:57.811215 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1444 07:04:57.817911 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1445 07:04:57.827805 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1446 07:04:57.837644 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1447 07:04:57.841253 PCI: 00:02.0
1448 07:04:57.850939 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1449 07:04:57.861053 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1450 07:04:57.870840 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1451 07:04:57.874199 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1452 07:04:57.884097 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1453 07:04:57.887473 GENERIC: 0.0
1454 07:04:57.887569 PCI: 00:05.0
1455 07:04:57.900832 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1456 07:04:57.904129 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1457 07:04:57.907398 GENERIC: 0.0
1458 07:04:57.907481 PCI: 00:08.0
1459 07:04:57.917523 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1460 07:04:57.920663 PCI: 00:0a.0
1461 07:04:57.923671 PCI: 00:0d.0 child on link 0 USB0 port 0
1462 07:04:57.933960 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1463 07:04:57.940295 USB0 port 0 child on link 0 USB3 port 0
1464 07:04:57.940399 USB3 port 0
1465 07:04:57.943652 USB3 port 1
1466 07:04:57.943743 USB3 port 2
1467 07:04:57.947033 USB3 port 3
1468 07:04:57.950385 PCI: 00:14.0 child on link 0 USB0 port 0
1469 07:04:57.960373 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1470 07:04:57.963801 USB0 port 0 child on link 0 USB2 port 0
1471 07:04:57.967138 USB2 port 0
1472 07:04:57.967222 USB2 port 1
1473 07:04:57.970327 USB2 port 2
1474 07:04:57.973802 USB2 port 3
1475 07:04:57.973887 USB2 port 4
1476 07:04:57.976977 USB2 port 5
1477 07:04:57.977057 USB2 port 6
1478 07:04:57.980460 USB2 port 7
1479 07:04:57.980550 USB2 port 8
1480 07:04:57.983795 USB2 port 9
1481 07:04:57.983886 USB3 port 0
1482 07:04:57.987170 USB3 port 1
1483 07:04:57.987278 USB3 port 2
1484 07:04:57.990201 USB3 port 3
1485 07:04:57.990320 PCI: 00:14.2
1486 07:04:58.000392 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1487 07:04:58.013421 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1488 07:04:58.016793 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1489 07:04:58.026856 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1490 07:04:58.030144 GENERIC: 0.0
1491 07:04:58.033528 PCI: 00:15.0 child on link 0 I2C: 00:1a
1492 07:04:58.043373 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1493 07:04:58.043488 I2C: 00:1a
1494 07:04:58.046662 I2C: 00:31
1495 07:04:58.046752 I2C: 00:32
1496 07:04:58.053421 PCI: 00:15.1 child on link 0 I2C: 00:10
1497 07:04:58.063205 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1498 07:04:58.063308 I2C: 00:10
1499 07:04:58.066522 PCI: 00:15.2
1500 07:04:58.076630 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1501 07:04:58.076739 PCI: 00:15.3
1502 07:04:58.089692 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1503 07:04:58.089806 PCI: 00:16.0
1504 07:04:58.099890 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1505 07:04:58.103344 PCI: 00:19.0
1506 07:04:58.106500 PCI: 00:19.1 child on link 0 I2C: 00:15
1507 07:04:58.116391 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1508 07:04:58.119767 I2C: 00:15
1509 07:04:58.123057 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1510 07:04:58.133164 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1511 07:04:58.142842 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1512 07:04:58.152912 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1513 07:04:58.156355 GENERIC: 0.0
1514 07:04:58.156453 PCI: 01:00.0
1515 07:04:58.169532 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1516 07:04:58.179564 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1517 07:04:58.189282 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1518 07:04:58.189393 PCI: 00:1e.0
1519 07:04:58.202623 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1520 07:04:58.205905 PCI: 00:1e.2 child on link 0 SPI: 00
1521 07:04:58.215863 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1522 07:04:58.215977 SPI: 00
1523 07:04:58.222585 PCI: 00:1e.3 child on link 0 SPI: 00
1524 07:04:58.232588 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1525 07:04:58.232706 SPI: 00
1526 07:04:58.235966 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1527 07:04:58.245885 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1528 07:04:58.248977 PNP: 0c09.0
1529 07:04:58.255789 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1530 07:04:58.262613 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1531 07:04:58.269001 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1532 07:04:58.278992 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1533 07:04:58.285518 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1534 07:04:58.285644 GENERIC: 0.0
1535 07:04:58.288920 GENERIC: 1.0
1536 07:04:58.289011 PCI: 00:1f.3
1537 07:04:58.299112 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1538 07:04:58.312241 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1539 07:04:58.312346 PCI: 00:1f.5
1540 07:04:58.322120 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1541 07:04:58.325438 CPU_CLUSTER: 0 child on link 0 APIC: 00
1542 07:04:58.328726 APIC: 00
1543 07:04:58.328837 APIC: 01
1544 07:04:58.332135 APIC: 03
1545 07:04:58.332224 APIC: 05
1546 07:04:58.332299 APIC: 07
1547 07:04:58.335543 APIC: 06
1548 07:04:58.335633 APIC: 02
1549 07:04:58.335704 APIC: 04
1550 07:04:58.338995 Done allocating resources.
1551 07:04:58.345538 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1552 07:04:58.352083 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1553 07:04:58.355351 Configure GPIOs for I2S audio on UP4.
1554 07:04:58.362175 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1555 07:04:58.365518 Enabling resources...
1556 07:04:58.368909 PCI: 00:00.0 subsystem <- 8086/9a12
1557 07:04:58.372308 PCI: 00:00.0 cmd <- 06
1558 07:04:58.375369 PCI: 00:02.0 subsystem <- 8086/9a40
1559 07:04:58.378732 PCI: 00:02.0 cmd <- 03
1560 07:04:58.381816 PCI: 00:04.0 subsystem <- 8086/9a03
1561 07:04:58.385284 PCI: 00:04.0 cmd <- 02
1562 07:04:58.388340 PCI: 00:05.0 subsystem <- 8086/9a19
1563 07:04:58.388430 PCI: 00:05.0 cmd <- 02
1564 07:04:58.395152 PCI: 00:08.0 subsystem <- 8086/9a11
1565 07:04:58.395247 PCI: 00:08.0 cmd <- 06
1566 07:04:58.398571 PCI: 00:0d.0 subsystem <- 8086/9a13
1567 07:04:58.401688 PCI: 00:0d.0 cmd <- 02
1568 07:04:58.405109 PCI: 00:14.0 subsystem <- 8086/a0ed
1569 07:04:58.408430 PCI: 00:14.0 cmd <- 02
1570 07:04:58.411806 PCI: 00:14.2 subsystem <- 8086/a0ef
1571 07:04:58.415031 PCI: 00:14.2 cmd <- 02
1572 07:04:58.418236 PCI: 00:14.3 subsystem <- 8086/a0f0
1573 07:04:58.421721 PCI: 00:14.3 cmd <- 02
1574 07:04:58.425182 PCI: 00:15.0 subsystem <- 8086/a0e8
1575 07:04:58.428375 PCI: 00:15.0 cmd <- 02
1576 07:04:58.431760 PCI: 00:15.1 subsystem <- 8086/a0e9
1577 07:04:58.434728 PCI: 00:15.1 cmd <- 02
1578 07:04:58.438170 PCI: 00:15.2 subsystem <- 8086/a0ea
1579 07:04:58.438265 PCI: 00:15.2 cmd <- 02
1580 07:04:58.444838 PCI: 00:15.3 subsystem <- 8086/a0eb
1581 07:04:58.444931 PCI: 00:15.3 cmd <- 02
1582 07:04:58.448148 PCI: 00:16.0 subsystem <- 8086/a0e0
1583 07:04:58.451410 PCI: 00:16.0 cmd <- 02
1584 07:04:58.454618 PCI: 00:19.1 subsystem <- 8086/a0c6
1585 07:04:58.457941 PCI: 00:19.1 cmd <- 02
1586 07:04:58.461348 PCI: 00:1d.0 bridge ctrl <- 0013
1587 07:04:58.464795 PCI: 00:1d.0 subsystem <- 8086/a0b0
1588 07:04:58.468260 PCI: 00:1d.0 cmd <- 06
1589 07:04:58.471222 PCI: 00:1e.0 subsystem <- 8086/a0a8
1590 07:04:58.474592 PCI: 00:1e.0 cmd <- 06
1591 07:04:58.477831 PCI: 00:1e.2 subsystem <- 8086/a0aa
1592 07:04:58.481233 PCI: 00:1e.2 cmd <- 06
1593 07:04:58.484695 PCI: 00:1e.3 subsystem <- 8086/a0ab
1594 07:04:58.487707 PCI: 00:1e.3 cmd <- 02
1595 07:04:58.491037 PCI: 00:1f.0 subsystem <- 8086/a087
1596 07:04:58.491138 PCI: 00:1f.0 cmd <- 407
1597 07:04:58.498112 PCI: 00:1f.3 subsystem <- 8086/a0c8
1598 07:04:58.498221 PCI: 00:1f.3 cmd <- 02
1599 07:04:58.501077 PCI: 00:1f.5 subsystem <- 8086/a0a4
1600 07:04:58.504539 PCI: 00:1f.5 cmd <- 406
1601 07:04:58.509331 PCI: 01:00.0 cmd <- 02
1602 07:04:58.514055 done.
1603 07:04:58.517174 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1604 07:04:58.520745 Initializing devices...
1605 07:04:58.523853 Root Device init
1606 07:04:58.527150 Chrome EC: Set SMI mask to 0x0000000000000000
1607 07:04:58.534046 Chrome EC: clear events_b mask to 0x0000000000000000
1608 07:04:58.540920 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1609 07:04:58.547517 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1610 07:04:58.554093 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1611 07:04:58.557366 Chrome EC: Set WAKE mask to 0x0000000000000000
1612 07:04:58.564904 fw_config match found: DB_USB=USB3_ACTIVE
1613 07:04:58.567838 Configure Right Type-C port orientation for retimer
1614 07:04:58.571211 Root Device init finished in 45 msecs
1615 07:04:58.575306 PCI: 00:00.0 init
1616 07:04:58.578636 CPU TDP = 9 Watts
1617 07:04:58.578739 CPU PL1 = 9 Watts
1618 07:04:58.581932 CPU PL2 = 40 Watts
1619 07:04:58.585246 CPU PL4 = 83 Watts
1620 07:04:58.588594 PCI: 00:00.0 init finished in 8 msecs
1621 07:04:58.588683 PCI: 00:02.0 init
1622 07:04:58.592016 GMA: Found VBT in CBFS
1623 07:04:58.595466 GMA: Found valid VBT in CBFS
1624 07:04:58.601895 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1625 07:04:58.608646 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1626 07:04:58.611694 PCI: 00:02.0 init finished in 18 msecs
1627 07:04:58.615019 PCI: 00:05.0 init
1628 07:04:58.618375 PCI: 00:05.0 init finished in 0 msecs
1629 07:04:58.621661 PCI: 00:08.0 init
1630 07:04:58.625174 PCI: 00:08.0 init finished in 0 msecs
1631 07:04:58.628230 PCI: 00:14.0 init
1632 07:04:58.631819 PCI: 00:14.0 init finished in 0 msecs
1633 07:04:58.635171 PCI: 00:14.2 init
1634 07:04:58.638521 PCI: 00:14.2 init finished in 0 msecs
1635 07:04:58.641628 PCI: 00:15.0 init
1636 07:04:58.645038 I2C bus 0 version 0x3230302a
1637 07:04:58.648384 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1638 07:04:58.651735 PCI: 00:15.0 init finished in 6 msecs
1639 07:04:58.651830 PCI: 00:15.1 init
1640 07:04:58.655030 I2C bus 1 version 0x3230302a
1641 07:04:58.658203 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1642 07:04:58.664671 PCI: 00:15.1 init finished in 6 msecs
1643 07:04:58.664770 PCI: 00:15.2 init
1644 07:04:58.668071 I2C bus 2 version 0x3230302a
1645 07:04:58.671505 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1646 07:04:58.674757 PCI: 00:15.2 init finished in 6 msecs
1647 07:04:58.678015 PCI: 00:15.3 init
1648 07:04:58.681490 I2C bus 3 version 0x3230302a
1649 07:04:58.684757 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1650 07:04:58.688174 PCI: 00:15.3 init finished in 6 msecs
1651 07:04:58.691530 PCI: 00:16.0 init
1652 07:04:58.694566 PCI: 00:16.0 init finished in 0 msecs
1653 07:04:58.697966 PCI: 00:19.1 init
1654 07:04:58.701379 I2C bus 5 version 0x3230302a
1655 07:04:58.704477 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1656 07:04:58.707817 PCI: 00:19.1 init finished in 6 msecs
1657 07:04:58.711168 PCI: 00:1d.0 init
1658 07:04:58.711253 Initializing PCH PCIe bridge.
1659 07:04:58.717847 PCI: 00:1d.0 init finished in 3 msecs
1660 07:04:58.721190 PCI: 00:1f.0 init
1661 07:04:58.724499 IOAPIC: Initializing IOAPIC at 0xfec00000
1662 07:04:58.727880 IOAPIC: Bootstrap Processor Local APIC = 0x00
1663 07:04:58.731139 IOAPIC: ID = 0x02
1664 07:04:58.734541 IOAPIC: Dumping registers
1665 07:04:58.734636 reg 0x0000: 0x02000000
1666 07:04:58.737912 reg 0x0001: 0x00770020
1667 07:04:58.741285 reg 0x0002: 0x00000000
1668 07:04:58.744663 PCI: 00:1f.0 init finished in 21 msecs
1669 07:04:58.747869 PCI: 00:1f.2 init
1670 07:04:58.751552 Disabling ACPI via APMC.
1671 07:04:58.751644 APMC done.
1672 07:04:58.754528 PCI: 00:1f.2 init finished in 5 msecs
1673 07:04:58.768095 PCI: 01:00.0 init
1674 07:04:58.771154 PCI: 01:00.0 init finished in 0 msecs
1675 07:04:58.774530 PNP: 0c09.0 init
1676 07:04:58.781398 Google Chrome EC uptime: 8.417 seconds
1677 07:04:58.784710 Google Chrome AP resets since EC boot: 1
1678 07:04:58.788021 Google Chrome most recent AP reset causes:
1679 07:04:58.791100 0.347: 32775 shutdown: entering G3
1680 07:04:58.797954 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1681 07:04:58.801249 PNP: 0c09.0 init finished in 23 msecs
1682 07:04:58.807700 Devices initialized
1683 07:04:58.811072 Show all devs... After init.
1684 07:04:58.814303 Root Device: enabled 1
1685 07:04:58.814394 DOMAIN: 0000: enabled 1
1686 07:04:58.817588 CPU_CLUSTER: 0: enabled 1
1687 07:04:58.820635 PCI: 00:00.0: enabled 1
1688 07:04:58.824266 PCI: 00:02.0: enabled 1
1689 07:04:58.824346 PCI: 00:04.0: enabled 1
1690 07:04:58.827324 PCI: 00:05.0: enabled 1
1691 07:04:58.830785 PCI: 00:06.0: enabled 0
1692 07:04:58.834122 PCI: 00:07.0: enabled 0
1693 07:04:58.834210 PCI: 00:07.1: enabled 0
1694 07:04:58.837363 PCI: 00:07.2: enabled 0
1695 07:04:58.840778 PCI: 00:07.3: enabled 0
1696 07:04:58.844103 PCI: 00:08.0: enabled 1
1697 07:04:58.844183 PCI: 00:09.0: enabled 0
1698 07:04:58.847469 PCI: 00:0a.0: enabled 0
1699 07:04:58.850639 PCI: 00:0d.0: enabled 1
1700 07:04:58.854002 PCI: 00:0d.1: enabled 0
1701 07:04:58.854104 PCI: 00:0d.2: enabled 0
1702 07:04:58.857488 PCI: 00:0d.3: enabled 0
1703 07:04:58.860555 PCI: 00:0e.0: enabled 0
1704 07:04:58.860647 PCI: 00:10.2: enabled 1
1705 07:04:58.863870 PCI: 00:10.6: enabled 0
1706 07:04:58.867424 PCI: 00:10.7: enabled 0
1707 07:04:58.870549 PCI: 00:12.0: enabled 0
1708 07:04:58.870636 PCI: 00:12.6: enabled 0
1709 07:04:58.873971 PCI: 00:13.0: enabled 0
1710 07:04:58.877326 PCI: 00:14.0: enabled 1
1711 07:04:58.880521 PCI: 00:14.1: enabled 0
1712 07:04:58.880608 PCI: 00:14.2: enabled 1
1713 07:04:58.883919 PCI: 00:14.3: enabled 1
1714 07:04:58.887095 PCI: 00:15.0: enabled 1
1715 07:04:58.890362 PCI: 00:15.1: enabled 1
1716 07:04:58.890453 PCI: 00:15.2: enabled 1
1717 07:04:58.893917 PCI: 00:15.3: enabled 1
1718 07:04:58.897183 PCI: 00:16.0: enabled 1
1719 07:04:58.897273 PCI: 00:16.1: enabled 0
1720 07:04:58.900626 PCI: 00:16.2: enabled 0
1721 07:04:58.903610 PCI: 00:16.3: enabled 0
1722 07:04:58.907143 PCI: 00:16.4: enabled 0
1723 07:04:58.907227 PCI: 00:16.5: enabled 0
1724 07:04:58.910201 PCI: 00:17.0: enabled 0
1725 07:04:58.913601 PCI: 00:19.0: enabled 0
1726 07:04:58.916991 PCI: 00:19.1: enabled 1
1727 07:04:58.917080 PCI: 00:19.2: enabled 0
1728 07:04:58.920462 PCI: 00:1c.0: enabled 1
1729 07:04:58.923596 PCI: 00:1c.1: enabled 0
1730 07:04:58.926873 PCI: 00:1c.2: enabled 0
1731 07:04:58.926965 PCI: 00:1c.3: enabled 0
1732 07:04:58.930506 PCI: 00:1c.4: enabled 0
1733 07:04:58.933551 PCI: 00:1c.5: enabled 0
1734 07:04:58.936897 PCI: 00:1c.6: enabled 1
1735 07:04:58.936988 PCI: 00:1c.7: enabled 0
1736 07:04:58.940200 PCI: 00:1d.0: enabled 1
1737 07:04:58.943643 PCI: 00:1d.1: enabled 0
1738 07:04:58.943734 PCI: 00:1d.2: enabled 1
1739 07:04:58.946990 PCI: 00:1d.3: enabled 0
1740 07:04:58.950368 PCI: 00:1e.0: enabled 1
1741 07:04:58.953714 PCI: 00:1e.1: enabled 0
1742 07:04:58.953804 PCI: 00:1e.2: enabled 1
1743 07:04:58.956751 PCI: 00:1e.3: enabled 1
1744 07:04:58.960095 PCI: 00:1f.0: enabled 1
1745 07:04:58.963476 PCI: 00:1f.1: enabled 0
1746 07:04:58.963566 PCI: 00:1f.2: enabled 1
1747 07:04:58.967085 PCI: 00:1f.3: enabled 1
1748 07:04:58.970135 PCI: 00:1f.4: enabled 0
1749 07:04:58.973524 PCI: 00:1f.5: enabled 1
1750 07:04:58.973613 PCI: 00:1f.6: enabled 0
1751 07:04:58.977006 PCI: 00:1f.7: enabled 0
1752 07:04:58.980036 APIC: 00: enabled 1
1753 07:04:58.980126 GENERIC: 0.0: enabled 1
1754 07:04:58.983453 GENERIC: 0.0: enabled 1
1755 07:04:58.986863 GENERIC: 1.0: enabled 1
1756 07:04:58.990073 GENERIC: 0.0: enabled 1
1757 07:04:58.990167 GENERIC: 1.0: enabled 1
1758 07:04:58.993352 USB0 port 0: enabled 1
1759 07:04:58.996740 GENERIC: 0.0: enabled 1
1760 07:04:58.996835 USB0 port 0: enabled 1
1761 07:04:58.999956 GENERIC: 0.0: enabled 1
1762 07:04:59.003315 I2C: 00:1a: enabled 1
1763 07:04:59.006807 I2C: 00:31: enabled 1
1764 07:04:59.006901 I2C: 00:32: enabled 1
1765 07:04:59.010057 I2C: 00:10: enabled 1
1766 07:04:59.013565 I2C: 00:15: enabled 1
1767 07:04:59.013655 GENERIC: 0.0: enabled 0
1768 07:04:59.016645 GENERIC: 1.0: enabled 0
1769 07:04:59.019977 GENERIC: 0.0: enabled 1
1770 07:04:59.020067 SPI: 00: enabled 1
1771 07:04:59.023258 SPI: 00: enabled 1
1772 07:04:59.026678 PNP: 0c09.0: enabled 1
1773 07:04:59.026768 GENERIC: 0.0: enabled 1
1774 07:04:59.029895 USB3 port 0: enabled 1
1775 07:04:59.033331 USB3 port 1: enabled 1
1776 07:04:59.036778 USB3 port 2: enabled 0
1777 07:04:59.036868 USB3 port 3: enabled 0
1778 07:04:59.039690 USB2 port 0: enabled 0
1779 07:04:59.043013 USB2 port 1: enabled 1
1780 07:04:59.043104 USB2 port 2: enabled 1
1781 07:04:59.046478 USB2 port 3: enabled 0
1782 07:04:59.049853 USB2 port 4: enabled 1
1783 07:04:59.049943 USB2 port 5: enabled 0
1784 07:04:59.053174 USB2 port 6: enabled 0
1785 07:04:59.056550 USB2 port 7: enabled 0
1786 07:04:59.059787 USB2 port 8: enabled 0
1787 07:04:59.059889 USB2 port 9: enabled 0
1788 07:04:59.063296 USB3 port 0: enabled 0
1789 07:04:59.066484 USB3 port 1: enabled 1
1790 07:04:59.066581 USB3 port 2: enabled 0
1791 07:04:59.069811 USB3 port 3: enabled 0
1792 07:04:59.073213 GENERIC: 0.0: enabled 1
1793 07:04:59.076369 GENERIC: 1.0: enabled 1
1794 07:04:59.076460 APIC: 01: enabled 1
1795 07:04:59.079829 APIC: 03: enabled 1
1796 07:04:59.079919 APIC: 05: enabled 1
1797 07:04:59.082927 APIC: 07: enabled 1
1798 07:04:59.086263 APIC: 06: enabled 1
1799 07:04:59.086353 APIC: 02: enabled 1
1800 07:04:59.089544 APIC: 04: enabled 1
1801 07:04:59.092903 PCI: 01:00.0: enabled 1
1802 07:04:59.096313 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1803 07:04:59.103081 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1804 07:04:59.106134 ELOG: NV offset 0xf30000 size 0x1000
1805 07:04:59.112965 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1806 07:04:59.119645 ELOG: Event(17) added with size 13 at 2023-02-07 07:04:59 UTC
1807 07:04:59.125958 ELOG: Event(92) added with size 9 at 2023-02-07 07:04:59 UTC
1808 07:04:59.132470 ELOG: Event(93) added with size 9 at 2023-02-07 07:04:59 UTC
1809 07:04:59.139266 ELOG: Event(9E) added with size 10 at 2023-02-07 07:04:59 UTC
1810 07:04:59.145966 ELOG: Event(9F) added with size 14 at 2023-02-07 07:04:59 UTC
1811 07:04:59.152511 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1812 07:04:59.155908 ELOG: Event(A1) added with size 10 at 2023-02-07 07:04:59 UTC
1813 07:04:59.162636 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1814 07:04:59.169257 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1815 07:04:59.172358 Finalize devices...
1816 07:04:59.172451 Devices finalized
1817 07:04:59.179155 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1818 07:04:59.185674 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1819 07:04:59.189054 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1820 07:04:59.195443 ME: HFSTS1 : 0x80030055
1821 07:04:59.198923 ME: HFSTS2 : 0x30280116
1822 07:04:59.202047 ME: HFSTS3 : 0x00000050
1823 07:04:59.208726 ME: HFSTS4 : 0x00004000
1824 07:04:59.212084 ME: HFSTS5 : 0x00000000
1825 07:04:59.215639 ME: HFSTS6 : 0x00400006
1826 07:04:59.221947 ME: Manufacturing Mode : YES
1827 07:04:59.225382 ME: SPI Protection Mode Enabled : NO
1828 07:04:59.228697 ME: FW Partition Table : OK
1829 07:04:59.231921 ME: Bringup Loader Failure : NO
1830 07:04:59.235228 ME: Firmware Init Complete : NO
1831 07:04:59.238671 ME: Boot Options Present : NO
1832 07:04:59.242077 ME: Update In Progress : NO
1833 07:04:59.245078 ME: D0i3 Support : YES
1834 07:04:59.251932 ME: Low Power State Enabled : NO
1835 07:04:59.255252 ME: CPU Replaced : YES
1836 07:04:59.258599 ME: CPU Replacement Valid : YES
1837 07:04:59.261902 ME: Current Working State : 5
1838 07:04:59.265256 ME: Current Operation State : 1
1839 07:04:59.268495 ME: Current Operation Mode : 3
1840 07:04:59.271654 ME: Error Code : 0
1841 07:04:59.274984 ME: Enhanced Debug Mode : NO
1842 07:04:59.278303 ME: CPU Debug Disabled : YES
1843 07:04:59.285035 ME: TXT Support : NO
1844 07:04:59.288232 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1845 07:04:59.298275 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1846 07:04:59.301726 CBFS: 'fallback/slic' not found.
1847 07:04:59.304847 ACPI: Writing ACPI tables at 76b01000.
1848 07:04:59.304935 ACPI: * FACS
1849 07:04:59.308039 ACPI: * DSDT
1850 07:04:59.311719 Ramoops buffer: 0x100000@0x76a00000.
1851 07:04:59.314744 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1852 07:04:59.321341 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1853 07:04:59.324695 Google Chrome EC: version:
1854 07:04:59.327991 ro: voema_v2.0.7540-147f8d37d1
1855 07:04:59.331318 rw: voema_v2.0.7540-147f8d37d1
1856 07:04:59.331413 running image: 2
1857 07:04:59.337891 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1858 07:04:59.343168 ACPI: * FADT
1859 07:04:59.343251 SCI is IRQ9
1860 07:04:59.350029 ACPI: added table 1/32, length now 40
1861 07:04:59.350137 ACPI: * SSDT
1862 07:04:59.353088 Found 1 CPU(s) with 8 core(s) each.
1863 07:04:59.359821 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1864 07:04:59.363173 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1865 07:04:59.366357 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1866 07:04:59.369637 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1867 07:04:59.376579 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1868 07:04:59.383050 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1869 07:04:59.386489 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1870 07:04:59.392958 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1871 07:04:59.399836 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1872 07:04:59.403114 \_SB.PCI0.RP09: Added StorageD3Enable property
1873 07:04:59.406471 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1874 07:04:59.413040 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1875 07:04:59.419578 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1876 07:04:59.422732 PS2K: Passing 80 keymaps to kernel
1877 07:04:59.429419 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1878 07:04:59.436010 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1879 07:04:59.442765 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1880 07:04:59.449384 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1881 07:04:59.456050 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1882 07:04:59.462782 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1883 07:04:59.469495 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1884 07:04:59.475848 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 07:04:59.479062 ACPI: added table 2/32, length now 44
1886 07:04:59.479150 ACPI: * MCFG
1887 07:04:59.482424 ACPI: added table 3/32, length now 48
1888 07:04:59.485886 ACPI: * TPM2
1889 07:04:59.489020 TPM2 log created at 0x769f0000
1890 07:04:59.492395 ACPI: added table 4/32, length now 52
1891 07:04:59.492489 ACPI: * MADT
1892 07:04:59.495721 SCI is IRQ9
1893 07:04:59.499140 ACPI: added table 5/32, length now 56
1894 07:04:59.502726 current = 76b09850
1895 07:04:59.502845 ACPI: * DMAR
1896 07:04:59.506024 ACPI: added table 6/32, length now 60
1897 07:04:59.509071 ACPI: added table 7/32, length now 64
1898 07:04:59.512496 ACPI: * HPET
1899 07:04:59.515804 ACPI: added table 8/32, length now 68
1900 07:04:59.515887 ACPI: done.
1901 07:04:59.518900 ACPI tables: 35216 bytes.
1902 07:04:59.522504 smbios_write_tables: 769ef000
1903 07:04:59.525612 EC returned error result code 3
1904 07:04:59.528966 Couldn't obtain OEM name from CBI
1905 07:04:59.532270 Create SMBIOS type 16
1906 07:04:59.535626 Create SMBIOS type 17
1907 07:04:59.538792 GENERIC: 0.0 (WIFI Device)
1908 07:04:59.538879 SMBIOS tables: 1750 bytes.
1909 07:04:59.545587 Writing table forward entry at 0x00000500
1910 07:04:59.552132 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 07:04:59.555713 Writing coreboot table at 0x76b25000
1912 07:04:59.558737 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 07:04:59.565386 1. 0000000000001000-000000000009ffff: RAM
1914 07:04:59.568812 2. 00000000000a0000-00000000000fffff: RESERVED
1915 07:04:59.575430 3. 0000000000100000-00000000769eefff: RAM
1916 07:04:59.578679 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 07:04:59.585343 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 07:04:59.591883 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 07:04:59.595344 7. 0000000077000000-000000007fbfffff: RESERVED
1920 07:04:59.598870 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 07:04:59.605452 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 07:04:59.608615 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 07:04:59.615427 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 07:04:59.618787 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 07:04:59.625258 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 07:04:59.628693 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 07:04:59.635262 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 07:04:59.638562 16. 0000000100000000-00000002803fffff: RAM
1929 07:04:59.641697 Passing 4 GPIOs to payload:
1930 07:04:59.645044 NAME | PORT | POLARITY | VALUE
1931 07:04:59.651860 lid | undefined | high | high
1932 07:04:59.655134 power | undefined | high | low
1933 07:04:59.661605 oprom | undefined | high | low
1934 07:04:59.668140 EC in RW | 0x000000e5 | high | high
1935 07:04:59.674729 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum d288
1936 07:04:59.674856 coreboot table: 1576 bytes.
1937 07:04:59.681663 IMD ROOT 0. 0x76fff000 0x00001000
1938 07:04:59.685053 IMD SMALL 1. 0x76ffe000 0x00001000
1939 07:04:59.688065 FSP MEMORY 2. 0x76c4e000 0x003b0000
1940 07:04:59.691587 VPD 3. 0x76c4d000 0x00000367
1941 07:04:59.694892 RO MCACHE 4. 0x76c4c000 0x00000fdc
1942 07:04:59.698254 CONSOLE 5. 0x76c2c000 0x00020000
1943 07:04:59.701290 FMAP 6. 0x76c2b000 0x00000578
1944 07:04:59.704953 TIME STAMP 7. 0x76c2a000 0x00000910
1945 07:04:59.707923 VBOOT WORK 8. 0x76c16000 0x00014000
1946 07:04:59.714675 ROMSTG STCK 9. 0x76c15000 0x00001000
1947 07:04:59.718098 AFTER CAR 10. 0x76c0a000 0x0000b000
1948 07:04:59.721587 RAMSTAGE 11. 0x76b97000 0x00073000
1949 07:04:59.725045 REFCODE 12. 0x76b42000 0x00055000
1950 07:04:59.728068 SMM BACKUP 13. 0x76b32000 0x00010000
1951 07:04:59.731548 4f444749 14. 0x76b30000 0x00002000
1952 07:04:59.734812 EXT VBT15. 0x76b2d000 0x0000219f
1953 07:04:59.738113 COREBOOT 16. 0x76b25000 0x00008000
1954 07:04:59.741514 ACPI 17. 0x76b01000 0x00024000
1955 07:04:59.748067 ACPI GNVS 18. 0x76b00000 0x00001000
1956 07:04:59.751365 RAMOOPS 19. 0x76a00000 0x00100000
1957 07:04:59.754769 TPM2 TCGLOG20. 0x769f0000 0x00010000
1958 07:04:59.757935 SMBIOS 21. 0x769ef000 0x00000800
1959 07:04:59.758014 IMD small region:
1960 07:04:59.764709 IMD ROOT 0. 0x76ffec00 0x00000400
1961 07:04:59.768136 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1962 07:04:59.771562 POWER STATE 2. 0x76ffeb80 0x00000044
1963 07:04:59.774893 ROMSTAGE 3. 0x76ffeb60 0x00000004
1964 07:04:59.778084 MEM INFO 4. 0x76ffe980 0x000001e0
1965 07:04:59.784679 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1966 07:04:59.788094 MTRR: Physical address space:
1967 07:04:59.794864 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1968 07:04:59.801532 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1969 07:04:59.808106 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1970 07:04:59.814701 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1971 07:04:59.817815 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1972 07:04:59.824626 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1973 07:04:59.831110 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1974 07:04:59.834508 MTRR: Fixed MSR 0x250 0x0606060606060606
1975 07:04:59.841142 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 07:04:59.844405 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 07:04:59.847620 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 07:04:59.851043 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 07:04:59.857692 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 07:04:59.861029 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 07:04:59.864426 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 07:04:59.867750 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 07:04:59.874372 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 07:04:59.877850 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 07:04:59.880891 call enable_fixed_mtrr()
1986 07:04:59.884513 CPU physical address size: 39 bits
1987 07:04:59.887802 MTRR: default type WB/UC MTRR counts: 6/6.
1988 07:04:59.891221 MTRR: UC selected as default type.
1989 07:04:59.897721 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1990 07:04:59.904290 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1991 07:04:59.911008 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1992 07:04:59.917694 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1993 07:04:59.924326 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1994 07:04:59.930711 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1995 07:04:59.930881
1996 07:04:59.930956 MTRR check
1997 07:04:59.934093 Fixed MTRRs : Enabled
1998 07:04:59.937559 Variable MTRRs: Enabled
1999 07:04:59.937665
2000 07:04:59.940739 MTRR: Fixed MSR 0x250 0x0606060606060606
2001 07:04:59.944109 MTRR: Fixed MSR 0x258 0x0606060606060606
2002 07:04:59.950663 MTRR: Fixed MSR 0x259 0x0000000000000000
2003 07:04:59.953815 MTRR: Fixed MSR 0x268 0x0606060606060606
2004 07:04:59.957241 MTRR: Fixed MSR 0x269 0x0606060606060606
2005 07:04:59.960606 MTRR: Fixed MSR 0x26a 0x0606060606060606
2006 07:04:59.967434 MTRR: Fixed MSR 0x26b 0x0606060606060606
2007 07:04:59.970720 MTRR: Fixed MSR 0x26c 0x0606060606060606
2008 07:04:59.974025 MTRR: Fixed MSR 0x26d 0x0606060606060606
2009 07:04:59.977353 MTRR: Fixed MSR 0x26e 0x0606060606060606
2010 07:04:59.983781 MTRR: Fixed MSR 0x26f 0x0606060606060606
2011 07:04:59.990431 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2012 07:04:59.990540 call enable_fixed_mtrr()
2013 07:04:59.997520 Checking cr50 for pending updates
2014 07:04:59.997620 CPU physical address size: 39 bits
2015 07:05:00.004311 MTRR: Fixed MSR 0x250 0x0606060606060606
2016 07:05:00.007660 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 07:05:00.010862 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 07:05:00.013941 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 07:05:00.020999 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 07:05:00.024064 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 07:05:00.027410 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 07:05:00.030889 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 07:05:00.037218 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 07:05:00.040680 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 07:05:00.043943 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 07:05:00.047207 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 07:05:00.054684 MTRR: Fixed MSR 0x258 0x0606060606060606
2028 07:05:00.054798 call enable_fixed_mtrr()
2029 07:05:00.061075 MTRR: Fixed MSR 0x259 0x0000000000000000
2030 07:05:00.064375 MTRR: Fixed MSR 0x268 0x0606060606060606
2031 07:05:00.067617 MTRR: Fixed MSR 0x269 0x0606060606060606
2032 07:05:00.071046 MTRR: Fixed MSR 0x26a 0x0606060606060606
2033 07:05:00.077824 MTRR: Fixed MSR 0x26b 0x0606060606060606
2034 07:05:00.080865 MTRR: Fixed MSR 0x26c 0x0606060606060606
2035 07:05:00.084379 MTRR: Fixed MSR 0x26d 0x0606060606060606
2036 07:05:00.087594 MTRR: Fixed MSR 0x26e 0x0606060606060606
2037 07:05:00.094124 MTRR: Fixed MSR 0x26f 0x0606060606060606
2038 07:05:00.097563 CPU physical address size: 39 bits
2039 07:05:00.100919 call enable_fixed_mtrr()
2040 07:05:00.104764 Reading cr50 TPM mode
2041 07:05:00.108490 CPU physical address size: 39 bits
2042 07:05:00.111696 MTRR: Fixed MSR 0x250 0x0606060606060606
2043 07:05:00.114930 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 07:05:00.118062 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 07:05:00.121458 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 07:05:00.127996 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 07:05:00.131400 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 07:05:00.134913 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 07:05:00.138047 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 07:05:00.144812 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 07:05:00.148219 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 07:05:00.151516 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 07:05:00.154864 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 07:05:00.162236 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 07:05:00.162347 call enable_fixed_mtrr()
2056 07:05:00.168887 MTRR: Fixed MSR 0x259 0x0000000000000000
2057 07:05:00.172255 MTRR: Fixed MSR 0x268 0x0606060606060606
2058 07:05:00.175529 MTRR: Fixed MSR 0x269 0x0606060606060606
2059 07:05:00.178832 MTRR: Fixed MSR 0x26a 0x0606060606060606
2060 07:05:00.185546 MTRR: Fixed MSR 0x26b 0x0606060606060606
2061 07:05:00.188808 MTRR: Fixed MSR 0x26c 0x0606060606060606
2062 07:05:00.192081 MTRR: Fixed MSR 0x26d 0x0606060606060606
2063 07:05:00.195372 MTRR: Fixed MSR 0x26e 0x0606060606060606
2064 07:05:00.201817 MTRR: Fixed MSR 0x26f 0x0606060606060606
2065 07:05:00.205279 CPU physical address size: 39 bits
2066 07:05:00.208340 call enable_fixed_mtrr()
2067 07:05:00.211755 MTRR: Fixed MSR 0x250 0x0606060606060606
2068 07:05:00.215288 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 07:05:00.221595 MTRR: Fixed MSR 0x258 0x0606060606060606
2070 07:05:00.224988 MTRR: Fixed MSR 0x259 0x0000000000000000
2071 07:05:00.228540 MTRR: Fixed MSR 0x268 0x0606060606060606
2072 07:05:00.231850 MTRR: Fixed MSR 0x269 0x0606060606060606
2073 07:05:00.238260 MTRR: Fixed MSR 0x26a 0x0606060606060606
2074 07:05:00.241684 MTRR: Fixed MSR 0x26b 0x0606060606060606
2075 07:05:00.245068 MTRR: Fixed MSR 0x26c 0x0606060606060606
2076 07:05:00.248389 MTRR: Fixed MSR 0x26d 0x0606060606060606
2077 07:05:00.254932 MTRR: Fixed MSR 0x26e 0x0606060606060606
2078 07:05:00.258256 MTRR: Fixed MSR 0x26f 0x0606060606060606
2079 07:05:00.261687 MTRR: Fixed MSR 0x258 0x0606060606060606
2080 07:05:00.264704 call enable_fixed_mtrr()
2081 07:05:00.268013 MTRR: Fixed MSR 0x259 0x0000000000000000
2082 07:05:00.274876 MTRR: Fixed MSR 0x268 0x0606060606060606
2083 07:05:00.278009 MTRR: Fixed MSR 0x269 0x0606060606060606
2084 07:05:00.281323 MTRR: Fixed MSR 0x26a 0x0606060606060606
2085 07:05:00.284726 MTRR: Fixed MSR 0x26b 0x0606060606060606
2086 07:05:00.291436 MTRR: Fixed MSR 0x26c 0x0606060606060606
2087 07:05:00.294654 MTRR: Fixed MSR 0x26d 0x0606060606060606
2088 07:05:00.297995 MTRR: Fixed MSR 0x26e 0x0606060606060606
2089 07:05:00.301399 MTRR: Fixed MSR 0x26f 0x0606060606060606
2090 07:05:00.305223 CPU physical address size: 39 bits
2091 07:05:00.311723 call enable_fixed_mtrr()
2092 07:05:00.315015 BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 6 ms
2093 07:05:00.318385 CPU physical address size: 39 bits
2094 07:05:00.324839 CPU physical address size: 39 bits
2095 07:05:00.331699 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2096 07:05:00.335097 Checking segment from ROM address 0xffc02b38
2097 07:05:00.341817 Checking segment from ROM address 0xffc02b54
2098 07:05:00.345112 Loading segment from ROM address 0xffc02b38
2099 07:05:00.348576 code (compression=0)
2100 07:05:00.355123 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2101 07:05:00.365061 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2102 07:05:00.365207 it's not compressed!
2103 07:05:00.504989 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2104 07:05:00.511608 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2105 07:05:00.518442 Loading segment from ROM address 0xffc02b54
2106 07:05:00.518548 Entry Point 0x30000000
2107 07:05:00.521751 Loaded segments
2108 07:05:00.528497 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2109 07:05:00.571571 Finalizing chipset.
2110 07:05:00.574926 Finalizing SMM.
2111 07:05:00.575015 APMC done.
2112 07:05:00.581299 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2113 07:05:00.584755 mp_park_aps done after 0 msecs.
2114 07:05:00.587834 Jumping to boot code at 0x30000000(0x76b25000)
2115 07:05:00.597779 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2116 07:05:00.597899
2117 07:05:00.597994
2118 07:05:00.598064
2119 07:05:00.601105 Starting depthcharge on Voema...
2120 07:05:00.601192
2121 07:05:00.601556 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2122 07:05:00.601662 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2123 07:05:00.601766 Setting prompt string to ['volteer:']
2124 07:05:00.601850 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2125 07:05:00.611091 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2126 07:05:00.611200
2127 07:05:00.617710 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2128 07:05:00.617804
2129 07:05:00.621119 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2130 07:05:00.624347
2131 07:05:00.627804 Failed to find eMMC card reader
2132 07:05:00.627899
2133 07:05:00.627981 Wipe memory regions:
2134 07:05:00.628049
2135 07:05:00.634192 [0x00000000001000, 0x000000000a0000)
2136 07:05:00.634316
2137 07:05:00.637562 [0x00000000100000, 0x00000030000000)
2138 07:05:00.663102
2139 07:05:00.666025 [0x00000032662db0, 0x000000769ef000)
2140 07:05:00.702260
2141 07:05:00.705455 [0x00000100000000, 0x00000280400000)
2142 07:05:00.908285
2143 07:05:00.911692 ec_init: CrosEC protocol v3 supported (256, 256)
2144 07:05:00.911786
2145 07:05:00.918239 update_port_state: port C0 state: usb enable 1 mux conn 0
2146 07:05:00.918329
2147 07:05:00.928281 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2148 07:05:00.928370
2149 07:05:00.934650 pmc_check_ipc_sts: STS_BUSY done after 2216 us
2150 07:05:00.934738
2151 07:05:00.938011 send_conn_disc_msg: pmc_send_cmd succeeded
2152 07:05:01.370782
2153 07:05:01.370937 R8152: Initializing
2154 07:05:01.371040
2155 07:05:01.373671 Version 6 (ocp_data = 5c30)
2156 07:05:01.373834
2157 07:05:01.376999 R8152: Done initializing
2158 07:05:01.377090
2159 07:05:01.380339 Adding net device
2160 07:05:01.682078
2161 07:05:01.685325 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2162 07:05:01.685426
2163 07:05:01.685495
2164 07:05:01.685566
2165 07:05:01.688547 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2167 07:05:01.789292 volteer: tftpboot 192.168.201.1 9045479/tftp-deploy-i73jg55n/kernel/bzImage 9045479/tftp-deploy-i73jg55n/kernel/cmdline 9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
2168 07:05:01.789471 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2169 07:05:01.789585 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2170 07:05:01.793378 tftpboot 192.168.201.1 9045479/tftp-deploy-i73jg55n/kernel/bzImoy-i73jg55n/kernel/cmdline 9045479/tftp-deploy-i73jg55n/ramdisk/ramdisk.cpio.gz
2171 07:05:01.793553
2172 07:05:01.793626 Waiting for link
2173 07:05:01.996770
2174 07:05:01.996958 done.
2175 07:05:01.997032
2176 07:05:01.997107 MAC: 00:24:32:30:7c:e4
2177 07:05:01.997169
2178 07:05:02.000116 Sending DHCP discover... done.
2179 07:05:02.000197
2180 07:05:02.003337 Waiting for reply... done.
2181 07:05:02.003459
2182 07:05:02.006907 Sending DHCP request... done.
2183 07:05:02.007035
2184 07:05:02.009808 Waiting for reply... done.
2185 07:05:02.009908
2186 07:05:02.013093 My ip is 192.168.201.23
2187 07:05:02.013193
2188 07:05:02.016477 The DHCP server ip is 192.168.201.1
2189 07:05:02.016589
2190 07:05:02.022958 TFTP server IP predefined by user: 192.168.201.1
2191 07:05:02.023111
2192 07:05:02.029697 Bootfile predefined by user: 9045479/tftp-deploy-i73jg55n/kernel/bzImage
2193 07:05:02.029878
2194 07:05:02.033030 Sending tftp read request... done.
2195 07:05:02.033184
2196 07:05:02.036005 Waiting for the transfer...
2197 07:05:02.036115
2198 07:05:02.570807 00000000 ################################################################
2199 07:05:02.570949
2200 07:05:03.107903 00080000 ################################################################
2201 07:05:03.108067
2202 07:05:03.648361 00100000 ################################################################
2203 07:05:03.648498
2204 07:05:04.192101 00180000 ################################################################
2205 07:05:04.192241
2206 07:05:04.735707 00200000 ################################################################
2207 07:05:04.735856
2208 07:05:05.258257 00280000 ################################################################
2209 07:05:05.258393
2210 07:05:05.780870 00300000 ################################################################
2211 07:05:05.781013
2212 07:05:06.315885 00380000 ################################################################
2213 07:05:06.316022
2214 07:05:06.861793 00400000 ################################################################
2215 07:05:06.861940
2216 07:05:07.402142 00480000 ################################################################
2217 07:05:07.402283
2218 07:05:07.940466 00500000 ################################################################
2219 07:05:07.940600
2220 07:05:08.492822 00580000 ################################################################
2221 07:05:08.492963
2222 07:05:09.034077 00600000 ################################################################
2223 07:05:09.034217
2224 07:05:09.575976 00680000 ################################################################
2225 07:05:09.576114
2226 07:05:09.814654 00700000 ############################# done.
2227 07:05:09.814795
2228 07:05:09.817773 The bootfile was 7573392 bytes long.
2229 07:05:09.817860
2230 07:05:09.821005 Sending tftp read request... done.
2231 07:05:09.821092
2232 07:05:09.824490 Waiting for the transfer...
2233 07:05:09.824593
2234 07:05:10.360002 00000000 ################################################################
2235 07:05:10.360145
2236 07:05:10.901783 00080000 ################################################################
2237 07:05:10.901922
2238 07:05:11.431725 00100000 ################################################################
2239 07:05:11.431879
2240 07:05:11.969244 00180000 ################################################################
2241 07:05:11.969385
2242 07:05:12.514447 00200000 ################################################################
2243 07:05:12.514637
2244 07:05:13.063107 00280000 ################################################################
2245 07:05:13.063679
2246 07:05:13.680207 00300000 ################################################################
2247 07:05:13.680345
2248 07:05:14.200757 00380000 ################################################################
2249 07:05:14.200936
2250 07:05:14.745228 00400000 ################################################################
2251 07:05:14.745380
2252 07:05:15.286679 00480000 ################################################################
2253 07:05:15.286818
2254 07:05:15.550695 00500000 ################################ done.
2255 07:05:15.551230
2256 07:05:15.554033 Sending tftp read request... done.
2257 07:05:15.554490
2258 07:05:15.557586 Waiting for the transfer...
2259 07:05:15.558087
2260 07:05:15.558436 00000000 # done.
2261 07:05:15.558829
2262 07:05:15.567368 Command line loaded dynamically from TFTP file: 9045479/tftp-deploy-i73jg55n/kernel/cmdline
2263 07:05:15.567830
2264 07:05:15.587077 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9045479/extract-nfsrootfs-011sxgvy,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2265 07:05:15.590954
2266 07:05:15.594179 Shutting down all USB controllers.
2267 07:05:15.594623
2268 07:05:15.594969 Removing current net device
2269 07:05:15.595295
2270 07:05:15.597314 Finalizing coreboot
2271 07:05:15.597788
2272 07:05:15.603877 Exiting depthcharge with code 4 at timestamp: 23641203
2273 07:05:15.604321
2274 07:05:15.604664
2275 07:05:15.604988 Starting kernel ...
2276 07:05:15.605300
2277 07:05:15.605603
2278 07:05:15.606784 end: 2.2.4 bootloader-commands (duration 00:00:15) [common]
2279 07:05:15.607275 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2280 07:05:15.607641 Setting prompt string to ['Linux version [0-9]']
2281 07:05:15.607990 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2282 07:05:15.608346 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2284 07:09:42.607504 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2286 07:09:42.607730 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2288 07:09:42.607906 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2291 07:09:42.608244 end: 2 depthcharge-action (duration 00:05:00) [common]
2293 07:09:42.608507 Cleaning after the job
2294 07:09:42.608594 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/ramdisk
2295 07:09:42.609058 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/kernel
2296 07:09:42.609617 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/nfsrootfs
2297 07:09:42.640941 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045479/tftp-deploy-i73jg55n/modules
2298 07:09:42.641239 start: 5.1 power-off (timeout 00:00:30) [common]
2299 07:09:42.641395 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-3' '--port=1' '--command=off'
2300 07:09:44.813818 >> Command sent successfully.
2301 07:09:44.815923 Returned 0 in 2 seconds
2302 07:09:44.916957 end: 5.1 power-off (duration 00:00:02) [common]
2304 07:09:44.918036 start: 5.2 read-feedback (timeout 00:09:58) [common]
2305 07:09:44.918991 Listened to connection for namespace 'common' for up to 1s
2306 07:09:45.921820 Finalising connection for namespace 'common'
2307 07:09:45.922007 Disconnecting from shell: Finalise
2308 07:09:45.922085
2309 07:09:46.022829 end: 5.2 read-feedback (duration 00:00:01) [common]
2310 07:09:46.023202 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045479
2311 07:09:46.115978 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045479
2312 07:09:46.116173 JobError: Your job cannot terminate cleanly.