Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:04:38.778639 lava-dispatcher, installed at version: 2022.11
2 07:04:38.778820 start: 0 validate
3 07:04:38.778948 Start time: 2023-02-07 07:04:38.778940+00:00 (UTC)
4 07:04:38.779066 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:04:38.779192 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230203.0%2Famd64%2Frootfs.cpio.gz exists
6 07:04:39.070708 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:04:39.071469 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:04:39.086646 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:04:39.087354 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 07:04:39.099523 validate duration: 0.32
12 07:04:39.100877 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 07:04:39.101533 start: 1.1 download-retry (timeout 00:10:00) [common]
14 07:04:39.102085 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 07:04:39.102676 Not decompressing ramdisk as can be used compressed.
16 07:04:39.103345 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230203.0/amd64/rootfs.cpio.gz
17 07:04:39.103746 saving as /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/ramdisk/rootfs.cpio.gz
18 07:04:39.104100 total size: 35740421 (34MB)
19 07:04:39.121570 progress 0% (0MB)
20 07:04:39.197857 progress 5% (1MB)
21 07:04:39.267772 progress 10% (3MB)
22 07:04:39.336123 progress 15% (5MB)
23 07:04:39.410536 progress 20% (6MB)
24 07:04:39.479432 progress 25% (8MB)
25 07:04:39.548379 progress 30% (10MB)
26 07:04:39.619202 progress 35% (11MB)
27 07:04:39.689060 progress 40% (13MB)
28 07:04:39.754873 progress 45% (15MB)
29 07:04:39.826371 progress 50% (17MB)
30 07:04:39.893116 progress 55% (18MB)
31 07:04:39.924372 progress 60% (20MB)
32 07:04:39.954237 progress 65% (22MB)
33 07:04:39.985310 progress 70% (23MB)
34 07:04:40.015637 progress 75% (25MB)
35 07:04:40.046396 progress 80% (27MB)
36 07:04:40.076357 progress 85% (29MB)
37 07:04:40.107255 progress 90% (30MB)
38 07:04:40.137523 progress 95% (32MB)
39 07:04:40.167568 progress 100% (34MB)
40 07:04:40.167838 34MB downloaded in 1.06s (32.04MB/s)
41 07:04:40.167992 end: 1.1.1 http-download (duration 00:00:01) [common]
43 07:04:40.168238 end: 1.1 download-retry (duration 00:00:01) [common]
44 07:04:40.168339 start: 1.2 download-retry (timeout 00:09:59) [common]
45 07:04:40.168427 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 07:04:40.168540 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 07:04:40.168609 saving as /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/kernel/bzImage
48 07:04:40.168670 total size: 7573392 (7MB)
49 07:04:40.168730 No compression specified
50 07:04:40.171117 progress 0% (0MB)
51 07:04:40.177082 progress 5% (0MB)
52 07:04:40.184313 progress 10% (0MB)
53 07:04:40.190685 progress 15% (1MB)
54 07:04:40.196966 progress 20% (1MB)
55 07:04:40.202773 progress 25% (1MB)
56 07:04:40.210237 progress 30% (2MB)
57 07:04:40.215619 progress 35% (2MB)
58 07:04:40.222660 progress 40% (2MB)
59 07:04:40.229057 progress 45% (3MB)
60 07:04:40.235198 progress 50% (3MB)
61 07:04:40.242922 progress 55% (4MB)
62 07:04:40.248064 progress 60% (4MB)
63 07:04:40.254947 progress 65% (4MB)
64 07:04:40.260929 progress 70% (5MB)
65 07:04:40.267680 progress 75% (5MB)
66 07:04:40.274593 progress 80% (5MB)
67 07:04:40.280685 progress 85% (6MB)
68 07:04:40.287436 progress 90% (6MB)
69 07:04:40.293568 progress 95% (6MB)
70 07:04:40.299941 progress 100% (7MB)
71 07:04:40.300132 7MB downloaded in 0.13s (54.94MB/s)
72 07:04:40.300298 end: 1.2.1 http-download (duration 00:00:00) [common]
74 07:04:40.300560 end: 1.2 download-retry (duration 00:00:00) [common]
75 07:04:40.300664 start: 1.3 download-retry (timeout 00:09:59) [common]
76 07:04:40.300766 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 07:04:40.300882 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 07:04:40.300955 saving as /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/modules/modules.tar
79 07:04:40.301033 total size: 54868 (0MB)
80 07:04:40.301110 Using unxz to decompress xz
81 07:04:40.312732 progress 59% (0MB)
82 07:04:40.313240 progress 100% (0MB)
83 07:04:40.316814 0MB downloaded in 0.02s (3.32MB/s)
84 07:04:40.317088 end: 1.3.1 http-download (duration 00:00:00) [common]
86 07:04:40.317407 end: 1.3 download-retry (duration 00:00:00) [common]
87 07:04:40.317533 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
88 07:04:40.317652 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
89 07:04:40.317758 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 07:04:40.317868 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
91 07:04:40.318066 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx
92 07:04:40.318203 makedir: /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin
93 07:04:40.318308 makedir: /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/tests
94 07:04:40.318412 makedir: /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/results
95 07:04:40.318544 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-add-keys
96 07:04:40.318704 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-add-sources
97 07:04:40.318846 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-background-process-start
98 07:04:40.318985 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-background-process-stop
99 07:04:40.319121 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-common-functions
100 07:04:40.319254 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-echo-ipv4
101 07:04:40.319390 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-install-packages
102 07:04:40.319529 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-installed-packages
103 07:04:40.319662 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-os-build
104 07:04:40.319796 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-probe-channel
105 07:04:40.319929 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-probe-ip
106 07:04:40.320060 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-target-ip
107 07:04:40.320192 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-target-mac
108 07:04:40.320324 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-target-storage
109 07:04:40.320462 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-case
110 07:04:40.320596 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-event
111 07:04:40.320730 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-feedback
112 07:04:40.320863 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-raise
113 07:04:40.321000 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-reference
114 07:04:40.321132 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-runner
115 07:04:40.321265 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-set
116 07:04:40.321397 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-test-shell
117 07:04:40.321533 Updating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-install-packages (oe)
118 07:04:40.321671 Updating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/bin/lava-installed-packages (oe)
119 07:04:40.321792 Creating /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/environment
120 07:04:40.321901 LAVA metadata
121 07:04:40.321985 - LAVA_JOB_ID=9045574
122 07:04:40.322071 - LAVA_DISPATCHER_IP=192.168.201.1
123 07:04:40.322216 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
124 07:04:40.322294 skipped lava-vland-overlay
125 07:04:40.322403 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 07:04:40.322512 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
127 07:04:40.322587 skipped lava-multinode-overlay
128 07:04:40.322691 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 07:04:40.322798 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
130 07:04:40.322892 Loading test definitions
131 07:04:40.323018 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
132 07:04:40.323114 Using /lava-9045574 at stage 0
133 07:04:40.323416 uuid=9045574_1.4.2.3.1 testdef=None
134 07:04:40.323525 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 07:04:40.323637 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
136 07:04:40.324153 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 07:04:40.324427 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
139 07:04:40.325011 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 07:04:40.325298 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
142 07:04:40.325856 runner path: /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/0/tests/0_cros-ec test_uuid 9045574_1.4.2.3.1
143 07:04:40.326022 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 07:04:40.326287 Creating lava-test-runner.conf files
146 07:04:40.326374 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045574/lava-overlay-lrtzwghx/lava-9045574/0 for stage 0
147 07:04:40.326484 - 0_cros-ec
148 07:04:40.326605 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
149 07:04:40.326713 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
150 07:04:40.332236 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
151 07:04:40.332359 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
152 07:04:40.332467 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
153 07:04:40.332575 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
154 07:04:40.332682 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
155 07:04:41.072220 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
156 07:04:41.072571 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
157 07:04:41.072702 extracting modules file /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045574/extract-overlay-ramdisk-an8oifho/ramdisk
158 07:04:41.076866 end: 1.4.4 extract-modules (duration 00:00:00) [common]
159 07:04:41.076984 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
160 07:04:41.077079 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045574/compress-overlay-a0hq_6nr/overlay-1.4.2.4.tar.gz to ramdisk
161 07:04:41.077160 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045574/compress-overlay-a0hq_6nr/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045574/extract-overlay-ramdisk-an8oifho/ramdisk
162 07:04:41.080181 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
163 07:04:41.080300 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
164 07:04:41.080402 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
165 07:04:41.080508 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
166 07:04:41.080594 Building ramdisk /var/lib/lava/dispatcher/tmp/9045574/extract-overlay-ramdisk-an8oifho/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045574/extract-overlay-ramdisk-an8oifho/ramdisk
167 07:04:41.323411 >> 182481 blocks
168 07:04:44.621641 rename /var/lib/lava/dispatcher/tmp/9045574/extract-overlay-ramdisk-an8oifho/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
169 07:04:44.622082 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
170 07:04:44.622311 start: 1.4.8 prepare-kernel (timeout 00:09:54) [common]
171 07:04:44.622476 start: 1.4.8.1 prepare-fit (timeout 00:09:54) [common]
172 07:04:44.622627 No mkimage arch provided, not using FIT.
173 07:04:44.622767 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
174 07:04:44.622902 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
175 07:04:44.623049 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
176 07:04:44.623190 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:54) [common]
177 07:04:44.623311 No LXC device requested
178 07:04:44.623434 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
179 07:04:44.623565 start: 1.6 deploy-device-env (timeout 00:09:54) [common]
180 07:04:44.623686 end: 1.6 deploy-device-env (duration 00:00:00) [common]
181 07:04:44.623791 Checking files for TFTP limit of 4294967296 bytes.
182 07:04:44.624299 end: 1 tftp-deploy (duration 00:00:06) [common]
183 07:04:44.624444 start: 2 depthcharge-action (timeout 00:05:00) [common]
184 07:04:44.624578 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
185 07:04:44.624748 substitutions:
186 07:04:44.624844 - {DTB}: None
187 07:04:44.624947 - {INITRD}: 9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
188 07:04:44.625049 - {KERNEL}: 9045574/tftp-deploy-mtezrtre/kernel/bzImage
189 07:04:44.625148 - {LAVA_MAC}: None
190 07:04:44.625250 - {PRESEED_CONFIG}: None
191 07:04:44.625347 - {PRESEED_LOCAL}: None
192 07:04:44.625440 - {RAMDISK}: 9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
193 07:04:44.625531 - {ROOT_PART}: None
194 07:04:44.625621 - {ROOT}: None
195 07:04:44.625710 - {SERVER_IP}: 192.168.201.1
196 07:04:44.625796 - {TEE}: None
197 07:04:44.625879 Parsed boot commands:
198 07:04:44.625959 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
199 07:04:44.626222 Parsed boot commands: tftpboot 192.168.201.1 9045574/tftp-deploy-mtezrtre/kernel/bzImage 9045574/tftp-deploy-mtezrtre/kernel/cmdline 9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
200 07:04:44.626367 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
201 07:04:44.626509 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
202 07:04:44.626659 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
203 07:04:44.626799 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
204 07:04:44.626918 Not connected, no need to disconnect.
205 07:04:44.627042 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
206 07:04:44.627168 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
207 07:04:44.627275 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
208 07:04:44.630175 Setting prompt string to ['lava-test: # ']
209 07:04:44.630473 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
210 07:04:44.630572 end: 2.2.1 reset-connection (duration 00:00:00) [common]
211 07:04:44.630663 start: 2.2.2 reset-device (timeout 00:05:00) [common]
212 07:04:44.630754 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
213 07:04:44.630927 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
214 07:04:53.967723 >> Command sent successfully.
215 07:04:53.977780 Returned 0 in 9 seconds
216 07:04:54.079565 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
218 07:04:54.081984 end: 2.2.2 reset-device (duration 00:00:09) [common]
219 07:04:54.082600 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
220 07:04:54.083079 Setting prompt string to 'Starting depthcharge on Voema...'
221 07:04:54.083460 Changing prompt to 'Starting depthcharge on Voema...'
222 07:04:54.083857 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
223 07:04:54.085205 [Enter `^Ec?' for help]
224 07:04:54.085677
225 07:04:54.086197
226 07:04:54.086599 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
227 07:04:54.086983 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
228 07:04:54.087342 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
229 07:04:54.087673 CPU: AES supported, TXT NOT supported, VT supported
230 07:04:54.088000 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
231 07:04:54.088329 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
232 07:04:54.088653 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
233 07:04:54.088976 VBOOT: Loading verstage.
234 07:04:54.089297 FMAP: Found "FLASH" version 1.1 at 0x1804000.
235 07:04:54.089624 FMAP: base = 0x0 size = 0x2000000 #areas = 32
236 07:04:54.089947 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
237 07:04:54.090340 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
238 07:04:54.090672 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
239 07:04:54.090996
240 07:04:54.091310
241 07:04:54.091625 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
242 07:04:54.091956 Probing TPM: . done!
243 07:04:54.092274 TPM ready after 0 ms
244 07:04:54.092589 Connected to device vid:did:rid of 1ae0:0028:00
245 07:04:54.092908 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
246 07:04:54.093240 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
247 07:04:54.093560 Initialized TPM device CR50 revision 0
248 07:04:54.093877 tlcl_send_startup: Startup return code is 0
249 07:04:54.094216 TPM: setup succeeded
250 07:04:54.094538 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
251 07:04:54.094857 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
252 07:04:54.095178 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
253 07:04:54.095498 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
254 07:04:54.095814 Chrome EC: UHEPI supported
255 07:04:54.096124 Phase 1
256 07:04:54.096435 FMAP: area GBB found @ 1805000 (458752 bytes)
257 07:04:54.096754 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
258 07:04:54.097075 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
259 07:04:54.097396 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
260 07:04:54.097718 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
261 07:04:54.098036 Recovery requested (1009000e)
262 07:04:54.098372 TPM: Extending digest for VBOOT: boot mode into PCR 0
263 07:04:54.098691 tlcl_extend: response is 0
264 07:04:54.099010 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
265 07:04:54.099330 tlcl_extend: response is 0
266 07:04:54.099645 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
267 07:04:54.099966 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
268 07:04:54.100288 BS: verstage times (exec / console): total (unknown) / 142 ms
269 07:04:54.100605
270 07:04:54.100917
271 07:04:54.101235 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
272 07:04:54.101556 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
273 07:04:54.101876 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
274 07:04:54.102211 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
275 07:04:54.102578 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
276 07:04:54.102901 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
277 07:04:54.103220 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
278 07:04:54.103536 TCO_STS: 0000 0000
279 07:04:54.103852 GEN_PMCON: d0015038 00002200
280 07:04:54.104173 GBLRST_CAUSE: 00000000 00000000
281 07:04:54.104488 HPR_CAUSE0: 00000000
282 07:04:54.105002 prev_sleep_state 5
283 07:04:54.105365 Boot Count incremented to 15463
284 07:04:54.105688 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 07:04:54.106012 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 07:04:54.106373 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 07:04:54.106647 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
288 07:04:54.106873 Chrome EC: UHEPI supported
289 07:04:54.107099 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
290 07:04:54.107613 Probing TPM: done!
291 07:04:54.107869 Connected to device vid:did:rid of 1ae0:0028:00
292 07:04:54.110453 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
293 07:04:54.117295 Initialized TPM device CR50 revision 0
294 07:04:54.127498 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
295 07:04:54.134268 MRC: Hash idx 0x100b comparison successful.
296 07:04:54.138195 MRC cache found, size faa8
297 07:04:54.138538 bootmode is set to: 2
298 07:04:54.140731 SPD index = 0
299 07:04:54.147127 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
300 07:04:54.151099 SPD: module type is LPDDR4X
301 07:04:54.154612 SPD: module part number is MT53E512M64D4NW-046
302 07:04:54.161684 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
303 07:04:54.164157 SPD: device width 16 bits, bus width 16 bits
304 07:04:54.171574 SPD: module size is 1024 MB (per channel)
305 07:04:54.603405 CBMEM:
306 07:04:54.606675 IMD: root @ 0x76fff000 254 entries.
307 07:04:54.610289 IMD: root @ 0x76ffec00 62 entries.
308 07:04:54.613110 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
309 07:04:54.619802 FMAP: area RW_VPD found @ f35000 (8192 bytes)
310 07:04:54.623145 External stage cache:
311 07:04:54.626620 IMD: root @ 0x7b3ff000 254 entries.
312 07:04:54.629961 IMD: root @ 0x7b3fec00 62 entries.
313 07:04:54.645004 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
314 07:04:54.651765 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
315 07:04:54.657772 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
316 07:04:54.672489 MRC: 'RECOVERY_MRC_CACHE' does not need update.
317 07:04:54.676140 cse_lite: Skip switching to RW in the recovery path
318 07:04:54.679449 8 DIMMs found
319 07:04:54.680071 SMM Memory Map
320 07:04:54.683107 SMRAM : 0x7b000000 0x800000
321 07:04:54.686106 Subregion 0: 0x7b000000 0x200000
322 07:04:54.689621 Subregion 1: 0x7b200000 0x200000
323 07:04:54.693298 Subregion 2: 0x7b400000 0x400000
324 07:04:54.696561 top_of_ram = 0x77000000
325 07:04:54.703508 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
326 07:04:54.706463 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
327 07:04:54.713096 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
328 07:04:54.717047 MTRR Range: Start=ff000000 End=0 (Size 1000000)
329 07:04:54.726548 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
330 07:04:54.732990 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
331 07:04:54.742584 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
332 07:04:54.746079 Processing 211 relocs. Offset value of 0x74c0b000
333 07:04:54.755149 BS: romstage times (exec / console): total (unknown) / 277 ms
334 07:04:54.760619
335 07:04:54.761122
336 07:04:54.771129 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
337 07:04:54.774175 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 07:04:54.785055 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 07:04:54.791087 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 07:04:54.797953 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
341 07:04:54.804532 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
342 07:04:54.852202 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
343 07:04:54.858576 Processing 5008 relocs. Offset value of 0x75d98000
344 07:04:54.861099 BS: postcar times (exec / console): total (unknown) / 59 ms
345 07:04:54.864817
346 07:04:54.865291
347 07:04:54.876182 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
348 07:04:54.876784 Normal boot
349 07:04:54.878470 FW_CONFIG value is 0x804c02
350 07:04:54.881885 PCI: 00:07.0 disabled by fw_config
351 07:04:54.885706 PCI: 00:07.1 disabled by fw_config
352 07:04:54.888465 PCI: 00:0d.2 disabled by fw_config
353 07:04:54.891859 PCI: 00:1c.7 disabled by fw_config
354 07:04:54.898813 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
355 07:04:54.905176 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
356 07:04:54.908372 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
357 07:04:54.912101 GENERIC: 0.0 disabled by fw_config
358 07:04:54.915429 GENERIC: 1.0 disabled by fw_config
359 07:04:54.921851 fw_config match found: DB_USB=USB3_ACTIVE
360 07:04:54.924941 fw_config match found: DB_USB=USB3_ACTIVE
361 07:04:54.928249 fw_config match found: DB_USB=USB3_ACTIVE
362 07:04:54.931478 fw_config match found: DB_USB=USB3_ACTIVE
363 07:04:54.938700 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
364 07:04:54.944865 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
365 07:04:54.951644 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
366 07:04:54.961461 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
367 07:04:54.964973 microcode: sig=0x806c1 pf=0x80 revision=0x86
368 07:04:54.970973 microcode: Update skipped, already up-to-date
369 07:04:54.978207 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
370 07:04:55.005125 Detected 4 core, 8 thread CPU.
371 07:04:55.008220 Setting up SMI for CPU
372 07:04:55.011335 IED base = 0x7b400000
373 07:04:55.011917 IED size = 0x00400000
374 07:04:55.015508 Will perform SMM setup.
375 07:04:55.021754 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
376 07:04:55.027671 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
377 07:04:55.034384 Processing 16 relocs. Offset value of 0x00030000
378 07:04:55.038007 Attempting to start 7 APs
379 07:04:55.041180 Waiting for 10ms after sending INIT.
380 07:04:55.057212 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
381 07:04:55.057808 done.
382 07:04:55.060142 AP: slot 4 apic_id 3.
383 07:04:55.064185 AP: slot 5 apic_id 2.
384 07:04:55.064679 AP: slot 7 apic_id 7.
385 07:04:55.070537 Waiting for 2nd SIPI to complete...done.
386 07:04:55.071130 AP: slot 2 apic_id 5.
387 07:04:55.073144 AP: slot 6 apic_id 4.
388 07:04:55.076750 AP: slot 3 apic_id 6.
389 07:04:55.083671 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
390 07:04:55.090179 Processing 13 relocs. Offset value of 0x00038000
391 07:04:55.090802 Unable to locate Global NVS
392 07:04:55.100371 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
393 07:04:55.104072 Installing permanent SMM handler to 0x7b000000
394 07:04:55.113807 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
395 07:04:55.117163 Processing 794 relocs. Offset value of 0x7b010000
396 07:04:55.126541 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
397 07:04:55.130222 Processing 13 relocs. Offset value of 0x7b008000
398 07:04:55.136437 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
399 07:04:55.143692 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
400 07:04:55.146192 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
401 07:04:55.152711 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
402 07:04:55.160265 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
403 07:04:55.166301 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
404 07:04:55.173021 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
405 07:04:55.173685 Unable to locate Global NVS
406 07:04:55.182958 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
407 07:04:55.186324 Clearing SMI status registers
408 07:04:55.186941 SMI_STS: PM1
409 07:04:55.189237 PM1_STS: PWRBTN
410 07:04:55.196743 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
411 07:04:55.200240 In relocation handler: CPU 0
412 07:04:55.203011 New SMBASE=0x7b000000 IEDBASE=0x7b400000
413 07:04:55.209880 Writing SMRR. base = 0x7b000006, mask=0xff800c00
414 07:04:55.210500 Relocation complete.
415 07:04:55.219510 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
416 07:04:55.220100 In relocation handler: CPU 1
417 07:04:55.226879 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
418 07:04:55.227470 Relocation complete.
419 07:04:55.236384 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
420 07:04:55.236988 In relocation handler: CPU 7
421 07:04:55.242673 New SMBASE=0x7affe400 IEDBASE=0x7b400000
422 07:04:55.243246 Relocation complete.
423 07:04:55.253392 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
424 07:04:55.253887 In relocation handler: CPU 5
425 07:04:55.259342 New SMBASE=0x7affec00 IEDBASE=0x7b400000
426 07:04:55.262821 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 07:04:55.266490 Relocation complete.
428 07:04:55.272271 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
429 07:04:55.275601 In relocation handler: CPU 4
430 07:04:55.279597 New SMBASE=0x7afff000 IEDBASE=0x7b400000
431 07:04:55.282521 Relocation complete.
432 07:04:55.288837 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
433 07:04:55.293108 In relocation handler: CPU 2
434 07:04:55.296119 New SMBASE=0x7afff800 IEDBASE=0x7b400000
435 07:04:55.299275 Relocation complete.
436 07:04:55.306359 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
437 07:04:55.309239 In relocation handler: CPU 6
438 07:04:55.313015 New SMBASE=0x7affe800 IEDBASE=0x7b400000
439 07:04:55.315932 Writing SMRR. base = 0x7b000006, mask=0xff800c00
440 07:04:55.319708 Relocation complete.
441 07:04:55.326223 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
442 07:04:55.329333 In relocation handler: CPU 3
443 07:04:55.332875 New SMBASE=0x7afff400 IEDBASE=0x7b400000
444 07:04:55.339395 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 07:04:55.339983 Relocation complete.
446 07:04:55.343335 Initializing CPU #0
447 07:04:55.347367 CPU: vendor Intel device 806c1
448 07:04:55.350241 CPU: family 06, model 8c, stepping 01
449 07:04:55.354186 Clearing out pending MCEs
450 07:04:55.354682 Setting up local APIC...
451 07:04:55.357296 apic_id: 0x00 done.
452 07:04:55.360351 Turbo is available but hidden
453 07:04:55.363637 Turbo is available and visible
454 07:04:55.366962 microcode: Update skipped, already up-to-date
455 07:04:55.370605 CPU #0 initialized
456 07:04:55.373595 Initializing CPU #7
457 07:04:55.374187 Initializing CPU #3
458 07:04:55.377181 CPU: vendor Intel device 806c1
459 07:04:55.380724 CPU: family 06, model 8c, stepping 01
460 07:04:55.383566 CPU: vendor Intel device 806c1
461 07:04:55.387319 CPU: family 06, model 8c, stepping 01
462 07:04:55.390464 Clearing out pending MCEs
463 07:04:55.393511 Clearing out pending MCEs
464 07:04:55.397372 Setting up local APIC...
465 07:04:55.397971 Initializing CPU #5
466 07:04:55.400625 Initializing CPU #4
467 07:04:55.403859 CPU: vendor Intel device 806c1
468 07:04:55.407444 CPU: family 06, model 8c, stepping 01
469 07:04:55.410506 apic_id: 0x07 done.
470 07:04:55.411102 Setting up local APIC...
471 07:04:55.413771 Initializing CPU #1
472 07:04:55.417326 Initializing CPU #6
473 07:04:55.420457 CPU: vendor Intel device 806c1
474 07:04:55.423368 CPU: family 06, model 8c, stepping 01
475 07:04:55.427315 Clearing out pending MCEs
476 07:04:55.430600 CPU: vendor Intel device 806c1
477 07:04:55.433936 CPU: family 06, model 8c, stepping 01
478 07:04:55.434579 Setting up local APIC...
479 07:04:55.440673 microcode: Update skipped, already up-to-date
480 07:04:55.441268 apic_id: 0x06 done.
481 07:04:55.443723 CPU #7 initialized
482 07:04:55.446874 microcode: Update skipped, already up-to-date
483 07:04:55.450228 Clearing out pending MCEs
484 07:04:55.454797 CPU: vendor Intel device 806c1
485 07:04:55.457063 CPU: family 06, model 8c, stepping 01
486 07:04:55.460321 Initializing CPU #2
487 07:04:55.463714 Clearing out pending MCEs
488 07:04:55.467058 CPU: vendor Intel device 806c1
489 07:04:55.470269 CPU: family 06, model 8c, stepping 01
490 07:04:55.473968 Setting up local APIC...
491 07:04:55.474651 CPU #3 initialized
492 07:04:55.476761 apic_id: 0x02 done.
493 07:04:55.480408 Clearing out pending MCEs
494 07:04:55.483486 microcode: Update skipped, already up-to-date
495 07:04:55.486741 Setting up local APIC...
496 07:04:55.487244 CPU #5 initialized
497 07:04:55.490348 apic_id: 0x03 done.
498 07:04:55.493423 Clearing out pending MCEs
499 07:04:55.493920 apic_id: 0x04 done.
500 07:04:55.496721 Setting up local APIC...
501 07:04:55.503526 microcode: Update skipped, already up-to-date
502 07:04:55.504111 apic_id: 0x05 done.
503 07:04:55.511058 microcode: Update skipped, already up-to-date
504 07:04:55.513617 microcode: Update skipped, already up-to-date
505 07:04:55.517246 CPU #6 initialized
506 07:04:55.517828 CPU #2 initialized
507 07:04:55.520031 CPU #4 initialized
508 07:04:55.520609 Setting up local APIC...
509 07:04:55.523511 apic_id: 0x01 done.
510 07:04:55.530372 microcode: Update skipped, already up-to-date
511 07:04:55.530956 CPU #1 initialized
512 07:04:55.534072 bsp_do_flight_plan done after 461 msecs.
513 07:04:55.538281 CPU: frequency set to 4000 MHz
514 07:04:55.540917 Enabling SMIs.
515 07:04:55.546513 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
516 07:04:55.561975 SATAXPCIE1 indicates PCIe NVMe is present
517 07:04:55.565244 Probing TPM: done!
518 07:04:55.568746 Connected to device vid:did:rid of 1ae0:0028:00
519 07:04:55.579231 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
520 07:04:55.582405 Initialized TPM device CR50 revision 0
521 07:04:55.586218 Enabling S0i3.4
522 07:04:55.592535 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
523 07:04:55.596121 Found a VBT of 8704 bytes after decompression
524 07:04:55.602567 cse_lite: CSE RO boot. HybridStorageMode disabled
525 07:04:55.609326 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
526 07:04:55.684215 FSPS returned 0
527 07:04:55.687287 Executing Phase 1 of FspMultiPhaseSiInit
528 07:04:55.697658 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
529 07:04:55.700994 port C0 DISC req: usage 1 usb3 1 usb2 5
530 07:04:55.704128 Raw Buffer output 0 00000511
531 07:04:55.707644 Raw Buffer output 1 00000000
532 07:04:55.711189 pmc_send_ipc_cmd succeeded
533 07:04:55.718247 port C1 DISC req: usage 1 usb3 2 usb2 3
534 07:04:55.718837 Raw Buffer output 0 00000321
535 07:04:55.721254 Raw Buffer output 1 00000000
536 07:04:55.725369 pmc_send_ipc_cmd succeeded
537 07:04:55.730859 Detected 4 core, 8 thread CPU.
538 07:04:55.734488 Detected 4 core, 8 thread CPU.
539 07:04:55.967727 Display FSP Version Info HOB
540 07:04:55.971332 Reference Code - CPU = a.0.4c.31
541 07:04:55.974610 uCode Version = 0.0.0.86
542 07:04:55.978220 TXT ACM version = ff.ff.ff.ffff
543 07:04:55.980899 Reference Code - ME = a.0.4c.31
544 07:04:55.984786 MEBx version = 0.0.0.0
545 07:04:55.987925 ME Firmware Version = Consumer SKU
546 07:04:55.990796 Reference Code - PCH = a.0.4c.31
547 07:04:55.994869 PCH-CRID Status = Disabled
548 07:04:55.998658 PCH-CRID Original Value = ff.ff.ff.ffff
549 07:04:56.001473 PCH-CRID New Value = ff.ff.ff.ffff
550 07:04:56.004609 OPROM - RST - RAID = ff.ff.ff.ffff
551 07:04:56.008245 PCH Hsio Version = 4.0.0.0
552 07:04:56.010795 Reference Code - SA - System Agent = a.0.4c.31
553 07:04:56.014215 Reference Code - MRC = 2.0.0.1
554 07:04:56.018215 SA - PCIe Version = a.0.4c.31
555 07:04:56.022514 SA-CRID Status = Disabled
556 07:04:56.024052 SA-CRID Original Value = 0.0.0.1
557 07:04:56.027334 SA-CRID New Value = 0.0.0.1
558 07:04:56.030744 OPROM - VBIOS = ff.ff.ff.ffff
559 07:04:56.034826 IO Manageability Engine FW Version = 11.1.4.0
560 07:04:56.038094 PHY Build Version = 0.0.0.e0
561 07:04:56.041294 Thunderbolt(TM) FW Version = 0.0.0.0
562 07:04:56.047770 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
563 07:04:56.052387 ITSS IRQ Polarities Before:
564 07:04:56.052984 IPC0: 0xffffffff
565 07:04:56.054481 IPC1: 0xffffffff
566 07:04:56.055083 IPC2: 0xffffffff
567 07:04:56.057454 IPC3: 0xffffffff
568 07:04:56.061397 ITSS IRQ Polarities After:
569 07:04:56.061990 IPC0: 0xffffffff
570 07:04:56.064207 IPC1: 0xffffffff
571 07:04:56.064799 IPC2: 0xffffffff
572 07:04:56.067705 IPC3: 0xffffffff
573 07:04:56.070839 Found PCIe Root Port #9 at PCI: 00:1d.0.
574 07:04:56.084348 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
575 07:04:56.094126 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
576 07:04:56.108392 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
577 07:04:56.114393 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
578 07:04:56.114981 Enumerating buses...
579 07:04:56.120774 Show all devs... Before device enumeration.
580 07:04:56.121356 Root Device: enabled 1
581 07:04:56.124833 DOMAIN: 0000: enabled 1
582 07:04:56.127579 CPU_CLUSTER: 0: enabled 1
583 07:04:56.131283 PCI: 00:00.0: enabled 1
584 07:04:56.131869 PCI: 00:02.0: enabled 1
585 07:04:56.134244 PCI: 00:04.0: enabled 1
586 07:04:56.137603 PCI: 00:05.0: enabled 1
587 07:04:56.140782 PCI: 00:06.0: enabled 0
588 07:04:56.141365 PCI: 00:07.0: enabled 0
589 07:04:56.144597 PCI: 00:07.1: enabled 0
590 07:04:56.147648 PCI: 00:07.2: enabled 0
591 07:04:56.150769 PCI: 00:07.3: enabled 0
592 07:04:56.151353 PCI: 00:08.0: enabled 1
593 07:04:56.154321 PCI: 00:09.0: enabled 0
594 07:04:56.157768 PCI: 00:0a.0: enabled 0
595 07:04:56.161229 PCI: 00:0d.0: enabled 1
596 07:04:56.161825 PCI: 00:0d.1: enabled 0
597 07:04:56.164352 PCI: 00:0d.2: enabled 0
598 07:04:56.166907 PCI: 00:0d.3: enabled 0
599 07:04:56.167435 PCI: 00:0e.0: enabled 0
600 07:04:56.170710 PCI: 00:10.2: enabled 1
601 07:04:56.173896 PCI: 00:10.6: enabled 0
602 07:04:56.177385 PCI: 00:10.7: enabled 0
603 07:04:56.178018 PCI: 00:12.0: enabled 0
604 07:04:56.180624 PCI: 00:12.6: enabled 0
605 07:04:56.183467 PCI: 00:13.0: enabled 0
606 07:04:56.187947 PCI: 00:14.0: enabled 1
607 07:04:56.188533 PCI: 00:14.1: enabled 0
608 07:04:56.190318 PCI: 00:14.2: enabled 1
609 07:04:56.193682 PCI: 00:14.3: enabled 1
610 07:04:56.197467 PCI: 00:15.0: enabled 1
611 07:04:56.197947 PCI: 00:15.1: enabled 1
612 07:04:56.201372 PCI: 00:15.2: enabled 1
613 07:04:56.204215 PCI: 00:15.3: enabled 1
614 07:04:56.207484 PCI: 00:16.0: enabled 1
615 07:04:56.208101 PCI: 00:16.1: enabled 0
616 07:04:56.210349 PCI: 00:16.2: enabled 0
617 07:04:56.213543 PCI: 00:16.3: enabled 0
618 07:04:56.214116 PCI: 00:16.4: enabled 0
619 07:04:56.217139 PCI: 00:16.5: enabled 0
620 07:04:56.220513 PCI: 00:17.0: enabled 1
621 07:04:56.224426 PCI: 00:19.0: enabled 0
622 07:04:56.225030 PCI: 00:19.1: enabled 1
623 07:04:56.227303 PCI: 00:19.2: enabled 0
624 07:04:56.230571 PCI: 00:1c.0: enabled 1
625 07:04:56.233697 PCI: 00:1c.1: enabled 0
626 07:04:56.234323 PCI: 00:1c.2: enabled 0
627 07:04:56.237431 PCI: 00:1c.3: enabled 0
628 07:04:56.240401 PCI: 00:1c.4: enabled 0
629 07:04:56.244167 PCI: 00:1c.5: enabled 0
630 07:04:56.244752 PCI: 00:1c.6: enabled 1
631 07:04:56.247248 PCI: 00:1c.7: enabled 0
632 07:04:56.251034 PCI: 00:1d.0: enabled 1
633 07:04:56.251620 PCI: 00:1d.1: enabled 0
634 07:04:56.253860 PCI: 00:1d.2: enabled 1
635 07:04:56.257290 PCI: 00:1d.3: enabled 0
636 07:04:56.260901 PCI: 00:1e.0: enabled 1
637 07:04:56.261485 PCI: 00:1e.1: enabled 0
638 07:04:56.263253 PCI: 00:1e.2: enabled 1
639 07:04:56.267212 PCI: 00:1e.3: enabled 1
640 07:04:56.269992 PCI: 00:1f.0: enabled 1
641 07:04:56.270534 PCI: 00:1f.1: enabled 0
642 07:04:56.273258 PCI: 00:1f.2: enabled 1
643 07:04:56.276521 PCI: 00:1f.3: enabled 1
644 07:04:56.281077 PCI: 00:1f.4: enabled 0
645 07:04:56.281665 PCI: 00:1f.5: enabled 1
646 07:04:56.284227 PCI: 00:1f.6: enabled 0
647 07:04:56.286738 PCI: 00:1f.7: enabled 0
648 07:04:56.287233 APIC: 00: enabled 1
649 07:04:56.290481 GENERIC: 0.0: enabled 1
650 07:04:56.293807 GENERIC: 0.0: enabled 1
651 07:04:56.296925 GENERIC: 1.0: enabled 1
652 07:04:56.297439 GENERIC: 0.0: enabled 1
653 07:04:56.300548 GENERIC: 1.0: enabled 1
654 07:04:56.303652 USB0 port 0: enabled 1
655 07:04:56.304245 GENERIC: 0.0: enabled 1
656 07:04:56.306844 USB0 port 0: enabled 1
657 07:04:56.310387 GENERIC: 0.0: enabled 1
658 07:04:56.313224 I2C: 00:1a: enabled 1
659 07:04:56.313714 I2C: 00:31: enabled 1
660 07:04:56.317278 I2C: 00:32: enabled 1
661 07:04:56.320250 I2C: 00:10: enabled 1
662 07:04:56.320843 I2C: 00:15: enabled 1
663 07:04:56.323443 GENERIC: 0.0: enabled 0
664 07:04:56.327255 GENERIC: 1.0: enabled 0
665 07:04:56.330106 GENERIC: 0.0: enabled 1
666 07:04:56.330636 SPI: 00: enabled 1
667 07:04:56.333423 SPI: 00: enabled 1
668 07:04:56.333911 PNP: 0c09.0: enabled 1
669 07:04:56.337472 GENERIC: 0.0: enabled 1
670 07:04:56.339999 USB3 port 0: enabled 1
671 07:04:56.343917 USB3 port 1: enabled 1
672 07:04:56.344599 USB3 port 2: enabled 0
673 07:04:56.346367 USB3 port 3: enabled 0
674 07:04:56.350723 USB2 port 0: enabled 0
675 07:04:56.351214 USB2 port 1: enabled 1
676 07:04:56.353543 USB2 port 2: enabled 1
677 07:04:56.356462 USB2 port 3: enabled 0
678 07:04:56.356951 USB2 port 4: enabled 1
679 07:04:56.360541 USB2 port 5: enabled 0
680 07:04:56.363169 USB2 port 6: enabled 0
681 07:04:56.367193 USB2 port 7: enabled 0
682 07:04:56.367683 USB2 port 8: enabled 0
683 07:04:56.370299 USB2 port 9: enabled 0
684 07:04:56.373237 USB3 port 0: enabled 0
685 07:04:56.373733 USB3 port 1: enabled 1
686 07:04:56.376642 USB3 port 2: enabled 0
687 07:04:56.380068 USB3 port 3: enabled 0
688 07:04:56.383176 GENERIC: 0.0: enabled 1
689 07:04:56.383667 GENERIC: 1.0: enabled 1
690 07:04:56.386569 APIC: 01: enabled 1
691 07:04:56.390215 APIC: 05: enabled 1
692 07:04:56.390707 APIC: 06: enabled 1
693 07:04:56.393217 APIC: 03: enabled 1
694 07:04:56.393813 APIC: 02: enabled 1
695 07:04:56.396538 APIC: 04: enabled 1
696 07:04:56.399571 APIC: 07: enabled 1
697 07:04:56.400097 Compare with tree...
698 07:04:56.403124 Root Device: enabled 1
699 07:04:56.406540 DOMAIN: 0000: enabled 1
700 07:04:56.410692 PCI: 00:00.0: enabled 1
701 07:04:56.411300 PCI: 00:02.0: enabled 1
702 07:04:56.412869 PCI: 00:04.0: enabled 1
703 07:04:56.416601 GENERIC: 0.0: enabled 1
704 07:04:56.420084 PCI: 00:05.0: enabled 1
705 07:04:56.423441 PCI: 00:06.0: enabled 0
706 07:04:56.424037 PCI: 00:07.0: enabled 0
707 07:04:56.426768 GENERIC: 0.0: enabled 1
708 07:04:56.430161 PCI: 00:07.1: enabled 0
709 07:04:56.432905 GENERIC: 1.0: enabled 1
710 07:04:56.436685 PCI: 00:07.2: enabled 0
711 07:04:56.437285 GENERIC: 0.0: enabled 1
712 07:04:56.440363 PCI: 00:07.3: enabled 0
713 07:04:56.443138 GENERIC: 1.0: enabled 1
714 07:04:56.446575 PCI: 00:08.0: enabled 1
715 07:04:56.449700 PCI: 00:09.0: enabled 0
716 07:04:56.450328 PCI: 00:0a.0: enabled 0
717 07:04:56.453194 PCI: 00:0d.0: enabled 1
718 07:04:56.456294 USB0 port 0: enabled 1
719 07:04:56.459815 USB3 port 0: enabled 1
720 07:04:56.463261 USB3 port 1: enabled 1
721 07:04:56.463856 USB3 port 2: enabled 0
722 07:04:56.466656 USB3 port 3: enabled 0
723 07:04:56.469894 PCI: 00:0d.1: enabled 0
724 07:04:56.473147 PCI: 00:0d.2: enabled 0
725 07:04:56.476434 GENERIC: 0.0: enabled 1
726 07:04:56.476968 PCI: 00:0d.3: enabled 0
727 07:04:56.479485 PCI: 00:0e.0: enabled 0
728 07:04:56.483083 PCI: 00:10.2: enabled 1
729 07:04:56.486251 PCI: 00:10.6: enabled 0
730 07:04:56.489209 PCI: 00:10.7: enabled 0
731 07:04:56.489695 PCI: 00:12.0: enabled 0
732 07:04:56.493050 PCI: 00:12.6: enabled 0
733 07:04:56.496108 PCI: 00:13.0: enabled 0
734 07:04:56.500206 PCI: 00:14.0: enabled 1
735 07:04:56.502530 USB0 port 0: enabled 1
736 07:04:56.503020 USB2 port 0: enabled 0
737 07:04:56.506555 USB2 port 1: enabled 1
738 07:04:56.509684 USB2 port 2: enabled 1
739 07:04:56.512933 USB2 port 3: enabled 0
740 07:04:56.516955 USB2 port 4: enabled 1
741 07:04:56.519938 USB2 port 5: enabled 0
742 07:04:56.520428 USB2 port 6: enabled 0
743 07:04:56.522781 USB2 port 7: enabled 0
744 07:04:56.526747 USB2 port 8: enabled 0
745 07:04:56.529405 USB2 port 9: enabled 0
746 07:04:56.533354 USB3 port 0: enabled 0
747 07:04:56.536177 USB3 port 1: enabled 1
748 07:04:56.536768 USB3 port 2: enabled 0
749 07:04:56.539318 USB3 port 3: enabled 0
750 07:04:56.543454 PCI: 00:14.1: enabled 0
751 07:04:56.546389 PCI: 00:14.2: enabled 1
752 07:04:56.549760 PCI: 00:14.3: enabled 1
753 07:04:56.550377 GENERIC: 0.0: enabled 1
754 07:04:56.552990 PCI: 00:15.0: enabled 1
755 07:04:56.556157 I2C: 00:1a: enabled 1
756 07:04:56.559479 I2C: 00:31: enabled 1
757 07:04:56.559971 I2C: 00:32: enabled 1
758 07:04:56.563054 PCI: 00:15.1: enabled 1
759 07:04:56.565922 I2C: 00:10: enabled 1
760 07:04:56.569419 PCI: 00:15.2: enabled 1
761 07:04:56.572448 PCI: 00:15.3: enabled 1
762 07:04:56.573073 PCI: 00:16.0: enabled 1
763 07:04:56.576173 PCI: 00:16.1: enabled 0
764 07:04:56.579101 PCI: 00:16.2: enabled 0
765 07:04:56.582682 PCI: 00:16.3: enabled 0
766 07:04:56.585957 PCI: 00:16.4: enabled 0
767 07:04:56.586483 PCI: 00:16.5: enabled 0
768 07:04:56.589829 PCI: 00:17.0: enabled 1
769 07:04:56.594316 PCI: 00:19.0: enabled 0
770 07:04:56.594889 PCI: 00:19.1: enabled 1
771 07:04:56.597042 I2C: 00:15: enabled 1
772 07:04:56.599942 PCI: 00:19.2: enabled 0
773 07:04:56.603297 PCI: 00:1d.0: enabled 1
774 07:04:56.607034 GENERIC: 0.0: enabled 1
775 07:04:56.607620 PCI: 00:1e.0: enabled 1
776 07:04:56.609999 PCI: 00:1e.1: enabled 0
777 07:04:56.614046 PCI: 00:1e.2: enabled 1
778 07:04:56.616980 SPI: 00: enabled 1
779 07:04:56.617566 PCI: 00:1e.3: enabled 1
780 07:04:56.620137 SPI: 00: enabled 1
781 07:04:56.623503 PCI: 00:1f.0: enabled 1
782 07:04:56.674835 PNP: 0c09.0: enabled 1
783 07:04:56.675455 PCI: 00:1f.1: enabled 0
784 07:04:56.675850 PCI: 00:1f.2: enabled 1
785 07:04:56.676578 GENERIC: 0.0: enabled 1
786 07:04:56.677058 GENERIC: 0.0: enabled 1
787 07:04:56.677428 GENERIC: 1.0: enabled 1
788 07:04:56.677778 PCI: 00:1f.3: enabled 1
789 07:04:56.678126 PCI: 00:1f.4: enabled 0
790 07:04:56.678520 PCI: 00:1f.5: enabled 1
791 07:04:56.678856 PCI: 00:1f.6: enabled 0
792 07:04:56.679539 PCI: 00:1f.7: enabled 0
793 07:04:56.679907 CPU_CLUSTER: 0: enabled 1
794 07:04:56.680242 APIC: 00: enabled 1
795 07:04:56.680571 APIC: 01: enabled 1
796 07:04:56.680894 APIC: 05: enabled 1
797 07:04:56.681222 APIC: 06: enabled 1
798 07:04:56.681581 APIC: 03: enabled 1
799 07:04:56.681910 APIC: 02: enabled 1
800 07:04:56.682278 APIC: 04: enabled 1
801 07:04:56.682633 APIC: 07: enabled 1
802 07:04:56.699436 Root Device scanning...
803 07:04:56.700049 scan_static_bus for Root Device
804 07:04:56.700444 DOMAIN: 0000 enabled
805 07:04:56.700812 CPU_CLUSTER: 0 enabled
806 07:04:56.701168 DOMAIN: 0000 scanning...
807 07:04:56.701883 PCI: pci_scan_bus for bus 00
808 07:04:56.702304 PCI: 00:00.0 [8086/0000] ops
809 07:04:56.703051 PCI: 00:00.0 [8086/9a12] enabled
810 07:04:56.703429 PCI: 00:02.0 [8086/0000] bus ops
811 07:04:56.707292 PCI: 00:02.0 [8086/9a40] enabled
812 07:04:56.707880 PCI: 00:04.0 [8086/0000] bus ops
813 07:04:56.709141 PCI: 00:04.0 [8086/9a03] enabled
814 07:04:56.712257 PCI: 00:05.0 [8086/9a19] enabled
815 07:04:56.715838 PCI: 00:07.0 [0000/0000] hidden
816 07:04:56.718815 PCI: 00:08.0 [8086/9a11] enabled
817 07:04:56.722566 PCI: 00:0a.0 [8086/9a0d] disabled
818 07:04:56.726111 PCI: 00:0d.0 [8086/0000] bus ops
819 07:04:56.729358 PCI: 00:0d.0 [8086/9a13] enabled
820 07:04:56.732602 PCI: 00:14.0 [8086/0000] bus ops
821 07:04:56.735575 PCI: 00:14.0 [8086/a0ed] enabled
822 07:04:56.739483 PCI: 00:14.2 [8086/a0ef] enabled
823 07:04:56.742705 PCI: 00:14.3 [8086/0000] bus ops
824 07:04:56.745605 PCI: 00:14.3 [8086/a0f0] enabled
825 07:04:56.749905 PCI: 00:15.0 [8086/0000] bus ops
826 07:04:56.752773 PCI: 00:15.0 [8086/a0e8] enabled
827 07:04:56.755676 PCI: 00:15.1 [8086/0000] bus ops
828 07:04:56.758787 PCI: 00:15.1 [8086/a0e9] enabled
829 07:04:56.762582 PCI: 00:15.2 [8086/0000] bus ops
830 07:04:56.766736 PCI: 00:15.2 [8086/a0ea] enabled
831 07:04:56.769528 PCI: 00:15.3 [8086/0000] bus ops
832 07:04:56.772205 PCI: 00:15.3 [8086/a0eb] enabled
833 07:04:56.775744 PCI: 00:16.0 [8086/0000] ops
834 07:04:56.778848 PCI: 00:16.0 [8086/a0e0] enabled
835 07:04:56.785960 PCI: Static device PCI: 00:17.0 not found, disabling it.
836 07:04:56.789304 PCI: 00:19.0 [8086/0000] bus ops
837 07:04:56.792425 PCI: 00:19.0 [8086/a0c5] disabled
838 07:04:56.795750 PCI: 00:19.1 [8086/0000] bus ops
839 07:04:56.799842 PCI: 00:19.1 [8086/a0c6] enabled
840 07:04:56.802496 PCI: 00:1d.0 [8086/0000] bus ops
841 07:04:56.805861 PCI: 00:1d.0 [8086/a0b0] enabled
842 07:04:56.809544 PCI: 00:1e.0 [8086/0000] ops
843 07:04:56.812495 PCI: 00:1e.0 [8086/a0a8] enabled
844 07:04:56.815344 PCI: 00:1e.2 [8086/0000] bus ops
845 07:04:56.818979 PCI: 00:1e.2 [8086/a0aa] enabled
846 07:04:56.822577 PCI: 00:1e.3 [8086/0000] bus ops
847 07:04:56.825566 PCI: 00:1e.3 [8086/a0ab] enabled
848 07:04:56.828899 PCI: 00:1f.0 [8086/0000] bus ops
849 07:04:56.831974 PCI: 00:1f.0 [8086/a087] enabled
850 07:04:56.832476 RTC Init
851 07:04:56.835748 Set power on after power failure.
852 07:04:56.838840 Disabling Deep S3
853 07:04:56.842526 Disabling Deep S3
854 07:04:56.843107 Disabling Deep S4
855 07:04:56.845771 Disabling Deep S4
856 07:04:56.846296 Disabling Deep S5
857 07:04:56.848801 Disabling Deep S5
858 07:04:56.852248 PCI: 00:1f.2 [0000/0000] hidden
859 07:04:56.855806 PCI: 00:1f.3 [8086/0000] bus ops
860 07:04:56.858991 PCI: 00:1f.3 [8086/a0c8] enabled
861 07:04:56.862669 PCI: 00:1f.5 [8086/0000] bus ops
862 07:04:56.865367 PCI: 00:1f.5 [8086/a0a4] enabled
863 07:04:56.869526 PCI: Leftover static devices:
864 07:04:56.870013 PCI: 00:10.2
865 07:04:56.872114 PCI: 00:10.6
866 07:04:56.872592 PCI: 00:10.7
867 07:04:56.872975 PCI: 00:06.0
868 07:04:56.875338 PCI: 00:07.1
869 07:04:56.875846 PCI: 00:07.2
870 07:04:56.878809 PCI: 00:07.3
871 07:04:56.879288 PCI: 00:09.0
872 07:04:56.879665 PCI: 00:0d.1
873 07:04:56.882086 PCI: 00:0d.2
874 07:04:56.882628 PCI: 00:0d.3
875 07:04:56.885871 PCI: 00:0e.0
876 07:04:56.886498 PCI: 00:12.0
877 07:04:56.889280 PCI: 00:12.6
878 07:04:56.889857 PCI: 00:13.0
879 07:04:56.890295 PCI: 00:14.1
880 07:04:56.891780 PCI: 00:16.1
881 07:04:56.892260 PCI: 00:16.2
882 07:04:56.895122 PCI: 00:16.3
883 07:04:56.895608 PCI: 00:16.4
884 07:04:56.895990 PCI: 00:16.5
885 07:04:56.898722 PCI: 00:17.0
886 07:04:56.899324 PCI: 00:19.2
887 07:04:56.902103 PCI: 00:1e.1
888 07:04:56.902736 PCI: 00:1f.1
889 07:04:56.903125 PCI: 00:1f.4
890 07:04:56.905461 PCI: 00:1f.6
891 07:04:56.906061 PCI: 00:1f.7
892 07:04:56.908403 PCI: Check your devicetree.cb.
893 07:04:56.912163 PCI: 00:02.0 scanning...
894 07:04:56.915256 scan_generic_bus for PCI: 00:02.0
895 07:04:56.918419 scan_generic_bus for PCI: 00:02.0 done
896 07:04:56.925557 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
897 07:04:56.926178 PCI: 00:04.0 scanning...
898 07:04:56.932179 scan_generic_bus for PCI: 00:04.0
899 07:04:56.932743 GENERIC: 0.0 enabled
900 07:04:56.939317 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
901 07:04:56.942530 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
902 07:04:56.945980 PCI: 00:0d.0 scanning...
903 07:04:56.948852 scan_static_bus for PCI: 00:0d.0
904 07:04:56.951886 USB0 port 0 enabled
905 07:04:56.955926 USB0 port 0 scanning...
906 07:04:56.959024 scan_static_bus for USB0 port 0
907 07:04:56.959616 USB3 port 0 enabled
908 07:04:56.962310 USB3 port 1 enabled
909 07:04:56.965800 USB3 port 2 disabled
910 07:04:56.966430 USB3 port 3 disabled
911 07:04:56.968388 USB3 port 0 scanning...
912 07:04:56.971646 scan_static_bus for USB3 port 0
913 07:04:56.975061 scan_static_bus for USB3 port 0 done
914 07:04:56.978371 scan_bus: bus USB3 port 0 finished in 6 msecs
915 07:04:56.981968 USB3 port 1 scanning...
916 07:04:56.985105 scan_static_bus for USB3 port 1
917 07:04:56.988675 scan_static_bus for USB3 port 1 done
918 07:04:56.995972 scan_bus: bus USB3 port 1 finished in 6 msecs
919 07:04:56.998250 scan_static_bus for USB0 port 0 done
920 07:04:57.002071 scan_bus: bus USB0 port 0 finished in 43 msecs
921 07:04:57.005679 scan_static_bus for PCI: 00:0d.0 done
922 07:04:57.012175 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
923 07:04:57.015896 PCI: 00:14.0 scanning...
924 07:04:57.018434 scan_static_bus for PCI: 00:14.0
925 07:04:57.019034 USB0 port 0 enabled
926 07:04:57.021657 USB0 port 0 scanning...
927 07:04:57.025189 scan_static_bus for USB0 port 0
928 07:04:57.028240 USB2 port 0 disabled
929 07:04:57.028720 USB2 port 1 enabled
930 07:04:57.031732 USB2 port 2 enabled
931 07:04:57.035205 USB2 port 3 disabled
932 07:04:57.035691 USB2 port 4 enabled
933 07:04:57.038246 USB2 port 5 disabled
934 07:04:57.041328 USB2 port 6 disabled
935 07:04:57.041809 USB2 port 7 disabled
936 07:04:57.044985 USB2 port 8 disabled
937 07:04:57.048398 USB2 port 9 disabled
938 07:04:57.048978 USB3 port 0 disabled
939 07:04:57.052138 USB3 port 1 enabled
940 07:04:57.052727 USB3 port 2 disabled
941 07:04:57.054689 USB3 port 3 disabled
942 07:04:57.058229 USB2 port 1 scanning...
943 07:04:57.061607 scan_static_bus for USB2 port 1
944 07:04:57.065230 scan_static_bus for USB2 port 1 done
945 07:04:57.067783 scan_bus: bus USB2 port 1 finished in 6 msecs
946 07:04:57.071314 USB2 port 2 scanning...
947 07:04:57.075230 scan_static_bus for USB2 port 2
948 07:04:57.078044 scan_static_bus for USB2 port 2 done
949 07:04:57.084335 scan_bus: bus USB2 port 2 finished in 6 msecs
950 07:04:57.084946 USB2 port 4 scanning...
951 07:04:57.087741 scan_static_bus for USB2 port 4
952 07:04:57.094482 scan_static_bus for USB2 port 4 done
953 07:04:57.098888 scan_bus: bus USB2 port 4 finished in 6 msecs
954 07:04:57.101281 USB3 port 1 scanning...
955 07:04:57.104271 scan_static_bus for USB3 port 1
956 07:04:57.107829 scan_static_bus for USB3 port 1 done
957 07:04:57.112702 scan_bus: bus USB3 port 1 finished in 6 msecs
958 07:04:57.114502 scan_static_bus for USB0 port 0 done
959 07:04:57.121655 scan_bus: bus USB0 port 0 finished in 93 msecs
960 07:04:57.124868 scan_static_bus for PCI: 00:14.0 done
961 07:04:57.127935 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
962 07:04:57.131288 PCI: 00:14.3 scanning...
963 07:04:57.134035 scan_static_bus for PCI: 00:14.3
964 07:04:57.137532 GENERIC: 0.0 enabled
965 07:04:57.141761 scan_static_bus for PCI: 00:14.3 done
966 07:04:57.143953 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
967 07:04:57.147576 PCI: 00:15.0 scanning...
968 07:04:57.150949 scan_static_bus for PCI: 00:15.0
969 07:04:57.154664 I2C: 00:1a enabled
970 07:04:57.155250 I2C: 00:31 enabled
971 07:04:57.157200 I2C: 00:32 enabled
972 07:04:57.161846 scan_static_bus for PCI: 00:15.0 done
973 07:04:57.164962 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
974 07:04:57.168475 PCI: 00:15.1 scanning...
975 07:04:57.172461 scan_static_bus for PCI: 00:15.1
976 07:04:57.174596 I2C: 00:10 enabled
977 07:04:57.177571 scan_static_bus for PCI: 00:15.1 done
978 07:04:57.181123 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
979 07:04:57.184641 PCI: 00:15.2 scanning...
980 07:04:57.187829 scan_static_bus for PCI: 00:15.2
981 07:04:57.191191 scan_static_bus for PCI: 00:15.2 done
982 07:04:57.198111 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
983 07:04:57.201822 PCI: 00:15.3 scanning...
984 07:04:57.204202 scan_static_bus for PCI: 00:15.3
985 07:04:57.207976 scan_static_bus for PCI: 00:15.3 done
986 07:04:57.211451 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
987 07:04:57.214578 PCI: 00:19.1 scanning...
988 07:04:57.217701 scan_static_bus for PCI: 00:19.1
989 07:04:57.221209 I2C: 00:15 enabled
990 07:04:57.224160 scan_static_bus for PCI: 00:19.1 done
991 07:04:57.227650 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
992 07:04:57.231234 PCI: 00:1d.0 scanning...
993 07:04:57.234202 do_pci_scan_bridge for PCI: 00:1d.0
994 07:04:57.238159 PCI: pci_scan_bus for bus 01
995 07:04:57.241247 PCI: 01:00.0 [1c5c/174a] enabled
996 07:04:57.244493 GENERIC: 0.0 enabled
997 07:04:57.247887 Enabling Common Clock Configuration
998 07:04:57.251661 L1 Sub-State supported from root port 29
999 07:04:57.254303 L1 Sub-State Support = 0xf
1000 07:04:57.257916 CommonModeRestoreTime = 0x28
1001 07:04:57.261158 Power On Value = 0x16, Power On Scale = 0x0
1002 07:04:57.264733 ASPM: Enabled L1
1003 07:04:57.268580 PCIe: Max_Payload_Size adjusted to 128
1004 07:04:57.270947 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1005 07:04:57.274639 PCI: 00:1e.2 scanning...
1006 07:04:57.277443 scan_generic_bus for PCI: 00:1e.2
1007 07:04:57.280784 SPI: 00 enabled
1008 07:04:57.287093 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1009 07:04:57.291436 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1010 07:04:57.294643 PCI: 00:1e.3 scanning...
1011 07:04:57.297468 scan_generic_bus for PCI: 00:1e.3
1012 07:04:57.297953 SPI: 00 enabled
1013 07:04:57.304050 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1014 07:04:57.310806 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1015 07:04:57.311390 PCI: 00:1f.0 scanning...
1016 07:04:57.314432 scan_static_bus for PCI: 00:1f.0
1017 07:04:57.317913 PNP: 0c09.0 enabled
1018 07:04:57.320339 PNP: 0c09.0 scanning...
1019 07:04:57.324410 scan_static_bus for PNP: 0c09.0
1020 07:04:57.327568 scan_static_bus for PNP: 0c09.0 done
1021 07:04:57.331019 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1022 07:04:57.337341 scan_static_bus for PCI: 00:1f.0 done
1023 07:04:57.340337 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1024 07:04:57.344613 PCI: 00:1f.2 scanning...
1025 07:04:57.346843 scan_static_bus for PCI: 00:1f.2
1026 07:04:57.347339 GENERIC: 0.0 enabled
1027 07:04:57.350485 GENERIC: 0.0 scanning...
1028 07:04:57.353358 scan_static_bus for GENERIC: 0.0
1029 07:04:57.357099 GENERIC: 0.0 enabled
1030 07:04:57.360813 GENERIC: 1.0 enabled
1031 07:04:57.364144 scan_static_bus for GENERIC: 0.0 done
1032 07:04:57.367029 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1033 07:04:57.370288 scan_static_bus for PCI: 00:1f.2 done
1034 07:04:57.377392 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1035 07:04:57.380216 PCI: 00:1f.3 scanning...
1036 07:04:57.383437 scan_static_bus for PCI: 00:1f.3
1037 07:04:57.388043 scan_static_bus for PCI: 00:1f.3 done
1038 07:04:57.390386 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1039 07:04:57.393803 PCI: 00:1f.5 scanning...
1040 07:04:57.397036 scan_generic_bus for PCI: 00:1f.5
1041 07:04:57.400303 scan_generic_bus for PCI: 00:1f.5 done
1042 07:04:57.406762 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1043 07:04:57.410185 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1044 07:04:57.413891 scan_static_bus for Root Device done
1045 07:04:57.420332 scan_bus: bus Root Device finished in 737 msecs
1046 07:04:57.420944 done
1047 07:04:57.427151 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1048 07:04:57.430221 Chrome EC: UHEPI supported
1049 07:04:57.437095 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1050 07:04:57.440110 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1051 07:04:57.446950 SPI flash protection: WPSW=0 SRP0=0
1052 07:04:57.449996 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1053 07:04:57.457113 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1054 07:04:57.460064 found VGA at PCI: 00:02.0
1055 07:04:57.463382 Setting up VGA for PCI: 00:02.0
1056 07:04:57.466549 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1057 07:04:57.473787 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1058 07:04:57.474397 Allocating resources...
1059 07:04:57.476402 Reading resources...
1060 07:04:57.480269 Root Device read_resources bus 0 link: 0
1061 07:04:57.486500 DOMAIN: 0000 read_resources bus 0 link: 0
1062 07:04:57.489827 PCI: 00:04.0 read_resources bus 1 link: 0
1063 07:04:57.496644 PCI: 00:04.0 read_resources bus 1 link: 0 done
1064 07:04:57.500017 PCI: 00:0d.0 read_resources bus 0 link: 0
1065 07:04:57.502961 USB0 port 0 read_resources bus 0 link: 0
1066 07:04:57.510604 USB0 port 0 read_resources bus 0 link: 0 done
1067 07:04:57.513643 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1068 07:04:57.520620 PCI: 00:14.0 read_resources bus 0 link: 0
1069 07:04:57.523217 USB0 port 0 read_resources bus 0 link: 0
1070 07:04:57.530287 USB0 port 0 read_resources bus 0 link: 0 done
1071 07:04:57.533505 PCI: 00:14.0 read_resources bus 0 link: 0 done
1072 07:04:57.539892 PCI: 00:14.3 read_resources bus 0 link: 0
1073 07:04:57.543182 PCI: 00:14.3 read_resources bus 0 link: 0 done
1074 07:04:57.550334 PCI: 00:15.0 read_resources bus 0 link: 0
1075 07:04:57.553133 PCI: 00:15.0 read_resources bus 0 link: 0 done
1076 07:04:57.560042 PCI: 00:15.1 read_resources bus 0 link: 0
1077 07:04:57.563038 PCI: 00:15.1 read_resources bus 0 link: 0 done
1078 07:04:57.570291 PCI: 00:19.1 read_resources bus 0 link: 0
1079 07:04:57.573566 PCI: 00:19.1 read_resources bus 0 link: 0 done
1080 07:04:57.580002 PCI: 00:1d.0 read_resources bus 1 link: 0
1081 07:04:57.583888 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1082 07:04:57.590349 PCI: 00:1e.2 read_resources bus 2 link: 0
1083 07:04:57.593933 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1084 07:04:57.600747 PCI: 00:1e.3 read_resources bus 3 link: 0
1085 07:04:57.603978 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1086 07:04:57.610881 PCI: 00:1f.0 read_resources bus 0 link: 0
1087 07:04:57.613479 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1088 07:04:57.617184 PCI: 00:1f.2 read_resources bus 0 link: 0
1089 07:04:57.624066 GENERIC: 0.0 read_resources bus 0 link: 0
1090 07:04:57.627418 GENERIC: 0.0 read_resources bus 0 link: 0 done
1091 07:04:57.633986 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1092 07:04:57.639890 DOMAIN: 0000 read_resources bus 0 link: 0 done
1093 07:04:57.643716 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1094 07:04:57.650274 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1095 07:04:57.653281 Root Device read_resources bus 0 link: 0 done
1096 07:04:57.657124 Done reading resources.
1097 07:04:57.660728 Show resources in subtree (Root Device)...After reading.
1098 07:04:57.667088 Root Device child on link 0 DOMAIN: 0000
1099 07:04:57.670374 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1100 07:04:57.680167 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1101 07:04:57.689784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1102 07:04:57.690414 PCI: 00:00.0
1103 07:04:57.700262 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1104 07:04:57.710262 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1105 07:04:57.719974 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1106 07:04:57.729813 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1107 07:04:57.740031 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1108 07:04:57.747133 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1109 07:04:57.756786 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1110 07:04:57.766703 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1111 07:04:57.775952 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1112 07:04:57.786430 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1113 07:04:57.793228 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1114 07:04:57.802591 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1115 07:04:57.813035 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1116 07:04:57.823428 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1117 07:04:57.832164 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1118 07:04:57.842462 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1119 07:04:57.852342 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1120 07:04:57.859883 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1121 07:04:57.869004 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1122 07:04:57.879735 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1123 07:04:57.882460 PCI: 00:02.0
1124 07:04:57.892476 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 07:04:57.902805 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 07:04:57.908729 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 07:04:57.915493 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1128 07:04:57.926298 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1129 07:04:57.926889 GENERIC: 0.0
1130 07:04:57.928815 PCI: 00:05.0
1131 07:04:57.938581 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 07:04:57.942186 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1133 07:04:57.945836 GENERIC: 0.0
1134 07:04:57.946349 PCI: 00:08.0
1135 07:04:57.956939 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 07:04:57.958329 PCI: 00:0a.0
1137 07:04:57.962479 PCI: 00:0d.0 child on link 0 USB0 port 0
1138 07:04:57.972278 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1139 07:04:57.975237 USB0 port 0 child on link 0 USB3 port 0
1140 07:04:57.978533 USB3 port 0
1141 07:04:57.979016 USB3 port 1
1142 07:04:57.981710 USB3 port 2
1143 07:04:57.982227 USB3 port 3
1144 07:04:57.989045 PCI: 00:14.0 child on link 0 USB0 port 0
1145 07:04:57.999059 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1146 07:04:58.002562 USB0 port 0 child on link 0 USB2 port 0
1147 07:04:58.005944 USB2 port 0
1148 07:04:58.006475 USB2 port 1
1149 07:04:58.008437 USB2 port 2
1150 07:04:58.008920 USB2 port 3
1151 07:04:58.012032 USB2 port 4
1152 07:04:58.012565 USB2 port 5
1153 07:04:58.015705 USB2 port 6
1154 07:04:58.016286 USB2 port 7
1155 07:04:58.019282 USB2 port 8
1156 07:04:58.019877 USB2 port 9
1157 07:04:58.022064 USB3 port 0
1158 07:04:58.025123 USB3 port 1
1159 07:04:58.025769 USB3 port 2
1160 07:04:58.028642 USB3 port 3
1161 07:04:58.029227 PCI: 00:14.2
1162 07:04:58.038829 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1163 07:04:58.048369 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1164 07:04:58.052665 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1165 07:04:58.061548 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1166 07:04:58.065121 GENERIC: 0.0
1167 07:04:58.068879 PCI: 00:15.0 child on link 0 I2C: 00:1a
1168 07:04:58.078220 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 07:04:58.081790 I2C: 00:1a
1170 07:04:58.082324 I2C: 00:31
1171 07:04:58.085227 I2C: 00:32
1172 07:04:58.089075 PCI: 00:15.1 child on link 0 I2C: 00:10
1173 07:04:58.098626 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 07:04:58.099205 I2C: 00:10
1175 07:04:58.101923 PCI: 00:15.2
1176 07:04:58.112016 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 07:04:58.112599 PCI: 00:15.3
1178 07:04:58.121684 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 07:04:58.124716 PCI: 00:16.0
1180 07:04:58.135123 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 07:04:58.135726 PCI: 00:19.0
1182 07:04:58.141572 PCI: 00:19.1 child on link 0 I2C: 00:15
1183 07:04:58.151077 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 07:04:58.151666 I2C: 00:15
1185 07:04:58.157863 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1186 07:04:58.165482 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1187 07:04:58.174831 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1188 07:04:58.184791 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1189 07:04:58.185393 GENERIC: 0.0
1190 07:04:58.188016 PCI: 01:00.0
1191 07:04:58.198209 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 07:04:58.208352 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1193 07:04:58.214668 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1194 07:04:58.218066 PCI: 00:1e.0
1195 07:04:58.228695 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1196 07:04:58.232108 PCI: 00:1e.2 child on link 0 SPI: 00
1197 07:04:58.241994 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1198 07:04:58.245139 SPI: 00
1199 07:04:58.248117 PCI: 00:1e.3 child on link 0 SPI: 00
1200 07:04:58.257850 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 07:04:58.258389 SPI: 00
1202 07:04:58.264982 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1203 07:04:58.271349 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1204 07:04:58.275613 PNP: 0c09.0
1205 07:04:58.281131 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1206 07:04:58.288243 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1207 07:04:58.298514 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1208 07:04:58.305047 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1209 07:04:58.311459 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1210 07:04:58.312059 GENERIC: 0.0
1211 07:04:58.314805 GENERIC: 1.0
1212 07:04:58.315401 PCI: 00:1f.3
1213 07:04:58.325464 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 07:04:58.338495 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1215 07:04:58.339133 PCI: 00:1f.5
1216 07:04:58.348027 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1217 07:04:58.351449 CPU_CLUSTER: 0 child on link 0 APIC: 00
1218 07:04:58.351942 APIC: 00
1219 07:04:58.354686 APIC: 01
1220 07:04:58.355281 APIC: 05
1221 07:04:58.357855 APIC: 06
1222 07:04:58.358387 APIC: 03
1223 07:04:58.358780 APIC: 02
1224 07:04:58.360943 APIC: 04
1225 07:04:58.361434 APIC: 07
1226 07:04:58.367836 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1227 07:04:58.375499 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1228 07:04:58.380975 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1229 07:04:58.388141 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1230 07:04:58.391199 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1231 07:04:58.394533 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1232 07:04:58.401642 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1233 07:04:58.407959 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1234 07:04:58.414771 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 07:04:58.420975 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 07:04:58.428063 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1237 07:04:58.434590 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1238 07:04:58.444375 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1239 07:04:58.451351 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1240 07:04:58.458035 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1241 07:04:58.461596 DOMAIN: 0000: Resource ranges:
1242 07:04:58.464132 * Base: 1000, Size: 800, Tag: 100
1243 07:04:58.467734 * Base: 1900, Size: e700, Tag: 100
1244 07:04:58.474261 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1245 07:04:58.481479 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1246 07:04:58.487465 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1247 07:04:58.494318 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1248 07:04:58.504010 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1249 07:04:58.510703 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1250 07:04:58.517426 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1251 07:04:58.527328 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1252 07:04:58.534821 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1253 07:04:58.540552 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1254 07:04:58.550415 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1255 07:04:58.556874 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1256 07:04:58.564227 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1257 07:04:58.574261 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1258 07:04:58.580254 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1259 07:04:58.586634 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1260 07:04:58.593250 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1261 07:04:58.604011 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1262 07:04:58.610317 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1263 07:04:58.620209 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1264 07:04:58.626900 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1265 07:04:58.633403 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1266 07:04:58.640105 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1267 07:04:58.651246 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1268 07:04:58.656590 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1269 07:04:58.659894 DOMAIN: 0000: Resource ranges:
1270 07:04:58.663526 * Base: 7fc00000, Size: 40400000, Tag: 200
1271 07:04:58.669752 * Base: d0000000, Size: 28000000, Tag: 200
1272 07:04:58.672847 * Base: fa000000, Size: 1000000, Tag: 200
1273 07:04:58.676445 * Base: fb001000, Size: 2fff000, Tag: 200
1274 07:04:58.683135 * Base: fe010000, Size: 2e000, Tag: 200
1275 07:04:58.686531 * Base: fe03f000, Size: d41000, Tag: 200
1276 07:04:58.690348 * Base: fed88000, Size: 8000, Tag: 200
1277 07:04:58.693066 * Base: fed93000, Size: d000, Tag: 200
1278 07:04:58.696691 * Base: feda2000, Size: 1e000, Tag: 200
1279 07:04:58.703102 * Base: fede0000, Size: 1220000, Tag: 200
1280 07:04:58.706208 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1281 07:04:58.713157 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1282 07:04:58.719549 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1283 07:04:58.726756 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1284 07:04:58.733172 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1285 07:04:58.739590 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1286 07:04:58.745914 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1287 07:04:58.753657 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1288 07:04:58.760155 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1289 07:04:58.766255 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1290 07:04:58.773228 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1291 07:04:58.779755 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1292 07:04:58.786102 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1293 07:04:58.792459 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1294 07:04:58.799957 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1295 07:04:58.806559 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1296 07:04:58.812839 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1297 07:04:58.819063 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1298 07:04:58.825698 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1299 07:04:58.832476 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1300 07:04:58.839359 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1301 07:04:58.846472 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1302 07:04:58.852206 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1303 07:04:58.862379 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1304 07:04:58.868973 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1305 07:04:58.872710 PCI: 00:1d.0: Resource ranges:
1306 07:04:58.875714 * Base: 7fc00000, Size: 100000, Tag: 200
1307 07:04:58.881986 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1308 07:04:58.888768 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1309 07:04:58.895544 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1310 07:04:58.905736 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1311 07:04:58.912054 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1312 07:04:58.915936 Root Device assign_resources, bus 0 link: 0
1313 07:04:58.922078 DOMAIN: 0000 assign_resources, bus 0 link: 0
1314 07:04:58.929319 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1315 07:04:58.938607 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1316 07:04:58.945366 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1317 07:04:58.955070 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1318 07:04:58.959085 PCI: 00:04.0 assign_resources, bus 1 link: 0
1319 07:04:58.961791 PCI: 00:04.0 assign_resources, bus 1 link: 0
1320 07:04:58.971858 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1321 07:04:58.978709 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1322 07:04:58.988498 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1323 07:04:58.991553 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1324 07:04:58.998543 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1325 07:04:59.004902 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1326 07:04:59.008584 PCI: 00:14.0 assign_resources, bus 0 link: 0
1327 07:04:59.014749 PCI: 00:14.0 assign_resources, bus 0 link: 0
1328 07:04:59.021885 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1329 07:04:59.031857 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1330 07:04:59.038398 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1331 07:04:59.045137 PCI: 00:14.3 assign_resources, bus 0 link: 0
1332 07:04:59.047960 PCI: 00:14.3 assign_resources, bus 0 link: 0
1333 07:04:59.054796 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1334 07:04:59.061851 PCI: 00:15.0 assign_resources, bus 0 link: 0
1335 07:04:59.064369 PCI: 00:15.0 assign_resources, bus 0 link: 0
1336 07:04:59.074263 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1337 07:04:59.078279 PCI: 00:15.1 assign_resources, bus 0 link: 0
1338 07:04:59.084070 PCI: 00:15.1 assign_resources, bus 0 link: 0
1339 07:04:59.091389 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1340 07:04:59.101029 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1341 07:04:59.107998 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1342 07:04:59.117798 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1343 07:04:59.120952 PCI: 00:19.1 assign_resources, bus 0 link: 0
1344 07:04:59.124259 PCI: 00:19.1 assign_resources, bus 0 link: 0
1345 07:04:59.134365 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1346 07:04:59.143973 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1347 07:04:59.150893 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1348 07:04:59.157639 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 07:04:59.164090 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1350 07:04:59.173938 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1351 07:04:59.180943 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1352 07:04:59.183643 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1353 07:04:59.194202 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1354 07:04:59.197738 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1355 07:04:59.204881 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1356 07:04:59.211576 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1357 07:04:59.217211 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1358 07:04:59.221000 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1359 07:04:59.223873 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1360 07:04:59.231309 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1361 07:04:59.234303 LPC: Trying to open IO window from 800 size 1ff
1362 07:04:59.244110 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1363 07:04:59.251086 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1364 07:04:59.260556 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1365 07:04:59.265647 DOMAIN: 0000 assign_resources, bus 0 link: 0
1366 07:04:59.267225 Root Device assign_resources, bus 0 link: 0
1367 07:04:59.271002 Done setting resources.
1368 07:04:59.277846 Show resources in subtree (Root Device)...After assigning values.
1369 07:04:59.280511 Root Device child on link 0 DOMAIN: 0000
1370 07:04:59.287139 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1371 07:04:59.297375 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1372 07:04:59.307806 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1373 07:04:59.308399 PCI: 00:00.0
1374 07:04:59.318300 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1375 07:04:59.327640 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1376 07:04:59.337586 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1377 07:04:59.344552 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1378 07:04:59.353534 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1379 07:04:59.364263 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1380 07:04:59.373745 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1381 07:04:59.383491 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1382 07:04:59.394018 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1383 07:04:59.399893 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1384 07:04:59.409819 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1385 07:04:59.419707 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1386 07:04:59.429749 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1387 07:04:59.439654 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1388 07:04:59.446096 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1389 07:04:59.456541 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1390 07:04:59.466568 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1391 07:04:59.476231 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1392 07:04:59.485808 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1393 07:04:59.496463 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1394 07:04:59.497061 PCI: 00:02.0
1395 07:04:59.509447 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1396 07:04:59.519550 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1397 07:04:59.529523 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1398 07:04:59.532613 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1399 07:04:59.543031 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1400 07:04:59.545634 GENERIC: 0.0
1401 07:04:59.546122 PCI: 00:05.0
1402 07:04:59.556731 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1403 07:04:59.562107 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1404 07:04:59.562707 GENERIC: 0.0
1405 07:04:59.565214 PCI: 00:08.0
1406 07:04:59.575463 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1407 07:04:59.576051 PCI: 00:0a.0
1408 07:04:59.581989 PCI: 00:0d.0 child on link 0 USB0 port 0
1409 07:04:59.592126 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1410 07:04:59.595443 USB0 port 0 child on link 0 USB3 port 0
1411 07:04:59.598668 USB3 port 0
1412 07:04:59.599161 USB3 port 1
1413 07:04:59.602510 USB3 port 2
1414 07:04:59.602999 USB3 port 3
1415 07:04:59.609475 PCI: 00:14.0 child on link 0 USB0 port 0
1416 07:04:59.619254 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1417 07:04:59.622673 USB0 port 0 child on link 0 USB2 port 0
1418 07:04:59.626068 USB2 port 0
1419 07:04:59.626697 USB2 port 1
1420 07:04:59.629494 USB2 port 2
1421 07:04:59.630082 USB2 port 3
1422 07:04:59.632533 USB2 port 4
1423 07:04:59.633127 USB2 port 5
1424 07:04:59.635747 USB2 port 6
1425 07:04:59.636341 USB2 port 7
1426 07:04:59.638790 USB2 port 8
1427 07:04:59.639384 USB2 port 9
1428 07:04:59.642446 USB3 port 0
1429 07:04:59.643042 USB3 port 1
1430 07:04:59.645806 USB3 port 2
1431 07:04:59.646485 USB3 port 3
1432 07:04:59.649071 PCI: 00:14.2
1433 07:04:59.659206 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1434 07:04:59.668821 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1435 07:04:59.675668 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1436 07:04:59.685391 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1437 07:04:59.685933 GENERIC: 0.0
1438 07:04:59.692358 PCI: 00:15.0 child on link 0 I2C: 00:1a
1439 07:04:59.701797 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1440 07:04:59.702446 I2C: 00:1a
1441 07:04:59.705381 I2C: 00:31
1442 07:04:59.705976 I2C: 00:32
1443 07:04:59.708965 PCI: 00:15.1 child on link 0 I2C: 00:10
1444 07:04:59.719126 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1445 07:04:59.722069 I2C: 00:10
1446 07:04:59.722697 PCI: 00:15.2
1447 07:04:59.735828 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1448 07:04:59.736455 PCI: 00:15.3
1449 07:04:59.744911 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1450 07:04:59.748802 PCI: 00:16.0
1451 07:04:59.758529 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1452 07:04:59.759117 PCI: 00:19.0
1453 07:04:59.765399 PCI: 00:19.1 child on link 0 I2C: 00:15
1454 07:04:59.775497 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1455 07:04:59.776124 I2C: 00:15
1456 07:04:59.781644 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1457 07:04:59.788173 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1458 07:04:59.801533 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1459 07:04:59.811883 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1460 07:04:59.814973 GENERIC: 0.0
1461 07:04:59.815459 PCI: 01:00.0
1462 07:04:59.824871 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1463 07:04:59.834869 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1464 07:04:59.844667 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1465 07:04:59.847932 PCI: 00:1e.0
1466 07:04:59.858924 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1467 07:04:59.864697 PCI: 00:1e.2 child on link 0 SPI: 00
1468 07:04:59.875161 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1469 07:04:59.875653 SPI: 00
1470 07:04:59.877474 PCI: 00:1e.3 child on link 0 SPI: 00
1471 07:04:59.887349 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1472 07:04:59.890721 SPI: 00
1473 07:04:59.894049 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1474 07:04:59.904036 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1475 07:04:59.904634 PNP: 0c09.0
1476 07:04:59.914552 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1477 07:04:59.917487 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1478 07:04:59.927987 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1479 07:04:59.937656 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1480 07:04:59.941198 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1481 07:04:59.944267 GENERIC: 0.0
1482 07:04:59.944846 GENERIC: 1.0
1483 07:04:59.947330 PCI: 00:1f.3
1484 07:04:59.957742 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1485 07:04:59.967704 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1486 07:04:59.970742 PCI: 00:1f.5
1487 07:04:59.981174 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1488 07:04:59.984044 CPU_CLUSTER: 0 child on link 0 APIC: 00
1489 07:04:59.984567 APIC: 00
1490 07:04:59.987522 APIC: 01
1491 07:04:59.988004 APIC: 05
1492 07:04:59.990791 APIC: 06
1493 07:04:59.991302 APIC: 03
1494 07:04:59.991692 APIC: 02
1495 07:04:59.994111 APIC: 04
1496 07:04:59.994621 APIC: 07
1497 07:04:59.997165 Done allocating resources.
1498 07:05:00.004041 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1499 07:05:00.010579 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1500 07:05:00.013758 Configure GPIOs for I2S audio on UP4.
1501 07:05:00.020760 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1502 07:05:00.023721 Enabling resources...
1503 07:05:00.027191 PCI: 00:00.0 subsystem <- 8086/9a12
1504 07:05:00.027789 PCI: 00:00.0 cmd <- 06
1505 07:05:00.034379 PCI: 00:02.0 subsystem <- 8086/9a40
1506 07:05:00.034974 PCI: 00:02.0 cmd <- 03
1507 07:05:00.037400 PCI: 00:04.0 subsystem <- 8086/9a03
1508 07:05:00.040771 PCI: 00:04.0 cmd <- 02
1509 07:05:00.044436 PCI: 00:05.0 subsystem <- 8086/9a19
1510 07:05:00.047017 PCI: 00:05.0 cmd <- 02
1511 07:05:00.050833 PCI: 00:08.0 subsystem <- 8086/9a11
1512 07:05:00.053605 PCI: 00:08.0 cmd <- 06
1513 07:05:00.057551 PCI: 00:0d.0 subsystem <- 8086/9a13
1514 07:05:00.060176 PCI: 00:0d.0 cmd <- 02
1515 07:05:00.063871 PCI: 00:14.0 subsystem <- 8086/a0ed
1516 07:05:00.067108 PCI: 00:14.0 cmd <- 02
1517 07:05:00.070855 PCI: 00:14.2 subsystem <- 8086/a0ef
1518 07:05:00.071451 PCI: 00:14.2 cmd <- 02
1519 07:05:00.077607 PCI: 00:14.3 subsystem <- 8086/a0f0
1520 07:05:00.078242 PCI: 00:14.3 cmd <- 02
1521 07:05:00.080362 PCI: 00:15.0 subsystem <- 8086/a0e8
1522 07:05:00.083933 PCI: 00:15.0 cmd <- 02
1523 07:05:00.087103 PCI: 00:15.1 subsystem <- 8086/a0e9
1524 07:05:00.091101 PCI: 00:15.1 cmd <- 02
1525 07:05:00.094084 PCI: 00:15.2 subsystem <- 8086/a0ea
1526 07:05:00.096857 PCI: 00:15.2 cmd <- 02
1527 07:05:00.100113 PCI: 00:15.3 subsystem <- 8086/a0eb
1528 07:05:00.103395 PCI: 00:15.3 cmd <- 02
1529 07:05:00.106762 PCI: 00:16.0 subsystem <- 8086/a0e0
1530 07:05:00.110098 PCI: 00:16.0 cmd <- 02
1531 07:05:00.113694 PCI: 00:19.1 subsystem <- 8086/a0c6
1532 07:05:00.116860 PCI: 00:19.1 cmd <- 02
1533 07:05:00.120444 PCI: 00:1d.0 bridge ctrl <- 0013
1534 07:05:00.123470 PCI: 00:1d.0 subsystem <- 8086/a0b0
1535 07:05:00.123963 PCI: 00:1d.0 cmd <- 06
1536 07:05:00.130697 PCI: 00:1e.0 subsystem <- 8086/a0a8
1537 07:05:00.131295 PCI: 00:1e.0 cmd <- 06
1538 07:05:00.133509 PCI: 00:1e.2 subsystem <- 8086/a0aa
1539 07:05:00.136922 PCI: 00:1e.2 cmd <- 06
1540 07:05:00.140791 PCI: 00:1e.3 subsystem <- 8086/a0ab
1541 07:05:00.144147 PCI: 00:1e.3 cmd <- 02
1542 07:05:00.147414 PCI: 00:1f.0 subsystem <- 8086/a087
1543 07:05:00.150654 PCI: 00:1f.0 cmd <- 407
1544 07:05:00.153674 PCI: 00:1f.3 subsystem <- 8086/a0c8
1545 07:05:00.156774 PCI: 00:1f.3 cmd <- 02
1546 07:05:00.160145 PCI: 00:1f.5 subsystem <- 8086/a0a4
1547 07:05:00.163849 PCI: 00:1f.5 cmd <- 406
1548 07:05:00.166820 PCI: 01:00.0 cmd <- 02
1549 07:05:00.171679 done.
1550 07:05:00.175043 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1551 07:05:00.178309 Initializing devices...
1552 07:05:00.181581 Root Device init
1553 07:05:00.184741 Chrome EC: Set SMI mask to 0x0000000000000000
1554 07:05:00.191135 Chrome EC: clear events_b mask to 0x0000000000000000
1555 07:05:00.198428 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1556 07:05:00.201424 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1557 07:05:00.207772 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1558 07:05:00.214935 Chrome EC: Set WAKE mask to 0x0000000000000000
1559 07:05:00.218010 fw_config match found: DB_USB=USB3_ACTIVE
1560 07:05:00.224996 Configure Right Type-C port orientation for retimer
1561 07:05:00.228146 Root Device init finished in 42 msecs
1562 07:05:00.231255 PCI: 00:00.0 init
1563 07:05:00.231842 CPU TDP = 9 Watts
1564 07:05:00.234717 CPU PL1 = 9 Watts
1565 07:05:00.237619 CPU PL2 = 40 Watts
1566 07:05:00.238225 CPU PL4 = 83 Watts
1567 07:05:00.240769 PCI: 00:00.0 init finished in 8 msecs
1568 07:05:00.244193 PCI: 00:02.0 init
1569 07:05:00.247209 GMA: Found VBT in CBFS
1570 07:05:00.251031 GMA: Found valid VBT in CBFS
1571 07:05:00.254300 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1572 07:05:00.264606 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1573 07:05:00.267940 PCI: 00:02.0 init finished in 18 msecs
1574 07:05:00.271064 PCI: 00:05.0 init
1575 07:05:00.274294 PCI: 00:05.0 init finished in 0 msecs
1576 07:05:00.274938 PCI: 00:08.0 init
1577 07:05:00.280731 PCI: 00:08.0 init finished in 0 msecs
1578 07:05:00.281310 PCI: 00:14.0 init
1579 07:05:00.286895 PCI: 00:14.0 init finished in 0 msecs
1580 07:05:00.287384 PCI: 00:14.2 init
1581 07:05:00.290764 PCI: 00:14.2 init finished in 0 msecs
1582 07:05:00.294840 PCI: 00:15.0 init
1583 07:05:00.298169 I2C bus 0 version 0x3230302a
1584 07:05:00.301147 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1585 07:05:00.304119 PCI: 00:15.0 init finished in 6 msecs
1586 07:05:00.307394 PCI: 00:15.1 init
1587 07:05:00.311571 I2C bus 1 version 0x3230302a
1588 07:05:00.314462 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1589 07:05:00.317566 PCI: 00:15.1 init finished in 6 msecs
1590 07:05:00.320702 PCI: 00:15.2 init
1591 07:05:00.325236 I2C bus 2 version 0x3230302a
1592 07:05:00.327616 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1593 07:05:00.330754 PCI: 00:15.2 init finished in 6 msecs
1594 07:05:00.331339 PCI: 00:15.3 init
1595 07:05:00.335008 I2C bus 3 version 0x3230302a
1596 07:05:00.337497 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1597 07:05:00.344072 PCI: 00:15.3 init finished in 6 msecs
1598 07:05:00.344659 PCI: 00:16.0 init
1599 07:05:00.347393 PCI: 00:16.0 init finished in 0 msecs
1600 07:05:00.351350 PCI: 00:19.1 init
1601 07:05:00.355066 I2C bus 5 version 0x3230302a
1602 07:05:00.357718 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1603 07:05:00.360905 PCI: 00:19.1 init finished in 6 msecs
1604 07:05:00.364913 PCI: 00:1d.0 init
1605 07:05:00.367718 Initializing PCH PCIe bridge.
1606 07:05:00.370904 PCI: 00:1d.0 init finished in 3 msecs
1607 07:05:00.374817 PCI: 00:1f.0 init
1608 07:05:00.378387 IOAPIC: Initializing IOAPIC at 0xfec00000
1609 07:05:00.384135 IOAPIC: Bootstrap Processor Local APIC = 0x00
1610 07:05:00.384627 IOAPIC: ID = 0x02
1611 07:05:00.387649 IOAPIC: Dumping registers
1612 07:05:00.390796 reg 0x0000: 0x02000000
1613 07:05:00.391290 reg 0x0001: 0x00770020
1614 07:05:00.395287 reg 0x0002: 0x00000000
1615 07:05:00.397826 PCI: 00:1f.0 init finished in 21 msecs
1616 07:05:00.401187 PCI: 00:1f.2 init
1617 07:05:00.404074 Disabling ACPI via APMC.
1618 07:05:00.408553 APMC done.
1619 07:05:00.411124 PCI: 00:1f.2 init finished in 6 msecs
1620 07:05:00.423331 PCI: 01:00.0 init
1621 07:05:00.426999 PCI: 01:00.0 init finished in 0 msecs
1622 07:05:00.430306 PNP: 0c09.0 init
1623 07:05:00.437259 Google Chrome EC uptime: 8.411 seconds
1624 07:05:00.440188 Google Chrome AP resets since EC boot: 1
1625 07:05:00.443178 Google Chrome most recent AP reset causes:
1626 07:05:00.446776 0.348: 32775 shutdown: entering G3
1627 07:05:00.453337 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1628 07:05:00.456939 PNP: 0c09.0 init finished in 23 msecs
1629 07:05:00.463156 Devices initialized
1630 07:05:00.466484 Show all devs... After init.
1631 07:05:00.469740 Root Device: enabled 1
1632 07:05:00.470366 DOMAIN: 0000: enabled 1
1633 07:05:00.473515 CPU_CLUSTER: 0: enabled 1
1634 07:05:00.476702 PCI: 00:00.0: enabled 1
1635 07:05:00.480205 PCI: 00:02.0: enabled 1
1636 07:05:00.480796 PCI: 00:04.0: enabled 1
1637 07:05:00.483045 PCI: 00:05.0: enabled 1
1638 07:05:00.486603 PCI: 00:06.0: enabled 0
1639 07:05:00.489459 PCI: 00:07.0: enabled 0
1640 07:05:00.489948 PCI: 00:07.1: enabled 0
1641 07:05:00.492920 PCI: 00:07.2: enabled 0
1642 07:05:00.496397 PCI: 00:07.3: enabled 0
1643 07:05:00.499538 PCI: 00:08.0: enabled 1
1644 07:05:00.500049 PCI: 00:09.0: enabled 0
1645 07:05:00.503127 PCI: 00:0a.0: enabled 0
1646 07:05:00.506294 PCI: 00:0d.0: enabled 1
1647 07:05:00.509360 PCI: 00:0d.1: enabled 0
1648 07:05:00.509848 PCI: 00:0d.2: enabled 0
1649 07:05:00.513262 PCI: 00:0d.3: enabled 0
1650 07:05:00.516300 PCI: 00:0e.0: enabled 0
1651 07:05:00.516790 PCI: 00:10.2: enabled 1
1652 07:05:00.519543 PCI: 00:10.6: enabled 0
1653 07:05:00.522740 PCI: 00:10.7: enabled 0
1654 07:05:00.527610 PCI: 00:12.0: enabled 0
1655 07:05:00.528192 PCI: 00:12.6: enabled 0
1656 07:05:00.529522 PCI: 00:13.0: enabled 0
1657 07:05:00.533387 PCI: 00:14.0: enabled 1
1658 07:05:00.536049 PCI: 00:14.1: enabled 0
1659 07:05:00.536479 PCI: 00:14.2: enabled 1
1660 07:05:00.539523 PCI: 00:14.3: enabled 1
1661 07:05:00.542918 PCI: 00:15.0: enabled 1
1662 07:05:00.547309 PCI: 00:15.1: enabled 1
1663 07:05:00.547929 PCI: 00:15.2: enabled 1
1664 07:05:00.549104 PCI: 00:15.3: enabled 1
1665 07:05:00.553320 PCI: 00:16.0: enabled 1
1666 07:05:00.553902 PCI: 00:16.1: enabled 0
1667 07:05:00.558050 PCI: 00:16.2: enabled 0
1668 07:05:00.559579 PCI: 00:16.3: enabled 0
1669 07:05:00.563093 PCI: 00:16.4: enabled 0
1670 07:05:00.563764 PCI: 00:16.5: enabled 0
1671 07:05:00.566301 PCI: 00:17.0: enabled 0
1672 07:05:00.569890 PCI: 00:19.0: enabled 0
1673 07:05:00.573517 PCI: 00:19.1: enabled 1
1674 07:05:00.574103 PCI: 00:19.2: enabled 0
1675 07:05:00.576805 PCI: 00:1c.0: enabled 1
1676 07:05:00.579124 PCI: 00:1c.1: enabled 0
1677 07:05:00.583284 PCI: 00:1c.2: enabled 0
1678 07:05:00.583955 PCI: 00:1c.3: enabled 0
1679 07:05:00.586285 PCI: 00:1c.4: enabled 0
1680 07:05:00.589424 PCI: 00:1c.5: enabled 0
1681 07:05:00.592486 PCI: 00:1c.6: enabled 1
1682 07:05:00.593004 PCI: 00:1c.7: enabled 0
1683 07:05:00.596437 PCI: 00:1d.0: enabled 1
1684 07:05:00.599435 PCI: 00:1d.1: enabled 0
1685 07:05:00.599947 PCI: 00:1d.2: enabled 1
1686 07:05:00.602378 PCI: 00:1d.3: enabled 0
1687 07:05:00.606675 PCI: 00:1e.0: enabled 1
1688 07:05:00.609789 PCI: 00:1e.1: enabled 0
1689 07:05:00.610561 PCI: 00:1e.2: enabled 1
1690 07:05:00.613121 PCI: 00:1e.3: enabled 1
1691 07:05:00.616924 PCI: 00:1f.0: enabled 1
1692 07:05:00.619352 PCI: 00:1f.1: enabled 0
1693 07:05:00.619839 PCI: 00:1f.2: enabled 1
1694 07:05:00.622811 PCI: 00:1f.3: enabled 1
1695 07:05:00.625813 PCI: 00:1f.4: enabled 0
1696 07:05:00.629199 PCI: 00:1f.5: enabled 1
1697 07:05:00.629785 PCI: 00:1f.6: enabled 0
1698 07:05:00.632296 PCI: 00:1f.7: enabled 0
1699 07:05:00.636516 APIC: 00: enabled 1
1700 07:05:00.637124 GENERIC: 0.0: enabled 1
1701 07:05:00.639235 GENERIC: 0.0: enabled 1
1702 07:05:00.642703 GENERIC: 1.0: enabled 1
1703 07:05:00.646810 GENERIC: 0.0: enabled 1
1704 07:05:00.647396 GENERIC: 1.0: enabled 1
1705 07:05:00.648935 USB0 port 0: enabled 1
1706 07:05:00.652645 GENERIC: 0.0: enabled 1
1707 07:05:00.653231 USB0 port 0: enabled 1
1708 07:05:00.655368 GENERIC: 0.0: enabled 1
1709 07:05:00.659692 I2C: 00:1a: enabled 1
1710 07:05:00.662681 I2C: 00:31: enabled 1
1711 07:05:00.663268 I2C: 00:32: enabled 1
1712 07:05:00.665557 I2C: 00:10: enabled 1
1713 07:05:00.669230 I2C: 00:15: enabled 1
1714 07:05:00.669830 GENERIC: 0.0: enabled 0
1715 07:05:00.672134 GENERIC: 1.0: enabled 0
1716 07:05:00.675905 GENERIC: 0.0: enabled 1
1717 07:05:00.676522 SPI: 00: enabled 1
1718 07:05:00.679414 SPI: 00: enabled 1
1719 07:05:00.682670 PNP: 0c09.0: enabled 1
1720 07:05:00.683155 GENERIC: 0.0: enabled 1
1721 07:05:00.685244 USB3 port 0: enabled 1
1722 07:05:00.688912 USB3 port 1: enabled 1
1723 07:05:00.689396 USB3 port 2: enabled 0
1724 07:05:00.692292 USB3 port 3: enabled 0
1725 07:05:00.696156 USB2 port 0: enabled 0
1726 07:05:00.699113 USB2 port 1: enabled 1
1727 07:05:00.699600 USB2 port 2: enabled 1
1728 07:05:00.702165 USB2 port 3: enabled 0
1729 07:05:00.705379 USB2 port 4: enabled 1
1730 07:05:00.705960 USB2 port 5: enabled 0
1731 07:05:00.708653 USB2 port 6: enabled 0
1732 07:05:00.713068 USB2 port 7: enabled 0
1733 07:05:00.715322 USB2 port 8: enabled 0
1734 07:05:00.715810 USB2 port 9: enabled 0
1735 07:05:00.718545 USB3 port 0: enabled 0
1736 07:05:00.722514 USB3 port 1: enabled 1
1737 07:05:00.723130 USB3 port 2: enabled 0
1738 07:05:00.725349 USB3 port 3: enabled 0
1739 07:05:00.729503 GENERIC: 0.0: enabled 1
1740 07:05:00.732418 GENERIC: 1.0: enabled 1
1741 07:05:00.733003 APIC: 01: enabled 1
1742 07:05:00.735877 APIC: 05: enabled 1
1743 07:05:00.736395 APIC: 06: enabled 1
1744 07:05:00.738789 APIC: 03: enabled 1
1745 07:05:00.742320 APIC: 02: enabled 1
1746 07:05:00.742908 APIC: 04: enabled 1
1747 07:05:00.746535 APIC: 07: enabled 1
1748 07:05:00.749136 PCI: 01:00.0: enabled 1
1749 07:05:00.751841 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1750 07:05:00.759079 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1751 07:05:00.762241 ELOG: NV offset 0xf30000 size 0x1000
1752 07:05:00.768673 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1753 07:05:00.775529 ELOG: Event(17) added with size 13 at 2023-02-07 07:05:00 UTC
1754 07:05:00.782375 ELOG: Event(92) added with size 9 at 2023-02-07 07:05:00 UTC
1755 07:05:00.789186 ELOG: Event(93) added with size 9 at 2023-02-07 07:05:00 UTC
1756 07:05:00.795581 ELOG: Event(9E) added with size 10 at 2023-02-07 07:05:00 UTC
1757 07:05:00.801959 ELOG: Event(9F) added with size 14 at 2023-02-07 07:05:00 UTC
1758 07:05:00.805711 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1759 07:05:00.812170 ELOG: Event(A1) added with size 10 at 2023-02-07 07:05:00 UTC
1760 07:05:00.818457 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1761 07:05:00.825418 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1762 07:05:00.829017 Finalize devices...
1763 07:05:00.829633 Devices finalized
1764 07:05:00.835043 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1765 07:05:00.838457 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1766 07:05:00.845200 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1767 07:05:00.852508 ME: HFSTS1 : 0x80030055
1768 07:05:00.854683 ME: HFSTS2 : 0x30280116
1769 07:05:00.858899 ME: HFSTS3 : 0x00000050
1770 07:05:00.864738 ME: HFSTS4 : 0x00004000
1771 07:05:00.868127 ME: HFSTS5 : 0x00000000
1772 07:05:00.871668 ME: HFSTS6 : 0x00400006
1773 07:05:00.875170 ME: Manufacturing Mode : YES
1774 07:05:00.881653 ME: SPI Protection Mode Enabled : NO
1775 07:05:00.885305 ME: FW Partition Table : OK
1776 07:05:00.887970 ME: Bringup Loader Failure : NO
1777 07:05:00.891513 ME: Firmware Init Complete : NO
1778 07:05:00.894816 ME: Boot Options Present : NO
1779 07:05:00.897654 ME: Update In Progress : NO
1780 07:05:00.902120 ME: D0i3 Support : YES
1781 07:05:00.905328 ME: Low Power State Enabled : NO
1782 07:05:00.912081 ME: CPU Replaced : YES
1783 07:05:00.914968 ME: CPU Replacement Valid : YES
1784 07:05:00.918014 ME: Current Working State : 5
1785 07:05:00.921494 ME: Current Operation State : 1
1786 07:05:00.924887 ME: Current Operation Mode : 3
1787 07:05:00.927646 ME: Error Code : 0
1788 07:05:00.930947 ME: Enhanced Debug Mode : NO
1789 07:05:00.934914 ME: CPU Debug Disabled : YES
1790 07:05:00.938167 ME: TXT Support : NO
1791 07:05:00.944761 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1792 07:05:00.955111 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1793 07:05:00.958212 CBFS: 'fallback/slic' not found.
1794 07:05:00.961577 ACPI: Writing ACPI tables at 76b01000.
1795 07:05:00.962074 ACPI: * FACS
1796 07:05:00.964420 ACPI: * DSDT
1797 07:05:00.968426 Ramoops buffer: 0x100000@0x76a00000.
1798 07:05:00.971197 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1799 07:05:00.977870 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1800 07:05:00.980865 Google Chrome EC: version:
1801 07:05:00.984373 ro: voema_v2.0.7540-147f8d37d1
1802 07:05:00.987256 rw: voema_v2.0.7540-147f8d37d1
1803 07:05:00.987909 running image: 2
1804 07:05:00.994047 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1805 07:05:00.999693 ACPI: * FADT
1806 07:05:01.000212 SCI is IRQ9
1807 07:05:01.005607 ACPI: added table 1/32, length now 40
1808 07:05:01.006119 ACPI: * SSDT
1809 07:05:01.009482 Found 1 CPU(s) with 8 core(s) each.
1810 07:05:01.015484 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1811 07:05:01.018885 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1812 07:05:01.022302 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1813 07:05:01.025448 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1814 07:05:01.031985 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1815 07:05:01.038949 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1816 07:05:01.042371 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1817 07:05:01.049360 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1818 07:05:01.055166 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1819 07:05:01.058871 \_SB.PCI0.RP09: Added StorageD3Enable property
1820 07:05:01.061957 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1821 07:05:01.068745 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1822 07:05:01.075082 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1823 07:05:01.078263 PS2K: Passing 80 keymaps to kernel
1824 07:05:01.084778 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1825 07:05:01.091676 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1826 07:05:01.098831 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1827 07:05:01.105416 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1828 07:05:01.111424 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1829 07:05:01.117944 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1830 07:05:01.125331 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1831 07:05:01.131536 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1832 07:05:01.134432 ACPI: added table 2/32, length now 44
1833 07:05:01.134931 ACPI: * MCFG
1834 07:05:01.137977 ACPI: added table 3/32, length now 48
1835 07:05:01.142019 ACPI: * TPM2
1836 07:05:01.144426 TPM2 log created at 0x769f0000
1837 07:05:01.148328 ACPI: added table 4/32, length now 52
1838 07:05:01.151671 ACPI: * MADT
1839 07:05:01.152262 SCI is IRQ9
1840 07:05:01.154774 ACPI: added table 5/32, length now 56
1841 07:05:01.158302 current = 76b09850
1842 07:05:01.158888 ACPI: * DMAR
1843 07:05:01.161259 ACPI: added table 6/32, length now 60
1844 07:05:01.164932 ACPI: added table 7/32, length now 64
1845 07:05:01.168209 ACPI: * HPET
1846 07:05:01.171406 ACPI: added table 8/32, length now 68
1847 07:05:01.171988 ACPI: done.
1848 07:05:01.174883 ACPI tables: 35216 bytes.
1849 07:05:01.178385 smbios_write_tables: 769ef000
1850 07:05:01.181184 EC returned error result code 3
1851 07:05:01.184015 Couldn't obtain OEM name from CBI
1852 07:05:01.187302 Create SMBIOS type 16
1853 07:05:01.190928 Create SMBIOS type 17
1854 07:05:01.194829 GENERIC: 0.0 (WIFI Device)
1855 07:05:01.195321 SMBIOS tables: 1750 bytes.
1856 07:05:01.201477 Writing table forward entry at 0x00000500
1857 07:05:01.207329 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1858 07:05:01.211137 Writing coreboot table at 0x76b25000
1859 07:05:01.217805 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1860 07:05:01.220915 1. 0000000000001000-000000000009ffff: RAM
1861 07:05:01.224308 2. 00000000000a0000-00000000000fffff: RESERVED
1862 07:05:01.230999 3. 0000000000100000-00000000769eefff: RAM
1863 07:05:01.234570 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1864 07:05:01.241133 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1865 07:05:01.247502 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1866 07:05:01.251006 7. 0000000077000000-000000007fbfffff: RESERVED
1867 07:05:01.254776 8. 00000000c0000000-00000000cfffffff: RESERVED
1868 07:05:01.261511 9. 00000000f8000000-00000000f9ffffff: RESERVED
1869 07:05:01.264368 10. 00000000fb000000-00000000fb000fff: RESERVED
1870 07:05:01.271065 11. 00000000fe000000-00000000fe00ffff: RESERVED
1871 07:05:01.275082 12. 00000000fed80000-00000000fed87fff: RESERVED
1872 07:05:01.280753 13. 00000000fed90000-00000000fed92fff: RESERVED
1873 07:05:01.284029 14. 00000000feda0000-00000000feda1fff: RESERVED
1874 07:05:01.290398 15. 00000000fedc0000-00000000feddffff: RESERVED
1875 07:05:01.293719 16. 0000000100000000-00000002803fffff: RAM
1876 07:05:01.297058 Passing 4 GPIOs to payload:
1877 07:05:01.300833 NAME | PORT | POLARITY | VALUE
1878 07:05:01.306812 lid | undefined | high | high
1879 07:05:01.310645 power | undefined | high | low
1880 07:05:01.317328 oprom | undefined | high | low
1881 07:05:01.323831 EC in RW | 0x000000e5 | high | high
1882 07:05:01.330571 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 575c
1883 07:05:01.331156 coreboot table: 1576 bytes.
1884 07:05:01.337243 IMD ROOT 0. 0x76fff000 0x00001000
1885 07:05:01.340596 IMD SMALL 1. 0x76ffe000 0x00001000
1886 07:05:01.343873 FSP MEMORY 2. 0x76c4e000 0x003b0000
1887 07:05:01.347311 VPD 3. 0x76c4d000 0x00000367
1888 07:05:01.350531 RO MCACHE 4. 0x76c4c000 0x00000fdc
1889 07:05:01.353946 CONSOLE 5. 0x76c2c000 0x00020000
1890 07:05:01.357191 FMAP 6. 0x76c2b000 0x00000578
1891 07:05:01.360163 TIME STAMP 7. 0x76c2a000 0x00000910
1892 07:05:01.363654 VBOOT WORK 8. 0x76c16000 0x00014000
1893 07:05:01.371547 ROMSTG STCK 9. 0x76c15000 0x00001000
1894 07:05:01.373903 AFTER CAR 10. 0x76c0a000 0x0000b000
1895 07:05:01.378216 RAMSTAGE 11. 0x76b97000 0x00073000
1896 07:05:01.380904 REFCODE 12. 0x76b42000 0x00055000
1897 07:05:01.383993 SMM BACKUP 13. 0x76b32000 0x00010000
1898 07:05:01.386986 4f444749 14. 0x76b30000 0x00002000
1899 07:05:01.390600 EXT VBT15. 0x76b2d000 0x0000219f
1900 07:05:01.393814 COREBOOT 16. 0x76b25000 0x00008000
1901 07:05:01.397014 ACPI 17. 0x76b01000 0x00024000
1902 07:05:01.403497 ACPI GNVS 18. 0x76b00000 0x00001000
1903 07:05:01.407005 RAMOOPS 19. 0x76a00000 0x00100000
1904 07:05:01.410549 TPM2 TCGLOG20. 0x769f0000 0x00010000
1905 07:05:01.414673 SMBIOS 21. 0x769ef000 0x00000800
1906 07:05:01.415255 IMD small region:
1907 07:05:01.420629 IMD ROOT 0. 0x76ffec00 0x00000400
1908 07:05:01.423940 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1909 07:05:01.427432 POWER STATE 2. 0x76ffeb80 0x00000044
1910 07:05:01.431196 ROMSTAGE 3. 0x76ffeb60 0x00000004
1911 07:05:01.433711 MEM INFO 4. 0x76ffe980 0x000001e0
1912 07:05:01.440620 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1913 07:05:01.444208 MTRR: Physical address space:
1914 07:05:01.450645 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1915 07:05:01.456994 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1916 07:05:01.463580 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1917 07:05:01.471022 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1918 07:05:01.473308 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1919 07:05:01.480499 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1920 07:05:01.486875 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1921 07:05:01.490247 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 07:05:01.496646 MTRR: Fixed MSR 0x258 0x0606060606060606
1923 07:05:01.500431 MTRR: Fixed MSR 0x259 0x0000000000000000
1924 07:05:01.503126 MTRR: Fixed MSR 0x268 0x0606060606060606
1925 07:05:01.506471 MTRR: Fixed MSR 0x269 0x0606060606060606
1926 07:05:01.513035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1927 07:05:01.516719 MTRR: Fixed MSR 0x26b 0x0606060606060606
1928 07:05:01.519749 MTRR: Fixed MSR 0x26c 0x0606060606060606
1929 07:05:01.523572 MTRR: Fixed MSR 0x26d 0x0606060606060606
1930 07:05:01.530245 MTRR: Fixed MSR 0x26e 0x0606060606060606
1931 07:05:01.532798 MTRR: Fixed MSR 0x26f 0x0606060606060606
1932 07:05:01.536707 call enable_fixed_mtrr()
1933 07:05:01.539585 CPU physical address size: 39 bits
1934 07:05:01.543119 MTRR: default type WB/UC MTRR counts: 6/6.
1935 07:05:01.546633 MTRR: UC selected as default type.
1936 07:05:01.552919 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1937 07:05:01.560109 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1938 07:05:01.566074 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1939 07:05:01.572791 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1940 07:05:01.579707 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1941 07:05:01.586199 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1942 07:05:01.589175 MTRR: Fixed MSR 0x250 0x0606060606060606
1943 07:05:01.595893 MTRR: Fixed MSR 0x258 0x0606060606060606
1944 07:05:01.599337 MTRR: Fixed MSR 0x259 0x0000000000000000
1945 07:05:01.602634 MTRR: Fixed MSR 0x268 0x0606060606060606
1946 07:05:01.606515 MTRR: Fixed MSR 0x269 0x0606060606060606
1947 07:05:01.612997 MTRR: Fixed MSR 0x26a 0x0606060606060606
1948 07:05:01.616884 MTRR: Fixed MSR 0x26b 0x0606060606060606
1949 07:05:01.619588 MTRR: Fixed MSR 0x26c 0x0606060606060606
1950 07:05:01.622784 MTRR: Fixed MSR 0x26d 0x0606060606060606
1951 07:05:01.626054 MTRR: Fixed MSR 0x26e 0x0606060606060606
1952 07:05:01.632684 MTRR: Fixed MSR 0x26f 0x0606060606060606
1953 07:05:01.633271
1954 07:05:01.633659 MTRR check
1955 07:05:01.635923 call enable_fixed_mtrr()
1956 07:05:01.639449 Fixed MTRRs : Enabled
1957 07:05:01.642704 Variable MTRRs: Enabled
1958 07:05:01.643187
1959 07:05:01.645776 CPU physical address size: 39 bits
1960 07:05:01.653159 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
1961 07:05:01.655817 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 07:05:01.658896 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 07:05:01.666603 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 07:05:01.669425 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 07:05:01.672685 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 07:05:01.676054 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 07:05:01.682653 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 07:05:01.686678 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 07:05:01.689002 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 07:05:01.692253 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 07:05:01.698678 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 07:05:01.702598 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 07:05:01.706108 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 07:05:01.708784 call enable_fixed_mtrr()
1975 07:05:01.712051 MTRR: Fixed MSR 0x259 0x0000000000000000
1976 07:05:01.719738 MTRR: Fixed MSR 0x268 0x0606060606060606
1977 07:05:01.721943 MTRR: Fixed MSR 0x269 0x0606060606060606
1978 07:05:01.726176 MTRR: Fixed MSR 0x26a 0x0606060606060606
1979 07:05:01.729039 MTRR: Fixed MSR 0x26b 0x0606060606060606
1980 07:05:01.732164 MTRR: Fixed MSR 0x26c 0x0606060606060606
1981 07:05:01.738753 MTRR: Fixed MSR 0x26d 0x0606060606060606
1982 07:05:01.742326 MTRR: Fixed MSR 0x26e 0x0606060606060606
1983 07:05:01.745718 MTRR: Fixed MSR 0x26f 0x0606060606060606
1984 07:05:01.749235 CPU physical address size: 39 bits
1985 07:05:01.755381 call enable_fixed_mtrr()
1986 07:05:01.759403 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 07:05:01.762759 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 07:05:01.766343 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 07:05:01.771909 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 07:05:01.775742 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 07:05:01.778846 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 07:05:01.782437 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 07:05:01.785398 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 07:05:01.792715 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 07:05:01.794938 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 07:05:01.798556 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 07:05:01.802386 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 07:05:01.809444 MTRR: Fixed MSR 0x258 0x0606060606060606
1999 07:05:01.810043 call enable_fixed_mtrr()
2000 07:05:01.816548 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 07:05:01.819567 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 07:05:01.822982 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 07:05:01.826281 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 07:05:01.832742 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 07:05:01.836503 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 07:05:01.839679 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 07:05:01.842967 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 07:05:01.849588 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 07:05:01.852612 CPU physical address size: 39 bits
2010 07:05:01.855840 call enable_fixed_mtrr()
2011 07:05:01.858966 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 07:05:01.862831 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 07:05:01.869324 MTRR: Fixed MSR 0x258 0x0606060606060606
2014 07:05:01.872484 MTRR: Fixed MSR 0x259 0x0000000000000000
2015 07:05:01.876574 MTRR: Fixed MSR 0x268 0x0606060606060606
2016 07:05:01.879334 MTRR: Fixed MSR 0x269 0x0606060606060606
2017 07:05:01.886707 MTRR: Fixed MSR 0x26a 0x0606060606060606
2018 07:05:01.889890 MTRR: Fixed MSR 0x26b 0x0606060606060606
2019 07:05:01.892594 MTRR: Fixed MSR 0x26c 0x0606060606060606
2020 07:05:01.895918 MTRR: Fixed MSR 0x26d 0x0606060606060606
2021 07:05:01.902426 MTRR: Fixed MSR 0x26e 0x0606060606060606
2022 07:05:01.906579 MTRR: Fixed MSR 0x26f 0x0606060606060606
2023 07:05:01.908985 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 07:05:01.912299 call enable_fixed_mtrr()
2025 07:05:01.916478 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 07:05:01.922274 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 07:05:01.925400 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 07:05:01.928840 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 07:05:01.933008 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 07:05:01.939095 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 07:05:01.942126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 07:05:01.945947 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 07:05:01.948826 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 07:05:01.953265 CPU physical address size: 39 bits
2035 07:05:01.959507 call enable_fixed_mtrr()
2036 07:05:01.963250 Checking cr50 for pending updates
2037 07:05:01.967321 CPU physical address size: 39 bits
2038 07:05:01.971072 CPU physical address size: 39 bits
2039 07:05:01.971663 Reading cr50 TPM mode
2040 07:05:01.974748 CPU physical address size: 39 bits
2041 07:05:01.981068 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2042 07:05:01.991180 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2043 07:05:01.994440 Checking segment from ROM address 0xffc02b38
2044 07:05:01.997698 Checking segment from ROM address 0xffc02b54
2045 07:05:02.004072 Loading segment from ROM address 0xffc02b38
2046 07:05:02.004559 code (compression=0)
2047 07:05:02.014384 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2048 07:05:02.021052 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2049 07:05:02.023836 it's not compressed!
2050 07:05:02.163701 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2051 07:05:02.170387 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2052 07:05:02.177369 Loading segment from ROM address 0xffc02b54
2053 07:05:02.180023 Entry Point 0x30000000
2054 07:05:02.180611 Loaded segments
2055 07:05:02.186512 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2056 07:05:02.230224 Finalizing chipset.
2057 07:05:02.233023 Finalizing SMM.
2058 07:05:02.233605 APMC done.
2059 07:05:02.239967 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2060 07:05:02.242631 mp_park_aps done after 0 msecs.
2061 07:05:02.246025 Jumping to boot code at 0x30000000(0x76b25000)
2062 07:05:02.255984 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2063 07:05:02.256559
2064 07:05:02.256976
2065 07:05:02.257344
2066 07:05:02.259407 Starting depthcharge on Voema...
2067 07:05:02.259893
2068 07:05:02.261089 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
2069 07:05:02.261657 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2070 07:05:02.262098 Setting prompt string to ['volteer:']
2071 07:05:02.262573 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:42)
2072 07:05:02.268961 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2073 07:05:02.269455
2074 07:05:02.276435 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2075 07:05:02.277034
2076 07:05:02.283305 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2077 07:05:02.283888
2078 07:05:02.285585 Failed to find eMMC card reader
2079 07:05:02.286191
2080 07:05:02.286592 Wipe memory regions:
2081 07:05:02.289474
2082 07:05:02.292722 [0x00000000001000, 0x000000000a0000)
2083 07:05:02.293215
2084 07:05:02.295458 [0x00000000100000, 0x00000030000000)
2085 07:05:02.321965
2086 07:05:02.324960 [0x00000032662db0, 0x000000769ef000)
2087 07:05:02.360908
2088 07:05:02.364277 [0x00000100000000, 0x00000280400000)
2089 07:05:02.567187
2090 07:05:02.570882 ec_init: CrosEC protocol v3 supported (256, 256)
2091 07:05:02.571375
2092 07:05:02.577360 update_port_state: port C0 state: usb enable 1 mux conn 0
2093 07:05:02.577975
2094 07:05:02.587356 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2095 07:05:02.587942
2096 07:05:02.590684 pmc_check_ipc_sts: STS_BUSY done after 1565 us
2097 07:05:02.591269
2098 07:05:02.597384 send_conn_disc_msg: pmc_send_cmd succeeded
2099 07:05:03.026287
2100 07:05:03.026875 R8152: Initializing
2101 07:05:03.027267
2102 07:05:03.029679 Version 6 (ocp_data = 5c30)
2103 07:05:03.030198
2104 07:05:03.033200 R8152: Done initializing
2105 07:05:03.033780
2106 07:05:03.036128 Adding net device
2107 07:05:03.338413
2108 07:05:03.341328 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2109 07:05:03.341913
2110 07:05:03.342352
2111 07:05:03.342725
2112 07:05:03.344861 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2114 07:05:03.446735 volteer: tftpboot 192.168.201.1 9045574/tftp-deploy-mtezrtre/kernel/bzImage 9045574/tftp-deploy-mtezrtre/kernel/cmdline 9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
2115 07:05:03.447437 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 07:05:03.448016 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:41)
2117 07:05:03.452867 tftpboot 192.168.201.1 9045574/tftp-deploy-mtezrtre/kernel/bzImoy-mtezrtre/kernel/cmdline 9045574/tftp-deploy-mtezrtre/ramdisk/ramdisk.cpio.gz
2118 07:05:03.453476
2119 07:05:03.453892 Waiting for link
2120 07:05:03.656878
2121 07:05:03.657475 done.
2122 07:05:03.657869
2123 07:05:03.658263 MAC: 00:24:32:30:7e:47
2124 07:05:03.658618
2125 07:05:03.660503 Sending DHCP discover... done.
2126 07:05:03.661083
2127 07:05:03.662867 Waiting for reply... done.
2128 07:05:03.663358
2129 07:05:03.666517 Sending DHCP request... done.
2130 07:05:03.667005
2131 07:05:03.673254 Waiting for reply... done.
2132 07:05:03.673837
2133 07:05:03.674270 My ip is 192.168.201.19
2134 07:05:03.674647
2135 07:05:03.676475 The DHCP server ip is 192.168.201.1
2136 07:05:03.679443
2137 07:05:03.682627 TFTP server IP predefined by user: 192.168.201.1
2138 07:05:03.683122
2139 07:05:03.689530 Bootfile predefined by user: 9045574/tftp-deploy-mtezrtre/kernel/bzImage
2140 07:05:03.690113
2141 07:05:03.692913 Sending tftp read request... done.
2142 07:05:03.693408
2143 07:05:03.699757 Waiting for the transfer...
2144 07:05:03.700292
2145 07:05:04.418709 00000000 ################################################################
2146 07:05:04.419317
2147 07:05:05.137461 00080000 ################################################################
2148 07:05:05.138097
2149 07:05:05.868699 00100000 ################################################################
2150 07:05:05.869254
2151 07:05:06.583812 00180000 ################################################################
2152 07:05:06.584349
2153 07:05:07.290890 00200000 ################################################################
2154 07:05:07.291505
2155 07:05:07.994877 00280000 ################################################################
2156 07:05:07.995474
2157 07:05:08.707775 00300000 ################################################################
2158 07:05:08.708453
2159 07:05:09.428626 00380000 ################################################################
2160 07:05:09.429241
2161 07:05:10.147197 00400000 ################################################################
2162 07:05:10.147783
2163 07:05:10.840542 00480000 ################################################################
2164 07:05:10.841084
2165 07:05:11.540860 00500000 ################################################################
2166 07:05:11.541482
2167 07:05:12.266443 00580000 ################################################################
2168 07:05:12.267057
2169 07:05:12.980273 00600000 ################################################################
2170 07:05:12.980854
2171 07:05:13.692569 00680000 ################################################################
2172 07:05:13.693192
2173 07:05:14.009720 00700000 ############################# done.
2174 07:05:14.010351
2175 07:05:14.013027 The bootfile was 7573392 bytes long.
2176 07:05:14.013617
2177 07:05:14.015806 Sending tftp read request... done.
2178 07:05:14.016303
2179 07:05:14.019655 Waiting for the transfer...
2180 07:05:14.020346
2181 07:05:14.698226 00000000 ################################################################
2182 07:05:14.698776
2183 07:05:15.357480 00080000 ################################################################
2184 07:05:15.358016
2185 07:05:16.024042 00100000 ################################################################
2186 07:05:16.024665
2187 07:05:16.694377 00180000 ################################################################
2188 07:05:16.694908
2189 07:05:17.344984 00200000 ################################################################
2190 07:05:17.345570
2191 07:05:18.032265 00280000 ################################################################
2192 07:05:18.032842
2193 07:05:18.706646 00300000 ################################################################
2194 07:05:18.707216
2195 07:05:19.380661 00380000 ################################################################
2196 07:05:19.381212
2197 07:05:20.042568 00400000 ################################################################
2198 07:05:20.043109
2199 07:05:20.720499 00480000 ################################################################
2200 07:05:20.721036
2201 07:05:21.395656 00500000 ################################################################
2202 07:05:21.396191
2203 07:05:22.058378 00580000 ################################################################
2204 07:05:22.058909
2205 07:05:22.726885 00600000 ################################################################
2206 07:05:22.727424
2207 07:05:23.369304 00680000 ################################################################
2208 07:05:23.369847
2209 07:05:24.050829 00700000 ################################################################
2210 07:05:24.051423
2211 07:05:24.731903 00780000 ################################################################
2212 07:05:24.732437
2213 07:05:25.388771 00800000 ################################################################
2214 07:05:25.389326
2215 07:05:26.065036 00880000 ################################################################
2216 07:05:26.065563
2217 07:05:26.697982 00900000 ################################################################
2218 07:05:26.698566
2219 07:05:27.341756 00980000 ################################################################
2220 07:05:27.342316
2221 07:05:27.997527 00a00000 ################################################################
2222 07:05:27.998082
2223 07:05:28.665155 00a80000 ################################################################
2224 07:05:28.665682
2225 07:05:29.336718 00b00000 ################################################################
2226 07:05:29.337250
2227 07:05:30.008896 00b80000 ################################################################
2228 07:05:30.009442
2229 07:05:30.652848 00c00000 ################################################################
2230 07:05:30.653411
2231 07:05:31.331870 00c80000 ################################################################
2232 07:05:31.332409
2233 07:05:32.006680 00d00000 ################################################################
2234 07:05:32.007227
2235 07:05:32.682282 00d80000 ################################################################
2236 07:05:32.682918
2237 07:05:33.343902 00e00000 ################################################################
2238 07:05:33.344434
2239 07:05:34.008218 00e80000 ################################################################
2240 07:05:34.008760
2241 07:05:34.686761 00f00000 ################################################################
2242 07:05:34.687326
2243 07:05:35.349931 00f80000 ################################################################
2244 07:05:35.350506
2245 07:05:36.022344 01000000 ################################################################
2246 07:05:36.022876
2247 07:05:36.699925 01080000 ################################################################
2248 07:05:36.700461
2249 07:05:37.380844 01100000 ################################################################
2250 07:05:37.381392
2251 07:05:38.062033 01180000 ################################################################
2252 07:05:38.062600
2253 07:05:38.740823 01200000 ################################################################
2254 07:05:38.741407
2255 07:05:39.417257 01280000 ################################################################
2256 07:05:39.417806
2257 07:05:40.095288 01300000 ################################################################
2258 07:05:40.095826
2259 07:05:40.771067 01380000 ################################################################
2260 07:05:40.771597
2261 07:05:41.447827 01400000 ################################################################
2262 07:05:41.448379
2263 07:05:42.123769 01480000 ################################################################
2264 07:05:42.124305
2265 07:05:42.799560 01500000 ################################################################
2266 07:05:42.800098
2267 07:05:43.482941 01580000 ################################################################
2268 07:05:43.483511
2269 07:05:44.165843 01600000 ################################################################
2270 07:05:44.166421
2271 07:05:44.841869 01680000 ################################################################
2272 07:05:44.842470
2273 07:05:45.519931 01700000 ################################################################
2274 07:05:45.520528
2275 07:05:46.196742 01780000 ################################################################
2276 07:05:46.197284
2277 07:05:46.867816 01800000 ################################################################
2278 07:05:46.868358
2279 07:05:47.516463 01880000 ################################################################
2280 07:05:47.516993
2281 07:05:48.197928 01900000 ################################################################
2282 07:05:48.198531
2283 07:05:48.871177 01980000 ################################################################
2284 07:05:48.871733
2285 07:05:49.548946 01a00000 ################################################################
2286 07:05:49.549558
2287 07:05:50.229400 01a80000 ################################################################
2288 07:05:50.229950
2289 07:05:50.876658 01b00000 ################################################################
2290 07:05:50.876810
2291 07:05:51.473835 01b80000 ################################################################
2292 07:05:51.473986
2293 07:05:52.102473 01c00000 ################################################################
2294 07:05:52.102623
2295 07:05:52.671590 01c80000 ################################################################
2296 07:05:52.671738
2297 07:05:53.290388 01d00000 ################################################################
2298 07:05:53.290539
2299 07:05:53.917937 01d80000 ################################################################
2300 07:05:53.918090
2301 07:05:54.544026 01e00000 ################################################################
2302 07:05:54.544177
2303 07:05:55.161974 01e80000 ################################################################
2304 07:05:55.162121
2305 07:05:55.776615 01f00000 ################################################################
2306 07:05:55.776762
2307 07:05:56.354517 01f80000 ################################################################
2308 07:05:56.354665
2309 07:05:56.961616 02000000 ################################################################
2310 07:05:56.961767
2311 07:05:57.571181 02080000 ################################################################
2312 07:05:57.571335
2313 07:05:58.199767 02100000 ################################################################
2314 07:05:58.199917
2315 07:05:58.858585 02180000 ################################################################
2316 07:05:58.859128
2317 07:05:59.067902 02200000 ##################### done.
2318 07:05:59.068424
2319 07:05:59.070880 Sending tftp read request... done.
2320 07:05:59.071331
2321 07:05:59.073936 Waiting for the transfer...
2322 07:05:59.074415
2323 07:05:59.074773 00000000 # done.
2324 07:05:59.075118
2325 07:05:59.084382 Command line loaded dynamically from TFTP file: 9045574/tftp-deploy-mtezrtre/kernel/cmdline
2326 07:05:59.084835
2327 07:05:59.097500 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2328 07:05:59.103339
2329 07:05:59.106973 Shutting down all USB controllers.
2330 07:05:59.107426
2331 07:05:59.107779 Removing current net device
2332 07:05:59.108109
2333 07:05:59.109803 Finalizing coreboot
2334 07:05:59.110309
2335 07:05:59.116992 Exiting depthcharge with code 4 at timestamp: 65515587
2336 07:05:59.117541
2337 07:05:59.117902
2338 07:05:59.118275 Starting kernel ...
2339 07:05:59.118602
2340 07:05:59.118914
2341 07:05:59.120305 end: 2.2.4 bootloader-commands (duration 00:00:57) [common]
2342 07:05:59.120790 start: 2.2.5 auto-login-action (timeout 00:03:46) [common]
2343 07:05:59.121169 Setting prompt string to ['Linux version [0-9]']
2344 07:05:59.121528 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2345 07:05:59.121889 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2347 07:09:45.121862 end: 2.2.5 auto-login-action (duration 00:03:46) [common]
2349 07:09:45.123074 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 226 seconds'
2351 07:09:45.123944 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2354 07:09:45.125466 end: 2 depthcharge-action (duration 00:05:01) [common]
2356 07:09:45.126635 Cleaning after the job
2357 07:09:45.126720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/ramdisk
2358 07:09:45.128872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/kernel
2359 07:09:45.129413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045574/tftp-deploy-mtezrtre/modules
2360 07:09:45.129595 start: 4.1 power-off (timeout 00:00:30) [common]
2361 07:09:45.129744 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2362 07:09:47.306408 >> Command sent successfully.
2363 07:09:47.312568 Returned 0 in 2 seconds
2364 07:09:47.413944 end: 4.1 power-off (duration 00:00:02) [common]
2366 07:09:47.415623 start: 4.2 read-feedback (timeout 00:09:58) [common]
2367 07:09:47.416786 Listened to connection for namespace 'common' for up to 1s
2368 07:09:48.421736 Finalising connection for namespace 'common'
2369 07:09:48.422486 Disconnecting from shell: Finalise
2370 07:09:48.422932
2371 07:09:48.524595 end: 4.2 read-feedback (duration 00:00:01) [common]
2372 07:09:48.525229 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045574
2373 07:09:48.553013 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045574
2374 07:09:48.553188 JobError: Your job cannot terminate cleanly.