Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:12:57.629149 lava-dispatcher, installed at version: 2022.11
2 07:12:57.629357 start: 0 validate
3 07:12:57.629498 Start time: 2023-02-07 07:12:57.629490+00:00 (UTC)
4 07:12:57.629634 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:12:57.629773 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
6 07:12:57.921047 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:12:57.921813 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:12:58.216696 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:12:58.217425 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:12:58.510814 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:12:58.511536 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:12:58.799846 validate duration: 1.17
14 07:12:58.800175 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:12:58.800287 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:12:58.800386 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:12:58.800536 Not decompressing ramdisk as can be used compressed.
18 07:12:58.800627 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/initrd.cpio.gz
19 07:12:58.800702 saving as /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/ramdisk/initrd.cpio.gz
20 07:12:58.800770 total size: 5432118 (5MB)
21 07:12:58.801898 progress 0% (0MB)
22 07:12:58.803463 progress 5% (0MB)
23 07:12:58.804950 progress 10% (0MB)
24 07:12:58.806440 progress 15% (0MB)
25 07:12:58.808013 progress 20% (1MB)
26 07:12:58.809467 progress 25% (1MB)
27 07:12:58.810864 progress 30% (1MB)
28 07:12:58.812458 progress 35% (1MB)
29 07:12:58.813886 progress 40% (2MB)
30 07:12:58.815281 progress 45% (2MB)
31 07:12:58.816720 progress 50% (2MB)
32 07:12:58.818274 progress 55% (2MB)
33 07:12:58.819665 progress 60% (3MB)
34 07:12:58.821105 progress 65% (3MB)
35 07:12:58.822664 progress 70% (3MB)
36 07:12:58.824093 progress 75% (3MB)
37 07:12:58.825533 progress 80% (4MB)
38 07:12:58.826929 progress 85% (4MB)
39 07:12:58.828529 progress 90% (4MB)
40 07:12:58.829935 progress 95% (4MB)
41 07:12:58.831350 progress 100% (5MB)
42 07:12:58.831626 5MB downloaded in 0.03s (167.91MB/s)
43 07:12:58.831784 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:12:58.832053 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:12:58.832152 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:12:58.832247 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:12:58.832358 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:12:58.832460 saving as /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/kernel/bzImage
50 07:12:58.832559 total size: 7573392 (7MB)
51 07:12:58.832641 No compression specified
52 07:12:58.833721 progress 0% (0MB)
53 07:12:58.835819 progress 5% (0MB)
54 07:12:58.838040 progress 10% (0MB)
55 07:12:58.840018 progress 15% (1MB)
56 07:12:58.842170 progress 20% (1MB)
57 07:12:58.844093 progress 25% (1MB)
58 07:12:58.846292 progress 30% (2MB)
59 07:12:58.848217 progress 35% (2MB)
60 07:12:58.850336 progress 40% (2MB)
61 07:12:58.852388 progress 45% (3MB)
62 07:12:58.854345 progress 50% (3MB)
63 07:12:58.856393 progress 55% (4MB)
64 07:12:58.858330 progress 60% (4MB)
65 07:12:58.860451 progress 65% (4MB)
66 07:12:58.862361 progress 70% (5MB)
67 07:12:58.864518 progress 75% (5MB)
68 07:12:58.866400 progress 80% (5MB)
69 07:12:58.868488 progress 85% (6MB)
70 07:12:58.870542 progress 90% (6MB)
71 07:12:58.872435 progress 95% (6MB)
72 07:12:58.874496 progress 100% (7MB)
73 07:12:58.874673 7MB downloaded in 0.04s (171.52MB/s)
74 07:12:58.874831 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:12:58.875089 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:12:58.875188 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:12:58.875284 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:12:58.875399 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/full.rootfs.tar.xz
80 07:12:58.875473 saving as /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/nfsrootfs/full.rootfs.tar
81 07:12:58.875542 total size: 123901376 (118MB)
82 07:12:58.875611 Using unxz to decompress xz
83 07:12:58.878992 progress 0% (0MB)
84 07:12:59.362179 progress 5% (5MB)
85 07:12:59.852680 progress 10% (11MB)
86 07:13:00.344230 progress 15% (17MB)
87 07:13:00.847387 progress 20% (23MB)
88 07:13:01.206423 progress 25% (29MB)
89 07:13:01.573849 progress 30% (35MB)
90 07:13:01.865272 progress 35% (41MB)
91 07:13:02.056059 progress 40% (47MB)
92 07:13:02.464833 progress 45% (53MB)
93 07:13:02.869521 progress 50% (59MB)
94 07:13:03.250900 progress 55% (65MB)
95 07:13:03.645889 progress 60% (70MB)
96 07:13:04.020039 progress 65% (76MB)
97 07:13:04.440331 progress 70% (82MB)
98 07:13:04.903568 progress 75% (88MB)
99 07:13:05.372120 progress 80% (94MB)
100 07:13:05.514373 progress 85% (100MB)
101 07:13:05.693602 progress 90% (106MB)
102 07:13:06.064619 progress 95% (112MB)
103 07:13:06.474544 progress 100% (118MB)
104 07:13:06.480033 118MB downloaded in 7.60s (15.54MB/s)
105 07:13:06.480320 end: 1.3.1 http-download (duration 00:00:08) [common]
107 07:13:06.480628 end: 1.3 download-retry (duration 00:00:08) [common]
108 07:13:06.480736 start: 1.4 download-retry (timeout 00:09:52) [common]
109 07:13:06.480838 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 07:13:06.480967 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:13:06.481049 saving as /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/modules/modules.tar
112 07:13:06.481120 total size: 54868 (0MB)
113 07:13:06.481195 Using unxz to decompress xz
114 07:13:06.484500 progress 59% (0MB)
115 07:13:06.484912 progress 100% (0MB)
116 07:13:06.488680 0MB downloaded in 0.01s (6.93MB/s)
117 07:13:06.488923 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:13:06.489215 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:13:06.489322 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
121 07:13:06.489435 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
122 07:13:08.328208 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9045576/extract-nfsrootfs-tk3p5v2b
123 07:13:08.328492 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:13:08.328616 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 07:13:08.328766 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j
126 07:13:08.328881 makedir: /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin
127 07:13:08.328975 makedir: /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/tests
128 07:13:08.329064 makedir: /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/results
129 07:13:08.329170 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-add-keys
130 07:13:08.329313 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-add-sources
131 07:13:08.329440 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-background-process-start
132 07:13:08.329570 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-background-process-stop
133 07:13:08.329695 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-common-functions
134 07:13:08.329815 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-echo-ipv4
135 07:13:08.329936 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-install-packages
136 07:13:08.330056 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-installed-packages
137 07:13:08.330175 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-os-build
138 07:13:08.330313 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-probe-channel
139 07:13:08.330467 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-probe-ip
140 07:13:08.330587 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-target-ip
141 07:13:08.330707 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-target-mac
142 07:13:08.330825 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-target-storage
143 07:13:08.330946 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-case
144 07:13:08.331068 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-event
145 07:13:08.331186 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-feedback
146 07:13:08.331304 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-raise
147 07:13:08.331422 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-reference
148 07:13:08.331542 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-runner
149 07:13:08.331675 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-set
150 07:13:08.331793 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-test-shell
151 07:13:08.331914 Updating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-install-packages (oe)
152 07:13:08.332040 Updating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/bin/lava-installed-packages (oe)
153 07:13:08.332146 Creating /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/environment
154 07:13:08.332240 LAVA metadata
155 07:13:08.332312 - LAVA_JOB_ID=9045576
156 07:13:08.332397 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:13:08.332584 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 07:13:08.332659 skipped lava-vland-overlay
159 07:13:08.332744 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:13:08.332835 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 07:13:08.332904 skipped lava-multinode-overlay
162 07:13:08.332987 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:13:08.333078 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 07:13:08.333158 Loading test definitions
165 07:13:08.333257 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
166 07:13:08.333333 Using /lava-9045576 at stage 0
167 07:13:08.333440 Fetching tests from https://github.com/kernelci/test-definitions
168 07:13:08.333527 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/0/tests/0_ltp-ipc'
169 07:13:10.721684 Running '/usr/bin/git checkout kernelci.org
170 07:13:10.870489 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 07:13:10.871294 uuid=9045576_1.5.2.3.1 testdef=None
172 07:13:10.871468 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 07:13:10.871742 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 07:13:10.872655 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:13:10.872925 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 07:13:10.874011 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:13:10.874288 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 07:13:10.875340 runner path: /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/0/tests/0_ltp-ipc test_uuid 9045576_1.5.2.3.1
182 07:13:10.875444 SKIPFILE='skipfile-lkft.yaml'
183 07:13:10.875519 SKIP_INSTALL='true'
184 07:13:10.875588 TST_CMDFILES='ipc'
185 07:13:10.875737 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 07:13:10.875980 Creating lava-test-runner.conf files
188 07:13:10.876053 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045576/lava-overlay-3xvw118j/lava-9045576/0 for stage 0
189 07:13:10.876149 - 0_ltp-ipc
190 07:13:10.876256 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 07:13:10.876354 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 07:13:19.051598 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 07:13:19.051784 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
194 07:13:19.051893 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 07:13:19.052012 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 07:13:19.052119 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
197 07:13:19.164776 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 07:13:19.165164 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 07:13:19.165373 extracting modules file /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045576/extract-nfsrootfs-tk3p5v2b
200 07:13:19.170011 extracting modules file /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045576/extract-overlay-ramdisk-h6egb3pv/ramdisk
201 07:13:19.174427 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 07:13:19.174555 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 07:13:19.174653 [common] Applying overlay to NFS
204 07:13:19.174735 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045576/compress-overlay-rwvlixmt/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045576/extract-nfsrootfs-tk3p5v2b
205 07:13:19.683189 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
206 07:13:19.683379 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
207 07:13:19.683491 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 07:13:19.683597 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
209 07:13:19.683693 Building ramdisk /var/lib/lava/dispatcher/tmp/9045576/extract-overlay-ramdisk-h6egb3pv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045576/extract-overlay-ramdisk-h6egb3pv/ramdisk
210 07:13:19.720745 >> 24584 blocks
211 07:13:20.241960 rename /var/lib/lava/dispatcher/tmp/9045576/extract-overlay-ramdisk-h6egb3pv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
212 07:13:20.242403 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 07:13:20.242540 start: 1.5.8 prepare-kernel (timeout 00:09:39) [common]
214 07:13:20.242665 start: 1.5.8.1 prepare-fit (timeout 00:09:39) [common]
215 07:13:20.242773 No mkimage arch provided, not using FIT.
216 07:13:20.242875 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 07:13:20.242977 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 07:13:20.243095 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 07:13:20.243211 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
220 07:13:20.243305 No LXC device requested
221 07:13:20.243401 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 07:13:20.243505 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
223 07:13:20.243602 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 07:13:20.243683 Checking files for TFTP limit of 4294967296 bytes.
225 07:13:20.244106 end: 1 tftp-deploy (duration 00:00:21) [common]
226 07:13:20.244224 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 07:13:20.244331 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 07:13:20.244487 substitutions:
229 07:13:20.244576 - {DTB}: None
230 07:13:20.244653 - {INITRD}: 9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
231 07:13:20.244725 - {KERNEL}: 9045576/tftp-deploy-lmjhovuc/kernel/bzImage
232 07:13:20.244794 - {LAVA_MAC}: None
233 07:13:20.244862 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9045576/extract-nfsrootfs-tk3p5v2b
234 07:13:20.244942 - {NFS_SERVER_IP}: 192.168.201.1
235 07:13:20.245011 - {PRESEED_CONFIG}: None
236 07:13:20.245077 - {PRESEED_LOCAL}: None
237 07:13:20.245143 - {RAMDISK}: 9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
238 07:13:20.245208 - {ROOT_PART}: None
239 07:13:20.245273 - {ROOT}: None
240 07:13:20.245338 - {SERVER_IP}: 192.168.201.1
241 07:13:20.245402 - {TEE}: None
242 07:13:20.245466 Parsed boot commands:
243 07:13:20.245530 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 07:13:20.245708 Parsed boot commands: tftpboot 192.168.201.1 9045576/tftp-deploy-lmjhovuc/kernel/bzImage 9045576/tftp-deploy-lmjhovuc/kernel/cmdline 9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
245 07:13:20.245814 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 07:13:20.245919 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 07:13:20.246026 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 07:13:20.246129 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 07:13:20.246211 Not connected, no need to disconnect.
250 07:13:20.246303 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 07:13:20.246399 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 07:13:20.246478 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
253 07:13:20.249539 Setting prompt string to ['lava-test: # ']
254 07:13:20.249863 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 07:13:20.249991 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 07:13:20.250108 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 07:13:20.250215 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 07:13:20.250420 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
259 07:13:29.595112 >> Command sent successfully.
260 07:13:29.597401 Returned 0 in 9 seconds
261 07:13:29.698318 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 07:13:29.698898 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 07:13:29.699090 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 07:13:29.699255 Setting prompt string to 'Starting depthcharge on Helios...'
266 07:13:29.699389 Changing prompt to 'Starting depthcharge on Helios...'
267 07:13:29.699528 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 07:13:29.700028 [Enter `^Ec?' for help]
269 07:13:29.700176
270 07:13:29.700305
271 07:13:29.700439 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 07:13:29.700576 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 07:13:29.700702 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 07:13:29.700826 CPU: AES supported, TXT NOT supported, VT supported
275 07:13:29.700949 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 07:13:29.701071 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 07:13:29.701194 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 07:13:29.701316 VBOOT: Loading verstage.
279 07:13:29.701437 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 07:13:29.701559 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 07:13:29.701682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 07:13:29.701803 CBFS @ c08000 size 3f8000
283 07:13:29.701922 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 07:13:29.702042 CBFS: Locating 'fallback/verstage'
285 07:13:29.702162 CBFS: Found @ offset 10fb80 size 1072c
286 07:13:29.702282
287 07:13:29.702400
288 07:13:29.702518 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 07:13:29.702640 Probing TPM: . done!
290 07:13:29.702761 TPM ready after 0 ms
291 07:13:29.702880 Connected to device vid:did:rid of 1ae0:0028:00
292 07:13:29.703000 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
293 07:13:29.703124 Initialized TPM device CR50 revision 0
294 07:13:29.703243 tlcl_send_startup: Startup return code is 0
295 07:13:29.703363 TPM: setup succeeded
296 07:13:29.703483 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 07:13:29.703602 Chrome EC: UHEPI supported
298 07:13:29.703720 Phase 1
299 07:13:29.703841 FMAP: area GBB found @ c05000 (12288 bytes)
300 07:13:29.703961 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 07:13:29.704095 Phase 2
302 07:13:29.704229 Phase 3
303 07:13:29.704352 FMAP: area GBB found @ c05000 (12288 bytes)
304 07:13:29.704484 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 07:13:29.704606 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
306 07:13:29.704726 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 07:13:29.704846 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 07:13:29.704965 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
309 07:13:29.705084 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 07:13:29.705203 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 07:13:29.705320 Phase 4
312 07:13:29.705438 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
313 07:13:29.705558 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 07:13:29.705677 VB2:vb2_rsa_verify_digest() Digest check failed!
315 07:13:29.705796 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 07:13:29.705914 Saving nvdata
317 07:13:29.706031 Reboot requested (10020007)
318 07:13:29.706147 board_reset() called!
319 07:13:29.706264 full_reset() called!
320 07:13:33.277054
321 07:13:33.277220
322 07:13:33.286992 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 07:13:33.290771 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 07:13:33.296727 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 07:13:33.300218 CPU: AES supported, TXT NOT supported, VT supported
326 07:13:33.306596 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 07:13:33.310159 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 07:13:33.316591 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 07:13:33.320128 VBOOT: Loading verstage.
330 07:13:33.323142 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 07:13:33.330270 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 07:13:33.336688 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 07:13:33.336782 CBFS @ c08000 size 3f8000
334 07:13:33.343006 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 07:13:33.346560 CBFS: Locating 'fallback/verstage'
336 07:13:33.349835 CBFS: Found @ offset 10fb80 size 1072c
337 07:13:33.353822
338 07:13:33.353920
339 07:13:33.363706 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 07:13:33.378391 Probing TPM: . done!
341 07:13:33.382575 TPM ready after 0 ms
342 07:13:33.384790 Connected to device vid:did:rid of 1ae0:0028:00
343 07:13:33.394896 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
344 07:13:33.398630 Initialized TPM device CR50 revision 0
345 07:13:33.441839 tlcl_send_startup: Startup return code is 0
346 07:13:33.441936 TPM: setup succeeded
347 07:13:33.454765 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 07:13:33.458863 Chrome EC: UHEPI supported
349 07:13:33.461959 Phase 1
350 07:13:33.465004 FMAP: area GBB found @ c05000 (12288 bytes)
351 07:13:33.471579 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 07:13:33.478383 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 07:13:33.481743 Recovery requested (1009000e)
354 07:13:33.487574 Saving nvdata
355 07:13:33.493547 tlcl_extend: response is 0
356 07:13:33.502769 tlcl_extend: response is 0
357 07:13:33.509755 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 07:13:33.512629 CBFS @ c08000 size 3f8000
359 07:13:33.519326 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 07:13:33.523087 CBFS: Locating 'fallback/romstage'
361 07:13:33.525840 CBFS: Found @ offset 80 size 145fc
362 07:13:33.529315 Accumulated console time in verstage 98 ms
363 07:13:33.529411
364 07:13:33.529485
365 07:13:33.542201 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 07:13:33.549858 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 07:13:33.552115 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 07:13:33.555823 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 07:13:33.562216 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 07:13:33.565558 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 07:13:33.569003 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 07:13:33.572128 TCO_STS: 0000 0000
373 07:13:33.575829 GEN_PMCON: e0015238 00000200
374 07:13:33.578811 GBLRST_CAUSE: 00000000 00000000
375 07:13:33.578908 prev_sleep_state 5
376 07:13:33.582297 Boot Count incremented to 44400
377 07:13:33.589315 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 07:13:33.592317 CBFS @ c08000 size 3f8000
379 07:13:33.599453 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 07:13:33.599550 CBFS: Locating 'fspm.bin'
381 07:13:33.605854 CBFS: Found @ offset 5ffc0 size 71000
382 07:13:33.608767 Chrome EC: UHEPI supported
383 07:13:33.615798 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 07:13:33.619321 Probing TPM: done!
385 07:13:33.625854 Connected to device vid:did:rid of 1ae0:0028:00
386 07:13:33.636058 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
387 07:13:33.641742 Initialized TPM device CR50 revision 0
388 07:13:33.650642 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 07:13:33.657712 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 07:13:33.660700 MRC cache found, size 1948
391 07:13:33.664250 bootmode is set to: 2
392 07:13:33.667109 PRMRR disabled by config.
393 07:13:33.667208 SPD INDEX = 1
394 07:13:33.674157 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 07:13:33.677029 CBFS @ c08000 size 3f8000
396 07:13:33.684048 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 07:13:33.684148 CBFS: Locating 'spd.bin'
398 07:13:33.687586 CBFS: Found @ offset 5fb80 size 400
399 07:13:33.690357 SPD: module type is LPDDR3
400 07:13:33.694007 SPD: module part is
401 07:13:33.700401 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 07:13:33.704085 SPD: device width 4 bits, bus width 8 bits
403 07:13:33.706923 SPD: module size is 4096 MB (per channel)
404 07:13:33.710440 memory slot: 0 configuration done.
405 07:13:33.713346 memory slot: 2 configuration done.
406 07:13:33.765035 CBMEM:
407 07:13:33.768905 IMD: root @ 99fff000 254 entries.
408 07:13:33.771835 IMD: root @ 99ffec00 62 entries.
409 07:13:33.775386 External stage cache:
410 07:13:33.778360 IMD: root @ 9abff000 254 entries.
411 07:13:33.781882 IMD: root @ 9abfec00 62 entries.
412 07:13:33.788296 Chrome EC: clear events_b mask to 0x0000000020004000
413 07:13:33.801249 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 07:13:33.814694 tlcl_write: response is 0
415 07:13:33.823631 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 07:13:33.830095 MRC: TPM MRC hash updated successfully.
417 07:13:33.830192 2 DIMMs found
418 07:13:33.833261 SMM Memory Map
419 07:13:33.836818 SMRAM : 0x9a000000 0x1000000
420 07:13:33.840166 Subregion 0: 0x9a000000 0xa00000
421 07:13:33.843857 Subregion 1: 0x9aa00000 0x200000
422 07:13:33.846702 Subregion 2: 0x9ac00000 0x400000
423 07:13:33.850266 top_of_ram = 0x9a000000
424 07:13:33.853177 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 07:13:33.860276 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 07:13:33.863196 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 07:13:33.869937 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 07:13:33.873760 CBFS @ c08000 size 3f8000
429 07:13:33.876692 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 07:13:33.879893 CBFS: Locating 'fallback/postcar'
431 07:13:33.886258 CBFS: Found @ offset 107000 size 4b44
432 07:13:33.889544 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 07:13:33.902571 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 07:13:33.905370 Processing 180 relocs. Offset value of 0x97c0c000
435 07:13:33.914078 Accumulated console time in romstage 286 ms
436 07:13:33.914176
437 07:13:33.914252
438 07:13:33.924068 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 07:13:33.930715 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 07:13:33.933651 CBFS @ c08000 size 3f8000
441 07:13:33.940266 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 07:13:33.943708 CBFS: Locating 'fallback/ramstage'
443 07:13:33.946977 CBFS: Found @ offset 43380 size 1b9e8
444 07:13:33.953553 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 07:13:33.986047 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 07:13:33.989074 Processing 3976 relocs. Offset value of 0x98db0000
447 07:13:33.996613 Accumulated console time in postcar 52 ms
448 07:13:33.996713
449 07:13:33.996791
450 07:13:34.005780 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 07:13:34.012702 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 07:13:34.015631 WARNING: RO_VPD is uninitialized or empty.
453 07:13:34.019378 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 07:13:34.025601 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 07:13:34.025701 Normal boot.
456 07:13:34.032101 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 07:13:34.035795 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 07:13:34.038778 CBFS @ c08000 size 3f8000
459 07:13:34.045307 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 07:13:34.048904 CBFS: Locating 'cpu_microcode_blob.bin'
461 07:13:34.052386 CBFS: Found @ offset 14700 size 2ec00
462 07:13:34.055444 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 07:13:34.059357 Skip microcode update
464 07:13:34.065172 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 07:13:34.065272 CBFS @ c08000 size 3f8000
466 07:13:34.071739 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 07:13:34.075286 CBFS: Locating 'fsps.bin'
468 07:13:34.078421 CBFS: Found @ offset d1fc0 size 35000
469 07:13:34.104214 Detected 4 core, 8 thread CPU.
470 07:13:34.107694 Setting up SMI for CPU
471 07:13:34.110470 IED base = 0x9ac00000
472 07:13:34.110570 IED size = 0x00400000
473 07:13:34.114023 Will perform SMM setup.
474 07:13:34.120986 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 07:13:34.127123 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 07:13:34.130724 Processing 16 relocs. Offset value of 0x00030000
477 07:13:34.134285 Attempting to start 7 APs
478 07:13:34.137420 Waiting for 10ms after sending INIT.
479 07:13:34.153879 Waiting for 1st SIPI to complete...done.
480 07:13:34.153978 AP: slot 2 apic_id 1.
481 07:13:34.160723 Waiting for 2nd SIPI to complete...done.
482 07:13:34.160846 AP: slot 1 apic_id 3.
483 07:13:34.164053 AP: slot 5 apic_id 2.
484 07:13:34.167186 AP: slot 4 apic_id 6.
485 07:13:34.167286 AP: slot 3 apic_id 7.
486 07:13:34.170589 AP: slot 6 apic_id 5.
487 07:13:34.174236 AP: slot 7 apic_id 4.
488 07:13:34.180532 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 07:13:34.186841 Processing 13 relocs. Offset value of 0x00038000
490 07:13:34.190194 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 07:13:34.197139 Installing SMM handler to 0x9a000000
492 07:13:34.203396 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 07:13:34.209921 Processing 658 relocs. Offset value of 0x9a010000
494 07:13:34.217304 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 07:13:34.220046 Processing 13 relocs. Offset value of 0x9a008000
496 07:13:34.226956 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 07:13:34.233332 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 07:13:34.240089 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 07:13:34.243466 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 07:13:34.249981 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 07:13:34.256290 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 07:13:34.259692 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 07:13:34.266419 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 07:13:34.270339 Clearing SMI status registers
505 07:13:34.273207 SMI_STS: PM1
506 07:13:34.273307 PM1_STS: PWRBTN
507 07:13:34.276415 TCO_STS: SECOND_TO
508 07:13:34.279693 New SMBASE 0x9a000000
509 07:13:34.283298 In relocation handler: CPU 0
510 07:13:34.286791 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 07:13:34.290093 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 07:13:34.293103 Relocation complete.
513 07:13:34.296551 New SMBASE 0x99fff800
514 07:13:34.299535 In relocation handler: CPU 2
515 07:13:34.303791 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 07:13:34.306444 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 07:13:34.310148 Relocation complete.
518 07:13:34.312821 New SMBASE 0x99fff400
519 07:13:34.312921 In relocation handler: CPU 3
520 07:13:34.319630 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
521 07:13:34.322829 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 07:13:34.326000 Relocation complete.
523 07:13:34.329550 New SMBASE 0x99fff000
524 07:13:34.329648 In relocation handler: CPU 4
525 07:13:34.336124 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
526 07:13:34.339843 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 07:13:34.342780 Relocation complete.
528 07:13:34.342876 New SMBASE 0x99fffc00
529 07:13:34.346208 In relocation handler: CPU 1
530 07:13:34.352707 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
531 07:13:34.356605 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 07:13:34.359389 Relocation complete.
533 07:13:34.359501 New SMBASE 0x99ffec00
534 07:13:34.362618 In relocation handler: CPU 5
535 07:13:34.369794 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
536 07:13:34.372702 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 07:13:34.376003 Relocation complete.
538 07:13:34.376100 New SMBASE 0x99ffe400
539 07:13:34.379454 In relocation handler: CPU 7
540 07:13:34.382632 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
541 07:13:34.388895 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 07:13:34.392269 Relocation complete.
543 07:13:34.392366 New SMBASE 0x99ffe800
544 07:13:34.395847 In relocation handler: CPU 6
545 07:13:34.398853 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
546 07:13:34.405701 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 07:13:34.409259 Relocation complete.
548 07:13:34.409357 Initializing CPU #0
549 07:13:34.412301 CPU: vendor Intel device 806ec
550 07:13:34.415753 CPU: family 06, model 8e, stepping 0c
551 07:13:34.418962 Clearing out pending MCEs
552 07:13:34.422676 Setting up local APIC...
553 07:13:34.425560 apic_id: 0x00 done.
554 07:13:34.425659 Turbo is available but hidden
555 07:13:34.428946 Turbo is available and visible
556 07:13:34.432046 VMX status: enabled
557 07:13:34.435766 IA32_FEATURE_CONTROL status: locked
558 07:13:34.438831 Skip microcode update
559 07:13:34.438929 CPU #0 initialized
560 07:13:34.442539 Initializing CPU #2
561 07:13:34.445229 Initializing CPU #4
562 07:13:34.445328 Initializing CPU #7
563 07:13:34.449032 Initializing CPU #6
564 07:13:34.452212 CPU: vendor Intel device 806ec
565 07:13:34.455752 CPU: family 06, model 8e, stepping 0c
566 07:13:34.459067 CPU: vendor Intel device 806ec
567 07:13:34.461824 CPU: family 06, model 8e, stepping 0c
568 07:13:34.465619 Clearing out pending MCEs
569 07:13:34.468679 Clearing out pending MCEs
570 07:13:34.468778 Setting up local APIC...
571 07:13:34.471728 CPU: vendor Intel device 806ec
572 07:13:34.478639 CPU: family 06, model 8e, stepping 0c
573 07:13:34.478739 Clearing out pending MCEs
574 07:13:34.481590 Setting up local APIC...
575 07:13:34.485494 Setting up local APIC...
576 07:13:34.485593 apic_id: 0x05 done.
577 07:13:34.488526 apic_id: 0x04 done.
578 07:13:34.491898 VMX status: enabled
579 07:13:34.491997 VMX status: enabled
580 07:13:34.494898 IA32_FEATURE_CONTROL status: locked
581 07:13:34.502031 IA32_FEATURE_CONTROL status: locked
582 07:13:34.502130 Skip microcode update
583 07:13:34.505010 Skip microcode update
584 07:13:34.505109 CPU #6 initialized
585 07:13:34.508570 CPU #7 initialized
586 07:13:34.511376 apic_id: 0x01 done.
587 07:13:34.511475 Initializing CPU #5
588 07:13:34.514950 Initializing CPU #1
589 07:13:34.518507 CPU: vendor Intel device 806ec
590 07:13:34.521387 CPU: family 06, model 8e, stepping 0c
591 07:13:34.525054 CPU: vendor Intel device 806ec
592 07:13:34.528024 CPU: family 06, model 8e, stepping 0c
593 07:13:34.531786 Clearing out pending MCEs
594 07:13:34.534504 Clearing out pending MCEs
595 07:13:34.534603 Setting up local APIC...
596 07:13:34.538049 CPU: vendor Intel device 806ec
597 07:13:34.544480 CPU: family 06, model 8e, stepping 0c
598 07:13:34.544579 Initializing CPU #3
599 07:13:34.548032 Clearing out pending MCEs
600 07:13:34.551571 Setting up local APIC...
601 07:13:34.554688 CPU: vendor Intel device 806ec
602 07:13:34.557960 CPU: family 06, model 8e, stepping 0c
603 07:13:34.561531 Setting up local APIC...
604 07:13:34.561631 apic_id: 0x03 done.
605 07:13:34.564542 apic_id: 0x02 done.
606 07:13:34.568095 VMX status: enabled
607 07:13:34.568194 VMX status: enabled
608 07:13:34.571112 IA32_FEATURE_CONTROL status: locked
609 07:13:34.574670 IA32_FEATURE_CONTROL status: locked
610 07:13:34.577765 Skip microcode update
611 07:13:34.581065 Skip microcode update
612 07:13:34.581163 CPU #1 initialized
613 07:13:34.584601 CPU #5 initialized
614 07:13:34.584700 VMX status: enabled
615 07:13:34.587951 Clearing out pending MCEs
616 07:13:34.590888 apic_id: 0x06 done.
617 07:13:34.594414 Setting up local APIC...
618 07:13:34.597997 IA32_FEATURE_CONTROL status: locked
619 07:13:34.598095 VMX status: enabled
620 07:13:34.600906 apic_id: 0x07 done.
621 07:13:34.604433 IA32_FEATURE_CONTROL status: locked
622 07:13:34.607586 VMX status: enabled
623 07:13:34.607685 Skip microcode update
624 07:13:34.611026 IA32_FEATURE_CONTROL status: locked
625 07:13:34.614652 CPU #4 initialized
626 07:13:34.617619 Skip microcode update
627 07:13:34.617717 Skip microcode update
628 07:13:34.620686 CPU #3 initialized
629 07:13:34.624397 CPU #2 initialized
630 07:13:34.627410 bsp_do_flight_plan done after 466 msecs.
631 07:13:34.630792 CPU: frequency set to 4200 MHz
632 07:13:34.630891 Enabling SMIs.
633 07:13:34.633854 Locking SMM.
634 07:13:34.647766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 07:13:34.651321 CBFS @ c08000 size 3f8000
636 07:13:34.657905 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 07:13:34.658006 CBFS: Locating 'vbt.bin'
638 07:13:34.664258 CBFS: Found @ offset 5f5c0 size 499
639 07:13:34.667921 Found a VBT of 4608 bytes after decompression
640 07:13:34.849748 Display FSP Version Info HOB
641 07:13:34.852689 Reference Code - CPU = 9.0.1e.30
642 07:13:34.856221 uCode Version = 0.0.0.ca
643 07:13:34.859411 TXT ACM version = ff.ff.ff.ffff
644 07:13:34.862623 Display FSP Version Info HOB
645 07:13:34.866076 Reference Code - ME = 9.0.1e.30
646 07:13:34.869747 MEBx version = 0.0.0.0
647 07:13:34.872792 ME Firmware Version = Consumer SKU
648 07:13:34.876391 Display FSP Version Info HOB
649 07:13:34.879190 Reference Code - CML PCH = 9.0.1e.30
650 07:13:34.882657 PCH-CRID Status = Disabled
651 07:13:34.886106 PCH-CRID Original Value = ff.ff.ff.ffff
652 07:13:34.889496 PCH-CRID New Value = ff.ff.ff.ffff
653 07:13:34.892370 OPROM - RST - RAID = ff.ff.ff.ffff
654 07:13:34.895947 ChipsetInit Base Version = ff.ff.ff.ffff
655 07:13:34.899311 ChipsetInit Oem Version = ff.ff.ff.ffff
656 07:13:34.902742 Display FSP Version Info HOB
657 07:13:34.909157 Reference Code - SA - System Agent = 9.0.1e.30
658 07:13:34.912679 Reference Code - MRC = 0.7.1.6c
659 07:13:34.912776 SA - PCIe Version = 9.0.1e.30
660 07:13:34.915707 SA-CRID Status = Disabled
661 07:13:34.919049 SA-CRID Original Value = 0.0.0.c
662 07:13:34.922556 SA-CRID New Value = 0.0.0.c
663 07:13:34.926357 OPROM - VBIOS = ff.ff.ff.ffff
664 07:13:34.928895 RTC Init
665 07:13:34.932414 Set power on after power failure.
666 07:13:34.932526 Disabling Deep S3
667 07:13:34.935722 Disabling Deep S3
668 07:13:34.935818 Disabling Deep S4
669 07:13:34.939270 Disabling Deep S4
670 07:13:34.939379 Disabling Deep S5
671 07:13:34.942216 Disabling Deep S5
672 07:13:34.948944 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
673 07:13:34.949042 Enumerating buses...
674 07:13:34.955646 Show all devs... Before device enumeration.
675 07:13:34.955742 Root Device: enabled 1
676 07:13:34.958558 CPU_CLUSTER: 0: enabled 1
677 07:13:34.962138 DOMAIN: 0000: enabled 1
678 07:13:34.965695 APIC: 00: enabled 1
679 07:13:34.965791 PCI: 00:00.0: enabled 1
680 07:13:34.968897 PCI: 00:02.0: enabled 1
681 07:13:34.972275 PCI: 00:04.0: enabled 0
682 07:13:34.975385 PCI: 00:05.0: enabled 0
683 07:13:34.975482 PCI: 00:12.0: enabled 1
684 07:13:34.978492 PCI: 00:12.5: enabled 0
685 07:13:34.981827 PCI: 00:12.6: enabled 0
686 07:13:34.985382 PCI: 00:14.0: enabled 1
687 07:13:34.985478 PCI: 00:14.1: enabled 0
688 07:13:34.988831 PCI: 00:14.3: enabled 1
689 07:13:34.991825 PCI: 00:14.5: enabled 0
690 07:13:34.991922 PCI: 00:15.0: enabled 1
691 07:13:34.994948 PCI: 00:15.1: enabled 1
692 07:13:34.998496 PCI: 00:15.2: enabled 0
693 07:13:35.001630 PCI: 00:15.3: enabled 0
694 07:13:35.001727 PCI: 00:16.0: enabled 1
695 07:13:35.005053 PCI: 00:16.1: enabled 0
696 07:13:35.008532 PCI: 00:16.2: enabled 0
697 07:13:35.011966 PCI: 00:16.3: enabled 0
698 07:13:35.012063 PCI: 00:16.4: enabled 0
699 07:13:35.014768 PCI: 00:16.5: enabled 0
700 07:13:35.018664 PCI: 00:17.0: enabled 1
701 07:13:35.021775 PCI: 00:19.0: enabled 1
702 07:13:35.021875 PCI: 00:19.1: enabled 0
703 07:13:35.025115 PCI: 00:19.2: enabled 0
704 07:13:35.028228 PCI: 00:1a.0: enabled 0
705 07:13:35.028327 PCI: 00:1c.0: enabled 0
706 07:13:35.031815 PCI: 00:1c.1: enabled 0
707 07:13:35.034786 PCI: 00:1c.2: enabled 0
708 07:13:35.038468 PCI: 00:1c.3: enabled 0
709 07:13:35.038566 PCI: 00:1c.4: enabled 0
710 07:13:35.041601 PCI: 00:1c.5: enabled 0
711 07:13:35.044886 PCI: 00:1c.6: enabled 0
712 07:13:35.048465 PCI: 00:1c.7: enabled 0
713 07:13:35.048564 PCI: 00:1d.0: enabled 1
714 07:13:35.051403 PCI: 00:1d.1: enabled 0
715 07:13:35.054974 PCI: 00:1d.2: enabled 0
716 07:13:35.057997 PCI: 00:1d.3: enabled 0
717 07:13:35.058096 PCI: 00:1d.4: enabled 0
718 07:13:35.061062 PCI: 00:1d.5: enabled 1
719 07:13:35.064514 PCI: 00:1e.0: enabled 1
720 07:13:35.068030 PCI: 00:1e.1: enabled 0
721 07:13:35.068129 PCI: 00:1e.2: enabled 1
722 07:13:35.071666 PCI: 00:1e.3: enabled 1
723 07:13:35.074576 PCI: 00:1f.0: enabled 1
724 07:13:35.074675 PCI: 00:1f.1: enabled 1
725 07:13:35.077724 PCI: 00:1f.2: enabled 1
726 07:13:35.081271 PCI: 00:1f.3: enabled 1
727 07:13:35.084281 PCI: 00:1f.4: enabled 1
728 07:13:35.084381 PCI: 00:1f.5: enabled 1
729 07:13:35.087754 PCI: 00:1f.6: enabled 0
730 07:13:35.091282 USB0 port 0: enabled 1
731 07:13:35.094211 I2C: 00:15: enabled 1
732 07:13:35.094310 I2C: 00:5d: enabled 1
733 07:13:35.097652 GENERIC: 0.0: enabled 1
734 07:13:35.101077 I2C: 00:1a: enabled 1
735 07:13:35.101176 I2C: 00:38: enabled 1
736 07:13:35.104447 I2C: 00:39: enabled 1
737 07:13:35.107408 I2C: 00:3a: enabled 1
738 07:13:35.107506 I2C: 00:3b: enabled 1
739 07:13:35.110956 PCI: 00:00.0: enabled 1
740 07:13:35.114290 SPI: 00: enabled 1
741 07:13:35.114389 SPI: 01: enabled 1
742 07:13:35.117485 PNP: 0c09.0: enabled 1
743 07:13:35.121122 USB2 port 0: enabled 1
744 07:13:35.121222 USB2 port 1: enabled 1
745 07:13:35.124181 USB2 port 2: enabled 0
746 07:13:35.127521 USB2 port 3: enabled 0
747 07:13:35.127620 USB2 port 5: enabled 0
748 07:13:35.130682 USB2 port 6: enabled 1
749 07:13:35.134243 USB2 port 9: enabled 1
750 07:13:35.137732 USB3 port 0: enabled 1
751 07:13:35.137830 USB3 port 1: enabled 1
752 07:13:35.140662 USB3 port 2: enabled 1
753 07:13:35.144197 USB3 port 3: enabled 1
754 07:13:35.144296 USB3 port 4: enabled 0
755 07:13:35.147733 APIC: 03: enabled 1
756 07:13:35.150843 APIC: 01: enabled 1
757 07:13:35.150941 APIC: 07: enabled 1
758 07:13:35.153938 APIC: 06: enabled 1
759 07:13:35.154038 APIC: 02: enabled 1
760 07:13:35.157101 APIC: 05: enabled 1
761 07:13:35.160550 APIC: 04: enabled 1
762 07:13:35.160649 Compare with tree...
763 07:13:35.164070 Root Device: enabled 1
764 07:13:35.167602 CPU_CLUSTER: 0: enabled 1
765 07:13:35.170367 APIC: 00: enabled 1
766 07:13:35.170466 APIC: 03: enabled 1
767 07:13:35.173905 APIC: 01: enabled 1
768 07:13:35.177628 APIC: 07: enabled 1
769 07:13:35.177728 APIC: 06: enabled 1
770 07:13:35.180562 APIC: 02: enabled 1
771 07:13:35.183542 APIC: 05: enabled 1
772 07:13:35.183641 APIC: 04: enabled 1
773 07:13:35.187418 DOMAIN: 0000: enabled 1
774 07:13:35.190475 PCI: 00:00.0: enabled 1
775 07:13:35.193939 PCI: 00:02.0: enabled 1
776 07:13:35.194038 PCI: 00:04.0: enabled 0
777 07:13:35.197602 PCI: 00:05.0: enabled 0
778 07:13:35.200291 PCI: 00:12.0: enabled 1
779 07:13:35.203854 PCI: 00:12.5: enabled 0
780 07:13:35.207158 PCI: 00:12.6: enabled 0
781 07:13:35.207257 PCI: 00:14.0: enabled 1
782 07:13:35.210697 USB0 port 0: enabled 1
783 07:13:35.213604 USB2 port 0: enabled 1
784 07:13:35.216882 USB2 port 1: enabled 1
785 07:13:35.220135 USB2 port 2: enabled 0
786 07:13:35.220234 USB2 port 3: enabled 0
787 07:13:35.223344 USB2 port 5: enabled 0
788 07:13:35.226983 USB2 port 6: enabled 1
789 07:13:35.229879 USB2 port 9: enabled 1
790 07:13:35.233421 USB3 port 0: enabled 1
791 07:13:35.236369 USB3 port 1: enabled 1
792 07:13:35.236477 USB3 port 2: enabled 1
793 07:13:35.240079 USB3 port 3: enabled 1
794 07:13:35.243575 USB3 port 4: enabled 0
795 07:13:35.246644 PCI: 00:14.1: enabled 0
796 07:13:35.250169 PCI: 00:14.3: enabled 1
797 07:13:35.250268 PCI: 00:14.5: enabled 0
798 07:13:35.253182 PCI: 00:15.0: enabled 1
799 07:13:35.256742 I2C: 00:15: enabled 1
800 07:13:35.259802 PCI: 00:15.1: enabled 1
801 07:13:35.263397 I2C: 00:5d: enabled 1
802 07:13:35.263502 GENERIC: 0.0: enabled 1
803 07:13:35.266478 PCI: 00:15.2: enabled 0
804 07:13:35.270025 PCI: 00:15.3: enabled 0
805 07:13:35.273485 PCI: 00:16.0: enabled 1
806 07:13:35.276217 PCI: 00:16.1: enabled 0
807 07:13:35.276316 PCI: 00:16.2: enabled 0
808 07:13:35.280055 PCI: 00:16.3: enabled 0
809 07:13:35.283100 PCI: 00:16.4: enabled 0
810 07:13:35.286771 PCI: 00:16.5: enabled 0
811 07:13:35.289740 PCI: 00:17.0: enabled 1
812 07:13:35.289838 PCI: 00:19.0: enabled 1
813 07:13:35.293147 I2C: 00:1a: enabled 1
814 07:13:35.296729 I2C: 00:38: enabled 1
815 07:13:35.299619 I2C: 00:39: enabled 1
816 07:13:35.299718 I2C: 00:3a: enabled 1
817 07:13:35.303061 I2C: 00:3b: enabled 1
818 07:13:35.306382 PCI: 00:19.1: enabled 0
819 07:13:35.309559 PCI: 00:19.2: enabled 0
820 07:13:35.309656 PCI: 00:1a.0: enabled 0
821 07:13:35.313254 PCI: 00:1c.0: enabled 0
822 07:13:35.316333 PCI: 00:1c.1: enabled 0
823 07:13:35.319533 PCI: 00:1c.2: enabled 0
824 07:13:35.323052 PCI: 00:1c.3: enabled 0
825 07:13:35.323150 PCI: 00:1c.4: enabled 0
826 07:13:35.326475 PCI: 00:1c.5: enabled 0
827 07:13:35.329662 PCI: 00:1c.6: enabled 0
828 07:13:35.333187 PCI: 00:1c.7: enabled 0
829 07:13:35.336250 PCI: 00:1d.0: enabled 1
830 07:13:35.336347 PCI: 00:1d.1: enabled 0
831 07:13:35.339737 PCI: 00:1d.2: enabled 0
832 07:13:35.342868 PCI: 00:1d.3: enabled 0
833 07:13:35.346224 PCI: 00:1d.4: enabled 0
834 07:13:35.349219 PCI: 00:1d.5: enabled 1
835 07:13:35.349316 PCI: 00:00.0: enabled 1
836 07:13:35.352849 PCI: 00:1e.0: enabled 1
837 07:13:35.356119 PCI: 00:1e.1: enabled 0
838 07:13:35.359731 PCI: 00:1e.2: enabled 1
839 07:13:35.359828 SPI: 00: enabled 1
840 07:13:35.362658 PCI: 00:1e.3: enabled 1
841 07:13:35.366123 SPI: 01: enabled 1
842 07:13:35.369276 PCI: 00:1f.0: enabled 1
843 07:13:35.372591 PNP: 0c09.0: enabled 1
844 07:13:35.372688 PCI: 00:1f.1: enabled 1
845 07:13:35.375870 PCI: 00:1f.2: enabled 1
846 07:13:35.379412 PCI: 00:1f.3: enabled 1
847 07:13:35.382687 PCI: 00:1f.4: enabled 1
848 07:13:35.382785 PCI: 00:1f.5: enabled 1
849 07:13:35.386275 PCI: 00:1f.6: enabled 0
850 07:13:35.389348 Root Device scanning...
851 07:13:35.392332 scan_static_bus for Root Device
852 07:13:35.395684 CPU_CLUSTER: 0 enabled
853 07:13:35.395781 DOMAIN: 0000 enabled
854 07:13:35.399205 DOMAIN: 0000 scanning...
855 07:13:35.402640 PCI: pci_scan_bus for bus 00
856 07:13:35.406083 PCI: 00:00.0 [8086/0000] ops
857 07:13:35.408946 PCI: 00:00.0 [8086/9b61] enabled
858 07:13:35.412370 PCI: 00:02.0 [8086/0000] bus ops
859 07:13:35.415975 PCI: 00:02.0 [8086/9b41] enabled
860 07:13:35.418915 PCI: 00:04.0 [8086/1903] disabled
861 07:13:35.422346 PCI: 00:08.0 [8086/1911] enabled
862 07:13:35.426081 PCI: 00:12.0 [8086/02f9] enabled
863 07:13:35.428833 PCI: 00:14.0 [8086/0000] bus ops
864 07:13:35.432485 PCI: 00:14.0 [8086/02ed] enabled
865 07:13:35.436152 PCI: 00:14.2 [8086/02ef] enabled
866 07:13:35.438911 PCI: 00:14.3 [8086/02f0] enabled
867 07:13:35.442253 PCI: 00:15.0 [8086/0000] bus ops
868 07:13:35.445945 PCI: 00:15.0 [8086/02e8] enabled
869 07:13:35.449039 PCI: 00:15.1 [8086/0000] bus ops
870 07:13:35.452297 PCI: 00:15.1 [8086/02e9] enabled
871 07:13:35.455445 PCI: 00:16.0 [8086/0000] ops
872 07:13:35.458901 PCI: 00:16.0 [8086/02e0] enabled
873 07:13:35.462392 PCI: 00:17.0 [8086/0000] ops
874 07:13:35.465396 PCI: 00:17.0 [8086/02d3] enabled
875 07:13:35.469084 PCI: 00:19.0 [8086/0000] bus ops
876 07:13:35.472039 PCI: 00:19.0 [8086/02c5] enabled
877 07:13:35.475261 PCI: 00:1d.0 [8086/0000] bus ops
878 07:13:35.478645 PCI: 00:1d.0 [8086/02b0] enabled
879 07:13:35.485486 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 07:13:35.488566 PCI: 00:1e.0 [8086/0000] ops
881 07:13:35.492142 PCI: 00:1e.0 [8086/02a8] enabled
882 07:13:35.495393 PCI: 00:1e.2 [8086/0000] bus ops
883 07:13:35.498926 PCI: 00:1e.2 [8086/02aa] enabled
884 07:13:35.501917 PCI: 00:1e.3 [8086/0000] bus ops
885 07:13:35.505393 PCI: 00:1e.3 [8086/02ab] enabled
886 07:13:35.508405 PCI: 00:1f.0 [8086/0000] bus ops
887 07:13:35.512335 PCI: 00:1f.0 [8086/0284] enabled
888 07:13:35.515453 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 07:13:35.521949 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 07:13:35.525460 PCI: 00:1f.3 [8086/0000] bus ops
891 07:13:35.528633 PCI: 00:1f.3 [8086/02c8] enabled
892 07:13:35.531986 PCI: 00:1f.4 [8086/0000] bus ops
893 07:13:35.535067 PCI: 00:1f.4 [8086/02a3] enabled
894 07:13:35.538256 PCI: 00:1f.5 [8086/0000] bus ops
895 07:13:35.541824 PCI: 00:1f.5 [8086/02a4] enabled
896 07:13:35.545239 PCI: Leftover static devices:
897 07:13:35.545335 PCI: 00:05.0
898 07:13:35.548191 PCI: 00:12.5
899 07:13:35.548286 PCI: 00:12.6
900 07:13:35.551820 PCI: 00:14.1
901 07:13:35.551915 PCI: 00:14.5
902 07:13:35.551990 PCI: 00:15.2
903 07:13:35.555240 PCI: 00:15.3
904 07:13:35.555335 PCI: 00:16.1
905 07:13:35.558600 PCI: 00:16.2
906 07:13:35.558695 PCI: 00:16.3
907 07:13:35.558787 PCI: 00:16.4
908 07:13:35.561611 PCI: 00:16.5
909 07:13:35.561707 PCI: 00:19.1
910 07:13:35.564751 PCI: 00:19.2
911 07:13:35.564847 PCI: 00:1a.0
912 07:13:35.564923 PCI: 00:1c.0
913 07:13:35.568467 PCI: 00:1c.1
914 07:13:35.568576 PCI: 00:1c.2
915 07:13:35.571908 PCI: 00:1c.3
916 07:13:35.572003 PCI: 00:1c.4
917 07:13:35.574879 PCI: 00:1c.5
918 07:13:35.575004 PCI: 00:1c.6
919 07:13:35.575109 PCI: 00:1c.7
920 07:13:35.578225 PCI: 00:1d.1
921 07:13:35.578334 PCI: 00:1d.2
922 07:13:35.581514 PCI: 00:1d.3
923 07:13:35.581610 PCI: 00:1d.4
924 07:13:35.581686 PCI: 00:1d.5
925 07:13:35.584601 PCI: 00:1e.1
926 07:13:35.584697 PCI: 00:1f.1
927 07:13:35.588341 PCI: 00:1f.2
928 07:13:35.588445 PCI: 00:1f.6
929 07:13:35.591277 PCI: Check your devicetree.cb.
930 07:13:35.594550 PCI: 00:02.0 scanning...
931 07:13:35.598208 scan_generic_bus for PCI: 00:02.0
932 07:13:35.601066 scan_generic_bus for PCI: 00:02.0 done
933 07:13:35.608210 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
934 07:13:35.608309 PCI: 00:14.0 scanning...
935 07:13:35.611511 scan_static_bus for PCI: 00:14.0
936 07:13:35.614994 USB0 port 0 enabled
937 07:13:35.618303 USB0 port 0 scanning...
938 07:13:35.621842 scan_static_bus for USB0 port 0
939 07:13:35.624682 USB2 port 0 enabled
940 07:13:35.624780 USB2 port 1 enabled
941 07:13:35.628320 USB2 port 2 disabled
942 07:13:35.628423 USB2 port 3 disabled
943 07:13:35.631534 USB2 port 5 disabled
944 07:13:35.634991 USB2 port 6 enabled
945 07:13:35.635089 USB2 port 9 enabled
946 07:13:35.638644 USB3 port 0 enabled
947 07:13:35.641182 USB3 port 1 enabled
948 07:13:35.641280 USB3 port 2 enabled
949 07:13:35.644664 USB3 port 3 enabled
950 07:13:35.644762 USB3 port 4 disabled
951 07:13:35.648227 USB2 port 0 scanning...
952 07:13:35.651688 scan_static_bus for USB2 port 0
953 07:13:35.655030 scan_static_bus for USB2 port 0 done
954 07:13:35.661291 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
955 07:13:35.664969 USB2 port 1 scanning...
956 07:13:35.667770 scan_static_bus for USB2 port 1
957 07:13:35.671423 scan_static_bus for USB2 port 1 done
958 07:13:35.675088 scan_bus: scanning of bus USB2 port 1 took 9704 usecs
959 07:13:35.677756 USB2 port 6 scanning...
960 07:13:35.681209 scan_static_bus for USB2 port 6
961 07:13:35.684752 scan_static_bus for USB2 port 6 done
962 07:13:35.690876 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
963 07:13:35.694633 USB2 port 9 scanning...
964 07:13:35.697725 scan_static_bus for USB2 port 9
965 07:13:35.700913 scan_static_bus for USB2 port 9 done
966 07:13:35.707574 scan_bus: scanning of bus USB2 port 9 took 9693 usecs
967 07:13:35.707672 USB3 port 0 scanning...
968 07:13:35.711346 scan_static_bus for USB3 port 0
969 07:13:35.714366 scan_static_bus for USB3 port 0 done
970 07:13:35.720904 scan_bus: scanning of bus USB3 port 0 took 9701 usecs
971 07:13:35.724182 USB3 port 1 scanning...
972 07:13:35.727812 scan_static_bus for USB3 port 1
973 07:13:35.730985 scan_static_bus for USB3 port 1 done
974 07:13:35.737721 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
975 07:13:35.737820 USB3 port 2 scanning...
976 07:13:35.740633 scan_static_bus for USB3 port 2
977 07:13:35.743845 scan_static_bus for USB3 port 2 done
978 07:13:35.750860 scan_bus: scanning of bus USB3 port 2 took 9705 usecs
979 07:13:35.754628 USB3 port 3 scanning...
980 07:13:35.757365 scan_static_bus for USB3 port 3
981 07:13:35.760570 scan_static_bus for USB3 port 3 done
982 07:13:35.767113 scan_bus: scanning of bus USB3 port 3 took 9701 usecs
983 07:13:35.770489 scan_static_bus for USB0 port 0 done
984 07:13:35.774054 scan_bus: scanning of bus USB0 port 0 took 155306 usecs
985 07:13:35.780314 scan_static_bus for PCI: 00:14.0 done
986 07:13:35.783677 scan_bus: scanning of bus PCI: 00:14.0 took 172928 usecs
987 07:13:35.787664 PCI: 00:15.0 scanning...
988 07:13:35.790303 scan_generic_bus for PCI: 00:15.0
989 07:13:35.793880 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 07:13:35.800022 scan_generic_bus for PCI: 00:15.0 done
991 07:13:35.803600 scan_bus: scanning of bus PCI: 00:15.0 took 14281 usecs
992 07:13:35.806934 PCI: 00:15.1 scanning...
993 07:13:35.810025 scan_generic_bus for PCI: 00:15.1
994 07:13:35.813840 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 07:13:35.820180 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 07:13:35.823580 scan_generic_bus for PCI: 00:15.1 done
997 07:13:35.830546 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
998 07:13:35.830646 PCI: 00:19.0 scanning...
999 07:13:35.833434 scan_generic_bus for PCI: 00:19.0
1000 07:13:35.840008 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 07:13:35.843096 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 07:13:35.846814 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 07:13:35.849701 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 07:13:35.856552 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 07:13:35.860061 scan_generic_bus for PCI: 00:19.0 done
1006 07:13:35.862878 scan_bus: scanning of bus PCI: 00:19.0 took 30719 usecs
1007 07:13:35.866423 PCI: 00:1d.0 scanning...
1008 07:13:35.869585 do_pci_scan_bridge for PCI: 00:1d.0
1009 07:13:35.872999 PCI: pci_scan_bus for bus 01
1010 07:13:35.876622 PCI: 01:00.0 [1c5c/1327] enabled
1011 07:13:35.879567 Enabling Common Clock Configuration
1012 07:13:35.886240 L1 Sub-State supported from root port 29
1013 07:13:35.889692 L1 Sub-State Support = 0xf
1014 07:13:35.889788 CommonModeRestoreTime = 0x28
1015 07:13:35.896261 Power On Value = 0x16, Power On Scale = 0x0
1016 07:13:35.896359 ASPM: Enabled L1
1017 07:13:35.902841 scan_bus: scanning of bus PCI: 00:1d.0 took 32770 usecs
1018 07:13:35.906260 PCI: 00:1e.2 scanning...
1019 07:13:35.909459 scan_generic_bus for PCI: 00:1e.2
1020 07:13:35.912972 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 07:13:35.916400 scan_generic_bus for PCI: 00:1e.2 done
1022 07:13:35.922896 scan_bus: scanning of bus PCI: 00:1e.2 took 13992 usecs
1023 07:13:35.926089 PCI: 00:1e.3 scanning...
1024 07:13:35.929577 scan_generic_bus for PCI: 00:1e.3
1025 07:13:35.932637 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 07:13:35.935993 scan_generic_bus for PCI: 00:1e.3 done
1027 07:13:35.942701 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
1028 07:13:35.945634 PCI: 00:1f.0 scanning...
1029 07:13:35.949230 scan_static_bus for PCI: 00:1f.0
1030 07:13:35.949327 PNP: 0c09.0 enabled
1031 07:13:35.952968 scan_static_bus for PCI: 00:1f.0 done
1032 07:13:35.958988 scan_bus: scanning of bus PCI: 00:1f.0 took 12041 usecs
1033 07:13:35.962510 PCI: 00:1f.3 scanning...
1034 07:13:35.969002 scan_bus: scanning of bus PCI: 00:1f.3 took 2858 usecs
1035 07:13:35.969104 PCI: 00:1f.4 scanning...
1036 07:13:35.972853 scan_generic_bus for PCI: 00:1f.4
1037 07:13:35.978954 scan_generic_bus for PCI: 00:1f.4 done
1038 07:13:35.982372 scan_bus: scanning of bus PCI: 00:1f.4 took 10181 usecs
1039 07:13:35.986108 PCI: 00:1f.5 scanning...
1040 07:13:35.988759 scan_generic_bus for PCI: 00:1f.5
1041 07:13:35.992655 scan_generic_bus for PCI: 00:1f.5 done
1042 07:13:35.999230 scan_bus: scanning of bus PCI: 00:1f.5 took 10192 usecs
1043 07:13:36.005341 scan_bus: scanning of bus DOMAIN: 0000 took 604852 usecs
1044 07:13:36.008537 scan_static_bus for Root Device done
1045 07:13:36.015671 scan_bus: scanning of bus Root Device took 624755 usecs
1046 07:13:36.015769 done
1047 07:13:36.018443 Chrome EC: UHEPI supported
1048 07:13:36.025585 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 07:13:36.028538 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 07:13:36.035215 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 07:13:36.042029 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 07:13:36.045806 SPI flash protection: WPSW=0 SRP0=0
1053 07:13:36.052022 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 07:13:36.055828 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 07:13:36.058927 found VGA at PCI: 00:02.0
1056 07:13:36.061898 Setting up VGA for PCI: 00:02.0
1057 07:13:36.068805 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 07:13:36.071733 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 07:13:36.075286 Allocating resources...
1060 07:13:36.078458 Reading resources...
1061 07:13:36.081990 Root Device read_resources bus 0 link: 0
1062 07:13:36.084828 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 07:13:36.092055 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 07:13:36.094743 DOMAIN: 0000 read_resources bus 0 link: 0
1065 07:13:36.102147 PCI: 00:14.0 read_resources bus 0 link: 0
1066 07:13:36.105383 USB0 port 0 read_resources bus 0 link: 0
1067 07:13:36.114048 USB0 port 0 read_resources bus 0 link: 0 done
1068 07:13:36.116892 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 07:13:36.124158 PCI: 00:15.0 read_resources bus 1 link: 0
1070 07:13:36.127397 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 07:13:36.134542 PCI: 00:15.1 read_resources bus 2 link: 0
1072 07:13:36.137373 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 07:13:36.145177 PCI: 00:19.0 read_resources bus 3 link: 0
1074 07:13:36.151618 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 07:13:36.155107 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 07:13:36.161595 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 07:13:36.165179 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 07:13:36.172017 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 07:13:36.174921 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 07:13:36.181493 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 07:13:36.184854 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 07:13:36.191366 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 07:13:36.198122 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 07:13:36.201135 Root Device read_resources bus 0 link: 0 done
1085 07:13:36.204740 Done reading resources.
1086 07:13:36.211001 Show resources in subtree (Root Device)...After reading.
1087 07:13:36.214527 Root Device child on link 0 CPU_CLUSTER: 0
1088 07:13:36.217568 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 07:13:36.220967 APIC: 00
1090 07:13:36.221061 APIC: 03
1091 07:13:36.221136 APIC: 01
1092 07:13:36.224380 APIC: 07
1093 07:13:36.224497 APIC: 06
1094 07:13:36.224572 APIC: 02
1095 07:13:36.227951 APIC: 05
1096 07:13:36.228045 APIC: 04
1097 07:13:36.234159 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 07:13:36.241152 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 07:13:36.293730 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 07:13:36.294103 PCI: 00:00.0
1101 07:13:36.294463 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 07:13:36.294562 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 07:13:36.294868 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 07:13:36.295154 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 07:13:36.343451 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 07:13:36.343781 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 07:13:36.344301 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 07:13:36.344583 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 07:13:36.345322 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 07:13:36.393261 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 07:13:36.393670 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 07:13:36.395046 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 07:13:36.395396 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 07:13:36.396126 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 07:13:36.396448 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 07:13:36.407860 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 07:13:36.407957 PCI: 00:02.0
1118 07:13:36.414846 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 07:13:36.424574 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 07:13:36.434350 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 07:13:36.434449 PCI: 00:04.0
1122 07:13:36.437553 PCI: 00:08.0
1123 07:13:36.447786 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 07:13:36.447885 PCI: 00:12.0
1125 07:13:36.458156 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 07:13:36.464283 PCI: 00:14.0 child on link 0 USB0 port 0
1127 07:13:36.474057 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 07:13:36.477685 USB0 port 0 child on link 0 USB2 port 0
1129 07:13:36.480571 USB2 port 0
1130 07:13:36.480670 USB2 port 1
1131 07:13:36.484294 USB2 port 2
1132 07:13:36.484392 USB2 port 3
1133 07:13:36.487396 USB2 port 5
1134 07:13:36.487493 USB2 port 6
1135 07:13:36.490751 USB2 port 9
1136 07:13:36.490848 USB3 port 0
1137 07:13:36.493760 USB3 port 1
1138 07:13:36.493857 USB3 port 2
1139 07:13:36.497017 USB3 port 3
1140 07:13:36.497114 USB3 port 4
1141 07:13:36.500609 PCI: 00:14.2
1142 07:13:36.510693 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 07:13:36.520799 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 07:13:36.520897 PCI: 00:14.3
1145 07:13:36.530371 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 07:13:36.537178 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 07:13:36.546951 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 07:13:36.547049 I2C: 01:15
1149 07:13:36.550503 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 07:13:36.560196 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 07:13:36.563546 I2C: 02:5d
1152 07:13:36.563649 GENERIC: 0.0
1153 07:13:36.566847 PCI: 00:16.0
1154 07:13:36.576847 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 07:13:36.576947 PCI: 00:17.0
1156 07:13:36.586868 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 07:13:36.596369 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 07:13:36.603206 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 07:13:36.612978 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 07:13:36.619853 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 07:13:36.629689 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 07:13:36.633041 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 07:13:36.642743 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 07:13:36.645803 I2C: 03:1a
1165 07:13:36.645901 I2C: 03:38
1166 07:13:36.649125 I2C: 03:39
1167 07:13:36.649223 I2C: 03:3a
1168 07:13:36.652741 I2C: 03:3b
1169 07:13:36.655689 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 07:13:36.665721 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 07:13:36.675878 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 07:13:36.682447 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 07:13:36.685780 PCI: 01:00.0
1174 07:13:36.695924 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 07:13:36.698735 PCI: 00:1e.0
1176 07:13:36.709030 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 07:13:36.718696 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 07:13:36.722143 PCI: 00:1e.2 child on link 0 SPI: 00
1179 07:13:36.731942 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 07:13:36.732041 SPI: 00
1181 07:13:36.739002 PCI: 00:1e.3 child on link 0 SPI: 01
1182 07:13:36.748858 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 07:13:36.748957 SPI: 01
1184 07:13:36.751746 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 07:13:36.761767 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 07:13:36.772039 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 07:13:36.772139 PNP: 0c09.0
1188 07:13:36.781736 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 07:13:36.781834 PCI: 00:1f.3
1190 07:13:36.791871 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 07:13:36.801578 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 07:13:36.805108 PCI: 00:1f.4
1193 07:13:36.814929 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 07:13:36.824640 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 07:13:36.824740 PCI: 00:1f.5
1196 07:13:36.834610 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 07:13:36.841092 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 07:13:36.847903 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 07:13:36.854896 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 07:13:36.857888 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 07:13:36.861096 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 07:13:36.864543 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 07:13:36.867431 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 07:13:36.874609 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 07:13:36.880790 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 07:13:36.891178 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 07:13:36.897497 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 07:13:36.903871 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 07:13:36.907398 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 07:13:36.917932 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 07:13:36.920523 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 07:13:36.927158 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 07:13:36.930334 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 07:13:36.936836 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 07:13:36.940131 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 07:13:36.943523 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 07:13:36.950361 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 07:13:36.953618 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 07:13:36.960226 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 07:13:36.963733 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 07:13:36.970202 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 07:13:36.973925 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 07:13:36.980150 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 07:13:36.983798 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 07:13:36.990149 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 07:13:36.993525 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 07:13:37.000247 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 07:13:37.003288 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 07:13:37.009832 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 07:13:37.013457 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 07:13:37.016623 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 07:13:37.023391 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 07:13:37.026229 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 07:13:37.036331 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 07:13:37.039561 avoid_fixed_resources: DOMAIN: 0000
1236 07:13:37.046163 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 07:13:37.052595 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 07:13:37.059232 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 07:13:37.066425 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 07:13:37.076295 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 07:13:37.082732 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 07:13:37.089185 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 07:13:37.099269 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 07:13:37.105828 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 07:13:37.112688 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 07:13:37.119297 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 07:13:37.128916 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 07:13:37.129015 Setting resources...
1249 07:13:37.135341 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 07:13:37.138860 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 07:13:37.145578 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 07:13:37.149073 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 07:13:37.151772 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 07:13:37.158483 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 07:13:37.165111 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 07:13:37.171721 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 07:13:37.178320 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 07:13:37.184926 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 07:13:37.188133 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 07:13:37.191926 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 07:13:37.198322 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 07:13:37.201409 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 07:13:37.208540 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 07:13:37.211404 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 07:13:37.218194 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 07:13:37.221696 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 07:13:37.228553 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 07:13:37.231573 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 07:13:37.237941 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 07:13:37.241558 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 07:13:37.248078 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 07:13:37.251025 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 07:13:37.257976 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 07:13:37.261049 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 07:13:37.268305 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 07:13:37.271044 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 07:13:37.274569 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 07:13:37.280956 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 07:13:37.284626 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 07:13:37.291103 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 07:13:37.297681 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 07:13:37.304524 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 07:13:37.313924 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 07:13:37.320651 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 07:13:37.324010 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 07:13:37.333952 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 07:13:37.337448 Root Device assign_resources, bus 0 link: 0
1288 07:13:37.340718 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 07:13:37.350486 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 07:13:37.356751 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 07:13:37.367301 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 07:13:37.373874 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 07:13:37.383536 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 07:13:37.390621 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 07:13:37.397204 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 07:13:37.399888 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 07:13:37.409947 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 07:13:37.416777 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 07:13:37.423568 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 07:13:37.433164 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 07:13:37.436783 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 07:13:37.443317 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 07:13:37.449859 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 07:13:37.456743 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 07:13:37.460312 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 07:13:37.469532 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 07:13:37.476154 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 07:13:37.482788 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 07:13:37.493029 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 07:13:37.499595 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 07:13:37.506594 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 07:13:37.516114 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 07:13:37.522529 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 07:13:37.528898 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 07:13:37.532614 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 07:13:37.542277 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 07:13:37.548986 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 07:13:37.558763 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 07:13:37.562234 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 07:13:37.572337 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 07:13:37.575355 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 07:13:37.585113 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 07:13:37.592312 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 07:13:37.598350 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 07:13:37.601978 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 07:13:37.608381 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 07:13:37.614992 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 07:13:37.618671 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 07:13:37.624821 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 07:13:37.628313 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 07:13:37.634701 LPC: Trying to open IO window from 800 size 1ff
1332 07:13:37.641312 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 07:13:37.651416 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 07:13:37.658373 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 07:13:37.667789 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 07:13:37.671293 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 07:13:37.674387 Root Device assign_resources, bus 0 link: 0
1338 07:13:37.677834 Done setting resources.
1339 07:13:37.684519 Show resources in subtree (Root Device)...After assigning values.
1340 07:13:37.691031 Root Device child on link 0 CPU_CLUSTER: 0
1341 07:13:37.694331 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 07:13:37.694447 APIC: 00
1343 07:13:37.698019 APIC: 03
1344 07:13:37.698114 APIC: 01
1345 07:13:37.698188 APIC: 07
1346 07:13:37.700918 APIC: 06
1347 07:13:37.701013 APIC: 02
1348 07:13:37.701088 APIC: 05
1349 07:13:37.704390 APIC: 04
1350 07:13:37.707442 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 07:13:37.717528 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 07:13:37.727301 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 07:13:37.730979 PCI: 00:00.0
1354 07:13:37.740548 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 07:13:37.750644 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 07:13:37.760396 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 07:13:37.767555 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 07:13:37.777192 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 07:13:37.786522 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 07:13:37.796805 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 07:13:37.807035 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 07:13:37.816553 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 07:13:37.823198 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 07:13:37.833265 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 07:13:37.842958 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 07:13:37.852542 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 07:13:37.862742 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 07:13:37.872983 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 07:13:37.879216 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 07:13:37.882868 PCI: 00:02.0
1371 07:13:37.892747 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 07:13:37.902717 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 07:13:37.912356 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 07:13:37.916253 PCI: 00:04.0
1375 07:13:37.916350 PCI: 00:08.0
1376 07:13:37.925789 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 07:13:37.929325 PCI: 00:12.0
1378 07:13:37.938847 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 07:13:37.942024 PCI: 00:14.0 child on link 0 USB0 port 0
1380 07:13:37.952049 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 07:13:37.958855 USB0 port 0 child on link 0 USB2 port 0
1382 07:13:37.958954 USB2 port 0
1383 07:13:37.962449 USB2 port 1
1384 07:13:37.962547 USB2 port 2
1385 07:13:37.965328 USB2 port 3
1386 07:13:37.965426 USB2 port 5
1387 07:13:37.968604 USB2 port 6
1388 07:13:37.968701 USB2 port 9
1389 07:13:37.971961 USB3 port 0
1390 07:13:37.972059 USB3 port 1
1391 07:13:37.975345 USB3 port 2
1392 07:13:37.975443 USB3 port 3
1393 07:13:37.978740 USB3 port 4
1394 07:13:37.982292 PCI: 00:14.2
1395 07:13:37.991729 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 07:13:38.001400 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 07:13:38.001499 PCI: 00:14.3
1398 07:13:38.011793 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 07:13:38.018231 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 07:13:38.028379 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 07:13:38.028486 I2C: 01:15
1402 07:13:38.034610 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 07:13:38.044510 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 07:13:38.044609 I2C: 02:5d
1405 07:13:38.047874 GENERIC: 0.0
1406 07:13:38.047973 PCI: 00:16.0
1407 07:13:38.057902 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 07:13:38.061001 PCI: 00:17.0
1409 07:13:38.071016 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 07:13:38.080431 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 07:13:38.090561 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 07:13:38.100435 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 07:13:38.107313 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 07:13:38.117168 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 07:13:38.123711 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 07:13:38.133223 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 07:13:38.133323 I2C: 03:1a
1418 07:13:38.136920 I2C: 03:38
1419 07:13:38.137018 I2C: 03:39
1420 07:13:38.139939 I2C: 03:3a
1421 07:13:38.140037 I2C: 03:3b
1422 07:13:38.146620 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 07:13:38.153205 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 07:13:38.162811 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 07:13:38.176161 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 07:13:38.176261 PCI: 01:00.0
1427 07:13:38.186255 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 07:13:38.189480 PCI: 00:1e.0
1429 07:13:38.198939 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 07:13:38.208624 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 07:13:38.215843 PCI: 00:1e.2 child on link 0 SPI: 00
1432 07:13:38.225319 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 07:13:38.225418 SPI: 00
1434 07:13:38.228761 PCI: 00:1e.3 child on link 0 SPI: 01
1435 07:13:38.238901 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 07:13:38.242261 SPI: 01
1437 07:13:38.245332 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 07:13:38.255746 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 07:13:38.261990 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 07:13:38.265071 PNP: 0c09.0
1441 07:13:38.275028 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 07:13:38.275129 PCI: 00:1f.3
1443 07:13:38.284994 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 07:13:38.294954 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 07:13:38.297990 PCI: 00:1f.4
1446 07:13:38.308140 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 07:13:38.317902 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 07:13:38.318003 PCI: 00:1f.5
1449 07:13:38.327904 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 07:13:38.331377 Done allocating resources.
1451 07:13:38.337957 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 07:13:38.341014 Enabling resources...
1453 07:13:38.344830 PCI: 00:00.0 subsystem <- 8086/9b61
1454 07:13:38.347773 PCI: 00:00.0 cmd <- 06
1455 07:13:38.351077 PCI: 00:02.0 subsystem <- 8086/9b41
1456 07:13:38.354058 PCI: 00:02.0 cmd <- 03
1457 07:13:38.354156 PCI: 00:08.0 cmd <- 06
1458 07:13:38.360972 PCI: 00:12.0 subsystem <- 8086/02f9
1459 07:13:38.361070 PCI: 00:12.0 cmd <- 02
1460 07:13:38.364534 PCI: 00:14.0 subsystem <- 8086/02ed
1461 07:13:38.367553 PCI: 00:14.0 cmd <- 02
1462 07:13:38.371111 PCI: 00:14.2 cmd <- 02
1463 07:13:38.374402 PCI: 00:14.3 subsystem <- 8086/02f0
1464 07:13:38.377338 PCI: 00:14.3 cmd <- 02
1465 07:13:38.380744 PCI: 00:15.0 subsystem <- 8086/02e8
1466 07:13:38.384077 PCI: 00:15.0 cmd <- 02
1467 07:13:38.387714 PCI: 00:15.1 subsystem <- 8086/02e9
1468 07:13:38.390567 PCI: 00:15.1 cmd <- 02
1469 07:13:38.394227 PCI: 00:16.0 subsystem <- 8086/02e0
1470 07:13:38.397133 PCI: 00:16.0 cmd <- 02
1471 07:13:38.400675 PCI: 00:17.0 subsystem <- 8086/02d3
1472 07:13:38.403489 PCI: 00:17.0 cmd <- 03
1473 07:13:38.406966 PCI: 00:19.0 subsystem <- 8086/02c5
1474 07:13:38.407065 PCI: 00:19.0 cmd <- 02
1475 07:13:38.410586 PCI: 00:1d.0 bridge ctrl <- 0013
1476 07:13:38.417056 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 07:13:38.417154 PCI: 00:1d.0 cmd <- 06
1478 07:13:38.420682 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 07:13:38.423488 PCI: 00:1e.0 cmd <- 06
1480 07:13:38.427206 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 07:13:38.430004 PCI: 00:1e.2 cmd <- 06
1482 07:13:38.433615 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 07:13:38.437211 PCI: 00:1e.3 cmd <- 02
1484 07:13:38.440081 PCI: 00:1f.0 subsystem <- 8086/0284
1485 07:13:38.443480 PCI: 00:1f.0 cmd <- 407
1486 07:13:38.446648 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 07:13:38.450175 PCI: 00:1f.3 cmd <- 02
1488 07:13:38.453322 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 07:13:38.457120 PCI: 00:1f.4 cmd <- 03
1490 07:13:38.459835 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 07:13:38.463566 PCI: 00:1f.5 cmd <- 406
1492 07:13:38.470744 PCI: 01:00.0 cmd <- 02
1493 07:13:38.476319 done.
1494 07:13:38.489285 ME: Version: 14.0.39.1367
1495 07:13:38.495732 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1496 07:13:38.499649 Initializing devices...
1497 07:13:38.499747 Root Device init ...
1498 07:13:38.505499 Chrome EC: Set SMI mask to 0x0000000000000000
1499 07:13:38.508569 Chrome EC: clear events_b mask to 0x0000000000000000
1500 07:13:38.515552 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 07:13:38.522190 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 07:13:38.528555 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 07:13:38.532156 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 07:13:38.535730 Root Device init finished in 35328 usecs
1505 07:13:38.539099 CPU_CLUSTER: 0 init ...
1506 07:13:38.545848 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 07:13:38.549997 PCI: 00:00.0 init ...
1508 07:13:38.553543 CPU TDP: 15 Watts
1509 07:13:38.556191 CPU PL2 = 64 Watts
1510 07:13:38.559731 PCI: 00:00.0 init finished in 7081 usecs
1511 07:13:38.563447 PCI: 00:02.0 init ...
1512 07:13:38.566624 PCI: 00:02.0 init finished in 2254 usecs
1513 07:13:38.569754 PCI: 00:08.0 init ...
1514 07:13:38.572866 PCI: 00:08.0 init finished in 2252 usecs
1515 07:13:38.576670 PCI: 00:12.0 init ...
1516 07:13:38.579527 PCI: 00:12.0 init finished in 2253 usecs
1517 07:13:38.583213 PCI: 00:14.0 init ...
1518 07:13:38.586451 PCI: 00:14.0 init finished in 2253 usecs
1519 07:13:38.589502 PCI: 00:14.2 init ...
1520 07:13:38.592954 PCI: 00:14.2 init finished in 2252 usecs
1521 07:13:38.596023 PCI: 00:14.3 init ...
1522 07:13:38.599490 PCI: 00:14.3 init finished in 2270 usecs
1523 07:13:38.602873 PCI: 00:15.0 init ...
1524 07:13:38.606221 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 07:13:38.609122 PCI: 00:15.0 init finished in 5977 usecs
1526 07:13:38.613153 PCI: 00:15.1 init ...
1527 07:13:38.616035 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 07:13:38.622759 PCI: 00:15.1 init finished in 5977 usecs
1529 07:13:38.622858 PCI: 00:16.0 init ...
1530 07:13:38.629585 PCI: 00:16.0 init finished in 2251 usecs
1531 07:13:38.632444 PCI: 00:19.0 init ...
1532 07:13:38.635772 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 07:13:38.639305 PCI: 00:19.0 init finished in 5976 usecs
1534 07:13:38.642845 PCI: 00:1d.0 init ...
1535 07:13:38.646013 Initializing PCH PCIe bridge.
1536 07:13:38.648900 PCI: 00:1d.0 init finished in 5284 usecs
1537 07:13:38.652183 PCI: 00:1f.0 init ...
1538 07:13:38.655597 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 07:13:38.662273 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 07:13:38.662372 IOAPIC: ID = 0x02
1541 07:13:38.665462 IOAPIC: Dumping registers
1542 07:13:38.668999 reg 0x0000: 0x02000000
1543 07:13:38.671979 reg 0x0001: 0x00770020
1544 07:13:38.672076 reg 0x0002: 0x00000000
1545 07:13:38.678573 PCI: 00:1f.0 init finished in 23540 usecs
1546 07:13:38.682165 PCI: 00:1f.4 init ...
1547 07:13:38.685691 PCI: 00:1f.4 init finished in 2263 usecs
1548 07:13:38.696521 PCI: 01:00.0 init ...
1549 07:13:38.699523 PCI: 01:00.0 init finished in 2252 usecs
1550 07:13:38.703579 PNP: 0c09.0 init ...
1551 07:13:38.707202 Google Chrome EC uptime: 11.053 seconds
1552 07:13:38.713731 Google Chrome AP resets since EC boot: 0
1553 07:13:38.716709 Google Chrome most recent AP reset causes:
1554 07:13:38.723799 Google Chrome EC reset flags at last EC boot: reset-pin
1555 07:13:38.726790 PNP: 0c09.0 init finished in 20574 usecs
1556 07:13:38.730420 Devices initialized
1557 07:13:38.730517 Show all devs... After init.
1558 07:13:38.733370 Root Device: enabled 1
1559 07:13:38.737130 CPU_CLUSTER: 0: enabled 1
1560 07:13:38.739939 DOMAIN: 0000: enabled 1
1561 07:13:38.740035 APIC: 00: enabled 1
1562 07:13:38.743780 PCI: 00:00.0: enabled 1
1563 07:13:38.746648 PCI: 00:02.0: enabled 1
1564 07:13:38.749912 PCI: 00:04.0: enabled 0
1565 07:13:38.750009 PCI: 00:05.0: enabled 0
1566 07:13:38.753560 PCI: 00:12.0: enabled 1
1567 07:13:38.756602 PCI: 00:12.5: enabled 0
1568 07:13:38.756698 PCI: 00:12.6: enabled 0
1569 07:13:38.760091 PCI: 00:14.0: enabled 1
1570 07:13:38.763185 PCI: 00:14.1: enabled 0
1571 07:13:38.766634 PCI: 00:14.3: enabled 1
1572 07:13:38.766731 PCI: 00:14.5: enabled 0
1573 07:13:38.769722 PCI: 00:15.0: enabled 1
1574 07:13:38.773617 PCI: 00:15.1: enabled 1
1575 07:13:38.776340 PCI: 00:15.2: enabled 0
1576 07:13:38.776445 PCI: 00:15.3: enabled 0
1577 07:13:38.779848 PCI: 00:16.0: enabled 1
1578 07:13:38.783498 PCI: 00:16.1: enabled 0
1579 07:13:38.786851 PCI: 00:16.2: enabled 0
1580 07:13:38.786948 PCI: 00:16.3: enabled 0
1581 07:13:38.789623 PCI: 00:16.4: enabled 0
1582 07:13:38.793019 PCI: 00:16.5: enabled 0
1583 07:13:38.796492 PCI: 00:17.0: enabled 1
1584 07:13:38.796596 PCI: 00:19.0: enabled 1
1585 07:13:38.799554 PCI: 00:19.1: enabled 0
1586 07:13:38.803311 PCI: 00:19.2: enabled 0
1587 07:13:38.803408 PCI: 00:1a.0: enabled 0
1588 07:13:38.806291 PCI: 00:1c.0: enabled 0
1589 07:13:38.809637 PCI: 00:1c.1: enabled 0
1590 07:13:38.812424 PCI: 00:1c.2: enabled 0
1591 07:13:38.812522 PCI: 00:1c.3: enabled 0
1592 07:13:38.816070 PCI: 00:1c.4: enabled 0
1593 07:13:38.819685 PCI: 00:1c.5: enabled 0
1594 07:13:38.822545 PCI: 00:1c.6: enabled 0
1595 07:13:38.822653 PCI: 00:1c.7: enabled 0
1596 07:13:38.826055 PCI: 00:1d.0: enabled 1
1597 07:13:38.829100 PCI: 00:1d.1: enabled 0
1598 07:13:38.832578 PCI: 00:1d.2: enabled 0
1599 07:13:38.832676 PCI: 00:1d.3: enabled 0
1600 07:13:38.835643 PCI: 00:1d.4: enabled 0
1601 07:13:38.839356 PCI: 00:1d.5: enabled 0
1602 07:13:38.842223 PCI: 00:1e.0: enabled 1
1603 07:13:38.842320 PCI: 00:1e.1: enabled 0
1604 07:13:38.845790 PCI: 00:1e.2: enabled 1
1605 07:13:38.849371 PCI: 00:1e.3: enabled 1
1606 07:13:38.849469 PCI: 00:1f.0: enabled 1
1607 07:13:38.852493 PCI: 00:1f.1: enabled 0
1608 07:13:38.856149 PCI: 00:1f.2: enabled 0
1609 07:13:38.859024 PCI: 00:1f.3: enabled 1
1610 07:13:38.859144 PCI: 00:1f.4: enabled 1
1611 07:13:38.862577 PCI: 00:1f.5: enabled 1
1612 07:13:38.865716 PCI: 00:1f.6: enabled 0
1613 07:13:38.868776 USB0 port 0: enabled 1
1614 07:13:38.868881 I2C: 01:15: enabled 1
1615 07:13:38.872433 I2C: 02:5d: enabled 1
1616 07:13:38.875621 GENERIC: 0.0: enabled 1
1617 07:13:38.875719 I2C: 03:1a: enabled 1
1618 07:13:38.879140 I2C: 03:38: enabled 1
1619 07:13:38.882096 I2C: 03:39: enabled 1
1620 07:13:38.882192 I2C: 03:3a: enabled 1
1621 07:13:38.885440 I2C: 03:3b: enabled 1
1622 07:13:38.888769 PCI: 00:00.0: enabled 1
1623 07:13:38.888887 SPI: 00: enabled 1
1624 07:13:38.892533 SPI: 01: enabled 1
1625 07:13:38.895605 PNP: 0c09.0: enabled 1
1626 07:13:38.895702 USB2 port 0: enabled 1
1627 07:13:38.898895 USB2 port 1: enabled 1
1628 07:13:38.901929 USB2 port 2: enabled 0
1629 07:13:38.902026 USB2 port 3: enabled 0
1630 07:13:38.905360 USB2 port 5: enabled 0
1631 07:13:38.908729 USB2 port 6: enabled 1
1632 07:13:38.912069 USB2 port 9: enabled 1
1633 07:13:38.912165 USB3 port 0: enabled 1
1634 07:13:38.915851 USB3 port 1: enabled 1
1635 07:13:38.918946 USB3 port 2: enabled 1
1636 07:13:38.919043 USB3 port 3: enabled 1
1637 07:13:38.921786 USB3 port 4: enabled 0
1638 07:13:38.924967 APIC: 03: enabled 1
1639 07:13:38.925065 APIC: 01: enabled 1
1640 07:13:38.928549 APIC: 07: enabled 1
1641 07:13:38.932095 APIC: 06: enabled 1
1642 07:13:38.932192 APIC: 02: enabled 1
1643 07:13:38.935100 APIC: 05: enabled 1
1644 07:13:38.935197 APIC: 04: enabled 1
1645 07:13:38.938581 PCI: 00:08.0: enabled 1
1646 07:13:38.941532 PCI: 00:14.2: enabled 1
1647 07:13:38.944967 PCI: 01:00.0: enabled 1
1648 07:13:38.948653 Disabling ACPI via APMC:
1649 07:13:38.948753 done.
1650 07:13:38.955248 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 07:13:38.958219 ELOG: NV offset 0xaf0000 size 0x4000
1652 07:13:38.965177 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 07:13:38.972005 ELOG: Event(17) added with size 13 at 2023-02-07 07:13:38 UTC
1654 07:13:38.978400 ELOG: Event(92) added with size 9 at 2023-02-07 07:13:38 UTC
1655 07:13:38.985151 ELOG: Event(93) added with size 9 at 2023-02-07 07:13:38 UTC
1656 07:13:38.991810 ELOG: Event(9A) added with size 9 at 2023-02-07 07:13:39 UTC
1657 07:13:38.998109 ELOG: Event(9E) added with size 10 at 2023-02-07 07:13:39 UTC
1658 07:13:39.005015 ELOG: Event(9F) added with size 14 at 2023-02-07 07:13:39 UTC
1659 07:13:39.008119 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1660 07:13:39.015404 ELOG: Event(A1) added with size 10 at 2023-02-07 07:13:39 UTC
1661 07:13:39.025525 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1662 07:13:39.031784 ELOG: Event(A0) added with size 9 at 2023-02-07 07:13:39 UTC
1663 07:13:39.034930 elog_add_boot_reason: Logged dev mode boot
1664 07:13:39.038394 Finalize devices...
1665 07:13:39.038493 PCI: 00:17.0 final
1666 07:13:39.041568 Devices finalized
1667 07:13:39.045112 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1668 07:13:39.052019 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1669 07:13:39.054838 ME: HFSTS1 : 0x90000245
1670 07:13:39.058545 ME: HFSTS2 : 0x3B850126
1671 07:13:39.065139 ME: HFSTS3 : 0x00000020
1672 07:13:39.068341 ME: HFSTS4 : 0x00004800
1673 07:13:39.071607 ME: HFSTS5 : 0x00000000
1674 07:13:39.074606 ME: HFSTS6 : 0x40400006
1675 07:13:39.078175 ME: Manufacturing Mode : NO
1676 07:13:39.081283 ME: FW Partition Table : OK
1677 07:13:39.084772 ME: Bringup Loader Failure : NO
1678 07:13:39.087981 ME: Firmware Init Complete : YES
1679 07:13:39.091645 ME: Boot Options Present : NO
1680 07:13:39.095051 ME: Update In Progress : NO
1681 07:13:39.097868 ME: D0i3 Support : YES
1682 07:13:39.101390 ME: Low Power State Enabled : NO
1683 07:13:39.104634 ME: CPU Replaced : NO
1684 07:13:39.107950 ME: CPU Replacement Valid : YES
1685 07:13:39.111089 ME: Current Working State : 5
1686 07:13:39.114385 ME: Current Operation State : 1
1687 07:13:39.117711 ME: Current Operation Mode : 0
1688 07:13:39.121661 ME: Error Code : 0
1689 07:13:39.124695 ME: CPU Debug Disabled : YES
1690 07:13:39.128050 ME: TXT Support : NO
1691 07:13:39.134787 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1692 07:13:39.141246 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1693 07:13:39.141345 CBFS @ c08000 size 3f8000
1694 07:13:39.147572 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1695 07:13:39.151093 CBFS: Locating 'fallback/dsdt.aml'
1696 07:13:39.154907 CBFS: Found @ offset 10bb80 size 3fa5
1697 07:13:39.161316 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1698 07:13:39.164014 CBFS @ c08000 size 3f8000
1699 07:13:39.167829 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1700 07:13:39.170909 CBFS: Locating 'fallback/slic'
1701 07:13:39.176179 CBFS: 'fallback/slic' not found.
1702 07:13:39.182719 ACPI: Writing ACPI tables at 99b3e000.
1703 07:13:39.182818 ACPI: * FACS
1704 07:13:39.185780 ACPI: * DSDT
1705 07:13:39.189502 Ramoops buffer: 0x100000@0x99a3d000.
1706 07:13:39.192746 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1707 07:13:39.199518 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1708 07:13:39.202882 Google Chrome EC: version:
1709 07:13:39.205993 ro: helios_v2.0.2659-56403530b
1710 07:13:39.208837 rw: helios_v2.0.2849-c41de27e7d
1711 07:13:39.208934 running image: 1
1712 07:13:39.213631 ACPI: * FADT
1713 07:13:39.213728 SCI is IRQ9
1714 07:13:39.220004 ACPI: added table 1/32, length now 40
1715 07:13:39.220106 ACPI: * SSDT
1716 07:13:39.223502 Found 1 CPU(s) with 8 core(s) each.
1717 07:13:39.226455 Error: Could not locate 'wifi_sar' in VPD.
1718 07:13:39.233441 Checking CBFS for default SAR values
1719 07:13:39.236496 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1720 07:13:39.240044 CBFS @ c08000 size 3f8000
1721 07:13:39.246778 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1722 07:13:39.249672 CBFS: Locating 'wifi_sar_defaults.hex'
1723 07:13:39.253287 CBFS: Found @ offset 5fac0 size 77
1724 07:13:39.256310 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1725 07:13:39.262931 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1726 07:13:39.266717 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1727 07:13:39.272941 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1728 07:13:39.276298 failed to find key in VPD: dsm_calib_r0_0
1729 07:13:39.286358 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1730 07:13:39.289239 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1731 07:13:39.292635 failed to find key in VPD: dsm_calib_r0_1
1732 07:13:39.302861 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1733 07:13:39.309381 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1734 07:13:39.313007 failed to find key in VPD: dsm_calib_r0_2
1735 07:13:39.322824 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1736 07:13:39.325890 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1737 07:13:39.332414 failed to find key in VPD: dsm_calib_r0_3
1738 07:13:39.339259 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1739 07:13:39.345828 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1740 07:13:39.349024 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1741 07:13:39.352278 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1742 07:13:39.356586 EC returned error result code 1
1743 07:13:39.360035 EC returned error result code 1
1744 07:13:39.363989 EC returned error result code 1
1745 07:13:39.370793 PS2K: Bad resp from EC. Vivaldi disabled!
1746 07:13:39.373865 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1747 07:13:39.380424 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1748 07:13:39.386923 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1749 07:13:39.390510 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1750 07:13:39.397298 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1751 07:13:39.403202 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1752 07:13:39.410467 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1753 07:13:39.413425 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1754 07:13:39.420001 ACPI: added table 2/32, length now 44
1755 07:13:39.420099 ACPI: * MCFG
1756 07:13:39.423340 ACPI: added table 3/32, length now 48
1757 07:13:39.426622 ACPI: * TPM2
1758 07:13:39.429927 TPM2 log created at 99a2d000
1759 07:13:39.433457 ACPI: added table 4/32, length now 52
1760 07:13:39.433555 ACPI: * MADT
1761 07:13:39.436258 SCI is IRQ9
1762 07:13:39.439905 ACPI: added table 5/32, length now 56
1763 07:13:39.440003 current = 99b43ac0
1764 07:13:39.443483 ACPI: * DMAR
1765 07:13:39.446449 ACPI: added table 6/32, length now 60
1766 07:13:39.449607 ACPI: * IGD OpRegion
1767 07:13:39.449704 GMA: Found VBT in CBFS
1768 07:13:39.453123 GMA: Found valid VBT in CBFS
1769 07:13:39.456769 ACPI: added table 7/32, length now 64
1770 07:13:39.459652 ACPI: * HPET
1771 07:13:39.463289 ACPI: added table 8/32, length now 68
1772 07:13:39.466621 ACPI: done.
1773 07:13:39.466718 ACPI tables: 31744 bytes.
1774 07:13:39.469821 smbios_write_tables: 99a2c000
1775 07:13:39.473559 EC returned error result code 3
1776 07:13:39.476488 Couldn't obtain OEM name from CBI
1777 07:13:39.480208 Create SMBIOS type 17
1778 07:13:39.483104 PCI: 00:00.0 (Intel Cannonlake)
1779 07:13:39.486565 PCI: 00:14.3 (Intel WiFi)
1780 07:13:39.489706 SMBIOS tables: 939 bytes.
1781 07:13:39.493296 Writing table forward entry at 0x00000500
1782 07:13:39.499668 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1783 07:13:39.503333 Writing coreboot table at 0x99b62000
1784 07:13:39.510095 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1785 07:13:39.512983 1. 0000000000001000-000000000009ffff: RAM
1786 07:13:39.516648 2. 00000000000a0000-00000000000fffff: RESERVED
1787 07:13:39.523329 3. 0000000000100000-0000000099a2bfff: RAM
1788 07:13:39.529380 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1789 07:13:39.532960 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1790 07:13:39.539849 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1791 07:13:39.542622 7. 000000009a000000-000000009f7fffff: RESERVED
1792 07:13:39.549215 8. 00000000e0000000-00000000efffffff: RESERVED
1793 07:13:39.552932 9. 00000000fc000000-00000000fc000fff: RESERVED
1794 07:13:39.559439 10. 00000000fe000000-00000000fe00ffff: RESERVED
1795 07:13:39.562787 11. 00000000fed10000-00000000fed17fff: RESERVED
1796 07:13:39.565701 12. 00000000fed80000-00000000fed83fff: RESERVED
1797 07:13:39.572307 13. 00000000fed90000-00000000fed91fff: RESERVED
1798 07:13:39.575560 14. 00000000feda0000-00000000feda1fff: RESERVED
1799 07:13:39.582136 15. 0000000100000000-000000045e7fffff: RAM
1800 07:13:39.585378 Graphics framebuffer located at 0xc0000000
1801 07:13:39.589023 Passing 5 GPIOs to payload:
1802 07:13:39.592435 NAME | PORT | POLARITY | VALUE
1803 07:13:39.598797 write protect | undefined | high | low
1804 07:13:39.605462 lid | undefined | high | high
1805 07:13:39.609008 power | undefined | high | low
1806 07:13:39.615528 oprom | undefined | high | low
1807 07:13:39.619122 EC in RW | 0x000000cb | high | low
1808 07:13:39.622127 Board ID: 4
1809 07:13:39.625175 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1810 07:13:39.628947 CBFS @ c08000 size 3f8000
1811 07:13:39.635298 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1812 07:13:39.641639 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1813 07:13:39.641738 coreboot table: 1492 bytes.
1814 07:13:39.645236 IMD ROOT 0. 99fff000 00001000
1815 07:13:39.648366 IMD SMALL 1. 99ffe000 00001000
1816 07:13:39.651837 FSP MEMORY 2. 99c4e000 003b0000
1817 07:13:39.655310 CONSOLE 3. 99c2e000 00020000
1818 07:13:39.658334 FMAP 4. 99c2d000 0000054e
1819 07:13:39.661887 TIME STAMP 5. 99c2c000 00000910
1820 07:13:39.664900 VBOOT WORK 6. 99c18000 00014000
1821 07:13:39.668438 MRC DATA 7. 99c16000 00001958
1822 07:13:39.675191 ROMSTG STCK 8. 99c15000 00001000
1823 07:13:39.678273 AFTER CAR 9. 99c0b000 0000a000
1824 07:13:39.681914 RAMSTAGE 10. 99baf000 0005c000
1825 07:13:39.685003 REFCODE 11. 99b7a000 00035000
1826 07:13:39.688546 SMM BACKUP 12. 99b6a000 00010000
1827 07:13:39.691577 COREBOOT 13. 99b62000 00008000
1828 07:13:39.695032 ACPI 14. 99b3e000 00024000
1829 07:13:39.698229 ACPI GNVS 15. 99b3d000 00001000
1830 07:13:39.701909 RAMOOPS 16. 99a3d000 00100000
1831 07:13:39.704747 TPM2 TCGLOG17. 99a2d000 00010000
1832 07:13:39.708288 SMBIOS 18. 99a2c000 00000800
1833 07:13:39.708386 IMD small region:
1834 07:13:39.711695 IMD ROOT 0. 99ffec00 00000400
1835 07:13:39.714531 FSP RUNTIME 1. 99ffebe0 00000004
1836 07:13:39.718191 EC HOSTEVENT 2. 99ffebc0 00000008
1837 07:13:39.721546 POWER STATE 3. 99ffeb80 00000040
1838 07:13:39.724347 ROMSTAGE 4. 99ffeb60 00000004
1839 07:13:39.731081 MEM INFO 5. 99ffe9a0 000001b9
1840 07:13:39.734315 VPD 6. 99ffe920 0000006c
1841 07:13:39.738146 MTRR: Physical address space:
1842 07:13:39.741021 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1843 07:13:39.748013 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1844 07:13:39.754601 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1845 07:13:39.761094 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1846 07:13:39.767552 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1847 07:13:39.774172 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1848 07:13:39.780827 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1849 07:13:39.784014 MTRR: Fixed MSR 0x250 0x0606060606060606
1850 07:13:39.787584 MTRR: Fixed MSR 0x258 0x0606060606060606
1851 07:13:39.790587 MTRR: Fixed MSR 0x259 0x0000000000000000
1852 07:13:39.797698 MTRR: Fixed MSR 0x268 0x0606060606060606
1853 07:13:39.800738 MTRR: Fixed MSR 0x269 0x0606060606060606
1854 07:13:39.804081 MTRR: Fixed MSR 0x26a 0x0606060606060606
1855 07:13:39.807794 MTRR: Fixed MSR 0x26b 0x0606060606060606
1856 07:13:39.813601 MTRR: Fixed MSR 0x26c 0x0606060606060606
1857 07:13:39.816960 MTRR: Fixed MSR 0x26d 0x0606060606060606
1858 07:13:39.820895 MTRR: Fixed MSR 0x26e 0x0606060606060606
1859 07:13:39.823796 MTRR: Fixed MSR 0x26f 0x0606060606060606
1860 07:13:39.827802 call enable_fixed_mtrr()
1861 07:13:39.830529 CPU physical address size: 39 bits
1862 07:13:39.837309 MTRR: default type WB/UC MTRR counts: 6/8.
1863 07:13:39.840789 MTRR: WB selected as default type.
1864 07:13:39.847501 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1865 07:13:39.851070 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1866 07:13:39.856998 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1867 07:13:39.864062 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1868 07:13:39.870121 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1869 07:13:39.876832 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1870 07:13:39.883758 MTRR: Fixed MSR 0x250 0x0606060606060606
1871 07:13:39.886822 MTRR: Fixed MSR 0x258 0x0606060606060606
1872 07:13:39.890461 MTRR: Fixed MSR 0x259 0x0000000000000000
1873 07:13:39.893555 MTRR: Fixed MSR 0x268 0x0606060606060606
1874 07:13:39.896748 MTRR: Fixed MSR 0x269 0x0606060606060606
1875 07:13:39.903384 MTRR: Fixed MSR 0x26a 0x0606060606060606
1876 07:13:39.906729 MTRR: Fixed MSR 0x26b 0x0606060606060606
1877 07:13:39.909767 MTRR: Fixed MSR 0x26c 0x0606060606060606
1878 07:13:39.913071 MTRR: Fixed MSR 0x26d 0x0606060606060606
1879 07:13:39.920286 MTRR: Fixed MSR 0x26e 0x0606060606060606
1880 07:13:39.923348 MTRR: Fixed MSR 0x26f 0x0606060606060606
1881 07:13:39.923446
1882 07:13:39.923523 MTRR check
1883 07:13:39.926519 Fixed MTRRs : Enabled
1884 07:13:39.929701 Variable MTRRs: Enabled
1885 07:13:39.929798
1886 07:13:39.933525 call enable_fixed_mtrr()
1887 07:13:39.936499 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 07:13:39.939718 CPU physical address size: 39 bits
1889 07:13:39.946465 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 07:13:39.949391 MTRR: Fixed MSR 0x250 0x0606060606060606
1891 07:13:39.956387 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 07:13:39.959143 MTRR: Fixed MSR 0x258 0x0606060606060606
1893 07:13:39.962847 MTRR: Fixed MSR 0x259 0x0000000000000000
1894 07:13:39.965908 MTRR: Fixed MSR 0x268 0x0606060606060606
1895 07:13:39.972535 MTRR: Fixed MSR 0x269 0x0606060606060606
1896 07:13:39.976068 MTRR: Fixed MSR 0x26a 0x0606060606060606
1897 07:13:39.979259 MTRR: Fixed MSR 0x26b 0x0606060606060606
1898 07:13:39.982436 MTRR: Fixed MSR 0x26c 0x0606060606060606
1899 07:13:39.985688 MTRR: Fixed MSR 0x26d 0x0606060606060606
1900 07:13:39.992140 MTRR: Fixed MSR 0x26e 0x0606060606060606
1901 07:13:39.995845 MTRR: Fixed MSR 0x26f 0x0606060606060606
1902 07:13:39.999339 MTRR: Fixed MSR 0x258 0x0606060606060606
1903 07:13:40.002266 call enable_fixed_mtrr()
1904 07:13:40.005557 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 07:13:40.012454 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 07:13:40.015476 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 07:13:40.018982 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 07:13:40.021889 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 07:13:40.025280 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 07:13:40.031773 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 07:13:40.035642 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 07:13:40.038497 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 07:13:40.042024 CPU physical address size: 39 bits
1914 07:13:40.045330 call enable_fixed_mtrr()
1915 07:13:40.048968 CBFS @ c08000 size 3f8000
1916 07:13:40.054954 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1917 07:13:40.058608 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 07:13:40.061663 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 07:13:40.064996 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 07:13:40.071689 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 07:13:40.074734 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 07:13:40.078493 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 07:13:40.081590 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 07:13:40.088370 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 07:13:40.092096 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 07:13:40.095033 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 07:13:40.098124 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 07:13:40.104775 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 07:13:40.108005 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 07:13:40.111670 call enable_fixed_mtrr()
1931 07:13:40.114931 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 07:13:40.117933 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 07:13:40.121528 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 07:13:40.128115 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 07:13:40.131223 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 07:13:40.134951 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 07:13:40.137967 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 07:13:40.144291 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 07:13:40.147996 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 07:13:40.150925 CPU physical address size: 39 bits
1941 07:13:40.154638 call enable_fixed_mtrr()
1942 07:13:40.157770 CBFS: Locating 'fallback/payload'
1943 07:13:40.160936 CPU physical address size: 39 bits
1944 07:13:40.164553 CBFS: Found @ offset 1c96c0 size 3f798
1945 07:13:40.167721 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 07:13:40.174166 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 07:13:40.177734 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 07:13:40.180903 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 07:13:40.184244 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 07:13:40.187410 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 07:13:40.194166 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 07:13:40.197181 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 07:13:40.200883 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 07:13:40.203864 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 07:13:40.210817 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 07:13:40.214234 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 07:13:40.217765 call enable_fixed_mtrr()
1958 07:13:40.220860 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 07:13:40.224113 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 07:13:40.230515 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 07:13:40.233900 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 07:13:40.237327 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 07:13:40.240347 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 07:13:40.243634 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 07:13:40.250451 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 07:13:40.253932 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 07:13:40.256920 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 07:13:40.260337 CPU physical address size: 39 bits
1969 07:13:40.263976 call enable_fixed_mtrr()
1970 07:13:40.266856 CPU physical address size: 39 bits
1971 07:13:40.269950 CPU physical address size: 39 bits
1972 07:13:40.276695 Checking segment from ROM address 0xffdd16f8
1973 07:13:40.280064 Checking segment from ROM address 0xffdd1714
1974 07:13:40.283252 Loading segment from ROM address 0xffdd16f8
1975 07:13:40.286816 code (compression=0)
1976 07:13:40.296662 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1977 07:13:40.303026 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1978 07:13:40.306360 it's not compressed!
1979 07:13:40.398270 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1980 07:13:40.405365 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1981 07:13:40.408306 Loading segment from ROM address 0xffdd1714
1982 07:13:40.411941 Entry Point 0x30000000
1983 07:13:40.414849 Loaded segments
1984 07:13:40.420998 Finalizing chipset.
1985 07:13:40.423600 Finalizing SMM.
1986 07:13:40.427634 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1987 07:13:40.430237 mp_park_aps done after 0 msecs.
1988 07:13:40.436930 Jumping to boot code at 30000000(99b62000)
1989 07:13:40.444061 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1990 07:13:40.444647
1991 07:13:40.445028
1992 07:13:40.445358
1993 07:13:40.446912 Starting depthcharge on Helios...
1994 07:13:40.447363
1995 07:13:40.448393 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1996 07:13:40.448967 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1997 07:13:40.449367 Setting prompt string to ['hatch:']
1998 07:13:40.449741 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
1999 07:13:40.456998 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2000 07:13:40.457416
2001 07:13:40.463606 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2002 07:13:40.464114
2003 07:13:40.470311 board_setup: Info: eMMC controller not present; skipping
2004 07:13:40.470866
2005 07:13:40.473340 New NVMe Controller 0x30053ac0 @ 00:1d:00
2006 07:13:40.473781
2007 07:13:40.479859 board_setup: Info: SDHCI controller not present; skipping
2008 07:13:40.480272
2009 07:13:40.486650 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2010 07:13:40.487155
2011 07:13:40.487481 Wipe memory regions:
2012 07:13:40.487785
2013 07:13:40.490212 [0x00000000001000, 0x000000000a0000)
2014 07:13:40.490724
2015 07:13:40.493432 [0x00000000100000, 0x00000030000000)
2016 07:13:40.559765
2017 07:13:40.563208 [0x00000030657430, 0x00000099a2c000)
2018 07:13:40.709504
2019 07:13:40.713017 [0x00000100000000, 0x0000045e800000)
2020 07:13:42.169012
2021 07:13:42.169552 R8152: Initializing
2022 07:13:42.169910
2023 07:13:42.172105 Version 9 (ocp_data = 6010)
2024 07:13:42.176196
2025 07:13:42.176777 R8152: Done initializing
2026 07:13:42.177145
2027 07:13:42.179608 Adding net device
2028 07:13:42.662590
2029 07:13:42.663185 R8152: Initializing
2030 07:13:42.663573
2031 07:13:42.665401 Version 6 (ocp_data = 5c30)
2032 07:13:42.665892
2033 07:13:42.668802 R8152: Done initializing
2034 07:13:42.668940
2035 07:13:42.675335 net_add_device: Attemp to include the same device
2036 07:13:42.675514
2037 07:13:42.682541 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2038 07:13:42.682718
2039 07:13:42.682806
2040 07:13:42.682886
2041 07:13:42.683191 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2043 07:13:42.784225 hatch: tftpboot 192.168.201.1 9045576/tftp-deploy-lmjhovuc/kernel/bzImage 9045576/tftp-deploy-lmjhovuc/kernel/cmdline 9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
2044 07:13:42.784903 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2045 07:13:42.785335 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2046 07:13:42.789867 tftpboot 192.168.201.1 9045576/tftp-deploy-lmjhovuc/kernel/bzImoy-lmjhovuc/kernel/cmdline 9045576/tftp-deploy-lmjhovuc/ramdisk/ramdisk.cpio.gz
2047 07:13:42.790333
2048 07:13:42.790689 Waiting for link
2049 07:13:42.990924
2050 07:13:42.991530 done.
2051 07:13:42.991927
2052 07:13:42.992294 MAC: 00:24:32:50:1a:59
2053 07:13:42.992704
2054 07:13:42.994066 Sending DHCP discover... done.
2055 07:13:42.994551
2056 07:13:42.997493 Waiting for reply... done.
2057 07:13:42.997943
2058 07:13:43.001121 Sending DHCP request... done.
2059 07:13:43.001569
2060 07:13:43.004152 Waiting for reply... done.
2061 07:13:43.004631
2062 07:13:43.007290 My ip is 192.168.201.14
2063 07:13:43.007738
2064 07:13:43.010725 The DHCP server ip is 192.168.201.1
2065 07:13:43.011179
2066 07:13:43.014215 TFTP server IP predefined by user: 192.168.201.1
2067 07:13:43.014668
2068 07:13:43.023742 Bootfile predefined by user: 9045576/tftp-deploy-lmjhovuc/kernel/bzImage
2069 07:13:43.024195
2070 07:13:43.027709 Sending tftp read request... done.
2071 07:13:43.028246
2072 07:13:43.032370 Waiting for the transfer...
2073 07:13:43.032960
2074 07:13:43.732771 00000000 ################################################################
2075 07:13:43.733340
2076 07:13:44.447203 00080000 ################################################################
2077 07:13:44.447784
2078 07:13:45.155650 00100000 ################################################################
2079 07:13:45.156202
2080 07:13:45.850024 00180000 ################################################################
2081 07:13:45.850588
2082 07:13:46.547921 00200000 ################################################################
2083 07:13:46.548500
2084 07:13:47.241976 00280000 ################################################################
2085 07:13:47.242535
2086 07:13:47.922895 00300000 ################################################################
2087 07:13:47.923476
2088 07:13:48.637927 00380000 ################################################################
2089 07:13:48.638514
2090 07:13:49.346399 00400000 ################################################################
2091 07:13:49.346950
2092 07:13:50.040953 00480000 ################################################################
2093 07:13:50.041500
2094 07:13:50.729216 00500000 ################################################################
2095 07:13:50.729778
2096 07:13:51.423339 00580000 ################################################################
2097 07:13:51.423912
2098 07:13:52.130035 00600000 ################################################################
2099 07:13:52.130592
2100 07:13:52.831175 00680000 ################################################################
2101 07:13:52.831719
2102 07:13:53.147049 00700000 ############################# done.
2103 07:13:53.147629
2104 07:13:53.150313 The bootfile was 7573392 bytes long.
2105 07:13:53.150756
2106 07:13:53.153429 Sending tftp read request... done.
2107 07:13:53.153871
2108 07:13:53.156623 Waiting for the transfer...
2109 07:13:53.157059
2110 07:13:53.861723 00000000 ################################################################
2111 07:13:53.862298
2112 07:13:54.556389 00080000 ################################################################
2113 07:13:54.556965
2114 07:13:55.242201 00100000 ################################################################
2115 07:13:55.242730
2116 07:13:55.935639 00180000 ################################################################
2117 07:13:55.936212
2118 07:13:56.632734 00200000 ################################################################
2119 07:13:56.633265
2120 07:13:57.327114 00280000 ################################################################
2121 07:13:57.327658
2122 07:13:58.027134 00300000 ################################################################
2123 07:13:58.027686
2124 07:13:58.717823 00380000 ################################################################
2125 07:13:58.718367
2126 07:13:59.401054 00400000 ################################################################
2127 07:13:59.401583
2128 07:14:00.095578 00480000 ################################################################
2129 07:14:00.096107
2130 07:14:00.440482 00500000 ################################ done.
2131 07:14:00.441009
2132 07:14:00.444039 Sending tftp read request... done.
2133 07:14:00.444531
2134 07:14:00.447200 Waiting for the transfer...
2135 07:14:00.447654
2136 07:14:00.448013 00000000 # done.
2137 07:14:00.448359
2138 07:14:00.456950 Command line loaded dynamically from TFTP file: 9045576/tftp-deploy-lmjhovuc/kernel/cmdline
2139 07:14:00.457402
2140 07:14:00.483919 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9045576/extract-nfsrootfs-tk3p5v2b,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2141 07:14:00.484517
2142 07:14:00.489728 ec_init(0): CrosEC protocol v3 supported (256, 256)
2143 07:14:00.493346
2144 07:14:00.496402 Shutting down all USB controllers.
2145 07:14:00.496907
2146 07:14:00.497285 Removing current net device
2147 07:14:00.500198
2148 07:14:00.500686 Finalizing coreboot
2149 07:14:00.501046
2150 07:14:00.506614 Exiting depthcharge with code 4 at timestamp: 27398583
2151 07:14:00.507099
2152 07:14:00.507482
2153 07:14:00.507816 Starting kernel ...
2154 07:14:00.508143
2155 07:14:00.509333 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2156 07:14:00.509839 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2157 07:14:00.510228 Setting prompt string to ['Linux version [0-9]']
2158 07:14:00.510634 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2159 07:14:00.510997 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2160 07:14:00.511873
2162 07:18:20.510779 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2164 07:18:20.511929 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2166 07:18:20.512847 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2169 07:18:20.514335 end: 2 depthcharge-action (duration 00:05:00) [common]
2171 07:18:20.515672 Cleaning after the job
2172 07:18:20.516178 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/ramdisk
2173 07:18:20.518738 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/kernel
2174 07:18:20.521680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/nfsrootfs
2175 07:18:20.601122 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045576/tftp-deploy-lmjhovuc/modules
2176 07:18:20.601478 start: 4.1 power-off (timeout 00:00:30) [common]
2177 07:18:20.601667 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2178 07:18:22.788221 >> Command sent successfully.
2179 07:18:22.794025 Returned 0 in 2 seconds
2180 07:18:22.895358 end: 4.1 power-off (duration 00:00:02) [common]
2182 07:18:22.896989 start: 4.2 read-feedback (timeout 00:09:58) [common]
2183 07:18:22.898235 Listened to connection for namespace 'common' for up to 1s
2185 07:18:22.899695 Listened to connection for namespace 'common' for up to 1s
2186 07:18:23.902885 Finalising connection for namespace 'common'
2187 07:18:23.903626 Disconnecting from shell: Finalise
2188 07:18:23.904066
2189 07:18:24.005658 end: 4.2 read-feedback (duration 00:00:01) [common]
2190 07:18:24.006303 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045576
2191 07:18:24.170786 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045576
2192 07:18:24.171003 JobError: Your job cannot terminate cleanly.