Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:10:53.520115 lava-dispatcher, installed at version: 2022.11
2 07:10:53.520300 start: 0 validate
3 07:10:53.520431 Start time: 2023-02-07 07:10:53.520425+00:00 (UTC)
4 07:10:53.520561 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:10:53.520688 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
6 07:10:53.812432 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:10:53.812645 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:10:54.102904 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:10:54.103067 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:10:54.394226 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:10:54.394387 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:10:54.680141 validate duration: 1.16
14 07:10:54.680410 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:10:54.680523 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:10:54.680615 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:10:54.680711 Not decompressing ramdisk as can be used compressed.
18 07:10:54.680799 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/initrd.cpio.gz
19 07:10:54.680868 saving as /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/ramdisk/initrd.cpio.gz
20 07:10:54.680930 total size: 5432118 (5MB)
21 07:10:54.682036 progress 0% (0MB)
22 07:10:54.683487 progress 5% (0MB)
23 07:10:54.684813 progress 10% (0MB)
24 07:10:54.686184 progress 15% (0MB)
25 07:10:54.687643 progress 20% (1MB)
26 07:10:54.688965 progress 25% (1MB)
27 07:10:54.690266 progress 30% (1MB)
28 07:10:54.691700 progress 35% (1MB)
29 07:10:54.693038 progress 40% (2MB)
30 07:10:54.694321 progress 45% (2MB)
31 07:10:54.695604 progress 50% (2MB)
32 07:10:54.697078 progress 55% (2MB)
33 07:10:54.698355 progress 60% (3MB)
34 07:10:54.699647 progress 65% (3MB)
35 07:10:54.701118 progress 70% (3MB)
36 07:10:54.702399 progress 75% (3MB)
37 07:10:54.703689 progress 80% (4MB)
38 07:10:54.705007 progress 85% (4MB)
39 07:10:54.706450 progress 90% (4MB)
40 07:10:54.707733 progress 95% (4MB)
41 07:10:54.709088 progress 100% (5MB)
42 07:10:54.709343 5MB downloaded in 0.03s (182.36MB/s)
43 07:10:54.709491 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:10:54.709734 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:10:54.709821 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:10:54.709907 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:10:54.710013 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:10:54.710085 saving as /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/kernel/bzImage
50 07:10:54.710147 total size: 7573392 (7MB)
51 07:10:54.710207 No compression specified
52 07:10:54.711253 progress 0% (0MB)
53 07:10:54.713306 progress 5% (0MB)
54 07:10:54.715306 progress 10% (0MB)
55 07:10:54.717170 progress 15% (1MB)
56 07:10:54.719125 progress 20% (1MB)
57 07:10:54.720923 progress 25% (1MB)
58 07:10:54.722851 progress 30% (2MB)
59 07:10:54.724655 progress 35% (2MB)
60 07:10:54.726579 progress 40% (2MB)
61 07:10:54.728545 progress 45% (3MB)
62 07:10:54.730277 progress 50% (3MB)
63 07:10:54.732218 progress 55% (4MB)
64 07:10:54.733945 progress 60% (4MB)
65 07:10:54.735828 progress 65% (4MB)
66 07:10:54.737592 progress 70% (5MB)
67 07:10:54.739491 progress 75% (5MB)
68 07:10:54.741269 progress 80% (5MB)
69 07:10:54.743164 progress 85% (6MB)
70 07:10:54.745085 progress 90% (6MB)
71 07:10:54.746824 progress 95% (6MB)
72 07:10:54.748768 progress 100% (7MB)
73 07:10:54.748938 7MB downloaded in 0.04s (186.21MB/s)
74 07:10:54.749087 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:10:54.749323 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:10:54.749413 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:10:54.749499 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:10:54.749607 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/full.rootfs.tar.xz
80 07:10:54.749675 saving as /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/nfsrootfs/full.rootfs.tar
81 07:10:54.749737 total size: 123901376 (118MB)
82 07:10:54.749799 Using unxz to decompress xz
83 07:10:54.753070 progress 0% (0MB)
84 07:10:55.191258 progress 5% (5MB)
85 07:10:55.637714 progress 10% (11MB)
86 07:10:56.085461 progress 15% (17MB)
87 07:10:56.542828 progress 20% (23MB)
88 07:10:56.871698 progress 25% (29MB)
89 07:10:57.206332 progress 30% (35MB)
90 07:10:57.472304 progress 35% (41MB)
91 07:10:57.640697 progress 40% (47MB)
92 07:10:58.009430 progress 45% (53MB)
93 07:10:58.369192 progress 50% (59MB)
94 07:10:58.708066 progress 55% (65MB)
95 07:10:59.066473 progress 60% (70MB)
96 07:10:59.403151 progress 65% (76MB)
97 07:10:59.778030 progress 70% (82MB)
98 07:11:00.195464 progress 75% (88MB)
99 07:11:00.626571 progress 80% (94MB)
100 07:11:00.754439 progress 85% (100MB)
101 07:11:00.914232 progress 90% (106MB)
102 07:11:01.245953 progress 95% (112MB)
103 07:11:01.615374 progress 100% (118MB)
104 07:11:01.620387 118MB downloaded in 6.87s (17.20MB/s)
105 07:11:01.620683 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:11:01.620972 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:11:01.621079 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:11:01.621168 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:11:01.621284 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:11:01.621357 saving as /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/modules/modules.tar
112 07:11:01.621420 total size: 54868 (0MB)
113 07:11:01.621486 Using unxz to decompress xz
114 07:11:01.624810 progress 59% (0MB)
115 07:11:01.625235 progress 100% (0MB)
116 07:11:01.628663 0MB downloaded in 0.01s (7.23MB/s)
117 07:11:01.628888 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:11:01.629200 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:11:01.629300 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 07:11:01.629398 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 07:11:03.290629 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9045529/extract-nfsrootfs-w_4bovj3
123 07:11:03.290829 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:11:03.290939 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 07:11:03.291081 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak
126 07:11:03.291186 makedir: /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin
127 07:11:03.291273 makedir: /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/tests
128 07:11:03.291355 makedir: /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/results
129 07:11:03.291454 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-add-keys
130 07:11:03.291584 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-add-sources
131 07:11:03.291706 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-background-process-start
132 07:11:03.291820 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-background-process-stop
133 07:11:03.292091 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-common-functions
134 07:11:03.292207 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-echo-ipv4
135 07:11:03.292321 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-install-packages
136 07:11:03.292433 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-installed-packages
137 07:11:03.292545 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-os-build
138 07:11:03.292655 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-probe-channel
139 07:11:03.292764 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-probe-ip
140 07:11:03.292873 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-target-ip
141 07:11:03.292982 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-target-mac
142 07:11:03.293091 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-target-storage
143 07:11:03.293203 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-case
144 07:11:03.293314 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-event
145 07:11:03.293423 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-feedback
146 07:11:03.293533 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-raise
147 07:11:03.293641 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-reference
148 07:11:03.293749 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-runner
149 07:11:03.293859 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-set
150 07:11:03.293967 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-test-shell
151 07:11:03.294078 Updating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-install-packages (oe)
152 07:11:03.294196 Updating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/bin/lava-installed-packages (oe)
153 07:11:03.294294 Creating /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/environment
154 07:11:03.294380 LAVA metadata
155 07:11:03.294448 - LAVA_JOB_ID=9045529
156 07:11:03.294513 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:11:03.294612 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 07:11:03.294678 skipped lava-vland-overlay
159 07:11:03.294757 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:11:03.294840 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 07:11:03.294903 skipped lava-multinode-overlay
162 07:11:03.294979 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:11:03.295062 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 07:11:03.295136 Loading test definitions
165 07:11:03.295227 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 07:11:03.295301 Using /lava-9045529 at stage 0
167 07:11:03.295401 Fetching tests from https://github.com/kernelci/test-definitions
168 07:11:03.295482 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/0/tests/0_ltp-mm'
169 07:11:06.456548 Running '/usr/bin/git checkout kernelci.org
170 07:11:06.594658 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
171 07:11:06.595389 uuid=9045529_1.5.2.3.1 testdef=None
172 07:11:06.595553 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
174 07:11:06.595808 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
175 07:11:06.596640 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:11:06.596892 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
178 07:11:06.598002 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:11:06.598260 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
181 07:11:06.599233 runner path: /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/0/tests/0_ltp-mm test_uuid 9045529_1.5.2.3.1
182 07:11:06.599329 SKIPFILE='skipfile-lkft.yaml'
183 07:11:06.599398 SKIP_INSTALL='true'
184 07:11:06.599462 TST_CMDFILES='mm'
185 07:11:06.599605 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 07:11:06.599825 Creating lava-test-runner.conf files
188 07:11:06.599894 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045529/lava-overlay-2ejl_tak/lava-9045529/0 for stage 0
189 07:11:06.600027 - 0_ltp-mm
190 07:11:06.600130 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
191 07:11:06.600224 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
192 07:11:14.087256 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
193 07:11:14.087412 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
194 07:11:14.087509 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 07:11:14.087621 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 07:11:14.087732 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
197 07:11:14.189712 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 07:11:14.190061 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
199 07:11:14.190259 extracting modules file /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045529/extract-nfsrootfs-w_4bovj3
200 07:11:14.194383 extracting modules file /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045529/extract-overlay-ramdisk-xlx03fi_/ramdisk
201 07:11:14.198252 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 07:11:14.198366 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
203 07:11:14.198453 [common] Applying overlay to NFS
204 07:11:14.198526 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045529/compress-overlay-0kabahcf/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045529/extract-nfsrootfs-w_4bovj3
205 07:11:14.650937 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 07:11:14.651095 start: 1.5.6 configure-preseed-file (timeout 00:09:40) [common]
207 07:11:14.651190 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 07:11:14.651286 start: 1.5.7 compress-ramdisk (timeout 00:09:40) [common]
209 07:11:14.651368 Building ramdisk /var/lib/lava/dispatcher/tmp/9045529/extract-overlay-ramdisk-xlx03fi_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045529/extract-overlay-ramdisk-xlx03fi_/ramdisk
210 07:11:14.684979 >> 24584 blocks
211 07:11:15.152969 rename /var/lib/lava/dispatcher/tmp/9045529/extract-overlay-ramdisk-xlx03fi_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
212 07:11:15.153376 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
213 07:11:15.153502 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
214 07:11:15.153608 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
215 07:11:15.153699 No mkimage arch provided, not using FIT.
216 07:11:15.153793 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 07:11:15.153878 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 07:11:15.153979 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 07:11:15.154077 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
220 07:11:15.154155 No LXC device requested
221 07:11:15.154239 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 07:11:15.154329 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
223 07:11:15.154411 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 07:11:15.154482 Checking files for TFTP limit of 4294967296 bytes.
225 07:11:15.154867 end: 1 tftp-deploy (duration 00:00:20) [common]
226 07:11:15.154975 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 07:11:15.155069 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 07:11:15.155196 substitutions:
229 07:11:15.155267 - {DTB}: None
230 07:11:15.155333 - {INITRD}: 9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
231 07:11:15.155397 - {KERNEL}: 9045529/tftp-deploy-r6mqpj8z/kernel/bzImage
232 07:11:15.155458 - {LAVA_MAC}: None
233 07:11:15.155518 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9045529/extract-nfsrootfs-w_4bovj3
234 07:11:15.155578 - {NFS_SERVER_IP}: 192.168.201.1
235 07:11:15.155637 - {PRESEED_CONFIG}: None
236 07:11:15.155695 - {PRESEED_LOCAL}: None
237 07:11:15.155753 - {RAMDISK}: 9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
238 07:11:15.155812 - {ROOT_PART}: None
239 07:11:15.155869 - {ROOT}: None
240 07:11:15.155953 - {SERVER_IP}: 192.168.201.1
241 07:11:15.156025 - {TEE}: None
242 07:11:15.156083 Parsed boot commands:
243 07:11:15.156141 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 07:11:15.156298 Parsed boot commands: tftpboot 192.168.201.1 9045529/tftp-deploy-r6mqpj8z/kernel/bzImage 9045529/tftp-deploy-r6mqpj8z/kernel/cmdline 9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
245 07:11:15.156395 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 07:11:15.156485 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 07:11:15.156580 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 07:11:15.156668 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 07:11:15.156742 Not connected, no need to disconnect.
250 07:11:15.156825 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 07:11:15.156911 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 07:11:15.156982 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
253 07:11:15.159658 Setting prompt string to ['lava-test: # ']
254 07:11:15.160002 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 07:11:15.160114 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 07:11:15.160215 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 07:11:15.160309 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 07:11:15.160489 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
259 07:11:24.472805 >> Command sent successfully.
260 07:11:24.474954 Returned 0 in 9 seconds
261 07:11:24.575704 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
263 07:11:24.576065 end: 2.2.2 reset-device (duration 00:00:09) [common]
264 07:11:24.576175 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
265 07:11:24.576265 Setting prompt string to 'Starting depthcharge on Helios...'
266 07:11:24.576332 Changing prompt to 'Starting depthcharge on Helios...'
267 07:11:24.576402 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
268 07:11:24.576681 [Enter `^Ec?' for help]
269 07:11:24.576766
270 07:11:24.576834
271 07:11:24.576898 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
272 07:11:24.576966 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
273 07:11:24.577031 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
274 07:11:24.577096 CPU: AES supported, TXT NOT supported, VT supported
275 07:11:24.577157 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
276 07:11:24.577217 PCH: device id 0284 (rev 00) is Cometlake-U Premium
277 07:11:24.577279 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
278 07:11:24.577343 VBOOT: Loading verstage.
279 07:11:24.577402 FMAP: Found "FLASH" version 1.1 at 0xc04000.
280 07:11:24.577461 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
281 07:11:24.577520 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
282 07:11:24.577582 CBFS @ c08000 size 3f8000
283 07:11:24.577642 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
284 07:11:24.577701 CBFS: Locating 'fallback/verstage'
285 07:11:24.577760 CBFS: Found @ offset 10fb80 size 1072c
286 07:11:24.577818
287 07:11:24.577878
288 07:11:24.577937 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
289 07:11:24.577996 Probing TPM: . done!
290 07:11:24.578054 TPM ready after 0 ms
291 07:11:24.578113 Connected to device vid:did:rid of 1ae0:0028:00
292 07:11:24.578174 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
293 07:11:24.578238 Initialized TPM device CR50 revision 0
294 07:11:24.578295 tlcl_send_startup: Startup return code is 0
295 07:11:24.578354 TPM: setup succeeded
296 07:11:24.578447 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
297 07:11:24.578507 Chrome EC: UHEPI supported
298 07:11:24.578563 Phase 1
299 07:11:24.578622 FMAP: area GBB found @ c05000 (12288 bytes)
300 07:11:24.578681 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
301 07:11:24.578772 Phase 2
302 07:11:24.578833 Phase 3
303 07:11:24.578892 FMAP: area GBB found @ c05000 (12288 bytes)
304 07:11:24.578949 VB2:vb2_report_dev_firmware() This is developer signed firmware
305 07:11:24.579008 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
306 07:11:24.579069 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
307 07:11:24.579128 VB2:vb2_verify_keyblock() Checking keyblock signature...
308 07:11:24.579187 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
309 07:11:24.579245 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
310 07:11:24.579304 VB2:vb2_verify_fw_preamble() Verifying preamble.
311 07:11:24.579381 Phase 4
312 07:11:24.579445 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
313 07:11:24.579509 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
314 07:11:24.579572 VB2:vb2_rsa_verify_digest() Digest check failed!
315 07:11:24.579636 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
316 07:11:24.579699 Saving nvdata
317 07:11:24.579761 Reboot requested (10020007)
318 07:11:24.579823 board_reset() called!
319 07:11:24.579885 full_reset() called!
320 07:11:28.156685
321 07:11:28.157293
322 07:11:28.165610 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
323 07:11:28.169521 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
324 07:11:28.175659 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
325 07:11:28.179235 CPU: AES supported, TXT NOT supported, VT supported
326 07:11:28.185449 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
327 07:11:28.188475 PCH: device id 0284 (rev 00) is Cometlake-U Premium
328 07:11:28.195116 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
329 07:11:28.199048 VBOOT: Loading verstage.
330 07:11:28.202054 FMAP: Found "FLASH" version 1.1 at 0xc04000.
331 07:11:28.208318 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
332 07:11:28.215447 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
333 07:11:28.216086 CBFS @ c08000 size 3f8000
334 07:11:28.221613 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
335 07:11:28.224786 CBFS: Locating 'fallback/verstage'
336 07:11:28.228113 CBFS: Found @ offset 10fb80 size 1072c
337 07:11:28.232561
338 07:11:28.233198
339 07:11:28.242878 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
340 07:11:28.257107 Probing TPM: . done!
341 07:11:28.260225 TPM ready after 0 ms
342 07:11:28.263148 Connected to device vid:did:rid of 1ae0:0028:00
343 07:11:28.273487 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
344 07:11:28.277115 Initialized TPM device CR50 revision 0
345 07:11:28.319185 tlcl_send_startup: Startup return code is 0
346 07:11:28.319801 TPM: setup succeeded
347 07:11:28.331671 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
348 07:11:28.335751 Chrome EC: UHEPI supported
349 07:11:28.339042 Phase 1
350 07:11:28.342810 FMAP: area GBB found @ c05000 (12288 bytes)
351 07:11:28.348951 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
352 07:11:28.355503 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
353 07:11:28.358556 Recovery requested (1009000e)
354 07:11:28.364735 Saving nvdata
355 07:11:28.371304 tlcl_extend: response is 0
356 07:11:28.379591 tlcl_extend: response is 0
357 07:11:28.386507 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
358 07:11:28.390059 CBFS @ c08000 size 3f8000
359 07:11:28.396364 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
360 07:11:28.399394 CBFS: Locating 'fallback/romstage'
361 07:11:28.403477 CBFS: Found @ offset 80 size 145fc
362 07:11:28.406362 Accumulated console time in verstage 98 ms
363 07:11:28.406919
364 07:11:28.407403
365 07:11:28.419567 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
366 07:11:28.426391 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
367 07:11:28.429749 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
368 07:11:28.432822 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
369 07:11:28.439252 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
370 07:11:28.442947 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
371 07:11:28.445835 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
372 07:11:28.449173 TCO_STS: 0000 0000
373 07:11:28.452231 GEN_PMCON: e0015238 00000200
374 07:11:28.455549 GBLRST_CAUSE: 00000000 00000000
375 07:11:28.456191 prev_sleep_state 5
376 07:11:28.459240 Boot Count incremented to 47213
377 07:11:28.466186 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
378 07:11:28.469341 CBFS @ c08000 size 3f8000
379 07:11:28.476198 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
380 07:11:28.476795 CBFS: Locating 'fspm.bin'
381 07:11:28.482374 CBFS: Found @ offset 5ffc0 size 71000
382 07:11:28.486170 Chrome EC: UHEPI supported
383 07:11:28.492473 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
384 07:11:28.496345 Probing TPM: done!
385 07:11:28.502599 Connected to device vid:did:rid of 1ae0:0028:00
386 07:11:28.512598 Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
387 07:11:28.518903 Initialized TPM device CR50 revision 0
388 07:11:28.528155 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
389 07:11:28.538254 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
390 07:11:28.538856 MRC cache found, size 1948
391 07:11:28.541136 bootmode is set to: 2
392 07:11:28.544592 PRMRR disabled by config.
393 07:11:28.547705 SPD INDEX = 1
394 07:11:28.550869 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
395 07:11:28.553662 CBFS @ c08000 size 3f8000
396 07:11:28.560214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
397 07:11:28.560767 CBFS: Locating 'spd.bin'
398 07:11:28.567120 CBFS: Found @ offset 5fb80 size 400
399 07:11:28.567655 SPD: module type is LPDDR3
400 07:11:28.570405 SPD: module part is
401 07:11:28.576908 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
402 07:11:28.580207 SPD: device width 4 bits, bus width 8 bits
403 07:11:28.583074 SPD: module size is 4096 MB (per channel)
404 07:11:28.590230 memory slot: 0 configuration done.
405 07:11:28.593349 memory slot: 2 configuration done.
406 07:11:28.641775 CBMEM:
407 07:11:28.645013 IMD: root @ 99fff000 254 entries.
408 07:11:28.647728 IMD: root @ 99ffec00 62 entries.
409 07:11:28.651888 External stage cache:
410 07:11:28.654710 IMD: root @ 9abff000 254 entries.
411 07:11:28.657976 IMD: root @ 9abfec00 62 entries.
412 07:11:28.664856 Chrome EC: clear events_b mask to 0x0000000020004000
413 07:11:28.677836 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
414 07:11:28.690081 tlcl_write: response is 0
415 07:11:28.699860 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
416 07:11:28.706168 MRC: TPM MRC hash updated successfully.
417 07:11:28.706753 2 DIMMs found
418 07:11:28.709490 SMM Memory Map
419 07:11:28.712510 SMRAM : 0x9a000000 0x1000000
420 07:11:28.716411 Subregion 0: 0x9a000000 0xa00000
421 07:11:28.719348 Subregion 1: 0x9aa00000 0x200000
422 07:11:28.722612 Subregion 2: 0x9ac00000 0x400000
423 07:11:28.725680 top_of_ram = 0x9a000000
424 07:11:28.729552 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
425 07:11:28.735491 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
426 07:11:28.739539 MTRR Range: Start=ff000000 End=0 (Size 1000000)
427 07:11:28.745759 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
428 07:11:28.749144 CBFS @ c08000 size 3f8000
429 07:11:28.752448 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
430 07:11:28.755618 CBFS: Locating 'fallback/postcar'
431 07:11:28.761907 CBFS: Found @ offset 107000 size 4b44
432 07:11:28.768939 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
433 07:11:28.778906 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
434 07:11:28.781524 Processing 180 relocs. Offset value of 0x97c0c000
435 07:11:28.790085 Accumulated console time in romstage 286 ms
436 07:11:28.790579
437 07:11:28.790964
438 07:11:28.800385 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
439 07:11:28.807003 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 07:11:28.809905 CBFS @ c08000 size 3f8000
441 07:11:28.816517 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 07:11:28.820212 CBFS: Locating 'fallback/ramstage'
443 07:11:28.824072 CBFS: Found @ offset 43380 size 1b9e8
444 07:11:28.829516 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
445 07:11:28.861848 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
446 07:11:28.865466 Processing 3976 relocs. Offset value of 0x98db0000
447 07:11:28.872095 Accumulated console time in postcar 52 ms
448 07:11:28.872684
449 07:11:28.873080
450 07:11:28.881923 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
451 07:11:28.888558 FMAP: area RO_VPD found @ c00000 (16384 bytes)
452 07:11:28.891804 WARNING: RO_VPD is uninitialized or empty.
453 07:11:28.894842 FMAP: area RW_VPD found @ af8000 (8192 bytes)
454 07:11:28.901358 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 07:11:28.901965 Normal boot.
456 07:11:28.908084 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
457 07:11:28.911558 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
458 07:11:28.914772 CBFS @ c08000 size 3f8000
459 07:11:28.921883 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
460 07:11:28.924656 CBFS: Locating 'cpu_microcode_blob.bin'
461 07:11:28.927982 CBFS: Found @ offset 14700 size 2ec00
462 07:11:28.931114 microcode: sig=0x806ec pf=0x4 revision=0xc9
463 07:11:28.934801 Skip microcode update
464 07:11:28.941671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 07:11:28.942307 CBFS @ c08000 size 3f8000
466 07:11:28.947841 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 07:11:28.951130 CBFS: Locating 'fsps.bin'
468 07:11:28.954143 CBFS: Found @ offset d1fc0 size 35000
469 07:11:28.980741 Detected 4 core, 8 thread CPU.
470 07:11:28.983666 Setting up SMI for CPU
471 07:11:28.986585 IED base = 0x9ac00000
472 07:11:28.987117 IED size = 0x00400000
473 07:11:28.989742 Will perform SMM setup.
474 07:11:28.996793 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
475 07:11:29.003290 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
476 07:11:29.009795 Processing 16 relocs. Offset value of 0x00030000
477 07:11:29.010409 Attempting to start 7 APs
478 07:11:29.016071 Waiting for 10ms after sending INIT.
479 07:11:29.030681 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
480 07:11:29.031307 done.
481 07:11:29.033574 AP: slot 4 apic_id 3.
482 07:11:29.036888 AP: slot 1 apic_id 2.
483 07:11:29.039985 Waiting for 2nd SIPI to complete...done.
484 07:11:29.043676 AP: slot 2 apic_id 4.
485 07:11:29.044322 AP: slot 5 apic_id 5.
486 07:11:29.046449 AP: slot 6 apic_id 7.
487 07:11:29.049987 AP: slot 7 apic_id 6.
488 07:11:29.056657 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
489 07:11:29.062955 Processing 13 relocs. Offset value of 0x00038000
490 07:11:29.069828 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
491 07:11:29.073170 Installing SMM handler to 0x9a000000
492 07:11:29.080082 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
493 07:11:29.086091 Processing 658 relocs. Offset value of 0x9a010000
494 07:11:29.092415 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
495 07:11:29.096481 Processing 13 relocs. Offset value of 0x9a008000
496 07:11:29.102799 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
497 07:11:29.109160 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
498 07:11:29.115555 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
499 07:11:29.119461 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
500 07:11:29.126166 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
501 07:11:29.131995 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
502 07:11:29.139139 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
503 07:11:29.145609 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
504 07:11:29.148504 Clearing SMI status registers
505 07:11:29.149014 SMI_STS: PM1
506 07:11:29.151852 PM1_STS: PWRBTN
507 07:11:29.152487 TCO_STS: SECOND_TO
508 07:11:29.154885 New SMBASE 0x9a000000
509 07:11:29.158533 In relocation handler: CPU 0
510 07:11:29.161899 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
511 07:11:29.168000 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 07:11:29.168509 Relocation complete.
513 07:11:29.171370 New SMBASE 0x99fff400
514 07:11:29.175244 In relocation handler: CPU 3
515 07:11:29.178364 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
516 07:11:29.184707 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 07:11:29.185217 Relocation complete.
518 07:11:29.188017 New SMBASE 0x99ffe800
519 07:11:29.191189 In relocation handler: CPU 6
520 07:11:29.194298 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
521 07:11:29.201436 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 07:11:29.202081 Relocation complete.
523 07:11:29.204524 New SMBASE 0x99ffe400
524 07:11:29.207688 In relocation handler: CPU 7
525 07:11:29.211016 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
526 07:11:29.217756 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 07:11:29.218291 Relocation complete.
528 07:11:29.220941 New SMBASE 0x99ffec00
529 07:11:29.224408 In relocation handler: CPU 5
530 07:11:29.227515 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
531 07:11:29.233895 Writing SMRR. base = 0x9a000006, mask=0xff000800
532 07:11:29.234490 Relocation complete.
533 07:11:29.237124 New SMBASE 0x99fff800
534 07:11:29.240817 In relocation handler: CPU 2
535 07:11:29.244397 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
536 07:11:29.250409 Writing SMRR. base = 0x9a000006, mask=0xff000800
537 07:11:29.250945 Relocation complete.
538 07:11:29.253833 New SMBASE 0x99fffc00
539 07:11:29.256937 In relocation handler: CPU 1
540 07:11:29.260083 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
541 07:11:29.264022 Writing SMRR. base = 0x9a000006, mask=0xff000800
542 07:11:29.267159 Relocation complete.
543 07:11:29.270121 New SMBASE 0x99fff000
544 07:11:29.273607 In relocation handler: CPU 4
545 07:11:29.276777 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
546 07:11:29.279844 Writing SMRR. base = 0x9a000006, mask=0xff000800
547 07:11:29.283484 Relocation complete.
548 07:11:29.286622 Initializing CPU #0
549 07:11:29.289880 CPU: vendor Intel device 806ec
550 07:11:29.292862 CPU: family 06, model 8e, stepping 0c
551 07:11:29.296759 Clearing out pending MCEs
552 07:11:29.297261 Setting up local APIC...
553 07:11:29.299736 apic_id: 0x00 done.
554 07:11:29.302918 Turbo is available but hidden
555 07:11:29.306505 Turbo is available and visible
556 07:11:29.310199 VMX status: enabled
557 07:11:29.313469 IA32_FEATURE_CONTROL status: locked
558 07:11:29.314150 Skip microcode update
559 07:11:29.316289 CPU #0 initialized
560 07:11:29.319469 Initializing CPU #3
561 07:11:29.319998 Initializing CPU #2
562 07:11:29.323314 Initializing CPU #5
563 07:11:29.326365 CPU: vendor Intel device 806ec
564 07:11:29.329754 CPU: family 06, model 8e, stepping 0c
565 07:11:29.332848 CPU: vendor Intel device 806ec
566 07:11:29.336074 CPU: family 06, model 8e, stepping 0c
567 07:11:29.339110 Clearing out pending MCEs
568 07:11:29.342254 Clearing out pending MCEs
569 07:11:29.346340 Setting up local APIC...
570 07:11:29.346946 Initializing CPU #4
571 07:11:29.348811 Initializing CPU #1
572 07:11:29.352829 CPU: vendor Intel device 806ec
573 07:11:29.355773 CPU: family 06, model 8e, stepping 0c
574 07:11:29.359170 CPU: vendor Intel device 806ec
575 07:11:29.362271 CPU: family 06, model 8e, stepping 0c
576 07:11:29.365609 Clearing out pending MCEs
577 07:11:29.368813 Clearing out pending MCEs
578 07:11:29.369314 Setting up local APIC...
579 07:11:29.372093 apic_id: 0x05 done.
580 07:11:29.376086 Setting up local APIC...
581 07:11:29.379250 CPU: vendor Intel device 806ec
582 07:11:29.382116 CPU: family 06, model 8e, stepping 0c
583 07:11:29.385448 Clearing out pending MCEs
584 07:11:29.385953 Initializing CPU #6
585 07:11:29.388398 Initializing CPU #7
586 07:11:29.392184 CPU: vendor Intel device 806ec
587 07:11:29.395436 CPU: family 06, model 8e, stepping 0c
588 07:11:29.398984 CPU: vendor Intel device 806ec
589 07:11:29.401798 CPU: family 06, model 8e, stepping 0c
590 07:11:29.404739 Clearing out pending MCEs
591 07:11:29.408077 Clearing out pending MCEs
592 07:11:29.408573 Setting up local APIC...
593 07:11:29.411996 Setting up local APIC...
594 07:11:29.415322 Setting up local APIC...
595 07:11:29.418453 apic_id: 0x01 done.
596 07:11:29.418998 Setting up local APIC...
597 07:11:29.421540 apic_id: 0x04 done.
598 07:11:29.424886 VMX status: enabled
599 07:11:29.425496 VMX status: enabled
600 07:11:29.428525 IA32_FEATURE_CONTROL status: locked
601 07:11:29.431545 IA32_FEATURE_CONTROL status: locked
602 07:11:29.434758 Skip microcode update
603 07:11:29.438751 VMX status: enabled
604 07:11:29.439376 CPU #5 initialized
605 07:11:29.441496 Skip microcode update
606 07:11:29.445351 IA32_FEATURE_CONTROL status: locked
607 07:11:29.447651 apic_id: 0x02 done.
608 07:11:29.448195 apic_id: 0x03 done.
609 07:11:29.451073 VMX status: enabled
610 07:11:29.454787 VMX status: enabled
611 07:11:29.458144 IA32_FEATURE_CONTROL status: locked
612 07:11:29.460976 IA32_FEATURE_CONTROL status: locked
613 07:11:29.464240 Skip microcode update
614 07:11:29.464736 Skip microcode update
615 07:11:29.467290 CPU #1 initialized
616 07:11:29.467788 CPU #4 initialized
617 07:11:29.471338 apic_id: 0x07 done.
618 07:11:29.474518 apic_id: 0x06 done.
619 07:11:29.475016 VMX status: enabled
620 07:11:29.477631 VMX status: enabled
621 07:11:29.480789 IA32_FEATURE_CONTROL status: locked
622 07:11:29.483932 IA32_FEATURE_CONTROL status: locked
623 07:11:29.487141 CPU #2 initialized
624 07:11:29.487660 Skip microcode update
625 07:11:29.490632 Skip microcode update
626 07:11:29.493724 Skip microcode update
627 07:11:29.494175 CPU #6 initialized
628 07:11:29.497121 CPU #7 initialized
629 07:11:29.500939 CPU #3 initialized
630 07:11:29.503975 bsp_do_flight_plan done after 461 msecs.
631 07:11:29.507404 CPU: frequency set to 4200 MHz
632 07:11:29.508011 Enabling SMIs.
633 07:11:29.510416 Locking SMM.
634 07:11:29.524434 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
635 07:11:29.527649 CBFS @ c08000 size 3f8000
636 07:11:29.533992 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
637 07:11:29.534582 CBFS: Locating 'vbt.bin'
638 07:11:29.540682 CBFS: Found @ offset 5f5c0 size 499
639 07:11:29.543703 Found a VBT of 4608 bytes after decompression
640 07:11:29.724584 Display FSP Version Info HOB
641 07:11:29.727857 Reference Code - CPU = 9.0.1e.30
642 07:11:29.731400 uCode Version = 0.0.0.ca
643 07:11:29.734318 TXT ACM version = ff.ff.ff.ffff
644 07:11:29.737361 Display FSP Version Info HOB
645 07:11:29.740818 Reference Code - ME = 9.0.1e.30
646 07:11:29.744567 MEBx version = 0.0.0.0
647 07:11:29.747704 ME Firmware Version = Consumer SKU
648 07:11:29.751018 Display FSP Version Info HOB
649 07:11:29.753926 Reference Code - CML PCH = 9.0.1e.30
650 07:11:29.757235 PCH-CRID Status = Disabled
651 07:11:29.760521 PCH-CRID Original Value = ff.ff.ff.ffff
652 07:11:29.763675 PCH-CRID New Value = ff.ff.ff.ffff
653 07:11:29.767218 OPROM - RST - RAID = ff.ff.ff.ffff
654 07:11:29.770026 ChipsetInit Base Version = ff.ff.ff.ffff
655 07:11:29.773937 ChipsetInit Oem Version = ff.ff.ff.ffff
656 07:11:29.776820 Display FSP Version Info HOB
657 07:11:29.783394 Reference Code - SA - System Agent = 9.0.1e.30
658 07:11:29.786652 Reference Code - MRC = 0.7.1.6c
659 07:11:29.789495 SA - PCIe Version = 9.0.1e.30
660 07:11:29.790014 SA-CRID Status = Disabled
661 07:11:29.793304 SA-CRID Original Value = 0.0.0.c
662 07:11:29.796418 SA-CRID New Value = 0.0.0.c
663 07:11:29.799867 OPROM - VBIOS = ff.ff.ff.ffff
664 07:11:29.803240 RTC Init
665 07:11:29.806322 Set power on after power failure.
666 07:11:29.806923 Disabling Deep S3
667 07:11:29.809556 Disabling Deep S3
668 07:11:29.813310 Disabling Deep S4
669 07:11:29.813807 Disabling Deep S4
670 07:11:29.816392 Disabling Deep S5
671 07:11:29.816889 Disabling Deep S5
672 07:11:29.822934 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 191 exit 1
673 07:11:29.825970 Enumerating buses...
674 07:11:29.829158 Show all devs... Before device enumeration.
675 07:11:29.832585 Root Device: enabled 1
676 07:11:29.835678 CPU_CLUSTER: 0: enabled 1
677 07:11:29.836208 DOMAIN: 0000: enabled 1
678 07:11:29.839462 APIC: 00: enabled 1
679 07:11:29.842671 PCI: 00:00.0: enabled 1
680 07:11:29.843281 PCI: 00:02.0: enabled 1
681 07:11:29.845935 PCI: 00:04.0: enabled 0
682 07:11:29.849087 PCI: 00:05.0: enabled 0
683 07:11:29.852043 PCI: 00:12.0: enabled 1
684 07:11:29.852552 PCI: 00:12.5: enabled 0
685 07:11:29.855346 PCI: 00:12.6: enabled 0
686 07:11:29.858792 PCI: 00:14.0: enabled 1
687 07:11:29.861857 PCI: 00:14.1: enabled 0
688 07:11:29.862356 PCI: 00:14.3: enabled 1
689 07:11:29.865112 PCI: 00:14.5: enabled 0
690 07:11:29.868930 PCI: 00:15.0: enabled 1
691 07:11:29.872306 PCI: 00:15.1: enabled 1
692 07:11:29.872912 PCI: 00:15.2: enabled 0
693 07:11:29.875537 PCI: 00:15.3: enabled 0
694 07:11:29.878750 PCI: 00:16.0: enabled 1
695 07:11:29.881721 PCI: 00:16.1: enabled 0
696 07:11:29.882221 PCI: 00:16.2: enabled 0
697 07:11:29.884859 PCI: 00:16.3: enabled 0
698 07:11:29.888401 PCI: 00:16.4: enabled 0
699 07:11:29.891485 PCI: 00:16.5: enabled 0
700 07:11:29.892025 PCI: 00:17.0: enabled 1
701 07:11:29.895144 PCI: 00:19.0: enabled 1
702 07:11:29.898402 PCI: 00:19.1: enabled 0
703 07:11:29.901047 PCI: 00:19.2: enabled 0
704 07:11:29.901545 PCI: 00:1a.0: enabled 0
705 07:11:29.904570 PCI: 00:1c.0: enabled 0
706 07:11:29.908017 PCI: 00:1c.1: enabled 0
707 07:11:29.911244 PCI: 00:1c.2: enabled 0
708 07:11:29.911835 PCI: 00:1c.3: enabled 0
709 07:11:29.914487 PCI: 00:1c.4: enabled 0
710 07:11:29.917824 PCI: 00:1c.5: enabled 0
711 07:11:29.918420 PCI: 00:1c.6: enabled 0
712 07:11:29.920598 PCI: 00:1c.7: enabled 0
713 07:11:29.924579 PCI: 00:1d.0: enabled 1
714 07:11:29.927832 PCI: 00:1d.1: enabled 0
715 07:11:29.928463 PCI: 00:1d.2: enabled 0
716 07:11:29.931024 PCI: 00:1d.3: enabled 0
717 07:11:29.934332 PCI: 00:1d.4: enabled 0
718 07:11:29.937348 PCI: 00:1d.5: enabled 1
719 07:11:29.937846 PCI: 00:1e.0: enabled 1
720 07:11:29.941143 PCI: 00:1e.1: enabled 0
721 07:11:29.944349 PCI: 00:1e.2: enabled 1
722 07:11:29.947404 PCI: 00:1e.3: enabled 1
723 07:11:29.947901 PCI: 00:1f.0: enabled 1
724 07:11:29.950822 PCI: 00:1f.1: enabled 1
725 07:11:29.953591 PCI: 00:1f.2: enabled 1
726 07:11:29.956731 PCI: 00:1f.3: enabled 1
727 07:11:29.957229 PCI: 00:1f.4: enabled 1
728 07:11:29.960163 PCI: 00:1f.5: enabled 1
729 07:11:29.964189 PCI: 00:1f.6: enabled 0
730 07:11:29.967356 USB0 port 0: enabled 1
731 07:11:29.967969 I2C: 00:15: enabled 1
732 07:11:29.970295 I2C: 00:5d: enabled 1
733 07:11:29.973659 GENERIC: 0.0: enabled 1
734 07:11:29.974254 I2C: 00:1a: enabled 1
735 07:11:29.976815 I2C: 00:38: enabled 1
736 07:11:29.980189 I2C: 00:39: enabled 1
737 07:11:29.980790 I2C: 00:3a: enabled 1
738 07:11:29.983146 I2C: 00:3b: enabled 1
739 07:11:29.987150 PCI: 00:00.0: enabled 1
740 07:11:29.987755 SPI: 00: enabled 1
741 07:11:29.990063 SPI: 01: enabled 1
742 07:11:29.993132 PNP: 0c09.0: enabled 1
743 07:11:29.993625 USB2 port 0: enabled 1
744 07:11:29.996472 USB2 port 1: enabled 1
745 07:11:29.999732 USB2 port 2: enabled 0
746 07:11:30.003008 USB2 port 3: enabled 0
747 07:11:30.003604 USB2 port 5: enabled 0
748 07:11:30.006910 USB2 port 6: enabled 1
749 07:11:30.009691 USB2 port 9: enabled 1
750 07:11:30.010184 USB3 port 0: enabled 1
751 07:11:30.012884 USB3 port 1: enabled 1
752 07:11:30.016043 USB3 port 2: enabled 1
753 07:11:30.016537 USB3 port 3: enabled 1
754 07:11:30.019692 USB3 port 4: enabled 0
755 07:11:30.022474 APIC: 02: enabled 1
756 07:11:30.022974 APIC: 04: enabled 1
757 07:11:30.026425 APIC: 01: enabled 1
758 07:11:30.029354 APIC: 03: enabled 1
759 07:11:30.029846 APIC: 05: enabled 1
760 07:11:30.032455 APIC: 07: enabled 1
761 07:11:30.035831 APIC: 06: enabled 1
762 07:11:30.036471 Compare with tree...
763 07:11:30.039110 Root Device: enabled 1
764 07:11:30.042638 CPU_CLUSTER: 0: enabled 1
765 07:11:30.043132 APIC: 00: enabled 1
766 07:11:30.046098 APIC: 02: enabled 1
767 07:11:30.049071 APIC: 04: enabled 1
768 07:11:30.049660 APIC: 01: enabled 1
769 07:11:30.052373 APIC: 03: enabled 1
770 07:11:30.056012 APIC: 05: enabled 1
771 07:11:30.058905 APIC: 07: enabled 1
772 07:11:30.059396 APIC: 06: enabled 1
773 07:11:30.062442 DOMAIN: 0000: enabled 1
774 07:11:30.065455 PCI: 00:00.0: enabled 1
775 07:11:30.068580 PCI: 00:02.0: enabled 1
776 07:11:30.069156 PCI: 00:04.0: enabled 0
777 07:11:30.071647 PCI: 00:05.0: enabled 0
778 07:11:30.076014 PCI: 00:12.0: enabled 1
779 07:11:30.078755 PCI: 00:12.5: enabled 0
780 07:11:30.082131 PCI: 00:12.6: enabled 0
781 07:11:30.082798 PCI: 00:14.0: enabled 1
782 07:11:30.085110 USB0 port 0: enabled 1
783 07:11:30.088469 USB2 port 0: enabled 1
784 07:11:30.091341 USB2 port 1: enabled 1
785 07:11:30.095103 USB2 port 2: enabled 0
786 07:11:30.098232 USB2 port 3: enabled 0
787 07:11:30.098735 USB2 port 5: enabled 0
788 07:11:30.101651 USB2 port 6: enabled 1
789 07:11:30.104506 USB2 port 9: enabled 1
790 07:11:30.107869 USB3 port 0: enabled 1
791 07:11:30.111346 USB3 port 1: enabled 1
792 07:11:30.111982 USB3 port 2: enabled 1
793 07:11:30.114947 USB3 port 3: enabled 1
794 07:11:30.118192 USB3 port 4: enabled 0
795 07:11:30.121317 PCI: 00:14.1: enabled 0
796 07:11:30.124436 PCI: 00:14.3: enabled 1
797 07:11:30.128362 PCI: 00:14.5: enabled 0
798 07:11:30.128989 PCI: 00:15.0: enabled 1
799 07:11:30.131001 I2C: 00:15: enabled 1
800 07:11:30.134808 PCI: 00:15.1: enabled 1
801 07:11:30.137666 I2C: 00:5d: enabled 1
802 07:11:30.140994 GENERIC: 0.0: enabled 1
803 07:11:30.141494 PCI: 00:15.2: enabled 0
804 07:11:30.144400 PCI: 00:15.3: enabled 0
805 07:11:30.147622 PCI: 00:16.0: enabled 1
806 07:11:30.151419 PCI: 00:16.1: enabled 0
807 07:11:30.154157 PCI: 00:16.2: enabled 0
808 07:11:30.154657 PCI: 00:16.3: enabled 0
809 07:11:30.157185 PCI: 00:16.4: enabled 0
810 07:11:30.160673 PCI: 00:16.5: enabled 0
811 07:11:30.163609 PCI: 00:17.0: enabled 1
812 07:11:30.166926 PCI: 00:19.0: enabled 1
813 07:11:30.167523 I2C: 00:1a: enabled 1
814 07:11:30.170191 I2C: 00:38: enabled 1
815 07:11:30.173450 I2C: 00:39: enabled 1
816 07:11:30.177363 I2C: 00:3a: enabled 1
817 07:11:30.177958 I2C: 00:3b: enabled 1
818 07:11:30.180506 PCI: 00:19.1: enabled 0
819 07:11:30.183514 PCI: 00:19.2: enabled 0
820 07:11:30.186684 PCI: 00:1a.0: enabled 0
821 07:11:30.190132 PCI: 00:1c.0: enabled 0
822 07:11:30.190700 PCI: 00:1c.1: enabled 0
823 07:11:30.192934 PCI: 00:1c.2: enabled 0
824 07:11:30.196027 PCI: 00:1c.3: enabled 0
825 07:11:30.200130 PCI: 00:1c.4: enabled 0
826 07:11:30.203183 PCI: 00:1c.5: enabled 0
827 07:11:30.203721 PCI: 00:1c.6: enabled 0
828 07:11:30.206498 PCI: 00:1c.7: enabled 0
829 07:11:30.209642 PCI: 00:1d.0: enabled 1
830 07:11:30.212782 PCI: 00:1d.1: enabled 0
831 07:11:30.215972 PCI: 00:1d.2: enabled 0
832 07:11:30.216426 PCI: 00:1d.3: enabled 0
833 07:11:30.219364 PCI: 00:1d.4: enabled 0
834 07:11:30.222378 PCI: 00:1d.5: enabled 1
835 07:11:30.225598 PCI: 00:00.0: enabled 1
836 07:11:30.229186 PCI: 00:1e.0: enabled 1
837 07:11:30.229739 PCI: 00:1e.1: enabled 0
838 07:11:30.232447 PCI: 00:1e.2: enabled 1
839 07:11:30.235974 SPI: 00: enabled 1
840 07:11:30.239261 PCI: 00:1e.3: enabled 1
841 07:11:30.239813 SPI: 01: enabled 1
842 07:11:30.241955 PCI: 00:1f.0: enabled 1
843 07:11:30.245229 PNP: 0c09.0: enabled 1
844 07:11:30.248528 PCI: 00:1f.1: enabled 1
845 07:11:30.252353 PCI: 00:1f.2: enabled 1
846 07:11:30.252913 PCI: 00:1f.3: enabled 1
847 07:11:30.255433 PCI: 00:1f.4: enabled 1
848 07:11:30.258876 PCI: 00:1f.5: enabled 1
849 07:11:30.261658 PCI: 00:1f.6: enabled 0
850 07:11:30.264875 Root Device scanning...
851 07:11:30.268343 scan_static_bus for Root Device
852 07:11:30.268972 CPU_CLUSTER: 0 enabled
853 07:11:30.272010 DOMAIN: 0000 enabled
854 07:11:30.275352 DOMAIN: 0000 scanning...
855 07:11:30.278855 PCI: pci_scan_bus for bus 00
856 07:11:30.281584 PCI: 00:00.0 [8086/0000] ops
857 07:11:30.284868 PCI: 00:00.0 [8086/9b61] enabled
858 07:11:30.288073 PCI: 00:02.0 [8086/0000] bus ops
859 07:11:30.291115 PCI: 00:02.0 [8086/9b41] enabled
860 07:11:30.294338 PCI: 00:04.0 [8086/1903] disabled
861 07:11:30.297472 PCI: 00:08.0 [8086/1911] enabled
862 07:11:30.301208 PCI: 00:12.0 [8086/02f9] enabled
863 07:11:30.304420 PCI: 00:14.0 [8086/0000] bus ops
864 07:11:30.307404 PCI: 00:14.0 [8086/02ed] enabled
865 07:11:30.310466 PCI: 00:14.2 [8086/02ef] enabled
866 07:11:30.314742 PCI: 00:14.3 [8086/02f0] enabled
867 07:11:30.317981 PCI: 00:15.0 [8086/0000] bus ops
868 07:11:30.320657 PCI: 00:15.0 [8086/02e8] enabled
869 07:11:30.323718 PCI: 00:15.1 [8086/0000] bus ops
870 07:11:30.326861 PCI: 00:15.1 [8086/02e9] enabled
871 07:11:30.330767 PCI: 00:16.0 [8086/0000] ops
872 07:11:30.334172 PCI: 00:16.0 [8086/02e0] enabled
873 07:11:30.337042 PCI: 00:17.0 [8086/0000] ops
874 07:11:30.340081 PCI: 00:17.0 [8086/02d3] enabled
875 07:11:30.343439 PCI: 00:19.0 [8086/0000] bus ops
876 07:11:30.346657 PCI: 00:19.0 [8086/02c5] enabled
877 07:11:30.349874 PCI: 00:1d.0 [8086/0000] bus ops
878 07:11:30.353076 PCI: 00:1d.0 [8086/02b0] enabled
879 07:11:30.359568 PCI: Static device PCI: 00:1d.5 not found, disabling it.
880 07:11:30.362820 PCI: 00:1e.0 [8086/0000] ops
881 07:11:30.366121 PCI: 00:1e.0 [8086/02a8] enabled
882 07:11:30.369295 PCI: 00:1e.2 [8086/0000] bus ops
883 07:11:30.372682 PCI: 00:1e.2 [8086/02aa] enabled
884 07:11:30.375971 PCI: 00:1e.3 [8086/0000] bus ops
885 07:11:30.378968 PCI: 00:1e.3 [8086/02ab] enabled
886 07:11:30.382122 PCI: 00:1f.0 [8086/0000] bus ops
887 07:11:30.385591 PCI: 00:1f.0 [8086/0284] enabled
888 07:11:30.392094 PCI: Static device PCI: 00:1f.1 not found, disabling it.
889 07:11:30.395155 PCI: Static device PCI: 00:1f.2 not found, disabling it.
890 07:11:30.398418 PCI: 00:1f.3 [8086/0000] bus ops
891 07:11:30.401689 PCI: 00:1f.3 [8086/02c8] enabled
892 07:11:30.405514 PCI: 00:1f.4 [8086/0000] bus ops
893 07:11:30.408512 PCI: 00:1f.4 [8086/02a3] enabled
894 07:11:30.411789 PCI: 00:1f.5 [8086/0000] bus ops
895 07:11:30.415238 PCI: 00:1f.5 [8086/02a4] enabled
896 07:11:30.418464 PCI: Leftover static devices:
897 07:11:30.421667 PCI: 00:05.0
898 07:11:30.422272 PCI: 00:12.5
899 07:11:30.424589 PCI: 00:12.6
900 07:11:30.425090 PCI: 00:14.1
901 07:11:30.425485 PCI: 00:14.5
902 07:11:30.427853 PCI: 00:15.2
903 07:11:30.428422 PCI: 00:15.3
904 07:11:30.431210 PCI: 00:16.1
905 07:11:30.431805 PCI: 00:16.2
906 07:11:30.432256 PCI: 00:16.3
907 07:11:30.434746 PCI: 00:16.4
908 07:11:30.435244 PCI: 00:16.5
909 07:11:30.438077 PCI: 00:19.1
910 07:11:30.438578 PCI: 00:19.2
911 07:11:30.441230 PCI: 00:1a.0
912 07:11:30.441727 PCI: 00:1c.0
913 07:11:30.442119 PCI: 00:1c.1
914 07:11:30.444311 PCI: 00:1c.2
915 07:11:30.444806 PCI: 00:1c.3
916 07:11:30.447564 PCI: 00:1c.4
917 07:11:30.448092 PCI: 00:1c.5
918 07:11:30.448492 PCI: 00:1c.6
919 07:11:30.451067 PCI: 00:1c.7
920 07:11:30.451665 PCI: 00:1d.1
921 07:11:30.454034 PCI: 00:1d.2
922 07:11:30.454529 PCI: 00:1d.3
923 07:11:30.457741 PCI: 00:1d.4
924 07:11:30.458242 PCI: 00:1d.5
925 07:11:30.458639 PCI: 00:1e.1
926 07:11:30.461219 PCI: 00:1f.1
927 07:11:30.461720 PCI: 00:1f.2
928 07:11:30.464573 PCI: 00:1f.6
929 07:11:30.467025 PCI: Check your devicetree.cb.
930 07:11:30.467546 PCI: 00:02.0 scanning...
931 07:11:30.473864 scan_generic_bus for PCI: 00:02.0
932 07:11:30.477311 scan_generic_bus for PCI: 00:02.0 done
933 07:11:30.480282 scan_bus: scanning of bus PCI: 00:02.0 took 10193 usecs
934 07:11:30.483685 PCI: 00:14.0 scanning...
935 07:11:30.487254 scan_static_bus for PCI: 00:14.0
936 07:11:30.490359 USB0 port 0 enabled
937 07:11:30.493525 USB0 port 0 scanning...
938 07:11:30.496651 scan_static_bus for USB0 port 0
939 07:11:30.497149 USB2 port 0 enabled
940 07:11:30.500393 USB2 port 1 enabled
941 07:11:30.502983 USB2 port 2 disabled
942 07:11:30.503483 USB2 port 3 disabled
943 07:11:30.506966 USB2 port 5 disabled
944 07:11:30.509616 USB2 port 6 enabled
945 07:11:30.510056 USB2 port 9 enabled
946 07:11:30.512947 USB3 port 0 enabled
947 07:11:30.513457 USB3 port 1 enabled
948 07:11:30.516200 USB3 port 2 enabled
949 07:11:30.519658 USB3 port 3 enabled
950 07:11:30.520311 USB3 port 4 disabled
951 07:11:30.522882 USB2 port 0 scanning...
952 07:11:30.526567 scan_static_bus for USB2 port 0
953 07:11:30.529881 scan_static_bus for USB2 port 0 done
954 07:11:30.536235 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
955 07:11:30.539137 USB2 port 1 scanning...
956 07:11:30.542526 scan_static_bus for USB2 port 1
957 07:11:30.545754 scan_static_bus for USB2 port 1 done
958 07:11:30.552806 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
959 07:11:30.553451 USB2 port 6 scanning...
960 07:11:30.555813 scan_static_bus for USB2 port 6
961 07:11:30.559244 scan_static_bus for USB2 port 6 done
962 07:11:30.565303 scan_bus: scanning of bus USB2 port 6 took 9705 usecs
963 07:11:30.568874 USB2 port 9 scanning...
964 07:11:30.572490 scan_static_bus for USB2 port 9
965 07:11:30.575671 scan_static_bus for USB2 port 9 done
966 07:11:30.581874 scan_bus: scanning of bus USB2 port 9 took 9703 usecs
967 07:11:30.582483 USB3 port 0 scanning...
968 07:11:30.585059 scan_static_bus for USB3 port 0
969 07:11:30.591573 scan_static_bus for USB3 port 0 done
970 07:11:30.594731 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
971 07:11:30.598421 USB3 port 1 scanning...
972 07:11:30.601726 scan_static_bus for USB3 port 1
973 07:11:30.604808 scan_static_bus for USB3 port 1 done
974 07:11:30.611179 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
975 07:11:30.614996 USB3 port 2 scanning...
976 07:11:30.618106 scan_static_bus for USB3 port 2
977 07:11:30.621152 scan_static_bus for USB3 port 2 done
978 07:11:30.624354 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
979 07:11:30.627656 USB3 port 3 scanning...
980 07:11:30.630836 scan_static_bus for USB3 port 3
981 07:11:30.633954 scan_static_bus for USB3 port 3 done
982 07:11:30.640966 scan_bus: scanning of bus USB3 port 3 took 9703 usecs
983 07:11:30.644237 scan_static_bus for USB0 port 0 done
984 07:11:30.651227 scan_bus: scanning of bus USB0 port 0 took 155355 usecs
985 07:11:30.654214 scan_static_bus for PCI: 00:14.0 done
986 07:11:30.660542 scan_bus: scanning of bus PCI: 00:14.0 took 172968 usecs
987 07:11:30.661164 PCI: 00:15.0 scanning...
988 07:11:30.666971 scan_generic_bus for PCI: 00:15.0
989 07:11:30.670864 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
990 07:11:30.673891 scan_generic_bus for PCI: 00:15.0 done
991 07:11:30.680095 scan_bus: scanning of bus PCI: 00:15.0 took 14295 usecs
992 07:11:30.680620 PCI: 00:15.1 scanning...
993 07:11:30.687401 scan_generic_bus for PCI: 00:15.1
994 07:11:30.690863 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
995 07:11:30.693376 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
996 07:11:30.696425 scan_generic_bus for PCI: 00:15.1 done
997 07:11:30.703684 scan_bus: scanning of bus PCI: 00:15.1 took 18666 usecs
998 07:11:30.706886 PCI: 00:19.0 scanning...
999 07:11:30.710155 scan_generic_bus for PCI: 00:19.0
1000 07:11:30.713180 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1001 07:11:30.716275 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1002 07:11:30.723527 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1003 07:11:30.726645 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1004 07:11:30.729737 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1005 07:11:30.732944 scan_generic_bus for PCI: 00:19.0 done
1006 07:11:30.739300 scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs
1007 07:11:30.742501 PCI: 00:1d.0 scanning...
1008 07:11:30.745941 do_pci_scan_bridge for PCI: 00:1d.0
1009 07:11:30.749474 PCI: pci_scan_bus for bus 01
1010 07:11:30.752526 PCI: 01:00.0 [1c5c/1327] enabled
1011 07:11:30.755745 Enabling Common Clock Configuration
1012 07:11:30.758841 L1 Sub-State supported from root port 29
1013 07:11:30.762284 L1 Sub-State Support = 0xf
1014 07:11:30.765273 CommonModeRestoreTime = 0x28
1015 07:11:30.768832 Power On Value = 0x16, Power On Scale = 0x0
1016 07:11:30.772268 ASPM: Enabled L1
1017 07:11:30.778803 scan_bus: scanning of bus PCI: 00:1d.0 took 32767 usecs
1018 07:11:30.779401 PCI: 00:1e.2 scanning...
1019 07:11:30.785196 scan_generic_bus for PCI: 00:1e.2
1020 07:11:30.788636 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1021 07:11:30.791678 scan_generic_bus for PCI: 00:1e.2 done
1022 07:11:30.798571 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1023 07:11:30.799072 PCI: 00:1e.3 scanning...
1024 07:11:30.801616 scan_generic_bus for PCI: 00:1e.3
1025 07:11:30.808002 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1026 07:11:30.811224 scan_generic_bus for PCI: 00:1e.3 done
1027 07:11:30.817868 scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
1028 07:11:30.818466 PCI: 00:1f.0 scanning...
1029 07:11:30.821191 scan_static_bus for PCI: 00:1f.0
1030 07:11:30.824598 PNP: 0c09.0 enabled
1031 07:11:30.827716 scan_static_bus for PCI: 00:1f.0 done
1032 07:11:30.834521 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1033 07:11:30.837503 PCI: 00:1f.3 scanning...
1034 07:11:30.840875 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1035 07:11:30.844016 PCI: 00:1f.4 scanning...
1036 07:11:30.847777 scan_generic_bus for PCI: 00:1f.4
1037 07:11:30.850958 scan_generic_bus for PCI: 00:1f.4 done
1038 07:11:30.857255 scan_bus: scanning of bus PCI: 00:1f.4 took 10182 usecs
1039 07:11:30.860397 PCI: 00:1f.5 scanning...
1040 07:11:30.864540 scan_generic_bus for PCI: 00:1f.5
1041 07:11:30.867268 scan_generic_bus for PCI: 00:1f.5 done
1042 07:11:30.873386 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1043 07:11:30.880659 scan_bus: scanning of bus DOMAIN: 0000 took 604984 usecs
1044 07:11:30.883438 scan_static_bus for Root Device done
1045 07:11:30.890135 scan_bus: scanning of bus Root Device took 624851 usecs
1046 07:11:30.890635 done
1047 07:11:30.893438 Chrome EC: UHEPI supported
1048 07:11:30.899796 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1049 07:11:30.903020 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1050 07:11:30.909395 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1051 07:11:30.916965 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1052 07:11:30.920295 SPI flash protection: WPSW=0 SRP0=1
1053 07:11:30.927213 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1054 07:11:30.930536 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1055 07:11:30.933609 found VGA at PCI: 00:02.0
1056 07:11:30.936468 Setting up VGA for PCI: 00:02.0
1057 07:11:30.943648 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 07:11:30.946754 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 07:11:30.949816 Allocating resources...
1060 07:11:30.953029 Reading resources...
1061 07:11:30.956766 Root Device read_resources bus 0 link: 0
1062 07:11:30.959253 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 07:11:30.966417 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 07:11:30.969410 DOMAIN: 0000 read_resources bus 0 link: 0
1065 07:11:30.977253 PCI: 00:14.0 read_resources bus 0 link: 0
1066 07:11:30.980429 USB0 port 0 read_resources bus 0 link: 0
1067 07:11:30.989074 USB0 port 0 read_resources bus 0 link: 0 done
1068 07:11:30.992108 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 07:11:30.998902 PCI: 00:15.0 read_resources bus 1 link: 0
1070 07:11:31.002939 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 07:11:31.008996 PCI: 00:15.1 read_resources bus 2 link: 0
1072 07:11:31.012075 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 07:11:31.019815 PCI: 00:19.0 read_resources bus 3 link: 0
1074 07:11:31.026568 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 07:11:31.030318 PCI: 00:1d.0 read_resources bus 1 link: 0
1076 07:11:31.036625 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1077 07:11:31.039554 PCI: 00:1e.2 read_resources bus 4 link: 0
1078 07:11:31.046824 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1079 07:11:31.049695 PCI: 00:1e.3 read_resources bus 5 link: 0
1080 07:11:31.056389 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1081 07:11:31.059239 PCI: 00:1f.0 read_resources bus 0 link: 0
1082 07:11:31.065869 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1083 07:11:31.072255 DOMAIN: 0000 read_resources bus 0 link: 0 done
1084 07:11:31.075775 Root Device read_resources bus 0 link: 0 done
1085 07:11:31.078980 Done reading resources.
1086 07:11:31.085379 Show resources in subtree (Root Device)...After reading.
1087 07:11:31.088463 Root Device child on link 0 CPU_CLUSTER: 0
1088 07:11:31.091959 CPU_CLUSTER: 0 child on link 0 APIC: 00
1089 07:11:31.095560 APIC: 00
1090 07:11:31.096142 APIC: 02
1091 07:11:31.098421 APIC: 04
1092 07:11:31.098953 APIC: 01
1093 07:11:31.099391 APIC: 03
1094 07:11:31.101924 APIC: 05
1095 07:11:31.102519 APIC: 07
1096 07:11:31.102963 APIC: 06
1097 07:11:31.108029 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1098 07:11:31.118082 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1099 07:11:31.167752 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1100 07:11:31.168420 PCI: 00:00.0
1101 07:11:31.168831 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1102 07:11:31.169621 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1103 07:11:31.170050 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1104 07:11:31.170759 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1105 07:11:31.176105 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1106 07:11:31.185947 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1107 07:11:31.195499 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1108 07:11:31.202007 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1109 07:11:31.212237 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1110 07:11:31.221814 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1111 07:11:31.232008 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1112 07:11:31.241964 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1113 07:11:31.251399 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1114 07:11:31.261229 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1115 07:11:31.267547 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1116 07:11:31.277820 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1117 07:11:31.280772 PCI: 00:02.0
1118 07:11:31.290563 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1119 07:11:31.300083 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1120 07:11:31.310459 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1121 07:11:31.311068 PCI: 00:04.0
1122 07:11:31.313383 PCI: 00:08.0
1123 07:11:31.322889 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1124 07:11:31.323474 PCI: 00:12.0
1125 07:11:31.332924 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1126 07:11:31.339269 PCI: 00:14.0 child on link 0 USB0 port 0
1127 07:11:31.349638 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1128 07:11:31.352756 USB0 port 0 child on link 0 USB2 port 0
1129 07:11:31.355774 USB2 port 0
1130 07:11:31.356424 USB2 port 1
1131 07:11:31.358907 USB2 port 2
1132 07:11:31.359403 USB2 port 3
1133 07:11:31.361979 USB2 port 5
1134 07:11:31.362472 USB2 port 6
1135 07:11:31.365235 USB2 port 9
1136 07:11:31.365726 USB3 port 0
1137 07:11:31.368520 USB3 port 1
1138 07:11:31.369043 USB3 port 2
1139 07:11:31.371763 USB3 port 3
1140 07:11:31.372278 USB3 port 4
1141 07:11:31.374961 PCI: 00:14.2
1142 07:11:31.385513 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1143 07:11:31.395110 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1144 07:11:31.397858 PCI: 00:14.3
1145 07:11:31.407928 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1146 07:11:31.411083 PCI: 00:15.0 child on link 0 I2C: 01:15
1147 07:11:31.420785 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 07:11:31.421384 I2C: 01:15
1149 07:11:31.427849 PCI: 00:15.1 child on link 0 I2C: 02:5d
1150 07:11:31.437894 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 07:11:31.438686 I2C: 02:5d
1152 07:11:31.440126 GENERIC: 0.0
1153 07:11:31.440622 PCI: 00:16.0
1154 07:11:31.450514 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 07:11:31.453687 PCI: 00:17.0
1156 07:11:31.463736 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 07:11:31.470031 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 07:11:31.479577 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 07:11:31.486483 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 07:11:31.496504 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 07:11:31.505953 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 07:11:31.509142 PCI: 00:19.0 child on link 0 I2C: 03:1a
1163 07:11:31.518755 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 07:11:31.522401 I2C: 03:1a
1165 07:11:31.522989 I2C: 03:38
1166 07:11:31.523388 I2C: 03:39
1167 07:11:31.525374 I2C: 03:3a
1168 07:11:31.525970 I2C: 03:3b
1169 07:11:31.532479 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1170 07:11:31.538863 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 07:11:31.548660 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 07:11:31.558499 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 07:11:31.561368 PCI: 01:00.0
1174 07:11:31.572069 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1175 07:11:31.572677 PCI: 00:1e.0
1176 07:11:31.584859 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1177 07:11:31.594591 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1178 07:11:31.597599 PCI: 00:1e.2 child on link 0 SPI: 00
1179 07:11:31.607354 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 07:11:31.608009 SPI: 00
1181 07:11:31.613524 PCI: 00:1e.3 child on link 0 SPI: 01
1182 07:11:31.623593 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 07:11:31.624246 SPI: 01
1184 07:11:31.626959 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1185 07:11:31.636907 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1186 07:11:31.646525 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1187 07:11:31.647135 PNP: 0c09.0
1188 07:11:31.656287 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1189 07:11:31.656903 PCI: 00:1f.3
1190 07:11:31.665772 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 07:11:31.679309 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 07:11:31.679954 PCI: 00:1f.4
1193 07:11:31.689007 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 07:11:31.698714 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 07:11:31.699314 PCI: 00:1f.5
1196 07:11:31.709238 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 07:11:31.715430 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1198 07:11:31.721812 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1199 07:11:31.728488 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1200 07:11:31.731736 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1201 07:11:31.734915 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1202 07:11:31.738192 PCI: 00:17.0 18 * [0x60 - 0x67] io
1203 07:11:31.741274 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1204 07:11:31.748271 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1205 07:11:31.754975 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1206 07:11:31.764373 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1207 07:11:31.771339 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1208 07:11:31.781284 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1209 07:11:31.784409 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1210 07:11:31.790981 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1211 07:11:31.796966 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1212 07:11:31.800921 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1213 07:11:31.807040 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1214 07:11:31.810233 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1215 07:11:31.816628 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1216 07:11:31.819690 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1217 07:11:31.826893 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1218 07:11:31.829936 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1219 07:11:31.833391 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1220 07:11:31.839655 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1221 07:11:31.843333 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1222 07:11:31.849775 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1223 07:11:31.852887 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1224 07:11:31.859150 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1225 07:11:31.862269 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1226 07:11:31.868745 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1227 07:11:31.872483 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1228 07:11:31.879076 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1229 07:11:31.882351 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1230 07:11:31.888491 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1231 07:11:31.891854 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1232 07:11:31.898532 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1233 07:11:31.901694 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1234 07:11:31.911690 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1235 07:11:31.914445 avoid_fixed_resources: DOMAIN: 0000
1236 07:11:31.921231 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1237 07:11:31.928366 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1238 07:11:31.934434 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1239 07:11:31.940653 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1240 07:11:31.951104 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1241 07:11:31.957145 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1242 07:11:31.963357 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1243 07:11:31.973765 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1244 07:11:31.980153 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1245 07:11:31.986332 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1246 07:11:31.996266 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1247 07:11:32.002587 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1248 07:11:32.003090 Setting resources...
1249 07:11:32.009750 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1250 07:11:32.016511 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1251 07:11:32.019826 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1252 07:11:32.023234 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1253 07:11:32.026479 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1254 07:11:32.032417 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1255 07:11:32.039620 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1256 07:11:32.045744 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1257 07:11:32.052203 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1258 07:11:32.059293 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1259 07:11:32.062104 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1260 07:11:32.068497 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1261 07:11:32.071862 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1262 07:11:32.078596 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1263 07:11:32.081674 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1264 07:11:32.088534 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1265 07:11:32.091870 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1266 07:11:32.097956 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1267 07:11:32.100969 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1268 07:11:32.108083 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1269 07:11:32.111067 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1270 07:11:32.117464 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1271 07:11:32.120731 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1272 07:11:32.127401 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1273 07:11:32.131158 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1274 07:11:32.137614 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1275 07:11:32.140730 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1276 07:11:32.147288 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1277 07:11:32.150692 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1278 07:11:32.157335 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1279 07:11:32.160823 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1280 07:11:32.167089 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1281 07:11:32.173477 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1282 07:11:32.180432 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1283 07:11:32.187120 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1284 07:11:32.196372 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1285 07:11:32.199421 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1286 07:11:32.206591 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1287 07:11:32.212583 Root Device assign_resources, bus 0 link: 0
1288 07:11:32.215650 DOMAIN: 0000 assign_resources, bus 0 link: 0
1289 07:11:32.225487 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1290 07:11:32.232236 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1291 07:11:32.241703 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1292 07:11:32.248745 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1293 07:11:32.258459 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1294 07:11:32.265162 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1295 07:11:32.271679 PCI: 00:14.0 assign_resources, bus 0 link: 0
1296 07:11:32.274958 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 07:11:32.284542 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1298 07:11:32.291602 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1299 07:11:32.300932 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1300 07:11:32.307195 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1301 07:11:32.313483 PCI: 00:15.0 assign_resources, bus 1 link: 0
1302 07:11:32.317107 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 07:11:32.326840 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1304 07:11:32.329970 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 07:11:32.333087 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 07:11:32.343224 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1307 07:11:32.349723 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1308 07:11:32.359509 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1309 07:11:32.365721 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1310 07:11:32.375900 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 07:11:32.382170 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 07:11:32.389114 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 07:11:32.398729 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1314 07:11:32.401865 PCI: 00:19.0 assign_resources, bus 3 link: 0
1315 07:11:32.408532 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 07:11:32.415105 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1317 07:11:32.424831 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1318 07:11:32.434848 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1319 07:11:32.437731 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1320 07:11:32.444392 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1321 07:11:32.450995 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1322 07:11:32.457871 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1323 07:11:32.467537 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1324 07:11:32.470767 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1325 07:11:32.477150 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 07:11:32.484229 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1327 07:11:32.490385 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1328 07:11:32.493995 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 07:11:32.499994 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1330 07:11:32.503646 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 07:11:32.509640 LPC: Trying to open IO window from 800 size 1ff
1332 07:11:32.516799 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1333 07:11:32.526574 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1334 07:11:32.532911 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1335 07:11:32.543170 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1336 07:11:32.545876 DOMAIN: 0000 assign_resources, bus 0 link: 0
1337 07:11:32.549329 Root Device assign_resources, bus 0 link: 0
1338 07:11:32.552374 Done setting resources.
1339 07:11:32.559534 Show resources in subtree (Root Device)...After assigning values.
1340 07:11:32.565664 Root Device child on link 0 CPU_CLUSTER: 0
1341 07:11:32.568806 CPU_CLUSTER: 0 child on link 0 APIC: 00
1342 07:11:32.569407 APIC: 00
1343 07:11:32.571886 APIC: 02
1344 07:11:32.572426 APIC: 04
1345 07:11:32.572819 APIC: 01
1346 07:11:32.575981 APIC: 03
1347 07:11:32.576573 APIC: 05
1348 07:11:32.579177 APIC: 07
1349 07:11:32.579773 APIC: 06
1350 07:11:32.582188 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1351 07:11:32.592037 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1352 07:11:32.604998 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1353 07:11:32.605613 PCI: 00:00.0
1354 07:11:32.615026 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1355 07:11:32.624466 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1356 07:11:32.634443 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1357 07:11:32.644094 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1358 07:11:32.653514 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1359 07:11:32.660603 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1360 07:11:32.670419 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1361 07:11:32.680056 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1362 07:11:32.689634 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1363 07:11:32.699502 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1364 07:11:32.709176 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1365 07:11:32.715750 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1366 07:11:32.725845 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1367 07:11:32.735646 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1368 07:11:32.745250 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1369 07:11:32.755541 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1370 07:11:32.758151 PCI: 00:02.0
1371 07:11:32.768209 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1372 07:11:32.778278 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1373 07:11:32.788448 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1374 07:11:32.789058 PCI: 00:04.0
1375 07:11:32.791791 PCI: 00:08.0
1376 07:11:32.800961 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1377 07:11:32.801468 PCI: 00:12.0
1378 07:11:32.814056 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1379 07:11:32.817723 PCI: 00:14.0 child on link 0 USB0 port 0
1380 07:11:32.827159 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1381 07:11:32.830434 USB0 port 0 child on link 0 USB2 port 0
1382 07:11:32.833699 USB2 port 0
1383 07:11:32.837506 USB2 port 1
1384 07:11:32.838185 USB2 port 2
1385 07:11:32.840492 USB2 port 3
1386 07:11:32.840995 USB2 port 5
1387 07:11:32.843958 USB2 port 6
1388 07:11:32.844562 USB2 port 9
1389 07:11:32.846957 USB3 port 0
1390 07:11:32.847456 USB3 port 1
1391 07:11:32.850364 USB3 port 2
1392 07:11:32.850978 USB3 port 3
1393 07:11:32.853151 USB3 port 4
1394 07:11:32.853673 PCI: 00:14.2
1395 07:11:32.866492 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1396 07:11:32.876281 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1397 07:11:32.876956 PCI: 00:14.3
1398 07:11:32.886017 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1399 07:11:32.892543 PCI: 00:15.0 child on link 0 I2C: 01:15
1400 07:11:32.902524 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1401 07:11:32.903242 I2C: 01:15
1402 07:11:32.909113 PCI: 00:15.1 child on link 0 I2C: 02:5d
1403 07:11:32.919304 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1404 07:11:32.919935 I2C: 02:5d
1405 07:11:32.922899 GENERIC: 0.0
1406 07:11:32.923638 PCI: 00:16.0
1407 07:11:32.932312 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1408 07:11:32.935304 PCI: 00:17.0
1409 07:11:32.945414 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1410 07:11:32.955564 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1411 07:11:32.964995 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 07:11:32.974653 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 07:11:32.981454 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 07:11:32.994109 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1415 07:11:32.997311 PCI: 00:19.0 child on link 0 I2C: 03:1a
1416 07:11:33.006941 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1417 07:11:33.010323 I2C: 03:1a
1418 07:11:33.010951 I2C: 03:38
1419 07:11:33.013373 I2C: 03:39
1420 07:11:33.013867 I2C: 03:3a
1421 07:11:33.014263 I2C: 03:3b
1422 07:11:33.020577 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1423 07:11:33.029827 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 07:11:33.039660 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 07:11:33.049994 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 07:11:33.050612 PCI: 01:00.0
1427 07:11:33.063108 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1428 07:11:33.063725 PCI: 00:1e.0
1429 07:11:33.076125 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1430 07:11:33.086080 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1431 07:11:33.089114 PCI: 00:1e.2 child on link 0 SPI: 00
1432 07:11:33.098666 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1433 07:11:33.099274 SPI: 00
1434 07:11:33.105354 PCI: 00:1e.3 child on link 0 SPI: 01
1435 07:11:33.115140 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1436 07:11:33.115675 SPI: 01
1437 07:11:33.121334 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1438 07:11:33.128486 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1439 07:11:33.138715 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1440 07:11:33.139326 PNP: 0c09.0
1441 07:11:33.147770 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1442 07:11:33.151176 PCI: 00:1f.3
1443 07:11:33.160577 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1444 07:11:33.170703 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1445 07:11:33.171291 PCI: 00:1f.4
1446 07:11:33.180918 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 07:11:33.190770 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1448 07:11:33.193650 PCI: 00:1f.5
1449 07:11:33.203164 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1450 07:11:33.206959 Done allocating resources.
1451 07:11:33.210313 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1452 07:11:33.213390 Enabling resources...
1453 07:11:33.220145 PCI: 00:00.0 subsystem <- 8086/9b61
1454 07:11:33.220671 PCI: 00:00.0 cmd <- 06
1455 07:11:33.226683 PCI: 00:02.0 subsystem <- 8086/9b41
1456 07:11:33.227190 PCI: 00:02.0 cmd <- 03
1457 07:11:33.229995 PCI: 00:08.0 cmd <- 06
1458 07:11:33.233017 PCI: 00:12.0 subsystem <- 8086/02f9
1459 07:11:33.236618 PCI: 00:12.0 cmd <- 02
1460 07:11:33.239787 PCI: 00:14.0 subsystem <- 8086/02ed
1461 07:11:33.243394 PCI: 00:14.0 cmd <- 02
1462 07:11:33.246457 PCI: 00:14.2 cmd <- 02
1463 07:11:33.249481 PCI: 00:14.3 subsystem <- 8086/02f0
1464 07:11:33.252715 PCI: 00:14.3 cmd <- 02
1465 07:11:33.256125 PCI: 00:15.0 subsystem <- 8086/02e8
1466 07:11:33.259319 PCI: 00:15.0 cmd <- 02
1467 07:11:33.262373 PCI: 00:15.1 subsystem <- 8086/02e9
1468 07:11:33.262878 PCI: 00:15.1 cmd <- 02
1469 07:11:33.269219 PCI: 00:16.0 subsystem <- 8086/02e0
1470 07:11:33.269807 PCI: 00:16.0 cmd <- 02
1471 07:11:33.275873 PCI: 00:17.0 subsystem <- 8086/02d3
1472 07:11:33.276500 PCI: 00:17.0 cmd <- 03
1473 07:11:33.278646 PCI: 00:19.0 subsystem <- 8086/02c5
1474 07:11:33.282479 PCI: 00:19.0 cmd <- 02
1475 07:11:33.285983 PCI: 00:1d.0 bridge ctrl <- 0013
1476 07:11:33.288961 PCI: 00:1d.0 subsystem <- 8086/02b0
1477 07:11:33.292055 PCI: 00:1d.0 cmd <- 06
1478 07:11:33.295307 PCI: 00:1e.0 subsystem <- 8086/02a8
1479 07:11:33.298541 PCI: 00:1e.0 cmd <- 06
1480 07:11:33.302184 PCI: 00:1e.2 subsystem <- 8086/02aa
1481 07:11:33.305278 PCI: 00:1e.2 cmd <- 06
1482 07:11:33.308375 PCI: 00:1e.3 subsystem <- 8086/02ab
1483 07:11:33.311873 PCI: 00:1e.3 cmd <- 02
1484 07:11:33.314800 PCI: 00:1f.0 subsystem <- 8086/0284
1485 07:11:33.318057 PCI: 00:1f.0 cmd <- 407
1486 07:11:33.321162 PCI: 00:1f.3 subsystem <- 8086/02c8
1487 07:11:33.325023 PCI: 00:1f.3 cmd <- 02
1488 07:11:33.328180 PCI: 00:1f.4 subsystem <- 8086/02a3
1489 07:11:33.331312 PCI: 00:1f.4 cmd <- 03
1490 07:11:33.335027 PCI: 00:1f.5 subsystem <- 8086/02a4
1491 07:11:33.337694 PCI: 00:1f.5 cmd <- 406
1492 07:11:33.345559 PCI: 01:00.0 cmd <- 02
1493 07:11:33.350659 done.
1494 07:11:33.358734 ME: Version: 14.0.39.1367
1495 07:11:33.365709 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1496 07:11:33.368831 Initializing devices...
1497 07:11:33.369502 Root Device init ...
1498 07:11:33.375648 Chrome EC: Set SMI mask to 0x0000000000000000
1499 07:11:33.378758 Chrome EC: clear events_b mask to 0x0000000000000000
1500 07:11:33.385285 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1501 07:11:33.391762 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1502 07:11:33.398752 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1503 07:11:33.401815 Chrome EC: Set WAKE mask to 0x0000000000000000
1504 07:11:33.408181 Root Device init finished in 35175 usecs
1505 07:11:33.408695 CPU_CLUSTER: 0 init ...
1506 07:11:33.414794 CPU_CLUSTER: 0 init finished in 2448 usecs
1507 07:11:33.419883 PCI: 00:00.0 init ...
1508 07:11:33.422786 CPU TDP: 15 Watts
1509 07:11:33.425867 CPU PL2 = 64 Watts
1510 07:11:33.429083 PCI: 00:00.0 init finished in 7083 usecs
1511 07:11:33.432763 PCI: 00:02.0 init ...
1512 07:11:33.435781 PCI: 00:02.0 init finished in 2253 usecs
1513 07:11:33.439243 PCI: 00:08.0 init ...
1514 07:11:33.443027 PCI: 00:08.0 init finished in 2254 usecs
1515 07:11:33.446162 PCI: 00:12.0 init ...
1516 07:11:33.449061 PCI: 00:12.0 init finished in 2252 usecs
1517 07:11:33.452583 PCI: 00:14.0 init ...
1518 07:11:33.455634 PCI: 00:14.0 init finished in 2254 usecs
1519 07:11:33.458702 PCI: 00:14.2 init ...
1520 07:11:33.462233 PCI: 00:14.2 init finished in 2253 usecs
1521 07:11:33.465029 PCI: 00:14.3 init ...
1522 07:11:33.468776 PCI: 00:14.3 init finished in 2271 usecs
1523 07:11:33.472034 PCI: 00:15.0 init ...
1524 07:11:33.475613 DW I2C bus 0 at 0xd121f000 (400 KHz)
1525 07:11:33.481614 PCI: 00:15.0 init finished in 5980 usecs
1526 07:11:33.482116 PCI: 00:15.1 init ...
1527 07:11:33.487673 DW I2C bus 1 at 0xd1220000 (400 KHz)
1528 07:11:33.491141 PCI: 00:15.1 init finished in 5979 usecs
1529 07:11:33.494104 PCI: 00:16.0 init ...
1530 07:11:33.497881 PCI: 00:16.0 init finished in 2254 usecs
1531 07:11:33.501164 PCI: 00:19.0 init ...
1532 07:11:33.504301 DW I2C bus 4 at 0xd1222000 (400 KHz)
1533 07:11:33.507461 PCI: 00:19.0 init finished in 5978 usecs
1534 07:11:33.510719 PCI: 00:1d.0 init ...
1535 07:11:33.514026 Initializing PCH PCIe bridge.
1536 07:11:33.517065 PCI: 00:1d.0 init finished in 5286 usecs
1537 07:11:33.520811 PCI: 00:1f.0 init ...
1538 07:11:33.524069 IOAPIC: Initializing IOAPIC at 0xfec00000
1539 07:11:33.530687 IOAPIC: Bootstrap Processor Local APIC = 0x00
1540 07:11:33.530856 IOAPIC: ID = 0x02
1541 07:11:33.533872 IOAPIC: Dumping registers
1542 07:11:33.537051 reg 0x0000: 0x02000000
1543 07:11:33.540359 reg 0x0001: 0x00770020
1544 07:11:33.543890 reg 0x0002: 0x00000000
1545 07:11:33.547012 PCI: 00:1f.0 init finished in 23542 usecs
1546 07:11:33.550150 PCI: 00:1f.4 init ...
1547 07:11:33.553516 PCI: 00:1f.4 init finished in 2264 usecs
1548 07:11:33.564905 PCI: 01:00.0 init ...
1549 07:11:33.568202 PCI: 01:00.0 init finished in 2244 usecs
1550 07:11:33.572662 PNP: 0c09.0 init ...
1551 07:11:33.575746 Google Chrome EC uptime: 11.071 seconds
1552 07:11:33.582831 Google Chrome AP resets since EC boot: 0
1553 07:11:33.585938 Google Chrome most recent AP reset causes:
1554 07:11:33.592295 Google Chrome EC reset flags at last EC boot: reset-pin
1555 07:11:33.595536 PNP: 0c09.0 init finished in 20578 usecs
1556 07:11:33.598697 Devices initialized
1557 07:11:33.601920 Show all devs... After init.
1558 07:11:33.602009 Root Device: enabled 1
1559 07:11:33.605068 CPU_CLUSTER: 0: enabled 1
1560 07:11:33.608452 DOMAIN: 0000: enabled 1
1561 07:11:33.612072 APIC: 00: enabled 1
1562 07:11:33.612189 PCI: 00:00.0: enabled 1
1563 07:11:33.614974 PCI: 00:02.0: enabled 1
1564 07:11:33.618356 PCI: 00:04.0: enabled 0
1565 07:11:33.621649 PCI: 00:05.0: enabled 0
1566 07:11:33.621767 PCI: 00:12.0: enabled 1
1567 07:11:33.624753 PCI: 00:12.5: enabled 0
1568 07:11:33.627867 PCI: 00:12.6: enabled 0
1569 07:11:33.628001 PCI: 00:14.0: enabled 1
1570 07:11:33.631729 PCI: 00:14.1: enabled 0
1571 07:11:33.634852 PCI: 00:14.3: enabled 1
1572 07:11:33.637922 PCI: 00:14.5: enabled 0
1573 07:11:33.638011 PCI: 00:15.0: enabled 1
1574 07:11:33.641028 PCI: 00:15.1: enabled 1
1575 07:11:33.644238 PCI: 00:15.2: enabled 0
1576 07:11:33.647645 PCI: 00:15.3: enabled 0
1577 07:11:33.647735 PCI: 00:16.0: enabled 1
1578 07:11:33.651300 PCI: 00:16.1: enabled 0
1579 07:11:33.654322 PCI: 00:16.2: enabled 0
1580 07:11:33.657517 PCI: 00:16.3: enabled 0
1581 07:11:33.657606 PCI: 00:16.4: enabled 0
1582 07:11:33.660794 PCI: 00:16.5: enabled 0
1583 07:11:33.663998 PCI: 00:17.0: enabled 1
1584 07:11:33.667257 PCI: 00:19.0: enabled 1
1585 07:11:33.667370 PCI: 00:19.1: enabled 0
1586 07:11:33.670494 PCI: 00:19.2: enabled 0
1587 07:11:33.673805 PCI: 00:1a.0: enabled 0
1588 07:11:33.676797 PCI: 00:1c.0: enabled 0
1589 07:11:33.676884 PCI: 00:1c.1: enabled 0
1590 07:11:33.680104 PCI: 00:1c.2: enabled 0
1591 07:11:33.683848 PCI: 00:1c.3: enabled 0
1592 07:11:33.686939 PCI: 00:1c.4: enabled 0
1593 07:11:33.687027 PCI: 00:1c.5: enabled 0
1594 07:11:33.690141 PCI: 00:1c.6: enabled 0
1595 07:11:33.693354 PCI: 00:1c.7: enabled 0
1596 07:11:33.696765 PCI: 00:1d.0: enabled 1
1597 07:11:33.696852 PCI: 00:1d.1: enabled 0
1598 07:11:33.699751 PCI: 00:1d.2: enabled 0
1599 07:11:33.703539 PCI: 00:1d.3: enabled 0
1600 07:11:33.706649 PCI: 00:1d.4: enabled 0
1601 07:11:33.706738 PCI: 00:1d.5: enabled 0
1602 07:11:33.709969 PCI: 00:1e.0: enabled 1
1603 07:11:33.713132 PCI: 00:1e.1: enabled 0
1604 07:11:33.716110 PCI: 00:1e.2: enabled 1
1605 07:11:33.716203 PCI: 00:1e.3: enabled 1
1606 07:11:33.719351 PCI: 00:1f.0: enabled 1
1607 07:11:33.723109 PCI: 00:1f.1: enabled 0
1608 07:11:33.726379 PCI: 00:1f.2: enabled 0
1609 07:11:33.726466 PCI: 00:1f.3: enabled 1
1610 07:11:33.729386 PCI: 00:1f.4: enabled 1
1611 07:11:33.733425 PCI: 00:1f.5: enabled 1
1612 07:11:33.733589 PCI: 00:1f.6: enabled 0
1613 07:11:33.735994 USB0 port 0: enabled 1
1614 07:11:33.739483 I2C: 01:15: enabled 1
1615 07:11:33.742963 I2C: 02:5d: enabled 1
1616 07:11:33.743130 GENERIC: 0.0: enabled 1
1617 07:11:33.746038 I2C: 03:1a: enabled 1
1618 07:11:33.749351 I2C: 03:38: enabled 1
1619 07:11:33.749514 I2C: 03:39: enabled 1
1620 07:11:33.752430 I2C: 03:3a: enabled 1
1621 07:11:33.755741 I2C: 03:3b: enabled 1
1622 07:11:33.755919 PCI: 00:00.0: enabled 1
1623 07:11:33.758982 SPI: 00: enabled 1
1624 07:11:33.762127 SPI: 01: enabled 1
1625 07:11:33.762305 PNP: 0c09.0: enabled 1
1626 07:11:33.766039 USB2 port 0: enabled 1
1627 07:11:33.769102 USB2 port 1: enabled 1
1628 07:11:33.772190 USB2 port 2: enabled 0
1629 07:11:33.772368 USB2 port 3: enabled 0
1630 07:11:33.775784 USB2 port 5: enabled 0
1631 07:11:33.778903 USB2 port 6: enabled 1
1632 07:11:33.779392 USB2 port 9: enabled 1
1633 07:11:33.781970 USB3 port 0: enabled 1
1634 07:11:33.785167 USB3 port 1: enabled 1
1635 07:11:33.789088 USB3 port 2: enabled 1
1636 07:11:33.789644 USB3 port 3: enabled 1
1637 07:11:33.792098 USB3 port 4: enabled 0
1638 07:11:33.795418 APIC: 02: enabled 1
1639 07:11:33.795871 APIC: 04: enabled 1
1640 07:11:33.798977 APIC: 01: enabled 1
1641 07:11:33.799537 APIC: 03: enabled 1
1642 07:11:33.802043 APIC: 05: enabled 1
1643 07:11:33.804962 APIC: 07: enabled 1
1644 07:11:33.805418 APIC: 06: enabled 1
1645 07:11:33.808269 PCI: 00:08.0: enabled 1
1646 07:11:33.811415 PCI: 00:14.2: enabled 1
1647 07:11:33.814495 PCI: 01:00.0: enabled 1
1648 07:11:33.818157 Disabling ACPI via APMC:
1649 07:11:33.818614 done.
1650 07:11:33.824445 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1651 07:11:33.827776 ELOG: NV offset 0xaf0000 size 0x4000
1652 07:11:33.834533 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1653 07:11:33.841506 ELOG: Event(17) added with size 13 at 2023-02-07 07:11:33 UTC
1654 07:11:33.848066 POST: Unexpected post code in previous boot: 0x73
1655 07:11:33.854007 ELOG: Event(A3) added with size 11 at 2023-02-07 07:11:33 UTC
1656 07:11:33.860756 ELOG: Event(A6) added with size 13 at 2023-02-07 07:11:33 UTC
1657 07:11:33.867751 ELOG: Event(92) added with size 9 at 2023-02-07 07:11:33 UTC
1658 07:11:33.873941 ELOG: Event(93) added with size 9 at 2023-02-07 07:11:33 UTC
1659 07:11:33.880392 ELOG: Event(9A) added with size 9 at 2023-02-07 07:11:33 UTC
1660 07:11:33.886935 ELOG: Event(9E) added with size 10 at 2023-02-07 07:11:33 UTC
1661 07:11:33.890689 ELOG: Event(9F) added with size 14 at 2023-02-07 07:11:33 UTC
1662 07:11:33.896686 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1663 07:11:33.903120 ELOG: Event(A1) added with size 10 at 2023-02-07 07:11:33 UTC
1664 07:11:33.912739 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1665 07:11:33.916084 ELOG: Event(A0) added with size 9 at 2023-02-07 07:11:33 UTC
1666 07:11:33.923128 elog_add_boot_reason: Logged dev mode boot
1667 07:11:33.923778 Finalize devices...
1668 07:11:33.926139 PCI: 00:17.0 final
1669 07:11:33.929210 Devices finalized
1670 07:11:33.932456 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1671 07:11:33.939290 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1672 07:11:33.942529 ME: HFSTS1 : 0x90000245
1673 07:11:33.946280 ME: HFSTS2 : 0x3B850126
1674 07:11:33.952631 ME: HFSTS3 : 0x00000020
1675 07:11:33.955989 ME: HFSTS4 : 0x00004800
1676 07:11:33.958819 ME: HFSTS5 : 0x00000000
1677 07:11:33.962072 ME: HFSTS6 : 0x40400006
1678 07:11:33.965234 ME: Manufacturing Mode : NO
1679 07:11:33.968713 ME: FW Partition Table : OK
1680 07:11:33.971971 ME: Bringup Loader Failure : NO
1681 07:11:33.975451 ME: Firmware Init Complete : YES
1682 07:11:33.978187 ME: Boot Options Present : NO
1683 07:11:33.981388 ME: Update In Progress : NO
1684 07:11:33.988380 ME: D0i3 Support : YES
1685 07:11:33.991595 ME: Low Power State Enabled : NO
1686 07:11:33.994691 ME: CPU Replaced : NO
1687 07:11:33.998435 ME: CPU Replacement Valid : YES
1688 07:11:34.001300 ME: Current Working State : 5
1689 07:11:34.004415 ME: Current Operation State : 1
1690 07:11:34.007606 ME: Current Operation Mode : 0
1691 07:11:34.010869 ME: Error Code : 0
1692 07:11:34.014346 ME: CPU Debug Disabled : YES
1693 07:11:34.018186 ME: TXT Support : NO
1694 07:11:34.021164 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1695 07:11:34.027244 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1696 07:11:34.030986 CBFS @ c08000 size 3f8000
1697 07:11:34.034317 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1698 07:11:34.037288 CBFS: Locating 'fallback/dsdt.aml'
1699 07:11:34.044121 CBFS: Found @ offset 10bb80 size 3fa5
1700 07:11:34.047840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1701 07:11:34.050528 CBFS @ c08000 size 3f8000
1702 07:11:34.057629 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1703 07:11:34.060865 CBFS: Locating 'fallback/slic'
1704 07:11:34.063832 CBFS: 'fallback/slic' not found.
1705 07:11:34.070090 ACPI: Writing ACPI tables at 99b3e000.
1706 07:11:34.070676 ACPI: * FACS
1707 07:11:34.073399 ACPI: * DSDT
1708 07:11:34.076529 Ramoops buffer: 0x100000@0x99a3d000.
1709 07:11:34.080104 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1710 07:11:34.086829 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1711 07:11:34.089720 Google Chrome EC: version:
1712 07:11:34.092937 ro: helios_v2.0.2659-56403530b
1713 07:11:34.096359 rw: helios_v2.0.2849-c41de27e7d
1714 07:11:34.096961 running image: 1
1715 07:11:34.100882 ACPI: * FADT
1716 07:11:34.101501 SCI is IRQ9
1717 07:11:34.107129 ACPI: added table 1/32, length now 40
1718 07:11:34.107741 ACPI: * SSDT
1719 07:11:34.110914 Found 1 CPU(s) with 8 core(s) each.
1720 07:11:34.113996 Error: Could not locate 'wifi_sar' in VPD.
1721 07:11:34.120455 Checking CBFS for default SAR values
1722 07:11:34.123960 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1723 07:11:34.126843 CBFS @ c08000 size 3f8000
1724 07:11:34.133825 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1725 07:11:34.136855 CBFS: Locating 'wifi_sar_defaults.hex'
1726 07:11:34.140194 CBFS: Found @ offset 5fac0 size 77
1727 07:11:34.143262 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1728 07:11:34.150246 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1729 07:11:34.153620 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1730 07:11:34.160154 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1731 07:11:34.163454 failed to find key in VPD: dsm_calib_r0_0
1732 07:11:34.172700 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1733 07:11:34.176304 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1734 07:11:34.182606 failed to find key in VPD: dsm_calib_r0_1
1735 07:11:34.189291 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1736 07:11:34.195972 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1737 07:11:34.199178 failed to find key in VPD: dsm_calib_r0_2
1738 07:11:34.208418 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1739 07:11:34.215278 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1740 07:11:34.218750 failed to find key in VPD: dsm_calib_r0_3
1741 07:11:34.228053 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1742 07:11:34.231581 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1743 07:11:34.238339 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1744 07:11:34.241459 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1745 07:11:34.245034 EC returned error result code 1
1746 07:11:34.248494 EC returned error result code 1
1747 07:11:34.251454 EC returned error result code 1
1748 07:11:34.257845 PS2K: Bad resp from EC. Vivaldi disabled!
1749 07:11:34.260988 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1750 07:11:34.267961 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1751 07:11:34.274425 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1752 07:11:34.277605 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1753 07:11:34.284035 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1754 07:11:34.290686 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1755 07:11:34.297153 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1756 07:11:34.300522 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1757 07:11:34.307367 ACPI: added table 2/32, length now 44
1758 07:11:34.307819 ACPI: * MCFG
1759 07:11:34.310556 ACPI: added table 3/32, length now 48
1760 07:11:34.313739 ACPI: * TPM2
1761 07:11:34.316936 TPM2 log created at 99a2d000
1762 07:11:34.320167 ACPI: added table 4/32, length now 52
1763 07:11:34.320619 ACPI: * MADT
1764 07:11:34.323483 SCI is IRQ9
1765 07:11:34.327424 ACPI: added table 5/32, length now 56
1766 07:11:34.328022 current = 99b43ac0
1767 07:11:34.330571 ACPI: * DMAR
1768 07:11:34.333714 ACPI: added table 6/32, length now 60
1769 07:11:34.336637 ACPI: * IGD OpRegion
1770 07:11:34.340023 GMA: Found VBT in CBFS
1771 07:11:34.340608 GMA: Found valid VBT in CBFS
1772 07:11:34.346785 ACPI: added table 7/32, length now 64
1773 07:11:34.347236 ACPI: * HPET
1774 07:11:34.350393 ACPI: added table 8/32, length now 68
1775 07:11:34.353089 ACPI: done.
1776 07:11:34.353541 ACPI tables: 31744 bytes.
1777 07:11:34.356458 smbios_write_tables: 99a2c000
1778 07:11:34.363158 EC returned error result code 3
1779 07:11:34.366391 Couldn't obtain OEM name from CBI
1780 07:11:34.366842 Create SMBIOS type 17
1781 07:11:34.369969 PCI: 00:00.0 (Intel Cannonlake)
1782 07:11:34.373024 PCI: 00:14.3 (Intel WiFi)
1783 07:11:34.376319 SMBIOS tables: 939 bytes.
1784 07:11:34.379491 Writing table forward entry at 0x00000500
1785 07:11:34.385755 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1786 07:11:34.388922 Writing coreboot table at 0x99b62000
1787 07:11:34.395742 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1788 07:11:34.399142 1. 0000000000001000-000000000009ffff: RAM
1789 07:11:34.405152 2. 00000000000a0000-00000000000fffff: RESERVED
1790 07:11:34.408409 3. 0000000000100000-0000000099a2bfff: RAM
1791 07:11:34.415290 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1792 07:11:34.418907 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1793 07:11:34.425029 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1794 07:11:34.431720 7. 000000009a000000-000000009f7fffff: RESERVED
1795 07:11:34.434800 8. 00000000e0000000-00000000efffffff: RESERVED
1796 07:11:34.441403 9. 00000000fc000000-00000000fc000fff: RESERVED
1797 07:11:34.444445 10. 00000000fe000000-00000000fe00ffff: RESERVED
1798 07:11:34.451303 11. 00000000fed10000-00000000fed17fff: RESERVED
1799 07:11:34.454610 12. 00000000fed80000-00000000fed83fff: RESERVED
1800 07:11:34.457555 13. 00000000fed90000-00000000fed91fff: RESERVED
1801 07:11:34.463734 14. 00000000feda0000-00000000feda1fff: RESERVED
1802 07:11:34.467793 15. 0000000100000000-000000045e7fffff: RAM
1803 07:11:34.473922 Graphics framebuffer located at 0xc0000000
1804 07:11:34.474514 Passing 5 GPIOs to payload:
1805 07:11:34.480140 NAME | PORT | POLARITY | VALUE
1806 07:11:34.487480 write protect | undefined | high | low
1807 07:11:34.490542 lid | undefined | high | high
1808 07:11:34.496978 power | undefined | high | low
1809 07:11:34.503173 oprom | undefined | high | low
1810 07:11:34.506185 EC in RW | 0x000000cb | high | low
1811 07:11:34.509942 Board ID: 4
1812 07:11:34.513138 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1813 07:11:34.516201 CBFS @ c08000 size 3f8000
1814 07:11:34.522858 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1815 07:11:34.529727 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1816 07:11:34.530337 coreboot table: 1492 bytes.
1817 07:11:34.532208 IMD ROOT 0. 99fff000 00001000
1818 07:11:34.536173 IMD SMALL 1. 99ffe000 00001000
1819 07:11:34.539441 FSP MEMORY 2. 99c4e000 003b0000
1820 07:11:34.542153 CONSOLE 3. 99c2e000 00020000
1821 07:11:34.548630 FMAP 4. 99c2d000 0000054e
1822 07:11:34.552619 TIME STAMP 5. 99c2c000 00000910
1823 07:11:34.555777 VBOOT WORK 6. 99c18000 00014000
1824 07:11:34.559085 MRC DATA 7. 99c16000 00001958
1825 07:11:34.561817 ROMSTG STCK 8. 99c15000 00001000
1826 07:11:34.565844 AFTER CAR 9. 99c0b000 0000a000
1827 07:11:34.568733 RAMSTAGE 10. 99baf000 0005c000
1828 07:11:34.571972 REFCODE 11. 99b7a000 00035000
1829 07:11:34.575293 SMM BACKUP 12. 99b6a000 00010000
1830 07:11:34.578430 COREBOOT 13. 99b62000 00008000
1831 07:11:34.581888 ACPI 14. 99b3e000 00024000
1832 07:11:34.584968 ACPI GNVS 15. 99b3d000 00001000
1833 07:11:34.587997 RAMOOPS 16. 99a3d000 00100000
1834 07:11:34.591078 TPM2 TCGLOG17. 99a2d000 00010000
1835 07:11:34.594869 SMBIOS 18. 99a2c000 00000800
1836 07:11:34.595373 IMD small region:
1837 07:11:34.598140 IMD ROOT 0. 99ffec00 00000400
1838 07:11:34.601438 FSP RUNTIME 1. 99ffebe0 00000004
1839 07:11:34.607986 EC HOSTEVENT 2. 99ffebc0 00000008
1840 07:11:34.610871 POWER STATE 3. 99ffeb80 00000040
1841 07:11:34.614537 ROMSTAGE 4. 99ffeb60 00000004
1842 07:11:34.617286 MEM INFO 5. 99ffe9a0 000001b9
1843 07:11:34.620512 VPD 6. 99ffe920 0000006c
1844 07:11:34.624253 MTRR: Physical address space:
1845 07:11:34.630708 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1846 07:11:34.636982 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1847 07:11:34.643876 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1848 07:11:34.647163 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1849 07:11:34.653498 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1850 07:11:34.660119 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1851 07:11:34.666885 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1852 07:11:34.669912 MTRR: Fixed MSR 0x250 0x0606060606060606
1853 07:11:34.676490 MTRR: Fixed MSR 0x258 0x0606060606060606
1854 07:11:34.679803 MTRR: Fixed MSR 0x259 0x0000000000000000
1855 07:11:34.683014 MTRR: Fixed MSR 0x268 0x0606060606060606
1856 07:11:34.686344 MTRR: Fixed MSR 0x269 0x0606060606060606
1857 07:11:34.693292 MTRR: Fixed MSR 0x26a 0x0606060606060606
1858 07:11:34.696217 MTRR: Fixed MSR 0x26b 0x0606060606060606
1859 07:11:34.699707 MTRR: Fixed MSR 0x26c 0x0606060606060606
1860 07:11:34.702644 MTRR: Fixed MSR 0x26d 0x0606060606060606
1861 07:11:34.708863 MTRR: Fixed MSR 0x26e 0x0606060606060606
1862 07:11:34.712021 MTRR: Fixed MSR 0x26f 0x0606060606060606
1863 07:11:34.715583 call enable_fixed_mtrr()
1864 07:11:34.718837 CPU physical address size: 39 bits
1865 07:11:34.722282 MTRR: default type WB/UC MTRR counts: 6/8.
1866 07:11:34.725723 MTRR: WB selected as default type.
1867 07:11:34.731722 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1868 07:11:34.738689 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1869 07:11:34.745008 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1870 07:11:34.751313 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1871 07:11:34.758220 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1872 07:11:34.764738 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1873 07:11:34.767860 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 07:11:34.774191 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 07:11:34.777479 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 07:11:34.780484 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 07:11:34.783644 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 07:11:34.791133 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 07:11:34.794060 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 07:11:34.797234 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 07:11:34.803779 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 07:11:34.807087 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 07:11:34.810231 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 07:11:34.810734
1885 07:11:34.813430 MTRR check
1886 07:11:34.814039 call enable_fixed_mtrr()
1887 07:11:34.816548 Fixed MTRRs : Enabled
1888 07:11:34.819964 Variable MTRRs: Enabled
1889 07:11:34.820468
1890 07:11:34.823119 CPU physical address size: 39 bits
1891 07:11:34.829541 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1892 07:11:34.832618 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 07:11:34.836558 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 07:11:34.839797 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 07:11:34.845921 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 07:11:34.849086 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 07:11:34.852407 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 07:11:34.856298 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 07:11:34.862511 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 07:11:34.865613 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 07:11:34.868698 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 07:11:34.872582 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 07:11:34.878420 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 07:11:34.881995 call enable_fixed_mtrr()
1905 07:11:34.885230 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 07:11:34.888319 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 07:11:34.891939 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 07:11:34.899122 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 07:11:34.902020 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 07:11:34.904868 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 07:11:34.908101 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 07:11:34.914659 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 07:11:34.918035 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 07:11:34.921484 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 07:11:34.924126 CPU physical address size: 39 bits
1916 07:11:34.928012 call enable_fixed_mtrr()
1917 07:11:34.931205 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 07:11:34.938468 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 07:11:34.941769 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 07:11:34.944310 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 07:11:34.947649 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 07:11:34.954463 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 07:11:34.957604 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 07:11:34.960787 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 07:11:34.963877 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 07:11:34.970367 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 07:11:34.973944 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 07:11:34.977383 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 07:11:34.980271 call enable_fixed_mtrr()
1930 07:11:34.983447 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 07:11:34.987376 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 07:11:34.993761 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 07:11:34.997103 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 07:11:35.000356 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 07:11:35.003279 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 07:11:35.010034 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 07:11:35.012776 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 07:11:35.015937 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 07:11:35.019969 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 07:11:35.026264 CPU physical address size: 39 bits
1941 07:11:35.026868 call enable_fixed_mtrr()
1942 07:11:35.032948 CPU physical address size: 39 bits
1943 07:11:35.035831 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 07:11:35.039337 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 07:11:35.042363 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 07:11:35.049269 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 07:11:35.052426 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 07:11:35.055592 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 07:11:35.059412 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 07:11:35.065265 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 07:11:35.068896 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 07:11:35.071980 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 07:11:35.075305 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 07:11:35.081577 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 07:11:35.085268 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 07:11:35.088850 call enable_fixed_mtrr()
1957 07:11:35.091943 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 07:11:35.094983 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 07:11:35.098300 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 07:11:35.104844 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 07:11:35.107768 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 07:11:35.111124 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 07:11:35.114476 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 07:11:35.121039 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 07:11:35.124219 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 07:11:35.127483 CPU physical address size: 39 bits
1967 07:11:35.130812 call enable_fixed_mtrr()
1968 07:11:35.137858 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1969 07:11:35.140826 CPU physical address size: 39 bits
1970 07:11:35.141327 CBFS @ c08000 size 3f8000
1971 07:11:35.147151 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1972 07:11:35.150515 CBFS: Locating 'fallback/payload'
1973 07:11:35.153989 CPU physical address size: 39 bits
1974 07:11:35.156936 CBFS: Found @ offset 1c96c0 size 3f798
1975 07:11:35.163740 Checking segment from ROM address 0xffdd16f8
1976 07:11:35.166727 Checking segment from ROM address 0xffdd1714
1977 07:11:35.173050 Loading segment from ROM address 0xffdd16f8
1978 07:11:35.173560 code (compression=0)
1979 07:11:35.182887 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1980 07:11:35.189437 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1981 07:11:35.192607 it's not compressed!
1982 07:11:35.285159 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1983 07:11:35.291355 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1984 07:11:35.297606 Loading segment from ROM address 0xffdd1714
1985 07:11:35.297703 Entry Point 0x30000000
1986 07:11:35.300781 Loaded segments
1987 07:11:35.307027 Finalizing chipset.
1988 07:11:35.310237 Finalizing SMM.
1989 07:11:35.313459 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1990 07:11:35.316728 mp_park_aps done after 0 msecs.
1991 07:11:35.323481 Jumping to boot code at 30000000(99b62000)
1992 07:11:35.329568 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1993 07:11:35.329659
1994 07:11:35.329733
1995 07:11:35.329797
1996 07:11:35.332997 Starting depthcharge on Helios...
1997 07:11:35.333085
1998 07:11:35.333426 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1999 07:11:35.333529 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2000 07:11:35.333614 Setting prompt string to ['hatch:']
2001 07:11:35.333695 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2002 07:11:35.343141 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2003 07:11:35.343240
2004 07:11:35.349418 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2005 07:11:35.349510
2006 07:11:35.355765 board_setup: Info: eMMC controller not present; skipping
2007 07:11:35.355855
2008 07:11:35.359360 New NVMe Controller 0x30053ac0 @ 00:1d:00
2009 07:11:35.359450
2010 07:11:35.366101 board_setup: Info: SDHCI controller not present; skipping
2011 07:11:35.366192
2012 07:11:35.372400 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2013 07:11:35.372490
2014 07:11:35.372560 Wipe memory regions:
2015 07:11:35.372624
2016 07:11:35.378707 [0x00000000001000, 0x000000000a0000)
2017 07:11:35.378796
2018 07:11:35.382407 [0x00000000100000, 0x00000030000000)
2019 07:11:35.446087
2020 07:11:35.449332 [0x00000030657430, 0x00000099a2c000)
2021 07:11:35.586701
2022 07:11:35.589705 [0x00000100000000, 0x0000045e800000)
2023 07:11:36.973026
2024 07:11:36.973189 R8152: Initializing
2025 07:11:36.973276
2026 07:11:36.975939 Version 9 (ocp_data = 6010)
2027 07:11:36.980466
2028 07:11:36.980552 R8152: Done initializing
2029 07:11:36.980620
2030 07:11:36.983569 Adding net device
2031 07:11:37.465961
2032 07:11:37.466143 R8152: Initializing
2033 07:11:37.466215
2034 07:11:37.469659 Version 6 (ocp_data = 5c30)
2035 07:11:37.469745
2036 07:11:37.472866 R8152: Done initializing
2037 07:11:37.472999
2038 07:11:37.479763 net_add_device: Attemp to include the same device
2039 07:11:37.479884
2040 07:11:37.486161 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2041 07:11:37.486250
2042 07:11:37.486317
2043 07:11:37.486379
2044 07:11:37.486656 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 07:11:37.587396 hatch: tftpboot 192.168.201.1 9045529/tftp-deploy-r6mqpj8z/kernel/bzImage 9045529/tftp-deploy-r6mqpj8z/kernel/cmdline 9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
2047 07:11:37.587566 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2048 07:11:37.587653 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2049 07:11:37.591826 tftpboot 192.168.201.1 9045529/tftp-deploy-r6mqpj8z/kernel/bzImoy-r6mqpj8z/kernel/cmdline 9045529/tftp-deploy-r6mqpj8z/ramdisk/ramdisk.cpio.gz
2050 07:11:37.591924
2051 07:11:37.591992 Waiting for link
2052 07:11:37.792507
2053 07:11:37.792666 done.
2054 07:11:37.792735
2055 07:11:37.792843 MAC: 00:24:32:50:19:be
2056 07:11:37.792945
2057 07:11:37.795596 Sending DHCP discover... done.
2058 07:11:37.795683
2059 07:11:37.799722 Waiting for reply... done.
2060 07:11:37.799854
2061 07:11:37.802539 Sending DHCP request... done.
2062 07:11:37.802624
2063 07:11:37.805736 Waiting for reply... done.
2064 07:11:37.805823
2065 07:11:37.808814 My ip is 192.168.201.15
2066 07:11:37.808901
2067 07:11:37.812132 The DHCP server ip is 192.168.201.1
2068 07:11:37.812220
2069 07:11:37.815373 TFTP server IP predefined by user: 192.168.201.1
2070 07:11:37.815461
2071 07:11:37.822137 Bootfile predefined by user: 9045529/tftp-deploy-r6mqpj8z/kernel/bzImage
2072 07:11:37.825501
2073 07:11:37.828522 Sending tftp read request... done.
2074 07:11:37.828655
2075 07:11:37.828736 Waiting for the transfer...
2076 07:11:37.828799
2077 07:11:38.416637 00000000 ################################################################
2078 07:11:38.416797
2079 07:11:38.993508 00080000 ################################################################
2080 07:11:38.993668
2081 07:11:39.585329 00100000 ################################################################
2082 07:11:39.585481
2083 07:11:40.162080 00180000 ################################################################
2084 07:11:40.162239
2085 07:11:40.740691 00200000 ################################################################
2086 07:11:40.740849
2087 07:11:41.311138 00280000 ################################################################
2088 07:11:41.311284
2089 07:11:41.862200 00300000 ################################################################
2090 07:11:41.862391
2091 07:11:42.414024 00380000 ################################################################
2092 07:11:42.414173
2093 07:11:42.965017 00400000 ################################################################
2094 07:11:42.965184
2095 07:11:43.538174 00480000 ################################################################
2096 07:11:43.538340
2097 07:11:44.132776 00500000 ################################################################
2098 07:11:44.132933
2099 07:11:44.784010 00580000 ################################################################
2100 07:11:44.784477
2101 07:11:45.457138 00600000 ################################################################
2102 07:11:45.457702
2103 07:11:46.094837 00680000 ################################################################
2104 07:11:46.094995
2105 07:11:46.375437 00700000 ############################# done.
2106 07:11:46.375652
2107 07:11:46.378552 The bootfile was 7573392 bytes long.
2108 07:11:46.378684
2109 07:11:46.381828 Sending tftp read request... done.
2110 07:11:46.381955
2111 07:11:46.385790 Waiting for the transfer...
2112 07:11:46.385902
2113 07:11:47.003630 00000000 ################################################################
2114 07:11:47.003902
2115 07:11:47.588137 00080000 ################################################################
2116 07:11:47.588294
2117 07:11:48.145681 00100000 ################################################################
2118 07:11:48.145839
2119 07:11:48.713574 00180000 ################################################################
2120 07:11:48.713732
2121 07:11:49.263198 00200000 ################################################################
2122 07:11:49.263356
2123 07:11:49.828739 00280000 ################################################################
2124 07:11:49.828896
2125 07:11:50.382622 00300000 ################################################################
2126 07:11:50.382776
2127 07:11:50.943353 00380000 ################################################################
2128 07:11:50.943507
2129 07:11:51.489990 00400000 ################################################################
2130 07:11:51.490147
2131 07:11:52.023714 00480000 ################################################################
2132 07:11:52.023867
2133 07:11:52.282308 00500000 ################################ done.
2134 07:11:52.282462
2135 07:11:52.285426 Sending tftp read request... done.
2136 07:11:52.285516
2137 07:11:52.288612 Waiting for the transfer...
2138 07:11:52.288701
2139 07:11:52.288771 00000000 # done.
2140 07:11:52.288838
2141 07:11:52.298773 Command line loaded dynamically from TFTP file: 9045529/tftp-deploy-r6mqpj8z/kernel/cmdline
2142 07:11:52.298862
2143 07:11:52.324925 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9045529/extract-nfsrootfs-w_4bovj3,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2144 07:11:52.325021
2145 07:11:52.331228 ec_init(0): CrosEC protocol v3 supported (256, 256)
2146 07:11:52.335086
2147 07:11:52.337789 Shutting down all USB controllers.
2148 07:11:52.337877
2149 07:11:52.337947 Removing current net device
2150 07:11:52.341974
2151 07:11:52.342062 Finalizing coreboot
2152 07:11:52.342133
2153 07:11:52.348371 Exiting depthcharge with code 4 at timestamp: 24344849
2154 07:11:52.348474
2155 07:11:52.348544
2156 07:11:52.348609 Starting kernel ...
2157 07:11:52.348672
2158 07:11:52.348734
2159 07:11:52.349097 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2160 07:11:52.349206 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2161 07:11:52.349286 Setting prompt string to ['Linux version [0-9]']
2162 07:11:52.349362 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2163 07:11:52.349433 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2165 07:16:15.349507 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2167 07:16:15.349888 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2169 07:16:15.350127 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2172 07:16:15.350549 end: 2 depthcharge-action (duration 00:05:00) [common]
2174 07:16:15.350907 Cleaning after the job
2175 07:16:15.351033 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/ramdisk
2176 07:16:15.351784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/kernel
2177 07:16:15.352688 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/nfsrootfs
2178 07:16:15.413134 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045529/tftp-deploy-r6mqpj8z/modules
2179 07:16:15.413439 start: 4.1 power-off (timeout 00:00:30) [common]
2180 07:16:15.413604 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2181 07:16:17.576902 >> Command sent successfully.
2182 07:16:17.579085 Returned 0 in 2 seconds
2183 07:16:17.679878 end: 4.1 power-off (duration 00:00:02) [common]
2185 07:16:17.680270 start: 4.2 read-feedback (timeout 00:09:58) [common]
2186 07:16:17.680517 Listened to connection for namespace 'common' for up to 1s
2188 07:16:17.680927 Listened to connection for namespace 'common' for up to 1s
2189 07:16:17.681292 Listened to connection for namespace 'common' for up to 1s
2190 07:16:17.681620 Listened to connection for namespace 'common' for up to 1s
2191 07:16:17.681953 Listened to connection for namespace 'common' for up to 1s
2192 07:16:18.684024 Finalising connection for namespace 'common'
2193 07:16:18.684203 Disconnecting from shell: Finalise
2194 07:16:18.684290
2195 07:16:18.785229 end: 4.2 read-feedback (duration 00:00:01) [common]
2196 07:16:18.785387 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045529
2197 07:16:18.931764 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045529
2198 07:16:18.932007 JobError: Your job cannot terminate cleanly.