Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 07:15:18.713437 lava-dispatcher, installed at version: 2022.11
2 07:15:18.713610 start: 0 validate
3 07:15:18.713734 Start time: 2023-02-07 07:15:18.713727+00:00 (UTC)
4 07:15:18.713854 Using caching service: 'http://localhost/cache/?uri=%s'
5 07:15:18.713978 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Finitrd.cpio.gz exists
6 07:15:19.009878 Using caching service: 'http://localhost/cache/?uri=%s'
7 07:15:19.010638 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 07:15:19.309070 Using caching service: 'http://localhost/cache/?uri=%s'
9 07:15:19.309775 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230203.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 07:15:19.600348 Using caching service: 'http://localhost/cache/?uri=%s'
11 07:15:19.601141 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip72-rt42%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 07:15:19.903187 validate duration: 1.19
14 07:15:19.903473 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 07:15:19.903574 start: 1.1 download-retry (timeout 00:10:00) [common]
16 07:15:19.903662 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 07:15:19.903815 Not decompressing ramdisk as can be used compressed.
18 07:15:19.903951 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/initrd.cpio.gz
19 07:15:19.904023 saving as /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/ramdisk/initrd.cpio.gz
20 07:15:19.904085 total size: 5432118 (5MB)
21 07:15:19.907707 progress 0% (0MB)
22 07:15:19.909774 progress 5% (0MB)
23 07:15:19.912268 progress 10% (0MB)
24 07:15:19.914602 progress 15% (0MB)
25 07:15:19.916695 progress 20% (1MB)
26 07:15:19.919064 progress 25% (1MB)
27 07:15:19.921366 progress 30% (1MB)
28 07:15:19.923542 progress 35% (1MB)
29 07:15:19.925860 progress 40% (2MB)
30 07:15:19.928157 progress 45% (2MB)
31 07:15:19.930265 progress 50% (2MB)
32 07:15:19.932808 progress 55% (2MB)
33 07:15:19.935237 progress 60% (3MB)
34 07:15:19.937196 progress 65% (3MB)
35 07:15:19.939846 progress 70% (3MB)
36 07:15:19.942112 progress 75% (3MB)
37 07:15:19.944264 progress 80% (4MB)
38 07:15:19.946620 progress 85% (4MB)
39 07:15:19.949072 progress 90% (4MB)
40 07:15:19.951200 progress 95% (4MB)
41 07:15:19.953319 progress 100% (5MB)
42 07:15:19.953584 5MB downloaded in 0.05s (104.67MB/s)
43 07:15:19.953733 end: 1.1.1 http-download (duration 00:00:00) [common]
45 07:15:19.953983 end: 1.1 download-retry (duration 00:00:00) [common]
46 07:15:19.954072 start: 1.2 download-retry (timeout 00:10:00) [common]
47 07:15:19.954159 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 07:15:19.954261 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 07:15:19.954331 saving as /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/kernel/bzImage
50 07:15:19.954394 total size: 7573392 (7MB)
51 07:15:19.954457 No compression specified
52 07:15:19.956573 progress 0% (0MB)
53 07:15:19.959471 progress 5% (0MB)
54 07:15:19.962838 progress 10% (0MB)
55 07:15:19.965913 progress 15% (1MB)
56 07:15:19.969185 progress 20% (1MB)
57 07:15:19.972252 progress 25% (1MB)
58 07:15:19.975814 progress 30% (2MB)
59 07:15:19.978584 progress 35% (2MB)
60 07:15:19.982043 progress 40% (2MB)
61 07:15:19.985304 progress 45% (3MB)
62 07:15:19.988799 progress 50% (3MB)
63 07:15:19.991878 progress 55% (4MB)
64 07:15:19.995286 progress 60% (4MB)
65 07:15:19.998174 progress 65% (4MB)
66 07:15:20.001313 progress 70% (5MB)
67 07:15:20.004726 progress 75% (5MB)
68 07:15:20.007819 progress 80% (5MB)
69 07:15:20.011376 progress 85% (6MB)
70 07:15:20.014540 progress 90% (6MB)
71 07:15:20.017599 progress 95% (6MB)
72 07:15:20.020850 progress 100% (7MB)
73 07:15:20.021029 7MB downloaded in 0.07s (108.40MB/s)
74 07:15:20.021181 end: 1.2.1 http-download (duration 00:00:00) [common]
76 07:15:20.021418 end: 1.2 download-retry (duration 00:00:00) [common]
77 07:15:20.021507 start: 1.3 download-retry (timeout 00:10:00) [common]
78 07:15:20.021593 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 07:15:20.021701 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230203.0/amd64/full.rootfs.tar.xz
80 07:15:20.021768 saving as /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/nfsrootfs/full.rootfs.tar
81 07:15:20.021831 total size: 123901376 (118MB)
82 07:15:20.021893 Using unxz to decompress xz
83 07:15:20.026706 progress 0% (0MB)
84 07:15:20.469347 progress 5% (5MB)
85 07:15:20.920171 progress 10% (11MB)
86 07:15:21.370830 progress 15% (17MB)
87 07:15:21.832777 progress 20% (23MB)
88 07:15:22.159718 progress 25% (29MB)
89 07:15:22.491301 progress 30% (35MB)
90 07:15:22.753777 progress 35% (41MB)
91 07:15:22.918537 progress 40% (47MB)
92 07:15:23.275148 progress 45% (53MB)
93 07:15:23.629039 progress 50% (59MB)
94 07:15:23.960532 progress 55% (65MB)
95 07:15:24.306410 progress 60% (70MB)
96 07:15:24.632783 progress 65% (76MB)
97 07:15:25.002634 progress 70% (82MB)
98 07:15:25.418354 progress 75% (88MB)
99 07:15:25.836909 progress 80% (94MB)
100 07:15:25.962420 progress 85% (100MB)
101 07:15:26.118383 progress 90% (106MB)
102 07:15:26.443418 progress 95% (112MB)
103 07:15:26.806920 progress 100% (118MB)
104 07:15:26.811867 118MB downloaded in 6.79s (17.40MB/s)
105 07:15:26.812120 end: 1.3.1 http-download (duration 00:00:07) [common]
107 07:15:26.812388 end: 1.3 download-retry (duration 00:00:07) [common]
108 07:15:26.812482 start: 1.4 download-retry (timeout 00:09:53) [common]
109 07:15:26.812571 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 07:15:26.812689 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip72-rt42/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 07:15:26.812767 saving as /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/modules/modules.tar
112 07:15:26.812845 total size: 54868 (0MB)
113 07:15:26.812910 Using unxz to decompress xz
114 07:15:26.818734 progress 59% (0MB)
115 07:15:26.819109 progress 100% (0MB)
116 07:15:26.822578 0MB downloaded in 0.01s (5.38MB/s)
117 07:15:26.822796 end: 1.4.1 http-download (duration 00:00:00) [common]
119 07:15:26.823054 end: 1.4 download-retry (duration 00:00:00) [common]
120 07:15:26.823150 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 07:15:26.823246 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 07:15:28.488894 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9045488/extract-nfsrootfs-8g17ixz1
123 07:15:28.489090 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 07:15:28.489199 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 07:15:28.489339 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax
126 07:15:28.489443 makedir: /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin
127 07:15:28.489531 makedir: /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/tests
128 07:15:28.489618 makedir: /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/results
129 07:15:28.489719 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-add-keys
130 07:15:28.489849 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-add-sources
131 07:15:28.489966 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-background-process-start
132 07:15:28.490080 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-background-process-stop
133 07:15:28.490192 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-common-functions
134 07:15:28.490303 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-echo-ipv4
135 07:15:28.490419 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-install-packages
136 07:15:28.490531 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-installed-packages
137 07:15:28.490685 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-os-build
138 07:15:28.490810 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-probe-channel
139 07:15:28.490974 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-probe-ip
140 07:15:28.491085 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-target-ip
141 07:15:28.491217 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-target-mac
142 07:15:28.491369 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-target-storage
143 07:15:28.491483 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-case
144 07:15:28.491595 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-event
145 07:15:28.491760 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-feedback
146 07:15:28.491884 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-raise
147 07:15:28.491993 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-reference
148 07:15:28.492131 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-runner
149 07:15:28.492264 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-set
150 07:15:28.492691 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-test-shell
151 07:15:28.492809 Updating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-install-packages (oe)
152 07:15:28.492965 Updating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/bin/lava-installed-packages (oe)
153 07:15:28.493066 Creating /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/environment
154 07:15:28.493154 LAVA metadata
155 07:15:28.493221 - LAVA_JOB_ID=9045488
156 07:15:28.493296 - LAVA_DISPATCHER_IP=192.168.201.1
157 07:15:28.493460 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 07:15:28.493526 skipped lava-vland-overlay
159 07:15:28.493605 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 07:15:28.493690 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 07:15:28.493770 skipped lava-multinode-overlay
162 07:15:28.493859 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 07:15:28.493968 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 07:15:28.494085 Loading test definitions
165 07:15:28.494177 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
166 07:15:28.494250 Using /lava-9045488 at stage 0
167 07:15:28.494355 Fetching tests from https://github.com/kernelci/test-definitions
168 07:15:28.494467 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/0/tests/0_ltp-timers'
169 07:15:33.494330 Running '/usr/bin/git checkout kernelci.org
170 07:15:33.627681 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
171 07:15:33.628368 uuid=9045488_1.5.2.3.1 testdef=None
172 07:15:33.628536 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
174 07:15:33.628782 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 07:15:33.629439 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 07:15:33.629676 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 07:15:33.630460 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 07:15:33.630705 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 07:15:33.631462 runner path: /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/0/tests/0_ltp-timers test_uuid 9045488_1.5.2.3.1
182 07:15:33.631552 GRP_TEST='TMR'
183 07:15:33.631618 SKIPFILE='skipfile-lkft.yaml'
184 07:15:33.631679 SKIP_INSTALL='true'
185 07:15:33.631738 TST_CMDFILES=''
186 07:15:33.631868 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 07:15:33.632077 Creating lava-test-runner.conf files
189 07:15:33.632141 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9045488/lava-overlay-lfujsvax/lava-9045488/0 for stage 0
190 07:15:33.632224 - 0_ltp-timers
191 07:15:33.632343 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
192 07:15:33.632445 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
193 07:15:40.898250 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
194 07:15:40.898414 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
195 07:15:40.898510 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
196 07:15:40.898614 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
197 07:15:40.898707 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
198 07:15:41.000036 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
199 07:15:41.000435 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
200 07:15:41.000549 extracting modules file /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045488/extract-nfsrootfs-8g17ixz1
201 07:15:41.004652 extracting modules file /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9045488/extract-overlay-ramdisk-jcb1lp6p/ramdisk
202 07:15:41.008503 end: 1.5.4 extract-modules (duration 00:00:00) [common]
203 07:15:41.008613 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
204 07:15:41.008702 [common] Applying overlay to NFS
205 07:15:41.008775 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9045488/compress-overlay-ehe0d4tp/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9045488/extract-nfsrootfs-8g17ixz1
206 07:15:41.454540 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
207 07:15:41.454711 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
208 07:15:41.454810 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
209 07:15:41.454902 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
210 07:15:41.454987 Building ramdisk /var/lib/lava/dispatcher/tmp/9045488/extract-overlay-ramdisk-jcb1lp6p/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9045488/extract-overlay-ramdisk-jcb1lp6p/ramdisk
211 07:15:41.487568 >> 24584 blocks
212 07:15:41.978352 rename /var/lib/lava/dispatcher/tmp/9045488/extract-overlay-ramdisk-jcb1lp6p/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
213 07:15:41.978799 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
214 07:15:41.978943 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
215 07:15:41.979058 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
216 07:15:41.979149 No mkimage arch provided, not using FIT.
217 07:15:41.979238 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
218 07:15:41.979324 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
219 07:15:41.979425 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
220 07:15:41.979515 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
221 07:15:41.979594 No LXC device requested
222 07:15:41.979678 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
223 07:15:41.979770 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
224 07:15:41.979857 end: 1.7 deploy-device-env (duration 00:00:00) [common]
225 07:15:41.979933 Checking files for TFTP limit of 4294967296 bytes.
226 07:15:41.980330 end: 1 tftp-deploy (duration 00:00:22) [common]
227 07:15:41.980447 start: 2 depthcharge-action (timeout 00:05:00) [common]
228 07:15:41.980548 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
229 07:15:41.980678 substitutions:
230 07:15:41.980747 - {DTB}: None
231 07:15:41.980813 - {INITRD}: 9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
232 07:15:41.980874 - {KERNEL}: 9045488/tftp-deploy-iifa5uwl/kernel/bzImage
233 07:15:41.980934 - {LAVA_MAC}: None
234 07:15:41.980992 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9045488/extract-nfsrootfs-8g17ixz1
235 07:15:41.981051 - {NFS_SERVER_IP}: 192.168.201.1
236 07:15:41.981108 - {PRESEED_CONFIG}: None
237 07:15:41.981165 - {PRESEED_LOCAL}: None
238 07:15:41.981221 - {RAMDISK}: 9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
239 07:15:41.981277 - {ROOT_PART}: None
240 07:15:41.981332 - {ROOT}: None
241 07:15:41.981387 - {SERVER_IP}: 192.168.201.1
242 07:15:41.981442 - {TEE}: None
243 07:15:41.981497 Parsed boot commands:
244 07:15:41.981550 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
245 07:15:41.981704 Parsed boot commands: tftpboot 192.168.201.1 9045488/tftp-deploy-iifa5uwl/kernel/bzImage 9045488/tftp-deploy-iifa5uwl/kernel/cmdline 9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
246 07:15:41.981793 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
247 07:15:41.981880 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
248 07:15:41.981989 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
249 07:15:41.982115 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
250 07:15:41.982186 Not connected, no need to disconnect.
251 07:15:41.982264 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
252 07:15:41.982345 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
253 07:15:41.982412 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
254 07:15:41.985277 Setting prompt string to ['lava-test: # ']
255 07:15:41.985565 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
256 07:15:41.985674 end: 2.2.1 reset-connection (duration 00:00:00) [common]
257 07:15:41.985774 start: 2.2.2 reset-device (timeout 00:05:00) [common]
258 07:15:41.985866 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
259 07:15:41.986042 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
260 07:15:51.349952 >> Command sent successfully.
261 07:15:51.359122 Returned 0 in 9 seconds
262 07:15:51.460822 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
264 07:15:51.462243 end: 2.2.2 reset-device (duration 00:00:09) [common]
265 07:15:51.462756 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
266 07:15:51.463209 Setting prompt string to 'Starting depthcharge on Helios...'
267 07:15:51.463567 Changing prompt to 'Starting depthcharge on Helios...'
268 07:15:51.463929 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
269 07:15:51.465201 [Enter `^Ec?' for help]
270 07:15:51.465639
271 07:15:51.465990
272 07:15:51.466325 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
273 07:15:51.466673 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
274 07:15:51.466999 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
275 07:15:51.467312 CPU: AES supported, TXT NOT supported, VT supported
276 07:15:51.467624 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
277 07:15:51.467935 PCH: device id 0284 (rev 00) is Cometlake-U Premium
278 07:15:51.468243 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
279 07:15:51.468594 VBOOT: Loading verstage.
280 07:15:51.468910 FMAP: Found "FLASH" version 1.1 at 0xc04000.
281 07:15:51.469216 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
282 07:15:51.469522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
283 07:15:51.469823 CBFS @ c08000 size 3f8000
284 07:15:51.470120 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
285 07:15:51.470418 CBFS: Locating 'fallback/verstage'
286 07:15:51.470718 CBFS: Found @ offset 10fb80 size 1072c
287 07:15:51.471018
288 07:15:51.471312
289 07:15:51.471611 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
290 07:15:51.471912 Probing TPM: . done!
291 07:15:51.472209 TPM ready after 0 ms
292 07:15:51.472542 Connected to device vid:did:rid of 1ae0:0028:00
293 07:15:51.472846 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
294 07:15:51.473158 Initialized TPM device CR50 revision 0
295 07:15:51.473457 tlcl_send_startup: Startup return code is 0
296 07:15:51.473755 TPM: setup succeeded
297 07:15:51.474099 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
298 07:15:51.474422 Chrome EC: UHEPI supported
299 07:15:51.474722 Phase 1
300 07:15:51.475078 FMAP: area GBB found @ c05000 (12288 bytes)
301 07:15:51.475387 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
302 07:15:51.475688 Phase 2
303 07:15:51.475985 Phase 3
304 07:15:51.476350 FMAP: area GBB found @ c05000 (12288 bytes)
305 07:15:51.476705 VB2:vb2_report_dev_firmware() This is developer signed firmware
306 07:15:51.477072 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
307 07:15:51.477378 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
308 07:15:51.477683 VB2:vb2_verify_keyblock() Checking keyblock signature...
309 07:15:51.477984 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
310 07:15:51.478283 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
311 07:15:51.478582 VB2:vb2_verify_fw_preamble() Verifying preamble.
312 07:15:51.478881 Phase 4
313 07:15:51.479178 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
314 07:15:51.479478 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
315 07:15:51.479785 VB2:vb2_rsa_verify_digest() Digest check failed!
316 07:15:51.480087 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
317 07:15:51.480454 Saving nvdata
318 07:15:51.480762 Reboot requested (10020007)
319 07:15:51.481062 board_reset() called!
320 07:15:51.481359 full_reset() called!
321 07:15:55.003127
322 07:15:55.003289
323 07:15:55.013276 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
324 07:15:55.016442 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
325 07:15:55.023070 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
326 07:15:55.026448 CPU: AES supported, TXT NOT supported, VT supported
327 07:15:55.033205 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
328 07:15:55.036689 PCH: device id 0284 (rev 00) is Cometlake-U Premium
329 07:15:55.042815 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
330 07:15:55.046474 VBOOT: Loading verstage.
331 07:15:55.049633 FMAP: Found "FLASH" version 1.1 at 0xc04000.
332 07:15:55.056327 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
333 07:15:55.062851 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
334 07:15:55.062940 CBFS @ c08000 size 3f8000
335 07:15:55.069251 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
336 07:15:55.072840 CBFS: Locating 'fallback/verstage'
337 07:15:55.075952 CBFS: Found @ offset 10fb80 size 1072c
338 07:15:55.080134
339 07:15:55.080221
340 07:15:55.089983 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
341 07:15:55.104660 Probing TPM: . done!
342 07:15:55.107861 TPM ready after 0 ms
343 07:15:55.111436 Connected to device vid:did:rid of 1ae0:0028:00
344 07:15:55.122020 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
345 07:15:55.125172 Initialized TPM device CR50 revision 0
346 07:15:55.167444 tlcl_send_startup: Startup return code is 0
347 07:15:55.168040 TPM: setup succeeded
348 07:15:55.180012 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
349 07:15:55.184200 Chrome EC: UHEPI supported
350 07:15:55.187360 Phase 1
351 07:15:55.190468 FMAP: area GBB found @ c05000 (12288 bytes)
352 07:15:55.197785 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
353 07:15:55.204416 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
354 07:15:55.207308 Recovery requested (1009000e)
355 07:15:55.207816 Saving nvdata
356 07:15:55.219184 tlcl_extend: response is 0
357 07:15:55.228682 tlcl_extend: response is 0
358 07:15:55.234914 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
359 07:15:55.238259 CBFS @ c08000 size 3f8000
360 07:15:55.244760 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
361 07:15:55.248191 CBFS: Locating 'fallback/romstage'
362 07:15:55.251898 CBFS: Found @ offset 80 size 145fc
363 07:15:55.255165 Accumulated console time in verstage 98 ms
364 07:15:55.255764
365 07:15:55.256168
366 07:15:55.267995 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
367 07:15:55.274573 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
368 07:15:55.278200 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
369 07:15:55.281124 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
370 07:15:55.288176 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
371 07:15:55.291138 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
372 07:15:55.294606 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
373 07:15:55.298109 TCO_STS: 0000 0000
374 07:15:55.301644 GEN_PMCON: e0015238 00000200
375 07:15:55.304560 GBLRST_CAUSE: 00000000 00000000
376 07:15:55.305064 prev_sleep_state 5
377 07:15:55.307956 Boot Count incremented to 53918
378 07:15:55.314500 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
379 07:15:55.318224 CBFS @ c08000 size 3f8000
380 07:15:55.324378 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
381 07:15:55.324884 CBFS: Locating 'fspm.bin'
382 07:15:55.327594 CBFS: Found @ offset 5ffc0 size 71000
383 07:15:55.331813 Chrome EC: UHEPI supported
384 07:15:55.339409 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
385 07:15:55.344597 Probing TPM: done!
386 07:15:55.351306 Connected to device vid:did:rid of 1ae0:0028:00
387 07:15:55.361657 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
388 07:15:55.367096 Initialized TPM device CR50 revision 0
389 07:15:55.376138 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 07:15:55.382945 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
391 07:15:55.386167 MRC cache found, size 1948
392 07:15:55.389590 bootmode is set to: 2
393 07:15:55.392849 PRMRR disabled by config.
394 07:15:55.393345 SPD INDEX = 1
395 07:15:55.399971 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 07:15:55.402924 CBFS @ c08000 size 3f8000
397 07:15:55.409319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 07:15:55.409795 CBFS: Locating 'spd.bin'
399 07:15:55.412504 CBFS: Found @ offset 5fb80 size 400
400 07:15:55.416184 SPD: module type is LPDDR3
401 07:15:55.419510 SPD: module part is
402 07:15:55.425627 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
403 07:15:55.429085 SPD: device width 4 bits, bus width 8 bits
404 07:15:55.432782 SPD: module size is 4096 MB (per channel)
405 07:15:55.435652 memory slot: 0 configuration done.
406 07:15:55.438725 memory slot: 2 configuration done.
407 07:15:55.489957 CBMEM:
408 07:15:55.493458 IMD: root @ 99fff000 254 entries.
409 07:15:55.497244 IMD: root @ 99ffec00 62 entries.
410 07:15:55.500032 External stage cache:
411 07:15:55.503449 IMD: root @ 9abff000 254 entries.
412 07:15:55.507224 IMD: root @ 9abfec00 62 entries.
413 07:15:55.513407 Chrome EC: clear events_b mask to 0x0000000020004000
414 07:15:55.526173 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
415 07:15:55.539542 tlcl_write: response is 0
416 07:15:55.548534 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 07:15:55.555722 MRC: TPM MRC hash updated successfully.
418 07:15:55.556353 2 DIMMs found
419 07:15:55.558618 SMM Memory Map
420 07:15:55.561691 SMRAM : 0x9a000000 0x1000000
421 07:15:55.565629 Subregion 0: 0x9a000000 0xa00000
422 07:15:55.568638 Subregion 1: 0x9aa00000 0x200000
423 07:15:55.571999 Subregion 2: 0x9ac00000 0x400000
424 07:15:55.572530 top_of_ram = 0x9a000000
425 07:15:55.578711 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
426 07:15:55.585573 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
427 07:15:55.588541 MTRR Range: Start=ff000000 End=0 (Size 1000000)
428 07:15:55.594824 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 07:15:55.598745 CBFS @ c08000 size 3f8000
430 07:15:55.602184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
431 07:15:55.605303 CBFS: Locating 'fallback/postcar'
432 07:15:55.608474 CBFS: Found @ offset 107000 size 4b44
433 07:15:55.615264 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
434 07:15:55.627405 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
435 07:15:55.631067 Processing 180 relocs. Offset value of 0x97c0c000
436 07:15:55.639245 Accumulated console time in romstage 286 ms
437 07:15:55.639868
438 07:15:55.640277
439 07:15:55.649145 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
440 07:15:55.655857 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 07:15:55.659342 CBFS @ c08000 size 3f8000
442 07:15:55.665589 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 07:15:55.668688 CBFS: Locating 'fallback/ramstage'
444 07:15:55.672152 CBFS: Found @ offset 43380 size 1b9e8
445 07:15:55.678921 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
446 07:15:55.711111 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
447 07:15:55.714739 Processing 3976 relocs. Offset value of 0x98db0000
448 07:15:55.720772 Accumulated console time in postcar 52 ms
449 07:15:55.721280
450 07:15:55.721679
451 07:15:55.730894 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
452 07:15:55.738035 FMAP: area RO_VPD found @ c00000 (16384 bytes)
453 07:15:55.741229 WARNING: RO_VPD is uninitialized or empty.
454 07:15:55.744208 FMAP: area RW_VPD found @ af8000 (8192 bytes)
455 07:15:55.751065 FMAP: area RW_VPD found @ af8000 (8192 bytes)
456 07:15:55.751678 Normal boot.
457 07:15:55.757548 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
458 07:15:55.760957 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
459 07:15:55.764350 CBFS @ c08000 size 3f8000
460 07:15:55.770684 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
461 07:15:55.774065 CBFS: Locating 'cpu_microcode_blob.bin'
462 07:15:55.777513 CBFS: Found @ offset 14700 size 2ec00
463 07:15:55.780988 microcode: sig=0x806ec pf=0x4 revision=0xc9
464 07:15:55.783730 Skip microcode update
465 07:15:55.790522 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
466 07:15:55.791142 CBFS @ c08000 size 3f8000
467 07:15:55.797047 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
468 07:15:55.800886 CBFS: Locating 'fsps.bin'
469 07:15:55.803959 CBFS: Found @ offset d1fc0 size 35000
470 07:15:55.829010 Detected 4 core, 8 thread CPU.
471 07:15:55.833356 Setting up SMI for CPU
472 07:15:55.835797 IED base = 0x9ac00000
473 07:15:55.836352 IED size = 0x00400000
474 07:15:55.839138 Will perform SMM setup.
475 07:15:55.845205 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
476 07:15:55.852699 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
477 07:15:55.855448 Processing 16 relocs. Offset value of 0x00030000
478 07:15:55.859372 Attempting to start 7 APs
479 07:15:55.862706 Waiting for 10ms after sending INIT.
480 07:15:55.878799 Waiting for 1st SIPI to complete...done.
481 07:15:55.879430 AP: slot 7 apic_id 5.
482 07:15:55.882332 AP: slot 6 apic_id 4.
483 07:15:55.885482 AP: slot 3 apic_id 2.
484 07:15:55.886046 AP: slot 5 apic_id 3.
485 07:15:55.891938 Waiting for 2nd SIPI to complete...done.
486 07:15:55.892483 AP: slot 1 apic_id 1.
487 07:15:55.895687 AP: slot 4 apic_id 6.
488 07:15:55.898457 AP: slot 2 apic_id 7.
489 07:15:55.905133 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
490 07:15:55.911852 Processing 13 relocs. Offset value of 0x00038000
491 07:15:55.918711 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
492 07:15:55.921562 Installing SMM handler to 0x9a000000
493 07:15:55.928898 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
494 07:15:55.932077 Processing 658 relocs. Offset value of 0x9a010000
495 07:15:55.942132 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
496 07:15:55.945073 Processing 13 relocs. Offset value of 0x9a008000
497 07:15:55.952405 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
498 07:15:55.958636 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
499 07:15:55.964941 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
500 07:15:55.968881 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
501 07:15:55.974981 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
502 07:15:55.981978 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
503 07:15:55.985549 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
504 07:15:55.991488 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
505 07:15:55.994864 Clearing SMI status registers
506 07:15:55.998072 SMI_STS: PM1
507 07:15:55.998589 PM1_STS: PWRBTN
508 07:15:56.001460 TCO_STS: SECOND_TO
509 07:15:56.004741 New SMBASE 0x9a000000
510 07:15:56.008370 In relocation handler: CPU 0
511 07:15:56.011679 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
512 07:15:56.015112 Writing SMRR. base = 0x9a000006, mask=0xff000800
513 07:15:56.017848 Relocation complete.
514 07:15:56.021522 New SMBASE 0x99fffc00
515 07:15:56.024666 In relocation handler: CPU 1
516 07:15:56.027950 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
517 07:15:56.031217 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 07:15:56.035018 Relocation complete.
519 07:15:56.038004 New SMBASE 0x99fff800
520 07:15:56.038545 In relocation handler: CPU 2
521 07:15:56.044961 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 07:15:56.048283 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 07:15:56.051457 Relocation complete.
524 07:15:56.054657 New SMBASE 0x99fff000
525 07:15:56.055276 In relocation handler: CPU 4
526 07:15:56.061331 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
527 07:15:56.064589 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 07:15:56.067674 Relocation complete.
529 07:15:56.068192 New SMBASE 0x99ffec00
530 07:15:56.071279 In relocation handler: CPU 5
531 07:15:56.077847 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
532 07:15:56.080971 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 07:15:56.084615 Relocation complete.
534 07:15:56.085232 New SMBASE 0x99fff400
535 07:15:56.087716 In relocation handler: CPU 3
536 07:15:56.094532 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
537 07:15:56.097394 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 07:15:56.101214 Relocation complete.
539 07:15:56.101725 New SMBASE 0x99ffe400
540 07:15:56.103959 In relocation handler: CPU 7
541 07:15:56.107398 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
542 07:15:56.114298 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 07:15:56.117147 Relocation complete.
544 07:15:56.117663 New SMBASE 0x99ffe800
545 07:15:56.120618 In relocation handler: CPU 6
546 07:15:56.124211 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 07:15:56.130593 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 07:15:56.134972 Relocation complete.
549 07:15:56.135600 Initializing CPU #0
550 07:15:56.137310 CPU: vendor Intel device 806ec
551 07:15:56.140873 CPU: family 06, model 8e, stepping 0c
552 07:15:56.143910 Clearing out pending MCEs
553 07:15:56.147125 Setting up local APIC...
554 07:15:56.150878 apic_id: 0x00 done.
555 07:15:56.151499 Turbo is available but hidden
556 07:15:56.154462 Turbo is available and visible
557 07:15:56.157617 VMX status: enabled
558 07:15:56.160154 IA32_FEATURE_CONTROL status: locked
559 07:15:56.163874 Skip microcode update
560 07:15:56.164414 CPU #0 initialized
561 07:15:56.167047 Initializing CPU #1
562 07:15:56.170358 Initializing CPU #4
563 07:15:56.170853 Initializing CPU #2
564 07:15:56.173495 CPU: vendor Intel device 806ec
565 07:15:56.176885 CPU: family 06, model 8e, stepping 0c
566 07:15:56.179987 CPU: vendor Intel device 806ec
567 07:15:56.183558 CPU: family 06, model 8e, stepping 0c
568 07:15:56.186712 Clearing out pending MCEs
569 07:15:56.190512 Clearing out pending MCEs
570 07:15:56.193820 Setting up local APIC...
571 07:15:56.196706 CPU: vendor Intel device 806ec
572 07:15:56.200376 CPU: family 06, model 8e, stepping 0c
573 07:15:56.203464 Clearing out pending MCEs
574 07:15:56.203964 Initializing CPU #7
575 07:15:56.206828 Initializing CPU #6
576 07:15:56.210026 Setting up local APIC...
577 07:15:56.210528 apic_id: 0x06 done.
578 07:15:56.213398 Setting up local APIC...
579 07:15:56.216886 apic_id: 0x01 done.
580 07:15:56.217469 Initializing CPU #3
581 07:15:56.219738 Initializing CPU #5
582 07:15:56.223339 CPU: vendor Intel device 806ec
583 07:15:56.226820 CPU: family 06, model 8e, stepping 0c
584 07:15:56.230309 CPU: vendor Intel device 806ec
585 07:15:56.233355 CPU: family 06, model 8e, stepping 0c
586 07:15:56.236651 Clearing out pending MCEs
587 07:15:56.240395 Clearing out pending MCEs
588 07:15:56.240903 Setting up local APIC...
589 07:15:56.243350 VMX status: enabled
590 07:15:56.246698 apic_id: 0x07 done.
591 07:15:56.247208 VMX status: enabled
592 07:15:56.250058 VMX status: enabled
593 07:15:56.253028 IA32_FEATURE_CONTROL status: locked
594 07:15:56.256606 IA32_FEATURE_CONTROL status: locked
595 07:15:56.259689 Skip microcode update
596 07:15:56.263059 Skip microcode update
597 07:15:56.263560 CPU #4 initialized
598 07:15:56.266312 CPU #2 initialized
599 07:15:56.266870 apic_id: 0x02 done.
600 07:15:56.269516 Setting up local APIC...
601 07:15:56.272676 CPU: vendor Intel device 806ec
602 07:15:56.276087 CPU: family 06, model 8e, stepping 0c
603 07:15:56.279706 CPU: vendor Intel device 806ec
604 07:15:56.282784 CPU: family 06, model 8e, stepping 0c
605 07:15:56.285977 Clearing out pending MCEs
606 07:15:56.289553 Clearing out pending MCEs
607 07:15:56.292498 IA32_FEATURE_CONTROL status: locked
608 07:15:56.296087 VMX status: enabled
609 07:15:56.296581 apic_id: 0x03 done.
610 07:15:56.299420 IA32_FEATURE_CONTROL status: locked
611 07:15:56.303257 VMX status: enabled
612 07:15:56.306206 Skip microcode update
613 07:15:56.309449 IA32_FEATURE_CONTROL status: locked
614 07:15:56.309915 CPU #3 initialized
615 07:15:56.312879 Skip microcode update
616 07:15:56.316110 Setting up local APIC...
617 07:15:56.316605 Skip microcode update
618 07:15:56.319744 Setting up local APIC...
619 07:15:56.322744 CPU #5 initialized
620 07:15:56.323207 CPU #1 initialized
621 07:15:56.326089 apic_id: 0x04 done.
622 07:15:56.329633 apic_id: 0x05 done.
623 07:15:56.330079 VMX status: enabled
624 07:15:56.332643 VMX status: enabled
625 07:15:56.335788 IA32_FEATURE_CONTROL status: locked
626 07:15:56.339454 IA32_FEATURE_CONTROL status: locked
627 07:15:56.342692 Skip microcode update
628 07:15:56.343150 Skip microcode update
629 07:15:56.345878 CPU #6 initialized
630 07:15:56.349458 CPU #7 initialized
631 07:15:56.353239 bsp_do_flight_plan done after 459 msecs.
632 07:15:56.356517 CPU: frequency set to 4200 MHz
633 07:15:56.357075 Enabling SMIs.
634 07:15:56.359568 Locking SMM.
635 07:15:56.373421 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
636 07:15:56.376270 CBFS @ c08000 size 3f8000
637 07:15:56.382765 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
638 07:15:56.383365 CBFS: Locating 'vbt.bin'
639 07:15:56.386502 CBFS: Found @ offset 5f5c0 size 499
640 07:15:56.393144 Found a VBT of 4608 bytes after decompression
641 07:15:56.572356 Display FSP Version Info HOB
642 07:15:56.575782 Reference Code - CPU = 9.0.1e.30
643 07:15:56.579114 uCode Version = 0.0.0.ca
644 07:15:56.581954 TXT ACM version = ff.ff.ff.ffff
645 07:15:56.585148 Display FSP Version Info HOB
646 07:15:56.588863 Reference Code - ME = 9.0.1e.30
647 07:15:56.592466 MEBx version = 0.0.0.0
648 07:15:56.595455 ME Firmware Version = Consumer SKU
649 07:15:56.598472 Display FSP Version Info HOB
650 07:15:56.602193 Reference Code - CML PCH = 9.0.1e.30
651 07:15:56.605425 PCH-CRID Status = Disabled
652 07:15:56.609125 PCH-CRID Original Value = ff.ff.ff.ffff
653 07:15:56.611823 PCH-CRID New Value = ff.ff.ff.ffff
654 07:15:56.615738 OPROM - RST - RAID = ff.ff.ff.ffff
655 07:15:56.618518 ChipsetInit Base Version = ff.ff.ff.ffff
656 07:15:56.621747 ChipsetInit Oem Version = ff.ff.ff.ffff
657 07:15:56.625693 Display FSP Version Info HOB
658 07:15:56.631588 Reference Code - SA - System Agent = 9.0.1e.30
659 07:15:56.635216 Reference Code - MRC = 0.7.1.6c
660 07:15:56.635858 SA - PCIe Version = 9.0.1e.30
661 07:15:56.638461 SA-CRID Status = Disabled
662 07:15:56.641717 SA-CRID Original Value = 0.0.0.c
663 07:15:56.644821 SA-CRID New Value = 0.0.0.c
664 07:15:56.648474 OPROM - VBIOS = ff.ff.ff.ffff
665 07:15:56.651647 RTC Init
666 07:15:56.655033 Set power on after power failure.
667 07:15:56.655527 Disabling Deep S3
668 07:15:56.658213 Disabling Deep S3
669 07:15:56.658815 Disabling Deep S4
670 07:15:56.661867 Disabling Deep S4
671 07:15:56.664694 Disabling Deep S5
672 07:15:56.665188 Disabling Deep S5
673 07:15:56.671445 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
674 07:15:56.671979 Enumerating buses...
675 07:15:56.678570 Show all devs... Before device enumeration.
676 07:15:56.679182 Root Device: enabled 1
677 07:15:56.681355 CPU_CLUSTER: 0: enabled 1
678 07:15:56.684451 DOMAIN: 0000: enabled 1
679 07:15:56.687954 APIC: 00: enabled 1
680 07:15:56.688441 PCI: 00:00.0: enabled 1
681 07:15:56.691491 PCI: 00:02.0: enabled 1
682 07:15:56.694509 PCI: 00:04.0: enabled 0
683 07:15:56.697832 PCI: 00:05.0: enabled 0
684 07:15:56.698333 PCI: 00:12.0: enabled 1
685 07:15:56.701815 PCI: 00:12.5: enabled 0
686 07:15:56.704536 PCI: 00:12.6: enabled 0
687 07:15:56.708031 PCI: 00:14.0: enabled 1
688 07:15:56.708681 PCI: 00:14.1: enabled 0
689 07:15:56.711074 PCI: 00:14.3: enabled 1
690 07:15:56.714474 PCI: 00:14.5: enabled 0
691 07:15:56.715080 PCI: 00:15.0: enabled 1
692 07:15:56.717775 PCI: 00:15.1: enabled 1
693 07:15:56.721653 PCI: 00:15.2: enabled 0
694 07:15:56.724399 PCI: 00:15.3: enabled 0
695 07:15:56.724900 PCI: 00:16.0: enabled 1
696 07:15:56.728125 PCI: 00:16.1: enabled 0
697 07:15:56.731532 PCI: 00:16.2: enabled 0
698 07:15:56.734905 PCI: 00:16.3: enabled 0
699 07:15:56.735513 PCI: 00:16.4: enabled 0
700 07:15:56.737732 PCI: 00:16.5: enabled 0
701 07:15:56.740919 PCI: 00:17.0: enabled 1
702 07:15:56.744731 PCI: 00:19.0: enabled 1
703 07:15:56.745334 PCI: 00:19.1: enabled 0
704 07:15:56.747597 PCI: 00:19.2: enabled 0
705 07:15:56.750690 PCI: 00:1a.0: enabled 0
706 07:15:56.751186 PCI: 00:1c.0: enabled 0
707 07:15:56.754135 PCI: 00:1c.1: enabled 0
708 07:15:56.757417 PCI: 00:1c.2: enabled 0
709 07:15:56.761385 PCI: 00:1c.3: enabled 0
710 07:15:56.761989 PCI: 00:1c.4: enabled 0
711 07:15:56.764055 PCI: 00:1c.5: enabled 0
712 07:15:56.767779 PCI: 00:1c.6: enabled 0
713 07:15:56.771071 PCI: 00:1c.7: enabled 0
714 07:15:56.771570 PCI: 00:1d.0: enabled 1
715 07:15:56.774278 PCI: 00:1d.1: enabled 0
716 07:15:56.777316 PCI: 00:1d.2: enabled 0
717 07:15:56.780757 PCI: 00:1d.3: enabled 0
718 07:15:56.781366 PCI: 00:1d.4: enabled 0
719 07:15:56.784238 PCI: 00:1d.5: enabled 1
720 07:15:56.787328 PCI: 00:1e.0: enabled 1
721 07:15:56.791029 PCI: 00:1e.1: enabled 0
722 07:15:56.791636 PCI: 00:1e.2: enabled 1
723 07:15:56.793980 PCI: 00:1e.3: enabled 1
724 07:15:56.797229 PCI: 00:1f.0: enabled 1
725 07:15:56.797837 PCI: 00:1f.1: enabled 1
726 07:15:56.800510 PCI: 00:1f.2: enabled 1
727 07:15:56.804218 PCI: 00:1f.3: enabled 1
728 07:15:56.806975 PCI: 00:1f.4: enabled 1
729 07:15:56.807474 PCI: 00:1f.5: enabled 1
730 07:15:56.810402 PCI: 00:1f.6: enabled 0
731 07:15:56.814197 USB0 port 0: enabled 1
732 07:15:56.814943 I2C: 00:15: enabled 1
733 07:15:56.817455 I2C: 00:5d: enabled 1
734 07:15:56.821509 GENERIC: 0.0: enabled 1
735 07:15:56.824071 I2C: 00:1a: enabled 1
736 07:15:56.824708 I2C: 00:38: enabled 1
737 07:15:56.827394 I2C: 00:39: enabled 1
738 07:15:56.830532 I2C: 00:3a: enabled 1
739 07:15:56.831032 I2C: 00:3b: enabled 1
740 07:15:56.833817 PCI: 00:00.0: enabled 1
741 07:15:56.837029 SPI: 00: enabled 1
742 07:15:56.837526 SPI: 01: enabled 1
743 07:15:56.840837 PNP: 0c09.0: enabled 1
744 07:15:56.844098 USB2 port 0: enabled 1
745 07:15:56.844740 USB2 port 1: enabled 1
746 07:15:56.847066 USB2 port 2: enabled 0
747 07:15:56.850795 USB2 port 3: enabled 0
748 07:15:56.851290 USB2 port 5: enabled 0
749 07:15:56.854162 USB2 port 6: enabled 1
750 07:15:56.857059 USB2 port 9: enabled 1
751 07:15:56.860676 USB3 port 0: enabled 1
752 07:15:56.861449 USB3 port 1: enabled 1
753 07:15:56.863904 USB3 port 2: enabled 1
754 07:15:56.866960 USB3 port 3: enabled 1
755 07:15:56.867462 USB3 port 4: enabled 0
756 07:15:56.870265 APIC: 01: enabled 1
757 07:15:56.873666 APIC: 07: enabled 1
758 07:15:56.874171 APIC: 02: enabled 1
759 07:15:56.876869 APIC: 06: enabled 1
760 07:15:56.877369 APIC: 03: enabled 1
761 07:15:56.881038 APIC: 04: enabled 1
762 07:15:56.884044 APIC: 05: enabled 1
763 07:15:56.884734 Compare with tree...
764 07:15:56.887368 Root Device: enabled 1
765 07:15:56.890495 CPU_CLUSTER: 0: enabled 1
766 07:15:56.891100 APIC: 00: enabled 1
767 07:15:56.893428 APIC: 01: enabled 1
768 07:15:56.897367 APIC: 07: enabled 1
769 07:15:56.897981 APIC: 02: enabled 1
770 07:15:56.900127 APIC: 06: enabled 1
771 07:15:56.903736 APIC: 03: enabled 1
772 07:15:56.906862 APIC: 04: enabled 1
773 07:15:56.907467 APIC: 05: enabled 1
774 07:15:56.910199 DOMAIN: 0000: enabled 1
775 07:15:56.913153 PCI: 00:00.0: enabled 1
776 07:15:56.916952 PCI: 00:02.0: enabled 1
777 07:15:56.917555 PCI: 00:04.0: enabled 0
778 07:15:56.920179 PCI: 00:05.0: enabled 0
779 07:15:56.923310 PCI: 00:12.0: enabled 1
780 07:15:56.926990 PCI: 00:12.5: enabled 0
781 07:15:56.930316 PCI: 00:12.6: enabled 0
782 07:15:56.930867 PCI: 00:14.0: enabled 1
783 07:15:56.933335 USB0 port 0: enabled 1
784 07:15:56.937119 USB2 port 0: enabled 1
785 07:15:56.939795 USB2 port 1: enabled 1
786 07:15:56.943150 USB2 port 2: enabled 0
787 07:15:56.943610 USB2 port 3: enabled 0
788 07:15:56.946361 USB2 port 5: enabled 0
789 07:15:56.950282 USB2 port 6: enabled 1
790 07:15:56.953115 USB2 port 9: enabled 1
791 07:15:56.956542 USB3 port 0: enabled 1
792 07:15:56.959896 USB3 port 1: enabled 1
793 07:15:56.960428 USB3 port 2: enabled 1
794 07:15:56.963083 USB3 port 3: enabled 1
795 07:15:56.966867 USB3 port 4: enabled 0
796 07:15:56.969872 PCI: 00:14.1: enabled 0
797 07:15:56.973154 PCI: 00:14.3: enabled 1
798 07:15:56.973650 PCI: 00:14.5: enabled 0
799 07:15:56.976254 PCI: 00:15.0: enabled 1
800 07:15:56.979846 I2C: 00:15: enabled 1
801 07:15:56.983422 PCI: 00:15.1: enabled 1
802 07:15:56.984017 I2C: 00:5d: enabled 1
803 07:15:56.986792 GENERIC: 0.0: enabled 1
804 07:15:56.989606 PCI: 00:15.2: enabled 0
805 07:15:56.992972 PCI: 00:15.3: enabled 0
806 07:15:56.996532 PCI: 00:16.0: enabled 1
807 07:15:56.997130 PCI: 00:16.1: enabled 0
808 07:15:57.000016 PCI: 00:16.2: enabled 0
809 07:15:57.003042 PCI: 00:16.3: enabled 0
810 07:15:57.006143 PCI: 00:16.4: enabled 0
811 07:15:57.009407 PCI: 00:16.5: enabled 0
812 07:15:57.009902 PCI: 00:17.0: enabled 1
813 07:15:57.013206 PCI: 00:19.0: enabled 1
814 07:15:57.016293 I2C: 00:1a: enabled 1
815 07:15:57.019590 I2C: 00:38: enabled 1
816 07:15:57.020102 I2C: 00:39: enabled 1
817 07:15:57.023116 I2C: 00:3a: enabled 1
818 07:15:57.026550 I2C: 00:3b: enabled 1
819 07:15:57.029834 PCI: 00:19.1: enabled 0
820 07:15:57.032787 PCI: 00:19.2: enabled 0
821 07:15:57.033304 PCI: 00:1a.0: enabled 0
822 07:15:57.036511 PCI: 00:1c.0: enabled 0
823 07:15:57.039542 PCI: 00:1c.1: enabled 0
824 07:15:57.042789 PCI: 00:1c.2: enabled 0
825 07:15:57.046096 PCI: 00:1c.3: enabled 0
826 07:15:57.046616 PCI: 00:1c.4: enabled 0
827 07:15:57.049858 PCI: 00:1c.5: enabled 0
828 07:15:57.052689 PCI: 00:1c.6: enabled 0
829 07:15:57.056693 PCI: 00:1c.7: enabled 0
830 07:15:57.057304 PCI: 00:1d.0: enabled 1
831 07:15:57.059431 PCI: 00:1d.1: enabled 0
832 07:15:57.062674 PCI: 00:1d.2: enabled 0
833 07:15:57.066437 PCI: 00:1d.3: enabled 0
834 07:15:57.069514 PCI: 00:1d.4: enabled 0
835 07:15:57.070124 PCI: 00:1d.5: enabled 1
836 07:15:57.073043 PCI: 00:00.0: enabled 1
837 07:15:57.076170 PCI: 00:1e.0: enabled 1
838 07:15:57.079366 PCI: 00:1e.1: enabled 0
839 07:15:57.082654 PCI: 00:1e.2: enabled 1
840 07:15:57.083253 SPI: 00: enabled 1
841 07:15:57.086124 PCI: 00:1e.3: enabled 1
842 07:15:57.089043 SPI: 01: enabled 1
843 07:15:57.092298 PCI: 00:1f.0: enabled 1
844 07:15:57.092839 PNP: 0c09.0: enabled 1
845 07:15:57.095627 PCI: 00:1f.1: enabled 1
846 07:15:57.099596 PCI: 00:1f.2: enabled 1
847 07:15:57.102621 PCI: 00:1f.3: enabled 1
848 07:15:57.106077 PCI: 00:1f.4: enabled 1
849 07:15:57.106599 PCI: 00:1f.5: enabled 1
850 07:15:57.109335 PCI: 00:1f.6: enabled 0
851 07:15:57.113055 Root Device scanning...
852 07:15:57.115750 scan_static_bus for Root Device
853 07:15:57.119530 CPU_CLUSTER: 0 enabled
854 07:15:57.120170 DOMAIN: 0000 enabled
855 07:15:57.122205 DOMAIN: 0000 scanning...
856 07:15:57.125752 PCI: pci_scan_bus for bus 00
857 07:15:57.129703 PCI: 00:00.0 [8086/0000] ops
858 07:15:57.132589 PCI: 00:00.0 [8086/9b61] enabled
859 07:15:57.136210 PCI: 00:02.0 [8086/0000] bus ops
860 07:15:57.139121 PCI: 00:02.0 [8086/9b41] enabled
861 07:15:57.142460 PCI: 00:04.0 [8086/1903] disabled
862 07:15:57.145837 PCI: 00:08.0 [8086/1911] enabled
863 07:15:57.148885 PCI: 00:12.0 [8086/02f9] enabled
864 07:15:57.152529 PCI: 00:14.0 [8086/0000] bus ops
865 07:15:57.155734 PCI: 00:14.0 [8086/02ed] enabled
866 07:15:57.159506 PCI: 00:14.2 [8086/02ef] enabled
867 07:15:57.162574 PCI: 00:14.3 [8086/02f0] enabled
868 07:15:57.165806 PCI: 00:15.0 [8086/0000] bus ops
869 07:15:57.169842 PCI: 00:15.0 [8086/02e8] enabled
870 07:15:57.172301 PCI: 00:15.1 [8086/0000] bus ops
871 07:15:57.175621 PCI: 00:15.1 [8086/02e9] enabled
872 07:15:57.179203 PCI: 00:16.0 [8086/0000] ops
873 07:15:57.182390 PCI: 00:16.0 [8086/02e0] enabled
874 07:15:57.185563 PCI: 00:17.0 [8086/0000] ops
875 07:15:57.189183 PCI: 00:17.0 [8086/02d3] enabled
876 07:15:57.192422 PCI: 00:19.0 [8086/0000] bus ops
877 07:15:57.195530 PCI: 00:19.0 [8086/02c5] enabled
878 07:15:57.199308 PCI: 00:1d.0 [8086/0000] bus ops
879 07:15:57.202415 PCI: 00:1d.0 [8086/02b0] enabled
880 07:15:57.205790 PCI: Static device PCI: 00:1d.5 not found, disabling it.
881 07:15:57.209666 PCI: 00:1e.0 [8086/0000] ops
882 07:15:57.212242 PCI: 00:1e.0 [8086/02a8] enabled
883 07:15:57.215795 PCI: 00:1e.2 [8086/0000] bus ops
884 07:15:57.218557 PCI: 00:1e.2 [8086/02aa] enabled
885 07:15:57.222344 PCI: 00:1e.3 [8086/0000] bus ops
886 07:15:57.225747 PCI: 00:1e.3 [8086/02ab] enabled
887 07:15:57.229179 PCI: 00:1f.0 [8086/0000] bus ops
888 07:15:57.232280 PCI: 00:1f.0 [8086/0284] enabled
889 07:15:57.238605 PCI: Static device PCI: 00:1f.1 not found, disabling it.
890 07:15:57.245186 PCI: Static device PCI: 00:1f.2 not found, disabling it.
891 07:15:57.248407 PCI: 00:1f.3 [8086/0000] bus ops
892 07:15:57.251823 PCI: 00:1f.3 [8086/02c8] enabled
893 07:15:57.255289 PCI: 00:1f.4 [8086/0000] bus ops
894 07:15:57.258862 PCI: 00:1f.4 [8086/02a3] enabled
895 07:15:57.262037 PCI: 00:1f.5 [8086/0000] bus ops
896 07:15:57.264911 PCI: 00:1f.5 [8086/02a4] enabled
897 07:15:57.268707 PCI: Leftover static devices:
898 07:15:57.269329 PCI: 00:05.0
899 07:15:57.271839 PCI: 00:12.5
900 07:15:57.272376 PCI: 00:12.6
901 07:15:57.272789 PCI: 00:14.1
902 07:15:57.275146 PCI: 00:14.5
903 07:15:57.275691 PCI: 00:15.2
904 07:15:57.278450 PCI: 00:15.3
905 07:15:57.278951 PCI: 00:16.1
906 07:15:57.279349 PCI: 00:16.2
907 07:15:57.281888 PCI: 00:16.3
908 07:15:57.282498 PCI: 00:16.4
909 07:15:57.284847 PCI: 00:16.5
910 07:15:57.285348 PCI: 00:19.1
911 07:15:57.285746 PCI: 00:19.2
912 07:15:57.289005 PCI: 00:1a.0
913 07:15:57.289619 PCI: 00:1c.0
914 07:15:57.291615 PCI: 00:1c.1
915 07:15:57.292120 PCI: 00:1c.2
916 07:15:57.295080 PCI: 00:1c.3
917 07:15:57.295697 PCI: 00:1c.4
918 07:15:57.296096 PCI: 00:1c.5
919 07:15:57.298700 PCI: 00:1c.6
920 07:15:57.299310 PCI: 00:1c.7
921 07:15:57.301782 PCI: 00:1d.1
922 07:15:57.302325 PCI: 00:1d.2
923 07:15:57.302731 PCI: 00:1d.3
924 07:15:57.304690 PCI: 00:1d.4
925 07:15:57.305193 PCI: 00:1d.5
926 07:15:57.308267 PCI: 00:1e.1
927 07:15:57.308963 PCI: 00:1f.1
928 07:15:57.309386 PCI: 00:1f.2
929 07:15:57.311571 PCI: 00:1f.6
930 07:15:57.314963 PCI: Check your devicetree.cb.
931 07:15:57.318702 PCI: 00:02.0 scanning...
932 07:15:57.321456 scan_generic_bus for PCI: 00:02.0
933 07:15:57.324622 scan_generic_bus for PCI: 00:02.0 done
934 07:15:57.331400 scan_bus: scanning of bus PCI: 00:02.0 took 10202 usecs
935 07:15:57.332056 PCI: 00:14.0 scanning...
936 07:15:57.334796 scan_static_bus for PCI: 00:14.0
937 07:15:57.338742 USB0 port 0 enabled
938 07:15:57.341121 USB0 port 0 scanning...
939 07:15:57.344996 scan_static_bus for USB0 port 0
940 07:15:57.345611 USB2 port 0 enabled
941 07:15:57.347998 USB2 port 1 enabled
942 07:15:57.351254 USB2 port 2 disabled
943 07:15:57.351753 USB2 port 3 disabled
944 07:15:57.354733 USB2 port 5 disabled
945 07:15:57.358150 USB2 port 6 enabled
946 07:15:57.358655 USB2 port 9 enabled
947 07:15:57.361521 USB3 port 0 enabled
948 07:15:57.362126 USB3 port 1 enabled
949 07:15:57.364987 USB3 port 2 enabled
950 07:15:57.368715 USB3 port 3 enabled
951 07:15:57.369335 USB3 port 4 disabled
952 07:15:57.371348 USB2 port 0 scanning...
953 07:15:57.374689 scan_static_bus for USB2 port 0
954 07:15:57.377991 scan_static_bus for USB2 port 0 done
955 07:15:57.384680 scan_bus: scanning of bus USB2 port 0 took 9710 usecs
956 07:15:57.387898 USB2 port 1 scanning...
957 07:15:57.391305 scan_static_bus for USB2 port 1
958 07:15:57.394392 scan_static_bus for USB2 port 1 done
959 07:15:57.398070 scan_bus: scanning of bus USB2 port 1 took 9692 usecs
960 07:15:57.401265 USB2 port 6 scanning...
961 07:15:57.404610 scan_static_bus for USB2 port 6
962 07:15:57.407931 scan_static_bus for USB2 port 6 done
963 07:15:57.414590 scan_bus: scanning of bus USB2 port 6 took 9708 usecs
964 07:15:57.417859 USB2 port 9 scanning...
965 07:15:57.421254 scan_static_bus for USB2 port 9
966 07:15:57.424416 scan_static_bus for USB2 port 9 done
967 07:15:57.427692 scan_bus: scanning of bus USB2 port 9 took 9711 usecs
968 07:15:57.431155 USB3 port 0 scanning...
969 07:15:57.434168 scan_static_bus for USB3 port 0
970 07:15:57.437461 scan_static_bus for USB3 port 0 done
971 07:15:57.443953 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
972 07:15:57.447350 USB3 port 1 scanning...
973 07:15:57.450732 scan_static_bus for USB3 port 1
974 07:15:57.453991 scan_static_bus for USB3 port 1 done
975 07:15:57.457399 scan_bus: scanning of bus USB3 port 1 took 9710 usecs
976 07:15:57.460776 USB3 port 2 scanning...
977 07:15:57.464244 scan_static_bus for USB3 port 2
978 07:15:57.467364 scan_static_bus for USB3 port 2 done
979 07:15:57.473844 scan_bus: scanning of bus USB3 port 2 took 9701 usecs
980 07:15:57.477133 USB3 port 3 scanning...
981 07:15:57.480716 scan_static_bus for USB3 port 3
982 07:15:57.484259 scan_static_bus for USB3 port 3 done
983 07:15:57.490611 scan_bus: scanning of bus USB3 port 3 took 9704 usecs
984 07:15:57.493711 scan_static_bus for USB0 port 0 done
985 07:15:57.497111 scan_bus: scanning of bus USB0 port 0 took 155408 usecs
986 07:15:57.500680 scan_static_bus for PCI: 00:14.0 done
987 07:15:57.507388 scan_bus: scanning of bus PCI: 00:14.0 took 173023 usecs
988 07:15:57.510322 PCI: 00:15.0 scanning...
989 07:15:57.513920 scan_generic_bus for PCI: 00:15.0
990 07:15:57.517479 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
991 07:15:57.520448 scan_generic_bus for PCI: 00:15.0 done
992 07:15:57.527021 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
993 07:15:57.530454 PCI: 00:15.1 scanning...
994 07:15:57.533699 scan_generic_bus for PCI: 00:15.1
995 07:15:57.536694 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
996 07:15:57.543634 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
997 07:15:57.547117 scan_generic_bus for PCI: 00:15.1 done
998 07:15:57.550223 scan_bus: scanning of bus PCI: 00:15.1 took 18641 usecs
999 07:15:57.553745 PCI: 00:19.0 scanning...
1000 07:15:57.556830 scan_generic_bus for PCI: 00:19.0
1001 07:15:57.563530 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1002 07:15:57.566655 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1003 07:15:57.570034 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1004 07:15:57.573260 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1005 07:15:57.576946 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1006 07:15:57.583680 scan_generic_bus for PCI: 00:19.0 done
1007 07:15:57.587026 scan_bus: scanning of bus PCI: 00:19.0 took 30745 usecs
1008 07:15:57.590444 PCI: 00:1d.0 scanning...
1009 07:15:57.593374 do_pci_scan_bridge for PCI: 00:1d.0
1010 07:15:57.596913 PCI: pci_scan_bus for bus 01
1011 07:15:57.600261 PCI: 01:00.0 [1c5c/1327] enabled
1012 07:15:57.603152 Enabling Common Clock Configuration
1013 07:15:57.610157 L1 Sub-State supported from root port 29
1014 07:15:57.610738 L1 Sub-State Support = 0xf
1015 07:15:57.613844 CommonModeRestoreTime = 0x28
1016 07:15:57.620069 Power On Value = 0x16, Power On Scale = 0x0
1017 07:15:57.620692 ASPM: Enabled L1
1018 07:15:57.627128 scan_bus: scanning of bus PCI: 00:1d.0 took 32799 usecs
1019 07:15:57.629910 PCI: 00:1e.2 scanning...
1020 07:15:57.633323 scan_generic_bus for PCI: 00:1e.2
1021 07:15:57.636638 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1022 07:15:57.640142 scan_generic_bus for PCI: 00:1e.2 done
1023 07:15:57.646357 scan_bus: scanning of bus PCI: 00:1e.2 took 14019 usecs
1024 07:15:57.647026 PCI: 00:1e.3 scanning...
1025 07:15:57.653432 scan_generic_bus for PCI: 00:1e.3
1026 07:15:57.656684 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1027 07:15:57.659991 scan_generic_bus for PCI: 00:1e.3 done
1028 07:15:57.666193 scan_bus: scanning of bus PCI: 00:1e.3 took 14018 usecs
1029 07:15:57.666779 PCI: 00:1f.0 scanning...
1030 07:15:57.669992 scan_static_bus for PCI: 00:1f.0
1031 07:15:57.673174 PNP: 0c09.0 enabled
1032 07:15:57.676485 scan_static_bus for PCI: 00:1f.0 done
1033 07:15:57.683239 scan_bus: scanning of bus PCI: 00:1f.0 took 12064 usecs
1034 07:15:57.686472 PCI: 00:1f.3 scanning...
1035 07:15:57.689516 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1036 07:15:57.693460 PCI: 00:1f.4 scanning...
1037 07:15:57.696591 scan_generic_bus for PCI: 00:1f.4
1038 07:15:57.699849 scan_generic_bus for PCI: 00:1f.4 done
1039 07:15:57.706674 scan_bus: scanning of bus PCI: 00:1f.4 took 10198 usecs
1040 07:15:57.709948 PCI: 00:1f.5 scanning...
1041 07:15:57.713045 scan_generic_bus for PCI: 00:1f.5
1042 07:15:57.716851 scan_generic_bus for PCI: 00:1f.5 done
1043 07:15:57.723222 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1044 07:15:57.726695 scan_bus: scanning of bus DOMAIN: 0000 took 605217 usecs
1045 07:15:57.733137 scan_static_bus for Root Device done
1046 07:15:57.736410 scan_bus: scanning of bus Root Device took 625085 usecs
1047 07:15:57.739545 done
1048 07:15:57.742603 Chrome EC: UHEPI supported
1049 07:15:57.745975 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1050 07:15:57.752668 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1051 07:15:57.759473 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1052 07:15:57.765931 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1053 07:15:57.769333 SPI flash protection: WPSW=0 SRP0=0
1054 07:15:57.775973 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1055 07:15:57.779130 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1056 07:15:57.782196 found VGA at PCI: 00:02.0
1057 07:15:57.785849 Setting up VGA for PCI: 00:02.0
1058 07:15:57.792947 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1059 07:15:57.796113 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1060 07:15:57.799692 Allocating resources...
1061 07:15:57.802957 Reading resources...
1062 07:15:57.806133 Root Device read_resources bus 0 link: 0
1063 07:15:57.809060 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1064 07:15:57.815843 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1065 07:15:57.819379 DOMAIN: 0000 read_resources bus 0 link: 0
1066 07:15:57.826309 PCI: 00:14.0 read_resources bus 0 link: 0
1067 07:15:57.829468 USB0 port 0 read_resources bus 0 link: 0
1068 07:15:57.837566 USB0 port 0 read_resources bus 0 link: 0 done
1069 07:15:57.841005 PCI: 00:14.0 read_resources bus 0 link: 0 done
1070 07:15:57.848391 PCI: 00:15.0 read_resources bus 1 link: 0
1071 07:15:57.851188 PCI: 00:15.0 read_resources bus 1 link: 0 done
1072 07:15:57.858042 PCI: 00:15.1 read_resources bus 2 link: 0
1073 07:15:57.861266 PCI: 00:15.1 read_resources bus 2 link: 0 done
1074 07:15:57.868534 PCI: 00:19.0 read_resources bus 3 link: 0
1075 07:15:57.875294 PCI: 00:19.0 read_resources bus 3 link: 0 done
1076 07:15:57.879238 PCI: 00:1d.0 read_resources bus 1 link: 0
1077 07:15:57.886014 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1078 07:15:57.888627 PCI: 00:1e.2 read_resources bus 4 link: 0
1079 07:15:57.895430 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1080 07:15:57.899326 PCI: 00:1e.3 read_resources bus 5 link: 0
1081 07:15:57.905634 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1082 07:15:57.908923 PCI: 00:1f.0 read_resources bus 0 link: 0
1083 07:15:57.915580 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1084 07:15:57.922500 DOMAIN: 0000 read_resources bus 0 link: 0 done
1085 07:15:57.925450 Root Device read_resources bus 0 link: 0 done
1086 07:15:57.928887 Done reading resources.
1087 07:15:57.932203 Show resources in subtree (Root Device)...After reading.
1088 07:15:57.938149 Root Device child on link 0 CPU_CLUSTER: 0
1089 07:15:57.941840 CPU_CLUSTER: 0 child on link 0 APIC: 00
1090 07:15:57.942460 APIC: 00
1091 07:15:57.944990 APIC: 01
1092 07:15:57.945487 APIC: 07
1093 07:15:57.948195 APIC: 02
1094 07:15:57.948726 APIC: 06
1095 07:15:57.949146 APIC: 03
1096 07:15:57.952040 APIC: 04
1097 07:15:57.952556 APIC: 05
1098 07:15:57.955445 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1099 07:15:57.964968 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1100 07:15:58.021550 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1101 07:15:58.022166 PCI: 00:00.0
1102 07:15:58.022576 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1103 07:15:58.023351 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1104 07:15:58.023756 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1105 07:15:58.024128 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1106 07:15:58.028445 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1107 07:15:58.035051 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1108 07:15:58.041680 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1109 07:15:58.051447 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1110 07:15:58.061178 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1111 07:15:58.071459 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1112 07:15:58.080931 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1113 07:15:58.087557 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1114 07:15:58.097969 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1115 07:15:58.108114 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1116 07:15:58.117954 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1117 07:15:58.127835 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1118 07:15:58.128503 PCI: 00:02.0
1119 07:15:58.137564 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1120 07:15:58.150644 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1121 07:15:58.158091 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1122 07:15:58.161000 PCI: 00:04.0
1123 07:15:58.161497 PCI: 00:08.0
1124 07:15:58.170816 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 07:15:58.174193 PCI: 00:12.0
1126 07:15:58.183832 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 07:15:58.187958 PCI: 00:14.0 child on link 0 USB0 port 0
1128 07:15:58.197036 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1129 07:15:58.201271 USB0 port 0 child on link 0 USB2 port 0
1130 07:15:58.204768 USB2 port 0
1131 07:15:58.205374 USB2 port 1
1132 07:15:58.207398 USB2 port 2
1133 07:15:58.207895 USB2 port 3
1134 07:15:58.210960 USB2 port 5
1135 07:15:58.211627 USB2 port 6
1136 07:15:58.214391 USB2 port 9
1137 07:15:58.214996 USB3 port 0
1138 07:15:58.217146 USB3 port 1
1139 07:15:58.217646 USB3 port 2
1140 07:15:58.220692 USB3 port 3
1141 07:15:58.224755 USB3 port 4
1142 07:15:58.225362 PCI: 00:14.2
1143 07:15:58.233754 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1144 07:15:58.244037 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1145 07:15:58.247109 PCI: 00:14.3
1146 07:15:58.257396 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1147 07:15:58.260395 PCI: 00:15.0 child on link 0 I2C: 01:15
1148 07:15:58.270206 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 07:15:58.270821 I2C: 01:15
1150 07:15:58.276694 PCI: 00:15.1 child on link 0 I2C: 02:5d
1151 07:15:58.287084 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 07:15:58.287702 I2C: 02:5d
1153 07:15:58.290833 GENERIC: 0.0
1154 07:15:58.291336 PCI: 00:16.0
1155 07:15:58.299949 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1156 07:15:58.303424 PCI: 00:17.0
1157 07:15:58.309770 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1158 07:15:58.320353 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1159 07:15:58.329763 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1160 07:15:58.336514 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1161 07:15:58.346062 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1162 07:15:58.352414 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1163 07:15:58.358984 PCI: 00:19.0 child on link 0 I2C: 03:1a
1164 07:15:58.368771 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 07:15:58.368863 I2C: 03:1a
1166 07:15:58.372529 I2C: 03:38
1167 07:15:58.372608 I2C: 03:39
1168 07:15:58.375321 I2C: 03:3a
1169 07:15:58.375417 I2C: 03:3b
1170 07:15:58.378795 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1171 07:15:58.388791 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1172 07:15:58.398610 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1173 07:15:58.408525 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1174 07:15:58.408610 PCI: 01:00.0
1175 07:15:58.418379 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 07:15:58.421923 PCI: 00:1e.0
1177 07:15:58.431445 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1178 07:15:58.442179 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1179 07:15:58.445000 PCI: 00:1e.2 child on link 0 SPI: 00
1180 07:15:58.454817 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1181 07:15:58.458331 SPI: 00
1182 07:15:58.461710 PCI: 00:1e.3 child on link 0 SPI: 01
1183 07:15:58.471453 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1184 07:15:58.471580 SPI: 01
1185 07:15:58.478273 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1186 07:15:58.485133 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1187 07:15:58.494570 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1188 07:15:58.494660 PNP: 0c09.0
1189 07:15:58.504593 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1190 07:15:58.507529 PCI: 00:1f.3
1191 07:15:58.517354 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1192 07:15:58.527612 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1193 07:15:58.527702 PCI: 00:1f.4
1194 07:15:58.537546 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1195 07:15:58.547228 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1196 07:15:58.547318 PCI: 00:1f.5
1197 07:15:58.557253 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1198 07:15:58.564222 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1199 07:15:58.570530 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1200 07:15:58.577412 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1201 07:15:58.580635 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1202 07:15:58.584022 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1203 07:15:58.587125 PCI: 00:17.0 18 * [0x60 - 0x67] io
1204 07:15:58.590902 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1205 07:15:58.596949 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1206 07:15:58.603852 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1207 07:15:58.613557 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1208 07:15:58.620509 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1209 07:15:58.627218 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1210 07:15:58.631479 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1211 07:15:58.640779 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1212 07:15:58.643840 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1213 07:15:58.650485 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1214 07:15:58.653930 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1215 07:15:58.660284 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1216 07:15:58.663912 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1217 07:15:58.670975 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1218 07:15:58.673663 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1219 07:15:58.680350 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1220 07:15:58.683842 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1221 07:15:58.687518 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1222 07:15:58.693528 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1223 07:15:58.697624 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1224 07:15:58.703813 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1225 07:15:58.707059 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1226 07:15:58.714007 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1227 07:15:58.717204 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1228 07:15:58.723825 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1229 07:15:58.726770 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1230 07:15:58.733351 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1231 07:15:58.736806 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1232 07:15:58.743628 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1233 07:15:58.746467 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1234 07:15:58.753205 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1235 07:15:58.759962 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1236 07:15:58.763343 avoid_fixed_resources: DOMAIN: 0000
1237 07:15:58.769875 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1238 07:15:58.776819 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1239 07:15:58.783298 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1240 07:15:58.790148 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1241 07:15:58.799966 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1242 07:15:58.806722 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1243 07:15:58.813221 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1244 07:15:58.823308 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1245 07:15:58.829868 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1246 07:15:58.836463 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1247 07:15:58.842966 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1248 07:15:58.853135 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1249 07:15:58.853731 Setting resources...
1250 07:15:58.859720 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1251 07:15:58.863304 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1252 07:15:58.869247 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1253 07:15:58.872702 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1254 07:15:58.876028 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1255 07:15:58.883053 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1256 07:15:58.889645 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1257 07:15:58.895949 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1258 07:15:58.902483 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1259 07:15:58.909337 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1260 07:15:58.912946 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1261 07:15:58.915544 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1262 07:15:58.922487 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1263 07:15:58.926319 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1264 07:15:58.932612 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1265 07:15:58.935818 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1266 07:15:58.942546 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1267 07:15:58.946017 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1268 07:15:58.952644 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1269 07:15:58.955636 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1270 07:15:58.962303 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1271 07:15:58.965496 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1272 07:15:58.972283 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1273 07:15:58.975850 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1274 07:15:58.979129 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1275 07:15:58.985568 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1276 07:15:58.988780 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1277 07:15:58.995466 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1278 07:15:58.999223 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1279 07:15:59.005609 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1280 07:15:59.008892 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1281 07:15:59.015760 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1282 07:15:59.022239 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1283 07:15:59.028891 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1284 07:15:59.036020 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1285 07:15:59.045300 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1286 07:15:59.048388 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1287 07:15:59.055021 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1288 07:15:59.062040 Root Device assign_resources, bus 0 link: 0
1289 07:15:59.065176 DOMAIN: 0000 assign_resources, bus 0 link: 0
1290 07:15:59.075485 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1291 07:15:59.081805 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1292 07:15:59.091339 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1293 07:15:59.098004 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1294 07:15:59.107752 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1295 07:15:59.114396 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1296 07:15:59.118119 PCI: 00:14.0 assign_resources, bus 0 link: 0
1297 07:15:59.124317 PCI: 00:14.0 assign_resources, bus 0 link: 0
1298 07:15:59.131198 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1299 07:15:59.141168 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1300 07:15:59.147759 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1301 07:15:59.157662 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1302 07:15:59.161038 PCI: 00:15.0 assign_resources, bus 1 link: 0
1303 07:15:59.168134 PCI: 00:15.0 assign_resources, bus 1 link: 0
1304 07:15:59.174758 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1305 07:15:59.178189 PCI: 00:15.1 assign_resources, bus 2 link: 0
1306 07:15:59.184775 PCI: 00:15.1 assign_resources, bus 2 link: 0
1307 07:15:59.191505 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1308 07:15:59.201561 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1309 07:15:59.208258 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1310 07:15:59.214489 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1311 07:15:59.224657 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1312 07:15:59.231467 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1313 07:15:59.237400 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1314 07:15:59.247700 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 07:15:59.251338 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 07:15:59.257862 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 07:15:59.264882 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 07:15:59.274038 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 07:15:59.284173 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 07:15:59.287267 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 07:15:59.294397 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 07:15:59.300719 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 07:15:59.307106 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 07:15:59.316934 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 07:15:59.320568 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 07:15:59.327566 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 07:15:59.333848 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 07:15:59.340506 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 07:15:59.343901 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 07:15:59.347130 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 07:15:59.354133 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1332 07:15:59.357275 LPC: Trying to open IO window from 800 size 1ff
1333 07:15:59.367157 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1334 07:15:59.374003 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1335 07:15:59.383458 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1336 07:15:59.390433 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1337 07:15:59.396758 DOMAIN: 0000 assign_resources, bus 0 link: 0
1338 07:15:59.400354 Root Device assign_resources, bus 0 link: 0
1339 07:15:59.403563 Done setting resources.
1340 07:15:59.410109 Show resources in subtree (Root Device)...After assigning values.
1341 07:15:59.413005 Root Device child on link 0 CPU_CLUSTER: 0
1342 07:15:59.416611 CPU_CLUSTER: 0 child on link 0 APIC: 00
1343 07:15:59.419978 APIC: 00
1344 07:15:59.420599 APIC: 01
1345 07:15:59.423012 APIC: 07
1346 07:15:59.423521 APIC: 02
1347 07:15:59.423925 APIC: 06
1348 07:15:59.426723 APIC: 03
1349 07:15:59.427204 APIC: 04
1350 07:15:59.427623 APIC: 05
1351 07:15:59.433877 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1352 07:15:59.443049 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1353 07:15:59.453108 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1354 07:15:59.456566 PCI: 00:00.0
1355 07:15:59.463043 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1356 07:15:59.473081 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1357 07:15:59.482819 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1358 07:15:59.492466 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1359 07:15:59.502415 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1360 07:15:59.512656 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1361 07:15:59.522958 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1362 07:15:59.528988 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1363 07:15:59.538730 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1364 07:15:59.548649 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1365 07:15:59.558880 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1366 07:15:59.568605 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1367 07:15:59.575235 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1368 07:15:59.588185 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1369 07:15:59.594739 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1370 07:15:59.605820 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1371 07:15:59.608070 PCI: 00:02.0
1372 07:15:59.617998 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1373 07:15:59.627927 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1374 07:15:59.638197 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1375 07:15:59.638801 PCI: 00:04.0
1376 07:15:59.640929 PCI: 00:08.0
1377 07:15:59.650930 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1378 07:15:59.651560 PCI: 00:12.0
1379 07:15:59.661179 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1380 07:15:59.667683 PCI: 00:14.0 child on link 0 USB0 port 0
1381 07:15:59.677591 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1382 07:15:59.680782 USB0 port 0 child on link 0 USB2 port 0
1383 07:15:59.684052 USB2 port 0
1384 07:15:59.684600 USB2 port 1
1385 07:15:59.687574 USB2 port 2
1386 07:15:59.688201 USB2 port 3
1387 07:15:59.690470 USB2 port 5
1388 07:15:59.690959 USB2 port 6
1389 07:15:59.693872 USB2 port 9
1390 07:15:59.697467 USB3 port 0
1391 07:15:59.697986 USB3 port 1
1392 07:15:59.700535 USB3 port 2
1393 07:15:59.701036 USB3 port 3
1394 07:15:59.703852 USB3 port 4
1395 07:15:59.704390 PCI: 00:14.2
1396 07:15:59.713613 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1397 07:15:59.723786 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1398 07:15:59.726969 PCI: 00:14.3
1399 07:15:59.736667 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1400 07:15:59.740227 PCI: 00:15.0 child on link 0 I2C: 01:15
1401 07:15:59.750543 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1402 07:15:59.753377 I2C: 01:15
1403 07:15:59.756784 PCI: 00:15.1 child on link 0 I2C: 02:5d
1404 07:15:59.767186 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1405 07:15:59.770497 I2C: 02:5d
1406 07:15:59.771089 GENERIC: 0.0
1407 07:15:59.773417 PCI: 00:16.0
1408 07:15:59.782975 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1409 07:15:59.783575 PCI: 00:17.0
1410 07:15:59.797022 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1411 07:15:59.806539 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1412 07:15:59.813005 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1413 07:15:59.822989 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1414 07:15:59.833598 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1415 07:15:59.842781 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1416 07:15:59.846504 PCI: 00:19.0 child on link 0 I2C: 03:1a
1417 07:15:59.855890 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1418 07:15:59.859245 I2C: 03:1a
1419 07:15:59.859856 I2C: 03:38
1420 07:15:59.862876 I2C: 03:39
1421 07:15:59.863485 I2C: 03:3a
1422 07:15:59.865836 I2C: 03:3b
1423 07:15:59.869175 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1424 07:15:59.878972 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1425 07:15:59.889039 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1426 07:15:59.898657 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1427 07:15:59.902252 PCI: 01:00.0
1428 07:15:59.912451 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1429 07:15:59.913092 PCI: 00:1e.0
1430 07:15:59.924826 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1431 07:15:59.935159 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1432 07:15:59.937974 PCI: 00:1e.2 child on link 0 SPI: 00
1433 07:15:59.948031 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1434 07:15:59.951617 SPI: 00
1435 07:15:59.954981 PCI: 00:1e.3 child on link 0 SPI: 01
1436 07:15:59.964810 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1437 07:15:59.965645 SPI: 01
1438 07:15:59.970954 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1439 07:15:59.978123 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1440 07:15:59.987614 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1441 07:15:59.988146 PNP: 0c09.0
1442 07:15:59.997650 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1443 07:16:00.000752 PCI: 00:1f.3
1444 07:16:00.010962 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1445 07:16:00.021284 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1446 07:16:00.021896 PCI: 00:1f.4
1447 07:16:00.030875 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1448 07:16:00.041019 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1449 07:16:00.044297 PCI: 00:1f.5
1450 07:16:00.054279 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1451 07:16:00.056968 Done allocating resources.
1452 07:16:00.060843 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1453 07:16:00.064192 Enabling resources...
1454 07:16:00.067219 PCI: 00:00.0 subsystem <- 8086/9b61
1455 07:16:00.070323 PCI: 00:00.0 cmd <- 06
1456 07:16:00.073867 PCI: 00:02.0 subsystem <- 8086/9b41
1457 07:16:00.077251 PCI: 00:02.0 cmd <- 03
1458 07:16:00.080706 PCI: 00:08.0 cmd <- 06
1459 07:16:00.083692 PCI: 00:12.0 subsystem <- 8086/02f9
1460 07:16:00.086588 PCI: 00:12.0 cmd <- 02
1461 07:16:00.089993 PCI: 00:14.0 subsystem <- 8086/02ed
1462 07:16:00.093154 PCI: 00:14.0 cmd <- 02
1463 07:16:00.093654 PCI: 00:14.2 cmd <- 02
1464 07:16:00.100179 PCI: 00:14.3 subsystem <- 8086/02f0
1465 07:16:00.100804 PCI: 00:14.3 cmd <- 02
1466 07:16:00.103862 PCI: 00:15.0 subsystem <- 8086/02e8
1467 07:16:00.107069 PCI: 00:15.0 cmd <- 02
1468 07:16:00.109912 PCI: 00:15.1 subsystem <- 8086/02e9
1469 07:16:00.113538 PCI: 00:15.1 cmd <- 02
1470 07:16:00.116770 PCI: 00:16.0 subsystem <- 8086/02e0
1471 07:16:00.120442 PCI: 00:16.0 cmd <- 02
1472 07:16:00.123819 PCI: 00:17.0 subsystem <- 8086/02d3
1473 07:16:00.126770 PCI: 00:17.0 cmd <- 03
1474 07:16:00.130347 PCI: 00:19.0 subsystem <- 8086/02c5
1475 07:16:00.133238 PCI: 00:19.0 cmd <- 02
1476 07:16:00.136825 PCI: 00:1d.0 bridge ctrl <- 0013
1477 07:16:00.140132 PCI: 00:1d.0 subsystem <- 8086/02b0
1478 07:16:00.143765 PCI: 00:1d.0 cmd <- 06
1479 07:16:00.146463 PCI: 00:1e.0 subsystem <- 8086/02a8
1480 07:16:00.150063 PCI: 00:1e.0 cmd <- 06
1481 07:16:00.153058 PCI: 00:1e.2 subsystem <- 8086/02aa
1482 07:16:00.153673 PCI: 00:1e.2 cmd <- 06
1483 07:16:00.160342 PCI: 00:1e.3 subsystem <- 8086/02ab
1484 07:16:00.160959 PCI: 00:1e.3 cmd <- 02
1485 07:16:00.163615 PCI: 00:1f.0 subsystem <- 8086/0284
1486 07:16:00.166563 PCI: 00:1f.0 cmd <- 407
1487 07:16:00.169752 PCI: 00:1f.3 subsystem <- 8086/02c8
1488 07:16:00.173540 PCI: 00:1f.3 cmd <- 02
1489 07:16:00.176701 PCI: 00:1f.4 subsystem <- 8086/02a3
1490 07:16:00.179852 PCI: 00:1f.4 cmd <- 03
1491 07:16:00.183388 PCI: 00:1f.5 subsystem <- 8086/02a4
1492 07:16:00.186116 PCI: 00:1f.5 cmd <- 406
1493 07:16:00.195203 PCI: 01:00.0 cmd <- 02
1494 07:16:00.200047 done.
1495 07:16:00.213278 ME: Version: 14.0.39.1367
1496 07:16:00.219669 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1497 07:16:00.223111 Initializing devices...
1498 07:16:00.223722 Root Device init ...
1499 07:16:00.229462 Chrome EC: Set SMI mask to 0x0000000000000000
1500 07:16:00.232877 Chrome EC: clear events_b mask to 0x0000000000000000
1501 07:16:00.239705 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1502 07:16:00.246135 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1503 07:16:00.253229 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1504 07:16:00.256355 Chrome EC: Set WAKE mask to 0x0000000000000000
1505 07:16:00.259533 Root Device init finished in 35249 usecs
1506 07:16:00.263332 CPU_CLUSTER: 0 init ...
1507 07:16:00.270330 CPU_CLUSTER: 0 init finished in 2446 usecs
1508 07:16:00.273953 PCI: 00:00.0 init ...
1509 07:16:00.277221 CPU TDP: 15 Watts
1510 07:16:00.281020 CPU PL2 = 64 Watts
1511 07:16:00.283760 PCI: 00:00.0 init finished in 7082 usecs
1512 07:16:00.286915 PCI: 00:02.0 init ...
1513 07:16:00.290281 PCI: 00:02.0 init finished in 2253 usecs
1514 07:16:00.294124 PCI: 00:08.0 init ...
1515 07:16:00.296975 PCI: 00:08.0 init finished in 2252 usecs
1516 07:16:00.300078 PCI: 00:12.0 init ...
1517 07:16:00.304059 PCI: 00:12.0 init finished in 2251 usecs
1518 07:16:00.307119 PCI: 00:14.0 init ...
1519 07:16:00.310288 PCI: 00:14.0 init finished in 2243 usecs
1520 07:16:00.313995 PCI: 00:14.2 init ...
1521 07:16:00.316908 PCI: 00:14.2 init finished in 2252 usecs
1522 07:16:00.320521 PCI: 00:14.3 init ...
1523 07:16:00.323891 PCI: 00:14.3 init finished in 2267 usecs
1524 07:16:00.327062 PCI: 00:15.0 init ...
1525 07:16:00.330132 DW I2C bus 0 at 0xd121f000 (400 KHz)
1526 07:16:00.333840 PCI: 00:15.0 init finished in 5978 usecs
1527 07:16:00.336842 PCI: 00:15.1 init ...
1528 07:16:00.340199 DW I2C bus 1 at 0xd1220000 (400 KHz)
1529 07:16:00.343776 PCI: 00:15.1 init finished in 5976 usecs
1530 07:16:00.347176 PCI: 00:16.0 init ...
1531 07:16:00.350790 PCI: 00:16.0 init finished in 2250 usecs
1532 07:16:00.354050 PCI: 00:19.0 init ...
1533 07:16:00.357672 DW I2C bus 4 at 0xd1222000 (400 KHz)
1534 07:16:00.364408 PCI: 00:19.0 init finished in 5974 usecs
1535 07:16:00.365024 PCI: 00:1d.0 init ...
1536 07:16:00.367570 Initializing PCH PCIe bridge.
1537 07:16:00.370809 PCI: 00:1d.0 init finished in 5283 usecs
1538 07:16:00.375929 PCI: 00:1f.0 init ...
1539 07:16:00.381936 IOAPIC: Initializing IOAPIC at 0xfec00000
1540 07:16:00.385843 IOAPIC: Bootstrap Processor Local APIC = 0x00
1541 07:16:00.386378 IOAPIC: ID = 0x02
1542 07:16:00.388702 IOAPIC: Dumping registers
1543 07:16:00.392400 reg 0x0000: 0x02000000
1544 07:16:00.395356 reg 0x0001: 0x00770020
1545 07:16:00.398963 reg 0x0002: 0x00000000
1546 07:16:00.402234 PCI: 00:1f.0 init finished in 23527 usecs
1547 07:16:00.405439 PCI: 00:1f.4 init ...
1548 07:16:00.408461 PCI: 00:1f.4 init finished in 2261 usecs
1549 07:16:00.420464 PCI: 01:00.0 init ...
1550 07:16:00.423232 PCI: 01:00.0 init finished in 2252 usecs
1551 07:16:00.427525 PNP: 0c09.0 init ...
1552 07:16:00.431052 Google Chrome EC uptime: 11.094 seconds
1553 07:16:00.437243 Google Chrome AP resets since EC boot: 0
1554 07:16:00.440996 Google Chrome most recent AP reset causes:
1555 07:16:00.447664 Google Chrome EC reset flags at last EC boot: reset-pin
1556 07:16:00.450566 PNP: 0c09.0 init finished in 20564 usecs
1557 07:16:00.453738 Devices initialized
1558 07:16:00.457182 Show all devs... After init.
1559 07:16:00.457683 Root Device: enabled 1
1560 07:16:00.460483 CPU_CLUSTER: 0: enabled 1
1561 07:16:00.463839 DOMAIN: 0000: enabled 1
1562 07:16:00.464489 APIC: 00: enabled 1
1563 07:16:00.467359 PCI: 00:00.0: enabled 1
1564 07:16:00.470433 PCI: 00:02.0: enabled 1
1565 07:16:00.473356 PCI: 00:04.0: enabled 0
1566 07:16:00.473881 PCI: 00:05.0: enabled 0
1567 07:16:00.477212 PCI: 00:12.0: enabled 1
1568 07:16:00.480445 PCI: 00:12.5: enabled 0
1569 07:16:00.483595 PCI: 00:12.6: enabled 0
1570 07:16:00.484218 PCI: 00:14.0: enabled 1
1571 07:16:00.486809 PCI: 00:14.1: enabled 0
1572 07:16:00.490724 PCI: 00:14.3: enabled 1
1573 07:16:00.491347 PCI: 00:14.5: enabled 0
1574 07:16:00.494484 PCI: 00:15.0: enabled 1
1575 07:16:00.496915 PCI: 00:15.1: enabled 1
1576 07:16:00.499818 PCI: 00:15.2: enabled 0
1577 07:16:00.500391 PCI: 00:15.3: enabled 0
1578 07:16:00.503343 PCI: 00:16.0: enabled 1
1579 07:16:00.506772 PCI: 00:16.1: enabled 0
1580 07:16:00.509967 PCI: 00:16.2: enabled 0
1581 07:16:00.510469 PCI: 00:16.3: enabled 0
1582 07:16:00.513392 PCI: 00:16.4: enabled 0
1583 07:16:00.516863 PCI: 00:16.5: enabled 0
1584 07:16:00.520247 PCI: 00:17.0: enabled 1
1585 07:16:00.520794 PCI: 00:19.0: enabled 1
1586 07:16:00.523158 PCI: 00:19.1: enabled 0
1587 07:16:00.526927 PCI: 00:19.2: enabled 0
1588 07:16:00.527539 PCI: 00:1a.0: enabled 0
1589 07:16:00.529922 PCI: 00:1c.0: enabled 0
1590 07:16:00.533699 PCI: 00:1c.1: enabled 0
1591 07:16:00.536432 PCI: 00:1c.2: enabled 0
1592 07:16:00.536938 PCI: 00:1c.3: enabled 0
1593 07:16:00.539861 PCI: 00:1c.4: enabled 0
1594 07:16:00.543342 PCI: 00:1c.5: enabled 0
1595 07:16:00.546403 PCI: 00:1c.6: enabled 0
1596 07:16:00.546906 PCI: 00:1c.7: enabled 0
1597 07:16:00.550106 PCI: 00:1d.0: enabled 1
1598 07:16:00.552799 PCI: 00:1d.1: enabled 0
1599 07:16:00.556136 PCI: 00:1d.2: enabled 0
1600 07:16:00.556683 PCI: 00:1d.3: enabled 0
1601 07:16:00.559936 PCI: 00:1d.4: enabled 0
1602 07:16:00.563556 PCI: 00:1d.5: enabled 0
1603 07:16:00.566512 PCI: 00:1e.0: enabled 1
1604 07:16:00.567203 PCI: 00:1e.1: enabled 0
1605 07:16:00.569637 PCI: 00:1e.2: enabled 1
1606 07:16:00.573021 PCI: 00:1e.3: enabled 1
1607 07:16:00.573628 PCI: 00:1f.0: enabled 1
1608 07:16:00.576296 PCI: 00:1f.1: enabled 0
1609 07:16:00.579611 PCI: 00:1f.2: enabled 0
1610 07:16:00.582824 PCI: 00:1f.3: enabled 1
1611 07:16:00.583435 PCI: 00:1f.4: enabled 1
1612 07:16:00.586307 PCI: 00:1f.5: enabled 1
1613 07:16:00.589385 PCI: 00:1f.6: enabled 0
1614 07:16:00.592504 USB0 port 0: enabled 1
1615 07:16:00.593011 I2C: 01:15: enabled 1
1616 07:16:00.596097 I2C: 02:5d: enabled 1
1617 07:16:00.599484 GENERIC: 0.0: enabled 1
1618 07:16:00.600156 I2C: 03:1a: enabled 1
1619 07:16:00.602344 I2C: 03:38: enabled 1
1620 07:16:00.605664 I2C: 03:39: enabled 1
1621 07:16:00.606208 I2C: 03:3a: enabled 1
1622 07:16:00.608915 I2C: 03:3b: enabled 1
1623 07:16:00.612427 PCI: 00:00.0: enabled 1
1624 07:16:00.612928 SPI: 00: enabled 1
1625 07:16:00.615911 SPI: 01: enabled 1
1626 07:16:00.618980 PNP: 0c09.0: enabled 1
1627 07:16:00.619589 USB2 port 0: enabled 1
1628 07:16:00.622922 USB2 port 1: enabled 1
1629 07:16:00.625731 USB2 port 2: enabled 0
1630 07:16:00.629547 USB2 port 3: enabled 0
1631 07:16:00.630162 USB2 port 5: enabled 0
1632 07:16:00.632518 USB2 port 6: enabled 1
1633 07:16:00.635655 USB2 port 9: enabled 1
1634 07:16:00.636267 USB3 port 0: enabled 1
1635 07:16:00.639355 USB3 port 1: enabled 1
1636 07:16:00.642166 USB3 port 2: enabled 1
1637 07:16:00.642667 USB3 port 3: enabled 1
1638 07:16:00.645815 USB3 port 4: enabled 0
1639 07:16:00.648821 APIC: 01: enabled 1
1640 07:16:00.649326 APIC: 07: enabled 1
1641 07:16:00.652272 APIC: 02: enabled 1
1642 07:16:00.655487 APIC: 06: enabled 1
1643 07:16:00.656097 APIC: 03: enabled 1
1644 07:16:00.659094 APIC: 04: enabled 1
1645 07:16:00.659701 APIC: 05: enabled 1
1646 07:16:00.662189 PCI: 00:08.0: enabled 1
1647 07:16:00.665627 PCI: 00:14.2: enabled 1
1648 07:16:00.668838 PCI: 01:00.0: enabled 1
1649 07:16:00.672883 Disabling ACPI via APMC:
1650 07:16:00.675414 done.
1651 07:16:00.679199 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1652 07:16:00.682059 ELOG: NV offset 0xaf0000 size 0x4000
1653 07:16:00.689049 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1654 07:16:00.696284 ELOG: Event(17) added with size 13 at 2023-02-07 07:16:00 UTC
1655 07:16:00.702552 ELOG: Event(92) added with size 9 at 2023-02-07 07:16:00 UTC
1656 07:16:00.708748 ELOG: Event(93) added with size 9 at 2023-02-07 07:16:00 UTC
1657 07:16:00.715445 ELOG: Event(9A) added with size 9 at 2023-02-07 07:16:00 UTC
1658 07:16:00.722516 ELOG: Event(9E) added with size 10 at 2023-02-07 07:16:00 UTC
1659 07:16:00.728694 ELOG: Event(9F) added with size 14 at 2023-02-07 07:16:00 UTC
1660 07:16:00.732477 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1661 07:16:00.739496 ELOG: Event(A1) added with size 10 at 2023-02-07 07:16:00 UTC
1662 07:16:00.749532 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1663 07:16:00.755848 ELOG: Event(A0) added with size 9 at 2023-02-07 07:16:00 UTC
1664 07:16:00.759343 elog_add_boot_reason: Logged dev mode boot
1665 07:16:00.762762 Finalize devices...
1666 07:16:00.763366 PCI: 00:17.0 final
1667 07:16:00.765466 Devices finalized
1668 07:16:00.769223 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1669 07:16:00.775438 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1670 07:16:00.778845 ME: HFSTS1 : 0x90000245
1671 07:16:00.781957 ME: HFSTS2 : 0x3B850126
1672 07:16:00.788646 ME: HFSTS3 : 0x00000020
1673 07:16:00.792163 ME: HFSTS4 : 0x00004800
1674 07:16:00.795275 ME: HFSTS5 : 0x00000000
1675 07:16:00.798651 ME: HFSTS6 : 0x40400006
1676 07:16:00.801748 ME: Manufacturing Mode : NO
1677 07:16:00.805091 ME: FW Partition Table : OK
1678 07:16:00.808303 ME: Bringup Loader Failure : NO
1679 07:16:00.811852 ME: Firmware Init Complete : YES
1680 07:16:00.814984 ME: Boot Options Present : NO
1681 07:16:00.818114 ME: Update In Progress : NO
1682 07:16:00.821764 ME: D0i3 Support : YES
1683 07:16:00.824684 ME: Low Power State Enabled : NO
1684 07:16:00.828727 ME: CPU Replaced : NO
1685 07:16:00.831620 ME: CPU Replacement Valid : YES
1686 07:16:00.835956 ME: Current Working State : 5
1687 07:16:00.838742 ME: Current Operation State : 1
1688 07:16:00.842149 ME: Current Operation Mode : 0
1689 07:16:00.845175 ME: Error Code : 0
1690 07:16:00.848349 ME: CPU Debug Disabled : YES
1691 07:16:00.851269 ME: TXT Support : NO
1692 07:16:00.857921 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1693 07:16:00.864891 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1694 07:16:00.865506 CBFS @ c08000 size 3f8000
1695 07:16:00.871762 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1696 07:16:00.874635 CBFS: Locating 'fallback/dsdt.aml'
1697 07:16:00.878091 CBFS: Found @ offset 10bb80 size 3fa5
1698 07:16:00.885268 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 07:16:00.887778 CBFS @ c08000 size 3f8000
1700 07:16:00.894486 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 07:16:00.895094 CBFS: Locating 'fallback/slic'
1702 07:16:00.900138 CBFS: 'fallback/slic' not found.
1703 07:16:00.906744 ACPI: Writing ACPI tables at 99b3e000.
1704 07:16:00.907364 ACPI: * FACS
1705 07:16:00.909439 ACPI: * DSDT
1706 07:16:00.913317 Ramoops buffer: 0x100000@0x99a3d000.
1707 07:16:00.916439 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1708 07:16:00.923397 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1709 07:16:00.926553 Google Chrome EC: version:
1710 07:16:00.929635 ro: helios_v2.0.2659-56403530b
1711 07:16:00.932609 rw: helios_v2.0.2849-c41de27e7d
1712 07:16:00.933119 running image: 1
1713 07:16:00.937472 ACPI: * FADT
1714 07:16:00.937982 SCI is IRQ9
1715 07:16:00.943988 ACPI: added table 1/32, length now 40
1716 07:16:00.944690 ACPI: * SSDT
1717 07:16:00.947115 Found 1 CPU(s) with 8 core(s) each.
1718 07:16:00.950445 Error: Could not locate 'wifi_sar' in VPD.
1719 07:16:00.956658 Checking CBFS for default SAR values
1720 07:16:00.961027 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 07:16:00.963622 CBFS @ c08000 size 3f8000
1722 07:16:00.970381 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 07:16:00.973671 CBFS: Locating 'wifi_sar_defaults.hex'
1724 07:16:00.977057 CBFS: Found @ offset 5fac0 size 77
1725 07:16:00.980092 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1726 07:16:00.986613 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1727 07:16:00.989718 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1728 07:16:00.997003 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1729 07:16:01.000362 failed to find key in VPD: dsm_calib_r0_0
1730 07:16:01.010096 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1731 07:16:01.013371 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1732 07:16:01.016536 failed to find key in VPD: dsm_calib_r0_1
1733 07:16:01.026289 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1734 07:16:01.032847 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1735 07:16:01.036004 failed to find key in VPD: dsm_calib_r0_2
1736 07:16:01.046311 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1737 07:16:01.049314 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1738 07:16:01.056284 failed to find key in VPD: dsm_calib_r0_3
1739 07:16:01.062961 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1740 07:16:01.069434 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1741 07:16:01.072700 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1742 07:16:01.076362 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1743 07:16:01.079996 EC returned error result code 1
1744 07:16:01.083574 EC returned error result code 1
1745 07:16:01.087489 EC returned error result code 1
1746 07:16:01.094442 PS2K: Bad resp from EC. Vivaldi disabled!
1747 07:16:01.097535 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1748 07:16:01.103955 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1749 07:16:01.110991 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1750 07:16:01.114438 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1751 07:16:01.120802 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1752 07:16:01.127262 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1753 07:16:01.130676 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1754 07:16:01.137441 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1755 07:16:01.140827 ACPI: added table 2/32, length now 44
1756 07:16:01.144088 ACPI: * MCFG
1757 07:16:01.147176 ACPI: added table 3/32, length now 48
1758 07:16:01.150809 ACPI: * TPM2
1759 07:16:01.151470 TPM2 log created at 99a2d000
1760 07:16:01.156964 ACPI: added table 4/32, length now 52
1761 07:16:01.157467 ACPI: * MADT
1762 07:16:01.160552 SCI is IRQ9
1763 07:16:01.163534 ACPI: added table 5/32, length now 56
1764 07:16:01.164137 current = 99b43ac0
1765 07:16:01.167495 ACPI: * DMAR
1766 07:16:01.170592 ACPI: added table 6/32, length now 60
1767 07:16:01.173815 ACPI: * IGD OpRegion
1768 07:16:01.174417 GMA: Found VBT in CBFS
1769 07:16:01.176938 GMA: Found valid VBT in CBFS
1770 07:16:01.180527 ACPI: added table 7/32, length now 64
1771 07:16:01.183866 ACPI: * HPET
1772 07:16:01.187216 ACPI: added table 8/32, length now 68
1773 07:16:01.187985 ACPI: done.
1774 07:16:01.190245 ACPI tables: 31744 bytes.
1775 07:16:01.194157 smbios_write_tables: 99a2c000
1776 07:16:01.197031 EC returned error result code 3
1777 07:16:01.200752 Couldn't obtain OEM name from CBI
1778 07:16:01.203879 Create SMBIOS type 17
1779 07:16:01.206754 PCI: 00:00.0 (Intel Cannonlake)
1780 07:16:01.210600 PCI: 00:14.3 (Intel WiFi)
1781 07:16:01.213603 SMBIOS tables: 939 bytes.
1782 07:16:01.216673 Writing table forward entry at 0x00000500
1783 07:16:01.223695 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1784 07:16:01.226804 Writing coreboot table at 0x99b62000
1785 07:16:01.233220 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1786 07:16:01.237246 1. 0000000000001000-000000000009ffff: RAM
1787 07:16:01.240149 2. 00000000000a0000-00000000000fffff: RESERVED
1788 07:16:01.246562 3. 0000000000100000-0000000099a2bfff: RAM
1789 07:16:01.249935 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1790 07:16:01.256812 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1791 07:16:01.263441 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1792 07:16:01.266327 7. 000000009a000000-000000009f7fffff: RESERVED
1793 07:16:01.273098 8. 00000000e0000000-00000000efffffff: RESERVED
1794 07:16:01.276500 9. 00000000fc000000-00000000fc000fff: RESERVED
1795 07:16:01.279613 10. 00000000fe000000-00000000fe00ffff: RESERVED
1796 07:16:01.286803 11. 00000000fed10000-00000000fed17fff: RESERVED
1797 07:16:01.289387 12. 00000000fed80000-00000000fed83fff: RESERVED
1798 07:16:01.296196 13. 00000000fed90000-00000000fed91fff: RESERVED
1799 07:16:01.299314 14. 00000000feda0000-00000000feda1fff: RESERVED
1800 07:16:01.305968 15. 0000000100000000-000000045e7fffff: RAM
1801 07:16:01.309652 Graphics framebuffer located at 0xc0000000
1802 07:16:01.312473 Passing 5 GPIOs to payload:
1803 07:16:01.315983 NAME | PORT | POLARITY | VALUE
1804 07:16:01.322596 write protect | undefined | high | low
1805 07:16:01.325707 lid | undefined | high | high
1806 07:16:01.332483 power | undefined | high | low
1807 07:16:01.339342 oprom | undefined | high | low
1808 07:16:01.342731 EC in RW | 0x000000cb | high | low
1809 07:16:01.345961 Board ID: 4
1810 07:16:01.349061 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1811 07:16:01.352874 CBFS @ c08000 size 3f8000
1812 07:16:01.359088 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1813 07:16:01.365979 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1814 07:16:01.366631 coreboot table: 1492 bytes.
1815 07:16:01.369087 IMD ROOT 0. 99fff000 00001000
1816 07:16:01.372634 IMD SMALL 1. 99ffe000 00001000
1817 07:16:01.375665 FSP MEMORY 2. 99c4e000 003b0000
1818 07:16:01.379487 CONSOLE 3. 99c2e000 00020000
1819 07:16:01.382668 FMAP 4. 99c2d000 0000054e
1820 07:16:01.385552 TIME STAMP 5. 99c2c000 00000910
1821 07:16:01.389042 VBOOT WORK 6. 99c18000 00014000
1822 07:16:01.392247 MRC DATA 7. 99c16000 00001958
1823 07:16:01.395767 ROMSTG STCK 8. 99c15000 00001000
1824 07:16:01.399071 AFTER CAR 9. 99c0b000 0000a000
1825 07:16:01.402472 RAMSTAGE 10. 99baf000 0005c000
1826 07:16:01.405841 REFCODE 11. 99b7a000 00035000
1827 07:16:01.408799 SMM BACKUP 12. 99b6a000 00010000
1828 07:16:01.412613 COREBOOT 13. 99b62000 00008000
1829 07:16:01.415744 ACPI 14. 99b3e000 00024000
1830 07:16:01.418841 ACPI GNVS 15. 99b3d000 00001000
1831 07:16:01.422028 RAMOOPS 16. 99a3d000 00100000
1832 07:16:01.425785 TPM2 TCGLOG17. 99a2d000 00010000
1833 07:16:01.428739 SMBIOS 18. 99a2c000 00000800
1834 07:16:01.432483 IMD small region:
1835 07:16:01.435596 IMD ROOT 0. 99ffec00 00000400
1836 07:16:01.439667 FSP RUNTIME 1. 99ffebe0 00000004
1837 07:16:01.442316 EC HOSTEVENT 2. 99ffebc0 00000008
1838 07:16:01.445557 POWER STATE 3. 99ffeb80 00000040
1839 07:16:01.449023 ROMSTAGE 4. 99ffeb60 00000004
1840 07:16:01.451886 MEM INFO 5. 99ffe9a0 000001b9
1841 07:16:01.455800 VPD 6. 99ffe920 0000006c
1842 07:16:01.458639 MTRR: Physical address space:
1843 07:16:01.465446 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1844 07:16:01.472676 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1845 07:16:01.479220 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1846 07:16:01.485373 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1847 07:16:01.491799 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1848 07:16:01.498193 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1849 07:16:01.505396 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1850 07:16:01.508582 MTRR: Fixed MSR 0x250 0x0606060606060606
1851 07:16:01.511452 MTRR: Fixed MSR 0x258 0x0606060606060606
1852 07:16:01.515404 MTRR: Fixed MSR 0x259 0x0000000000000000
1853 07:16:01.517951 MTRR: Fixed MSR 0x268 0x0606060606060606
1854 07:16:01.525194 MTRR: Fixed MSR 0x269 0x0606060606060606
1855 07:16:01.528026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1856 07:16:01.531512 MTRR: Fixed MSR 0x26b 0x0606060606060606
1857 07:16:01.534397 MTRR: Fixed MSR 0x26c 0x0606060606060606
1858 07:16:01.541248 MTRR: Fixed MSR 0x26d 0x0606060606060606
1859 07:16:01.544536 MTRR: Fixed MSR 0x26e 0x0606060606060606
1860 07:16:01.548155 MTRR: Fixed MSR 0x26f 0x0606060606060606
1861 07:16:01.551205 call enable_fixed_mtrr()
1862 07:16:01.554180 CPU physical address size: 39 bits
1863 07:16:01.561185 MTRR: default type WB/UC MTRR counts: 6/8.
1864 07:16:01.564458 MTRR: WB selected as default type.
1865 07:16:01.568014 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1866 07:16:01.574096 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1867 07:16:01.580963 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1868 07:16:01.587513 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1869 07:16:01.593801 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1870 07:16:01.600899 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1871 07:16:01.601530
1872 07:16:01.603973 MTRR check
1873 07:16:01.604504 Fixed MTRRs : Enabled
1874 07:16:01.607481 Variable MTRRs: Enabled
1875 07:16:01.608074
1876 07:16:01.611047 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 07:16:01.617340 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 07:16:01.620888 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 07:16:01.623976 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 07:16:01.627626 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 07:16:01.633732 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 07:16:01.637212 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 07:16:01.640623 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 07:16:01.643787 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 07:16:01.647508 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 07:16:01.653654 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 07:16:01.656829 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1888 07:16:01.660411 call enable_fixed_mtrr()
1889 07:16:01.667207 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1890 07:16:01.670257 CPU physical address size: 39 bits
1891 07:16:01.673256 CBFS @ c08000 size 3f8000
1892 07:16:01.676856 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1893 07:16:01.680125 CBFS: Locating 'fallback/payload'
1894 07:16:01.686893 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 07:16:01.690077 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 07:16:01.692950 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 07:16:01.696830 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 07:16:01.703213 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 07:16:01.706378 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 07:16:01.709871 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 07:16:01.713274 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 07:16:01.719721 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 07:16:01.723419 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 07:16:01.726426 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 07:16:01.729544 MTRR: Fixed MSR 0x250 0x0606060606060606
1906 07:16:01.733014 call enable_fixed_mtrr()
1907 07:16:01.736082 MTRR: Fixed MSR 0x258 0x0606060606060606
1908 07:16:01.743144 MTRR: Fixed MSR 0x259 0x0000000000000000
1909 07:16:01.746332 MTRR: Fixed MSR 0x268 0x0606060606060606
1910 07:16:01.749907 MTRR: Fixed MSR 0x269 0x0606060606060606
1911 07:16:01.752983 MTRR: Fixed MSR 0x26a 0x0606060606060606
1912 07:16:01.759503 MTRR: Fixed MSR 0x26b 0x0606060606060606
1913 07:16:01.762859 MTRR: Fixed MSR 0x26c 0x0606060606060606
1914 07:16:01.766015 MTRR: Fixed MSR 0x26d 0x0606060606060606
1915 07:16:01.769144 MTRR: Fixed MSR 0x26e 0x0606060606060606
1916 07:16:01.776063 MTRR: Fixed MSR 0x26f 0x0606060606060606
1917 07:16:01.779494 CPU physical address size: 39 bits
1918 07:16:01.782609 call enable_fixed_mtrr()
1919 07:16:01.785969 CBFS: Found @ offset 1c96c0 size 3f798
1920 07:16:01.789304 MTRR: Fixed MSR 0x250 0x0606060606060606
1921 07:16:01.792020 MTRR: Fixed MSR 0x258 0x0606060606060606
1922 07:16:01.795378 MTRR: Fixed MSR 0x259 0x0000000000000000
1923 07:16:01.802301 MTRR: Fixed MSR 0x268 0x0606060606060606
1924 07:16:01.805973 MTRR: Fixed MSR 0x269 0x0606060606060606
1925 07:16:01.809355 MTRR: Fixed MSR 0x26a 0x0606060606060606
1926 07:16:01.812561 MTRR: Fixed MSR 0x26b 0x0606060606060606
1927 07:16:01.818843 MTRR: Fixed MSR 0x26c 0x0606060606060606
1928 07:16:01.822615 MTRR: Fixed MSR 0x26d 0x0606060606060606
1929 07:16:01.825610 MTRR: Fixed MSR 0x26e 0x0606060606060606
1930 07:16:01.828701 MTRR: Fixed MSR 0x26f 0x0606060606060606
1931 07:16:01.835833 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 07:16:01.836475 call enable_fixed_mtrr()
1933 07:16:01.842428 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 07:16:01.845747 MTRR: Fixed MSR 0x259 0x0000000000000000
1935 07:16:01.849117 MTRR: Fixed MSR 0x268 0x0606060606060606
1936 07:16:01.852676 MTRR: Fixed MSR 0x269 0x0606060606060606
1937 07:16:01.859076 MTRR: Fixed MSR 0x26a 0x0606060606060606
1938 07:16:01.862254 MTRR: Fixed MSR 0x26b 0x0606060606060606
1939 07:16:01.866077 MTRR: Fixed MSR 0x26c 0x0606060606060606
1940 07:16:01.869137 MTRR: Fixed MSR 0x26d 0x0606060606060606
1941 07:16:01.871772 MTRR: Fixed MSR 0x26e 0x0606060606060606
1942 07:16:01.879036 MTRR: Fixed MSR 0x26f 0x0606060606060606
1943 07:16:01.881810 CPU physical address size: 39 bits
1944 07:16:01.885428 call enable_fixed_mtrr()
1945 07:16:01.888938 MTRR: Fixed MSR 0x250 0x0606060606060606
1946 07:16:01.892142 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 07:16:01.895164 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 07:16:01.902636 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 07:16:01.905602 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 07:16:01.908738 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 07:16:01.911690 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 07:16:01.918447 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 07:16:01.921499 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 07:16:01.925358 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 07:16:01.928861 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 07:16:01.935529 MTRR: Fixed MSR 0x250 0x0606060606060606
1957 07:16:01.936126 call enable_fixed_mtrr()
1958 07:16:01.941784 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 07:16:01.946062 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 07:16:01.948685 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 07:16:01.952047 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 07:16:01.954945 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 07:16:01.962881 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 07:16:01.965356 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 07:16:01.968785 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 07:16:01.971527 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 07:16:01.978573 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 07:16:01.981643 CPU physical address size: 39 bits
1969 07:16:01.985033 call enable_fixed_mtrr()
1970 07:16:01.988216 Checking segment from ROM address 0xffdd16f8
1971 07:16:01.991555 CPU physical address size: 39 bits
1972 07:16:01.994989 CPU physical address size: 39 bits
1973 07:16:02.001982 Checking segment from ROM address 0xffdd1714
1974 07:16:02.004842 CPU physical address size: 39 bits
1975 07:16:02.007966 Loading segment from ROM address 0xffdd16f8
1976 07:16:02.011286 code (compression=0)
1977 07:16:02.017829 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1978 07:16:02.027812 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1979 07:16:02.028480 it's not compressed!
1980 07:16:02.121614 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1981 07:16:02.127947 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1982 07:16:02.131143 Loading segment from ROM address 0xffdd1714
1983 07:16:02.134672 Entry Point 0x30000000
1984 07:16:02.138036 Loaded segments
1985 07:16:02.143463 Finalizing chipset.
1986 07:16:02.147312 Finalizing SMM.
1987 07:16:02.150642 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1988 07:16:02.153248 mp_park_aps done after 0 msecs.
1989 07:16:02.160426 Jumping to boot code at 30000000(99b62000)
1990 07:16:02.166719 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1991 07:16:02.167319
1992 07:16:02.167727
1993 07:16:02.168095
1994 07:16:02.170080 Starting depthcharge on Helios...
1995 07:16:02.170702
1996 07:16:02.171841 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1997 07:16:02.172421 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
1998 07:16:02.172906 Setting prompt string to ['hatch:']
1999 07:16:02.173351 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:40)
2000 07:16:02.179863 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2001 07:16:02.180511
2002 07:16:02.186490 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2003 07:16:02.187111
2004 07:16:02.193487 board_setup: Info: eMMC controller not present; skipping
2005 07:16:02.194049
2006 07:16:02.196599 New NVMe Controller 0x30053ac0 @ 00:1d:00
2007 07:16:02.197129
2008 07:16:02.203438 board_setup: Info: SDHCI controller not present; skipping
2009 07:16:02.204036
2010 07:16:02.209587 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2011 07:16:02.210185
2012 07:16:02.210581 Wipe memory regions:
2013 07:16:02.210948
2014 07:16:02.212895 [0x00000000001000, 0x000000000a0000)
2015 07:16:02.213387
2016 07:16:02.216585 [0x00000000100000, 0x00000030000000)
2017 07:16:02.281762
2018 07:16:02.285232 [0x00000030657430, 0x00000099a2c000)
2019 07:16:02.421996
2020 07:16:02.425339 [0x00000100000000, 0x0000045e800000)
2021 07:16:03.808493
2022 07:16:03.809094 R8152: Initializing
2023 07:16:03.809506
2024 07:16:03.810804 Version 9 (ocp_data = 6010)
2025 07:16:03.815140
2026 07:16:03.815636 R8152: Done initializing
2027 07:16:03.816028
2028 07:16:03.818194 Adding net device
2029 07:16:04.427827
2030 07:16:04.428489 R8152: Initializing
2031 07:16:04.429114
2032 07:16:04.430992 Version 6 (ocp_data = 5c30)
2033 07:16:04.431605
2034 07:16:04.433886 R8152: Done initializing
2035 07:16:04.433989
2036 07:16:04.437449 net_add_device: Attemp to include the same device
2037 07:16:04.440964
2038 07:16:04.448220 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2039 07:16:04.448444
2040 07:16:04.448556
2041 07:16:04.448651
2042 07:16:04.448965 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2044 07:16:04.550179 hatch: tftpboot 192.168.201.1 9045488/tftp-deploy-iifa5uwl/kernel/bzImage 9045488/tftp-deploy-iifa5uwl/kernel/cmdline 9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
2045 07:16:04.550893 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2046 07:16:04.551501 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
2047 07:16:04.556302 tftpboot 192.168.201.1 9045488/tftp-deploy-iifa5uwl/kernel/bzImaoy-iifa5uwl/kernel/cmdline 9045488/tftp-deploy-iifa5uwl/ramdisk/ramdisk.cpio.gz
2048 07:16:04.556963
2049 07:16:04.557368 Waiting for link
2050 07:16:04.757527
2051 07:16:04.758402 done.
2052 07:16:04.758821
2053 07:16:04.759198 MAC: 00:24:32:50:1a:5f
2054 07:16:04.759606
2055 07:16:04.760456 Sending DHCP discover... done.
2056 07:16:04.760856
2057 07:16:04.763333 Waiting for reply... done.
2058 07:16:04.764087
2059 07:16:04.766496 Sending DHCP request... done.
2060 07:16:04.767199
2061 07:16:04.769923 Waiting for reply... done.
2062 07:16:04.770430
2063 07:16:04.773274 My ip is 192.168.201.21
2064 07:16:04.773778
2065 07:16:04.776892 The DHCP server ip is 192.168.201.1
2066 07:16:04.777394
2067 07:16:04.779609 TFTP server IP predefined by user: 192.168.201.1
2068 07:16:04.780116
2069 07:16:04.786379 Bootfile predefined by user: 9045488/tftp-deploy-iifa5uwl/kernel/bzImage
2070 07:16:04.786978
2071 07:16:04.789705 Sending tftp read request... done.
2072 07:16:04.790318
2073 07:16:04.797521 Waiting for the transfer...
2074 07:16:04.798131
2075 07:16:05.482999 00000000 ################################################################
2076 07:16:05.483625
2077 07:16:06.186935 00080000 ################################################################
2078 07:16:06.187591
2079 07:16:06.914190 00100000 ################################################################
2080 07:16:06.914941
2081 07:16:07.627105 00180000 ################################################################
2082 07:16:07.627701
2083 07:16:08.312500 00200000 ################################################################
2084 07:16:08.313080
2085 07:16:09.026381 00280000 ################################################################
2086 07:16:09.027030
2087 07:16:09.735622 00300000 ################################################################
2088 07:16:09.736202
2089 07:16:10.448283 00380000 ################################################################
2090 07:16:10.448873
2091 07:16:11.172143 00400000 ################################################################
2092 07:16:11.172758
2093 07:16:11.880593 00480000 ################################################################
2094 07:16:11.881193
2095 07:16:12.599927 00500000 ################################################################
2096 07:16:12.600663
2097 07:16:13.325907 00580000 ################################################################
2098 07:16:13.326556
2099 07:16:14.045354 00600000 ################################################################
2100 07:16:14.045903
2101 07:16:14.750289 00680000 ################################################################
2102 07:16:14.750929
2103 07:16:15.069420 00700000 ############################# done.
2104 07:16:15.070025
2105 07:16:15.072244 The bootfile was 7573392 bytes long.
2106 07:16:15.072924
2107 07:16:15.075703 Sending tftp read request... done.
2108 07:16:15.076200
2109 07:16:15.078981 Waiting for the transfer...
2110 07:16:15.079476
2111 07:16:15.709188 00000000 ################################################################
2112 07:16:15.709739
2113 07:16:16.366826 00080000 ################################################################
2114 07:16:16.367374
2115 07:16:17.027162 00100000 ################################################################
2116 07:16:17.027959
2117 07:16:17.634042 00180000 ################################################################
2118 07:16:17.634264
2119 07:16:18.257715 00200000 ################################################################
2120 07:16:18.258261
2121 07:16:18.898723 00280000 ################################################################
2122 07:16:18.899292
2123 07:16:19.541379 00300000 ################################################################
2124 07:16:19.541988
2125 07:16:20.179525 00380000 ################################################################
2126 07:16:20.180070
2127 07:16:20.829211 00400000 ################################################################
2128 07:16:20.829769
2129 07:16:21.418678 00480000 ################################################################
2130 07:16:21.419216
2131 07:16:21.736047 00500000 ################################ done.
2132 07:16:21.736331
2133 07:16:21.739624 Sending tftp read request... done.
2134 07:16:21.739828
2135 07:16:21.743152 Waiting for the transfer...
2136 07:16:21.743397
2137 07:16:21.743591 00000000 # done.
2138 07:16:21.743777
2139 07:16:21.753238 Command line loaded dynamically from TFTP file: 9045488/tftp-deploy-iifa5uwl/kernel/cmdline
2140 07:16:21.753718
2141 07:16:21.779386 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9045488/extract-nfsrootfs-8g17ixz1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2142 07:16:21.779990
2143 07:16:21.786229 ec_init(0): CrosEC protocol v3 supported (256, 256)
2144 07:16:21.789300
2145 07:16:21.792395 Shutting down all USB controllers.
2146 07:16:21.792894
2147 07:16:21.793340 Removing current net device
2148 07:16:21.800458
2149 07:16:21.801064 Finalizing coreboot
2150 07:16:21.801478
2151 07:16:21.807136 Exiting depthcharge with code 4 at timestamp: 26969893
2152 07:16:21.807636
2153 07:16:21.808030
2154 07:16:21.808438 Starting kernel ...
2155 07:16:21.808806
2156 07:16:21.809151
2157 07:16:21.810418 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2158 07:16:21.810972 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2159 07:16:21.811381 Setting prompt string to ['Linux version [0-9]']
2160 07:16:21.811774 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2161 07:16:21.812169 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2163 07:20:41.811831 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2165 07:20:41.813022 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2167 07:20:41.813912 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2170 07:20:41.815403 end: 2 depthcharge-action (duration 00:05:00) [common]
2172 07:20:41.816686 Cleaning after the job
2173 07:20:41.817156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/ramdisk
2174 07:20:41.819420 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/kernel
2175 07:20:41.822816 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/nfsrootfs
2176 07:20:41.897656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9045488/tftp-deploy-iifa5uwl/modules
2177 07:20:41.897960 start: 4.1 power-off (timeout 00:00:30) [common]
2178 07:20:41.898123 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2179 07:20:44.071360 >> Command sent successfully.
2180 07:20:44.081607 Returned 0 in 2 seconds
2181 07:20:44.183398 end: 4.1 power-off (duration 00:00:02) [common]
2183 07:20:44.185057 start: 4.2 read-feedback (timeout 00:09:58) [common]
2184 07:20:44.186414 Listened to connection for namespace 'common' for up to 1s
2186 07:20:44.187867 Listened to connection for namespace 'common' for up to 1s
2187 07:20:45.188608 Finalising connection for namespace 'common'
2188 07:20:45.189313 Disconnecting from shell: Finalise
2189 07:20:45.189785
2190 07:20:45.291354 end: 4.2 read-feedback (duration 00:00:01) [common]
2191 07:20:45.292004 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9045488
2192 07:20:45.479500 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9045488
2193 07:20:45.479700 JobError: Your job cannot terminate cleanly.