Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 14:13:16.866062 lava-dispatcher, installed at version: 2023.05.1
2 14:13:16.866297 start: 0 validate
3 14:13:16.866429 Start time: 2023-06-07 14:13:16.866421+00:00 (UTC)
4 14:13:16.866560 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:13:16.866697 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230527.0%2Fx86%2Frootfs.cpio.gz exists
6 14:13:17.137252 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:13:17.138067 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip74-rt43-218-g246f4be89a77%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:13:17.411219 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:13:17.412063 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip74-rt43-218-g246f4be89a77%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 14:13:17.687784 validate duration: 0.82
12 14:13:17.688069 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 14:13:17.688167 start: 1.1 download-retry (timeout 00:10:00) [common]
14 14:13:17.688257 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 14:13:17.688376 Not decompressing ramdisk as can be used compressed.
16 14:13:17.688463 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230527.0/x86/rootfs.cpio.gz
17 14:13:17.688529 saving as /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/ramdisk/rootfs.cpio.gz
18 14:13:17.688592 total size: 8430069 (8MB)
19 14:13:17.689727 progress 0% (0MB)
20 14:13:17.692198 progress 5% (0MB)
21 14:13:17.694461 progress 10% (0MB)
22 14:13:17.696713 progress 15% (1MB)
23 14:13:17.698920 progress 20% (1MB)
24 14:13:17.701145 progress 25% (2MB)
25 14:13:17.703343 progress 30% (2MB)
26 14:13:17.705599 progress 35% (2MB)
27 14:13:17.707640 progress 40% (3MB)
28 14:13:17.709850 progress 45% (3MB)
29 14:13:17.712037 progress 50% (4MB)
30 14:13:17.714250 progress 55% (4MB)
31 14:13:17.716438 progress 60% (4MB)
32 14:13:17.718609 progress 65% (5MB)
33 14:13:17.720820 progress 70% (5MB)
34 14:13:17.722949 progress 75% (6MB)
35 14:13:17.725182 progress 80% (6MB)
36 14:13:17.727345 progress 85% (6MB)
37 14:13:17.729568 progress 90% (7MB)
38 14:13:17.731735 progress 95% (7MB)
39 14:13:17.733958 progress 100% (8MB)
40 14:13:17.734097 8MB downloaded in 0.05s (176.69MB/s)
41 14:13:17.734246 end: 1.1.1 http-download (duration 00:00:00) [common]
43 14:13:17.734487 end: 1.1 download-retry (duration 00:00:00) [common]
44 14:13:17.734576 start: 1.2 download-retry (timeout 00:10:00) [common]
45 14:13:17.734667 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 14:13:17.734795 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip74-rt43-218-g246f4be89a77/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 14:13:17.734865 saving as /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/kernel/bzImage
48 14:13:17.734928 total size: 7884688 (7MB)
49 14:13:17.734990 No compression specified
50 14:13:17.736241 progress 0% (0MB)
51 14:13:17.738509 progress 5% (0MB)
52 14:13:17.740577 progress 10% (0MB)
53 14:13:17.742615 progress 15% (1MB)
54 14:13:17.744664 progress 20% (1MB)
55 14:13:17.746702 progress 25% (1MB)
56 14:13:17.748768 progress 30% (2MB)
57 14:13:17.750837 progress 35% (2MB)
58 14:13:17.752891 progress 40% (3MB)
59 14:13:17.754908 progress 45% (3MB)
60 14:13:17.756934 progress 50% (3MB)
61 14:13:17.758933 progress 55% (4MB)
62 14:13:17.760984 progress 60% (4MB)
63 14:13:17.762991 progress 65% (4MB)
64 14:13:17.765005 progress 70% (5MB)
65 14:13:17.766996 progress 75% (5MB)
66 14:13:17.769015 progress 80% (6MB)
67 14:13:17.771020 progress 85% (6MB)
68 14:13:17.773027 progress 90% (6MB)
69 14:13:17.775017 progress 95% (7MB)
70 14:13:17.777040 progress 100% (7MB)
71 14:13:17.777227 7MB downloaded in 0.04s (177.78MB/s)
72 14:13:17.777368 end: 1.2.1 http-download (duration 00:00:00) [common]
74 14:13:17.777596 end: 1.2 download-retry (duration 00:00:00) [common]
75 14:13:17.777688 start: 1.3 download-retry (timeout 00:10:00) [common]
76 14:13:17.777774 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 14:13:17.777905 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip74-rt43-218-g246f4be89a77/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 14:13:17.777976 saving as /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/modules/modules.tar
79 14:13:17.778039 total size: 253976 (0MB)
80 14:13:17.778101 Using unxz to decompress xz
81 14:13:17.781809 progress 12% (0MB)
82 14:13:17.782194 progress 25% (0MB)
83 14:13:17.782431 progress 38% (0MB)
84 14:13:17.783730 progress 51% (0MB)
85 14:13:17.785528 progress 64% (0MB)
86 14:13:17.787479 progress 77% (0MB)
87 14:13:17.789403 progress 90% (0MB)
88 14:13:17.791258 progress 100% (0MB)
89 14:13:17.797101 0MB downloaded in 0.02s (12.71MB/s)
90 14:13:17.797358 end: 1.3.1 http-download (duration 00:00:00) [common]
92 14:13:17.797626 end: 1.3 download-retry (duration 00:00:00) [common]
93 14:13:17.797728 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 14:13:17.797828 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 14:13:17.797913 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 14:13:17.797999 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 14:13:17.798197 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh
98 14:13:17.798324 makedir: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin
99 14:13:17.798427 makedir: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/tests
100 14:13:17.798525 makedir: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/results
101 14:13:17.798638 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-add-keys
102 14:13:17.798779 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-add-sources
103 14:13:17.798910 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-background-process-start
104 14:13:17.799041 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-background-process-stop
105 14:13:17.799166 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-common-functions
106 14:13:17.799289 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-echo-ipv4
107 14:13:17.799414 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-install-packages
108 14:13:17.799548 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-installed-packages
109 14:13:17.799670 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-os-build
110 14:13:17.799793 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-probe-channel
111 14:13:17.799931 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-probe-ip
112 14:13:17.800055 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-target-ip
113 14:13:17.800178 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-target-mac
114 14:13:17.800315 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-target-storage
115 14:13:17.800476 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-case
116 14:13:17.800613 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-event
117 14:13:17.800739 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-feedback
118 14:13:17.800863 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-raise
119 14:13:17.800987 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-reference
120 14:13:17.801116 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-runner
121 14:13:17.801240 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-set
122 14:13:17.801365 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-test-shell
123 14:13:17.801493 Updating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-install-packages (oe)
124 14:13:17.801644 Updating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/bin/lava-installed-packages (oe)
125 14:13:17.801766 Creating /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/environment
126 14:13:17.801875 LAVA metadata
127 14:13:17.801951 - LAVA_JOB_ID=10624890
128 14:13:17.802018 - LAVA_DISPATCHER_IP=192.168.201.1
129 14:13:17.802121 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 14:13:17.802192 skipped lava-vland-overlay
131 14:13:17.802269 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 14:13:17.802354 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 14:13:17.802419 skipped lava-multinode-overlay
134 14:13:17.802496 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 14:13:17.802580 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 14:13:17.802657 Loading test definitions
137 14:13:17.802749 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 14:13:17.802829 Using /lava-10624890 at stage 0
139 14:13:17.803131 uuid=10624890_1.4.2.3.1 testdef=None
140 14:13:17.803221 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 14:13:17.803310 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 14:13:17.803852 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 14:13:17.804080 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 14:13:17.804722 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 14:13:17.804963 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 14:13:17.805584 runner path: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/0/tests/0_dmesg test_uuid 10624890_1.4.2.3.1
149 14:13:17.805740 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 14:13:17.805973 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 14:13:17.806047 Using /lava-10624890 at stage 1
153 14:13:17.806333 uuid=10624890_1.4.2.3.5 testdef=None
154 14:13:17.806423 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 14:13:17.806510 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 14:13:17.806982 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 14:13:17.807202 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 14:13:17.807851 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 14:13:17.808122 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 14:13:17.808752 runner path: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/1/tests/1_bootrr test_uuid 10624890_1.4.2.3.5
163 14:13:17.808902 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 14:13:17.809110 Creating lava-test-runner.conf files
166 14:13:17.809175 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/0 for stage 0
167 14:13:17.809264 - 0_dmesg
168 14:13:17.809347 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624890/lava-overlay-6obwsfkh/lava-10624890/1 for stage 1
169 14:13:17.809439 - 1_bootrr
170 14:13:17.809534 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 14:13:17.809625 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 14:13:17.817879 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 14:13:17.817986 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 14:13:17.818074 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 14:13:17.818161 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 14:13:17.818271 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 14:13:18.062843 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 14:13:18.063213 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 14:13:18.063332 extracting modules file /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624890/extract-overlay-ramdisk-gknhd199/ramdisk
180 14:13:18.076488 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 14:13:18.076634 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 14:13:18.076753 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624890/compress-overlay-lfblswff/overlay-1.4.2.4.tar.gz to ramdisk
183 14:13:18.076844 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624890/compress-overlay-lfblswff/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624890/extract-overlay-ramdisk-gknhd199/ramdisk
184 14:13:18.085485 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 14:13:18.085633 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 14:13:18.085730 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 14:13:18.085825 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 14:13:18.085908 Building ramdisk /var/lib/lava/dispatcher/tmp/10624890/extract-overlay-ramdisk-gknhd199/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624890/extract-overlay-ramdisk-gknhd199/ramdisk
189 14:13:18.224016 >> 49827 blocks
190 14:13:19.068415 rename /var/lib/lava/dispatcher/tmp/10624890/extract-overlay-ramdisk-gknhd199/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
191 14:13:19.068834 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 14:13:19.068966 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 14:13:19.069066 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 14:13:19.069166 No mkimage arch provided, not using FIT.
195 14:13:19.069277 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 14:13:19.069379 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 14:13:19.069498 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 14:13:19.069629 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 14:13:19.069782 No LXC device requested
200 14:13:19.069868 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 14:13:19.069981 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 14:13:19.070063 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 14:13:19.070139 Checking files for TFTP limit of 4294967296 bytes.
204 14:13:19.070576 end: 1 tftp-deploy (duration 00:00:01) [common]
205 14:13:19.070679 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 14:13:19.070770 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 14:13:19.070911 substitutions:
208 14:13:19.070995 - {DTB}: None
209 14:13:19.071059 - {INITRD}: 10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
210 14:13:19.071137 - {KERNEL}: 10624890/tftp-deploy-l3u6t90z/kernel/bzImage
211 14:13:19.071198 - {LAVA_MAC}: None
212 14:13:19.071257 - {PRESEED_CONFIG}: None
213 14:13:19.071316 - {PRESEED_LOCAL}: None
214 14:13:19.071375 - {RAMDISK}: 10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
215 14:13:19.071446 - {ROOT_PART}: None
216 14:13:19.071502 - {ROOT}: None
217 14:13:19.071559 - {SERVER_IP}: 192.168.201.1
218 14:13:19.071614 - {TEE}: None
219 14:13:19.071670 Parsed boot commands:
220 14:13:19.071726 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 14:13:19.071942 Parsed boot commands: tftpboot 192.168.201.1 10624890/tftp-deploy-l3u6t90z/kernel/bzImage 10624890/tftp-deploy-l3u6t90z/kernel/cmdline 10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
222 14:13:19.072033 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 14:13:19.072121 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 14:13:19.072213 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 14:13:19.072304 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 14:13:19.072379 Not connected, no need to disconnect.
227 14:13:19.072456 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 14:13:19.072660 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 14:13:19.072744 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
230 14:13:19.076163 Setting prompt string to ['lava-test: # ']
231 14:13:19.076504 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 14:13:19.076613 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 14:13:19.076708 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 14:13:19.076830 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 14:13:19.077023 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
236 14:13:24.210882 >> Command sent successfully.
237 14:13:24.213342 Returned 0 in 5 seconds
238 14:13:24.313747 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 14:13:24.314184 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 14:13:24.314289 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 14:13:24.314377 Setting prompt string to 'Starting depthcharge on Voema...'
243 14:13:24.314448 Changing prompt to 'Starting depthcharge on Voema...'
244 14:13:24.314519 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
245 14:13:24.314769 [Enter `^Ec?' for help]
246 14:13:25.879853
247 14:13:25.880021
248 14:13:25.889832 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
249 14:13:25.893403 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
250 14:13:25.900270 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
251 14:13:25.903814 CPU: AES supported, TXT NOT supported, VT supported
252 14:13:25.910556 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
253 14:13:25.916999 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
254 14:13:25.920017 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
255 14:13:25.923379 VBOOT: Loading verstage.
256 14:13:25.926674 FMAP: Found "FLASH" version 1.1 at 0x1804000.
257 14:13:25.933294 FMAP: base = 0x0 size = 0x2000000 #areas = 32
258 14:13:25.936309 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
259 14:13:25.947247 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
260 14:13:25.954036 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
261 14:13:25.954168
262 14:13:25.954266
263 14:13:25.967146 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
264 14:13:25.980835 Probing TPM: . done!
265 14:13:25.984218 TPM ready after 0 ms
266 14:13:25.987302 Connected to device vid:did:rid of 1ae0:0028:00
267 14:13:25.998412 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
268 14:13:26.005411 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
269 14:13:26.008752 Initialized TPM device CR50 revision 0
270 14:13:26.071376 tlcl_send_startup: Startup return code is 0
271 14:13:26.071523 TPM: setup succeeded
272 14:13:26.086924 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
273 14:13:26.102389 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
274 14:13:26.115870 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
275 14:13:26.126006 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
276 14:13:26.129699 Chrome EC: UHEPI supported
277 14:13:26.133227 Phase 1
278 14:13:26.136347 FMAP: area GBB found @ 1805000 (458752 bytes)
279 14:13:26.146249 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
280 14:13:26.152708 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
281 14:13:26.160243 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
282 14:13:26.166677 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
283 14:13:26.169920 Recovery requested (1009000e)
284 14:13:26.173450 TPM: Extending digest for VBOOT: boot mode into PCR 0
285 14:13:26.184923 tlcl_extend: response is 0
286 14:13:26.191159 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
287 14:13:26.201129 tlcl_extend: response is 0
288 14:13:26.207642 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
289 14:13:26.214361 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
290 14:13:26.221089 BS: verstage times (exec / console): total (unknown) / 142 ms
291 14:13:26.221182
292 14:13:26.221254
293 14:13:26.234056 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
294 14:13:26.240539 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
295 14:13:26.243835 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
296 14:13:26.247349 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
297 14:13:26.254169 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
298 14:13:26.257185 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
299 14:13:26.260615 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
300 14:13:26.263731 TCO_STS: 0000 0000
301 14:13:26.267355 GEN_PMCON: d0015038 00002200
302 14:13:26.270535 GBLRST_CAUSE: 00000000 00000000
303 14:13:26.270626 HPR_CAUSE0: 00000000
304 14:13:26.273817 prev_sleep_state 5
305 14:13:26.277287 Boot Count incremented to 19945
306 14:13:26.283801 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
307 14:13:26.290543 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
308 14:13:26.300430 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
309 14:13:26.306906 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
310 14:13:26.310691 Chrome EC: UHEPI supported
311 14:13:26.316945 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
312 14:13:26.328559 Probing TPM: done!
313 14:13:26.335193 Connected to device vid:did:rid of 1ae0:0028:00
314 14:13:26.344811 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
315 14:13:26.348374 Initialized TPM device CR50 revision 0
316 14:13:26.363354 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 14:13:26.369672 MRC: Hash idx 0x100b comparison successful.
318 14:13:26.372902 MRC cache found, size faa8
319 14:13:26.373006 bootmode is set to: 2
320 14:13:26.376297 SPD index = 0
321 14:13:26.383021 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
322 14:13:26.386364 SPD: module type is LPDDR4X
323 14:13:26.389826 SPD: module part number is MT53E512M64D4NW-046
324 14:13:26.396278 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
325 14:13:26.403074 SPD: device width 16 bits, bus width 16 bits
326 14:13:26.406176 SPD: module size is 1024 MB (per channel)
327 14:13:26.839047 CBMEM:
328 14:13:26.842364 IMD: root @ 0x76fff000 254 entries.
329 14:13:26.845380 IMD: root @ 0x76ffec00 62 entries.
330 14:13:26.848881 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
331 14:13:26.855654 FMAP: area RW_VPD found @ f35000 (8192 bytes)
332 14:13:26.859276 External stage cache:
333 14:13:26.862133 IMD: root @ 0x7b3ff000 254 entries.
334 14:13:26.865386 IMD: root @ 0x7b3fec00 62 entries.
335 14:13:26.880896 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 14:13:26.887265 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
337 14:13:26.893632 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
338 14:13:26.907829 MRC: 'RECOVERY_MRC_CACHE' does not need update.
339 14:13:26.914564 cse_lite: Skip switching to RW in the recovery path
340 14:13:26.914691 8 DIMMs found
341 14:13:26.914770 SMM Memory Map
342 14:13:26.920940 SMRAM : 0x7b000000 0x800000
343 14:13:26.924535 Subregion 0: 0x7b000000 0x200000
344 14:13:26.927728 Subregion 1: 0x7b200000 0x200000
345 14:13:26.931190 Subregion 2: 0x7b400000 0x400000
346 14:13:26.931293 top_of_ram = 0x77000000
347 14:13:26.937554 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
348 14:13:26.944453 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
349 14:13:26.947733 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
350 14:13:26.954186 MTRR Range: Start=ff000000 End=0 (Size 1000000)
351 14:13:26.960634 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
352 14:13:26.967131 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
353 14:13:26.977751 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
354 14:13:26.984350 Processing 211 relocs. Offset value of 0x74c0b000
355 14:13:26.990683 BS: romstage times (exec / console): total (unknown) / 277 ms
356 14:13:26.996447
357 14:13:26.996561
358 14:13:27.006725 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
359 14:13:27.010244 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
360 14:13:27.019861 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
361 14:13:27.026521 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
362 14:13:27.033199 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
363 14:13:27.039749 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
364 14:13:27.086628 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
365 14:13:27.093269 Processing 5008 relocs. Offset value of 0x75d98000
366 14:13:27.097220 BS: postcar times (exec / console): total (unknown) / 59 ms
367 14:13:27.097338
368 14:13:27.097468
369 14:13:27.110075 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
370 14:13:27.110200 Normal boot
371 14:13:27.113368 FW_CONFIG value is 0x804c02
372 14:13:27.116777 PCI: 00:07.0 disabled by fw_config
373 14:13:27.120141 PCI: 00:07.1 disabled by fw_config
374 14:13:27.123314 PCI: 00:0d.2 disabled by fw_config
375 14:13:27.126743 PCI: 00:1c.7 disabled by fw_config
376 14:13:27.133779 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 14:13:27.140096 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 14:13:27.143713 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
379 14:13:27.146822 GENERIC: 0.0 disabled by fw_config
380 14:13:27.149914 GENERIC: 1.0 disabled by fw_config
381 14:13:27.156487 fw_config match found: DB_USB=USB3_ACTIVE
382 14:13:27.160165 fw_config match found: DB_USB=USB3_ACTIVE
383 14:13:27.163065 fw_config match found: DB_USB=USB3_ACTIVE
384 14:13:27.166431 fw_config match found: DB_USB=USB3_ACTIVE
385 14:13:27.173191 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
386 14:13:27.179771 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
387 14:13:27.189835 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
388 14:13:27.196718 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 14:13:27.199797 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 14:13:27.206316 microcode: Update skipped, already up-to-date
391 14:13:27.212960 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 14:13:27.240355 Detected 4 core, 8 thread CPU.
393 14:13:27.243489 Setting up SMI for CPU
394 14:13:27.246884 IED base = 0x7b400000
395 14:13:27.246977 IED size = 0x00400000
396 14:13:27.250062 Will perform SMM setup.
397 14:13:27.256877 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 14:13:27.263603 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 14:13:27.270068 Processing 16 relocs. Offset value of 0x00030000
400 14:13:27.273310 Attempting to start 7 APs
401 14:13:27.276661 Waiting for 10ms after sending INIT.
402 14:13:27.292516 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 14:13:27.295539 AP: slot 2 apic_id 3.
404 14:13:27.298797 AP: slot 6 apic_id 2.
405 14:13:27.298884 AP: slot 4 apic_id 7.
406 14:13:27.302582 AP: slot 5 apic_id 6.
407 14:13:27.302672 done.
408 14:13:27.305948 AP: slot 3 apic_id 5.
409 14:13:27.306042 AP: slot 7 apic_id 4.
410 14:13:27.312488 Waiting for 2nd SIPI to complete...done.
411 14:13:27.318835 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 14:13:27.325762 Processing 13 relocs. Offset value of 0x00038000
413 14:13:27.325853 Unable to locate Global NVS
414 14:13:27.335474 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 14:13:27.339004 Installing permanent SMM handler to 0x7b000000
416 14:13:27.348867 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 14:13:27.352140 Processing 794 relocs. Offset value of 0x7b010000
418 14:13:27.362157 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 14:13:27.365449 Processing 13 relocs. Offset value of 0x7b008000
420 14:13:27.372186 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 14:13:27.378688 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 14:13:27.381973 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 14:13:27.388701 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 14:13:27.395476 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 14:13:27.401655 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 14:13:27.408343 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 14:13:27.408429 Unable to locate Global NVS
428 14:13:27.418342 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 14:13:27.421869 Clearing SMI status registers
430 14:13:27.421954 SMI_STS: PM1
431 14:13:27.424790 PM1_STS: PWRBTN
432 14:13:27.431442 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 14:13:27.435146 In relocation handler: CPU 0
434 14:13:27.438489 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 14:13:27.444824 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 14:13:27.444911 Relocation complete.
437 14:13:27.455049 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 14:13:27.455136 In relocation handler: CPU 1
439 14:13:27.461559 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
440 14:13:27.461647 Relocation complete.
441 14:13:27.471257 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
442 14:13:27.471345 In relocation handler: CPU 7
443 14:13:27.477949 New SMBASE=0x7affe400 IEDBASE=0x7b400000
444 14:13:27.481237 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 14:13:27.484524 Relocation complete.
446 14:13:27.491398 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 14:13:27.494868 In relocation handler: CPU 3
448 14:13:27.497692 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 14:13:27.501092 Relocation complete.
450 14:13:27.507668 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
451 14:13:27.510975 In relocation handler: CPU 5
452 14:13:27.514329 New SMBASE=0x7affec00 IEDBASE=0x7b400000
453 14:13:27.520775 Writing SMRR. base = 0x7b000006, mask=0xff800c00
454 14:13:27.520860 Relocation complete.
455 14:13:27.527602 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
456 14:13:27.530650 In relocation handler: CPU 4
457 14:13:27.537507 New SMBASE=0x7afff000 IEDBASE=0x7b400000
458 14:13:27.537594 Relocation complete.
459 14:13:27.543872 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
460 14:13:27.547699 In relocation handler: CPU 6
461 14:13:27.554064 New SMBASE=0x7affe800 IEDBASE=0x7b400000
462 14:13:27.557109 Writing SMRR. base = 0x7b000006, mask=0xff800c00
463 14:13:27.560642 Relocation complete.
464 14:13:27.568476 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
465 14:13:27.568564 In relocation handler: CPU 2
466 14:13:27.575187 New SMBASE=0x7afff800 IEDBASE=0x7b400000
467 14:13:27.575274 Relocation complete.
468 14:13:27.578522 Initializing CPU #0
469 14:13:27.581680 CPU: vendor Intel device 806c1
470 14:13:27.585088 CPU: family 06, model 8c, stepping 01
471 14:13:27.588735 Clearing out pending MCEs
472 14:13:27.592150 Setting up local APIC...
473 14:13:27.592236 apic_id: 0x00 done.
474 14:13:27.595630 Turbo is available but hidden
475 14:13:27.598662 Turbo is available and visible
476 14:13:27.605015 microcode: Update skipped, already up-to-date
477 14:13:27.605101 CPU #0 initialized
478 14:13:27.608176 Initializing CPU #4
479 14:13:27.608261 Initializing CPU #1
480 14:13:27.611762 Initializing CPU #5
481 14:13:27.615195 CPU: vendor Intel device 806c1
482 14:13:27.618331 CPU: family 06, model 8c, stepping 01
483 14:13:27.621708 CPU: vendor Intel device 806c1
484 14:13:27.625129 CPU: family 06, model 8c, stepping 01
485 14:13:27.628137 Clearing out pending MCEs
486 14:13:27.631575 Clearing out pending MCEs
487 14:13:27.635127 Setting up local APIC...
488 14:13:27.635213 Initializing CPU #6
489 14:13:27.638463 Initializing CPU #2
490 14:13:27.641682 CPU: vendor Intel device 806c1
491 14:13:27.644753 CPU: family 06, model 8c, stepping 01
492 14:13:27.648165 CPU: vendor Intel device 806c1
493 14:13:27.651434 CPU: family 06, model 8c, stepping 01
494 14:13:27.655016 Clearing out pending MCEs
495 14:13:27.658097 Clearing out pending MCEs
496 14:13:27.658182 Setting up local APIC...
497 14:13:27.661357 Initializing CPU #3
498 14:13:27.664793 Initializing CPU #7
499 14:13:27.668024 CPU: vendor Intel device 806c1
500 14:13:27.671189 CPU: family 06, model 8c, stepping 01
501 14:13:27.674671 CPU: vendor Intel device 806c1
502 14:13:27.677854 CPU: family 06, model 8c, stepping 01
503 14:13:27.681230 Clearing out pending MCEs
504 14:13:27.681318 Clearing out pending MCEs
505 14:13:27.684609 Setting up local APIC...
506 14:13:27.687720 Setting up local APIC...
507 14:13:27.691242 apic_id: 0x07 done.
508 14:13:27.691328 Setting up local APIC...
509 14:13:27.694728 apic_id: 0x05 done.
510 14:13:27.698091 Setting up local APIC...
511 14:13:27.698176 apic_id: 0x03 done.
512 14:13:27.700995 apic_id: 0x02 done.
513 14:13:27.704457 microcode: Update skipped, already up-to-date
514 14:13:27.708206 CPU: vendor Intel device 806c1
515 14:13:27.714564 CPU: family 06, model 8c, stepping 01
516 14:13:27.714649 CPU #2 initialized
517 14:13:27.717709 microcode: Update skipped, already up-to-date
518 14:13:27.724208 microcode: Update skipped, already up-to-date
519 14:13:27.727741 apic_id: 0x06 done.
520 14:13:27.727827 CPU #4 initialized
521 14:13:27.730939 microcode: Update skipped, already up-to-date
522 14:13:27.734378 CPU #6 initialized
523 14:13:27.737754 CPU #5 initialized
524 14:13:27.737841 Clearing out pending MCEs
525 14:13:27.744374 microcode: Update skipped, already up-to-date
526 14:13:27.744462 apic_id: 0x04 done.
527 14:13:27.747691 CPU #3 initialized
528 14:13:27.751084 microcode: Update skipped, already up-to-date
529 14:13:27.754271 Setting up local APIC...
530 14:13:27.757630 CPU #7 initialized
531 14:13:27.757716 apic_id: 0x01 done.
532 14:13:27.764705 microcode: Update skipped, already up-to-date
533 14:13:27.767381 CPU #1 initialized
534 14:13:27.770979 bsp_do_flight_plan done after 455 msecs.
535 14:13:27.774213 CPU: frequency set to 4000 MHz
536 14:13:27.774300 Enabling SMIs.
537 14:13:27.780906 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
538 14:13:27.797196 SATAXPCIE1 indicates PCIe NVMe is present
539 14:13:27.800619 Probing TPM: done!
540 14:13:27.803567 Connected to device vid:did:rid of 1ae0:0028:00
541 14:13:27.814324 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
542 14:13:27.818232 Initialized TPM device CR50 revision 0
543 14:13:27.821634 Enabling S0i3.4
544 14:13:27.827790 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
545 14:13:27.831169 Found a VBT of 8704 bytes after decompression
546 14:13:27.837951 cse_lite: CSE RO boot. HybridStorageMode disabled
547 14:13:27.844149 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
548 14:13:27.920642 FSPS returned 0
549 14:13:27.924115 Executing Phase 1 of FspMultiPhaseSiInit
550 14:13:27.934175 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
551 14:13:27.937281 port C0 DISC req: usage 1 usb3 1 usb2 5
552 14:13:27.940618 Raw Buffer output 0 00000511
553 14:13:27.943709 Raw Buffer output 1 00000000
554 14:13:27.947780 pmc_send_ipc_cmd succeeded
555 14:13:27.954355 port C1 DISC req: usage 1 usb3 2 usb2 3
556 14:13:27.954528 Raw Buffer output 0 00000321
557 14:13:27.957946 Raw Buffer output 1 00000000
558 14:13:27.962206 pmc_send_ipc_cmd succeeded
559 14:13:27.967231 Detected 4 core, 8 thread CPU.
560 14:13:27.970364 Detected 4 core, 8 thread CPU.
561 14:13:28.204679 Display FSP Version Info HOB
562 14:13:28.207783 Reference Code - CPU = a.0.4c.31
563 14:13:28.211353 uCode Version = 0.0.0.86
564 14:13:28.214812 TXT ACM version = ff.ff.ff.ffff
565 14:13:28.218033 Reference Code - ME = a.0.4c.31
566 14:13:28.221225 MEBx version = 0.0.0.0
567 14:13:28.224852 ME Firmware Version = Consumer SKU
568 14:13:28.227922 Reference Code - PCH = a.0.4c.31
569 14:13:28.231425 PCH-CRID Status = Disabled
570 14:13:28.234377 PCH-CRID Original Value = ff.ff.ff.ffff
571 14:13:28.237601 PCH-CRID New Value = ff.ff.ff.ffff
572 14:13:28.241089 OPROM - RST - RAID = ff.ff.ff.ffff
573 14:13:28.244668 PCH Hsio Version = 4.0.0.0
574 14:13:28.247831 Reference Code - SA - System Agent = a.0.4c.31
575 14:13:28.250972 Reference Code - MRC = 2.0.0.1
576 14:13:28.254266 SA - PCIe Version = a.0.4c.31
577 14:13:28.257732 SA-CRID Status = Disabled
578 14:13:28.260846 SA-CRID Original Value = 0.0.0.1
579 14:13:28.264259 SA-CRID New Value = 0.0.0.1
580 14:13:28.267751 OPROM - VBIOS = ff.ff.ff.ffff
581 14:13:28.270810 IO Manageability Engine FW Version = 11.1.4.0
582 14:13:28.274462 PHY Build Version = 0.0.0.e0
583 14:13:28.277567 Thunderbolt(TM) FW Version = 0.0.0.0
584 14:13:28.284151 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
585 14:13:28.287824 ITSS IRQ Polarities Before:
586 14:13:28.288291 IPC0: 0xffffffff
587 14:13:28.290920 IPC1: 0xffffffff
588 14:13:28.291286 IPC2: 0xffffffff
589 14:13:28.294526 IPC3: 0xffffffff
590 14:13:28.297548 ITSS IRQ Polarities After:
591 14:13:28.297917 IPC0: 0xffffffff
592 14:13:28.301065 IPC1: 0xffffffff
593 14:13:28.301432 IPC2: 0xffffffff
594 14:13:28.304190 IPC3: 0xffffffff
595 14:13:28.307755 Found PCIe Root Port #9 at PCI: 00:1d.0.
596 14:13:28.320923 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
597 14:13:28.330903 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
598 14:13:28.343979 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
599 14:13:28.350738 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
600 14:13:28.351152 Enumerating buses...
601 14:13:28.357390 Show all devs... Before device enumeration.
602 14:13:28.360695 Root Device: enabled 1
603 14:13:28.361105 DOMAIN: 0000: enabled 1
604 14:13:28.363810 CPU_CLUSTER: 0: enabled 1
605 14:13:28.367488 PCI: 00:00.0: enabled 1
606 14:13:28.370819 PCI: 00:02.0: enabled 1
607 14:13:28.371225 PCI: 00:04.0: enabled 1
608 14:13:28.373941 PCI: 00:05.0: enabled 1
609 14:13:28.377543 PCI: 00:06.0: enabled 0
610 14:13:28.377949 PCI: 00:07.0: enabled 0
611 14:13:28.380671 PCI: 00:07.1: enabled 0
612 14:13:28.383803 PCI: 00:07.2: enabled 0
613 14:13:28.387642 PCI: 00:07.3: enabled 0
614 14:13:28.388145 PCI: 00:08.0: enabled 1
615 14:13:28.390485 PCI: 00:09.0: enabled 0
616 14:13:28.393646 PCI: 00:0a.0: enabled 0
617 14:13:28.397055 PCI: 00:0d.0: enabled 1
618 14:13:28.397463 PCI: 00:0d.1: enabled 0
619 14:13:28.400627 PCI: 00:0d.2: enabled 0
620 14:13:28.404224 PCI: 00:0d.3: enabled 0
621 14:13:28.407417 PCI: 00:0e.0: enabled 0
622 14:13:28.407825 PCI: 00:10.2: enabled 1
623 14:13:28.410816 PCI: 00:10.6: enabled 0
624 14:13:28.414031 PCI: 00:10.7: enabled 0
625 14:13:28.414441 PCI: 00:12.0: enabled 0
626 14:13:28.417288 PCI: 00:12.6: enabled 0
627 14:13:28.420550 PCI: 00:13.0: enabled 0
628 14:13:28.423745 PCI: 00:14.0: enabled 1
629 14:13:28.424205 PCI: 00:14.1: enabled 0
630 14:13:28.427214 PCI: 00:14.2: enabled 1
631 14:13:28.430546 PCI: 00:14.3: enabled 1
632 14:13:28.433609 PCI: 00:15.0: enabled 1
633 14:13:28.434017 PCI: 00:15.1: enabled 1
634 14:13:28.436973 PCI: 00:15.2: enabled 1
635 14:13:28.440285 PCI: 00:15.3: enabled 1
636 14:13:28.443636 PCI: 00:16.0: enabled 1
637 14:13:28.444158 PCI: 00:16.1: enabled 0
638 14:13:28.447270 PCI: 00:16.2: enabled 0
639 14:13:28.450436 PCI: 00:16.3: enabled 0
640 14:13:28.453508 PCI: 00:16.4: enabled 0
641 14:13:28.453912 PCI: 00:16.5: enabled 0
642 14:13:28.457277 PCI: 00:17.0: enabled 1
643 14:13:28.460312 PCI: 00:19.0: enabled 0
644 14:13:28.460715 PCI: 00:19.1: enabled 1
645 14:13:28.463802 PCI: 00:19.2: enabled 0
646 14:13:28.467118 PCI: 00:1c.0: enabled 1
647 14:13:28.470224 PCI: 00:1c.1: enabled 0
648 14:13:28.470625 PCI: 00:1c.2: enabled 0
649 14:13:28.473765 PCI: 00:1c.3: enabled 0
650 14:13:28.477095 PCI: 00:1c.4: enabled 0
651 14:13:28.480285 PCI: 00:1c.5: enabled 0
652 14:13:28.480684 PCI: 00:1c.6: enabled 1
653 14:13:28.483765 PCI: 00:1c.7: enabled 0
654 14:13:28.486915 PCI: 00:1d.0: enabled 1
655 14:13:28.490723 PCI: 00:1d.1: enabled 0
656 14:13:28.491253 PCI: 00:1d.2: enabled 1
657 14:13:28.493759 PCI: 00:1d.3: enabled 0
658 14:13:28.496748 PCI: 00:1e.0: enabled 1
659 14:13:28.497154 PCI: 00:1e.1: enabled 0
660 14:13:28.500341 PCI: 00:1e.2: enabled 1
661 14:13:28.503446 PCI: 00:1e.3: enabled 1
662 14:13:28.507212 PCI: 00:1f.0: enabled 1
663 14:13:28.507732 PCI: 00:1f.1: enabled 0
664 14:13:28.510293 PCI: 00:1f.2: enabled 1
665 14:13:28.513641 PCI: 00:1f.3: enabled 1
666 14:13:28.516683 PCI: 00:1f.4: enabled 0
667 14:13:28.517087 PCI: 00:1f.5: enabled 1
668 14:13:28.520460 PCI: 00:1f.6: enabled 0
669 14:13:28.523651 PCI: 00:1f.7: enabled 0
670 14:13:28.524083 APIC: 00: enabled 1
671 14:13:28.526584 GENERIC: 0.0: enabled 1
672 14:13:28.530400 GENERIC: 0.0: enabled 1
673 14:13:28.533559 GENERIC: 1.0: enabled 1
674 14:13:28.533970 GENERIC: 0.0: enabled 1
675 14:13:28.536817 GENERIC: 1.0: enabled 1
676 14:13:28.539994 USB0 port 0: enabled 1
677 14:13:28.543385 GENERIC: 0.0: enabled 1
678 14:13:28.543788 USB0 port 0: enabled 1
679 14:13:28.546826 GENERIC: 0.0: enabled 1
680 14:13:28.550008 I2C: 00:1a: enabled 1
681 14:13:28.550412 I2C: 00:31: enabled 1
682 14:13:28.553592 I2C: 00:32: enabled 1
683 14:13:28.556735 I2C: 00:10: enabled 1
684 14:13:28.557135 I2C: 00:15: enabled 1
685 14:13:28.560299 GENERIC: 0.0: enabled 0
686 14:13:28.563411 GENERIC: 1.0: enabled 0
687 14:13:28.567028 GENERIC: 0.0: enabled 1
688 14:13:28.567428 SPI: 00: enabled 1
689 14:13:28.570360 SPI: 00: enabled 1
690 14:13:28.570760 PNP: 0c09.0: enabled 1
691 14:13:28.573442 GENERIC: 0.0: enabled 1
692 14:13:28.576570 USB3 port 0: enabled 1
693 14:13:28.579838 USB3 port 1: enabled 1
694 14:13:28.580267 USB3 port 2: enabled 0
695 14:13:28.583459 USB3 port 3: enabled 0
696 14:13:28.586645 USB2 port 0: enabled 0
697 14:13:28.587161 USB2 port 1: enabled 1
698 14:13:28.590084 USB2 port 2: enabled 1
699 14:13:28.593084 USB2 port 3: enabled 0
700 14:13:28.596739 USB2 port 4: enabled 1
701 14:13:28.597143 USB2 port 5: enabled 0
702 14:13:28.599793 USB2 port 6: enabled 0
703 14:13:28.603755 USB2 port 7: enabled 0
704 14:13:28.604310 USB2 port 8: enabled 0
705 14:13:28.606522 USB2 port 9: enabled 0
706 14:13:28.610091 USB3 port 0: enabled 0
707 14:13:28.613512 USB3 port 1: enabled 1
708 14:13:28.614103 USB3 port 2: enabled 0
709 14:13:28.616595 USB3 port 3: enabled 0
710 14:13:28.619748 GENERIC: 0.0: enabled 1
711 14:13:28.620174 GENERIC: 1.0: enabled 1
712 14:13:28.623115 APIC: 01: enabled 1
713 14:13:28.626970 APIC: 03: enabled 1
714 14:13:28.627505 APIC: 05: enabled 1
715 14:13:28.629720 APIC: 07: enabled 1
716 14:13:28.633358 APIC: 06: enabled 1
717 14:13:28.633765 APIC: 02: enabled 1
718 14:13:28.636264 APIC: 04: enabled 1
719 14:13:28.636664 Compare with tree...
720 14:13:28.639568 Root Device: enabled 1
721 14:13:28.642933 DOMAIN: 0000: enabled 1
722 14:13:28.646608 PCI: 00:00.0: enabled 1
723 14:13:28.647178 PCI: 00:02.0: enabled 1
724 14:13:28.649525 PCI: 00:04.0: enabled 1
725 14:13:28.653091 GENERIC: 0.0: enabled 1
726 14:13:28.656176 PCI: 00:05.0: enabled 1
727 14:13:28.659437 PCI: 00:06.0: enabled 0
728 14:13:28.659868 PCI: 00:07.0: enabled 0
729 14:13:28.662808 GENERIC: 0.0: enabled 1
730 14:13:28.666067 PCI: 00:07.1: enabled 0
731 14:13:28.669752 GENERIC: 1.0: enabled 1
732 14:13:28.672781 PCI: 00:07.2: enabled 0
733 14:13:28.676116 GENERIC: 0.0: enabled 1
734 14:13:28.676651 PCI: 00:07.3: enabled 0
735 14:13:28.679734 GENERIC: 1.0: enabled 1
736 14:13:28.682828 PCI: 00:08.0: enabled 1
737 14:13:28.686128 PCI: 00:09.0: enabled 0
738 14:13:28.689856 PCI: 00:0a.0: enabled 0
739 14:13:28.690350 PCI: 00:0d.0: enabled 1
740 14:13:28.693248 USB0 port 0: enabled 1
741 14:13:28.696054 USB3 port 0: enabled 1
742 14:13:28.699507 USB3 port 1: enabled 1
743 14:13:28.702721 USB3 port 2: enabled 0
744 14:13:28.703129 USB3 port 3: enabled 0
745 14:13:28.706263 PCI: 00:0d.1: enabled 0
746 14:13:28.709234 PCI: 00:0d.2: enabled 0
747 14:13:28.712457 GENERIC: 0.0: enabled 1
748 14:13:28.716191 PCI: 00:0d.3: enabled 0
749 14:13:28.716737 PCI: 00:0e.0: enabled 0
750 14:13:28.719022 PCI: 00:10.2: enabled 1
751 14:13:28.722652 PCI: 00:10.6: enabled 0
752 14:13:28.725831 PCI: 00:10.7: enabled 0
753 14:13:28.729628 PCI: 00:12.0: enabled 0
754 14:13:28.730177 PCI: 00:12.6: enabled 0
755 14:13:28.732589 PCI: 00:13.0: enabled 0
756 14:13:28.735614 PCI: 00:14.0: enabled 1
757 14:13:28.739162 USB0 port 0: enabled 1
758 14:13:28.742502 USB2 port 0: enabled 0
759 14:13:28.742948 USB2 port 1: enabled 1
760 14:13:28.745772 USB2 port 2: enabled 1
761 14:13:28.749739 USB2 port 3: enabled 0
762 14:13:28.752665 USB2 port 4: enabled 1
763 14:13:28.755640 USB2 port 5: enabled 0
764 14:13:28.759078 USB2 port 6: enabled 0
765 14:13:28.759543 USB2 port 7: enabled 0
766 14:13:28.762305 USB2 port 8: enabled 0
767 14:13:28.765569 USB2 port 9: enabled 0
768 14:13:28.768817 USB3 port 0: enabled 0
769 14:13:28.772029 USB3 port 1: enabled 1
770 14:13:28.775476 USB3 port 2: enabled 0
771 14:13:28.775916 USB3 port 3: enabled 0
772 14:13:28.778954 PCI: 00:14.1: enabled 0
773 14:13:28.782267 PCI: 00:14.2: enabled 1
774 14:13:28.785428 PCI: 00:14.3: enabled 1
775 14:13:28.788903 GENERIC: 0.0: enabled 1
776 14:13:28.789445 PCI: 00:15.0: enabled 1
777 14:13:28.792168 I2C: 00:1a: enabled 1
778 14:13:28.795456 I2C: 00:31: enabled 1
779 14:13:28.798912 I2C: 00:32: enabled 1
780 14:13:28.799341 PCI: 00:15.1: enabled 1
781 14:13:28.802096 I2C: 00:10: enabled 1
782 14:13:28.805220 PCI: 00:15.2: enabled 1
783 14:13:28.809454 PCI: 00:15.3: enabled 1
784 14:13:28.813133 PCI: 00:16.0: enabled 1
785 14:13:28.813669 PCI: 00:16.1: enabled 0
786 14:13:28.816705 PCI: 00:16.2: enabled 0
787 14:13:28.820174 PCI: 00:16.3: enabled 0
788 14:13:28.820737 PCI: 00:16.4: enabled 0
789 14:13:28.823243 PCI: 00:16.5: enabled 0
790 14:13:28.826427 PCI: 00:17.0: enabled 1
791 14:13:28.829782 PCI: 00:19.0: enabled 0
792 14:13:28.833081 PCI: 00:19.1: enabled 1
793 14:13:28.833517 I2C: 00:15: enabled 1
794 14:13:28.883416 PCI: 00:19.2: enabled 0
795 14:13:28.884057 PCI: 00:1d.0: enabled 1
796 14:13:28.884987 GENERIC: 0.0: enabled 1
797 14:13:28.885390 PCI: 00:1e.0: enabled 1
798 14:13:28.885752 PCI: 00:1e.1: enabled 0
799 14:13:28.886066 PCI: 00:1e.2: enabled 1
800 14:13:28.886366 SPI: 00: enabled 1
801 14:13:28.886660 PCI: 00:1e.3: enabled 1
802 14:13:28.886948 SPI: 00: enabled 1
803 14:13:28.887232 PCI: 00:1f.0: enabled 1
804 14:13:28.887518 PNP: 0c09.0: enabled 1
805 14:13:28.887802 PCI: 00:1f.1: enabled 0
806 14:13:28.888142 PCI: 00:1f.2: enabled 1
807 14:13:28.888429 GENERIC: 0.0: enabled 1
808 14:13:28.888776 GENERIC: 0.0: enabled 1
809 14:13:28.889074 GENERIC: 1.0: enabled 1
810 14:13:28.889359 PCI: 00:1f.3: enabled 1
811 14:13:28.889642 PCI: 00:1f.4: enabled 0
812 14:13:28.889921 PCI: 00:1f.5: enabled 1
813 14:13:28.935011 PCI: 00:1f.6: enabled 0
814 14:13:28.935805 PCI: 00:1f.7: enabled 0
815 14:13:28.936714 CPU_CLUSTER: 0: enabled 1
816 14:13:28.937087 APIC: 00: enabled 1
817 14:13:28.937454 APIC: 01: enabled 1
818 14:13:28.937773 APIC: 03: enabled 1
819 14:13:28.938160 APIC: 05: enabled 1
820 14:13:28.938478 APIC: 07: enabled 1
821 14:13:28.938772 APIC: 06: enabled 1
822 14:13:28.939060 APIC: 02: enabled 1
823 14:13:28.939344 APIC: 04: enabled 1
824 14:13:28.939630 Root Device scanning...
825 14:13:28.939953 scan_static_bus for Root Device
826 14:13:28.940249 DOMAIN: 0000 enabled
827 14:13:28.940533 CPU_CLUSTER: 0 enabled
828 14:13:28.940862 DOMAIN: 0000 scanning...
829 14:13:28.941176 PCI: pci_scan_bus for bus 00
830 14:13:28.941524 PCI: 00:00.0 [8086/0000] ops
831 14:13:28.941828 PCI: 00:00.0 [8086/9a12] enabled
832 14:13:28.955086 PCI: 00:02.0 [8086/0000] bus ops
833 14:13:28.955534 PCI: 00:02.0 [8086/9a40] enabled
834 14:13:28.955922 PCI: 00:04.0 [8086/0000] bus ops
835 14:13:28.956255 PCI: 00:04.0 [8086/9a03] enabled
836 14:13:28.956857 PCI: 00:05.0 [8086/9a19] enabled
837 14:13:28.957186 PCI: 00:07.0 [0000/0000] hidden
838 14:13:28.958496 PCI: 00:08.0 [8086/9a11] enabled
839 14:13:28.961958 PCI: 00:0a.0 [8086/9a0d] disabled
840 14:13:28.965128 PCI: 00:0d.0 [8086/0000] bus ops
841 14:13:28.968417 PCI: 00:0d.0 [8086/9a13] enabled
842 14:13:28.971788 PCI: 00:14.0 [8086/0000] bus ops
843 14:13:28.975086 PCI: 00:14.0 [8086/a0ed] enabled
844 14:13:28.978903 PCI: 00:14.2 [8086/a0ef] enabled
845 14:13:28.981940 PCI: 00:14.3 [8086/0000] bus ops
846 14:13:28.985227 PCI: 00:14.3 [8086/a0f0] enabled
847 14:13:28.988419 PCI: 00:15.0 [8086/0000] bus ops
848 14:13:28.991942 PCI: 00:15.0 [8086/a0e8] enabled
849 14:13:28.995052 PCI: 00:15.1 [8086/0000] bus ops
850 14:13:28.998684 PCI: 00:15.1 [8086/a0e9] enabled
851 14:13:29.002165 PCI: 00:15.2 [8086/0000] bus ops
852 14:13:29.005091 PCI: 00:15.2 [8086/a0ea] enabled
853 14:13:29.008447 PCI: 00:15.3 [8086/0000] bus ops
854 14:13:29.011603 PCI: 00:15.3 [8086/a0eb] enabled
855 14:13:29.015030 PCI: 00:16.0 [8086/0000] ops
856 14:13:29.018118 PCI: 00:16.0 [8086/a0e0] enabled
857 14:13:29.021826 PCI: Static device PCI: 00:17.0 not found, disabling it.
858 14:13:29.024864 PCI: 00:19.0 [8086/0000] bus ops
859 14:13:29.028160 PCI: 00:19.0 [8086/a0c5] disabled
860 14:13:29.031604 PCI: 00:19.1 [8086/0000] bus ops
861 14:13:29.035087 PCI: 00:19.1 [8086/a0c6] enabled
862 14:13:29.038138 PCI: 00:1d.0 [8086/0000] bus ops
863 14:13:29.041331 PCI: 00:1d.0 [8086/a0b0] enabled
864 14:13:29.044767 PCI: 00:1e.0 [8086/0000] ops
865 14:13:29.048468 PCI: 00:1e.0 [8086/a0a8] enabled
866 14:13:29.051476 PCI: 00:1e.2 [8086/0000] bus ops
867 14:13:29.054668 PCI: 00:1e.2 [8086/a0aa] enabled
868 14:13:29.058263 PCI: 00:1e.3 [8086/0000] bus ops
869 14:13:29.061310 PCI: 00:1e.3 [8086/a0ab] enabled
870 14:13:29.064801 PCI: 00:1f.0 [8086/0000] bus ops
871 14:13:29.067955 PCI: 00:1f.0 [8086/a087] enabled
872 14:13:29.071381 RTC Init
873 14:13:29.074739 Set power on after power failure.
874 14:13:29.075181 Disabling Deep S3
875 14:13:29.078079 Disabling Deep S3
876 14:13:29.081061 Disabling Deep S4
877 14:13:29.081518 Disabling Deep S4
878 14:13:29.084718 Disabling Deep S5
879 14:13:29.085153 Disabling Deep S5
880 14:13:29.088040 PCI: 00:1f.2 [0000/0000] hidden
881 14:13:29.091232 PCI: 00:1f.3 [8086/0000] bus ops
882 14:13:29.094706 PCI: 00:1f.3 [8086/a0c8] enabled
883 14:13:29.097848 PCI: 00:1f.5 [8086/0000] bus ops
884 14:13:29.101424 PCI: 00:1f.5 [8086/a0a4] enabled
885 14:13:29.104436 PCI: Leftover static devices:
886 14:13:29.108041 PCI: 00:10.2
887 14:13:29.108474 PCI: 00:10.6
888 14:13:29.108811 PCI: 00:10.7
889 14:13:29.111089 PCI: 00:06.0
890 14:13:29.111520 PCI: 00:07.1
891 14:13:29.114730 PCI: 00:07.2
892 14:13:29.115158 PCI: 00:07.3
893 14:13:29.115496 PCI: 00:09.0
894 14:13:29.117887 PCI: 00:0d.1
895 14:13:29.118341 PCI: 00:0d.2
896 14:13:29.120943 PCI: 00:0d.3
897 14:13:29.121477 PCI: 00:0e.0
898 14:13:29.124671 PCI: 00:12.0
899 14:13:29.125197 PCI: 00:12.6
900 14:13:29.125538 PCI: 00:13.0
901 14:13:29.127816 PCI: 00:14.1
902 14:13:29.128284 PCI: 00:16.1
903 14:13:29.130970 PCI: 00:16.2
904 14:13:29.131399 PCI: 00:16.3
905 14:13:29.131739 PCI: 00:16.4
906 14:13:29.134559 PCI: 00:16.5
907 14:13:29.135046 PCI: 00:17.0
908 14:13:29.137422 PCI: 00:19.2
909 14:13:29.138011 PCI: 00:1e.1
910 14:13:29.138525 PCI: 00:1f.1
911 14:13:29.141512 PCI: 00:1f.4
912 14:13:29.142062 PCI: 00:1f.6
913 14:13:29.144372 PCI: 00:1f.7
914 14:13:29.147350 PCI: Check your devicetree.cb.
915 14:13:29.147782 PCI: 00:02.0 scanning...
916 14:13:29.154238 scan_generic_bus for PCI: 00:02.0
917 14:13:29.157608 scan_generic_bus for PCI: 00:02.0 done
918 14:13:29.161227 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
919 14:13:29.164211 PCI: 00:04.0 scanning...
920 14:13:29.167479 scan_generic_bus for PCI: 00:04.0
921 14:13:29.170654 GENERIC: 0.0 enabled
922 14:13:29.174305 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
923 14:13:29.180711 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
924 14:13:29.184200 PCI: 00:0d.0 scanning...
925 14:13:29.186994 scan_static_bus for PCI: 00:0d.0
926 14:13:29.187424 USB0 port 0 enabled
927 14:13:29.190531 USB0 port 0 scanning...
928 14:13:29.193900 scan_static_bus for USB0 port 0
929 14:13:29.197657 USB3 port 0 enabled
930 14:13:29.198179 USB3 port 1 enabled
931 14:13:29.200354 USB3 port 2 disabled
932 14:13:29.203727 USB3 port 3 disabled
933 14:13:29.204199 USB3 port 0 scanning...
934 14:13:29.207116 scan_static_bus for USB3 port 0
935 14:13:29.214188 scan_static_bus for USB3 port 0 done
936 14:13:29.217414 scan_bus: bus USB3 port 0 finished in 6 msecs
937 14:13:29.220581 USB3 port 1 scanning...
938 14:13:29.224165 scan_static_bus for USB3 port 1
939 14:13:29.227120 scan_static_bus for USB3 port 1 done
940 14:13:29.230691 scan_bus: bus USB3 port 1 finished in 6 msecs
941 14:13:29.233749 scan_static_bus for USB0 port 0 done
942 14:13:29.240338 scan_bus: bus USB0 port 0 finished in 43 msecs
943 14:13:29.243536 scan_static_bus for PCI: 00:0d.0 done
944 14:13:29.247186 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
945 14:13:29.250187 PCI: 00:14.0 scanning...
946 14:13:29.253440 scan_static_bus for PCI: 00:14.0
947 14:13:29.257064 USB0 port 0 enabled
948 14:13:29.260123 USB0 port 0 scanning...
949 14:13:29.263221 scan_static_bus for USB0 port 0
950 14:13:29.263650 USB2 port 0 disabled
951 14:13:29.266754 USB2 port 1 enabled
952 14:13:29.270175 USB2 port 2 enabled
953 14:13:29.270697 USB2 port 3 disabled
954 14:13:29.273611 USB2 port 4 enabled
955 14:13:29.276616 USB2 port 5 disabled
956 14:13:29.277046 USB2 port 6 disabled
957 14:13:29.279826 USB2 port 7 disabled
958 14:13:29.280280 USB2 port 8 disabled
959 14:13:29.283405 USB2 port 9 disabled
960 14:13:29.286376 USB3 port 0 disabled
961 14:13:29.286805 USB3 port 1 enabled
962 14:13:29.290010 USB3 port 2 disabled
963 14:13:29.293491 USB3 port 3 disabled
964 14:13:29.294025 USB2 port 1 scanning...
965 14:13:29.296746 scan_static_bus for USB2 port 1
966 14:13:29.303282 scan_static_bus for USB2 port 1 done
967 14:13:29.306551 scan_bus: bus USB2 port 1 finished in 6 msecs
968 14:13:29.309579 USB2 port 2 scanning...
969 14:13:29.312790 scan_static_bus for USB2 port 2
970 14:13:29.316569 scan_static_bus for USB2 port 2 done
971 14:13:29.319172 scan_bus: bus USB2 port 2 finished in 6 msecs
972 14:13:29.322728 USB2 port 4 scanning...
973 14:13:29.326109 scan_static_bus for USB2 port 4
974 14:13:29.329632 scan_static_bus for USB2 port 4 done
975 14:13:29.336158 scan_bus: bus USB2 port 4 finished in 6 msecs
976 14:13:29.336702 USB3 port 1 scanning...
977 14:13:29.339327 scan_static_bus for USB3 port 1
978 14:13:29.345822 scan_static_bus for USB3 port 1 done
979 14:13:29.349410 scan_bus: bus USB3 port 1 finished in 6 msecs
980 14:13:29.352585 scan_static_bus for USB0 port 0 done
981 14:13:29.356056 scan_bus: bus USB0 port 0 finished in 93 msecs
982 14:13:29.362585 scan_static_bus for PCI: 00:14.0 done
983 14:13:29.365728 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
984 14:13:29.369163 PCI: 00:14.3 scanning...
985 14:13:29.372145 scan_static_bus for PCI: 00:14.3
986 14:13:29.375545 GENERIC: 0.0 enabled
987 14:13:29.379223 scan_static_bus for PCI: 00:14.3 done
988 14:13:29.382080 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
989 14:13:29.385833 PCI: 00:15.0 scanning...
990 14:13:29.389461 scan_static_bus for PCI: 00:15.0
991 14:13:29.389920 I2C: 00:1a enabled
992 14:13:29.392480 I2C: 00:31 enabled
993 14:13:29.395980 I2C: 00:32 enabled
994 14:13:29.399677 scan_static_bus for PCI: 00:15.0 done
995 14:13:29.402446 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
996 14:13:29.406018 PCI: 00:15.1 scanning...
997 14:13:29.409343 scan_static_bus for PCI: 00:15.1
998 14:13:29.412598 I2C: 00:10 enabled
999 14:13:29.415817 scan_static_bus for PCI: 00:15.1 done
1000 14:13:29.418876 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1001 14:13:29.422571 PCI: 00:15.2 scanning...
1002 14:13:29.425813 scan_static_bus for PCI: 00:15.2
1003 14:13:29.429112 scan_static_bus for PCI: 00:15.2 done
1004 14:13:29.435366 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1005 14:13:29.435940 PCI: 00:15.3 scanning...
1006 14:13:29.439012 scan_static_bus for PCI: 00:15.3
1007 14:13:29.445569 scan_static_bus for PCI: 00:15.3 done
1008 14:13:29.448623 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1009 14:13:29.452302 PCI: 00:19.1 scanning...
1010 14:13:29.455463 scan_static_bus for PCI: 00:19.1
1011 14:13:29.455994 I2C: 00:15 enabled
1012 14:13:29.462106 scan_static_bus for PCI: 00:19.1 done
1013 14:13:29.465446 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1014 14:13:29.468529 PCI: 00:1d.0 scanning...
1015 14:13:29.472197 do_pci_scan_bridge for PCI: 00:1d.0
1016 14:13:29.475429 PCI: pci_scan_bus for bus 01
1017 14:13:29.478625 PCI: 01:00.0 [1c5c/174a] enabled
1018 14:13:29.482026 GENERIC: 0.0 enabled
1019 14:13:29.485459 Enabling Common Clock Configuration
1020 14:13:29.488631 L1 Sub-State supported from root port 29
1021 14:13:29.491771 L1 Sub-State Support = 0xf
1022 14:13:29.495493 CommonModeRestoreTime = 0x28
1023 14:13:29.498201 Power On Value = 0x16, Power On Scale = 0x0
1024 14:13:29.501716 ASPM: Enabled L1
1025 14:13:29.504741 PCIe: Max_Payload_Size adjusted to 128
1026 14:13:29.508364 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1027 14:13:29.511346 PCI: 00:1e.2 scanning...
1028 14:13:29.514991 scan_generic_bus for PCI: 00:1e.2
1029 14:13:29.518121 SPI: 00 enabled
1030 14:13:29.521562 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1031 14:13:29.528037 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1032 14:13:29.531509 PCI: 00:1e.3 scanning...
1033 14:13:29.534899 scan_generic_bus for PCI: 00:1e.3
1034 14:13:29.535348 SPI: 00 enabled
1035 14:13:29.541332 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1036 14:13:29.547917 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1037 14:13:29.548369 PCI: 00:1f.0 scanning...
1038 14:13:29.551091 scan_static_bus for PCI: 00:1f.0
1039 14:13:29.554635 PNP: 0c09.0 enabled
1040 14:13:29.557701 PNP: 0c09.0 scanning...
1041 14:13:29.561416 scan_static_bus for PNP: 0c09.0
1042 14:13:29.564401 scan_static_bus for PNP: 0c09.0 done
1043 14:13:29.567823 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1044 14:13:29.571438 scan_static_bus for PCI: 00:1f.0 done
1045 14:13:29.577552 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1046 14:13:29.581097 PCI: 00:1f.2 scanning...
1047 14:13:29.584169 scan_static_bus for PCI: 00:1f.2
1048 14:13:29.584638 GENERIC: 0.0 enabled
1049 14:13:29.587601 GENERIC: 0.0 scanning...
1050 14:13:29.590921 scan_static_bus for GENERIC: 0.0
1051 14:13:29.594256 GENERIC: 0.0 enabled
1052 14:13:29.597639 GENERIC: 1.0 enabled
1053 14:13:29.601126 scan_static_bus for GENERIC: 0.0 done
1054 14:13:29.604214 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1055 14:13:29.607737 scan_static_bus for PCI: 00:1f.2 done
1056 14:13:29.614048 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1057 14:13:29.614582 PCI: 00:1f.3 scanning...
1058 14:13:29.617528 scan_static_bus for PCI: 00:1f.3
1059 14:13:29.624428 scan_static_bus for PCI: 00:1f.3 done
1060 14:13:29.627874 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1061 14:13:29.631332 PCI: 00:1f.5 scanning...
1062 14:13:29.634399 scan_generic_bus for PCI: 00:1f.5
1063 14:13:29.637737 scan_generic_bus for PCI: 00:1f.5 done
1064 14:13:29.641074 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1065 14:13:29.647590 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1066 14:13:29.650976 scan_static_bus for Root Device done
1067 14:13:29.657437 scan_bus: bus Root Device finished in 736 msecs
1068 14:13:29.657862 done
1069 14:13:29.664091 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1070 14:13:29.667127 Chrome EC: UHEPI supported
1071 14:13:29.673974 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1072 14:13:29.677344 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1073 14:13:29.681173 SPI flash protection: WPSW=0 SRP0=0
1074 14:13:29.687213 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1075 14:13:29.693590 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1076 14:13:29.697376 found VGA at PCI: 00:02.0
1077 14:13:29.700429 Setting up VGA for PCI: 00:02.0
1078 14:13:29.703557 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1079 14:13:29.710121 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1080 14:13:29.710640 Allocating resources...
1081 14:13:29.713820 Reading resources...
1082 14:13:29.717022 Root Device read_resources bus 0 link: 0
1083 14:13:29.723552 DOMAIN: 0000 read_resources bus 0 link: 0
1084 14:13:29.726414 PCI: 00:04.0 read_resources bus 1 link: 0
1085 14:13:29.733277 PCI: 00:04.0 read_resources bus 1 link: 0 done
1086 14:13:29.736565 PCI: 00:0d.0 read_resources bus 0 link: 0
1087 14:13:29.739831 USB0 port 0 read_resources bus 0 link: 0
1088 14:13:29.747239 USB0 port 0 read_resources bus 0 link: 0 done
1089 14:13:29.750458 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1090 14:13:29.757456 PCI: 00:14.0 read_resources bus 0 link: 0
1091 14:13:29.760603 USB0 port 0 read_resources bus 0 link: 0
1092 14:13:29.767009 USB0 port 0 read_resources bus 0 link: 0 done
1093 14:13:29.770598 PCI: 00:14.0 read_resources bus 0 link: 0 done
1094 14:13:29.777035 PCI: 00:14.3 read_resources bus 0 link: 0
1095 14:13:29.780314 PCI: 00:14.3 read_resources bus 0 link: 0 done
1096 14:13:29.786910 PCI: 00:15.0 read_resources bus 0 link: 0
1097 14:13:29.790406 PCI: 00:15.0 read_resources bus 0 link: 0 done
1098 14:13:29.797042 PCI: 00:15.1 read_resources bus 0 link: 0
1099 14:13:29.800075 PCI: 00:15.1 read_resources bus 0 link: 0 done
1100 14:13:29.807265 PCI: 00:19.1 read_resources bus 0 link: 0
1101 14:13:29.810697 PCI: 00:19.1 read_resources bus 0 link: 0 done
1102 14:13:29.817775 PCI: 00:1d.0 read_resources bus 1 link: 0
1103 14:13:29.820748 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1104 14:13:29.827665 PCI: 00:1e.2 read_resources bus 2 link: 0
1105 14:13:29.830733 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1106 14:13:29.837513 PCI: 00:1e.3 read_resources bus 3 link: 0
1107 14:13:29.841002 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1108 14:13:29.847201 PCI: 00:1f.0 read_resources bus 0 link: 0
1109 14:13:29.850527 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1110 14:13:29.857108 PCI: 00:1f.2 read_resources bus 0 link: 0
1111 14:13:29.860583 GENERIC: 0.0 read_resources bus 0 link: 0
1112 14:13:29.867123 GENERIC: 0.0 read_resources bus 0 link: 0 done
1113 14:13:29.870713 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1114 14:13:29.876902 DOMAIN: 0000 read_resources bus 0 link: 0 done
1115 14:13:29.880420 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1116 14:13:29.887085 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1117 14:13:29.890130 Root Device read_resources bus 0 link: 0 done
1118 14:13:29.893926 Done reading resources.
1119 14:13:29.900065 Show resources in subtree (Root Device)...After reading.
1120 14:13:29.903465 Root Device child on link 0 DOMAIN: 0000
1121 14:13:29.906770 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1122 14:13:29.916784 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1123 14:13:29.926474 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1124 14:13:29.926998 PCI: 00:00.0
1125 14:13:29.936977 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1126 14:13:29.946845 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1127 14:13:29.956772 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1128 14:13:29.966638 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1129 14:13:29.976672 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1130 14:13:29.986392 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1131 14:13:29.992971 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1132 14:13:30.003529 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1133 14:13:30.012916 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1134 14:13:30.023174 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1135 14:13:30.033077 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1136 14:13:30.039329 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1137 14:13:30.049577 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1138 14:13:30.059170 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1139 14:13:30.069337 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1140 14:13:30.079360 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1141 14:13:30.089010 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1142 14:13:30.099060 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1143 14:13:30.105675 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1144 14:13:30.115662 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1145 14:13:30.119214 PCI: 00:02.0
1146 14:13:30.129083 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:13:30.138883 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:13:30.149057 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:13:30.152131 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1150 14:13:30.162384 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1151 14:13:30.162919 GENERIC: 0.0
1152 14:13:30.165618 PCI: 00:05.0
1153 14:13:30.175251 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1154 14:13:30.178928 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1155 14:13:30.181833 GENERIC: 0.0
1156 14:13:30.182305 PCI: 00:08.0
1157 14:13:30.191953 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 14:13:30.195547 PCI: 00:0a.0
1159 14:13:30.198620 PCI: 00:0d.0 child on link 0 USB0 port 0
1160 14:13:30.208910 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1161 14:13:30.215071 USB0 port 0 child on link 0 USB3 port 0
1162 14:13:30.215599 USB3 port 0
1163 14:13:30.218684 USB3 port 1
1164 14:13:30.219213 USB3 port 2
1165 14:13:30.221810 USB3 port 3
1166 14:13:30.225304 PCI: 00:14.0 child on link 0 USB0 port 0
1167 14:13:30.235526 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1168 14:13:30.238398 USB0 port 0 child on link 0 USB2 port 0
1169 14:13:30.241411 USB2 port 0
1170 14:13:30.241839 USB2 port 1
1171 14:13:30.245043 USB2 port 2
1172 14:13:30.248523 USB2 port 3
1173 14:13:30.248996 USB2 port 4
1174 14:13:30.251703 USB2 port 5
1175 14:13:30.252253 USB2 port 6
1176 14:13:30.255057 USB2 port 7
1177 14:13:30.255485 USB2 port 8
1178 14:13:30.258644 USB2 port 9
1179 14:13:30.259071 USB3 port 0
1180 14:13:30.261725 USB3 port 1
1181 14:13:30.262153 USB3 port 2
1182 14:13:30.264744 USB3 port 3
1183 14:13:30.265171 PCI: 00:14.2
1184 14:13:30.275044 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1185 14:13:30.284488 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1186 14:13:30.291570 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1187 14:13:30.301132 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 14:13:30.301567 GENERIC: 0.0
1189 14:13:30.308291 PCI: 00:15.0 child on link 0 I2C: 00:1a
1190 14:13:30.317729 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1191 14:13:30.318267 I2C: 00:1a
1192 14:13:30.321022 I2C: 00:31
1193 14:13:30.321450 I2C: 00:32
1194 14:13:30.324642 PCI: 00:15.1 child on link 0 I2C: 00:10
1195 14:13:30.334491 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 14:13:30.337806 I2C: 00:10
1197 14:13:30.338364 PCI: 00:15.2
1198 14:13:30.347565 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1199 14:13:30.350868 PCI: 00:15.3
1200 14:13:30.360878 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 14:13:30.361344 PCI: 00:16.0
1202 14:13:30.370801 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 14:13:30.374089 PCI: 00:19.0
1204 14:13:30.377785 PCI: 00:19.1 child on link 0 I2C: 00:15
1205 14:13:30.387431 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 14:13:30.390945 I2C: 00:15
1207 14:13:30.394181 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1208 14:13:30.404046 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1209 14:13:30.414131 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1210 14:13:30.421010 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1211 14:13:30.424060 GENERIC: 0.0
1212 14:13:30.424599 PCI: 01:00.0
1213 14:13:30.433847 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1214 14:13:30.443717 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1215 14:13:30.453450 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1216 14:13:30.453978 PCI: 00:1e.0
1217 14:13:30.466733 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1218 14:13:30.470100 PCI: 00:1e.2 child on link 0 SPI: 00
1219 14:13:30.480231 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 14:13:30.480713 SPI: 00
1221 14:13:30.486939 PCI: 00:1e.3 child on link 0 SPI: 00
1222 14:13:30.496530 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 14:13:30.497059 SPI: 00
1224 14:13:30.500087 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1225 14:13:30.510202 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1226 14:13:30.510869 PNP: 0c09.0
1227 14:13:30.519954 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1228 14:13:30.523264 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1229 14:13:30.533309 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1230 14:13:30.543041 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1231 14:13:30.546509 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1232 14:13:30.549675 GENERIC: 0.0
1233 14:13:30.553038 GENERIC: 1.0
1234 14:13:30.553479 PCI: 00:1f.3
1235 14:13:30.563291 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 14:13:30.572903 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1237 14:13:30.576484 PCI: 00:1f.5
1238 14:13:30.583173 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1239 14:13:30.589782 CPU_CLUSTER: 0 child on link 0 APIC: 00
1240 14:13:30.590222 APIC: 00
1241 14:13:30.592817 APIC: 01
1242 14:13:30.593254 APIC: 03
1243 14:13:30.593598 APIC: 05
1244 14:13:30.595914 APIC: 07
1245 14:13:30.596348 APIC: 06
1246 14:13:30.596694 APIC: 02
1247 14:13:30.599557 APIC: 04
1248 14:13:30.606181 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1249 14:13:30.612958 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1250 14:13:30.619308 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1251 14:13:30.625892 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1252 14:13:30.629464 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1253 14:13:30.632512 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1254 14:13:30.636000 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1255 14:13:30.645714 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1256 14:13:30.652572 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1257 14:13:30.659307 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1258 14:13:30.665644 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1259 14:13:30.672547 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1260 14:13:30.679079 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1261 14:13:30.688849 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1262 14:13:30.695494 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1263 14:13:30.699134 DOMAIN: 0000: Resource ranges:
1264 14:13:30.702251 * Base: 1000, Size: 800, Tag: 100
1265 14:13:30.705762 * Base: 1900, Size: e700, Tag: 100
1266 14:13:30.712387 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1267 14:13:30.719199 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1268 14:13:30.725128 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1269 14:13:30.731992 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1270 14:13:30.738381 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1271 14:13:30.748881 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1272 14:13:30.754918 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1273 14:13:30.761641 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1274 14:13:30.771615 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1275 14:13:30.778625 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1276 14:13:30.785159 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1277 14:13:30.794819 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1278 14:13:30.801928 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1279 14:13:30.808342 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1280 14:13:30.818113 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1281 14:13:30.825118 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1282 14:13:30.831212 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1283 14:13:30.841179 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1284 14:13:30.847686 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1285 14:13:30.854630 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1286 14:13:30.864719 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1287 14:13:30.871564 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1288 14:13:30.877584 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1289 14:13:30.887720 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1290 14:13:30.894359 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1291 14:13:30.897533 DOMAIN: 0000: Resource ranges:
1292 14:13:30.900817 * Base: 7fc00000, Size: 40400000, Tag: 200
1293 14:13:30.907494 * Base: d0000000, Size: 28000000, Tag: 200
1294 14:13:30.910598 * Base: fa000000, Size: 1000000, Tag: 200
1295 14:13:30.914270 * Base: fb001000, Size: 2fff000, Tag: 200
1296 14:13:30.917385 * Base: fe010000, Size: 2e000, Tag: 200
1297 14:13:30.924284 * Base: fe03f000, Size: d41000, Tag: 200
1298 14:13:30.927210 * Base: fed88000, Size: 8000, Tag: 200
1299 14:13:30.930648 * Base: fed93000, Size: d000, Tag: 200
1300 14:13:30.933973 * Base: feda2000, Size: 1e000, Tag: 200
1301 14:13:30.940360 * Base: fede0000, Size: 1220000, Tag: 200
1302 14:13:30.943758 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1303 14:13:30.950274 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1304 14:13:30.957355 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1305 14:13:30.963422 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1306 14:13:30.970098 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1307 14:13:30.976986 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1308 14:13:30.983577 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1309 14:13:30.990464 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1310 14:13:30.997162 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1311 14:13:31.003633 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1312 14:13:31.010199 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1313 14:13:31.016806 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1314 14:13:31.023374 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1315 14:13:31.029912 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1316 14:13:31.036836 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1317 14:13:31.043105 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1318 14:13:31.050020 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1319 14:13:31.056636 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1320 14:13:31.063116 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1321 14:13:31.070092 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1322 14:13:31.076228 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1323 14:13:31.082797 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1324 14:13:31.089780 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1325 14:13:31.099422 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1326 14:13:31.106206 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1327 14:13:31.109540 PCI: 00:1d.0: Resource ranges:
1328 14:13:31.113088 * Base: 7fc00000, Size: 100000, Tag: 200
1329 14:13:31.119826 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1330 14:13:31.126320 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1331 14:13:31.132786 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1332 14:13:31.142622 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1333 14:13:31.149609 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1334 14:13:31.152507 Root Device assign_resources, bus 0 link: 0
1335 14:13:31.159143 DOMAIN: 0000 assign_resources, bus 0 link: 0
1336 14:13:31.165863 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1337 14:13:31.175898 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1338 14:13:31.182345 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1339 14:13:31.191986 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1340 14:13:31.195607 PCI: 00:04.0 assign_resources, bus 1 link: 0
1341 14:13:31.198706 PCI: 00:04.0 assign_resources, bus 1 link: 0
1342 14:13:31.208835 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1343 14:13:31.215512 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1344 14:13:31.225646 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1345 14:13:31.228631 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1346 14:13:31.235046 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1347 14:13:31.241863 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1348 14:13:31.248396 PCI: 00:14.0 assign_resources, bus 0 link: 0
1349 14:13:31.251919 PCI: 00:14.0 assign_resources, bus 0 link: 0
1350 14:13:31.258653 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1351 14:13:31.268708 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1352 14:13:31.275092 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1353 14:13:31.281474 PCI: 00:14.3 assign_resources, bus 0 link: 0
1354 14:13:31.284668 PCI: 00:14.3 assign_resources, bus 0 link: 0
1355 14:13:31.295119 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1356 14:13:31.298137 PCI: 00:15.0 assign_resources, bus 0 link: 0
1357 14:13:31.301377 PCI: 00:15.0 assign_resources, bus 0 link: 0
1358 14:13:31.311638 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1359 14:13:31.314768 PCI: 00:15.1 assign_resources, bus 0 link: 0
1360 14:13:31.321204 PCI: 00:15.1 assign_resources, bus 0 link: 0
1361 14:13:31.327876 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1362 14:13:31.337717 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1363 14:13:31.344540 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1364 14:13:31.354278 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1365 14:13:31.357576 PCI: 00:19.1 assign_resources, bus 0 link: 0
1366 14:13:31.360791 PCI: 00:19.1 assign_resources, bus 0 link: 0
1367 14:13:31.371070 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1368 14:13:31.381152 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1369 14:13:31.391169 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1370 14:13:31.394248 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1371 14:13:31.401168 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1372 14:13:31.410680 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1373 14:13:31.417383 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1374 14:13:31.424272 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1375 14:13:31.430366 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1376 14:13:31.437190 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1377 14:13:31.440594 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1378 14:13:31.450593 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1379 14:13:31.453591 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1380 14:13:31.456834 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1381 14:13:31.463869 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1382 14:13:31.466898 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1383 14:13:31.473514 LPC: Trying to open IO window from 800 size 1ff
1384 14:13:31.480003 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1385 14:13:31.489829 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1386 14:13:31.496720 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1387 14:13:31.503194 DOMAIN: 0000 assign_resources, bus 0 link: 0
1388 14:13:31.506457 Root Device assign_resources, bus 0 link: 0
1389 14:13:31.509552 Done setting resources.
1390 14:13:31.516411 Show resources in subtree (Root Device)...After assigning values.
1391 14:13:31.519657 Root Device child on link 0 DOMAIN: 0000
1392 14:13:31.522817 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1393 14:13:31.532956 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1394 14:13:31.542874 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1395 14:13:31.546295 PCI: 00:00.0
1396 14:13:31.555990 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1397 14:13:31.562723 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1398 14:13:31.572916 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1399 14:13:31.582666 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1400 14:13:31.592810 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1401 14:13:31.602528 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1402 14:13:31.609131 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1403 14:13:31.619084 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1404 14:13:31.628802 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1405 14:13:31.639106 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1406 14:13:31.648767 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1407 14:13:31.658993 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1408 14:13:31.665673 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1409 14:13:31.675133 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1410 14:13:31.685332 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1411 14:13:31.695296 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1412 14:13:31.705090 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1413 14:13:31.715180 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1414 14:13:31.721685 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1415 14:13:31.731655 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1416 14:13:31.734696 PCI: 00:02.0
1417 14:13:31.745146 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1418 14:13:31.754981 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1419 14:13:31.765184 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1420 14:13:31.771668 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1421 14:13:31.781292 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1422 14:13:31.781720 GENERIC: 0.0
1423 14:13:31.784872 PCI: 00:05.0
1424 14:13:31.794378 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1425 14:13:31.798013 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1426 14:13:31.800961 GENERIC: 0.0
1427 14:13:31.801358 PCI: 00:08.0
1428 14:13:31.811162 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1429 14:13:31.814280 PCI: 00:0a.0
1430 14:13:31.817672 PCI: 00:0d.0 child on link 0 USB0 port 0
1431 14:13:31.827772 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1432 14:13:31.833976 USB0 port 0 child on link 0 USB3 port 0
1433 14:13:31.834386 USB3 port 0
1434 14:13:31.837569 USB3 port 1
1435 14:13:31.838120 USB3 port 2
1436 14:13:31.841156 USB3 port 3
1437 14:13:31.844068 PCI: 00:14.0 child on link 0 USB0 port 0
1438 14:13:31.854052 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1439 14:13:31.860784 USB0 port 0 child on link 0 USB2 port 0
1440 14:13:31.861216 USB2 port 0
1441 14:13:31.863964 USB2 port 1
1442 14:13:31.864407 USB2 port 2
1443 14:13:31.867087 USB2 port 3
1444 14:13:31.867583 USB2 port 4
1445 14:13:31.870692 USB2 port 5
1446 14:13:31.871117 USB2 port 6
1447 14:13:31.873752 USB2 port 7
1448 14:13:31.874207 USB2 port 8
1449 14:13:31.877310 USB2 port 9
1450 14:13:31.880808 USB3 port 0
1451 14:13:31.881321 USB3 port 1
1452 14:13:31.883972 USB3 port 2
1453 14:13:31.884479 USB3 port 3
1454 14:13:31.887464 PCI: 00:14.2
1455 14:13:31.897137 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1456 14:13:31.907304 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1457 14:13:31.910275 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1458 14:13:31.920331 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1459 14:13:31.923487 GENERIC: 0.0
1460 14:13:31.926798 PCI: 00:15.0 child on link 0 I2C: 00:1a
1461 14:13:31.937016 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1462 14:13:31.939969 I2C: 00:1a
1463 14:13:31.940396 I2C: 00:31
1464 14:13:31.943599 I2C: 00:32
1465 14:13:31.946800 PCI: 00:15.1 child on link 0 I2C: 00:10
1466 14:13:31.957016 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1467 14:13:31.960169 I2C: 00:10
1468 14:13:31.960604 PCI: 00:15.2
1469 14:13:31.969804 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1470 14:13:31.973339 PCI: 00:15.3
1471 14:13:31.983262 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1472 14:13:31.983697 PCI: 00:16.0
1473 14:13:31.996602 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1474 14:13:31.997038 PCI: 00:19.0
1475 14:13:31.999504 PCI: 00:19.1 child on link 0 I2C: 00:15
1476 14:13:32.009531 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1477 14:13:32.012929 I2C: 00:15
1478 14:13:32.016061 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1479 14:13:32.025990 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1480 14:13:32.039111 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1481 14:13:32.049172 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1482 14:13:32.049655 GENERIC: 0.0
1483 14:13:32.052421 PCI: 01:00.0
1484 14:13:32.062413 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1485 14:13:32.072700 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1486 14:13:32.082601 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1487 14:13:32.085518 PCI: 00:1e.0
1488 14:13:32.095503 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1489 14:13:32.099074 PCI: 00:1e.2 child on link 0 SPI: 00
1490 14:13:32.111946 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1491 14:13:32.112458 SPI: 00
1492 14:13:32.115516 PCI: 00:1e.3 child on link 0 SPI: 00
1493 14:13:32.126032 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1494 14:13:32.128776 SPI: 00
1495 14:13:32.132290 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1496 14:13:32.141939 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1497 14:13:32.142392 PNP: 0c09.0
1498 14:13:32.152284 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1499 14:13:32.155152 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1500 14:13:32.165327 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1501 14:13:32.175028 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1502 14:13:32.178364 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1503 14:13:32.181985 GENERIC: 0.0
1504 14:13:32.182554 GENERIC: 1.0
1505 14:13:32.184994 PCI: 00:1f.3
1506 14:13:32.195243 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1507 14:13:32.204979 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1508 14:13:32.208632 PCI: 00:1f.5
1509 14:13:32.218441 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1510 14:13:32.221401 CPU_CLUSTER: 0 child on link 0 APIC: 00
1511 14:13:32.221855 APIC: 00
1512 14:13:32.225028 APIC: 01
1513 14:13:32.225538 APIC: 03
1514 14:13:32.225991 APIC: 05
1515 14:13:32.228054 APIC: 07
1516 14:13:32.228590 APIC: 06
1517 14:13:32.231522 APIC: 02
1518 14:13:32.232016 APIC: 04
1519 14:13:32.234938 Done allocating resources.
1520 14:13:32.241861 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1521 14:13:32.244977 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1522 14:13:32.251225 Configure GPIOs for I2S audio on UP4.
1523 14:13:32.258199 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1524 14:13:32.258784 Enabling resources...
1525 14:13:32.264740 PCI: 00:00.0 subsystem <- 8086/9a12
1526 14:13:32.265387 PCI: 00:00.0 cmd <- 06
1527 14:13:32.271258 PCI: 00:02.0 subsystem <- 8086/9a40
1528 14:13:32.271878 PCI: 00:02.0 cmd <- 03
1529 14:13:32.274400 PCI: 00:04.0 subsystem <- 8086/9a03
1530 14:13:32.277639 PCI: 00:04.0 cmd <- 02
1531 14:13:32.280875 PCI: 00:05.0 subsystem <- 8086/9a19
1532 14:13:32.284565 PCI: 00:05.0 cmd <- 02
1533 14:13:32.287532 PCI: 00:08.0 subsystem <- 8086/9a11
1534 14:13:32.291041 PCI: 00:08.0 cmd <- 06
1535 14:13:32.294126 PCI: 00:0d.0 subsystem <- 8086/9a13
1536 14:13:32.297394 PCI: 00:0d.0 cmd <- 02
1537 14:13:32.300899 PCI: 00:14.0 subsystem <- 8086/a0ed
1538 14:13:32.303978 PCI: 00:14.0 cmd <- 02
1539 14:13:32.307712 PCI: 00:14.2 subsystem <- 8086/a0ef
1540 14:13:32.310926 PCI: 00:14.2 cmd <- 02
1541 14:13:32.314002 PCI: 00:14.3 subsystem <- 8086/a0f0
1542 14:13:32.314434 PCI: 00:14.3 cmd <- 02
1543 14:13:32.320878 PCI: 00:15.0 subsystem <- 8086/a0e8
1544 14:13:32.321376 PCI: 00:15.0 cmd <- 02
1545 14:13:32.323920 PCI: 00:15.1 subsystem <- 8086/a0e9
1546 14:13:32.327560 PCI: 00:15.1 cmd <- 02
1547 14:13:32.330541 PCI: 00:15.2 subsystem <- 8086/a0ea
1548 14:13:32.334163 PCI: 00:15.2 cmd <- 02
1549 14:13:32.337644 PCI: 00:15.3 subsystem <- 8086/a0eb
1550 14:13:32.340388 PCI: 00:15.3 cmd <- 02
1551 14:13:32.343970 PCI: 00:16.0 subsystem <- 8086/a0e0
1552 14:13:32.346997 PCI: 00:16.0 cmd <- 02
1553 14:13:32.350728 PCI: 00:19.1 subsystem <- 8086/a0c6
1554 14:13:32.354150 PCI: 00:19.1 cmd <- 02
1555 14:13:32.357093 PCI: 00:1d.0 bridge ctrl <- 0013
1556 14:13:32.360428 PCI: 00:1d.0 subsystem <- 8086/a0b0
1557 14:13:32.363747 PCI: 00:1d.0 cmd <- 06
1558 14:13:32.366785 PCI: 00:1e.0 subsystem <- 8086/a0a8
1559 14:13:32.367214 PCI: 00:1e.0 cmd <- 06
1560 14:13:32.373809 PCI: 00:1e.2 subsystem <- 8086/a0aa
1561 14:13:32.374240 PCI: 00:1e.2 cmd <- 06
1562 14:13:32.377100 PCI: 00:1e.3 subsystem <- 8086/a0ab
1563 14:13:32.380214 PCI: 00:1e.3 cmd <- 02
1564 14:13:32.383760 PCI: 00:1f.0 subsystem <- 8086/a087
1565 14:13:32.387217 PCI: 00:1f.0 cmd <- 407
1566 14:13:32.390343 PCI: 00:1f.3 subsystem <- 8086/a0c8
1567 14:13:32.393555 PCI: 00:1f.3 cmd <- 02
1568 14:13:32.397131 PCI: 00:1f.5 subsystem <- 8086/a0a4
1569 14:13:32.400011 PCI: 00:1f.5 cmd <- 406
1570 14:13:32.404227 PCI: 01:00.0 cmd <- 02
1571 14:13:32.408674 done.
1572 14:13:32.411740 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1573 14:13:32.415382 Initializing devices...
1574 14:13:32.418516 Root Device init
1575 14:13:32.421960 Chrome EC: Set SMI mask to 0x0000000000000000
1576 14:13:32.429053 Chrome EC: clear events_b mask to 0x0000000000000000
1577 14:13:32.435901 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1578 14:13:32.442135 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1579 14:13:32.448560 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1580 14:13:32.452030 Chrome EC: Set WAKE mask to 0x0000000000000000
1581 14:13:32.460376 fw_config match found: DB_USB=USB3_ACTIVE
1582 14:13:32.463674 Configure Right Type-C port orientation for retimer
1583 14:13:32.469685 Root Device init finished in 46 msecs
1584 14:13:32.470174 PCI: 00:00.0 init
1585 14:13:32.473903 CPU TDP = 9 Watts
1586 14:13:32.477079 CPU PL1 = 9 Watts
1587 14:13:32.477681 CPU PL2 = 40 Watts
1588 14:13:32.480574 CPU PL4 = 83 Watts
1589 14:13:32.483983 PCI: 00:00.0 init finished in 8 msecs
1590 14:13:32.487140 PCI: 00:02.0 init
1591 14:13:32.487610 GMA: Found VBT in CBFS
1592 14:13:32.490548 GMA: Found valid VBT in CBFS
1593 14:13:32.497632 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1594 14:13:32.503992 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1595 14:13:32.506987 PCI: 00:02.0 init finished in 18 msecs
1596 14:13:32.510574 PCI: 00:05.0 init
1597 14:13:32.514094 PCI: 00:05.0 init finished in 0 msecs
1598 14:13:32.517325 PCI: 00:08.0 init
1599 14:13:32.520235 PCI: 00:08.0 init finished in 0 msecs
1600 14:13:32.523996 PCI: 00:14.0 init
1601 14:13:32.526811 PCI: 00:14.0 init finished in 0 msecs
1602 14:13:32.530048 PCI: 00:14.2 init
1603 14:13:32.533711 PCI: 00:14.2 init finished in 0 msecs
1604 14:13:32.536789 PCI: 00:15.0 init
1605 14:13:32.540408 I2C bus 0 version 0x3230302a
1606 14:13:32.543427 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1607 14:13:32.546724 PCI: 00:15.0 init finished in 6 msecs
1608 14:13:32.550073 PCI: 00:15.1 init
1609 14:13:32.550515 I2C bus 1 version 0x3230302a
1610 14:13:32.556647 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1611 14:13:32.560152 PCI: 00:15.1 init finished in 6 msecs
1612 14:13:32.560580 PCI: 00:15.2 init
1613 14:13:32.563541 I2C bus 2 version 0x3230302a
1614 14:13:32.566582 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1615 14:13:32.569989 PCI: 00:15.2 init finished in 6 msecs
1616 14:13:32.573453 PCI: 00:15.3 init
1617 14:13:32.577092 I2C bus 3 version 0x3230302a
1618 14:13:32.580239 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1619 14:13:32.583805 PCI: 00:15.3 init finished in 6 msecs
1620 14:13:32.587404 PCI: 00:16.0 init
1621 14:13:32.590167 PCI: 00:16.0 init finished in 0 msecs
1622 14:13:32.593587 PCI: 00:19.1 init
1623 14:13:32.596747 I2C bus 5 version 0x3230302a
1624 14:13:32.600279 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1625 14:13:32.603568 PCI: 00:19.1 init finished in 6 msecs
1626 14:13:32.606619 PCI: 00:1d.0 init
1627 14:13:32.607044 Initializing PCH PCIe bridge.
1628 14:13:32.613542 PCI: 00:1d.0 init finished in 3 msecs
1629 14:13:32.616622 PCI: 00:1f.0 init
1630 14:13:32.620342 IOAPIC: Initializing IOAPIC at 0xfec00000
1631 14:13:32.623450 IOAPIC: Bootstrap Processor Local APIC = 0x00
1632 14:13:32.626569 IOAPIC: ID = 0x02
1633 14:13:32.629908 IOAPIC: Dumping registers
1634 14:13:32.630366 reg 0x0000: 0x02000000
1635 14:13:32.633251 reg 0x0001: 0x00770020
1636 14:13:32.636917 reg 0x0002: 0x00000000
1637 14:13:32.640159 PCI: 00:1f.0 init finished in 21 msecs
1638 14:13:32.643135 PCI: 00:1f.2 init
1639 14:13:32.646773 Disabling ACPI via APMC.
1640 14:13:32.650129 APMC done.
1641 14:13:32.653208 PCI: 00:1f.2 init finished in 6 msecs
1642 14:13:32.664414 PCI: 01:00.0 init
1643 14:13:32.667932 PCI: 01:00.0 init finished in 0 msecs
1644 14:13:32.671406 PNP: 0c09.0 init
1645 14:13:32.678205 Google Chrome EC uptime: 8.431 seconds
1646 14:13:32.681163 Google Chrome AP resets since EC boot: 0
1647 14:13:32.684680 Google Chrome most recent AP reset causes:
1648 14:13:32.691176 Google Chrome EC reset flags at last EC boot: reset-pin
1649 14:13:32.694308 PNP: 0c09.0 init finished in 19 msecs
1650 14:13:32.699751 Devices initialized
1651 14:13:32.703320 Show all devs... After init.
1652 14:13:32.706570 Root Device: enabled 1
1653 14:13:32.707005 DOMAIN: 0000: enabled 1
1654 14:13:32.709716 CPU_CLUSTER: 0: enabled 1
1655 14:13:32.713368 PCI: 00:00.0: enabled 1
1656 14:13:32.716198 PCI: 00:02.0: enabled 1
1657 14:13:32.716838 PCI: 00:04.0: enabled 1
1658 14:13:32.719659 PCI: 00:05.0: enabled 1
1659 14:13:32.723395 PCI: 00:06.0: enabled 0
1660 14:13:32.726516 PCI: 00:07.0: enabled 0
1661 14:13:32.727054 PCI: 00:07.1: enabled 0
1662 14:13:32.729656 PCI: 00:07.2: enabled 0
1663 14:13:32.733070 PCI: 00:07.3: enabled 0
1664 14:13:32.736272 PCI: 00:08.0: enabled 1
1665 14:13:32.736695 PCI: 00:09.0: enabled 0
1666 14:13:32.739795 PCI: 00:0a.0: enabled 0
1667 14:13:32.742788 PCI: 00:0d.0: enabled 1
1668 14:13:32.746538 PCI: 00:0d.1: enabled 0
1669 14:13:32.747020 PCI: 00:0d.2: enabled 0
1670 14:13:32.749524 PCI: 00:0d.3: enabled 0
1671 14:13:32.752989 PCI: 00:0e.0: enabled 0
1672 14:13:32.753444 PCI: 00:10.2: enabled 1
1673 14:13:32.756437 PCI: 00:10.6: enabled 0
1674 14:13:32.759419 PCI: 00:10.7: enabled 0
1675 14:13:32.763080 PCI: 00:12.0: enabled 0
1676 14:13:32.763516 PCI: 00:12.6: enabled 0
1677 14:13:32.765951 PCI: 00:13.0: enabled 0
1678 14:13:32.769582 PCI: 00:14.0: enabled 1
1679 14:13:32.772776 PCI: 00:14.1: enabled 0
1680 14:13:32.773212 PCI: 00:14.2: enabled 1
1681 14:13:32.776132 PCI: 00:14.3: enabled 1
1682 14:13:32.779631 PCI: 00:15.0: enabled 1
1683 14:13:32.782605 PCI: 00:15.1: enabled 1
1684 14:13:32.783036 PCI: 00:15.2: enabled 1
1685 14:13:32.786384 PCI: 00:15.3: enabled 1
1686 14:13:32.789226 PCI: 00:16.0: enabled 1
1687 14:13:32.789733 PCI: 00:16.1: enabled 0
1688 14:13:32.792746 PCI: 00:16.2: enabled 0
1689 14:13:32.796401 PCI: 00:16.3: enabled 0
1690 14:13:32.799492 PCI: 00:16.4: enabled 0
1691 14:13:32.800067 PCI: 00:16.5: enabled 0
1692 14:13:32.802743 PCI: 00:17.0: enabled 0
1693 14:13:32.806159 PCI: 00:19.0: enabled 0
1694 14:13:32.809281 PCI: 00:19.1: enabled 1
1695 14:13:32.809697 PCI: 00:19.2: enabled 0
1696 14:13:32.812529 PCI: 00:1c.0: enabled 1
1697 14:13:32.815913 PCI: 00:1c.1: enabled 0
1698 14:13:32.819396 PCI: 00:1c.2: enabled 0
1699 14:13:32.819892 PCI: 00:1c.3: enabled 0
1700 14:13:32.822628 PCI: 00:1c.4: enabled 0
1701 14:13:32.826080 PCI: 00:1c.5: enabled 0
1702 14:13:32.829161 PCI: 00:1c.6: enabled 1
1703 14:13:32.829624 PCI: 00:1c.7: enabled 0
1704 14:13:32.832997 PCI: 00:1d.0: enabled 1
1705 14:13:32.835968 PCI: 00:1d.1: enabled 0
1706 14:13:32.836442 PCI: 00:1d.2: enabled 1
1707 14:13:32.839517 PCI: 00:1d.3: enabled 0
1708 14:13:32.842256 PCI: 00:1e.0: enabled 1
1709 14:13:32.845628 PCI: 00:1e.1: enabled 0
1710 14:13:32.846115 PCI: 00:1e.2: enabled 1
1711 14:13:32.848988 PCI: 00:1e.3: enabled 1
1712 14:13:32.852693 PCI: 00:1f.0: enabled 1
1713 14:13:32.855641 PCI: 00:1f.1: enabled 0
1714 14:13:32.856151 PCI: 00:1f.2: enabled 1
1715 14:13:32.858976 PCI: 00:1f.3: enabled 1
1716 14:13:32.862103 PCI: 00:1f.4: enabled 0
1717 14:13:32.865604 PCI: 00:1f.5: enabled 1
1718 14:13:32.866032 PCI: 00:1f.6: enabled 0
1719 14:13:32.868535 PCI: 00:1f.7: enabled 0
1720 14:13:32.871897 APIC: 00: enabled 1
1721 14:13:32.872327 GENERIC: 0.0: enabled 1
1722 14:13:32.875638 GENERIC: 0.0: enabled 1
1723 14:13:32.878845 GENERIC: 1.0: enabled 1
1724 14:13:32.882290 GENERIC: 0.0: enabled 1
1725 14:13:32.882721 GENERIC: 1.0: enabled 1
1726 14:13:32.885352 USB0 port 0: enabled 1
1727 14:13:32.889076 GENERIC: 0.0: enabled 1
1728 14:13:32.892160 USB0 port 0: enabled 1
1729 14:13:32.892592 GENERIC: 0.0: enabled 1
1730 14:13:32.895583 I2C: 00:1a: enabled 1
1731 14:13:32.898663 I2C: 00:31: enabled 1
1732 14:13:32.899091 I2C: 00:32: enabled 1
1733 14:13:32.901783 I2C: 00:10: enabled 1
1734 14:13:32.905405 I2C: 00:15: enabled 1
1735 14:13:32.905834 GENERIC: 0.0: enabled 0
1736 14:13:32.908802 GENERIC: 1.0: enabled 0
1737 14:13:32.911831 GENERIC: 0.0: enabled 1
1738 14:13:32.912295 SPI: 00: enabled 1
1739 14:13:32.915014 SPI: 00: enabled 1
1740 14:13:32.918296 PNP: 0c09.0: enabled 1
1741 14:13:32.921682 GENERIC: 0.0: enabled 1
1742 14:13:32.922375 USB3 port 0: enabled 1
1743 14:13:32.925115 USB3 port 1: enabled 1
1744 14:13:32.928532 USB3 port 2: enabled 0
1745 14:13:32.928967 USB3 port 3: enabled 0
1746 14:13:32.931898 USB2 port 0: enabled 0
1747 14:13:32.935173 USB2 port 1: enabled 1
1748 14:13:32.935619 USB2 port 2: enabled 1
1749 14:13:32.938737 USB2 port 3: enabled 0
1750 14:13:32.941785 USB2 port 4: enabled 1
1751 14:13:32.945196 USB2 port 5: enabled 0
1752 14:13:32.945888 USB2 port 6: enabled 0
1753 14:13:32.948161 USB2 port 7: enabled 0
1754 14:13:32.951520 USB2 port 8: enabled 0
1755 14:13:32.952008 USB2 port 9: enabled 0
1756 14:13:32.955238 USB3 port 0: enabled 0
1757 14:13:32.958345 USB3 port 1: enabled 1
1758 14:13:32.961793 USB3 port 2: enabled 0
1759 14:13:32.962293 USB3 port 3: enabled 0
1760 14:13:32.965198 GENERIC: 0.0: enabled 1
1761 14:13:32.968455 GENERIC: 1.0: enabled 1
1762 14:13:32.968885 APIC: 01: enabled 1
1763 14:13:32.971820 APIC: 03: enabled 1
1764 14:13:32.974999 APIC: 05: enabled 1
1765 14:13:32.975467 APIC: 07: enabled 1
1766 14:13:32.977969 APIC: 06: enabled 1
1767 14:13:32.978451 APIC: 02: enabled 1
1768 14:13:32.981545 APIC: 04: enabled 1
1769 14:13:32.984857 PCI: 01:00.0: enabled 1
1770 14:13:32.988151 BS: BS_DEV_INIT run times (exec / console): 35 / 536 ms
1771 14:13:32.994409 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1772 14:13:32.998087 ELOG: NV offset 0xf30000 size 0x1000
1773 14:13:33.005126 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1774 14:13:33.011471 ELOG: Event(17) added with size 13 at 2023-06-07 14:13:33 UTC
1775 14:13:33.018425 ELOG: Event(92) added with size 9 at 2023-06-07 14:13:33 UTC
1776 14:13:33.024558 ELOG: Event(93) added with size 9 at 2023-06-07 14:13:33 UTC
1777 14:13:33.031460 ELOG: Event(9E) added with size 10 at 2023-06-07 14:13:33 UTC
1778 14:13:33.038130 ELOG: Event(9F) added with size 14 at 2023-06-07 14:13:33 UTC
1779 14:13:33.044718 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1780 14:13:33.051228 ELOG: Event(A1) added with size 10 at 2023-06-07 14:13:33 UTC
1781 14:13:33.058035 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1782 14:13:33.064485 ELOG: Event(A0) added with size 9 at 2023-06-07 14:13:33 UTC
1783 14:13:33.067286 elog_add_boot_reason: Logged dev mode boot
1784 14:13:33.074197 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1785 14:13:33.077722 Finalize devices...
1786 14:13:33.078395 Devices finalized
1787 14:13:33.084084 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1788 14:13:33.087354 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1789 14:13:33.094002 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1790 14:13:33.097768 ME: HFSTS1 : 0x80030055
1791 14:13:33.103982 ME: HFSTS2 : 0x30280116
1792 14:13:33.107510 ME: HFSTS3 : 0x00000050
1793 14:13:33.110598 ME: HFSTS4 : 0x00004000
1794 14:13:33.117329 ME: HFSTS5 : 0x00000000
1795 14:13:33.120327 ME: HFSTS6 : 0x00400006
1796 14:13:33.123914 ME: Manufacturing Mode : YES
1797 14:13:33.127304 ME: SPI Protection Mode Enabled : NO
1798 14:13:33.133642 ME: FW Partition Table : OK
1799 14:13:33.137062 ME: Bringup Loader Failure : NO
1800 14:13:33.140637 ME: Firmware Init Complete : NO
1801 14:13:33.143639 ME: Boot Options Present : NO
1802 14:13:33.147055 ME: Update In Progress : NO
1803 14:13:33.150742 ME: D0i3 Support : YES
1804 14:13:33.153646 ME: Low Power State Enabled : NO
1805 14:13:33.160108 ME: CPU Replaced : YES
1806 14:13:33.163623 ME: CPU Replacement Valid : YES
1807 14:13:33.167045 ME: Current Working State : 5
1808 14:13:33.170145 ME: Current Operation State : 1
1809 14:13:33.173435 ME: Current Operation Mode : 3
1810 14:13:33.176664 ME: Error Code : 0
1811 14:13:33.180239 ME: Enhanced Debug Mode : NO
1812 14:13:33.183823 ME: CPU Debug Disabled : YES
1813 14:13:33.186902 ME: TXT Support : NO
1814 14:13:33.193370 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1815 14:13:33.203470 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1816 14:13:33.206518 CBFS: 'fallback/slic' not found.
1817 14:13:33.209618 ACPI: Writing ACPI tables at 76b01000.
1818 14:13:33.209703 ACPI: * FACS
1819 14:13:33.212711 ACPI: * DSDT
1820 14:13:33.216412 Ramoops buffer: 0x100000@0x76a00000.
1821 14:13:33.219475 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1822 14:13:33.226287 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1823 14:13:33.229757 Google Chrome EC: version:
1824 14:13:33.232914 ro: voema_v2.0.10114-a447f03e46
1825 14:13:33.236013 rw: voema_v2.0.10114-a447f03e46
1826 14:13:33.236133 running image: 1
1827 14:13:33.242461 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1828 14:13:33.247633 ACPI: * FADT
1829 14:13:33.247718 SCI is IRQ9
1830 14:13:33.254130 ACPI: added table 1/32, length now 40
1831 14:13:33.254216 ACPI: * SSDT
1832 14:13:33.257660 Found 1 CPU(s) with 8 core(s) each.
1833 14:13:33.263929 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1834 14:13:33.267245 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1835 14:13:33.270825 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1836 14:13:33.273901 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1837 14:13:33.280539 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1838 14:13:33.287764 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1839 14:13:33.290449 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1840 14:13:33.297489 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1841 14:13:33.304067 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1842 14:13:33.307085 \_SB.PCI0.RP09: Added StorageD3Enable property
1843 14:13:33.310715 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1844 14:13:33.317622 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1845 14:13:33.324025 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1846 14:13:33.327062 PS2K: Passing 80 keymaps to kernel
1847 14:13:33.333981 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1848 14:13:33.340563 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1849 14:13:33.347003 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1850 14:13:33.353881 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1851 14:13:33.360651 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1852 14:13:33.367151 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1853 14:13:33.373723 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1854 14:13:33.376783 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1855 14:13:33.383642 ACPI: added table 2/32, length now 44
1856 14:13:33.383728 ACPI: * MCFG
1857 14:13:33.386924 ACPI: added table 3/32, length now 48
1858 14:13:33.390546 ACPI: * TPM2
1859 14:13:33.393721 TPM2 log created at 0x769f0000
1860 14:13:33.397010 ACPI: added table 4/32, length now 52
1861 14:13:33.397095 ACPI: * MADT
1862 14:13:33.400003 SCI is IRQ9
1863 14:13:33.403524 ACPI: added table 5/32, length now 56
1864 14:13:33.403641 current = 76b09850
1865 14:13:33.406648 ACPI: * DMAR
1866 14:13:33.410041 ACPI: added table 6/32, length now 60
1867 14:13:33.413674 ACPI: added table 7/32, length now 64
1868 14:13:33.416605 ACPI: * HPET
1869 14:13:33.420076 ACPI: added table 8/32, length now 68
1870 14:13:33.420159 ACPI: done.
1871 14:13:33.423767 ACPI tables: 35216 bytes.
1872 14:13:33.426712 smbios_write_tables: 769ef000
1873 14:13:33.430579 EC returned error result code 3
1874 14:13:33.433110 Couldn't obtain OEM name from CBI
1875 14:13:33.436933 Create SMBIOS type 16
1876 14:13:33.440497 Create SMBIOS type 17
1877 14:13:33.443659 GENERIC: 0.0 (WIFI Device)
1878 14:13:33.443770 SMBIOS tables: 1750 bytes.
1879 14:13:33.450291 Writing table forward entry at 0x00000500
1880 14:13:33.456757 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1881 14:13:33.460024 Writing coreboot table at 0x76b25000
1882 14:13:33.466662 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1883 14:13:33.470098 1. 0000000000001000-000000000009ffff: RAM
1884 14:13:33.473526 2. 00000000000a0000-00000000000fffff: RESERVED
1885 14:13:33.480150 3. 0000000000100000-00000000769eefff: RAM
1886 14:13:33.483368 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1887 14:13:33.489830 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1888 14:13:33.496719 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1889 14:13:33.499735 7. 0000000077000000-000000007fbfffff: RESERVED
1890 14:13:33.506867 8. 00000000c0000000-00000000cfffffff: RESERVED
1891 14:13:33.509584 9. 00000000f8000000-00000000f9ffffff: RESERVED
1892 14:13:33.513301 10. 00000000fb000000-00000000fb000fff: RESERVED
1893 14:13:33.519654 11. 00000000fe000000-00000000fe00ffff: RESERVED
1894 14:13:33.523157 12. 00000000fed80000-00000000fed87fff: RESERVED
1895 14:13:33.529646 13. 00000000fed90000-00000000fed92fff: RESERVED
1896 14:13:33.533265 14. 00000000feda0000-00000000feda1fff: RESERVED
1897 14:13:33.539511 15. 00000000fedc0000-00000000feddffff: RESERVED
1898 14:13:33.542703 16. 0000000100000000-00000002803fffff: RAM
1899 14:13:33.546602 Passing 4 GPIOs to payload:
1900 14:13:33.549703 NAME | PORT | POLARITY | VALUE
1901 14:13:33.556366 lid | undefined | high | high
1902 14:13:33.562491 power | undefined | high | low
1903 14:13:33.566034 oprom | undefined | high | low
1904 14:13:33.572621 EC in RW | 0x000000e5 | high | low
1905 14:13:33.579441 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum c7b9
1906 14:13:33.582590 coreboot table: 1576 bytes.
1907 14:13:33.585710 IMD ROOT 0. 0x76fff000 0x00001000
1908 14:13:33.589165 IMD SMALL 1. 0x76ffe000 0x00001000
1909 14:13:33.592478 FSP MEMORY 2. 0x76c4e000 0x003b0000
1910 14:13:33.595806 VPD 3. 0x76c4d000 0x00000367
1911 14:13:33.599021 RO MCACHE 4. 0x76c4c000 0x00000fdc
1912 14:13:33.602323 CONSOLE 5. 0x76c2c000 0x00020000
1913 14:13:33.605785 FMAP 6. 0x76c2b000 0x00000578
1914 14:13:33.612316 TIME STAMP 7. 0x76c2a000 0x00000910
1915 14:13:33.615656 VBOOT WORK 8. 0x76c16000 0x00014000
1916 14:13:33.618802 ROMSTG STCK 9. 0x76c15000 0x00001000
1917 14:13:33.621854 AFTER CAR 10. 0x76c0a000 0x0000b000
1918 14:13:33.625182 RAMSTAGE 11. 0x76b97000 0x00073000
1919 14:13:33.628730 REFCODE 12. 0x76b42000 0x00055000
1920 14:13:33.631837 SMM BACKUP 13. 0x76b32000 0x00010000
1921 14:13:33.638616 4f444749 14. 0x76b30000 0x00002000
1922 14:13:33.641733 EXT VBT15. 0x76b2d000 0x0000219f
1923 14:13:33.645200 COREBOOT 16. 0x76b25000 0x00008000
1924 14:13:33.648468 ACPI 17. 0x76b01000 0x00024000
1925 14:13:33.652068 ACPI GNVS 18. 0x76b00000 0x00001000
1926 14:13:33.655009 RAMOOPS 19. 0x76a00000 0x00100000
1927 14:13:33.658744 TPM2 TCGLOG20. 0x769f0000 0x00010000
1928 14:13:33.661928 SMBIOS 21. 0x769ef000 0x00000800
1929 14:13:33.664871 IMD small region:
1930 14:13:33.668527 IMD ROOT 0. 0x76ffec00 0x00000400
1931 14:13:33.671486 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1932 14:13:33.674906 POWER STATE 2. 0x76ffeb80 0x00000044
1933 14:13:33.681518 ROMSTAGE 3. 0x76ffeb60 0x00000004
1934 14:13:33.684752 MEM INFO 4. 0x76ffe980 0x000001e0
1935 14:13:33.691602 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1936 14:13:33.691710 MTRR: Physical address space:
1937 14:13:33.698355 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1938 14:13:33.705110 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1939 14:13:33.711387 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1940 14:13:33.717921 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1941 14:13:33.724729 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1942 14:13:33.731697 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1943 14:13:33.737717 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1944 14:13:33.741277 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:13:33.744724 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:13:33.747771 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:13:33.754542 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:13:33.757744 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:13:33.761303 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:13:33.764563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:13:33.771206 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:13:33.774833 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:13:33.778026 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:13:33.781530 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:13:33.785436 call enable_fixed_mtrr()
1956 14:13:33.788651 CPU physical address size: 39 bits
1957 14:13:33.795745 MTRR: default type WB/UC MTRR counts: 6/6.
1958 14:13:33.798701 MTRR: UC selected as default type.
1959 14:13:33.805450 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1960 14:13:33.809110 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1961 14:13:33.815129 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1962 14:13:33.821757 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1963 14:13:33.828497 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1964 14:13:33.835209 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1965 14:13:33.835664
1966 14:13:33.838629 MTRR check
1967 14:13:33.841988 Fixed MTRRs : Enabled
1968 14:13:33.842439 Variable MTRRs: Enabled
1969 14:13:33.842787
1970 14:13:33.848429 MTRR: Fixed MSR 0x250 0x0606060606060606
1971 14:13:33.851606 MTRR: Fixed MSR 0x258 0x0606060606060606
1972 14:13:33.854887 MTRR: Fixed MSR 0x259 0x0000000000000000
1973 14:13:33.858334 MTRR: Fixed MSR 0x268 0x0606060606060606
1974 14:13:33.861419 MTRR: Fixed MSR 0x269 0x0606060606060606
1975 14:13:33.868227 MTRR: Fixed MSR 0x26a 0x0606060606060606
1976 14:13:33.871993 MTRR: Fixed MSR 0x26b 0x0606060606060606
1977 14:13:33.874791 MTRR: Fixed MSR 0x26c 0x0606060606060606
1978 14:13:33.878419 MTRR: Fixed MSR 0x26d 0x0606060606060606
1979 14:13:33.884920 MTRR: Fixed MSR 0x26e 0x0606060606060606
1980 14:13:33.888229 MTRR: Fixed MSR 0x26f 0x0606060606060606
1981 14:13:33.894974 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
1982 14:13:33.897961 call enable_fixed_mtrr()
1983 14:13:33.901414 Checking cr50 for pending updates
1984 14:13:33.905224 CPU physical address size: 39 bits
1985 14:13:33.908261 MTRR: Fixed MSR 0x250 0x0606060606060606
1986 14:13:33.911733 MTRR: Fixed MSR 0x250 0x0606060606060606
1987 14:13:33.915012 MTRR: Fixed MSR 0x258 0x0606060606060606
1988 14:13:33.922071 MTRR: Fixed MSR 0x259 0x0000000000000000
1989 14:13:33.924885 MTRR: Fixed MSR 0x268 0x0606060606060606
1990 14:13:33.928342 MTRR: Fixed MSR 0x269 0x0606060606060606
1991 14:13:33.931469 MTRR: Fixed MSR 0x26a 0x0606060606060606
1992 14:13:33.938058 MTRR: Fixed MSR 0x26b 0x0606060606060606
1993 14:13:33.941330 MTRR: Fixed MSR 0x26c 0x0606060606060606
1994 14:13:33.944632 MTRR: Fixed MSR 0x26d 0x0606060606060606
1995 14:13:33.948247 MTRR: Fixed MSR 0x26e 0x0606060606060606
1996 14:13:33.954699 MTRR: Fixed MSR 0x26f 0x0606060606060606
1997 14:13:33.957982 MTRR: Fixed MSR 0x258 0x0606060606060606
1998 14:13:33.961406 call enable_fixed_mtrr()
1999 14:13:33.964701 MTRR: Fixed MSR 0x259 0x0000000000000000
2000 14:13:33.967759 MTRR: Fixed MSR 0x268 0x0606060606060606
2001 14:13:33.974955 MTRR: Fixed MSR 0x269 0x0606060606060606
2002 14:13:33.977757 MTRR: Fixed MSR 0x26a 0x0606060606060606
2003 14:13:33.981457 MTRR: Fixed MSR 0x26b 0x0606060606060606
2004 14:13:33.984555 MTRR: Fixed MSR 0x26c 0x0606060606060606
2005 14:13:33.991598 MTRR: Fixed MSR 0x26d 0x0606060606060606
2006 14:13:33.994493 MTRR: Fixed MSR 0x26e 0x0606060606060606
2007 14:13:33.997786 MTRR: Fixed MSR 0x26f 0x0606060606060606
2008 14:13:34.001301 CPU physical address size: 39 bits
2009 14:13:34.005397 call enable_fixed_mtrr()
2010 14:13:34.009465 MTRR: Fixed MSR 0x250 0x0606060606060606
2011 14:13:34.015292 MTRR: Fixed MSR 0x250 0x0606060606060606
2012 14:13:34.018644 MTRR: Fixed MSR 0x258 0x0606060606060606
2013 14:13:34.022156 MTRR: Fixed MSR 0x259 0x0000000000000000
2014 14:13:34.025247 MTRR: Fixed MSR 0x268 0x0606060606060606
2015 14:13:34.032084 MTRR: Fixed MSR 0x269 0x0606060606060606
2016 14:13:34.035221 MTRR: Fixed MSR 0x26a 0x0606060606060606
2017 14:13:34.038446 MTRR: Fixed MSR 0x26b 0x0606060606060606
2018 14:13:34.041900 MTRR: Fixed MSR 0x26c 0x0606060606060606
2019 14:13:34.048406 MTRR: Fixed MSR 0x26d 0x0606060606060606
2020 14:13:34.051913 MTRR: Fixed MSR 0x26e 0x0606060606060606
2021 14:13:34.054913 MTRR: Fixed MSR 0x26f 0x0606060606060606
2022 14:13:34.061561 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 14:13:34.062069 call enable_fixed_mtrr()
2024 14:13:34.068327 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 14:13:34.071508 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 14:13:34.075176 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 14:13:34.078306 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 14:13:34.084605 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 14:13:34.088135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 14:13:34.091232 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 14:13:34.094478 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 14:13:34.101229 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 14:13:34.104783 CPU physical address size: 39 bits
2034 14:13:34.107693 call enable_fixed_mtrr()
2035 14:13:34.111404 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 14:13:34.117844 MTRR: Fixed MSR 0x250 0x0606060606060606
2037 14:13:34.120962 MTRR: Fixed MSR 0x258 0x0606060606060606
2038 14:13:34.124528 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 14:13:34.127651 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 14:13:34.134514 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 14:13:34.137835 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 14:13:34.140773 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 14:13:34.144243 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 14:13:34.147467 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 14:13:34.154141 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 14:13:34.157390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 14:13:34.160467 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 14:13:34.167498 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 14:13:34.170988 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 14:13:34.174362 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 14:13:34.177558 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 14:13:34.183898 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 14:13:34.187314 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 14:13:34.190247 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 14:13:34.193775 MTRR: Fixed MSR 0x26e 0x0606060606060606
2056 14:13:34.200455 MTRR: Fixed MSR 0x26f 0x0606060606060606
2057 14:13:34.203769 call enable_fixed_mtrr()
2058 14:13:34.207286 call enable_fixed_mtrr()
2059 14:13:34.210105 CPU physical address size: 39 bits
2060 14:13:34.215126 CPU physical address size: 39 bits
2061 14:13:34.215564 Reading cr50 TPM mode
2062 14:13:34.218743 CPU physical address size: 39 bits
2063 14:13:34.222022 CPU physical address size: 39 bits
2064 14:13:34.228462 BS: BS_PAYLOAD_LOAD entry times (exec / console): 319 / 6 ms
2065 14:13:34.235009 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2066 14:13:34.241796 Checking segment from ROM address 0xffc02b38
2067 14:13:34.245165 Checking segment from ROM address 0xffc02b54
2068 14:13:34.248622 Loading segment from ROM address 0xffc02b38
2069 14:13:34.251652 code (compression=0)
2070 14:13:34.261745 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2071 14:13:34.267965 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2072 14:13:34.271647 it's not compressed!
2073 14:13:34.410475 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2074 14:13:34.417363 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2075 14:13:34.423779 Loading segment from ROM address 0xffc02b54
2076 14:13:34.424262 Entry Point 0x30000000
2077 14:13:34.427009 Loaded segments
2078 14:13:34.433998 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2079 14:13:34.476419 Finalizing chipset.
2080 14:13:34.479710 Finalizing SMM.
2081 14:13:34.480180 APMC done.
2082 14:13:34.486397 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2083 14:13:34.489890 mp_park_aps done after 0 msecs.
2084 14:13:34.493133 Jumping to boot code at 0x30000000(0x76b25000)
2085 14:13:34.503235 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2086 14:13:34.503699
2087 14:13:34.504255
2088 14:13:34.506403
2089 14:13:34.506827 Starting depthcharge on Voema...
2090 14:13:34.507973 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2091 14:13:34.508274 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2092 14:13:34.508359 Setting prompt string to ['volteer:']
2093 14:13:34.508437 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2094 14:13:34.509104
2095 14:13:34.516111 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2096 14:13:34.516195
2097 14:13:34.522618 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2098 14:13:34.522702
2099 14:13:34.529182 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2100 14:13:34.529267
2101 14:13:34.532500 Failed to find eMMC card reader
2102 14:13:34.532584
2103 14:13:34.532650 Wipe memory regions:
2104 14:13:34.535490
2105 14:13:34.539225 [0x00000000001000, 0x000000000a0000)
2106 14:13:34.539308
2107 14:13:34.542372 [0x00000000100000, 0x00000030000000)
2108 14:13:34.567350
2109 14:13:34.570245 [0x00000032662db0, 0x000000769ef000)
2110 14:13:34.606051
2111 14:13:34.609275 [0x00000100000000, 0x00000280400000)
2112 14:13:34.811605
2113 14:13:34.814612 ec_init: CrosEC protocol v3 supported (256, 256)
2114 14:13:35.245554
2115 14:13:35.245739 R8152: Initializing
2116 14:13:35.245840
2117 14:13:35.248406 Version 6 (ocp_data = 5c30)
2118 14:13:35.248492
2119 14:13:35.251818 R8152: Done initializing
2120 14:13:35.251948
2121 14:13:35.254842 Adding net device
2122 14:13:35.556262
2123 14:13:35.559424 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2124 14:13:35.559531
2125 14:13:35.559625
2126 14:13:35.559717
2127 14:13:35.562924 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2129 14:13:35.663453 volteer: tftpboot 192.168.201.1 10624890/tftp-deploy-l3u6t90z/kernel/bzImage 10624890/tftp-deploy-l3u6t90z/kernel/cmdline 10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
2130 14:13:35.663723 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 14:13:35.663925 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2132 14:13:35.667967 tftpboot 192.168.201.1 10624890/tftp-deploy-l3u6t90z/kernel/bzIploy-l3u6t90z/kernel/cmdline 10624890/tftp-deploy-l3u6t90z/ramdisk/ramdisk.cpio.gz
2133 14:13:35.668206
2134 14:13:35.668446 Waiting for link
2135 14:13:35.870752
2136 14:13:35.871056 done.
2137 14:13:35.871257
2138 14:13:35.871433 MAC: 00:24:32:30:77:76
2139 14:13:35.871606
2140 14:13:35.874126 Sending DHCP discover... done.
2141 14:13:35.874365
2142 14:13:35.877554 Waiting for reply... done.
2143 14:13:35.877831
2144 14:13:35.880697 Sending DHCP request... done.
2145 14:13:35.881017
2146 14:13:37.161958 Waiting for reply... done.
2147 14:13:37.162849
2148 14:13:37.163490 My ip is 192.168.201.16
2149 14:13:37.164235
2150 14:13:37.165308 The DHCP server ip is 192.168.201.1
2151 14:13:37.168433
2152 14:13:37.171953 TFTP server IP predefined by user: 192.168.201.1
2153 14:13:37.172580
2154 14:13:37.178325 Bootfile predefined by user: 10624890/tftp-deploy-l3u6t90z/kernel/bzImage
2155 14:13:37.178892
2156 14:13:37.181561 Sending tftp read request... done.
2157 14:13:37.182022
2158 14:13:37.190477 Waiting for the transfer...
2159 14:13:37.190919
2160 14:13:37.778459 00000000 ################################################################
2161 14:13:37.778625
2162 14:13:38.337160 00080000 ################################################################
2163 14:13:38.337300
2164 14:13:38.895927 00100000 ################################################################
2165 14:13:38.896061
2166 14:13:39.462730 00180000 ################################################################
2167 14:13:39.462872
2168 14:13:40.068899 00200000 ################################################################
2169 14:13:40.069046
2170 14:13:40.663826 00280000 ################################################################
2171 14:13:40.664030
2172 14:13:41.201135 00300000 ################################################################
2173 14:13:41.201299
2174 14:13:41.729472 00380000 ################################################################
2175 14:13:41.729633
2176 14:13:42.247558 00400000 ################################################################
2177 14:13:42.247725
2178 14:13:42.767534 00480000 ################################################################
2179 14:13:42.767674
2180 14:13:43.286201 00500000 ################################################################
2181 14:13:43.286369
2182 14:13:43.813272 00580000 ################################################################
2183 14:13:43.813412
2184 14:13:44.342613 00600000 ################################################################
2185 14:13:44.342751
2186 14:13:44.886949 00680000 ################################################################
2187 14:13:44.887095
2188 14:13:45.432850 00700000 ################################################################
2189 14:13:45.432984
2190 14:13:45.454958 00780000 ### done.
2191 14:13:45.455040
2192 14:13:45.457925 The bootfile was 7884688 bytes long.
2193 14:13:45.458004
2194 14:13:45.461515 Sending tftp read request... done.
2195 14:13:45.461596
2196 14:13:45.464390 Waiting for the transfer...
2197 14:13:45.464548
2198 14:13:45.991178 00000000 ################################################################
2199 14:13:45.991342
2200 14:13:46.523752 00080000 ################################################################
2201 14:13:46.523943
2202 14:13:47.064528 00100000 ################################################################
2203 14:13:47.064664
2204 14:13:47.656138 00180000 ################################################################
2205 14:13:47.656276
2206 14:13:48.255562 00200000 ################################################################
2207 14:13:48.255702
2208 14:13:48.778989 00280000 ################################################################
2209 14:13:48.779122
2210 14:13:49.402820 00300000 ################################################################
2211 14:13:49.403356
2212 14:13:50.061287 00380000 ################################################################
2213 14:13:50.061426
2214 14:13:50.718500 00400000 ################################################################
2215 14:13:50.719285
2216 14:13:51.407041 00480000 ################################################################
2217 14:13:51.407618
2218 14:13:52.095964 00500000 ################################################################
2219 14:13:52.096577
2220 14:13:52.730720 00580000 ################################################################
2221 14:13:52.730852
2222 14:13:53.379026 00600000 ################################################################
2223 14:13:53.379582
2224 14:13:54.092963 00680000 ################################################################
2225 14:13:54.093543
2226 14:13:54.729223 00700000 ################################################################
2227 14:13:54.729362
2228 14:13:55.348069 00780000 ################################################################
2229 14:13:55.348631
2230 14:13:55.867275 00800000 ##################################################### done.
2231 14:13:55.867437
2232 14:13:55.870907 Sending tftp read request... done.
2233 14:13:55.870999
2234 14:13:55.874258 Waiting for the transfer...
2235 14:13:55.874380
2236 14:13:55.874503 00000000 # done.
2237 14:13:55.874590
2238 14:13:55.883936 Command line loaded dynamically from TFTP file: 10624890/tftp-deploy-l3u6t90z/kernel/cmdline
2239 14:13:55.884057
2240 14:13:55.897184 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2241 14:13:55.901363
2242 14:13:55.904525 Shutting down all USB controllers.
2243 14:13:55.904703
2244 14:13:55.904875 Removing current net device
2245 14:13:55.905009
2246 14:13:55.907896 Finalizing coreboot
2247 14:13:55.908102
2248 14:13:55.914592 Exiting depthcharge with code 4 at timestamp: 30074212
2249 14:13:55.914840
2250 14:13:55.915035
2251 14:13:55.915218 Starting kernel ...
2252 14:13:55.915393
2253 14:13:55.915628
2254 14:13:55.916353 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2255 14:13:55.916636 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2256 14:13:55.916853 Setting prompt string to ['Linux version [0-9]']
2257 14:13:55.917077 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2258 14:13:55.917325 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2260 14:18:18.917587 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2262 14:18:18.918693 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2264 14:18:18.919559 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2267 14:18:18.921245 end: 2 depthcharge-action (duration 00:05:00) [common]
2269 14:18:18.922669 Cleaning after the job
2270 14:18:18.922757 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/ramdisk
2271 14:18:18.923918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/kernel
2272 14:18:18.924884 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624890/tftp-deploy-l3u6t90z/modules
2273 14:18:18.925200 start: 5.1 power-off (timeout 00:00:30) [common]
2274 14:18:18.925357 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2275 14:18:19.002635 >> Command sent successfully.
2276 14:18:19.007960 Returned 0 in 0 seconds
2277 14:18:19.108951 end: 5.1 power-off (duration 00:00:00) [common]
2279 14:18:19.110495 start: 5.2 read-feedback (timeout 00:10:00) [common]
2280 14:18:19.111720 Listened to connection for namespace 'common' for up to 1s
2281 14:18:20.112283 Finalising connection for namespace 'common'
2282 14:18:20.112960 Disconnecting from shell: Finalise
2283 14:18:20.113395
2284 14:18:20.214490 end: 5.2 read-feedback (duration 00:00:01) [common]
2285 14:18:20.215121 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624890
2286 14:18:20.231906 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624890
2287 14:18:20.232035 JobError: Your job cannot terminate cleanly.