Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
1 14:12:58.876523 lava-dispatcher, installed at version: 2023.05.1
2 14:12:58.876735 start: 0 validate
3 14:12:58.876878 Start time: 2023-06-07 14:12:58.876870+00:00 (UTC)
4 14:12:58.877037 Using caching service: 'http://localhost/cache/?uri=%s'
5 14:12:58.877177 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Finitrd.cpio.gz exists
6 14:12:59.148235 Using caching service: 'http://localhost/cache/?uri=%s'
7 14:12:59.149043 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip74-rt43-218-g246f4be89a77%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 14:12:59.420621 Using caching service: 'http://localhost/cache/?uri=%s'
9 14:12:59.421409 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230527.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 14:13:02.082578 Using caching service: 'http://localhost/cache/?uri=%s'
11 14:13:02.083348 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip74-rt43-218-g246f4be89a77%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 14:13:02.358745 validate duration: 3.48
14 14:13:02.360043 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 14:13:02.360584 start: 1.1 download-retry (timeout 00:10:00) [common]
16 14:13:02.361053 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 14:13:02.361589 Not decompressing ramdisk as can be used compressed.
18 14:13:02.362008 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/initrd.cpio.gz
19 14:13:02.362343 saving as /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/ramdisk/initrd.cpio.gz
20 14:13:02.362653 total size: 5432291 (5MB)
21 14:13:02.882124 progress 0% (0MB)
22 14:13:02.886989 progress 5% (0MB)
23 14:13:02.888561 progress 10% (0MB)
24 14:13:02.890072 progress 15% (0MB)
25 14:13:02.891818 progress 20% (1MB)
26 14:13:02.893369 progress 25% (1MB)
27 14:13:02.894935 progress 30% (1MB)
28 14:13:02.896646 progress 35% (1MB)
29 14:13:02.898127 progress 40% (2MB)
30 14:13:02.899649 progress 45% (2MB)
31 14:13:02.901129 progress 50% (2MB)
32 14:13:02.902777 progress 55% (2MB)
33 14:13:02.904297 progress 60% (3MB)
34 14:13:02.905771 progress 65% (3MB)
35 14:13:02.907423 progress 70% (3MB)
36 14:13:02.908947 progress 75% (3MB)
37 14:13:02.910423 progress 80% (4MB)
38 14:13:02.911937 progress 85% (4MB)
39 14:13:02.913586 progress 90% (4MB)
40 14:13:02.915060 progress 95% (4MB)
41 14:13:02.916595 progress 100% (5MB)
42 14:13:02.916818 5MB downloaded in 0.55s (9.35MB/s)
43 14:13:02.916979 end: 1.1.1 http-download (duration 00:00:01) [common]
45 14:13:02.917237 end: 1.1 download-retry (duration 00:00:01) [common]
46 14:13:02.917331 start: 1.2 download-retry (timeout 00:09:59) [common]
47 14:13:02.917423 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 14:13:02.917560 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip74-rt43-218-g246f4be89a77/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 14:13:02.917634 saving as /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/kernel/bzImage
50 14:13:02.917699 total size: 7884688 (7MB)
51 14:13:02.917764 No compression specified
52 14:13:02.918886 progress 0% (0MB)
53 14:13:02.921236 progress 5% (0MB)
54 14:13:02.923468 progress 10% (0MB)
55 14:13:02.925718 progress 15% (1MB)
56 14:13:02.927948 progress 20% (1MB)
57 14:13:02.930159 progress 25% (1MB)
58 14:13:02.932416 progress 30% (2MB)
59 14:13:02.934623 progress 35% (2MB)
60 14:13:02.936886 progress 40% (3MB)
61 14:13:02.939211 progress 45% (3MB)
62 14:13:02.941461 progress 50% (3MB)
63 14:13:02.943684 progress 55% (4MB)
64 14:13:02.945910 progress 60% (4MB)
65 14:13:02.948188 progress 65% (4MB)
66 14:13:02.950361 progress 70% (5MB)
67 14:13:02.952581 progress 75% (5MB)
68 14:13:02.954755 progress 80% (6MB)
69 14:13:02.956978 progress 85% (6MB)
70 14:13:02.959233 progress 90% (6MB)
71 14:13:02.961485 progress 95% (7MB)
72 14:13:02.963717 progress 100% (7MB)
73 14:13:02.963916 7MB downloaded in 0.05s (162.71MB/s)
74 14:13:02.964066 end: 1.2.1 http-download (duration 00:00:00) [common]
76 14:13:02.964309 end: 1.2 download-retry (duration 00:00:00) [common]
77 14:13:02.964434 start: 1.3 download-retry (timeout 00:09:59) [common]
78 14:13:02.964525 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 14:13:02.964668 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230527.0/amd64/full.rootfs.tar.xz
80 14:13:02.964742 saving as /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/nfsrootfs/full.rootfs.tar
81 14:13:02.964812 total size: 207183956 (197MB)
82 14:13:02.964876 Using unxz to decompress xz
83 14:13:02.968861 progress 0% (0MB)
84 14:13:03.572191 progress 5% (9MB)
85 14:13:04.151456 progress 10% (19MB)
86 14:13:04.809916 progress 15% (29MB)
87 14:13:05.210220 progress 20% (39MB)
88 14:13:05.605426 progress 25% (49MB)
89 14:13:06.266411 progress 30% (59MB)
90 14:13:06.871983 progress 35% (69MB)
91 14:13:07.540312 progress 40% (79MB)
92 14:13:08.151801 progress 45% (88MB)
93 14:13:08.793977 progress 50% (98MB)
94 14:13:09.486734 progress 55% (108MB)
95 14:13:10.235874 progress 60% (118MB)
96 14:13:10.393669 progress 65% (128MB)
97 14:13:10.550707 progress 70% (138MB)
98 14:13:10.657298 progress 75% (148MB)
99 14:13:10.731295 progress 80% (158MB)
100 14:13:10.807726 progress 85% (167MB)
101 14:13:10.923644 progress 90% (177MB)
102 14:13:11.217607 progress 95% (187MB)
103 14:13:11.857477 progress 100% (197MB)
104 14:13:11.863963 197MB downloaded in 8.90s (22.20MB/s)
105 14:13:11.864321 end: 1.3.1 http-download (duration 00:00:09) [common]
107 14:13:11.864614 end: 1.3 download-retry (duration 00:00:09) [common]
108 14:13:11.864713 start: 1.4 download-retry (timeout 00:09:50) [common]
109 14:13:11.864810 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 14:13:11.864967 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip74-rt43-218-g246f4be89a77/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 14:13:11.865043 saving as /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/modules/modules.tar
112 14:13:11.865110 total size: 253976 (0MB)
113 14:13:11.865177 Using unxz to decompress xz
114 14:13:11.869018 progress 12% (0MB)
115 14:13:11.869429 progress 25% (0MB)
116 14:13:11.869683 progress 38% (0MB)
117 14:13:11.871112 progress 51% (0MB)
118 14:13:11.873131 progress 64% (0MB)
119 14:13:11.875277 progress 77% (0MB)
120 14:13:11.877425 progress 90% (0MB)
121 14:13:11.879489 progress 100% (0MB)
122 14:13:11.885789 0MB downloaded in 0.02s (11.72MB/s)
123 14:13:11.886049 end: 1.4.1 http-download (duration 00:00:00) [common]
125 14:13:11.886333 end: 1.4 download-retry (duration 00:00:00) [common]
126 14:13:11.886435 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 14:13:11.886540 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 14:13:15.435771 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10624855/extract-nfsrootfs-tdpubo52
129 14:13:15.435991 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 14:13:15.436106 start: 1.5.2 lava-overlay (timeout 00:09:47) [common]
131 14:13:15.436286 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd
132 14:13:15.436420 makedir: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin
133 14:13:15.436528 makedir: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/tests
134 14:13:15.436631 makedir: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/results
135 14:13:15.436739 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-add-keys
136 14:13:15.436896 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-add-sources
137 14:13:15.437066 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-background-process-start
138 14:13:15.437200 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-background-process-stop
139 14:13:15.437333 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-common-functions
140 14:13:15.437463 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-echo-ipv4
141 14:13:15.437595 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-install-packages
142 14:13:15.437725 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-installed-packages
143 14:13:15.437856 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-os-build
144 14:13:15.437986 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-probe-channel
145 14:13:15.438115 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-probe-ip
146 14:13:15.438244 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-target-ip
147 14:13:15.438372 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-target-mac
148 14:13:15.438500 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-target-storage
149 14:13:15.438632 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-case
150 14:13:15.438763 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-event
151 14:13:15.438892 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-feedback
152 14:13:15.439022 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-raise
153 14:13:15.439151 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-reference
154 14:13:15.439283 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-runner
155 14:13:15.439413 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-set
156 14:13:15.439581 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-test-shell
157 14:13:15.439715 Updating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-add-keys (debian)
158 14:13:15.439875 Updating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-add-sources (debian)
159 14:13:15.440024 Updating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-install-packages (debian)
160 14:13:15.440179 Updating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-installed-packages (debian)
161 14:13:15.440324 Updating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/bin/lava-os-build (debian)
162 14:13:15.440451 Creating /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/environment
163 14:13:15.440553 LAVA metadata
164 14:13:15.440635 - LAVA_JOB_ID=10624855
165 14:13:15.440703 - LAVA_DISPATCHER_IP=192.168.201.1
166 14:13:15.440809 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:47) [common]
167 14:13:15.440882 skipped lava-vland-overlay
168 14:13:15.440962 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 14:13:15.441046 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
170 14:13:15.441112 skipped lava-multinode-overlay
171 14:13:15.441189 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 14:13:15.441273 start: 1.5.2.3 test-definition (timeout 00:09:47) [common]
173 14:13:15.441349 Loading test definitions
174 14:13:15.441447 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:47) [common]
175 14:13:15.441521 Using /lava-10624855 at stage 0
176 14:13:15.441807 uuid=10624855_1.5.2.3.1 testdef=None
177 14:13:15.441902 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 14:13:15.441993 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
179 14:13:15.442467 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 14:13:15.442707 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
182 14:13:15.443296 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 14:13:15.443589 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
185 14:13:15.444158 runner path: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/0/tests/0_timesync-off test_uuid 10624855_1.5.2.3.1
186 14:13:15.444320 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 14:13:15.444559 start: 1.5.2.3.5 git-repo-action (timeout 00:09:47) [common]
189 14:13:15.444638 Using /lava-10624855 at stage 0
190 14:13:15.444743 Fetching tests from https://github.com/kernelci/test-definitions.git
191 14:13:15.444828 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/0/tests/1_kselftest-futex'
192 14:13:19.628539 Running '/usr/bin/git checkout kernelci.org
193 14:13:19.785469 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/0/tests/1_kselftest-futex/automated/linux/kselftest/kselftest.yaml
194 14:13:19.786235 uuid=10624855_1.5.2.3.5 testdef=None
195 14:13:19.786439 end: 1.5.2.3.5 git-repo-action (duration 00:00:04) [common]
197 14:13:19.786708 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
198 14:13:19.787564 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 14:13:19.787824 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
201 14:13:19.788862 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 14:13:19.789121 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
204 14:13:19.790132 runner path: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/0/tests/1_kselftest-futex test_uuid 10624855_1.5.2.3.5
205 14:13:19.790234 BOARD='asus-C436FA-Flip-hatch'
206 14:13:19.790305 BRANCH='cip-gitlab'
207 14:13:19.790371 SKIPFILE='/dev/null'
208 14:13:19.790436 SKIP_INSTALL='True'
209 14:13:19.790498 TESTPROG_URL='None'
210 14:13:19.790558 TST_CASENAME=''
211 14:13:19.790619 TST_CMDFILES='futex'
212 14:13:19.790771 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 14:13:19.790995 Creating lava-test-runner.conf files
215 14:13:19.791065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10624855/lava-overlay-3ecyeymd/lava-10624855/0 for stage 0
216 14:13:19.791165 - 0_timesync-off
217 14:13:19.791243 - 1_kselftest-futex
218 14:13:19.791343 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
219 14:13:19.791437 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
220 14:13:28.156893 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 14:13:28.157064 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
222 14:13:28.157177 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 14:13:28.157296 end: 1.5.2 lava-overlay (duration 00:00:13) [common]
224 14:13:28.157397 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
225 14:13:28.302739 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 14:13:28.303120 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
227 14:13:28.303265 extracting modules file /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624855/extract-nfsrootfs-tdpubo52
228 14:13:28.320075 extracting modules file /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10624855/extract-overlay-ramdisk-miw89xgm/ramdisk
229 14:13:28.334573 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 14:13:28.334725 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
231 14:13:28.334823 [common] Applying overlay to NFS
232 14:13:28.334903 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10624855/compress-overlay-ttj6dbpo/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10624855/extract-nfsrootfs-tdpubo52
233 14:13:29.344162 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 14:13:29.344355 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
235 14:13:29.344462 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 14:13:29.344564 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
237 14:13:29.344661 Building ramdisk /var/lib/lava/dispatcher/tmp/10624855/extract-overlay-ramdisk-miw89xgm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10624855/extract-overlay-ramdisk-miw89xgm/ramdisk
238 14:13:29.428446 >> 26198 blocks
239 14:13:30.023215 rename /var/lib/lava/dispatcher/tmp/10624855/extract-overlay-ramdisk-miw89xgm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
240 14:13:30.023705 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 14:13:30.023841 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
242 14:13:30.023963 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
243 14:13:30.024065 No mkimage arch provided, not using FIT.
244 14:13:30.024163 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 14:13:30.024258 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 14:13:30.024374 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 14:13:30.024477 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
248 14:13:30.024564 No LXC device requested
249 14:13:30.024652 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 14:13:30.024746 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
251 14:13:30.024833 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 14:13:30.024915 Checking files for TFTP limit of 4294967296 bytes.
253 14:13:30.025359 end: 1 tftp-deploy (duration 00:00:28) [common]
254 14:13:30.025473 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 14:13:30.025576 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 14:13:30.025713 substitutions:
257 14:13:30.025793 - {DTB}: None
258 14:13:30.025863 - {INITRD}: 10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
259 14:13:30.025927 - {KERNEL}: 10624855/tftp-deploy-z_tjl_k1/kernel/bzImage
260 14:13:30.025991 - {LAVA_MAC}: None
261 14:13:30.026052 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10624855/extract-nfsrootfs-tdpubo52
262 14:13:30.026116 - {NFS_SERVER_IP}: 192.168.201.1
263 14:13:30.026176 - {PRESEED_CONFIG}: None
264 14:13:30.026235 - {PRESEED_LOCAL}: None
265 14:13:30.026294 - {RAMDISK}: 10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
266 14:13:30.026352 - {ROOT_PART}: None
267 14:13:30.026411 - {ROOT}: None
268 14:13:30.026470 - {SERVER_IP}: 192.168.201.1
269 14:13:30.026529 - {TEE}: None
270 14:13:30.026588 Parsed boot commands:
271 14:13:30.026647 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 14:13:30.026849 Parsed boot commands: tftpboot 192.168.201.1 10624855/tftp-deploy-z_tjl_k1/kernel/bzImage 10624855/tftp-deploy-z_tjl_k1/kernel/cmdline 10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
273 14:13:30.026952 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 14:13:30.027046 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 14:13:30.027149 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 14:13:30.027243 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 14:13:30.027321 Not connected, no need to disconnect.
278 14:13:30.027453 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 14:13:30.027580 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 14:13:30.027669 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
281 14:13:30.031622 Setting prompt string to ['lava-test: # ']
282 14:13:30.032067 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 14:13:30.032220 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 14:13:30.032334 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 14:13:30.032440 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 14:13:30.032659 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 14:13:35.183975 >> Command sent successfully.
288 14:13:35.193803 Returned 0 in 5 seconds
289 14:13:35.295079 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 14:13:35.296794 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 14:13:35.297313 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 14:13:35.297903 Setting prompt string to 'Starting depthcharge on Helios...'
294 14:13:35.298343 Changing prompt to 'Starting depthcharge on Helios...'
295 14:13:35.298719 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 14:13:35.299917 [Enter `^Ec?' for help]
297 14:13:35.909415
298 14:13:35.909969
299 14:13:35.920204 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 14:13:35.923540 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 14:13:35.929834 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 14:13:35.933454 CPU: AES supported, TXT NOT supported, VT supported
303 14:13:35.940441 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 14:13:35.943994 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 14:13:35.950320 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 14:13:35.953837 VBOOT: Loading verstage.
307 14:13:35.956872 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 14:13:35.963561 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 14:13:35.967240 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 14:13:35.970192 CBFS @ c08000 size 3f8000
311 14:13:35.977109 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 14:13:35.980235 CBFS: Locating 'fallback/verstage'
313 14:13:35.983977 CBFS: Found @ offset 10fb80 size 1072c
314 14:13:35.984471
315 14:13:35.984810
316 14:13:35.996949 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 14:13:36.011093 Probing TPM: . done!
318 14:13:36.014825 TPM ready after 0 ms
319 14:13:36.017168 Connected to device vid:did:rid of 1ae0:0028:00
320 14:13:36.027675 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 14:13:36.031282 Initialized TPM device CR50 revision 0
322 14:13:36.073395 tlcl_send_startup: Startup return code is 0
323 14:13:36.073920 TPM: setup succeeded
324 14:13:36.086283 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 14:13:36.090180 Chrome EC: UHEPI supported
326 14:13:36.093311 Phase 1
327 14:13:36.096719 FMAP: area GBB found @ c05000 (12288 bytes)
328 14:13:36.102973 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 14:13:36.103531 Phase 2
330 14:13:36.106949 Phase 3
331 14:13:36.109948 FMAP: area GBB found @ c05000 (12288 bytes)
332 14:13:36.116613 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 14:13:36.123225 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 14:13:36.126152 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 14:13:36.132778 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 14:13:36.148671 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 14:13:36.152142 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 14:13:36.158129 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 14:13:36.162936 Phase 4
340 14:13:36.166159 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 14:13:36.172434 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 14:13:36.352644 VB2:vb2_rsa_verify_digest() Digest check failed!
343 14:13:36.359057 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 14:13:36.359791 Saving nvdata
345 14:13:36.362242 Reboot requested (10020007)
346 14:13:36.365020 board_reset() called!
347 14:13:36.365470 full_reset() called!
348 14:13:40.876903
349 14:13:40.877416
350 14:13:40.886498 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 14:13:40.889930 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 14:13:40.896713 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 14:13:40.899807 CPU: AES supported, TXT NOT supported, VT supported
354 14:13:40.906766 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 14:13:40.909956 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 14:13:40.916647 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 14:13:40.920073 VBOOT: Loading verstage.
358 14:13:40.923193 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 14:13:40.929822 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 14:13:40.933095 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 14:13:40.936711 CBFS @ c08000 size 3f8000
362 14:13:40.943433 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 14:13:40.946516 CBFS: Locating 'fallback/verstage'
364 14:13:40.949833 CBFS: Found @ offset 10fb80 size 1072c
365 14:13:40.953099
366 14:13:40.953566
367 14:13:40.962986 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 14:13:40.977763 Probing TPM: . done!
369 14:13:40.981179 TPM ready after 0 ms
370 14:13:40.984057 Connected to device vid:did:rid of 1ae0:0028:00
371 14:13:40.994841 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 14:13:40.998340 Initialized TPM device CR50 revision 0
373 14:13:41.040479 tlcl_send_startup: Startup return code is 0
374 14:13:41.041067 TPM: setup succeeded
375 14:13:41.052687 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 14:13:41.056813 Chrome EC: UHEPI supported
377 14:13:41.060534 Phase 1
378 14:13:41.063280 FMAP: area GBB found @ c05000 (12288 bytes)
379 14:13:41.070231 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 14:13:41.077231 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 14:13:41.079692 Recovery requested (1009000e)
382 14:13:41.085428 Saving nvdata
383 14:13:41.091746 tlcl_extend: response is 0
384 14:13:41.100734 tlcl_extend: response is 0
385 14:13:41.107783 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 14:13:41.110781 CBFS @ c08000 size 3f8000
387 14:13:41.117836 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 14:13:41.121012 CBFS: Locating 'fallback/romstage'
389 14:13:41.124672 CBFS: Found @ offset 80 size 145fc
390 14:13:41.127427 Accumulated console time in verstage 98 ms
391 14:13:41.127939
392 14:13:41.128284
393 14:13:41.140704 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 14:13:41.147145 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 14:13:41.150858 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 14:13:41.154089 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 14:13:41.160673 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 14:13:41.163646 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 14:13:41.167331 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 14:13:41.170956 TCO_STS: 0000 0000
401 14:13:41.173487 GEN_PMCON: e0015238 00000200
402 14:13:41.176864 GBLRST_CAUSE: 00000000 00000000
403 14:13:41.177362 prev_sleep_state 5
404 14:13:41.180615 Boot Count incremented to 58543
405 14:13:41.187251 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 14:13:41.190574 CBFS @ c08000 size 3f8000
407 14:13:41.196939 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 14:13:41.197412 CBFS: Locating 'fspm.bin'
409 14:13:41.203511 CBFS: Found @ offset 5ffc0 size 71000
410 14:13:41.207252 Chrome EC: UHEPI supported
411 14:13:41.213465 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 14:13:41.217340 Probing TPM: done!
413 14:13:41.223871 Connected to device vid:did:rid of 1ae0:0028:00
414 14:13:41.233929 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 14:13:41.240093 Initialized TPM device CR50 revision 0
416 14:13:41.248681 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 14:13:41.255423 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 14:13:41.258479 MRC cache found, size 1948
419 14:13:41.261632 bootmode is set to: 2
420 14:13:41.265573 PRMRR disabled by config.
421 14:13:41.266108 SPD INDEX = 1
422 14:13:41.271624 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 14:13:41.275214 CBFS @ c08000 size 3f8000
424 14:13:41.281754 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 14:13:41.282191 CBFS: Locating 'spd.bin'
426 14:13:41.285473 CBFS: Found @ offset 5fb80 size 400
427 14:13:41.288392 SPD: module type is LPDDR3
428 14:13:41.291849 SPD: module part is
429 14:13:41.299012 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 14:13:41.301497 SPD: device width 4 bits, bus width 8 bits
431 14:13:41.305062 SPD: module size is 4096 MB (per channel)
432 14:13:41.308283 memory slot: 0 configuration done.
433 14:13:41.311513 memory slot: 2 configuration done.
434 14:13:41.363361 CBMEM:
435 14:13:41.366421 IMD: root @ 99fff000 254 entries.
436 14:13:41.370010 IMD: root @ 99ffec00 62 entries.
437 14:13:41.373296 External stage cache:
438 14:13:41.376716 IMD: root @ 9abff000 254 entries.
439 14:13:41.379665 IMD: root @ 9abfec00 62 entries.
440 14:13:41.383355 Chrome EC: clear events_b mask to 0x0000000020004000
441 14:13:41.399203 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 14:13:41.412224 tlcl_write: response is 0
443 14:13:41.421274 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 14:13:41.427755 MRC: TPM MRC hash updated successfully.
445 14:13:41.428270 2 DIMMs found
446 14:13:41.431232 SMM Memory Map
447 14:13:41.434524 SMRAM : 0x9a000000 0x1000000
448 14:13:41.437955 Subregion 0: 0x9a000000 0xa00000
449 14:13:41.441383 Subregion 1: 0x9aa00000 0x200000
450 14:13:41.444232 Subregion 2: 0x9ac00000 0x400000
451 14:13:41.448006 top_of_ram = 0x9a000000
452 14:13:41.451052 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 14:13:41.458076 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 14:13:41.461232 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 14:13:41.468113 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 14:13:41.471365 CBFS @ c08000 size 3f8000
457 14:13:41.474319 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 14:13:41.478360 CBFS: Locating 'fallback/postcar'
459 14:13:41.481193 CBFS: Found @ offset 107000 size 4b44
460 14:13:41.488056 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 14:13:41.500160 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 14:13:41.503010 Processing 180 relocs. Offset value of 0x97c0c000
463 14:13:41.511488 Accumulated console time in romstage 285 ms
464 14:13:41.512032
465 14:13:41.512372
466 14:13:41.521407 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 14:13:41.528092 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 14:13:41.531545 CBFS @ c08000 size 3f8000
469 14:13:41.535123 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 14:13:41.538375 CBFS: Locating 'fallback/ramstage'
471 14:13:41.545267 CBFS: Found @ offset 43380 size 1b9e8
472 14:13:41.551836 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 14:13:41.583739 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 14:13:41.586561 Processing 3976 relocs. Offset value of 0x98db0000
475 14:13:41.593215 Accumulated console time in postcar 52 ms
476 14:13:41.593797
477 14:13:41.594171
478 14:13:41.603205 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 14:13:41.610202 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 14:13:41.613540 WARNING: RO_VPD is uninitialized or empty.
481 14:13:41.616210 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 14:13:41.623378 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 14:13:41.624031 Normal boot.
484 14:13:41.630150 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 14:13:41.633197 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 14:13:41.636486 CBFS @ c08000 size 3f8000
487 14:13:41.643079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 14:13:41.646596 CBFS: Locating 'cpu_microcode_blob.bin'
489 14:13:41.649461 CBFS: Found @ offset 14700 size 2ec00
490 14:13:41.653105 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 14:13:41.656572 Skip microcode update
492 14:13:41.659655 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 14:13:41.663490 CBFS @ c08000 size 3f8000
494 14:13:41.670200 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 14:13:41.673306 CBFS: Locating 'fsps.bin'
496 14:13:41.676120 CBFS: Found @ offset d1fc0 size 35000
497 14:13:41.701429 Detected 4 core, 8 thread CPU.
498 14:13:41.705108 Setting up SMI for CPU
499 14:13:41.708382 IED base = 0x9ac00000
500 14:13:41.708961 IED size = 0x00400000
501 14:13:41.711076 Will perform SMM setup.
502 14:13:41.718099 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 14:13:41.724384 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 14:13:41.727944 Processing 16 relocs. Offset value of 0x00030000
505 14:13:41.731180 Attempting to start 7 APs
506 14:13:41.734715 Waiting for 10ms after sending INIT.
507 14:13:41.751004 Waiting for 1st SIPI to complete...done.
508 14:13:41.751626 AP: slot 3 apic_id 1.
509 14:13:41.757637 Waiting for 2nd SIPI to complete...done.
510 14:13:41.758120 AP: slot 7 apic_id 6.
511 14:13:41.760870 AP: slot 6 apic_id 7.
512 14:13:41.764244 AP: slot 2 apic_id 4.
513 14:13:41.764682 AP: slot 5 apic_id 5.
514 14:13:41.767668 AP: slot 1 apic_id 3.
515 14:13:41.770943 AP: slot 4 apic_id 2.
516 14:13:41.778231 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 14:13:41.781127 Processing 13 relocs. Offset value of 0x00038000
518 14:13:41.788077 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 14:13:41.794453 Installing SMM handler to 0x9a000000
520 14:13:41.801206 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 14:13:41.804111 Processing 658 relocs. Offset value of 0x9a010000
522 14:13:41.814327 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 14:13:41.817361 Processing 13 relocs. Offset value of 0x9a008000
524 14:13:41.823753 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 14:13:41.830519 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 14:13:41.837389 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 14:13:41.840476 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 14:13:41.847269 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 14:13:41.853801 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 14:13:41.856645 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 14:13:41.863347 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 14:13:41.866853 Clearing SMI status registers
533 14:13:41.870559 SMI_STS: PM1
534 14:13:41.871098 PM1_STS: PWRBTN
535 14:13:41.873853 TCO_STS: SECOND_TO
536 14:13:41.876871 New SMBASE 0x9a000000
537 14:13:41.880273 In relocation handler: CPU 0
538 14:13:41.883670 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 14:13:41.887404 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 14:13:41.890344 Relocation complete.
541 14:13:41.893594 New SMBASE 0x99fff400
542 14:13:41.897359 In relocation handler: CPU 3
543 14:13:41.900438 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 14:13:41.903632 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 14:13:41.906864 Relocation complete.
546 14:13:41.910539 New SMBASE 0x99ffe800
547 14:13:41.911120 In relocation handler: CPU 6
548 14:13:41.917346 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
549 14:13:41.920467 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 14:13:41.923836 Relocation complete.
551 14:13:41.924417 New SMBASE 0x99ffe400
552 14:13:41.927338 In relocation handler: CPU 7
553 14:13:41.933175 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 14:13:41.937118 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 14:13:41.940400 Relocation complete.
556 14:13:41.940983 New SMBASE 0x99fff800
557 14:13:41.943669 In relocation handler: CPU 2
558 14:13:41.946790 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
559 14:13:41.953424 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 14:13:41.956624 Relocation complete.
561 14:13:41.957101 New SMBASE 0x99ffec00
562 14:13:41.960027 In relocation handler: CPU 5
563 14:13:41.963651 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
564 14:13:41.970186 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 14:13:41.970766 Relocation complete.
566 14:13:41.973791 New SMBASE 0x99fffc00
567 14:13:41.976853 In relocation handler: CPU 1
568 14:13:41.980590 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
569 14:13:41.986837 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 14:13:41.987439 Relocation complete.
571 14:13:41.990365 New SMBASE 0x99fff000
572 14:13:41.993889 In relocation handler: CPU 4
573 14:13:41.997288 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
574 14:13:42.003744 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 14:13:42.004319 Relocation complete.
576 14:13:42.006972 Initializing CPU #0
577 14:13:42.010268 CPU: vendor Intel device 806ec
578 14:13:42.013902 CPU: family 06, model 8e, stepping 0c
579 14:13:42.017163 Clearing out pending MCEs
580 14:13:42.020040 Setting up local APIC...
581 14:13:42.020611 apic_id: 0x00 done.
582 14:13:42.023899 Turbo is available but hidden
583 14:13:42.026997 Turbo is available and visible
584 14:13:42.029886 VMX status: enabled
585 14:13:42.033669 IA32_FEATURE_CONTROL status: locked
586 14:13:42.036944 Skip microcode update
587 14:13:42.037533 CPU #0 initialized
588 14:13:42.040360 Initializing CPU #3
589 14:13:42.040833 Initializing CPU #4
590 14:13:42.043558 Initializing CPU #1
591 14:13:42.046841 CPU: vendor Intel device 806ec
592 14:13:42.049722 CPU: family 06, model 8e, stepping 0c
593 14:13:42.053455 CPU: vendor Intel device 806ec
594 14:13:42.056435 CPU: family 06, model 8e, stepping 0c
595 14:13:42.059822 Clearing out pending MCEs
596 14:13:42.063362 Clearing out pending MCEs
597 14:13:42.066928 Setting up local APIC...
598 14:13:42.067513 CPU: vendor Intel device 806ec
599 14:13:42.072894 CPU: family 06, model 8e, stepping 0c
600 14:13:42.073321 Clearing out pending MCEs
601 14:13:42.076540 Initializing CPU #5
602 14:13:42.080054 Initializing CPU #2
603 14:13:42.082870 CPU: vendor Intel device 806ec
604 14:13:42.087011 CPU: family 06, model 8e, stepping 0c
605 14:13:42.087620 Setting up local APIC...
606 14:13:42.089842 apic_id: 0x02 done.
607 14:13:42.093466 Setting up local APIC...
608 14:13:42.093924 Initializing CPU #6
609 14:13:42.096828 Initializing CPU #7
610 14:13:42.100280 CPU: vendor Intel device 806ec
611 14:13:42.103412 CPU: family 06, model 8e, stepping 0c
612 14:13:42.106822 VMX status: enabled
613 14:13:42.107361 apic_id: 0x03 done.
614 14:13:42.110568 IA32_FEATURE_CONTROL status: locked
615 14:13:42.113623 VMX status: enabled
616 14:13:42.116819 Skip microcode update
617 14:13:42.119895 IA32_FEATURE_CONTROL status: locked
618 14:13:42.120375 CPU #4 initialized
619 14:13:42.123015 Skip microcode update
620 14:13:42.127021 Clearing out pending MCEs
621 14:13:42.129949 CPU: vendor Intel device 806ec
622 14:13:42.133016 CPU: family 06, model 8e, stepping 0c
623 14:13:42.136780 Setting up local APIC...
624 14:13:42.140178 CPU: vendor Intel device 806ec
625 14:13:42.143245 CPU: family 06, model 8e, stepping 0c
626 14:13:42.146385 Clearing out pending MCEs
627 14:13:42.146819 Clearing out pending MCEs
628 14:13:42.150051 Setting up local APIC...
629 14:13:42.152928 CPU #1 initialized
630 14:13:42.153357 apic_id: 0x06 done.
631 14:13:42.156674 Setting up local APIC...
632 14:13:42.159721 apic_id: 0x05 done.
633 14:13:42.162934 Clearing out pending MCEs
634 14:13:42.163378 VMX status: enabled
635 14:13:42.166282 Setting up local APIC...
636 14:13:42.169829 apic_id: 0x01 done.
637 14:13:42.173069 IA32_FEATURE_CONTROL status: locked
638 14:13:42.173507 apic_id: 0x04 done.
639 14:13:42.176384 Skip microcode update
640 14:13:42.179418 VMX status: enabled
641 14:13:42.179879 CPU #5 initialized
642 14:13:42.182830 IA32_FEATURE_CONTROL status: locked
643 14:13:42.186274 VMX status: enabled
644 14:13:42.189525 apic_id: 0x07 done.
645 14:13:42.193097 IA32_FEATURE_CONTROL status: locked
646 14:13:42.193530 VMX status: enabled
647 14:13:42.196321 Skip microcode update
648 14:13:42.199568 IA32_FEATURE_CONTROL status: locked
649 14:13:42.202884 CPU #7 initialized
650 14:13:42.203433 Skip microcode update
651 14:13:42.206426 Skip microcode update
652 14:13:42.209100 VMX status: enabled
653 14:13:42.209532 CPU #2 initialized
654 14:13:42.213142 IA32_FEATURE_CONTROL status: locked
655 14:13:42.215947 CPU #6 initialized
656 14:13:42.219230 Skip microcode update
657 14:13:42.219796 CPU #3 initialized
658 14:13:42.223056 bsp_do_flight_plan done after 466 msecs.
659 14:13:42.226199 CPU: frequency set to 4200 MHz
660 14:13:42.229356 Enabling SMIs.
661 14:13:42.229898 Locking SMM.
662 14:13:42.245064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 14:13:42.248231 CBFS @ c08000 size 3f8000
664 14:13:42.254887 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 14:13:42.255568 CBFS: Locating 'vbt.bin'
666 14:13:42.258331 CBFS: Found @ offset 5f5c0 size 499
667 14:13:42.265357 Found a VBT of 4608 bytes after decompression
668 14:13:42.447136 Display FSP Version Info HOB
669 14:13:42.450749 Reference Code - CPU = 9.0.1e.30
670 14:13:42.453920 uCode Version = 0.0.0.ca
671 14:13:42.457103 TXT ACM version = ff.ff.ff.ffff
672 14:13:42.460786 Display FSP Version Info HOB
673 14:13:42.463775 Reference Code - ME = 9.0.1e.30
674 14:13:42.467273 MEBx version = 0.0.0.0
675 14:13:42.470400 ME Firmware Version = Consumer SKU
676 14:13:42.473519 Display FSP Version Info HOB
677 14:13:42.477249 Reference Code - CML PCH = 9.0.1e.30
678 14:13:42.480318 PCH-CRID Status = Disabled
679 14:13:42.483940 PCH-CRID Original Value = ff.ff.ff.ffff
680 14:13:42.486871 PCH-CRID New Value = ff.ff.ff.ffff
681 14:13:42.490392 OPROM - RST - RAID = ff.ff.ff.ffff
682 14:13:42.493879 ChipsetInit Base Version = ff.ff.ff.ffff
683 14:13:42.497311 ChipsetInit Oem Version = ff.ff.ff.ffff
684 14:13:42.500126 Display FSP Version Info HOB
685 14:13:42.507412 Reference Code - SA - System Agent = 9.0.1e.30
686 14:13:42.507881 Reference Code - MRC = 0.7.1.6c
687 14:13:42.510386 SA - PCIe Version = 9.0.1e.30
688 14:13:42.513616 SA-CRID Status = Disabled
689 14:13:42.517457 SA-CRID Original Value = 0.0.0.c
690 14:13:42.520443 SA-CRID New Value = 0.0.0.c
691 14:13:42.523753 OPROM - VBIOS = ff.ff.ff.ffff
692 14:13:42.524233 RTC Init
693 14:13:42.530327 Set power on after power failure.
694 14:13:42.530792 Disabling Deep S3
695 14:13:42.533823 Disabling Deep S3
696 14:13:42.534286 Disabling Deep S4
697 14:13:42.537454 Disabling Deep S4
698 14:13:42.537891 Disabling Deep S5
699 14:13:42.540310 Disabling Deep S5
700 14:13:42.547145 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
701 14:13:42.547628 Enumerating buses...
702 14:13:42.553417 Show all devs... Before device enumeration.
703 14:13:42.554070 Root Device: enabled 1
704 14:13:42.557308 CPU_CLUSTER: 0: enabled 1
705 14:13:42.560412 DOMAIN: 0000: enabled 1
706 14:13:42.560847 APIC: 00: enabled 1
707 14:13:42.563535 PCI: 00:00.0: enabled 1
708 14:13:42.566893 PCI: 00:02.0: enabled 1
709 14:13:42.570503 PCI: 00:04.0: enabled 0
710 14:13:42.571331 PCI: 00:05.0: enabled 0
711 14:13:42.573452 PCI: 00:12.0: enabled 1
712 14:13:42.577134 PCI: 00:12.5: enabled 0
713 14:13:42.579822 PCI: 00:12.6: enabled 0
714 14:13:42.579918 PCI: 00:14.0: enabled 1
715 14:13:42.583569 PCI: 00:14.1: enabled 0
716 14:13:42.586785 PCI: 00:14.3: enabled 1
717 14:13:42.590015 PCI: 00:14.5: enabled 0
718 14:13:42.590111 PCI: 00:15.0: enabled 1
719 14:13:42.593425 PCI: 00:15.1: enabled 1
720 14:13:42.596467 PCI: 00:15.2: enabled 0
721 14:13:42.596569 PCI: 00:15.3: enabled 0
722 14:13:42.599840 PCI: 00:16.0: enabled 1
723 14:13:42.603381 PCI: 00:16.1: enabled 0
724 14:13:42.606356 PCI: 00:16.2: enabled 0
725 14:13:42.606470 PCI: 00:16.3: enabled 0
726 14:13:42.609738 PCI: 00:16.4: enabled 0
727 14:13:42.613042 PCI: 00:16.5: enabled 0
728 14:13:42.616575 PCI: 00:17.0: enabled 1
729 14:13:42.616666 PCI: 00:19.0: enabled 1
730 14:13:42.620072 PCI: 00:19.1: enabled 0
731 14:13:42.622934 PCI: 00:19.2: enabled 0
732 14:13:42.623047 PCI: 00:1a.0: enabled 0
733 14:13:42.626358 PCI: 00:1c.0: enabled 0
734 14:13:42.630021 PCI: 00:1c.1: enabled 0
735 14:13:42.633324 PCI: 00:1c.2: enabled 0
736 14:13:42.633421 PCI: 00:1c.3: enabled 0
737 14:13:42.636408 PCI: 00:1c.4: enabled 0
738 14:13:42.640231 PCI: 00:1c.5: enabled 0
739 14:13:42.643180 PCI: 00:1c.6: enabled 0
740 14:13:42.643276 PCI: 00:1c.7: enabled 0
741 14:13:42.646281 PCI: 00:1d.0: enabled 1
742 14:13:42.649461 PCI: 00:1d.1: enabled 0
743 14:13:42.653192 PCI: 00:1d.2: enabled 0
744 14:13:42.653289 PCI: 00:1d.3: enabled 0
745 14:13:42.656220 PCI: 00:1d.4: enabled 0
746 14:13:42.659939 PCI: 00:1d.5: enabled 1
747 14:13:42.660036 PCI: 00:1e.0: enabled 1
748 14:13:42.663046 PCI: 00:1e.1: enabled 0
749 14:13:42.666168 PCI: 00:1e.2: enabled 1
750 14:13:42.669953 PCI: 00:1e.3: enabled 1
751 14:13:42.670049 PCI: 00:1f.0: enabled 1
752 14:13:42.673070 PCI: 00:1f.1: enabled 1
753 14:13:42.676141 PCI: 00:1f.2: enabled 1
754 14:13:42.679758 PCI: 00:1f.3: enabled 1
755 14:13:42.679855 PCI: 00:1f.4: enabled 1
756 14:13:42.682869 PCI: 00:1f.5: enabled 1
757 14:13:42.685959 PCI: 00:1f.6: enabled 0
758 14:13:42.689825 USB0 port 0: enabled 1
759 14:13:42.689921 I2C: 00:15: enabled 1
760 14:13:42.692860 I2C: 00:5d: enabled 1
761 14:13:42.695861 GENERIC: 0.0: enabled 1
762 14:13:42.695958 I2C: 00:1a: enabled 1
763 14:13:42.699553 I2C: 00:38: enabled 1
764 14:13:42.702774 I2C: 00:39: enabled 1
765 14:13:42.702870 I2C: 00:3a: enabled 1
766 14:13:42.706165 I2C: 00:3b: enabled 1
767 14:13:42.709033 PCI: 00:00.0: enabled 1
768 14:13:42.709130 SPI: 00: enabled 1
769 14:13:42.712553 SPI: 01: enabled 1
770 14:13:42.715941 PNP: 0c09.0: enabled 1
771 14:13:42.716038 USB2 port 0: enabled 1
772 14:13:42.719118 USB2 port 1: enabled 1
773 14:13:42.722689 USB2 port 2: enabled 0
774 14:13:42.722785 USB2 port 3: enabled 0
775 14:13:42.726160 USB2 port 5: enabled 0
776 14:13:42.729157 USB2 port 6: enabled 1
777 14:13:42.732525 USB2 port 9: enabled 1
778 14:13:42.732622 USB3 port 0: enabled 1
779 14:13:42.735616 USB3 port 1: enabled 1
780 14:13:42.739278 USB3 port 2: enabled 1
781 14:13:42.739375 USB3 port 3: enabled 1
782 14:13:42.742835 USB3 port 4: enabled 0
783 14:13:42.746004 APIC: 03: enabled 1
784 14:13:42.746100 APIC: 04: enabled 1
785 14:13:42.748960 APIC: 01: enabled 1
786 14:13:42.752561 APIC: 02: enabled 1
787 14:13:42.752684 APIC: 05: enabled 1
788 14:13:42.755774 APIC: 07: enabled 1
789 14:13:42.755890 APIC: 06: enabled 1
790 14:13:42.759006 Compare with tree...
791 14:13:42.762090 Root Device: enabled 1
792 14:13:42.765470 CPU_CLUSTER: 0: enabled 1
793 14:13:42.765566 APIC: 00: enabled 1
794 14:13:42.769035 APIC: 03: enabled 1
795 14:13:42.772117 APIC: 04: enabled 1
796 14:13:42.772212 APIC: 01: enabled 1
797 14:13:42.775894 APIC: 02: enabled 1
798 14:13:42.778997 APIC: 05: enabled 1
799 14:13:42.779094 APIC: 07: enabled 1
800 14:13:42.782573 APIC: 06: enabled 1
801 14:13:42.785600 DOMAIN: 0000: enabled 1
802 14:13:42.788762 PCI: 00:00.0: enabled 1
803 14:13:42.788859 PCI: 00:02.0: enabled 1
804 14:13:42.792582 PCI: 00:04.0: enabled 0
805 14:13:42.795556 PCI: 00:05.0: enabled 0
806 14:13:42.798829 PCI: 00:12.0: enabled 1
807 14:13:42.802018 PCI: 00:12.5: enabled 0
808 14:13:42.802114 PCI: 00:12.6: enabled 0
809 14:13:42.805576 PCI: 00:14.0: enabled 1
810 14:13:42.808688 USB0 port 0: enabled 1
811 14:13:42.812196 USB2 port 0: enabled 1
812 14:13:42.815127 USB2 port 1: enabled 1
813 14:13:42.815224 USB2 port 2: enabled 0
814 14:13:42.818617 USB2 port 3: enabled 0
815 14:13:42.822100 USB2 port 5: enabled 0
816 14:13:42.825723 USB2 port 6: enabled 1
817 14:13:42.828620 USB2 port 9: enabled 1
818 14:13:42.828714 USB3 port 0: enabled 1
819 14:13:42.832116 USB3 port 1: enabled 1
820 14:13:42.835374 USB3 port 2: enabled 1
821 14:13:42.838272 USB3 port 3: enabled 1
822 14:13:42.841905 USB3 port 4: enabled 0
823 14:13:42.845373 PCI: 00:14.1: enabled 0
824 14:13:42.845470 PCI: 00:14.3: enabled 1
825 14:13:42.848656 PCI: 00:14.5: enabled 0
826 14:13:42.851573 PCI: 00:15.0: enabled 1
827 14:13:42.855418 I2C: 00:15: enabled 1
828 14:13:42.855539 PCI: 00:15.1: enabled 1
829 14:13:42.858229 I2C: 00:5d: enabled 1
830 14:13:42.861971 GENERIC: 0.0: enabled 1
831 14:13:42.865095 PCI: 00:15.2: enabled 0
832 14:13:42.868420 PCI: 00:15.3: enabled 0
833 14:13:42.868506 PCI: 00:16.0: enabled 1
834 14:13:42.871585 PCI: 00:16.1: enabled 0
835 14:13:42.875340 PCI: 00:16.2: enabled 0
836 14:13:42.878432 PCI: 00:16.3: enabled 0
837 14:13:42.881624 PCI: 00:16.4: enabled 0
838 14:13:42.881713 PCI: 00:16.5: enabled 0
839 14:13:42.884757 PCI: 00:17.0: enabled 1
840 14:13:42.888282 PCI: 00:19.0: enabled 1
841 14:13:42.891603 I2C: 00:1a: enabled 1
842 14:13:42.891694 I2C: 00:38: enabled 1
843 14:13:42.894754 I2C: 00:39: enabled 1
844 14:13:42.897984 I2C: 00:3a: enabled 1
845 14:13:42.901947 I2C: 00:3b: enabled 1
846 14:13:42.904765 PCI: 00:19.1: enabled 0
847 14:13:42.904847 PCI: 00:19.2: enabled 0
848 14:13:42.907928 PCI: 00:1a.0: enabled 0
849 14:13:42.911667 PCI: 00:1c.0: enabled 0
850 14:13:42.914639 PCI: 00:1c.1: enabled 0
851 14:13:42.918152 PCI: 00:1c.2: enabled 0
852 14:13:42.918237 PCI: 00:1c.3: enabled 0
853 14:13:42.921643 PCI: 00:1c.4: enabled 0
854 14:13:42.924985 PCI: 00:1c.5: enabled 0
855 14:13:42.928580 PCI: 00:1c.6: enabled 0
856 14:13:42.928669 PCI: 00:1c.7: enabled 0
857 14:13:42.931349 PCI: 00:1d.0: enabled 1
858 14:13:42.934735 PCI: 00:1d.1: enabled 0
859 14:13:42.937678 PCI: 00:1d.2: enabled 0
860 14:13:42.941329 PCI: 00:1d.3: enabled 0
861 14:13:42.941414 PCI: 00:1d.4: enabled 0
862 14:13:42.944383 PCI: 00:1d.5: enabled 1
863 14:13:42.947779 PCI: 00:00.0: enabled 1
864 14:13:42.951366 PCI: 00:1e.0: enabled 1
865 14:13:42.954395 PCI: 00:1e.1: enabled 0
866 14:13:42.954489 PCI: 00:1e.2: enabled 1
867 14:13:42.958185 SPI: 00: enabled 1
868 14:13:42.961141 PCI: 00:1e.3: enabled 1
869 14:13:42.964741 SPI: 01: enabled 1
870 14:13:42.964835 PCI: 00:1f.0: enabled 1
871 14:13:42.967957 PNP: 0c09.0: enabled 1
872 14:13:42.971076 PCI: 00:1f.1: enabled 1
873 14:13:42.974322 PCI: 00:1f.2: enabled 1
874 14:13:42.978179 PCI: 00:1f.3: enabled 1
875 14:13:42.978273 PCI: 00:1f.4: enabled 1
876 14:13:42.981234 PCI: 00:1f.5: enabled 1
877 14:13:42.984436 PCI: 00:1f.6: enabled 0
878 14:13:42.987579 Root Device scanning...
879 14:13:42.991068 scan_static_bus for Root Device
880 14:13:42.991190 CPU_CLUSTER: 0 enabled
881 14:13:42.994166 DOMAIN: 0000 enabled
882 14:13:42.997841 DOMAIN: 0000 scanning...
883 14:13:43.001071 PCI: pci_scan_bus for bus 00
884 14:13:43.004367 PCI: 00:00.0 [8086/0000] ops
885 14:13:43.007420 PCI: 00:00.0 [8086/9b61] enabled
886 14:13:43.010774 PCI: 00:02.0 [8086/0000] bus ops
887 14:13:43.014351 PCI: 00:02.0 [8086/9b41] enabled
888 14:13:43.017456 PCI: 00:04.0 [8086/1903] disabled
889 14:13:43.021081 PCI: 00:08.0 [8086/1911] enabled
890 14:13:43.024077 PCI: 00:12.0 [8086/02f9] enabled
891 14:13:43.027548 PCI: 00:14.0 [8086/0000] bus ops
892 14:13:43.031084 PCI: 00:14.0 [8086/02ed] enabled
893 14:13:43.034105 PCI: 00:14.2 [8086/02ef] enabled
894 14:13:43.037483 PCI: 00:14.3 [8086/02f0] enabled
895 14:13:43.041055 PCI: 00:15.0 [8086/0000] bus ops
896 14:13:43.044000 PCI: 00:15.0 [8086/02e8] enabled
897 14:13:43.047567 PCI: 00:15.1 [8086/0000] bus ops
898 14:13:43.051025 PCI: 00:15.1 [8086/02e9] enabled
899 14:13:43.054087 PCI: 00:16.0 [8086/0000] ops
900 14:13:43.057451 PCI: 00:16.0 [8086/02e0] enabled
901 14:13:43.060879 PCI: 00:17.0 [8086/0000] ops
902 14:13:43.064112 PCI: 00:17.0 [8086/02d3] enabled
903 14:13:43.067814 PCI: 00:19.0 [8086/0000] bus ops
904 14:13:43.070651 PCI: 00:19.0 [8086/02c5] enabled
905 14:13:43.074291 PCI: 00:1d.0 [8086/0000] bus ops
906 14:13:43.077393 PCI: 00:1d.0 [8086/02b0] enabled
907 14:13:43.081147 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 14:13:43.084556 PCI: 00:1e.0 [8086/0000] ops
909 14:13:43.087465 PCI: 00:1e.0 [8086/02a8] enabled
910 14:13:43.091053 PCI: 00:1e.2 [8086/0000] bus ops
911 14:13:43.094073 PCI: 00:1e.2 [8086/02aa] enabled
912 14:13:43.097799 PCI: 00:1e.3 [8086/0000] bus ops
913 14:13:43.100916 PCI: 00:1e.3 [8086/02ab] enabled
914 14:13:43.104063 PCI: 00:1f.0 [8086/0000] bus ops
915 14:13:43.107685 PCI: 00:1f.0 [8086/0284] enabled
916 14:13:43.114079 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 14:13:43.117802 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 14:13:43.120794 PCI: 00:1f.3 [8086/0000] bus ops
919 14:13:43.124404 PCI: 00:1f.3 [8086/02c8] enabled
920 14:13:43.127147 PCI: 00:1f.4 [8086/0000] bus ops
921 14:13:43.130598 PCI: 00:1f.4 [8086/02a3] enabled
922 14:13:43.134030 PCI: 00:1f.5 [8086/0000] bus ops
923 14:13:43.137627 PCI: 00:1f.5 [8086/02a4] enabled
924 14:13:43.140489 PCI: Leftover static devices:
925 14:13:43.143966 PCI: 00:05.0
926 14:13:43.144057 PCI: 00:12.5
927 14:13:43.147465 PCI: 00:12.6
928 14:13:43.147543 PCI: 00:14.1
929 14:13:43.147619 PCI: 00:14.5
930 14:13:43.150785 PCI: 00:15.2
931 14:13:43.150866 PCI: 00:15.3
932 14:13:43.154384 PCI: 00:16.1
933 14:13:43.154469 PCI: 00:16.2
934 14:13:43.154537 PCI: 00:16.3
935 14:13:43.157124 PCI: 00:16.4
936 14:13:43.157204 PCI: 00:16.5
937 14:13:43.161203 PCI: 00:19.1
938 14:13:43.161292 PCI: 00:19.2
939 14:13:43.164067 PCI: 00:1a.0
940 14:13:43.164146 PCI: 00:1c.0
941 14:13:43.164213 PCI: 00:1c.1
942 14:13:43.167120 PCI: 00:1c.2
943 14:13:43.167201 PCI: 00:1c.3
944 14:13:43.170597 PCI: 00:1c.4
945 14:13:43.170686 PCI: 00:1c.5
946 14:13:43.170755 PCI: 00:1c.6
947 14:13:43.174415 PCI: 00:1c.7
948 14:13:43.174522 PCI: 00:1d.1
949 14:13:43.177443 PCI: 00:1d.2
950 14:13:43.177530 PCI: 00:1d.3
951 14:13:43.177602 PCI: 00:1d.4
952 14:13:43.180545 PCI: 00:1d.5
953 14:13:43.180633 PCI: 00:1e.1
954 14:13:43.184155 PCI: 00:1f.1
955 14:13:43.184236 PCI: 00:1f.2
956 14:13:43.187190 PCI: 00:1f.6
957 14:13:43.187271 PCI: Check your devicetree.cb.
958 14:13:43.190535 PCI: 00:02.0 scanning...
959 14:13:43.193952 scan_generic_bus for PCI: 00:02.0
960 14:13:43.200559 scan_generic_bus for PCI: 00:02.0 done
961 14:13:43.203790 scan_bus: scanning of bus PCI: 00:02.0 took 10180 usecs
962 14:13:43.206974 PCI: 00:14.0 scanning...
963 14:13:43.210586 scan_static_bus for PCI: 00:14.0
964 14:13:43.213761 USB0 port 0 enabled
965 14:13:43.213854 USB0 port 0 scanning...
966 14:13:43.216853 scan_static_bus for USB0 port 0
967 14:13:43.220097 USB2 port 0 enabled
968 14:13:43.223837 USB2 port 1 enabled
969 14:13:43.223930 USB2 port 2 disabled
970 14:13:43.227095 USB2 port 3 disabled
971 14:13:43.230693 USB2 port 5 disabled
972 14:13:43.230786 USB2 port 6 enabled
973 14:13:43.233556 USB2 port 9 enabled
974 14:13:43.233649 USB3 port 0 enabled
975 14:13:43.237004 USB3 port 1 enabled
976 14:13:43.240377 USB3 port 2 enabled
977 14:13:43.240469 USB3 port 3 enabled
978 14:13:43.244010 USB3 port 4 disabled
979 14:13:43.246845 USB2 port 0 scanning...
980 14:13:43.250337 scan_static_bus for USB2 port 0
981 14:13:43.253500 scan_static_bus for USB2 port 0 done
982 14:13:43.256965 scan_bus: scanning of bus USB2 port 0 took 9690 usecs
983 14:13:43.260657 USB2 port 1 scanning...
984 14:13:43.263915 scan_static_bus for USB2 port 1
985 14:13:43.267054 scan_static_bus for USB2 port 1 done
986 14:13:43.273930 scan_bus: scanning of bus USB2 port 1 took 9691 usecs
987 14:13:43.276958 USB2 port 6 scanning...
988 14:13:43.280026 scan_static_bus for USB2 port 6
989 14:13:43.283750 scan_static_bus for USB2 port 6 done
990 14:13:43.289967 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
991 14:13:43.290064 USB2 port 9 scanning...
992 14:13:43.293762 scan_static_bus for USB2 port 9
993 14:13:43.296925 scan_static_bus for USB2 port 9 done
994 14:13:43.303484 scan_bus: scanning of bus USB2 port 9 took 9712 usecs
995 14:13:43.306613 USB3 port 0 scanning...
996 14:13:43.310412 scan_static_bus for USB3 port 0
997 14:13:43.313530 scan_static_bus for USB3 port 0 done
998 14:13:43.320228 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
999 14:13:43.320323 USB3 port 1 scanning...
1000 14:13:43.323427 scan_static_bus for USB3 port 1
1001 14:13:43.326618 scan_static_bus for USB3 port 1 done
1002 14:13:43.333512 scan_bus: scanning of bus USB3 port 1 took 9708 usecs
1003 14:13:43.336522 USB3 port 2 scanning...
1004 14:13:43.340010 scan_static_bus for USB3 port 2
1005 14:13:43.343448 scan_static_bus for USB3 port 2 done
1006 14:13:43.349842 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1007 14:13:43.349936 USB3 port 3 scanning...
1008 14:13:43.353252 scan_static_bus for USB3 port 3
1009 14:13:43.356828 scan_static_bus for USB3 port 3 done
1010 14:13:43.363581 scan_bus: scanning of bus USB3 port 3 took 9700 usecs
1011 14:13:43.366726 scan_static_bus for USB0 port 0 done
1012 14:13:43.373598 scan_bus: scanning of bus USB0 port 0 took 155351 usecs
1013 14:13:43.376500 scan_static_bus for PCI: 00:14.0 done
1014 14:13:43.382924 scan_bus: scanning of bus PCI: 00:14.0 took 172965 usecs
1015 14:13:43.383019 PCI: 00:15.0 scanning...
1016 14:13:43.390381 scan_generic_bus for PCI: 00:15.0
1017 14:13:43.393431 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 14:13:43.396597 scan_generic_bus for PCI: 00:15.0 done
1019 14:13:43.403394 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
1020 14:13:43.403511 PCI: 00:15.1 scanning...
1021 14:13:43.406889 scan_generic_bus for PCI: 00:15.1
1022 14:13:43.413687 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 14:13:43.416849 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 14:13:43.419932 scan_generic_bus for PCI: 00:15.1 done
1025 14:13:43.426734 scan_bus: scanning of bus PCI: 00:15.1 took 18600 usecs
1026 14:13:43.429913 PCI: 00:19.0 scanning...
1027 14:13:43.433187 scan_generic_bus for PCI: 00:19.0
1028 14:13:43.436891 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 14:13:43.439914 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 14:13:43.443591 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 14:13:43.450051 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 14:13:43.453558 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 14:13:43.456521 scan_generic_bus for PCI: 00:19.0 done
1034 14:13:43.463429 scan_bus: scanning of bus PCI: 00:19.0 took 30743 usecs
1035 14:13:43.463532 PCI: 00:1d.0 scanning...
1036 14:13:43.469787 do_pci_scan_bridge for PCI: 00:1d.0
1037 14:13:43.469880 PCI: pci_scan_bus for bus 01
1038 14:13:43.473133 PCI: 01:00.0 [1c5c/1327] enabled
1039 14:13:43.479976 Enabling Common Clock Configuration
1040 14:13:43.483394 L1 Sub-State supported from root port 29
1041 14:13:43.487058 L1 Sub-State Support = 0xf
1042 14:13:43.490111 CommonModeRestoreTime = 0x28
1043 14:13:43.493546 Power On Value = 0x16, Power On Scale = 0x0
1044 14:13:43.493639 ASPM: Enabled L1
1045 14:13:43.500393 scan_bus: scanning of bus PCI: 00:1d.0 took 32807 usecs
1046 14:13:43.503588 PCI: 00:1e.2 scanning...
1047 14:13:43.506469 scan_generic_bus for PCI: 00:1e.2
1048 14:13:43.510189 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 14:13:43.513238 scan_generic_bus for PCI: 00:1e.2 done
1050 14:13:43.520073 scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
1051 14:13:43.523198 PCI: 00:1e.3 scanning...
1052 14:13:43.526958 scan_generic_bus for PCI: 00:1e.3
1053 14:13:43.530119 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 14:13:43.533349 scan_generic_bus for PCI: 00:1e.3 done
1055 14:13:43.539501 scan_bus: scanning of bus PCI: 00:1e.3 took 14019 usecs
1056 14:13:43.543059 PCI: 00:1f.0 scanning...
1057 14:13:43.546855 scan_static_bus for PCI: 00:1f.0
1058 14:13:43.546940 PNP: 0c09.0 enabled
1059 14:13:43.549872 scan_static_bus for PCI: 00:1f.0 done
1060 14:13:43.556359 scan_bus: scanning of bus PCI: 00:1f.0 took 12062 usecs
1061 14:13:43.559608 PCI: 00:1f.3 scanning...
1062 14:13:43.566586 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1063 14:13:43.566702 PCI: 00:1f.4 scanning...
1064 14:13:43.569540 scan_generic_bus for PCI: 00:1f.4
1065 14:13:43.576683 scan_generic_bus for PCI: 00:1f.4 done
1066 14:13:43.579546 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1067 14:13:43.582861 PCI: 00:1f.5 scanning...
1068 14:13:43.586307 scan_generic_bus for PCI: 00:1f.5
1069 14:13:43.589902 scan_generic_bus for PCI: 00:1f.5 done
1070 14:13:43.596542 scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs
1071 14:13:43.602947 scan_bus: scanning of bus DOMAIN: 0000 took 605126 usecs
1072 14:13:43.606173 scan_static_bus for Root Device done
1073 14:13:43.612831 scan_bus: scanning of bus Root Device took 624986 usecs
1074 14:13:43.612923 done
1075 14:13:43.616435 Chrome EC: UHEPI supported
1076 14:13:43.623335 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 14:13:43.626547 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 14:13:43.632689 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 14:13:43.639940 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 14:13:43.643133 SPI flash protection: WPSW=0 SRP0=0
1081 14:13:43.649832 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 14:13:43.653535 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1083 14:13:43.656539 found VGA at PCI: 00:02.0
1084 14:13:43.659553 Setting up VGA for PCI: 00:02.0
1085 14:13:43.666684 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 14:13:43.670089 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 14:13:43.673077 Allocating resources...
1088 14:13:43.676536 Reading resources...
1089 14:13:43.680073 Root Device read_resources bus 0 link: 0
1090 14:13:43.682863 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 14:13:43.689867 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 14:13:43.693141 DOMAIN: 0000 read_resources bus 0 link: 0
1093 14:13:43.700081 PCI: 00:14.0 read_resources bus 0 link: 0
1094 14:13:43.703186 USB0 port 0 read_resources bus 0 link: 0
1095 14:13:43.711165 USB0 port 0 read_resources bus 0 link: 0 done
1096 14:13:43.714962 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 14:13:43.722752 PCI: 00:15.0 read_resources bus 1 link: 0
1098 14:13:43.725966 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 14:13:43.732016 PCI: 00:15.1 read_resources bus 2 link: 0
1100 14:13:43.735732 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 14:13:43.742769 PCI: 00:19.0 read_resources bus 3 link: 0
1102 14:13:43.749533 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 14:13:43.752634 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 14:13:43.759319 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 14:13:43.763060 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 14:13:43.769387 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 14:13:43.772918 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 14:13:43.779638 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 14:13:43.782675 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 14:13:43.789665 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 14:13:43.793045 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 14:13:43.800101 Root Device read_resources bus 0 link: 0 done
1113 14:13:43.803554 Done reading resources.
1114 14:13:43.806383 Show resources in subtree (Root Device)...After reading.
1115 14:13:43.813018 Root Device child on link 0 CPU_CLUSTER: 0
1116 14:13:43.816583 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 14:13:43.816703 APIC: 00
1118 14:13:43.819541 APIC: 03
1119 14:13:43.819627 APIC: 04
1120 14:13:43.819696 APIC: 01
1121 14:13:43.823358 APIC: 02
1122 14:13:43.823485 APIC: 05
1123 14:13:43.826344 APIC: 07
1124 14:13:43.826458 APIC: 06
1125 14:13:43.830074 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 14:13:43.840024 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 14:13:43.896241 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 14:13:43.896355 PCI: 00:00.0
1129 14:13:43.896643 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 14:13:43.896740 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 14:13:43.896873 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 14:13:43.896978 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 14:13:43.945711 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 14:13:43.946011 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 14:13:43.946849 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 14:13:43.947134 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 14:13:43.947947 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 14:13:43.948731 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 14:13:43.995479 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 14:13:43.996186 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 14:13:43.997003 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 14:13:43.997806 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 14:13:43.998413 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 14:13:44.017181 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 14:13:44.017304 PCI: 00:02.0
1146 14:13:44.018282 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 14:13:44.024026 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 14:13:44.030618 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 14:13:44.034203 PCI: 00:04.0
1150 14:13:44.034323 PCI: 00:08.0
1151 14:13:44.043958 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 14:13:44.047671 PCI: 00:12.0
1153 14:13:44.057723 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 14:13:44.060814 PCI: 00:14.0 child on link 0 USB0 port 0
1155 14:13:44.070389 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 14:13:44.074176 USB0 port 0 child on link 0 USB2 port 0
1157 14:13:44.077391 USB2 port 0
1158 14:13:44.080352 USB2 port 1
1159 14:13:44.080459 USB2 port 2
1160 14:13:44.083974 USB2 port 3
1161 14:13:44.084057 USB2 port 5
1162 14:13:44.087564 USB2 port 6
1163 14:13:44.087673 USB2 port 9
1164 14:13:44.090561 USB3 port 0
1165 14:13:44.090666 USB3 port 1
1166 14:13:44.094030 USB3 port 2
1167 14:13:44.094121 USB3 port 3
1168 14:13:44.097038 USB3 port 4
1169 14:13:44.097123 PCI: 00:14.2
1170 14:13:44.107387 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 14:13:44.116804 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 14:13:44.120174 PCI: 00:14.3
1173 14:13:44.130172 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 14:13:44.133637 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 14:13:44.143631 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 14:13:44.146605 I2C: 01:15
1177 14:13:44.150314 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 14:13:44.160294 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 14:13:44.160384 I2C: 02:5d
1180 14:13:44.163316 GENERIC: 0.0
1181 14:13:44.163426 PCI: 00:16.0
1182 14:13:44.173328 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 14:13:44.176428 PCI: 00:17.0
1184 14:13:44.186377 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 14:13:44.193463 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 14:13:44.203496 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 14:13:44.209817 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 14:13:44.219680 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 14:13:44.229465 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 14:13:44.233207 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 14:13:44.242714 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 14:13:44.242813 I2C: 03:1a
1193 14:13:44.246406 I2C: 03:38
1194 14:13:44.246502 I2C: 03:39
1195 14:13:44.249801 I2C: 03:3a
1196 14:13:44.249897 I2C: 03:3b
1197 14:13:44.256400 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 14:13:44.262543 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 14:13:44.273152 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 14:13:44.282557 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 14:13:44.282654 PCI: 01:00.0
1202 14:13:44.292968 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 14:13:44.296082 PCI: 00:1e.0
1204 14:13:44.306413 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 14:13:44.315969 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 14:13:44.319390 PCI: 00:1e.2 child on link 0 SPI: 00
1207 14:13:44.329582 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 14:13:44.332341 SPI: 00
1209 14:13:44.335682 PCI: 00:1e.3 child on link 0 SPI: 01
1210 14:13:44.346099 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 14:13:44.346238 SPI: 01
1212 14:13:44.352615 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 14:13:44.359080 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 14:13:44.369006 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 14:13:44.369180 PNP: 0c09.0
1216 14:13:44.379068 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 14:13:44.382156 PCI: 00:1f.3
1218 14:13:44.392067 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 14:13:44.402008 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 14:13:44.402195 PCI: 00:1f.4
1221 14:13:44.411874 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 14:13:44.421960 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 14:13:44.422086 PCI: 00:1f.5
1224 14:13:44.432233 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 14:13:44.438545 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 14:13:44.445039 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 14:13:44.451994 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 14:13:44.455361 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 14:13:44.458326 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 14:13:44.461873 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 14:13:44.465399 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 14:13:44.472090 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 14:13:44.478470 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 14:13:44.488555 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 14:13:44.495457 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 14:13:44.502037 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 14:13:44.505149 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 14:13:44.515111 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 14:13:44.518750 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 14:13:44.525850 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 14:13:44.528918 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 14:13:44.535190 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 14:13:44.538672 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 14:13:44.542154 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 14:13:44.548617 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 14:13:44.552156 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 14:13:44.558555 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 14:13:44.561506 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 14:13:44.568591 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 14:13:44.571502 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 14:13:44.578180 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 14:13:44.581878 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 14:13:44.588134 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 14:13:44.591331 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 14:13:44.598177 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 14:13:44.601359 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 14:13:44.607875 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 14:13:44.611087 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 14:13:44.618037 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 14:13:44.621696 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 14:13:44.624649 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 14:13:44.634821 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 14:13:44.637767 avoid_fixed_resources: DOMAIN: 0000
1264 14:13:44.644634 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 14:13:44.650962 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 14:13:44.657916 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 14:13:44.664445 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 14:13:44.674541 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 14:13:44.681075 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 14:13:44.687277 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 14:13:44.697400 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 14:13:44.704311 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 14:13:44.710497 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 14:13:44.717182 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 14:13:44.726956 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 14:13:44.727049 Setting resources...
1277 14:13:44.733900 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 14:13:44.737027 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 14:13:44.743725 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 14:13:44.747278 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 14:13:44.750776 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 14:13:44.756879 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 14:13:44.763634 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 14:13:44.770465 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 14:13:44.776808 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 14:13:44.783406 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 14:13:44.786348 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 14:13:44.793065 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 14:13:44.796333 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 14:13:44.800194 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 14:13:44.806245 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 14:13:44.809367 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 14:13:44.816653 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 14:13:44.819759 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 14:13:44.825975 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 14:13:44.829571 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 14:13:44.836191 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 14:13:44.839288 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 14:13:44.845949 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 14:13:44.849382 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 14:13:44.856251 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 14:13:44.859500 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 14:13:44.865975 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 14:13:44.869218 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 14:13:44.875996 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 14:13:44.879368 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 14:13:44.882689 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 14:13:44.889172 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 14:13:44.895814 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 14:13:44.902642 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 14:13:44.911993 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 14:13:44.918514 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 14:13:44.922218 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 14:13:44.932102 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 14:13:44.935143 Root Device assign_resources, bus 0 link: 0
1316 14:13:44.938820 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 14:13:44.948926 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 14:13:44.955363 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 14:13:44.965552 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 14:13:44.972264 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 14:13:44.981787 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 14:13:44.988701 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 14:13:44.995192 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 14:13:44.998734 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 14:13:45.005073 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 14:13:45.014971 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 14:13:45.021871 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 14:13:45.031682 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 14:13:45.035363 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 14:13:45.042034 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 14:13:45.048323 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 14:13:45.055210 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 14:13:45.058709 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 14:13:45.065217 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 14:13:45.075246 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 14:13:45.081629 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 14:13:45.091691 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 14:13:45.098045 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 14:13:45.105239 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 14:13:45.111605 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 14:13:45.122154 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 14:13:45.125175 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 14:13:45.131914 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 14:13:45.138771 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 14:13:45.148622 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 14:13:45.158469 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 14:13:45.162390 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 14:13:45.168476 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 14:13:45.175167 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 14:13:45.181660 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 14:13:45.191465 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 14:13:45.194834 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 14:13:45.202056 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 14:13:45.208371 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 14:13:45.211497 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 14:13:45.218385 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 14:13:45.221448 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 14:13:45.228256 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 14:13:45.231243 LPC: Trying to open IO window from 800 size 1ff
1360 14:13:45.241150 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 14:13:45.247870 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 14:13:45.257823 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 14:13:45.264737 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 14:13:45.271232 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 14:13:45.274923 Root Device assign_resources, bus 0 link: 0
1366 14:13:45.278064 Done setting resources.
1367 14:13:45.284506 Show resources in subtree (Root Device)...After assigning values.
1368 14:13:45.287824 Root Device child on link 0 CPU_CLUSTER: 0
1369 14:13:45.291087 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 14:13:45.294578 APIC: 00
1371 14:13:45.294669 APIC: 03
1372 14:13:45.294740 APIC: 04
1373 14:13:45.297563 APIC: 01
1374 14:13:45.297654 APIC: 02
1375 14:13:45.301465 APIC: 05
1376 14:13:45.301556 APIC: 07
1377 14:13:45.301628 APIC: 06
1378 14:13:45.307613 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 14:13:45.317458 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 14:13:45.327379 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 14:13:45.327486 PCI: 00:00.0
1382 14:13:45.337729 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 14:13:45.347686 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 14:13:45.357533 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 14:13:45.367365 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 14:13:45.377180 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 14:13:45.383548 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 14:13:45.393716 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 14:13:45.403348 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 14:13:45.413298 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 14:13:45.423464 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 14:13:45.429880 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 14:13:45.440205 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 14:13:45.449473 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 14:13:45.459747 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 14:13:45.469293 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 14:13:45.479663 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 14:13:45.479757 PCI: 00:02.0
1399 14:13:45.492635 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 14:13:45.502569 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 14:13:45.512600 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 14:13:45.512695 PCI: 00:04.0
1403 14:13:45.516207 PCI: 00:08.0
1404 14:13:45.526129 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 14:13:45.526224 PCI: 00:12.0
1406 14:13:45.535573 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 14:13:45.542041 PCI: 00:14.0 child on link 0 USB0 port 0
1408 14:13:45.551976 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 14:13:45.555491 USB0 port 0 child on link 0 USB2 port 0
1410 14:13:45.559097 USB2 port 0
1411 14:13:45.559189 USB2 port 1
1412 14:13:45.562142 USB2 port 2
1413 14:13:45.562235 USB2 port 3
1414 14:13:45.565730 USB2 port 5
1415 14:13:45.565823 USB2 port 6
1416 14:13:45.569013 USB2 port 9
1417 14:13:45.569106 USB3 port 0
1418 14:13:45.572102 USB3 port 1
1419 14:13:45.572194 USB3 port 2
1420 14:13:45.575741 USB3 port 3
1421 14:13:45.575834 USB3 port 4
1422 14:13:45.578789 PCI: 00:14.2
1423 14:13:45.588828 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 14:13:45.598575 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 14:13:45.602082 PCI: 00:14.3
1426 14:13:45.611944 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 14:13:45.615186 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 14:13:45.625109 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 14:13:45.628474 I2C: 01:15
1430 14:13:45.631826 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 14:13:45.641572 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 14:13:45.645076 I2C: 02:5d
1433 14:13:45.645189 GENERIC: 0.0
1434 14:13:45.648420 PCI: 00:16.0
1435 14:13:45.658365 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 14:13:45.658482 PCI: 00:17.0
1437 14:13:45.668094 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 14:13:45.677823 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 14:13:45.687681 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 14:13:45.697719 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 14:13:45.708263 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 14:13:45.717990 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 14:13:45.720807 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 14:13:45.731350 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 14:13:45.734193 I2C: 03:1a
1446 14:13:45.734306 I2C: 03:38
1447 14:13:45.734410 I2C: 03:39
1448 14:13:45.737636 I2C: 03:3a
1449 14:13:45.737747 I2C: 03:3b
1450 14:13:45.744021 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 14:13:45.754493 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 14:13:45.764374 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 14:13:45.774299 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 14:13:45.774418 PCI: 01:00.0
1455 14:13:45.784179 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 14:13:45.787313 PCI: 00:1e.0
1457 14:13:45.797311 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 14:13:45.807354 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 14:13:45.813762 PCI: 00:1e.2 child on link 0 SPI: 00
1460 14:13:45.823668 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 14:13:45.823786 SPI: 00
1462 14:13:45.826971 PCI: 00:1e.3 child on link 0 SPI: 01
1463 14:13:45.836968 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 14:13:45.840191 SPI: 01
1465 14:13:45.843906 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 14:13:45.853718 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 14:13:45.860101 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 14:13:45.863621 PNP: 0c09.0
1469 14:13:45.873354 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 14:13:45.873471 PCI: 00:1f.3
1471 14:13:45.883394 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 14:13:45.893345 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 14:13:45.896410 PCI: 00:1f.4
1474 14:13:45.906481 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 14:13:45.916345 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 14:13:45.916434 PCI: 00:1f.5
1477 14:13:45.926538 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 14:13:45.929944 Done allocating resources.
1479 14:13:45.936374 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 14:13:45.939284 Enabling resources...
1481 14:13:45.942960 PCI: 00:00.0 subsystem <- 8086/9b61
1482 14:13:45.946654 PCI: 00:00.0 cmd <- 06
1483 14:13:45.949600 PCI: 00:02.0 subsystem <- 8086/9b41
1484 14:13:45.952547 PCI: 00:02.0 cmd <- 03
1485 14:13:45.952659 PCI: 00:08.0 cmd <- 06
1486 14:13:45.959171 PCI: 00:12.0 subsystem <- 8086/02f9
1487 14:13:45.959262 PCI: 00:12.0 cmd <- 02
1488 14:13:45.962616 PCI: 00:14.0 subsystem <- 8086/02ed
1489 14:13:45.966032 PCI: 00:14.0 cmd <- 02
1490 14:13:45.969703 PCI: 00:14.2 cmd <- 02
1491 14:13:45.972772 PCI: 00:14.3 subsystem <- 8086/02f0
1492 14:13:45.976367 PCI: 00:14.3 cmd <- 02
1493 14:13:45.979585 PCI: 00:15.0 subsystem <- 8086/02e8
1494 14:13:45.982801 PCI: 00:15.0 cmd <- 02
1495 14:13:45.985902 PCI: 00:15.1 subsystem <- 8086/02e9
1496 14:13:45.989067 PCI: 00:15.1 cmd <- 02
1497 14:13:45.992761 PCI: 00:16.0 subsystem <- 8086/02e0
1498 14:13:45.992839 PCI: 00:16.0 cmd <- 02
1499 14:13:45.999773 PCI: 00:17.0 subsystem <- 8086/02d3
1500 14:13:45.999864 PCI: 00:17.0 cmd <- 03
1501 14:13:46.002833 PCI: 00:19.0 subsystem <- 8086/02c5
1502 14:13:46.006677 PCI: 00:19.0 cmd <- 02
1503 14:13:46.009807 PCI: 00:1d.0 bridge ctrl <- 0013
1504 14:13:46.012835 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 14:13:46.016045 PCI: 00:1d.0 cmd <- 06
1506 14:13:46.019853 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 14:13:46.022797 PCI: 00:1e.0 cmd <- 06
1508 14:13:46.026382 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 14:13:46.029311 PCI: 00:1e.2 cmd <- 06
1510 14:13:46.032836 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 14:13:46.036355 PCI: 00:1e.3 cmd <- 02
1512 14:13:46.039834 PCI: 00:1f.0 subsystem <- 8086/0284
1513 14:13:46.042653 PCI: 00:1f.0 cmd <- 407
1514 14:13:46.046151 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 14:13:46.046265 PCI: 00:1f.3 cmd <- 02
1516 14:13:46.053139 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 14:13:46.053253 PCI: 00:1f.4 cmd <- 03
1518 14:13:46.056597 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 14:13:46.059605 PCI: 00:1f.5 cmd <- 406
1520 14:13:46.069565 PCI: 01:00.0 cmd <- 02
1521 14:13:46.074287 done.
1522 14:13:46.086473 ME: Version: 14.0.39.1367
1523 14:13:46.093205 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1524 14:13:46.096408 Initializing devices...
1525 14:13:46.096505 Root Device init ...
1526 14:13:46.103341 Chrome EC: Set SMI mask to 0x0000000000000000
1527 14:13:46.106540 Chrome EC: clear events_b mask to 0x0000000000000000
1528 14:13:46.112838 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 14:13:46.119754 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 14:13:46.126578 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 14:13:46.129614 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 14:13:46.133220 Root Device init finished in 35182 usecs
1533 14:13:46.136609 CPU_CLUSTER: 0 init ...
1534 14:13:46.143014 CPU_CLUSTER: 0 init finished in 2449 usecs
1535 14:13:46.147393 PCI: 00:00.0 init ...
1536 14:13:46.150743 CPU TDP: 15 Watts
1537 14:13:46.154007 CPU PL2 = 64 Watts
1538 14:13:46.157405 PCI: 00:00.0 init finished in 7076 usecs
1539 14:13:46.160377 PCI: 00:02.0 init ...
1540 14:13:46.163841 PCI: 00:02.0 init finished in 2253 usecs
1541 14:13:46.167373 PCI: 00:08.0 init ...
1542 14:13:46.171012 PCI: 00:08.0 init finished in 2253 usecs
1543 14:13:46.173842 PCI: 00:12.0 init ...
1544 14:13:46.177305 PCI: 00:12.0 init finished in 2252 usecs
1545 14:13:46.180663 PCI: 00:14.0 init ...
1546 14:13:46.183818 PCI: 00:14.0 init finished in 2252 usecs
1547 14:13:46.187086 PCI: 00:14.2 init ...
1548 14:13:46.190287 PCI: 00:14.2 init finished in 2253 usecs
1549 14:13:46.194038 PCI: 00:14.3 init ...
1550 14:13:46.197226 PCI: 00:14.3 init finished in 2264 usecs
1551 14:13:46.200183 PCI: 00:15.0 init ...
1552 14:13:46.204116 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 14:13:46.207120 PCI: 00:15.0 init finished in 5971 usecs
1554 14:13:46.210946 PCI: 00:15.1 init ...
1555 14:13:46.214089 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 14:13:46.217077 PCI: 00:15.1 init finished in 5978 usecs
1557 14:13:46.220944 PCI: 00:16.0 init ...
1558 14:13:46.223969 PCI: 00:16.0 init finished in 2252 usecs
1559 14:13:46.227773 PCI: 00:19.0 init ...
1560 14:13:46.231427 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 14:13:46.234441 PCI: 00:19.0 init finished in 5977 usecs
1562 14:13:46.238506 PCI: 00:1d.0 init ...
1563 14:13:46.241357 Initializing PCH PCIe bridge.
1564 14:13:46.244787 PCI: 00:1d.0 init finished in 5287 usecs
1565 14:13:46.249413 PCI: 00:1f.0 init ...
1566 14:13:46.252962 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 14:13:46.258976 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 14:13:46.259086 IOAPIC: ID = 0x02
1569 14:13:46.262540 IOAPIC: Dumping registers
1570 14:13:46.265639 reg 0x0000: 0x02000000
1571 14:13:46.269270 reg 0x0001: 0x00770020
1572 14:13:46.269403 reg 0x0002: 0x00000000
1573 14:13:46.276096 PCI: 00:1f.0 init finished in 23545 usecs
1574 14:13:46.279647 PCI: 00:1f.4 init ...
1575 14:13:46.282446 PCI: 00:1f.4 init finished in 2263 usecs
1576 14:13:46.293976 PCI: 01:00.0 init ...
1577 14:13:46.297131 PCI: 01:00.0 init finished in 2252 usecs
1578 14:13:46.301499 PNP: 0c09.0 init ...
1579 14:13:46.304598 Google Chrome EC uptime: 11.054 seconds
1580 14:13:46.311030 Google Chrome AP resets since EC boot: 0
1581 14:13:46.314798 Google Chrome most recent AP reset causes:
1582 14:13:46.321265 Google Chrome EC reset flags at last EC boot: reset-pin
1583 14:13:46.324418 PNP: 0c09.0 init finished in 20569 usecs
1584 14:13:46.328228 Devices initialized
1585 14:13:46.328614 Show all devs... After init.
1586 14:13:46.331306 Root Device: enabled 1
1587 14:13:46.334397 CPU_CLUSTER: 0: enabled 1
1588 14:13:46.337547 DOMAIN: 0000: enabled 1
1589 14:13:46.338001 APIC: 00: enabled 1
1590 14:13:46.341218 PCI: 00:00.0: enabled 1
1591 14:13:46.344742 PCI: 00:02.0: enabled 1
1592 14:13:46.347500 PCI: 00:04.0: enabled 0
1593 14:13:46.347930 PCI: 00:05.0: enabled 0
1594 14:13:46.350830 PCI: 00:12.0: enabled 1
1595 14:13:46.354371 PCI: 00:12.5: enabled 0
1596 14:13:46.357963 PCI: 00:12.6: enabled 0
1597 14:13:46.358394 PCI: 00:14.0: enabled 1
1598 14:13:46.360752 PCI: 00:14.1: enabled 0
1599 14:13:46.364040 PCI: 00:14.3: enabled 1
1600 14:13:46.364462 PCI: 00:14.5: enabled 0
1601 14:13:46.367417 PCI: 00:15.0: enabled 1
1602 14:13:46.370667 PCI: 00:15.1: enabled 1
1603 14:13:46.374008 PCI: 00:15.2: enabled 0
1604 14:13:46.374542 PCI: 00:15.3: enabled 0
1605 14:13:46.377712 PCI: 00:16.0: enabled 1
1606 14:13:46.380550 PCI: 00:16.1: enabled 0
1607 14:13:46.384258 PCI: 00:16.2: enabled 0
1608 14:13:46.384730 PCI: 00:16.3: enabled 0
1609 14:13:46.387085 PCI: 00:16.4: enabled 0
1610 14:13:46.390527 PCI: 00:16.5: enabled 0
1611 14:13:46.393900 PCI: 00:17.0: enabled 1
1612 14:13:46.394383 PCI: 00:19.0: enabled 1
1613 14:13:46.397342 PCI: 00:19.1: enabled 0
1614 14:13:46.400287 PCI: 00:19.2: enabled 0
1615 14:13:46.400894 PCI: 00:1a.0: enabled 0
1616 14:13:46.404076 PCI: 00:1c.0: enabled 0
1617 14:13:46.407073 PCI: 00:1c.1: enabled 0
1618 14:13:46.410504 PCI: 00:1c.2: enabled 0
1619 14:13:46.411020 PCI: 00:1c.3: enabled 0
1620 14:13:46.413628 PCI: 00:1c.4: enabled 0
1621 14:13:46.416904 PCI: 00:1c.5: enabled 0
1622 14:13:46.420521 PCI: 00:1c.6: enabled 0
1623 14:13:46.420984 PCI: 00:1c.7: enabled 0
1624 14:13:46.423649 PCI: 00:1d.0: enabled 1
1625 14:13:46.427152 PCI: 00:1d.1: enabled 0
1626 14:13:46.430341 PCI: 00:1d.2: enabled 0
1627 14:13:46.430859 PCI: 00:1d.3: enabled 0
1628 14:13:46.433431 PCI: 00:1d.4: enabled 0
1629 14:13:46.437080 PCI: 00:1d.5: enabled 0
1630 14:13:46.440333 PCI: 00:1e.0: enabled 1
1631 14:13:46.440799 PCI: 00:1e.1: enabled 0
1632 14:13:46.443260 PCI: 00:1e.2: enabled 1
1633 14:13:46.446606 PCI: 00:1e.3: enabled 1
1634 14:13:46.447056 PCI: 00:1f.0: enabled 1
1635 14:13:46.450342 PCI: 00:1f.1: enabled 0
1636 14:13:46.453941 PCI: 00:1f.2: enabled 0
1637 14:13:46.456557 PCI: 00:1f.3: enabled 1
1638 14:13:46.456996 PCI: 00:1f.4: enabled 1
1639 14:13:46.460142 PCI: 00:1f.5: enabled 1
1640 14:13:46.463228 PCI: 00:1f.6: enabled 0
1641 14:13:46.466887 USB0 port 0: enabled 1
1642 14:13:46.467337 I2C: 01:15: enabled 1
1643 14:13:46.469925 I2C: 02:5d: enabled 1
1644 14:13:46.473348 GENERIC: 0.0: enabled 1
1645 14:13:46.473789 I2C: 03:1a: enabled 1
1646 14:13:46.476805 I2C: 03:38: enabled 1
1647 14:13:46.480393 I2C: 03:39: enabled 1
1648 14:13:46.480858 I2C: 03:3a: enabled 1
1649 14:13:46.483159 I2C: 03:3b: enabled 1
1650 14:13:46.486650 PCI: 00:00.0: enabled 1
1651 14:13:46.487101 SPI: 00: enabled 1
1652 14:13:46.489913 SPI: 01: enabled 1
1653 14:13:46.493341 PNP: 0c09.0: enabled 1
1654 14:13:46.493798 USB2 port 0: enabled 1
1655 14:13:46.496780 USB2 port 1: enabled 1
1656 14:13:46.499737 USB2 port 2: enabled 0
1657 14:13:46.500189 USB2 port 3: enabled 0
1658 14:13:46.503006 USB2 port 5: enabled 0
1659 14:13:46.506497 USB2 port 6: enabled 1
1660 14:13:46.509616 USB2 port 9: enabled 1
1661 14:13:46.510184 USB3 port 0: enabled 1
1662 14:13:46.513083 USB3 port 1: enabled 1
1663 14:13:46.516206 USB3 port 2: enabled 1
1664 14:13:46.516653 USB3 port 3: enabled 1
1665 14:13:46.519612 USB3 port 4: enabled 0
1666 14:13:46.523099 APIC: 03: enabled 1
1667 14:13:46.523610 APIC: 04: enabled 1
1668 14:13:46.526341 APIC: 01: enabled 1
1669 14:13:46.529241 APIC: 02: enabled 1
1670 14:13:46.529826 APIC: 05: enabled 1
1671 14:13:46.533187 APIC: 07: enabled 1
1672 14:13:46.533633 APIC: 06: enabled 1
1673 14:13:46.536268 PCI: 00:08.0: enabled 1
1674 14:13:46.539341 PCI: 00:14.2: enabled 1
1675 14:13:46.542549 PCI: 01:00.0: enabled 1
1676 14:13:46.546174 Disabling ACPI via APMC:
1677 14:13:46.546701 done.
1678 14:13:46.552889 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 14:13:46.556142 ELOG: NV offset 0xaf0000 size 0x4000
1680 14:13:46.562980 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 14:13:46.569970 ELOG: Event(17) added with size 13 at 2023-06-07 14:13:43 UTC
1682 14:13:46.576435 ELOG: Event(92) added with size 9 at 2023-06-07 14:13:43 UTC
1683 14:13:46.582779 ELOG: Event(93) added with size 9 at 2023-06-07 14:13:43 UTC
1684 14:13:46.590003 ELOG: Event(9A) added with size 9 at 2023-06-07 14:13:43 UTC
1685 14:13:46.596317 ELOG: Event(9E) added with size 10 at 2023-06-07 14:13:43 UTC
1686 14:13:46.602569 ELOG: Event(9F) added with size 14 at 2023-06-07 14:13:43 UTC
1687 14:13:46.606225 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1688 14:13:46.613689 ELOG: Event(A1) added with size 10 at 2023-06-07 14:13:43 UTC
1689 14:13:46.623340 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 14:13:46.629761 ELOG: Event(A0) added with size 9 at 2023-06-07 14:13:43 UTC
1691 14:13:46.633511 elog_add_boot_reason: Logged dev mode boot
1692 14:13:46.633960 Finalize devices...
1693 14:13:46.636661 PCI: 00:17.0 final
1694 14:13:46.639690 Devices finalized
1695 14:13:46.643654 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 14:13:46.650049 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 1
1697 14:13:46.652894 ME: HFSTS1 : 0x90000245
1698 14:13:46.656672 ME: HFSTS2 : 0x3B850126
1699 14:13:46.663179 ME: HFSTS3 : 0x00000020
1700 14:13:46.666182 ME: HFSTS4 : 0x00004800
1701 14:13:46.669444 ME: HFSTS5 : 0x00000000
1702 14:13:46.673012 ME: HFSTS6 : 0x40400006
1703 14:13:46.676375 ME: Manufacturing Mode : NO
1704 14:13:46.679511 ME: FW Partition Table : OK
1705 14:13:46.683045 ME: Bringup Loader Failure : NO
1706 14:13:46.686285 ME: Firmware Init Complete : YES
1707 14:13:46.689353 ME: Boot Options Present : NO
1708 14:13:46.692593 ME: Update In Progress : NO
1709 14:13:46.696274 ME: D0i3 Support : YES
1710 14:13:46.699340 ME: Low Power State Enabled : NO
1711 14:13:46.702989 ME: CPU Replaced : NO
1712 14:13:46.706100 ME: CPU Replacement Valid : YES
1713 14:13:46.709462 ME: Current Working State : 5
1714 14:13:46.712998 ME: Current Operation State : 1
1715 14:13:46.715900 ME: Current Operation Mode : 0
1716 14:13:46.719397 ME: Error Code : 0
1717 14:13:46.722733 ME: CPU Debug Disabled : YES
1718 14:13:46.725749 ME: TXT Support : NO
1719 14:13:46.732582 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 14:13:46.739352 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 14:13:46.739842 CBFS @ c08000 size 3f8000
1722 14:13:46.745692 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 14:13:46.749345 CBFS: Locating 'fallback/dsdt.aml'
1724 14:13:46.752625 CBFS: Found @ offset 10bb80 size 3fa5
1725 14:13:46.759332 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 14:13:46.762251 CBFS @ c08000 size 3f8000
1727 14:13:46.765508 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 14:13:46.768835 CBFS: Locating 'fallback/slic'
1729 14:13:46.774000 CBFS: 'fallback/slic' not found.
1730 14:13:46.780786 ACPI: Writing ACPI tables at 99b3e000.
1731 14:13:46.781234 ACPI: * FACS
1732 14:13:46.783618 ACPI: * DSDT
1733 14:13:46.787198 Ramoops buffer: 0x100000@0x99a3d000.
1734 14:13:46.790629 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 14:13:46.797091 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 14:13:46.800498 Google Chrome EC: version:
1737 14:13:46.803609 ro: helios_v2.0.2659-56403530b
1738 14:13:46.806639 rw: helios_v2.0.2849-c41de27e7d
1739 14:13:46.807089 running image: 1
1740 14:13:46.811343 ACPI: * FADT
1741 14:13:46.811839 SCI is IRQ9
1742 14:13:46.817798 ACPI: added table 1/32, length now 40
1743 14:13:46.818242 ACPI: * SSDT
1744 14:13:46.821282 Found 1 CPU(s) with 8 core(s) each.
1745 14:13:46.824253 Error: Could not locate 'wifi_sar' in VPD.
1746 14:13:46.831231 Checking CBFS for default SAR values
1747 14:13:46.834407 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 14:13:46.837498 CBFS @ c08000 size 3f8000
1749 14:13:46.844446 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 14:13:46.847696 CBFS: Locating 'wifi_sar_defaults.hex'
1751 14:13:46.850853 CBFS: Found @ offset 5fac0 size 77
1752 14:13:46.854095 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 14:13:46.860928 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 14:13:46.864612 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 14:13:46.870728 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 14:13:46.873737 failed to find key in VPD: dsm_calib_r0_0
1757 14:13:46.883746 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 14:13:46.887200 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 14:13:46.890889 failed to find key in VPD: dsm_calib_r0_1
1760 14:13:46.900769 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 14:13:46.907223 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 14:13:46.910475 failed to find key in VPD: dsm_calib_r0_2
1763 14:13:46.920677 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 14:13:46.923696 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 14:13:46.930315 failed to find key in VPD: dsm_calib_r0_3
1766 14:13:46.936646 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 14:13:46.943540 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 14:13:46.946867 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 14:13:46.950027 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 14:13:46.954237 EC returned error result code 1
1771 14:13:46.957952 EC returned error result code 1
1772 14:13:46.961824 EC returned error result code 1
1773 14:13:46.967968 PS2K: Bad resp from EC. Vivaldi disabled!
1774 14:13:46.971710 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 14:13:46.978023 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 14:13:46.984478 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 14:13:46.988198 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 14:13:46.994371 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 14:13:47.000979 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 14:13:47.007890 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 14:13:47.011422 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 14:13:47.017769 ACPI: added table 2/32, length now 44
1783 14:13:47.018173 ACPI: * MCFG
1784 14:13:47.020944 ACPI: added table 3/32, length now 48
1785 14:13:47.024213 ACPI: * TPM2
1786 14:13:47.027440 TPM2 log created at 99a2d000
1787 14:13:47.030880 ACPI: added table 4/32, length now 52
1788 14:13:47.031263 ACPI: * MADT
1789 14:13:47.034469 SCI is IRQ9
1790 14:13:47.037822 ACPI: added table 5/32, length now 56
1791 14:13:47.038304 current = 99b43ac0
1792 14:13:47.040753 ACPI: * DMAR
1793 14:13:47.044231 ACPI: added table 6/32, length now 60
1794 14:13:47.046964 ACPI: * IGD OpRegion
1795 14:13:47.047045 GMA: Found VBT in CBFS
1796 14:13:47.050702 GMA: Found valid VBT in CBFS
1797 14:13:47.053733 ACPI: added table 7/32, length now 64
1798 14:13:47.057284 ACPI: * HPET
1799 14:13:47.060515 ACPI: added table 8/32, length now 68
1800 14:13:47.063540 ACPI: done.
1801 14:13:47.063621 ACPI tables: 31744 bytes.
1802 14:13:47.067294 smbios_write_tables: 99a2c000
1803 14:13:47.070504 EC returned error result code 3
1804 14:13:47.074285 Couldn't obtain OEM name from CBI
1805 14:13:47.077248 Create SMBIOS type 17
1806 14:13:47.080513 PCI: 00:00.0 (Intel Cannonlake)
1807 14:13:47.084151 PCI: 00:14.3 (Intel WiFi)
1808 14:13:47.087148 SMBIOS tables: 939 bytes.
1809 14:13:47.090834 Writing table forward entry at 0x00000500
1810 14:13:47.097388 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 14:13:47.100666 Writing coreboot table at 0x99b62000
1812 14:13:47.107178 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 14:13:47.110732 1. 0000000000001000-000000000009ffff: RAM
1814 14:13:47.113627 2. 00000000000a0000-00000000000fffff: RESERVED
1815 14:13:47.120246 3. 0000000000100000-0000000099a2bfff: RAM
1816 14:13:47.126893 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 14:13:47.130446 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 14:13:47.136781 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 14:13:47.140234 7. 000000009a000000-000000009f7fffff: RESERVED
1820 14:13:47.146791 8. 00000000e0000000-00000000efffffff: RESERVED
1821 14:13:47.150197 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 14:13:47.156369 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 14:13:47.160192 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 14:13:47.163378 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 14:13:47.169878 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 14:13:47.173069 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 14:13:47.179986 15. 0000000100000000-000000045e7fffff: RAM
1828 14:13:47.183167 Graphics framebuffer located at 0xc0000000
1829 14:13:47.186235 Passing 5 GPIOs to payload:
1830 14:13:47.189500 NAME | PORT | POLARITY | VALUE
1831 14:13:47.196403 write protect | undefined | high | low
1832 14:13:47.199464 lid | undefined | high | high
1833 14:13:47.206624 power | undefined | high | low
1834 14:13:47.213196 oprom | undefined | high | low
1835 14:13:47.216171 EC in RW | 0x000000cb | high | low
1836 14:13:47.219431 Board ID: 4
1837 14:13:47.223009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 14:13:47.226393 CBFS @ c08000 size 3f8000
1839 14:13:47.232889 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 14:13:47.239367 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 14:13:47.239499 coreboot table: 1492 bytes.
1842 14:13:47.242510 IMD ROOT 0. 99fff000 00001000
1843 14:13:47.246265 IMD SMALL 1. 99ffe000 00001000
1844 14:13:47.249165 FSP MEMORY 2. 99c4e000 003b0000
1845 14:13:47.252593 CONSOLE 3. 99c2e000 00020000
1846 14:13:47.256049 FMAP 4. 99c2d000 0000054e
1847 14:13:47.259343 TIME STAMP 5. 99c2c000 00000910
1848 14:13:47.262643 VBOOT WORK 6. 99c18000 00014000
1849 14:13:47.265951 MRC DATA 7. 99c16000 00001958
1850 14:13:47.269585 ROMSTG STCK 8. 99c15000 00001000
1851 14:13:47.272818 AFTER CAR 9. 99c0b000 0000a000
1852 14:13:47.275967 RAMSTAGE 10. 99baf000 0005c000
1853 14:13:47.279657 REFCODE 11. 99b7a000 00035000
1854 14:13:47.282863 SMM BACKUP 12. 99b6a000 00010000
1855 14:13:47.286038 COREBOOT 13. 99b62000 00008000
1856 14:13:47.289196 ACPI 14. 99b3e000 00024000
1857 14:13:47.292912 ACPI GNVS 15. 99b3d000 00001000
1858 14:13:47.295932 RAMOOPS 16. 99a3d000 00100000
1859 14:13:47.299470 TPM2 TCGLOG17. 99a2d000 00010000
1860 14:13:47.302421 SMBIOS 18. 99a2c000 00000800
1861 14:13:47.306173 IMD small region:
1862 14:13:47.309687 IMD ROOT 0. 99ffec00 00000400
1863 14:13:47.312408 FSP RUNTIME 1. 99ffebe0 00000004
1864 14:13:47.316029 EC HOSTEVENT 2. 99ffebc0 00000008
1865 14:13:47.319204 POWER STATE 3. 99ffeb80 00000040
1866 14:13:47.322628 ROMSTAGE 4. 99ffeb60 00000004
1867 14:13:47.326060 MEM INFO 5. 99ffe9a0 000001b9
1868 14:13:47.329395 VPD 6. 99ffe920 0000006c
1869 14:13:47.332442 MTRR: Physical address space:
1870 14:13:47.339011 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 14:13:47.345701 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 14:13:47.352423 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 14:13:47.359160 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 14:13:47.365468 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 14:13:47.372097 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 14:13:47.378331 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 14:13:47.382130 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 14:13:47.385323 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 14:13:47.388459 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 14:13:47.395431 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 14:13:47.398674 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 14:13:47.401920 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 14:13:47.404782 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 14:13:47.408578 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 14:13:47.414990 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 14:13:47.418346 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 14:13:47.421444 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 14:13:47.424877 call enable_fixed_mtrr()
1889 14:13:47.428049 CPU physical address size: 39 bits
1890 14:13:47.434710 MTRR: default type WB/UC MTRR counts: 6/8.
1891 14:13:47.438393 MTRR: WB selected as default type.
1892 14:13:47.444858 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 14:13:47.447959 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 14:13:47.454342 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 14:13:47.461399 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 14:13:47.468176 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 14:13:47.474458 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 14:13:47.477842 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 14:13:47.484247 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 14:13:47.487803 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 14:13:47.490859 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 14:13:47.494684 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 14:13:47.500905 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 14:13:47.504711 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 14:13:47.507585 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 14:13:47.511140 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 14:13:47.517367 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 14:13:47.520999 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 14:13:47.521092
1910 14:13:47.521164 MTRR check
1911 14:13:47.523865 Fixed MTRRs : Enabled
1912 14:13:47.527742 Variable MTRRs: Enabled
1913 14:13:47.527835
1914 14:13:47.531036 call enable_fixed_mtrr()
1915 14:13:47.533766 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1916 14:13:47.537370 CPU physical address size: 39 bits
1917 14:13:47.544053 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1918 14:13:47.547459 MTRR: Fixed MSR 0x250 0x0606060606060606
1919 14:13:47.550568 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 14:13:47.557155 MTRR: Fixed MSR 0x259 0x0000000000000000
1921 14:13:47.560210 MTRR: Fixed MSR 0x268 0x0606060606060606
1922 14:13:47.563857 MTRR: Fixed MSR 0x269 0x0606060606060606
1923 14:13:47.566861 MTRR: Fixed MSR 0x26a 0x0606060606060606
1924 14:13:47.573665 MTRR: Fixed MSR 0x26b 0x0606060606060606
1925 14:13:47.576811 MTRR: Fixed MSR 0x26c 0x0606060606060606
1926 14:13:47.580361 MTRR: Fixed MSR 0x26d 0x0606060606060606
1927 14:13:47.583348 MTRR: Fixed MSR 0x26e 0x0606060606060606
1928 14:13:47.589982 MTRR: Fixed MSR 0x26f 0x0606060606060606
1929 14:13:47.593609 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 14:13:47.596706 call enable_fixed_mtrr()
1931 14:13:47.600326 MTRR: Fixed MSR 0x258 0x0606060606060606
1932 14:13:47.603632 MTRR: Fixed MSR 0x259 0x0000000000000000
1933 14:13:47.606669 MTRR: Fixed MSR 0x268 0x0606060606060606
1934 14:13:47.613721 MTRR: Fixed MSR 0x269 0x0606060606060606
1935 14:13:47.616770 MTRR: Fixed MSR 0x26a 0x0606060606060606
1936 14:13:47.619902 MTRR: Fixed MSR 0x26b 0x0606060606060606
1937 14:13:47.623225 MTRR: Fixed MSR 0x26c 0x0606060606060606
1938 14:13:47.629879 MTRR: Fixed MSR 0x26d 0x0606060606060606
1939 14:13:47.633195 MTRR: Fixed MSR 0x26e 0x0606060606060606
1940 14:13:47.636669 MTRR: Fixed MSR 0x26f 0x0606060606060606
1941 14:13:47.639548 CPU physical address size: 39 bits
1942 14:13:47.643171 call enable_fixed_mtrr()
1943 14:13:47.646555 MTRR: Fixed MSR 0x250 0x0606060606060606
1944 14:13:47.650004 MTRR: Fixed MSR 0x250 0x0606060606060606
1945 14:13:47.656506 MTRR: Fixed MSR 0x258 0x0606060606060606
1946 14:13:47.659499 MTRR: Fixed MSR 0x259 0x0000000000000000
1947 14:13:47.663065 MTRR: Fixed MSR 0x268 0x0606060606060606
1948 14:13:47.666334 MTRR: Fixed MSR 0x269 0x0606060606060606
1949 14:13:47.673091 MTRR: Fixed MSR 0x26a 0x0606060606060606
1950 14:13:47.676215 MTRR: Fixed MSR 0x26b 0x0606060606060606
1951 14:13:47.679300 MTRR: Fixed MSR 0x26c 0x0606060606060606
1952 14:13:47.683075 MTRR: Fixed MSR 0x26d 0x0606060606060606
1953 14:13:47.689078 MTRR: Fixed MSR 0x26e 0x0606060606060606
1954 14:13:47.692983 MTRR: Fixed MSR 0x26f 0x0606060606060606
1955 14:13:47.695808 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 14:13:47.699425 call enable_fixed_mtrr()
1957 14:13:47.702637 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 14:13:47.705957 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 14:13:47.712589 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 14:13:47.716035 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 14:13:47.719173 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 14:13:47.722235 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 14:13:47.728907 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 14:13:47.732655 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 14:13:47.735555 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 14:13:47.738979 CPU physical address size: 39 bits
1967 14:13:47.742067 call enable_fixed_mtrr()
1968 14:13:47.745931 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 14:13:47.752531 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 14:13:47.755368 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 14:13:47.759080 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 14:13:47.762237 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 14:13:47.765849 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 14:13:47.772228 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 14:13:47.775169 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 14:13:47.778639 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 14:13:47.782157 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 14:13:47.788442 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 14:13:47.792189 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 14:13:47.795292 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 14:13:47.798851 call enable_fixed_mtrr()
1982 14:13:47.801782 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 14:13:47.805071 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 14:13:47.811574 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 14:13:47.815361 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 14:13:47.818322 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 14:13:47.821845 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 14:13:47.828527 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 14:13:47.831827 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 14:13:47.834821 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 14:13:47.838457 CPU physical address size: 39 bits
1992 14:13:47.841941 call enable_fixed_mtrr()
1993 14:13:47.845033 CPU physical address size: 39 bits
1994 14:13:47.848047 CPU physical address size: 39 bits
1995 14:13:47.851468 CPU physical address size: 39 bits
1996 14:13:47.855125 CBFS @ c08000 size 3f8000
1997 14:13:47.861363 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1998 14:13:47.864907 CBFS: Locating 'fallback/payload'
1999 14:13:47.867807 CBFS: Found @ offset 1c96c0 size 3f798
2000 14:13:47.874487 Checking segment from ROM address 0xffdd16f8
2001 14:13:47.878255 Checking segment from ROM address 0xffdd1714
2002 14:13:47.881331 Loading segment from ROM address 0xffdd16f8
2003 14:13:47.884857 code (compression=0)
2004 14:13:47.894500 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 14:13:47.901563 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 14:13:47.904489 it's not compressed!
2007 14:13:47.996035 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 14:13:48.002811 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 14:13:48.005869 Loading segment from ROM address 0xffdd1714
2010 14:13:48.009627 Entry Point 0x30000000
2011 14:13:48.012679 Loaded segments
2012 14:13:48.018065 Finalizing chipset.
2013 14:13:48.021680 Finalizing SMM.
2014 14:13:48.024657 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2015 14:13:48.028231 mp_park_aps done after 0 msecs.
2016 14:13:48.034538 Jumping to boot code at 30000000(99b62000)
2017 14:13:48.041518 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 14:13:48.041611
2019 14:13:48.041684
2020 14:13:48.041753
2021 14:13:48.044464 Starting depthcharge on Helios...
2022 14:13:48.044556
2023 14:13:48.044921 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 14:13:48.045035 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 14:13:48.045131 Setting prompt string to ['hatch:']
2026 14:13:48.045223 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 14:13:48.054560 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 14:13:48.054654
2029 14:13:48.061336 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 14:13:48.061428
2031 14:13:48.067415 board_setup: Info: eMMC controller not present; skipping
2032 14:13:48.067544
2033 14:13:48.070971 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 14:13:48.071080
2035 14:13:48.077390 board_setup: Info: SDHCI controller not present; skipping
2036 14:13:48.077482
2037 14:13:48.083954 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 14:13:48.084050
2039 14:13:48.084122 Wipe memory regions:
2040 14:13:48.084190
2041 14:13:48.087261 [0x00000000001000, 0x000000000a0000)
2042 14:13:48.087352
2043 14:13:48.090857 [0x00000000100000, 0x00000030000000)
2044 14:13:48.157041
2045 14:13:48.160843 [0x00000030657430, 0x00000099a2c000)
2046 14:13:48.307392
2047 14:13:48.310422 [0x00000100000000, 0x0000045e800000)
2048 14:13:49.766215
2049 14:13:49.766395 R8152: Initializing
2050 14:13:49.766470
2051 14:13:49.769105 Version 9 (ocp_data = 6010)
2052 14:13:49.773651
2053 14:13:49.773743 R8152: Done initializing
2054 14:13:49.773815
2055 14:13:49.776716 Adding net device
2056 14:13:50.259626
2057 14:13:50.259785 R8152: Initializing
2058 14:13:50.259859
2059 14:13:50.263211 Version 6 (ocp_data = 5c30)
2060 14:13:50.263353
2061 14:13:50.266298 R8152: Done initializing
2062 14:13:50.266388
2063 14:13:50.269467 net_add_device: Attemp to include the same device
2064 14:13:50.273067
2065 14:13:50.280319 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 14:13:50.280410
2067 14:13:50.280481
2068 14:13:50.280547
2069 14:13:50.280837 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 14:13:50.381222 hatch: tftpboot 192.168.201.1 10624855/tftp-deploy-z_tjl_k1/kernel/bzImage 10624855/tftp-deploy-z_tjl_k1/kernel/cmdline 10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
2072 14:13:50.381410 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 14:13:50.381505 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 14:13:50.385545 tftpboot 192.168.201.1 10624855/tftp-deploy-z_tjl_k1/kernel/bzIploy-z_tjl_k1/kernel/cmdline 10624855/tftp-deploy-z_tjl_k1/ramdisk/ramdisk.cpio.gz
2075 14:13:50.385644
2076 14:13:50.385718 Waiting for link
2077 14:13:50.586258
2078 14:13:50.586418 done.
2079 14:13:50.586492
2080 14:13:50.586560 MAC: 00:24:32:50:1a:59
2081 14:13:50.586626
2082 14:13:50.589884 Sending DHCP discover... done.
2083 14:13:50.589976
2084 14:13:50.593168 Waiting for reply... done.
2085 14:13:50.593260
2086 14:13:50.596188 Sending DHCP request... done.
2087 14:13:50.596280
2088 14:13:50.665594 Waiting for reply... done.
2089 14:13:50.665753
2090 14:13:50.665827 My ip is 192.168.201.14
2091 14:13:50.665895
2092 14:13:50.669322 The DHCP server ip is 192.168.201.1
2093 14:13:50.672357
2094 14:13:50.675399 TFTP server IP predefined by user: 192.168.201.1
2095 14:13:50.675561
2096 14:13:50.682417 Bootfile predefined by user: 10624855/tftp-deploy-z_tjl_k1/kernel/bzImage
2097 14:13:50.682511
2098 14:13:50.685421 Sending tftp read request... done.
2099 14:13:50.685514
2100 14:13:50.688899 Waiting for the transfer...
2101 14:13:50.688992
2102 14:13:51.337066 00000000 ################################################################
2103 14:13:51.337583
2104 14:13:52.010106 00080000 ################################################################
2105 14:13:52.010631
2106 14:13:52.636121 00100000 ################################################################
2107 14:13:52.636298
2108 14:13:53.189756 00180000 ################################################################
2109 14:13:53.189931
2110 14:13:53.769148 00200000 ################################################################
2111 14:13:53.769294
2112 14:13:54.307392 00280000 ################################################################
2113 14:13:54.307568
2114 14:13:54.850198 00300000 ################################################################
2115 14:13:54.850351
2116 14:13:55.399627 00380000 ################################################################
2117 14:13:55.399771
2118 14:13:55.936846 00400000 ################################################################
2119 14:13:55.936988
2120 14:13:56.474670 00480000 ################################################################
2121 14:13:56.474816
2122 14:13:57.008540 00500000 ################################################################
2123 14:13:57.008685
2124 14:13:57.541753 00580000 ################################################################
2125 14:13:57.541928
2126 14:13:58.081582 00600000 ################################################################
2127 14:13:58.081740
2128 14:13:58.620494 00680000 ################################################################
2129 14:13:58.620639
2130 14:13:59.171706 00700000 ################################################################
2131 14:13:59.171854
2132 14:13:59.194102 00780000 ### done.
2133 14:13:59.194199
2134 14:13:59.197263 The bootfile was 7884688 bytes long.
2135 14:13:59.197467
2136 14:13:59.200570 Sending tftp read request... done.
2137 14:13:59.200722
2138 14:13:59.204218 Waiting for the transfer...
2139 14:13:59.204326
2140 14:13:59.909505 00000000 ################################################################
2141 14:13:59.910023
2142 14:14:00.606816 00080000 ################################################################
2143 14:14:00.607310
2144 14:14:01.172300 00100000 ################################################################
2145 14:14:01.172452
2146 14:14:01.694245 00180000 ################################################################
2147 14:14:01.694418
2148 14:14:02.234279 00200000 ################################################################
2149 14:14:02.234422
2150 14:14:02.767869 00280000 ################################################################
2151 14:14:02.768018
2152 14:14:03.303710 00300000 ################################################################
2153 14:14:03.303852
2154 14:14:03.846639 00380000 ################################################################
2155 14:14:03.846799
2156 14:14:04.378163 00400000 ################################################################
2157 14:14:04.378338
2158 14:14:04.911846 00480000 ################################################################
2159 14:14:04.911991
2160 14:14:05.428970 00500000 ################################################################ done.
2161 14:14:05.429133
2162 14:14:05.432262 Sending tftp read request... done.
2163 14:14:05.432357
2164 14:14:05.435965 Waiting for the transfer...
2165 14:14:05.436084
2166 14:14:05.439038 00000000 # done.
2167 14:14:05.439138
2168 14:14:05.448950 Command line loaded dynamically from TFTP file: 10624855/tftp-deploy-z_tjl_k1/kernel/cmdline
2169 14:14:05.449050
2170 14:14:05.472160 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10624855/extract-nfsrootfs-tdpubo52,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2171 14:14:05.472268
2172 14:14:05.475832 ec_init(0): CrosEC protocol v3 supported (256, 256)
2173 14:14:05.480608
2174 14:14:05.484218 Shutting down all USB controllers.
2175 14:14:05.484315
2176 14:14:05.484411 Removing current net device
2177 14:14:05.488781
2178 14:14:05.488899 Finalizing coreboot
2179 14:14:05.489002
2180 14:14:05.494855 Exiting depthcharge with code 4 at timestamp: 24772726
2181 14:14:05.494965
2182 14:14:05.495040
2183 14:14:05.495108 Starting kernel ...
2184 14:14:05.495173
2185 14:14:05.495236
2186 14:14:05.495616 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2187 14:14:05.495734 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2188 14:14:05.495819 Setting prompt string to ['Linux version [0-9]']
2189 14:14:05.495895 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2190 14:14:05.495971 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2192 14:18:30.496594 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2194 14:18:30.497649 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2196 14:18:30.498473 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2199 14:18:30.499959 end: 2 depthcharge-action (duration 00:05:00) [common]
2201 14:18:30.501169 Cleaning after the job
2202 14:18:30.501681 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/ramdisk
2203 14:18:30.505402 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/kernel
2204 14:18:30.509932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/nfsrootfs
2205 14:18:30.606088 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10624855/tftp-deploy-z_tjl_k1/modules
2206 14:18:30.606578 start: 4.1 power-off (timeout 00:00:30) [common]
2207 14:18:30.606769 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2208 14:18:30.685104 >> Command sent successfully.
2209 14:18:30.690283 Returned 0 in 0 seconds
2210 14:18:30.791229 end: 4.1 power-off (duration 00:00:00) [common]
2212 14:18:30.792672 start: 4.2 read-feedback (timeout 00:10:00) [common]
2213 14:18:30.793808 Listened to connection for namespace 'common' for up to 1s
2215 14:18:30.795099 Listened to connection for namespace 'common' for up to 1s
2216 14:18:31.794521 Finalising connection for namespace 'common'
2217 14:18:31.795158 Disconnecting from shell: Finalise
2218 14:18:31.795566
2219 14:18:31.896584 end: 4.2 read-feedback (duration 00:00:01) [common]
2220 14:18:31.897142 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10624855
2221 14:18:32.427243 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10624855
2222 14:18:32.427457 JobError: Your job cannot terminate cleanly.