Boot log: acer-cb317-1h-c3z6-dedede
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:38:27.670027 lava-dispatcher, installed at version: 2023.08
2 17:38:27.670247 start: 0 validate
3 17:38:27.670378 Start time: 2023-10-20 17:38:27.670370+00:00 (UTC)
4 17:38:27.670518 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:38:27.670654 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:38:27.929652 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:38:27.929850 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:38:28.187247 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:38:28.187432 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:38:28.455066 validate duration: 0.78
12 17:38:28.455387 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:38:28.455567 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:38:28.455734 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:38:28.455897 Not decompressing ramdisk as can be used compressed.
16 17:38:28.456018 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:38:28.456122 saving as /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/ramdisk/rootfs.cpio.gz
18 17:38:28.456286 total size: 8418130 (8 MB)
19 17:38:28.457881 progress 0 % (0 MB)
20 17:38:28.460499 progress 5 % (0 MB)
21 17:38:28.462853 progress 10 % (0 MB)
22 17:38:28.465171 progress 15 % (1 MB)
23 17:38:28.467520 progress 20 % (1 MB)
24 17:38:28.469858 progress 25 % (2 MB)
25 17:38:28.472279 progress 30 % (2 MB)
26 17:38:28.474488 progress 35 % (2 MB)
27 17:38:28.476810 progress 40 % (3 MB)
28 17:38:28.479148 progress 45 % (3 MB)
29 17:38:28.481527 progress 50 % (4 MB)
30 17:38:28.483886 progress 55 % (4 MB)
31 17:38:28.486119 progress 60 % (4 MB)
32 17:38:28.488327 progress 65 % (5 MB)
33 17:38:28.490698 progress 70 % (5 MB)
34 17:38:28.493005 progress 75 % (6 MB)
35 17:38:28.495267 progress 80 % (6 MB)
36 17:38:28.497493 progress 85 % (6 MB)
37 17:38:28.499815 progress 90 % (7 MB)
38 17:38:28.502208 progress 95 % (7 MB)
39 17:38:28.504502 progress 100 % (8 MB)
40 17:38:28.504762 8 MB downloaded in 0.05 s (165.61 MB/s)
41 17:38:28.504965 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:38:28.505339 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:38:28.505459 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:38:28.505575 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:38:28.505767 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:38:28.505867 saving as /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/kernel/bzImage
48 17:38:28.505961 total size: 8507280 (8 MB)
49 17:38:28.506065 No compression specified
50 17:38:28.507479 progress 0 % (0 MB)
51 17:38:28.509704 progress 5 % (0 MB)
52 17:38:28.512023 progress 10 % (0 MB)
53 17:38:28.514439 progress 15 % (1 MB)
54 17:38:28.516874 progress 20 % (1 MB)
55 17:38:28.519308 progress 25 % (2 MB)
56 17:38:28.521610 progress 30 % (2 MB)
57 17:38:28.524025 progress 35 % (2 MB)
58 17:38:28.526478 progress 40 % (3 MB)
59 17:38:28.528890 progress 45 % (3 MB)
60 17:38:28.531386 progress 50 % (4 MB)
61 17:38:28.533748 progress 55 % (4 MB)
62 17:38:28.536238 progress 60 % (4 MB)
63 17:38:28.538599 progress 65 % (5 MB)
64 17:38:28.541005 progress 70 % (5 MB)
65 17:38:28.543436 progress 75 % (6 MB)
66 17:38:28.545846 progress 80 % (6 MB)
67 17:38:28.548293 progress 85 % (6 MB)
68 17:38:28.550688 progress 90 % (7 MB)
69 17:38:28.553069 progress 95 % (7 MB)
70 17:38:28.555408 progress 100 % (8 MB)
71 17:38:28.555616 8 MB downloaded in 0.05 s (163.40 MB/s)
72 17:38:28.555773 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:38:28.556106 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:38:28.556241 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:38:28.556413 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:38:28.556603 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:38:28.556704 saving as /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/modules/modules.tar
79 17:38:28.556812 total size: 253900 (0 MB)
80 17:38:28.556924 Using unxz to decompress xz
81 17:38:28.561788 progress 12 % (0 MB)
82 17:38:28.562222 progress 25 % (0 MB)
83 17:38:28.562576 progress 38 % (0 MB)
84 17:38:28.564110 progress 51 % (0 MB)
85 17:38:28.566446 progress 64 % (0 MB)
86 17:38:28.568811 progress 77 % (0 MB)
87 17:38:28.570927 progress 90 % (0 MB)
88 17:38:28.572736 progress 100 % (0 MB)
89 17:38:28.579116 0 MB downloaded in 0.02 s (10.86 MB/s)
90 17:38:28.579384 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:38:28.579678 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:38:28.579835 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:38:28.579942 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:38:28.580026 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:38:28.580117 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:38:28.580366 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m
98 17:38:28.580510 makedir: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin
99 17:38:28.580620 makedir: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/tests
100 17:38:28.580736 makedir: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/results
101 17:38:28.580898 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-add-keys
102 17:38:28.581047 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-add-sources
103 17:38:28.581179 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-background-process-start
104 17:38:28.581338 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-background-process-stop
105 17:38:28.581464 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-common-functions
106 17:38:28.581598 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-echo-ipv4
107 17:38:28.581766 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-install-packages
108 17:38:28.581901 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-installed-packages
109 17:38:28.582031 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-os-build
110 17:38:28.582197 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-probe-channel
111 17:38:28.582324 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-probe-ip
112 17:38:28.582495 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-target-ip
113 17:38:28.582648 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-target-mac
114 17:38:28.582857 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-target-storage
115 17:38:28.582994 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-case
116 17:38:28.583161 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-event
117 17:38:28.583289 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-feedback
118 17:38:28.583415 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-raise
119 17:38:28.583542 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-reference
120 17:38:28.583671 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-runner
121 17:38:28.583802 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-set
122 17:38:28.583929 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-test-shell
123 17:38:28.584056 Updating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-install-packages (oe)
124 17:38:28.584207 Updating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/bin/lava-installed-packages (oe)
125 17:38:28.584371 Creating /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/environment
126 17:38:28.584477 LAVA metadata
127 17:38:28.584554 - LAVA_JOB_ID=11831855
128 17:38:28.584621 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:38:28.584728 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:38:28.584796 skipped lava-vland-overlay
131 17:38:28.584874 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:38:28.584954 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:38:28.585016 skipped lava-multinode-overlay
134 17:38:28.585087 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:38:28.585167 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:38:28.585241 Loading test definitions
137 17:38:28.585330 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:38:28.585411 Using /lava-11831855 at stage 0
139 17:38:28.585736 uuid=11831855_1.4.2.3.1 testdef=None
140 17:38:28.585824 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:38:28.585944 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:38:28.586514 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:38:28.586736 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:38:28.587497 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:38:28.587747 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:38:28.588364 runner path: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/0/tests/0_dmesg test_uuid 11831855_1.4.2.3.1
149 17:38:28.588519 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:38:28.588746 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:38:28.588818 Using /lava-11831855 at stage 1
153 17:38:28.589133 uuid=11831855_1.4.2.3.5 testdef=None
154 17:38:28.589255 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:38:28.589342 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:38:28.589840 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:38:28.590052 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:38:28.590848 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:38:28.591078 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:38:28.591715 runner path: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/1/tests/1_bootrr test_uuid 11831855_1.4.2.3.5
163 17:38:28.591867 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:38:28.592072 Creating lava-test-runner.conf files
166 17:38:28.592134 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/0 for stage 0
167 17:38:28.592224 - 0_dmesg
168 17:38:28.592320 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831855/lava-overlay-nrcm289m/lava-11831855/1 for stage 1
169 17:38:28.592432 - 1_bootrr
170 17:38:28.592528 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:38:28.592613 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:38:28.602655 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:38:28.602848 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:38:28.602967 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:38:28.603147 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:38:28.603254 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:38:28.865353 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:38:28.865728 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:38:28.865847 extracting modules file /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831855/extract-overlay-ramdisk-odm2znaj/ramdisk
180 17:38:28.880418 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:38:28.880555 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:38:28.880644 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831855/compress-overlay-y180fbdo/overlay-1.4.2.4.tar.gz to ramdisk
183 17:38:28.880716 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831855/compress-overlay-y180fbdo/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831855/extract-overlay-ramdisk-odm2znaj/ramdisk
184 17:38:28.890179 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:38:28.890298 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:38:28.890392 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:38:28.890482 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:38:28.890565 Building ramdisk /var/lib/lava/dispatcher/tmp/11831855/extract-overlay-ramdisk-odm2znaj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831855/extract-overlay-ramdisk-odm2znaj/ramdisk
189 17:38:29.022854 >> 49827 blocks
190 17:38:29.870202 rename /var/lib/lava/dispatcher/tmp/11831855/extract-overlay-ramdisk-odm2znaj/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
191 17:38:29.870679 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:38:29.870834 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:38:29.870936 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:38:29.871031 No mkimage arch provided, not using FIT.
195 17:38:29.871117 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:38:29.871200 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:38:29.871305 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:38:29.871393 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:38:29.871502 No LXC device requested
200 17:38:29.871582 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:38:29.871667 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:38:29.871747 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:38:29.871824 Checking files for TFTP limit of 4294967296 bytes.
204 17:38:29.872262 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:38:29.872366 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:38:29.872455 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:38:29.872577 substitutions:
208 17:38:29.872642 - {DTB}: None
209 17:38:29.872704 - {INITRD}: 11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
210 17:38:29.872764 - {KERNEL}: 11831855/tftp-deploy-qlu5j2mi/kernel/bzImage
211 17:38:29.872821 - {LAVA_MAC}: None
212 17:38:29.872876 - {PRESEED_CONFIG}: None
213 17:38:29.872930 - {PRESEED_LOCAL}: None
214 17:38:29.872984 - {RAMDISK}: 11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
215 17:38:29.873038 - {ROOT_PART}: None
216 17:38:29.873092 - {ROOT}: None
217 17:38:29.873146 - {SERVER_IP}: 192.168.201.1
218 17:38:29.873199 - {TEE}: None
219 17:38:29.873252 Parsed boot commands:
220 17:38:29.873305 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:38:29.873482 Parsed boot commands: tftpboot 192.168.201.1 11831855/tftp-deploy-qlu5j2mi/kernel/bzImage 11831855/tftp-deploy-qlu5j2mi/kernel/cmdline 11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
222 17:38:29.873569 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:38:29.873656 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:38:29.873747 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:38:29.873832 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:38:29.873901 Not connected, no need to disconnect.
227 17:38:29.873979 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:38:29.874299 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:38:29.874402 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cb317-1h-c3z6-dedede-cbg-7'
230 17:38:29.878530 Setting prompt string to ['lava-test: # ']
231 17:38:29.878931 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:38:29.879041 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:38:29.879145 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:38:29.879239 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:38:29.879481 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=reboot'
236 17:38:35.016606 >> Command sent successfully.
237 17:38:35.019493 Returned 0 in 5 seconds
238 17:38:35.119860 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:38:35.120188 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:38:35.120299 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:38:35.120415 Setting prompt string to 'Starting depthcharge on Magolor...'
243 17:38:35.120514 Changing prompt to 'Starting depthcharge on Magolor...'
244 17:38:35.120610 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
245 17:38:35.120988 [Enter `^Ec?' for help]
246 17:38:36.263267
247 17:38:36.263417
248 17:38:36.273129 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
249 17:38:36.276968 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
250 17:38:36.280159 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
251 17:38:36.286512 CPU: AES supported, TXT NOT supported, VT supported
252 17:38:36.289698 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
253 17:38:36.296296 PCH: device id 4d87 (rev 01) is Jasperlake Super
254 17:38:36.300755 IGD: device id 4e55 (rev 01) is Jasperlake GT4
255 17:38:36.304555 VBOOT: Loading verstage.
256 17:38:36.308745 FMAP: Found "FLASH" version 1.1 at 0xc04000.
257 17:38:36.315602 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
258 17:38:36.319372 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
259 17:38:36.325621 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
260 17:38:36.325736
261 17:38:36.325834
262 17:38:36.336133 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
263 17:38:36.351512 Probing TPM: . done!
264 17:38:36.354676 TPM ready after 0 ms
265 17:38:36.358052 Connected to device vid:did:rid of 1ae0:0028:00
266 17:38:36.369937 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
267 17:38:36.376268 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
268 17:38:36.426177 Initialized TPM device CR50 revision 0
269 17:38:36.435645 tlcl_send_startup: Startup return code is 0
270 17:38:36.435773 TPM: setup succeeded
271 17:38:36.449912 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
272 17:38:36.464640 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
273 17:38:36.476432 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
274 17:38:36.486360 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
275 17:38:36.489728 Chrome EC: UHEPI supported
276 17:38:36.493085 Phase 1
277 17:38:36.496324 FMAP: area GBB found @ c05000 (12288 bytes)
278 17:38:36.503269 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
279 17:38:36.509896 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
280 17:38:36.513003 Recovery requested (1009000e)
281 17:38:36.523770 TPM: Extending digest for VBOOT: boot mode into PCR 0
282 17:38:36.530929 tlcl_extend: response is 0
283 17:38:36.543857 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
284 17:38:36.550034 tlcl_extend: response is 0
285 17:38:36.556706 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
286 17:38:36.559993 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
287 17:38:36.566233 BS: verstage times (exec / console): total (unknown) / 124 ms
288 17:38:36.566325
289 17:38:36.566393
290 17:38:36.580771 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
291 17:38:36.584242 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
292 17:38:36.590884 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
293 17:38:36.594202 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
294 17:38:36.597557 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
295 17:38:36.604187 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
296 17:38:36.607649 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
297 17:38:36.607764 TCO_STS: 0000 0001
298 17:38:36.610700 GEN_PMCON: d0015038 00002200
299 17:38:36.614001 GBLRST_CAUSE: 00000000 00000000
300 17:38:36.617884 prev_sleep_state 5
301 17:38:36.620977 Boot Count incremented to 1539
302 17:38:36.627302 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
303 17:38:36.630606 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
304 17:38:36.634449 Chrome EC: UHEPI supported
305 17:38:36.640538 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
306 17:38:36.647232 Probing TPM: done!
307 17:38:36.653641 Connected to device vid:did:rid of 1ae0:0028:00
308 17:38:36.663712 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
309 17:38:36.670878 Initialized TPM device CR50 revision 0
310 17:38:36.681768 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
311 17:38:36.686483 MRC: Hash idx 0x100b comparison successful.
312 17:38:36.689722 MRC cache found, size 5458
313 17:38:36.693002 bootmode is set to: 2
314 17:38:36.693120 SPD INDEX = 0
315 17:38:36.700429 CBFS: Found 'spd.bin' @0x40c40 size 0x600
316 17:38:36.700583 SPD: module type is LPDDR4X
317 17:38:36.706995 SPD: module part number is MT53E512M32D2NP-046 WT:E
318 17:38:36.713454 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
319 17:38:36.717245 SPD: device width 16 bits, bus width 32 bits
320 17:38:36.720599 SPD: module size is 4096 MB (per channel)
321 17:38:36.726900 meminit_channels: DRAM half-populated
322 17:38:36.807694 CBMEM:
323 17:38:36.810910 IMD: root @ 0x76fff000 254 entries.
324 17:38:36.814176 IMD: root @ 0x76ffec00 62 entries.
325 17:38:36.817308 FMAP: area RO_VPD found @ c00000 (16384 bytes)
326 17:38:36.823847 WARNING: RO_VPD is uninitialized or empty.
327 17:38:36.827118 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
328 17:38:36.830873 External stage cache:
329 17:38:36.834498 IMD: root @ 0x7b3ff000 254 entries.
330 17:38:36.837494 IMD: root @ 0x7b3fec00 62 entries.
331 17:38:36.847674 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
332 17:38:36.854161 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
333 17:38:36.860528 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
334 17:38:36.869127 MRC: 'RECOVERY_MRC_CACHE' does not need update.
335 17:38:36.875953 cse_lite: Skip switching to RW in the recovery path
336 17:38:36.876099 1 DIMMs found
337 17:38:36.876176 SMM Memory Map
338 17:38:36.879114 SMRAM : 0x7b000000 0x800000
339 17:38:36.885933 Subregion 0: 0x7b000000 0x200000
340 17:38:36.889167 Subregion 1: 0x7b200000 0x200000
341 17:38:36.892075 Subregion 2: 0x7b400000 0x400000
342 17:38:36.892155 top_of_ram = 0x77000000
343 17:38:36.899184 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
344 17:38:36.905726 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
345 17:38:36.908872 MTRR Range: Start=ff000000 End=0 (Size 1000000)
346 17:38:36.915460 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
347 17:38:36.918667 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
348 17:38:36.931288 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
349 17:38:36.937928 Processing 188 relocs. Offset value of 0x74c0e000
350 17:38:36.944677 BS: romstage times (exec / console): total (unknown) / 255 ms
351 17:38:36.949229
352 17:38:36.949312
353 17:38:36.959147 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
354 17:38:36.962296 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
355 17:38:36.968994 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
356 17:38:36.975639 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
357 17:38:37.031754 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
358 17:38:37.038289 Processing 4805 relocs. Offset value of 0x75da8000
359 17:38:37.041612 BS: postcar times (exec / console): total (unknown) / 42 ms
360 17:38:37.044949
361 17:38:37.045064
362 17:38:37.054670 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
363 17:38:37.054795 Normal boot
364 17:38:37.058657 EC returned error result code 3
365 17:38:37.062068 FW_CONFIG value is 0x204
366 17:38:37.065569 GENERIC: 0.0 disabled by fw_config
367 17:38:37.071690 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
368 17:38:37.075485 I2C: 00:10 disabled by fw_config
369 17:38:37.078892 I2C: 00:10 disabled by fw_config
370 17:38:37.082052 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
371 17:38:37.088643 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
372 17:38:37.091701 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
373 17:38:37.098303 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 17:38:37.101487 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
375 17:38:37.105373 I2C: 00:10 disabled by fw_config
376 17:38:37.111675 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
377 17:38:37.118233 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
378 17:38:37.121517 I2C: 00:1a disabled by fw_config
379 17:38:37.124827 I2C: 00:1a disabled by fw_config
380 17:38:37.132017 fw_config match found: AUDIO_AMP=UNPROVISIONED
381 17:38:37.135119 fw_config match found: AUDIO_AMP=UNPROVISIONED
382 17:38:37.138482 GENERIC: 0.0 disabled by fw_config
383 17:38:37.145071 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 17:38:37.148431 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
385 17:38:37.154923 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
386 17:38:37.158288 microcode: Update skipped, already up-to-date
387 17:38:37.164549 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
388 17:38:37.190537 Detected 2 core, 2 thread CPU.
389 17:38:37.193819 Setting up SMI for CPU
390 17:38:37.197083 IED base = 0x7b400000
391 17:38:37.197190 IED size = 0x00400000
392 17:38:37.200193 Will perform SMM setup.
393 17:38:37.203945 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
394 17:38:37.213740 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
395 17:38:37.217010 Processing 16 relocs. Offset value of 0x00030000
396 17:38:37.220510 Attempting to start 1 APs
397 17:38:37.224312 Waiting for 10ms after sending INIT.
398 17:38:37.240600 Waiting for 1st SIPI to complete...done.
399 17:38:37.243890 Waiting for 2nd SIPI to complete...done.
400 17:38:37.246597 AP: slot 1 apic_id 2.
401 17:38:37.253721 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
402 17:38:37.260438 Processing 13 relocs. Offset value of 0x00038000
403 17:38:37.260526 Unable to locate Global NVS
404 17:38:37.270294 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
405 17:38:37.273446 Installing permanent SMM handler to 0x7b000000
406 17:38:37.283396 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
407 17:38:37.286357 Processing 704 relocs. Offset value of 0x7b010000
408 17:38:37.296447 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
409 17:38:37.299779 Processing 13 relocs. Offset value of 0x7b008000
410 17:38:37.306802 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
411 17:38:37.310042 Unable to locate Global NVS
412 17:38:37.316724 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
413 17:38:37.319920 Clearing SMI status registers
414 17:38:37.320045 SMI_STS: PM1
415 17:38:37.323128 PM1_STS: PWRBTN
416 17:38:37.323243 TCO_STS: INTRD_DET
417 17:38:37.333258 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
418 17:38:37.333376 In relocation handler: CPU 0
419 17:38:37.340031 New SMBASE=0x7b000000 IEDBASE=0x7b400000
420 17:38:37.343062 Writing SMRR. base = 0x7b000006, mask=0xff800800
421 17:38:37.346280 Relocation complete.
422 17:38:37.353496 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
423 17:38:37.356806 In relocation handler: CPU 1
424 17:38:37.360173 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
425 17:38:37.367466 Writing SMRR. base = 0x7b000006, mask=0xff800800
426 17:38:37.367582 Relocation complete.
427 17:38:37.371245 Initializing CPU #0
428 17:38:37.371360 CPU: vendor Intel device 906c0
429 17:38:37.377977 CPU: family 06, model 9c, stepping 00
430 17:38:37.378091 Clearing out pending MCEs
431 17:38:37.380861 Setting up local APIC...
432 17:38:37.384499 apic_id: 0x00 done.
433 17:38:37.387646 Turbo is available but hidden
434 17:38:37.390826 Turbo is available and visible
435 17:38:37.393975 microcode: Update skipped, already up-to-date
436 17:38:37.397854 CPU #0 initialized
437 17:38:37.397950 Initializing CPU #1
438 17:38:37.400902 CPU: vendor Intel device 906c0
439 17:38:37.404181 CPU: family 06, model 9c, stepping 00
440 17:38:37.407509 Clearing out pending MCEs
441 17:38:37.410756 Setting up local APIC...
442 17:38:37.414065 apic_id: 0x02 done.
443 17:38:37.417880 microcode: Update skipped, already up-to-date
444 17:38:37.420920 CPU #1 initialized
445 17:38:37.424145 bsp_do_flight_plan done after 176 msecs.
446 17:38:37.427793 CPU: frequency set to 2800 MHz
447 17:38:37.427910 Enabling SMIs.
448 17:38:37.434313 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 287 ms
449 17:38:37.444565 Probing TPM: done!
450 17:38:37.451507 Connected to device vid:did:rid of 1ae0:0028:00
451 17:38:37.461343 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
452 17:38:37.464777 Initialized TPM device CR50 revision 0
453 17:38:37.468072 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
454 17:38:37.475165 Found a VBT of 7680 bytes after decompression
455 17:38:37.481844 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
456 17:38:37.516589 Detected 2 core, 2 thread CPU.
457 17:38:37.519869 Detected 2 core, 2 thread CPU.
458 17:38:37.883312 Display FSP Version Info HOB
459 17:38:37.886536 Reference Code - CPU = 8.7.22.30
460 17:38:37.889842 uCode Version = 24.0.0.1f
461 17:38:37.893299 TXT ACM version = ff.ff.ff.ffff
462 17:38:37.896455 Reference Code - ME = 8.7.22.30
463 17:38:37.899654 MEBx version = 0.0.0.0
464 17:38:37.902906 ME Firmware Version = Consumer SKU
465 17:38:37.906850 Reference Code - PCH = 8.7.22.30
466 17:38:37.909896 PCH-CRID Status = Disabled
467 17:38:37.912939 PCH-CRID Original Value = ff.ff.ff.ffff
468 17:38:37.916284 PCH-CRID New Value = ff.ff.ff.ffff
469 17:38:37.920276 OPROM - RST - RAID = ff.ff.ff.ffff
470 17:38:37.923296 PCH Hsio Version = 4.0.0.0
471 17:38:37.926441 Reference Code - SA - System Agent = 8.7.22.30
472 17:38:37.929957 Reference Code - MRC = 0.0.4.68
473 17:38:37.933190 SA - PCIe Version = 8.7.22.30
474 17:38:37.936441 SA-CRID Status = Disabled
475 17:38:37.939777 SA-CRID Original Value = 0.0.0.0
476 17:38:37.942992 SA-CRID New Value = 0.0.0.0
477 17:38:37.946668 OPROM - VBIOS = ff.ff.ff.ffff
478 17:38:37.950715 IO Manageability Engine FW Version = ff.ff.ff.ffff
479 17:38:37.954415 PHY Build Version = ff.ff.ff.ffff
480 17:38:37.958216 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
481 17:38:37.965129 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
482 17:38:37.969075 ITSS IRQ Polarities Before:
483 17:38:37.969200 IPC0: 0xffffffff
484 17:38:37.969272 IPC1: 0xffffffff
485 17:38:37.972526 IPC2: 0xffffffff
486 17:38:37.975762 IPC3: 0xffffffff
487 17:38:37.975863 ITSS IRQ Polarities After:
488 17:38:37.978889 IPC0: 0xffffffff
489 17:38:37.978978 IPC1: 0xffffffff
490 17:38:37.982027 IPC2: 0xffffffff
491 17:38:37.982184 IPC3: 0xffffffff
492 17:38:37.995631 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
493 17:38:38.002104 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
494 17:38:38.005436 Enumerating buses...
495 17:38:38.008681 Show all devs... Before device enumeration.
496 17:38:38.011866 Root Device: enabled 1
497 17:38:38.011976 CPU_CLUSTER: 0: enabled 1
498 17:38:38.015592 DOMAIN: 0000: enabled 1
499 17:38:38.018917 PCI: 00:00.0: enabled 1
500 17:38:38.022109 PCI: 00:02.0: enabled 1
501 17:38:38.022206 PCI: 00:04.0: enabled 1
502 17:38:38.025498 PCI: 00:05.0: enabled 1
503 17:38:38.028985 PCI: 00:09.0: enabled 0
504 17:38:38.031972 PCI: 00:12.6: enabled 0
505 17:38:38.032064 PCI: 00:14.0: enabled 1
506 17:38:38.035465 PCI: 00:14.1: enabled 0
507 17:38:38.038438 PCI: 00:14.2: enabled 0
508 17:38:38.041696 PCI: 00:14.3: enabled 1
509 17:38:38.041788 PCI: 00:14.5: enabled 1
510 17:38:38.044994 PCI: 00:15.0: enabled 1
511 17:38:38.048255 PCI: 00:15.1: enabled 1
512 17:38:38.048340 PCI: 00:15.2: enabled 1
513 17:38:38.051503 PCI: 00:15.3: enabled 1
514 17:38:38.054938 PCI: 00:16.0: enabled 1
515 17:38:38.058637 PCI: 00:16.1: enabled 0
516 17:38:38.058783 PCI: 00:16.4: enabled 0
517 17:38:38.061617 PCI: 00:16.5: enabled 0
518 17:38:38.064834 PCI: 00:17.0: enabled 0
519 17:38:38.068614 PCI: 00:19.0: enabled 1
520 17:38:38.068703 PCI: 00:19.1: enabled 0
521 17:38:38.071708 PCI: 00:19.2: enabled 1
522 17:38:38.074736 PCI: 00:1a.0: enabled 1
523 17:38:38.078713 PCI: 00:1c.0: enabled 0
524 17:38:38.078843 PCI: 00:1c.1: enabled 0
525 17:38:38.081395 PCI: 00:1c.2: enabled 0
526 17:38:38.085224 PCI: 00:1c.3: enabled 0
527 17:38:38.088360 PCI: 00:1c.4: enabled 0
528 17:38:38.088447 PCI: 00:1c.5: enabled 0
529 17:38:38.091298 PCI: 00:1c.6: enabled 0
530 17:38:38.095009 PCI: 00:1c.7: enabled 1
531 17:38:38.095100 PCI: 00:1e.0: enabled 0
532 17:38:38.098126 PCI: 00:1e.1: enabled 0
533 17:38:38.101336 PCI: 00:1e.2: enabled 1
534 17:38:38.105324 PCI: 00:1e.3: enabled 0
535 17:38:38.105417 PCI: 00:1f.0: enabled 1
536 17:38:38.108618 PCI: 00:1f.1: enabled 1
537 17:38:38.111960 PCI: 00:1f.2: enabled 1
538 17:38:38.115324 PCI: 00:1f.3: enabled 1
539 17:38:38.115417 PCI: 00:1f.4: enabled 0
540 17:38:38.118394 PCI: 00:1f.5: enabled 1
541 17:38:38.121631 PCI: 00:1f.7: enabled 0
542 17:38:38.121721 GENERIC: 0.0: enabled 1
543 17:38:38.124831 GENERIC: 0.0: enabled 1
544 17:38:38.128158 USB0 port 0: enabled 1
545 17:38:38.131574 GENERIC: 0.0: enabled 1
546 17:38:38.131682 I2C: 00:2c: enabled 1
547 17:38:38.134631 I2C: 00:15: enabled 1
548 17:38:38.138616 GENERIC: 0.0: enabled 0
549 17:38:38.138732 I2C: 00:15: enabled 1
550 17:38:38.141618 I2C: 00:10: enabled 0
551 17:38:38.144822 I2C: 00:10: enabled 0
552 17:38:38.144942 I2C: 00:2c: enabled 1
553 17:38:38.147912 I2C: 00:40: enabled 1
554 17:38:38.151895 I2C: 00:10: enabled 1
555 17:38:38.151987 I2C: 00:39: enabled 1
556 17:38:38.155161 I2C: 00:36: enabled 1
557 17:38:38.158511 I2C: 00:10: enabled 0
558 17:38:38.158615 I2C: 00:0c: enabled 1
559 17:38:38.161790 I2C: 00:50: enabled 1
560 17:38:38.165063 I2C: 00:1a: enabled 1
561 17:38:38.165149 I2C: 00:1a: enabled 0
562 17:38:38.168175 I2C: 00:1a: enabled 0
563 17:38:38.171351 I2C: 00:28: enabled 1
564 17:38:38.171438 I2C: 00:29: enabled 1
565 17:38:38.174618 PCI: 00:00.0: enabled 1
566 17:38:38.177810 SPI: 00: enabled 1
567 17:38:38.181384 PNP: 0c09.0: enabled 1
568 17:38:38.181472 GENERIC: 0.0: enabled 0
569 17:38:38.184597 USB2 port 0: enabled 1
570 17:38:38.187818 USB2 port 1: enabled 1
571 17:38:38.187908 USB2 port 2: enabled 1
572 17:38:38.191245 USB2 port 3: enabled 1
573 17:38:38.194639 USB2 port 4: enabled 0
574 17:38:38.195121 USB2 port 5: enabled 1
575 17:38:38.198533 USB2 port 6: enabled 0
576 17:38:38.201564 USB2 port 7: enabled 1
577 17:38:38.205216 USB3 port 0: enabled 1
578 17:38:38.205665 USB3 port 1: enabled 1
579 17:38:38.208455 USB3 port 2: enabled 1
580 17:38:38.211854 USB3 port 3: enabled 1
581 17:38:38.212299 APIC: 00: enabled 1
582 17:38:38.215033 APIC: 02: enabled 1
583 17:38:38.218367 Compare with tree...
584 17:38:38.218870 Root Device: enabled 1
585 17:38:38.221620 CPU_CLUSTER: 0: enabled 1
586 17:38:38.224711 APIC: 00: enabled 1
587 17:38:38.225254 APIC: 02: enabled 1
588 17:38:38.228123 DOMAIN: 0000: enabled 1
589 17:38:38.231257 PCI: 00:00.0: enabled 1
590 17:38:38.235181 PCI: 00:02.0: enabled 1
591 17:38:38.238415 PCI: 00:04.0: enabled 1
592 17:38:38.238893 GENERIC: 0.0: enabled 1
593 17:38:38.241695 PCI: 00:05.0: enabled 1
594 17:38:38.244966 GENERIC: 0.0: enabled 1
595 17:38:38.248228 PCI: 00:09.0: enabled 0
596 17:38:38.251275 PCI: 00:12.6: enabled 0
597 17:38:38.251711 PCI: 00:14.0: enabled 1
598 17:38:38.254564 USB0 port 0: enabled 1
599 17:38:38.258018 USB2 port 0: enabled 1
600 17:38:38.261142 USB2 port 1: enabled 1
601 17:38:38.264555 USB2 port 2: enabled 1
602 17:38:38.264790 USB2 port 3: enabled 1
603 17:38:38.267940 USB2 port 4: enabled 0
604 17:38:38.271083 USB2 port 5: enabled 1
605 17:38:38.274840 USB2 port 6: enabled 0
606 17:38:38.277942 USB2 port 7: enabled 1
607 17:38:38.281147 USB3 port 0: enabled 1
608 17:38:38.281381 USB3 port 1: enabled 1
609 17:38:38.284278 USB3 port 2: enabled 1
610 17:38:38.287667 USB3 port 3: enabled 1
611 17:38:38.291227 PCI: 00:14.1: enabled 0
612 17:38:38.294266 PCI: 00:14.2: enabled 0
613 17:38:38.294445 PCI: 00:14.3: enabled 1
614 17:38:38.297469 GENERIC: 0.0: enabled 1
615 17:38:38.300813 PCI: 00:14.5: enabled 1
616 17:38:38.304019 PCI: 00:15.0: enabled 1
617 17:38:38.307836 I2C: 00:2c: enabled 1
618 17:38:38.307952 I2C: 00:15: enabled 1
619 17:38:38.311060 PCI: 00:15.1: enabled 1
620 17:38:38.313964 PCI: 00:15.2: enabled 1
621 17:38:38.317865 GENERIC: 0.0: enabled 0
622 17:38:38.321172 I2C: 00:15: enabled 1
623 17:38:38.321259 I2C: 00:10: enabled 0
624 17:38:38.324365 I2C: 00:10: enabled 0
625 17:38:38.327692 I2C: 00:2c: enabled 1
626 17:38:38.330864 I2C: 00:40: enabled 1
627 17:38:38.330951 I2C: 00:10: enabled 1
628 17:38:38.334216 I2C: 00:39: enabled 1
629 17:38:38.337471 PCI: 00:15.3: enabled 1
630 17:38:38.340877 I2C: 00:36: enabled 1
631 17:38:38.340964 I2C: 00:10: enabled 0
632 17:38:38.344199 I2C: 00:0c: enabled 1
633 17:38:38.347538 I2C: 00:50: enabled 1
634 17:38:38.350619 PCI: 00:16.0: enabled 1
635 17:38:38.353985 PCI: 00:16.1: enabled 0
636 17:38:38.354078 PCI: 00:16.4: enabled 0
637 17:38:38.357203 PCI: 00:16.5: enabled 0
638 17:38:38.361025 PCI: 00:17.0: enabled 0
639 17:38:38.363794 PCI: 00:19.0: enabled 1
640 17:38:38.363881 I2C: 00:1a: enabled 1
641 17:38:38.367463 I2C: 00:1a: enabled 0
642 17:38:38.370810 I2C: 00:1a: enabled 0
643 17:38:38.374109 I2C: 00:28: enabled 1
644 17:38:38.374196 I2C: 00:29: enabled 1
645 17:38:38.377605 PCI: 00:19.1: enabled 0
646 17:38:38.380858 PCI: 00:19.2: enabled 1
647 17:38:38.383935 PCI: 00:1a.0: enabled 1
648 17:38:38.387143 PCI: 00:1e.0: enabled 0
649 17:38:38.387242 PCI: 00:1e.1: enabled 0
650 17:38:38.390841 PCI: 00:1e.2: enabled 1
651 17:38:38.393690 SPI: 00: enabled 1
652 17:38:38.397461 PCI: 00:1e.3: enabled 0
653 17:38:38.400570 PCI: 00:1f.0: enabled 1
654 17:38:38.400681 PNP: 0c09.0: enabled 1
655 17:38:38.403534 PCI: 00:1f.1: enabled 1
656 17:38:38.406786 PCI: 00:1f.2: enabled 1
657 17:38:38.410575 PCI: 00:1f.3: enabled 1
658 17:38:38.413776 GENERIC: 0.0: enabled 0
659 17:38:38.413890 PCI: 00:1f.4: enabled 0
660 17:38:38.416981 PCI: 00:1f.5: enabled 1
661 17:38:38.420060 PCI: 00:1f.7: enabled 0
662 17:38:38.423704 Root Device scanning...
663 17:38:38.426881 scan_static_bus for Root Device
664 17:38:38.426963 CPU_CLUSTER: 0 enabled
665 17:38:38.430246 DOMAIN: 0000 enabled
666 17:38:38.433494 DOMAIN: 0000 scanning...
667 17:38:38.436654 PCI: pci_scan_bus for bus 00
668 17:38:38.440551 PCI: 00:00.0 [8086/0000] ops
669 17:38:38.443761 PCI: 00:00.0 [8086/4e22] enabled
670 17:38:38.447025 PCI: 00:02.0 [8086/0000] bus ops
671 17:38:38.450304 PCI: 00:02.0 [8086/4e55] enabled
672 17:38:38.453683 PCI: 00:04.0 [8086/0000] bus ops
673 17:38:38.456882 PCI: 00:04.0 [8086/4e03] enabled
674 17:38:38.460172 PCI: 00:05.0 [8086/0000] bus ops
675 17:38:38.463551 PCI: 00:05.0 [8086/4e19] enabled
676 17:38:38.467015 PCI: 00:08.0 [8086/4e11] enabled
677 17:38:38.469956 PCI: 00:14.0 [8086/0000] bus ops
678 17:38:38.473597 PCI: 00:14.0 [8086/4ded] enabled
679 17:38:38.476651 PCI: 00:14.2 [8086/4def] disabled
680 17:38:38.479986 PCI: 00:14.3 [8086/0000] bus ops
681 17:38:38.483268 PCI: 00:14.3 [8086/4df0] enabled
682 17:38:38.486666 PCI: 00:14.5 [8086/0000] ops
683 17:38:38.490414 PCI: 00:14.5 [8086/4df8] enabled
684 17:38:38.493449 PCI: 00:15.0 [8086/0000] bus ops
685 17:38:38.496706 PCI: 00:15.0 [8086/4de8] enabled
686 17:38:38.499864 PCI: 00:15.1 [8086/0000] bus ops
687 17:38:38.503226 PCI: 00:15.1 [8086/4de9] enabled
688 17:38:38.506436 PCI: 00:15.2 [8086/0000] bus ops
689 17:38:38.510165 PCI: 00:15.2 [8086/4dea] enabled
690 17:38:38.513237 PCI: 00:15.3 [8086/0000] bus ops
691 17:38:38.516992 PCI: 00:15.3 [8086/4deb] enabled
692 17:38:38.517086 PCI: 00:16.0 [8086/0000] ops
693 17:38:38.520042 PCI: 00:16.0 [8086/4de0] enabled
694 17:38:38.523235 PCI: 00:19.0 [8086/0000] bus ops
695 17:38:38.526476 PCI: 00:19.0 [8086/4dc5] enabled
696 17:38:38.529915 PCI: 00:19.2 [8086/0000] ops
697 17:38:38.532907 PCI: 00:19.2 [8086/4dc7] enabled
698 17:38:38.536207 PCI: 00:1a.0 [8086/0000] ops
699 17:38:38.539456 PCI: 00:1a.0 [8086/4dc4] enabled
700 17:38:38.543350 PCI: 00:1e.0 [8086/0000] ops
701 17:38:38.546564 PCI: 00:1e.0 [8086/4da8] disabled
702 17:38:38.549892 PCI: 00:1e.2 [8086/0000] bus ops
703 17:38:38.553151 PCI: 00:1e.2 [8086/4daa] enabled
704 17:38:38.556495 PCI: 00:1f.0 [8086/0000] bus ops
705 17:38:38.559695 PCI: 00:1f.0 [8086/4d87] enabled
706 17:38:38.566430 PCI: Static device PCI: 00:1f.1 not found, disabling it.
707 17:38:38.566597 RTC Init
708 17:38:38.569656 Set power on after power failure.
709 17:38:38.573008 Disabling Deep S3
710 17:38:38.573174 Disabling Deep S3
711 17:38:38.576279 Disabling Deep S4
712 17:38:38.576418 Disabling Deep S4
713 17:38:38.579475 Disabling Deep S5
714 17:38:38.583027 Disabling Deep S5
715 17:38:38.585985 PCI: 00:1f.2 [0000/0000] hidden
716 17:38:38.589436 PCI: 00:1f.3 [8086/0000] bus ops
717 17:38:38.592639 PCI: 00:1f.3 [8086/4dc8] enabled
718 17:38:38.595771 PCI: 00:1f.5 [8086/0000] bus ops
719 17:38:38.599663 PCI: 00:1f.5 [8086/4da4] enabled
720 17:38:38.602986 PCI: Leftover static devices:
721 17:38:38.603086 PCI: 00:12.6
722 17:38:38.603186 PCI: 00:09.0
723 17:38:38.606067 PCI: 00:14.1
724 17:38:38.606156 PCI: 00:16.1
725 17:38:38.609399 PCI: 00:16.4
726 17:38:38.609487 PCI: 00:16.5
727 17:38:38.609556 PCI: 00:17.0
728 17:38:38.612756 PCI: 00:19.1
729 17:38:38.612844 PCI: 00:1e.1
730 17:38:38.616000 PCI: 00:1e.3
731 17:38:38.616093 PCI: 00:1f.1
732 17:38:38.616182 PCI: 00:1f.4
733 17:38:38.619848 PCI: 00:1f.7
734 17:38:38.622716 PCI: Check your devicetree.cb.
735 17:38:38.626015 PCI: 00:02.0 scanning...
736 17:38:38.629119 scan_generic_bus for PCI: 00:02.0
737 17:38:38.633161 scan_generic_bus for PCI: 00:02.0 done
738 17:38:38.636868 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
739 17:38:38.639861 PCI: 00:04.0 scanning...
740 17:38:38.643703 scan_generic_bus for PCI: 00:04.0
741 17:38:38.643839 GENERIC: 0.0 enabled
742 17:38:38.650071 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
743 17:38:38.656740 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
744 17:38:38.656827 PCI: 00:05.0 scanning...
745 17:38:38.663213 scan_generic_bus for PCI: 00:05.0
746 17:38:38.663299 GENERIC: 0.0 enabled
747 17:38:38.670437 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
748 17:38:38.673716 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
749 17:38:38.676941 PCI: 00:14.0 scanning...
750 17:38:38.680264 scan_static_bus for PCI: 00:14.0
751 17:38:38.683610 USB0 port 0 enabled
752 17:38:38.686787 USB0 port 0 scanning...
753 17:38:38.689915 scan_static_bus for USB0 port 0
754 17:38:38.689999 USB2 port 0 enabled
755 17:38:38.693509 USB2 port 1 enabled
756 17:38:38.693593 USB2 port 2 enabled
757 17:38:38.696640 USB2 port 3 enabled
758 17:38:38.699935 USB2 port 4 disabled
759 17:38:38.700023 USB2 port 5 enabled
760 17:38:38.703240 USB2 port 6 disabled
761 17:38:38.706570 USB2 port 7 enabled
762 17:38:38.706682 USB3 port 0 enabled
763 17:38:38.709645 USB3 port 1 enabled
764 17:38:38.709731 USB3 port 2 enabled
765 17:38:38.713419 USB3 port 3 enabled
766 17:38:38.716719 USB2 port 0 scanning...
767 17:38:38.719974 scan_static_bus for USB2 port 0
768 17:38:38.723084 scan_static_bus for USB2 port 0 done
769 17:38:38.726331 scan_bus: bus USB2 port 0 finished in 6 msecs
770 17:38:38.729714 USB2 port 1 scanning...
771 17:38:38.732840 scan_static_bus for USB2 port 1
772 17:38:38.736626 scan_static_bus for USB2 port 1 done
773 17:38:38.743082 scan_bus: bus USB2 port 1 finished in 6 msecs
774 17:38:38.743173 USB2 port 2 scanning...
775 17:38:38.746248 scan_static_bus for USB2 port 2
776 17:38:38.749837 scan_static_bus for USB2 port 2 done
777 17:38:38.756133 scan_bus: bus USB2 port 2 finished in 6 msecs
778 17:38:38.759864 USB2 port 3 scanning...
779 17:38:38.763434 scan_static_bus for USB2 port 3
780 17:38:38.766630 scan_static_bus for USB2 port 3 done
781 17:38:38.769797 scan_bus: bus USB2 port 3 finished in 6 msecs
782 17:38:38.772996 USB2 port 5 scanning...
783 17:38:38.776320 scan_static_bus for USB2 port 5
784 17:38:38.779552 scan_static_bus for USB2 port 5 done
785 17:38:38.782908 scan_bus: bus USB2 port 5 finished in 6 msecs
786 17:38:38.786180 USB2 port 7 scanning...
787 17:38:38.789360 scan_static_bus for USB2 port 7
788 17:38:38.792718 scan_static_bus for USB2 port 7 done
789 17:38:38.799617 scan_bus: bus USB2 port 7 finished in 6 msecs
790 17:38:38.799705 USB3 port 0 scanning...
791 17:38:38.803087 scan_static_bus for USB3 port 0
792 17:38:38.806459 scan_static_bus for USB3 port 0 done
793 17:38:38.812970 scan_bus: bus USB3 port 0 finished in 6 msecs
794 17:38:38.816178 USB3 port 1 scanning...
795 17:38:38.819968 scan_static_bus for USB3 port 1
796 17:38:38.823118 scan_static_bus for USB3 port 1 done
797 17:38:38.826375 scan_bus: bus USB3 port 1 finished in 6 msecs
798 17:38:38.829741 USB3 port 2 scanning...
799 17:38:38.832897 scan_static_bus for USB3 port 2
800 17:38:38.836010 scan_static_bus for USB3 port 2 done
801 17:38:38.840124 scan_bus: bus USB3 port 2 finished in 6 msecs
802 17:38:38.843230 USB3 port 3 scanning...
803 17:38:38.846692 scan_static_bus for USB3 port 3
804 17:38:38.849370 scan_static_bus for USB3 port 3 done
805 17:38:38.852720 scan_bus: bus USB3 port 3 finished in 6 msecs
806 17:38:38.859757 scan_static_bus for USB0 port 0 done
807 17:38:38.863051 scan_bus: bus USB0 port 0 finished in 172 msecs
808 17:38:38.866195 scan_static_bus for PCI: 00:14.0 done
809 17:38:38.872559 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
810 17:38:38.872646 PCI: 00:14.3 scanning...
811 17:38:38.875932 scan_static_bus for PCI: 00:14.3
812 17:38:38.879370 GENERIC: 0.0 enabled
813 17:38:38.883055 scan_static_bus for PCI: 00:14.3 done
814 17:38:38.888936 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
815 17:38:38.889050 PCI: 00:15.0 scanning...
816 17:38:38.892853 scan_static_bus for PCI: 00:15.0
817 17:38:38.896008 I2C: 00:2c enabled
818 17:38:38.899367 I2C: 00:15 enabled
819 17:38:38.902572 scan_static_bus for PCI: 00:15.0 done
820 17:38:38.906299 scan_bus: bus PCI: 00:15.0 finished in 10 msecs
821 17:38:38.909152 PCI: 00:15.1 scanning...
822 17:38:38.912976 scan_static_bus for PCI: 00:15.1
823 17:38:38.915659 scan_static_bus for PCI: 00:15.1 done
824 17:38:38.922231 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
825 17:38:38.922344 PCI: 00:15.2 scanning...
826 17:38:38.926358 scan_static_bus for PCI: 00:15.2
827 17:38:38.929265 GENERIC: 0.0 disabled
828 17:38:38.932670 I2C: 00:15 enabled
829 17:38:38.932754 I2C: 00:10 disabled
830 17:38:38.935897 I2C: 00:10 disabled
831 17:38:38.935982 I2C: 00:2c enabled
832 17:38:38.939013 I2C: 00:40 enabled
833 17:38:38.942259 I2C: 00:10 enabled
834 17:38:38.942343 I2C: 00:39 enabled
835 17:38:38.946081 scan_static_bus for PCI: 00:15.2 done
836 17:38:38.952484 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
837 17:38:38.955591 PCI: 00:15.3 scanning...
838 17:38:38.958895 scan_static_bus for PCI: 00:15.3
839 17:38:38.958980 I2C: 00:36 enabled
840 17:38:38.962590 I2C: 00:10 disabled
841 17:38:38.962675 I2C: 00:0c enabled
842 17:38:38.965830 I2C: 00:50 enabled
843 17:38:38.969191 scan_static_bus for PCI: 00:15.3 done
844 17:38:38.975774 scan_bus: bus PCI: 00:15.3 finished in 14 msecs
845 17:38:38.975859 PCI: 00:19.0 scanning...
846 17:38:38.978944 scan_static_bus for PCI: 00:19.0
847 17:38:38.982184 I2C: 00:1a enabled
848 17:38:38.985679 I2C: 00:1a disabled
849 17:38:38.985766 I2C: 00:1a disabled
850 17:38:38.988898 I2C: 00:28 enabled
851 17:38:38.988982 I2C: 00:29 enabled
852 17:38:38.995462 scan_static_bus for PCI: 00:19.0 done
853 17:38:38.998835 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
854 17:38:39.002159 PCI: 00:1e.2 scanning...
855 17:38:39.005571 scan_generic_bus for PCI: 00:1e.2
856 17:38:39.005656 SPI: 00 enabled
857 17:38:39.012149 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
858 17:38:39.018672 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
859 17:38:39.018830 PCI: 00:1f.0 scanning...
860 17:38:39.021952 scan_static_bus for PCI: 00:1f.0
861 17:38:39.025308 PNP: 0c09.0 enabled
862 17:38:39.028769 PNP: 0c09.0 scanning...
863 17:38:39.031882 scan_static_bus for PNP: 0c09.0
864 17:38:39.035596 scan_static_bus for PNP: 0c09.0 done
865 17:38:39.038707 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
866 17:38:39.042100 scan_static_bus for PCI: 00:1f.0 done
867 17:38:39.048820 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
868 17:38:39.051940 PCI: 00:1f.3 scanning...
869 17:38:39.055193 scan_static_bus for PCI: 00:1f.3
870 17:38:39.055315 GENERIC: 0.0 disabled
871 17:38:39.062115 scan_static_bus for PCI: 00:1f.3 done
872 17:38:39.065145 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
873 17:38:39.068245 PCI: 00:1f.5 scanning...
874 17:38:39.071569 scan_generic_bus for PCI: 00:1f.5
875 17:38:39.074918 scan_generic_bus for PCI: 00:1f.5 done
876 17:38:39.078667 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
877 17:38:39.085029 scan_bus: bus DOMAIN: 0000 finished in 646 msecs
878 17:38:39.088597 scan_static_bus for Root Device done
879 17:38:39.091716 scan_bus: bus Root Device finished in 665 msecs
880 17:38:39.094994 done
881 17:38:39.098212 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
882 17:38:39.101549 Chrome EC: UHEPI supported
883 17:38:39.108658 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
884 17:38:39.115260 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
885 17:38:39.118551 SPI flash protection: WPSW=0 SRP0=0
886 17:38:39.121669 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
887 17:38:39.128299 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
888 17:38:39.131686 found VGA at PCI: 00:02.0
889 17:38:39.134943 Setting up VGA for PCI: 00:02.0
890 17:38:39.141254 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
891 17:38:39.145001 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
892 17:38:39.148408 Allocating resources...
893 17:38:39.148569 Reading resources...
894 17:38:39.154676 Root Device read_resources bus 0 link: 0
895 17:38:39.157869 CPU_CLUSTER: 0 read_resources bus 0 link: 0
896 17:38:39.164784 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
897 17:38:39.168254 DOMAIN: 0000 read_resources bus 0 link: 0
898 17:38:39.174737 PCI: 00:04.0 read_resources bus 1 link: 0
899 17:38:39.177817 PCI: 00:04.0 read_resources bus 1 link: 0 done
900 17:38:39.181089 PCI: 00:05.0 read_resources bus 2 link: 0
901 17:38:39.187680 PCI: 00:05.0 read_resources bus 2 link: 0 done
902 17:38:39.191514 PCI: 00:14.0 read_resources bus 0 link: 0
903 17:38:39.197875 USB0 port 0 read_resources bus 0 link: 0
904 17:38:39.204411 USB0 port 0 read_resources bus 0 link: 0 done
905 17:38:39.207870 PCI: 00:14.0 read_resources bus 0 link: 0 done
906 17:38:39.211122 PCI: 00:14.3 read_resources bus 0 link: 0
907 17:38:39.271446 PCI: 00:14.3 read_resources bus 0 link: 0 done
908 17:38:39.271590 PCI: 00:15.0 read_resources bus 0 link: 0
909 17:38:39.271873 PCI: 00:15.0 read_resources bus 0 link: 0 done
910 17:38:39.271982 PCI: 00:15.2 read_resources bus 0 link: 0
911 17:38:39.272087 PCI: 00:15.2 read_resources bus 0 link: 0 done
912 17:38:39.272182 PCI: 00:15.3 read_resources bus 0 link: 0
913 17:38:39.272288 PCI: 00:15.3 read_resources bus 0 link: 0 done
914 17:38:39.272383 PCI: 00:19.0 read_resources bus 0 link: 0
915 17:38:39.272474 PCI: 00:19.0 read_resources bus 0 link: 0 done
916 17:38:39.272807 PCI: 00:1e.2 read_resources bus 3 link: 0
917 17:38:39.273093 PCI: 00:1e.2 read_resources bus 3 link: 0 done
918 17:38:39.273191 PCI: 00:1f.0 read_resources bus 0 link: 0
919 17:38:39.278218 PCI: 00:1f.0 read_resources bus 0 link: 0 done
920 17:38:39.281454 PCI: 00:1f.3 read_resources bus 0 link: 0
921 17:38:39.285118 PCI: 00:1f.3 read_resources bus 0 link: 0 done
922 17:38:39.291512 DOMAIN: 0000 read_resources bus 0 link: 0 done
923 17:38:39.294809 Root Device read_resources bus 0 link: 0 done
924 17:38:39.298173 Done reading resources.
925 17:38:39.304924 Show resources in subtree (Root Device)...After reading.
926 17:38:39.308187 Root Device child on link 0 CPU_CLUSTER: 0
927 17:38:39.311463 CPU_CLUSTER: 0 child on link 0 APIC: 00
928 17:38:39.314738 APIC: 00
929 17:38:39.314844 APIC: 02
930 17:38:39.318716 DOMAIN: 0000 child on link 0 PCI: 00:00.0
931 17:38:39.328580 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
932 17:38:39.338526 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
933 17:38:39.341398 PCI: 00:00.0
934 17:38:39.351885 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
935 17:38:39.358474 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
936 17:38:39.368288 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
937 17:38:39.377740 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
938 17:38:39.388025 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
939 17:38:39.398039 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
940 17:38:39.408007 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
941 17:38:39.414738 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
942 17:38:39.424558 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
943 17:38:39.434005 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
944 17:38:39.443815 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
945 17:38:39.453693 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
946 17:38:39.460408 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
947 17:38:39.470173 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
948 17:38:39.480364 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
949 17:38:39.490180 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
950 17:38:39.500344 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
951 17:38:39.510404 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
952 17:38:39.516901 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
953 17:38:39.520125 PCI: 00:02.0
954 17:38:39.529868 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
955 17:38:39.540517 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
956 17:38:39.550421 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
957 17:38:39.553628 PCI: 00:04.0 child on link 0 GENERIC: 0.0
958 17:38:39.563486 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
959 17:38:39.566884 GENERIC: 0.0
960 17:38:39.570167 PCI: 00:05.0 child on link 0 GENERIC: 0.0
961 17:38:39.580579 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 17:38:39.581104 GENERIC: 0.0
963 17:38:39.583818 PCI: 00:08.0
964 17:38:39.593724 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
965 17:38:39.597439 PCI: 00:14.0 child on link 0 USB0 port 0
966 17:38:39.607024 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
967 17:38:39.613851 USB0 port 0 child on link 0 USB2 port 0
968 17:38:39.614415 USB2 port 0
969 17:38:39.617163 USB2 port 1
970 17:38:39.617736 USB2 port 2
971 17:38:39.620954 USB2 port 3
972 17:38:39.621433 USB2 port 4
973 17:38:39.624368 USB2 port 5
974 17:38:39.625019 USB2 port 6
975 17:38:39.627535 USB2 port 7
976 17:38:39.628117 USB3 port 0
977 17:38:39.630719 USB3 port 1
978 17:38:39.631307 USB3 port 2
979 17:38:39.633787 USB3 port 3
980 17:38:39.634317 PCI: 00:14.2
981 17:38:39.640477 PCI: 00:14.3 child on link 0 GENERIC: 0.0
982 17:38:39.650218 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
983 17:38:39.650447 GENERIC: 0.0
984 17:38:39.653426 PCI: 00:14.5
985 17:38:39.663788 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
986 17:38:39.666670 PCI: 00:15.0 child on link 0 I2C: 00:2c
987 17:38:39.676749 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
988 17:38:39.680093 I2C: 00:2c
989 17:38:39.680198 I2C: 00:15
990 17:38:39.683241 PCI: 00:15.1
991 17:38:39.692857 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
992 17:38:39.696710 PCI: 00:15.2 child on link 0 GENERIC: 0.0
993 17:38:39.706605 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
994 17:38:39.706851 GENERIC: 0.0
995 17:38:39.709741 I2C: 00:15
996 17:38:39.709868 I2C: 00:10
997 17:38:39.713050 I2C: 00:10
998 17:38:39.713157 I2C: 00:2c
999 17:38:39.716360 I2C: 00:40
1000 17:38:39.716509 I2C: 00:10
1001 17:38:39.719866 I2C: 00:39
1002 17:38:39.723036 PCI: 00:15.3 child on link 0 I2C: 00:36
1003 17:38:39.732716 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1004 17:38:39.732865 I2C: 00:36
1005 17:38:39.736198 I2C: 00:10
1006 17:38:39.736323 I2C: 00:0c
1007 17:38:39.739886 I2C: 00:50
1008 17:38:39.739981 PCI: 00:16.0
1009 17:38:39.749587 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 17:38:39.756223 PCI: 00:19.0 child on link 0 I2C: 00:1a
1011 17:38:39.766081 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1012 17:38:39.766212 I2C: 00:1a
1013 17:38:39.769411 I2C: 00:1a
1014 17:38:39.769548 I2C: 00:1a
1015 17:38:39.772464 I2C: 00:28
1016 17:38:39.772547 I2C: 00:29
1017 17:38:39.772614 PCI: 00:19.2
1018 17:38:39.785672 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 17:38:39.795999 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 17:38:39.796102 PCI: 00:1a.0
1021 17:38:39.805710 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 17:38:39.808885 PCI: 00:1e.0
1023 17:38:39.812352 PCI: 00:1e.2 child on link 0 SPI: 00
1024 17:38:39.822685 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1025 17:38:39.822828 SPI: 00
1026 17:38:39.829266 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1027 17:38:39.835640 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1028 17:38:39.838936 PNP: 0c09.0
1029 17:38:39.846039 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1030 17:38:39.849106 PCI: 00:1f.2
1031 17:38:39.859074 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1032 17:38:39.869210 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1033 17:38:39.872252 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1034 17:38:39.882380 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1035 17:38:39.892088 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1036 17:38:39.892690 GENERIC: 0.0
1037 17:38:39.896023 PCI: 00:1f.5
1038 17:38:39.903460 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1039 17:38:39.913348 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1040 17:38:39.920377 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1041 17:38:39.926712 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1042 17:38:39.933636 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1043 17:38:39.940594 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1044 17:38:39.949846 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1045 17:38:39.953244 DOMAIN: 0000: Resource ranges:
1046 17:38:39.956978 * Base: 1000, Size: 800, Tag: 100
1047 17:38:39.960169 * Base: 1900, Size: e700, Tag: 100
1048 17:38:39.963421 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1049 17:38:39.970017 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1050 17:38:39.976756 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1051 17:38:39.986135 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1052 17:38:39.993122 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1053 17:38:39.999444 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1054 17:38:40.009604 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1055 17:38:40.016509 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1056 17:38:40.023458 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1057 17:38:40.033050 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1058 17:38:40.039523 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1059 17:38:40.046697 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1060 17:38:40.052497 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1061 17:38:40.062960 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1062 17:38:40.069674 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1063 17:38:40.076365 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1064 17:38:40.085880 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1065 17:38:40.092501 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1066 17:38:40.099256 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1067 17:38:40.108668 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1068 17:38:40.115889 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1069 17:38:40.122313 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1070 17:38:40.132284 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1071 17:38:40.138726 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1072 17:38:40.141936 DOMAIN: 0000: Resource ranges:
1073 17:38:40.145764 * Base: 7fc00000, Size: 40400000, Tag: 200
1074 17:38:40.152147 * Base: d0000000, Size: 2b000000, Tag: 200
1075 17:38:40.155447 * Base: fb001000, Size: 2fff000, Tag: 200
1076 17:38:40.158663 * Base: fe010000, Size: 22000, Tag: 200
1077 17:38:40.161976 * Base: fe033000, Size: a4d000, Tag: 200
1078 17:38:40.168648 * Base: fea88000, Size: 2f8000, Tag: 200
1079 17:38:40.171962 * Base: fed88000, Size: 8000, Tag: 200
1080 17:38:40.175278 * Base: fed93000, Size: d000, Tag: 200
1081 17:38:40.178484 * Base: feda2000, Size: 125e000, Tag: 200
1082 17:38:40.185189 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1083 17:38:40.191723 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1084 17:38:40.198159 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1085 17:38:40.204858 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1086 17:38:40.211395 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1087 17:38:40.218129 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1088 17:38:40.224738 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1089 17:38:40.231549 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1090 17:38:40.238037 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1091 17:38:40.244908 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1092 17:38:40.251428 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1093 17:38:40.258323 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1094 17:38:40.265021 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1095 17:38:40.271734 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1096 17:38:40.278171 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1097 17:38:40.284408 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1098 17:38:40.291211 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1099 17:38:40.297734 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1100 17:38:40.304377 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1101 17:38:40.311050 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1102 17:38:40.317913 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1103 17:38:40.323905 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1104 17:38:40.330692 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1105 17:38:40.337680 Root Device assign_resources, bus 0 link: 0
1106 17:38:40.340807 DOMAIN: 0000 assign_resources, bus 0 link: 0
1107 17:38:40.350808 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1108 17:38:40.357699 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1109 17:38:40.363852 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1110 17:38:40.373816 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1111 17:38:40.377169 PCI: 00:04.0 assign_resources, bus 1 link: 0
1112 17:38:40.383834 PCI: 00:04.0 assign_resources, bus 1 link: 0
1113 17:38:40.390140 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1114 17:38:40.393391 PCI: 00:05.0 assign_resources, bus 2 link: 0
1115 17:38:40.400023 PCI: 00:05.0 assign_resources, bus 2 link: 0
1116 17:38:40.406515 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1117 17:38:40.417094 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1118 17:38:40.420228 PCI: 00:14.0 assign_resources, bus 0 link: 0
1119 17:38:40.426601 PCI: 00:14.0 assign_resources, bus 0 link: 0
1120 17:38:40.433149 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1121 17:38:40.436427 PCI: 00:14.3 assign_resources, bus 0 link: 0
1122 17:38:40.443300 PCI: 00:14.3 assign_resources, bus 0 link: 0
1123 17:38:40.449632 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1124 17:38:40.460260 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1125 17:38:40.463261 PCI: 00:15.0 assign_resources, bus 0 link: 0
1126 17:38:40.466310 PCI: 00:15.0 assign_resources, bus 0 link: 0
1127 17:38:40.476436 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1128 17:38:40.483863 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1129 17:38:40.487652 PCI: 00:15.2 assign_resources, bus 0 link: 0
1130 17:38:40.494247 PCI: 00:15.2 assign_resources, bus 0 link: 0
1131 17:38:40.500632 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1132 17:38:40.507264 PCI: 00:15.3 assign_resources, bus 0 link: 0
1133 17:38:40.510467 PCI: 00:15.3 assign_resources, bus 0 link: 0
1134 17:38:40.517125 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1135 17:38:40.527425 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1136 17:38:40.530735 PCI: 00:19.0 assign_resources, bus 0 link: 0
1137 17:38:40.537415 PCI: 00:19.0 assign_resources, bus 0 link: 0
1138 17:38:40.543711 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1139 17:38:40.553817 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1140 17:38:40.560329 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1141 17:38:40.563573 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1142 17:38:40.570379 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1143 17:38:40.573425 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1144 17:38:40.580171 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1145 17:38:40.583390 LPC: Trying to open IO window from 800 size 1ff
1146 17:38:40.593782 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1147 17:38:40.600277 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1148 17:38:40.603529 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1149 17:38:40.610400 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1150 17:38:40.617081 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1151 17:38:40.623624 DOMAIN: 0000 assign_resources, bus 0 link: 0
1152 17:38:40.627021 Root Device assign_resources, bus 0 link: 0
1153 17:38:40.630061 Done setting resources.
1154 17:38:40.636688 Show resources in subtree (Root Device)...After assigning values.
1155 17:38:40.639952 Root Device child on link 0 CPU_CLUSTER: 0
1156 17:38:40.643162 CPU_CLUSTER: 0 child on link 0 APIC: 00
1157 17:38:40.646349 APIC: 00
1158 17:38:40.646467 APIC: 02
1159 17:38:40.649579 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 17:38:40.660153 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 17:38:40.669920 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 17:38:40.673192 PCI: 00:00.0
1163 17:38:40.682929 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 17:38:40.689916 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 17:38:40.699536 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 17:38:40.710038 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 17:38:40.719768 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 17:38:40.729618 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 17:38:40.735932 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 17:38:40.745911 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 17:38:40.755488 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 17:38:40.765834 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 17:38:40.775488 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 17:38:40.785153 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 17:38:40.792380 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 17:38:40.801762 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 17:38:40.811830 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 17:38:40.821786 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 17:38:40.831910 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 17:38:40.842064 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 17:38:40.848592 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 17:38:40.851827 PCI: 00:02.0
1183 17:38:40.861818 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1184 17:38:40.871977 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1185 17:38:40.882108 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1186 17:38:40.885162 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 17:38:40.895246 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1188 17:38:40.898398 GENERIC: 0.0
1189 17:38:40.901677 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1190 17:38:40.915199 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1191 17:38:40.915291 GENERIC: 0.0
1192 17:38:40.918580 PCI: 00:08.0
1193 17:38:40.928222 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1194 17:38:40.931481 PCI: 00:14.0 child on link 0 USB0 port 0
1195 17:38:40.941547 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1196 17:38:40.944555 USB0 port 0 child on link 0 USB2 port 0
1197 17:38:40.947885 USB2 port 0
1198 17:38:40.951187 USB2 port 1
1199 17:38:40.951271 USB2 port 2
1200 17:38:40.954676 USB2 port 3
1201 17:38:40.954750 USB2 port 4
1202 17:38:40.957966 USB2 port 5
1203 17:38:40.958052 USB2 port 6
1204 17:38:40.961224 USB2 port 7
1205 17:38:40.961309 USB3 port 0
1206 17:38:40.965004 USB3 port 1
1207 17:38:40.965101 USB3 port 2
1208 17:38:40.968247 USB3 port 3
1209 17:38:40.968332 PCI: 00:14.2
1210 17:38:40.974706 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1211 17:38:40.984789 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1212 17:38:40.984877 GENERIC: 0.0
1213 17:38:40.987925 PCI: 00:14.5
1214 17:38:40.997638 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1215 17:38:41.001270 PCI: 00:15.0 child on link 0 I2C: 00:2c
1216 17:38:41.011328 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1217 17:38:41.014626 I2C: 00:2c
1218 17:38:41.014717 I2C: 00:15
1219 17:38:41.017777 PCI: 00:15.1
1220 17:38:41.027694 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1221 17:38:41.030955 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1222 17:38:41.040711 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1223 17:38:41.044597 GENERIC: 0.0
1224 17:38:41.044691 I2C: 00:15
1225 17:38:41.047760 I2C: 00:10
1226 17:38:41.047846 I2C: 00:10
1227 17:38:41.050919 I2C: 00:2c
1228 17:38:41.051005 I2C: 00:40
1229 17:38:41.054323 I2C: 00:10
1230 17:38:41.054408 I2C: 00:39
1231 17:38:41.057440 PCI: 00:15.3 child on link 0 I2C: 00:36
1232 17:38:41.071168 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1233 17:38:41.071259 I2C: 00:36
1234 17:38:41.071328 I2C: 00:10
1235 17:38:41.074516 I2C: 00:0c
1236 17:38:41.074601 I2C: 00:50
1237 17:38:41.077820 PCI: 00:16.0
1238 17:38:41.087339 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1239 17:38:41.091100 PCI: 00:19.0 child on link 0 I2C: 00:1a
1240 17:38:41.100663 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1241 17:38:41.104588 I2C: 00:1a
1242 17:38:41.104675 I2C: 00:1a
1243 17:38:41.107711 I2C: 00:1a
1244 17:38:41.107797 I2C: 00:28
1245 17:38:41.110668 I2C: 00:29
1246 17:38:41.110803 PCI: 00:19.2
1247 17:38:41.124002 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1248 17:38:41.134106 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1249 17:38:41.134200 PCI: 00:1a.0
1250 17:38:41.143973 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1251 17:38:41.147200 PCI: 00:1e.0
1252 17:38:41.150852 PCI: 00:1e.2 child on link 0 SPI: 00
1253 17:38:41.160950 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1254 17:38:41.161042 SPI: 00
1255 17:38:41.167476 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1256 17:38:41.174020 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1257 17:38:41.177364 PNP: 0c09.0
1258 17:38:41.186651 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1259 17:38:41.186747 PCI: 00:1f.2
1260 17:38:41.196875 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1261 17:38:41.206987 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1262 17:38:41.210367 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1263 17:38:41.220250 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1264 17:38:41.230095 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1265 17:38:41.233361 GENERIC: 0.0
1266 17:38:41.233450 PCI: 00:1f.5
1267 17:38:41.243285 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1268 17:38:41.246534 Done allocating resources.
1269 17:38:41.253863 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1270 17:38:41.256940 Enabling resources...
1271 17:38:41.260050 PCI: 00:00.0 subsystem <- 8086/4e22
1272 17:38:41.263108 PCI: 00:00.0 cmd <- 06
1273 17:38:41.266794 PCI: 00:02.0 subsystem <- 8086/4e55
1274 17:38:41.270094 PCI: 00:02.0 cmd <- 03
1275 17:38:41.273511 PCI: 00:04.0 subsystem <- 8086/4e03
1276 17:38:41.276662 PCI: 00:04.0 cmd <- 02
1277 17:38:41.279970 PCI: 00:05.0 bridge ctrl <- 0003
1278 17:38:41.283242 PCI: 00:05.0 subsystem <- 8086/4e19
1279 17:38:41.283332 PCI: 00:05.0 cmd <- 02
1280 17:38:41.286646 PCI: 00:08.0 cmd <- 06
1281 17:38:41.289989 PCI: 00:14.0 subsystem <- 8086/4ded
1282 17:38:41.293225 PCI: 00:14.0 cmd <- 02
1283 17:38:41.296380 PCI: 00:14.3 subsystem <- 8086/4df0
1284 17:38:41.300179 PCI: 00:14.3 cmd <- 02
1285 17:38:41.303405 PCI: 00:14.5 subsystem <- 8086/4df8
1286 17:38:41.306519 PCI: 00:14.5 cmd <- 06
1287 17:38:41.309729 PCI: 00:15.0 subsystem <- 8086/4de8
1288 17:38:41.312845 PCI: 00:15.0 cmd <- 02
1289 17:38:41.316657 PCI: 00:15.1 subsystem <- 8086/4de9
1290 17:38:41.316744 PCI: 00:15.1 cmd <- 02
1291 17:38:41.323124 PCI: 00:15.2 subsystem <- 8086/4dea
1292 17:38:41.323210 PCI: 00:15.2 cmd <- 02
1293 17:38:41.326318 PCI: 00:15.3 subsystem <- 8086/4deb
1294 17:38:41.329484 PCI: 00:15.3 cmd <- 02
1295 17:38:41.333236 PCI: 00:16.0 subsystem <- 8086/4de0
1296 17:38:41.336506 PCI: 00:16.0 cmd <- 02
1297 17:38:41.339749 PCI: 00:19.0 subsystem <- 8086/4dc5
1298 17:38:41.342619 PCI: 00:19.0 cmd <- 02
1299 17:38:41.346431 PCI: 00:19.2 subsystem <- 8086/4dc7
1300 17:38:41.349795 PCI: 00:19.2 cmd <- 06
1301 17:38:41.353038 PCI: 00:1a.0 subsystem <- 8086/4dc4
1302 17:38:41.356243 PCI: 00:1a.0 cmd <- 06
1303 17:38:41.359508 PCI: 00:1e.2 subsystem <- 8086/4daa
1304 17:38:41.359595 PCI: 00:1e.2 cmd <- 06
1305 17:38:41.365942 PCI: 00:1f.0 subsystem <- 8086/4d87
1306 17:38:41.366079 PCI: 00:1f.0 cmd <- 407
1307 17:38:41.369047 PCI: 00:1f.3 subsystem <- 8086/4dc8
1308 17:38:41.372863 PCI: 00:1f.3 cmd <- 02
1309 17:38:41.375859 PCI: 00:1f.5 subsystem <- 8086/4da4
1310 17:38:41.378867 PCI: 00:1f.5 cmd <- 406
1311 17:38:41.383610 done.
1312 17:38:41.387140 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1313 17:38:41.390252 Initializing devices...
1314 17:38:41.393576 Root Device init
1315 17:38:41.393661 mainboard: EC init
1316 17:38:41.400267 Chrome EC: Set SMI mask to 0x0000000000000000
1317 17:38:41.403361 Chrome EC: clear events_b mask to 0x0000000000000000
1318 17:38:41.410295 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1319 17:38:41.416862 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1320 17:38:41.423838 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1321 17:38:41.427044 Chrome EC: Set WAKE mask to 0x0000000000000000
1322 17:38:41.430327 Root Device init finished in 35 msecs
1323 17:38:41.434006 PCI: 00:00.0 init
1324 17:38:41.437822 CPU TDP = 6 Watts
1325 17:38:41.437909 CPU PL1 = 7 Watts
1326 17:38:41.440980 CPU PL2 = 12 Watts
1327 17:38:41.444513 PCI: 00:00.0 init finished in 6 msecs
1328 17:38:41.447840 PCI: 00:02.0 init
1329 17:38:41.451126 GMA: Found VBT in CBFS
1330 17:38:41.451212 GMA: Found valid VBT in CBFS
1331 17:38:41.457143 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1332 17:38:41.463784 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1333 17:38:41.470407 PCI: 00:02.0 init finished in 18 msecs
1334 17:38:41.470496 PCI: 00:08.0 init
1335 17:38:41.477465 PCI: 00:08.0 init finished in 0 msecs
1336 17:38:41.477553 PCI: 00:14.0 init
1337 17:38:41.483997 XHCI: Updated LFPS sampling OFF time to 9 ms
1338 17:38:41.487484 PCI: 00:14.0 init finished in 4 msecs
1339 17:38:41.490730 PCI: 00:15.0 init
1340 17:38:41.490836 I2C bus 0 version 0x3230302a
1341 17:38:41.493973 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1342 17:38:41.500726 PCI: 00:15.0 init finished in 6 msecs
1343 17:38:41.500814 PCI: 00:15.1 init
1344 17:38:41.503963 I2C bus 1 version 0x3230302a
1345 17:38:41.507249 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1346 17:38:41.510533 PCI: 00:15.1 init finished in 6 msecs
1347 17:38:41.514243 PCI: 00:15.2 init
1348 17:38:41.517181 I2C bus 2 version 0x3230302a
1349 17:38:41.520899 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1350 17:38:41.523962 PCI: 00:15.2 init finished in 6 msecs
1351 17:38:41.527372 PCI: 00:15.3 init
1352 17:38:41.530492 I2C bus 3 version 0x3230302a
1353 17:38:41.533594 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1354 17:38:41.537348 PCI: 00:15.3 init finished in 6 msecs
1355 17:38:41.540345 PCI: 00:16.0 init
1356 17:38:41.543622 PCI: 00:16.0 init finished in 0 msecs
1357 17:38:41.543705 PCI: 00:19.0 init
1358 17:38:41.547370 I2C bus 4 version 0x3230302a
1359 17:38:41.550613 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1360 17:38:41.553897 PCI: 00:19.0 init finished in 6 msecs
1361 17:38:41.557803 PCI: 00:1a.0 init
1362 17:38:41.561074 PCI: 00:1a.0 init finished in 0 msecs
1363 17:38:41.564486 PCI: 00:1f.0 init
1364 17:38:41.567719 IOAPIC: Initializing IOAPIC at 0xfec00000
1365 17:38:41.574370 IOAPIC: Bootstrap Processor Local APIC = 0x00
1366 17:38:41.574457 IOAPIC: ID = 0x02
1367 17:38:41.577649 IOAPIC: Dumping registers
1368 17:38:41.580935 reg 0x0000: 0x02000000
1369 17:38:41.584163 reg 0x0001: 0x00770020
1370 17:38:41.584244 reg 0x0002: 0x00000000
1371 17:38:41.590501 PCI: 00:1f.0 init finished in 21 msecs
1372 17:38:41.590597 PCI: 00:1f.2 init
1373 17:38:41.594352 Disabling ACPI via APMC.
1374 17:38:41.597451 APMC done.
1375 17:38:41.600679 PCI: 00:1f.2 init finished in 5 msecs
1376 17:38:41.612055 PNP: 0c09.0 init
1377 17:38:41.615390 Google Chrome EC uptime: 6.503 seconds
1378 17:38:41.621916 Google Chrome AP resets since EC boot: 0
1379 17:38:41.624999 Google Chrome most recent AP reset causes:
1380 17:38:41.632272 Google Chrome EC reset flags at last EC boot: reset-pin
1381 17:38:41.635508 PNP: 0c09.0 init finished in 18 msecs
1382 17:38:41.635585 Devices initialized
1383 17:38:41.638377 Show all devs... After init.
1384 17:38:41.641424 Root Device: enabled 1
1385 17:38:41.645081 CPU_CLUSTER: 0: enabled 1
1386 17:38:41.648172 DOMAIN: 0000: enabled 1
1387 17:38:41.648250 PCI: 00:00.0: enabled 1
1388 17:38:41.651505 PCI: 00:02.0: enabled 1
1389 17:38:41.654886 PCI: 00:04.0: enabled 1
1390 17:38:41.654961 PCI: 00:05.0: enabled 1
1391 17:38:41.658665 PCI: 00:09.0: enabled 0
1392 17:38:41.661965 PCI: 00:12.6: enabled 0
1393 17:38:41.665279 PCI: 00:14.0: enabled 1
1394 17:38:41.665367 PCI: 00:14.1: enabled 0
1395 17:38:41.668536 PCI: 00:14.2: enabled 0
1396 17:38:41.671877 PCI: 00:14.3: enabled 1
1397 17:38:41.675211 PCI: 00:14.5: enabled 1
1398 17:38:41.675295 PCI: 00:15.0: enabled 1
1399 17:38:41.678154 PCI: 00:15.1: enabled 1
1400 17:38:41.681832 PCI: 00:15.2: enabled 1
1401 17:38:41.684930 PCI: 00:15.3: enabled 1
1402 17:38:41.685005 PCI: 00:16.0: enabled 1
1403 17:38:41.688266 PCI: 00:16.1: enabled 0
1404 17:38:41.691552 PCI: 00:16.4: enabled 0
1405 17:38:41.694881 PCI: 00:16.5: enabled 0
1406 17:38:41.694967 PCI: 00:17.0: enabled 0
1407 17:38:41.698001 PCI: 00:19.0: enabled 1
1408 17:38:41.701884 PCI: 00:19.1: enabled 0
1409 17:38:41.701965 PCI: 00:19.2: enabled 1
1410 17:38:41.704926 PCI: 00:1a.0: enabled 1
1411 17:38:41.707912 PCI: 00:1c.0: enabled 0
1412 17:38:41.711414 PCI: 00:1c.1: enabled 0
1413 17:38:41.711505 PCI: 00:1c.2: enabled 0
1414 17:38:41.714504 PCI: 00:1c.3: enabled 0
1415 17:38:41.717830 PCI: 00:1c.4: enabled 0
1416 17:38:41.721201 PCI: 00:1c.5: enabled 0
1417 17:38:41.721289 PCI: 00:1c.6: enabled 0
1418 17:38:41.724504 PCI: 00:1c.7: enabled 1
1419 17:38:41.727818 PCI: 00:1e.0: enabled 0
1420 17:38:41.727896 PCI: 00:1e.1: enabled 0
1421 17:38:41.731043 PCI: 00:1e.2: enabled 1
1422 17:38:41.734902 PCI: 00:1e.3: enabled 0
1423 17:38:41.737954 PCI: 00:1f.0: enabled 1
1424 17:38:41.738031 PCI: 00:1f.1: enabled 0
1425 17:38:41.741564 PCI: 00:1f.2: enabled 1
1426 17:38:41.744493 PCI: 00:1f.3: enabled 1
1427 17:38:41.748180 PCI: 00:1f.4: enabled 0
1428 17:38:41.748256 PCI: 00:1f.5: enabled 1
1429 17:38:41.750990 PCI: 00:1f.7: enabled 0
1430 17:38:41.754678 GENERIC: 0.0: enabled 1
1431 17:38:41.757730 GENERIC: 0.0: enabled 1
1432 17:38:41.757813 USB0 port 0: enabled 1
1433 17:38:41.761396 GENERIC: 0.0: enabled 1
1434 17:38:41.764568 I2C: 00:2c: enabled 1
1435 17:38:41.764720 I2C: 00:15: enabled 1
1436 17:38:41.767908 GENERIC: 0.0: enabled 0
1437 17:38:41.771349 I2C: 00:15: enabled 1
1438 17:38:41.771488 I2C: 00:10: enabled 0
1439 17:38:41.774606 I2C: 00:10: enabled 0
1440 17:38:41.777894 I2C: 00:2c: enabled 1
1441 17:38:41.777969 I2C: 00:40: enabled 1
1442 17:38:41.781293 I2C: 00:10: enabled 1
1443 17:38:41.784491 I2C: 00:39: enabled 1
1444 17:38:41.784567 I2C: 00:36: enabled 1
1445 17:38:41.787733 I2C: 00:10: enabled 0
1446 17:38:41.791030 I2C: 00:0c: enabled 1
1447 17:38:41.791112 I2C: 00:50: enabled 1
1448 17:38:41.794341 I2C: 00:1a: enabled 1
1449 17:38:41.797684 I2C: 00:1a: enabled 0
1450 17:38:41.801003 I2C: 00:1a: enabled 0
1451 17:38:41.801079 I2C: 00:28: enabled 1
1452 17:38:41.804475 I2C: 00:29: enabled 1
1453 17:38:41.807898 PCI: 00:00.0: enabled 1
1454 17:38:41.807974 SPI: 00: enabled 1
1455 17:38:41.810829 PNP: 0c09.0: enabled 1
1456 17:38:41.814534 GENERIC: 0.0: enabled 0
1457 17:38:41.814655 USB2 port 0: enabled 1
1458 17:38:41.817542 USB2 port 1: enabled 1
1459 17:38:41.820858 USB2 port 2: enabled 1
1460 17:38:41.820941 USB2 port 3: enabled 1
1461 17:38:41.824187 USB2 port 4: enabled 0
1462 17:38:41.827610 USB2 port 5: enabled 1
1463 17:38:41.830925 USB2 port 6: enabled 0
1464 17:38:41.830999 USB2 port 7: enabled 1
1465 17:38:41.834253 USB3 port 0: enabled 1
1466 17:38:41.837514 USB3 port 1: enabled 1
1467 17:38:41.837597 USB3 port 2: enabled 1
1468 17:38:41.840934 USB3 port 3: enabled 1
1469 17:38:41.844209 APIC: 00: enabled 1
1470 17:38:41.844315 APIC: 02: enabled 1
1471 17:38:41.847227 PCI: 00:08.0: enabled 1
1472 17:38:41.853747 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1473 17:38:41.857104 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1474 17:38:41.860673 ELOG: NV offset 0xbfa000 size 0x1000
1475 17:38:41.868802 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1476 17:38:41.874882 ELOG: Event(17) added with size 13 at 2023-10-20 17:38:42 UTC
1477 17:38:41.881830 ELOG: Event(92) added with size 9 at 2023-10-20 17:38:42 UTC
1478 17:38:41.888527 ELOG: Event(93) added with size 9 at 2023-10-20 17:38:42 UTC
1479 17:38:41.894839 ELOG: Event(9E) added with size 10 at 2023-10-20 17:38:42 UTC
1480 17:38:41.901431 ELOG: Event(9F) added with size 14 at 2023-10-20 17:38:42 UTC
1481 17:38:41.908012 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1482 17:38:41.911327 ELOG: Event(A1) added with size 10 at 2023-10-20 17:38:42 UTC
1483 17:38:41.921500 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1484 17:38:41.927995 ELOG: Event(A0) added with size 9 at 2023-10-20 17:38:42 UTC
1485 17:38:41.931296 elog_add_boot_reason: Logged dev mode boot
1486 17:38:41.937971 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1487 17:38:41.938056 Finalize devices...
1488 17:38:41.941385 Devices finalized
1489 17:38:41.948143 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1490 17:38:41.951512 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1491 17:38:41.957691 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1492 17:38:41.961122 ME: HFSTS1 : 0x80030045
1493 17:38:41.964296 ME: HFSTS2 : 0x30280136
1494 17:38:41.971279 ME: HFSTS3 : 0x00000050
1495 17:38:41.974629 ME: HFSTS4 : 0x00004000
1496 17:38:41.977790 ME: HFSTS5 : 0x00000000
1497 17:38:41.980849 ME: HFSTS6 : 0x40400006
1498 17:38:41.984591 ME: Manufacturing Mode : NO
1499 17:38:41.987903 ME: FW Partition Table : OK
1500 17:38:41.991150 ME: Bringup Loader Failure : NO
1501 17:38:41.994515 ME: Firmware Init Complete : NO
1502 17:38:41.997551 ME: Boot Options Present : NO
1503 17:38:42.000963 ME: Update In Progress : NO
1504 17:38:42.004222 ME: D0i3 Support : YES
1505 17:38:42.008134 ME: Low Power State Enabled : NO
1506 17:38:42.011317 ME: CPU Replaced : YES
1507 17:38:42.014596 ME: CPU Replacement Valid : YES
1508 17:38:42.017947 ME: Current Working State : 5
1509 17:38:42.020678 ME: Current Operation State : 1
1510 17:38:42.024511 ME: Current Operation Mode : 3
1511 17:38:42.027637 ME: Error Code : 0
1512 17:38:42.030758 ME: CPU Debug Disabled : YES
1513 17:38:42.033873 ME: TXT Support : NO
1514 17:38:42.041109 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 78 ms
1515 17:38:42.047252 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1516 17:38:42.051107 ACPI: Writing ACPI tables at 76b27000.
1517 17:38:42.051192 ACPI: * FACS
1518 17:38:42.054335 ACPI: * DSDT
1519 17:38:42.057641 Ramoops buffer: 0x100000@0x76a26000.
1520 17:38:42.064043 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1521 17:38:42.067352 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1522 17:38:42.070974 Google Chrome EC: version:
1523 17:38:42.074069 ro: magolor_1.1.9999-103b6f9
1524 17:38:42.077473 rw: magolor_1.1.9999-103b6f9
1525 17:38:42.077564 running image: 1
1526 17:38:42.083805 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1527 17:38:42.088167 ACPI: * FADT
1528 17:38:42.088258 SCI is IRQ9
1529 17:38:42.095070 ACPI: added table 1/32, length now 40
1530 17:38:42.095161 ACPI: * SSDT
1531 17:38:42.098094 Found 1 CPU(s) with 2 core(s) each.
1532 17:38:42.101428 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1533 17:38:42.108412 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1534 17:38:42.111107 Could not locate 'wifi_sar' in VPD.
1535 17:38:42.114433 Checking CBFS for default SAR values
1536 17:38:42.121751 wifi_sar_defaults.hex has bad len in CBFS
1537 17:38:42.124422 failed from getting SAR limits!
1538 17:38:42.128346 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1539 17:38:42.134744 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1540 17:38:42.137796 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1541 17:38:42.144920 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1542 17:38:42.148201 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1543 17:38:42.154892 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1544 17:38:42.158162 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1545 17:38:42.164871 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1546 17:38:42.171411 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1547 17:38:42.174669 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1548 17:38:42.181787 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1549 17:38:42.188004 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1550 17:38:42.191469 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1551 17:38:42.198062 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1552 17:38:42.201044 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1553 17:38:42.210124 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1554 17:38:42.213253 PS2K: Passing 101 keymaps to kernel
1555 17:38:42.219625 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1556 17:38:42.226086 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1557 17:38:42.229458 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1558 17:38:42.236013 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1559 17:38:42.242701 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1560 17:38:42.246345 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1561 17:38:42.252839 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1562 17:38:42.259493 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1563 17:38:42.263016 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1564 17:38:42.269456 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1565 17:38:42.272927 ACPI: added table 2/32, length now 44
1566 17:38:42.276244 ACPI: * MCFG
1567 17:38:42.279480 ACPI: added table 3/32, length now 48
1568 17:38:42.279566 ACPI: * TPM2
1569 17:38:42.282560 TPM2 log created at 0x76a16000
1570 17:38:42.286291 ACPI: added table 4/32, length now 52
1571 17:38:42.289578 ACPI: * MADT
1572 17:38:42.289665 SCI is IRQ9
1573 17:38:42.292670 ACPI: added table 5/32, length now 56
1574 17:38:42.295785 current = 76b2d580
1575 17:38:42.299041 ACPI: * DMAR
1576 17:38:42.302237 ACPI: added table 6/32, length now 60
1577 17:38:42.306058 ACPI: added table 7/32, length now 64
1578 17:38:42.306153 ACPI: * HPET
1579 17:38:42.309227 ACPI: added table 8/32, length now 68
1580 17:38:42.312586 ACPI: done.
1581 17:38:42.315808 ACPI tables: 26304 bytes.
1582 17:38:42.319150 smbios_write_tables: 76a15000
1583 17:38:42.322865 EC returned error result code 3
1584 17:38:42.325964 Couldn't obtain OEM name from CBI
1585 17:38:42.329277 Create SMBIOS type 16
1586 17:38:42.329364 Create SMBIOS type 17
1587 17:38:42.332674 GENERIC: 0.0 (WIFI Device)
1588 17:38:42.335952 SMBIOS tables: 913 bytes.
1589 17:38:42.339223 Writing table forward entry at 0x00000500
1590 17:38:42.346008 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1591 17:38:42.349279 Writing coreboot table at 0x76b4b000
1592 17:38:42.355594 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1593 17:38:42.359238 1. 0000000000001000-000000000009ffff: RAM
1594 17:38:42.365913 2. 00000000000a0000-00000000000fffff: RESERVED
1595 17:38:42.368980 3. 0000000000100000-0000000076a14fff: RAM
1596 17:38:42.375716 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1597 17:38:42.378951 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1598 17:38:42.386056 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1599 17:38:42.388716 7. 0000000077000000-000000007fbfffff: RESERVED
1600 17:38:42.395840 8. 00000000c0000000-00000000cfffffff: RESERVED
1601 17:38:42.399043 9. 00000000fb000000-00000000fb000fff: RESERVED
1602 17:38:42.405048 10. 00000000fe000000-00000000fe00ffff: RESERVED
1603 17:38:42.408905 11. 00000000fea80000-00000000fea87fff: RESERVED
1604 17:38:42.415556 12. 00000000fed80000-00000000fed87fff: RESERVED
1605 17:38:42.418793 13. 00000000fed90000-00000000fed92fff: RESERVED
1606 17:38:42.422031 14. 00000000feda0000-00000000feda1fff: RESERVED
1607 17:38:42.428771 15. 0000000100000000-00000001803fffff: RAM
1608 17:38:42.432352 Passing 4 GPIOs to payload:
1609 17:38:42.435591 NAME | PORT | POLARITY | VALUE
1610 17:38:42.442191 lid | undefined | high | high
1611 17:38:42.445551 power | undefined | high | low
1612 17:38:42.452070 oprom | undefined | high | low
1613 17:38:42.455493 EC in RW | 0x000000b9 | high | low
1614 17:38:42.462082 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 2ab1
1615 17:38:42.465701 coreboot table: 1504 bytes.
1616 17:38:42.468693 IMD ROOT 0. 0x76fff000 0x00001000
1617 17:38:42.472106 IMD SMALL 1. 0x76ffe000 0x00001000
1618 17:38:42.479393 FSP MEMORY 2. 0x76c4e000 0x003b0000
1619 17:38:42.482654 CONSOLE 3. 0x76c2e000 0x00020000
1620 17:38:42.486029 FMAP 4. 0x76c2d000 0x00000578
1621 17:38:42.489065 TIME STAMP 5. 0x76c2c000 0x00000910
1622 17:38:42.492189 VBOOT WORK 6. 0x76c18000 0x00014000
1623 17:38:42.495378 ROMSTG STCK 7. 0x76c17000 0x00001000
1624 17:38:42.499202 AFTER CAR 8. 0x76c0d000 0x0000a000
1625 17:38:42.502437 RAMSTAGE 9. 0x76ba7000 0x00066000
1626 17:38:42.508923 REFCODE 10. 0x76b67000 0x00040000
1627 17:38:42.511885 SMM BACKUP 11. 0x76b57000 0x00010000
1628 17:38:42.515409 4f444749 12. 0x76b55000 0x00002000
1629 17:38:42.518811 EXT VBT13. 0x76b53000 0x00001c43
1630 17:38:42.522200 COREBOOT 14. 0x76b4b000 0x00008000
1631 17:38:42.525713 ACPI 15. 0x76b27000 0x00024000
1632 17:38:42.528840 ACPI GNVS 16. 0x76b26000 0x00001000
1633 17:38:42.532279 RAMOOPS 17. 0x76a26000 0x00100000
1634 17:38:42.535649 TPM2 TCGLOG18. 0x76a16000 0x00010000
1635 17:38:42.538579 SMBIOS 19. 0x76a15000 0x00000800
1636 17:38:42.541644 IMD small region:
1637 17:38:42.545552 IMD ROOT 0. 0x76ffec00 0x00000400
1638 17:38:42.548873 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1639 17:38:42.555532 VPD 2. 0x76ffeb60 0x0000006c
1640 17:38:42.558833 POWER STATE 3. 0x76ffeb20 0x00000040
1641 17:38:42.562048 ROMSTAGE 4. 0x76ffeb00 0x00000004
1642 17:38:42.565482 MEM INFO 5. 0x76ffe920 0x000001e0
1643 17:38:42.571744 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1644 17:38:42.575445 MTRR: Physical address space:
1645 17:38:42.581894 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1646 17:38:42.585230 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1647 17:38:42.591523 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1648 17:38:42.598625 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1649 17:38:42.604994 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1650 17:38:42.611681 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1651 17:38:42.618278 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1652 17:38:42.622003 MTRR: Fixed MSR 0x250 0x0606060606060606
1653 17:38:42.625007 MTRR: Fixed MSR 0x258 0x0606060606060606
1654 17:38:42.631831 MTRR: Fixed MSR 0x259 0x0000000000000000
1655 17:38:42.634867 MTRR: Fixed MSR 0x268 0x0606060606060606
1656 17:38:42.638214 MTRR: Fixed MSR 0x269 0x0606060606060606
1657 17:38:42.641556 MTRR: Fixed MSR 0x26a 0x0606060606060606
1658 17:38:42.644761 MTRR: Fixed MSR 0x26b 0x0606060606060606
1659 17:38:42.651146 MTRR: Fixed MSR 0x26c 0x0606060606060606
1660 17:38:42.654539 MTRR: Fixed MSR 0x26d 0x0606060606060606
1661 17:38:42.657851 MTRR: Fixed MSR 0x26e 0x0606060606060606
1662 17:38:42.661207 MTRR: Fixed MSR 0x26f 0x0606060606060606
1663 17:38:42.664592 call enable_fixed_mtrr()
1664 17:38:42.668632 CPU physical address size: 39 bits
1665 17:38:42.675195 MTRR: default type WB/UC MTRR counts: 6/5.
1666 17:38:42.678265 MTRR: UC selected as default type.
1667 17:38:42.684931 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1668 17:38:42.688109 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1669 17:38:42.694864 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1670 17:38:42.701421 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1671 17:38:42.707695 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1672 17:38:42.707809
1673 17:38:42.711002 MTRR check
1674 17:38:42.711114 Fixed MTRRs : Enabled
1675 17:38:42.714294 Variable MTRRs: Enabled
1676 17:38:42.714398
1677 17:38:42.718192 MTRR: Fixed MSR 0x250 0x0606060606060606
1678 17:38:42.724722 MTRR: Fixed MSR 0x258 0x0606060606060606
1679 17:38:42.728093 MTRR: Fixed MSR 0x259 0x0000000000000000
1680 17:38:42.731371 MTRR: Fixed MSR 0x268 0x0606060606060606
1681 17:38:42.734708 MTRR: Fixed MSR 0x269 0x0606060606060606
1682 17:38:42.740792 MTRR: Fixed MSR 0x26a 0x0606060606060606
1683 17:38:42.744334 MTRR: Fixed MSR 0x26b 0x0606060606060606
1684 17:38:42.747604 MTRR: Fixed MSR 0x26c 0x0606060606060606
1685 17:38:42.751498 MTRR: Fixed MSR 0x26d 0x0606060606060606
1686 17:38:42.754108 MTRR: Fixed MSR 0x26e 0x0606060606060606
1687 17:38:42.761170 MTRR: Fixed MSR 0x26f 0x0606060606060606
1688 17:38:42.764570 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1689 17:38:42.768028 call enable_fixed_mtrr()
1690 17:38:42.772024 Checking cr50 for pending updates
1691 17:38:42.775917 CPU physical address size: 39 bits
1692 17:38:42.779255 Reading cr50 TPM mode
1693 17:38:42.789126 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1694 17:38:42.796461 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1695 17:38:42.799672 Checking segment from ROM address 0xfff9d5b8
1696 17:38:42.806708 Checking segment from ROM address 0xfff9d5d4
1697 17:38:42.809951 Loading segment from ROM address 0xfff9d5b8
1698 17:38:42.813063 code (compression=0)
1699 17:38:42.819698 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1700 17:38:42.829519 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1701 17:38:42.832798 it's not compressed!
1702 17:38:42.958238 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1703 17:38:42.965039 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1704 17:38:42.972148 Loading segment from ROM address 0xfff9d5d4
1705 17:38:42.975438 Entry Point 0x30000000
1706 17:38:42.975519 Loaded segments
1707 17:38:42.982153 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1708 17:38:42.998044 Finalizing chipset.
1709 17:38:43.001353 Finalizing SMM.
1710 17:38:43.001475 APMC done.
1711 17:38:43.008267 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1712 17:38:43.011581 mp_park_aps done after 0 msecs.
1713 17:38:43.014720 Jumping to boot code at 0x30000000(0x76b4b000)
1714 17:38:43.024566 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1715 17:38:43.024694
1716 17:38:43.024793
1717 17:38:43.024887
1718 17:38:43.028313 Starting depthcharge on Magolor...
1719 17:38:43.028421
1720 17:38:43.028820 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1721 17:38:43.028951 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1722 17:38:43.029114 Setting prompt string to ['dedede:']
1723 17:38:43.029273 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1724 17:38:43.038132 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1725 17:38:43.038245
1726 17:38:43.044790 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1727 17:38:43.044900
1728 17:38:43.048269 fw_config match found: AUDIO_AMP=UNPROVISIONED
1729 17:38:43.048376
1730 17:38:43.051818 Wipe memory regions:
1731 17:38:43.051918
1732 17:38:43.054374 [0x00000000001000, 0x000000000a0000)
1733 17:38:43.054480
1734 17:38:43.057659 [0x00000000100000, 0x00000030000000)
1735 17:38:43.186878
1736 17:38:43.189503 [0x00000031062170, 0x00000076a15000)
1737 17:38:43.358839
1738 17:38:43.361872 [0x00000100000000, 0x00000180400000)
1739 17:38:44.424431
1740 17:38:44.424594 R8152: Initializing
1741 17:38:44.424694
1742 17:38:44.427657 Version 6 (ocp_data = 5c30)
1743 17:38:44.430901
1744 17:38:44.430981 R8152: Done initializing
1745 17:38:44.431055
1746 17:38:44.434201 Adding net device
1747 17:38:44.434305
1748 17:38:44.437570 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1749 17:38:44.440784
1750 17:38:44.440866
1751 17:38:44.440932
1752 17:38:44.441221 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1754 17:38:44.541624 dedede: tftpboot 192.168.201.1 11831855/tftp-deploy-qlu5j2mi/kernel/bzImage 11831855/tftp-deploy-qlu5j2mi/kernel/cmdline 11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
1755 17:38:44.541807 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1756 17:38:44.541904 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1757 17:38:44.545911 tftpboot 192.168.201.1 11831855/tftp-deploy-qlu5j2mi/kernel/bzImloy-qlu5j2mi/kernel/cmdline 11831855/tftp-deploy-qlu5j2mi/ramdisk/ramdisk.cpio.gz
1758 17:38:44.546052
1759 17:38:44.546123 Waiting for link
1760 17:38:44.747946
1761 17:38:44.748119 done.
1762 17:38:44.748188
1763 17:38:44.748250 MAC: 00:24:32:30:79:17
1764 17:38:44.748341
1765 17:38:44.751676 Sending DHCP discover... done.
1766 17:38:44.751762
1767 17:38:44.754418 Waiting for reply... done.
1768 17:38:44.754502
1769 17:38:44.757805 Sending DHCP request... done.
1770 17:38:44.757889
1771 17:38:44.968199 Waiting for reply... done.
1772 17:38:44.968374
1773 17:38:44.968492 My ip is 192.168.201.10
1774 17:38:44.968587
1775 17:38:44.971444 The DHCP server ip is 192.168.201.1
1776 17:38:44.974776
1777 17:38:44.978155 TFTP server IP predefined by user: 192.168.201.1
1778 17:38:44.978274
1779 17:38:44.984951 Bootfile predefined by user: 11831855/tftp-deploy-qlu5j2mi/kernel/bzImage
1780 17:38:44.985061
1781 17:38:44.988091 Sending tftp read request... done.
1782 17:38:44.988198
1783 17:38:44.991205 Waiting for the transfer...
1784 17:38:44.994207
1785 17:38:45.546306 00000000 ################################################################
1786 17:38:45.546455
1787 17:38:46.114425 00080000 ################################################################
1788 17:38:46.114617
1789 17:38:46.666797 00100000 ################################################################
1790 17:38:46.666976
1791 17:38:47.222736 00180000 ################################################################
1792 17:38:47.222943
1793 17:38:47.788884 00200000 ################################################################
1794 17:38:47.789527
1795 17:38:48.455503 00280000 ################################################################
1796 17:38:48.456025
1797 17:38:49.049028 00300000 ################################################################
1798 17:38:49.049201
1799 17:38:49.627644 00380000 ################################################################
1800 17:38:49.627826
1801 17:38:50.207772 00400000 ################################################################
1802 17:38:50.207912
1803 17:38:50.769812 00480000 ################################################################
1804 17:38:50.769965
1805 17:38:51.332025 00500000 ################################################################
1806 17:38:51.332173
1807 17:38:51.882003 00580000 ################################################################
1808 17:38:51.882171
1809 17:38:52.442156 00600000 ################################################################
1810 17:38:52.442323
1811 17:38:52.989857 00680000 ################################################################
1812 17:38:52.990007
1813 17:38:53.690632 00700000 ################################################################
1814 17:38:53.690853
1815 17:38:54.058996 00780000 ################################################################
1816 17:38:54.059143
1817 17:38:54.184150 00800000 ############### done.
1818 17:38:54.184285
1819 17:38:54.187366 The bootfile was 8507280 bytes long.
1820 17:38:54.187451
1821 17:38:54.191182 Sending tftp read request... done.
1822 17:38:54.191277
1823 17:38:54.194205 Waiting for the transfer...
1824 17:38:54.194316
1825 17:38:54.740071 00000000 ################################################################
1826 17:38:54.740218
1827 17:38:55.295186 00080000 ################################################################
1828 17:38:55.295331
1829 17:38:55.852754 00100000 ################################################################
1830 17:38:55.852894
1831 17:38:56.396123 00180000 ################################################################
1832 17:38:56.396264
1833 17:38:56.939211 00200000 ################################################################
1834 17:38:56.939373
1835 17:38:57.515773 00280000 ################################################################
1836 17:38:57.515942
1837 17:38:58.077871 00300000 ################################################################
1838 17:38:58.078008
1839 17:38:58.663065 00380000 ################################################################
1840 17:38:58.663200
1841 17:38:59.231745 00400000 ################################################################
1842 17:38:59.231897
1843 17:38:59.824799 00480000 ################################################################
1844 17:38:59.824950
1845 17:39:00.427483 00500000 ################################################################
1846 17:39:00.427867
1847 17:39:01.038824 00580000 ################################################################
1848 17:39:01.038961
1849 17:39:01.620927 00600000 ################################################################
1850 17:39:01.621076
1851 17:39:02.201594 00680000 ################################################################
1852 17:39:02.201738
1853 17:39:02.781413 00700000 ################################################################
1854 17:39:02.781616
1855 17:39:03.369508 00780000 ################################################################
1856 17:39:03.369639
1857 17:39:03.886371 00800000 ##################################################### done.
1858 17:39:03.886519
1859 17:39:03.889753 Sending tftp read request... done.
1860 17:39:03.889838
1861 17:39:03.892941 Waiting for the transfer...
1862 17:39:03.893028
1863 17:39:03.893098 00000000 # done.
1864 17:39:03.893162
1865 17:39:03.902831 Command line loaded dynamically from TFTP file: 11831855/tftp-deploy-qlu5j2mi/kernel/cmdline
1866 17:39:03.902931
1867 17:39:03.919780 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1868 17:39:03.919926
1869 17:39:03.922966 ec_init: CrosEC protocol v3 supported (256, 256)
1870 17:39:03.930803
1871 17:39:03.933910 Shutting down all USB controllers.
1872 17:39:03.934131
1873 17:39:03.934313 Removing current net device
1874 17:39:03.934503
1875 17:39:03.937508 Finalizing coreboot
1876 17:39:03.937782
1877 17:39:03.943918 Exiting depthcharge with code 4 at timestamp: 27723875
1878 17:39:03.944197
1879 17:39:03.944390
1880 17:39:03.944580 Starting kernel ...
1881 17:39:03.944750
1882 17:39:03.944917
1883 17:39:03.945636 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
1884 17:39:03.945927 start: 2.2.5 auto-login-action (timeout 00:04:26) [common]
1885 17:39:03.946136 Setting prompt string to ['Linux version [0-9]']
1886 17:39:03.946343 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1887 17:39:03.946541 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1889 17:43:29.946275 end: 2.2.5 auto-login-action (duration 00:04:26) [common]
1891 17:43:29.946645 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 266 seconds'
1893 17:43:29.947006 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1896 17:43:29.947502 end: 2 depthcharge-action (duration 00:05:00) [common]
1898 17:43:29.947947 Cleaning after the job
1899 17:43:29.948089 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/ramdisk
1900 17:43:29.949435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/kernel
1901 17:43:29.951142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831855/tftp-deploy-qlu5j2mi/modules
1902 17:43:29.951526 start: 5.1 power-off (timeout 00:00:30) [common]
1903 17:43:29.951719 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-7' '--port=1' '--command=off'
1904 17:43:30.034521 >> Command sent successfully.
1905 17:43:30.037291 Returned 0 in 0 seconds
1906 17:43:30.137856 end: 5.1 power-off (duration 00:00:00) [common]
1908 17:43:30.138208 start: 5.2 read-feedback (timeout 00:10:00) [common]
1909 17:43:30.138475 Listened to connection for namespace 'common' for up to 1s
1911 17:43:30.138846 Listened to connection for namespace 'common' for up to 1s
1912 17:43:31.138864 Finalising connection for namespace 'common'
1913 17:43:31.139036 Disconnecting from shell: Finalise
1914 17:43:31.139124
1915 17:43:31.239441 end: 5.2 read-feedback (duration 00:00:01) [common]
1916 17:43:31.239617 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831855
1917 17:43:31.257213 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831855
1918 17:43:31.257434 JobError: Your job cannot terminate cleanly.