Boot log: acer-cbv514-1h-34uz-brya
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:38:35.203506 lava-dispatcher, installed at version: 2023.08
2 17:38:35.203732 start: 0 validate
3 17:38:35.203862 Start time: 2023-10-20 17:38:35.203854+00:00 (UTC)
4 17:38:35.204025 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:38:35.204207 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:38:35.478955 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:38:35.479144 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:38:35.736109 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:38:35.736297 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:38:38.954299 validate duration: 3.75
12 17:38:38.954781 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:38:38.954941 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:38:38.955109 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:38:38.955305 Not decompressing ramdisk as can be used compressed.
16 17:38:38.955444 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:38:38.955573 saving as /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/ramdisk/rootfs.cpio.gz
18 17:38:38.955673 total size: 8418130 (8 MB)
19 17:38:39.482372 progress 0 % (0 MB)
20 17:38:39.484888 progress 5 % (0 MB)
21 17:38:39.487321 progress 10 % (0 MB)
22 17:38:39.489803 progress 15 % (1 MB)
23 17:38:39.492189 progress 20 % (1 MB)
24 17:38:39.494550 progress 25 % (2 MB)
25 17:38:39.496976 progress 30 % (2 MB)
26 17:38:39.499203 progress 35 % (2 MB)
27 17:38:39.501600 progress 40 % (3 MB)
28 17:38:39.503990 progress 45 % (3 MB)
29 17:38:39.506406 progress 50 % (4 MB)
30 17:38:39.508797 progress 55 % (4 MB)
31 17:38:39.511195 progress 60 % (4 MB)
32 17:38:39.513424 progress 65 % (5 MB)
33 17:38:39.515753 progress 70 % (5 MB)
34 17:38:39.518060 progress 75 % (6 MB)
35 17:38:39.520268 progress 80 % (6 MB)
36 17:38:39.522514 progress 85 % (6 MB)
37 17:38:39.524715 progress 90 % (7 MB)
38 17:38:39.526952 progress 95 % (7 MB)
39 17:38:39.529105 progress 100 % (8 MB)
40 17:38:39.529356 8 MB downloaded in 0.57 s (13.99 MB/s)
41 17:38:39.529561 end: 1.1.1 http-download (duration 00:00:01) [common]
43 17:38:39.529819 end: 1.1 download-retry (duration 00:00:01) [common]
44 17:38:39.529910 start: 1.2 download-retry (timeout 00:09:59) [common]
45 17:38:39.530001 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 17:38:39.530134 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:38:39.530209 saving as /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/kernel/bzImage
48 17:38:39.530274 total size: 8507280 (8 MB)
49 17:38:39.530343 No compression specified
50 17:38:39.531854 progress 0 % (0 MB)
51 17:38:39.534151 progress 5 % (0 MB)
52 17:38:39.536493 progress 10 % (0 MB)
53 17:38:39.538869 progress 15 % (1 MB)
54 17:38:39.541251 progress 20 % (1 MB)
55 17:38:39.543491 progress 25 % (2 MB)
56 17:38:39.545774 progress 30 % (2 MB)
57 17:38:39.548016 progress 35 % (2 MB)
58 17:38:39.550355 progress 40 % (3 MB)
59 17:38:39.552640 progress 45 % (3 MB)
60 17:38:39.554923 progress 50 % (4 MB)
61 17:38:39.557207 progress 55 % (4 MB)
62 17:38:39.559424 progress 60 % (4 MB)
63 17:38:39.561666 progress 65 % (5 MB)
64 17:38:39.563911 progress 70 % (5 MB)
65 17:38:39.566299 progress 75 % (6 MB)
66 17:38:39.568607 progress 80 % (6 MB)
67 17:38:39.570937 progress 85 % (6 MB)
68 17:38:39.573292 progress 90 % (7 MB)
69 17:38:39.575566 progress 95 % (7 MB)
70 17:38:39.577871 progress 100 % (8 MB)
71 17:38:39.578089 8 MB downloaded in 0.05 s (169.69 MB/s)
72 17:38:39.578242 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:38:39.578473 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:38:39.578568 start: 1.3 download-retry (timeout 00:09:59) [common]
76 17:38:39.578662 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 17:38:39.578796 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:38:39.578868 saving as /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/modules/modules.tar
79 17:38:39.578957 total size: 253900 (0 MB)
80 17:38:39.579052 Using unxz to decompress xz
81 17:38:39.582861 progress 12 % (0 MB)
82 17:38:39.583265 progress 25 % (0 MB)
83 17:38:39.583569 progress 38 % (0 MB)
84 17:38:39.584849 progress 51 % (0 MB)
85 17:38:39.586739 progress 64 % (0 MB)
86 17:38:39.588727 progress 77 % (0 MB)
87 17:38:39.590682 progress 90 % (0 MB)
88 17:38:39.592504 progress 100 % (0 MB)
89 17:38:39.598588 0 MB downloaded in 0.02 s (12.34 MB/s)
90 17:38:39.598846 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:38:39.599132 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:38:39.599276 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
94 17:38:39.599409 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
95 17:38:39.599542 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:38:39.599667 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
97 17:38:39.599952 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj
98 17:38:39.600121 makedir: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin
99 17:38:39.600258 makedir: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/tests
100 17:38:39.600390 makedir: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/results
101 17:38:39.600535 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-add-keys
102 17:38:39.600745 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-add-sources
103 17:38:39.600923 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-background-process-start
104 17:38:39.601110 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-background-process-stop
105 17:38:39.601276 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-common-functions
106 17:38:39.601449 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-echo-ipv4
107 17:38:39.601614 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-install-packages
108 17:38:39.601841 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-installed-packages
109 17:38:39.602020 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-os-build
110 17:38:39.602227 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-probe-channel
111 17:38:39.602416 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-probe-ip
112 17:38:39.602578 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-target-ip
113 17:38:39.602767 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-target-mac
114 17:38:39.602927 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-target-storage
115 17:38:39.603132 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-case
116 17:38:39.603303 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-event
117 17:38:39.603457 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-feedback
118 17:38:39.603613 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-raise
119 17:38:39.603799 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-reference
120 17:38:39.603985 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-runner
121 17:38:39.604138 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-set
122 17:38:39.604296 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-test-shell
123 17:38:39.604456 Updating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-install-packages (oe)
124 17:38:39.604635 Updating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/bin/lava-installed-packages (oe)
125 17:38:39.604815 Creating /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/environment
126 17:38:39.604983 LAVA metadata
127 17:38:39.605091 - LAVA_JOB_ID=11831825
128 17:38:39.605190 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:38:39.605330 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
130 17:38:39.605434 skipped lava-vland-overlay
131 17:38:39.605547 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:38:39.605663 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
133 17:38:39.605757 skipped lava-multinode-overlay
134 17:38:39.605862 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:38:39.605981 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
136 17:38:39.606087 Loading test definitions
137 17:38:39.606214 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
138 17:38:39.606368 Using /lava-11831825 at stage 0
139 17:38:39.606837 uuid=11831825_1.4.2.3.1 testdef=None
140 17:38:39.606957 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:38:39.607080 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
142 17:38:39.607857 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:38:39.608208 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
145 17:38:39.609000 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:38:39.609269 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
148 17:38:39.609953 runner path: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/0/tests/0_dmesg test_uuid 11831825_1.4.2.3.1
149 17:38:39.610110 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:38:39.610351 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
152 17:38:39.610425 Using /lava-11831825 at stage 1
153 17:38:39.610720 uuid=11831825_1.4.2.3.5 testdef=None
154 17:38:39.610812 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:38:39.610905 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
156 17:38:39.611373 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:38:39.611588 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
159 17:38:39.612246 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:38:39.612485 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
162 17:38:39.613216 runner path: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/1/tests/1_bootrr test_uuid 11831825_1.4.2.3.5
163 17:38:39.613410 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:38:39.613644 Creating lava-test-runner.conf files
166 17:38:39.613711 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/0 for stage 0
167 17:38:39.613798 - 0_dmesg
168 17:38:39.613884 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831825/lava-overlay-vcrazfkj/lava-11831825/1 for stage 1
169 17:38:39.613977 - 1_bootrr
170 17:38:39.614073 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:38:39.614161 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
172 17:38:39.623125 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:38:39.623239 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
174 17:38:39.623330 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:38:39.623423 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:38:39.623511 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
177 17:38:39.874443 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:38:39.874849 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
179 17:38:39.874996 extracting modules file /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831825/extract-overlay-ramdisk-dixbc1xs/ramdisk
180 17:38:39.891827 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:38:39.891964 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
182 17:38:39.892084 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831825/compress-overlay-ltk23bcm/overlay-1.4.2.4.tar.gz to ramdisk
183 17:38:39.892187 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831825/compress-overlay-ltk23bcm/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831825/extract-overlay-ramdisk-dixbc1xs/ramdisk
184 17:38:39.903308 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:38:39.903470 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
186 17:38:39.903600 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:38:39.903703 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
188 17:38:39.903792 Building ramdisk /var/lib/lava/dispatcher/tmp/11831825/extract-overlay-ramdisk-dixbc1xs/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831825/extract-overlay-ramdisk-dixbc1xs/ramdisk
189 17:38:40.020818 >> 49827 blocks
190 17:38:40.874353 rename /var/lib/lava/dispatcher/tmp/11831825/extract-overlay-ramdisk-dixbc1xs/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
191 17:38:40.874821 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:38:40.874981 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
193 17:38:40.875120 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
194 17:38:40.875260 No mkimage arch provided, not using FIT.
195 17:38:40.875386 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:38:40.875513 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:38:40.875663 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:38:40.875792 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
199 17:38:40.875908 No LXC device requested
200 17:38:40.876031 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:38:40.876159 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
202 17:38:40.876290 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:38:40.876401 Checking files for TFTP limit of 4294967296 bytes.
204 17:38:40.876976 end: 1 tftp-deploy (duration 00:00:02) [common]
205 17:38:40.877123 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:38:40.877257 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:38:40.877430 substitutions:
208 17:38:40.877529 - {DTB}: None
209 17:38:40.877623 - {INITRD}: 11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
210 17:38:40.877723 - {KERNEL}: 11831825/tftp-deploy-i650dzlc/kernel/bzImage
211 17:38:40.877812 - {LAVA_MAC}: None
212 17:38:40.877902 - {PRESEED_CONFIG}: None
213 17:38:40.877988 - {PRESEED_LOCAL}: None
214 17:38:40.878080 - {RAMDISK}: 11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
215 17:38:40.878169 - {ROOT_PART}: None
216 17:38:40.878254 - {ROOT}: None
217 17:38:40.878347 - {SERVER_IP}: 192.168.201.1
218 17:38:40.878434 - {TEE}: None
219 17:38:40.878525 Parsed boot commands:
220 17:38:40.878613 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:38:40.878840 Parsed boot commands: tftpboot 192.168.201.1 11831825/tftp-deploy-i650dzlc/kernel/bzImage 11831825/tftp-deploy-i650dzlc/kernel/cmdline 11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
222 17:38:40.878961 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:38:40.879089 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:38:40.879220 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:38:40.879343 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:38:40.879451 Not connected, no need to disconnect.
227 17:38:40.879561 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:38:40.879833 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:38:40.879939 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-0'
230 17:38:40.883561 Setting prompt string to ['lava-test: # ']
231 17:38:40.883939 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:38:40.884085 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:38:40.884217 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:38:40.884352 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:38:40.884700 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=reboot'
236 17:38:46.030914 >> Command sent successfully.
237 17:38:46.037854 Returned 0 in 5 seconds
238 17:38:46.138442 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
240 17:38:46.138762 end: 2.2.2 reset-device (duration 00:00:05) [common]
241 17:38:46.138872 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
242 17:38:46.138959 Setting prompt string to 'Starting depthcharge on Volmar...'
243 17:38:46.139027 Changing prompt to 'Starting depthcharge on Volmar...'
244 17:38:46.139104 depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
245 17:38:46.139364 [Enter `^Ec?' for help]
246 17:38:47.930679
247 17:38:47.930972
248 17:38:47.937336 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 bootblock starting (log level: 8)...
249 17:38:47.940264 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
250 17:38:47.947140 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
251 17:38:47.953611 CPU: AES supported, TXT NOT supported, VT supported
252 17:38:47.960409 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
253 17:38:47.960547 Cache size = 10 MiB
254 17:38:47.967395 MCH: device id 4609 (rev 04) is Alderlake-P
255 17:38:47.970701 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
256 17:38:47.977265 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
257 17:38:47.980600 VBOOT: Loading verstage.
258 17:38:47.984052 FMAP: Found "FLASH" version 1.1 at 0x1804000.
259 17:38:47.986914 FMAP: base = 0x0 size = 0x2000000 #areas = 37
260 17:38:47.993548 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
261 17:38:48.000319 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
262 17:38:48.010581 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
263 17:38:48.010720
264 17:38:48.010866
265 17:38:48.020144 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
266 17:38:48.023632 Probing TPM I2C: I2C bus 1 version 0x3230302a
267 17:38:48.026908 DW I2C bus 1 at 0xfe022000 (400 KHz)
268 17:38:48.030405 I2C TX abort detected (00000001)
269 17:38:48.037143 cr50_i2c_read: Address write failed
270 17:38:48.047484 .done! DID_VID 0x00281ae0
271 17:38:48.051026 TPM ready after 0 ms
272 17:38:48.054380 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
273 17:38:48.068259 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
274 17:38:48.074513 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 17:38:48.121529 tlcl_send_startup: Startup return code is 0
276 17:38:48.121694 TPM: setup succeeded
277 17:38:48.141003 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 17:38:48.162847 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 17:38:48.167518 Chrome EC: UHEPI supported
280 17:38:48.170421 Reading cr50 boot mode
281 17:38:48.187560 Cr50 says boot_mode is VERIFIED_RW(0x00).
282 17:38:48.187696 Phase 1
283 17:38:48.190724 FMAP: area GBB found @ 1805000 (458752 bytes)
284 17:38:48.200841 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
285 17:38:48.207557 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
286 17:38:48.214133 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
287 17:38:48.214242 Phase 2
288 17:38:48.217215 Phase 3
289 17:38:48.220748 FMAP: area GBB found @ 1805000 (458752 bytes)
290 17:38:48.227442 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
291 17:38:48.230821 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
292 17:38:48.237567 VB2:vb2_verify_keyblock() Checking keyblock signature...
293 17:38:48.244328 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
294 17:38:48.250568 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
295 17:38:48.257394 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
296 17:38:48.271652 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
297 17:38:48.275064 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
298 17:38:48.281999 VB2:vb2_verify_fw_preamble() Verifying preamble.
299 17:38:48.288327 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
300 17:38:48.295449 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
301 17:38:48.301639 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
302 17:38:48.305581 Phase 4
303 17:38:48.309118 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
304 17:38:48.315818 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
305 17:38:48.528042 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
306 17:38:48.534839 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
307 17:38:48.538389 Saving vboot hash.
308 17:38:48.544828 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
309 17:38:48.560699 tlcl_extend: response is 0
310 17:38:48.566990 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
311 17:38:48.574383 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
312 17:38:48.588838 tlcl_extend: response is 0
313 17:38:48.595263 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
314 17:38:48.614069 tlcl_lock_nv_write: response is 0
315 17:38:48.632811 tlcl_lock_nv_write: response is 0
316 17:38:48.632973 Slot A is selected
317 17:38:48.639225 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
318 17:38:48.646361 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
319 17:38:48.652805 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
320 17:38:48.659564 BS: verstage times (exec / console): total (unknown) / 264 ms
321 17:38:48.659649
322 17:38:48.659731
323 17:38:48.666087 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
324 17:38:48.670048 Google Chrome EC: version:
325 17:38:48.673555 ro: volmar_v2.0.14126-e605144e9c
326 17:38:48.676729 rw: volmar_v0.0.55-22d1557
327 17:38:48.680494 running image: 2
328 17:38:48.683300 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
329 17:38:48.693214 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
330 17:38:48.699978 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
331 17:38:48.706510 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
332 17:38:48.717114 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
333 17:38:48.726476 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
334 17:38:48.730251 EC took 1547us to calculate image hash
335 17:38:48.743144 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
336 17:38:48.746312 VB2:sync_ec() select_rw=RW(active)
337 17:38:48.755905 Waited 275us to clear limit power flag.
338 17:38:48.759833 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 17:38:48.763410 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
340 17:38:48.767096 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 17:38:48.773221 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
342 17:38:48.776822 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
343 17:38:48.776946 TCO_STS: 0000 0000
344 17:38:48.780024 GEN_PMCON: d0015038 00002200
345 17:38:48.783350 GBLRST_CAUSE: 00000000 00000000
346 17:38:48.786689 HPR_CAUSE0: 00000000
347 17:38:48.790140 prev_sleep_state 5
348 17:38:48.793033 Abort disabling TXT, as CPU is not TXT capable.
349 17:38:48.800484 cse_lite: Number of partitions = 3
350 17:38:48.803618 cse_lite: Current partition = RO
351 17:38:48.803698 cse_lite: Next partition = RO
352 17:38:48.807100 cse_lite: Flags = 0x7
353 17:38:48.813586 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
354 17:38:48.823181 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
355 17:38:48.826916 FMAP: area SI_ME found @ 1000 (5238784 bytes)
356 17:38:48.833303 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
357 17:38:48.840389 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
358 17:38:48.846632 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
359 17:38:48.850579 cse_lite: CSE CBFS RW version : 16.1.25.2049
360 17:38:48.856770 cse_lite: Set Boot Partition Info Command (RW)
361 17:38:48.860193 HECI: Global Reset(Type:1) Command
362 17:38:50.279253 11:29 UTC 2023 bootblock starting (log level: 8)...
363 17:38:50.282733 CPU: 12th Gen Intel(R) Core(TM) i3-1215U
364 17:38:50.289490 CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423
365 17:38:50.292924 CPU: AES supported, TXT NOT supported, VT supported
366 17:38:50.299625 Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384
367 17:38:50.302784 Cache size = 10 MiB
368 17:38:50.305963 MCH: device id 4609 (rev 04) is Alderlake-P
369 17:38:50.312657 PCH: device id 5182 (rev 01) is Raptorlake-P SKU
370 17:38:50.316091 IGD: device id 46b3 (rev 0c) is Alderlake P GT2
371 17:38:50.319961 VBOOT: Loading verstage.
372 17:38:50.324083 FMAP: Found "FLASH" version 1.1 at 0x1804000.
373 17:38:50.331053 FMAP: base = 0x0 size = 0x2000000 #areas = 37
374 17:38:50.334359 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
375 17:38:50.342227 CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes
376 17:38:50.348920 CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954
377 17:38:50.352741
378 17:38:50.352828
379 17:38:50.359337 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 verstage starting (log level: 8)...
380 17:38:50.366069 Probing TPM I2C: I2C bus 1 version 0x3230302a
381 17:38:50.369537 DW I2C bus 1 at 0xfe022000 (400 KHz)
382 17:38:50.372954 done! DID_VID 0x00281ae0
383 17:38:50.376359 TPM ready after 0 ms
384 17:38:50.379782 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
385 17:38:50.392624 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
386 17:38:50.395765 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
387 17:38:50.446742 tlcl_send_startup: Startup return code is 0
388 17:38:50.446855 TPM: setup succeeded
389 17:38:50.466369 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
390 17:38:50.488332 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
391 17:38:50.492365 Chrome EC: UHEPI supported
392 17:38:50.495638 Reading cr50 boot mode
393 17:38:50.510318 Cr50 says boot_mode is VERIFIED_RW(0x00).
394 17:38:50.510405 Phase 1
395 17:38:50.517097 FMAP: area GBB found @ 1805000 (458752 bytes)
396 17:38:50.523704 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 17:38:50.530420 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 17:38:50.537347 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 17:38:50.537436 Phase 2
400 17:38:50.540173 Phase 3
401 17:38:50.543519 FMAP: area GBB found @ 1805000 (458752 bytes)
402 17:38:50.550634 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
403 17:38:50.554198 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
404 17:38:50.560270 VB2:vb2_verify_keyblock() Checking keyblock signature...
405 17:38:50.567154 VB2:vb2_verify_data() HW crypto for hash_alg 3 not supported, using SW
406 17:38:50.573809 VB2:vb2_verify_digest() HW RSA for sig_alg 5 not supported, using SW
407 17:38:50.580731 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 5 not supported, using SW
408 17:38:50.595208 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
409 17:38:50.598570 FMAP: area VBLOCK_A found @ 500000 (65536 bytes)
410 17:38:50.605476 VB2:vb2_verify_fw_preamble() Verifying preamble.
411 17:38:50.611772 VB2:vb2_verify_data() Using HW crypto engine for hash_alg 2
412 17:38:50.618840 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
413 17:38:50.625008 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
414 17:38:50.629024 Phase 4
415 17:38:50.632383 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
416 17:38:50.639359 VB2:vb2api_init_hash() Using HW crypto engine for hash_alg 2
417 17:38:50.852068 VB2:vb2_verify_digest() HW RSA for sig_alg 4 not supported, using SW
418 17:38:50.858334 VB2:vb2_rsa_verify_digest() HW modexp for sig_alg 4 not supported, using SW
419 17:38:50.861663 Saving vboot hash.
420 17:38:50.868260 TPM: Extending digest for `VBOOT: boot mode` into PCR 0
421 17:38:50.884566 tlcl_extend: response is 0
422 17:38:50.891141 TPM: Digest of `VBOOT: boot mode` to PCR 0 measured
423 17:38:50.897351 TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1
424 17:38:50.911803 tlcl_extend: response is 0
425 17:38:50.918636 TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured
426 17:38:50.937212 tlcl_lock_nv_write: response is 0
427 17:38:50.956344 tlcl_lock_nv_write: response is 0
428 17:38:50.956431 Slot A is selected
429 17:38:50.962831 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
430 17:38:50.969610 CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes
431 17:38:50.976517 CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600
432 17:38:50.982931 BS: verstage times (exec / console): total (unknown) / 256 ms
433 17:38:50.983025
434 17:38:50.983095
435 17:38:50.989392 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 romstage starting (log level: 8)...
436 17:38:50.993515 Google Chrome EC: version:
437 17:38:50.996694 ro: volmar_v2.0.14126-e605144e9c
438 17:38:50.999859 rw: volmar_v0.0.55-22d1557
439 17:38:51.003135 running image: 2
440 17:38:51.006705 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
441 17:38:51.016898 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
442 17:38:51.023548 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
443 17:38:51.029928 CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c
444 17:38:51.039993 VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
445 17:38:51.050120 VB2:check_ec_hash() Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
446 17:38:51.056753 EC took 1793us to calculate image hash
447 17:38:51.066942 VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa
448 17:38:51.069800 VB2:sync_ec() select_rw=RW(active)
449 17:38:51.080246 Waited 270us to clear limit power flag.
450 17:38:51.083359 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
451 17:38:51.087092 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
452 17:38:51.090328 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
453 17:38:51.097249 gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000
454 17:38:51.100459 gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000
455 17:38:51.104104 TCO_STS: 0000 0000
456 17:38:51.106979 GEN_PMCON: d1001038 00002200
457 17:38:51.110767 GBLRST_CAUSE: 00000040 00000000
458 17:38:51.110868 HPR_CAUSE0: 00000000
459 17:38:51.113819 prev_sleep_state 5
460 17:38:51.116872 Abort disabling TXT, as CPU is not TXT capable.
461 17:38:51.124875 cse_lite: Number of partitions = 3
462 17:38:51.128471 cse_lite: Current partition = RW
463 17:38:51.128545 cse_lite: Next partition = RW
464 17:38:51.131688 cse_lite: Flags = 0x7
465 17:38:51.138044 cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)
466 17:38:51.148107 cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)
467 17:38:51.151487 FMAP: area SI_ME found @ 1000 (5238784 bytes)
468 17:38:51.158097 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
469 17:38:51.164961 cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000
470 17:38:51.171734 CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8
471 17:38:51.175149 cse_lite: CSE CBFS RW version : 16.1.25.2049
472 17:38:51.178276 Boot Count incremented to 2835
473 17:38:51.184965 CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4
474 17:38:51.191676 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
475 17:38:51.204314 Probing TPM I2C: done! DID_VID 0x00281ae0
476 17:38:51.207574 Locality already claimed
477 17:38:51.211182 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
478 17:38:51.230411 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0
479 17:38:51.237335 MRC: Hash idx 0x100d comparison successful.
480 17:38:51.240710 MRC cache found, size f6c8
481 17:38:51.240793 bootmode is set to: 2
482 17:38:51.244052 EC returned error result code 3
483 17:38:51.248037 FW_CONFIG value from CBI is 0x131
484 17:38:51.254850 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
485 17:38:51.254939 SPD index = 0
486 17:38:51.261870 CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c
487 17:38:51.265099 SPD: module type is LPDDR4X
488 17:38:51.271720 SPD: module part number is K4U6E3S4AB-MGCL
489 17:38:51.274875 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
490 17:38:51.281879 SPD: device width 16 bits, bus width 16 bits
491 17:38:51.284954 SPD: module size is 1024 MB (per channel)
492 17:38:51.353520 CBMEM:
493 17:38:51.356701 IMD: root @ 0x76fff000 254 entries.
494 17:38:51.360184 IMD: root @ 0x76ffec00 62 entries.
495 17:38:51.367951 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
496 17:38:51.371368 RO_VPD is uninitialized or empty.
497 17:38:51.374715 FMAP: area RW_VPD found @ f29000 (8192 bytes)
498 17:38:51.381028 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
499 17:38:51.384948 External stage cache:
500 17:38:51.388128 IMD: root @ 0x7bbff000 254 entries.
501 17:38:51.391712 IMD: root @ 0x7bbfec00 62 entries.
502 17:38:51.398351 FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)
503 17:38:51.404732 MRC: Checking cached data update for 'RW_MRC_CACHE'.
504 17:38:51.408070 MRC: 'RW_MRC_CACHE' does not need update.
505 17:38:51.408156 8 DIMMs found
506 17:38:51.411372 SMM Memory Map
507 17:38:51.414808 SMRAM : 0x7b800000 0x800000
508 17:38:51.418264 Subregion 0: 0x7b800000 0x200000
509 17:38:51.421086 Subregion 1: 0x7ba00000 0x200000
510 17:38:51.424497 Subregion 2: 0x7bc00000 0x400000
511 17:38:51.427852 top_of_ram = 0x77000000
512 17:38:51.431083 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
513 17:38:51.438412 MTRR Range: Start=7b800000 End=7c000000 (Size 800000)
514 17:38:51.444784 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
515 17:38:51.448142 MTRR Range: Start=ff000000 End=0 (Size 1000000)
516 17:38:51.448233 Normal boot
517 17:38:51.458171 CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948
518 17:38:51.464374 Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0
519 17:38:51.470871 Processing 237 relocs. Offset value of 0x74ab9000
520 17:38:51.478844 BS: romstage times (exec / console): total (unknown) / 377 ms
521 17:38:51.486151
522 17:38:51.486256
523 17:38:51.492860 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 postcar starting (log level: 8)...
524 17:38:51.492994 Normal boot
525 17:38:51.499602 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
526 17:38:51.506342 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
527 17:38:51.513257 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
528 17:38:51.523006 CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0
529 17:38:51.571359 Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0
530 17:38:51.577925 Processing 5931 relocs. Offset value of 0x72a2f000
531 17:38:51.581040 BS: postcar times (exec / console): total (unknown) / 51 ms
532 17:38:51.584263
533 17:38:51.584365
534 17:38:51.591275 coreboot-c7721883 Tue Feb 7 00:11:29 UTC 2023 ramstage starting (log level: 8)...
535 17:38:51.594443 Reserving BERT start 76a1e000, size 10000
536 17:38:51.597586 Normal boot
537 17:38:51.600876 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
538 17:38:51.607559 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
539 17:38:51.617991 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
540 17:38:51.620771 FMAP: area RW_VPD found @ f29000 (8192 bytes)
541 17:38:51.624365 Google Chrome EC: version:
542 17:38:51.627865 ro: volmar_v2.0.14126-e605144e9c
543 17:38:51.630752 rw: volmar_v0.0.55-22d1557
544 17:38:51.634271 running image: 2
545 17:38:51.637485 ACPI _SWS is PM1 Index 8 GPE Index -1
546 17:38:51.640669 BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms
547 17:38:51.645145 EC returned error result code 3
548 17:38:51.648340 FW_CONFIG value from CBI is 0x131
549 17:38:51.654955 fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED
550 17:38:51.658455 PCI: 00:1c.2 disabled by fw_config
551 17:38:51.665169 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
552 17:38:51.668321 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
553 17:38:51.675208 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
554 17:38:51.678531 fw_config match found: FPMCU_MASK=FPMCU_ENABLED
555 17:38:51.684827 FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)
556 17:38:51.691691 CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080
557 17:38:51.698521 microcode: sig=0x906a4 pf=0x80 revision=0x423
558 17:38:51.701783 microcode: Update skipped, already up-to-date
559 17:38:51.708565 CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314
560 17:38:51.740796 Detected 6 core, 8 thread CPU.
561 17:38:51.744210 Setting up SMI for CPU
562 17:38:51.747500 IED base = 0x7bc00000
563 17:38:51.747577 IED size = 0x00400000
564 17:38:51.751108 Will perform SMM setup.
565 17:38:51.754194 CPU: 12th Gen Intel(R) Core(TM) i3-1215U.
566 17:38:51.757407 LAPIC 0x0 in XAPIC mode.
567 17:38:51.767608 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
568 17:38:51.770923 Processing 18 relocs. Offset value of 0x00030000
569 17:38:51.775196 Attempting to start 7 APs
570 17:38:51.778351 Waiting for 10ms after sending INIT.
571 17:38:51.791895 Waiting for SIPI to complete...
572 17:38:51.794911 LAPIC 0x1 in XAPIC mode.
573 17:38:51.798104 LAPIC 0x16 in XAPIC mode.
574 17:38:51.801609 AP: slot 5 apic_id 1, MCU rev: 0x00000423
575 17:38:51.804877 LAPIC 0x14 in XAPIC mode.
576 17:38:51.808357 LAPIC 0x10 in XAPIC mode.
577 17:38:51.811618 AP: slot 1 apic_id 16, MCU rev: 0x00000423
578 17:38:51.815481 AP: slot 2 apic_id 10, MCU rev: 0x00000423
579 17:38:51.821674 AP: slot 4 apic_id 14, MCU rev: 0x00000423
580 17:38:51.821800 LAPIC 0x12 in XAPIC mode.
581 17:38:51.825261 done.
582 17:38:51.828601 AP: slot 3 apic_id 12, MCU rev: 0x00000423
583 17:38:51.831750 LAPIC 0x9 in XAPIC mode.
584 17:38:51.835150 LAPIC 0x8 in XAPIC mode.
585 17:38:51.838567 AP: slot 7 apic_id 9, MCU rev: 0x00000423
586 17:38:51.841455 AP: slot 6 apic_id 8, MCU rev: 0x00000423
587 17:38:51.844948 Waiting for SIPI to complete...
588 17:38:51.845072 done.
589 17:38:51.848322 smm_setup_relocation_handler: enter
590 17:38:51.851748 smm_setup_relocation_handler: exit
591 17:38:51.861718 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208
592 17:38:51.864954 Processing 11 relocs. Offset value of 0x00038000
593 17:38:51.871648 smm_module_setup_stub: stack_top = 0x7b804000
594 17:38:51.874906 smm_module_setup_stub: per cpu stack_size = 0x800
595 17:38:51.881925 smm_module_setup_stub: runtime.start32_offset = 0x4c
596 17:38:51.885169 smm_module_setup_stub: runtime.smm_size = 0x10000
597 17:38:51.891659 SMM Module: stub loaded at 38000. Will call 0x76a52094
598 17:38:51.894920 Installing permanent SMM handler to 0x7b800000
599 17:38:51.901699 smm_load_module: total_smm_space_needed e468, available -> 200000
600 17:38:51.911655 Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468
601 17:38:51.915158 Processing 255 relocs. Offset value of 0x7b9f6000
602 17:38:51.918462 smm_load_module: smram_start: 0x7b800000
603 17:38:51.924707 smm_load_module: smram_end: 7ba00000
604 17:38:51.928093 smm_load_module: handler start 0x7b9f6d5f
605 17:38:51.931572 smm_load_module: handler_size 98d0
606 17:38:51.934931 smm_load_module: fxsave_area 0x7b9ff000
607 17:38:51.938546 smm_load_module: fxsave_size 1000
608 17:38:51.941991 smm_load_module: CONFIG_MSEG_SIZE 0x0
609 17:38:51.948151 smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
610 17:38:51.951692 smm_load_module: handler_mod_params.smbase = 0x7b800000
611 17:38:51.958125 smm_load_module: per_cpu_save_state_size = 0x400
612 17:38:51.961460 smm_load_module: num_cpus = 0x8
613 17:38:51.968041 smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000
614 17:38:51.971332 smm_load_module: total_save_state_size = 0x2000
615 17:38:51.975015 smm_load_module: cpu0 entry: 7b9e6000
616 17:38:51.981455 smm_create_map: cpus allowed in one segment 30
617 17:38:51.984884 smm_create_map: min # of segments needed 1
618 17:38:51.984986 CPU 0x0
619 17:38:51.988265 smbase 7b9e6000 entry 7b9ee000
620 17:38:51.994843 ss_start 7b9f5c00 code_end 7b9ee208
621 17:38:51.994928 CPU 0x1
622 17:38:51.998476 smbase 7b9e5c00 entry 7b9edc00
623 17:38:52.005003 ss_start 7b9f5800 code_end 7b9ede08
624 17:38:52.005089 CPU 0x2
625 17:38:52.007927 smbase 7b9e5800 entry 7b9ed800
626 17:38:52.011326 ss_start 7b9f5400 code_end 7b9eda08
627 17:38:52.014567 CPU 0x3
628 17:38:52.017794 smbase 7b9e5400 entry 7b9ed400
629 17:38:52.021627 ss_start 7b9f5000 code_end 7b9ed608
630 17:38:52.021713 CPU 0x4
631 17:38:52.027909 smbase 7b9e5000 entry 7b9ed000
632 17:38:52.031627 ss_start 7b9f4c00 code_end 7b9ed208
633 17:38:52.031714 CPU 0x5
634 17:38:52.034457 smbase 7b9e4c00 entry 7b9ecc00
635 17:38:52.041285 ss_start 7b9f4800 code_end 7b9ece08
636 17:38:52.041371 CPU 0x6
637 17:38:52.044758 smbase 7b9e4800 entry 7b9ec800
638 17:38:52.048118 ss_start 7b9f4400 code_end 7b9eca08
639 17:38:52.051548 CPU 0x7
640 17:38:52.054950 smbase 7b9e4400 entry 7b9ec400
641 17:38:52.057880 ss_start 7b9f4000 code_end 7b9ec608
642 17:38:52.067962 Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208
643 17:38:52.071615 Processing 11 relocs. Offset value of 0x7b9ee000
644 17:38:52.078147 smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000
645 17:38:52.085011 SMM Module: placing smm entry code at 7b9edc00, cpu # 0x1
646 17:38:52.091798 smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes
647 17:38:52.094710 SMM Module: placing smm entry code at 7b9ed800, cpu # 0x2
648 17:38:52.101643 smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes
649 17:38:52.107849 SMM Module: placing smm entry code at 7b9ed400, cpu # 0x3
650 17:38:52.114658 smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes
651 17:38:52.121491 SMM Module: placing smm entry code at 7b9ed000, cpu # 0x4
652 17:38:52.127981 smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes
653 17:38:52.134896 SMM Module: placing smm entry code at 7b9ecc00, cpu # 0x5
654 17:38:52.141722 smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes
655 17:38:52.147947 SMM Module: placing smm entry code at 7b9ec800, cpu # 0x6
656 17:38:52.154842 smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes
657 17:38:52.158301 SMM Module: placing smm entry code at 7b9ec400, cpu # 0x7
658 17:38:52.164789 smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes
659 17:38:52.171342 smm_module_setup_stub: stack_top = 0x7b804000
660 17:38:52.174578 smm_module_setup_stub: per cpu stack_size = 0x800
661 17:38:52.181712 smm_module_setup_stub: runtime.start32_offset = 0x4c
662 17:38:52.184885 smm_module_setup_stub: runtime.smm_size = 0x200000
663 17:38:52.191145 SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f
664 17:38:52.195653 Clearing SMI status registers
665 17:38:52.198832 SMI_STS: PM1
666 17:38:52.198940 PM1_STS: WAK PWRBTN
667 17:38:52.209102 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0
668 17:38:52.209237 In relocation handler: CPU 0
669 17:38:52.215328 New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000
670 17:38:52.218733 Writing SMRR. base = 0x7b800006, mask=0xff800c00
671 17:38:52.222173 Relocation complete.
672 17:38:52.228716 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5
673 17:38:52.232546 In relocation handler: CPU 5
674 17:38:52.235531 New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000
675 17:38:52.238942 Relocation complete.
676 17:38:52.245711 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3
677 17:38:52.249172 In relocation handler: CPU 3
678 17:38:52.252631 New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000
679 17:38:52.258828 Writing SMRR. base = 0x7b800006, mask=0xff800c00
680 17:38:52.258937 Relocation complete.
681 17:38:52.265927 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2
682 17:38:52.269101 In relocation handler: CPU 2
683 17:38:52.272496 New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000
684 17:38:52.279334 Writing SMRR. base = 0x7b800006, mask=0xff800c00
685 17:38:52.279439 Relocation complete.
686 17:38:52.289238 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1
687 17:38:52.292251 In relocation handler: CPU 1
688 17:38:52.295318 New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000
689 17:38:52.298941 Writing SMRR. base = 0x7b800006, mask=0xff800c00
690 17:38:52.302226 Relocation complete.
691 17:38:52.308852 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4
692 17:38:52.312240 In relocation handler: CPU 4
693 17:38:52.315610 New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000
694 17:38:52.322296 Writing SMRR. base = 0x7b800006, mask=0xff800c00
695 17:38:52.322415 Relocation complete.
696 17:38:52.329130 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6
697 17:38:52.332548 In relocation handler: CPU 6
698 17:38:52.335846 New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000
699 17:38:52.342135 Writing SMRR. base = 0x7b800006, mask=0xff800c00
700 17:38:52.346004 Relocation complete.
701 17:38:52.352304 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7
702 17:38:52.356004 In relocation handler: CPU 7
703 17:38:52.359139 New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000
704 17:38:52.359232 Relocation complete.
705 17:38:52.362701 Initializing CPU #0
706 17:38:52.366090 CPU: vendor Intel device 906a4
707 17:38:52.369219 CPU: family 06, model 9a, stepping 04
708 17:38:52.372606 Clearing out pending MCEs
709 17:38:52.376125 cpu: energy policy set to 7
710 17:38:52.378921 Turbo is available but hidden
711 17:38:52.382371 Turbo is available and visible
712 17:38:52.385842 microcode: Update skipped, already up-to-date
713 17:38:52.389171 CPU #0 initialized
714 17:38:52.389255 Initializing CPU #5
715 17:38:52.392355 Initializing CPU #3
716 17:38:52.395812 CPU: vendor Intel device 906a4
717 17:38:52.399031 CPU: family 06, model 9a, stepping 04
718 17:38:52.402743 Initializing CPU #4
719 17:38:52.402824 Initializing CPU #1
720 17:38:52.405870 Initializing CPU #2
721 17:38:52.409146 CPU: vendor Intel device 906a4
722 17:38:52.412281 CPU: family 06, model 9a, stepping 04
723 17:38:52.416439 CPU: vendor Intel device 906a4
724 17:38:52.419056 CPU: family 06, model 9a, stepping 04
725 17:38:52.422362 Clearing out pending MCEs
726 17:38:52.425783 Clearing out pending MCEs
727 17:38:52.425869 Clearing out pending MCEs
728 17:38:52.429291 CPU: vendor Intel device 906a4
729 17:38:52.432754 CPU: family 06, model 9a, stepping 04
730 17:38:52.436052 Initializing CPU #7
731 17:38:52.439272 CPU: vendor Intel device 906a4
732 17:38:52.442696 CPU: family 06, model 9a, stepping 04
733 17:38:52.445568 cpu: energy policy set to 7
734 17:38:52.448957 cpu: energy policy set to 7
735 17:38:52.452286 CPU: vendor Intel device 906a4
736 17:38:52.455709 CPU: family 06, model 9a, stepping 04
737 17:38:52.459086 Clearing out pending MCEs
738 17:38:52.462471 microcode: Update skipped, already up-to-date
739 17:38:52.465955 CPU #3 initialized
740 17:38:52.466041 Clearing out pending MCEs
741 17:38:52.469174 cpu: energy policy set to 7
742 17:38:52.475972 microcode: Update skipped, already up-to-date
743 17:38:52.476059 CPU #4 initialized
744 17:38:52.482616 microcode: Update skipped, already up-to-date
745 17:38:52.482702 CPU #2 initialized
746 17:38:52.485893 cpu: energy policy set to 7
747 17:38:52.489311 Initializing CPU #6
748 17:38:52.489398 Clearing out pending MCEs
749 17:38:52.495731 microcode: Update skipped, already up-to-date
750 17:38:52.495818 CPU #1 initialized
751 17:38:52.499264 CPU: vendor Intel device 906a4
752 17:38:52.505870 CPU: family 06, model 9a, stepping 04
753 17:38:52.505956 cpu: energy policy set to 7
754 17:38:52.509001 Clearing out pending MCEs
755 17:38:52.515885 microcode: Update skipped, already up-to-date
756 17:38:52.515970 CPU #7 initialized
757 17:38:52.519030 cpu: energy policy set to 7
758 17:38:52.522534 cpu: energy policy set to 7
759 17:38:52.525700 microcode: Update skipped, already up-to-date
760 17:38:52.529407 CPU #5 initialized
761 17:38:52.532548 microcode: Update skipped, already up-to-date
762 17:38:52.535907 CPU #6 initialized
763 17:38:52.539373 bsp_do_flight_plan done after 689 msecs.
764 17:38:52.542601 CPU: frequency set to 4400 MHz
765 17:38:52.542689 Enabling SMIs.
766 17:38:52.548852 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms
767 17:38:52.566481 Probing TPM I2C: done! DID_VID 0x00281ae0
768 17:38:52.569807 Locality already claimed
769 17:38:52.572550 cr50 TPM 2.0 (i2c 1:0x50 id 0x28)
770 17:38:52.584396 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9
771 17:38:52.587353 Enabling GPIO PM b/c CR50 has long IRQ pulse support
772 17:38:52.594442 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
773 17:38:52.601265 CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8
774 17:38:52.604258 Found a VBT of 9216 bytes after decompression
775 17:38:52.607502 PCI 1.0, PIN A, using IRQ #16
776 17:38:52.610612 PCI 2.0, PIN A, using IRQ #17
777 17:38:52.614352 PCI 4.0, PIN A, using IRQ #18
778 17:38:52.617588 PCI 5.0, PIN A, using IRQ #16
779 17:38:52.620709 PCI 6.0, PIN A, using IRQ #16
780 17:38:52.624505 PCI 6.2, PIN C, using IRQ #18
781 17:38:52.627735 PCI 7.0, PIN A, using IRQ #19
782 17:38:52.630986 PCI 7.1, PIN B, using IRQ #20
783 17:38:52.634478 PCI 7.2, PIN C, using IRQ #21
784 17:38:52.638140 PCI 7.3, PIN D, using IRQ #22
785 17:38:52.640674 PCI 8.0, PIN A, using IRQ #23
786 17:38:52.644462 PCI D.0, PIN A, using IRQ #17
787 17:38:52.644536 PCI D.1, PIN B, using IRQ #19
788 17:38:52.647671 PCI 10.0, PIN A, using IRQ #24
789 17:38:52.650943 PCI 10.1, PIN B, using IRQ #25
790 17:38:52.654329 PCI 10.6, PIN C, using IRQ #20
791 17:38:52.657720 PCI 10.7, PIN D, using IRQ #21
792 17:38:52.661324 PCI 11.0, PIN A, using IRQ #26
793 17:38:52.664308 PCI 11.1, PIN B, using IRQ #27
794 17:38:52.667482 PCI 11.2, PIN C, using IRQ #28
795 17:38:52.671125 PCI 11.3, PIN D, using IRQ #29
796 17:38:52.674337 PCI 12.0, PIN A, using IRQ #30
797 17:38:52.678077 PCI 12.6, PIN B, using IRQ #31
798 17:38:52.681225 PCI 12.7, PIN C, using IRQ #22
799 17:38:52.684558 PCI 13.0, PIN A, using IRQ #32
800 17:38:52.687385 PCI 13.1, PIN B, using IRQ #33
801 17:38:52.690942 PCI 13.2, PIN C, using IRQ #34
802 17:38:52.694235 PCI 13.3, PIN D, using IRQ #35
803 17:38:52.694345 PCI 14.0, PIN B, using IRQ #23
804 17:38:52.697757 PCI 14.1, PIN A, using IRQ #36
805 17:38:52.700762 PCI 14.3, PIN C, using IRQ #17
806 17:38:52.704298 PCI 15.0, PIN A, using IRQ #37
807 17:38:52.707798 PCI 15.1, PIN B, using IRQ #38
808 17:38:52.711106 PCI 15.2, PIN C, using IRQ #39
809 17:38:52.714281 PCI 15.3, PIN D, using IRQ #40
810 17:38:52.717414 PCI 16.0, PIN A, using IRQ #18
811 17:38:52.721155 PCI 16.1, PIN B, using IRQ #19
812 17:38:52.724399 PCI 16.2, PIN C, using IRQ #20
813 17:38:52.727743 PCI 16.3, PIN D, using IRQ #21
814 17:38:52.731015 PCI 16.4, PIN A, using IRQ #18
815 17:38:52.734635 PCI 16.5, PIN B, using IRQ #19
816 17:38:52.737756 PCI 17.0, PIN A, using IRQ #22
817 17:38:52.740845 PCI 19.0, PIN A, using IRQ #41
818 17:38:52.740989 PCI 19.1, PIN B, using IRQ #42
819 17:38:52.744235 PCI 19.2, PIN C, using IRQ #43
820 17:38:52.747845 PCI 1C.0, PIN A, using IRQ #16
821 17:38:52.750831 PCI 1C.1, PIN B, using IRQ #17
822 17:38:52.754515 PCI 1C.2, PIN C, using IRQ #18
823 17:38:52.758089 PCI 1C.3, PIN D, using IRQ #19
824 17:38:52.761028 PCI 1C.4, PIN A, using IRQ #16
825 17:38:52.764303 PCI 1C.5, PIN B, using IRQ #17
826 17:38:52.767688 PCI 1C.6, PIN C, using IRQ #18
827 17:38:52.771256 PCI 1C.7, PIN D, using IRQ #19
828 17:38:52.774743 PCI 1D.0, PIN A, using IRQ #16
829 17:38:52.777545 PCI 1D.1, PIN B, using IRQ #17
830 17:38:52.780838 PCI 1D.2, PIN C, using IRQ #18
831 17:38:52.784471 PCI 1D.3, PIN D, using IRQ #19
832 17:38:52.787293 PCI 1E.0, PIN A, using IRQ #23
833 17:38:52.790734 PCI 1E.1, PIN B, using IRQ #20
834 17:38:52.794417 PCI 1E.2, PIN C, using IRQ #44
835 17:38:52.794522 PCI 1E.3, PIN D, using IRQ #45
836 17:38:52.797660 PCI 1F.3, PIN B, using IRQ #22
837 17:38:52.801398 PCI 1F.4, PIN C, using IRQ #23
838 17:38:52.804266 PCI 1F.6, PIN D, using IRQ #20
839 17:38:52.807413 PCI 1F.7, PIN A, using IRQ #21
840 17:38:52.814343 IRQ: Using dynamically assigned PCI IO-APIC IRQs
841 17:38:52.820925 WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called
842 17:38:53.003608 FSPS returned 0
843 17:38:53.006975 Executing Phase 1 of FspMultiPhaseSiInit
844 17:38:53.016895 FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
845 17:38:53.019943 port C0 DISC req: usage 1 usb3 1 usb2 1
846 17:38:53.023847 Raw Buffer output 0 00000111
847 17:38:53.026662 Raw Buffer output 1 00000000
848 17:38:53.030667 pmc_send_ipc_cmd succeeded
849 17:38:53.037053 port C1 DISC req: usage 1 usb3 3 usb2 3
850 17:38:53.037150 Raw Buffer output 0 00000331
851 17:38:53.040347 Raw Buffer output 1 00000000
852 17:38:53.044771 pmc_send_ipc_cmd succeeded
853 17:38:53.048468 Detected 6 core, 8 thread CPU.
854 17:38:53.051542 Detected 6 core, 8 thread CPU.
855 17:38:53.056781 Detected 6 core, 8 thread CPU.
856 17:38:53.060119 Detected 6 core, 8 thread CPU.
857 17:38:53.063392 Detected 6 core, 8 thread CPU.
858 17:38:53.067101 Detected 6 core, 8 thread CPU.
859 17:38:53.070160 Detected 6 core, 8 thread CPU.
860 17:38:53.073508 Detected 6 core, 8 thread CPU.
861 17:38:53.077123 Detected 6 core, 8 thread CPU.
862 17:38:53.080309 Detected 6 core, 8 thread CPU.
863 17:38:53.083836 Detected 6 core, 8 thread CPU.
864 17:38:53.087421 Detected 6 core, 8 thread CPU.
865 17:38:53.090373 Detected 6 core, 8 thread CPU.
866 17:38:53.093778 Detected 6 core, 8 thread CPU.
867 17:38:53.097126 Detected 6 core, 8 thread CPU.
868 17:38:53.100455 Detected 6 core, 8 thread CPU.
869 17:38:53.104078 Detected 6 core, 8 thread CPU.
870 17:38:53.107218 Detected 6 core, 8 thread CPU.
871 17:38:53.110717 Detected 6 core, 8 thread CPU.
872 17:38:53.113764 Detected 6 core, 8 thread CPU.
873 17:38:53.113881 Detected 6 core, 8 thread CPU.
874 17:38:53.117012 Detected 6 core, 8 thread CPU.
875 17:38:53.410550 Detected 6 core, 8 thread CPU.
876 17:38:53.414127 Detected 6 core, 8 thread CPU.
877 17:38:53.416805 Detected 6 core, 8 thread CPU.
878 17:38:53.420169 Detected 6 core, 8 thread CPU.
879 17:38:53.423606 Detected 6 core, 8 thread CPU.
880 17:38:53.427012 Detected 6 core, 8 thread CPU.
881 17:38:53.430419 Detected 6 core, 8 thread CPU.
882 17:38:53.433919 Detected 6 core, 8 thread CPU.
883 17:38:53.437400 Detected 6 core, 8 thread CPU.
884 17:38:53.440215 Detected 6 core, 8 thread CPU.
885 17:38:53.443630 Detected 6 core, 8 thread CPU.
886 17:38:53.447075 Detected 6 core, 8 thread CPU.
887 17:38:53.450473 Detected 6 core, 8 thread CPU.
888 17:38:53.453863 Detected 6 core, 8 thread CPU.
889 17:38:53.457229 Detected 6 core, 8 thread CPU.
890 17:38:53.460659 Detected 6 core, 8 thread CPU.
891 17:38:53.464090 Detected 6 core, 8 thread CPU.
892 17:38:53.466937 Detected 6 core, 8 thread CPU.
893 17:38:53.467021 Detected 6 core, 8 thread CPU.
894 17:38:53.470226 Detected 6 core, 8 thread CPU.
895 17:38:53.473939 Display FSP Version Info HOB
896 17:38:53.477184 Reference Code - CPU = c.0.65.70
897 17:38:53.480890 uCode Version = 0.0.4.23
898 17:38:53.484244 TXT ACM version = ff.ff.ff.ffff
899 17:38:53.487992 Reference Code - ME = c.0.65.70
900 17:38:53.490800 MEBx version = 0.0.0.0
901 17:38:53.494104 ME Firmware Version = Lite SKU
902 17:38:53.497506 Reference Code - PCH = c.0.65.70
903 17:38:53.500666 PCH-CRID Status = Disabled
904 17:38:53.504302 PCH-CRID Original Value = ff.ff.ff.ffff
905 17:38:53.507517 PCH-CRID New Value = ff.ff.ff.ffff
906 17:38:53.510977 OPROM - RST - RAID = ff.ff.ff.ffff
907 17:38:53.513835 PCH Hsio Version = 4.0.0.0
908 17:38:53.517194 Reference Code - SA - System Agent = c.0.65.70
909 17:38:53.520574 Reference Code - MRC = 0.0.3.80
910 17:38:53.523975 SA - PCIe Version = c.0.65.70
911 17:38:53.527421 SA-CRID Status = Disabled
912 17:38:53.530408 SA-CRID Original Value = 0.0.0.4
913 17:38:53.533846 SA-CRID New Value = 0.0.0.4
914 17:38:53.537352 OPROM - VBIOS = ff.ff.ff.ffff
915 17:38:53.540664 IO Manageability Engine FW Version = 24.0.4.0
916 17:38:53.544008 PHY Build Version = 0.0.0.2016
917 17:38:53.546869 Thunderbolt(TM) FW Version = 0.0.0.0
918 17:38:53.553582 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
919 17:38:53.560385 BS: BS_DEV_INIT_CHIPS run times (exec / console): 495 / 507 ms
920 17:38:53.560470 Enumerating buses...
921 17:38:53.567156 Show all devs... Before device enumeration.
922 17:38:53.567239 Root Device: enabled 1
923 17:38:53.570555 CPU_CLUSTER: 0: enabled 1
924 17:38:53.573620 DOMAIN: 0000: enabled 1
925 17:38:53.576974 GPIO: 0: enabled 1
926 17:38:53.577096 PCI: 00:00.0: enabled 1
927 17:38:53.580310 PCI: 00:01.0: enabled 0
928 17:38:53.583892 PCI: 00:01.1: enabled 0
929 17:38:53.587034 PCI: 00:02.0: enabled 1
930 17:38:53.587108 PCI: 00:04.0: enabled 1
931 17:38:53.590454 PCI: 00:05.0: enabled 0
932 17:38:53.593965 PCI: 00:06.0: enabled 1
933 17:38:53.594062 PCI: 00:06.2: enabled 0
934 17:38:53.597205 PCI: 00:07.0: enabled 0
935 17:38:53.600273 PCI: 00:07.1: enabled 0
936 17:38:53.603916 PCI: 00:07.2: enabled 0
937 17:38:53.604034 PCI: 00:07.3: enabled 0
938 17:38:53.606988 PCI: 00:08.0: enabled 0
939 17:38:53.610429 PCI: 00:09.0: enabled 0
940 17:38:53.613369 PCI: 00:0a.0: enabled 1
941 17:38:53.613453 PCI: 00:0d.0: enabled 1
942 17:38:53.616733 PCI: 00:0d.1: enabled 0
943 17:38:53.620387 PCI: 00:0d.2: enabled 0
944 17:38:53.623636 PCI: 00:0d.3: enabled 0
945 17:38:53.623718 PCI: 00:0e.0: enabled 0
946 17:38:53.626930 PCI: 00:10.0: enabled 0
947 17:38:53.630027 PCI: 00:10.1: enabled 0
948 17:38:53.633238 PCI: 00:10.6: enabled 0
949 17:38:53.633316 PCI: 00:10.7: enabled 0
950 17:38:53.636756 PCI: 00:12.0: enabled 0
951 17:38:53.640202 PCI: 00:12.6: enabled 0
952 17:38:53.640275 PCI: 00:12.7: enabled 0
953 17:38:53.643569 PCI: 00:13.0: enabled 0
954 17:38:53.647042 PCI: 00:14.0: enabled 1
955 17:38:53.650195 PCI: 00:14.1: enabled 0
956 17:38:53.650277 PCI: 00:14.2: enabled 1
957 17:38:53.653616 PCI: 00:14.3: enabled 1
958 17:38:53.657242 PCI: 00:15.0: enabled 1
959 17:38:53.660421 PCI: 00:15.1: enabled 1
960 17:38:53.660503 PCI: 00:15.2: enabled 0
961 17:38:53.663845 PCI: 00:15.3: enabled 1
962 17:38:53.666950 PCI: 00:16.0: enabled 1
963 17:38:53.670382 PCI: 00:16.1: enabled 0
964 17:38:53.670475 PCI: 00:16.2: enabled 0
965 17:38:53.673759 PCI: 00:16.3: enabled 0
966 17:38:53.677133 PCI: 00:16.4: enabled 0
967 17:38:53.677234 PCI: 00:16.5: enabled 0
968 17:38:53.680216 PCI: 00:17.0: enabled 1
969 17:38:53.684079 PCI: 00:19.0: enabled 0
970 17:38:53.687143 PCI: 00:19.1: enabled 1
971 17:38:53.687265 PCI: 00:19.2: enabled 0
972 17:38:53.690153 PCI: 00:1a.0: enabled 0
973 17:38:53.693412 PCI: 00:1c.0: enabled 0
974 17:38:53.696652 PCI: 00:1c.1: enabled 0
975 17:38:53.696803 PCI: 00:1c.2: enabled 0
976 17:38:53.700322 PCI: 00:1c.3: enabled 0
977 17:38:53.703555 PCI: 00:1c.4: enabled 0
978 17:38:53.706876 PCI: 00:1c.5: enabled 0
979 17:38:53.707098 PCI: 00:1c.6: enabled 0
980 17:38:53.710328 PCI: 00:1c.7: enabled 0
981 17:38:53.713503 PCI: 00:1d.0: enabled 0
982 17:38:53.713925 PCI: 00:1d.1: enabled 0
983 17:38:53.716970 PCI: 00:1d.2: enabled 0
984 17:38:53.720312 PCI: 00:1d.3: enabled 0
985 17:38:53.723881 PCI: 00:1e.0: enabled 1
986 17:38:53.724266 PCI: 00:1e.1: enabled 0
987 17:38:53.727378 PCI: 00:1e.2: enabled 0
988 17:38:53.730294 PCI: 00:1e.3: enabled 1
989 17:38:53.733880 PCI: 00:1f.0: enabled 1
990 17:38:53.734381 PCI: 00:1f.1: enabled 0
991 17:38:53.737096 PCI: 00:1f.2: enabled 1
992 17:38:53.740606 PCI: 00:1f.3: enabled 1
993 17:38:53.743821 PCI: 00:1f.4: enabled 0
994 17:38:53.744499 PCI: 00:1f.5: enabled 1
995 17:38:53.747135 PCI: 00:1f.6: enabled 0
996 17:38:53.750638 PCI: 00:1f.7: enabled 0
997 17:38:53.751360 GENERIC: 0.0: enabled 1
998 17:38:53.753985 GENERIC: 0.0: enabled 1
999 17:38:53.757583 GENERIC: 1.0: enabled 1
1000 17:38:53.760273 GENERIC: 0.0: enabled 1
1001 17:38:53.760842 GENERIC: 1.0: enabled 1
1002 17:38:53.763873 USB0 port 0: enabled 1
1003 17:38:53.766999 USB0 port 0: enabled 1
1004 17:38:53.770468 GENERIC: 0.0: enabled 1
1005 17:38:53.770997 I2C: 00:1a: enabled 1
1006 17:38:53.773838 I2C: 00:31: enabled 1
1007 17:38:53.777204 I2C: 00:32: enabled 1
1008 17:38:53.777729 I2C: 00:50: enabled 1
1009 17:38:53.780165 I2C: 00:10: enabled 1
1010 17:38:53.784072 I2C: 00:15: enabled 1
1011 17:38:53.784566 I2C: 00:2c: enabled 1
1012 17:38:53.787112 GENERIC: 0.0: enabled 1
1013 17:38:53.790410 SPI: 00: enabled 1
1014 17:38:53.791294 PNP: 0c09.0: enabled 1
1015 17:38:53.793746 GENERIC: 0.0: enabled 1
1016 17:38:53.796830 USB3 port 0: enabled 1
1017 17:38:53.797443 USB3 port 1: enabled 0
1018 17:38:53.800697 USB3 port 2: enabled 1
1019 17:38:53.803786 USB3 port 3: enabled 0
1020 17:38:53.806961 USB2 port 0: enabled 1
1021 17:38:53.807630 USB2 port 1: enabled 0
1022 17:38:53.810278 USB2 port 2: enabled 1
1023 17:38:53.813545 USB2 port 3: enabled 0
1024 17:38:53.814128 USB2 port 4: enabled 0
1025 17:38:53.817248 USB2 port 5: enabled 1
1026 17:38:53.820542 USB2 port 6: enabled 0
1027 17:38:53.821168 USB2 port 7: enabled 0
1028 17:38:53.823729 USB2 port 8: enabled 1
1029 17:38:53.827346 USB2 port 9: enabled 1
1030 17:38:53.830246 USB3 port 0: enabled 1
1031 17:38:53.830820 USB3 port 1: enabled 0
1032 17:38:53.833642 USB3 port 2: enabled 0
1033 17:38:53.837406 USB3 port 3: enabled 0
1034 17:38:53.837998 GENERIC: 0.0: enabled 1
1035 17:38:53.840723 GENERIC: 1.0: enabled 1
1036 17:38:53.843895 APIC: 00: enabled 1
1037 17:38:53.844563 APIC: 16: enabled 1
1038 17:38:53.846755 APIC: 10: enabled 1
1039 17:38:53.850181 APIC: 12: enabled 1
1040 17:38:53.850844 APIC: 14: enabled 1
1041 17:38:53.853539 APIC: 01: enabled 1
1042 17:38:53.856814 APIC: 08: enabled 1
1043 17:38:53.857464 APIC: 09: enabled 1
1044 17:38:53.860603 Compare with tree...
1045 17:38:53.861207 Root Device: enabled 1
1046 17:38:53.863064 CPU_CLUSTER: 0: enabled 1
1047 17:38:53.866292 APIC: 00: enabled 1
1048 17:38:53.869809 APIC: 16: enabled 1
1049 17:38:53.869957 APIC: 10: enabled 1
1050 17:38:53.873059 APIC: 12: enabled 1
1051 17:38:53.876421 APIC: 14: enabled 1
1052 17:38:53.876527 APIC: 01: enabled 1
1053 17:38:53.879847 APIC: 08: enabled 1
1054 17:38:53.883357 APIC: 09: enabled 1
1055 17:38:53.883464 DOMAIN: 0000: enabled 1
1056 17:38:53.886218 GPIO: 0: enabled 1
1057 17:38:53.889604 PCI: 00:00.0: enabled 1
1058 17:38:53.892959 PCI: 00:01.0: enabled 0
1059 17:38:53.896639 PCI: 00:01.1: enabled 0
1060 17:38:53.896745 PCI: 00:02.0: enabled 1
1061 17:38:53.899691 PCI: 00:04.0: enabled 1
1062 17:38:53.903107 GENERIC: 0.0: enabled 1
1063 17:38:53.906149 PCI: 00:05.0: enabled 0
1064 17:38:53.910114 PCI: 00:06.0: enabled 1
1065 17:38:53.910191 PCI: 00:06.2: enabled 0
1066 17:38:53.913059 PCI: 00:08.0: enabled 0
1067 17:38:53.916175 PCI: 00:09.0: enabled 0
1068 17:38:53.919818 PCI: 00:0a.0: enabled 1
1069 17:38:53.919908 PCI: 00:0d.0: enabled 1
1070 17:38:53.922786 USB0 port 0: enabled 1
1071 17:38:53.926468 USB3 port 0: enabled 1
1072 17:38:53.929513 USB3 port 1: enabled 0
1073 17:38:53.932890 USB3 port 2: enabled 1
1074 17:38:53.936536 USB3 port 3: enabled 0
1075 17:38:53.936613 PCI: 00:0d.1: enabled 0
1076 17:38:53.939848 PCI: 00:0d.2: enabled 0
1077 17:38:53.942769 PCI: 00:0d.3: enabled 0
1078 17:38:53.946299 PCI: 00:0e.0: enabled 0
1079 17:38:53.949817 PCI: 00:10.0: enabled 0
1080 17:38:53.949893 PCI: 00:10.1: enabled 0
1081 17:38:53.953104 PCI: 00:10.6: enabled 0
1082 17:38:53.956432 PCI: 00:10.7: enabled 0
1083 17:38:53.959851 PCI: 00:12.0: enabled 0
1084 17:38:53.959934 PCI: 00:12.6: enabled 0
1085 17:38:53.962853 PCI: 00:12.7: enabled 0
1086 17:38:53.966116 PCI: 00:13.0: enabled 0
1087 17:38:53.969596 PCI: 00:14.0: enabled 1
1088 17:38:53.973046 USB0 port 0: enabled 1
1089 17:38:53.973121 USB2 port 0: enabled 1
1090 17:38:53.976284 USB2 port 1: enabled 0
1091 17:38:53.979781 USB2 port 2: enabled 1
1092 17:38:53.983072 USB2 port 3: enabled 0
1093 17:38:53.986056 USB2 port 4: enabled 0
1094 17:38:53.989412 USB2 port 5: enabled 1
1095 17:38:53.989491 USB2 port 6: enabled 0
1096 17:38:53.992860 USB2 port 7: enabled 0
1097 17:38:53.996359 USB2 port 8: enabled 1
1098 17:38:53.999714 USB2 port 9: enabled 1
1099 17:38:54.002740 USB3 port 0: enabled 1
1100 17:38:54.002812 USB3 port 1: enabled 0
1101 17:38:54.006052 USB3 port 2: enabled 0
1102 17:38:54.009939 USB3 port 3: enabled 0
1103 17:38:54.013202 PCI: 00:14.1: enabled 0
1104 17:38:54.016255 PCI: 00:14.2: enabled 1
1105 17:38:54.019397 PCI: 00:14.3: enabled 1
1106 17:38:54.019478 GENERIC: 0.0: enabled 1
1107 17:38:54.022840 PCI: 00:15.0: enabled 1
1108 17:38:54.025991 I2C: 00:1a: enabled 1
1109 17:38:54.029756 I2C: 00:31: enabled 1
1110 17:38:54.029828 I2C: 00:32: enabled 1
1111 17:38:54.032784 PCI: 00:15.1: enabled 1
1112 17:38:54.036221 I2C: 00:50: enabled 1
1113 17:38:54.039414 PCI: 00:15.2: enabled 0
1114 17:38:54.042731 PCI: 00:15.3: enabled 1
1115 17:38:54.042808 I2C: 00:10: enabled 1
1116 17:38:54.046156 PCI: 00:16.0: enabled 1
1117 17:38:54.049561 PCI: 00:16.1: enabled 0
1118 17:38:54.052912 PCI: 00:16.2: enabled 0
1119 17:38:54.053033 PCI: 00:16.3: enabled 0
1120 17:38:54.056498 PCI: 00:16.4: enabled 0
1121 17:38:54.059787 PCI: 00:16.5: enabled 0
1122 17:38:54.062790 PCI: 00:17.0: enabled 1
1123 17:38:54.065998 PCI: 00:19.0: enabled 0
1124 17:38:54.066071 PCI: 00:19.1: enabled 1
1125 17:38:54.069359 I2C: 00:15: enabled 1
1126 17:38:54.073098 I2C: 00:2c: enabled 1
1127 17:38:54.076375 PCI: 00:19.2: enabled 0
1128 17:38:54.079185 PCI: 00:1a.0: enabled 0
1129 17:38:54.079267 PCI: 00:1e.0: enabled 1
1130 17:38:54.082576 PCI: 00:1e.1: enabled 0
1131 17:38:54.086318 PCI: 00:1e.2: enabled 0
1132 17:38:54.089484 PCI: 00:1e.3: enabled 1
1133 17:38:54.089559 SPI: 00: enabled 1
1134 17:38:54.093065 PCI: 00:1f.0: enabled 1
1135 17:38:54.096570 PNP: 0c09.0: enabled 1
1136 17:38:54.099765 PCI: 00:1f.1: enabled 0
1137 17:38:54.103148 PCI: 00:1f.2: enabled 1
1138 17:38:54.103230 GENERIC: 0.0: enabled 1
1139 17:38:54.106001 GENERIC: 0.0: enabled 1
1140 17:38:54.109500 GENERIC: 1.0: enabled 1
1141 17:38:54.112717 PCI: 00:1f.3: enabled 1
1142 17:38:54.116081 PCI: 00:1f.4: enabled 0
1143 17:38:54.116171 PCI: 00:1f.5: enabled 1
1144 17:38:54.119470 PCI: 00:1f.6: enabled 0
1145 17:38:54.122843 PCI: 00:1f.7: enabled 0
1146 17:38:54.125937 Root Device scanning...
1147 17:38:54.129566 scan_static_bus for Root Device
1148 17:38:54.129689 CPU_CLUSTER: 0 enabled
1149 17:38:54.132677 DOMAIN: 0000 enabled
1150 17:38:54.135736 DOMAIN: 0000 scanning...
1151 17:38:54.139439 PCI: pci_scan_bus for bus 00
1152 17:38:54.142646 PCI: 00:00.0 [8086/0000] ops
1153 17:38:54.146212 PCI: 00:00.0 [8086/4609] enabled
1154 17:38:54.149776 PCI: 00:02.0 [8086/0000] bus ops
1155 17:38:54.152657 PCI: 00:02.0 [8086/46b3] enabled
1156 17:38:54.156399 PCI: 00:04.0 [8086/0000] bus ops
1157 17:38:54.159192 PCI: 00:04.0 [8086/461d] enabled
1158 17:38:54.162693 PCI: 00:06.0 [8086/0000] bus ops
1159 17:38:54.165929 PCI: 00:06.0 [8086/464d] enabled
1160 17:38:54.169287 PCI: 00:08.0 [8086/464f] disabled
1161 17:38:54.172755 PCI: 00:0a.0 [8086/467d] enabled
1162 17:38:54.176484 PCI: 00:0d.0 [8086/0000] bus ops
1163 17:38:54.179677 PCI: 00:0d.0 [8086/461e] enabled
1164 17:38:54.182846 PCI: 00:14.0 [8086/0000] bus ops
1165 17:38:54.186039 PCI: 00:14.0 [8086/51ed] enabled
1166 17:38:54.189333 PCI: 00:14.2 [8086/51ef] enabled
1167 17:38:54.192730 PCI: 00:14.3 [8086/0000] bus ops
1168 17:38:54.196020 PCI: 00:14.3 [8086/51f0] enabled
1169 17:38:54.199429 PCI: 00:15.0 [8086/0000] bus ops
1170 17:38:54.202814 PCI: 00:15.0 [8086/51e8] enabled
1171 17:38:54.206303 PCI: 00:15.1 [8086/0000] bus ops
1172 17:38:54.209649 PCI: 00:15.1 [8086/51e9] enabled
1173 17:38:54.212580 PCI: 00:15.2 [8086/0000] bus ops
1174 17:38:54.216656 PCI: 00:15.2 [8086/51ea] disabled
1175 17:38:54.219244 PCI: 00:15.3 [8086/0000] bus ops
1176 17:38:54.222496 PCI: 00:15.3 [8086/51eb] enabled
1177 17:38:54.226171 PCI: 00:16.0 [8086/0000] ops
1178 17:38:54.229331 PCI: 00:16.0 [8086/51e0] enabled
1179 17:38:54.236288 PCI: Static device PCI: 00:17.0 not found, disabling it.
1180 17:38:54.239341 PCI: 00:19.0 [8086/0000] bus ops
1181 17:38:54.242912 PCI: 00:19.0 [8086/51c5] disabled
1182 17:38:54.246144 PCI: 00:19.1 [8086/0000] bus ops
1183 17:38:54.249269 PCI: 00:19.1 [8086/51c6] enabled
1184 17:38:54.252969 PCI: 00:1e.0 [8086/0000] ops
1185 17:38:54.256279 PCI: 00:1e.0 [8086/51a8] enabled
1186 17:38:54.259870 PCI: 00:1e.3 [8086/0000] bus ops
1187 17:38:54.262499 PCI: 00:1e.3 [8086/51ab] enabled
1188 17:38:54.266184 PCI: 00:1f.0 [8086/0000] bus ops
1189 17:38:54.269490 PCI: 00:1f.0 [8086/5182] enabled
1190 17:38:54.269567 RTC Init
1191 17:38:54.272805 Set power on after power failure.
1192 17:38:54.276185 Disabling Deep S3
1193 17:38:54.279604 Disabling Deep S3
1194 17:38:54.279688 Disabling Deep S4
1195 17:38:54.282573 Disabling Deep S4
1196 17:38:54.282663 Disabling Deep S5
1197 17:38:54.285859 Disabling Deep S5
1198 17:38:54.289207 PCI: 00:1f.2 [0000/0000] hidden
1199 17:38:54.292561 PCI: 00:1f.3 [8086/0000] bus ops
1200 17:38:54.295977 PCI: 00:1f.3 [8086/51c8] enabled
1201 17:38:54.299308 PCI: 00:1f.5 [8086/0000] bus ops
1202 17:38:54.302790 PCI: 00:1f.5 [8086/51a4] enabled
1203 17:38:54.302871 GPIO: 0 enabled
1204 17:38:54.306180 PCI: Leftover static devices:
1205 17:38:54.309108 PCI: 00:01.0
1206 17:38:54.309183 PCI: 00:01.1
1207 17:38:54.309263 PCI: 00:05.0
1208 17:38:54.312756 PCI: 00:06.2
1209 17:38:54.312838 PCI: 00:09.0
1210 17:38:54.316211 PCI: 00:0d.1
1211 17:38:54.316318 PCI: 00:0d.2
1212 17:38:54.316417 PCI: 00:0d.3
1213 17:38:54.319195 PCI: 00:0e.0
1214 17:38:54.319296 PCI: 00:10.0
1215 17:38:54.322535 PCI: 00:10.1
1216 17:38:54.322637 PCI: 00:10.6
1217 17:38:54.322728 PCI: 00:10.7
1218 17:38:54.325916 PCI: 00:12.0
1219 17:38:54.326015 PCI: 00:12.6
1220 17:38:54.329216 PCI: 00:12.7
1221 17:38:54.329289 PCI: 00:13.0
1222 17:38:54.332777 PCI: 00:14.1
1223 17:38:54.332871 PCI: 00:16.1
1224 17:38:54.332997 PCI: 00:16.2
1225 17:38:54.335919 PCI: 00:16.3
1226 17:38:54.336013 PCI: 00:16.4
1227 17:38:54.339301 PCI: 00:16.5
1228 17:38:54.339396 PCI: 00:17.0
1229 17:38:54.339521 PCI: 00:19.2
1230 17:38:54.342974 PCI: 00:1a.0
1231 17:38:54.343047 PCI: 00:1e.1
1232 17:38:54.345803 PCI: 00:1e.2
1233 17:38:54.345885 PCI: 00:1f.1
1234 17:38:54.345949 PCI: 00:1f.4
1235 17:38:54.349084 PCI: 00:1f.6
1236 17:38:54.349165 PCI: 00:1f.7
1237 17:38:54.352395 PCI: Check your devicetree.cb.
1238 17:38:54.356179 PCI: 00:02.0 scanning...
1239 17:38:54.359361 scan_generic_bus for PCI: 00:02.0
1240 17:38:54.362498 scan_generic_bus for PCI: 00:02.0 done
1241 17:38:54.369226 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
1242 17:38:54.369311 PCI: 00:04.0 scanning...
1243 17:38:54.372636 scan_generic_bus for PCI: 00:04.0
1244 17:38:54.376038 GENERIC: 0.0 enabled
1245 17:38:54.382850 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
1246 17:38:54.386168 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
1247 17:38:54.389161 PCI: 00:06.0 scanning...
1248 17:38:54.392486 do_pci_scan_bridge for PCI: 00:06.0
1249 17:38:54.395891 PCI: pci_scan_bus for bus 01
1250 17:38:54.399221 PCI: 01:00.0 [15b7/5009] enabled
1251 17:38:54.402602 Enabling Common Clock Configuration
1252 17:38:54.406126 L1 Sub-State supported from root port 6
1253 17:38:54.409585 L1 Sub-State Support = 0x5
1254 17:38:54.412975 CommonModeRestoreTime = 0x6e
1255 17:38:54.415728 Power On Value = 0x5, Power On Scale = 0x2
1256 17:38:54.419170 ASPM: Enabled L1
1257 17:38:54.422635 PCIe: Max_Payload_Size adjusted to 256
1258 17:38:54.425917 PCI: 01:00.0: Enabled LTR
1259 17:38:54.429409 PCI: 01:00.0: Programmed LTR max latencies
1260 17:38:54.436438 scan_bus: bus PCI: 00:06.0 finished in 40 msecs
1261 17:38:54.436537 PCI: 00:0d.0 scanning...
1262 17:38:54.439886 scan_static_bus for PCI: 00:0d.0
1263 17:38:54.442668 USB0 port 0 enabled
1264 17:38:54.446318 USB0 port 0 scanning...
1265 17:38:54.449482 scan_static_bus for USB0 port 0
1266 17:38:54.449626 USB3 port 0 enabled
1267 17:38:54.453072 USB3 port 1 disabled
1268 17:38:54.453156 USB3 port 2 enabled
1269 17:38:54.456267 USB3 port 3 disabled
1270 17:38:54.459384 USB3 port 0 scanning...
1271 17:38:54.463020 scan_static_bus for USB3 port 0
1272 17:38:54.465800 scan_static_bus for USB3 port 0 done
1273 17:38:54.469350 scan_bus: bus USB3 port 0 finished in 6 msecs
1274 17:38:54.472646 USB3 port 2 scanning...
1275 17:38:54.475982 scan_static_bus for USB3 port 2
1276 17:38:54.479638 scan_static_bus for USB3 port 2 done
1277 17:38:54.485698 scan_bus: bus USB3 port 2 finished in 6 msecs
1278 17:38:54.489060 scan_static_bus for USB0 port 0 done
1279 17:38:54.492411 scan_bus: bus USB0 port 0 finished in 43 msecs
1280 17:38:54.495827 scan_static_bus for PCI: 00:0d.0 done
1281 17:38:54.502685 scan_bus: bus PCI: 00:0d.0 finished in 59 msecs
1282 17:38:54.502788 PCI: 00:14.0 scanning...
1283 17:38:54.505556 scan_static_bus for PCI: 00:14.0
1284 17:38:54.508973 USB0 port 0 enabled
1285 17:38:54.512491 USB0 port 0 scanning...
1286 17:38:54.515887 scan_static_bus for USB0 port 0
1287 17:38:54.515976 USB2 port 0 enabled
1288 17:38:54.518962 USB2 port 1 disabled
1289 17:38:54.522212 USB2 port 2 enabled
1290 17:38:54.522306 USB2 port 3 disabled
1291 17:38:54.525758 USB2 port 4 disabled
1292 17:38:54.528886 USB2 port 5 enabled
1293 17:38:54.529001 USB2 port 6 disabled
1294 17:38:54.532324 USB2 port 7 disabled
1295 17:38:54.532436 USB2 port 8 enabled
1296 17:38:54.535510 USB2 port 9 enabled
1297 17:38:54.538899 USB3 port 0 enabled
1298 17:38:54.539021 USB3 port 1 disabled
1299 17:38:54.542344 USB3 port 2 disabled
1300 17:38:54.545837 USB3 port 3 disabled
1301 17:38:54.545991 USB2 port 0 scanning...
1302 17:38:54.549205 scan_static_bus for USB2 port 0
1303 17:38:54.552483 scan_static_bus for USB2 port 0 done
1304 17:38:54.558930 scan_bus: bus USB2 port 0 finished in 6 msecs
1305 17:38:54.562846 USB2 port 2 scanning...
1306 17:38:54.565980 scan_static_bus for USB2 port 2
1307 17:38:54.569074 scan_static_bus for USB2 port 2 done
1308 17:38:54.572910 scan_bus: bus USB2 port 2 finished in 6 msecs
1309 17:38:54.576113 USB2 port 5 scanning...
1310 17:38:54.579330 scan_static_bus for USB2 port 5
1311 17:38:54.582857 scan_static_bus for USB2 port 5 done
1312 17:38:54.586194 scan_bus: bus USB2 port 5 finished in 6 msecs
1313 17:38:54.589596 USB2 port 8 scanning...
1314 17:38:54.592989 scan_static_bus for USB2 port 8
1315 17:38:54.596225 scan_static_bus for USB2 port 8 done
1316 17:38:54.599888 scan_bus: bus USB2 port 8 finished in 6 msecs
1317 17:38:54.602650 USB2 port 9 scanning...
1318 17:38:54.605944 scan_static_bus for USB2 port 9
1319 17:38:54.609448 scan_static_bus for USB2 port 9 done
1320 17:38:54.616044 scan_bus: bus USB2 port 9 finished in 6 msecs
1321 17:38:54.616504 USB3 port 0 scanning...
1322 17:38:54.619519 scan_static_bus for USB3 port 0
1323 17:38:54.622914 scan_static_bus for USB3 port 0 done
1324 17:38:54.629227 scan_bus: bus USB3 port 0 finished in 6 msecs
1325 17:38:54.632612 scan_static_bus for USB0 port 0 done
1326 17:38:54.636454 scan_bus: bus USB0 port 0 finished in 120 msecs
1327 17:38:54.639349 scan_static_bus for PCI: 00:14.0 done
1328 17:38:54.646386 scan_bus: bus PCI: 00:14.0 finished in 136 msecs
1329 17:38:54.649308 PCI: 00:14.3 scanning...
1330 17:38:54.652764 scan_static_bus for PCI: 00:14.3
1331 17:38:54.653265 GENERIC: 0.0 enabled
1332 17:38:54.655956 scan_static_bus for PCI: 00:14.3 done
1333 17:38:54.662767 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1334 17:38:54.665921 PCI: 00:15.0 scanning...
1335 17:38:54.669350 scan_static_bus for PCI: 00:15.0
1336 17:38:54.669940 I2C: 00:1a enabled
1337 17:38:54.672811 I2C: 00:31 enabled
1338 17:38:54.673374 I2C: 00:32 enabled
1339 17:38:54.679421 scan_static_bus for PCI: 00:15.0 done
1340 17:38:54.682740 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1341 17:38:54.685778 PCI: 00:15.1 scanning...
1342 17:38:54.689313 scan_static_bus for PCI: 00:15.1
1343 17:38:54.689778 I2C: 00:50 enabled
1344 17:38:54.692831 scan_static_bus for PCI: 00:15.1 done
1345 17:38:54.699639 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1346 17:38:54.703254 PCI: 00:15.3 scanning...
1347 17:38:54.706089 scan_static_bus for PCI: 00:15.3
1348 17:38:54.706554 I2C: 00:10 enabled
1349 17:38:54.709258 scan_static_bus for PCI: 00:15.3 done
1350 17:38:54.716396 scan_bus: bus PCI: 00:15.3 finished in 9 msecs
1351 17:38:54.716867 PCI: 00:19.1 scanning...
1352 17:38:54.719553 scan_static_bus for PCI: 00:19.1
1353 17:38:54.722995 I2C: 00:15 enabled
1354 17:38:54.725960 I2C: 00:2c enabled
1355 17:38:54.729414 scan_static_bus for PCI: 00:19.1 done
1356 17:38:54.732971 scan_bus: bus PCI: 00:19.1 finished in 11 msecs
1357 17:38:54.736341 PCI: 00:1e.3 scanning...
1358 17:38:54.739272 scan_generic_bus for PCI: 00:1e.3
1359 17:38:54.742678 SPI: 00 enabled
1360 17:38:54.745968 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1361 17:38:54.752872 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1362 17:38:54.752982 PCI: 00:1f.0 scanning...
1363 17:38:54.755720 scan_static_bus for PCI: 00:1f.0
1364 17:38:54.759038 PNP: 0c09.0 enabled
1365 17:38:54.762882 PNP: 0c09.0 scanning...
1366 17:38:54.766286 scan_static_bus for PNP: 0c09.0
1367 17:38:54.769800 scan_static_bus for PNP: 0c09.0 done
1368 17:38:54.772882 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1369 17:38:54.776258 scan_static_bus for PCI: 00:1f.0 done
1370 17:38:54.782561 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1371 17:38:54.786138 PCI: 00:1f.2 scanning...
1372 17:38:54.789508 scan_static_bus for PCI: 00:1f.2
1373 17:38:54.789590 GENERIC: 0.0 enabled
1374 17:38:54.792615 GENERIC: 0.0 scanning...
1375 17:38:54.796319 scan_static_bus for GENERIC: 0.0
1376 17:38:54.799507 GENERIC: 0.0 enabled
1377 17:38:54.799590 GENERIC: 1.0 enabled
1378 17:38:54.802437 scan_static_bus for GENERIC: 0.0 done
1379 17:38:54.809765 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1380 17:38:54.812745 scan_static_bus for PCI: 00:1f.2 done
1381 17:38:54.815901 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1382 17:38:54.819530 PCI: 00:1f.3 scanning...
1383 17:38:54.822823 scan_static_bus for PCI: 00:1f.3
1384 17:38:54.826314 scan_static_bus for PCI: 00:1f.3 done
1385 17:38:54.832901 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1386 17:38:54.835894 PCI: 00:1f.5 scanning...
1387 17:38:54.839774 scan_generic_bus for PCI: 00:1f.5
1388 17:38:54.842643 scan_generic_bus for PCI: 00:1f.5 done
1389 17:38:54.846123 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1390 17:38:54.852964 scan_bus: bus DOMAIN: 0000 finished in 710 msecs
1391 17:38:54.856379 scan_static_bus for Root Device done
1392 17:38:54.859768 scan_bus: bus Root Device finished in 729 msecs
1393 17:38:54.859851 done
1394 17:38:54.866290 BS: BS_DEV_ENUMERATE run times (exec / console): 3 / 1297 ms
1395 17:38:54.872586 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)
1396 17:38:54.879418 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1397 17:38:54.882672 SPI flash protection: WPSW=1 SRP0=0
1398 17:38:54.885874 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1399 17:38:54.892861 BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms
1400 17:38:54.896236 found VGA at PCI: 00:02.0
1401 17:38:54.899663 Setting up VGA for PCI: 00:02.0
1402 17:38:54.902970 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1403 17:38:54.909078 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1404 17:38:54.912465 Allocating resources...
1405 17:38:54.912548 Reading resources...
1406 17:38:54.915833 Root Device read_resources bus 0 link: 0
1407 17:38:54.922531 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1408 17:38:54.926130 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1409 17:38:54.932204 DOMAIN: 0000 read_resources bus 0 link: 0
1410 17:38:54.935581 SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x20000
1411 17:38:54.942505 SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x1000
1412 17:38:54.949195 SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x1000
1413 17:38:54.955971 SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x1000
1414 17:38:54.962498 SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x4000
1415 17:38:54.969390 SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x80000
1416 17:38:54.976028 SA MMIO resource: TPM -> base = 0xfed40000, size = 0x10000
1417 17:38:54.982422 SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x20000
1418 17:38:54.985828 SA MMIO resource: APIC -> base = 0xfec00000, size = 0x100000
1419 17:38:54.995791 SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x2000000
1420 17:38:55.002504 SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x1000
1421 17:38:55.005850 SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x1000
1422 17:38:55.012026 SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x1000
1423 17:38:55.019331 SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x1000
1424 17:38:55.025392 SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x1000
1425 17:38:55.032257 SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x1000
1426 17:38:55.039021 SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x1000
1427 17:38:55.045308 SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
1428 17:38:55.052290 SA MMIO resource: DSM -> base = 0x7c800000, size = 0x3c00000
1429 17:38:55.058730 SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x800000
1430 17:38:55.062434 SA MMIO resource: GSM -> base = 0x7c000000, size = 0x800000
1431 17:38:55.068851 PCI: 00:04.0 read_resources bus 1 link: 0
1432 17:38:55.072395 PCI: 00:04.0 read_resources bus 1 link: 0 done
1433 17:38:55.075165 PCI: 00:06.0 read_resources bus 1 link: 0
1434 17:38:55.082120 PCI: 00:06.0 read_resources bus 1 link: 0 done
1435 17:38:55.085573 PCI: 00:0d.0 read_resources bus 0 link: 0
1436 17:38:55.088803 USB0 port 0 read_resources bus 0 link: 0
1437 17:38:55.095159 USB0 port 0 read_resources bus 0 link: 0 done
1438 17:38:55.098380 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1439 17:38:55.101736 PCI: 00:14.0 read_resources bus 0 link: 0
1440 17:38:55.108543 USB0 port 0 read_resources bus 0 link: 0
1441 17:38:55.111895 USB0 port 0 read_resources bus 0 link: 0 done
1442 17:38:55.115464 PCI: 00:14.0 read_resources bus 0 link: 0 done
1443 17:38:55.122407 PCI: 00:14.3 read_resources bus 0 link: 0
1444 17:38:55.125563 PCI: 00:14.3 read_resources bus 0 link: 0 done
1445 17:38:55.129072 PCI: 00:15.0 read_resources bus 0 link: 0
1446 17:38:55.135232 PCI: 00:15.0 read_resources bus 0 link: 0 done
1447 17:38:55.139183 PCI: 00:15.1 read_resources bus 0 link: 0
1448 17:38:55.141992 PCI: 00:15.1 read_resources bus 0 link: 0 done
1449 17:38:55.148762 PCI: 00:15.3 read_resources bus 0 link: 0
1450 17:38:55.152134 PCI: 00:15.3 read_resources bus 0 link: 0 done
1451 17:38:55.155412 PCI: 00:19.1 read_resources bus 0 link: 0
1452 17:38:55.162255 PCI: 00:19.1 read_resources bus 0 link: 0 done
1453 17:38:55.165214 PCI: 00:1e.3 read_resources bus 2 link: 0
1454 17:38:55.171959 PCI: 00:1e.3 read_resources bus 2 link: 0 done
1455 17:38:55.175448 PCI: 00:1f.0 read_resources bus 0 link: 0
1456 17:38:55.179016 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1457 17:38:55.185613 PCI: 00:1f.2 read_resources bus 0 link: 0
1458 17:38:55.188685 GENERIC: 0.0 read_resources bus 0 link: 0
1459 17:38:55.192137 GENERIC: 0.0 read_resources bus 0 link: 0 done
1460 17:38:55.198551 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1461 17:38:55.202148 DOMAIN: 0000 read_resources bus 0 link: 0 done
1462 17:38:55.208615 Root Device read_resources bus 0 link: 0 done
1463 17:38:55.208750 Done reading resources.
1464 17:38:55.215450 Show resources in subtree (Root Device)...After reading.
1465 17:38:55.218784 Root Device child on link 0 CPU_CLUSTER: 0
1466 17:38:55.225490 CPU_CLUSTER: 0 child on link 0 APIC: 00
1467 17:38:55.225609 APIC: 00
1468 17:38:55.225678 APIC: 16
1469 17:38:55.229161 APIC: 10
1470 17:38:55.229265 APIC: 12
1471 17:38:55.232276 APIC: 14
1472 17:38:55.232357 APIC: 01
1473 17:38:55.232423 APIC: 08
1474 17:38:55.235090 APIC: 09
1475 17:38:55.238557 DOMAIN: 0000 child on link 0 GPIO: 0
1476 17:38:55.248878 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1477 17:38:55.258447 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1478 17:38:55.258560 GPIO: 0
1479 17:38:55.258628 PCI: 00:00.0
1480 17:38:55.268793 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1481 17:38:55.278973 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1482 17:38:55.288698 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1483 17:38:55.298591 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1484 17:38:55.308600 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1485 17:38:55.314919 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1486 17:38:55.325365 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1487 17:38:55.335315 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1488 17:38:55.345308 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1489 17:38:55.355092 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1490 17:38:55.365218 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1491 17:38:55.371582 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1492 17:38:55.381805 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1493 17:38:55.391829 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1494 17:38:55.401547 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1495 17:38:55.411858 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1496 17:38:55.421762 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1497 17:38:55.431760 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1498 17:38:55.438057 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1499 17:38:55.448264 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1500 17:38:55.458532 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1501 17:38:55.468219 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1502 17:38:55.478115 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1503 17:38:55.488323 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1504 17:38:55.497987 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1505 17:38:55.508242 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1506 17:38:55.514927 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1507 17:38:55.524614 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1508 17:38:55.528440 PCI: 00:02.0
1509 17:38:55.537906 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1510 17:38:55.548302 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1511 17:38:55.554636 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1512 17:38:55.561657 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1513 17:38:55.571632 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1514 17:38:55.571761 GENERIC: 0.0
1515 17:38:55.577893 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1516 17:38:55.584856 PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1517 17:38:55.594431 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1518 17:38:55.604822 PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1519 17:38:55.608456 PCI: 01:00.0
1520 17:38:55.617984 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1521 17:38:55.628110 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1522 17:38:55.628198 PCI: 00:08.0
1523 17:38:55.631376 PCI: 00:0a.0
1524 17:38:55.641339 PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1525 17:38:55.644431 PCI: 00:0d.0 child on link 0 USB0 port 0
1526 17:38:55.654319 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1527 17:38:55.657669 USB0 port 0 child on link 0 USB3 port 0
1528 17:38:55.661650 USB3 port 0
1529 17:38:55.661734 USB3 port 1
1530 17:38:55.664704 USB3 port 2
1531 17:38:55.664813 USB3 port 3
1532 17:38:55.671025 PCI: 00:14.0 child on link 0 USB0 port 0
1533 17:38:55.681142 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1534 17:38:55.684588 USB0 port 0 child on link 0 USB2 port 0
1535 17:38:55.688012 USB2 port 0
1536 17:38:55.688094 USB2 port 1
1537 17:38:55.690861 USB2 port 2
1538 17:38:55.690946 USB2 port 3
1539 17:38:55.694224 USB2 port 4
1540 17:38:55.694315 USB2 port 5
1541 17:38:55.697725 USB2 port 6
1542 17:38:55.697809 USB2 port 7
1543 17:38:55.701122 USB2 port 8
1544 17:38:55.701206 USB2 port 9
1545 17:38:55.704533 USB3 port 0
1546 17:38:55.704617 USB3 port 1
1547 17:38:55.707620 USB3 port 2
1548 17:38:55.707704 USB3 port 3
1549 17:38:55.710861 PCI: 00:14.2
1550 17:38:55.721207 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1551 17:38:55.730835 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1552 17:38:55.734190 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1553 17:38:55.744516 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1554 17:38:55.747721 GENERIC: 0.0
1555 17:38:55.750768 PCI: 00:15.0 child on link 0 I2C: 00:1a
1556 17:38:55.760801 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1557 17:38:55.764005 I2C: 00:1a
1558 17:38:55.764091 I2C: 00:31
1559 17:38:55.767468 I2C: 00:32
1560 17:38:55.771219 PCI: 00:15.1 child on link 0 I2C: 00:50
1561 17:38:55.780985 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1562 17:38:55.781072 I2C: 00:50
1563 17:38:55.784635 PCI: 00:15.2
1564 17:38:55.787789 PCI: 00:15.3 child on link 0 I2C: 00:10
1565 17:38:55.797543 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1566 17:38:55.797628 I2C: 00:10
1567 17:38:55.800832 PCI: 00:16.0
1568 17:38:55.811020 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1569 17:38:55.811103 PCI: 00:19.0
1570 17:38:55.817882 PCI: 00:19.1 child on link 0 I2C: 00:15
1571 17:38:55.827503 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1572 17:38:55.827650 I2C: 00:15
1573 17:38:55.830904 I2C: 00:2c
1574 17:38:55.831001 PCI: 00:1e.0
1575 17:38:55.844238 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1576 17:38:55.847457 PCI: 00:1e.3 child on link 0 SPI: 00
1577 17:38:55.857719 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1578 17:38:55.857813 SPI: 00
1579 17:38:55.860615 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1580 17:38:55.871161 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1581 17:38:55.874094 PNP: 0c09.0
1582 17:38:55.880746 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1583 17:38:55.887294 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1584 17:38:55.894399 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1585 17:38:55.904537 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1586 17:38:55.907430 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1587 17:38:55.910877 GENERIC: 0.0
1588 17:38:55.914378 GENERIC: 1.0
1589 17:38:55.914450 PCI: 00:1f.3
1590 17:38:55.924493 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1591 17:38:55.934190 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1592 17:38:55.937913 PCI: 00:1f.5
1593 17:38:55.943963 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1594 17:38:55.954215 === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1595 17:38:55.957818 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
1596 17:38:55.964174 PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1597 17:38:55.970524 PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1598 17:38:55.974265 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1599 17:38:55.980531 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1600 17:38:55.987626 PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1601 17:38:55.993875 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1602 17:38:56.000553 PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1603 17:38:56.007513 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1604 17:38:56.013742 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1605 17:38:56.023964 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1606 17:38:56.030807 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1607 17:38:56.037046 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1608 17:38:56.040413 DOMAIN: 0000: Resource ranges:
1609 17:38:56.043901 * Base: 1000, Size: 800, Tag: 100
1610 17:38:56.047338 * Base: 1900, Size: e700, Tag: 100
1611 17:38:56.053991 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1612 17:38:56.060670 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1613 17:38:56.066861 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1614 17:38:56.073529 update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
1615 17:38:56.083783 update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
1616 17:38:56.090430 update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
1617 17:38:56.096795 update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
1618 17:38:56.106806 update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
1619 17:38:56.113457 update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
1620 17:38:56.119980 update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
1621 17:38:56.126621 update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
1622 17:38:56.136811 update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
1623 17:38:56.143098 update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
1624 17:38:56.150227 update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
1625 17:38:56.159716 update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
1626 17:38:56.166361 update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
1627 17:38:56.173421 update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
1628 17:38:56.183078 update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
1629 17:38:56.189327 update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
1630 17:38:56.196134 update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
1631 17:38:56.206396 update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
1632 17:38:56.212643 update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
1633 17:38:56.219447 update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
1634 17:38:56.229793 update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
1635 17:38:56.235941 update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
1636 17:38:56.242939 update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
1637 17:38:56.252789 update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
1638 17:38:56.259464 update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)
1639 17:38:56.265570 update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
1640 17:38:56.275871 update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
1641 17:38:56.282193 update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)
1642 17:38:56.288873 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1643 17:38:56.298940 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1644 17:38:56.302068 DOMAIN: 0000: Resource ranges:
1645 17:38:56.305455 * Base: 80400000, Size: 3fc00000, Tag: 200
1646 17:38:56.309304 * Base: d0000000, Size: 28000000, Tag: 200
1647 17:38:56.315524 * Base: fa000000, Size: 1000000, Tag: 200
1648 17:38:56.318749 * Base: fb001000, Size: 17ff000, Tag: 200
1649 17:38:56.322099 * Base: fe800000, Size: 300000, Tag: 200
1650 17:38:56.325567 * Base: feb80000, Size: 80000, Tag: 200
1651 17:38:56.331919 * Base: fed00000, Size: 40000, Tag: 200
1652 17:38:56.335302 * Base: fed70000, Size: 10000, Tag: 200
1653 17:38:56.338697 * Base: fed88000, Size: 8000, Tag: 200
1654 17:38:56.342114 * Base: fed93000, Size: d000, Tag: 200
1655 17:38:56.345598 * Base: feda2000, Size: 1e000, Tag: 200
1656 17:38:56.352370 * Base: fede0000, Size: 1220000, Tag: 200
1657 17:38:56.355571 * Base: 27fc00000, Size: 7d80400000, Tag: 100200
1658 17:38:56.362392 PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
1659 17:38:56.368697 PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
1660 17:38:56.375273 PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
1661 17:38:56.382020 PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
1662 17:38:56.388836 PCI: 00:04.0 10 * [0x80600000 - 0x8061ffff] limit: 8061ffff mem
1663 17:38:56.395044 PCI: 00:0d.0 10 * [0x80620000 - 0x8062ffff] limit: 8062ffff mem
1664 17:38:56.401749 PCI: 00:14.0 10 * [0x80630000 - 0x8063ffff] limit: 8063ffff mem
1665 17:38:56.408368 PCI: 00:0a.0 10 * [0x80640000 - 0x80647fff] limit: 80647fff mem
1666 17:38:56.415603 PCI: 00:14.2 10 * [0x80648000 - 0x8064bfff] limit: 8064bfff mem
1667 17:38:56.422000 PCI: 00:14.3 10 * [0x8064c000 - 0x8064ffff] limit: 8064ffff mem
1668 17:38:56.428732 PCI: 00:1f.3 10 * [0x80650000 - 0x80653fff] limit: 80653fff mem
1669 17:38:56.434937 PCI: 00:14.2 18 * [0x80654000 - 0x80654fff] limit: 80654fff mem
1670 17:38:56.441564 PCI: 00:15.0 10 * [0x80655000 - 0x80655fff] limit: 80655fff mem
1671 17:38:56.448264 PCI: 00:15.1 10 * [0x80656000 - 0x80656fff] limit: 80656fff mem
1672 17:38:56.454981 PCI: 00:15.3 10 * [0x80657000 - 0x80657fff] limit: 80657fff mem
1673 17:38:56.461911 PCI: 00:16.0 10 * [0x80658000 - 0x80658fff] limit: 80658fff mem
1674 17:38:56.468172 PCI: 00:19.1 10 * [0x80659000 - 0x80659fff] limit: 80659fff mem
1675 17:38:56.475219 PCI: 00:1e.3 10 * [0x8065a000 - 0x8065afff] limit: 8065afff mem
1676 17:38:56.481936 PCI: 00:1f.5 10 * [0x8065b000 - 0x8065bfff] limit: 8065bfff mem
1677 17:38:56.491993 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1678 17:38:56.498283 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff
1679 17:38:56.501882 PCI: 00:06.0: Resource ranges:
1680 17:38:56.504899 * Base: 80400000, Size: 100000, Tag: 200
1681 17:38:56.511484 PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
1682 17:38:56.518365 PCI: 01:00.0 20 * [0x80404000 - 0x804040ff] limit: 804040ff mem
1683 17:38:56.528269 PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done
1684 17:38:56.534956 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1685 17:38:56.538489 Root Device assign_resources, bus 0 link: 0
1686 17:38:56.545021 DOMAIN: 0000 assign_resources, bus 0 link: 0
1687 17:38:56.551601 PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64
1688 17:38:56.561576 PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
1689 17:38:56.567625 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1690 17:38:56.574594 PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64
1691 17:38:56.581168 PCI: 00:04.0 assign_resources, bus 1 link: 0
1692 17:38:56.584666 PCI: 00:04.0 assign_resources, bus 1 link: 0 done
1693 17:38:56.594295 PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1694 17:38:56.604328 PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1695 17:38:56.611068 PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem
1696 17:38:56.617722 PCI: 00:06.0 assign_resources, bus 1 link: 0
1697 17:38:56.623986 PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64
1698 17:38:56.630830 PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64
1699 17:38:56.637319 PCI: 00:06.0 assign_resources, bus 1 link: 0 done
1700 17:38:56.644035 PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64
1701 17:38:56.654233 PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64
1702 17:38:56.657227 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1703 17:38:56.664125 PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
1704 17:38:56.670860 PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64
1705 17:38:56.673748 PCI: 00:14.0 assign_resources, bus 0 link: 0
1706 17:38:56.680310 PCI: 00:14.0 assign_resources, bus 0 link: 0 done
1707 17:38:56.687328 PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64
1708 17:38:56.697623 PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64
1709 17:38:56.703554 PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64
1710 17:38:56.706843 PCI: 00:14.3 assign_resources, bus 0 link: 0
1711 17:38:56.713647 PCI: 00:14.3 assign_resources, bus 0 link: 0 done
1712 17:38:56.720291 PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64
1713 17:38:56.727262 PCI: 00:15.0 assign_resources, bus 0 link: 0
1714 17:38:56.730669 PCI: 00:15.0 assign_resources, bus 0 link: 0 done
1715 17:38:56.740383 PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64
1716 17:38:56.743636 PCI: 00:15.1 assign_resources, bus 0 link: 0
1717 17:38:56.750099 PCI: 00:15.1 assign_resources, bus 0 link: 0 done
1718 17:38:56.756864 PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64
1719 17:38:56.760333 PCI: 00:15.3 assign_resources, bus 0 link: 0
1720 17:38:56.766898 PCI: 00:15.3 assign_resources, bus 0 link: 0 done
1721 17:38:56.773793 PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64
1722 17:38:56.783498 PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64
1723 17:38:56.786750 PCI: 00:19.1 assign_resources, bus 0 link: 0
1724 17:38:56.790137 PCI: 00:19.1 assign_resources, bus 0 link: 0 done
1725 17:38:56.799966 PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64
1726 17:38:56.803312 PCI: 00:1e.3 assign_resources, bus 2 link: 0
1727 17:38:56.809981 PCI: 00:1e.3 assign_resources, bus 2 link: 0 done
1728 17:38:56.813299 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1729 17:38:56.820031 PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
1730 17:38:56.823504 LPC: Trying to open IO window from 800 size 1ff
1731 17:38:56.829800 PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64
1732 17:38:56.839800 PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64
1733 17:38:56.846629 PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem
1734 17:38:56.853139 DOMAIN: 0000 assign_resources, bus 0 link: 0 done
1735 17:38:56.856665 Root Device assign_resources, bus 0 link: 0 done
1736 17:38:56.860044 Done setting resources.
1737 17:38:56.866342 Show resources in subtree (Root Device)...After assigning values.
1738 17:38:56.869701 Root Device child on link 0 CPU_CLUSTER: 0
1739 17:38:56.873297 CPU_CLUSTER: 0 child on link 0 APIC: 00
1740 17:38:56.876570 APIC: 00
1741 17:38:56.876655 APIC: 16
1742 17:38:56.880093 APIC: 10
1743 17:38:56.880178 APIC: 12
1744 17:38:56.880249 APIC: 14
1745 17:38:56.883354 APIC: 01
1746 17:38:56.883438 APIC: 08
1747 17:38:56.883505 APIC: 09
1748 17:38:56.890052 DOMAIN: 0000 child on link 0 GPIO: 0
1749 17:38:56.897000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1750 17:38:56.906518 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1751 17:38:56.909815 GPIO: 0
1752 17:38:56.909900 PCI: 00:00.0
1753 17:38:56.920035 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
1754 17:38:56.929831 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
1755 17:38:56.939519 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1756 17:38:56.949467 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1757 17:38:56.956394 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
1758 17:38:56.966002 PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
1759 17:38:56.975889 PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1760 17:38:56.986261 PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
1761 17:38:56.996018 PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
1762 17:38:57.005805 PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
1763 17:38:57.015890 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1764 17:38:57.022920 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1765 17:38:57.032417 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1766 17:38:57.042997 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
1767 17:38:57.052518 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
1768 17:38:57.062540 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
1769 17:38:57.072947 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
1770 17:38:57.079013 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
1771 17:38:57.089251 PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
1772 17:38:57.098974 PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
1773 17:38:57.108874 PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
1774 17:38:57.118848 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
1775 17:38:57.129128 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
1776 17:38:57.138733 PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
1777 17:38:57.148707 PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
1778 17:38:57.158474 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
1779 17:38:57.165351 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
1780 17:38:57.175286 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b
1781 17:38:57.178728 PCI: 00:02.0
1782 17:38:57.188367 PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
1783 17:38:57.198075 PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
1784 17:38:57.208110 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1785 17:38:57.211543 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1786 17:38:57.225164 PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10
1787 17:38:57.225274 GENERIC: 0.0
1788 17:38:57.227990 PCI: 00:06.0 child on link 0 PCI: 01:00.0
1789 17:38:57.238273 PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1790 17:38:57.251531 PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1791 17:38:57.261681 PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
1792 17:38:57.261791 PCI: 01:00.0
1793 17:38:57.274586 PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
1794 17:38:57.284505 PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20
1795 17:38:57.284613 PCI: 00:08.0
1796 17:38:57.287929 PCI: 00:0a.0
1797 17:38:57.298186 PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10
1798 17:38:57.300970 PCI: 00:0d.0 child on link 0 USB0 port 0
1799 17:38:57.311117 PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10
1800 17:38:57.317567 USB0 port 0 child on link 0 USB3 port 0
1801 17:38:57.317660 USB3 port 0
1802 17:38:57.320954 USB3 port 1
1803 17:38:57.321041 USB3 port 2
1804 17:38:57.324400 USB3 port 3
1805 17:38:57.327643 PCI: 00:14.0 child on link 0 USB0 port 0
1806 17:38:57.337747 PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10
1807 17:38:57.344368 USB0 port 0 child on link 0 USB2 port 0
1808 17:38:57.344468 USB2 port 0
1809 17:38:57.347719 USB2 port 1
1810 17:38:57.347804 USB2 port 2
1811 17:38:57.351378 USB2 port 3
1812 17:38:57.351462 USB2 port 4
1813 17:38:57.354522 USB2 port 5
1814 17:38:57.354605 USB2 port 6
1815 17:38:57.358023 USB2 port 7
1816 17:38:57.358107 USB2 port 8
1817 17:38:57.361016 USB2 port 9
1818 17:38:57.361099 USB3 port 0
1819 17:38:57.364210 USB3 port 1
1820 17:38:57.364294 USB3 port 2
1821 17:38:57.367578 USB3 port 3
1822 17:38:57.367666 PCI: 00:14.2
1823 17:38:57.381243 PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10
1824 17:38:57.390871 PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18
1825 17:38:57.394326 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1826 17:38:57.403984 PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10
1827 17:38:57.407394 GENERIC: 0.0
1828 17:38:57.410683 PCI: 00:15.0 child on link 0 I2C: 00:1a
1829 17:38:57.420632 PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10
1830 17:38:57.423799 I2C: 00:1a
1831 17:38:57.423884 I2C: 00:31
1832 17:38:57.427249 I2C: 00:32
1833 17:38:57.430752 PCI: 00:15.1 child on link 0 I2C: 00:50
1834 17:38:57.440248 PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10
1835 17:38:57.440358 I2C: 00:50
1836 17:38:57.444072 PCI: 00:15.2
1837 17:38:57.447316 PCI: 00:15.3 child on link 0 I2C: 00:10
1838 17:38:57.457427 PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10
1839 17:38:57.460245 I2C: 00:10
1840 17:38:57.460327 PCI: 00:16.0
1841 17:38:57.470309 PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10
1842 17:38:57.474002 PCI: 00:19.0
1843 17:38:57.477034 PCI: 00:19.1 child on link 0 I2C: 00:15
1844 17:38:57.486878 PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10
1845 17:38:57.490304 I2C: 00:15
1846 17:38:57.490410 I2C: 00:2c
1847 17:38:57.493397 PCI: 00:1e.0
1848 17:38:57.503593 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1849 17:38:57.506860 PCI: 00:1e.3 child on link 0 SPI: 00
1850 17:38:57.516807 PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10
1851 17:38:57.520223 SPI: 00
1852 17:38:57.523811 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1853 17:38:57.533811 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1854 17:38:57.533921 PNP: 0c09.0
1855 17:38:57.543624 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1856 17:38:57.546886 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1857 17:38:57.556669 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1858 17:38:57.566960 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1859 17:38:57.569846 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1860 17:38:57.573265 GENERIC: 0.0
1861 17:38:57.573350 GENERIC: 1.0
1862 17:38:57.576571 PCI: 00:1f.3
1863 17:38:57.586915 PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10
1864 17:38:57.596714 PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
1865 17:38:57.599834 PCI: 00:1f.5
1866 17:38:57.609725 PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10
1867 17:38:57.613360 Done allocating resources.
1868 17:38:57.616546 BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms
1869 17:38:57.623324 fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S
1870 17:38:57.630097 Configure audio over I2S with MAX98373 NAU88L25B.
1871 17:38:57.632911 Enabling BT offload
1872 17:38:57.640058 BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms
1873 17:38:57.643358 Enabling resources...
1874 17:38:57.646878 PCI: 00:00.0 subsystem <- 8086/4609
1875 17:38:57.650128 PCI: 00:00.0 cmd <- 06
1876 17:38:57.653536 PCI: 00:02.0 subsystem <- 8086/46b3
1877 17:38:57.657177 PCI: 00:02.0 cmd <- 03
1878 17:38:57.660379 PCI: 00:04.0 subsystem <- 8086/461d
1879 17:38:57.660481 PCI: 00:04.0 cmd <- 02
1880 17:38:57.663100 PCI: 00:06.0 bridge ctrl <- 0013
1881 17:38:57.666726 PCI: 00:06.0 subsystem <- 8086/464d
1882 17:38:57.669837 PCI: 00:06.0 cmd <- 106
1883 17:38:57.673320 PCI: 00:0a.0 subsystem <- 8086/467d
1884 17:38:57.676700 PCI: 00:0a.0 cmd <- 02
1885 17:38:57.680054 PCI: 00:0d.0 subsystem <- 8086/461e
1886 17:38:57.683386 PCI: 00:0d.0 cmd <- 02
1887 17:38:57.686911 PCI: 00:14.0 subsystem <- 8086/51ed
1888 17:38:57.689957 PCI: 00:14.0 cmd <- 02
1889 17:38:57.693165 PCI: 00:14.2 subsystem <- 8086/51ef
1890 17:38:57.693249 PCI: 00:14.2 cmd <- 02
1891 17:38:57.696652 PCI: 00:14.3 subsystem <- 8086/51f0
1892 17:38:57.700017 PCI: 00:14.3 cmd <- 02
1893 17:38:57.703804 PCI: 00:15.0 subsystem <- 8086/51e8
1894 17:38:57.706949 PCI: 00:15.0 cmd <- 02
1895 17:38:57.710066 PCI: 00:15.1 subsystem <- 8086/51e9
1896 17:38:57.713189 PCI: 00:15.1 cmd <- 06
1897 17:38:57.716741 PCI: 00:15.3 subsystem <- 8086/51eb
1898 17:38:57.720179 PCI: 00:15.3 cmd <- 02
1899 17:38:57.723763 PCI: 00:16.0 subsystem <- 8086/51e0
1900 17:38:57.723847 PCI: 00:16.0 cmd <- 02
1901 17:38:57.726926 PCI: 00:19.1 subsystem <- 8086/51c6
1902 17:38:57.730288 PCI: 00:19.1 cmd <- 02
1903 17:38:57.733130 PCI: 00:1e.0 subsystem <- 8086/51a8
1904 17:38:57.736591 PCI: 00:1e.0 cmd <- 06
1905 17:38:57.740090 PCI: 00:1e.3 subsystem <- 8086/51ab
1906 17:38:57.743323 PCI: 00:1e.3 cmd <- 02
1907 17:38:57.746668 PCI: 00:1f.0 subsystem <- 8086/5182
1908 17:38:57.750127 PCI: 00:1f.0 cmd <- 407
1909 17:38:57.753395 PCI: 00:1f.3 subsystem <- 8086/51c8
1910 17:38:57.753481 PCI: 00:1f.3 cmd <- 02
1911 17:38:57.756535 PCI: 00:1f.5 subsystem <- 8086/51a4
1912 17:38:57.759813 PCI: 00:1f.5 cmd <- 406
1913 17:38:57.763444 PCI: 01:00.0 cmd <- 02
1914 17:38:57.763527 done.
1915 17:38:57.769612 BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms
1916 17:38:57.773224 ME: Version: Unavailable
1917 17:38:57.776667 BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms
1918 17:38:57.779930 Initializing devices...
1919 17:38:57.783130 Root Device init
1920 17:38:57.783212 mainboard: EC init
1921 17:38:57.786312 Chrome EC: Set SMI mask to 0x0000000000000000
1922 17:38:57.789720 Chrome EC: UHEPI supported
1923 17:38:57.798341 Chrome EC: clear events_b mask to 0x0000000000000000
1924 17:38:57.805398 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1925 17:38:57.811890 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1926 17:38:57.818862 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e
1927 17:38:57.821794 Chrome EC: Set WAKE mask to 0x0000000000000000
1928 17:38:57.830691 Root Device init finished in 43 msecs
1929 17:38:57.830799 PCI: 00:00.0 init
1930 17:38:57.834280 CPU TDP = 15 Watts
1931 17:38:57.837625 CPU PL1 = 15 Watts
1932 17:38:57.837794 CPU PL2 = 55 Watts
1933 17:38:57.840568 CPU PL4 = 123 Watts
1934 17:38:57.843803 PCI: 00:00.0 init finished in 8 msecs
1935 17:38:57.847059 PCI: 00:02.0 init
1936 17:38:57.847174 GMA: Found VBT in CBFS
1937 17:38:57.850326 GMA: Found valid VBT in CBFS
1938 17:38:57.857193 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1939 17:38:57.863909 x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000
1940 17:38:57.867396 PCI: 00:02.0 init finished in 18 msecs
1941 17:38:57.870354 PCI: 00:06.0 init
1942 17:38:57.874021 Initializing PCH PCIe bridge.
1943 17:38:57.877266 PCI: 00:06.0 init finished in 3 msecs
1944 17:38:57.880625 PCI: 00:0a.0 init
1945 17:38:57.883991 PCI: 00:0a.0 init finished in 0 msecs
1946 17:38:57.884075 PCI: 00:14.0 init
1947 17:38:57.887300 PCI: 00:14.0 init finished in 0 msecs
1948 17:38:57.890675 PCI: 00:14.2 init
1949 17:38:57.893874 PCI: 00:14.2 init finished in 0 msecs
1950 17:38:57.897344 PCI: 00:15.0 init
1951 17:38:57.900394 I2C bus 0 version 0x3230302a
1952 17:38:57.903778 DW I2C bus 0 at 0x80655000 (400 KHz)
1953 17:38:57.906994 PCI: 00:15.0 init finished in 6 msecs
1954 17:38:57.907094 PCI: 00:15.1 init
1955 17:38:57.910554 I2C bus 1 version 0x3230302a
1956 17:38:57.913733 DW I2C bus 1 at 0x80656000 (400 KHz)
1957 17:38:57.917289 PCI: 00:15.1 init finished in 6 msecs
1958 17:38:57.920490 PCI: 00:15.3 init
1959 17:38:57.923759 I2C bus 3 version 0x3230302a
1960 17:38:57.927027 DW I2C bus 3 at 0x80657000 (400 KHz)
1961 17:38:57.930427 PCI: 00:15.3 init finished in 6 msecs
1962 17:38:57.933747 PCI: 00:16.0 init
1963 17:38:57.937166 PCI: 00:16.0 init finished in 0 msecs
1964 17:38:57.937269 PCI: 00:19.1 init
1965 17:38:57.940690 I2C bus 5 version 0x3230302a
1966 17:38:57.943714 DW I2C bus 5 at 0x80659000 (400 KHz)
1967 17:38:57.950342 PCI: 00:19.1 init finished in 6 msecs
1968 17:38:57.950427 PCI: 00:1f.0 init
1969 17:38:57.953557 IOAPIC: Initializing IOAPIC at 0xfec00000
1970 17:38:57.957186 IOAPIC: ID = 0x02
1971 17:38:57.960386 IOAPIC: Dumping registers
1972 17:38:57.963891 reg 0x0000: 0x02000000
1973 17:38:57.963990 reg 0x0001: 0x00770020
1974 17:38:57.967546 reg 0x0002: 0x00000000
1975 17:38:57.970331 IOAPIC: 120 interrupts
1976 17:38:57.973534 IOAPIC: Clearing IOAPIC at 0xfec00000
1977 17:38:57.976946 IOAPIC: vector 0x00 value 0x00000000 0x00010000
1978 17:38:57.983930 IOAPIC: vector 0x01 value 0x00000000 0x00010000
1979 17:38:57.987276 IOAPIC: vector 0x02 value 0x00000000 0x00010000
1980 17:38:57.993483 IOAPIC: vector 0x03 value 0x00000000 0x00010000
1981 17:38:57.997019 IOAPIC: vector 0x04 value 0x00000000 0x00010000
1982 17:38:58.003621 IOAPIC: vector 0x05 value 0x00000000 0x00010000
1983 17:38:58.006975 IOAPIC: vector 0x06 value 0x00000000 0x00010000
1984 17:38:58.013730 IOAPIC: vector 0x07 value 0x00000000 0x00010000
1985 17:38:58.016756 IOAPIC: vector 0x08 value 0x00000000 0x00010000
1986 17:38:58.019998 IOAPIC: vector 0x09 value 0x00000000 0x00010000
1987 17:38:58.026991 IOAPIC: vector 0x0a value 0x00000000 0x00010000
1988 17:38:58.030285 IOAPIC: vector 0x0b value 0x00000000 0x00010000
1989 17:38:58.037144 IOAPIC: vector 0x0c value 0x00000000 0x00010000
1990 17:38:58.040349 IOAPIC: vector 0x0d value 0x00000000 0x00010000
1991 17:38:58.047228 IOAPIC: vector 0x0e value 0x00000000 0x00010000
1992 17:38:58.050386 IOAPIC: vector 0x0f value 0x00000000 0x00010000
1993 17:38:58.054052 IOAPIC: vector 0x10 value 0x00000000 0x00010000
1994 17:38:58.060154 IOAPIC: vector 0x11 value 0x00000000 0x00010000
1995 17:38:58.063569 IOAPIC: vector 0x12 value 0x00000000 0x00010000
1996 17:38:58.070227 IOAPIC: vector 0x13 value 0x00000000 0x00010000
1997 17:38:58.074024 IOAPIC: vector 0x14 value 0x00000000 0x00010000
1998 17:38:58.080346 IOAPIC: vector 0x15 value 0x00000000 0x00010000
1999 17:38:58.083439 IOAPIC: vector 0x16 value 0x00000000 0x00010000
2000 17:38:58.090329 IOAPIC: vector 0x17 value 0x00000000 0x00010000
2001 17:38:58.093660 IOAPIC: vector 0x18 value 0x00000000 0x00010000
2002 17:38:58.096913 IOAPIC: vector 0x19 value 0x00000000 0x00010000
2003 17:38:58.103308 IOAPIC: vector 0x1a value 0x00000000 0x00010000
2004 17:38:58.106581 IOAPIC: vector 0x1b value 0x00000000 0x00010000
2005 17:38:58.113449 IOAPIC: vector 0x1c value 0x00000000 0x00010000
2006 17:38:58.116821 IOAPIC: vector 0x1d value 0x00000000 0x00010000
2007 17:38:58.123270 IOAPIC: vector 0x1e value 0x00000000 0x00010000
2008 17:38:58.126750 IOAPIC: vector 0x1f value 0x00000000 0x00010000
2009 17:38:58.133418 IOAPIC: vector 0x20 value 0x00000000 0x00010000
2010 17:38:58.136478 IOAPIC: vector 0x21 value 0x00000000 0x00010000
2011 17:38:58.139789 IOAPIC: vector 0x22 value 0x00000000 0x00010000
2012 17:38:58.146810 IOAPIC: vector 0x23 value 0x00000000 0x00010000
2013 17:38:58.150024 IOAPIC: vector 0x24 value 0x00000000 0x00010000
2014 17:38:58.156811 IOAPIC: vector 0x25 value 0x00000000 0x00010000
2015 17:38:58.159724 IOAPIC: vector 0x26 value 0x00000000 0x00010000
2016 17:38:58.167029 IOAPIC: vector 0x27 value 0x00000000 0x00010000
2017 17:38:58.169659 IOAPIC: vector 0x28 value 0x00000000 0x00010000
2018 17:38:58.173060 IOAPIC: vector 0x29 value 0x00000000 0x00010000
2019 17:38:58.179802 IOAPIC: vector 0x2a value 0x00000000 0x00010000
2020 17:38:58.183153 IOAPIC: vector 0x2b value 0x00000000 0x00010000
2021 17:38:58.189885 IOAPIC: vector 0x2c value 0x00000000 0x00010000
2022 17:38:58.193006 IOAPIC: vector 0x2d value 0x00000000 0x00010000
2023 17:38:58.199564 IOAPIC: vector 0x2e value 0x00000000 0x00010000
2024 17:38:58.202991 IOAPIC: vector 0x2f value 0x00000000 0x00010000
2025 17:38:58.209768 IOAPIC: vector 0x30 value 0x00000000 0x00010000
2026 17:38:58.213203 IOAPIC: vector 0x31 value 0x00000000 0x00010000
2027 17:38:58.216529 IOAPIC: vector 0x32 value 0x00000000 0x00010000
2028 17:38:58.223002 IOAPIC: vector 0x33 value 0x00000000 0x00010000
2029 17:38:58.226454 IOAPIC: vector 0x34 value 0x00000000 0x00010000
2030 17:38:58.233113 IOAPIC: vector 0x35 value 0x00000000 0x00010000
2031 17:38:58.236718 IOAPIC: vector 0x36 value 0x00000000 0x00010000
2032 17:38:58.243009 IOAPIC: vector 0x37 value 0x00000000 0x00010000
2033 17:38:58.246627 IOAPIC: vector 0x38 value 0x00000000 0x00010000
2034 17:38:58.252992 IOAPIC: vector 0x39 value 0x00000000 0x00010000
2035 17:38:58.256257 IOAPIC: vector 0x3a value 0x00000000 0x00010000
2036 17:38:58.259860 IOAPIC: vector 0x3b value 0x00000000 0x00010000
2037 17:38:58.266448 IOAPIC: vector 0x3c value 0x00000000 0x00010000
2038 17:38:58.269828 IOAPIC: vector 0x3d value 0x00000000 0x00010000
2039 17:38:58.276248 IOAPIC: vector 0x3e value 0x00000000 0x00010000
2040 17:38:58.279543 IOAPIC: vector 0x3f value 0x00000000 0x00010000
2041 17:38:58.286381 IOAPIC: vector 0x40 value 0x00000000 0x00010000
2042 17:38:58.289982 IOAPIC: vector 0x41 value 0x00000000 0x00010000
2043 17:38:58.292797 IOAPIC: vector 0x42 value 0x00000000 0x00010000
2044 17:38:58.300084 IOAPIC: vector 0x43 value 0x00000000 0x00010000
2045 17:38:58.303134 IOAPIC: vector 0x44 value 0x00000000 0x00010000
2046 17:38:58.309848 IOAPIC: vector 0x45 value 0x00000000 0x00010000
2047 17:38:58.313263 IOAPIC: vector 0x46 value 0x00000000 0x00010000
2048 17:38:58.319492 IOAPIC: vector 0x47 value 0x00000000 0x00010000
2049 17:38:58.323101 IOAPIC: vector 0x48 value 0x00000000 0x00010000
2050 17:38:58.330308 IOAPIC: vector 0x49 value 0x00000000 0x00010000
2051 17:38:58.333693 IOAPIC: vector 0x4a value 0x00000000 0x00010000
2052 17:38:58.337059 IOAPIC: vector 0x4b value 0x00000000 0x00010000
2053 17:38:58.343810 IOAPIC: vector 0x4c value 0x00000000 0x00010000
2054 17:38:58.346909 IOAPIC: vector 0x4d value 0x00000000 0x00010000
2055 17:38:58.353807 IOAPIC: vector 0x4e value 0x00000000 0x00010000
2056 17:38:58.356878 IOAPIC: vector 0x4f value 0x00000000 0x00010000
2057 17:38:58.360212 IOAPIC: vector 0x50 value 0x00000000 0x00010000
2058 17:38:58.366939 IOAPIC: vector 0x51 value 0x00000000 0x00010000
2059 17:38:58.370261 IOAPIC: vector 0x52 value 0x00000000 0x00010000
2060 17:38:58.377313 IOAPIC: vector 0x53 value 0x00000000 0x00010000
2061 17:38:58.380254 IOAPIC: vector 0x54 value 0x00000000 0x00010000
2062 17:38:58.386859 IOAPIC: vector 0x55 value 0x00000000 0x00010000
2063 17:38:58.390254 IOAPIC: vector 0x56 value 0x00000000 0x00010000
2064 17:38:58.393683 IOAPIC: vector 0x57 value 0x00000000 0x00010000
2065 17:38:58.400365 IOAPIC: vector 0x58 value 0x00000000 0x00010000
2066 17:38:58.403760 IOAPIC: vector 0x59 value 0x00000000 0x00010000
2067 17:38:58.410589 IOAPIC: vector 0x5a value 0x00000000 0x00010000
2068 17:38:58.413896 IOAPIC: vector 0x5b value 0x00000000 0x00010000
2069 17:38:58.420067 IOAPIC: vector 0x5c value 0x00000000 0x00010000
2070 17:38:58.423438 IOAPIC: vector 0x5d value 0x00000000 0x00010000
2071 17:38:58.430301 IOAPIC: vector 0x5e value 0x00000000 0x00010000
2072 17:38:58.433664 IOAPIC: vector 0x5f value 0x00000000 0x00010000
2073 17:38:58.437132 IOAPIC: vector 0x60 value 0x00000000 0x00010000
2074 17:38:58.443324 IOAPIC: vector 0x61 value 0x00000000 0x00010000
2075 17:38:58.446704 IOAPIC: vector 0x62 value 0x00000000 0x00010000
2076 17:38:58.453415 IOAPIC: vector 0x63 value 0x00000000 0x00010000
2077 17:38:58.456588 IOAPIC: vector 0x64 value 0x00000000 0x00010000
2078 17:38:58.463906 IOAPIC: vector 0x65 value 0x00000000 0x00010000
2079 17:38:58.466911 IOAPIC: vector 0x66 value 0x00000000 0x00010000
2080 17:38:58.473509 IOAPIC: vector 0x67 value 0x00000000 0x00010000
2081 17:38:58.476669 IOAPIC: vector 0x68 value 0x00000000 0x00010000
2082 17:38:58.479831 IOAPIC: vector 0x69 value 0x00000000 0x00010000
2083 17:38:58.486551 IOAPIC: vector 0x6a value 0x00000000 0x00010000
2084 17:38:58.490081 IOAPIC: vector 0x6b value 0x00000000 0x00010000
2085 17:38:58.497002 IOAPIC: vector 0x6c value 0x00000000 0x00010000
2086 17:38:58.500037 IOAPIC: vector 0x6d value 0x00000000 0x00010000
2087 17:38:58.506838 IOAPIC: vector 0x6e value 0x00000000 0x00010000
2088 17:38:58.510013 IOAPIC: vector 0x6f value 0x00000000 0x00010000
2089 17:38:58.516361 IOAPIC: vector 0x70 value 0x00000000 0x00010000
2090 17:38:58.520410 IOAPIC: vector 0x71 value 0x00000000 0x00010000
2091 17:38:58.523122 IOAPIC: vector 0x72 value 0x00000000 0x00010000
2092 17:38:58.529977 IOAPIC: vector 0x73 value 0x00000000 0x00010000
2093 17:38:58.533474 IOAPIC: vector 0x74 value 0x00000000 0x00010000
2094 17:38:58.539885 IOAPIC: vector 0x75 value 0x00000000 0x00010000
2095 17:38:58.543242 IOAPIC: vector 0x76 value 0x00000000 0x00010000
2096 17:38:58.549924 IOAPIC: vector 0x77 value 0x00000000 0x00010000
2097 17:38:58.553053 IOAPIC: Bootstrap Processor Local APIC = 0x00
2098 17:38:58.556937 IOAPIC: vector 0x00 value 0x00000000 0x00000700
2099 17:38:58.563513 PCI: 00:1f.0 init finished in 607 msecs
2100 17:38:58.563596 PCI: 00:1f.2 init
2101 17:38:58.566959 apm_control: Disabling ACPI.
2102 17:38:58.571210 APMC done.
2103 17:38:58.574441 PCI: 00:1f.2 init finished in 6 msecs
2104 17:38:58.577658 PCI: 00:1f.3 init
2105 17:38:58.580972 PCI: 00:1f.3 init finished in 0 msecs
2106 17:38:58.581093 PCI: 01:00.0 init
2107 17:38:58.584098 PCI: 01:00.0 init finished in 0 msecs
2108 17:38:58.587896 PNP: 0c09.0 init
2109 17:38:58.591251 Google Chrome EC uptime: 12.501 seconds
2110 17:38:58.597478 Google Chrome AP resets since EC boot: 1
2111 17:38:58.601134 Google Chrome most recent AP reset causes:
2112 17:38:58.604328 0.340: 32775 shutdown: entering G3
2113 17:38:58.611163 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
2114 17:38:58.614069 PNP: 0c09.0 init finished in 23 msecs
2115 17:38:58.617921 GENERIC: 0.0 init
2116 17:38:58.621124 GENERIC: 0.0 init finished in 0 msecs
2117 17:38:58.621281 GENERIC: 1.0 init
2118 17:38:58.624383 GENERIC: 1.0 init finished in 0 msecs
2119 17:38:58.627806 Devices initialized
2120 17:38:58.631094 Show all devs... After init.
2121 17:38:58.634188 Root Device: enabled 1
2122 17:38:58.634271 CPU_CLUSTER: 0: enabled 1
2123 17:38:58.637545 DOMAIN: 0000: enabled 1
2124 17:38:58.640795 GPIO: 0: enabled 1
2125 17:38:58.644227 PCI: 00:00.0: enabled 1
2126 17:38:58.644311 PCI: 00:01.0: enabled 0
2127 17:38:58.647707 PCI: 00:01.1: enabled 0
2128 17:38:58.651022 PCI: 00:02.0: enabled 1
2129 17:38:58.651105 PCI: 00:04.0: enabled 1
2130 17:38:58.654344 PCI: 00:05.0: enabled 0
2131 17:38:58.657719 PCI: 00:06.0: enabled 1
2132 17:38:58.660999 PCI: 00:06.2: enabled 0
2133 17:38:58.661110 PCI: 00:07.0: enabled 0
2134 17:38:58.664354 PCI: 00:07.1: enabled 0
2135 17:38:58.667244 PCI: 00:07.2: enabled 0
2136 17:38:58.670720 PCI: 00:07.3: enabled 0
2137 17:38:58.670804 PCI: 00:08.0: enabled 0
2138 17:38:58.674117 PCI: 00:09.0: enabled 0
2139 17:38:58.677324 PCI: 00:0a.0: enabled 1
2140 17:38:58.680842 PCI: 00:0d.0: enabled 1
2141 17:38:58.680927 PCI: 00:0d.1: enabled 0
2142 17:38:58.683871 PCI: 00:0d.2: enabled 0
2143 17:38:58.687096 PCI: 00:0d.3: enabled 0
2144 17:38:58.690718 PCI: 00:0e.0: enabled 0
2145 17:38:58.690801 PCI: 00:10.0: enabled 0
2146 17:38:58.693716 PCI: 00:10.1: enabled 0
2147 17:38:58.697564 PCI: 00:10.6: enabled 0
2148 17:38:58.697640 PCI: 00:10.7: enabled 0
2149 17:38:58.700555 PCI: 00:12.0: enabled 0
2150 17:38:58.703739 PCI: 00:12.6: enabled 0
2151 17:38:58.707158 PCI: 00:12.7: enabled 0
2152 17:38:58.707242 PCI: 00:13.0: enabled 0
2153 17:38:58.710491 PCI: 00:14.0: enabled 1
2154 17:38:58.713822 PCI: 00:14.1: enabled 0
2155 17:38:58.717329 PCI: 00:14.2: enabled 1
2156 17:38:58.717411 PCI: 00:14.3: enabled 1
2157 17:38:58.720647 PCI: 00:15.0: enabled 1
2158 17:38:58.724205 PCI: 00:15.1: enabled 1
2159 17:38:58.727150 PCI: 00:15.2: enabled 0
2160 17:38:58.727232 PCI: 00:15.3: enabled 1
2161 17:38:58.730356 PCI: 00:16.0: enabled 1
2162 17:38:58.733744 PCI: 00:16.1: enabled 0
2163 17:38:58.737182 PCI: 00:16.2: enabled 0
2164 17:38:58.737263 PCI: 00:16.3: enabled 0
2165 17:38:58.740566 PCI: 00:16.4: enabled 0
2166 17:38:58.744194 PCI: 00:16.5: enabled 0
2167 17:38:58.744281 PCI: 00:17.0: enabled 0
2168 17:38:58.746845 PCI: 00:19.0: enabled 0
2169 17:38:58.750387 PCI: 00:19.1: enabled 1
2170 17:38:58.753636 PCI: 00:19.2: enabled 0
2171 17:38:58.753718 PCI: 00:1a.0: enabled 0
2172 17:38:58.757106 PCI: 00:1c.0: enabled 0
2173 17:38:58.760496 PCI: 00:1c.1: enabled 0
2174 17:38:58.763461 PCI: 00:1c.2: enabled 0
2175 17:38:58.763543 PCI: 00:1c.3: enabled 0
2176 17:38:58.766991 PCI: 00:1c.4: enabled 0
2177 17:38:58.770449 PCI: 00:1c.5: enabled 0
2178 17:38:58.773778 PCI: 00:1c.6: enabled 0
2179 17:38:58.773860 PCI: 00:1c.7: enabled 0
2180 17:38:58.777315 PCI: 00:1d.0: enabled 0
2181 17:38:58.780075 PCI: 00:1d.1: enabled 0
2182 17:38:58.780167 PCI: 00:1d.2: enabled 0
2183 17:38:58.783660 PCI: 00:1d.3: enabled 0
2184 17:38:58.786719 PCI: 00:1e.0: enabled 1
2185 17:38:58.790465 PCI: 00:1e.1: enabled 0
2186 17:38:58.790551 PCI: 00:1e.2: enabled 0
2187 17:38:58.793697 PCI: 00:1e.3: enabled 1
2188 17:38:58.796750 PCI: 00:1f.0: enabled 1
2189 17:38:58.800186 PCI: 00:1f.1: enabled 0
2190 17:38:58.800272 PCI: 00:1f.2: enabled 1
2191 17:38:58.803506 PCI: 00:1f.3: enabled 1
2192 17:38:58.806713 PCI: 00:1f.4: enabled 0
2193 17:38:58.810513 PCI: 00:1f.5: enabled 1
2194 17:38:58.810614 PCI: 00:1f.6: enabled 0
2195 17:38:58.813513 PCI: 00:1f.7: enabled 0
2196 17:38:58.816861 GENERIC: 0.0: enabled 1
2197 17:38:58.820177 GENERIC: 0.0: enabled 1
2198 17:38:58.820262 GENERIC: 1.0: enabled 1
2199 17:38:58.823536 GENERIC: 0.0: enabled 1
2200 17:38:58.826900 GENERIC: 1.0: enabled 1
2201 17:38:58.826985 USB0 port 0: enabled 1
2202 17:38:58.830256 USB0 port 0: enabled 1
2203 17:38:58.833528 GENERIC: 0.0: enabled 1
2204 17:38:58.836925 I2C: 00:1a: enabled 1
2205 17:38:58.837061 I2C: 00:31: enabled 1
2206 17:38:58.839757 I2C: 00:32: enabled 1
2207 17:38:58.843144 I2C: 00:50: enabled 1
2208 17:38:58.843223 I2C: 00:10: enabled 1
2209 17:38:58.846756 I2C: 00:15: enabled 1
2210 17:38:58.850280 I2C: 00:2c: enabled 1
2211 17:38:58.850366 GENERIC: 0.0: enabled 1
2212 17:38:58.853142 SPI: 00: enabled 1
2213 17:38:58.856588 PNP: 0c09.0: enabled 1
2214 17:38:58.856693 GENERIC: 0.0: enabled 1
2215 17:38:58.860293 USB3 port 0: enabled 1
2216 17:38:58.863458 USB3 port 1: enabled 0
2217 17:38:58.863545 USB3 port 2: enabled 1
2218 17:38:58.866856 USB3 port 3: enabled 0
2219 17:38:58.870139 USB2 port 0: enabled 1
2220 17:38:58.873517 USB2 port 1: enabled 0
2221 17:38:58.873608 USB2 port 2: enabled 1
2222 17:38:58.876903 USB2 port 3: enabled 0
2223 17:38:58.880057 USB2 port 4: enabled 0
2224 17:38:58.880175 USB2 port 5: enabled 1
2225 17:38:58.883686 USB2 port 6: enabled 0
2226 17:38:58.887046 USB2 port 7: enabled 0
2227 17:38:58.889844 USB2 port 8: enabled 1
2228 17:38:58.889937 USB2 port 9: enabled 1
2229 17:38:58.893343 USB3 port 0: enabled 1
2230 17:38:58.896616 USB3 port 1: enabled 0
2231 17:38:58.896704 USB3 port 2: enabled 0
2232 17:38:58.899927 USB3 port 3: enabled 0
2233 17:38:58.903148 GENERIC: 0.0: enabled 1
2234 17:38:58.906465 GENERIC: 1.0: enabled 1
2235 17:38:58.906554 APIC: 00: enabled 1
2236 17:38:58.910022 APIC: 16: enabled 1
2237 17:38:58.910109 APIC: 10: enabled 1
2238 17:38:58.913418 APIC: 12: enabled 1
2239 17:38:58.916732 APIC: 14: enabled 1
2240 17:38:58.916820 APIC: 01: enabled 1
2241 17:38:58.919556 APIC: 08: enabled 1
2242 17:38:58.919645 APIC: 09: enabled 1
2243 17:38:58.922980 PCI: 01:00.0: enabled 1
2244 17:38:58.929745 BS: BS_DEV_INIT run times (exec / console): 13 / 1133 ms
2245 17:38:58.933148 FMAP: area RW_ELOG found @ f20000 (16384 bytes)
2246 17:38:58.936408 ELOG: NV offset 0xf20000 size 0x4000
2247 17:38:58.944946 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
2248 17:38:58.951793 ELOG: Event(17) added with size 13 at 2023-10-20 17:38:37 UTC
2249 17:38:58.958681 ELOG: Event(9E) added with size 10 at 2023-10-20 17:38:37 UTC
2250 17:38:58.964892 ELOG: Event(9F) added with size 14 at 2023-10-20 17:38:37 UTC
2251 17:38:58.971546 BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms
2252 17:38:58.978238 ELOG: Event(A0) added with size 9 at 2023-10-20 17:38:37 UTC
2253 17:38:58.981345 elog_add_boot_reason: Logged dev mode boot
2254 17:38:58.988471 BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms
2255 17:38:58.991382 Finalize devices...
2256 17:38:58.991466 PCI: 00:16.0 final
2257 17:38:58.994707 PCI: 00:1f.2 final
2258 17:38:58.994782 GENERIC: 0.0 final
2259 17:38:59.001390 added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0
2260 17:38:59.005022 GENERIC: 1.0 final
2261 17:38:59.011314 added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0
2262 17:38:59.011431 Devices finalized
2263 17:38:59.018182 BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms
2264 17:38:59.021727 FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)
2265 17:38:59.028112 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
2266 17:38:59.031545 ME: HFSTS1 : 0x90000245
2267 17:38:59.038151 ME: HFSTS2 : 0x82100116
2268 17:38:59.041647 ME: HFSTS3 : 0x00000050
2269 17:38:59.047919 ME: HFSTS4 : 0x00004000
2270 17:38:59.051250 ME: HFSTS5 : 0x00000000
2271 17:38:59.054706 ME: HFSTS6 : 0x40600006
2272 17:38:59.058196 ME: Manufacturing Mode : NO
2273 17:38:59.061610 ME: SPI Protection Mode Enabled : YES
2274 17:38:59.068322 ME: FPFs Committed : YES
2275 17:38:59.071345 ME: Manufacturing Vars Locked : YES
2276 17:38:59.074781 ME: FW Partition Table : OK
2277 17:38:59.077920 ME: Bringup Loader Failure : NO
2278 17:38:59.081302 ME: Firmware Init Complete : YES
2279 17:38:59.084654 ME: Boot Options Present : NO
2280 17:38:59.088154 ME: Update In Progress : NO
2281 17:38:59.094439 ME: D0i3 Support : YES
2282 17:38:59.097784 ME: Low Power State Enabled : NO
2283 17:38:59.101185 ME: CPU Replaced : YES
2284 17:38:59.104781 ME: CPU Replacement Valid : YES
2285 17:38:59.108026 ME: Current Working State : 5
2286 17:38:59.111008 ME: Current Operation State : 1
2287 17:38:59.114284 ME: Current Operation Mode : 0
2288 17:38:59.117565 ME: Error Code : 0
2289 17:38:59.120916 ME: Enhanced Debug Mode : NO
2290 17:38:59.127786 ME: CPU Debug Disabled : YES
2291 17:38:59.131074 ME: TXT Support : NO
2292 17:38:59.134453 ME: WP for RO is enabled : YES
2293 17:38:59.140620 ME: RO write protection scope - Start=0x1000, End=0x15AFFF
2294 17:38:59.147334 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms
2295 17:38:59.151095 Ramoops buffer: 0x100000@0x76899000.
2296 17:38:59.153935 BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms
2297 17:38:59.164387 CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c
2298 17:38:59.167645 CBFS: 'fallback/slic' not found.
2299 17:38:59.170600 ACPI: Writing ACPI tables at 7686d000.
2300 17:38:59.170690 ACPI: * FACS
2301 17:38:59.173953 ACPI: * DSDT
2302 17:38:59.180762 PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000
2303 17:38:59.184109 ACPI: * FADT
2304 17:38:59.184197 SCI is IRQ9
2305 17:38:59.187742 ACPI: added table 1/32, length now 40
2306 17:38:59.190891 ACPI: * SSDT
2307 17:38:59.197157 Found 1 CPU(s) with 6/8 physical/logical core(s) each.
2308 17:38:59.200673 \_SB.PCI0.PEPD: Intel Power Engine Plug-in
2309 17:38:59.206913 \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
2310 17:38:59.210354 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
2311 17:38:59.217473 CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4
2312 17:38:59.220785 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
2313 17:38:59.227186 \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0
2314 17:38:59.233793 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
2315 17:38:59.237045 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
2316 17:38:59.244156 \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50
2317 17:38:59.247370 \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10
2318 17:38:59.253989 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
2319 17:38:59.257266 \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c
2320 17:38:59.263919 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
2321 17:38:59.270148 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
2322 17:38:59.273559 PS2K: Passing 80 keymaps to kernel
2323 17:38:59.280424 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
2324 17:38:59.287009 \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2
2325 17:38:59.293866 \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0
2326 17:38:59.300397 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
2327 17:38:59.303369 \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5
2328 17:38:59.310374 \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8
2329 17:38:59.317099 \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9
2330 17:38:59.323603 \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0
2331 17:38:59.330031 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
2332 17:38:59.336967 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
2333 17:38:59.340146 ACPI: added table 2/32, length now 44
2334 17:38:59.343241 ACPI: * MCFG
2335 17:38:59.346612 ACPI: added table 3/32, length now 48
2336 17:38:59.346714 ACPI: * TPM2
2337 17:38:59.350120 TPM2 log created at 0x7685d000
2338 17:38:59.353470 ACPI: added table 4/32, length now 52
2339 17:38:59.356831 ACPI: * LPIT
2340 17:38:59.360364 ACPI: added table 5/32, length now 56
2341 17:38:59.363764 ACPI: * MADT
2342 17:38:59.363847 SCI is IRQ9
2343 17:38:59.366587 ACPI: added table 6/32, length now 60
2344 17:38:59.370134 cmd_reg from pmc_make_ipc_cmd 1052838
2345 17:38:59.376828 CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc
2346 17:38:59.383344 CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200
2347 17:38:59.389868 CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00
2348 17:38:59.393202 PMC CrashLog size in discovery mode: 0xC00
2349 17:38:59.396854 cpu crashlog bar addr: 0x80640000
2350 17:38:59.399810 cpu discovery table offset: 0x6030
2351 17:38:59.406653 cpu_crashlog_discovery_table buffer count: 0x3
2352 17:38:59.412866 cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0
2353 17:38:59.419797 cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000
2354 17:38:59.426759 cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000
2355 17:38:59.429612 PMC crashLog size in discovery mode : 0xC00
2356 17:38:59.436339 Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.
2357 17:38:59.439653 discover mode PMC crashlog size adjusted to: 0x200
2358 17:38:59.446815 Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.
2359 17:38:59.453212 discover mode PMC crashlog size adjusted to: 0x0
2360 17:38:59.456424 m_cpu_crashLog_size : 0x3480 bytes
2361 17:38:59.459959 CPU crashLog present.
2362 17:38:59.463168 CPU crash data size: 0x3480 bytes in 0x3 region(s).
2363 17:38:59.470218 Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.
2364 17:38:59.472834 current = 76876550
2365 17:38:59.472958 ACPI: * DMAR
2366 17:38:59.479866 ACPI: added table 7/32, length now 64
2367 17:38:59.483158 ACPI: added table 8/32, length now 68
2368 17:38:59.483236 ACPI: * HPET
2369 17:38:59.486572 ACPI: added table 9/32, length now 72
2370 17:38:59.489702 ACPI: done.
2371 17:38:59.493086 ACPI tables: 38528 bytes.
2372 17:38:59.496838 smbios_write_tables: 76857000
2373 17:38:59.499903 EC returned error result code 3
2374 17:38:59.503177 Couldn't obtain OEM name from CBI
2375 17:38:59.503260 Create SMBIOS type 16
2376 17:38:59.506554 Create SMBIOS type 17
2377 17:38:59.509909 Create SMBIOS type 20
2378 17:38:59.513278 GENERIC: 0.0 (WIFI Device)
2379 17:38:59.513351 SMBIOS tables: 2156 bytes.
2380 17:38:59.520232 Writing table forward entry at 0x00000500
2381 17:38:59.526477 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955
2382 17:38:59.529860 Writing coreboot table at 0x76891000
2383 17:38:59.533203 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
2384 17:38:59.539765 1. 0000000000001000-000000000009ffff: RAM
2385 17:38:59.543011 2. 00000000000a0000-00000000000fffff: RESERVED
2386 17:38:59.550093 3. 0000000000100000-0000000076856fff: RAM
2387 17:38:59.553295 4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES
2388 17:38:59.559732 5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE
2389 17:38:59.566322 6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES
2390 17:38:59.569741 7. 0000000077000000-00000000803fffff: RESERVED
2391 17:38:59.573095 8. 00000000c0000000-00000000cfffffff: RESERVED
2392 17:38:59.579932 9. 00000000f8000000-00000000f9ffffff: RESERVED
2393 17:38:59.583262 10. 00000000fb000000-00000000fb000fff: RESERVED
2394 17:38:59.589526 11. 00000000fc800000-00000000fe7fffff: RESERVED
2395 17:38:59.592859 12. 00000000feb00000-00000000feb7ffff: RESERVED
2396 17:38:59.599800 13. 00000000fec00000-00000000fecfffff: RESERVED
2397 17:38:59.602842 14. 00000000fed40000-00000000fed6ffff: RESERVED
2398 17:38:59.609271 15. 00000000fed80000-00000000fed87fff: RESERVED
2399 17:38:59.612869 16. 00000000fed90000-00000000fed92fff: RESERVED
2400 17:38:59.616113 17. 00000000feda0000-00000000feda1fff: RESERVED
2401 17:38:59.622933 18. 00000000fedc0000-00000000feddffff: RESERVED
2402 17:38:59.626151 19. 0000000100000000-000000027fbfffff: RAM
2403 17:38:59.629415 Passing 4 GPIOs to payload:
2404 17:38:59.636252 NAME | PORT | POLARITY | VALUE
2405 17:38:59.639559 lid | undefined | high | high
2406 17:38:59.646146 power | undefined | high | low
2407 17:38:59.649512 oprom | undefined | high | low
2408 17:38:59.655896 EC in RW | 0x00000151 | high | high
2409 17:38:59.656027 Board ID: 3
2410 17:38:59.659138 FW config: 0x131
2411 17:38:59.665962 Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum fa0c
2412 17:38:59.669396 coreboot table: 1788 bytes.
2413 17:38:59.672752 IMD ROOT 0. 0x76fff000 0x00001000
2414 17:38:59.675714 IMD SMALL 1. 0x76ffe000 0x00001000
2415 17:38:59.679602 FSP MEMORY 2. 0x76afe000 0x00500000
2416 17:38:59.682354 CONSOLE 3. 0x76ade000 0x00020000
2417 17:38:59.685880 RW MCACHE 4. 0x76add000 0x0000043c
2418 17:38:59.689280 RO MCACHE 5. 0x76adc000 0x00000fd8
2419 17:38:59.696498 FMAP 6. 0x76adb000 0x0000064a
2420 17:38:59.699066 TIME STAMP 7. 0x76ada000 0x00000910
2421 17:38:59.702968 VBOOT WORK 8. 0x76ac6000 0x00014000
2422 17:38:59.705820 MEM INFO 9. 0x76ac5000 0x000003b8
2423 17:38:59.709030 ROMSTG STCK10. 0x76ac4000 0x00001000
2424 17:38:59.712800 AFTER CAR 11. 0x76ab8000 0x0000c000
2425 17:38:59.716224 RAMSTAGE 12. 0x76a2e000 0x0008a000
2426 17:38:59.719082 ACPI BERT 13. 0x76a1e000 0x00010000
2427 17:38:59.722576 CHROMEOS NVS14. 0x76a1d000 0x00000f00
2428 17:38:59.729219 REFCODE 15. 0x769ae000 0x0006f000
2429 17:38:59.732654 SMM BACKUP 16. 0x7699e000 0x00010000
2430 17:38:59.736287 IGD OPREGION17. 0x76999000 0x00004203
2431 17:38:59.739482 RAMOOPS 18. 0x76899000 0x00100000
2432 17:38:59.742942 COREBOOT 19. 0x76891000 0x00008000
2433 17:38:59.745869 ACPI 20. 0x7686d000 0x00024000
2434 17:38:59.749068 TPM2 TCGLOG21. 0x7685d000 0x00010000
2435 17:38:59.752855 PMC CRASHLOG22. 0x7685c000 0x00000c00
2436 17:38:59.759389 CPU CRASHLOG23. 0x76858000 0x00003480
2437 17:38:59.762602 SMBIOS 24. 0x76857000 0x00001000
2438 17:38:59.762767 IMD small region:
2439 17:38:59.765814 IMD ROOT 0. 0x76ffec00 0x00000400
2440 17:38:59.772814 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2441 17:38:59.776240 VPD 2. 0x76ffeb60 0x0000006c
2442 17:38:59.779653 POWER STATE 3. 0x76ffeb00 0x00000044
2443 17:38:59.782480 ROMSTAGE 4. 0x76ffeae0 0x00000004
2444 17:38:59.786191 ACPI GNVS 5. 0x76ffea80 0x00000048
2445 17:38:59.792717 TYPE_C INFO 6. 0x76ffea60 0x0000000c
2446 17:38:59.796435 BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms
2447 17:38:59.799554 MTRR: Physical address space:
2448 17:38:59.805819 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2449 17:38:59.812898 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2450 17:38:59.819149 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2451 17:38:59.825782 0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0
2452 17:38:59.832650 0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
2453 17:38:59.839486 0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
2454 17:38:59.843031 0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6
2455 17:38:59.848993 MTRR: Fixed MSR 0x250 0x0606060606060606
2456 17:38:59.852532 MTRR: Fixed MSR 0x258 0x0606060606060606
2457 17:38:59.855846 MTRR: Fixed MSR 0x259 0x0000000000000000
2458 17:38:59.859252 MTRR: Fixed MSR 0x268 0x0606060606060606
2459 17:38:59.865769 MTRR: Fixed MSR 0x269 0x0606060606060606
2460 17:38:59.868937 MTRR: Fixed MSR 0x26a 0x0606060606060606
2461 17:38:59.872147 MTRR: Fixed MSR 0x26b 0x0606060606060606
2462 17:38:59.875844 MTRR: Fixed MSR 0x26c 0x0606060606060606
2463 17:38:59.882224 MTRR: Fixed MSR 0x26d 0x0606060606060606
2464 17:38:59.885626 MTRR: Fixed MSR 0x26e 0x0606060606060606
2465 17:38:59.888898 MTRR: Fixed MSR 0x26f 0x0606060606060606
2466 17:38:59.892397 call enable_fixed_mtrr()
2467 17:38:59.895841 CPU physical address size: 39 bits
2468 17:38:59.902164 MTRR: default type WB/UC MTRR counts: 6/6.
2469 17:38:59.905545 MTRR: UC selected as default type.
2470 17:38:59.912312 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2471 17:38:59.915753 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2472 17:38:59.922389 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2473 17:38:59.928624 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1
2474 17:38:59.935324 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2475 17:38:59.942227 MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6
2476 17:38:59.948594 MTRR: Fixed MSR 0x250 0x0606060606060606
2477 17:38:59.952597 MTRR: Fixed MSR 0x258 0x0606060606060606
2478 17:38:59.955215 MTRR: Fixed MSR 0x259 0x0000000000000000
2479 17:38:59.958588 MTRR: Fixed MSR 0x268 0x0606060606060606
2480 17:38:59.965130 MTRR: Fixed MSR 0x269 0x0606060606060606
2481 17:38:59.968524 MTRR: Fixed MSR 0x26a 0x0606060606060606
2482 17:38:59.972341 MTRR: Fixed MSR 0x26b 0x0606060606060606
2483 17:38:59.975281 MTRR: Fixed MSR 0x26c 0x0606060606060606
2484 17:38:59.981695 MTRR: Fixed MSR 0x26d 0x0606060606060606
2485 17:38:59.985417 MTRR: Fixed MSR 0x26e 0x0606060606060606
2486 17:38:59.988851 MTRR: Fixed MSR 0x26f 0x0606060606060606
2487 17:38:59.991552 MTRR: Fixed MSR 0x250 0x0606060606060606
2488 17:38:59.995070 MTRR: Fixed MSR 0x250 0x0606060606060606
2489 17:39:00.001759 MTRR: Fixed MSR 0x258 0x0606060606060606
2490 17:39:00.004653 MTRR: Fixed MSR 0x259 0x0000000000000000
2491 17:39:00.008070 MTRR: Fixed MSR 0x268 0x0606060606060606
2492 17:39:00.011320 MTRR: Fixed MSR 0x269 0x0606060606060606
2493 17:39:00.018138 MTRR: Fixed MSR 0x250 0x0606060606060606
2494 17:39:00.021579 MTRR: Fixed MSR 0x250 0x0606060606060606
2495 17:39:00.024752 MTRR: Fixed MSR 0x26a 0x0606060606060606
2496 17:39:00.028077 MTRR: Fixed MSR 0x26b 0x0606060606060606
2497 17:39:00.034986 MTRR: Fixed MSR 0x26c 0x0606060606060606
2498 17:39:00.037889 MTRR: Fixed MSR 0x26d 0x0606060606060606
2499 17:39:00.041419 MTRR: Fixed MSR 0x26e 0x0606060606060606
2500 17:39:00.044503 MTRR: Fixed MSR 0x26f 0x0606060606060606
2501 17:39:00.047941 call enable_fixed_mtrr()
2502 17:39:00.051421 MTRR: Fixed MSR 0x258 0x0606060606060606
2503 17:39:00.057821 MTRR: Fixed MSR 0x258 0x0606060606060606
2504 17:39:00.061136 CPU physical address size: 39 bits
2505 17:39:00.064536 MTRR: Fixed MSR 0x250 0x0606060606060606
2506 17:39:00.068170 MTRR: Fixed MSR 0x250 0x0606060606060606
2507 17:39:00.071547 MTRR: Fixed MSR 0x259 0x0000000000000000
2508 17:39:00.078009 MTRR: Fixed MSR 0x258 0x0606060606060606
2509 17:39:00.078099 call enable_fixed_mtrr()
2510 17:39:00.084601 MTRR: Fixed MSR 0x259 0x0000000000000000
2511 17:39:00.087945 MTRR: Fixed MSR 0x268 0x0606060606060606
2512 17:39:00.091135 MTRR: Fixed MSR 0x269 0x0606060606060606
2513 17:39:00.094618 MTRR: Fixed MSR 0x26a 0x0606060606060606
2514 17:39:00.101236 MTRR: Fixed MSR 0x26b 0x0606060606060606
2515 17:39:00.104164 MTRR: Fixed MSR 0x26c 0x0606060606060606
2516 17:39:00.107550 MTRR: Fixed MSR 0x26d 0x0606060606060606
2517 17:39:00.110915 MTRR: Fixed MSR 0x26e 0x0606060606060606
2518 17:39:00.114309 MTRR: Fixed MSR 0x26f 0x0606060606060606
2519 17:39:00.121090 MTRR: Fixed MSR 0x259 0x0000000000000000
2520 17:39:00.121213 call enable_fixed_mtrr()
2521 17:39:00.127737 CPU physical address size: 39 bits
2522 17:39:00.131152 MTRR: Fixed MSR 0x268 0x0606060606060606
2523 17:39:00.134034 CPU physical address size: 39 bits
2524 17:39:00.137447 MTRR: Fixed MSR 0x268 0x0606060606060606
2525 17:39:00.140811 MTRR: Fixed MSR 0x269 0x0606060606060606
2526 17:39:00.147612 MTRR: Fixed MSR 0x258 0x0606060606060606
2527 17:39:00.151126 MTRR: Fixed MSR 0x26a 0x0606060606060606
2528 17:39:00.154534 MTRR: Fixed MSR 0x26b 0x0606060606060606
2529 17:39:00.157963 MTRR: Fixed MSR 0x26c 0x0606060606060606
2530 17:39:00.160775 MTRR: Fixed MSR 0x26d 0x0606060606060606
2531 17:39:00.167953 MTRR: Fixed MSR 0x26e 0x0606060606060606
2532 17:39:00.171033 MTRR: Fixed MSR 0x26f 0x0606060606060606
2533 17:39:00.174448 MTRR: Fixed MSR 0x259 0x0000000000000000
2534 17:39:00.177343 MTRR: Fixed MSR 0x258 0x0606060606060606
2535 17:39:00.180631 call enable_fixed_mtrr()
2536 17:39:00.184396 MTRR: Fixed MSR 0x269 0x0606060606060606
2537 17:39:00.187631 CPU physical address size: 39 bits
2538 17:39:00.194649 MTRR: Fixed MSR 0x26a 0x0606060606060606
2539 17:39:00.197215 MTRR: Fixed MSR 0x259 0x0000000000000000
2540 17:39:00.200528 MTRR: Fixed MSR 0x268 0x0606060606060606
2541 17:39:00.203938 MTRR: Fixed MSR 0x269 0x0606060606060606
2542 17:39:00.210762 MTRR: Fixed MSR 0x26a 0x0606060606060606
2543 17:39:00.213774 MTRR: Fixed MSR 0x26b 0x0606060606060606
2544 17:39:00.217297 MTRR: Fixed MSR 0x26c 0x0606060606060606
2545 17:39:00.220772 MTRR: Fixed MSR 0x26d 0x0606060606060606
2546 17:39:00.226902 MTRR: Fixed MSR 0x26e 0x0606060606060606
2547 17:39:00.230642 MTRR: Fixed MSR 0x26f 0x0606060606060606
2548 17:39:00.233692 MTRR: Fixed MSR 0x268 0x0606060606060606
2549 17:39:00.237098 call enable_fixed_mtrr()
2550 17:39:00.240559 MTRR: Fixed MSR 0x269 0x0606060606060606
2551 17:39:00.247263 MTRR: Fixed MSR 0x26a 0x0606060606060606
2552 17:39:00.250123 MTRR: Fixed MSR 0x26b 0x0606060606060606
2553 17:39:00.253701 MTRR: Fixed MSR 0x26c 0x0606060606060606
2554 17:39:00.257397 MTRR: Fixed MSR 0x26d 0x0606060606060606
2555 17:39:00.260568 MTRR: Fixed MSR 0x26e 0x0606060606060606
2556 17:39:00.266839 MTRR: Fixed MSR 0x26f 0x0606060606060606
2557 17:39:00.270493 CPU physical address size: 39 bits
2558 17:39:00.273960 call enable_fixed_mtrr()
2559 17:39:00.276646 MTRR: Fixed MSR 0x26b 0x0606060606060606
2560 17:39:00.280114 CPU physical address size: 39 bits
2561 17:39:00.283548 MTRR: Fixed MSR 0x26c 0x0606060606060606
2562 17:39:00.290503 MTRR: Fixed MSR 0x26d 0x0606060606060606
2563 17:39:00.293744 MTRR: Fixed MSR 0x26e 0x0606060606060606
2564 17:39:00.296794 MTRR: Fixed MSR 0x26f 0x0606060606060606
2565 17:39:00.300461 call enable_fixed_mtrr()
2566 17:39:00.303972 CPU physical address size: 39 bits
2567 17:39:00.308474
2568 17:39:00.308563 MTRR check
2569 17:39:00.311851 Fixed MTRRs : Enabled
2570 17:39:00.311933 Variable MTRRs: Enabled
2571 17:39:00.312013
2572 17:39:00.318621 BS: BS_WRITE_TABLES exit times (exec / console): 252 / 150 ms
2573 17:39:00.322031 Checking cr50 for pending updates
2574 17:39:00.334140 Reading cr50 TPM mode
2575 17:39:00.349138 BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms
2576 17:39:00.359428 CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c
2577 17:39:00.362929 Checking segment from ROM address 0xf96cbe6c
2578 17:39:00.365845 Checking segment from ROM address 0xf96cbe88
2579 17:39:00.372536 Loading segment from ROM address 0xf96cbe6c
2580 17:39:00.372615 code (compression=1)
2581 17:39:00.382537 New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca
2582 17:39:00.389251 Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca
2583 17:39:00.392311 using LZMA
2584 17:39:00.414857 [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4
2585 17:39:00.421536 Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c
2586 17:39:00.430075 Loading segment from ROM address 0xf96cbe88
2587 17:39:00.433164 Entry Point 0x30000000
2588 17:39:00.433249 Loaded segments
2589 17:39:00.439718 BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms
2590 17:39:00.446274 BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms
2591 17:39:00.449704 Finalizing chipset.
2592 17:39:00.449789 apm_control: Finalizing SMM.
2593 17:39:00.453447 APMC done.
2594 17:39:00.456621 HECI: CSE device 16.1 is disabled
2595 17:39:00.459990 HECI: CSE device 16.2 is disabled
2596 17:39:00.463508 HECI: CSE device 16.3 is disabled
2597 17:39:00.466243 HECI: CSE device 16.4 is disabled
2598 17:39:00.469671 HECI: CSE device 16.5 is disabled
2599 17:39:00.472879 HECI: Sending End-of-Post
2600 17:39:00.481622 CSE: EOP requested action: continue boot
2601 17:39:00.484884 CSE EOP successful, continuing boot
2602 17:39:00.491264 BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms
2603 17:39:00.494672 mp_park_aps done after 0 msecs.
2604 17:39:00.498393 Jumping to boot code at 0x30000000(0x76891000)
2605 17:39:00.507857 CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes
2606 17:39:00.512207
2607 17:39:00.512290
2608 17:39:00.512355
2609 17:39:00.515676 Starting depthcharge on Volmar...
2610 17:39:00.515758
2611 17:39:00.516128 end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
2612 17:39:00.516226 start: 2.2.4 bootloader-commands (timeout 00:04:40) [common]
2613 17:39:00.516314 Setting prompt string to ['brya:']
2614 17:39:00.516394 bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:40)
2615 17:39:00.522449 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2616 17:39:00.522536
2617 17:39:00.528898 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2618 17:39:00.529018
2619 17:39:00.535444 Looking for NVMe Controller 0x300653d8 @ 00:06:00
2620 17:39:00.535524
2621 17:39:00.538739 configure_storage: Failed to remap 1C:2
2622 17:39:00.538825
2623 17:39:00.541953 Wipe memory regions:
2624 17:39:00.542054
2625 17:39:00.545402 [0x00000000001000, 0x000000000a0000)
2626 17:39:00.545507
2627 17:39:00.548615 [0x00000000100000, 0x00000030000000)
2628 17:39:00.658177
2629 17:39:00.661551 [0x00000032668e60, 0x00000076857000)
2630 17:39:00.813437
2631 17:39:00.816803 [0x00000100000000, 0x0000027fc00000)
2632 17:39:01.670905
2633 17:39:01.673759 ec_init: CrosEC protocol v3 supported (256, 256)
2634 17:39:02.283620
2635 17:39:02.283767 R8152: Initializing
2636 17:39:02.283835
2637 17:39:02.286654 Version 9 (ocp_data = 6010)
2638 17:39:02.286728
2639 17:39:02.290125 R8152: Done initializing
2640 17:39:02.290208
2641 17:39:02.293055 Adding net device
2642 17:39:02.594157
2643 17:39:02.597567 [firmware-brya-14505.B-collabora] Feb 7 2023 16:06:26
2644 17:39:02.597646
2645 17:39:02.597717
2646 17:39:02.597777
2647 17:39:02.598048 Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2649 17:39:02.698390 brya: tftpboot 192.168.201.1 11831825/tftp-deploy-i650dzlc/kernel/bzImage 11831825/tftp-deploy-i650dzlc/kernel/cmdline 11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
2650 17:39:02.698632 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2651 17:39:02.698762 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:38)
2652 17:39:02.703492 tftpboot 192.168.201.1 11831825/tftp-deploy-i650dzlc/kernel/bzIploy-i650dzlc/kernel/cmdline 11831825/tftp-deploy-i650dzlc/ramdisk/ramdisk.cpio.gz
2653 17:39:02.703621
2654 17:39:02.703726 Waiting for link
2655 17:39:02.906432
2656 17:39:02.906630 done.
2657 17:39:02.906745
2658 17:39:02.906846 MAC: 00:e0:4c:68:01:8f
2659 17:39:02.906948
2660 17:39:02.909696 Sending DHCP discover... done.
2661 17:39:02.909815
2662 17:39:02.912915 Waiting for reply... done.
2663 17:39:02.913051
2664 17:39:02.916187 Sending DHCP request... done.
2665 17:39:02.916319
2666 17:39:02.919505 Waiting for reply... done.
2667 17:39:02.919623
2668 17:39:02.922865 My ip is 192.168.201.28
2669 17:39:02.922988
2670 17:39:02.926240 The DHCP server ip is 192.168.201.1
2671 17:39:02.926354
2672 17:39:02.932746 TFTP server IP predefined by user: 192.168.201.1
2673 17:39:02.932869
2674 17:39:02.939539 Bootfile predefined by user: 11831825/tftp-deploy-i650dzlc/kernel/bzImage
2675 17:39:02.939651
2676 17:39:02.942869 Sending tftp read request... done.
2677 17:39:02.942985
2678 17:39:02.946365 Waiting for the transfer...
2679 17:39:02.946474
2680 17:39:03.210560 00000000 ################################################################
2681 17:39:03.210750
2682 17:39:03.469826 00080000 ################################################################
2683 17:39:03.469975
2684 17:39:03.725608 00100000 ################################################################
2685 17:39:03.725777
2686 17:39:03.980833 00180000 ################################################################
2687 17:39:03.981042
2688 17:39:04.240476 00200000 ################################################################
2689 17:39:04.240624
2690 17:39:04.506399 00280000 ################################################################
2691 17:39:04.506552
2692 17:39:04.769161 00300000 ################################################################
2693 17:39:04.769341
2694 17:39:05.023258 00380000 ################################################################
2695 17:39:05.023436
2696 17:39:05.268316 00400000 ################################################################
2697 17:39:05.268491
2698 17:39:05.519458 00480000 ################################################################
2699 17:39:05.519635
2700 17:39:05.799802 00500000 ################################################################
2701 17:39:05.799973
2702 17:39:06.054276 00580000 ################################################################
2703 17:39:06.054447
2704 17:39:06.308705 00600000 ################################################################
2705 17:39:06.308896
2706 17:39:06.567210 00680000 ################################################################
2707 17:39:06.567415
2708 17:39:06.838287 00700000 ################################################################
2709 17:39:06.838432
2710 17:39:07.089113 00780000 ################################################################
2711 17:39:07.089265
2712 17:39:07.143618 00800000 ############### done.
2713 17:39:07.143782
2714 17:39:07.147090 The bootfile was 8507280 bytes long.
2715 17:39:07.147173
2716 17:39:07.150004 Sending tftp read request... done.
2717 17:39:07.150090
2718 17:39:07.153519 Waiting for the transfer...
2719 17:39:07.153603
2720 17:39:07.405295 00000000 ################################################################
2721 17:39:07.405443
2722 17:39:07.657627 00080000 ################################################################
2723 17:39:07.657783
2724 17:39:07.908668 00100000 ################################################################
2725 17:39:07.908842
2726 17:39:08.160300 00180000 ################################################################
2727 17:39:08.160478
2728 17:39:08.411004 00200000 ################################################################
2729 17:39:08.411259
2730 17:39:08.671414 00280000 ################################################################
2731 17:39:08.671568
2732 17:39:08.927025 00300000 ################################################################
2733 17:39:08.927214
2734 17:39:09.204272 00380000 ################################################################
2735 17:39:09.204420
2736 17:39:09.485751 00400000 ################################################################
2737 17:39:09.485930
2738 17:39:09.789833 00480000 ################################################################
2739 17:39:09.789998
2740 17:39:10.086117 00500000 ################################################################
2741 17:39:10.086291
2742 17:39:10.383813 00580000 ################################################################
2743 17:39:10.383999
2744 17:39:10.719464 00600000 ################################################################
2745 17:39:10.719646
2746 17:39:11.057138 00680000 ################################################################
2747 17:39:11.057334
2748 17:39:11.395187 00700000 ################################################################
2749 17:39:11.395379
2750 17:39:11.721928 00780000 ################################################################
2751 17:39:11.722122
2752 17:39:11.936803 00800000 ##################################################### done.
2753 17:39:11.937050
2754 17:39:11.940434 Sending tftp read request... done.
2755 17:39:11.940546
2756 17:39:11.943848 Waiting for the transfer...
2757 17:39:11.943960
2758 17:39:11.944054 00000000 # done.
2759 17:39:11.944149
2760 17:39:11.953630 Command line loaded dynamically from TFTP file: 11831825/tftp-deploy-i650dzlc/kernel/cmdline
2761 17:39:11.953749
2762 17:39:11.969938 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2763 17:39:11.973881
2764 17:39:11.977178 Shutting down all USB controllers.
2765 17:39:11.977290
2766 17:39:11.977385 Removing current net device
2767 17:39:11.977476
2768 17:39:11.980494 Finalizing coreboot
2769 17:39:11.980602
2770 17:39:11.986961 Exiting depthcharge with code 4 at timestamp: 21726051
2771 17:39:11.987102
2772 17:39:11.987214
2773 17:39:11.987334 Starting kernel ...
2774 17:39:11.987501
2775 17:39:11.987689
2776 17:39:11.988281 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
2777 17:39:11.988456 start: 2.2.5 auto-login-action (timeout 00:04:29) [common]
2778 17:39:11.988595 Setting prompt string to ['Linux version [0-9]']
2779 17:39:11.988720 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2780 17:39:11.988848 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2782 17:43:40.989629 end: 2.2.5 auto-login-action (duration 00:04:29) [common]
2784 17:43:40.990860 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 269 seconds'
2786 17:43:40.991800 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2789 17:43:40.993612 end: 2 depthcharge-action (duration 00:05:00) [common]
2791 17:43:40.995049 Cleaning after the job
2792 17:43:40.995502 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/ramdisk
2793 17:43:41.000544 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/kernel
2794 17:43:41.005447 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831825/tftp-deploy-i650dzlc/modules
2795 17:43:41.007037 start: 5.1 power-off (timeout 00:00:30) [common]
2796 17:43:41.007968 Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-0' '--port=1' '--command=off'
2797 17:43:41.129084 >> Command sent successfully.
2798 17:43:41.140706 Returned 0 in 0 seconds
2799 17:43:41.241766 end: 5.1 power-off (duration 00:00:00) [common]
2801 17:43:41.242141 start: 5.2 read-feedback (timeout 00:10:00) [common]
2802 17:43:41.242436 Listened to connection for namespace 'common' for up to 1s
2804 17:43:41.242888 Listened to connection for namespace 'common' for up to 1s
2805 17:43:42.243589 Finalising connection for namespace 'common'
2806 17:43:42.244429 Disconnecting from shell: Finalise
2807 17:43:42.245157
2808 17:43:42.346382 end: 5.2 read-feedback (duration 00:00:01) [common]
2809 17:43:42.347035 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831825
2810 17:43:42.404912 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831825
2811 17:43:42.405210 JobError: Your job cannot terminate cleanly.