Boot log: dell-latitude-5400-4305U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:40:13.613024 lava-dispatcher, installed at version: 2023.08
2 17:40:13.613233 start: 0 validate
3 17:40:13.613407 Start time: 2023-10-20 17:40:13.613398+00:00 (UTC)
4 17:40:13.613580 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:40:13.613777 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:40:13.881935 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:40:13.882156 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:40:17.383816 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:40:17.384542 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:40:18.392785 validate duration: 4.78
12 17:40:18.393076 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:40:18.393186 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:40:18.393282 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:40:18.393405 Not decompressing ramdisk as can be used compressed.
16 17:40:18.393492 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:40:18.393559 saving as /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/ramdisk/rootfs.cpio.gz
18 17:40:18.393638 total size: 8418130 (8 MB)
19 17:40:18.394737 progress 0 % (0 MB)
20 17:40:18.397221 progress 5 % (0 MB)
21 17:40:18.399807 progress 10 % (0 MB)
22 17:40:18.402258 progress 15 % (1 MB)
23 17:40:18.404673 progress 20 % (1 MB)
24 17:40:18.406985 progress 25 % (2 MB)
25 17:40:18.409418 progress 30 % (2 MB)
26 17:40:18.411702 progress 35 % (2 MB)
27 17:40:18.413986 progress 40 % (3 MB)
28 17:40:18.416336 progress 45 % (3 MB)
29 17:40:18.418618 progress 50 % (4 MB)
30 17:40:18.420923 progress 55 % (4 MB)
31 17:40:18.423179 progress 60 % (4 MB)
32 17:40:18.425258 progress 65 % (5 MB)
33 17:40:18.427553 progress 70 % (5 MB)
34 17:40:18.429847 progress 75 % (6 MB)
35 17:40:18.432141 progress 80 % (6 MB)
36 17:40:18.434370 progress 85 % (6 MB)
37 17:40:18.436723 progress 90 % (7 MB)
38 17:40:18.438992 progress 95 % (7 MB)
39 17:40:18.441152 progress 100 % (8 MB)
40 17:40:18.441386 8 MB downloaded in 0.05 s (168.13 MB/s)
41 17:40:18.441542 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:40:18.441785 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:40:18.441876 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:40:18.441964 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:40:18.442099 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:40:18.442168 saving as /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/kernel/bzImage
48 17:40:18.442230 total size: 8507280 (8 MB)
49 17:40:18.442292 No compression specified
50 17:40:18.443503 progress 0 % (0 MB)
51 17:40:18.445737 progress 5 % (0 MB)
52 17:40:18.448047 progress 10 % (0 MB)
53 17:40:18.450305 progress 15 % (1 MB)
54 17:40:18.452620 progress 20 % (1 MB)
55 17:40:18.454882 progress 25 % (2 MB)
56 17:40:18.457183 progress 30 % (2 MB)
57 17:40:18.459448 progress 35 % (2 MB)
58 17:40:18.461738 progress 40 % (3 MB)
59 17:40:18.464081 progress 45 % (3 MB)
60 17:40:18.466354 progress 50 % (4 MB)
61 17:40:18.468646 progress 55 % (4 MB)
62 17:40:18.470901 progress 60 % (4 MB)
63 17:40:18.473209 progress 65 % (5 MB)
64 17:40:18.475428 progress 70 % (5 MB)
65 17:40:18.477782 progress 75 % (6 MB)
66 17:40:18.480058 progress 80 % (6 MB)
67 17:40:18.482315 progress 85 % (6 MB)
68 17:40:18.484675 progress 90 % (7 MB)
69 17:40:18.486884 progress 95 % (7 MB)
70 17:40:18.489155 progress 100 % (8 MB)
71 17:40:18.489350 8 MB downloaded in 0.05 s (172.20 MB/s)
72 17:40:18.489494 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:40:18.489732 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:40:18.489818 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:40:18.489905 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:40:18.490041 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:40:18.490110 saving as /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/modules/modules.tar
79 17:40:18.490171 total size: 253900 (0 MB)
80 17:40:18.490237 Using unxz to decompress xz
81 17:40:18.494094 progress 12 % (0 MB)
82 17:40:18.494517 progress 25 % (0 MB)
83 17:40:18.494761 progress 38 % (0 MB)
84 17:40:18.496337 progress 51 % (0 MB)
85 17:40:18.498148 progress 64 % (0 MB)
86 17:40:18.500221 progress 77 % (0 MB)
87 17:40:18.502137 progress 90 % (0 MB)
88 17:40:18.504004 progress 100 % (0 MB)
89 17:40:18.509900 0 MB downloaded in 0.02 s (12.28 MB/s)
90 17:40:18.510189 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:40:18.510624 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:40:18.510854 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:40:18.510979 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:40:18.511082 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:40:18.511204 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:40:18.511474 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l
98 17:40:18.511700 makedir: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin
99 17:40:18.511848 makedir: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/tests
100 17:40:18.511988 makedir: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/results
101 17:40:18.512222 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-add-keys
102 17:40:18.512439 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-add-sources
103 17:40:18.512609 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-background-process-start
104 17:40:18.512839 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-background-process-stop
105 17:40:18.512997 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-common-functions
106 17:40:18.513153 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-echo-ipv4
107 17:40:18.513314 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-install-packages
108 17:40:18.513469 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-installed-packages
109 17:40:18.513626 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-os-build
110 17:40:18.513782 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-probe-channel
111 17:40:18.513943 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-probe-ip
112 17:40:18.514098 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-target-ip
113 17:40:18.514252 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-target-mac
114 17:40:18.514406 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-target-storage
115 17:40:18.514565 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-case
116 17:40:18.514721 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-event
117 17:40:18.514880 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-feedback
118 17:40:18.515022 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-raise
119 17:40:18.515183 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-reference
120 17:40:18.515339 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-runner
121 17:40:18.515498 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-set
122 17:40:18.515697 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-test-shell
123 17:40:18.515844 Updating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-install-packages (oe)
124 17:40:18.516032 Updating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/bin/lava-installed-packages (oe)
125 17:40:18.516161 Creating /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/environment
126 17:40:18.516259 LAVA metadata
127 17:40:18.516332 - LAVA_JOB_ID=11831858
128 17:40:18.516396 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:40:18.516505 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:40:18.516572 skipped lava-vland-overlay
131 17:40:18.516688 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:40:18.516768 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:40:18.516830 skipped lava-multinode-overlay
134 17:40:18.516922 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:40:18.517042 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:40:18.517165 Loading test definitions
137 17:40:18.517295 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:40:18.517426 Using /lava-11831858 at stage 0
139 17:40:18.517893 uuid=11831858_1.4.2.3.1 testdef=None
140 17:40:18.518010 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:40:18.518168 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:40:18.518914 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:40:18.519299 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:40:18.520231 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:40:18.520495 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:40:18.521119 runner path: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/0/tests/0_dmesg test_uuid 11831858_1.4.2.3.1
149 17:40:18.521273 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:40:18.521503 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:40:18.521574 Using /lava-11831858 at stage 1
153 17:40:18.521881 uuid=11831858_1.4.2.3.5 testdef=None
154 17:40:18.521984 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:40:18.522084 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:40:18.522755 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:40:18.522975 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:40:18.523671 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:40:18.523911 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:40:18.524536 runner path: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/1/tests/1_bootrr test_uuid 11831858_1.4.2.3.5
163 17:40:18.524686 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:40:18.524894 Creating lava-test-runner.conf files
166 17:40:18.524966 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/0 for stage 0
167 17:40:18.525097 - 0_dmesg
168 17:40:18.525182 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831858/lava-overlay-a74idi1l/lava-11831858/1 for stage 1
169 17:40:18.525296 - 1_bootrr
170 17:40:18.525526 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:40:18.525659 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:40:18.534473 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:40:18.534592 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:40:18.534720 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:40:18.534806 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:40:18.534890 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:40:18.789459 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:40:18.789846 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:40:18.789965 extracting modules file /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831858/extract-overlay-ramdisk-ntwtjmju/ramdisk
180 17:40:18.804112 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:40:18.804250 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:40:18.804351 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831858/compress-overlay-_3nt5zcx/overlay-1.4.2.4.tar.gz to ramdisk
183 17:40:18.804423 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831858/compress-overlay-_3nt5zcx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831858/extract-overlay-ramdisk-ntwtjmju/ramdisk
184 17:40:18.814460 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:40:18.814587 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:40:18.814680 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:40:18.814772 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:40:18.814853 Building ramdisk /var/lib/lava/dispatcher/tmp/11831858/extract-overlay-ramdisk-ntwtjmju/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831858/extract-overlay-ramdisk-ntwtjmju/ramdisk
189 17:40:18.947278 >> 49827 blocks
190 17:40:19.802002 rename /var/lib/lava/dispatcher/tmp/11831858/extract-overlay-ramdisk-ntwtjmju/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
191 17:40:19.802433 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:40:19.802556 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:40:19.802661 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:40:19.802757 No mkimage arch provided, not using FIT.
195 17:40:19.802844 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:40:19.802926 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:40:19.803025 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:40:19.803114 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:40:19.803191 No LXC device requested
200 17:40:19.803265 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:40:19.803353 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:40:19.803434 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:40:19.803510 Checking files for TFTP limit of 4294967296 bytes.
204 17:40:19.803954 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:40:19.804057 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:40:19.804147 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:40:19.804270 substitutions:
208 17:40:19.804334 - {DTB}: None
209 17:40:19.804397 - {INITRD}: 11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
210 17:40:19.804456 - {KERNEL}: 11831858/tftp-deploy-mduj3sc4/kernel/bzImage
211 17:40:19.804512 - {LAVA_MAC}: None
212 17:40:19.804567 - {PRESEED_CONFIG}: None
213 17:40:19.804620 - {PRESEED_LOCAL}: None
214 17:40:19.804674 - {RAMDISK}: 11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
215 17:40:19.804728 - {ROOT_PART}: None
216 17:40:19.804782 - {ROOT}: None
217 17:40:19.804835 - {SERVER_IP}: 192.168.201.1
218 17:40:19.804888 - {TEE}: None
219 17:40:19.804941 Parsed boot commands:
220 17:40:19.804993 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:40:19.805163 Parsed boot commands: tftpboot 192.168.201.1 11831858/tftp-deploy-mduj3sc4/kernel/bzImage 11831858/tftp-deploy-mduj3sc4/kernel/cmdline 11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
222 17:40:19.805248 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:40:19.805346 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:40:19.805437 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:40:19.805518 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:40:19.805589 Not connected, no need to disconnect.
227 17:40:19.805661 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:40:19.805851 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:40:19.805919 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-4305U-sarien-cbg-0'
230 17:40:19.809580 Setting prompt string to ['lava-test: # ']
231 17:40:19.809940 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:40:19.810048 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:40:19.810141 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:40:19.810245 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:40:19.810446 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
236 17:40:36.703184 >> Command sent successfully.
237 17:40:36.706115 Returned 0 in 16 seconds
238 17:40:36.806503 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:40:36.806821 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:40:36.806922 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:40:36.807021 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:40:36.807089 Changing prompt to 'Starting depthcharge on sarien...'
244 17:40:36.807158 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:40:36.807427 [Enter `^Ec?' for help]
246 17:40:36.807535
247 17:40:36.807628
248 17:40:36.807735 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:40:36.807799 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
250 17:40:36.807866 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:40:36.807929 CPU: AES supported, TXT NOT supported, VT supported
252 17:40:36.807985 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
253 17:40:36.808041 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:40:36.808096 IGD: device id 3ea1 (rev 02) is Unknown
255 17:40:36.808152 VBOOT: Loading verstage.
256 17:40:36.808209 CBFS @ 1d00000 size 300000
257 17:40:36.808264 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:40:36.808338 CBFS: Locating 'fallback/verstage'
259 17:40:36.808394 CBFS: Found @ offset 10f6c0 size 1435c
260 17:40:36.808449
261 17:40:36.808502
262 17:40:36.808555 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:40:36.808610 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:40:36.808665 done! DID_VID 0x00281ae0
265 17:40:36.808719 TPM ready after 0 ms
266 17:40:36.808773 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:40:36.808827 tlcl_send_startup: Startup return code is 0
268 17:40:36.808907 TPM: setup succeeded
269 17:40:36.808976 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:40:36.809031 Checking cr50 for recovery request
271 17:40:36.809085 Phase 1
272 17:40:36.809138 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:40:36.809194 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:40:36.809255 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:40:36.809310 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:40:36.809365 Phase 2
277 17:40:36.809418 Phase 3
278 17:40:36.809471 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:40:36.809525 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:40:36.809579 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
281 17:40:36.809633 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
282 17:40:36.809687 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:40:36.809743 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
284 17:40:36.809799 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
285 17:40:36.809853 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:40:36.809907 Phase 4
287 17:40:36.809960 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
288 17:40:36.810014 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:40:36.810068 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:40:36.810122 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:40:36.810175 Saving nvdata
292 17:40:36.810228 Reboot requested (10020007)
293 17:40:36.810282 board_reset() called!
294 17:40:36.810335 full_reset() called!
295 17:40:40.970943
296 17:40:40.971086
297 17:40:40.979276 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:40:40.983997 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
299 17:40:40.988318 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:40:40.994137 CPU: AES supported, TXT NOT supported, VT supported
301 17:40:40.999799 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
302 17:40:41.004704 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:40:41.008403 IGD: device id 3ea1 (rev 02) is Unknown
304 17:40:41.011868 VBOOT: Loading verstage.
305 17:40:41.014667 CBFS @ 1d00000 size 300000
306 17:40:41.020940 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:40:41.025205 CBFS: Locating 'fallback/verstage'
308 17:40:41.028525 CBFS: Found @ offset 10f6c0 size 1435c
309 17:40:41.043220
310 17:40:41.043308
311 17:40:41.050822 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:40:41.057994 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:40:41.061213 done! DID_VID 0x00281ae0
314 17:40:41.063919 TPM ready after 0 ms
315 17:40:41.066825 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:40:41.159378 tlcl_send_startup: Startup return code is 0
317 17:40:41.161475 TPM: setup succeeded
318 17:40:41.178337 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:40:41.181833 Checking cr50 for recovery request
320 17:40:41.192074 Phase 1
321 17:40:41.197257 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:40:41.201535 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:40:41.206312 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:40:41.213884 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:40:41.220311 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:40:41.222895 Recovery requested (1009000e)
327 17:40:41.224863 Saving nvdata
328 17:40:41.239620 tlcl_extend: response is 0
329 17:40:41.254223 tlcl_extend: response is 0
330 17:40:41.257496 CBFS @ 1d00000 size 300000
331 17:40:41.263275 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:40:41.267322 CBFS: Locating 'fallback/romstage'
333 17:40:41.270283 CBFS: Found @ offset 80 size 15b2c
334 17:40:41.272228
335 17:40:41.272487
336 17:40:41.280739 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:40:41.285106 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:40:41.290185 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:40:41.294209 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:40:41.298210 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:40:41.302926 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:40:41.304940 TCO_STS: 0000 0004
343 17:40:41.307683 GEN_PMCON: d0015209 00002200
344 17:40:41.310598 GBLRST_CAUSE: 00000000 00000000
345 17:40:41.313193 prev_sleep_state 5
346 17:40:41.317360 Boot Count incremented to 43310
347 17:40:41.319552 CBFS @ 1d00000 size 300000
348 17:40:41.326741 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:40:41.328715 CBFS: Locating 'fspm.bin'
350 17:40:41.332086 CBFS: Found @ offset 60fc0 size 70000
351 17:40:41.337868 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:40:41.343422 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:40:41.348809 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:40:41.355096 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:40:41.357828 Locality already claimed
356 17:40:41.361308 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:40:41.381213 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:40:41.387052 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:40:41.390384 MRC cache found, size 18e0
360 17:40:41.392468 bootmode is set to :2
361 17:40:41.482007 CBMEM:
362 17:40:41.485448 IMD: root @ 89fff000 254 entries.
363 17:40:41.488714 IMD: root @ 89ffec00 62 entries.
364 17:40:41.492204 External stage cache:
365 17:40:41.495571 IMD: root @ 8abff000 254 entries.
366 17:40:41.498500 IMD: root @ 8abfec00 62 entries.
367 17:40:41.504180 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:40:41.508917 creating vboot_handoff structure
369 17:40:41.528891 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:40:41.544146 tlcl_write: response is 0
371 17:40:41.563707 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:40:41.568146 MRC: TPM MRC hash updated successfully.
373 17:40:41.569507 1 DIMMs found
374 17:40:41.572356 top_of_ram = 0x8a000000
375 17:40:41.576974 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:40:41.582576 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:40:41.584146 CBFS @ 1d00000 size 300000
378 17:40:41.591124 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:40:41.594618 CBFS: Locating 'fallback/postcar'
380 17:40:41.597729 CBFS: Found @ offset 107000 size 41a4
381 17:40:41.604496 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:40:41.614614 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:40:41.619647 Processing 126 relocs. Offset value of 0x87cdd000
384 17:40:41.621735
385 17:40:41.621818
386 17:40:41.630778 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:40:41.633613 CBFS @ 1d00000 size 300000
388 17:40:41.639159 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:40:41.643743 CBFS: Locating 'fallback/ramstage'
390 17:40:41.647125 CBFS: Found @ offset 458c0 size 1a8a8
391 17:40:41.653217 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:40:41.680645 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:40:41.685640 Processing 3754 relocs. Offset value of 0x88e81000
394 17:40:41.690862
395 17:40:41.690947
396 17:40:41.699394 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:40:41.704189 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:40:41.709249 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:40:41.713581 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:40:41.718430 WARNING: RO_VPD is uninitialized or empty.
401 17:40:41.722825 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:40:41.728240 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:40:41.729121 Normal boot.
404 17:40:41.735449 BS: BS_PRE_DEVICE times (us): entry 0 run 51 exit 1163
405 17:40:41.738739 CBFS @ 1d00000 size 300000
406 17:40:41.745618 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:40:41.749000 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:40:41.752701 CBFS: Found @ offset 15c40 size 2fc00
409 17:40:41.757425 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:40:41.758912 Skip microcode update
411 17:40:41.762577 CBFS @ 1d00000 size 300000
412 17:40:41.768185 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:40:41.770729 CBFS: Locating 'fsps.bin'
414 17:40:41.774807 CBFS: Found @ offset d1fc0 size 35000
415 17:40:41.808722 Detected 2 core, 2 thread CPU.
416 17:40:41.812168 Setting up SMI for CPU
417 17:40:41.814228 IED base = 0x8ac00000
418 17:40:41.816135 IED size = 0x00400000
419 17:40:41.819596 Will perform SMM setup.
420 17:40:41.823136 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
421 17:40:41.832021 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:40:41.836938 Processing 16 relocs. Offset value of 0x00030000
423 17:40:41.838579 Attempting to start 1 APs
424 17:40:41.843198 Waiting for 10ms after sending INIT.
425 17:40:41.856827 Waiting for 1st SIPI to complete...done.
426 17:40:41.859176 AP: slot 1 apic_id 2.
427 17:40:41.863374 Waiting for 2nd SIPI to complete...done.
428 17:40:41.870339 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
429 17:40:41.876292 Processing 13 relocs. Offset value of 0x00038000
430 17:40:41.882149 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
431 17:40:41.886142 Installing SMM handler to 0x8a000000
432 17:40:41.893944 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
433 17:40:41.899270 Processing 867 relocs. Offset value of 0x8a010000
434 17:40:41.907616 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
435 17:40:41.912435 Processing 13 relocs. Offset value of 0x8a008000
436 17:40:41.918525 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
437 17:40:41.924807 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
438 17:40:41.927840 Clearing SMI status registers
439 17:40:41.929228 SMI_STS: PM1
440 17:40:41.931823 PM1_STS: WAK PWRBTN
441 17:40:41.934063 TCO_STS: BOOT SECOND_TO
442 17:40:41.936152 GPE0 STD STS: eSPI
443 17:40:41.937766 New SMBASE 0x8a000000
444 17:40:41.941660 In relocation handler: CPU 0
445 17:40:41.944881 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
446 17:40:41.950202 Writing SMRR. base = 0x8a000006, mask=0xff000800
447 17:40:41.953068 Relocation complete.
448 17:40:41.954264 New SMBASE 0x89fffc00
449 17:40:41.957729 In relocation handler: CPU 1
450 17:40:41.961975 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
451 17:40:41.966960 Writing SMRR. base = 0x8a000006, mask=0xff000800
452 17:40:41.969064 Relocation complete.
453 17:40:41.971125 Initializing CPU #0
454 17:40:41.974586 CPU: vendor Intel device 806ec
455 17:40:41.978127 CPU: family 06, model 8e, stepping 0c
456 17:40:41.980988 Clearing out pending MCEs
457 17:40:41.984557 Setting up local APIC... apic_id: 0x00 done.
458 17:40:41.988566 Turbo is available but hidden
459 17:40:41.990155 Turbo has been enabled
460 17:40:41.992728 VMX status: enabled
461 17:40:41.995665 IA32_FEATURE_CONTROL status: locked
462 17:40:41.998731 Skip microcode update
463 17:40:42.000281 CPU #0 initialized
464 17:40:42.002125 Initializing CPU #1
465 17:40:42.005474 CPU: vendor Intel device 806ec
466 17:40:42.009456 CPU: family 06, model 8e, stepping 0c
467 17:40:42.012118 Clearing out pending MCEs
468 17:40:42.016371 Setting up local APIC... apic_id: 0x02 done.
469 17:40:42.018833 VMX status: enabled
470 17:40:42.022339 IA32_FEATURE_CONTROL status: locked
471 17:40:42.023898 Skip microcode update
472 17:40:42.026528 CPU #1 initialized
473 17:40:42.030869 bsp_do_flight_plan done after 163 msecs.
474 17:40:42.033733 CPU: frequency set to 2200 MHz
475 17:40:42.035475 Enabling SMIs.
476 17:40:42.036221 Locking SMM.
477 17:40:42.040059 CBFS @ 1d00000 size 300000
478 17:40:42.045742 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
479 17:40:42.048442 CBFS: Locating 'vbt.bin'
480 17:40:42.052585 CBFS: Found @ offset 60a40 size 4a0
481 17:40:42.057071 Found a VBT of 4608 bytes after decompression
482 17:40:42.071229 FMAP: area GBB found @ 1c11000 (978944 bytes)
483 17:40:42.181776 Detected 2 core, 2 thread CPU.
484 17:40:42.185265 Detected 2 core, 2 thread CPU.
485 17:40:42.413861 Display FSP Version Info HOB
486 17:40:42.417970 Reference Code - CPU = 7.0.5e.40
487 17:40:42.419510 uCode Version = 0.0.0.b8
488 17:40:42.423349 Display FSP Version Info HOB
489 17:40:42.426895 Reference Code - ME = 7.0.5e.40
490 17:40:42.428313 MEBx version = 0.0.0.0
491 17:40:42.432423 ME Firmware Version = Consumer SKU
492 17:40:42.434548 Display FSP Version Info HOB
493 17:40:42.438679 Reference Code - CNL PCH = 7.0.5e.40
494 17:40:42.441981 PCH-CRID Status = Disabled
495 17:40:42.444902 CNL PCH H A0 Hsio Version = 2.0.0.0
496 17:40:42.448153 CNL PCH H Ax Hsio Version = 9.0.0.0
497 17:40:42.452273 CNL PCH H Bx Hsio Version = a.0.0.0
498 17:40:42.455363 CNL PCH LP B0 Hsio Version = 7.0.0.0
499 17:40:42.459761 CNL PCH LP Bx Hsio Version = 6.0.0.0
500 17:40:42.463183 CNL PCH LP Dx Hsio Version = 7.0.0.0
501 17:40:42.466422 Display FSP Version Info HOB
502 17:40:42.470974 Reference Code - SA - System Agent = 7.0.5e.40
503 17:40:42.474382 Reference Code - MRC = 0.7.1.68
504 17:40:42.477073 SA - PCIe Version = 7.0.5e.40
505 17:40:42.479156 SA-CRID Status = Disabled
506 17:40:42.483234 SA-CRID Original Value = 0.0.0.c
507 17:40:42.485963 SA-CRID New Value = 0.0.0.c
508 17:40:42.504262 RTC Init
509 17:40:42.507990 Set power off after power failure.
510 17:40:42.510513 Disabling Deep S3
511 17:40:42.512608 Disabling Deep S3
512 17:40:42.513350 Disabling Deep S4
513 17:40:42.516223 Disabling Deep S4
514 17:40:42.517631 Disabling Deep S5
515 17:40:42.519274 Disabling Deep S5
516 17:40:42.526557 BS: BS_DEV_INIT_CHIPS times (us): entry 300889 run 466278 exit 16225
517 17:40:42.528595 Enumerating buses...
518 17:40:42.533018 Show all devs... Before device enumeration.
519 17:40:42.535612 Root Device: enabled 1
520 17:40:42.537818 CPU_CLUSTER: 0: enabled 1
521 17:40:42.540654 DOMAIN: 0000: enabled 1
522 17:40:42.542217 APIC: 00: enabled 1
523 17:40:42.544179 PCI: 00:00.0: enabled 1
524 17:40:42.547602 PCI: 00:02.0: enabled 1
525 17:40:42.549596 PCI: 00:04.0: enabled 1
526 17:40:42.552337 PCI: 00:12.0: enabled 1
527 17:40:42.553773 PCI: 00:12.5: enabled 0
528 17:40:42.556630 PCI: 00:12.6: enabled 0
529 17:40:42.558852 PCI: 00:13.0: enabled 0
530 17:40:42.562014 PCI: 00:14.0: enabled 1
531 17:40:42.564068 PCI: 00:14.1: enabled 0
532 17:40:42.566089 PCI: 00:14.3: enabled 1
533 17:40:42.568841 PCI: 00:14.5: enabled 0
534 17:40:42.571513 PCI: 00:15.0: enabled 1
535 17:40:42.574395 PCI: 00:15.1: enabled 1
536 17:40:42.576333 PCI: 00:15.2: enabled 0
537 17:40:42.578301 PCI: 00:15.3: enabled 0
538 17:40:42.581057 PCI: 00:16.0: enabled 1
539 17:40:42.583049 PCI: 00:16.1: enabled 0
540 17:40:42.585539 PCI: 00:16.2: enabled 0
541 17:40:42.588190 PCI: 00:16.3: enabled 0
542 17:40:42.590659 PCI: 00:16.4: enabled 0
543 17:40:42.593303 PCI: 00:16.5: enabled 0
544 17:40:42.595532 PCI: 00:17.0: enabled 1
545 17:40:42.598468 PCI: 00:19.0: enabled 1
546 17:40:42.600666 PCI: 00:19.1: enabled 0
547 17:40:42.602863 PCI: 00:19.2: enabled 1
548 17:40:42.605385 PCI: 00:1a.0: enabled 0
549 17:40:42.608155 PCI: 00:1c.0: enabled 1
550 17:40:42.610895 PCI: 00:1c.1: enabled 0
551 17:40:42.612980 PCI: 00:1c.2: enabled 0
552 17:40:42.615779 PCI: 00:1c.3: enabled 0
553 17:40:42.617212 PCI: 00:1c.4: enabled 0
554 17:40:42.619539 PCI: 00:1c.5: enabled 0
555 17:40:42.622038 PCI: 00:1c.6: enabled 0
556 17:40:42.624402 PCI: 00:1c.7: enabled 1
557 17:40:42.627812 PCI: 00:1d.0: enabled 1
558 17:40:42.629879 PCI: 00:1d.1: enabled 1
559 17:40:42.632827 PCI: 00:1d.2: enabled 0
560 17:40:42.634444 PCI: 00:1d.3: enabled 0
561 17:40:42.636507 PCI: 00:1d.4: enabled 1
562 17:40:42.639236 PCI: 00:1e.0: enabled 0
563 17:40:42.641893 PCI: 00:1e.1: enabled 0
564 17:40:42.643839 PCI: 00:1e.2: enabled 0
565 17:40:42.647346 PCI: 00:1e.3: enabled 0
566 17:40:42.649455 PCI: 00:1f.0: enabled 1
567 17:40:42.651538 PCI: 00:1f.1: enabled 1
568 17:40:42.654421 PCI: 00:1f.2: enabled 1
569 17:40:42.656088 PCI: 00:1f.3: enabled 1
570 17:40:42.659256 PCI: 00:1f.4: enabled 1
571 17:40:42.661821 PCI: 00:1f.5: enabled 1
572 17:40:42.663402 PCI: 00:1f.6: enabled 1
573 17:40:42.665822 USB0 port 0: enabled 1
574 17:40:42.668404 I2C: 00:10: enabled 1
575 17:40:42.670827 I2C: 00:10: enabled 1
576 17:40:42.672397 I2C: 00:34: enabled 1
577 17:40:42.674448 I2C: 00:2c: enabled 1
578 17:40:42.677093 I2C: 00:50: enabled 1
579 17:40:42.679934 PNP: 0c09.0: enabled 1
580 17:40:42.681573 USB2 port 0: enabled 1
581 17:40:42.684356 USB2 port 1: enabled 1
582 17:40:42.686383 USB2 port 2: enabled 1
583 17:40:42.688964 USB2 port 4: enabled 1
584 17:40:42.690931 USB2 port 5: enabled 1
585 17:40:42.694106 USB2 port 6: enabled 1
586 17:40:42.695974 USB2 port 7: enabled 1
587 17:40:42.698138 USB2 port 8: enabled 1
588 17:40:42.699972 USB2 port 9: enabled 1
589 17:40:42.702621 USB3 port 0: enabled 1
590 17:40:42.705842 USB3 port 1: enabled 1
591 17:40:42.707463 USB3 port 2: enabled 1
592 17:40:42.710427 USB3 port 3: enabled 1
593 17:40:42.712530 USB3 port 4: enabled 1
594 17:40:42.713923 APIC: 02: enabled 1
595 17:40:42.716206 Compare with tree...
596 17:40:42.718789 Root Device: enabled 1
597 17:40:42.721456 CPU_CLUSTER: 0: enabled 1
598 17:40:42.723704 APIC: 00: enabled 1
599 17:40:42.726220 APIC: 02: enabled 1
600 17:40:42.728772 DOMAIN: 0000: enabled 1
601 17:40:42.731309 PCI: 00:00.0: enabled 1
602 17:40:42.733626 PCI: 00:02.0: enabled 1
603 17:40:42.736115 PCI: 00:04.0: enabled 1
604 17:40:42.738672 PCI: 00:12.0: enabled 1
605 17:40:42.741694 PCI: 00:12.5: enabled 0
606 17:40:42.744026 PCI: 00:12.6: enabled 0
607 17:40:42.747233 PCI: 00:13.0: enabled 0
608 17:40:42.748992 PCI: 00:14.0: enabled 1
609 17:40:42.752300 USB0 port 0: enabled 1
610 17:40:42.754803 USB2 port 0: enabled 1
611 17:40:42.757842 USB2 port 1: enabled 1
612 17:40:42.760918 USB2 port 2: enabled 1
613 17:40:42.762536 USB2 port 4: enabled 1
614 17:40:42.765962 USB2 port 5: enabled 1
615 17:40:42.768083 USB2 port 6: enabled 1
616 17:40:42.770809 USB2 port 7: enabled 1
617 17:40:42.773282 USB2 port 8: enabled 1
618 17:40:42.776739 USB2 port 9: enabled 1
619 17:40:42.779540 USB3 port 0: enabled 1
620 17:40:42.782102 USB3 port 1: enabled 1
621 17:40:42.785034 USB3 port 2: enabled 1
622 17:40:42.787741 USB3 port 3: enabled 1
623 17:40:42.790488 USB3 port 4: enabled 1
624 17:40:42.792820 PCI: 00:14.1: enabled 0
625 17:40:42.795749 PCI: 00:14.3: enabled 1
626 17:40:42.798512 PCI: 00:14.5: enabled 0
627 17:40:42.800257 PCI: 00:15.0: enabled 1
628 17:40:42.802805 I2C: 00:10: enabled 1
629 17:40:42.805896 I2C: 00:10: enabled 1
630 17:40:42.807832 I2C: 00:34: enabled 1
631 17:40:42.811061 PCI: 00:15.1: enabled 1
632 17:40:42.813132 I2C: 00:2c: enabled 1
633 17:40:42.815662 PCI: 00:15.2: enabled 0
634 17:40:42.818217 PCI: 00:15.3: enabled 0
635 17:40:42.821297 PCI: 00:16.0: enabled 1
636 17:40:42.824128 PCI: 00:16.1: enabled 0
637 17:40:42.826336 PCI: 00:16.2: enabled 0
638 17:40:42.828922 PCI: 00:16.3: enabled 0
639 17:40:42.832203 PCI: 00:16.4: enabled 0
640 17:40:42.834369 PCI: 00:16.5: enabled 0
641 17:40:42.837207 PCI: 00:17.0: enabled 1
642 17:40:42.839618 PCI: 00:19.0: enabled 1
643 17:40:42.842361 I2C: 00:50: enabled 1
644 17:40:42.844559 PCI: 00:19.1: enabled 0
645 17:40:42.847470 PCI: 00:19.2: enabled 1
646 17:40:42.850179 PCI: 00:1a.0: enabled 0
647 17:40:42.852186 PCI: 00:1c.0: enabled 1
648 17:40:42.854944 PCI: 00:1c.1: enabled 0
649 17:40:42.857774 PCI: 00:1c.2: enabled 0
650 17:40:42.860639 PCI: 00:1c.3: enabled 0
651 17:40:42.863798 PCI: 00:1c.4: enabled 0
652 17:40:42.865402 PCI: 00:1c.5: enabled 0
653 17:40:42.868155 PCI: 00:1c.6: enabled 0
654 17:40:42.870559 PCI: 00:1c.7: enabled 1
655 17:40:42.874181 PCI: 00:1d.0: enabled 1
656 17:40:42.876824 PCI: 00:1d.1: enabled 1
657 17:40:42.878902 PCI: 00:1d.2: enabled 0
658 17:40:42.881881 PCI: 00:1d.3: enabled 0
659 17:40:42.883774 PCI: 00:1d.4: enabled 1
660 17:40:42.886990 PCI: 00:1e.0: enabled 0
661 17:40:42.889490 PCI: 00:1e.1: enabled 0
662 17:40:42.892817 PCI: 00:1e.2: enabled 0
663 17:40:42.894885 PCI: 00:1e.3: enabled 0
664 17:40:42.896946 PCI: 00:1f.0: enabled 1
665 17:40:42.900379 PNP: 0c09.0: enabled 1
666 17:40:42.902524 PCI: 00:1f.1: enabled 1
667 17:40:42.905749 PCI: 00:1f.2: enabled 1
668 17:40:42.907376 PCI: 00:1f.3: enabled 1
669 17:40:42.910262 PCI: 00:1f.4: enabled 1
670 17:40:42.912715 PCI: 00:1f.5: enabled 1
671 17:40:42.916009 PCI: 00:1f.6: enabled 1
672 17:40:42.918720 Root Device scanning...
673 17:40:42.921431 root_dev_scan_bus for Root Device
674 17:40:42.923675 CPU_CLUSTER: 0 enabled
675 17:40:42.926175 DOMAIN: 0000 enabled
676 17:40:42.928664 DOMAIN: 0000 scanning...
677 17:40:42.932742 PCI: pci_scan_bus for bus 00
678 17:40:42.934981 PCI: 00:00.0 [8086/0000] ops
679 17:40:42.937877 PCI: 00:00.0 [8086/3e35] enabled
680 17:40:42.941155 PCI: 00:02.0 [8086/0000] ops
681 17:40:42.944430 PCI: 00:02.0 [8086/3ea1] enabled
682 17:40:42.947927 PCI: 00:04.0 [8086/1903] enabled
683 17:40:42.951308 PCI: 00:08.0 [8086/1911] enabled
684 17:40:42.955362 PCI: 00:12.0 [8086/9df9] enabled
685 17:40:42.957510 PCI: 00:14.0 [8086/0000] bus ops
686 17:40:42.961112 PCI: 00:14.0 [8086/9ded] enabled
687 17:40:42.964616 PCI: 00:14.2 [8086/9def] enabled
688 17:40:42.968081 PCI: 00:14.3 [8086/9df0] enabled
689 17:40:42.971925 PCI: 00:15.0 [8086/0000] bus ops
690 17:40:42.974111 PCI: 00:15.0 [8086/9de8] enabled
691 17:40:42.977491 PCI: 00:15.1 [8086/0000] bus ops
692 17:40:42.981689 PCI: 00:15.1 [8086/9de9] enabled
693 17:40:42.984498 PCI: 00:16.0 [8086/0000] ops
694 17:40:42.987872 PCI: 00:16.0 [8086/9de0] enabled
695 17:40:42.990570 PCI: 00:17.0 [8086/0000] ops
696 17:40:42.993362 PCI: 00:17.0 [8086/9dd3] enabled
697 17:40:42.996664 PCI: 00:19.0 [8086/0000] bus ops
698 17:40:43.000630 PCI: 00:19.0 [8086/9dc5] enabled
699 17:40:43.003797 PCI: 00:19.2 [8086/0000] ops
700 17:40:43.007201 PCI: 00:19.2 [8086/9dc7] enabled
701 17:40:43.010071 PCI: 00:1c.0 [8086/0000] bus ops
702 17:40:43.013215 PCI: 00:1c.0 [8086/9dbf] enabled
703 17:40:43.018725 PCI: Static device PCI: 00:1c.7 not found, disabling it.
704 17:40:43.022097 PCI: 00:1d.0 [8086/0000] bus ops
705 17:40:43.025367 PCI: 00:1d.0 [8086/9db4] enabled
706 17:40:43.031500 PCI: Static device PCI: 00:1d.1 not found, disabling it.
707 17:40:43.036589 PCI: Static device PCI: 00:1d.4 not found, disabling it.
708 17:40:43.040111 PCI: 00:1f.0 [8086/0000] bus ops
709 17:40:43.043148 PCI: 00:1f.0 [8086/9d84] enabled
710 17:40:43.048823 PCI: Static device PCI: 00:1f.1 not found, disabling it.
711 17:40:43.054592 PCI: Static device PCI: 00:1f.2 not found, disabling it.
712 17:40:43.058702 PCI: 00:1f.3 [8086/0000] bus ops
713 17:40:43.061753 PCI: 00:1f.3 [8086/9dc8] enabled
714 17:40:43.064694 PCI: 00:1f.4 [8086/0000] bus ops
715 17:40:43.068056 PCI: 00:1f.4 [8086/9da3] enabled
716 17:40:43.071407 PCI: 00:1f.5 [8086/0000] bus ops
717 17:40:43.074785 PCI: 00:1f.5 [8086/9da4] enabled
718 17:40:43.078024 PCI: 00:1f.6 [8086/15be] enabled
719 17:40:43.080825 PCI: Leftover static devices:
720 17:40:43.082923 PCI: 00:12.5
721 17:40:43.083623 PCI: 00:12.6
722 17:40:43.085696 PCI: 00:13.0
723 17:40:43.086169 PCI: 00:14.1
724 17:40:43.087886 PCI: 00:14.5
725 17:40:43.089857 PCI: 00:15.2
726 17:40:43.091241 PCI: 00:15.3
727 17:40:43.091866 PCI: 00:16.1
728 17:40:43.093931 PCI: 00:16.2
729 17:40:43.095365 PCI: 00:16.3
730 17:40:43.096057 PCI: 00:16.4
731 17:40:43.097033 PCI: 00:16.5
732 17:40:43.099031 PCI: 00:19.1
733 17:40:43.100130 PCI: 00:1a.0
734 17:40:43.101797 PCI: 00:1c.1
735 17:40:43.102964 PCI: 00:1c.2
736 17:40:43.104693 PCI: 00:1c.3
737 17:40:43.106020 PCI: 00:1c.4
738 17:40:43.106938 PCI: 00:1c.5
739 17:40:43.108866 PCI: 00:1c.6
740 17:40:43.109151 PCI: 00:1c.7
741 17:40:43.111624 PCI: 00:1d.1
742 17:40:43.113167 PCI: 00:1d.2
743 17:40:43.113438 PCI: 00:1d.3
744 17:40:43.115077 PCI: 00:1d.4
745 17:40:43.115967 PCI: 00:1e.0
746 17:40:43.117995 PCI: 00:1e.1
747 17:40:43.119116 PCI: 00:1e.2
748 17:40:43.120520 PCI: 00:1e.3
749 17:40:43.121916 PCI: 00:1f.1
750 17:40:43.123772 PCI: 00:1f.2
751 17:40:43.126553 PCI: Check your devicetree.cb.
752 17:40:43.129151 PCI: 00:14.0 scanning...
753 17:40:43.132160 scan_usb_bus for PCI: 00:14.0
754 17:40:43.134734 USB0 port 0 enabled
755 17:40:43.137443 USB0 port 0 scanning...
756 17:40:43.140133 scan_usb_bus for USB0 port 0
757 17:40:43.142177 USB2 port 0 enabled
758 17:40:43.143611 USB2 port 1 enabled
759 17:40:43.145940 USB2 port 2 enabled
760 17:40:43.149148 USB2 port 4 enabled
761 17:40:43.150519 USB2 port 5 enabled
762 17:40:43.151950 USB2 port 6 enabled
763 17:40:43.154284 USB2 port 7 enabled
764 17:40:43.156483 USB2 port 8 enabled
765 17:40:43.158932 USB2 port 9 enabled
766 17:40:43.160875 USB3 port 0 enabled
767 17:40:43.162879 USB3 port 1 enabled
768 17:40:43.164721 USB3 port 2 enabled
769 17:40:43.166633 USB3 port 3 enabled
770 17:40:43.169163 USB3 port 4 enabled
771 17:40:43.170953 USB2 port 0 scanning...
772 17:40:43.174515 scan_usb_bus for USB2 port 0
773 17:40:43.177949 scan_usb_bus for USB2 port 0 done
774 17:40:43.183012 scan_bus: scanning of bus USB2 port 0 took 9060 usecs
775 17:40:43.185059 USB2 port 1 scanning...
776 17:40:43.188277 scan_usb_bus for USB2 port 1
777 17:40:43.192151 scan_usb_bus for USB2 port 1 done
778 17:40:43.197434 scan_bus: scanning of bus USB2 port 1 took 9062 usecs
779 17:40:43.199865 USB2 port 2 scanning...
780 17:40:43.203205 scan_usb_bus for USB2 port 2
781 17:40:43.206087 scan_usb_bus for USB2 port 2 done
782 17:40:43.211865 scan_bus: scanning of bus USB2 port 2 took 9062 usecs
783 17:40:43.214030 USB2 port 4 scanning...
784 17:40:43.217490 scan_usb_bus for USB2 port 4
785 17:40:43.220963 scan_usb_bus for USB2 port 4 done
786 17:40:43.225887 scan_bus: scanning of bus USB2 port 4 took 9062 usecs
787 17:40:43.228381 USB2 port 5 scanning...
788 17:40:43.231755 scan_usb_bus for USB2 port 5
789 17:40:43.235078 scan_usb_bus for USB2 port 5 done
790 17:40:43.240658 scan_bus: scanning of bus USB2 port 5 took 9060 usecs
791 17:40:43.242823 USB2 port 6 scanning...
792 17:40:43.246758 scan_usb_bus for USB2 port 6
793 17:40:43.249274 scan_usb_bus for USB2 port 6 done
794 17:40:43.254642 scan_bus: scanning of bus USB2 port 6 took 9061 usecs
795 17:40:43.257181 USB2 port 7 scanning...
796 17:40:43.260642 scan_usb_bus for USB2 port 7
797 17:40:43.263656 scan_usb_bus for USB2 port 7 done
798 17:40:43.270247 scan_bus: scanning of bus USB2 port 7 took 9062 usecs
799 17:40:43.271561 USB2 port 8 scanning...
800 17:40:43.274903 scan_usb_bus for USB2 port 8
801 17:40:43.279043 scan_usb_bus for USB2 port 8 done
802 17:40:43.283838 scan_bus: scanning of bus USB2 port 8 took 9067 usecs
803 17:40:43.286064 USB2 port 9 scanning...
804 17:40:43.289744 scan_usb_bus for USB2 port 9
805 17:40:43.292949 scan_usb_bus for USB2 port 9 done
806 17:40:43.298246 scan_bus: scanning of bus USB2 port 9 took 9059 usecs
807 17:40:43.300571 USB3 port 0 scanning...
808 17:40:43.303945 scan_usb_bus for USB3 port 0
809 17:40:43.307916 scan_usb_bus for USB3 port 0 done
810 17:40:43.312259 scan_bus: scanning of bus USB3 port 0 took 9062 usecs
811 17:40:43.315316 USB3 port 1 scanning...
812 17:40:43.318531 scan_usb_bus for USB3 port 1
813 17:40:43.321234 scan_usb_bus for USB3 port 1 done
814 17:40:43.327421 scan_bus: scanning of bus USB3 port 1 took 9060 usecs
815 17:40:43.329094 USB3 port 2 scanning...
816 17:40:43.332586 scan_usb_bus for USB3 port 2
817 17:40:43.336440 scan_usb_bus for USB3 port 2 done
818 17:40:43.341625 scan_bus: scanning of bus USB3 port 2 took 9058 usecs
819 17:40:43.344232 USB3 port 3 scanning...
820 17:40:43.347108 scan_usb_bus for USB3 port 3
821 17:40:43.350018 scan_usb_bus for USB3 port 3 done
822 17:40:43.355364 scan_bus: scanning of bus USB3 port 3 took 9061 usecs
823 17:40:43.358101 USB3 port 4 scanning...
824 17:40:43.361613 scan_usb_bus for USB3 port 4
825 17:40:43.364453 scan_usb_bus for USB3 port 4 done
826 17:40:43.370311 scan_bus: scanning of bus USB3 port 4 took 9064 usecs
827 17:40:43.373744 scan_usb_bus for USB0 port 0 done
828 17:40:43.378725 scan_bus: scanning of bus USB0 port 0 took 239313 usecs
829 17:40:43.382789 scan_usb_bus for PCI: 00:14.0 done
830 17:40:43.388966 scan_bus: scanning of bus PCI: 00:14.0 took 256247 usecs
831 17:40:43.391210 PCI: 00:15.0 scanning...
832 17:40:43.394012 scan_generic_bus for PCI: 00:15.0
833 17:40:43.398786 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
834 17:40:43.402829 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
835 17:40:43.406262 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
836 17:40:43.410801 scan_generic_bus for PCI: 00:15.0 done
837 17:40:43.416320 scan_bus: scanning of bus PCI: 00:15.0 took 22383 usecs
838 17:40:43.418485 PCI: 00:15.1 scanning...
839 17:40:43.422702 scan_generic_bus for PCI: 00:15.1
840 17:40:43.426494 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
841 17:40:43.430517 scan_generic_bus for PCI: 00:15.1 done
842 17:40:43.435863 scan_bus: scanning of bus PCI: 00:15.1 took 14213 usecs
843 17:40:43.439200 PCI: 00:19.0 scanning...
844 17:40:43.441757 scan_generic_bus for PCI: 00:19.0
845 17:40:43.445942 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
846 17:40:43.450540 scan_generic_bus for PCI: 00:19.0 done
847 17:40:43.456047 scan_bus: scanning of bus PCI: 00:19.0 took 14214 usecs
848 17:40:43.457836 PCI: 00:1c.0 scanning...
849 17:40:43.461913 do_pci_scan_bridge for PCI: 00:1c.0
850 17:40:43.465467 PCI: pci_scan_bus for bus 01
851 17:40:43.468188 PCI: 01:00.0 [10ec/525a] enabled
852 17:40:43.471796 Capability: type 0x01 @ 0x80
853 17:40:43.474515 Capability: type 0x05 @ 0x90
854 17:40:43.477784 Capability: type 0x10 @ 0xb0
855 17:40:43.480464 Capability: type 0x10 @ 0x40
856 17:40:43.484802 Enabling Common Clock Configuration
857 17:40:43.487759 L1 Sub-State supported from root port 28
858 17:40:43.490986 L1 Sub-State Support = 0xf
859 17:40:43.494461 CommonModeRestoreTime = 0x3c
860 17:40:43.497988 Power On Value = 0x6, Power On Scale = 0x1
861 17:40:43.500471 ASPM: Enabled L0s and L1
862 17:40:43.503828 Capability: type 0x01 @ 0x80
863 17:40:43.506073 Capability: type 0x05 @ 0x90
864 17:40:43.509633 Capability: type 0x10 @ 0xb0
865 17:40:43.515089 scan_bus: scanning of bus PCI: 00:1c.0 took 53670 usecs
866 17:40:43.517736 PCI: 00:1d.0 scanning...
867 17:40:43.521146 do_pci_scan_bridge for PCI: 00:1d.0
868 17:40:43.524049 PCI: pci_scan_bus for bus 02
869 17:40:43.527863 PCI: 02:00.0 [15b7/5004] enabled
870 17:40:43.531169 Capability: type 0x01 @ 0x80
871 17:40:43.533887 Capability: type 0x05 @ 0x90
872 17:40:43.537233 Capability: type 0x11 @ 0xb0
873 17:40:43.539746 Capability: type 0x10 @ 0xc0
874 17:40:43.542418 Capability: type 0x10 @ 0x40
875 17:40:43.546071 Enabling Common Clock Configuration
876 17:40:43.549876 L1 Sub-State supported from root port 29
877 17:40:43.552888 L1 Sub-State Support = 0x5
878 17:40:43.555768 CommonModeRestoreTime = 0xff
879 17:40:43.560150 Power On Value = 0x16, Power On Scale = 0x0
880 17:40:43.561659 ASPM: Enabled L1
881 17:40:43.565381 Capability: type 0x01 @ 0x80
882 17:40:43.568148 Capability: type 0x05 @ 0x90
883 17:40:43.570872 Capability: type 0x11 @ 0xb0
884 17:40:43.573939 Capability: type 0x10 @ 0xc0
885 17:40:43.579306 scan_bus: scanning of bus PCI: 00:1d.0 took 58804 usecs
886 17:40:43.582181 PCI: 00:1f.0 scanning...
887 17:40:43.585055 scan_lpc_bus for PCI: 00:1f.0
888 17:40:43.587086 PNP: 0c09.0 enabled
889 17:40:43.591030 scan_lpc_bus for PCI: 00:1f.0 done
890 17:40:43.596079 scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
891 17:40:43.598618 PCI: 00:1f.3 scanning...
892 17:40:43.604897 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
893 17:40:43.606840 PCI: 00:1f.4 scanning...
894 17:40:43.610511 scan_generic_bus for PCI: 00:1f.4
895 17:40:43.614765 scan_generic_bus for PCI: 00:1f.4 done
896 17:40:43.620303 scan_bus: scanning of bus PCI: 00:1f.4 took 10130 usecs
897 17:40:43.622337 PCI: 00:1f.5 scanning...
898 17:40:43.625984 scan_generic_bus for PCI: 00:1f.5
899 17:40:43.629972 scan_generic_bus for PCI: 00:1f.5 done
900 17:40:43.636239 scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs
901 17:40:43.642189 scan_bus: scanning of bus DOMAIN: 0000 took 709590 usecs
902 17:40:43.645832 root_dev_scan_bus for Root Device done
903 17:40:43.651719 scan_bus: scanning of bus Root Device took 729733 usecs
904 17:40:43.651992 done
905 17:40:43.658067 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
906 17:40:43.663859 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
907 17:40:43.671472 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
908 17:40:43.678302 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
909 17:40:43.681961 SPI flash protection: WPSW=1 SRP0=0
910 17:40:43.686966 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
911 17:40:43.692650 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125856 exit 34824
912 17:40:43.695329 found VGA at PCI: 00:02.0
913 17:40:43.698688 Setting up VGA for PCI: 00:02.0
914 17:40:43.704387 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
915 17:40:43.708626 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
916 17:40:43.711331 Allocating resources...
917 17:40:43.713931 Reading resources...
918 17:40:43.717618 Root Device read_resources bus 0 link: 0
919 17:40:43.723043 CPU_CLUSTER: 0 read_resources bus 0 link: 0
920 17:40:43.727401 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
921 17:40:43.731631 DOMAIN: 0000 read_resources bus 0 link: 0
922 17:40:43.738568 PCI: 00:14.0 read_resources bus 0 link: 0
923 17:40:43.743258 USB0 port 0 read_resources bus 0 link: 0
924 17:40:43.751419 USB0 port 0 read_resources bus 0 link: 0 done
925 17:40:43.756659 PCI: 00:14.0 read_resources bus 0 link: 0 done
926 17:40:43.762203 PCI: 00:15.0 read_resources bus 1 link: 0
927 17:40:43.768378 PCI: 00:15.0 read_resources bus 1 link: 0 done
928 17:40:43.773280 PCI: 00:15.1 read_resources bus 2 link: 0
929 17:40:43.778008 PCI: 00:15.1 read_resources bus 2 link: 0 done
930 17:40:43.783059 PCI: 00:19.0 read_resources bus 3 link: 0
931 17:40:43.788494 PCI: 00:19.0 read_resources bus 3 link: 0 done
932 17:40:43.793768 PCI: 00:1c.0 read_resources bus 1 link: 0
933 17:40:43.799018 PCI: 00:1c.0 read_resources bus 1 link: 0 done
934 17:40:43.803984 PCI: 00:1d.0 read_resources bus 2 link: 0
935 17:40:43.808571 PCI: 00:1d.0 read_resources bus 2 link: 0 done
936 17:40:43.813365 PCI: 00:1f.0 read_resources bus 0 link: 0
937 17:40:43.818063 PCI: 00:1f.0 read_resources bus 0 link: 0 done
938 17:40:43.825172 DOMAIN: 0000 read_resources bus 0 link: 0 done
939 17:40:43.829386 Root Device read_resources bus 0 link: 0 done
940 17:40:43.831883 Done reading resources.
941 17:40:43.837385 Show resources in subtree (Root Device)...After reading.
942 17:40:43.842270 Root Device child on link 0 CPU_CLUSTER: 0
943 17:40:43.846347 CPU_CLUSTER: 0 child on link 0 APIC: 00
944 17:40:43.847285 APIC: 00
945 17:40:43.848544 APIC: 02
946 17:40:43.852868 DOMAIN: 0000 child on link 0 PCI: 00:00.0
947 17:40:43.863001 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
948 17:40:43.872028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
949 17:40:43.873861 PCI: 00:00.0
950 17:40:43.883666 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
951 17:40:43.892719 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
952 17:40:43.902156 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
953 17:40:43.911856 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
954 17:40:43.920787 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
955 17:40:43.929886 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
956 17:40:43.939627 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
957 17:40:43.948582 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
958 17:40:43.957523 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
959 17:40:43.967043 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
960 17:40:43.976474 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
961 17:40:43.987194 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
962 17:40:43.995558 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
963 17:40:44.004784 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
964 17:40:44.006268 PCI: 00:02.0
965 17:40:44.017136 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
966 17:40:44.026895 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
967 17:40:44.035971 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
968 17:40:44.038015 PCI: 00:04.0
969 17:40:44.047198 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
970 17:40:44.048892 PCI: 00:08.0
971 17:40:44.058970 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 17:40:44.060227 PCI: 00:12.0
973 17:40:44.070183 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
974 17:40:44.074320 PCI: 00:14.0 child on link 0 USB0 port 0
975 17:40:44.084655 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
976 17:40:44.089134 USB0 port 0 child on link 0 USB2 port 0
977 17:40:44.090936 USB2 port 0
978 17:40:44.092957 USB2 port 1
979 17:40:44.094235 USB2 port 2
980 17:40:44.096489 USB2 port 4
981 17:40:44.097395 USB2 port 5
982 17:40:44.099569 USB2 port 6
983 17:40:44.101446 USB2 port 7
984 17:40:44.103536 USB2 port 8
985 17:40:44.104840 USB2 port 9
986 17:40:44.106334 USB3 port 0
987 17:40:44.107925 USB3 port 1
988 17:40:44.110527 USB3 port 2
989 17:40:44.111852 USB3 port 3
990 17:40:44.113824 USB3 port 4
991 17:40:44.116002 PCI: 00:14.2
992 17:40:44.125841 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
993 17:40:44.134768 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
994 17:40:44.137432 PCI: 00:14.3
995 17:40:44.146394 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
996 17:40:44.151120 PCI: 00:15.0 child on link 0 I2C: 01:10
997 17:40:44.161222 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
998 17:40:44.162103 I2C: 01:10
999 17:40:44.164070 I2C: 01:10
1000 17:40:44.165289 I2C: 01:34
1001 17:40:44.169344 PCI: 00:15.1 child on link 0 I2C: 02:2c
1002 17:40:44.179623 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1003 17:40:44.181069 I2C: 02:2c
1004 17:40:44.182923 PCI: 00:16.0
1005 17:40:44.192528 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1006 17:40:44.194161 PCI: 00:17.0
1007 17:40:44.203418 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1008 17:40:44.212540 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1009 17:40:44.220960 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1010 17:40:44.229483 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1011 17:40:44.237827 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1012 17:40:44.246871 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1013 17:40:44.250663 PCI: 00:19.0 child on link 0 I2C: 03:50
1014 17:40:44.261159 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1015 17:40:44.270917 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1016 17:40:44.271683 I2C: 03:50
1017 17:40:44.273607 PCI: 00:19.2
1018 17:40:44.285160 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1019 17:40:44.294957 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1020 17:40:44.298879 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1021 17:40:44.308303 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1022 17:40:44.317746 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1023 17:40:44.326612 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1024 17:40:44.328652 PCI: 01:00.0
1025 17:40:44.337635 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1026 17:40:44.342089 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1027 17:40:44.350895 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1028 17:40:44.360806 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1029 17:40:44.369685 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1030 17:40:44.371891 PCI: 02:00.0
1031 17:40:44.381788 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1032 17:40:44.386401 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1033 17:40:44.394697 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1034 17:40:44.403465 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1035 17:40:44.404770 PNP: 0c09.0
1036 17:40:44.413437 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1037 17:40:44.422717 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1038 17:40:44.431334 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1039 17:40:44.432579 PCI: 00:1f.3
1040 17:40:44.442110 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1041 17:40:44.452642 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1042 17:40:44.454465 PCI: 00:1f.4
1043 17:40:44.463887 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1044 17:40:44.473693 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1045 17:40:44.474980 PCI: 00:1f.5
1046 17:40:44.483436 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1047 17:40:44.485360 PCI: 00:1f.6
1048 17:40:44.494102 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1049 17:40:44.501234 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1050 17:40:44.507504 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1051 17:40:44.514357 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1052 17:40:44.520929 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1053 17:40:44.527412 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1054 17:40:44.531458 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1055 17:40:44.534437 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1056 17:40:44.538418 PCI: 00:17.0 18 * [0x60 - 0x67] io
1057 17:40:44.541109 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1058 17:40:44.549115 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1059 17:40:44.555201 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1060 17:40:44.562474 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1061 17:40:44.571239 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1062 17:40:44.578174 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1063 17:40:44.581552 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1064 17:40:44.589878 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1065 17:40:44.598060 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1066 17:40:44.606303 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1067 17:40:44.613365 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1068 17:40:44.617352 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1069 17:40:44.625167 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1070 17:40:44.629739 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1071 17:40:44.635039 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1072 17:40:44.639867 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1073 17:40:44.644360 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1074 17:40:44.648967 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1075 17:40:44.654335 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1076 17:40:44.659379 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1077 17:40:44.663515 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1078 17:40:44.668688 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1079 17:40:44.673268 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1080 17:40:44.678475 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1081 17:40:44.682610 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1082 17:40:44.688129 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1083 17:40:44.692493 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1084 17:40:44.698249 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1085 17:40:44.702937 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1086 17:40:44.707849 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1087 17:40:44.712430 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1088 17:40:44.716555 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1089 17:40:44.722185 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1090 17:40:44.727008 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1091 17:40:44.731830 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1092 17:40:44.736620 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1093 17:40:44.741603 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1094 17:40:44.745730 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1095 17:40:44.754605 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1096 17:40:44.758058 avoid_fixed_resources: DOMAIN: 0000
1097 17:40:44.764194 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1098 17:40:44.769828 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1099 17:40:44.777440 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1100 17:40:44.786311 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1101 17:40:44.793747 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1102 17:40:44.801502 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1103 17:40:44.809194 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1104 17:40:44.816792 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1105 17:40:44.824268 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1106 17:40:44.830791 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1107 17:40:44.838623 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1108 17:40:44.846021 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1109 17:40:44.847648 Setting resources...
1110 17:40:44.854017 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1111 17:40:44.858066 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1112 17:40:44.863176 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1113 17:40:44.866449 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1114 17:40:44.870555 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1115 17:40:44.877299 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1116 17:40:44.882889 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1117 17:40:44.888780 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1118 17:40:44.895366 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1119 17:40:44.902294 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1120 17:40:44.909148 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1121 17:40:44.915117 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1122 17:40:44.919110 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1123 17:40:44.923957 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1124 17:40:44.929509 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1125 17:40:44.934486 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1126 17:40:44.938966 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1127 17:40:44.943315 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1128 17:40:44.948450 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1129 17:40:44.953987 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1130 17:40:44.958145 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1131 17:40:44.962859 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1132 17:40:44.968385 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1133 17:40:44.972983 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1134 17:40:44.977325 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1135 17:40:44.982178 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1136 17:40:44.987455 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1137 17:40:44.992833 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1138 17:40:44.997685 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1139 17:40:45.002388 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1140 17:40:45.007176 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1141 17:40:45.011679 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1142 17:40:45.016039 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1143 17:40:45.021692 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1144 17:40:45.026418 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1145 17:40:45.031918 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1146 17:40:45.039537 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1147 17:40:45.046916 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1148 17:40:45.053957 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1149 17:40:45.061701 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1150 17:40:45.066423 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1151 17:40:45.073784 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1152 17:40:45.080499 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1153 17:40:45.087570 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1154 17:40:45.095324 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1155 17:40:45.100528 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1156 17:40:45.107783 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1157 17:40:45.111971 Root Device assign_resources, bus 0 link: 0
1158 17:40:45.117087 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 17:40:45.125621 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1160 17:40:45.133264 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1161 17:40:45.141460 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1162 17:40:45.150403 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1163 17:40:45.158090 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1164 17:40:45.165791 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1165 17:40:45.174127 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1166 17:40:45.179395 PCI: 00:14.0 assign_resources, bus 0 link: 0
1167 17:40:45.183984 PCI: 00:14.0 assign_resources, bus 0 link: 0
1168 17:40:45.192240 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1169 17:40:45.200611 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1170 17:40:45.208163 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1171 17:40:45.216560 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1172 17:40:45.220907 PCI: 00:15.0 assign_resources, bus 1 link: 0
1173 17:40:45.225770 PCI: 00:15.0 assign_resources, bus 1 link: 0
1174 17:40:45.233594 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1175 17:40:45.238403 PCI: 00:15.1 assign_resources, bus 2 link: 0
1176 17:40:45.243518 PCI: 00:15.1 assign_resources, bus 2 link: 0
1177 17:40:45.251076 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1178 17:40:45.259523 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1179 17:40:45.267554 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1180 17:40:45.274547 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1181 17:40:45.282778 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1182 17:40:45.291019 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1183 17:40:45.298065 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1184 17:40:45.306156 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1185 17:40:45.314634 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1186 17:40:45.319678 PCI: 00:19.0 assign_resources, bus 3 link: 0
1187 17:40:45.324143 PCI: 00:19.0 assign_resources, bus 3 link: 0
1188 17:40:45.331913 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1189 17:40:45.340532 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1190 17:40:45.349206 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1191 17:40:45.358781 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1192 17:40:45.362727 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1193 17:40:45.371121 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1194 17:40:45.375516 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1195 17:40:45.384053 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1196 17:40:45.392804 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1197 17:40:45.401872 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1198 17:40:45.405641 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1199 17:40:45.413888 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1200 17:40:45.418756 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1201 17:40:45.423392 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1202 17:40:45.428645 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1203 17:40:45.433077 LPC: Trying to open IO window from 930 size 8
1204 17:40:45.438218 LPC: Trying to open IO window from 940 size 8
1205 17:40:45.442823 LPC: Trying to open IO window from 950 size 10
1206 17:40:45.451694 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1207 17:40:45.458699 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1208 17:40:45.467498 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1209 17:40:45.478320 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1210 17:40:45.483973 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1211 17:40:45.488108 DOMAIN: 0000 assign_resources, bus 0 link: 0
1212 17:40:45.493044 Root Device assign_resources, bus 0 link: 0
1213 17:40:45.494976 Done setting resources.
1214 17:40:45.504661 Show resources in subtree (Root Device)...After assigning values.
1215 17:40:45.506664 Root Device child on link 0 CPU_CLUSTER: 0
1216 17:40:45.510472 CPU_CLUSTER: 0 child on link 0 APIC: 00
1217 17:40:45.511727 APIC: 00
1218 17:40:45.513130 APIC: 02
1219 17:40:45.517885 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1220 17:40:45.526424 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1221 17:40:45.538035 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1222 17:40:45.540012 PCI: 00:00.0
1223 17:40:45.549590 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1224 17:40:45.559014 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1225 17:40:45.568028 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1226 17:40:45.577006 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1227 17:40:45.586089 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1228 17:40:45.596371 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1229 17:40:45.605516 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1230 17:40:45.614738 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1231 17:40:45.623865 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1232 17:40:45.633119 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1233 17:40:45.642650 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1234 17:40:45.652766 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1235 17:40:45.662105 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1236 17:40:45.670708 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1237 17:40:45.673163 PCI: 00:02.0
1238 17:40:45.683437 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1239 17:40:45.694456 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1240 17:40:45.703580 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1241 17:40:45.704245 PCI: 00:04.0
1242 17:40:45.714896 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1243 17:40:45.716932 PCI: 00:08.0
1244 17:40:45.727168 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1245 17:40:45.728630 PCI: 00:12.0
1246 17:40:45.738309 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1247 17:40:45.742909 PCI: 00:14.0 child on link 0 USB0 port 0
1248 17:40:45.753377 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1249 17:40:45.757917 USB0 port 0 child on link 0 USB2 port 0
1250 17:40:45.760012 USB2 port 0
1251 17:40:45.760700 USB2 port 1
1252 17:40:45.762730 USB2 port 2
1253 17:40:45.765251 USB2 port 4
1254 17:40:45.766541 USB2 port 5
1255 17:40:45.768489 USB2 port 6
1256 17:40:45.769845 USB2 port 7
1257 17:40:45.772023 USB2 port 8
1258 17:40:45.773957 USB2 port 9
1259 17:40:45.775496 USB3 port 0
1260 17:40:45.776891 USB3 port 1
1261 17:40:45.778701 USB3 port 2
1262 17:40:45.780152 USB3 port 3
1263 17:40:45.781839 USB3 port 4
1264 17:40:45.783805 PCI: 00:14.2
1265 17:40:45.794871 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1266 17:40:45.804140 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1267 17:40:45.805776 PCI: 00:14.3
1268 17:40:45.816911 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1269 17:40:45.820585 PCI: 00:15.0 child on link 0 I2C: 01:10
1270 17:40:45.830871 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1271 17:40:45.832475 I2C: 01:10
1272 17:40:45.834584 I2C: 01:10
1273 17:40:45.835665 I2C: 01:34
1274 17:40:45.840706 PCI: 00:15.1 child on link 0 I2C: 02:2c
1275 17:40:45.850701 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1276 17:40:45.851404 I2C: 02:2c
1277 17:40:45.853407 PCI: 00:16.0
1278 17:40:45.863772 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1279 17:40:45.865159 PCI: 00:17.0
1280 17:40:45.876588 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1281 17:40:45.886496 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1282 17:40:45.894773 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1283 17:40:45.904716 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1284 17:40:45.912635 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1285 17:40:45.923506 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1286 17:40:45.927517 PCI: 00:19.0 child on link 0 I2C: 03:50
1287 17:40:45.938755 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1288 17:40:45.948462 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1289 17:40:45.949909 I2C: 03:50
1290 17:40:45.951089 PCI: 00:19.2
1291 17:40:45.962992 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1292 17:40:45.973531 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1293 17:40:45.977078 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1294 17:40:45.986975 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1295 17:40:45.997503 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1296 17:40:46.007881 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1297 17:40:46.009216 PCI: 01:00.0
1298 17:40:46.019818 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1299 17:40:46.024798 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1300 17:40:46.033364 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1301 17:40:46.042815 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1302 17:40:46.053167 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1303 17:40:46.055718 PCI: 02:00.0
1304 17:40:46.065988 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1305 17:40:46.069750 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1306 17:40:46.078658 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1307 17:40:46.088246 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1308 17:40:46.089579 PNP: 0c09.0
1309 17:40:46.098083 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1310 17:40:46.106014 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1311 17:40:46.115719 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1312 17:40:46.116621 PCI: 00:1f.3
1313 17:40:46.127744 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1314 17:40:46.137498 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1315 17:40:46.139412 PCI: 00:1f.4
1316 17:40:46.148667 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1317 17:40:46.158191 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1318 17:40:46.160913 PCI: 00:1f.5
1319 17:40:46.170399 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1320 17:40:46.171432 PCI: 00:1f.6
1321 17:40:46.181715 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1322 17:40:46.184609 Done allocating resources.
1323 17:40:46.191000 BS: BS_DEV_RESOURCES times (us): entry 0 run 2491763 exit 13
1324 17:40:46.193717 Enabling resources...
1325 17:40:46.198211 PCI: 00:00.0 subsystem <- 1028/3e35
1326 17:40:46.201382 PCI: 00:00.0 cmd <- 06
1327 17:40:46.204885 PCI: 00:02.0 subsystem <- 1028/3ea1
1328 17:40:46.206631 PCI: 00:02.0 cmd <- 03
1329 17:40:46.211381 PCI: 00:04.0 subsystem <- 1028/1903
1330 17:40:46.213545 PCI: 00:04.0 cmd <- 02
1331 17:40:46.216091 PCI: 00:08.0 cmd <- 06
1332 17:40:46.219701 PCI: 00:12.0 subsystem <- 1028/9df9
1333 17:40:46.221698 PCI: 00:12.0 cmd <- 02
1334 17:40:46.226156 PCI: 00:14.0 subsystem <- 1028/9ded
1335 17:40:46.228446 PCI: 00:14.0 cmd <- 02
1336 17:40:46.230455 PCI: 00:14.2 cmd <- 02
1337 17:40:46.235266 PCI: 00:14.3 subsystem <- 1028/9df0
1338 17:40:46.237353 PCI: 00:14.3 cmd <- 02
1339 17:40:46.241527 PCI: 00:15.0 subsystem <- 1028/9de8
1340 17:40:46.242839 PCI: 00:15.0 cmd <- 02
1341 17:40:46.247166 PCI: 00:15.1 subsystem <- 1028/9de9
1342 17:40:46.249172 PCI: 00:15.1 cmd <- 02
1343 17:40:46.253251 PCI: 00:16.0 subsystem <- 1028/9de0
1344 17:40:46.255320 PCI: 00:16.0 cmd <- 02
1345 17:40:46.260072 PCI: 00:17.0 subsystem <- 1028/9dd3
1346 17:40:46.261541 PCI: 00:17.0 cmd <- 03
1347 17:40:46.265391 PCI: 00:19.0 subsystem <- 1028/9dc5
1348 17:40:46.268263 PCI: 00:19.0 cmd <- 06
1349 17:40:46.271823 PCI: 00:19.2 subsystem <- 1028/9dc7
1350 17:40:46.275062 PCI: 00:19.2 cmd <- 06
1351 17:40:46.278591 PCI: 00:1c.0 bridge ctrl <- 0003
1352 17:40:46.281321 PCI: 00:1c.0 subsystem <- 1028/9dbf
1353 17:40:46.284684 Capability: type 0x10 @ 0x40
1354 17:40:46.287964 Capability: type 0x05 @ 0x80
1355 17:40:46.290805 Capability: type 0x0d @ 0x90
1356 17:40:46.292560 PCI: 00:1c.0 cmd <- 06
1357 17:40:46.295957 PCI: 00:1d.0 bridge ctrl <- 0003
1358 17:40:46.300718 PCI: 00:1d.0 subsystem <- 1028/9db4
1359 17:40:46.302892 Capability: type 0x10 @ 0x40
1360 17:40:46.305546 Capability: type 0x05 @ 0x80
1361 17:40:46.308354 Capability: type 0x0d @ 0x90
1362 17:40:46.310835 PCI: 00:1d.0 cmd <- 06
1363 17:40:46.314666 PCI: 00:1f.0 subsystem <- 1028/9d84
1364 17:40:46.317078 PCI: 00:1f.0 cmd <- 407
1365 17:40:46.321691 PCI: 00:1f.3 subsystem <- 1028/9dc8
1366 17:40:46.323856 PCI: 00:1f.3 cmd <- 02
1367 17:40:46.327247 PCI: 00:1f.4 subsystem <- 1028/9da3
1368 17:40:46.329683 PCI: 00:1f.4 cmd <- 03
1369 17:40:46.333481 PCI: 00:1f.5 subsystem <- 1028/9da4
1370 17:40:46.336448 PCI: 00:1f.5 cmd <- 406
1371 17:40:46.340659 PCI: 00:1f.6 subsystem <- 1028/15be
1372 17:40:46.342764 PCI: 00:1f.6 cmd <- 02
1373 17:40:46.353223 PCI: 01:00.0 cmd <- 02
1374 17:40:46.356829 PCI: 02:00.0 cmd <- 02
1375 17:40:46.358282 done.
1376 17:40:46.364321 BS: BS_DEV_ENABLE times (us): entry 408 run 167100 exit 0
1377 17:40:46.366252 Initializing devices...
1378 17:40:46.368497 Root Device init ...
1379 17:40:46.372445 Root Device init finished in 2139 usecs
1380 17:40:46.375630 CPU_CLUSTER: 0 init ...
1381 17:40:46.379783 CPU_CLUSTER: 0 init finished in 2430 usecs
1382 17:40:46.384285 PCI: 00:00.0 init ...
1383 17:40:46.386222 CPU TDP: 15 Watts
1384 17:40:46.388297 CPU PL2 = 51 Watts
1385 17:40:46.392227 PCI: 00:00.0 init finished in 7039 usecs
1386 17:40:46.395525 PCI: 00:02.0 init ...
1387 17:40:46.399899 PCI: 00:02.0 init finished in 2237 usecs
1388 17:40:46.401848 PCI: 00:04.0 init ...
1389 17:40:46.406179 PCI: 00:04.0 init finished in 2236 usecs
1390 17:40:46.408820 PCI: 00:08.0 init ...
1391 17:40:46.412573 PCI: 00:08.0 init finished in 2237 usecs
1392 17:40:46.416142 PCI: 00:12.0 init ...
1393 17:40:46.419541 PCI: 00:12.0 init finished in 2236 usecs
1394 17:40:46.422699 PCI: 00:14.0 init ...
1395 17:40:46.426355 PCI: 00:14.0 init finished in 2236 usecs
1396 17:40:46.429748 PCI: 00:14.2 init ...
1397 17:40:46.433812 PCI: 00:14.2 init finished in 2236 usecs
1398 17:40:46.436492 PCI: 00:14.3 init ...
1399 17:40:46.440040 PCI: 00:14.3 init finished in 2241 usecs
1400 17:40:46.442364 PCI: 00:15.0 init ...
1401 17:40:46.445825 DW I2C bus 0 at 0xd1347000 (400 KHz)
1402 17:40:46.450446 PCI: 00:15.0 init finished in 5967 usecs
1403 17:40:46.452523 PCI: 00:15.1 init ...
1404 17:40:46.456442 DW I2C bus 1 at 0xd1348000 (400 KHz)
1405 17:40:46.461404 PCI: 00:15.1 init finished in 5934 usecs
1406 17:40:46.462760 PCI: 00:16.0 init ...
1407 17:40:46.466991 PCI: 00:16.0 init finished in 2235 usecs
1408 17:40:46.470101 PCI: 00:19.0 init ...
1409 17:40:46.474529 DW I2C bus 4 at 0xd134a000 (400 KHz)
1410 17:40:46.478302 PCI: 00:19.0 init finished in 5934 usecs
1411 17:40:46.481440 PCI: 00:1c.0 init ...
1412 17:40:46.484380 Initializing PCH PCIe bridge.
1413 17:40:46.487906 PCI: 00:1c.0 init finished in 5250 usecs
1414 17:40:46.491434 PCI: 00:1d.0 init ...
1415 17:40:46.494245 Initializing PCH PCIe bridge.
1416 17:40:46.497676 PCI: 00:1d.0 init finished in 5250 usecs
1417 17:40:46.500254 PCI: 00:1f.0 init ...
1418 17:40:46.505301 IOAPIC: Initializing IOAPIC at 0xfec00000
1419 17:40:46.509791 IOAPIC: Bootstrap Processor Local APIC = 0x00
1420 17:40:46.511405 IOAPIC: ID = 0x02
1421 17:40:46.513619 IOAPIC: Dumping registers
1422 17:40:46.516809 reg 0x0000: 0x02000000
1423 17:40:46.518784 reg 0x0001: 0x00770020
1424 17:40:46.521616 reg 0x0002: 0x00000000
1425 17:40:46.525726 PCI: 00:1f.0 init finished in 23318 usecs
1426 17:40:46.528642 PCI: 00:1f.3 init ...
1427 17:40:46.533659 HDA: codec_mask = 05
1428 17:40:46.536681 HDA: Initializing codec #2
1429 17:40:46.540139 HDA: codec viddid: 8086280b
1430 17:40:46.542288 HDA: No verb table entry found
1431 17:40:46.545710 HDA: Initializing codec #0
1432 17:40:46.547833 HDA: codec viddid: 10ec0236
1433 17:40:46.554811 HDA: verb loaded.
1434 17:40:46.559466 PCI: 00:1f.3 init finished in 28840 usecs
1435 17:40:46.563267 PCI: 00:1f.4 init ...
1436 17:40:46.566672 PCI: 00:1f.4 init finished in 2245 usecs
1437 17:40:46.570123 PCI: 00:1f.6 init ...
1438 17:40:46.573551 PCI: 00:1f.6 init finished in 2236 usecs
1439 17:40:46.583948 PCI: 01:00.0 init ...
1440 17:40:46.588190 PCI: 01:00.0 init finished in 2236 usecs
1441 17:40:46.590827 PCI: 02:00.0 init ...
1442 17:40:46.595182 PCI: 02:00.0 init finished in 2236 usecs
1443 17:40:46.597840 PNP: 0c09.0 init ...
1444 17:40:46.601334 EC Label : 00.00.20
1445 17:40:46.606103 EC Revision : 9ca674bba
1446 17:40:46.608744 EC Model Num : 08B9
1447 17:40:46.612534 EC Build Date : 05/10/19
1448 17:40:46.621554 PNP: 0c09.0 init finished in 21768 usecs
1449 17:40:46.624348 Devices initialized
1450 17:40:46.627368 Show all devs... After init.
1451 17:40:46.629317 Root Device: enabled 1
1452 17:40:46.631692 CPU_CLUSTER: 0: enabled 1
1453 17:40:46.634290 DOMAIN: 0000: enabled 1
1454 17:40:46.636251 APIC: 00: enabled 1
1455 17:40:46.639184 PCI: 00:00.0: enabled 1
1456 17:40:46.641512 PCI: 00:02.0: enabled 1
1457 17:40:46.643470 PCI: 00:04.0: enabled 1
1458 17:40:46.646610 PCI: 00:12.0: enabled 1
1459 17:40:46.647938 PCI: 00:12.5: enabled 0
1460 17:40:46.650543 PCI: 00:12.6: enabled 0
1461 17:40:46.653516 PCI: 00:13.0: enabled 0
1462 17:40:46.656122 PCI: 00:14.0: enabled 1
1463 17:40:46.658842 PCI: 00:14.1: enabled 0
1464 17:40:46.660882 PCI: 00:14.3: enabled 1
1465 17:40:46.662512 PCI: 00:14.5: enabled 0
1466 17:40:46.665015 PCI: 00:15.0: enabled 1
1467 17:40:46.667513 PCI: 00:15.1: enabled 1
1468 17:40:46.670795 PCI: 00:15.2: enabled 0
1469 17:40:46.672787 PCI: 00:15.3: enabled 0
1470 17:40:46.675509 PCI: 00:16.0: enabled 1
1471 17:40:46.677745 PCI: 00:16.1: enabled 0
1472 17:40:46.679884 PCI: 00:16.2: enabled 0
1473 17:40:46.682361 PCI: 00:16.3: enabled 0
1474 17:40:46.684376 PCI: 00:16.4: enabled 0
1475 17:40:46.687544 PCI: 00:16.5: enabled 0
1476 17:40:46.690308 PCI: 00:17.0: enabled 1
1477 17:40:46.692517 PCI: 00:19.0: enabled 1
1478 17:40:46.694478 PCI: 00:19.1: enabled 0
1479 17:40:46.696778 PCI: 00:19.2: enabled 1
1480 17:40:46.700178 PCI: 00:1a.0: enabled 0
1481 17:40:46.701456 PCI: 00:1c.0: enabled 1
1482 17:40:46.704103 PCI: 00:1c.1: enabled 0
1483 17:40:46.707201 PCI: 00:1c.2: enabled 0
1484 17:40:46.709943 PCI: 00:1c.3: enabled 0
1485 17:40:46.712082 PCI: 00:1c.4: enabled 0
1486 17:40:46.713508 PCI: 00:1c.5: enabled 0
1487 17:40:46.716301 PCI: 00:1c.6: enabled 0
1488 17:40:46.718326 PCI: 00:1c.7: enabled 0
1489 17:40:46.721931 PCI: 00:1d.0: enabled 1
1490 17:40:46.723227 PCI: 00:1d.1: enabled 0
1491 17:40:46.725668 PCI: 00:1d.2: enabled 0
1492 17:40:46.728950 PCI: 00:1d.3: enabled 0
1493 17:40:46.731735 PCI: 00:1d.4: enabled 0
1494 17:40:46.733202 PCI: 00:1e.0: enabled 0
1495 17:40:46.736507 PCI: 00:1e.1: enabled 0
1496 17:40:46.738477 PCI: 00:1e.2: enabled 0
1497 17:40:46.740466 PCI: 00:1e.3: enabled 0
1498 17:40:46.743542 PCI: 00:1f.0: enabled 1
1499 17:40:46.745125 PCI: 00:1f.1: enabled 0
1500 17:40:46.747755 PCI: 00:1f.2: enabled 0
1501 17:40:46.750217 PCI: 00:1f.3: enabled 1
1502 17:40:46.753351 PCI: 00:1f.4: enabled 1
1503 17:40:46.755221 PCI: 00:1f.5: enabled 1
1504 17:40:46.757463 PCI: 00:1f.6: enabled 1
1505 17:40:46.760618 USB0 port 0: enabled 1
1506 17:40:46.762669 I2C: 01:10: enabled 1
1507 17:40:46.764729 I2C: 01:10: enabled 1
1508 17:40:46.766521 I2C: 01:34: enabled 1
1509 17:40:46.769477 I2C: 02:2c: enabled 1
1510 17:40:46.771839 I2C: 03:50: enabled 1
1511 17:40:46.773621 PNP: 0c09.0: enabled 1
1512 17:40:46.775568 USB2 port 0: enabled 1
1513 17:40:46.778159 USB2 port 1: enabled 1
1514 17:40:46.780182 USB2 port 2: enabled 1
1515 17:40:46.782675 USB2 port 4: enabled 1
1516 17:40:46.784732 USB2 port 5: enabled 1
1517 17:40:46.787681 USB2 port 6: enabled 1
1518 17:40:46.790281 USB2 port 7: enabled 1
1519 17:40:46.792088 USB2 port 8: enabled 1
1520 17:40:46.794103 USB2 port 9: enabled 1
1521 17:40:46.796930 USB3 port 0: enabled 1
1522 17:40:46.799596 USB3 port 1: enabled 1
1523 17:40:46.801710 USB3 port 2: enabled 1
1524 17:40:46.803852 USB3 port 3: enabled 1
1525 17:40:46.805954 USB3 port 4: enabled 1
1526 17:40:46.808665 APIC: 02: enabled 1
1527 17:40:46.811531 PCI: 00:08.0: enabled 1
1528 17:40:46.812625 PCI: 00:14.2: enabled 1
1529 17:40:46.815778 PCI: 01:00.0: enabled 1
1530 17:40:46.818417 PCI: 02:00.0: enabled 1
1531 17:40:46.823437 Disabling ACPI via APMC:
1532 17:40:46.825451 done.
1533 17:40:46.829661 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1534 17:40:46.834191 ELOG: NV offset 0x1bf0000 size 0x4000
1535 17:40:46.842469 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1536 17:40:46.847939 ELOG: Event(17) added with size 13 at 2023-10-20 17:39:12 UTC
1537 17:40:46.853423 POST: Unexpected post code in previous boot: 0x73
1538 17:40:46.859123 ELOG: Event(A3) added with size 11 at 2023-10-20 17:39:12 UTC
1539 17:40:46.866532 ELOG: Event(92) added with size 9 at 2023-10-20 17:39:12 UTC
1540 17:40:46.872432 ELOG: Event(93) added with size 9 at 2023-10-20 17:39:12 UTC
1541 17:40:46.877790 ELOG: Event(9A) added with size 9 at 2023-10-20 17:39:12 UTC
1542 17:40:46.884769 ELOG: Event(9E) added with size 10 at 2023-10-20 17:39:12 UTC
1543 17:40:46.890781 ELOG: Event(9F) added with size 14 at 2023-10-20 17:39:12 UTC
1544 17:40:46.897047 BS: BS_DEV_INIT times (us): entry 0 run 453646 exit 72544
1545 17:40:46.903170 ELOG: Event(A1) added with size 10 at 2023-10-20 17:39:12 UTC
1546 17:40:46.910925 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1547 17:40:46.917948 ELOG: Event(A0) added with size 9 at 2023-10-20 17:39:12 UTC
1548 17:40:46.921454 elog_add_boot_reason: Logged dev mode boot
1549 17:40:46.924180 Finalize devices...
1550 17:40:46.926212 PCI: 00:17.0 final
1551 17:40:46.927541 Devices finalized
1552 17:40:46.933099 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1553 17:40:46.938403 BS: BS_POST_DEVICE times (us): entry 24767 run 5935 exit 5369
1554 17:40:46.944762 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1555 17:40:46.952674 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1556 17:40:46.958037 disable_unused_touchscreen: Disable ACPI0C50
1557 17:40:46.962138 disable_unused_touchscreen: Enable ELAN900C
1558 17:40:46.964730 CBFS @ 1d00000 size 300000
1559 17:40:46.971096 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1560 17:40:46.974153 CBFS: Locating 'fallback/dsdt.aml'
1561 17:40:46.978390 CBFS: Found @ offset 10b200 size 4448
1562 17:40:46.981503 CBFS @ 1d00000 size 300000
1563 17:40:46.987229 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1564 17:40:46.990401 CBFS: Locating 'fallback/slic'
1565 17:40:46.995397 CBFS: 'fallback/slic' not found.
1566 17:40:46.999297 ACPI: Writing ACPI tables at 89c0f000.
1567 17:40:47.001212 ACPI: * FACS
1568 17:40:47.003222 ACPI: * DSDT
1569 17:40:47.006488 Ramoops buffer: 0x100000@0x89b0e000.
1570 17:40:47.011705 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1571 17:40:47.015627 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1572 17:40:47.019321 ACPI: * FADT
1573 17:40:47.020546 SCI is IRQ9
1574 17:40:47.025025 ACPI: added table 1/32, length now 40
1575 17:40:47.026265 ACPI: * SSDT
1576 17:40:47.029622 Found 1 CPU(s) with 2 core(s) each.
1577 17:40:47.034286 Error: Could not locate 'wifi_sar' in VPD.
1578 17:40:47.038580 Error: failed from getting SAR limits!
1579 17:40:47.042006 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1580 17:40:47.046100 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1581 17:40:47.051164 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1582 17:40:47.054249 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1583 17:40:47.059748 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1584 17:40:47.065105 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1585 17:40:47.070568 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1586 17:40:47.074391 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1587 17:40:47.080383 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1588 17:40:47.086904 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1589 17:40:47.091961 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1590 17:40:47.098085 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1591 17:40:47.102984 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1592 17:40:47.107804 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1593 17:40:47.111387 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1594 17:40:47.117589 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1595 17:40:47.122026 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1596 17:40:47.127461 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1597 17:40:47.134603 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1598 17:40:47.140023 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1599 17:40:47.145470 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1600 17:40:47.150795 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1601 17:40:47.153915 ACPI: added table 2/32, length now 44
1602 17:40:47.155187 ACPI: * MCFG
1603 17:40:47.159487 ACPI: added table 3/32, length now 48
1604 17:40:47.160933 ACPI: * TPM2
1605 17:40:47.163783 TPM2 log created at 89afe000
1606 17:40:47.168198 ACPI: added table 4/32, length now 52
1607 17:40:47.169260 ACPI: * MADT
1608 17:40:47.170648 SCI is IRQ9
1609 17:40:47.174354 ACPI: added table 5/32, length now 56
1610 17:40:47.176767 current = 89c14720
1611 17:40:47.178344 ACPI: * IGD OpRegion
1612 17:40:47.181623 GMA: Found VBT in CBFS
1613 17:40:47.183621 GMA: Found valid VBT in CBFS
1614 17:40:47.187585 ACPI: added table 6/32, length now 60
1615 17:40:47.189324 ACPI: * HPET
1616 17:40:47.192817 ACPI: added table 7/32, length now 64
1617 17:40:47.194748 ACPI: done.
1618 17:40:47.197653 ACPI tables: 30672 bytes.
1619 17:40:47.199773 smbios_write_tables: 89afd000
1620 17:40:47.203888 recv_ec_data: 0x01
1621 17:40:47.205430 Create SMBIOS type 17
1622 17:40:47.208397 PCI: 00:14.3 (Intel WiFi)
1623 17:40:47.210406 SMBIOS tables: 708 bytes.
1624 17:40:47.215296 Writing table forward entry at 0x00000500
1625 17:40:47.221422 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1626 17:40:47.224348 Writing coreboot table at 0x89c33000
1627 17:40:47.231169 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1628 17:40:47.234999 1. 0000000000001000-000000000009ffff: RAM
1629 17:40:47.239929 2. 00000000000a0000-00000000000fffff: RESERVED
1630 17:40:47.243625 3. 0000000000100000-0000000089afcfff: RAM
1631 17:40:47.249394 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1632 17:40:47.255279 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1633 17:40:47.260114 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1634 17:40:47.264838 7. 000000008a000000-000000008f7fffff: RESERVED
1635 17:40:47.270191 8. 00000000e0000000-00000000efffffff: RESERVED
1636 17:40:47.274210 9. 00000000fc000000-00000000fc000fff: RESERVED
1637 17:40:47.279752 10. 00000000fe000000-00000000fe00ffff: RESERVED
1638 17:40:47.284585 11. 00000000fed10000-00000000fed17fff: RESERVED
1639 17:40:47.289419 12. 00000000fed80000-00000000fed83fff: RESERVED
1640 17:40:47.294412 13. 00000000feda0000-00000000feda1fff: RESERVED
1641 17:40:47.297812 14. 0000000100000000-000000016e7fffff: RAM
1642 17:40:47.302617 Graphics framebuffer located at 0xc0000000
1643 17:40:47.305135 Passing 6 GPIOs to payload:
1644 17:40:47.310002 NAME | PORT | POLARITY | VALUE
1645 17:40:47.316086 write protect | 0x000000dc | high | high
1646 17:40:47.320657 recovery | 0x000000d5 | low | high
1647 17:40:47.326417 lid | undefined | high | high
1648 17:40:47.331945 power | undefined | high | low
1649 17:40:47.336555 oprom | undefined | high | low
1650 17:40:47.342031 EC in RW | undefined | high | low
1651 17:40:47.344328 recv_ec_data: 0x01
1652 17:40:47.345553 SKU ID: 3
1653 17:40:47.347435 CBFS @ 1d00000 size 300000
1654 17:40:47.354127 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1655 17:40:47.360419 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 3a17
1656 17:40:47.363186 coreboot table: 1484 bytes.
1657 17:40:47.366063 IMD ROOT 0. 89fff000 00001000
1658 17:40:47.369697 IMD SMALL 1. 89ffe000 00001000
1659 17:40:47.372925 FSP MEMORY 2. 89d0e000 002f0000
1660 17:40:47.376278 CONSOLE 3. 89cee000 00020000
1661 17:40:47.379643 TIME STAMP 4. 89ced000 00000910
1662 17:40:47.383415 VBOOT WORK 5. 89cea000 00003000
1663 17:40:47.386674 VBOOT 6. 89ce9000 00000c0c
1664 17:40:47.390018 MRC DATA 7. 89ce7000 000018f0
1665 17:40:47.393101 ROMSTG STCK 8. 89ce6000 00000400
1666 17:40:47.396495 AFTER CAR 9. 89cdc000 0000a000
1667 17:40:47.399322 RAMSTAGE 10. 89c80000 0005c000
1668 17:40:47.403206 REFCODE 11. 89c4b000 00035000
1669 17:40:47.406160 SMM BACKUP 12. 89c3b000 00010000
1670 17:40:47.409710 COREBOOT 13. 89c33000 00008000
1671 17:40:47.413605 ACPI 14. 89c0f000 00024000
1672 17:40:47.416921 ACPI GNVS 15. 89c0e000 00001000
1673 17:40:47.420373 RAMOOPS 16. 89b0e000 00100000
1674 17:40:47.423089 TPM2 TCGLOG17. 89afe000 00010000
1675 17:40:47.426355 SMBIOS 18. 89afd000 00000800
1676 17:40:47.427866 IMD small region:
1677 17:40:47.431923 IMD ROOT 0. 89ffec00 00000400
1678 17:40:47.435539 FSP RUNTIME 1. 89ffebe0 00000004
1679 17:40:47.438388 POWER STATE 2. 89ffeba0 00000040
1680 17:40:47.442566 ROMSTAGE 3. 89ffeb80 00000004
1681 17:40:47.445198 MEM INFO 4. 89ffe9c0 000001a9
1682 17:40:47.449495 VPD 5. 89ffe960 00000058
1683 17:40:47.452589 COREBOOTFWD 6. 89ffe920 00000028
1684 17:40:47.456195 MTRR: Physical address space:
1685 17:40:47.461789 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1686 17:40:47.468467 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1687 17:40:47.474611 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1688 17:40:47.480512 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1689 17:40:47.487134 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1690 17:40:47.492904 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1691 17:40:47.499263 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1692 17:40:47.503565 MTRR: Fixed MSR 0x250 0x0606060606060606
1693 17:40:47.507401 MTRR: Fixed MSR 0x258 0x0606060606060606
1694 17:40:47.510887 MTRR: Fixed MSR 0x259 0x0000000000000000
1695 17:40:47.515680 MTRR: Fixed MSR 0x268 0x0606060606060606
1696 17:40:47.520360 MTRR: Fixed MSR 0x269 0x0606060606060606
1697 17:40:47.523447 MTRR: Fixed MSR 0x26a 0x0606060606060606
1698 17:40:47.527693 MTRR: Fixed MSR 0x26b 0x0606060606060606
1699 17:40:47.531663 MTRR: Fixed MSR 0x26c 0x0606060606060606
1700 17:40:47.535722 MTRR: Fixed MSR 0x26d 0x0606060606060606
1701 17:40:47.539876 MTRR: Fixed MSR 0x26e 0x0606060606060606
1702 17:40:47.544687 MTRR: Fixed MSR 0x26f 0x0606060606060606
1703 17:40:47.547007 call enable_fixed_mtrr()
1704 17:40:47.550363 CPU physical address size: 39 bits
1705 17:40:47.554525 MTRR: default type WB/UC MTRR counts: 7/6.
1706 17:40:47.558543 MTRR: UC selected as default type.
1707 17:40:47.564796 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1708 17:40:47.570283 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1709 17:40:47.576932 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1710 17:40:47.583555 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1711 17:40:47.589781 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1712 17:40:47.596185 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1713 17:40:47.596804
1714 17:40:47.597601 MTRR check
1715 17:40:47.600217 Fixed MTRRs : Enabled
1716 17:40:47.602709 Variable MTRRs: Enabled
1717 17:40:47.602816
1718 17:40:47.606224 MTRR: Fixed MSR 0x250 0x0606060606060606
1719 17:40:47.610463 MTRR: Fixed MSR 0x258 0x0606060606060606
1720 17:40:47.615311 MTRR: Fixed MSR 0x259 0x0000000000000000
1721 17:40:47.618832 MTRR: Fixed MSR 0x268 0x0606060606060606
1722 17:40:47.622345 MTRR: Fixed MSR 0x269 0x0606060606060606
1723 17:40:47.627051 MTRR: Fixed MSR 0x26a 0x0606060606060606
1724 17:40:47.631539 MTRR: Fixed MSR 0x26b 0x0606060606060606
1725 17:40:47.635553 MTRR: Fixed MSR 0x26c 0x0606060606060606
1726 17:40:47.639243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1727 17:40:47.643867 MTRR: Fixed MSR 0x26e 0x0606060606060606
1728 17:40:47.647337 MTRR: Fixed MSR 0x26f 0x0606060606060606
1729 17:40:47.654040 BS: BS_WRITE_TABLES times (us): entry 17199 run 491019 exit 150009
1730 17:40:47.656376 call enable_fixed_mtrr()
1731 17:40:47.659248 CBFS @ 1d00000 size 300000
1732 17:40:47.666008 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1733 17:40:47.668926 CPU physical address size: 39 bits
1734 17:40:47.672296 CBFS: Locating 'fallback/payload'
1735 17:40:47.677214 CBFS: Found @ offset 1cf4c0 size 3a954
1736 17:40:47.681985 Checking segment from ROM address 0xffecf4f8
1737 17:40:47.686106 Checking segment from ROM address 0xffecf514
1738 17:40:47.690608 Loading segment from ROM address 0xffecf4f8
1739 17:40:47.692959 code (compression=0)
1740 17:40:47.701813 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1741 17:40:47.709707 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1742 17:40:47.712219 it's not compressed!
1743 17:40:47.793931 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1744 17:40:47.801184 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1745 17:40:47.809570 Loading segment from ROM address 0xffecf514
1746 17:40:47.812419 Entry Point 0x30100018
1747 17:40:47.814070 Loaded segments
1748 17:40:47.824166 Finalizing chipset.
1749 17:40:47.825252 Finalizing SMM.
1750 17:40:47.832288 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 159654 exit 11530
1751 17:40:47.834836 mp_park_aps done after 0 msecs.
1752 17:40:47.839019 Jumping to boot code at 30100018(89c33000)
1753 17:40:47.847999 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1754 17:40:47.848266
1755 17:40:47.848490
1756 17:40:47.848943
1757 17:40:47.851204 Starting depthcharge on sarien...
1758 17:40:47.851362
1759 17:40:47.852257 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
1760 17:40:47.852516 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
1761 17:40:47.852731 Setting prompt string to ['sarien:']
1762 17:40:47.852882 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:32)
1763 17:40:47.859346 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1764 17:40:47.859591
1765 17:40:47.866214 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1766 17:40:47.866428
1767 17:40:47.874582 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1768 17:40:47.874783
1769 17:40:47.875967 BIOS MMAP details:
1770 17:40:47.876190
1771 17:40:47.878806 IFD Base Offset : 0x1000000
1772 17:40:47.879318
1773 17:40:47.881765 IFD End Offset : 0x2000000
1774 17:40:47.882184
1775 17:40:47.885683 MMAP Size : 0x1000000
1776 17:40:47.885880
1777 17:40:47.887774 MMAP Start : 0xff000000
1778 17:40:47.888466
1779 17:40:47.895363 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1780 17:40:47.897939
1781 17:40:47.902252 Failed to find BH720 with VID/DID 1217:8620
1782 17:40:47.902403
1783 17:40:47.906194 New NVMe Controller 0x3214e050 @ 00:1d:04
1784 17:40:47.906586
1785 17:40:47.911050 New NVMe Controller 0x3214e118 @ 00:1d:00
1786 17:40:47.911452
1787 17:40:47.916172 The GBB signature is at 0x30000014 and is: 24 47 42 42
1788 17:40:47.920524
1789 17:40:47.923193 Wipe memory regions:
1790 17:40:47.923364
1791 17:40:47.926045 [0x00000000001000, 0x000000000a0000)
1792 17:40:47.926245
1793 17:40:47.930345 [0x00000000100000, 0x00000030000000)
1794 17:40:48.012790
1795 17:40:48.016257 [0x00000032751910, 0x00000089afd000)
1796 17:40:48.166597
1797 17:40:48.171296 [0x00000100000000, 0x0000016e800000)
1798 17:40:48.790666
1799 17:40:48.792595 R8152: Initializing
1800 17:40:48.793012
1801 17:40:48.796260 Version 9 (ocp_data = 6010)
1802 17:40:48.796745
1803 17:40:48.798768 R8152: Done initializing
1804 17:40:48.799180
1805 17:40:48.800437 Adding net device
1806 17:40:48.800869
1807 17:40:48.806608 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1808 17:40:48.807064
1809 17:40:48.807475
1810 17:40:48.808007
1811 17:40:48.808914 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1813 17:40:48.910099 sarien: tftpboot 192.168.201.1 11831858/tftp-deploy-mduj3sc4/kernel/bzImage 11831858/tftp-deploy-mduj3sc4/kernel/cmdline 11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
1814 17:40:48.910732 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1815 17:40:48.911276 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
1816 17:40:48.914299 tftpboot 192.168.201.1 11831858/tftp-deploy-mduj3sc4/kernel/bzImage 11831858/tftp-deploy-mduj3sc4/kernel/cmdline 11831858/tftp-deploy-mduj3sc4/ramdisk/ramdisk.cpio.gz
1817 17:40:48.914699
1818 17:40:48.956187 Waiting for link
1819 17:40:49.114505
1820 17:40:49.115071 done.
1821 17:40:49.115754
1822 17:40:49.117227 MAC: 00:e0:4c:78:7f:db
1823 17:40:49.117644
1824 17:40:49.120210 Sending DHCP discover... done.
1825 17:40:49.121012
1826 17:40:49.122569 Waiting for reply... done.
1827 17:40:49.123073
1828 17:40:49.126029 Sending DHCP request... done.
1829 17:40:49.126593
1830 17:40:49.131078 Waiting for reply... done.
1831 17:40:49.131627
1832 17:40:49.132985 My ip is 192.168.201.106
1833 17:40:49.133473
1834 17:40:49.137074 The DHCP server ip is 192.168.201.1
1835 17:40:49.137507
1836 17:40:49.141396 TFTP server IP predefined by user: 192.168.201.1
1837 17:40:49.141824
1838 17:40:49.148781 Bootfile predefined by user: 11831858/tftp-deploy-mduj3sc4/kernel/bzImage
1839 17:40:49.149204
1840 17:40:49.152131 Sending tftp read request... done.
1841 17:40:49.152556
1842 17:40:49.159041 Waiting for the transfer...
1843 17:40:49.159876
1844 17:40:49.525836 00000000 ################################################################
1845 17:40:49.526015
1846 17:40:49.790424 00080000 ################################################################
1847 17:40:49.791000
1848 17:40:50.034157 00100000 ################################################################
1849 17:40:50.034666
1850 17:40:50.280216 00180000 ################################################################
1851 17:40:50.280592
1852 17:40:50.542452 00200000 ################################################################
1853 17:40:50.543128
1854 17:40:50.789849 00280000 ################################################################
1855 17:40:50.789986
1856 17:40:51.039295 00300000 ################################################################
1857 17:40:51.039895
1858 17:40:51.289516 00380000 ################################################################
1859 17:40:51.289650
1860 17:40:51.542611 00400000 ################################################################
1861 17:40:51.543920
1862 17:40:51.794085 00480000 ################################################################
1863 17:40:51.794217
1864 17:40:52.035892 00500000 ################################################################
1865 17:40:52.036023
1866 17:40:52.282045 00580000 ################################################################
1867 17:40:52.282216
1868 17:40:52.524660 00600000 ################################################################
1869 17:40:52.525335
1870 17:40:52.777958 00680000 ################################################################
1871 17:40:52.778308
1872 17:40:53.033329 00700000 ################################################################
1873 17:40:53.033763
1874 17:40:53.285772 00780000 ################################################################
1875 17:40:53.285912
1876 17:40:53.341975 00800000 ############### done.
1877 17:40:53.342386
1878 17:40:53.345173 The bootfile was 8507280 bytes long.
1879 17:40:53.345502
1880 17:40:53.348761 Sending tftp read request... done.
1881 17:40:53.348849
1882 17:40:53.351596 Waiting for the transfer...
1883 17:40:53.351929
1884 17:40:53.633259 00000000 ################################################################
1885 17:40:53.634028
1886 17:40:53.872709 00080000 ################################################################
1887 17:40:53.873333
1888 17:40:54.109363 00100000 ################################################################
1889 17:40:54.109718
1890 17:40:54.349881 00180000 ################################################################
1891 17:40:54.350237
1892 17:40:54.591553 00200000 ################################################################
1893 17:40:54.592263
1894 17:40:54.833428 00280000 ################################################################
1895 17:40:54.833563
1896 17:40:55.074515 00300000 ################################################################
1897 17:40:55.075083
1898 17:40:55.315356 00380000 ################################################################
1899 17:40:55.316084
1900 17:40:55.557096 00400000 ################################################################
1901 17:40:55.558451
1902 17:40:55.798808 00480000 ################################################################
1903 17:40:55.798943
1904 17:40:56.054047 00500000 ################################################################
1905 17:40:56.054268
1906 17:40:56.309236 00580000 ################################################################
1907 17:40:56.309754
1908 17:40:56.589933 00600000 ################################################################
1909 17:40:56.590496
1910 17:40:56.841488 00680000 ################################################################
1911 17:40:56.842140
1912 17:40:57.086460 00700000 ################################################################
1913 17:40:57.087018
1914 17:40:57.345664 00780000 ################################################################
1915 17:40:57.346279
1916 17:40:57.576122 00800000 ####################################################### done.
1917 17:40:57.576253
1918 17:40:57.579895 Sending tftp read request... done.
1919 17:40:57.579982
1920 17:40:57.582417 Waiting for the transfer...
1921 17:40:57.582499
1922 17:40:57.584050 00000000 # done.
1923 17:40:57.584722
1924 17:40:57.593222 Command line loaded dynamically from TFTP file: 11831858/tftp-deploy-mduj3sc4/kernel/cmdline
1925 17:40:57.593306
1926 17:40:57.612924 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1927 17:40:57.617486
1928 17:40:57.620398 Shutting down all USB controllers.
1929 17:40:57.620960
1930 17:40:57.623898 Removing current net device
1931 17:40:57.625288
1932 17:40:57.628117 EC: exit firmware mode
1933 17:40:57.628704
1934 17:40:57.630287 Finalizing coreboot
1935 17:40:57.630415
1936 17:40:57.636454 Exiting depthcharge with code 4 at timestamp: 16685414
1937 17:40:57.636546
1938 17:40:57.636619
1939 17:40:57.638179 end: 2.2.4 bootloader-commands (duration 00:00:10) [common]
1940 17:40:57.638323 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
1941 17:40:57.638451 Setting prompt string to ['Linux version [0-9]']
1942 17:40:57.638559 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1943 17:40:57.638665 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1944 17:40:57.638934 Starting kernel ...
1945 17:40:57.639041
1946 17:40:57.639133
1948 17:45:19.639132 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
1950 17:45:19.640209 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
1952 17:45:19.641050 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1955 17:45:19.642357 end: 2 depthcharge-action (duration 00:05:00) [common]
1957 17:45:19.643461 Cleaning after the job
1958 17:45:19.643960 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/ramdisk
1959 17:45:19.650269 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/kernel
1960 17:45:19.656266 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831858/tftp-deploy-mduj3sc4/modules
1961 17:45:19.658087 start: 5.1 power-off (timeout 00:00:30) [common]
1962 17:45:19.658948 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
1963 17:45:24.832515 >> Command sent successfully.
1964 17:45:24.835365 Returned 0 in 5 seconds
1965 17:45:24.936158 end: 5.1 power-off (duration 00:00:05) [common]
1967 17:45:24.937545 start: 5.2 read-feedback (timeout 00:09:55) [common]
1968 17:45:24.938822 Listened to connection for namespace 'common' for up to 1s
1969 17:45:25.939417 Finalising connection for namespace 'common'
1970 17:45:25.940080 Disconnecting from shell: Finalise
1971 17:45:25.940473
1972 17:45:26.041182 end: 5.2 read-feedback (duration 00:00:01) [common]
1973 17:45:26.041344 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831858
1974 17:45:26.059338 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831858
1975 17:45:26.059503 JobError: Your job cannot terminate cleanly.