Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:43:58.155095 lava-dispatcher, installed at version: 2023.08
2 17:43:58.155300 start: 0 validate
3 17:43:58.155459 Start time: 2023-10-20 17:43:58.155451+00:00 (UTC)
4 17:43:58.155592 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:43:58.155758 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230623.0%2Fx86%2Frootfs.cpio.gz exists
6 17:43:58.419558 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:43:58.419729 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:43:58.677307 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:43:58.677490 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:43:58.944790 validate duration: 0.79
12 17:43:58.945076 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:43:58.945193 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:43:58.945286 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:43:58.945407 Not decompressing ramdisk as can be used compressed.
16 17:43:58.945491 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230623.0/x86/rootfs.cpio.gz
17 17:43:58.945555 saving as /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/ramdisk/rootfs.cpio.gz
18 17:43:58.945618 total size: 8418130 (8 MB)
19 17:43:58.946739 progress 0 % (0 MB)
20 17:43:58.949226 progress 5 % (0 MB)
21 17:43:58.951660 progress 10 % (0 MB)
22 17:43:58.953939 progress 15 % (1 MB)
23 17:43:58.956457 progress 20 % (1 MB)
24 17:43:58.958729 progress 25 % (2 MB)
25 17:43:58.961198 progress 30 % (2 MB)
26 17:43:58.963426 progress 35 % (2 MB)
27 17:43:58.965713 progress 40 % (3 MB)
28 17:43:58.968115 progress 45 % (3 MB)
29 17:43:58.970380 progress 50 % (4 MB)
30 17:43:58.972742 progress 55 % (4 MB)
31 17:43:58.974992 progress 60 % (4 MB)
32 17:43:58.977168 progress 65 % (5 MB)
33 17:43:58.979472 progress 70 % (5 MB)
34 17:43:58.981743 progress 75 % (6 MB)
35 17:43:58.984081 progress 80 % (6 MB)
36 17:43:58.986291 progress 85 % (6 MB)
37 17:43:58.988617 progress 90 % (7 MB)
38 17:43:58.990839 progress 95 % (7 MB)
39 17:43:58.993021 progress 100 % (8 MB)
40 17:43:58.993254 8 MB downloaded in 0.05 s (168.53 MB/s)
41 17:43:58.993406 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:43:58.993653 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:43:58.993743 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:43:58.993830 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:43:58.993968 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:43:58.994037 saving as /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/kernel/bzImage
48 17:43:58.994097 total size: 8507280 (8 MB)
49 17:43:58.994157 No compression specified
50 17:43:58.995531 progress 0 % (0 MB)
51 17:43:58.997706 progress 5 % (0 MB)
52 17:43:59.000107 progress 10 % (0 MB)
53 17:43:59.002401 progress 15 % (1 MB)
54 17:43:59.004833 progress 20 % (1 MB)
55 17:43:59.007095 progress 25 % (2 MB)
56 17:43:59.009467 progress 30 % (2 MB)
57 17:43:59.011838 progress 35 % (2 MB)
58 17:43:59.014289 progress 40 % (3 MB)
59 17:43:59.016657 progress 45 % (3 MB)
60 17:43:59.018963 progress 50 % (4 MB)
61 17:43:59.021281 progress 55 % (4 MB)
62 17:43:59.023652 progress 60 % (4 MB)
63 17:43:59.026064 progress 65 % (5 MB)
64 17:43:59.028497 progress 70 % (5 MB)
65 17:43:59.031018 progress 75 % (6 MB)
66 17:43:59.033445 progress 80 % (6 MB)
67 17:43:59.035967 progress 85 % (6 MB)
68 17:43:59.038534 progress 90 % (7 MB)
69 17:43:59.040862 progress 95 % (7 MB)
70 17:43:59.043189 progress 100 % (8 MB)
71 17:43:59.043403 8 MB downloaded in 0.05 s (164.56 MB/s)
72 17:43:59.043566 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:43:59.043802 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:43:59.043888 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:43:59.043974 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:43:59.044105 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:43:59.044172 saving as /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/modules/modules.tar
79 17:43:59.044231 total size: 253900 (0 MB)
80 17:43:59.044299 Using unxz to decompress xz
81 17:43:59.048784 progress 12 % (0 MB)
82 17:43:59.049236 progress 25 % (0 MB)
83 17:43:59.049481 progress 38 % (0 MB)
84 17:43:59.050982 progress 51 % (0 MB)
85 17:43:59.052915 progress 64 % (0 MB)
86 17:43:59.054860 progress 77 % (0 MB)
87 17:43:59.056797 progress 90 % (0 MB)
88 17:43:59.058569 progress 100 % (0 MB)
89 17:43:59.064339 0 MB downloaded in 0.02 s (12.05 MB/s)
90 17:43:59.064627 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:43:59.064922 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:43:59.065050 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:43:59.065147 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:43:59.065263 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:43:59.065351 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:43:59.065612 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5
98 17:43:59.065778 makedir: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin
99 17:43:59.065887 makedir: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/tests
100 17:43:59.065990 makedir: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/results
101 17:43:59.066137 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-add-keys
102 17:43:59.066321 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-add-sources
103 17:43:59.066516 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-background-process-start
104 17:43:59.066741 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-background-process-stop
105 17:43:59.066874 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-common-functions
106 17:43:59.067003 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-echo-ipv4
107 17:43:59.067132 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-install-packages
108 17:43:59.067261 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-installed-packages
109 17:43:59.067427 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-os-build
110 17:43:59.067602 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-probe-channel
111 17:43:59.067744 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-probe-ip
112 17:43:59.067935 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-target-ip
113 17:43:59.068093 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-target-mac
114 17:43:59.068219 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-target-storage
115 17:43:59.068350 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-case
116 17:43:59.068477 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-event
117 17:43:59.068661 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-feedback
118 17:43:59.068814 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-raise
119 17:43:59.068943 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-reference
120 17:43:59.069070 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-runner
121 17:43:59.069230 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-set
122 17:43:59.069387 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-test-shell
123 17:43:59.069534 Updating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-install-packages (oe)
124 17:43:59.069715 Updating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/bin/lava-installed-packages (oe)
125 17:43:59.069849 Creating /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/environment
126 17:43:59.069955 LAVA metadata
127 17:43:59.070030 - LAVA_JOB_ID=11831822
128 17:43:59.070102 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:43:59.070249 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:43:59.070348 skipped lava-vland-overlay
131 17:43:59.070457 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:43:59.070557 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:43:59.070624 skipped lava-multinode-overlay
134 17:43:59.070701 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:43:59.070783 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:43:59.070857 Loading test definitions
137 17:43:59.070953 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:43:59.071031 Using /lava-11831822 at stage 0
139 17:43:59.071438 uuid=11831822_1.4.2.3.1 testdef=None
140 17:43:59.071562 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:43:59.071689 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:43:59.072232 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:43:59.072449 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:43:59.073105 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:43:59.073377 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:43:59.074172 runner path: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/0/tests/0_dmesg test_uuid 11831822_1.4.2.3.1
149 17:43:59.074345 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:43:59.074687 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
152 17:43:59.074794 Using /lava-11831822 at stage 1
153 17:43:59.075116 uuid=11831822_1.4.2.3.5 testdef=None
154 17:43:59.075204 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
155 17:43:59.075304 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
156 17:43:59.075814 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
158 17:43:59.076083 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
159 17:43:59.076789 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
161 17:43:59.077066 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
162 17:43:59.077767 runner path: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/1/tests/1_bootrr test_uuid 11831822_1.4.2.3.5
163 17:43:59.077953 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
165 17:43:59.078315 Creating lava-test-runner.conf files
166 17:43:59.078424 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/0 for stage 0
167 17:43:59.078570 - 0_dmesg
168 17:43:59.078716 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831822/lava-overlay-myveg3b5/lava-11831822/1 for stage 1
169 17:43:59.078841 - 1_bootrr
170 17:43:59.078954 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
171 17:43:59.079041 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
172 17:43:59.088178 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
173 17:43:59.088305 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
174 17:43:59.088406 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
175 17:43:59.088492 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
176 17:43:59.088627 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
177 17:43:59.354520 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
178 17:43:59.354973 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
179 17:43:59.355089 extracting modules file /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831822/extract-overlay-ramdisk-p1f20ten/ramdisk
180 17:43:59.369950 end: 1.4.4 extract-modules (duration 00:00:00) [common]
181 17:43:59.370102 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
182 17:43:59.370196 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831822/compress-overlay-_18ecxlx/overlay-1.4.2.4.tar.gz to ramdisk
183 17:43:59.370266 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831822/compress-overlay-_18ecxlx/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831822/extract-overlay-ramdisk-p1f20ten/ramdisk
184 17:43:59.379757 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
185 17:43:59.379877 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
186 17:43:59.379969 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
187 17:43:59.380056 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
188 17:43:59.380135 Building ramdisk /var/lib/lava/dispatcher/tmp/11831822/extract-overlay-ramdisk-p1f20ten/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831822/extract-overlay-ramdisk-p1f20ten/ramdisk
189 17:43:59.512781 >> 49827 blocks
190 17:44:00.438871 rename /var/lib/lava/dispatcher/tmp/11831822/extract-overlay-ramdisk-p1f20ten/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
191 17:44:00.439320 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
192 17:44:00.439489 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
193 17:44:00.439597 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
194 17:44:00.439688 No mkimage arch provided, not using FIT.
195 17:44:00.439778 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
196 17:44:00.439863 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
197 17:44:00.439966 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
198 17:44:00.440055 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
199 17:44:00.440134 No LXC device requested
200 17:44:00.440212 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
201 17:44:00.440302 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
202 17:44:00.440380 end: 1.6 deploy-device-env (duration 00:00:00) [common]
203 17:44:00.440451 Checking files for TFTP limit of 4294967296 bytes.
204 17:44:00.440870 end: 1 tftp-deploy (duration 00:00:01) [common]
205 17:44:00.440977 start: 2 depthcharge-action (timeout 00:05:00) [common]
206 17:44:00.441066 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
207 17:44:00.441190 substitutions:
208 17:44:00.441255 - {DTB}: None
209 17:44:00.441318 - {INITRD}: 11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
210 17:44:00.441378 - {KERNEL}: 11831822/tftp-deploy-puhf7lq3/kernel/bzImage
211 17:44:00.441435 - {LAVA_MAC}: None
212 17:44:00.441490 - {PRESEED_CONFIG}: None
213 17:44:00.441545 - {PRESEED_LOCAL}: None
214 17:44:00.441598 - {RAMDISK}: 11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
215 17:44:00.441652 - {ROOT_PART}: None
216 17:44:00.441705 - {ROOT}: None
217 17:44:00.441757 - {SERVER_IP}: 192.168.201.1
218 17:44:00.441810 - {TEE}: None
219 17:44:00.441863 Parsed boot commands:
220 17:44:00.441916 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
221 17:44:00.442089 Parsed boot commands: tftpboot 192.168.201.1 11831822/tftp-deploy-puhf7lq3/kernel/bzImage 11831822/tftp-deploy-puhf7lq3/kernel/cmdline 11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
222 17:44:00.442176 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
223 17:44:00.442260 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
224 17:44:00.442355 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
225 17:44:00.442443 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
226 17:44:00.442511 Not connected, no need to disconnect.
227 17:44:00.442584 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
228 17:44:00.442785 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
229 17:44:00.442852 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-4'
230 17:44:00.446986 Setting prompt string to ['lava-test: # ']
231 17:44:00.447349 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
232 17:44:00.447493 end: 2.2.1 reset-connection (duration 00:00:00) [common]
233 17:44:00.447588 start: 2.2.2 reset-device (timeout 00:05:00) [common]
234 17:44:00.447679 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
235 17:44:00.447920 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
236 17:44:17.327325 >> Command sent successfully.
237 17:44:17.329725 Returned 0 in 16 seconds
238 17:44:17.430115 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
240 17:44:17.430434 end: 2.2.2 reset-device (duration 00:00:17) [common]
241 17:44:17.430536 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
242 17:44:17.430623 Setting prompt string to 'Starting depthcharge on sarien...'
243 17:44:17.430689 Changing prompt to 'Starting depthcharge on sarien...'
244 17:44:17.430754 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
245 17:44:17.431033 [Enter `^Ec?' for help]
246 17:44:17.431112
247 17:44:17.431173
248 17:44:17.431235 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
249 17:44:17.431295 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
250 17:44:17.431354 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
251 17:44:17.431421 CPU: AES supported, TXT supported, VT supported
252 17:44:17.431477 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
253 17:44:17.431531 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
254 17:44:17.431585 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
255 17:44:17.431638 VBOOT: Loading verstage.
256 17:44:17.431694 CBFS @ 1d00000 size 300000
257 17:44:17.431748 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
258 17:44:17.431802 CBFS: Locating 'fallback/verstage'
259 17:44:17.431855 CBFS: Found @ offset 10f6c0 size 1435c
260 17:44:17.431908
261 17:44:17.431961
262 17:44:17.432013 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
263 17:44:17.432067 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
264 17:44:17.432121 done! DID_VID 0x00281ae0
265 17:44:17.432174 TPM ready after 0 ms
266 17:44:17.432227 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
267 17:44:17.432280 tlcl_send_startup: Startup return code is 0
268 17:44:17.432333 TPM: setup succeeded
269 17:44:17.432387 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
270 17:44:17.432441 Checking cr50 for recovery request
271 17:44:17.432494 Phase 1
272 17:44:17.432546 FMAP: Found "FLASH" version 1.1 at 1c10000.
273 17:44:17.432600 FMAP: base = fe000000 size = 2000000 #areas = 37
274 17:44:17.432658 FMAP: area GBB found @ 1c11000 (978944 bytes)
275 17:44:17.432714 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
276 17:44:17.432767 Phase 2
277 17:44:17.432819 Phase 3
278 17:44:17.432871 FMAP: area GBB found @ 1c11000 (978944 bytes)
279 17:44:17.432924 VB2:vb2_report_dev_firmware() This is developer signed firmware
280 17:44:17.432977 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
281 17:44:17.433030 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
282 17:44:17.433082 VB2:vb2_verify_keyblock() Checking key block signature...
283 17:44:17.433134 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
284 17:44:17.433186 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
285 17:44:17.433239 VB2:vb2_verify_fw_preamble() Verifying preamble.
286 17:44:17.433290 Phase 4
287 17:44:17.433342 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
288 17:44:17.433395 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
289 17:44:17.433448 VB2:vb2_rsa_verify_digest() Digest check failed!
290 17:44:17.433500 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
291 17:44:17.433553 Saving nvdata
292 17:44:17.433606 Reboot requested (10020007)
293 17:44:17.433658 board_reset() called!
294 17:44:17.433710 full_reset() called!
295 17:44:21.642691
296 17:44:21.643226
297 17:44:21.651237 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
298 17:44:21.656001 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
299 17:44:21.660401 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
300 17:44:21.665640 CPU: AES supported, TXT supported, VT supported
301 17:44:21.670521 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
302 17:44:21.676088 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
303 17:44:21.680915 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
304 17:44:21.684568 VBOOT: Loading verstage.
305 17:44:21.687066 CBFS @ 1d00000 size 300000
306 17:44:21.693671 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
307 17:44:21.696975 CBFS: Locating 'fallback/verstage'
308 17:44:21.701051 CBFS: Found @ offset 10f6c0 size 1435c
309 17:44:21.716158
310 17:44:21.716252
311 17:44:21.723888 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
312 17:44:21.731167 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
313 17:44:21.854521 .done! DID_VID 0x00281ae0
314 17:44:21.856903 TPM ready after 0 ms
315 17:44:21.861139 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
316 17:44:21.935058 tlcl_send_startup: Startup return code is 0
317 17:44:21.938224 TPM: setup succeeded
318 17:44:21.954961 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
319 17:44:21.958849 Checking cr50 for recovery request
320 17:44:21.969072 Phase 1
321 17:44:21.973267 FMAP: Found "FLASH" version 1.1 at 1c10000.
322 17:44:21.978154 FMAP: base = fe000000 size = 2000000 #areas = 37
323 17:44:21.982415 FMAP: area GBB found @ 1c11000 (978944 bytes)
324 17:44:21.990061 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 17:44:21.996574 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
326 17:44:21.999272 Recovery requested (1009000e)
327 17:44:22.000429 Saving nvdata
328 17:44:22.015542 tlcl_extend: response is 0
329 17:44:22.030024 tlcl_extend: response is 0
330 17:44:22.034055 CBFS @ 1d00000 size 300000
331 17:44:22.039869 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
332 17:44:22.043333 CBFS: Locating 'fallback/romstage'
333 17:44:22.047413 CBFS: Found @ offset 80 size 15b2c
334 17:44:22.048830
335 17:44:22.048905
336 17:44:22.057196 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
337 17:44:22.061747 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
338 17:44:22.066512 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
339 17:44:22.071088 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 17:44:22.074858 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 17:44:22.079599 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
342 17:44:22.082021 TCO_STS: 0000 0004
343 17:44:22.084419 GEN_PMCON: d0015209 00002200
344 17:44:22.088090 GBLRST_CAUSE: 00000000 00000000
345 17:44:22.089816 prev_sleep_state 5
346 17:44:22.093042 Boot Count incremented to 37846
347 17:44:22.096547 CBFS @ 1d00000 size 300000
348 17:44:22.102648 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
349 17:44:22.105874 CBFS: Locating 'fspm.bin'
350 17:44:22.108789 CBFS: Found @ offset 60fc0 size 70000
351 17:44:22.115084 FMAP: Found "FLASH" version 1.1 at 1c10000.
352 17:44:22.119472 FMAP: base = fe000000 size = 2000000 #areas = 37
353 17:44:22.125033 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
354 17:44:22.131532 Probing TPM I2C: done! DID_VID 0x00281ae0
355 17:44:22.134288 Locality already claimed
356 17:44:22.137148 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
357 17:44:22.156810 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
358 17:44:22.163374 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
359 17:44:22.166367 MRC cache found, size 18e0
360 17:44:22.168718 bootmode is set to :2
361 17:44:22.261266 CBMEM:
362 17:44:22.264076 IMD: root @ 89fff000 254 entries.
363 17:44:22.267412 IMD: root @ 89ffec00 62 entries.
364 17:44:22.270123 External stage cache:
365 17:44:22.274092 IMD: root @ 8abff000 254 entries.
366 17:44:22.277453 IMD: root @ 8abfec00 62 entries.
367 17:44:22.283629 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
368 17:44:22.286784 creating vboot_handoff structure
369 17:44:22.308287 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
370 17:44:22.323231 tlcl_write: response is 0
371 17:44:22.341437 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
372 17:44:22.345300 MRC: TPM MRC hash updated successfully.
373 17:44:22.346511 1 DIMMs found
374 17:44:22.349110 top_of_ram = 0x8a000000
375 17:44:22.355096 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
376 17:44:22.359336 MTRR Range: Start=ff000000 End=0 (Size 1000000)
377 17:44:22.362232 CBFS @ 1d00000 size 300000
378 17:44:22.368359 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
379 17:44:22.372036 CBFS: Locating 'fallback/postcar'
380 17:44:22.375690 CBFS: Found @ offset 107000 size 41a4
381 17:44:22.381952 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
382 17:44:22.391465 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
383 17:44:22.396320 Processing 126 relocs. Offset value of 0x87cdd000
384 17:44:22.399836
385 17:44:22.399922
386 17:44:22.408002 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
387 17:44:22.410855 CBFS @ 1d00000 size 300000
388 17:44:22.417135 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
389 17:44:22.420626 CBFS: Locating 'fallback/ramstage'
390 17:44:22.424867 CBFS: Found @ offset 458c0 size 1a8a8
391 17:44:22.431040 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
392 17:44:22.459868 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
393 17:44:22.464835 Processing 3754 relocs. Offset value of 0x88e81000
394 17:44:22.471675
395 17:44:22.471763
396 17:44:22.480090 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
397 17:44:22.483999 FMAP: Found "FLASH" version 1.1 at 1c10000.
398 17:44:22.489590 FMAP: base = fe000000 size = 2000000 #areas = 37
399 17:44:22.494187 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
400 17:44:22.498103 WARNING: RO_VPD is uninitialized or empty.
401 17:44:22.502480 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
402 17:44:22.507549 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
403 17:44:22.509128 Normal boot.
404 17:44:22.515759 BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1162
405 17:44:22.518728 CBFS @ 1d00000 size 300000
406 17:44:22.525436 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
407 17:44:22.528964 CBFS: Locating 'cpu_microcode_blob.bin'
408 17:44:22.533273 CBFS: Found @ offset 15c40 size 2fc00
409 17:44:22.537479 microcode: sig=0x806ec pf=0x80 revision=0xb7
410 17:44:22.539352 Skip microcode update
411 17:44:22.542401 CBFS @ 1d00000 size 300000
412 17:44:22.548576 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
413 17:44:22.551526 CBFS: Locating 'fsps.bin'
414 17:44:22.555121 CBFS: Found @ offset d1fc0 size 35000
415 17:44:22.590031 Detected 4 core, 8 thread CPU.
416 17:44:22.591766 Setting up SMI for CPU
417 17:44:22.594476 IED base = 0x8ac00000
418 17:44:22.596767 IED size = 0x00400000
419 17:44:22.599726 Will perform SMM setup.
420 17:44:22.603922 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
421 17:44:22.612048 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
422 17:44:22.617384 Processing 16 relocs. Offset value of 0x00030000
423 17:44:22.619859 Attempting to start 7 APs
424 17:44:22.623336 Waiting for 10ms after sending INIT.
425 17:44:22.638961 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
426 17:44:22.639859 done.
427 17:44:22.642257 AP: slot 1 apic_id 2.
428 17:44:22.644654 AP: slot 4 apic_id 3.
429 17:44:22.647059 AP: slot 2 apic_id 7.
430 17:44:22.648939 AP: slot 5 apic_id 6.
431 17:44:22.651338 AP: slot 7 apic_id 4.
432 17:44:22.653754 AP: slot 6 apic_id 5.
433 17:44:22.657803 Waiting for 2nd SIPI to complete...done.
434 17:44:22.665629 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
435 17:44:22.670622 Processing 13 relocs. Offset value of 0x00038000
436 17:44:22.676772 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
437 17:44:22.679909 Installing SMM handler to 0x8a000000
438 17:44:22.688322 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
439 17:44:22.693898 Processing 867 relocs. Offset value of 0x8a010000
440 17:44:22.701661 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
441 17:44:22.706846 Processing 13 relocs. Offset value of 0x8a008000
442 17:44:22.712967 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
443 17:44:22.717913 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
444 17:44:22.724023 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
445 17:44:22.730050 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
446 17:44:22.735310 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
447 17:44:22.740894 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
448 17:44:22.747327 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
449 17:44:22.753122 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
450 17:44:22.756728 Clearing SMI status registers
451 17:44:22.758071 SMI_STS: PM1
452 17:44:22.760773 PM1_STS: WAK PWRBTN
453 17:44:22.762736 TCO_STS: BOOT SECOND_TO
454 17:44:22.765634 GPE0 STD STS: eSPI
455 17:44:22.767470 New SMBASE 0x8a000000
456 17:44:22.770606 In relocation handler: CPU 0
457 17:44:22.774105 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
458 17:44:22.779346 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 17:44:22.781918 Relocation complete.
460 17:44:22.783335 New SMBASE 0x89fff400
461 17:44:22.786837 In relocation handler: CPU 3
462 17:44:22.790562 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
463 17:44:22.795401 Writing SMRR. base = 0x8a000006, mask=0xff000800
464 17:44:22.797457 Relocation complete.
465 17:44:22.799551 New SMBASE 0x89fff000
466 17:44:22.803190 In relocation handler: CPU 4
467 17:44:22.807286 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
468 17:44:22.812186 Writing SMRR. base = 0x8a000006, mask=0xff000800
469 17:44:22.814365 Relocation complete.
470 17:44:22.816570 New SMBASE 0x89fffc00
471 17:44:22.819359 In relocation handler: CPU 1
472 17:44:22.823654 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
473 17:44:22.828390 Writing SMRR. base = 0x8a000006, mask=0xff000800
474 17:44:22.830134 Relocation complete.
475 17:44:22.832291 New SMBASE 0x89ffec00
476 17:44:22.835833 In relocation handler: CPU 5
477 17:44:22.839962 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
478 17:44:22.844867 Writing SMRR. base = 0x8a000006, mask=0xff000800
479 17:44:22.846656 Relocation complete.
480 17:44:22.849057 New SMBASE 0x89fff800
481 17:44:22.852175 In relocation handler: CPU 2
482 17:44:22.855401 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
483 17:44:22.861102 Writing SMRR. base = 0x8a000006, mask=0xff000800
484 17:44:22.862555 Relocation complete.
485 17:44:22.865354 New SMBASE 0x89ffe400
486 17:44:22.868016 In relocation handler: CPU 7
487 17:44:22.872572 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
488 17:44:22.877023 Writing SMRR. base = 0x8a000006, mask=0xff000800
489 17:44:22.878904 Relocation complete.
490 17:44:22.882075 New SMBASE 0x89ffe800
491 17:44:22.884545 In relocation handler: CPU 6
492 17:44:22.888773 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
493 17:44:22.893165 Writing SMRR. base = 0x8a000006, mask=0xff000800
494 17:44:22.895255 Relocation complete.
495 17:44:22.898080 Initializing CPU #0
496 17:44:22.901169 CPU: vendor Intel device 806ec
497 17:44:22.905112 CPU: family 06, model 8e, stepping 0c
498 17:44:22.907009 Clearing out pending MCEs
499 17:44:22.911816 Setting up local APIC... apic_id: 0x00 done.
500 17:44:22.915076 Turbo is available but hidden
501 17:44:22.916883 Turbo has been enabled
502 17:44:22.919310 VMX status: enabled
503 17:44:22.923016 IA32_FEATURE_CONTROL status: locked
504 17:44:22.924953 Skip microcode update
505 17:44:22.927289 CPU #0 initialized
506 17:44:22.929393 Initializing CPU #3
507 17:44:22.931359 Initializing CPU #1
508 17:44:22.933490 Initializing CPU #4
509 17:44:22.936099 CPU: vendor Intel device 806ec
510 17:44:22.939917 CPU: family 06, model 8e, stepping 0c
511 17:44:22.943556 CPU: vendor Intel device 806ec
512 17:44:22.947212 CPU: family 06, model 8e, stepping 0c
513 17:44:22.949794 Clearing out pending MCEs
514 17:44:22.952838 Clearing out pending MCEs
515 17:44:22.957629 Setting up local APIC...CPU: vendor Intel device 806ec
516 17:44:22.962058 CPU: family 06, model 8e, stepping 0c
517 17:44:22.963302 Initializing CPU #2
518 17:44:22.966354 Initializing CPU #5
519 17:44:22.968791 CPU: vendor Intel device 806ec
520 17:44:22.972436 CPU: family 06, model 8e, stepping 0c
521 17:44:22.975679 CPU: vendor Intel device 806ec
522 17:44:22.979816 CPU: family 06, model 8e, stepping 0c
523 17:44:22.982585 Clearing out pending MCEs
524 17:44:22.984316 Initializing CPU #7
525 17:44:22.986471 Initializing CPU #6
526 17:44:22.989050 CPU: vendor Intel device 806ec
527 17:44:22.993447 CPU: family 06, model 8e, stepping 0c
528 17:44:22.996583 CPU: vendor Intel device 806ec
529 17:44:23.000135 CPU: family 06, model 8e, stepping 0c
530 17:44:23.005686 Setting up local APIC...Clearing out pending MCEs
531 17:44:23.008159 Clearing out pending MCEs
532 17:44:23.011891 Setting up local APIC... apic_id: 0x01 done.
533 17:44:23.016867 Setting up local APIC...VMX status: enabled
534 17:44:23.019048 apic_id: 0x07 done.
535 17:44:23.021541 apic_id: 0x06 done.
536 17:44:23.023402 VMX status: enabled
537 17:44:23.025301 VMX status: enabled
538 17:44:23.028907 IA32_FEATURE_CONTROL status: locked
539 17:44:23.032412 IA32_FEATURE_CONTROL status: locked
540 17:44:23.034567 Skip microcode update
541 17:44:23.036248 Skip microcode update
542 17:44:23.038502 CPU #2 initialized
543 17:44:23.040544 CPU #5 initialized
544 17:44:23.044316 IA32_FEATURE_CONTROL status: locked
545 17:44:23.046875 Clearing out pending MCEs
546 17:44:23.049207 Clearing out pending MCEs
547 17:44:23.053903 Setting up local APIC...Skip microcode update
548 17:44:23.061004 Setting up local APIC...Setting up local APIC...CPU #3 initialized
549 17:44:23.062221 apic_id: 0x03 done.
550 17:44:23.064961 apic_id: 0x02 done.
551 17:44:23.067237 VMX status: enabled
552 17:44:23.068509 VMX status: enabled
553 17:44:23.072840 IA32_FEATURE_CONTROL status: locked
554 17:44:23.076054 IA32_FEATURE_CONTROL status: locked
555 17:44:23.077853 Skip microcode update
556 17:44:23.080759 Skip microcode update
557 17:44:23.081999 CPU #4 initialized
558 17:44:23.084563 CPU #1 initialized
559 17:44:23.086607 apic_id: 0x05 done.
560 17:44:23.088473 apic_id: 0x04 done.
561 17:44:23.091019 VMX status: enabled
562 17:44:23.092550 VMX status: enabled
563 17:44:23.096076 IA32_FEATURE_CONTROL status: locked
564 17:44:23.099689 IA32_FEATURE_CONTROL status: locked
565 17:44:23.102592 Skip microcode update
566 17:44:23.104883 Skip microcode update
567 17:44:23.106615 CPU #6 initialized
568 17:44:23.108155 CPU #7 initialized
569 17:44:23.112628 bsp_do_flight_plan done after 451 msecs.
570 17:44:23.115654 CPU: frequency set to 4800 MHz
571 17:44:23.117579 Enabling SMIs.
572 17:44:23.118392 Locking SMM.
573 17:44:23.121411 CBFS @ 1d00000 size 300000
574 17:44:23.128106 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
575 17:44:23.130588 CBFS: Locating 'vbt.bin'
576 17:44:23.134891 CBFS: Found @ offset 60a40 size 4a0
577 17:44:23.139108 Found a VBT of 4608 bytes after decompression
578 17:44:23.152256 FMAP: area GBB found @ 1c11000 (978944 bytes)
579 17:44:23.213864 Detected 4 core, 8 thread CPU.
580 17:44:23.217295 Detected 4 core, 8 thread CPU.
581 17:44:23.444073 Display FSP Version Info HOB
582 17:44:23.447870 Reference Code - CPU = 7.0.5e.40
583 17:44:23.450218 uCode Version = 0.0.0.b8
584 17:44:23.453367 Display FSP Version Info HOB
585 17:44:23.455788 Reference Code - ME = 7.0.5e.40
586 17:44:23.458894 MEBx version = 0.0.0.0
587 17:44:23.461942 ME Firmware Version = Consumer SKU
588 17:44:23.465227 Display FSP Version Info HOB
589 17:44:23.468744 Reference Code - CNL PCH = 7.0.5e.40
590 17:44:23.471851 PCH-CRID Status = Disabled
591 17:44:23.475476 CNL PCH H A0 Hsio Version = 2.0.0.0
592 17:44:23.479130 CNL PCH H Ax Hsio Version = 9.0.0.0
593 17:44:23.482174 CNL PCH H Bx Hsio Version = a.0.0.0
594 17:44:23.485665 CNL PCH LP B0 Hsio Version = 7.0.0.0
595 17:44:23.489952 CNL PCH LP Bx Hsio Version = 6.0.0.0
596 17:44:23.493646 CNL PCH LP Dx Hsio Version = 7.0.0.0
597 17:44:23.496694 Display FSP Version Info HOB
598 17:44:23.500958 Reference Code - SA - System Agent = 7.0.5e.40
599 17:44:23.504081 Reference Code - MRC = 0.7.1.68
600 17:44:23.507180 SA - PCIe Version = 7.0.5e.40
601 17:44:23.509942 SA-CRID Status = Disabled
602 17:44:23.513472 SA-CRID Original Value = 0.0.0.c
603 17:44:23.515801 SA-CRID New Value = 0.0.0.c
604 17:44:23.533963 RTC Init
605 17:44:23.538214 Set power off after power failure.
606 17:44:23.540074 Disabling Deep S3
607 17:44:23.541496 Disabling Deep S3
608 17:44:23.543932 Disabling Deep S4
609 17:44:23.545700 Disabling Deep S4
610 17:44:23.547562 Disabling Deep S5
611 17:44:23.549473 Disabling Deep S5
612 17:44:23.555643 BS: BS_DEV_INIT_CHIPS times (us): entry 602677 run 414496 exit 16218
613 17:44:23.558264 Enumerating buses...
614 17:44:23.562648 Show all devs... Before device enumeration.
615 17:44:23.564783 Root Device: enabled 1
616 17:44:23.567422 CPU_CLUSTER: 0: enabled 1
617 17:44:23.569759 DOMAIN: 0000: enabled 1
618 17:44:23.572308 APIC: 00: enabled 1
619 17:44:23.574854 PCI: 00:00.0: enabled 1
620 17:44:23.577060 PCI: 00:02.0: enabled 1
621 17:44:23.579715 PCI: 00:04.0: enabled 1
622 17:44:23.582192 PCI: 00:12.0: enabled 1
623 17:44:23.584602 PCI: 00:12.5: enabled 0
624 17:44:23.586422 PCI: 00:12.6: enabled 0
625 17:44:23.589289 PCI: 00:13.0: enabled 0
626 17:44:23.591824 PCI: 00:14.0: enabled 1
627 17:44:23.594226 PCI: 00:14.1: enabled 0
628 17:44:23.596654 PCI: 00:14.3: enabled 1
629 17:44:23.599172 PCI: 00:14.5: enabled 0
630 17:44:23.601422 PCI: 00:15.0: enabled 1
631 17:44:23.603706 PCI: 00:15.1: enabled 1
632 17:44:23.606691 PCI: 00:15.2: enabled 0
633 17:44:23.609127 PCI: 00:15.3: enabled 0
634 17:44:23.611175 PCI: 00:16.0: enabled 1
635 17:44:23.612884 PCI: 00:16.1: enabled 0
636 17:44:23.616273 PCI: 00:16.2: enabled 0
637 17:44:23.618739 PCI: 00:16.3: enabled 0
638 17:44:23.620622 PCI: 00:16.4: enabled 0
639 17:44:23.623667 PCI: 00:16.5: enabled 0
640 17:44:23.626026 PCI: 00:17.0: enabled 1
641 17:44:23.628383 PCI: 00:19.0: enabled 1
642 17:44:23.630876 PCI: 00:19.1: enabled 0
643 17:44:23.632562 PCI: 00:19.2: enabled 1
644 17:44:23.635630 PCI: 00:1a.0: enabled 0
645 17:44:23.637865 PCI: 00:1c.0: enabled 1
646 17:44:23.640563 PCI: 00:1c.1: enabled 0
647 17:44:23.642293 PCI: 00:1c.2: enabled 0
648 17:44:23.645001 PCI: 00:1c.3: enabled 0
649 17:44:23.647095 PCI: 00:1c.4: enabled 0
650 17:44:23.649722 PCI: 00:1c.5: enabled 0
651 17:44:23.652436 PCI: 00:1c.6: enabled 0
652 17:44:23.654427 PCI: 00:1c.7: enabled 1
653 17:44:23.657181 PCI: 00:1d.0: enabled 1
654 17:44:23.659674 PCI: 00:1d.1: enabled 1
655 17:44:23.662180 PCI: 00:1d.2: enabled 0
656 17:44:23.664025 PCI: 00:1d.3: enabled 0
657 17:44:23.666670 PCI: 00:1d.4: enabled 1
658 17:44:23.669606 PCI: 00:1e.0: enabled 0
659 17:44:23.671784 PCI: 00:1e.1: enabled 0
660 17:44:23.673875 PCI: 00:1e.2: enabled 0
661 17:44:23.676884 PCI: 00:1e.3: enabled 0
662 17:44:23.679368 PCI: 00:1f.0: enabled 1
663 17:44:23.681600 PCI: 00:1f.1: enabled 1
664 17:44:23.684073 PCI: 00:1f.2: enabled 1
665 17:44:23.686273 PCI: 00:1f.3: enabled 1
666 17:44:23.688813 PCI: 00:1f.4: enabled 1
667 17:44:23.691532 PCI: 00:1f.5: enabled 1
668 17:44:23.693805 PCI: 00:1f.6: enabled 1
669 17:44:23.696105 USB0 port 0: enabled 1
670 17:44:23.698548 I2C: 00:10: enabled 1
671 17:44:23.700371 I2C: 00:10: enabled 1
672 17:44:23.702821 I2C: 00:34: enabled 1
673 17:44:23.705024 I2C: 00:2c: enabled 1
674 17:44:23.707174 I2C: 00:50: enabled 1
675 17:44:23.709332 PNP: 0c09.0: enabled 1
676 17:44:23.712007 USB2 port 0: enabled 1
677 17:44:23.713703 USB2 port 1: enabled 1
678 17:44:23.716920 USB2 port 2: enabled 1
679 17:44:23.718868 USB2 port 4: enabled 1
680 17:44:23.720654 USB2 port 5: enabled 1
681 17:44:23.723538 USB2 port 6: enabled 1
682 17:44:23.726050 USB2 port 7: enabled 1
683 17:44:23.728562 USB2 port 8: enabled 1
684 17:44:23.730855 USB2 port 9: enabled 1
685 17:44:23.733190 USB3 port 0: enabled 1
686 17:44:23.735060 USB3 port 1: enabled 1
687 17:44:23.737295 USB3 port 2: enabled 1
688 17:44:23.740064 USB3 port 3: enabled 1
689 17:44:23.742585 USB3 port 4: enabled 1
690 17:44:23.744485 APIC: 02: enabled 1
691 17:44:23.745851 APIC: 07: enabled 1
692 17:44:23.748107 APIC: 01: enabled 1
693 17:44:23.750507 APIC: 03: enabled 1
694 17:44:23.752644 APIC: 06: enabled 1
695 17:44:23.754001 APIC: 05: enabled 1
696 17:44:23.756068 APIC: 04: enabled 1
697 17:44:23.758986 Compare with tree...
698 17:44:23.760800 Root Device: enabled 1
699 17:44:23.763685 CPU_CLUSTER: 0: enabled 1
700 17:44:23.765671 APIC: 00: enabled 1
701 17:44:23.768323 APIC: 02: enabled 1
702 17:44:23.770116 APIC: 07: enabled 1
703 17:44:23.772650 APIC: 01: enabled 1
704 17:44:23.774791 APIC: 03: enabled 1
705 17:44:23.777213 APIC: 06: enabled 1
706 17:44:23.779579 APIC: 05: enabled 1
707 17:44:23.781919 APIC: 04: enabled 1
708 17:44:23.783606 DOMAIN: 0000: enabled 1
709 17:44:23.786560 PCI: 00:00.0: enabled 1
710 17:44:23.789622 PCI: 00:02.0: enabled 1
711 17:44:23.792057 PCI: 00:04.0: enabled 1
712 17:44:23.795106 PCI: 00:12.0: enabled 1
713 17:44:23.797119 PCI: 00:12.5: enabled 0
714 17:44:23.799406 PCI: 00:12.6: enabled 0
715 17:44:23.802712 PCI: 00:13.0: enabled 0
716 17:44:23.805004 PCI: 00:14.0: enabled 1
717 17:44:23.807818 USB0 port 0: enabled 1
718 17:44:23.810856 USB2 port 0: enabled 1
719 17:44:23.813293 USB2 port 1: enabled 1
720 17:44:23.816385 USB2 port 2: enabled 1
721 17:44:23.818911 USB2 port 4: enabled 1
722 17:44:23.821624 USB2 port 5: enabled 1
723 17:44:23.823885 USB2 port 6: enabled 1
724 17:44:23.826841 USB2 port 7: enabled 1
725 17:44:23.829922 USB2 port 8: enabled 1
726 17:44:23.831960 USB2 port 9: enabled 1
727 17:44:23.835354 USB3 port 0: enabled 1
728 17:44:23.837643 USB3 port 1: enabled 1
729 17:44:23.840785 USB3 port 2: enabled 1
730 17:44:23.843257 USB3 port 3: enabled 1
731 17:44:23.845778 USB3 port 4: enabled 1
732 17:44:23.848746 PCI: 00:14.1: enabled 0
733 17:44:23.850639 PCI: 00:14.3: enabled 1
734 17:44:23.853794 PCI: 00:14.5: enabled 0
735 17:44:23.856772 PCI: 00:15.0: enabled 1
736 17:44:23.859178 I2C: 00:10: enabled 1
737 17:44:23.860879 I2C: 00:10: enabled 1
738 17:44:23.863436 I2C: 00:34: enabled 1
739 17:44:23.866798 PCI: 00:15.1: enabled 1
740 17:44:23.869043 I2C: 00:2c: enabled 1
741 17:44:23.871899 PCI: 00:15.2: enabled 0
742 17:44:23.874350 PCI: 00:15.3: enabled 0
743 17:44:23.876599 PCI: 00:16.0: enabled 1
744 17:44:23.879744 PCI: 00:16.1: enabled 0
745 17:44:23.881992 PCI: 00:16.2: enabled 0
746 17:44:23.884834 PCI: 00:16.3: enabled 0
747 17:44:23.886948 PCI: 00:16.4: enabled 0
748 17:44:23.889695 PCI: 00:16.5: enabled 0
749 17:44:23.892249 PCI: 00:17.0: enabled 1
750 17:44:23.895565 PCI: 00:19.0: enabled 1
751 17:44:23.897994 I2C: 00:50: enabled 1
752 17:44:23.901001 PCI: 00:19.1: enabled 0
753 17:44:23.903306 PCI: 00:19.2: enabled 1
754 17:44:23.905554 PCI: 00:1a.0: enabled 0
755 17:44:23.908269 PCI: 00:1c.0: enabled 1
756 17:44:23.911038 PCI: 00:1c.1: enabled 0
757 17:44:23.913779 PCI: 00:1c.2: enabled 0
758 17:44:23.915953 PCI: 00:1c.3: enabled 0
759 17:44:23.918357 PCI: 00:1c.4: enabled 0
760 17:44:23.921092 PCI: 00:1c.5: enabled 0
761 17:44:23.924104 PCI: 00:1c.6: enabled 0
762 17:44:23.927102 PCI: 00:1c.7: enabled 1
763 17:44:23.929533 PCI: 00:1d.0: enabled 1
764 17:44:23.931916 PCI: 00:1d.1: enabled 1
765 17:44:23.935019 PCI: 00:1d.2: enabled 0
766 17:44:23.937464 PCI: 00:1d.3: enabled 0
767 17:44:23.939792 PCI: 00:1d.4: enabled 1
768 17:44:23.942726 PCI: 00:1e.0: enabled 0
769 17:44:23.944771 PCI: 00:1e.1: enabled 0
770 17:44:23.947795 PCI: 00:1e.2: enabled 0
771 17:44:23.950813 PCI: 00:1e.3: enabled 0
772 17:44:23.953221 PCI: 00:1f.0: enabled 1
773 17:44:23.955727 PNP: 0c09.0: enabled 1
774 17:44:23.958204 PCI: 00:1f.1: enabled 1
775 17:44:23.960813 PCI: 00:1f.2: enabled 1
776 17:44:23.963816 PCI: 00:1f.3: enabled 1
777 17:44:23.966212 PCI: 00:1f.4: enabled 1
778 17:44:23.968769 PCI: 00:1f.5: enabled 1
779 17:44:23.970938 PCI: 00:1f.6: enabled 1
780 17:44:23.973812 Root Device scanning...
781 17:44:23.977372 root_dev_scan_bus for Root Device
782 17:44:23.979914 CPU_CLUSTER: 0 enabled
783 17:44:23.981949 DOMAIN: 0000 enabled
784 17:44:23.984364 DOMAIN: 0000 scanning...
785 17:44:23.987554 PCI: pci_scan_bus for bus 00
786 17:44:23.990215 PCI: 00:00.0 [8086/0000] ops
787 17:44:23.994022 PCI: 00:00.0 [8086/3e34] enabled
788 17:44:23.996547 PCI: 00:02.0 [8086/0000] ops
789 17:44:24.000184 PCI: 00:02.0 [8086/3ea0] enabled
790 17:44:24.003128 PCI: 00:04.0 [8086/1903] enabled
791 17:44:24.006992 PCI: 00:08.0 [8086/1911] enabled
792 17:44:24.010222 PCI: 00:12.0 [8086/9df9] enabled
793 17:44:24.013133 PCI: 00:14.0 [8086/0000] bus ops
794 17:44:24.016813 PCI: 00:14.0 [8086/9ded] enabled
795 17:44:24.019727 PCI: 00:14.2 [8086/9def] enabled
796 17:44:24.023964 PCI: 00:14.3 [8086/9df0] enabled
797 17:44:24.026827 PCI: 00:15.0 [8086/0000] bus ops
798 17:44:24.030172 PCI: 00:15.0 [8086/9de8] enabled
799 17:44:24.033602 PCI: 00:15.1 [8086/0000] bus ops
800 17:44:24.037207 PCI: 00:15.1 [8086/9de9] enabled
801 17:44:24.039647 PCI: 00:16.0 [8086/0000] ops
802 17:44:24.042827 PCI: 00:16.0 [8086/9de0] enabled
803 17:44:24.046170 PCI: 00:17.0 [8086/0000] ops
804 17:44:24.049204 PCI: 00:17.0 [8086/9dd3] enabled
805 17:44:24.052837 PCI: 00:19.0 [8086/0000] bus ops
806 17:44:24.055956 PCI: 00:19.0 [8086/9dc5] enabled
807 17:44:24.059133 PCI: 00:19.2 [8086/0000] ops
808 17:44:24.062137 PCI: 00:19.2 [8086/9dc7] enabled
809 17:44:24.065427 PCI: 00:1c.0 [8086/0000] bus ops
810 17:44:24.068991 PCI: 00:1c.0 [8086/9dbf] enabled
811 17:44:24.074326 PCI: Static device PCI: 00:1c.7 not found, disabling it.
812 17:44:24.077751 PCI: 00:1d.0 [8086/0000] bus ops
813 17:44:24.081201 PCI: 00:1d.0 [8086/9db4] enabled
814 17:44:24.086827 PCI: Static device PCI: 00:1d.1 not found, disabling it.
815 17:44:24.092310 PCI: Static device PCI: 00:1d.4 not found, disabling it.
816 17:44:24.095992 PCI: 00:1f.0 [8086/0000] bus ops
817 17:44:24.098743 PCI: 00:1f.0 [8086/9d84] enabled
818 17:44:24.104469 PCI: Static device PCI: 00:1f.1 not found, disabling it.
819 17:44:24.110246 PCI: Static device PCI: 00:1f.2 not found, disabling it.
820 17:44:24.113889 PCI: 00:1f.3 [8086/0000] bus ops
821 17:44:24.116680 PCI: 00:1f.3 [8086/9dc8] enabled
822 17:44:24.119857 PCI: 00:1f.4 [8086/0000] bus ops
823 17:44:24.123109 PCI: 00:1f.4 [8086/9da3] enabled
824 17:44:24.127100 PCI: 00:1f.5 [8086/0000] bus ops
825 17:44:24.130550 PCI: 00:1f.5 [8086/9da4] enabled
826 17:44:24.133033 PCI: 00:1f.6 [8086/15be] enabled
827 17:44:24.137298 PCI: Leftover static devices:
828 17:44:24.137854 PCI: 00:12.5
829 17:44:24.139468 PCI: 00:12.6
830 17:44:24.140620 PCI: 00:13.0
831 17:44:24.142021 PCI: 00:14.1
832 17:44:24.143731 PCI: 00:14.5
833 17:44:24.144932 PCI: 00:15.2
834 17:44:24.145891 PCI: 00:15.3
835 17:44:24.146985 PCI: 00:16.1
836 17:44:24.149176 PCI: 00:16.2
837 17:44:24.149995 PCI: 00:16.3
838 17:44:24.151640 PCI: 00:16.4
839 17:44:24.152848 PCI: 00:16.5
840 17:44:24.154257 PCI: 00:19.1
841 17:44:24.155931 PCI: 00:1a.0
842 17:44:24.156700 PCI: 00:1c.1
843 17:44:24.158464 PCI: 00:1c.2
844 17:44:24.159760 PCI: 00:1c.3
845 17:44:24.161557 PCI: 00:1c.4
846 17:44:24.162592 PCI: 00:1c.5
847 17:44:24.163612 PCI: 00:1c.6
848 17:44:24.164800 PCI: 00:1c.7
849 17:44:24.166601 PCI: 00:1d.1
850 17:44:24.168331 PCI: 00:1d.2
851 17:44:24.169623 PCI: 00:1d.3
852 17:44:24.170934 PCI: 00:1d.4
853 17:44:24.172101 PCI: 00:1e.0
854 17:44:24.173946 PCI: 00:1e.1
855 17:44:24.174549 PCI: 00:1e.2
856 17:44:24.175937 PCI: 00:1e.3
857 17:44:24.177036 PCI: 00:1f.1
858 17:44:24.178240 PCI: 00:1f.2
859 17:44:24.182089 PCI: Check your devicetree.cb.
860 17:44:24.185075 PCI: 00:14.0 scanning...
861 17:44:24.188058 scan_usb_bus for PCI: 00:14.0
862 17:44:24.189449 USB0 port 0 enabled
863 17:44:24.192296 USB0 port 0 scanning...
864 17:44:24.195278 scan_usb_bus for USB0 port 0
865 17:44:24.197842 USB2 port 0 enabled
866 17:44:24.199620 USB2 port 1 enabled
867 17:44:24.201727 USB2 port 2 enabled
868 17:44:24.203972 USB2 port 4 enabled
869 17:44:24.205491 USB2 port 5 enabled
870 17:44:24.208224 USB2 port 6 enabled
871 17:44:24.209796 USB2 port 7 enabled
872 17:44:24.211870 USB2 port 8 enabled
873 17:44:24.214138 USB2 port 9 enabled
874 17:44:24.215690 USB3 port 0 enabled
875 17:44:24.217768 USB3 port 1 enabled
876 17:44:24.219585 USB3 port 2 enabled
877 17:44:24.221562 USB3 port 3 enabled
878 17:44:24.223668 USB3 port 4 enabled
879 17:44:24.226078 USB2 port 0 scanning...
880 17:44:24.229531 scan_usb_bus for USB2 port 0
881 17:44:24.232803 scan_usb_bus for USB2 port 0 done
882 17:44:24.238041 scan_bus: scanning of bus USB2 port 0 took 9062 usecs
883 17:44:24.240586 USB2 port 1 scanning...
884 17:44:24.243650 scan_usb_bus for USB2 port 1
885 17:44:24.247689 scan_usb_bus for USB2 port 1 done
886 17:44:24.252917 scan_bus: scanning of bus USB2 port 1 took 9062 usecs
887 17:44:24.255462 USB2 port 2 scanning...
888 17:44:24.258190 scan_usb_bus for USB2 port 2
889 17:44:24.262022 scan_usb_bus for USB2 port 2 done
890 17:44:24.267043 scan_bus: scanning of bus USB2 port 2 took 9061 usecs
891 17:44:24.269839 USB2 port 4 scanning...
892 17:44:24.273487 scan_usb_bus for USB2 port 4
893 17:44:24.276466 scan_usb_bus for USB2 port 4 done
894 17:44:24.281746 scan_bus: scanning of bus USB2 port 4 took 9060 usecs
895 17:44:24.284511 USB2 port 5 scanning...
896 17:44:24.287337 scan_usb_bus for USB2 port 5
897 17:44:24.290960 scan_usb_bus for USB2 port 5 done
898 17:44:24.295858 scan_bus: scanning of bus USB2 port 5 took 9060 usecs
899 17:44:24.298997 USB2 port 6 scanning...
900 17:44:24.302122 scan_usb_bus for USB2 port 6
901 17:44:24.305185 scan_usb_bus for USB2 port 6 done
902 17:44:24.310817 scan_bus: scanning of bus USB2 port 6 took 9061 usecs
903 17:44:24.312918 USB2 port 7 scanning...
904 17:44:24.315872 scan_usb_bus for USB2 port 7
905 17:44:24.320130 scan_usb_bus for USB2 port 7 done
906 17:44:24.325523 scan_bus: scanning of bus USB2 port 7 took 9060 usecs
907 17:44:24.326984 USB2 port 8 scanning...
908 17:44:24.330525 scan_usb_bus for USB2 port 8
909 17:44:24.333359 scan_usb_bus for USB2 port 8 done
910 17:44:24.339591 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
911 17:44:24.341273 USB2 port 9 scanning...
912 17:44:24.344551 scan_usb_bus for USB2 port 9
913 17:44:24.348302 scan_usb_bus for USB2 port 9 done
914 17:44:24.353493 scan_bus: scanning of bus USB2 port 9 took 9060 usecs
915 17:44:24.355812 USB3 port 0 scanning...
916 17:44:24.358908 scan_usb_bus for USB3 port 0
917 17:44:24.362557 scan_usb_bus for USB3 port 0 done
918 17:44:24.368028 scan_bus: scanning of bus USB3 port 0 took 9059 usecs
919 17:44:24.370413 USB3 port 1 scanning...
920 17:44:24.373825 scan_usb_bus for USB3 port 1
921 17:44:24.377596 scan_usb_bus for USB3 port 1 done
922 17:44:24.382365 scan_bus: scanning of bus USB3 port 1 took 9060 usecs
923 17:44:24.384871 USB3 port 2 scanning...
924 17:44:24.388091 scan_usb_bus for USB3 port 2
925 17:44:24.391545 scan_usb_bus for USB3 port 2 done
926 17:44:24.397437 scan_bus: scanning of bus USB3 port 2 took 9061 usecs
927 17:44:24.399228 USB3 port 3 scanning...
928 17:44:24.402844 scan_usb_bus for USB3 port 3
929 17:44:24.405987 scan_usb_bus for USB3 port 3 done
930 17:44:24.411401 scan_bus: scanning of bus USB3 port 3 took 9060 usecs
931 17:44:24.413382 USB3 port 4 scanning...
932 17:44:24.417479 scan_usb_bus for USB3 port 4
933 17:44:24.420625 scan_usb_bus for USB3 port 4 done
934 17:44:24.426215 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
935 17:44:24.428652 scan_usb_bus for USB0 port 0 done
936 17:44:24.434426 scan_bus: scanning of bus USB0 port 0 took 239299 usecs
937 17:44:24.437943 scan_usb_bus for PCI: 00:14.0 done
938 17:44:24.443940 scan_bus: scanning of bus PCI: 00:14.0 took 256232 usecs
939 17:44:24.446129 PCI: 00:15.0 scanning...
940 17:44:24.450065 scan_generic_bus for PCI: 00:15.0
941 17:44:24.454193 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
942 17:44:24.458222 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
943 17:44:24.461822 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
944 17:44:24.466309 scan_generic_bus for PCI: 00:15.0 done
945 17:44:24.471406 scan_bus: scanning of bus PCI: 00:15.0 took 22385 usecs
946 17:44:24.474607 PCI: 00:15.1 scanning...
947 17:44:24.477615 scan_generic_bus for PCI: 00:15.1
948 17:44:24.482084 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
949 17:44:24.486301 scan_generic_bus for PCI: 00:15.1 done
950 17:44:24.491037 scan_bus: scanning of bus PCI: 00:15.1 took 14222 usecs
951 17:44:24.494175 PCI: 00:19.0 scanning...
952 17:44:24.497870 scan_generic_bus for PCI: 00:19.0
953 17:44:24.501433 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
954 17:44:24.506159 scan_generic_bus for PCI: 00:19.0 done
955 17:44:24.511329 scan_bus: scanning of bus PCI: 00:19.0 took 14213 usecs
956 17:44:24.513650 PCI: 00:1c.0 scanning...
957 17:44:24.517968 do_pci_scan_bridge for PCI: 00:1c.0
958 17:44:24.520589 PCI: pci_scan_bus for bus 01
959 17:44:24.524185 PCI: 01:00.0 [10ec/525a] enabled
960 17:44:24.527245 Capability: type 0x01 @ 0x80
961 17:44:24.530240 Capability: type 0x05 @ 0x90
962 17:44:24.532618 Capability: type 0x10 @ 0xb0
963 17:44:24.536384 Capability: type 0x10 @ 0x40
964 17:44:24.539125 Enabling Common Clock Configuration
965 17:44:24.543512 L1 Sub-State supported from root port 28
966 17:44:24.545935 L1 Sub-State Support = 0xf
967 17:44:24.549012 CommonModeRestoreTime = 0x3c
968 17:44:24.553639 Power On Value = 0x6, Power On Scale = 0x1
969 17:44:24.555980 ASPM: Enabled L0s and L1
970 17:44:24.559378 Capability: type 0x01 @ 0x80
971 17:44:24.562286 Capability: type 0x05 @ 0x90
972 17:44:24.564668 Capability: type 0x10 @ 0xb0
973 17:44:24.570850 scan_bus: scanning of bus PCI: 00:1c.0 took 53665 usecs
974 17:44:24.572647 PCI: 00:1d.0 scanning...
975 17:44:24.576779 do_pci_scan_bridge for PCI: 00:1d.0
976 17:44:24.579708 PCI: pci_scan_bus for bus 02
977 17:44:24.583267 PCI: 02:00.0 [1217/8620] enabled
978 17:44:24.586265 Capability: type 0x01 @ 0x6c
979 17:44:24.588834 Capability: type 0x05 @ 0x48
980 17:44:24.592287 Capability: type 0x10 @ 0x80
981 17:44:24.594786 Capability: type 0x10 @ 0x40
982 17:44:24.599346 L1 Sub-State supported from root port 29
983 17:44:24.602116 L1 Sub-State Support = 0xf
984 17:44:24.604939 CommonModeRestoreTime = 0x78
985 17:44:24.609235 Power On Value = 0x16, Power On Scale = 0x0
986 17:44:24.611160 ASPM: Enabled L1
987 17:44:24.615128 Capability: type 0x01 @ 0x6c
988 17:44:24.620205 Capability: type 0x05 @ 0x48
989 17:44:24.625024 Capability: type 0x10 @ 0x80
990 17:44:24.632254 scan_bus: scanning of bus PCI: 00:1d.0 took 56028 usecs
991 17:44:24.634318 PCI: 00:1f.0 scanning...
992 17:44:24.638083 scan_lpc_bus for PCI: 00:1f.0
993 17:44:24.640444 PNP: 0c09.0 enabled
994 17:44:24.643510 scan_lpc_bus for PCI: 00:1f.0 done
995 17:44:24.649429 scan_bus: scanning of bus PCI: 00:1f.0 took 11393 usecs
996 17:44:24.651377 PCI: 00:1f.3 scanning...
997 17:44:24.657344 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
998 17:44:24.659820 PCI: 00:1f.4 scanning...
999 17:44:24.663640 scan_generic_bus for PCI: 00:1f.4
1000 17:44:24.666904 scan_generic_bus for PCI: 00:1f.4 done
1001 17:44:24.672709 scan_bus: scanning of bus PCI: 00:1f.4 took 10127 usecs
1002 17:44:24.675118 PCI: 00:1f.5 scanning...
1003 17:44:24.679577 scan_generic_bus for PCI: 00:1f.5
1004 17:44:24.683119 scan_generic_bus for PCI: 00:1f.5 done
1005 17:44:24.689023 scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs
1006 17:44:24.694600 scan_bus: scanning of bus DOMAIN: 0000 took 706742 usecs
1007 17:44:24.698834 root_dev_scan_bus for Root Device done
1008 17:44:24.703514 scan_bus: scanning of bus Root Device took 726878 usecs
1009 17:44:24.704039 done
1010 17:44:24.710827 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1011 17:44:24.716721 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1012 17:44:24.724211 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1013 17:44:24.731378 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1014 17:44:24.734391 SPI flash protection: WPSW=1 SRP0=1
1015 17:44:24.742383 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1016 17:44:24.747233 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1017 17:44:24.753683 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148514 exit 42577
1018 17:44:24.756842 found VGA at PCI: 00:02.0
1019 17:44:24.759878 Setting up VGA for PCI: 00:02.0
1020 17:44:24.764149 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1021 17:44:24.769547 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1022 17:44:24.771705 Allocating resources...
1023 17:44:24.774295 Reading resources...
1024 17:44:24.778424 Root Device read_resources bus 0 link: 0
1025 17:44:24.782872 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1026 17:44:24.788011 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1027 17:44:24.792413 DOMAIN: 0000 read_resources bus 0 link: 0
1028 17:44:24.798891 PCI: 00:14.0 read_resources bus 0 link: 0
1029 17:44:24.803491 USB0 port 0 read_resources bus 0 link: 0
1030 17:44:24.812155 USB0 port 0 read_resources bus 0 link: 0 done
1031 17:44:24.817432 PCI: 00:14.0 read_resources bus 0 link: 0 done
1032 17:44:24.822833 PCI: 00:15.0 read_resources bus 1 link: 0
1033 17:44:24.829004 PCI: 00:15.0 read_resources bus 1 link: 0 done
1034 17:44:24.833200 PCI: 00:15.1 read_resources bus 2 link: 0
1035 17:44:24.838166 PCI: 00:15.1 read_resources bus 2 link: 0 done
1036 17:44:24.843164 PCI: 00:19.0 read_resources bus 3 link: 0
1037 17:44:24.848776 PCI: 00:19.0 read_resources bus 3 link: 0 done
1038 17:44:24.853718 PCI: 00:1c.0 read_resources bus 1 link: 0
1039 17:44:24.859134 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1040 17:44:24.863601 PCI: 00:1d.0 read_resources bus 2 link: 0
1041 17:44:24.870807 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1042 17:44:24.875167 PCI: 00:1f.0 read_resources bus 0 link: 0
1043 17:44:24.880124 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1044 17:44:24.886991 DOMAIN: 0000 read_resources bus 0 link: 0 done
1045 17:44:24.892432 Root Device read_resources bus 0 link: 0 done
1046 17:44:24.894733 Done reading resources.
1047 17:44:24.899976 Show resources in subtree (Root Device)...After reading.
1048 17:44:24.904268 Root Device child on link 0 CPU_CLUSTER: 0
1049 17:44:24.908846 CPU_CLUSTER: 0 child on link 0 APIC: 00
1050 17:44:24.909499 APIC: 00
1051 17:44:24.910518 APIC: 02
1052 17:44:24.912146 APIC: 07
1053 17:44:24.913476 APIC: 01
1054 17:44:24.914651 APIC: 03
1055 17:44:24.915673 APIC: 06
1056 17:44:24.916967 APIC: 05
1057 17:44:24.918952 APIC: 04
1058 17:44:24.923402 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1059 17:44:24.932412 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1060 17:44:24.942236 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1061 17:44:24.944078 PCI: 00:00.0
1062 17:44:24.953376 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1063 17:44:24.962748 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1064 17:44:24.972097 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1065 17:44:24.980630 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1066 17:44:24.990901 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1067 17:44:24.999852 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1068 17:44:25.009255 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1069 17:44:25.018225 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1070 17:44:25.027066 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1071 17:44:25.037236 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1072 17:44:25.046517 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1073 17:44:25.057004 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1074 17:44:25.065568 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1075 17:44:25.074891 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1076 17:44:25.076522 PCI: 00:02.0
1077 17:44:25.086838 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1078 17:44:25.096812 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1079 17:44:25.105023 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1080 17:44:25.107123 PCI: 00:04.0
1081 17:44:25.117112 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1082 17:44:25.118979 PCI: 00:08.0
1083 17:44:25.128281 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1084 17:44:25.129826 PCI: 00:12.0
1085 17:44:25.140372 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1086 17:44:25.144599 PCI: 00:14.0 child on link 0 USB0 port 0
1087 17:44:25.154844 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1088 17:44:25.159200 USB0 port 0 child on link 0 USB2 port 0
1089 17:44:25.160419 USB2 port 0
1090 17:44:25.161831 USB2 port 1
1091 17:44:25.164051 USB2 port 2
1092 17:44:25.165624 USB2 port 4
1093 17:44:25.167812 USB2 port 5
1094 17:44:25.169235 USB2 port 6
1095 17:44:25.171516 USB2 port 7
1096 17:44:25.173366 USB2 port 8
1097 17:44:25.174534 USB2 port 9
1098 17:44:25.176354 USB3 port 0
1099 17:44:25.178297 USB3 port 1
1100 17:44:25.179975 USB3 port 2
1101 17:44:25.181827 USB3 port 3
1102 17:44:25.183606 USB3 port 4
1103 17:44:25.185429 PCI: 00:14.2
1104 17:44:25.194833 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1105 17:44:25.204384 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1106 17:44:25.206654 PCI: 00:14.3
1107 17:44:25.216779 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1108 17:44:25.221111 PCI: 00:15.0 child on link 0 I2C: 01:10
1109 17:44:25.230565 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1110 17:44:25.231850 I2C: 01:10
1111 17:44:25.233830 I2C: 01:10
1112 17:44:25.235331 I2C: 01:34
1113 17:44:25.239844 PCI: 00:15.1 child on link 0 I2C: 02:2c
1114 17:44:25.249069 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1115 17:44:25.251197 I2C: 02:2c
1116 17:44:25.252874 PCI: 00:16.0
1117 17:44:25.262348 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1118 17:44:25.264002 PCI: 00:17.0
1119 17:44:25.273308 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1120 17:44:25.282483 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1121 17:44:25.290094 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1122 17:44:25.299263 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1123 17:44:25.307808 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1124 17:44:25.315861 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1125 17:44:25.320340 PCI: 00:19.0 child on link 0 I2C: 03:50
1126 17:44:25.330157 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1127 17:44:25.340720 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1128 17:44:25.341797 I2C: 03:50
1129 17:44:25.343438 PCI: 00:19.2
1130 17:44:25.354828 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1131 17:44:25.364252 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1132 17:44:25.368507 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1133 17:44:25.377087 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1134 17:44:25.387612 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1135 17:44:25.396732 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1136 17:44:25.398118 PCI: 01:00.0
1137 17:44:25.407248 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1138 17:44:25.412042 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1139 17:44:25.420848 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1140 17:44:25.429991 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1141 17:44:25.439779 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1142 17:44:25.441040 PCI: 02:00.0
1143 17:44:25.450109 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1144 17:44:25.459062 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1145 17:44:25.464110 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1146 17:44:25.472774 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1147 17:44:25.481349 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1148 17:44:25.482858 PNP: 0c09.0
1149 17:44:25.491845 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1150 17:44:25.500162 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1151 17:44:25.508969 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1152 17:44:25.510661 PCI: 00:1f.3
1153 17:44:25.520146 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1154 17:44:25.530298 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1155 17:44:25.531828 PCI: 00:1f.4
1156 17:44:25.541433 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1157 17:44:25.550872 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1158 17:44:25.552756 PCI: 00:1f.5
1159 17:44:25.561441 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1160 17:44:25.563413 PCI: 00:1f.6
1161 17:44:25.572584 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1162 17:44:25.579553 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1163 17:44:25.585151 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1164 17:44:25.592597 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1165 17:44:25.598505 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1166 17:44:25.605321 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1167 17:44:25.609009 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1168 17:44:25.612296 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1169 17:44:25.616416 PCI: 00:17.0 18 * [0x60 - 0x67] io
1170 17:44:25.620091 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1171 17:44:25.626518 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1172 17:44:25.632938 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1173 17:44:25.641074 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1174 17:44:25.649547 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1175 17:44:25.656833 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1176 17:44:25.659809 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1177 17:44:25.667749 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1178 17:44:25.676397 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1179 17:44:25.684292 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1180 17:44:25.691173 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1181 17:44:25.695136 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1182 17:44:25.698970 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1183 17:44:25.707101 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1184 17:44:25.711541 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1185 17:44:25.716382 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1186 17:44:25.721567 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1187 17:44:25.726388 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1188 17:44:25.731307 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1189 17:44:25.735843 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1190 17:44:25.741051 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1191 17:44:25.745879 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1192 17:44:25.750731 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1193 17:44:25.755564 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1194 17:44:25.760441 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1195 17:44:25.765406 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1196 17:44:25.770403 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1197 17:44:25.774915 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1198 17:44:25.779561 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1199 17:44:25.785005 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1200 17:44:25.790261 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1201 17:44:25.793763 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1202 17:44:25.798766 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1203 17:44:25.803868 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1204 17:44:25.808559 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1205 17:44:25.814080 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1206 17:44:25.818911 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1207 17:44:25.822987 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1208 17:44:25.828018 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1209 17:44:25.837216 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1210 17:44:25.840570 avoid_fixed_resources: DOMAIN: 0000
1211 17:44:25.846345 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1212 17:44:25.852410 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1213 17:44:25.859800 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1214 17:44:25.867749 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1215 17:44:25.874970 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1216 17:44:25.882751 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1217 17:44:25.890667 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1218 17:44:25.898211 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1219 17:44:25.905602 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1220 17:44:25.913205 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1221 17:44:25.920116 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1222 17:44:25.928316 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1223 17:44:25.929733 Setting resources...
1224 17:44:25.935889 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1225 17:44:25.940070 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1226 17:44:25.944286 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1227 17:44:25.948325 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1228 17:44:25.951857 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1229 17:44:25.958561 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1230 17:44:25.964904 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1231 17:44:25.971086 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1232 17:44:25.977344 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1233 17:44:25.983596 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1234 17:44:25.991590 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1235 17:44:25.996381 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1236 17:44:26.001022 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1237 17:44:26.006499 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1238 17:44:26.011459 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1239 17:44:26.016081 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1240 17:44:26.021128 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1241 17:44:26.025453 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1242 17:44:26.030001 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1243 17:44:26.035294 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1244 17:44:26.039931 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1245 17:44:26.045007 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1246 17:44:26.049549 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1247 17:44:26.054570 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1248 17:44:26.059552 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1249 17:44:26.064397 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1250 17:44:26.069378 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1251 17:44:26.074227 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1252 17:44:26.079083 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1253 17:44:26.084002 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1254 17:44:26.089025 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1255 17:44:26.094017 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1256 17:44:26.098921 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1257 17:44:26.103772 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1258 17:44:26.108476 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1259 17:44:26.113049 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1260 17:44:26.120631 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1261 17:44:26.128091 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1262 17:44:26.135274 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1263 17:44:26.142815 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1264 17:44:26.148406 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1265 17:44:26.154528 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1266 17:44:26.162040 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1267 17:44:26.169692 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1268 17:44:26.177069 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1269 17:44:26.182111 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1270 17:44:26.187039 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1271 17:44:26.194402 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1272 17:44:26.198743 Root Device assign_resources, bus 0 link: 0
1273 17:44:26.202999 DOMAIN: 0000 assign_resources, bus 0 link: 0
1274 17:44:26.212222 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1275 17:44:26.220785 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1276 17:44:26.227798 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1277 17:44:26.235715 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1278 17:44:26.244433 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1279 17:44:26.253175 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1280 17:44:26.260982 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1281 17:44:26.265220 PCI: 00:14.0 assign_resources, bus 0 link: 0
1282 17:44:26.269926 PCI: 00:14.0 assign_resources, bus 0 link: 0
1283 17:44:26.278532 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1284 17:44:26.286209 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1285 17:44:26.294398 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1286 17:44:26.302930 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1287 17:44:26.307983 PCI: 00:15.0 assign_resources, bus 1 link: 0
1288 17:44:26.312265 PCI: 00:15.0 assign_resources, bus 1 link: 0
1289 17:44:26.320774 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1290 17:44:26.325506 PCI: 00:15.1 assign_resources, bus 2 link: 0
1291 17:44:26.330514 PCI: 00:15.1 assign_resources, bus 2 link: 0
1292 17:44:26.338354 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1293 17:44:26.346394 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1294 17:44:26.353969 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1295 17:44:26.361978 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1296 17:44:26.369514 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1297 17:44:26.376809 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1298 17:44:26.385023 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1299 17:44:26.392638 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1300 17:44:26.401101 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1301 17:44:26.405970 PCI: 00:19.0 assign_resources, bus 3 link: 0
1302 17:44:26.410038 PCI: 00:19.0 assign_resources, bus 3 link: 0
1303 17:44:26.419085 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1304 17:44:26.427514 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1305 17:44:26.436222 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1306 17:44:26.444610 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1307 17:44:26.448821 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1308 17:44:26.457226 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1309 17:44:26.461849 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1310 17:44:26.470676 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1311 17:44:26.479135 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1312 17:44:26.488259 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1313 17:44:26.492365 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1314 17:44:26.501840 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1315 17:44:26.511268 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1316 17:44:26.518059 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1317 17:44:26.522920 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1318 17:44:26.528371 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1319 17:44:26.532561 LPC: Trying to open IO window from 930 size 8
1320 17:44:26.537003 LPC: Trying to open IO window from 940 size 8
1321 17:44:26.541896 LPC: Trying to open IO window from 950 size 10
1322 17:44:26.550088 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1323 17:44:26.558355 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1324 17:44:26.565926 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1325 17:44:26.574501 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1326 17:44:26.582854 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1327 17:44:26.586904 DOMAIN: 0000 assign_resources, bus 0 link: 0
1328 17:44:26.591778 Root Device assign_resources, bus 0 link: 0
1329 17:44:26.594694 Done setting resources.
1330 17:44:26.600714 Show resources in subtree (Root Device)...After assigning values.
1331 17:44:26.605836 Root Device child on link 0 CPU_CLUSTER: 0
1332 17:44:26.609676 CPU_CLUSTER: 0 child on link 0 APIC: 00
1333 17:44:26.610819 APIC: 00
1334 17:44:26.611587 APIC: 02
1335 17:44:26.612886 APIC: 07
1336 17:44:26.614291 APIC: 01
1337 17:44:26.615686 APIC: 03
1338 17:44:26.617267 APIC: 06
1339 17:44:26.618350 APIC: 05
1340 17:44:26.619980 APIC: 04
1341 17:44:26.624001 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1342 17:44:26.633291 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1343 17:44:26.644627 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1344 17:44:26.645930 PCI: 00:00.0
1345 17:44:26.656204 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1346 17:44:26.665948 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1347 17:44:26.674594 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1348 17:44:26.684110 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1349 17:44:26.693532 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1350 17:44:26.703012 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1351 17:44:26.711792 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1352 17:44:26.721366 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1353 17:44:26.729855 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1354 17:44:26.739265 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1355 17:44:26.749467 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1356 17:44:26.759446 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1357 17:44:26.768796 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1358 17:44:26.778180 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1359 17:44:26.779468 PCI: 00:02.0
1360 17:44:26.790213 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1361 17:44:26.800230 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1362 17:44:26.809870 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1363 17:44:26.811714 PCI: 00:04.0
1364 17:44:26.821664 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1365 17:44:26.823513 PCI: 00:08.0
1366 17:44:26.833637 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1367 17:44:26.834723 PCI: 00:12.0
1368 17:44:26.844976 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1369 17:44:26.849441 PCI: 00:14.0 child on link 0 USB0 port 0
1370 17:44:26.860406 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1371 17:44:26.864691 USB0 port 0 child on link 0 USB2 port 0
1372 17:44:26.865894 USB2 port 0
1373 17:44:26.868422 USB2 port 1
1374 17:44:26.870040 USB2 port 2
1375 17:44:26.871768 USB2 port 4
1376 17:44:26.873627 USB2 port 5
1377 17:44:26.875376 USB2 port 6
1378 17:44:26.877325 USB2 port 7
1379 17:44:26.879171 USB2 port 8
1380 17:44:26.880178 USB2 port 9
1381 17:44:26.882273 USB3 port 0
1382 17:44:26.883586 USB3 port 1
1383 17:44:26.885503 USB3 port 2
1384 17:44:26.887974 USB3 port 3
1385 17:44:26.888962 USB3 port 4
1386 17:44:26.890636 PCI: 00:14.2
1387 17:44:26.901338 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1388 17:44:26.911226 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1389 17:44:26.913321 PCI: 00:14.3
1390 17:44:26.923159 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1391 17:44:26.928182 PCI: 00:15.0 child on link 0 I2C: 01:10
1392 17:44:26.937448 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1393 17:44:26.939816 I2C: 01:10
1394 17:44:26.941249 I2C: 01:10
1395 17:44:26.942458 I2C: 01:34
1396 17:44:26.947167 PCI: 00:15.1 child on link 0 I2C: 02:2c
1397 17:44:26.957019 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1398 17:44:26.958752 I2C: 02:2c
1399 17:44:26.960192 PCI: 00:16.0
1400 17:44:26.970971 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1401 17:44:26.972792 PCI: 00:17.0
1402 17:44:26.982904 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1403 17:44:26.992834 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1404 17:44:27.002097 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1405 17:44:27.011376 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1406 17:44:27.020059 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1407 17:44:27.030726 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1408 17:44:27.035026 PCI: 00:19.0 child on link 0 I2C: 03:50
1409 17:44:27.044894 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1410 17:44:27.054678 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1411 17:44:27.056299 I2C: 03:50
1412 17:44:27.057953 PCI: 00:19.2
1413 17:44:27.069267 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1414 17:44:27.079312 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1415 17:44:27.083777 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1416 17:44:27.093775 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1417 17:44:27.103749 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1418 17:44:27.113773 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1419 17:44:27.115970 PCI: 01:00.0
1420 17:44:27.125849 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1421 17:44:27.130474 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1422 17:44:27.140089 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1423 17:44:27.149829 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1424 17:44:27.160735 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1425 17:44:27.161517 PCI: 02:00.0
1426 17:44:27.172353 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1427 17:44:27.182285 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1428 17:44:27.186890 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1429 17:44:27.195647 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1430 17:44:27.204121 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1431 17:44:27.205689 PNP: 0c09.0
1432 17:44:27.215252 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1433 17:44:27.223775 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1434 17:44:27.232138 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1435 17:44:27.233518 PCI: 00:1f.3
1436 17:44:27.244096 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1437 17:44:27.254032 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1438 17:44:27.256644 PCI: 00:1f.4
1439 17:44:27.265496 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1440 17:44:27.275513 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1441 17:44:27.277302 PCI: 00:1f.5
1442 17:44:27.287831 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1443 17:44:27.289060 PCI: 00:1f.6
1444 17:44:27.299651 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1445 17:44:27.301858 Done allocating resources.
1446 17:44:27.307756 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548486 exit 14
1447 17:44:27.310399 Enabling resources...
1448 17:44:27.315534 PCI: 00:00.0 subsystem <- 1028/3e34
1449 17:44:27.317278 PCI: 00:00.0 cmd <- 06
1450 17:44:27.321325 PCI: 00:02.0 subsystem <- 1028/3ea0
1451 17:44:27.323994 PCI: 00:02.0 cmd <- 03
1452 17:44:27.328314 PCI: 00:04.0 subsystem <- 1028/1903
1453 17:44:27.330656 PCI: 00:04.0 cmd <- 02
1454 17:44:27.332464 PCI: 00:08.0 cmd <- 06
1455 17:44:27.336915 PCI: 00:12.0 subsystem <- 1028/9df9
1456 17:44:27.338777 PCI: 00:12.0 cmd <- 02
1457 17:44:27.342436 PCI: 00:14.0 subsystem <- 1028/9ded
1458 17:44:27.344821 PCI: 00:14.0 cmd <- 02
1459 17:44:27.348274 PCI: 00:14.2 cmd <- 02
1460 17:44:27.351752 PCI: 00:14.3 subsystem <- 1028/9df0
1461 17:44:27.354574 PCI: 00:14.3 cmd <- 02
1462 17:44:27.358295 PCI: 00:15.0 subsystem <- 1028/9de8
1463 17:44:27.360870 PCI: 00:15.0 cmd <- 02
1464 17:44:27.364528 PCI: 00:15.1 subsystem <- 1028/9de9
1465 17:44:27.366885 PCI: 00:15.1 cmd <- 02
1466 17:44:27.370560 PCI: 00:16.0 subsystem <- 1028/9de0
1467 17:44:27.373008 PCI: 00:16.0 cmd <- 02
1468 17:44:27.376442 PCI: 00:17.0 subsystem <- 1028/9dd3
1469 17:44:27.379319 PCI: 00:17.0 cmd <- 03
1470 17:44:27.383693 PCI: 00:19.0 subsystem <- 1028/9dc5
1471 17:44:27.385485 PCI: 00:19.0 cmd <- 06
1472 17:44:27.389860 PCI: 00:19.2 subsystem <- 1028/9dc7
1473 17:44:27.392261 PCI: 00:19.2 cmd <- 06
1474 17:44:27.395914 PCI: 00:1c.0 bridge ctrl <- 0003
1475 17:44:27.398986 PCI: 00:1c.0 subsystem <- 1028/9dbf
1476 17:44:27.401547 Capability: type 0x10 @ 0x40
1477 17:44:27.405092 Capability: type 0x05 @ 0x80
1478 17:44:27.407608 Capability: type 0x0d @ 0x90
1479 17:44:27.410066 PCI: 00:1c.0 cmd <- 06
1480 17:44:27.414017 PCI: 00:1d.0 bridge ctrl <- 0003
1481 17:44:27.416923 PCI: 00:1d.0 subsystem <- 1028/9db4
1482 17:44:27.420107 Capability: type 0x10 @ 0x40
1483 17:44:27.422810 Capability: type 0x05 @ 0x80
1484 17:44:27.426262 Capability: type 0x0d @ 0x90
1485 17:44:27.428554 PCI: 00:1d.0 cmd <- 06
1486 17:44:27.431897 PCI: 00:1f.0 subsystem <- 1028/9d84
1487 17:44:27.434091 PCI: 00:1f.0 cmd <- 407
1488 17:44:27.438629 PCI: 00:1f.3 subsystem <- 1028/9dc8
1489 17:44:27.440510 PCI: 00:1f.3 cmd <- 02
1490 17:44:27.444900 PCI: 00:1f.4 subsystem <- 1028/9da3
1491 17:44:27.447130 PCI: 00:1f.4 cmd <- 03
1492 17:44:27.451216 PCI: 00:1f.5 subsystem <- 1028/9da4
1493 17:44:27.453200 PCI: 00:1f.5 cmd <- 406
1494 17:44:27.457383 PCI: 00:1f.6 subsystem <- 1028/15be
1495 17:44:27.459777 PCI: 00:1f.6 cmd <- 02
1496 17:44:27.470632 PCI: 01:00.0 cmd <- 02
1497 17:44:27.475408 PCI: 02:00.0 cmd <- 06
1498 17:44:27.478757 done.
1499 17:44:27.484229 BS: BS_DEV_ENABLE times (us): entry 398 run 170421 exit 0
1500 17:44:27.487506 Initializing devices...
1501 17:44:27.489823 Root Device init ...
1502 17:44:27.493580 Root Device init finished in 2137 usecs
1503 17:44:27.496284 CPU_CLUSTER: 0 init ...
1504 17:44:27.499958 CPU_CLUSTER: 0 init finished in 2430 usecs
1505 17:44:27.506464 PCI: 00:00.0 init ...
1506 17:44:27.509320 CPU TDP: 15 Watts
1507 17:44:27.511962 CPU PL2 = 51 Watts
1508 17:44:27.516017 PCI: 00:00.0 init finished in 7034 usecs
1509 17:44:27.517874 PCI: 00:02.0 init ...
1510 17:44:27.521784 PCI: 00:02.0 init finished in 2227 usecs
1511 17:44:27.525233 PCI: 00:04.0 init ...
1512 17:44:27.529085 PCI: 00:04.0 init finished in 2235 usecs
1513 17:44:27.532053 PCI: 00:08.0 init ...
1514 17:44:27.535913 PCI: 00:08.0 init finished in 2236 usecs
1515 17:44:27.538643 PCI: 00:12.0 init ...
1516 17:44:27.542436 PCI: 00:12.0 init finished in 2236 usecs
1517 17:44:27.544841 PCI: 00:14.0 init ...
1518 17:44:27.549383 PCI: 00:14.0 init finished in 2235 usecs
1519 17:44:27.552254 PCI: 00:14.2 init ...
1520 17:44:27.556177 PCI: 00:14.2 init finished in 2235 usecs
1521 17:44:27.558926 PCI: 00:14.3 init ...
1522 17:44:27.562652 PCI: 00:14.3 init finished in 2240 usecs
1523 17:44:27.565615 PCI: 00:15.0 init ...
1524 17:44:27.568650 DW I2C bus 0 at 0xd1347000 (400 KHz)
1525 17:44:27.573170 PCI: 00:15.0 init finished in 5932 usecs
1526 17:44:27.575192 PCI: 00:15.1 init ...
1527 17:44:27.579820 DW I2C bus 1 at 0xd1348000 (400 KHz)
1528 17:44:27.583503 PCI: 00:15.1 init finished in 5923 usecs
1529 17:44:27.586537 PCI: 00:16.0 init ...
1530 17:44:27.589787 PCI: 00:16.0 init finished in 2235 usecs
1531 17:44:27.593418 PCI: 00:19.0 init ...
1532 17:44:27.596955 DW I2C bus 4 at 0xd134a000 (400 KHz)
1533 17:44:27.601267 PCI: 00:19.0 init finished in 5933 usecs
1534 17:44:27.604437 PCI: 00:1c.0 init ...
1535 17:44:27.607441 Initializing PCH PCIe bridge.
1536 17:44:27.611148 PCI: 00:1c.0 init finished in 5237 usecs
1537 17:44:27.614260 PCI: 00:1d.0 init ...
1538 17:44:27.617376 Initializing PCH PCIe bridge.
1539 17:44:27.620950 PCI: 00:1d.0 init finished in 5247 usecs
1540 17:44:27.623743 PCI: 00:1f.0 init ...
1541 17:44:27.628233 IOAPIC: Initializing IOAPIC at 0xfec00000
1542 17:44:27.632313 IOAPIC: Bootstrap Processor Local APIC = 0x00
1543 17:44:27.633999 IOAPIC: ID = 0x02
1544 17:44:27.637136 IOAPIC: Dumping registers
1545 17:44:27.639592 reg 0x0000: 0x02000000
1546 17:44:27.641575 reg 0x0001: 0x00770020
1547 17:44:27.644576 reg 0x0002: 0x00000000
1548 17:44:27.650540 PCI: 00:1f.0 init finished in 25025 usecs
1549 17:44:27.653113 PCI: 00:1f.3 init ...
1550 17:44:27.657996 HDA: codec_mask = 05
1551 17:44:27.661011 HDA: Initializing codec #2
1552 17:44:27.663594 HDA: codec viddid: 8086280b
1553 17:44:27.666709 HDA: No verb table entry found
1554 17:44:27.669757 HDA: Initializing codec #0
1555 17:44:27.672129 HDA: codec viddid: 10ec0236
1556 17:44:27.679639 HDA: verb loaded.
1557 17:44:27.684229 PCI: 00:1f.3 init finished in 28810 usecs
1558 17:44:27.686648 PCI: 00:1f.4 init ...
1559 17:44:27.690487 PCI: 00:1f.4 init finished in 2245 usecs
1560 17:44:27.694008 PCI: 00:1f.6 init ...
1561 17:44:27.697477 PCI: 00:1f.6 init finished in 2227 usecs
1562 17:44:27.708349 PCI: 01:00.0 init ...
1563 17:44:27.712680 PCI: 01:00.0 init finished in 2235 usecs
1564 17:44:27.715179 PCI: 02:00.0 init ...
1565 17:44:27.719097 PCI: 02:00.0 init finished in 2235 usecs
1566 17:44:27.722014 PNP: 0c09.0 init ...
1567 17:44:27.725991 EC Label : 00.00.20
1568 17:44:27.729287 EC Revision : 9ca674bba
1569 17:44:27.733521 EC Model Num : 08B9
1570 17:44:27.736829 EC Build Date : 05/10/19
1571 17:44:27.745338 PNP: 0c09.0 init finished in 21765 usecs
1572 17:44:27.747915 Devices initialized
1573 17:44:27.751508 Show all devs... After init.
1574 17:44:27.753358 Root Device: enabled 1
1575 17:44:27.756309 CPU_CLUSTER: 0: enabled 1
1576 17:44:27.758355 DOMAIN: 0000: enabled 1
1577 17:44:27.760597 APIC: 00: enabled 1
1578 17:44:27.763045 PCI: 00:00.0: enabled 1
1579 17:44:27.765615 PCI: 00:02.0: enabled 1
1580 17:44:27.767693 PCI: 00:04.0: enabled 1
1581 17:44:27.769843 PCI: 00:12.0: enabled 1
1582 17:44:27.772688 PCI: 00:12.5: enabled 0
1583 17:44:27.775153 PCI: 00:12.6: enabled 0
1584 17:44:27.777608 PCI: 00:13.0: enabled 0
1585 17:44:27.779415 PCI: 00:14.0: enabled 1
1586 17:44:27.781693 PCI: 00:14.1: enabled 0
1587 17:44:27.784876 PCI: 00:14.3: enabled 1
1588 17:44:27.786891 PCI: 00:14.5: enabled 0
1589 17:44:27.789228 PCI: 00:15.0: enabled 1
1590 17:44:27.791939 PCI: 00:15.1: enabled 1
1591 17:44:27.794357 PCI: 00:15.2: enabled 0
1592 17:44:27.797146 PCI: 00:15.3: enabled 0
1593 17:44:27.799258 PCI: 00:16.0: enabled 1
1594 17:44:27.801317 PCI: 00:16.1: enabled 0
1595 17:44:27.804323 PCI: 00:16.2: enabled 0
1596 17:44:27.806507 PCI: 00:16.3: enabled 0
1597 17:44:27.808839 PCI: 00:16.4: enabled 0
1598 17:44:27.810932 PCI: 00:16.5: enabled 0
1599 17:44:27.813770 PCI: 00:17.0: enabled 1
1600 17:44:27.816265 PCI: 00:19.0: enabled 1
1601 17:44:27.818645 PCI: 00:19.1: enabled 0
1602 17:44:27.821069 PCI: 00:19.2: enabled 1
1603 17:44:27.823024 PCI: 00:1a.0: enabled 0
1604 17:44:27.825970 PCI: 00:1c.0: enabled 1
1605 17:44:27.827821 PCI: 00:1c.1: enabled 0
1606 17:44:27.830800 PCI: 00:1c.2: enabled 0
1607 17:44:27.833199 PCI: 00:1c.3: enabled 0
1608 17:44:27.835719 PCI: 00:1c.4: enabled 0
1609 17:44:27.837972 PCI: 00:1c.5: enabled 0
1610 17:44:27.840503 PCI: 00:1c.6: enabled 0
1611 17:44:27.842578 PCI: 00:1c.7: enabled 0
1612 17:44:27.845373 PCI: 00:1d.0: enabled 1
1613 17:44:27.847886 PCI: 00:1d.1: enabled 0
1614 17:44:27.850562 PCI: 00:1d.2: enabled 0
1615 17:44:27.852702 PCI: 00:1d.3: enabled 0
1616 17:44:27.855044 PCI: 00:1d.4: enabled 0
1617 17:44:27.857130 PCI: 00:1e.0: enabled 0
1618 17:44:27.859923 PCI: 00:1e.1: enabled 0
1619 17:44:27.862391 PCI: 00:1e.2: enabled 0
1620 17:44:27.864842 PCI: 00:1e.3: enabled 0
1621 17:44:27.866756 PCI: 00:1f.0: enabled 1
1622 17:44:27.870331 PCI: 00:1f.1: enabled 0
1623 17:44:27.871536 PCI: 00:1f.2: enabled 0
1624 17:44:27.874721 PCI: 00:1f.3: enabled 1
1625 17:44:27.877169 PCI: 00:1f.4: enabled 1
1626 17:44:27.879540 PCI: 00:1f.5: enabled 1
1627 17:44:27.881877 PCI: 00:1f.6: enabled 1
1628 17:44:27.883708 USB0 port 0: enabled 1
1629 17:44:27.886048 I2C: 01:10: enabled 1
1630 17:44:27.888948 I2C: 01:10: enabled 1
1631 17:44:27.890979 I2C: 01:34: enabled 1
1632 17:44:27.892681 I2C: 02:2c: enabled 1
1633 17:44:27.894920 I2C: 03:50: enabled 1
1634 17:44:27.897964 PNP: 0c09.0: enabled 1
1635 17:44:27.899790 USB2 port 0: enabled 1
1636 17:44:27.902002 USB2 port 1: enabled 1
1637 17:44:27.904419 USB2 port 2: enabled 1
1638 17:44:27.906634 USB2 port 4: enabled 1
1639 17:44:27.909506 USB2 port 5: enabled 1
1640 17:44:27.911954 USB2 port 6: enabled 1
1641 17:44:27.913866 USB2 port 7: enabled 1
1642 17:44:27.916647 USB2 port 8: enabled 1
1643 17:44:27.918454 USB2 port 9: enabled 1
1644 17:44:27.920526 USB3 port 0: enabled 1
1645 17:44:27.923058 USB3 port 1: enabled 1
1646 17:44:27.925145 USB3 port 2: enabled 1
1647 17:44:27.927841 USB3 port 3: enabled 1
1648 17:44:27.930076 USB3 port 4: enabled 1
1649 17:44:27.932556 APIC: 02: enabled 1
1650 17:44:27.934355 APIC: 07: enabled 1
1651 17:44:27.936012 APIC: 01: enabled 1
1652 17:44:27.938667 APIC: 03: enabled 1
1653 17:44:27.940562 APIC: 06: enabled 1
1654 17:44:27.942273 APIC: 05: enabled 1
1655 17:44:27.944824 APIC: 04: enabled 1
1656 17:44:27.947124 PCI: 00:08.0: enabled 1
1657 17:44:27.949522 PCI: 00:14.2: enabled 1
1658 17:44:27.951423 PCI: 01:00.0: enabled 1
1659 17:44:27.954293 PCI: 02:00.0: enabled 1
1660 17:44:27.959411 Disabling ACPI via APMC:
1661 17:44:27.961544 done.
1662 17:44:27.966420 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1663 17:44:27.969997 ELOG: NV offset 0x1bf0000 size 0x4000
1664 17:44:27.978024 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 17:44:27.984388 ELOG: Event(17) added with size 13 at 2023-10-20 17:44:28 UTC
1666 17:44:27.989566 POST: Unexpected post code in previous boot: 0x72
1667 17:44:27.995680 ELOG: Event(A3) added with size 11 at 2023-10-20 17:44:28 UTC
1668 17:44:28.001721 ELOG: Event(92) added with size 9 at 2023-10-20 17:44:28 UTC
1669 17:44:28.007788 ELOG: Event(93) added with size 9 at 2023-10-20 17:44:28 UTC
1670 17:44:28.014112 ELOG: Event(9A) added with size 9 at 2023-10-20 17:44:28 UTC
1671 17:44:28.020988 ELOG: Event(9E) added with size 10 at 2023-10-20 17:44:28 UTC
1672 17:44:28.026650 ELOG: Event(9F) added with size 14 at 2023-10-20 17:44:28 UTC
1673 17:44:28.032694 BS: BS_DEV_INIT times (us): entry 0 run 469646 exit 72479
1674 17:44:28.039466 ELOG: Event(A1) added with size 10 at 2023-10-20 17:44:28 UTC
1675 17:44:28.047130 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 17:44:28.053212 ELOG: Event(A0) added with size 9 at 2023-10-20 17:44:28 UTC
1677 17:44:28.057883 elog_add_boot_reason: Logged dev mode boot
1678 17:44:28.060142 Finalize devices...
1679 17:44:28.061942 PCI: 00:17.0 final
1680 17:44:28.063863 Devices finalized
1681 17:44:28.068919 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1682 17:44:28.074656 BS: BS_POST_DEVICE times (us): entry 24766 run 5934 exit 5363
1683 17:44:28.081018 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1684 17:44:28.089632 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1685 17:44:28.093862 disable_unused_touchscreen: Disable ACPI0C50
1686 17:44:28.098186 disable_unused_touchscreen: Enable ELAN900C
1687 17:44:28.101165 CBFS @ 1d00000 size 300000
1688 17:44:28.107605 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1689 17:44:28.110429 CBFS: Locating 'fallback/dsdt.aml'
1690 17:44:28.114429 CBFS: Found @ offset 10b200 size 4448
1691 17:44:28.117513 CBFS @ 1d00000 size 300000
1692 17:44:28.124014 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1693 17:44:28.127001 CBFS: Locating 'fallback/slic'
1694 17:44:28.132202 CBFS: 'fallback/slic' not found.
1695 17:44:28.136164 ACPI: Writing ACPI tables at 89c0f000.
1696 17:44:28.137852 ACPI: * FACS
1697 17:44:28.139519 ACPI: * DSDT
1698 17:44:28.143395 Ramoops buffer: 0x100000@0x89b0e000.
1699 17:44:28.147906 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1700 17:44:28.152826 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1701 17:44:28.156342 ACPI: * FADT
1702 17:44:28.157354 SCI is IRQ9
1703 17:44:28.161433 ACPI: added table 1/32, length now 40
1704 17:44:28.163179 ACPI: * SSDT
1705 17:44:28.166946 Found 1 CPU(s) with 8 core(s) each.
1706 17:44:28.171222 Error: Could not locate 'wifi_sar' in VPD.
1707 17:44:28.175162 Error: failed from getting SAR limits!
1708 17:44:28.178528 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1709 17:44:28.182576 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1710 17:44:28.187216 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1711 17:44:28.191168 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1712 17:44:28.196537 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1713 17:44:28.202140 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1714 17:44:28.205939 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1715 17:44:28.210913 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1716 17:44:28.216136 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1717 17:44:28.222346 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1718 17:44:28.227822 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1719 17:44:28.234632 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1720 17:44:28.239080 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1721 17:44:28.243246 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1722 17:44:28.248197 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1723 17:44:28.253673 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1724 17:44:28.258049 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1725 17:44:28.263957 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1726 17:44:28.269737 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1727 17:44:28.275783 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1728 17:44:28.281962 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1729 17:44:28.286486 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1730 17:44:28.290675 ACPI: added table 2/32, length now 44
1731 17:44:28.291553 ACPI: * MCFG
1732 17:44:28.295046 ACPI: added table 3/32, length now 48
1733 17:44:28.297458 ACPI: * TPM2
1734 17:44:28.299916 TPM2 log created at 89afe000
1735 17:44:28.303976 ACPI: added table 4/32, length now 52
1736 17:44:28.305630 ACPI: * MADT
1737 17:44:28.306983 SCI is IRQ9
1738 17:44:28.311093 ACPI: added table 5/32, length now 56
1739 17:44:28.312983 current = 89c14bd0
1740 17:44:28.315397 ACPI: * IGD OpRegion
1741 17:44:28.317676 GMA: Found VBT in CBFS
1742 17:44:28.320580 GMA: Found valid VBT in CBFS
1743 17:44:28.324170 ACPI: added table 6/32, length now 60
1744 17:44:28.325962 ACPI: * HPET
1745 17:44:28.329719 ACPI: added table 7/32, length now 64
1746 17:44:28.331291 ACPI: done.
1747 17:44:28.333596 ACPI tables: 31872 bytes.
1748 17:44:28.336679 smbios_write_tables: 89afd000
1749 17:44:28.338268 recv_ec_data: 0x01
1750 17:44:28.341107 Create SMBIOS type 17
1751 17:44:28.343265 PCI: 00:14.3 (Intel WiFi)
1752 17:44:28.345858 SMBIOS tables: 708 bytes.
1753 17:44:28.350501 Writing table forward entry at 0x00000500
1754 17:44:28.356492 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1755 17:44:28.360604 Writing coreboot table at 0x89c33000
1756 17:44:28.366651 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1757 17:44:28.370522 1. 0000000000001000-000000000009ffff: RAM
1758 17:44:28.375155 2. 00000000000a0000-00000000000fffff: RESERVED
1759 17:44:28.379038 3. 0000000000100000-0000000089afcfff: RAM
1760 17:44:28.385339 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1761 17:44:28.390013 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1762 17:44:28.395695 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1763 17:44:28.401020 7. 000000008a000000-000000008f7fffff: RESERVED
1764 17:44:28.405718 8. 00000000e0000000-00000000efffffff: RESERVED
1765 17:44:28.409971 9. 00000000fc000000-00000000fc000fff: RESERVED
1766 17:44:28.415203 10. 00000000fe000000-00000000fe00ffff: RESERVED
1767 17:44:28.420414 11. 00000000fed10000-00000000fed17fff: RESERVED
1768 17:44:28.424502 12. 00000000fed80000-00000000fed83fff: RESERVED
1769 17:44:28.428874 13. 00000000feda0000-00000000feda1fff: RESERVED
1770 17:44:28.433798 14. 0000000100000000-000000026e7fffff: RAM
1771 17:44:28.438045 Graphics framebuffer located at 0xc0000000
1772 17:44:28.440991 Passing 6 GPIOs to payload:
1773 17:44:28.445937 NAME | PORT | POLARITY | VALUE
1774 17:44:28.450801 write protect | 0x000000dc | high | high
1775 17:44:28.456575 recovery | 0x000000d5 | low | high
1776 17:44:28.461827 lid | undefined | high | high
1777 17:44:28.467118 power | undefined | high | low
1778 17:44:28.472447 oprom | undefined | high | low
1779 17:44:28.477003 EC in RW | undefined | high | low
1780 17:44:28.479665 recv_ec_data: 0x01
1781 17:44:28.480535 SKU ID: 3
1782 17:44:28.483288 CBFS @ 1d00000 size 300000
1783 17:44:28.489907 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1784 17:44:28.495981 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a37d
1785 17:44:28.498833 coreboot table: 1484 bytes.
1786 17:44:28.502154 IMD ROOT 0. 89fff000 00001000
1787 17:44:28.505328 IMD SMALL 1. 89ffe000 00001000
1788 17:44:28.508776 FSP MEMORY 2. 89d0e000 002f0000
1789 17:44:28.512011 CONSOLE 3. 89cee000 00020000
1790 17:44:28.515249 TIME STAMP 4. 89ced000 00000910
1791 17:44:28.518869 VBOOT WORK 5. 89cea000 00003000
1792 17:44:28.521939 VBOOT 6. 89ce9000 00000c0c
1793 17:44:28.525578 MRC DATA 7. 89ce7000 000018f0
1794 17:44:28.528499 ROMSTG STCK 8. 89ce6000 00000400
1795 17:44:28.531740 AFTER CAR 9. 89cdc000 0000a000
1796 17:44:28.535176 RAMSTAGE 10. 89c80000 0005c000
1797 17:44:28.538928 REFCODE 11. 89c4b000 00035000
1798 17:44:28.541980 SMM BACKUP 12. 89c3b000 00010000
1799 17:44:28.545047 COREBOOT 13. 89c33000 00008000
1800 17:44:28.548713 ACPI 14. 89c0f000 00024000
1801 17:44:28.552230 ACPI GNVS 15. 89c0e000 00001000
1802 17:44:28.554957 RAMOOPS 16. 89b0e000 00100000
1803 17:44:28.558264 TPM2 TCGLOG17. 89afe000 00010000
1804 17:44:28.561577 SMBIOS 18. 89afd000 00000800
1805 17:44:28.563498 IMD small region:
1806 17:44:28.566600 IMD ROOT 0. 89ffec00 00000400
1807 17:44:28.570863 FSP RUNTIME 1. 89ffebe0 00000004
1808 17:44:28.573486 POWER STATE 2. 89ffeba0 00000040
1809 17:44:28.577419 ROMSTAGE 3. 89ffeb80 00000004
1810 17:44:28.581057 MEM INFO 4. 89ffe9c0 000001a9
1811 17:44:28.584751 VPD 5. 89ffe960 00000058
1812 17:44:28.588066 COREBOOTFWD 6. 89ffe920 00000028
1813 17:44:28.590935 MTRR: Physical address space:
1814 17:44:28.597684 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1815 17:44:28.604016 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1816 17:44:28.609378 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1817 17:44:28.616343 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1818 17:44:28.622233 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1819 17:44:28.628071 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1820 17:44:28.634797 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1821 17:44:28.639061 MTRR: Fixed MSR 0x250 0x0606060606060606
1822 17:44:28.643418 MTRR: Fixed MSR 0x258 0x0606060606060606
1823 17:44:28.647121 MTRR: Fixed MSR 0x259 0x0000000000000000
1824 17:44:28.651352 MTRR: Fixed MSR 0x268 0x0606060606060606
1825 17:44:28.654906 MTRR: Fixed MSR 0x269 0x0606060606060606
1826 17:44:28.659087 MTRR: Fixed MSR 0x26a 0x0606060606060606
1827 17:44:28.663288 MTRR: Fixed MSR 0x26b 0x0606060606060606
1828 17:44:28.666961 MTRR: Fixed MSR 0x26c 0x0606060606060606
1829 17:44:28.671483 MTRR: Fixed MSR 0x26d 0x0606060606060606
1830 17:44:28.675119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1831 17:44:28.680026 MTRR: Fixed MSR 0x26f 0x0606060606060606
1832 17:44:28.682843 call enable_fixed_mtrr()
1833 17:44:28.686193 CPU physical address size: 39 bits
1834 17:44:28.690943 MTRR: default type WB/UC MTRR counts: 7/7.
1835 17:44:28.694148 MTRR: UC selected as default type.
1836 17:44:28.700828 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1837 17:44:28.707065 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1838 17:44:28.712516 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1839 17:44:28.719126 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1840 17:44:28.725498 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1841 17:44:28.731570 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1842 17:44:28.737548 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1843 17:44:28.739118
1844 17:44:28.739595 MTRR check
1845 17:44:28.742177 Fixed MTRRs : Enabled
1846 17:44:28.745034 Variable MTRRs: Enabled
1847 17:44:28.745119
1848 17:44:28.748920 MTRR: Fixed MSR 0x250 0x0606060606060606
1849 17:44:28.753651 MTRR: Fixed MSR 0x258 0x0606060606060606
1850 17:44:28.757925 MTRR: Fixed MSR 0x259 0x0000000000000000
1851 17:44:28.761187 MTRR: Fixed MSR 0x268 0x0606060606060606
1852 17:44:28.765704 MTRR: Fixed MSR 0x269 0x0606060606060606
1853 17:44:28.769834 MTRR: Fixed MSR 0x26a 0x0606060606060606
1854 17:44:28.773386 MTRR: Fixed MSR 0x26b 0x0606060606060606
1855 17:44:28.777941 MTRR: Fixed MSR 0x26c 0x0606060606060606
1856 17:44:28.781964 MTRR: Fixed MSR 0x26d 0x0606060606060606
1857 17:44:28.785940 MTRR: Fixed MSR 0x26e 0x0606060606060606
1858 17:44:28.789956 MTRR: Fixed MSR 0x26f 0x0606060606060606
1859 17:44:28.797117 BS: BS_WRITE_TABLES times (us): entry 17189 run 490114 exit 157077
1860 17:44:28.799691 call enable_fixed_mtrr()
1861 17:44:28.802100 CBFS @ 1d00000 size 300000
1862 17:44:28.805241 CPU physical address size: 39 bits
1863 17:44:28.812521 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1864 17:44:28.816787 MTRR: Fixed MSR 0x250 0x0606060606060606
1865 17:44:28.820383 MTRR: Fixed MSR 0x250 0x0606060606060606
1866 17:44:28.824490 MTRR: Fixed MSR 0x258 0x0606060606060606
1867 17:44:28.828935 MTRR: Fixed MSR 0x259 0x0000000000000000
1868 17:44:28.832643 MTRR: Fixed MSR 0x268 0x0606060606060606
1869 17:44:28.836949 MTRR: Fixed MSR 0x269 0x0606060606060606
1870 17:44:28.841080 MTRR: Fixed MSR 0x26a 0x0606060606060606
1871 17:44:28.844683 MTRR: Fixed MSR 0x26b 0x0606060606060606
1872 17:44:28.848838 MTRR: Fixed MSR 0x26c 0x0606060606060606
1873 17:44:28.852856 MTRR: Fixed MSR 0x26d 0x0606060606060606
1874 17:44:28.856830 MTRR: Fixed MSR 0x26e 0x0606060606060606
1875 17:44:28.860607 MTRR: Fixed MSR 0x26f 0x0606060606060606
1876 17:44:28.865503 MTRR: Fixed MSR 0x258 0x0606060606060606
1877 17:44:28.869789 MTRR: Fixed MSR 0x259 0x0000000000000000
1878 17:44:28.874091 MTRR: Fixed MSR 0x268 0x0606060606060606
1879 17:44:28.877830 MTRR: Fixed MSR 0x269 0x0606060606060606
1880 17:44:28.881955 MTRR: Fixed MSR 0x26a 0x0606060606060606
1881 17:44:28.885932 MTRR: Fixed MSR 0x26b 0x0606060606060606
1882 17:44:28.890076 MTRR: Fixed MSR 0x26c 0x0606060606060606
1883 17:44:28.894055 MTRR: Fixed MSR 0x26d 0x0606060606060606
1884 17:44:28.898135 MTRR: Fixed MSR 0x26e 0x0606060606060606
1885 17:44:28.902261 MTRR: Fixed MSR 0x26f 0x0606060606060606
1886 17:44:28.904827 call enable_fixed_mtrr()
1887 17:44:28.907861 call enable_fixed_mtrr()
1888 17:44:28.911116 CBFS: Locating 'fallback/payload'
1889 17:44:28.914720 CPU physical address size: 39 bits
1890 17:44:28.917852 CPU physical address size: 39 bits
1891 17:44:28.922585 MTRR: Fixed MSR 0x250 0x0606060606060606
1892 17:44:28.926230 MTRR: Fixed MSR 0x250 0x0606060606060606
1893 17:44:28.930920 MTRR: Fixed MSR 0x258 0x0606060606060606
1894 17:44:28.934818 MTRR: Fixed MSR 0x259 0x0000000000000000
1895 17:44:28.938746 MTRR: Fixed MSR 0x268 0x0606060606060606
1896 17:44:28.943151 MTRR: Fixed MSR 0x269 0x0606060606060606
1897 17:44:28.946870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1898 17:44:28.950752 MTRR: Fixed MSR 0x26b 0x0606060606060606
1899 17:44:28.954858 MTRR: Fixed MSR 0x26c 0x0606060606060606
1900 17:44:28.959110 MTRR: Fixed MSR 0x26d 0x0606060606060606
1901 17:44:28.963678 MTRR: Fixed MSR 0x26e 0x0606060606060606
1902 17:44:28.967290 MTRR: Fixed MSR 0x26f 0x0606060606060606
1903 17:44:28.972026 MTRR: Fixed MSR 0x258 0x0606060606060606
1904 17:44:28.975464 MTRR: Fixed MSR 0x259 0x0000000000000000
1905 17:44:28.980019 MTRR: Fixed MSR 0x268 0x0606060606060606
1906 17:44:28.984069 MTRR: Fixed MSR 0x269 0x0606060606060606
1907 17:44:28.988038 MTRR: Fixed MSR 0x26a 0x0606060606060606
1908 17:44:28.992375 MTRR: Fixed MSR 0x26b 0x0606060606060606
1909 17:44:28.996453 MTRR: Fixed MSR 0x26c 0x0606060606060606
1910 17:44:29.000352 MTRR: Fixed MSR 0x26d 0x0606060606060606
1911 17:44:29.004329 MTRR: Fixed MSR 0x26e 0x0606060606060606
1912 17:44:29.008244 MTRR: Fixed MSR 0x26f 0x0606060606060606
1913 17:44:29.011159 call enable_fixed_mtrr()
1914 17:44:29.013637 call enable_fixed_mtrr()
1915 17:44:29.017353 CBFS: Found @ offset 1cf4c0 size 3a954
1916 17:44:29.021851 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 17:44:29.026391 MTRR: Fixed MSR 0x250 0x0606060606060606
1918 17:44:29.030038 MTRR: Fixed MSR 0x258 0x0606060606060606
1919 17:44:29.034300 MTRR: Fixed MSR 0x259 0x0000000000000000
1920 17:44:29.038153 MTRR: Fixed MSR 0x268 0x0606060606060606
1921 17:44:29.042220 MTRR: Fixed MSR 0x269 0x0606060606060606
1922 17:44:29.046648 MTRR: Fixed MSR 0x26a 0x0606060606060606
1923 17:44:29.050050 MTRR: Fixed MSR 0x26b 0x0606060606060606
1924 17:44:29.054513 MTRR: Fixed MSR 0x26c 0x0606060606060606
1925 17:44:29.057998 MTRR: Fixed MSR 0x26d 0x0606060606060606
1926 17:44:29.062479 MTRR: Fixed MSR 0x26e 0x0606060606060606
1927 17:44:29.066566 MTRR: Fixed MSR 0x26f 0x0606060606060606
1928 17:44:29.070764 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 17:44:29.073603 call enable_fixed_mtrr()
1930 17:44:29.077530 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 17:44:29.082168 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 17:44:29.085172 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 17:44:29.090242 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 17:44:29.093997 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 17:44:29.098203 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 17:44:29.102551 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 17:44:29.106300 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 17:44:29.110382 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 17:44:29.114321 CPU physical address size: 39 bits
1940 17:44:29.116956 call enable_fixed_mtrr()
1941 17:44:29.120316 CPU physical address size: 39 bits
1942 17:44:29.124250 CPU physical address size: 39 bits
1943 17:44:29.127672 CPU physical address size: 39 bits
1944 17:44:29.132380 Checking segment from ROM address 0xffecf4f8
1945 17:44:29.136343 Checking segment from ROM address 0xffecf514
1946 17:44:29.140663 Loading segment from ROM address 0xffecf4f8
1947 17:44:29.143366 code (compression=0)
1948 17:44:29.152212 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1949 17:44:29.160741 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1950 17:44:29.162375 it's not compressed!
1951 17:44:29.244846 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1952 17:44:29.250505 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1953 17:44:29.259043 Loading segment from ROM address 0xffecf514
1954 17:44:29.262033 Entry Point 0x30100018
1955 17:44:29.263228 Loaded segments
1956 17:44:29.273082 Finalizing chipset.
1957 17:44:29.274713 Finalizing SMM.
1958 17:44:29.281457 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466476 exit 11562
1959 17:44:29.284539 mp_park_aps done after 0 msecs.
1960 17:44:29.288787 Jumping to boot code at 30100018(89c33000)
1961 17:44:29.297487 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1962 17:44:29.297591
1963 17:44:29.297690
1964 17:44:29.298078
1965 17:44:29.301132 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
1966 17:44:29.301278 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
1967 17:44:29.301397 Setting prompt string to ['sarien:']
1968 17:44:29.301487 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
1969 17:44:29.301633 Starting depthcharge on sarien...
1970 17:44:29.301732
1971 17:44:29.308593 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1972 17:44:29.308703
1973 17:44:29.316439 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1974 17:44:29.316547
1975 17:44:29.324276 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1976 17:44:29.324402
1977 17:44:29.325980 BIOS MMAP details:
1978 17:44:29.326473
1979 17:44:29.329190 IFD Base Offset : 0x1000000
1980 17:44:29.329275
1981 17:44:29.331358 IFD End Offset : 0x2000000
1982 17:44:29.332020
1983 17:44:29.335044 MMAP Size : 0x1000000
1984 17:44:29.335126
1985 17:44:29.337803 MMAP Start : 0xff000000
1986 17:44:29.338378
1987 17:44:29.344477 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1988 17:44:29.348562
1989 17:44:29.352455 New NVMe Controller 0x3214e110 @ 00:1d:04
1990 17:44:29.352594
1991 17:44:29.356799 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1992 17:44:29.357391
1993 17:44:29.362647 The GBB signature is at 0x30000014 and is: 24 47 42 42
1994 17:44:29.366839
1995 17:44:29.368560 Wipe memory regions:
1996 17:44:29.368998
1997 17:44:29.372729 [0x00000000001000, 0x000000000a0000)
1998 17:44:29.373005
1999 17:44:29.376467 [0x00000000100000, 0x00000030000000)
2000 17:44:29.458802
2001 17:44:29.462852 [0x00000032751910, 0x00000089afd000)
2002 17:44:29.612551
2003 17:44:29.616152 [0x00000100000000, 0x0000026e800000)
2004 17:44:30.625214
2005 17:44:30.626796 R8152: Initializing
2006 17:44:30.628020
2007 17:44:30.630443 Version 6 (ocp_data = 5c30)
2008 17:44:30.630997
2009 17:44:30.633765 R8152: Done initializing
2010 17:44:30.633838
2011 17:44:30.634986 Adding net device
2012 17:44:30.635865
2013 17:44:30.642013 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2014 17:44:30.642095
2015 17:44:30.642158
2016 17:44:30.642217
2017 17:44:30.642875 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2019 17:44:30.743227 sarien: tftpboot 192.168.201.1 11831822/tftp-deploy-puhf7lq3/kernel/bzImage 11831822/tftp-deploy-puhf7lq3/kernel/cmdline 11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
2020 17:44:30.743454 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2021 17:44:30.743640 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2022 17:44:30.787532 tftpboot 192.168.201.1 11831822/tftp-deploy-puhf7lq3/kernel/bzImage 11831822/tftp-deploy-puhf7lq3/kernel/cmdline 11831822/tftp-deploy-puhf7lq3/ramdisk/ramdisk.cpio.gz
2023 17:44:30.787677
2024 17:44:30.787928 Waiting for link
2025 17:44:30.946757
2026 17:44:30.947123 done.
2027 17:44:30.947214
2028 17:44:30.949298 MAC: 00:24:32:30:79:bd
2029 17:44:30.949587
2030 17:44:30.952947 Sending DHCP discover... done.
2031 17:44:30.953030
2032 17:44:30.955546 Waiting for reply... done.
2033 17:44:30.955672
2034 17:44:30.958616 Sending DHCP request... done.
2035 17:44:30.958696
2036 17:44:30.965974 Waiting for reply... done.
2037 17:44:30.966095
2038 17:44:30.969055 My ip is 192.168.201.166
2039 17:44:30.969156
2040 17:44:30.972826 The DHCP server ip is 192.168.201.1
2041 17:44:30.972929
2042 17:44:30.976994 TFTP server IP predefined by user: 192.168.201.1
2043 17:44:30.977096
2044 17:44:30.984442 Bootfile predefined by user: 11831822/tftp-deploy-puhf7lq3/kernel/bzImage
2045 17:44:30.984578
2046 17:44:30.988542 Sending tftp read request... done.
2047 17:44:30.988618
2048 17:44:30.992135 Waiting for the transfer...
2049 17:44:30.992675
2050 17:44:31.520260 00000000 ################################################################
2051 17:44:31.520743
2052 17:44:32.054692 00080000 ################################################################
2053 17:44:32.055337
2054 17:44:32.586072 00100000 ################################################################
2055 17:44:32.586717
2056 17:44:33.122460 00180000 ################################################################
2057 17:44:33.123124
2058 17:44:33.654549 00200000 ################################################################
2059 17:44:33.655054
2060 17:44:34.215350 00280000 ################################################################
2061 17:44:34.215742
2062 17:44:34.810438 00300000 ################################################################
2063 17:44:34.811016
2064 17:44:35.399587 00380000 ################################################################
2065 17:44:35.399922
2066 17:44:35.974998 00400000 ################################################################
2067 17:44:35.975598
2068 17:44:36.544699 00480000 ################################################################
2069 17:44:36.545041
2070 17:44:37.115088 00500000 ################################################################
2071 17:44:37.115609
2072 17:44:37.685291 00580000 ################################################################
2073 17:44:37.686481
2074 17:44:38.277693 00600000 ################################################################
2075 17:44:38.278202
2076 17:44:38.867250 00680000 ################################################################
2077 17:44:38.867893
2078 17:44:39.450573 00700000 ################################################################
2079 17:44:39.451265
2080 17:44:40.035073 00780000 ################################################################
2081 17:44:40.035597
2082 17:44:40.164942 00800000 ############### done.
2083 17:44:40.165071
2084 17:44:40.168738 The bootfile was 8507280 bytes long.
2085 17:44:40.169394
2086 17:44:40.172520 Sending tftp read request... done.
2087 17:44:40.172818
2088 17:44:40.175117 Waiting for the transfer...
2089 17:44:40.175197
2090 17:44:40.750995 00000000 ################################################################
2091 17:44:40.751607
2092 17:44:41.336243 00080000 ################################################################
2093 17:44:41.336744
2094 17:44:41.915978 00100000 ################################################################
2095 17:44:41.917166
2096 17:44:42.506609 00180000 ################################################################
2097 17:44:42.507164
2098 17:44:43.152195 00200000 ################################################################
2099 17:44:43.153185
2100 17:44:43.858565 00280000 ################################################################
2101 17:44:43.859822
2102 17:44:44.562566 00300000 ################################################################
2103 17:44:44.563827
2104 17:44:45.266739 00380000 ################################################################
2105 17:44:45.267910
2106 17:44:45.988049 00400000 ################################################################
2107 17:44:45.988590
2108 17:44:46.706943 00480000 ################################################################
2109 17:44:46.708105
2110 17:44:47.384324 00500000 ################################################################
2111 17:44:47.384939
2112 17:44:48.098162 00580000 ################################################################
2113 17:44:48.099291
2114 17:44:48.811163 00600000 ################################################################
2115 17:44:48.811734
2116 17:44:49.535568 00680000 ################################################################
2117 17:44:49.536120
2118 17:44:50.214903 00700000 ################################################################
2119 17:44:50.215520
2120 17:44:50.824337 00780000 ################################################################
2121 17:44:50.824845
2122 17:44:51.414035 00800000 ###################################################### done.
2123 17:44:51.414698
2124 17:44:51.417661 Sending tftp read request... done.
2125 17:44:51.418057
2126 17:44:51.420815 Waiting for the transfer...
2127 17:44:51.421203
2128 17:44:51.422783 00000000 # done.
2129 17:44:51.423132
2130 17:44:51.432073 Command line loaded dynamically from TFTP file: 11831822/tftp-deploy-puhf7lq3/kernel/cmdline
2131 17:44:51.432457
2132 17:44:51.451215 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2133 17:44:51.455736
2134 17:44:51.459878 Shutting down all USB controllers.
2135 17:44:51.460399
2136 17:44:51.462231 Removing current net device
2137 17:44:51.463844
2138 17:44:51.466454 EC: exit firmware mode
2139 17:44:51.466902
2140 17:44:51.469705 Finalizing coreboot
2141 17:44:51.470220
2142 17:44:51.476283 Exiting depthcharge with code 4 at timestamp: 29853012
2143 17:44:51.476576
2144 17:44:51.476853
2145 17:44:51.477655 Starting kernel ...
2146 17:44:51.477894
2147 17:44:51.478089
2148 17:44:51.478819 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2149 17:44:51.479089 start: 2.2.5 auto-login-action (timeout 00:04:09) [common]
2150 17:44:51.479289 Setting prompt string to ['Linux version [0-9]']
2151 17:44:51.479514 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2152 17:44:51.479700 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2154 17:49:00.480102 end: 2.2.5 auto-login-action (duration 00:04:09) [common]
2156 17:49:00.481677 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 249 seconds'
2158 17:49:00.482944 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2161 17:49:00.485126 end: 2 depthcharge-action (duration 00:05:00) [common]
2163 17:49:00.486213 Cleaning after the job
2164 17:49:00.486646 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/ramdisk
2165 17:49:00.492571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/kernel
2166 17:49:00.500558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831822/tftp-deploy-puhf7lq3/modules
2167 17:49:00.503543 start: 5.1 power-off (timeout 00:00:30) [common]
2168 17:49:00.504852 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2169 17:49:05.673509 >> Command sent successfully.
2170 17:49:05.676026 Returned 0 in 5 seconds
2171 17:49:05.776453 end: 5.1 power-off (duration 00:00:05) [common]
2173 17:49:05.776899 start: 5.2 read-feedback (timeout 00:09:55) [common]
2174 17:49:05.777247 Listened to connection for namespace 'common' for up to 1s
2175 17:49:06.778135 Finalising connection for namespace 'common'
2176 17:49:06.778371 Disconnecting from shell: Finalise
2177 17:49:06.778498
2178 17:49:06.878855 end: 5.2 read-feedback (duration 00:00:01) [common]
2179 17:49:06.879048 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831822
2180 17:49:06.902309 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831822
2181 17:49:06.902522 JobError: Your job cannot terminate cleanly.