Boot log: acer-cbv514-1h-34uz-brya

    1 17:38:45.220200  lava-dispatcher, installed at version: 2023.08
    2 17:38:45.220368  start: 0 validate
    3 17:38:45.220474  Start time: 2023-10-20 17:38:45.220468+00:00 (UTC)
    4 17:38:45.220580  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:38:45.220685  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:38:45.489657  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:38:45.490269  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:38:45.759673  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:38:45.760252  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:38:48.462950  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:38:48.463124  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:38:48.729747  validate duration: 3.51
   14 17:38:48.730003  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:38:48.730087  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:38:48.730159  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:38:48.730269  Not decompressing ramdisk as can be used compressed.
   18 17:38:48.730341  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 17:38:48.730393  saving as /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/ramdisk/initrd.cpio.gz
   20 17:38:48.730444  total size: 5432690 (5 MB)
   21 17:38:49.258321  progress   0 % (0 MB)
   22 17:38:49.259795  progress   5 % (0 MB)
   23 17:38:49.260832  progress  10 % (0 MB)
   24 17:38:49.261848  progress  15 % (0 MB)
   25 17:38:49.262960  progress  20 % (1 MB)
   26 17:38:49.263969  progress  25 % (1 MB)
   27 17:38:49.264969  progress  30 % (1 MB)
   28 17:38:49.266058  progress  35 % (1 MB)
   29 17:38:49.267023  progress  40 % (2 MB)
   30 17:38:49.267986  progress  45 % (2 MB)
   31 17:38:49.268944  progress  50 % (2 MB)
   32 17:38:49.270027  progress  55 % (2 MB)
   33 17:38:49.270993  progress  60 % (3 MB)
   34 17:38:49.271952  progress  65 % (3 MB)
   35 17:38:49.273022  progress  70 % (3 MB)
   36 17:38:49.273983  progress  75 % (3 MB)
   37 17:38:49.274962  progress  80 % (4 MB)
   38 17:38:49.275918  progress  85 % (4 MB)
   39 17:38:49.277001  progress  90 % (4 MB)
   40 17:38:49.277968  progress  95 % (4 MB)
   41 17:38:49.278993  progress 100 % (5 MB)
   42 17:38:49.279157  5 MB downloaded in 0.55 s (9.44 MB/s)
   43 17:38:49.279291  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 17:38:49.279490  end: 1.1 download-retry (duration 00:00:01) [common]
   46 17:38:49.279559  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 17:38:49.279624  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 17:38:49.279741  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:38:49.279802  saving as /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/kernel/bzImage
   50 17:38:49.279849  total size: 8507280 (8 MB)
   51 17:38:49.279897  No compression specified
   52 17:38:49.280869  progress   0 % (0 MB)
   53 17:38:49.282394  progress   5 % (0 MB)
   54 17:38:49.283957  progress  10 % (0 MB)
   55 17:38:49.285513  progress  15 % (1 MB)
   56 17:38:49.287078  progress  20 % (1 MB)
   57 17:38:49.288628  progress  25 % (2 MB)
   58 17:38:49.290187  progress  30 % (2 MB)
   59 17:38:49.291753  progress  35 % (2 MB)
   60 17:38:49.293302  progress  40 % (3 MB)
   61 17:38:49.294858  progress  45 % (3 MB)
   62 17:38:49.296441  progress  50 % (4 MB)
   63 17:38:49.297997  progress  55 % (4 MB)
   64 17:38:49.299513  progress  60 % (4 MB)
   65 17:38:49.301039  progress  65 % (5 MB)
   66 17:38:49.302563  progress  70 % (5 MB)
   67 17:38:49.304073  progress  75 % (6 MB)
   68 17:38:49.305649  progress  80 % (6 MB)
   69 17:38:49.307185  progress  85 % (6 MB)
   70 17:38:49.308706  progress  90 % (7 MB)
   71 17:38:49.310224  progress  95 % (7 MB)
   72 17:38:49.311809  progress 100 % (8 MB)
   73 17:38:49.311955  8 MB downloaded in 0.03 s (252.73 MB/s)
   74 17:38:49.312084  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:38:49.312276  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:38:49.312346  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 17:38:49.312416  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 17:38:49.312541  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 17:38:49.312597  saving as /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/nfsrootfs/full.rootfs.tar
   81 17:38:49.312644  total size: 133380384 (127 MB)
   82 17:38:49.312693  Using unxz to decompress xz
   83 17:38:49.315618  progress   0 % (0 MB)
   84 17:38:49.613004  progress   5 % (6 MB)
   85 17:38:49.925853  progress  10 % (12 MB)
   86 17:38:50.173520  progress  15 % (19 MB)
   87 17:38:50.336079  progress  20 % (25 MB)
   88 17:38:50.548309  progress  25 % (31 MB)
   89 17:38:50.851696  progress  30 % (38 MB)
   90 17:38:51.154472  progress  35 % (44 MB)
   91 17:38:51.505811  progress  40 % (50 MB)
   92 17:38:51.847190  progress  45 % (57 MB)
   93 17:38:52.165799  progress  50 % (63 MB)
   94 17:38:52.494599  progress  55 % (69 MB)
   95 17:38:52.813200  progress  60 % (76 MB)
   96 17:38:53.132259  progress  65 % (82 MB)
   97 17:38:53.451439  progress  70 % (89 MB)
   98 17:38:53.769721  progress  75 % (95 MB)
   99 17:38:54.153426  progress  80 % (101 MB)
  100 17:38:54.531196  progress  85 % (108 MB)
  101 17:38:54.762128  progress  90 % (114 MB)
  102 17:38:55.060132  progress  95 % (120 MB)
  103 17:38:55.399705  progress 100 % (127 MB)
  104 17:38:55.404533  127 MB downloaded in 6.09 s (20.88 MB/s)
  105 17:38:55.404778  end: 1.3.1 http-download (duration 00:00:06) [common]
  107 17:38:55.405033  end: 1.3 download-retry (duration 00:00:06) [common]
  108 17:38:55.405109  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 17:38:55.405180  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 17:38:55.405313  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:38:55.405377  saving as /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/modules/modules.tar
  112 17:38:55.405435  total size: 253900 (0 MB)
  113 17:38:55.405505  Using unxz to decompress xz
  114 17:38:55.408856  progress  12 % (0 MB)
  115 17:38:55.409159  progress  25 % (0 MB)
  116 17:38:55.409344  progress  38 % (0 MB)
  117 17:38:55.410984  progress  51 % (0 MB)
  118 17:38:55.412510  progress  64 % (0 MB)
  119 17:38:55.414172  progress  77 % (0 MB)
  120 17:38:55.415786  progress  90 % (0 MB)
  121 17:38:55.417281  progress 100 % (0 MB)
  122 17:38:55.422239  0 MB downloaded in 0.02 s (14.41 MB/s)
  123 17:38:55.422467  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:38:55.422729  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:38:55.422804  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  127 17:38:55.422879  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  128 17:38:56.713494  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831878/extract-nfsrootfs-x_xwpzi8
  129 17:38:56.713705  end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
  130 17:38:56.713807  start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
  131 17:38:56.713990  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da
  132 17:38:56.714128  makedir: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin
  133 17:38:56.714224  makedir: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/tests
  134 17:38:56.714302  makedir: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/results
  135 17:38:56.714387  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-add-keys
  136 17:38:56.714513  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-add-sources
  137 17:38:56.714615  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-background-process-start
  138 17:38:56.714715  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-background-process-stop
  139 17:38:56.714816  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-common-functions
  140 17:38:56.714914  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-echo-ipv4
  141 17:38:56.715010  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-install-packages
  142 17:38:56.715106  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-installed-packages
  143 17:38:56.715201  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-os-build
  144 17:38:56.715296  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-probe-channel
  145 17:38:56.715392  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-probe-ip
  146 17:38:56.715499  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-target-ip
  147 17:38:56.715595  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-target-mac
  148 17:38:56.715689  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-target-storage
  149 17:38:56.715781  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-case
  150 17:38:56.715874  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-event
  151 17:38:56.715974  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-feedback
  152 17:38:56.716080  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-raise
  153 17:38:56.716172  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-reference
  154 17:38:56.716269  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-runner
  155 17:38:56.716361  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-set
  156 17:38:56.716461  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-test-shell
  157 17:38:56.716564  Updating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-install-packages (oe)
  158 17:38:56.716678  Updating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/bin/lava-installed-packages (oe)
  159 17:38:56.716767  Creating /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/environment
  160 17:38:56.716841  LAVA metadata
  161 17:38:56.716915  - LAVA_JOB_ID=11831878
  162 17:38:56.716966  - LAVA_DISPATCHER_IP=192.168.201.1
  163 17:38:56.717047  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
  164 17:38:56.717101  skipped lava-vland-overlay
  165 17:38:56.717159  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 17:38:56.717221  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
  167 17:38:56.717269  skipped lava-multinode-overlay
  168 17:38:56.717324  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 17:38:56.717590  start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
  170 17:38:56.717653  Loading test definitions
  171 17:38:56.717725  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
  172 17:38:56.717781  Using /lava-11831878 at stage 0
  173 17:38:56.718029  uuid=11831878_1.5.2.3.1 testdef=None
  174 17:38:56.718103  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 17:38:56.718171  start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
  176 17:38:56.718570  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 17:38:56.718744  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
  179 17:38:56.719241  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 17:38:56.719419  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
  182 17:38:56.719905  runner path: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/0/tests/0_dmesg test_uuid 11831878_1.5.2.3.1
  183 17:38:56.720024  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 17:38:56.720202  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
  186 17:38:56.720257  Using /lava-11831878 at stage 1
  187 17:38:56.720480  uuid=11831878_1.5.2.3.5 testdef=None
  188 17:38:56.720547  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 17:38:56.720611  start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
  190 17:38:56.720965  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 17:38:56.721131  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
  193 17:38:56.721630  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 17:38:56.721815  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
  196 17:38:56.722288  runner path: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/1/tests/1_bootrr test_uuid 11831878_1.5.2.3.5
  197 17:38:56.722404  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 17:38:56.722567  Creating lava-test-runner.conf files
  200 17:38:56.722616  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/0 for stage 0
  201 17:38:56.722684  - 0_dmesg
  202 17:38:56.722750  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831878/lava-overlay-1_du52da/lava-11831878/1 for stage 1
  203 17:38:56.722821  - 1_bootrr
  204 17:38:56.722896  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 17:38:56.722965  start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
  206 17:38:56.728601  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 17:38:56.728692  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
  208 17:38:56.728760  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 17:38:56.728834  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 17:38:56.728900  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
  211 17:38:56.820350  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 17:38:56.820650  start: 1.5.4 extract-modules (timeout 00:09:52) [common]
  213 17:38:56.820748  extracting modules file /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831878/extract-nfsrootfs-x_xwpzi8
  214 17:38:56.829562  extracting modules file /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831878/extract-overlay-ramdisk-lrjdhftf/ramdisk
  215 17:38:56.837944  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 17:38:56.838046  start: 1.5.5 apply-overlay-tftp (timeout 00:09:52) [common]
  217 17:38:56.838115  [common] Applying overlay to NFS
  218 17:38:56.838170  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831878/compress-overlay-l0lqcmy4/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831878/extract-nfsrootfs-x_xwpzi8
  219 17:38:56.843734  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 17:38:56.843825  start: 1.5.6 configure-preseed-file (timeout 00:09:52) [common]
  221 17:38:56.843897  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 17:38:56.843966  start: 1.5.7 compress-ramdisk (timeout 00:09:52) [common]
  223 17:38:56.844026  Building ramdisk /var/lib/lava/dispatcher/tmp/11831878/extract-overlay-ramdisk-lrjdhftf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831878/extract-overlay-ramdisk-lrjdhftf/ramdisk
  224 17:38:56.874577  >> 26198 blocks

  225 17:38:57.345551  rename /var/lib/lava/dispatcher/tmp/11831878/extract-overlay-ramdisk-lrjdhftf/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz
  226 17:38:57.345900  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 17:38:57.346031  start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
  228 17:38:57.346130  start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
  229 17:38:57.346239  No mkimage arch provided, not using FIT.
  230 17:38:57.346323  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 17:38:57.346409  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 17:38:57.346514  end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
  233 17:38:57.346607  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
  234 17:38:57.346676  No LXC device requested
  235 17:38:57.346738  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 17:38:57.346806  start: 1.7 deploy-device-env (timeout 00:09:51) [common]
  237 17:38:57.346867  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 17:38:57.346926  Checking files for TFTP limit of 4294967296 bytes.
  239 17:38:57.347230  end: 1 tftp-deploy (duration 00:00:09) [common]
  240 17:38:57.347310  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 17:38:57.347380  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 17:38:57.347490  substitutions:
  243 17:38:57.347558  - {DTB}: None
  244 17:38:57.347607  - {INITRD}: 11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz
  245 17:38:57.347654  - {KERNEL}: 11831878/tftp-deploy-ivf_1wy0/kernel/bzImage
  246 17:38:57.347698  - {LAVA_MAC}: None
  247 17:38:57.347742  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831878/extract-nfsrootfs-x_xwpzi8
  248 17:38:57.347787  - {NFS_SERVER_IP}: 192.168.201.1
  249 17:38:57.347830  - {PRESEED_CONFIG}: None
  250 17:38:57.347873  - {PRESEED_LOCAL}: None
  251 17:38:57.347915  - {RAMDISK}: 11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz
  252 17:38:57.347958  - {ROOT_PART}: None
  253 17:38:57.348001  - {ROOT}: None
  254 17:38:57.348044  - {SERVER_IP}: 192.168.201.1
  255 17:38:57.348087  - {TEE}: None
  256 17:38:57.348129  Parsed boot commands:
  257 17:38:57.348171  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 17:38:57.348311  Parsed boot commands: tftpboot 192.168.201.1 11831878/tftp-deploy-ivf_1wy0/kernel/bzImage 11831878/tftp-deploy-ivf_1wy0/kernel/cmdline 11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz
  259 17:38:57.348389  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 17:38:57.348456  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 17:38:57.348532  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 17:38:57.348596  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 17:38:57.348647  Not connected, no need to disconnect.
  264 17:38:57.348704  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 17:38:57.348766  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 17:38:57.348818  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cbv514-1h-34uz-brya-cbg-3'
  267 17:38:57.351247  Setting prompt string to ['lava-test: # ']
  268 17:38:57.351487  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 17:38:57.351569  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 17:38:57.351643  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 17:38:57.351712  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 17:38:57.351855  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=reboot'
  273 17:39:02.494468  >> Command sent successfully.

  274 17:39:02.502709  Returned 0 in 5 seconds
  275 17:39:02.603691  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 17:39:02.604711  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 17:39:02.605059  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 17:39:02.605347  Setting prompt string to 'Starting depthcharge on Volmar...'
  280 17:39:02.605642  Changing prompt to 'Starting depthcharge on Volmar...'
  281 17:39:02.605881  depthcharge-start: Wait for prompt Starting depthcharge on Volmar... (timeout 00:05:00)
  282 17:39:02.606663  [Enter `^Ec?' for help]

  283 17:39:03.975834  

  284 17:39:03.976281  

  285 17:39:03.983216  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  286 17:39:03.986993  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  287 17:39:03.990435  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  288 17:39:03.997229  CPU: AES supported, TXT NOT supported, VT supported

  289 17:39:04.003958  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  290 17:39:04.007592  Cache size = 10 MiB

  291 17:39:04.010699  MCH: device id 4609 (rev 04) is Alderlake-P

  292 17:39:04.016954  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  293 17:39:04.020644  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  294 17:39:04.024116  VBOOT: Loading verstage.

  295 17:39:04.028217  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  296 17:39:04.032185  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  297 17:39:04.039048  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 17:39:04.046595  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  299 17:39:04.053081  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  300 17:39:04.057320  

  301 17:39:04.057702  

  302 17:39:04.063912  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  303 17:39:04.070610  Probing TPM I2C: I2C bus 1 version 0x3230302a

  304 17:39:04.073348  DW I2C bus 1 at 0xfe022000 (400 KHz)

  305 17:39:04.077090  I2C TX abort detected (00000001)

  306 17:39:04.080478  cr50_i2c_read: Address write failed

  307 17:39:04.092203  .done! DID_VID 0x00281ae0

  308 17:39:04.096487  TPM ready after 0 ms

  309 17:39:04.100358  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  310 17:39:04.112911  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  311 17:39:04.119939  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  312 17:39:04.172389  tlcl_send_startup: Startup return code is 0

  313 17:39:04.172820  TPM: setup succeeded

  314 17:39:04.192252  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  315 17:39:04.215860  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  316 17:39:04.223907  Chrome EC: UHEPI supported

  317 17:39:04.229996  Reading cr50 boot mode

  318 17:39:04.245620  Cr50 says boot_mode is VERIFIED_RW(0x00).

  319 17:39:04.246003  Phase 1

  320 17:39:04.251905  FMAP: area GBB found @ 1805000 (458752 bytes)

  321 17:39:04.258899  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  322 17:39:04.265655  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  323 17:39:04.271828  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  324 17:39:04.275462  Phase 2

  325 17:39:04.275824  Phase 3

  326 17:39:04.278917  FMAP: area GBB found @ 1805000 (458752 bytes)

  327 17:39:04.285182  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  328 17:39:04.289032  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  329 17:39:04.295314  VB2:vb2_verify_keyblock() Checking keyblock signature...

  330 17:39:04.302264  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  331 17:39:04.309083  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  332 17:39:04.312266  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  333 17:39:04.326093  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  334 17:39:04.329449  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  335 17:39:04.336129  VB2:vb2_verify_fw_preamble() Verifying preamble.

  336 17:39:04.342901  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  337 17:39:04.346102  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  338 17:39:04.352930  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  339 17:39:04.357212  Phase 4

  340 17:39:04.360212  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  341 17:39:04.366820  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  342 17:39:04.592640  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  343 17:39:04.599283  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  344 17:39:04.602437  Saving vboot hash.

  345 17:39:04.609260  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  346 17:39:04.624999  tlcl_extend: response is 0

  347 17:39:04.631547  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  348 17:39:04.635446  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  349 17:39:04.652629  tlcl_extend: response is 0

  350 17:39:04.659195  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  351 17:39:04.678211  tlcl_lock_nv_write: response is 0

  352 17:39:04.695369  tlcl_lock_nv_write: response is 0

  353 17:39:04.695802  Slot A is selected

  354 17:39:04.702129  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  355 17:39:04.709050  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  356 17:39:04.715487  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  357 17:39:04.722260  BS: verstage times (exec / console): total (unknown) / 253 ms

  358 17:39:04.722630  

  359 17:39:04.722894  

  360 17:39:04.729008  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  361 17:39:04.732706  Google Chrome EC: version:

  362 17:39:04.736048  	ro: volmar_v2.0.14126-e605144e9c

  363 17:39:04.739207  	rw: volmar_v0.0.55-22d1557

  364 17:39:04.742704    running image: 2

  365 17:39:04.746230  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  366 17:39:04.755696  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  367 17:39:04.762536  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  368 17:39:04.769213  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  369 17:39:04.779734  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  370 17:39:04.789310  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  371 17:39:04.792462  EC took 1081us to calculate image hash

  372 17:39:04.803207  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  373 17:39:04.806009  VB2:sync_ec() select_rw=RW(active)

  374 17:39:04.814632  Waited 270us to clear limit power flag.

  375 17:39:04.820759  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  376 17:39:04.824155  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  377 17:39:04.827260  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  378 17:39:04.834149  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  379 17:39:04.837504  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  380 17:39:04.840864  TCO_STS:   0000 0000

  381 17:39:04.844231  GEN_PMCON: d0015038 00002200

  382 17:39:04.844349  GBLRST_CAUSE: 00000000 00000000

  383 17:39:04.847567  HPR_CAUSE0: 00000000

  384 17:39:04.850329  prev_sleep_state 5

  385 17:39:04.854364  Abort disabling TXT, as CPU is not TXT capable.

  386 17:39:04.861916  cse_lite: Number of partitions = 3

  387 17:39:04.865666  cse_lite: Current partition = RO

  388 17:39:04.865742  cse_lite: Next partition = RO

  389 17:39:04.868720  cse_lite: Flags = 0x7

  390 17:39:04.875907  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  391 17:39:04.885468  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  392 17:39:04.889145  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  393 17:39:04.895787  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  394 17:39:04.902374  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  395 17:39:04.908779  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  396 17:39:04.912381  cse_lite: CSE CBFS RW version : 16.1.25.2049

  397 17:39:04.919010  cse_lite: Set Boot Partition Info Command (RW)

  398 17:39:04.922126  HECI: Global Reset(Type:1) Command

  399 17:39:06.333410  

  400 17:39:06.333560  

  401 17:39:06.340436  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 bootblock starting (log level: 8)...

  402 17:39:06.344205  CPU: 12th Gen Intel(R) Core(TM) i3-1215U

  403 17:39:06.350850  CPU: ID 906a4, Alderlake R0 Platform, ucode: 00000423

  404 17:39:06.354343  CPU: AES supported, TXT NOT supported, VT supported

  405 17:39:06.364530  Cache: Level 3: Associativity = 10 Partitions = 1 Line Size = 64 Sets = 16384

  406 17:39:06.364889  Cache size = 10 MiB

  407 17:39:06.367904  MCH: device id 4609 (rev 04) is Alderlake-P

  408 17:39:06.374667  PCH: device id 5182 (rev 01) is Raptorlake-P SKU

  409 17:39:06.377841  IGD: device id 46b3 (rev 0c) is Alderlake P GT2

  410 17:39:06.380801  VBOOT: Loading verstage.

  411 17:39:06.385480  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  412 17:39:06.392191  FMAP: base = 0x0 size = 0x2000000 #areas = 37

  413 17:39:06.396001  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  414 17:39:06.402850  CBFS: mcache @0xfef85600 built for 72 files, used 0xfd8 of 0x2000 bytes

  415 17:39:06.412987  CBFS: Found 'fallback/verstage' @0x18a540 size 0x16ae8 in mcache @0xfef85954

  416 17:39:06.413343  

  417 17:39:06.413643  

  418 17:39:06.422384  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 verstage starting (log level: 8)...

  419 17:39:06.426074  Probing TPM I2C: I2C bus 1 version 0x3230302a

  420 17:39:06.432325  DW I2C bus 1 at 0xfe022000 (400 KHz)

  421 17:39:06.432682  done! DID_VID 0x00281ae0

  422 17:39:06.436292  TPM ready after 0 ms

  423 17:39:06.440384  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  424 17:39:06.450598  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  425 17:39:06.457903  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  426 17:39:06.515573  tlcl_send_startup: Startup return code is 0

  427 17:39:06.515984  TPM: setup succeeded

  428 17:39:06.535399  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  429 17:39:06.557075  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  430 17:39:06.561042  Chrome EC: UHEPI supported

  431 17:39:06.564284  Reading cr50 boot mode

  432 17:39:06.579163  Cr50 says boot_mode is VERIFIED_RW(0x00).

  433 17:39:06.579243  Phase 1

  434 17:39:06.585962  FMAP: area GBB found @ 1805000 (458752 bytes)

  435 17:39:06.592907  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  436 17:39:06.599762  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  437 17:39:06.606144  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  438 17:39:06.606574  Phase 2

  439 17:39:06.609789  Phase 3

  440 17:39:06.612839  FMAP: area GBB found @ 1805000 (458752 bytes)

  441 17:39:06.620011  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  442 17:39:06.622860  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  443 17:39:06.629246  VB2:vb2_verify_keyblock() Checking keyblock signature...

  444 17:39:06.636009  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  445 17:39:06.642814  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  446 17:39:06.646178  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  447 17:39:06.660280  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  448 17:39:06.663429  FMAP: area VBLOCK_A found @ 500000 (65536 bytes)

  449 17:39:06.670302  VB2:vb2_verify_fw_preamble() Verifying preamble.

  450 17:39:06.676764  VB2:vb2_verify_data() HW crypto forbidden by TPM flag, using SW

  451 17:39:06.680156  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  452 17:39:06.686626  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  453 17:39:06.691335  Phase 4

  454 17:39:06.694411  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  455 17:39:06.701160  VB2:vb2api_init_hash() HW crypto forbidden by TPM flag, using SW

  456 17:39:06.927201  VB2:vb2_verify_digest() HW RSA forbidden, using SW

  457 17:39:06.933160  VB2:vb2_rsa_verify_digest() HW modexp forbidden, using SW

  458 17:39:06.936914  Saving vboot hash.

  459 17:39:06.942886  TPM: Extending digest for `VBOOT: boot mode` into PCR 0

  460 17:39:06.958770  tlcl_extend: response is 0

  461 17:39:06.965225  TPM: Digest of `VBOOT: boot mode` to PCR 0 measured

  462 17:39:06.971940  TPM: Extending digest for `VBOOT: GBB HWID` into PCR 1

  463 17:39:06.986443  tlcl_extend: response is 0

  464 17:39:06.993449  TPM: Digest of `VBOOT: GBB HWID` to PCR 1 measured

  465 17:39:07.011817  tlcl_lock_nv_write: response is 0

  466 17:39:07.029787  tlcl_lock_nv_write: response is 0

  467 17:39:07.030248  Slot A is selected

  468 17:39:07.036504  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  469 17:39:07.042951  CBFS: mcache @0xfef87600 built for 22 files, used 0x43c of 0x2000 bytes

  470 17:39:07.049587  CBFS: Found 'fallback/romstage' @0x0 size 0x1d810 in mcache @0xfef87600

  471 17:39:07.056052  BS: verstage times (exec / console): total (unknown) / 246 ms

  472 17:39:07.056137  

  473 17:39:07.056203  

  474 17:39:07.063475  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 romstage starting (log level: 8)...

  475 17:39:07.067205  Google Chrome EC: version:

  476 17:39:07.070173  	ro: volmar_v2.0.14126-e605144e9c

  477 17:39:07.073378  	rw: volmar_v0.0.55-22d1557

  478 17:39:07.076702    running image: 2

  479 17:39:07.079794  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  480 17:39:07.090371  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  481 17:39:07.096626  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  482 17:39:07.103547  CBFS: Found 'ecrw.hash' @0x7de00 size 0x20 in mcache @0xfef8785c

  483 17:39:07.113494  VB2:check_ec_hash() Hexp RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  484 17:39:07.123495  VB2:check_ec_hash()            Hmir: 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  485 17:39:07.126852  EC took 941us to calculate image hash

  486 17:39:07.137290  VB2:check_ec_hash() Heff RW(active): 27af2e81512cb95ff50318b5669d2c9bac939e1af81a41d7fa10c014b19b12fa

  487 17:39:07.140655  VB2:sync_ec() select_rw=RW(active)

  488 17:39:07.153261  Waited 270us to clear limit power flag.

  489 17:39:07.157028  pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00

  490 17:39:07.159816  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  491 17:39:07.163455  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  492 17:39:07.169980  gpe0_sts[2]: 00040000 gpe0_en[2]: 00000000

  493 17:39:07.173486  gpe0_sts[3]: 00000000 gpe0_en[3]: 00082000

  494 17:39:07.176602  TCO_STS:   0000 0000

  495 17:39:07.176950  GEN_PMCON: d1001038 00002200

  496 17:39:07.179754  GBLRST_CAUSE: 00000040 00000000

  497 17:39:07.183522  HPR_CAUSE0: 00000000

  498 17:39:07.186671  prev_sleep_state 5

  499 17:39:07.189687  Abort disabling TXT, as CPU is not TXT capable.

  500 17:39:07.197972  cse_lite: Number of partitions = 3

  501 17:39:07.201323  cse_lite: Current partition = RW

  502 17:39:07.201690  cse_lite: Next partition = RW

  503 17:39:07.204717  cse_lite: Flags = 0x7

  504 17:39:07.211528  cse_lite: RO version = 16.1.25.2049 (Status=0x0, Start=0x2000, End=0x14ffff)

  505 17:39:07.221013  cse_lite: RW version = 16.1.25.2049 (Status=0x0, Start=0x1b9000, End=0x3a1fff)

  506 17:39:07.224243  FMAP: area SI_ME found @ 1000 (5238784 bytes)

  507 17:39:07.230832  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  508 17:39:07.237668  cse_lite: CSE RW partition: offset = 0x1b9000, size = 0x1e9000

  509 17:39:07.244306  CBFS: Found 'me_rw.version' @0x7dd00 size 0xd in mcache @0xfef877e8

  510 17:39:07.247669  cse_lite: CSE CBFS RW version : 16.1.25.2049

  511 17:39:07.251861  Boot Count incremented to 1862

  512 17:39:07.257780  CBFS: Found 'fspm.bin' @0x7dfc0 size 0xc0000 in mcache @0xfef878d4

  513 17:39:07.263988  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  514 17:39:07.276849  Probing TPM I2C: done! DID_VID 0x00281ae0

  515 17:39:07.280621  Locality already claimed

  516 17:39:07.284013  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  517 17:39:07.303570  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100d return code 0

  518 17:39:07.310279  MRC: Hash idx 0x100d comparison successful.

  519 17:39:07.313124  MRC cache found, size f6c8

  520 17:39:07.313455  bootmode is set to: 2

  521 17:39:07.316948  EC returned error result code 3

  522 17:39:07.319945  FW_CONFIG value from CBI is 0x131

  523 17:39:07.326396  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  524 17:39:07.330060  SPD index = 0

  525 17:39:07.336153  CBFS: Found 'spd.bin' @0x78380 size 0x400 in mcache @0xfef8776c

  526 17:39:07.336230  SPD: module type is LPDDR4X

  527 17:39:07.343630  SPD: module part number is K4U6E3S4AB-MGCL

  528 17:39:07.350529  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  529 17:39:07.353504  SPD: device width 16 bits, bus width 16 bits

  530 17:39:07.356909  SPD: module size is 1024 MB (per channel)

  531 17:39:07.427776  CBMEM:

  532 17:39:07.430621  IMD: root @ 0x76fff000 254 entries.

  533 17:39:07.433974  IMD: root @ 0x76ffec00 62 entries.

  534 17:39:07.441767  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  535 17:39:07.445254  RO_VPD is uninitialized or empty.

  536 17:39:07.448683  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  537 17:39:07.454702  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  538 17:39:07.458132  External stage cache:

  539 17:39:07.461894  IMD: root @ 0x7bbff000 254 entries.

  540 17:39:07.464825  IMD: root @ 0x7bbfec00 62 entries.

  541 17:39:07.472004  FMAP: area RW_MRC_CACHE found @ f10000 (65536 bytes)

  542 17:39:07.478524  MRC: Checking cached data update for 'RW_MRC_CACHE'.

  543 17:39:07.481443  MRC: 'RW_MRC_CACHE' does not need update.

  544 17:39:07.481743  8 DIMMs found

  545 17:39:07.485364  SMM Memory Map

  546 17:39:07.488389  SMRAM       : 0x7b800000 0x800000

  547 17:39:07.491632   Subregion 0: 0x7b800000 0x200000

  548 17:39:07.494922   Subregion 1: 0x7ba00000 0x200000

  549 17:39:07.497834   Subregion 2: 0x7bc00000 0x400000

  550 17:39:07.501264  top_of_ram = 0x77000000

  551 17:39:07.504881  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  552 17:39:07.511516  MTRR Range: Start=7b800000 End=7c000000 (Size 800000)

  553 17:39:07.518272  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  554 17:39:07.521888  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  555 17:39:07.522332  Normal boot

  556 17:39:07.531391  CBFS: Found 'fallback/postcar' @0x185000 size 0x54dc in mcache @0xfef87948

  557 17:39:07.537926  Loading module at 0x76ab9000 with entry 0x76ab9031. filesize: 0x50e8 memsize: 0xa4a0

  558 17:39:07.544436  Processing 237 relocs. Offset value of 0x74ab9000

  559 17:39:07.553106  BS: romstage times (exec / console): total (unknown) / 377 ms

  560 17:39:07.560138  

  561 17:39:07.560563  

  562 17:39:07.567111  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 postcar starting (log level: 8)...

  563 17:39:07.567472  Normal boot

  564 17:39:07.574465  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  565 17:39:07.580705  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  566 17:39:07.587237  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  567 17:39:07.596719  CBFS: Found 'fallback/ramstage' @0x52d00 size 0x24b33 in mcache @0x76add0b0

  568 17:39:07.644853  Loading module at 0x76a2f000 with entry 0x76a2f000. filesize: 0x51f70 memsize: 0x880d0

  569 17:39:07.651770  Processing 5931 relocs. Offset value of 0x72a2f000

  570 17:39:07.654938  BS: postcar times (exec / console): total (unknown) / 51 ms

  571 17:39:07.655389  

  572 17:39:07.657995  

  573 17:39:07.664291  coreboot-c7721883 Tue Feb  7 00:11:29 UTC 2023 ramstage starting (log level: 8)...

  574 17:39:07.668381  Reserving BERT start 76a1e000, size 10000

  575 17:39:07.671239  Normal boot

  576 17:39:07.674806  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  577 17:39:07.681250  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  578 17:39:07.688298  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  579 17:39:07.694678  FMAP: area RW_VPD found @ f29000 (8192 bytes)

  580 17:39:07.698162  Google Chrome EC: version:

  581 17:39:07.701355  	ro: volmar_v2.0.14126-e605144e9c

  582 17:39:07.705050  	rw: volmar_v0.0.55-22d1557

  583 17:39:07.705592    running image: 2

  584 17:39:07.712330  ACPI _SWS is PM1 Index 8 GPE Index -1

  585 17:39:07.715602  BS: BS_PRE_DEVICE entry times (exec / console): 0 / 4 ms

  586 17:39:07.718598  EC returned error result code 3

  587 17:39:07.725194  FW_CONFIG value from CBI is 0x131

  588 17:39:07.729072  fw_config match found: BOOT_NVME_MASK=BOOT_NVME_ENABLED

  589 17:39:07.732231  PCI: 00:1c.2 disabled by fw_config

  590 17:39:07.738355  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  591 17:39:07.742112  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  592 17:39:07.748916  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  593 17:39:07.751911  fw_config match found: FPMCU_MASK=FPMCU_ENABLED

  594 17:39:07.758419  FMAP: area FW_MAIN_A found @ 510000 (5242816 bytes)

  595 17:39:07.764590  CBFS: Found 'cpu_microcode_blob.bin' @0x1d8c0 size 0x35400 in mcache @0x76add080

  596 17:39:07.771701  microcode: sig=0x906a4 pf=0x80 revision=0x423

  597 17:39:07.775157  microcode: Update skipped, already up-to-date

  598 17:39:07.781538  CBFS: Found 'fsps.bin' @0x13e000 size 0x46fb3 in mcache @0x76add314

  599 17:39:07.814913  Detected 6 core, 8 thread CPU.

  600 17:39:07.818197  Setting up SMI for CPU

  601 17:39:07.821109  IED base = 0x7bc00000

  602 17:39:07.821522  IED size = 0x00400000

  603 17:39:07.824856  Will perform SMM setup.

  604 17:39:07.828006  CPU: 12th Gen Intel(R) Core(TM) i3-1215U.

  605 17:39:07.831301  LAPIC 0x0 in XAPIC mode.

  606 17:39:07.841121  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178

  607 17:39:07.844636  Processing 18 relocs. Offset value of 0x00030000

  608 17:39:07.849056  Attempting to start 7 APs

  609 17:39:07.852295  Waiting for 10ms after sending INIT.

  610 17:39:07.865285  Waiting for SIPI to complete...

  611 17:39:07.868936  LAPIC 0x1 in XAPIC mode.

  612 17:39:07.872224  LAPIC 0x10 in XAPIC mode.

  613 17:39:07.875532  LAPIC 0x9 in XAPIC mode.

  614 17:39:07.878646  LAPIC 0x8 in XAPIC mode.

  615 17:39:07.878976  LAPIC 0x12 in XAPIC mode.

  616 17:39:07.881765  LAPIC 0x16 in XAPIC mode.

  617 17:39:07.885779  AP: slot 7 apic_id 8, MCU rev: 0x00000423

  618 17:39:07.892016  AP: slot 2 apic_id 16, MCU rev: 0x00000423

  619 17:39:07.895900  AP: slot 3 apic_id 10, MCU rev: 0x00000423

  620 17:39:07.896372  done.

  621 17:39:07.898736  AP: slot 6 apic_id 1, MCU rev: 0x00000423

  622 17:39:07.902448  LAPIC 0x14 in XAPIC mode.

  623 17:39:07.905147  Waiting for SIPI to complete...

  624 17:39:07.905539  done.

  625 17:39:07.911965  AP: slot 1 apic_id 14, MCU rev: 0x00000423

  626 17:39:07.915093  AP: slot 4 apic_id 12, MCU rev: 0x00000423

  627 17:39:07.919319  AP: slot 5 apic_id 9, MCU rev: 0x00000423

  628 17:39:07.921948  smm_setup_relocation_handler: enter

  629 17:39:07.925070  smm_setup_relocation_handler: exit

  630 17:39:07.935590  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x208 memsize: 0x208

  631 17:39:07.938374  Processing 11 relocs. Offset value of 0x00038000

  632 17:39:07.945199  smm_module_setup_stub: stack_top = 0x7b804000

  633 17:39:07.948650  smm_module_setup_stub: per cpu stack_size = 0x800

  634 17:39:07.955489  smm_module_setup_stub: runtime.start32_offset = 0x4c

  635 17:39:07.958460  smm_module_setup_stub: runtime.smm_size = 0x10000

  636 17:39:07.964954  SMM Module: stub loaded at 38000. Will call 0x76a52094

  637 17:39:07.968546  Installing permanent SMM handler to 0x7b800000

  638 17:39:07.974517  smm_load_module: total_smm_space_needed e468, available -> 200000

  639 17:39:07.985129  Loading module at 0x7b9f6000 with entry 0x7b9f6d5f. filesize: 0x4348 memsize: 0x9468

  640 17:39:07.988385  Processing 255 relocs. Offset value of 0x7b9f6000

  641 17:39:07.995481  smm_load_module: smram_start: 0x7b800000

  642 17:39:07.998890  smm_load_module: smram_end: 7ba00000

  643 17:39:08.002311  smm_load_module: handler start 0x7b9f6d5f

  644 17:39:08.006626  smm_load_module: handler_size 98d0

  645 17:39:08.008625  smm_load_module: fxsave_area 0x7b9ff000

  646 17:39:08.012143  smm_load_module: fxsave_size 1000

  647 17:39:08.015442  smm_load_module: CONFIG_MSEG_SIZE 0x0

  648 17:39:08.021418  smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0

  649 17:39:08.028382  smm_load_module: handler_mod_params.smbase = 0x7b800000

  650 17:39:08.031835  smm_load_module: per_cpu_save_state_size = 0x400

  651 17:39:08.035290  smm_load_module: num_cpus = 0x8

  652 17:39:08.041931  smm_load_module: cbmemc = 0x76ade000, cbmemc_size = 0x20000

  653 17:39:08.044962  smm_load_module: total_save_state_size = 0x2000

  654 17:39:08.047995  smm_load_module: cpu0 entry: 7b9e6000

  655 17:39:08.055210  smm_create_map: cpus allowed in one segment 30

  656 17:39:08.058585  smm_create_map: min # of segments needed 1

  657 17:39:08.059044  CPU 0x0

  658 17:39:08.062359      smbase 7b9e6000  entry 7b9ee000

  659 17:39:08.068369             ss_start 7b9f5c00  code_end 7b9ee208

  660 17:39:08.068771  CPU 0x1

  661 17:39:08.072043      smbase 7b9e5c00  entry 7b9edc00

  662 17:39:08.078364             ss_start 7b9f5800  code_end 7b9ede08

  663 17:39:08.078723  CPU 0x2

  664 17:39:08.082026      smbase 7b9e5800  entry 7b9ed800

  665 17:39:08.085170             ss_start 7b9f5400  code_end 7b9eda08

  666 17:39:08.088491  CPU 0x3

  667 17:39:08.091669      smbase 7b9e5400  entry 7b9ed400

  668 17:39:08.095372             ss_start 7b9f5000  code_end 7b9ed608

  669 17:39:08.095828  CPU 0x4

  670 17:39:08.101802      smbase 7b9e5000  entry 7b9ed000

  671 17:39:08.105118             ss_start 7b9f4c00  code_end 7b9ed208

  672 17:39:08.105604  CPU 0x5

  673 17:39:08.108311      smbase 7b9e4c00  entry 7b9ecc00

  674 17:39:08.115136             ss_start 7b9f4800  code_end 7b9ece08

  675 17:39:08.115627  CPU 0x6

  676 17:39:08.118223      smbase 7b9e4800  entry 7b9ec800

  677 17:39:08.125119             ss_start 7b9f4400  code_end 7b9eca08

  678 17:39:08.125534  CPU 0x7

  679 17:39:08.127969      smbase 7b9e4400  entry 7b9ec400

  680 17:39:08.131571             ss_start 7b9f4000  code_end 7b9ec608

  681 17:39:08.141576  Loading module at 0x7b9ee000 with entry 0x7b9ee000. filesize: 0x208 memsize: 0x208

  682 17:39:08.144975  Processing 11 relocs. Offset value of 0x7b9ee000

  683 17:39:08.151774  smm_place_entry_code: smbase 7b9e4400, stack_top 7b804000

  684 17:39:08.158628  SMM Module: placing smm entry code at 7b9edc00,  cpu # 0x1

  685 17:39:08.165259  smm_place_entry_code: copying from 7b9ee000 to 7b9edc00 0x208 bytes

  686 17:39:08.171768  SMM Module: placing smm entry code at 7b9ed800,  cpu # 0x2

  687 17:39:08.178157  smm_place_entry_code: copying from 7b9ee000 to 7b9ed800 0x208 bytes

  688 17:39:08.181678  SMM Module: placing smm entry code at 7b9ed400,  cpu # 0x3

  689 17:39:08.188888  smm_place_entry_code: copying from 7b9ee000 to 7b9ed400 0x208 bytes

  690 17:39:08.194952  SMM Module: placing smm entry code at 7b9ed000,  cpu # 0x4

  691 17:39:08.201257  smm_place_entry_code: copying from 7b9ee000 to 7b9ed000 0x208 bytes

  692 17:39:08.208090  SMM Module: placing smm entry code at 7b9ecc00,  cpu # 0x5

  693 17:39:08.214757  smm_place_entry_code: copying from 7b9ee000 to 7b9ecc00 0x208 bytes

  694 17:39:08.221578  SMM Module: placing smm entry code at 7b9ec800,  cpu # 0x6

  695 17:39:08.228465  smm_place_entry_code: copying from 7b9ee000 to 7b9ec800 0x208 bytes

  696 17:39:08.231800  SMM Module: placing smm entry code at 7b9ec400,  cpu # 0x7

  697 17:39:08.238407  smm_place_entry_code: copying from 7b9ee000 to 7b9ec400 0x208 bytes

  698 17:39:08.244758  smm_module_setup_stub: stack_top = 0x7b804000

  699 17:39:08.248070  smm_module_setup_stub: per cpu stack_size = 0x800

  700 17:39:08.254827  smm_module_setup_stub: runtime.start32_offset = 0x4c

  701 17:39:08.257932  smm_module_setup_stub: runtime.smm_size = 0x200000

  702 17:39:08.264819  SMM Module: stub loaded at 7b9ee000. Will call 0x7b9f6d5f

  703 17:39:08.269260  Clearing SMI status registers

  704 17:39:08.272906  SMI_STS: PM1 

  705 17:39:08.273253  PM1_STS: WAK PWRBTN 

  706 17:39:08.283106  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e6000, cpu = 0

  707 17:39:08.286462  In relocation handler: CPU 0

  708 17:39:08.289748  New SMBASE=0x7b9e6000 IEDBASE=0x7bc00000

  709 17:39:08.292747  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  710 17:39:08.296007  Relocation complete.

  711 17:39:08.302920  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4800, cpu = 6

  712 17:39:08.305942  In relocation handler: CPU 6

  713 17:39:08.309657  New SMBASE=0x7b9e4800 IEDBASE=0x7bc00000

  714 17:39:08.312688  Relocation complete.

  715 17:39:08.319158  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5000, cpu = 4

  716 17:39:08.322396  In relocation handler: CPU 4

  717 17:39:08.326197  New SMBASE=0x7b9e5000 IEDBASE=0x7bc00000

  718 17:39:08.332263  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  719 17:39:08.332656  Relocation complete.

  720 17:39:08.338742  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5800, cpu = 2

  721 17:39:08.342342  In relocation handler: CPU 2

  722 17:39:08.345564  New SMBASE=0x7b9e5800 IEDBASE=0x7bc00000

  723 17:39:08.352136  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  724 17:39:08.356247  Relocation complete.

  725 17:39:08.362024  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5400, cpu = 3

  726 17:39:08.365537  In relocation handler: CPU 3

  727 17:39:08.368660  New SMBASE=0x7b9e5400 IEDBASE=0x7bc00000

  728 17:39:08.371787  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  729 17:39:08.375705  Relocation complete.

  730 17:39:08.382329  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e5c00, cpu = 1

  731 17:39:08.385947  In relocation handler: CPU 1

  732 17:39:08.389631  New SMBASE=0x7b9e5c00 IEDBASE=0x7bc00000

  733 17:39:08.396344  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  734 17:39:08.396806  Relocation complete.

  735 17:39:08.402790  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4c00, cpu = 5

  736 17:39:08.406526  In relocation handler: CPU 5

  737 17:39:08.412811  New SMBASE=0x7b9e4c00 IEDBASE=0x7bc00000

  738 17:39:08.413273  Relocation complete.

  739 17:39:08.419040  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9e4400, cpu = 7

  740 17:39:08.422801  In relocation handler: CPU 7

  741 17:39:08.426180  New SMBASE=0x7b9e4400 IEDBASE=0x7bc00000

  742 17:39:08.432951  Writing SMRR. base = 0x7b800006, mask=0xff800c00

  743 17:39:08.436212  Relocation complete.

  744 17:39:08.436724  Initializing CPU #0

  745 17:39:08.438948  CPU: vendor Intel device 906a4

  746 17:39:08.442828  CPU: family 06, model 9a, stepping 04

  747 17:39:08.445953  Clearing out pending MCEs

  748 17:39:08.448934  cpu: energy policy set to 7

  749 17:39:08.452411  Turbo is available but hidden

  750 17:39:08.455748  Turbo is available and visible

  751 17:39:08.459266  microcode: Update skipped, already up-to-date

  752 17:39:08.462352  CPU #0 initialized

  753 17:39:08.462706  Initializing CPU #6

  754 17:39:08.465865  Initializing CPU #3

  755 17:39:08.468727  Initializing CPU #4

  756 17:39:08.472205  CPU: vendor Intel device 906a4

  757 17:39:08.475477  CPU: family 06, model 9a, stepping 04

  758 17:39:08.475536  Initializing CPU #1

  759 17:39:08.479228  Clearing out pending MCEs

  760 17:39:08.482343  CPU: vendor Intel device 906a4

  761 17:39:08.485917  CPU: family 06, model 9a, stepping 04

  762 17:39:08.488724  Initializing CPU #2

  763 17:39:08.492104  CPU: vendor Intel device 906a4

  764 17:39:08.495768  CPU: family 06, model 9a, stepping 04

  765 17:39:08.498836  CPU: vendor Intel device 906a4

  766 17:39:08.502173  CPU: family 06, model 9a, stepping 04

  767 17:39:08.505527  CPU: vendor Intel device 906a4

  768 17:39:08.508683  CPU: family 06, model 9a, stepping 04

  769 17:39:08.511938  Clearing out pending MCEs

  770 17:39:08.515556  Clearing out pending MCEs

  771 17:39:08.516027  Clearing out pending MCEs

  772 17:39:08.519129  cpu: energy policy set to 7

  773 17:39:08.522463  cpu: energy policy set to 7

  774 17:39:08.529042  microcode: Update skipped, already up-to-date

  775 17:39:08.529416  CPU #4 initialized

  776 17:39:08.532661  Initializing CPU #7

  777 17:39:08.536167  cpu: energy policy set to 7

  778 17:39:08.536676  cpu: energy policy set to 7

  779 17:39:08.542107  microcode: Update skipped, already up-to-date

  780 17:39:08.542407  CPU #2 initialized

  781 17:39:08.548841  microcode: Update skipped, already up-to-date

  782 17:39:08.549201  CPU #1 initialized

  783 17:39:08.555914  microcode: Update skipped, already up-to-date

  784 17:39:08.556304  CPU #3 initialized

  785 17:39:08.558819  Initializing CPU #5

  786 17:39:08.562432  CPU: vendor Intel device 906a4

  787 17:39:08.565581  CPU: family 06, model 9a, stepping 04

  788 17:39:08.568482  CPU: vendor Intel device 906a4

  789 17:39:08.571976  CPU: family 06, model 9a, stepping 04

  790 17:39:08.575603  Clearing out pending MCEs

  791 17:39:08.579097  Clearing out pending MCEs

  792 17:39:08.582121  Clearing out pending MCEs

  793 17:39:08.582265  cpu: energy policy set to 7

  794 17:39:08.585654  cpu: energy policy set to 7

  795 17:39:08.591650  microcode: Update skipped, already up-to-date

  796 17:39:08.591724  CPU #7 initialized

  797 17:39:08.598896  microcode: Update skipped, already up-to-date

  798 17:39:08.598958  CPU #5 initialized

  799 17:39:08.601800  cpu: energy policy set to 7

  800 17:39:08.604883  microcode: Update skipped, already up-to-date

  801 17:39:08.608875  CPU #6 initialized

  802 17:39:08.611509  bsp_do_flight_plan done after 701 msecs.

  803 17:39:08.615061  CPU: frequency set to 4400 MHz

  804 17:39:08.618579  Enabling SMIs.

  805 17:39:08.625269  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 380 / 521 ms

  806 17:39:08.640229  Probing TPM I2C: done! DID_VID 0x00281ae0

  807 17:39:08.643065  Locality already claimed

  808 17:39:08.646900  cr50 TPM 2.0 (i2c 1:0x50 id 0x28)

  809 17:39:08.657798  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.6.111/cr50_v3.9

  810 17:39:08.661352  Enabling GPIO PM b/c CR50 has long IRQ pulse support

  811 17:39:08.668815  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

  812 17:39:08.674926  CBFS: Found 'vbt.bin' @0x7d7c0 size 0x4e9 in mcache @0x76add1b8

  813 17:39:08.677617  Found a VBT of 9216 bytes after decompression

  814 17:39:08.681180  PCI  1.0, PIN A, using IRQ #16

  815 17:39:08.684474  PCI  2.0, PIN A, using IRQ #17

  816 17:39:08.687527  PCI  4.0, PIN A, using IRQ #18

  817 17:39:08.691349  PCI  5.0, PIN A, using IRQ #16

  818 17:39:08.694522  PCI  6.0, PIN A, using IRQ #16

  819 17:39:08.698254  PCI  6.2, PIN C, using IRQ #18

  820 17:39:08.701158  PCI  7.0, PIN A, using IRQ #19

  821 17:39:08.704859  PCI  7.1, PIN B, using IRQ #20

  822 17:39:08.708050  PCI  7.2, PIN C, using IRQ #21

  823 17:39:08.711423  PCI  7.3, PIN D, using IRQ #22

  824 17:39:08.714382  PCI  8.0, PIN A, using IRQ #23

  825 17:39:08.717507  PCI  D.0, PIN A, using IRQ #17

  826 17:39:08.720883  PCI  D.1, PIN B, using IRQ #19

  827 17:39:08.720959  PCI 10.0, PIN A, using IRQ #24

  828 17:39:08.724256  PCI 10.1, PIN B, using IRQ #25

  829 17:39:08.727421  PCI 10.6, PIN C, using IRQ #20

  830 17:39:08.731366  PCI 10.7, PIN D, using IRQ #21

  831 17:39:08.734553  PCI 11.0, PIN A, using IRQ #26

  832 17:39:08.738120  PCI 11.1, PIN B, using IRQ #27

  833 17:39:08.741026  PCI 11.2, PIN C, using IRQ #28

  834 17:39:08.744366  PCI 11.3, PIN D, using IRQ #29

  835 17:39:08.747510  PCI 12.0, PIN A, using IRQ #30

  836 17:39:08.750809  PCI 12.6, PIN B, using IRQ #31

  837 17:39:08.754304  PCI 12.7, PIN C, using IRQ #22

  838 17:39:08.757413  PCI 13.0, PIN A, using IRQ #32

  839 17:39:08.761053  PCI 13.1, PIN B, using IRQ #33

  840 17:39:08.764448  PCI 13.2, PIN C, using IRQ #34

  841 17:39:08.767566  PCI 13.3, PIN D, using IRQ #35

  842 17:39:08.770890  PCI 14.0, PIN B, using IRQ #23

  843 17:39:08.775283  PCI 14.1, PIN A, using IRQ #36

  844 17:39:08.775752  PCI 14.3, PIN C, using IRQ #17

  845 17:39:08.777940  PCI 15.0, PIN A, using IRQ #37

  846 17:39:08.780420  PCI 15.1, PIN B, using IRQ #38

  847 17:39:08.783808  PCI 15.2, PIN C, using IRQ #39

  848 17:39:08.787052  PCI 15.3, PIN D, using IRQ #40

  849 17:39:08.790693  PCI 16.0, PIN A, using IRQ #18

  850 17:39:08.793845  PCI 16.1, PIN B, using IRQ #19

  851 17:39:08.797826  PCI 16.2, PIN C, using IRQ #20

  852 17:39:08.800969  PCI 16.3, PIN D, using IRQ #21

  853 17:39:08.804389  PCI 16.4, PIN A, using IRQ #18

  854 17:39:08.807105  PCI 16.5, PIN B, using IRQ #19

  855 17:39:08.810704  PCI 17.0, PIN A, using IRQ #22

  856 17:39:08.814243  PCI 19.0, PIN A, using IRQ #41

  857 17:39:08.817230  PCI 19.1, PIN B, using IRQ #42

  858 17:39:08.820870  PCI 19.2, PIN C, using IRQ #43

  859 17:39:08.824025  PCI 1C.0, PIN A, using IRQ #16

  860 17:39:08.827700  PCI 1C.1, PIN B, using IRQ #17

  861 17:39:08.828037  PCI 1C.2, PIN C, using IRQ #18

  862 17:39:08.831001  PCI 1C.3, PIN D, using IRQ #19

  863 17:39:08.834076  PCI 1C.4, PIN A, using IRQ #16

  864 17:39:08.837571  PCI 1C.5, PIN B, using IRQ #17

  865 17:39:08.840398  PCI 1C.6, PIN C, using IRQ #18

  866 17:39:08.843694  PCI 1C.7, PIN D, using IRQ #19

  867 17:39:08.847368  PCI 1D.0, PIN A, using IRQ #16

  868 17:39:08.850117  PCI 1D.1, PIN B, using IRQ #17

  869 17:39:08.853289  PCI 1D.2, PIN C, using IRQ #18

  870 17:39:08.857077  PCI 1D.3, PIN D, using IRQ #19

  871 17:39:08.860267  PCI 1E.0, PIN A, using IRQ #23

  872 17:39:08.864408  PCI 1E.1, PIN B, using IRQ #20

  873 17:39:08.867252  PCI 1E.2, PIN C, using IRQ #44

  874 17:39:08.870893  PCI 1E.3, PIN D, using IRQ #45

  875 17:39:08.874055  PCI 1F.3, PIN B, using IRQ #22

  876 17:39:08.878062  PCI 1F.4, PIN C, using IRQ #23

  877 17:39:08.878511  PCI 1F.6, PIN D, using IRQ #20

  878 17:39:08.880415  PCI 1F.7, PIN A, using IRQ #21

  879 17:39:08.886992  IRQ: Using dynamically assigned PCI IO-APIC IRQs

  880 17:39:08.893434  WEAK: src/soc/intel/alderlake/fsp_params.c/mainboard_silicon_init_params called

  881 17:39:09.075289  FSPS returned 0

  882 17:39:09.078735  Executing Phase 1 of FspMultiPhaseSiInit

  883 17:39:09.088434  FSP MultiPhaseSiInit src/soc/intel/alderlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  884 17:39:09.091624  port C0 DISC req: usage 1 usb3 1 usb2 1

  885 17:39:09.095321  Raw Buffer output 0 00000111

  886 17:39:09.098555  Raw Buffer output 1 00000000

  887 17:39:09.102228  pmc_send_ipc_cmd succeeded

  888 17:39:09.109100  port C1 DISC req: usage 1 usb3 3 usb2 3

  889 17:39:09.109643  Raw Buffer output 0 00000331

  890 17:39:09.112587  Raw Buffer output 1 00000000

  891 17:39:09.116566  pmc_send_ipc_cmd succeeded

  892 17:39:09.120940  Detected 6 core, 8 thread CPU.

  893 17:39:09.123474  Detected 6 core, 8 thread CPU.

  894 17:39:09.128767  Detected 6 core, 8 thread CPU.

  895 17:39:09.132564  Detected 6 core, 8 thread CPU.

  896 17:39:09.136074  Detected 6 core, 8 thread CPU.

  897 17:39:09.139104  Detected 6 core, 8 thread CPU.

  898 17:39:09.142089  Detected 6 core, 8 thread CPU.

  899 17:39:09.145025  Detected 6 core, 8 thread CPU.

  900 17:39:09.148603  Detected 6 core, 8 thread CPU.

  901 17:39:09.152245  Detected 6 core, 8 thread CPU.

  902 17:39:09.155586  Detected 6 core, 8 thread CPU.

  903 17:39:09.158733  Detected 6 core, 8 thread CPU.

  904 17:39:09.162044  Detected 6 core, 8 thread CPU.

  905 17:39:09.165328  Detected 6 core, 8 thread CPU.

  906 17:39:09.169088  Detected 6 core, 8 thread CPU.

  907 17:39:09.172749  Detected 6 core, 8 thread CPU.

  908 17:39:09.175640  Detected 6 core, 8 thread CPU.

  909 17:39:09.179295  Detected 6 core, 8 thread CPU.

  910 17:39:09.182048  Detected 6 core, 8 thread CPU.

  911 17:39:09.186013  Detected 6 core, 8 thread CPU.

  912 17:39:09.188749  Detected 6 core, 8 thread CPU.

  913 17:39:09.189127  Detected 6 core, 8 thread CPU.

  914 17:39:09.481178  Detected 6 core, 8 thread CPU.

  915 17:39:09.484297  Detected 6 core, 8 thread CPU.

  916 17:39:09.487676  Detected 6 core, 8 thread CPU.

  917 17:39:09.491397  Detected 6 core, 8 thread CPU.

  918 17:39:09.494922  Detected 6 core, 8 thread CPU.

  919 17:39:09.498069  Detected 6 core, 8 thread CPU.

  920 17:39:09.501029  Detected 6 core, 8 thread CPU.

  921 17:39:09.504651  Detected 6 core, 8 thread CPU.

  922 17:39:09.508376  Detected 6 core, 8 thread CPU.

  923 17:39:09.511578  Detected 6 core, 8 thread CPU.

  924 17:39:09.514676  Detected 6 core, 8 thread CPU.

  925 17:39:09.517792  Detected 6 core, 8 thread CPU.

  926 17:39:09.521186  Detected 6 core, 8 thread CPU.

  927 17:39:09.524460  Detected 6 core, 8 thread CPU.

  928 17:39:09.527934  Detected 6 core, 8 thread CPU.

  929 17:39:09.531116  Detected 6 core, 8 thread CPU.

  930 17:39:09.534847  Detected 6 core, 8 thread CPU.

  931 17:39:09.538235  Detected 6 core, 8 thread CPU.

  932 17:39:09.541135  Detected 6 core, 8 thread CPU.

  933 17:39:09.544477  Detected 6 core, 8 thread CPU.

  934 17:39:09.547989  Display FSP Version Info HOB

  935 17:39:09.551034  Reference Code - CPU = c.0.65.70

  936 17:39:09.551414  uCode Version = 0.0.4.23

  937 17:39:09.554148  TXT ACM version = ff.ff.ff.ffff

  938 17:39:09.557427  Reference Code - ME = c.0.65.70

  939 17:39:09.561431  MEBx version = 0.0.0.0

  940 17:39:09.564165  ME Firmware Version = Lite SKU

  941 17:39:09.567937  Reference Code - PCH = c.0.65.70

  942 17:39:09.571097  PCH-CRID Status = Disabled

  943 17:39:09.574126  PCH-CRID Original Value = ff.ff.ff.ffff

  944 17:39:09.577466  PCH-CRID New Value = ff.ff.ff.ffff

  945 17:39:09.580987  OPROM - RST - RAID = ff.ff.ff.ffff

  946 17:39:09.584415  PCH Hsio Version = 4.0.0.0

  947 17:39:09.587916  Reference Code - SA - System Agent = c.0.65.70

  948 17:39:09.590919  Reference Code - MRC = 0.0.3.80

  949 17:39:09.593975  SA - PCIe Version = c.0.65.70

  950 17:39:09.597196  SA-CRID Status = Disabled

  951 17:39:09.600724  SA-CRID Original Value = 0.0.0.4

  952 17:39:09.604004  SA-CRID New Value = 0.0.0.4

  953 17:39:09.607170  OPROM - VBIOS = ff.ff.ff.ffff

  954 17:39:09.610594  IO Manageability Engine FW Version = 24.0.4.0

  955 17:39:09.613835  PHY Build Version = 0.0.0.2016

  956 17:39:09.617907  Thunderbolt(TM) FW Version = 0.0.0.0

  957 17:39:09.624383  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  958 17:39:09.631492  BS: BS_DEV_INIT_CHIPS run times (exec / console): 492 / 507 ms

  959 17:39:09.634890  Enumerating buses...

  960 17:39:09.637371  Show all devs... Before device enumeration.

  961 17:39:09.641542  Root Device: enabled 1

  962 17:39:09.642011  CPU_CLUSTER: 0: enabled 1

  963 17:39:09.644895  DOMAIN: 0000: enabled 1

  964 17:39:09.647374  GPIO: 0: enabled 1

  965 17:39:09.647740  PCI: 00:00.0: enabled 1

  966 17:39:09.650669  PCI: 00:01.0: enabled 0

  967 17:39:09.654352  PCI: 00:01.1: enabled 0

  968 17:39:09.658003  PCI: 00:02.0: enabled 1

  969 17:39:09.658437  PCI: 00:04.0: enabled 1

  970 17:39:09.660645  PCI: 00:05.0: enabled 0

  971 17:39:09.664184  PCI: 00:06.0: enabled 1

  972 17:39:09.668080  PCI: 00:06.2: enabled 0

  973 17:39:09.668430  PCI: 00:07.0: enabled 0

  974 17:39:09.670759  PCI: 00:07.1: enabled 0

  975 17:39:09.674184  PCI: 00:07.2: enabled 0

  976 17:39:09.678001  PCI: 00:07.3: enabled 0

  977 17:39:09.678333  PCI: 00:08.0: enabled 0

  978 17:39:09.680613  PCI: 00:09.0: enabled 0

  979 17:39:09.684028  PCI: 00:0a.0: enabled 1

  980 17:39:09.684088  PCI: 00:0d.0: enabled 1

  981 17:39:09.687447  PCI: 00:0d.1: enabled 0

  982 17:39:09.690913  PCI: 00:0d.2: enabled 0

  983 17:39:09.694205  PCI: 00:0d.3: enabled 0

  984 17:39:09.694736  PCI: 00:0e.0: enabled 0

  985 17:39:09.698029  PCI: 00:10.0: enabled 0

  986 17:39:09.701064  PCI: 00:10.1: enabled 0

  987 17:39:09.703984  PCI: 00:10.6: enabled 0

  988 17:39:09.704335  PCI: 00:10.7: enabled 0

  989 17:39:09.707666  PCI: 00:12.0: enabled 0

  990 17:39:09.711030  PCI: 00:12.6: enabled 0

  991 17:39:09.714152  PCI: 00:12.7: enabled 0

  992 17:39:09.714565  PCI: 00:13.0: enabled 0

  993 17:39:09.717442  PCI: 00:14.0: enabled 1

  994 17:39:09.720601  PCI: 00:14.1: enabled 0

  995 17:39:09.720908  PCI: 00:14.2: enabled 1

  996 17:39:09.724381  PCI: 00:14.3: enabled 1

  997 17:39:09.727441  PCI: 00:15.0: enabled 1

  998 17:39:09.730831  PCI: 00:15.1: enabled 1

  999 17:39:09.731144  PCI: 00:15.2: enabled 0

 1000 17:39:09.733999  PCI: 00:15.3: enabled 1

 1001 17:39:09.737823  PCI: 00:16.0: enabled 1

 1002 17:39:09.740731  PCI: 00:16.1: enabled 0

 1003 17:39:09.741086  PCI: 00:16.2: enabled 0

 1004 17:39:09.744387  PCI: 00:16.3: enabled 0

 1005 17:39:09.747689  PCI: 00:16.4: enabled 0

 1006 17:39:09.751079  PCI: 00:16.5: enabled 0

 1007 17:39:09.751403  PCI: 00:17.0: enabled 1

 1008 17:39:09.754288  PCI: 00:19.0: enabled 0

 1009 17:39:09.757691  PCI: 00:19.1: enabled 1

 1010 17:39:09.758014  PCI: 00:19.2: enabled 0

 1011 17:39:09.760676  PCI: 00:1a.0: enabled 0

 1012 17:39:09.764189  PCI: 00:1c.0: enabled 0

 1013 17:39:09.767737  PCI: 00:1c.1: enabled 0

 1014 17:39:09.768208  PCI: 00:1c.2: enabled 0

 1015 17:39:09.771107  PCI: 00:1c.3: enabled 0

 1016 17:39:09.774259  PCI: 00:1c.4: enabled 0

 1017 17:39:09.778047  PCI: 00:1c.5: enabled 0

 1018 17:39:09.778525  PCI: 00:1c.6: enabled 0

 1019 17:39:09.780907  PCI: 00:1c.7: enabled 0

 1020 17:39:09.784320  PCI: 00:1d.0: enabled 0

 1021 17:39:09.787540  PCI: 00:1d.1: enabled 0

 1022 17:39:09.787968  PCI: 00:1d.2: enabled 0

 1023 17:39:09.790747  PCI: 00:1d.3: enabled 0

 1024 17:39:09.793888  PCI: 00:1e.0: enabled 1

 1025 17:39:09.794217  PCI: 00:1e.1: enabled 0

 1026 17:39:09.797192  PCI: 00:1e.2: enabled 0

 1027 17:39:09.800723  PCI: 00:1e.3: enabled 1

 1028 17:39:09.804295  PCI: 00:1f.0: enabled 1

 1029 17:39:09.804632  PCI: 00:1f.1: enabled 0

 1030 17:39:09.807558  PCI: 00:1f.2: enabled 1

 1031 17:39:09.810836  PCI: 00:1f.3: enabled 1

 1032 17:39:09.813689  PCI: 00:1f.4: enabled 0

 1033 17:39:09.813755  PCI: 00:1f.5: enabled 1

 1034 17:39:09.817117  PCI: 00:1f.6: enabled 0

 1035 17:39:09.820745  PCI: 00:1f.7: enabled 0

 1036 17:39:09.823840  GENERIC: 0.0: enabled 1

 1037 17:39:09.823899  GENERIC: 0.0: enabled 1

 1038 17:39:09.827433  GENERIC: 1.0: enabled 1

 1039 17:39:09.830613  GENERIC: 0.0: enabled 1

 1040 17:39:09.830669  GENERIC: 1.0: enabled 1

 1041 17:39:09.833860  USB0 port 0: enabled 1

 1042 17:39:09.837087  USB0 port 0: enabled 1

 1043 17:39:09.840302  GENERIC: 0.0: enabled 1

 1044 17:39:09.840357  I2C: 00:1a: enabled 1

 1045 17:39:09.843967  I2C: 00:31: enabled 1

 1046 17:39:09.847277  I2C: 00:32: enabled 1

 1047 17:39:09.847339  I2C: 00:50: enabled 1

 1048 17:39:09.850986  I2C: 00:10: enabled 1

 1049 17:39:09.853576  I2C: 00:15: enabled 1

 1050 17:39:09.853639  I2C: 00:2c: enabled 1

 1051 17:39:09.856927  GENERIC: 0.0: enabled 1

 1052 17:39:09.860689  SPI: 00: enabled 1

 1053 17:39:09.860750  PNP: 0c09.0: enabled 1

 1054 17:39:09.863452  GENERIC: 0.0: enabled 1

 1055 17:39:09.866969  USB3 port 0: enabled 1

 1056 17:39:09.867035  USB3 port 1: enabled 0

 1057 17:39:09.870103  USB3 port 2: enabled 1

 1058 17:39:09.873941  USB3 port 3: enabled 0

 1059 17:39:09.877154  USB2 port 0: enabled 1

 1060 17:39:09.877213  USB2 port 1: enabled 0

 1061 17:39:09.880394  USB2 port 2: enabled 1

 1062 17:39:09.883672  USB2 port 3: enabled 0

 1063 17:39:09.883730  USB2 port 4: enabled 0

 1064 17:39:09.887198  USB2 port 5: enabled 1

 1065 17:39:09.890465  USB2 port 6: enabled 0

 1066 17:39:09.893644  USB2 port 7: enabled 0

 1067 17:39:09.893704  USB2 port 8: enabled 1

 1068 17:39:09.897056  USB2 port 9: enabled 1

 1069 17:39:09.900200  USB3 port 0: enabled 1

 1070 17:39:09.900257  USB3 port 1: enabled 0

 1071 17:39:09.903519  USB3 port 2: enabled 0

 1072 17:39:09.907113  USB3 port 3: enabled 0

 1073 17:39:09.910093  GENERIC: 0.0: enabled 1

 1074 17:39:09.910153  GENERIC: 1.0: enabled 1

 1075 17:39:09.913569  APIC: 00: enabled 1

 1076 17:39:09.913630  APIC: 14: enabled 1

 1077 17:39:09.916858  APIC: 16: enabled 1

 1078 17:39:09.920139  APIC: 10: enabled 1

 1079 17:39:09.920198  APIC: 12: enabled 1

 1080 17:39:09.923738  APIC: 09: enabled 1

 1081 17:39:09.927329  APIC: 01: enabled 1

 1082 17:39:09.927386  APIC: 08: enabled 1

 1083 17:39:09.930353  Compare with tree...

 1084 17:39:09.933533  Root Device: enabled 1

 1085 17:39:09.933593   CPU_CLUSTER: 0: enabled 1

 1086 17:39:09.936574    APIC: 00: enabled 1

 1087 17:39:09.940246    APIC: 14: enabled 1

 1088 17:39:09.940306    APIC: 16: enabled 1

 1089 17:39:09.943689    APIC: 10: enabled 1

 1090 17:39:09.946966    APIC: 12: enabled 1

 1091 17:39:09.947029    APIC: 09: enabled 1

 1092 17:39:09.950270    APIC: 01: enabled 1

 1093 17:39:09.953333    APIC: 08: enabled 1

 1094 17:39:09.956915   DOMAIN: 0000: enabled 1

 1095 17:39:09.956975    GPIO: 0: enabled 1

 1096 17:39:09.960084    PCI: 00:00.0: enabled 1

 1097 17:39:09.963466    PCI: 00:01.0: enabled 0

 1098 17:39:09.967086    PCI: 00:01.1: enabled 0

 1099 17:39:09.967143    PCI: 00:02.0: enabled 1

 1100 17:39:09.970063    PCI: 00:04.0: enabled 1

 1101 17:39:09.973232     GENERIC: 0.0: enabled 1

 1102 17:39:09.976453    PCI: 00:05.0: enabled 0

 1103 17:39:09.980468    PCI: 00:06.0: enabled 1

 1104 17:39:09.980527    PCI: 00:06.2: enabled 0

 1105 17:39:09.983301    PCI: 00:08.0: enabled 0

 1106 17:39:09.986995    PCI: 00:09.0: enabled 0

 1107 17:39:09.990059    PCI: 00:0a.0: enabled 1

 1108 17:39:09.993585    PCI: 00:0d.0: enabled 1

 1109 17:39:09.993640     USB0 port 0: enabled 1

 1110 17:39:09.996594      USB3 port 0: enabled 1

 1111 17:39:10.000123      USB3 port 1: enabled 0

 1112 17:39:10.003491      USB3 port 2: enabled 1

 1113 17:39:10.006715      USB3 port 3: enabled 0

 1114 17:39:10.006772    PCI: 00:0d.1: enabled 0

 1115 17:39:10.009891    PCI: 00:0d.2: enabled 0

 1116 17:39:10.013830    PCI: 00:0d.3: enabled 0

 1117 17:39:10.016366    PCI: 00:0e.0: enabled 0

 1118 17:39:10.020512    PCI: 00:10.0: enabled 0

 1119 17:39:10.020581    PCI: 00:10.1: enabled 0

 1120 17:39:10.023455    PCI: 00:10.6: enabled 0

 1121 17:39:10.026701    PCI: 00:10.7: enabled 0

 1122 17:39:10.029824    PCI: 00:12.0: enabled 0

 1123 17:39:10.033309    PCI: 00:12.6: enabled 0

 1124 17:39:10.033364    PCI: 00:12.7: enabled 0

 1125 17:39:10.037077    PCI: 00:13.0: enabled 0

 1126 17:39:10.040196    PCI: 00:14.0: enabled 1

 1127 17:39:10.043141     USB0 port 0: enabled 1

 1128 17:39:10.046499      USB2 port 0: enabled 1

 1129 17:39:10.046556      USB2 port 1: enabled 0

 1130 17:39:10.049768      USB2 port 2: enabled 1

 1131 17:39:10.053066      USB2 port 3: enabled 0

 1132 17:39:10.056415      USB2 port 4: enabled 0

 1133 17:39:10.059999      USB2 port 5: enabled 1

 1134 17:39:10.060067      USB2 port 6: enabled 0

 1135 17:39:10.063353      USB2 port 7: enabled 0

 1136 17:39:10.066724      USB2 port 8: enabled 1

 1137 17:39:10.070138      USB2 port 9: enabled 1

 1138 17:39:10.073484      USB3 port 0: enabled 1

 1139 17:39:10.073568      USB3 port 1: enabled 0

 1140 17:39:10.076704      USB3 port 2: enabled 0

 1141 17:39:10.080154      USB3 port 3: enabled 0

 1142 17:39:10.083528    PCI: 00:14.1: enabled 0

 1143 17:39:10.086652    PCI: 00:14.2: enabled 1

 1144 17:39:10.090188    PCI: 00:14.3: enabled 1

 1145 17:39:10.090262     GENERIC: 0.0: enabled 1

 1146 17:39:10.093458    PCI: 00:15.0: enabled 1

 1147 17:39:10.096860     I2C: 00:1a: enabled 1

 1148 17:39:10.099861     I2C: 00:31: enabled 1

 1149 17:39:10.099934     I2C: 00:32: enabled 1

 1150 17:39:10.103384    PCI: 00:15.1: enabled 1

 1151 17:39:10.106830     I2C: 00:50: enabled 1

 1152 17:39:10.109858    PCI: 00:15.2: enabled 0

 1153 17:39:10.113398    PCI: 00:15.3: enabled 1

 1154 17:39:10.113486     I2C: 00:10: enabled 1

 1155 17:39:10.116582    PCI: 00:16.0: enabled 1

 1156 17:39:10.120171    PCI: 00:16.1: enabled 0

 1157 17:39:10.123645    PCI: 00:16.2: enabled 0

 1158 17:39:10.126746    PCI: 00:16.3: enabled 0

 1159 17:39:10.126819    PCI: 00:16.4: enabled 0

 1160 17:39:10.129908    PCI: 00:16.5: enabled 0

 1161 17:39:10.133600    PCI: 00:17.0: enabled 1

 1162 17:39:10.136437    PCI: 00:19.0: enabled 0

 1163 17:39:10.136512    PCI: 00:19.1: enabled 1

 1164 17:39:10.140149     I2C: 00:15: enabled 1

 1165 17:39:10.143480     I2C: 00:2c: enabled 1

 1166 17:39:10.146557    PCI: 00:19.2: enabled 0

 1167 17:39:10.150311    PCI: 00:1a.0: enabled 0

 1168 17:39:10.150388    PCI: 00:1e.0: enabled 1

 1169 17:39:10.153535    PCI: 00:1e.1: enabled 0

 1170 17:39:10.156799    PCI: 00:1e.2: enabled 0

 1171 17:39:10.159867    PCI: 00:1e.3: enabled 1

 1172 17:39:10.159944     SPI: 00: enabled 1

 1173 17:39:10.163107    PCI: 00:1f.0: enabled 1

 1174 17:39:10.166900     PNP: 0c09.0: enabled 1

 1175 17:39:10.170080    PCI: 00:1f.1: enabled 0

 1176 17:39:10.173322    PCI: 00:1f.2: enabled 1

 1177 17:39:10.173410     GENERIC: 0.0: enabled 1

 1178 17:39:10.176821      GENERIC: 0.0: enabled 1

 1179 17:39:10.180122      GENERIC: 1.0: enabled 1

 1180 17:39:10.183405    PCI: 00:1f.3: enabled 1

 1181 17:39:10.186607    PCI: 00:1f.4: enabled 0

 1182 17:39:10.186680    PCI: 00:1f.5: enabled 1

 1183 17:39:10.190150    PCI: 00:1f.6: enabled 0

 1184 17:39:10.193324    PCI: 00:1f.7: enabled 0

 1185 17:39:10.196694  Root Device scanning...

 1186 17:39:10.199736  scan_static_bus for Root Device

 1187 17:39:10.199815  CPU_CLUSTER: 0 enabled

 1188 17:39:10.203309  DOMAIN: 0000 enabled

 1189 17:39:10.206483  DOMAIN: 0000 scanning...

 1190 17:39:10.210302  PCI: pci_scan_bus for bus 00

 1191 17:39:10.213291  PCI: 00:00.0 [8086/0000] ops

 1192 17:39:10.216839  PCI: 00:00.0 [8086/4609] enabled

 1193 17:39:10.220103  PCI: 00:02.0 [8086/0000] bus ops

 1194 17:39:10.223451  PCI: 00:02.0 [8086/46b3] enabled

 1195 17:39:10.226681  PCI: 00:04.0 [8086/0000] bus ops

 1196 17:39:10.229871  PCI: 00:04.0 [8086/461d] enabled

 1197 17:39:10.233491  PCI: 00:06.0 [8086/0000] bus ops

 1198 17:39:10.236747  PCI: 00:06.0 [8086/464d] enabled

 1199 17:39:10.239982  PCI: 00:08.0 [8086/464f] disabled

 1200 17:39:10.243366  PCI: 00:0a.0 [8086/467d] enabled

 1201 17:39:10.246599  PCI: 00:0d.0 [8086/0000] bus ops

 1202 17:39:10.249817  PCI: 00:0d.0 [8086/461e] enabled

 1203 17:39:10.253271  PCI: 00:14.0 [8086/0000] bus ops

 1204 17:39:10.256407  PCI: 00:14.0 [8086/51ed] enabled

 1205 17:39:10.260021  PCI: 00:14.2 [8086/51ef] enabled

 1206 17:39:10.263693  PCI: 00:14.3 [8086/0000] bus ops

 1207 17:39:10.266614  PCI: 00:14.3 [8086/51f0] enabled

 1208 17:39:10.269818  PCI: 00:15.0 [8086/0000] bus ops

 1209 17:39:10.273129  PCI: 00:15.0 [8086/51e8] enabled

 1210 17:39:10.276769  PCI: 00:15.1 [8086/0000] bus ops

 1211 17:39:10.280004  PCI: 00:15.1 [8086/51e9] enabled

 1212 17:39:10.283377  PCI: 00:15.2 [8086/0000] bus ops

 1213 17:39:10.286452  PCI: 00:15.2 [8086/51ea] disabled

 1214 17:39:10.289797  PCI: 00:15.3 [8086/0000] bus ops

 1215 17:39:10.293094  PCI: 00:15.3 [8086/51eb] enabled

 1216 17:39:10.296825  PCI: 00:16.0 [8086/0000] ops

 1217 17:39:10.299805  PCI: 00:16.0 [8086/51e0] enabled

 1218 17:39:10.306799  PCI: Static device PCI: 00:17.0 not found, disabling it.

 1219 17:39:10.310101  PCI: 00:19.0 [8086/0000] bus ops

 1220 17:39:10.312964  PCI: 00:19.0 [8086/51c5] disabled

 1221 17:39:10.316611  PCI: 00:19.1 [8086/0000] bus ops

 1222 17:39:10.319872  PCI: 00:19.1 [8086/51c6] enabled

 1223 17:39:10.323357  PCI: 00:1e.0 [8086/0000] ops

 1224 17:39:10.326806  PCI: 00:1e.0 [8086/51a8] enabled

 1225 17:39:10.329817  PCI: 00:1e.3 [8086/0000] bus ops

 1226 17:39:10.332926  PCI: 00:1e.3 [8086/51ab] enabled

 1227 17:39:10.336708  PCI: 00:1f.0 [8086/0000] bus ops

 1228 17:39:10.339894  PCI: 00:1f.0 [8086/5182] enabled

 1229 17:39:10.339950  RTC Init

 1230 17:39:10.343228  Set power on after power failure.

 1231 17:39:10.346604  Disabling Deep S3

 1232 17:39:10.350339  Disabling Deep S3

 1233 17:39:10.350395  Disabling Deep S4

 1234 17:39:10.353148  Disabling Deep S4

 1235 17:39:10.353202  Disabling Deep S5

 1236 17:39:10.356524  Disabling Deep S5

 1237 17:39:10.359993  PCI: 00:1f.2 [0000/0000] hidden

 1238 17:39:10.363062  PCI: 00:1f.3 [8086/0000] bus ops

 1239 17:39:10.366687  PCI: 00:1f.3 [8086/51c8] enabled

 1240 17:39:10.369942  PCI: 00:1f.5 [8086/0000] bus ops

 1241 17:39:10.372989  PCI: 00:1f.5 [8086/51a4] enabled

 1242 17:39:10.373054  GPIO: 0 enabled

 1243 17:39:10.376587  PCI: Leftover static devices:

 1244 17:39:10.379518  PCI: 00:01.0

 1245 17:39:10.379579  PCI: 00:01.1

 1246 17:39:10.379632  PCI: 00:05.0

 1247 17:39:10.383050  PCI: 00:06.2

 1248 17:39:10.383107  PCI: 00:09.0

 1249 17:39:10.386379  PCI: 00:0d.1

 1250 17:39:10.386447  PCI: 00:0d.2

 1251 17:39:10.386496  PCI: 00:0d.3

 1252 17:39:10.389657  PCI: 00:0e.0

 1253 17:39:10.389717  PCI: 00:10.0

 1254 17:39:10.393074  PCI: 00:10.1

 1255 17:39:10.393134  PCI: 00:10.6

 1256 17:39:10.393182  PCI: 00:10.7

 1257 17:39:10.396341  PCI: 00:12.0

 1258 17:39:10.396402  PCI: 00:12.6

 1259 17:39:10.399575  PCI: 00:12.7

 1260 17:39:10.399631  PCI: 00:13.0

 1261 17:39:10.403167  PCI: 00:14.1

 1262 17:39:10.403226  PCI: 00:16.1

 1263 17:39:10.403272  PCI: 00:16.2

 1264 17:39:10.406701  PCI: 00:16.3

 1265 17:39:10.406763  PCI: 00:16.4

 1266 17:39:10.409887  PCI: 00:16.5

 1267 17:39:10.409946  PCI: 00:17.0

 1268 17:39:10.409996  PCI: 00:19.2

 1269 17:39:10.413123  PCI: 00:1a.0

 1270 17:39:10.413182  PCI: 00:1e.1

 1271 17:39:10.416734  PCI: 00:1e.2

 1272 17:39:10.416791  PCI: 00:1f.1

 1273 17:39:10.416838  PCI: 00:1f.4

 1274 17:39:10.419683  PCI: 00:1f.6

 1275 17:39:10.419752  PCI: 00:1f.7

 1276 17:39:10.423209  PCI: Check your devicetree.cb.

 1277 17:39:10.426504  PCI: 00:02.0 scanning...

 1278 17:39:10.429811  scan_generic_bus for PCI: 00:02.0

 1279 17:39:10.432916  scan_generic_bus for PCI: 00:02.0 done

 1280 17:39:10.439995  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

 1281 17:39:10.440060  PCI: 00:04.0 scanning...

 1282 17:39:10.443105  scan_generic_bus for PCI: 00:04.0

 1283 17:39:10.446608  GENERIC: 0.0 enabled

 1284 17:39:10.452931  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

 1285 17:39:10.457081  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

 1286 17:39:10.460161  PCI: 00:06.0 scanning...

 1287 17:39:10.463094  do_pci_scan_bridge for PCI: 00:06.0

 1288 17:39:10.466236  PCI: pci_scan_bus for bus 01

 1289 17:39:10.469845  PCI: 01:00.0 [15b7/5009] enabled

 1290 17:39:10.473253  Enabling Common Clock Configuration

 1291 17:39:10.476364  L1 Sub-State supported from root port 6

 1292 17:39:10.479730  L1 Sub-State Support = 0x5

 1293 17:39:10.482892  CommonModeRestoreTime = 0x6e

 1294 17:39:10.486444  Power On Value = 0x5, Power On Scale = 0x2

 1295 17:39:10.490308  ASPM: Enabled L1

 1296 17:39:10.493185  PCIe: Max_Payload_Size adjusted to 256

 1297 17:39:10.496305  PCI: 01:00.0: Enabled LTR

 1298 17:39:10.500190  PCI: 01:00.0: Programmed LTR max latencies

 1299 17:39:10.506365  scan_bus: bus PCI: 00:06.0 finished in 40 msecs

 1300 17:39:10.506441  PCI: 00:0d.0 scanning...

 1301 17:39:10.509813  scan_static_bus for PCI: 00:0d.0

 1302 17:39:10.512977  USB0 port 0 enabled

 1303 17:39:10.516763  USB0 port 0 scanning...

 1304 17:39:10.520028  scan_static_bus for USB0 port 0

 1305 17:39:10.520100  USB3 port 0 enabled

 1306 17:39:10.523253  USB3 port 1 disabled

 1307 17:39:10.526561  USB3 port 2 enabled

 1308 17:39:10.526626  USB3 port 3 disabled

 1309 17:39:10.529884  USB3 port 0 scanning...

 1310 17:39:10.533061  scan_static_bus for USB3 port 0

 1311 17:39:10.536634  scan_static_bus for USB3 port 0 done

 1312 17:39:10.539963  scan_bus: bus USB3 port 0 finished in 6 msecs

 1313 17:39:10.543345  USB3 port 2 scanning...

 1314 17:39:10.546384  scan_static_bus for USB3 port 2

 1315 17:39:10.550086  scan_static_bus for USB3 port 2 done

 1316 17:39:10.556456  scan_bus: bus USB3 port 2 finished in 6 msecs

 1317 17:39:10.559636  scan_static_bus for USB0 port 0 done

 1318 17:39:10.562903  scan_bus: bus USB0 port 0 finished in 43 msecs

 1319 17:39:10.566955  scan_static_bus for PCI: 00:0d.0 done

 1320 17:39:10.572933  scan_bus: bus PCI: 00:0d.0 finished in 59 msecs

 1321 17:39:10.572998  PCI: 00:14.0 scanning...

 1322 17:39:10.576476  scan_static_bus for PCI: 00:14.0

 1323 17:39:10.579471  USB0 port 0 enabled

 1324 17:39:10.583166  USB0 port 0 scanning...

 1325 17:39:10.586380  scan_static_bus for USB0 port 0

 1326 17:39:10.586438  USB2 port 0 enabled

 1327 17:39:10.589592  USB2 port 1 disabled

 1328 17:39:10.592794  USB2 port 2 enabled

 1329 17:39:10.592853  USB2 port 3 disabled

 1330 17:39:10.595958  USB2 port 4 disabled

 1331 17:39:10.599667  USB2 port 5 enabled

 1332 17:39:10.599728  USB2 port 6 disabled

 1333 17:39:10.602586  USB2 port 7 disabled

 1334 17:39:10.602641  USB2 port 8 enabled

 1335 17:39:10.605944  USB2 port 9 enabled

 1336 17:39:10.609302  USB3 port 0 enabled

 1337 17:39:10.609355  USB3 port 1 disabled

 1338 17:39:10.612941  USB3 port 2 disabled

 1339 17:39:10.616388  USB3 port 3 disabled

 1340 17:39:10.616455  USB2 port 0 scanning...

 1341 17:39:10.619371  scan_static_bus for USB2 port 0

 1342 17:39:10.623166  scan_static_bus for USB2 port 0 done

 1343 17:39:10.629238  scan_bus: bus USB2 port 0 finished in 6 msecs

 1344 17:39:10.632892  USB2 port 2 scanning...

 1345 17:39:10.636181  scan_static_bus for USB2 port 2

 1346 17:39:10.639403  scan_static_bus for USB2 port 2 done

 1347 17:39:10.642885  scan_bus: bus USB2 port 2 finished in 6 msecs

 1348 17:39:10.646181  USB2 port 5 scanning...

 1349 17:39:10.649106  scan_static_bus for USB2 port 5

 1350 17:39:10.652786  scan_static_bus for USB2 port 5 done

 1351 17:39:10.656073  scan_bus: bus USB2 port 5 finished in 6 msecs

 1352 17:39:10.659368  USB2 port 8 scanning...

 1353 17:39:10.662987  scan_static_bus for USB2 port 8

 1354 17:39:10.666145  scan_static_bus for USB2 port 8 done

 1355 17:39:10.669090  scan_bus: bus USB2 port 8 finished in 6 msecs

 1356 17:39:10.672738  USB2 port 9 scanning...

 1357 17:39:10.675771  scan_static_bus for USB2 port 9

 1358 17:39:10.679731  scan_static_bus for USB2 port 9 done

 1359 17:39:10.686179  scan_bus: bus USB2 port 9 finished in 6 msecs

 1360 17:39:10.686238  USB3 port 0 scanning...

 1361 17:39:10.689106  scan_static_bus for USB3 port 0

 1362 17:39:10.692324  scan_static_bus for USB3 port 0 done

 1363 17:39:10.699436  scan_bus: bus USB3 port 0 finished in 6 msecs

 1364 17:39:10.702659  scan_static_bus for USB0 port 0 done

 1365 17:39:10.705752  scan_bus: bus USB0 port 0 finished in 120 msecs

 1366 17:39:10.712516  scan_static_bus for PCI: 00:14.0 done

 1367 17:39:10.716265  scan_bus: bus PCI: 00:14.0 finished in 136 msecs

 1368 17:39:10.719304  PCI: 00:14.3 scanning...

 1369 17:39:10.722714  scan_static_bus for PCI: 00:14.3

 1370 17:39:10.722770  GENERIC: 0.0 enabled

 1371 17:39:10.729119  scan_static_bus for PCI: 00:14.3 done

 1372 17:39:10.732528  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

 1373 17:39:10.735889  PCI: 00:15.0 scanning...

 1374 17:39:10.739407  scan_static_bus for PCI: 00:15.0

 1375 17:39:10.739465  I2C: 00:1a enabled

 1376 17:39:10.742501  I2C: 00:31 enabled

 1377 17:39:10.742570  I2C: 00:32 enabled

 1378 17:39:10.748930  scan_static_bus for PCI: 00:15.0 done

 1379 17:39:10.752680  scan_bus: bus PCI: 00:15.0 finished in 12 msecs

 1380 17:39:10.755587  PCI: 00:15.1 scanning...

 1381 17:39:10.758926  scan_static_bus for PCI: 00:15.1

 1382 17:39:10.758981  I2C: 00:50 enabled

 1383 17:39:10.765576  scan_static_bus for PCI: 00:15.1 done

 1384 17:39:10.768963  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

 1385 17:39:10.772325  PCI: 00:15.3 scanning...

 1386 17:39:10.775556  scan_static_bus for PCI: 00:15.3

 1387 17:39:10.775643  I2C: 00:10 enabled

 1388 17:39:10.778883  scan_static_bus for PCI: 00:15.3 done

 1389 17:39:10.785445  scan_bus: bus PCI: 00:15.3 finished in 9 msecs

 1390 17:39:10.789106  PCI: 00:19.1 scanning...

 1391 17:39:10.792416  scan_static_bus for PCI: 00:19.1

 1392 17:39:10.792491  I2C: 00:15 enabled

 1393 17:39:10.795695  I2C: 00:2c enabled

 1394 17:39:10.799072  scan_static_bus for PCI: 00:19.1 done

 1395 17:39:10.802656  scan_bus: bus PCI: 00:19.1 finished in 11 msecs

 1396 17:39:10.805868  PCI: 00:1e.3 scanning...

 1397 17:39:10.808934  scan_generic_bus for PCI: 00:1e.3

 1398 17:39:10.812697  SPI: 00 enabled

 1399 17:39:10.816061  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1400 17:39:10.822561  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1401 17:39:10.825998  PCI: 00:1f.0 scanning...

 1402 17:39:10.829369  scan_static_bus for PCI: 00:1f.0

 1403 17:39:10.829442  PNP: 0c09.0 enabled

 1404 17:39:10.832637  PNP: 0c09.0 scanning...

 1405 17:39:10.835698  scan_static_bus for PNP: 0c09.0

 1406 17:39:10.839407  scan_static_bus for PNP: 0c09.0 done

 1407 17:39:10.842619  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1408 17:39:10.848901  scan_static_bus for PCI: 00:1f.0 done

 1409 17:39:10.852358  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1410 17:39:10.855640  PCI: 00:1f.2 scanning...

 1411 17:39:10.858832  scan_static_bus for PCI: 00:1f.2

 1412 17:39:10.858902  GENERIC: 0.0 enabled

 1413 17:39:10.862423  GENERIC: 0.0 scanning...

 1414 17:39:10.865863  scan_static_bus for GENERIC: 0.0

 1415 17:39:10.868895  GENERIC: 0.0 enabled

 1416 17:39:10.872451  GENERIC: 1.0 enabled

 1417 17:39:10.875184  scan_static_bus for GENERIC: 0.0 done

 1418 17:39:10.878583  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1419 17:39:10.882224  scan_static_bus for PCI: 00:1f.2 done

 1420 17:39:10.889255  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1421 17:39:10.891766  PCI: 00:1f.3 scanning...

 1422 17:39:10.895559  scan_static_bus for PCI: 00:1f.3

 1423 17:39:10.898656  scan_static_bus for PCI: 00:1f.3 done

 1424 17:39:10.901848  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1425 17:39:10.905327  PCI: 00:1f.5 scanning...

 1426 17:39:10.908722  scan_generic_bus for PCI: 00:1f.5

 1427 17:39:10.912071  scan_generic_bus for PCI: 00:1f.5 done

 1428 17:39:10.915691  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1429 17:39:10.921966  scan_bus: bus DOMAIN: 0000 finished in 710 msecs

 1430 17:39:10.925325  scan_static_bus for Root Device done

 1431 17:39:10.928689  scan_bus: bus Root Device finished in 729 msecs

 1432 17:39:10.932127  done

 1433 17:39:10.935155  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 1296 ms

 1434 17:39:10.942670  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (131072 bytes)

 1435 17:39:10.948648  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1436 17:39:10.951820  SPI flash protection: WPSW=0 SRP0=0

 1437 17:39:10.959099  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1438 17:39:10.962004  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 20 ms

 1439 17:39:10.965251  found VGA at PCI: 00:02.0

 1440 17:39:10.968846  Setting up VGA for PCI: 00:02.0

 1441 17:39:10.975640  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1442 17:39:10.978874  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1443 17:39:10.982134  Allocating resources...

 1444 17:39:10.982207  Reading resources...

 1445 17:39:10.988451  Root Device read_resources bus 0 link: 0

 1446 17:39:10.991921  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1447 17:39:10.998663  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1448 17:39:11.001709  DOMAIN: 0000 read_resources bus 0 link: 0

 1449 17:39:11.009513  SA MMIO resource: MCHBAR ->  base = 0xfedc0000, size = 0x20000

 1450 17:39:11.015354  SA MMIO resource: DMIBAR ->  base = 0xfeda0000, size = 0x1000

 1451 17:39:11.018813  SA MMIO resource: EPBAR ->  base = 0xfeda1000, size = 0x1000

 1452 17:39:11.025519  SA MMIO resource: REGBAR ->  base = 0xfb000000, size = 0x1000

 1453 17:39:11.032053  SA MMIO resource: EDRAMBAR ->  base = 0xfed80000, size = 0x4000

 1454 17:39:11.038369  SA MMIO resource: CRAB_ABORT ->  base = 0xfeb00000, size = 0x80000

 1455 17:39:11.045533  SA MMIO resource: TPM ->  base = 0xfed40000, size = 0x10000

 1456 17:39:11.052096  SA MMIO resource: LT_SECURITY ->  base = 0xfed50000, size = 0x20000

 1457 17:39:11.058472  SA MMIO resource: APIC ->  base = 0xfec00000, size = 0x100000

 1458 17:39:11.064884  SA MMIO resource: PCH_RESERVED ->  base = 0xfc800000, size = 0x2000000

 1459 17:39:11.071439  SA MMIO resource: GFXVTBAR ->  base = 0xfed90000, size = 0x1000

 1460 17:39:11.078322  SA MMIO resource: IPUVTBAR ->  base = 0xfed92000, size = 0x1000

 1461 17:39:11.084831  SA MMIO resource: TBT0BAR ->  base = 0xfed84000, size = 0x1000

 1462 17:39:11.088517  SA MMIO resource: TBT1BAR ->  base = 0xfed85000, size = 0x1000

 1463 17:39:11.094949  SA MMIO resource: TBT2BAR ->  base = 0xfed86000, size = 0x1000

 1464 17:39:11.101489  SA MMIO resource: TBT3BAR ->  base = 0xfed87000, size = 0x1000

 1465 17:39:11.108301  SA MMIO resource: VTVC0BAR ->  base = 0xfed91000, size = 0x1000

 1466 17:39:11.114778  SA MMIO resource: MMCONF ->  base = 0xc0000000, size = 0x10000000

 1467 17:39:11.121741  SA MMIO resource: DSM ->  base = 0x7c800000, size = 0x3c00000

 1468 17:39:11.128473  SA MMIO resource: TSEG ->  base = 0x7b800000, size = 0x800000

 1469 17:39:11.134901  SA MMIO resource: GSM ->  base = 0x7c000000, size = 0x800000

 1470 17:39:11.138102  PCI: 00:04.0 read_resources bus 1 link: 0

 1471 17:39:11.141737  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1472 17:39:11.148313  PCI: 00:06.0 read_resources bus 1 link: 0

 1473 17:39:11.151522  PCI: 00:06.0 read_resources bus 1 link: 0 done

 1474 17:39:11.154718  PCI: 00:0d.0 read_resources bus 0 link: 0

 1475 17:39:11.158569  USB0 port 0 read_resources bus 0 link: 0

 1476 17:39:11.165040  USB0 port 0 read_resources bus 0 link: 0 done

 1477 17:39:11.168284  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1478 17:39:11.174907  PCI: 00:14.0 read_resources bus 0 link: 0

 1479 17:39:11.178106  USB0 port 0 read_resources bus 0 link: 0

 1480 17:39:11.181295  USB0 port 0 read_resources bus 0 link: 0 done

 1481 17:39:11.188535  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1482 17:39:11.191716  PCI: 00:14.3 read_resources bus 0 link: 0

 1483 17:39:11.194951  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1484 17:39:11.201295  PCI: 00:15.0 read_resources bus 0 link: 0

 1485 17:39:11.204587  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1486 17:39:11.208222  PCI: 00:15.1 read_resources bus 0 link: 0

 1487 17:39:11.214682  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1488 17:39:11.218014  PCI: 00:15.3 read_resources bus 0 link: 0

 1489 17:39:11.221431  PCI: 00:15.3 read_resources bus 0 link: 0 done

 1490 17:39:11.228236  PCI: 00:19.1 read_resources bus 0 link: 0

 1491 17:39:11.231445  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1492 17:39:11.237874  PCI: 00:1e.3 read_resources bus 2 link: 0

 1493 17:39:11.241463  PCI: 00:1e.3 read_resources bus 2 link: 0 done

 1494 17:39:11.244802  PCI: 00:1f.0 read_resources bus 0 link: 0

 1495 17:39:11.251339  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1496 17:39:11.254570  PCI: 00:1f.2 read_resources bus 0 link: 0

 1497 17:39:11.257815  GENERIC: 0.0 read_resources bus 0 link: 0

 1498 17:39:11.264914  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1499 17:39:11.267819  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1500 17:39:11.274478  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1501 17:39:11.278071  Root Device read_resources bus 0 link: 0 done

 1502 17:39:11.281283  Done reading resources.

 1503 17:39:11.284248  Show resources in subtree (Root Device)...After reading.

 1504 17:39:11.291151   Root Device child on link 0 CPU_CLUSTER: 0

 1505 17:39:11.294294    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1506 17:39:11.294352     APIC: 00

 1507 17:39:11.298088     APIC: 14

 1508 17:39:11.298152     APIC: 16

 1509 17:39:11.298209     APIC: 10

 1510 17:39:11.300966     APIC: 12

 1511 17:39:11.301026     APIC: 09

 1512 17:39:11.304662     APIC: 01

 1513 17:39:11.304720     APIC: 08

 1514 17:39:11.307917    DOMAIN: 0000 child on link 0 GPIO: 0

 1515 17:39:11.318214    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1516 17:39:11.327863    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1517 17:39:11.327940     GPIO: 0

 1518 17:39:11.331153     PCI: 00:00.0

 1519 17:39:11.341349     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1520 17:39:11.347805     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1521 17:39:11.358058     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1522 17:39:11.367588     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1523 17:39:11.377777     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1524 17:39:11.387821     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1525 17:39:11.397815     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1526 17:39:11.404325     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1527 17:39:11.414343     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1528 17:39:11.424324     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1529 17:39:11.434248     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1530 17:39:11.444341     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1531 17:39:11.454480     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1532 17:39:11.460703     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1533 17:39:11.470654     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1534 17:39:11.480576     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1535 17:39:11.490806     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1536 17:39:11.500796     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1537 17:39:11.510769     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1538 17:39:11.520942     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1539 17:39:11.530839     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1540 17:39:11.537340     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1541 17:39:11.547369     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1542 17:39:11.557293     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1543 17:39:11.567620     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1544 17:39:11.577426     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1545 17:39:11.587564     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1546 17:39:11.597614     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1547 17:39:11.597683     PCI: 00:02.0

 1548 17:39:11.607227     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1549 17:39:11.616765     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1550 17:39:11.626865     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1551 17:39:11.630708     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1552 17:39:11.640510     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1553 17:39:11.643859      GENERIC: 0.0

 1554 17:39:11.647043     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1555 17:39:11.656975     PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1556 17:39:11.666668     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1557 17:39:11.673683     PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1558 17:39:11.676874      PCI: 01:00.0

 1559 17:39:11.686970      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1560 17:39:11.696866      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20

 1561 17:39:11.696942     PCI: 00:08.0

 1562 17:39:11.700429     PCI: 00:0a.0

 1563 17:39:11.710229     PCI: 00:0a.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10

 1564 17:39:11.713915     PCI: 00:0d.0 child on link 0 USB0 port 0

 1565 17:39:11.723305     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1566 17:39:11.730186      USB0 port 0 child on link 0 USB3 port 0

 1567 17:39:11.730261       USB3 port 0

 1568 17:39:11.733537       USB3 port 1

 1569 17:39:11.733611       USB3 port 2

 1570 17:39:11.736525       USB3 port 3

 1571 17:39:11.740285     PCI: 00:14.0 child on link 0 USB0 port 0

 1572 17:39:11.749958     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1573 17:39:11.753712      USB0 port 0 child on link 0 USB2 port 0

 1574 17:39:11.756723       USB2 port 0

 1575 17:39:11.756788       USB2 port 1

 1576 17:39:11.759805       USB2 port 2

 1577 17:39:11.763309       USB2 port 3

 1578 17:39:11.763370       USB2 port 4

 1579 17:39:11.766806       USB2 port 5

 1580 17:39:11.766864       USB2 port 6

 1581 17:39:11.770128       USB2 port 7

 1582 17:39:11.770184       USB2 port 8

 1583 17:39:11.773269       USB2 port 9

 1584 17:39:11.773328       USB3 port 0

 1585 17:39:11.776849       USB3 port 1

 1586 17:39:11.776942       USB3 port 2

 1587 17:39:11.780300       USB3 port 3

 1588 17:39:11.780383     PCI: 00:14.2

 1589 17:39:11.790013     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1590 17:39:11.800099     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1591 17:39:11.806769     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1592 17:39:11.816596     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1593 17:39:11.816673      GENERIC: 0.0

 1594 17:39:11.820356     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1595 17:39:11.829865     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1596 17:39:11.833174      I2C: 00:1a

 1597 17:39:11.833251      I2C: 00:31

 1598 17:39:11.836472      I2C: 00:32

 1599 17:39:11.839756     PCI: 00:15.1 child on link 0 I2C: 00:50

 1600 17:39:11.849553     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1601 17:39:11.853102      I2C: 00:50

 1602 17:39:11.853182     PCI: 00:15.2

 1603 17:39:11.856626     PCI: 00:15.3 child on link 0 I2C: 00:10

 1604 17:39:11.866272     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1605 17:39:11.869917      I2C: 00:10

 1606 17:39:11.869991     PCI: 00:16.0

 1607 17:39:11.880001     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1608 17:39:11.883194     PCI: 00:19.0

 1609 17:39:11.886756     PCI: 00:19.1 child on link 0 I2C: 00:15

 1610 17:39:11.896486     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1611 17:39:11.899790      I2C: 00:15

 1612 17:39:11.899865      I2C: 00:2c

 1613 17:39:11.902907     PCI: 00:1e.0

 1614 17:39:11.913534     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1615 17:39:11.916310     PCI: 00:1e.3 child on link 0 SPI: 00

 1616 17:39:11.926442     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1617 17:39:11.929237      SPI: 00

 1618 17:39:11.932838     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1619 17:39:11.943173     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1620 17:39:11.943250      PNP: 0c09.0

 1621 17:39:11.953158      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1622 17:39:11.956403     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1623 17:39:11.966692     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1624 17:39:11.976323     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1625 17:39:11.979725      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1626 17:39:11.983470       GENERIC: 0.0

 1627 17:39:11.983545       GENERIC: 1.0

 1628 17:39:11.986384     PCI: 00:1f.3

 1629 17:39:11.996068     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1630 17:39:12.006121     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1631 17:39:12.006206     PCI: 00:1f.5

 1632 17:39:12.016251     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1633 17:39:12.022724  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1634 17:39:12.029452   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1635 17:39:12.036303   PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1636 17:39:12.039782   PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1637 17:39:12.046264    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1638 17:39:12.049309    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem

 1639 17:39:12.056305   PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1640 17:39:12.062934   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1641 17:39:12.073212   PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1642 17:39:12.079114  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1643 17:39:12.086108  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1644 17:39:12.092616   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1645 17:39:12.099324   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1646 17:39:12.106092   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1647 17:39:12.109775   DOMAIN: 0000: Resource ranges:

 1648 17:39:12.116219   * Base: 1000, Size: 800, Tag: 100

 1649 17:39:12.119301   * Base: 1900, Size: e700, Tag: 100

 1650 17:39:12.122954    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1651 17:39:12.129752  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1652 17:39:12.136241  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1653 17:39:12.146262   update_constraints: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)

 1654 17:39:12.152732   update_constraints: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)

 1655 17:39:12.159532   update_constraints: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)

 1656 17:39:12.169207   update_constraints: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)

 1657 17:39:12.175788   update_constraints: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)

 1658 17:39:12.182726   update_constraints: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)

 1659 17:39:12.192409   update_constraints: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)

 1660 17:39:12.199139   update_constraints: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)

 1661 17:39:12.206056   update_constraints: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)

 1662 17:39:12.212545   update_constraints: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)

 1663 17:39:12.222565   update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)

 1664 17:39:12.229068   update_constraints: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)

 1665 17:39:12.235847   update_constraints: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)

 1666 17:39:12.245921   update_constraints: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)

 1667 17:39:12.252291   update_constraints: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)

 1668 17:39:12.258830   update_constraints: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)

 1669 17:39:12.269178   update_constraints: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)

 1670 17:39:12.275514   update_constraints: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)

 1671 17:39:12.282342   update_constraints: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)

 1672 17:39:12.292356   update_constraints: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)

 1673 17:39:12.298995   update_constraints: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)

 1674 17:39:12.305708   update_constraints: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)

 1675 17:39:12.315431   update_constraints: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)

 1676 17:39:12.322527   update_constraints: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)

 1677 17:39:12.328817   update_constraints: PCI: 00:00.0 18 base 100000000 limit 27fbfffff mem (fixed)

 1678 17:39:12.338850   update_constraints: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)

 1679 17:39:12.345255   update_constraints: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)

 1680 17:39:12.352415   update_constraints: PCI: 00:00.0 1b base f8000000 limit f9ffffff mem (fixed)

 1681 17:39:12.361839   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1682 17:39:12.368649   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1683 17:39:12.371945   DOMAIN: 0000: Resource ranges:

 1684 17:39:12.375404   * Base: 80400000, Size: 3fc00000, Tag: 200

 1685 17:39:12.381962   * Base: d0000000, Size: 28000000, Tag: 200

 1686 17:39:12.385370   * Base: fa000000, Size: 1000000, Tag: 200

 1687 17:39:12.388535   * Base: fb001000, Size: 17ff000, Tag: 200

 1688 17:39:12.391938   * Base: fe800000, Size: 300000, Tag: 200

 1689 17:39:12.398708   * Base: feb80000, Size: 80000, Tag: 200

 1690 17:39:12.401896   * Base: fed00000, Size: 40000, Tag: 200

 1691 17:39:12.405110   * Base: fed70000, Size: 10000, Tag: 200

 1692 17:39:12.408344   * Base: fed88000, Size: 8000, Tag: 200

 1693 17:39:12.414930   * Base: fed93000, Size: d000, Tag: 200

 1694 17:39:12.418394   * Base: feda2000, Size: 1e000, Tag: 200

 1695 17:39:12.421903   * Base: fede0000, Size: 1220000, Tag: 200

 1696 17:39:12.428201   * Base: 27fc00000, Size: 7d80400000, Tag: 100200

 1697 17:39:12.435168    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem

 1698 17:39:12.441686    PCI: 00:02.0 10 *  [0x81000000 - 0x81ffffff] limit: 81ffffff mem

 1699 17:39:12.448194    PCI: 00:06.0 20 *  [0x80400000 - 0x804fffff] limit: 804fffff mem

 1700 17:39:12.454962    PCI: 00:1f.3 20 *  [0x80500000 - 0x805fffff] limit: 805fffff mem

 1701 17:39:12.461631    PCI: 00:04.0 10 *  [0x80600000 - 0x8061ffff] limit: 8061ffff mem

 1702 17:39:12.467965    PCI: 00:0d.0 10 *  [0x80620000 - 0x8062ffff] limit: 8062ffff mem

 1703 17:39:12.474480    PCI: 00:14.0 10 *  [0x80630000 - 0x8063ffff] limit: 8063ffff mem

 1704 17:39:12.481447    PCI: 00:0a.0 10 *  [0x80640000 - 0x80647fff] limit: 80647fff mem

 1705 17:39:12.487940    PCI: 00:14.2 10 *  [0x80648000 - 0x8064bfff] limit: 8064bfff mem

 1706 17:39:12.494534    PCI: 00:14.3 10 *  [0x8064c000 - 0x8064ffff] limit: 8064ffff mem

 1707 17:39:12.501320    PCI: 00:1f.3 10 *  [0x80650000 - 0x80653fff] limit: 80653fff mem

 1708 17:39:12.508322    PCI: 00:14.2 18 *  [0x80654000 - 0x80654fff] limit: 80654fff mem

 1709 17:39:12.514697    PCI: 00:15.0 10 *  [0x80655000 - 0x80655fff] limit: 80655fff mem

 1710 17:39:12.521354    PCI: 00:15.1 10 *  [0x80656000 - 0x80656fff] limit: 80656fff mem

 1711 17:39:12.527888    PCI: 00:15.3 10 *  [0x80657000 - 0x80657fff] limit: 80657fff mem

 1712 17:39:12.534561    PCI: 00:16.0 10 *  [0x80658000 - 0x80658fff] limit: 80658fff mem

 1713 17:39:12.541327    PCI: 00:19.1 10 *  [0x80659000 - 0x80659fff] limit: 80659fff mem

 1714 17:39:12.547894    PCI: 00:1e.3 10 *  [0x8065a000 - 0x8065afff] limit: 8065afff mem

 1715 17:39:12.554710    PCI: 00:1f.5 10 *  [0x8065b000 - 0x8065bfff] limit: 8065bfff mem

 1716 17:39:12.561293  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1717 17:39:12.567649  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff

 1718 17:39:12.570781   PCI: 00:06.0: Resource ranges:

 1719 17:39:12.574295   * Base: 80400000, Size: 100000, Tag: 200

 1720 17:39:12.581313    PCI: 01:00.0 10 *  [0x80400000 - 0x80403fff] limit: 80403fff mem

 1721 17:39:12.587696    PCI: 01:00.0 20 *  [0x80404000 - 0x804040ff] limit: 804040ff mem

 1722 17:39:12.597769  PCI: 00:06.0 mem: base: 80400000 size: 100000 align: 20 gran: 20 limit: 804fffff done

 1723 17:39:12.604216  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1724 17:39:12.607376  Root Device assign_resources, bus 0 link: 0

 1725 17:39:12.614151  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1726 17:39:12.620832  PCI: 00:02.0 10 <- [0x0081000000 - 0x0081ffffff] size 0x01000000 gran 0x18 mem64

 1727 17:39:12.630956  PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64

 1728 17:39:12.637299  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1729 17:39:12.647324  PCI: 00:04.0 10 <- [0x0080600000 - 0x008061ffff] size 0x00020000 gran 0x11 mem64

 1730 17:39:12.650907  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1731 17:39:12.654130  PCI: 00:04.0 assign_resources, bus 1 link: 0 done

 1732 17:39:12.664072  PCI: 00:06.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1733 17:39:12.673732  PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1734 17:39:12.680549  PCI: 00:06.0 20 <- [0x0080400000 - 0x00804fffff] size 0x00100000 gran 0x14 bus 01 mem

 1735 17:39:12.687345  PCI: 00:06.0 assign_resources, bus 1 link: 0

 1736 17:39:12.693631  PCI: 01:00.0 10 <- [0x0080400000 - 0x0080403fff] size 0x00004000 gran 0x0e mem64

 1737 17:39:12.703784  PCI: 01:00.0 20 <- [0x0080404000 - 0x00804040ff] size 0x00000100 gran 0x08 mem64

 1738 17:39:12.707040  PCI: 00:06.0 assign_resources, bus 1 link: 0 done

 1739 17:39:12.716958  PCI: 00:0a.0 10 <- [0x0080640000 - 0x0080647fff] size 0x00008000 gran 0x0f mem64

 1740 17:39:12.723588  PCI: 00:0d.0 10 <- [0x0080620000 - 0x008062ffff] size 0x00010000 gran 0x10 mem64

 1741 17:39:12.727188  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1742 17:39:12.733614  PCI: 00:0d.0 assign_resources, bus 0 link: 0 done

 1743 17:39:12.740691  PCI: 00:14.0 10 <- [0x0080630000 - 0x008063ffff] size 0x00010000 gran 0x10 mem64

 1744 17:39:12.747139  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1745 17:39:12.750241  PCI: 00:14.0 assign_resources, bus 0 link: 0 done

 1746 17:39:12.757164  PCI: 00:14.2 10 <- [0x0080648000 - 0x008064bfff] size 0x00004000 gran 0x0e mem64

 1747 17:39:12.767060  PCI: 00:14.2 18 <- [0x0080654000 - 0x0080654fff] size 0x00001000 gran 0x0c mem64

 1748 17:39:12.773827  PCI: 00:14.3 10 <- [0x008064c000 - 0x008064ffff] size 0x00004000 gran 0x0e mem64

 1749 17:39:12.779855  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1750 17:39:12.783500  PCI: 00:14.3 assign_resources, bus 0 link: 0 done

 1751 17:39:12.793139  PCI: 00:15.0 10 <- [0x0080655000 - 0x0080655fff] size 0x00001000 gran 0x0c mem64

 1752 17:39:12.796999  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1753 17:39:12.800354  PCI: 00:15.0 assign_resources, bus 0 link: 0 done

 1754 17:39:12.810122  PCI: 00:15.1 10 <- [0x0080656000 - 0x0080656fff] size 0x00001000 gran 0x0c mem64

 1755 17:39:12.813426  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1756 17:39:12.819905  PCI: 00:15.1 assign_resources, bus 0 link: 0 done

 1757 17:39:12.826705  PCI: 00:15.3 10 <- [0x0080657000 - 0x0080657fff] size 0x00001000 gran 0x0c mem64

 1758 17:39:12.833375  PCI: 00:15.3 assign_resources, bus 0 link: 0

 1759 17:39:12.836703  PCI: 00:15.3 assign_resources, bus 0 link: 0 done

 1760 17:39:12.843092  PCI: 00:16.0 10 <- [0x0080658000 - 0x0080658fff] size 0x00001000 gran 0x0c mem64

 1761 17:39:12.852923  PCI: 00:19.1 10 <- [0x0080659000 - 0x0080659fff] size 0x00001000 gran 0x0c mem64

 1762 17:39:12.856094  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1763 17:39:12.862929  PCI: 00:19.1 assign_resources, bus 0 link: 0 done

 1764 17:39:12.869708  PCI: 00:1e.3 10 <- [0x008065a000 - 0x008065afff] size 0x00001000 gran 0x0c mem64

 1765 17:39:12.876047  PCI: 00:1e.3 assign_resources, bus 2 link: 0

 1766 17:39:12.879622  PCI: 00:1e.3 assign_resources, bus 2 link: 0 done

 1767 17:39:12.882800  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1768 17:39:12.889495  PCI: 00:1f.0 assign_resources, bus 0 link: 0 done

 1769 17:39:12.892934  LPC: Trying to open IO window from 800 size 1ff

 1770 17:39:12.902607  PCI: 00:1f.3 10 <- [0x0080650000 - 0x0080653fff] size 0x00004000 gran 0x0e mem64

 1771 17:39:12.909235  PCI: 00:1f.3 20 <- [0x0080500000 - 0x00805fffff] size 0x00100000 gran 0x14 mem64

 1772 17:39:12.915899  PCI: 00:1f.5 10 <- [0x008065b000 - 0x008065bfff] size 0x00001000 gran 0x0c mem

 1773 17:39:12.922753  DOMAIN: 0000 assign_resources, bus 0 link: 0 done

 1774 17:39:12.925791  Root Device assign_resources, bus 0 link: 0 done

 1775 17:39:12.929191  Done setting resources.

 1776 17:39:12.935837  Show resources in subtree (Root Device)...After assigning values.

 1777 17:39:12.939286   Root Device child on link 0 CPU_CLUSTER: 0

 1778 17:39:12.945955    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1779 17:39:12.946032     APIC: 00

 1780 17:39:12.949575     APIC: 14

 1781 17:39:12.949650     APIC: 16

 1782 17:39:12.949703     APIC: 10

 1783 17:39:12.952738     APIC: 12

 1784 17:39:12.952826     APIC: 09

 1785 17:39:12.952881     APIC: 01

 1786 17:39:12.955997     APIC: 08

 1787 17:39:12.959547    DOMAIN: 0000 child on link 0 GPIO: 0

 1788 17:39:12.969077    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1789 17:39:12.979230    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1790 17:39:12.979315     GPIO: 0

 1791 17:39:12.982793     PCI: 00:00.0

 1792 17:39:12.988855     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0

 1793 17:39:12.999065     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1

 1794 17:39:13.008808     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1795 17:39:13.018920     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1796 17:39:13.029154     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4

 1797 17:39:13.038797     PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5

 1798 17:39:13.045611     PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1799 17:39:13.055197     PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7

 1800 17:39:13.065106     PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8

 1801 17:39:13.075218     PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9

 1802 17:39:13.085556     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1803 17:39:13.095399     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1804 17:39:13.105165     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1805 17:39:13.111709     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d

 1806 17:39:13.121754     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e

 1807 17:39:13.131869     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f

 1808 17:39:13.141490     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10

 1809 17:39:13.151697     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11

 1810 17:39:13.161494     PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12

 1811 17:39:13.171350     PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13

 1812 17:39:13.181198     PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14

 1813 17:39:13.188108     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15

 1814 17:39:13.197859     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16

 1815 17:39:13.207768     PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17

 1816 17:39:13.217544     PCI: 00:00.0 resource base 100000000 size 17fc00000 align 0 gran 0 limit 0 flags e0004200 index 18

 1817 17:39:13.227861     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19

 1818 17:39:13.237700     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a

 1819 17:39:13.247917     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1b

 1820 17:39:13.247997     PCI: 00:02.0

 1821 17:39:13.257471     PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10

 1822 17:39:13.270898     PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18

 1823 17:39:13.277611     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1824 17:39:13.284101     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1825 17:39:13.294269     PCI: 00:04.0 resource base 80600000 size 20000 align 17 gran 17 limit 8061ffff flags 60000201 index 10

 1826 17:39:13.294344      GENERIC: 0.0

 1827 17:39:13.300899     PCI: 00:06.0 child on link 0 PCI: 01:00.0

 1828 17:39:13.310485     PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1829 17:39:13.320428     PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1830 17:39:13.330509     PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20

 1831 17:39:13.333857      PCI: 01:00.0

 1832 17:39:13.343949      PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10

 1833 17:39:13.353666      PCI: 01:00.0 resource base 80404000 size 100 align 12 gran 8 limit 804040ff flags 60000201 index 20

 1834 17:39:13.356883     PCI: 00:08.0

 1835 17:39:13.356958     PCI: 00:0a.0

 1836 17:39:13.366896     PCI: 00:0a.0 resource base 80640000 size 8000 align 15 gran 15 limit 80647fff flags 60000201 index 10

 1837 17:39:13.370359     PCI: 00:0d.0 child on link 0 USB0 port 0

 1838 17:39:13.383626     PCI: 00:0d.0 resource base 80620000 size 10000 align 16 gran 16 limit 8062ffff flags 60000201 index 10

 1839 17:39:13.387024      USB0 port 0 child on link 0 USB3 port 0

 1840 17:39:13.387100       USB3 port 0

 1841 17:39:13.390600       USB3 port 1

 1842 17:39:13.393699       USB3 port 2

 1843 17:39:13.393771       USB3 port 3

 1844 17:39:13.396857     PCI: 00:14.0 child on link 0 USB0 port 0

 1845 17:39:13.410119     PCI: 00:14.0 resource base 80630000 size 10000 align 16 gran 16 limit 8063ffff flags 60000201 index 10

 1846 17:39:13.413596      USB0 port 0 child on link 0 USB2 port 0

 1847 17:39:13.413671       USB2 port 0

 1848 17:39:13.416826       USB2 port 1

 1849 17:39:13.416900       USB2 port 2

 1850 17:39:13.420003       USB2 port 3

 1851 17:39:13.423529       USB2 port 4

 1852 17:39:13.423617       USB2 port 5

 1853 17:39:13.426791       USB2 port 6

 1854 17:39:13.426866       USB2 port 7

 1855 17:39:13.430278       USB2 port 8

 1856 17:39:13.430351       USB2 port 9

 1857 17:39:13.433594       USB3 port 0

 1858 17:39:13.433677       USB3 port 1

 1859 17:39:13.436865       USB3 port 2

 1860 17:39:13.436937       USB3 port 3

 1861 17:39:13.440423     PCI: 00:14.2

 1862 17:39:13.449988     PCI: 00:14.2 resource base 80648000 size 4000 align 14 gran 14 limit 8064bfff flags 60000201 index 10

 1863 17:39:13.460152     PCI: 00:14.2 resource base 80654000 size 1000 align 12 gran 12 limit 80654fff flags 60000201 index 18

 1864 17:39:13.463691     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1865 17:39:13.473308     PCI: 00:14.3 resource base 8064c000 size 4000 align 14 gran 14 limit 8064ffff flags 60000201 index 10

 1866 17:39:13.476729      GENERIC: 0.0

 1867 17:39:13.479928     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1868 17:39:13.490409     PCI: 00:15.0 resource base 80655000 size 1000 align 12 gran 12 limit 80655fff flags 60000201 index 10

 1869 17:39:13.493605      I2C: 00:1a

 1870 17:39:13.493686      I2C: 00:31

 1871 17:39:13.496758      I2C: 00:32

 1872 17:39:13.499892     PCI: 00:15.1 child on link 0 I2C: 00:50

 1873 17:39:13.509797     PCI: 00:15.1 resource base 80656000 size 1000 align 12 gran 12 limit 80656fff flags 60000201 index 10

 1874 17:39:13.513071      I2C: 00:50

 1875 17:39:13.513150     PCI: 00:15.2

 1876 17:39:13.519856     PCI: 00:15.3 child on link 0 I2C: 00:10

 1877 17:39:13.530008     PCI: 00:15.3 resource base 80657000 size 1000 align 12 gran 12 limit 80657fff flags 60000201 index 10

 1878 17:39:13.530100      I2C: 00:10

 1879 17:39:13.533693     PCI: 00:16.0

 1880 17:39:13.543359     PCI: 00:16.0 resource base 80658000 size 1000 align 12 gran 12 limit 80658fff flags 60000201 index 10

 1881 17:39:13.543437     PCI: 00:19.0

 1882 17:39:13.549898     PCI: 00:19.1 child on link 0 I2C: 00:15

 1883 17:39:13.559673     PCI: 00:19.1 resource base 80659000 size 1000 align 12 gran 12 limit 80659fff flags 60000201 index 10

 1884 17:39:13.559752      I2C: 00:15

 1885 17:39:13.563451      I2C: 00:2c

 1886 17:39:13.563541     PCI: 00:1e.0

 1887 17:39:13.572930     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1888 17:39:13.579836     PCI: 00:1e.3 child on link 0 SPI: 00

 1889 17:39:13.589527     PCI: 00:1e.3 resource base 8065a000 size 1000 align 12 gran 12 limit 8065afff flags 60000201 index 10

 1890 17:39:13.589634      SPI: 00

 1891 17:39:13.593121     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1892 17:39:13.603214     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1893 17:39:13.606119      PNP: 0c09.0

 1894 17:39:13.613068      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1895 17:39:13.619731     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1896 17:39:13.626544     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1897 17:39:13.635930     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1898 17:39:13.642836      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1899 17:39:13.642911       GENERIC: 0.0

 1900 17:39:13.645939       GENERIC: 1.0

 1901 17:39:13.646013     PCI: 00:1f.3

 1902 17:39:13.656108     PCI: 00:1f.3 resource base 80650000 size 4000 align 14 gran 14 limit 80653fff flags 60000201 index 10

 1903 17:39:13.666185     PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20

 1904 17:39:13.669426     PCI: 00:1f.5

 1905 17:39:13.679238     PCI: 00:1f.5 resource base 8065b000 size 1000 align 12 gran 12 limit 8065bfff flags 60000200 index 10

 1906 17:39:13.682401  Done allocating resources.

 1907 17:39:13.689473  BS: BS_DEV_RESOURCES run times (exec / console): 3 / 2716 ms

 1908 17:39:13.692631  fw_config match found: AUDIO=MAX98373_NAU88L25B_I2S

 1909 17:39:13.699084  Configure audio over I2S with MAX98373 NAU88L25B.

 1910 17:39:13.703007  Enabling BT offload

 1911 17:39:13.710446  BS: BS_DEV_ENABLE entry times (exec / console): 5 / 12 ms

 1912 17:39:13.713969  Enabling resources...

 1913 17:39:13.717346  PCI: 00:00.0 subsystem <- 8086/4609

 1914 17:39:13.720459  PCI: 00:00.0 cmd <- 06

 1915 17:39:13.724520  PCI: 00:02.0 subsystem <- 8086/46b3

 1916 17:39:13.727140  PCI: 00:02.0 cmd <- 03

 1917 17:39:13.730421  PCI: 00:04.0 subsystem <- 8086/461d

 1918 17:39:13.730499  PCI: 00:04.0 cmd <- 02

 1919 17:39:13.734182  PCI: 00:06.0 bridge ctrl <- 0013

 1920 17:39:13.737593  PCI: 00:06.0 subsystem <- 8086/464d

 1921 17:39:13.740767  PCI: 00:06.0 cmd <- 106

 1922 17:39:13.743766  PCI: 00:0a.0 subsystem <- 8086/467d

 1923 17:39:13.747251  PCI: 00:0a.0 cmd <- 02

 1924 17:39:13.750601  PCI: 00:0d.0 subsystem <- 8086/461e

 1925 17:39:13.753725  PCI: 00:0d.0 cmd <- 02

 1926 17:39:13.757489  PCI: 00:14.0 subsystem <- 8086/51ed

 1927 17:39:13.760725  PCI: 00:14.0 cmd <- 02

 1928 17:39:13.763821  PCI: 00:14.2 subsystem <- 8086/51ef

 1929 17:39:13.763895  PCI: 00:14.2 cmd <- 02

 1930 17:39:13.767260  PCI: 00:14.3 subsystem <- 8086/51f0

 1931 17:39:13.770584  PCI: 00:14.3 cmd <- 02

 1932 17:39:13.773789  PCI: 00:15.0 subsystem <- 8086/51e8

 1933 17:39:13.777121  PCI: 00:15.0 cmd <- 02

 1934 17:39:13.780418  PCI: 00:15.1 subsystem <- 8086/51e9

 1935 17:39:13.783726  PCI: 00:15.1 cmd <- 06

 1936 17:39:13.787087  PCI: 00:15.3 subsystem <- 8086/51eb

 1937 17:39:13.790387  PCI: 00:15.3 cmd <- 02

 1938 17:39:13.793591  PCI: 00:16.0 subsystem <- 8086/51e0

 1939 17:39:13.793650  PCI: 00:16.0 cmd <- 02

 1940 17:39:13.796767  PCI: 00:19.1 subsystem <- 8086/51c6

 1941 17:39:13.800469  PCI: 00:19.1 cmd <- 02

 1942 17:39:13.803783  PCI: 00:1e.0 subsystem <- 8086/51a8

 1943 17:39:13.807121  PCI: 00:1e.0 cmd <- 06

 1944 17:39:13.810420  PCI: 00:1e.3 subsystem <- 8086/51ab

 1945 17:39:13.813506  PCI: 00:1e.3 cmd <- 02

 1946 17:39:13.816916  PCI: 00:1f.0 subsystem <- 8086/5182

 1947 17:39:13.820187  PCI: 00:1f.0 cmd <- 407

 1948 17:39:13.823386  PCI: 00:1f.3 subsystem <- 8086/51c8

 1949 17:39:13.823451  PCI: 00:1f.3 cmd <- 02

 1950 17:39:13.826697  PCI: 00:1f.5 subsystem <- 8086/51a4

 1951 17:39:13.830541  PCI: 00:1f.5 cmd <- 406

 1952 17:39:13.833838  PCI: 01:00.0 cmd <- 02

 1953 17:39:13.833897  done.

 1954 17:39:13.840315  BS: BS_DEV_ENABLE run times (exec / console): 1 / 122 ms

 1955 17:39:13.843374  ME: Version: Unavailable

 1956 17:39:13.846849  BS: BS_DEV_ENABLE exit times (exec / console): 0 / 3 ms

 1957 17:39:13.850078  Initializing devices...

 1958 17:39:13.853684  Root Device init

 1959 17:39:13.853745  mainboard: EC init

 1960 17:39:13.860284  Chrome EC: Set SMI mask to 0x0000000000000000

 1961 17:39:13.860338  Chrome EC: UHEPI supported

 1962 17:39:13.867947  Chrome EC: clear events_b mask to 0x0000000000000000

 1963 17:39:13.874874  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1964 17:39:13.881540  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e

 1965 17:39:13.888457  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001808101e

 1966 17:39:13.894460  Chrome EC: Set WAKE mask to 0x0000000000000000

 1967 17:39:13.897939  Root Device init finished in 42 msecs

 1968 17:39:13.901085  PCI: 00:00.0 init

 1969 17:39:13.904236  CPU TDP = 15 Watts

 1970 17:39:13.904305  CPU PL1 = 15 Watts

 1971 17:39:13.908114  CPU PL2 = 55 Watts

 1972 17:39:13.911237  CPU PL4 = 123 Watts

 1973 17:39:13.914444  PCI: 00:00.0 init finished in 8 msecs

 1974 17:39:13.914519  PCI: 00:02.0 init

 1975 17:39:13.918350  GMA: Found VBT in CBFS

 1976 17:39:13.921101  GMA: Found valid VBT in CBFS

 1977 17:39:13.927882  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1978 17:39:13.934324                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x90000000

 1979 17:39:13.938092  PCI: 00:02.0 init finished in 18 msecs

 1980 17:39:13.941149  PCI: 00:06.0 init

 1981 17:39:13.941223  Initializing PCH PCIe bridge.

 1982 17:39:13.947547  PCI: 00:06.0 init finished in 3 msecs

 1983 17:39:13.947621  PCI: 00:0a.0 init

 1984 17:39:13.951139  PCI: 00:0a.0 init finished in 0 msecs

 1985 17:39:13.954501  PCI: 00:14.0 init

 1986 17:39:13.957814  PCI: 00:14.0 init finished in 0 msecs

 1987 17:39:13.960867  PCI: 00:14.2 init

 1988 17:39:13.964299  PCI: 00:14.2 init finished in 0 msecs

 1989 17:39:13.964373  PCI: 00:15.0 init

 1990 17:39:13.967482  I2C bus 0 version 0x3230302a

 1991 17:39:13.970774  DW I2C bus 0 at 0x80655000 (400 KHz)

 1992 17:39:13.974510  PCI: 00:15.0 init finished in 6 msecs

 1993 17:39:13.977673  PCI: 00:15.1 init

 1994 17:39:13.981118  I2C bus 1 version 0x3230302a

 1995 17:39:13.984244  DW I2C bus 1 at 0x80656000 (400 KHz)

 1996 17:39:13.987503  PCI: 00:15.1 init finished in 6 msecs

 1997 17:39:13.991299  PCI: 00:15.3 init

 1998 17:39:13.994567  I2C bus 3 version 0x3230302a

 1999 17:39:13.997486  DW I2C bus 3 at 0x80657000 (400 KHz)

 2000 17:39:14.000823  PCI: 00:15.3 init finished in 6 msecs

 2001 17:39:14.000898  PCI: 00:16.0 init

 2002 17:39:14.007224  PCI: 00:16.0 init finished in 0 msecs

 2003 17:39:14.007307  PCI: 00:19.1 init

 2004 17:39:14.010686  I2C bus 5 version 0x3230302a

 2005 17:39:14.014300  DW I2C bus 5 at 0x80659000 (400 KHz)

 2006 17:39:14.017270  PCI: 00:19.1 init finished in 6 msecs

 2007 17:39:14.020641  PCI: 00:1f.0 init

 2008 17:39:14.023908  IOAPIC: Initializing IOAPIC at 0xfec00000

 2009 17:39:14.027263  IOAPIC: ID = 0x02

 2010 17:39:14.030520  IOAPIC: Dumping registers

 2011 17:39:14.030593    reg 0x0000: 0x02000000

 2012 17:39:14.034100    reg 0x0001: 0x00770020

 2013 17:39:14.037184    reg 0x0002: 0x00000000

 2014 17:39:14.040809  IOAPIC: 120 interrupts

 2015 17:39:14.043761  IOAPIC: Clearing IOAPIC at 0xfec00000

 2016 17:39:14.047568  IOAPIC: vector 0x00 value 0x00000000 0x00010000

 2017 17:39:14.053809  IOAPIC: vector 0x01 value 0x00000000 0x00010000

 2018 17:39:14.057518  IOAPIC: vector 0x02 value 0x00000000 0x00010000

 2019 17:39:14.063906  IOAPIC: vector 0x03 value 0x00000000 0x00010000

 2020 17:39:14.067349  IOAPIC: vector 0x04 value 0x00000000 0x00010000

 2021 17:39:14.070513  IOAPIC: vector 0x05 value 0x00000000 0x00010000

 2022 17:39:14.077416  IOAPIC: vector 0x06 value 0x00000000 0x00010000

 2023 17:39:14.080760  IOAPIC: vector 0x07 value 0x00000000 0x00010000

 2024 17:39:14.087325  IOAPIC: vector 0x08 value 0x00000000 0x00010000

 2025 17:39:14.090262  IOAPIC: vector 0x09 value 0x00000000 0x00010000

 2026 17:39:14.097126  IOAPIC: vector 0x0a value 0x00000000 0x00010000

 2027 17:39:14.100690  IOAPIC: vector 0x0b value 0x00000000 0x00010000

 2028 17:39:14.103890  IOAPIC: vector 0x0c value 0x00000000 0x00010000

 2029 17:39:14.110704  IOAPIC: vector 0x0d value 0x00000000 0x00010000

 2030 17:39:14.113941  IOAPIC: vector 0x0e value 0x00000000 0x00010000

 2031 17:39:14.120328  IOAPIC: vector 0x0f value 0x00000000 0x00010000

 2032 17:39:14.123694  IOAPIC: vector 0x10 value 0x00000000 0x00010000

 2033 17:39:14.130578  IOAPIC: vector 0x11 value 0x00000000 0x00010000

 2034 17:39:14.133596  IOAPIC: vector 0x12 value 0x00000000 0x00010000

 2035 17:39:14.140350  IOAPIC: vector 0x13 value 0x00000000 0x00010000

 2036 17:39:14.143747  IOAPIC: vector 0x14 value 0x00000000 0x00010000

 2037 17:39:14.147032  IOAPIC: vector 0x15 value 0x00000000 0x00010000

 2038 17:39:14.153526  IOAPIC: vector 0x16 value 0x00000000 0x00010000

 2039 17:39:14.156973  IOAPIC: vector 0x17 value 0x00000000 0x00010000

 2040 17:39:14.163664  IOAPIC: vector 0x18 value 0x00000000 0x00010000

 2041 17:39:14.166777  IOAPIC: vector 0x19 value 0x00000000 0x00010000

 2042 17:39:14.173365  IOAPIC: vector 0x1a value 0x00000000 0x00010000

 2043 17:39:14.176822  IOAPIC: vector 0x1b value 0x00000000 0x00010000

 2044 17:39:14.183610  IOAPIC: vector 0x1c value 0x00000000 0x00010000

 2045 17:39:14.186899  IOAPIC: vector 0x1d value 0x00000000 0x00010000

 2046 17:39:14.190439  IOAPIC: vector 0x1e value 0x00000000 0x00010000

 2047 17:39:14.197080  IOAPIC: vector 0x1f value 0x00000000 0x00010000

 2048 17:39:14.200356  IOAPIC: vector 0x20 value 0x00000000 0x00010000

 2049 17:39:14.206839  IOAPIC: vector 0x21 value 0x00000000 0x00010000

 2050 17:39:14.210526  IOAPIC: vector 0x22 value 0x00000000 0x00010000

 2051 17:39:14.216982  IOAPIC: vector 0x23 value 0x00000000 0x00010000

 2052 17:39:14.220310  IOAPIC: vector 0x24 value 0x00000000 0x00010000

 2053 17:39:14.223662  IOAPIC: vector 0x25 value 0x00000000 0x00010000

 2054 17:39:14.230167  IOAPIC: vector 0x26 value 0x00000000 0x00010000

 2055 17:39:14.233323  IOAPIC: vector 0x27 value 0x00000000 0x00010000

 2056 17:39:14.240160  IOAPIC: vector 0x28 value 0x00000000 0x00010000

 2057 17:39:14.243322  IOAPIC: vector 0x29 value 0x00000000 0x00010000

 2058 17:39:14.250144  IOAPIC: vector 0x2a value 0x00000000 0x00010000

 2059 17:39:14.253403  IOAPIC: vector 0x2b value 0x00000000 0x00010000

 2060 17:39:14.259786  IOAPIC: vector 0x2c value 0x00000000 0x00010000

 2061 17:39:14.263101  IOAPIC: vector 0x2d value 0x00000000 0x00010000

 2062 17:39:14.269805  IOAPIC: vector 0x2e value 0x00000000 0x00010000

 2063 17:39:14.272955  IOAPIC: vector 0x2f value 0x00000000 0x00010000

 2064 17:39:14.276218  IOAPIC: vector 0x30 value 0x00000000 0x00010000

 2065 17:39:14.283127  IOAPIC: vector 0x31 value 0x00000000 0x00010000

 2066 17:39:14.286265  IOAPIC: vector 0x32 value 0x00000000 0x00010000

 2067 17:39:14.293035  IOAPIC: vector 0x33 value 0x00000000 0x00010000

 2068 17:39:14.296513  IOAPIC: vector 0x34 value 0x00000000 0x00010000

 2069 17:39:14.303105  IOAPIC: vector 0x35 value 0x00000000 0x00010000

 2070 17:39:14.306369  IOAPIC: vector 0x36 value 0x00000000 0x00010000

 2071 17:39:14.312772  IOAPIC: vector 0x37 value 0x00000000 0x00010000

 2072 17:39:14.316466  IOAPIC: vector 0x38 value 0x00000000 0x00010000

 2073 17:39:14.319709  IOAPIC: vector 0x39 value 0x00000000 0x00010000

 2074 17:39:14.326067  IOAPIC: vector 0x3a value 0x00000000 0x00010000

 2075 17:39:14.329588  IOAPIC: vector 0x3b value 0x00000000 0x00010000

 2076 17:39:14.336514  IOAPIC: vector 0x3c value 0x00000000 0x00010000

 2077 17:39:14.339145  IOAPIC: vector 0x3d value 0x00000000 0x00010000

 2078 17:39:14.346033  IOAPIC: vector 0x3e value 0x00000000 0x00010000

 2079 17:39:14.349170  IOAPIC: vector 0x3f value 0x00000000 0x00010000

 2080 17:39:14.355955  IOAPIC: vector 0x40 value 0x00000000 0x00010000

 2081 17:39:14.359153  IOAPIC: vector 0x41 value 0x00000000 0x00010000

 2082 17:39:14.362700  IOAPIC: vector 0x42 value 0x00000000 0x00010000

 2083 17:39:14.369208  IOAPIC: vector 0x43 value 0x00000000 0x00010000

 2084 17:39:14.372312  IOAPIC: vector 0x44 value 0x00000000 0x00010000

 2085 17:39:14.378998  IOAPIC: vector 0x45 value 0x00000000 0x00010000

 2086 17:39:14.382933  IOAPIC: vector 0x46 value 0x00000000 0x00010000

 2087 17:39:14.388998  IOAPIC: vector 0x47 value 0x00000000 0x00010000

 2088 17:39:14.392589  IOAPIC: vector 0x48 value 0x00000000 0x00010000

 2089 17:39:14.399354  IOAPIC: vector 0x49 value 0x00000000 0x00010000

 2090 17:39:14.402710  IOAPIC: vector 0x4a value 0x00000000 0x00010000

 2091 17:39:14.405497  IOAPIC: vector 0x4b value 0x00000000 0x00010000

 2092 17:39:14.412502  IOAPIC: vector 0x4c value 0x00000000 0x00010000

 2093 17:39:14.416093  IOAPIC: vector 0x4d value 0x00000000 0x00010000

 2094 17:39:14.422993  IOAPIC: vector 0x4e value 0x00000000 0x00010000

 2095 17:39:14.425893  IOAPIC: vector 0x4f value 0x00000000 0x00010000

 2096 17:39:14.432623  IOAPIC: vector 0x50 value 0x00000000 0x00010000

 2097 17:39:14.435642  IOAPIC: vector 0x51 value 0x00000000 0x00010000

 2098 17:39:14.439079  IOAPIC: vector 0x52 value 0x00000000 0x00010000

 2099 17:39:14.445834  IOAPIC: vector 0x53 value 0x00000000 0x00010000

 2100 17:39:14.449022  IOAPIC: vector 0x54 value 0x00000000 0x00010000

 2101 17:39:14.455862  IOAPIC: vector 0x55 value 0x00000000 0x00010000

 2102 17:39:14.458766  IOAPIC: vector 0x56 value 0x00000000 0x00010000

 2103 17:39:14.465494  IOAPIC: vector 0x57 value 0x00000000 0x00010000

 2104 17:39:14.468983  IOAPIC: vector 0x58 value 0x00000000 0x00010000

 2105 17:39:14.475353  IOAPIC: vector 0x59 value 0x00000000 0x00010000

 2106 17:39:14.478709  IOAPIC: vector 0x5a value 0x00000000 0x00010000

 2107 17:39:14.482108  IOAPIC: vector 0x5b value 0x00000000 0x00010000

 2108 17:39:14.489039  IOAPIC: vector 0x5c value 0x00000000 0x00010000

 2109 17:39:14.491904  IOAPIC: vector 0x5d value 0x00000000 0x00010000

 2110 17:39:14.499092  IOAPIC: vector 0x5e value 0x00000000 0x00010000

 2111 17:39:14.502209  IOAPIC: vector 0x5f value 0x00000000 0x00010000

 2112 17:39:14.508691  IOAPIC: vector 0x60 value 0x00000000 0x00010000

 2113 17:39:14.512210  IOAPIC: vector 0x61 value 0x00000000 0x00010000

 2114 17:39:14.519000  IOAPIC: vector 0x62 value 0x00000000 0x00010000

 2115 17:39:14.522301  IOAPIC: vector 0x63 value 0x00000000 0x00010000

 2116 17:39:14.525416  IOAPIC: vector 0x64 value 0x00000000 0x00010000

 2117 17:39:14.532275  IOAPIC: vector 0x65 value 0x00000000 0x00010000

 2118 17:39:14.535299  IOAPIC: vector 0x66 value 0x00000000 0x00010000

 2119 17:39:14.542002  IOAPIC: vector 0x67 value 0x00000000 0x00010000

 2120 17:39:14.545961  IOAPIC: vector 0x68 value 0x00000000 0x00010000

 2121 17:39:14.551890  IOAPIC: vector 0x69 value 0x00000000 0x00010000

 2122 17:39:14.555409  IOAPIC: vector 0x6a value 0x00000000 0x00010000

 2123 17:39:14.562308  IOAPIC: vector 0x6b value 0x00000000 0x00010000

 2124 17:39:14.565278  IOAPIC: vector 0x6c value 0x00000000 0x00010000

 2125 17:39:14.568375  IOAPIC: vector 0x6d value 0x00000000 0x00010000

 2126 17:39:14.575221  IOAPIC: vector 0x6e value 0x00000000 0x00010000

 2127 17:39:14.578660  IOAPIC: vector 0x6f value 0x00000000 0x00010000

 2128 17:39:14.585538  IOAPIC: vector 0x70 value 0x00000000 0x00010000

 2129 17:39:14.588467  IOAPIC: vector 0x71 value 0x00000000 0x00010000

 2130 17:39:14.595235  IOAPIC: vector 0x72 value 0x00000000 0x00010000

 2131 17:39:14.598613  IOAPIC: vector 0x73 value 0x00000000 0x00010000

 2132 17:39:14.602023  IOAPIC: vector 0x74 value 0x00000000 0x00010000

 2133 17:39:14.608343  IOAPIC: vector 0x75 value 0x00000000 0x00010000

 2134 17:39:14.612050  IOAPIC: vector 0x76 value 0x00000000 0x00010000

 2135 17:39:14.618626  IOAPIC: vector 0x77 value 0x00000000 0x00010000

 2136 17:39:14.621951  IOAPIC: Bootstrap Processor Local APIC = 0x00

 2137 17:39:14.628351  IOAPIC: vector 0x00 value 0x00000000 0x00000700

 2138 17:39:14.632147  PCI: 00:1f.0 init finished in 607 msecs

 2139 17:39:14.635253  PCI: 00:1f.2 init

 2140 17:39:14.635327  apm_control: Disabling ACPI.

 2141 17:39:14.640937  APMC done.

 2142 17:39:14.644183  PCI: 00:1f.2 init finished in 6 msecs

 2143 17:39:14.647913  PCI: 00:1f.3 init

 2144 17:39:14.650875  PCI: 00:1f.3 init finished in 0 msecs

 2145 17:39:14.650950  PCI: 01:00.0 init

 2146 17:39:14.654209  PCI: 01:00.0 init finished in 0 msecs

 2147 17:39:14.657399  PNP: 0c09.0 init

 2148 17:39:14.660621  Google Chrome EC uptime: 12.140 seconds

 2149 17:39:14.667183  Google Chrome AP resets since EC boot: 1

 2150 17:39:14.670683  Google Chrome most recent AP reset causes:

 2151 17:39:14.674277  	0.341: 32775 shutdown: entering G3

 2152 17:39:14.680647  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump

 2153 17:39:14.683718  PNP: 0c09.0 init finished in 23 msecs

 2154 17:39:14.687311  GENERIC: 0.0 init

 2155 17:39:14.690463  GENERIC: 0.0 init finished in 0 msecs

 2156 17:39:14.690538  GENERIC: 1.0 init

 2157 17:39:14.697253  GENERIC: 1.0 init finished in 0 msecs

 2158 17:39:14.697330  Devices initialized

 2159 17:39:14.700450  Show all devs... After init.

 2160 17:39:14.703650  Root Device: enabled 1

 2161 17:39:14.707045  CPU_CLUSTER: 0: enabled 1

 2162 17:39:14.707121  DOMAIN: 0000: enabled 1

 2163 17:39:14.710276  GPIO: 0: enabled 1

 2164 17:39:14.713889  PCI: 00:00.0: enabled 1

 2165 17:39:14.713968  PCI: 00:01.0: enabled 0

 2166 17:39:14.717270  PCI: 00:01.1: enabled 0

 2167 17:39:14.720708  PCI: 00:02.0: enabled 1

 2168 17:39:14.723909  PCI: 00:04.0: enabled 1

 2169 17:39:14.723983  PCI: 00:05.0: enabled 0

 2170 17:39:14.727136  PCI: 00:06.0: enabled 1

 2171 17:39:14.730282  PCI: 00:06.2: enabled 0

 2172 17:39:14.730357  PCI: 00:07.0: enabled 0

 2173 17:39:14.733560  PCI: 00:07.1: enabled 0

 2174 17:39:14.737039  PCI: 00:07.2: enabled 0

 2175 17:39:14.740505  PCI: 00:07.3: enabled 0

 2176 17:39:14.740589  PCI: 00:08.0: enabled 0

 2177 17:39:14.743827  PCI: 00:09.0: enabled 0

 2178 17:39:14.747282  PCI: 00:0a.0: enabled 1

 2179 17:39:14.750379  PCI: 00:0d.0: enabled 1

 2180 17:39:14.750453  PCI: 00:0d.1: enabled 0

 2181 17:39:14.753472  PCI: 00:0d.2: enabled 0

 2182 17:39:14.757051  PCI: 00:0d.3: enabled 0

 2183 17:39:14.760373  PCI: 00:0e.0: enabled 0

 2184 17:39:14.760448  PCI: 00:10.0: enabled 0

 2185 17:39:14.763942  PCI: 00:10.1: enabled 0

 2186 17:39:14.767105  PCI: 00:10.6: enabled 0

 2187 17:39:14.767180  PCI: 00:10.7: enabled 0

 2188 17:39:14.770415  PCI: 00:12.0: enabled 0

 2189 17:39:14.773705  PCI: 00:12.6: enabled 0

 2190 17:39:14.777243  PCI: 00:12.7: enabled 0

 2191 17:39:14.777317  PCI: 00:13.0: enabled 0

 2192 17:39:14.780176  PCI: 00:14.0: enabled 1

 2193 17:39:14.783437  PCI: 00:14.1: enabled 0

 2194 17:39:14.787099  PCI: 00:14.2: enabled 1

 2195 17:39:14.787174  PCI: 00:14.3: enabled 1

 2196 17:39:14.790303  PCI: 00:15.0: enabled 1

 2197 17:39:14.793427  PCI: 00:15.1: enabled 1

 2198 17:39:14.796562  PCI: 00:15.2: enabled 0

 2199 17:39:14.796636  PCI: 00:15.3: enabled 1

 2200 17:39:14.800292  PCI: 00:16.0: enabled 1

 2201 17:39:14.803387  PCI: 00:16.1: enabled 0

 2202 17:39:14.806798  PCI: 00:16.2: enabled 0

 2203 17:39:14.806872  PCI: 00:16.3: enabled 0

 2204 17:39:14.810069  PCI: 00:16.4: enabled 0

 2205 17:39:14.813513  PCI: 00:16.5: enabled 0

 2206 17:39:14.813589  PCI: 00:17.0: enabled 0

 2207 17:39:14.816612  PCI: 00:19.0: enabled 0

 2208 17:39:14.820204  PCI: 00:19.1: enabled 1

 2209 17:39:14.823336  PCI: 00:19.2: enabled 0

 2210 17:39:14.823412  PCI: 00:1a.0: enabled 0

 2211 17:39:14.826597  PCI: 00:1c.0: enabled 0

 2212 17:39:14.829906  PCI: 00:1c.1: enabled 0

 2213 17:39:14.833199  PCI: 00:1c.2: enabled 0

 2214 17:39:14.833273  PCI: 00:1c.3: enabled 0

 2215 17:39:14.836723  PCI: 00:1c.4: enabled 0

 2216 17:39:14.840168  PCI: 00:1c.5: enabled 0

 2217 17:39:14.843309  PCI: 00:1c.6: enabled 0

 2218 17:39:14.843384  PCI: 00:1c.7: enabled 0

 2219 17:39:14.846698  PCI: 00:1d.0: enabled 0

 2220 17:39:14.850015  PCI: 00:1d.1: enabled 0

 2221 17:39:14.850095  PCI: 00:1d.2: enabled 0

 2222 17:39:14.853116  PCI: 00:1d.3: enabled 0

 2223 17:39:14.856495  PCI: 00:1e.0: enabled 1

 2224 17:39:14.860289  PCI: 00:1e.1: enabled 0

 2225 17:39:14.860364  PCI: 00:1e.2: enabled 0

 2226 17:39:14.863541  PCI: 00:1e.3: enabled 1

 2227 17:39:14.866734  PCI: 00:1f.0: enabled 1

 2228 17:39:14.869875  PCI: 00:1f.1: enabled 0

 2229 17:39:14.869950  PCI: 00:1f.2: enabled 1

 2230 17:39:14.873084  PCI: 00:1f.3: enabled 1

 2231 17:39:14.876556  PCI: 00:1f.4: enabled 0

 2232 17:39:14.880097  PCI: 00:1f.5: enabled 1

 2233 17:39:14.880171  PCI: 00:1f.6: enabled 0

 2234 17:39:14.883581  PCI: 00:1f.7: enabled 0

 2235 17:39:14.886646  GENERIC: 0.0: enabled 1

 2236 17:39:14.889832  GENERIC: 0.0: enabled 1

 2237 17:39:14.889902  GENERIC: 1.0: enabled 1

 2238 17:39:14.893341  GENERIC: 0.0: enabled 1

 2239 17:39:14.896625  GENERIC: 1.0: enabled 1

 2240 17:39:14.896696  USB0 port 0: enabled 1

 2241 17:39:14.899883  USB0 port 0: enabled 1

 2242 17:39:14.903202  GENERIC: 0.0: enabled 1

 2243 17:39:14.906323  I2C: 00:1a: enabled 1

 2244 17:39:14.906390  I2C: 00:31: enabled 1

 2245 17:39:14.909715  I2C: 00:32: enabled 1

 2246 17:39:14.912876  I2C: 00:50: enabled 1

 2247 17:39:14.912930  I2C: 00:10: enabled 1

 2248 17:39:14.916557  I2C: 00:15: enabled 1

 2249 17:39:14.919546  I2C: 00:2c: enabled 1

 2250 17:39:14.919604  GENERIC: 0.0: enabled 1

 2251 17:39:14.922926  SPI: 00: enabled 1

 2252 17:39:14.926080  PNP: 0c09.0: enabled 1

 2253 17:39:14.926147  GENERIC: 0.0: enabled 1

 2254 17:39:14.929589  USB3 port 0: enabled 1

 2255 17:39:14.933111  USB3 port 1: enabled 0

 2256 17:39:14.933168  USB3 port 2: enabled 1

 2257 17:39:14.936441  USB3 port 3: enabled 0

 2258 17:39:14.939458  USB2 port 0: enabled 1

 2259 17:39:14.942710  USB2 port 1: enabled 0

 2260 17:39:14.942775  USB2 port 2: enabled 1

 2261 17:39:14.946195  USB2 port 3: enabled 0

 2262 17:39:14.949497  USB2 port 4: enabled 0

 2263 17:39:14.949569  USB2 port 5: enabled 1

 2264 17:39:14.953017  USB2 port 6: enabled 0

 2265 17:39:14.956060  USB2 port 7: enabled 0

 2266 17:39:14.959370  USB2 port 8: enabled 1

 2267 17:39:14.959423  USB2 port 9: enabled 1

 2268 17:39:14.962971  USB3 port 0: enabled 1

 2269 17:39:14.966124  USB3 port 1: enabled 0

 2270 17:39:14.966186  USB3 port 2: enabled 0

 2271 17:39:14.969447  USB3 port 3: enabled 0

 2272 17:39:14.973066  GENERIC: 0.0: enabled 1

 2273 17:39:14.976269  GENERIC: 1.0: enabled 1

 2274 17:39:14.976340  APIC: 00: enabled 1

 2275 17:39:14.979569  APIC: 14: enabled 1

 2276 17:39:14.979643  APIC: 16: enabled 1

 2277 17:39:14.982723  APIC: 10: enabled 1

 2278 17:39:14.985938  APIC: 12: enabled 1

 2279 17:39:14.986012  APIC: 09: enabled 1

 2280 17:39:14.989587  APIC: 01: enabled 1

 2281 17:39:14.989670  APIC: 08: enabled 1

 2282 17:39:14.992879  PCI: 01:00.0: enabled 1

 2283 17:39:14.999223  BS: BS_DEV_INIT run times (exec / console): 12 / 1133 ms

 2284 17:39:15.002981  FMAP: area RW_ELOG found @ f20000 (16384 bytes)

 2285 17:39:15.006358  ELOG: NV offset 0xf20000 size 0x4000

 2286 17:39:15.014665  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 2287 17:39:15.021598  ELOG: Event(17) added with size 13 at 2023-10-20 17:39:15 UTC

 2288 17:39:15.027950  ELOG: Event(9E) added with size 10 at 2023-10-20 17:39:15 UTC

 2289 17:39:15.034405  ELOG: Event(9F) added with size 14 at 2023-10-20 17:39:15 UTC

 2290 17:39:15.041147  BS: BS_DEV_INIT exit times (exec / console): 3 / 33 ms

 2291 17:39:15.048114  ELOG: Event(A0) added with size 9 at 2023-10-20 17:39:15 UTC

 2292 17:39:15.051532  elog_add_boot_reason: Logged dev mode boot

 2293 17:39:15.057949  BS: BS_POST_DEVICE entry times (exec / console): 1 / 10 ms

 2294 17:39:15.061368  Finalize devices...

 2295 17:39:15.061450  PCI: 00:16.0 final

 2296 17:39:15.064598  PCI: 00:1f.2 final

 2297 17:39:15.064672  GENERIC: 0.0 final

 2298 17:39:15.071290  added type-c port0 info to cbmem: usb2:1 usb3:1 sbu:0 data:0

 2299 17:39:15.074466  GENERIC: 1.0 final

 2300 17:39:15.081220  added type-c port1 info to cbmem: usb2:3 usb3:3 sbu:0 data:0

 2301 17:39:15.081298  Devices finalized

 2302 17:39:15.087651  BS: BS_POST_DEVICE run times (exec / console): 0 / 24 ms

 2303 17:39:15.091203  FMAP: area RW_NVRAM found @ f2b000 (24576 bytes)

 2304 17:39:15.097980  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 2305 17:39:15.104237  ME: HFSTS1                      : 0x90000245

 2306 17:39:15.107557  ME: HFSTS2                      : 0x82100116

 2307 17:39:15.110727  ME: HFSTS3                      : 0x00000050

 2308 17:39:15.117705  ME: HFSTS4                      : 0x00004000

 2309 17:39:15.121026  ME: HFSTS5                      : 0x00000000

 2310 17:39:15.124318  ME: HFSTS6                      : 0x40600006

 2311 17:39:15.127533  ME: Manufacturing Mode          : NO

 2312 17:39:15.134451  ME: SPI Protection Mode Enabled : YES

 2313 17:39:15.137436  ME: FPFs Committed              : YES

 2314 17:39:15.140925  ME: Manufacturing Vars Locked   : YES

 2315 17:39:15.144052  ME: FW Partition Table          : OK

 2316 17:39:15.147243  ME: Bringup Loader Failure      : NO

 2317 17:39:15.150913  ME: Firmware Init Complete      : YES

 2318 17:39:15.154358  ME: Boot Options Present        : NO

 2319 17:39:15.157360  ME: Update In Progress          : NO

 2320 17:39:15.164019  ME: D0i3 Support                : YES

 2321 17:39:15.167719  ME: Low Power State Enabled     : NO

 2322 17:39:15.170952  ME: CPU Replaced                : YES

 2323 17:39:15.173966  ME: CPU Replacement Valid       : YES

 2324 17:39:15.177156  ME: Current Working State       : 5

 2325 17:39:15.180782  ME: Current Operation State     : 1

 2326 17:39:15.184121  ME: Current Operation Mode      : 0

 2327 17:39:15.187512  ME: Error Code                  : 0

 2328 17:39:15.190632  ME: Enhanced Debug Mode         : NO

 2329 17:39:15.197538  ME: CPU Debug Disabled          : YES

 2330 17:39:15.200615  ME: TXT Support                 : NO

 2331 17:39:15.204012  ME: WP for RO is enabled        : YES

 2332 17:39:15.210636  ME: RO write protection scope - Start=0x1000, End=0x15AFFF

 2333 17:39:15.217198  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 111 ms

 2334 17:39:15.220364  Ramoops buffer: 0x100000@0x76899000.

 2335 17:39:15.223865  BS: BS_WRITE_TABLES entry times (exec / console): 0 / 4 ms

 2336 17:39:15.233953  CBFS: Found 'fallback/dsdt.aml' @0x787c0 size 0x4fd1 in mcache @0x76add18c

 2337 17:39:15.237300  CBFS: 'fallback/slic' not found.

 2338 17:39:15.240370  ACPI: Writing ACPI tables at 7686d000.

 2339 17:39:15.240455  ACPI:    * FACS

 2340 17:39:15.243770  ACPI:    * DSDT

 2341 17:39:15.250385  PCI space above 4GB MMIO is at 0x27fc00000, len = 0x7d80400000

 2342 17:39:15.254074  ACPI:    * FADT

 2343 17:39:15.254149  SCI is IRQ9

 2344 17:39:15.257318  ACPI: added table 1/32, length now 40

 2345 17:39:15.260562  ACPI:     * SSDT

 2346 17:39:15.267298  Found 1 CPU(s) with 6/8 physical/logical core(s) each.

 2347 17:39:15.270215  \_SB.PCI0.PEPD: Intel Power Engine Plug-in

 2348 17:39:15.277609  \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2

 2349 17:39:15.280376  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 2350 17:39:15.287232  CBFS: Found 'wifi_sar_0.hex' @0x1bbd00 size 0xe6 in mcache @0x76add3e4

 2351 17:39:15.290154  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 2352 17:39:15.297299  \_SB.PCI0.I2C0.NAU8: Nuvoton NAU8825 Codec address 01ah irq 0

 2353 17:39:15.303539  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 2354 17:39:15.307174  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 2355 17:39:15.313746  \_SB.PCI0.I2C1.TPMI: I2C TPM at I2C: 00:50

 2356 17:39:15.317028  \_SB.PCI0.I2C3.H010: ELAN Touchscreen at I2C: 00:10

 2357 17:39:15.323728  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 2358 17:39:15.326889  \_SB.PCI0.I2C5.H02C: Synaptics Touchpad at I2C: 00:2c

 2359 17:39:15.330991  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 2360 17:39:15.338692  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 2361 17:39:15.342002  PS2K: Passing 80 keymaps to kernel

 2362 17:39:15.348627  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 2363 17:39:15.355436  \_SB.PCI0.TXHC.RHUB.SS03: USB3 Type-C Port C1 (DB) at USB3 port 2

 2364 17:39:15.361792  \_SB.PCI0.XHCI.RHUB.HS01: USB2 Type-C Port C0 (MLB) at USB2 port 0

 2365 17:39:15.368634  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 2366 17:39:15.375134  \_SB.PCI0.XHCI.RHUB.HS06: USB2 Camera at USB2 port 5

 2367 17:39:15.381997  \_SB.PCI0.XHCI.RHUB.HS09: USB2 Type-A Port A0 (DB) at USB2 port 8

 2368 17:39:15.385080  \_SB.PCI0.XHCI.RHUB.HS10: USB2 Bluetooth at USB2 port 9

 2369 17:39:15.392058  \_SB.PCI0.XHCI.RHUB.SS01: USB3 Type-A Port A0 (DB) at USB3 port 0

 2370 17:39:15.398338  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 2371 17:39:15.404930  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 2372 17:39:15.408494  ACPI: added table 2/32, length now 44

 2373 17:39:15.411791  ACPI:    * MCFG

 2374 17:39:15.414863  ACPI: added table 3/32, length now 48

 2375 17:39:15.414936  ACPI:    * TPM2

 2376 17:39:15.419090  TPM2 log created at 0x7685d000

 2377 17:39:15.424850  ACPI: added table 4/32, length now 52

 2378 17:39:15.424926  ACPI:     * LPIT

 2379 17:39:15.428232  ACPI: added table 5/32, length now 56

 2380 17:39:15.431757  ACPI:    * MADT

 2381 17:39:15.431832  SCI is IRQ9

 2382 17:39:15.434890  ACPI: added table 6/32, length now 60

 2383 17:39:15.438540  cmd_reg from pmc_make_ipc_cmd 1052838

 2384 17:39:15.444819  CL PMC desc table: numb of regions is 0x2 at addr 0xfe0121bc

 2385 17:39:15.451424  CL PMC desc table: region 0x0 has size 0x280 at offset 0x2200

 2386 17:39:15.458528  CL PMC desc table: region 0x1 has size 0x80 at offset 0x3e00

 2387 17:39:15.461328  PMC CrashLog size in discovery mode: 0xC00

 2388 17:39:15.464750  cpu crashlog bar addr: 0x80640000

 2389 17:39:15.468096  cpu discovery table offset: 0x6030

 2390 17:39:15.474949  cpu_crashlog_discovery_table buffer count: 0x3

 2391 17:39:15.481471  cpu_crashlog_discovery_table buffer: 0x0 size: 0x700 offset: 0x0

 2392 17:39:15.488248  cpu_crashlog_discovery_table buffer: 0x1 size: 0x2b0 offset: 0x4000

 2393 17:39:15.494707  cpu_crashlog_discovery_table buffer: 0x2 size: 0x370 offset: 0x5000

 2394 17:39:15.498224  PMC crashLog size in discovery mode : 0xC00

 2395 17:39:15.504551  Invalid data 0x0 at offset 0x2200 from addr 0xfe010000 of PMC SRAM.

 2396 17:39:15.511164  discover mode PMC crashlog size adjusted to: 0x200

 2397 17:39:15.517877  Invalid data 0x0 at offset 0x3e00 from addr 0xfe010000 of PMC SRAM.

 2398 17:39:15.521241  discover mode PMC crashlog size adjusted to: 0x0

 2399 17:39:15.524374  m_cpu_crashLog_size : 0x3480 bytes

 2400 17:39:15.527790  CPU crashLog present.

 2401 17:39:15.531526  CPU crash data size: 0x3480 bytes in 0x3 region(s).

 2402 17:39:15.541138  Invalid data 0x0 at offset 0x0 from addr 0x80640000 of telemetry SRAM.

 2403 17:39:15.541198  current = 76876550

 2404 17:39:15.544315  ACPI:    * DMAR

 2405 17:39:15.548100  ACPI: added table 7/32, length now 64

 2406 17:39:15.550850  ACPI: added table 8/32, length now 68

 2407 17:39:15.550928  ACPI:    * HPET

 2408 17:39:15.557699  ACPI: added table 9/32, length now 72

 2409 17:39:15.557765  ACPI: done.

 2410 17:39:15.561125  ACPI tables: 38528 bytes.

 2411 17:39:15.564779  smbios_write_tables: 76857000

 2412 17:39:15.568017  EC returned error result code 3

 2413 17:39:15.571120  Couldn't obtain OEM name from CBI

 2414 17:39:15.574942  Create SMBIOS type 16

 2415 17:39:15.575008  Create SMBIOS type 17

 2416 17:39:15.577645  Create SMBIOS type 20

 2417 17:39:15.581135  GENERIC: 0.0 (WIFI Device)

 2418 17:39:15.584233  SMBIOS tables: 2156 bytes.

 2419 17:39:15.587521  Writing table forward entry at 0x00000500

 2420 17:39:15.594374  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 7955

 2421 17:39:15.597541  Writing coreboot table at 0x76891000

 2422 17:39:15.604325   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 2423 17:39:15.607801   1. 0000000000001000-000000000009ffff: RAM

 2424 17:39:15.614440   2. 00000000000a0000-00000000000fffff: RESERVED

 2425 17:39:15.617599   3. 0000000000100000-0000000076856fff: RAM

 2426 17:39:15.623967   4. 0000000076857000-0000000076a2efff: CONFIGURATION TABLES

 2427 17:39:15.627336   5. 0000000076a2f000-0000000076ab7fff: RAMSTAGE

 2428 17:39:15.633888   6. 0000000076ab8000-0000000076ffffff: CONFIGURATION TABLES

 2429 17:39:15.637581   7. 0000000077000000-00000000803fffff: RESERVED

 2430 17:39:15.644169   8. 00000000c0000000-00000000cfffffff: RESERVED

 2431 17:39:15.647184   9. 00000000f8000000-00000000f9ffffff: RESERVED

 2432 17:39:15.653861  10. 00000000fb000000-00000000fb000fff: RESERVED

 2433 17:39:15.657153  11. 00000000fc800000-00000000fe7fffff: RESERVED

 2434 17:39:15.663766  12. 00000000feb00000-00000000feb7ffff: RESERVED

 2435 17:39:15.667195  13. 00000000fec00000-00000000fecfffff: RESERVED

 2436 17:39:15.671201  14. 00000000fed40000-00000000fed6ffff: RESERVED

 2437 17:39:15.677120  15. 00000000fed80000-00000000fed87fff: RESERVED

 2438 17:39:15.680480  16. 00000000fed90000-00000000fed92fff: RESERVED

 2439 17:39:15.686917  17. 00000000feda0000-00000000feda1fff: RESERVED

 2440 17:39:15.690498  18. 00000000fedc0000-00000000feddffff: RESERVED

 2441 17:39:15.696820  19. 0000000100000000-000000027fbfffff: RAM

 2442 17:39:15.696883  Passing 4 GPIOs to payload:

 2443 17:39:15.703833              NAME |       PORT | POLARITY |     VALUE

 2444 17:39:15.710361               lid |  undefined |     high |      high

 2445 17:39:15.713707             power |  undefined |     high |       low

 2446 17:39:15.720460             oprom |  undefined |     high |       low

 2447 17:39:15.723932          EC in RW | 0x00000151 |     high |      high

 2448 17:39:15.726847  Board ID: 3

 2449 17:39:15.726915  FW config: 0x131

 2450 17:39:15.733467  Wrote coreboot table at: 0x76891000, 0x6e4 bytes, checksum c641

 2451 17:39:15.737307  coreboot table: 1788 bytes.

 2452 17:39:15.740320  IMD ROOT    0. 0x76fff000 0x00001000

 2453 17:39:15.743558  IMD SMALL   1. 0x76ffe000 0x00001000

 2454 17:39:15.746854  FSP MEMORY  2. 0x76afe000 0x00500000

 2455 17:39:15.753549  CONSOLE     3. 0x76ade000 0x00020000

 2456 17:39:15.756852  RW MCACHE   4. 0x76add000 0x0000043c

 2457 17:39:15.760520  RO MCACHE   5. 0x76adc000 0x00000fd8

 2458 17:39:15.763769  FMAP        6. 0x76adb000 0x0000064a

 2459 17:39:15.767087  TIME STAMP  7. 0x76ada000 0x00000910

 2460 17:39:15.770147  VBOOT WORK  8. 0x76ac6000 0x00014000

 2461 17:39:15.773485  MEM INFO    9. 0x76ac5000 0x000003b8

 2462 17:39:15.776847  ROMSTG STCK10. 0x76ac4000 0x00001000

 2463 17:39:15.780668  AFTER CAR  11. 0x76ab8000 0x0000c000

 2464 17:39:15.787402  RAMSTAGE   12. 0x76a2e000 0x0008a000

 2465 17:39:15.790135  ACPI BERT  13. 0x76a1e000 0x00010000

 2466 17:39:15.793630  CHROMEOS NVS14. 0x76a1d000 0x00000f00

 2467 17:39:15.796801  REFCODE    15. 0x769ae000 0x0006f000

 2468 17:39:15.800295  SMM BACKUP 16. 0x7699e000 0x00010000

 2469 17:39:15.803512  IGD OPREGION17. 0x76999000 0x00004203

 2470 17:39:15.807149  RAMOOPS    18. 0x76899000 0x00100000

 2471 17:39:15.810361  COREBOOT   19. 0x76891000 0x00008000

 2472 17:39:15.816795  ACPI       20. 0x7686d000 0x00024000

 2473 17:39:15.819912  TPM2 TCGLOG21. 0x7685d000 0x00010000

 2474 17:39:15.823646  PMC CRASHLOG22. 0x7685c000 0x00000c00

 2475 17:39:15.826789  CPU CRASHLOG23. 0x76858000 0x00003480

 2476 17:39:15.829979  SMBIOS     24. 0x76857000 0x00001000

 2477 17:39:15.833337  IMD small region:

 2478 17:39:15.836631    IMD ROOT    0. 0x76ffec00 0x00000400

 2479 17:39:15.840704    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 2480 17:39:15.843448    VPD         2. 0x76ffeb80 0x00000058

 2481 17:39:15.846718    POWER STATE 3. 0x76ffeb20 0x00000044

 2482 17:39:15.853356    ROMSTAGE    4. 0x76ffeb00 0x00000004

 2483 17:39:15.856648    ACPI GNVS   5. 0x76ffeaa0 0x00000048

 2484 17:39:15.859995    TYPE_C INFO 6. 0x76ffea80 0x0000000c

 2485 17:39:15.866894  BS: BS_WRITE_TABLES run times (exec / console): 7 / 628 ms

 2486 17:39:15.870033  MTRR: Physical address space:

 2487 17:39:15.876724  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 2488 17:39:15.880215  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 2489 17:39:15.886710  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 2490 17:39:15.893036  0x0000000077000000 - 0x0000000090000000 size 0x19000000 type 0

 2491 17:39:15.900359  0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1

 2492 17:39:15.906547  0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0

 2493 17:39:15.912933  0x0000000100000000 - 0x000000027fc00000 size 0x17fc00000 type 6

 2494 17:39:15.916805  MTRR: Fixed MSR 0x250 0x0606060606060606

 2495 17:39:15.919726  MTRR: Fixed MSR 0x258 0x0606060606060606

 2496 17:39:15.926648  MTRR: Fixed MSR 0x259 0x0000000000000000

 2497 17:39:15.929466  MTRR: Fixed MSR 0x268 0x0606060606060606

 2498 17:39:15.932778  MTRR: Fixed MSR 0x269 0x0606060606060606

 2499 17:39:15.936334  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2500 17:39:15.943071  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2501 17:39:15.946375  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2502 17:39:15.949583  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2503 17:39:15.952977  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2504 17:39:15.956109  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2505 17:39:15.960970  call enable_fixed_mtrr()

 2506 17:39:15.964745  CPU physical address size: 39 bits

 2507 17:39:15.970960  MTRR: default type WB/UC MTRR counts: 6/6.

 2508 17:39:15.974295  MTRR: UC selected as default type.

 2509 17:39:15.980931  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 2510 17:39:15.984208  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 2511 17:39:15.990760  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 2512 17:39:15.997602  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 1

 2513 17:39:16.003999  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 2514 17:39:16.010740  MTRR: 5 base 0x0000000200000000 mask 0x0000007f80000000 type 6

 2515 17:39:16.017429  MTRR: Fixed MSR 0x250 0x0606060606060606

 2516 17:39:16.020487  MTRR: Fixed MSR 0x258 0x0606060606060606

 2517 17:39:16.024282  MTRR: Fixed MSR 0x259 0x0000000000000000

 2518 17:39:16.027486  MTRR: Fixed MSR 0x268 0x0606060606060606

 2519 17:39:16.033972  MTRR: Fixed MSR 0x269 0x0606060606060606

 2520 17:39:16.037255  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2521 17:39:16.040616  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2522 17:39:16.043804  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2523 17:39:16.050680  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2524 17:39:16.053728  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2525 17:39:16.057167  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2526 17:39:16.060578  MTRR: Fixed MSR 0x250 0x0606060606060606

 2527 17:39:16.064374  call enable_fixed_mtrr()

 2528 17:39:16.067546  MTRR: Fixed MSR 0x250 0x0606060606060606

 2529 17:39:16.070596  MTRR: Fixed MSR 0x250 0x0606060606060606

 2530 17:39:16.076929  MTRR: Fixed MSR 0x258 0x0606060606060606

 2531 17:39:16.080371  MTRR: Fixed MSR 0x259 0x0000000000000000

 2532 17:39:16.084244  MTRR: Fixed MSR 0x268 0x0606060606060606

 2533 17:39:16.087229  MTRR: Fixed MSR 0x269 0x0606060606060606

 2534 17:39:16.093655  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2535 17:39:16.096925  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2536 17:39:16.100473  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2537 17:39:16.103516  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2538 17:39:16.110334  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2539 17:39:16.113484  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2540 17:39:16.117075  MTRR: Fixed MSR 0x258 0x0606060606060606

 2541 17:39:16.120644  call enable_fixed_mtrr()

 2542 17:39:16.123778  MTRR: Fixed MSR 0x250 0x0606060606060606

 2543 17:39:16.127227  MTRR: Fixed MSR 0x258 0x0606060606060606

 2544 17:39:16.130417  CPU physical address size: 39 bits

 2545 17:39:16.136956  MTRR: Fixed MSR 0x258 0x0606060606060606

 2546 17:39:16.140253  CPU physical address size: 39 bits

 2547 17:39:16.143433  MTRR: Fixed MSR 0x259 0x0000000000000000

 2548 17:39:16.146897  MTRR: Fixed MSR 0x259 0x0000000000000000

 2549 17:39:16.150179  MTRR: Fixed MSR 0x268 0x0606060606060606

 2550 17:39:16.156817  MTRR: Fixed MSR 0x269 0x0606060606060606

 2551 17:39:16.160412  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2552 17:39:16.163297  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2553 17:39:16.166818  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2554 17:39:16.173614  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2555 17:39:16.176592  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2556 17:39:16.179805  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2557 17:39:16.183333  MTRR: Fixed MSR 0x250 0x0606060606060606

 2558 17:39:16.186758  call enable_fixed_mtrr()

 2559 17:39:16.189864  MTRR: Fixed MSR 0x259 0x0000000000000000

 2560 17:39:16.193228  MTRR: Fixed MSR 0x268 0x0606060606060606

 2561 17:39:16.200344  MTRR: Fixed MSR 0x269 0x0606060606060606

 2562 17:39:16.203475  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2563 17:39:16.206685  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2564 17:39:16.209777  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2565 17:39:16.216961  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2566 17:39:16.219953  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2567 17:39:16.223286  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2568 17:39:16.227128  CPU physical address size: 39 bits

 2569 17:39:16.229683  call enable_fixed_mtrr()

 2570 17:39:16.233196  MTRR: Fixed MSR 0x268 0x0606060606060606

 2571 17:39:16.236499  CPU physical address size: 39 bits

 2572 17:39:16.240176  MTRR: Fixed MSR 0x269 0x0606060606060606

 2573 17:39:16.246714  MTRR: Fixed MSR 0x258 0x0606060606060606

 2574 17:39:16.249971  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2575 17:39:16.253144  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2576 17:39:16.256610  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2577 17:39:16.262970  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2578 17:39:16.266322  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2579 17:39:16.269854  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2580 17:39:16.273279  MTRR: Fixed MSR 0x259 0x0000000000000000

 2581 17:39:16.276584  call enable_fixed_mtrr()

 2582 17:39:16.279567  MTRR: Fixed MSR 0x268 0x0606060606060606

 2583 17:39:16.286365  MTRR: Fixed MSR 0x269 0x0606060606060606

 2584 17:39:16.289551  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2585 17:39:16.292924  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2586 17:39:16.295996  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2587 17:39:16.303018  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2588 17:39:16.305957  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2589 17:39:16.309549  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2590 17:39:16.312490  CPU physical address size: 39 bits

 2591 17:39:16.316363  MTRR: Fixed MSR 0x250 0x0606060606060606

 2592 17:39:16.319505  call enable_fixed_mtrr()

 2593 17:39:16.322965  MTRR: Fixed MSR 0x258 0x0606060606060606

 2594 17:39:16.329561  MTRR: Fixed MSR 0x259 0x0000000000000000

 2595 17:39:16.332899  MTRR: Fixed MSR 0x268 0x0606060606060606

 2596 17:39:16.336127  MTRR: Fixed MSR 0x269 0x0606060606060606

 2597 17:39:16.339271  CPU physical address size: 39 bits

 2598 17:39:16.342985  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2599 17:39:16.349444  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2600 17:39:16.352545  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2601 17:39:16.356616  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2602 17:39:16.359357  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2603 17:39:16.365878  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2604 17:39:16.369123  call enable_fixed_mtrr()

 2605 17:39:16.372372  CPU physical address size: 39 bits

 2606 17:39:16.372438  

 2607 17:39:16.375869  MTRR check

 2608 17:39:16.379053  Fixed MTRRs   : Enabled

 2609 17:39:16.379116  Variable MTRRs: Enabled

 2610 17:39:16.379163  

 2611 17:39:16.385901  BS: BS_WRITE_TABLES exit times (exec / console): 250 / 150 ms

 2612 17:39:16.388975  Checking cr50 for pending updates

 2613 17:39:16.401623  Reading cr50 TPM mode

 2614 17:39:16.416403  BS: BS_PAYLOAD_LOAD entry times (exec / console): 18 / 6 ms

 2615 17:39:16.426820  CBFS: Found 'fallback/payload' @0x1bbe40 size 0x25902 in mcache @0x76add40c

 2616 17:39:16.429789  Checking segment from ROM address 0xf96cbe6c

 2617 17:39:16.433193  Checking segment from ROM address 0xf96cbe88

 2618 17:39:16.440237  Loading segment from ROM address 0xf96cbe6c

 2619 17:39:16.440608    code (compression=1)

 2620 17:39:16.450127    New segment dstaddr 0x30000000 memsize 0x2668e60 srcaddr 0xf96cbea4 filesize 0x258ca

 2621 17:39:16.456751  Loading Segment: addr: 0x30000000 memsz: 0x0000000002668e60 filesz: 0x00000000000258ca

 2622 17:39:16.459772  using LZMA

 2623 17:39:16.482054  [ 0x30000000, 30051214, 0x32668e60) <- f96cbea4

 2624 17:39:16.488590  Clearing Segment: addr: 0x0000000030051214 memsz: 0x0000000002617c4c

 2625 17:39:16.496790  Loading segment from ROM address 0xf96cbe88

 2626 17:39:16.500219    Entry Point 0x30000000

 2627 17:39:16.500295  Loaded segments

 2628 17:39:16.506890  BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 62 ms

 2629 17:39:16.513691  BS: BS_PAYLOAD_LOAD exit times (exec / console): 1 / 0 ms

 2630 17:39:16.516811  Finalizing chipset.

 2631 17:39:16.516887  apm_control: Finalizing SMM.

 2632 17:39:16.520251  APMC done.

 2633 17:39:16.523626  HECI: CSE device 16.1 is disabled

 2634 17:39:16.526917  HECI: CSE device 16.2 is disabled

 2635 17:39:16.530579  HECI: CSE device 16.3 is disabled

 2636 17:39:16.533576  HECI: CSE device 16.4 is disabled

 2637 17:39:16.537681  HECI: CSE device 16.5 is disabled

 2638 17:39:16.540197  HECI: Sending End-of-Post

 2639 17:39:16.548590  CSE: EOP requested action: continue boot

 2640 17:39:16.551627  CSE EOP successful, continuing boot

 2641 17:39:16.558505  BS: BS_PAYLOAD_BOOT entry times (exec / console): 4 / 34 ms

 2642 17:39:16.562032  mp_park_aps done after 0 msecs.

 2643 17:39:16.565200  Jumping to boot code at 0x30000000(0x76891000)

 2644 17:39:16.575670  CPU0: stack: 0x76a99000 - 0x76a9a000, lowest used address 0x76a993dc, stack used: 3108 bytes

 2645 17:39:16.579301  

 2646 17:39:16.579752  

 2647 17:39:16.580006  

 2648 17:39:16.582528  Starting depthcharge on Volmar...

 2649 17:39:16.582876  

 2650 17:39:16.583755  end: 2.2.3 depthcharge-start (duration 00:00:14) [common]
 2651 17:39:16.584135  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2652 17:39:16.584415  Setting prompt string to ['brya:']
 2653 17:39:16.584686  bootloader-commands: Wait for prompt ['brya:'] (timeout 00:04:41)
 2654 17:39:16.589018  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2655 17:39:16.589361  

 2656 17:39:16.595845  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2657 17:39:16.596210  

 2658 17:39:16.602293  Looking for NVMe Controller 0x300653d8 @ 00:06:00

 2659 17:39:16.602547  

 2660 17:39:16.605810  configure_storage: Failed to remap 1C:2

 2661 17:39:16.606278  

 2662 17:39:16.608977  Wipe memory regions:

 2663 17:39:16.609318  

 2664 17:39:16.612432  	[0x00000000001000, 0x000000000a0000)

 2665 17:39:16.612749  

 2666 17:39:16.615585  	[0x00000000100000, 0x00000030000000)

 2667 17:39:16.726378  

 2668 17:39:16.729127  	[0x00000032668e60, 0x00000076857000)

 2669 17:39:16.883842  

 2670 17:39:16.887062  	[0x00000100000000, 0x0000027fc00000)

 2671 17:39:17.752571  

 2672 17:39:17.755662  ec_init: CrosEC protocol v3 supported (256, 256)

 2673 17:39:18.365068  

 2674 17:39:18.365584  R8152: Initializing

 2675 17:39:18.365874  

 2676 17:39:18.367960  Version 9 (ocp_data = 6010)

 2677 17:39:18.368406  

 2678 17:39:18.371157  R8152: Done initializing

 2679 17:39:18.371537  

 2680 17:39:18.374394  Adding net device

 2681 17:39:18.674799  

 2682 17:39:18.678042  [firmware-brya-14505.B-collabora] Feb  7 2023 16:06:26

 2683 17:39:18.678123  

 2684 17:39:18.678188  

 2685 17:39:18.678240  

 2686 17:39:18.678506  Setting prompt string to ['brya:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2688 17:39:18.778814  brya: tftpboot 192.168.201.1 11831878/tftp-deploy-ivf_1wy0/kernel/bzImage 11831878/tftp-deploy-ivf_1wy0/kernel/cmdline 11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz

 2689 17:39:18.779022  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2690 17:39:18.779118  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2691 17:39:18.783231  tftpboot 192.168.201.1 11831878/tftp-deploy-ivf_1wy0/kernel/bzIploy-ivf_1wy0/kernel/cmdline 11831878/tftp-deploy-ivf_1wy0/ramdisk/ramdisk.cpio.gz

 2692 17:39:18.783312  

 2693 17:39:18.783367  Waiting for link

 2694 17:39:18.986371  

 2695 17:39:18.986511  done.

 2696 17:39:18.986571  

 2697 17:39:18.986630  MAC: 00:e0:4c:68:02:ef

 2698 17:39:18.986684  

 2699 17:39:18.989827  Sending DHCP discover... done.

 2700 17:39:18.989917  

 2701 17:39:18.993133  Waiting for reply... done.

 2702 17:39:18.993222  

 2703 17:39:18.996749  Sending DHCP request... done.

 2704 17:39:18.996820  

 2705 17:39:18.999454  Waiting for reply... done.

 2706 17:39:18.999517  

 2707 17:39:19.003099  My ip is 192.168.201.16

 2708 17:39:19.003159  

 2709 17:39:19.006232  The DHCP server ip is 192.168.201.1

 2710 17:39:19.006304  

 2711 17:39:19.009420  TFTP server IP predefined by user: 192.168.201.1

 2712 17:39:19.009489  

 2713 17:39:19.015950  Bootfile predefined by user: 11831878/tftp-deploy-ivf_1wy0/kernel/bzImage

 2714 17:39:19.016028  

 2715 17:39:19.019836  Sending tftp read request... done.

 2716 17:39:19.019911  

 2717 17:39:19.026473  Waiting for the transfer... 

 2718 17:39:19.026560  

 2719 17:39:19.255696  00000000 ################################################################

 2720 17:39:19.255827  

 2721 17:39:19.483272  00080000 ################################################################

 2722 17:39:19.483409  

 2723 17:39:19.710481  00100000 ################################################################

 2724 17:39:19.710617  

 2725 17:39:19.936703  00180000 ################################################################

 2726 17:39:19.936830  

 2727 17:39:20.162141  00200000 ################################################################

 2728 17:39:20.162270  

 2729 17:39:20.389079  00280000 ################################################################

 2730 17:39:20.389209  

 2731 17:39:20.617226  00300000 ################################################################

 2732 17:39:20.617361  

 2733 17:39:20.845899  00380000 ################################################################

 2734 17:39:20.846039  

 2735 17:39:21.074226  00400000 ################################################################

 2736 17:39:21.074377  

 2737 17:39:21.304364  00480000 ################################################################

 2738 17:39:21.304517  

 2739 17:39:21.532388  00500000 ################################################################

 2740 17:39:21.532527  

 2741 17:39:21.761012  00580000 ################################################################

 2742 17:39:21.761155  

 2743 17:39:21.989616  00600000 ################################################################

 2744 17:39:21.989783  

 2745 17:39:22.216883  00680000 ################################################################

 2746 17:39:22.217026  

 2747 17:39:22.445112  00700000 ################################################################

 2748 17:39:22.445250  

 2749 17:39:22.672387  00780000 ################################################################

 2750 17:39:22.672518  

 2751 17:39:22.722997  00800000 ############### done.

 2752 17:39:22.723100  

 2753 17:39:22.726271  The bootfile was 8507280 bytes long.

 2754 17:39:22.726348  

 2755 17:39:22.729390  Sending tftp read request... done.

 2756 17:39:22.729476  

 2757 17:39:22.732831  Waiting for the transfer... 

 2758 17:39:22.732907  

 2759 17:39:22.964371  00000000 ################################################################

 2760 17:39:22.964518  

 2761 17:39:23.193174  00080000 ################################################################

 2762 17:39:23.193318  

 2763 17:39:23.422004  00100000 ################################################################

 2764 17:39:23.422160  

 2765 17:39:23.650874  00180000 ################################################################

 2766 17:39:23.651020  

 2767 17:39:23.879613  00200000 ################################################################

 2768 17:39:23.879753  

 2769 17:39:24.105110  00280000 ################################################################

 2770 17:39:24.105264  

 2771 17:39:24.330706  00300000 ################################################################

 2772 17:39:24.330850  

 2773 17:39:24.556550  00380000 ################################################################

 2774 17:39:24.556685  

 2775 17:39:24.783286  00400000 ################################################################

 2776 17:39:24.783429  

 2777 17:39:25.009665  00480000 ################################################################

 2778 17:39:25.009791  

 2779 17:39:25.237134  00500000 ################################################################ done.

 2780 17:39:25.240441  

 2781 17:39:25.244153  Sending tftp read request... done.

 2782 17:39:25.244232  

 2783 17:39:25.244285  Waiting for the transfer... 

 2784 17:39:25.244333  

 2785 17:39:25.247076  00000000 # done.

 2786 17:39:25.247159  

 2787 17:39:25.257098  Command line loaded dynamically from TFTP file: 11831878/tftp-deploy-ivf_1wy0/kernel/cmdline

 2788 17:39:25.257180  

 2789 17:39:25.280158  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831878/extract-nfsrootfs-x_xwpzi8,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2790 17:39:25.286316  

 2791 17:39:25.289393  Shutting down all USB controllers.

 2792 17:39:25.289469  

 2793 17:39:25.289524  Removing current net device

 2794 17:39:25.289572  

 2795 17:39:25.292607  Finalizing coreboot

 2796 17:39:25.292681  

 2797 17:39:25.299153  Exiting depthcharge with code 4 at timestamp: 18976530

 2798 17:39:25.299234  

 2799 17:39:25.299290  

 2800 17:39:25.299339  Starting kernel ...

 2801 17:39:25.299385  

 2802 17:39:25.299431  

 2803 17:39:25.299751  end: 2.2.4 bootloader-commands (duration 00:00:09) [common]
 2804 17:39:25.299834  start: 2.2.5 auto-login-action (timeout 00:04:32) [common]
 2805 17:39:25.299903  Setting prompt string to ['Linux version [0-9]']
 2806 17:39:25.299965  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2807 17:39:25.300020  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2809 17:43:57.300576  end: 2.2.5 auto-login-action (duration 00:04:32) [common]
 2811 17:43:57.301414  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 272 seconds'
 2813 17:43:57.302026  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2816 17:43:57.303016  end: 2 depthcharge-action (duration 00:05:00) [common]
 2818 17:43:57.304028  Cleaning after the job
 2819 17:43:57.304365  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/ramdisk
 2820 17:43:57.306279  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/kernel
 2821 17:43:57.307075  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/nfsrootfs
 2822 17:43:57.348726  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831878/tftp-deploy-ivf_1wy0/modules
 2823 17:43:57.349106  start: 5.1 power-off (timeout 00:00:30) [common]
 2824 17:43:57.349257  Calling: 'pduclient' '--daemon=localhost' '--hostname=acer-cbv514-1h-34uz-brya-cbg-3' '--port=1' '--command=off'
 2825 17:43:57.426289  >> Command sent successfully.

 2826 17:43:57.434183  Returned 0 in 0 seconds
 2827 17:43:57.535230  end: 5.1 power-off (duration 00:00:00) [common]
 2829 17:43:57.536553  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2830 17:43:57.537512  Listened to connection for namespace 'common' for up to 1s
 2832 17:43:57.538640  Listened to connection for namespace 'common' for up to 1s
 2833 17:43:58.537647  Finalising connection for namespace 'common'
 2834 17:43:58.538236  Disconnecting from shell: Finalise
 2835 17:43:58.538623  
 2836 17:43:58.639665  end: 5.2 read-feedback (duration 00:00:01) [common]
 2837 17:43:58.640228  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831878
 2838 17:43:58.815671  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831878
 2839 17:43:58.815866  JobError: Your job cannot terminate cleanly.