Boot log: asus-C436FA-Flip-hatch

    1 17:44:52.078758  lava-dispatcher, installed at version: 2023.08
    2 17:44:52.078988  start: 0 validate
    3 17:44:52.079127  Start time: 2023-10-20 17:44:52.079118+00:00 (UTC)
    4 17:44:52.079275  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:44:52.079421  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:44:52.351744  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:44:52.351926  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:44:52.609186  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:44:52.609372  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:44:52.865920  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:44:52.866111  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:44:53.125282  validate duration: 1.05
   14 17:44:53.125718  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:44:53.125882  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:44:53.126025  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:44:53.126205  Not decompressing ramdisk as can be used compressed.
   18 17:44:53.126358  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
   19 17:44:53.126472  saving as /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/ramdisk/initrd.cpio.gz
   20 17:44:53.126583  total size: 5432690 (5 MB)
   21 17:44:53.127845  progress   0 % (0 MB)
   22 17:44:53.129863  progress   5 % (0 MB)
   23 17:44:53.131510  progress  10 % (0 MB)
   24 17:44:53.133143  progress  15 % (0 MB)
   25 17:44:53.134959  progress  20 % (1 MB)
   26 17:44:53.136631  progress  25 % (1 MB)
   27 17:44:53.138228  progress  30 % (1 MB)
   28 17:44:53.140028  progress  35 % (1 MB)
   29 17:44:53.141626  progress  40 % (2 MB)
   30 17:44:53.143234  progress  45 % (2 MB)
   31 17:44:53.144889  progress  50 % (2 MB)
   32 17:44:53.146683  progress  55 % (2 MB)
   33 17:44:53.148448  progress  60 % (3 MB)
   34 17:44:53.150048  progress  65 % (3 MB)
   35 17:44:53.151852  progress  70 % (3 MB)
   36 17:44:53.153458  progress  75 % (3 MB)
   37 17:44:53.155051  progress  80 % (4 MB)
   38 17:44:53.156683  progress  85 % (4 MB)
   39 17:44:53.158453  progress  90 % (4 MB)
   40 17:44:53.160160  progress  95 % (4 MB)
   41 17:44:53.161779  progress 100 % (5 MB)
   42 17:44:53.162062  5 MB downloaded in 0.04 s (146.03 MB/s)
   43 17:44:53.162239  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:44:53.162522  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:44:53.162619  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:44:53.162712  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:44:53.162860  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:44:53.162941  saving as /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/kernel/bzImage
   50 17:44:53.163016  total size: 8507280 (8 MB)
   51 17:44:53.163092  No compression specified
   52 17:44:53.164292  progress   0 % (0 MB)
   53 17:44:53.166752  progress   5 % (0 MB)
   54 17:44:53.169740  progress  10 % (0 MB)
   55 17:44:53.172514  progress  15 % (1 MB)
   56 17:44:53.175103  progress  20 % (1 MB)
   57 17:44:53.177785  progress  25 % (2 MB)
   58 17:44:53.180386  progress  30 % (2 MB)
   59 17:44:53.182969  progress  35 % (2 MB)
   60 17:44:53.185561  progress  40 % (3 MB)
   61 17:44:53.188187  progress  45 % (3 MB)
   62 17:44:53.190774  progress  50 % (4 MB)
   63 17:44:53.193371  progress  55 % (4 MB)
   64 17:44:53.195897  progress  60 % (4 MB)
   65 17:44:53.198630  progress  65 % (5 MB)
   66 17:44:53.201271  progress  70 % (5 MB)
   67 17:44:53.203859  progress  75 % (6 MB)
   68 17:44:53.206417  progress  80 % (6 MB)
   69 17:44:53.208954  progress  85 % (6 MB)
   70 17:44:53.211499  progress  90 % (7 MB)
   71 17:44:53.214074  progress  95 % (7 MB)
   72 17:44:53.216641  progress 100 % (8 MB)
   73 17:44:53.216862  8 MB downloaded in 0.05 s (150.69 MB/s)
   74 17:44:53.217022  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:44:53.217276  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:44:53.217393  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:44:53.217501  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:44:53.217652  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
   80 17:44:53.217727  saving as /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/nfsrootfs/full.rootfs.tar
   81 17:44:53.217794  total size: 133380384 (127 MB)
   82 17:44:53.217873  Using unxz to decompress xz
   83 17:44:53.222429  progress   0 % (0 MB)
   84 17:44:53.605035  progress   5 % (6 MB)
   85 17:44:54.001628  progress  10 % (12 MB)
   86 17:44:54.332552  progress  15 % (19 MB)
   87 17:44:54.540445  progress  20 % (25 MB)
   88 17:44:54.814472  progress  25 % (31 MB)
   89 17:44:55.226870  progress  30 % (38 MB)
   90 17:44:55.620522  progress  35 % (44 MB)
   91 17:44:56.090568  progress  40 % (50 MB)
   92 17:44:56.537979  progress  45 % (57 MB)
   93 17:44:56.952910  progress  50 % (63 MB)
   94 17:44:57.385457  progress  55 % (69 MB)
   95 17:44:57.801309  progress  60 % (76 MB)
   96 17:44:58.221147  progress  65 % (82 MB)
   97 17:44:58.637912  progress  70 % (89 MB)
   98 17:44:59.061878  progress  75 % (95 MB)
   99 17:44:59.566767  progress  80 % (101 MB)
  100 17:45:00.052569  progress  85 % (108 MB)
  101 17:45:00.361131  progress  90 % (114 MB)
  102 17:45:00.754665  progress  95 % (120 MB)
  103 17:45:01.200255  progress 100 % (127 MB)
  104 17:45:01.206493  127 MB downloaded in 7.99 s (15.92 MB/s)
  105 17:45:01.206791  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 17:45:01.207123  end: 1.3 download-retry (duration 00:00:08) [common]
  108 17:45:01.207244  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:45:01.207362  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:45:01.207548  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:45:01.207636  saving as /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/modules/modules.tar
  112 17:45:01.207748  total size: 253900 (0 MB)
  113 17:45:01.207866  Using unxz to decompress xz
  114 17:45:01.212928  progress  12 % (0 MB)
  115 17:45:01.213423  progress  25 % (0 MB)
  116 17:45:01.213737  progress  38 % (0 MB)
  117 17:45:01.215431  progress  51 % (0 MB)
  118 17:45:01.217557  progress  64 % (0 MB)
  119 17:45:01.219673  progress  77 % (0 MB)
  120 17:45:01.221824  progress  90 % (0 MB)
  121 17:45:01.223761  progress 100 % (0 MB)
  122 17:45:01.230239  0 MB downloaded in 0.02 s (10.77 MB/s)
  123 17:45:01.230522  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:45:01.230850  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:45:01.230973  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  127 17:45:01.231100  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  128 17:45:03.685083  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831866/extract-nfsrootfs-3kl2sd7n
  129 17:45:03.685304  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  130 17:45:03.685461  start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
  131 17:45:03.685711  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3
  132 17:45:03.685921  makedir: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin
  133 17:45:03.686084  makedir: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/tests
  134 17:45:03.686253  makedir: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/results
  135 17:45:03.686419  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-add-keys
  136 17:45:03.686655  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-add-sources
  137 17:45:03.686870  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-background-process-start
  138 17:45:03.687060  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-background-process-stop
  139 17:45:03.687244  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-common-functions
  140 17:45:03.687423  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-echo-ipv4
  141 17:45:03.687603  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-install-packages
  142 17:45:03.687781  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-installed-packages
  143 17:45:03.687958  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-os-build
  144 17:45:03.688128  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-probe-channel
  145 17:45:03.688270  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-probe-ip
  146 17:45:03.688413  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-target-ip
  147 17:45:03.688556  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-target-mac
  148 17:45:03.688697  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-target-storage
  149 17:45:03.688840  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-case
  150 17:45:03.688986  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-event
  151 17:45:03.689127  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-feedback
  152 17:45:03.689269  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-raise
  153 17:45:03.689410  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-reference
  154 17:45:03.689551  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-runner
  155 17:45:03.689692  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-set
  156 17:45:03.689831  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-test-shell
  157 17:45:03.689973  Updating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-install-packages (oe)
  158 17:45:03.690144  Updating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/bin/lava-installed-packages (oe)
  159 17:45:03.690282  Creating /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/environment
  160 17:45:03.690388  LAVA metadata
  161 17:45:03.690466  - LAVA_JOB_ID=11831866
  162 17:45:03.690538  - LAVA_DISPATCHER_IP=192.168.201.1
  163 17:45:03.690654  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
  164 17:45:03.690731  skipped lava-vland-overlay
  165 17:45:03.690816  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  166 17:45:03.690906  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
  167 17:45:03.690974  skipped lava-multinode-overlay
  168 17:45:03.691056  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  169 17:45:03.691143  start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
  170 17:45:03.691234  Loading test definitions
  171 17:45:03.691334  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
  172 17:45:03.691412  Using /lava-11831866 at stage 0
  173 17:45:03.691755  uuid=11831866_1.5.2.3.1 testdef=None
  174 17:45:03.691853  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  175 17:45:03.691948  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  176 17:45:03.692655  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  178 17:45:03.692899  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  179 17:45:03.693610  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  181 17:45:03.693862  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  182 17:45:03.694556  runner path: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/0/tests/0_dmesg test_uuid 11831866_1.5.2.3.1
  183 17:45:03.694732  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  185 17:45:03.694980  start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
  186 17:45:03.695058  Using /lava-11831866 at stage 1
  187 17:45:03.695390  uuid=11831866_1.5.2.3.5 testdef=None
  188 17:45:03.695488  end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
  189 17:45:03.695582  start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
  190 17:45:03.696119  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  192 17:45:03.696358  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
  193 17:45:03.697092  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  195 17:45:03.697349  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
  196 17:45:03.698049  runner path: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/1/tests/1_bootrr test_uuid 11831866_1.5.2.3.5
  197 17:45:03.698221  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  199 17:45:03.698447  Creating lava-test-runner.conf files
  200 17:45:03.698518  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/0 for stage 0
  201 17:45:03.698619  - 0_dmesg
  202 17:45:03.698706  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831866/lava-overlay-h62leul3/lava-11831866/1 for stage 1
  203 17:45:03.698809  - 1_bootrr
  204 17:45:03.698914  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  205 17:45:03.699010  start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
  206 17:45:03.707150  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  207 17:45:03.707266  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
  208 17:45:03.707362  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  209 17:45:03.707457  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  210 17:45:03.707552  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
  211 17:45:03.862656  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  212 17:45:03.863113  start: 1.5.4 extract-modules (timeout 00:09:49) [common]
  213 17:45:03.863280  extracting modules file /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831866/extract-nfsrootfs-3kl2sd7n
  214 17:45:03.879669  extracting modules file /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831866/extract-overlay-ramdisk-07slu6_d/ramdisk
  215 17:45:03.895799  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  216 17:45:03.895953  start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
  217 17:45:03.896142  [common] Applying overlay to NFS
  218 17:45:03.896258  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831866/compress-overlay-vp49wstu/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831866/extract-nfsrootfs-3kl2sd7n
  219 17:45:03.905974  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  220 17:45:03.906109  start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
  221 17:45:03.906221  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  222 17:45:03.906347  start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
  223 17:45:03.906474  Building ramdisk /var/lib/lava/dispatcher/tmp/11831866/extract-overlay-ramdisk-07slu6_d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831866/extract-overlay-ramdisk-07slu6_d/ramdisk
  224 17:45:03.993343  >> 26198 blocks

  225 17:45:04.596002  rename /var/lib/lava/dispatcher/tmp/11831866/extract-overlay-ramdisk-07slu6_d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz
  226 17:45:04.596512  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  227 17:45:04.596656  start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
  228 17:45:04.596765  start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
  229 17:45:04.596874  No mkimage arch provided, not using FIT.
  230 17:45:04.596979  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  231 17:45:04.597079  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  232 17:45:04.597201  end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
  233 17:45:04.597304  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
  234 17:45:04.597402  No LXC device requested
  235 17:45:04.597498  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  236 17:45:04.597600  start: 1.7 deploy-device-env (timeout 00:09:49) [common]
  237 17:45:04.597695  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  238 17:45:04.597776  Checking files for TFTP limit of 4294967296 bytes.
  239 17:45:04.598230  end: 1 tftp-deploy (duration 00:00:11) [common]
  240 17:45:04.598350  start: 2 depthcharge-action (timeout 00:05:00) [common]
  241 17:45:04.598456  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  242 17:45:04.598598  substitutions:
  243 17:45:04.598674  - {DTB}: None
  244 17:45:04.598745  - {INITRD}: 11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz
  245 17:45:04.598815  - {KERNEL}: 11831866/tftp-deploy-gbqrboo9/kernel/bzImage
  246 17:45:04.598881  - {LAVA_MAC}: None
  247 17:45:04.598945  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831866/extract-nfsrootfs-3kl2sd7n
  248 17:45:04.599010  - {NFS_SERVER_IP}: 192.168.201.1
  249 17:45:04.599072  - {PRESEED_CONFIG}: None
  250 17:45:04.599134  - {PRESEED_LOCAL}: None
  251 17:45:04.599195  - {RAMDISK}: 11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz
  252 17:45:04.599257  - {ROOT_PART}: None
  253 17:45:04.599318  - {ROOT}: None
  254 17:45:04.599378  - {SERVER_IP}: 192.168.201.1
  255 17:45:04.599439  - {TEE}: None
  256 17:45:04.599500  Parsed boot commands:
  257 17:45:04.599560  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  258 17:45:04.599760  Parsed boot commands: tftpboot 192.168.201.1 11831866/tftp-deploy-gbqrboo9/kernel/bzImage 11831866/tftp-deploy-gbqrboo9/kernel/cmdline 11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz
  259 17:45:04.599860  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  260 17:45:04.599956  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  261 17:45:04.600075  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  262 17:45:04.600169  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  263 17:45:04.600248  Not connected, no need to disconnect.
  264 17:45:04.600335  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  265 17:45:04.600431  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  266 17:45:04.600507  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
  267 17:45:04.605097  Setting prompt string to ['lava-test: # ']
  268 17:45:04.605516  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  269 17:45:04.605645  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  270 17:45:04.605754  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  271 17:45:04.605870  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  272 17:45:04.606107  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
  273 17:45:09.755061  >> Command sent successfully.

  274 17:45:09.765686  Returned 0 in 5 seconds
  275 17:45:09.866985  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  277 17:45:09.868400  end: 2.2.2 reset-device (duration 00:00:05) [common]
  278 17:45:09.868919  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  279 17:45:09.869376  Setting prompt string to 'Starting depthcharge on Helios...'
  280 17:45:09.869731  Changing prompt to 'Starting depthcharge on Helios...'
  281 17:45:09.870084  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  282 17:45:09.871278  [Enter `^Ec?' for help]

  283 17:45:10.479842  

  284 17:45:10.480039  

  285 17:45:10.490118  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  286 17:45:10.493819  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  287 17:45:10.499858  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  288 17:45:10.503176  CPU: AES supported, TXT NOT supported, VT supported

  289 17:45:10.510484  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  290 17:45:10.513886  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  291 17:45:10.520683  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  292 17:45:10.523302  VBOOT: Loading verstage.

  293 17:45:10.527148  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  294 17:45:10.533673  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  295 17:45:10.536733  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  296 17:45:10.540210  CBFS @ c08000 size 3f8000

  297 17:45:10.546829  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  298 17:45:10.550052  CBFS: Locating 'fallback/verstage'

  299 17:45:10.553452  CBFS: Found @ offset 10fb80 size 1072c

  300 17:45:10.557066  

  301 17:45:10.557193  

  302 17:45:10.566636  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  303 17:45:10.581201  Probing TPM: . done!

  304 17:45:10.584334  TPM ready after 0 ms

  305 17:45:10.587949  Connected to device vid:did:rid of 1ae0:0028:00

  306 17:45:10.597986  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  307 17:45:10.601546  Initialized TPM device CR50 revision 0

  308 17:45:10.647027  tlcl_send_startup: Startup return code is 0

  309 17:45:10.647143  TPM: setup succeeded

  310 17:45:10.659884  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  311 17:45:10.663693  Chrome EC: UHEPI supported

  312 17:45:10.667012  Phase 1

  313 17:45:10.670511  FMAP: area GBB found @ c05000 (12288 bytes)

  314 17:45:10.677319  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  315 17:45:10.677413  Phase 2

  316 17:45:10.680312  Phase 3

  317 17:45:10.683570  FMAP: area GBB found @ c05000 (12288 bytes)

  318 17:45:10.690144  VB2:vb2_report_dev_firmware() This is developer signed firmware

  319 17:45:10.696904  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  320 17:45:10.700103  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  321 17:45:10.706609  VB2:vb2_verify_keyblock() Checking keyblock signature...

  322 17:45:10.722252  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  323 17:45:10.725718  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  324 17:45:10.732471  VB2:vb2_verify_fw_preamble() Verifying preamble.

  325 17:45:10.736888  Phase 4

  326 17:45:10.740054  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  327 17:45:10.746470  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  328 17:45:10.926258  VB2:vb2_rsa_verify_digest() Digest check failed!

  329 17:45:10.932964  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  330 17:45:10.933073  Saving nvdata

  331 17:45:10.935961  Reboot requested (10020007)

  332 17:45:10.939284  board_reset() called!

  333 17:45:10.939382  full_reset() called!

  334 17:45:15.447851  

  335 17:45:15.448021  

  336 17:45:15.457824  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  337 17:45:15.461405  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  338 17:45:15.468104  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  339 17:45:15.471475  CPU: AES supported, TXT NOT supported, VT supported

  340 17:45:15.477751  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  341 17:45:15.481315  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  342 17:45:15.488214  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  343 17:45:15.491440  VBOOT: Loading verstage.

  344 17:45:15.494872  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  345 17:45:15.501254  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  346 17:45:15.504791  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  347 17:45:15.508165  CBFS @ c08000 size 3f8000

  348 17:45:15.514823  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  349 17:45:15.518098  CBFS: Locating 'fallback/verstage'

  350 17:45:15.521535  CBFS: Found @ offset 10fb80 size 1072c

  351 17:45:15.521627  

  352 17:45:15.521700  

  353 17:45:15.534675  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  354 17:45:15.548558  Probing TPM: . done!

  355 17:45:15.551573  TPM ready after 0 ms

  356 17:45:15.555685  Connected to device vid:did:rid of 1ae0:0028:00

  357 17:45:15.565184  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  358 17:45:15.569331  Initialized TPM device CR50 revision 0

  359 17:45:15.614478  tlcl_send_startup: Startup return code is 0

  360 17:45:15.614597  TPM: setup succeeded

  361 17:45:15.627249  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  362 17:45:15.630872  Chrome EC: UHEPI supported

  363 17:45:15.633952  Phase 1

  364 17:45:15.637376  FMAP: area GBB found @ c05000 (12288 bytes)

  365 17:45:15.644342  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  366 17:45:15.651081  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  367 17:45:15.654436  Recovery requested (1009000e)

  368 17:45:15.654530  Saving nvdata

  369 17:45:15.665776  tlcl_extend: response is 0

  370 17:45:15.674632  tlcl_extend: response is 0

  371 17:45:15.681777  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  372 17:45:15.684913  CBFS @ c08000 size 3f8000

  373 17:45:15.692081  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  374 17:45:15.694967  CBFS: Locating 'fallback/romstage'

  375 17:45:15.698248  CBFS: Found @ offset 80 size 145fc

  376 17:45:15.701693  Accumulated console time in verstage 98 ms

  377 17:45:15.701790  

  378 17:45:15.701865  

  379 17:45:15.715036  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  380 17:45:15.721352  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  381 17:45:15.724906  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  382 17:45:15.728594  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  383 17:45:15.734945  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  384 17:45:15.737804  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  385 17:45:15.741537  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  386 17:45:15.744691  TCO_STS:   0000 0000

  387 17:45:15.748332  GEN_PMCON: e0015238 00000200

  388 17:45:15.751147  GBLRST_CAUSE: 00000000 00000000

  389 17:45:15.751258  prev_sleep_state 5

  390 17:45:15.754530  Boot Count incremented to 64514

  391 17:45:15.761728  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  392 17:45:15.765155  CBFS @ c08000 size 3f8000

  393 17:45:15.771581  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  394 17:45:15.771704  CBFS: Locating 'fspm.bin'

  395 17:45:15.778325  CBFS: Found @ offset 5ffc0 size 71000

  396 17:45:15.781076  Chrome EC: UHEPI supported

  397 17:45:15.787700  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  398 17:45:15.791350  Probing TPM:  done!

  399 17:45:15.798255  Connected to device vid:did:rid of 1ae0:0028:00

  400 17:45:15.808306  Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7

  401 17:45:15.813970  Initialized TPM device CR50 revision 0

  402 17:45:15.823278  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  403 17:45:15.829651  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  404 17:45:15.833169  MRC cache found, size 1948

  405 17:45:15.836570  bootmode is set to: 2

  406 17:45:15.839878  PRMRR disabled by config.

  407 17:45:15.840007  SPD INDEX = 1

  408 17:45:15.846332  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  409 17:45:15.849464  CBFS @ c08000 size 3f8000

  410 17:45:15.855967  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  411 17:45:15.856103  CBFS: Locating 'spd.bin'

  412 17:45:15.859680  CBFS: Found @ offset 5fb80 size 400

  413 17:45:15.862865  SPD: module type is LPDDR3

  414 17:45:15.866647  SPD: module part is 

  415 17:45:15.872688  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  416 17:45:15.876233  SPD: device width 4 bits, bus width 8 bits

  417 17:45:15.879483  SPD: module size is 4096 MB (per channel)

  418 17:45:15.882868  memory slot: 0 configuration done.

  419 17:45:15.886010  memory slot: 2 configuration done.

  420 17:45:15.937691  CBMEM:

  421 17:45:15.941040  IMD: root @ 99fff000 254 entries.

  422 17:45:15.944378  IMD: root @ 99ffec00 62 entries.

  423 17:45:15.948115  External stage cache:

  424 17:45:15.950687  IMD: root @ 9abff000 254 entries.

  425 17:45:15.954197  IMD: root @ 9abfec00 62 entries.

  426 17:45:15.957665  Chrome EC: clear events_b mask to 0x0000000020004000

  427 17:45:15.973700  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  428 17:45:15.987054  tlcl_write: response is 0

  429 17:45:15.996137  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  430 17:45:16.002325  MRC: TPM MRC hash updated successfully.

  431 17:45:16.002426  2 DIMMs found

  432 17:45:16.005694  SMM Memory Map

  433 17:45:16.009041  SMRAM       : 0x9a000000 0x1000000

  434 17:45:16.012218   Subregion 0: 0x9a000000 0xa00000

  435 17:45:16.015845   Subregion 1: 0x9aa00000 0x200000

  436 17:45:16.019348   Subregion 2: 0x9ac00000 0x400000

  437 17:45:16.022504  top_of_ram = 0x9a000000

  438 17:45:16.025427  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  439 17:45:16.032622  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  440 17:45:16.035477  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  441 17:45:16.042482  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 17:45:16.045443  CBFS @ c08000 size 3f8000

  443 17:45:16.049162  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 17:45:16.052405  CBFS: Locating 'fallback/postcar'

  445 17:45:16.058682  CBFS: Found @ offset 107000 size 4b44

  446 17:45:16.062178  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  447 17:45:16.074748  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  448 17:45:16.077673  Processing 180 relocs. Offset value of 0x97c0c000

  449 17:45:16.086137  Accumulated console time in romstage 286 ms

  450 17:45:16.086227  

  451 17:45:16.086300  

  452 17:45:16.096340  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  453 17:45:16.102694  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  454 17:45:16.106196  CBFS @ c08000 size 3f8000

  455 17:45:16.109538  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  456 17:45:16.116132  CBFS: Locating 'fallback/ramstage'

  457 17:45:16.119199  CBFS: Found @ offset 43380 size 1b9e8

  458 17:45:16.126179  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  459 17:45:16.158156  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  460 17:45:16.161571  Processing 3976 relocs. Offset value of 0x98db0000

  461 17:45:16.167847  Accumulated console time in postcar 52 ms

  462 17:45:16.167943  

  463 17:45:16.168031  

  464 17:45:16.177863  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  465 17:45:16.184364  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  466 17:45:16.187731  WARNING: RO_VPD is uninitialized or empty.

  467 17:45:16.191203  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  468 17:45:16.197732  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  469 17:45:16.197830  Normal boot.

  470 17:45:16.204714  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  471 17:45:16.207990  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  472 17:45:16.210870  CBFS @ c08000 size 3f8000

  473 17:45:16.217434  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  474 17:45:16.220860  CBFS: Locating 'cpu_microcode_blob.bin'

  475 17:45:16.224443  CBFS: Found @ offset 14700 size 2ec00

  476 17:45:16.228140  microcode: sig=0x806ec pf=0x4 revision=0xc9

  477 17:45:16.231103  Skip microcode update

  478 17:45:16.237465  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  479 17:45:16.237572  CBFS @ c08000 size 3f8000

  480 17:45:16.243928  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  481 17:45:16.247395  CBFS: Locating 'fsps.bin'

  482 17:45:16.250591  CBFS: Found @ offset d1fc0 size 35000

  483 17:45:16.276004  Detected 4 core, 8 thread CPU.

  484 17:45:16.279800  Setting up SMI for CPU

  485 17:45:16.282471  IED base = 0x9ac00000

  486 17:45:16.282564  IED size = 0x00400000

  487 17:45:16.286077  Will perform SMM setup.

  488 17:45:16.292861  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  489 17:45:16.299148  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  490 17:45:16.302686  Processing 16 relocs. Offset value of 0x00030000

  491 17:45:16.306603  Attempting to start 7 APs

  492 17:45:16.309493  Waiting for 10ms after sending INIT.

  493 17:45:16.325752  Waiting for 1st SIPI to complete...done.

  494 17:45:16.325861  AP: slot 2 apic_id 1.

  495 17:45:16.332447  Waiting for 2nd SIPI to complete...done.

  496 17:45:16.332542  AP: slot 5 apic_id 6.

  497 17:45:16.335765  AP: slot 6 apic_id 7.

  498 17:45:16.339133  AP: slot 1 apic_id 2.

  499 17:45:16.339225  AP: slot 3 apic_id 3.

  500 17:45:16.342606  AP: slot 4 apic_id 4.

  501 17:45:16.346034  AP: slot 7 apic_id 5.

  502 17:45:16.352350  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  503 17:45:16.355878  Processing 13 relocs. Offset value of 0x00038000

  504 17:45:16.362416  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  505 17:45:16.369688  Installing SMM handler to 0x9a000000

  506 17:45:16.375695  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  507 17:45:16.379152  Processing 658 relocs. Offset value of 0x9a010000

  508 17:45:16.389168  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  509 17:45:16.392436  Processing 13 relocs. Offset value of 0x9a008000

  510 17:45:16.399432  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  511 17:45:16.405420  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  512 17:45:16.408849  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  513 17:45:16.415824  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  514 17:45:16.422585  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  515 17:45:16.428819  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  516 17:45:16.432471  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  517 17:45:16.438454  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  518 17:45:16.442104  Clearing SMI status registers

  519 17:45:16.445658  SMI_STS: PM1 

  520 17:45:16.445755  PM1_STS: PWRBTN 

  521 17:45:16.448544  TCO_STS: SECOND_TO 

  522 17:45:16.451743  New SMBASE 0x9a000000

  523 17:45:16.455146  In relocation handler: CPU 0

  524 17:45:16.458557  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  525 17:45:16.461982  Writing SMRR. base = 0x9a000006, mask=0xff000800

  526 17:45:16.465342  Relocation complete.

  527 17:45:16.468371  New SMBASE 0x99fff800

  528 17:45:16.468465  In relocation handler: CPU 2

  529 17:45:16.475008  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  530 17:45:16.478481  Writing SMRR. base = 0x9a000006, mask=0xff000800

  531 17:45:16.482216  Relocation complete.

  532 17:45:16.484978  New SMBASE 0x99ffe400

  533 17:45:16.485070  In relocation handler: CPU 7

  534 17:45:16.492018  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  535 17:45:16.495173  Writing SMRR. base = 0x9a000006, mask=0xff000800

  536 17:45:16.498319  Relocation complete.

  537 17:45:16.498412  New SMBASE 0x99fff000

  538 17:45:16.501878  In relocation handler: CPU 4

  539 17:45:16.508243  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  540 17:45:16.511765  Writing SMRR. base = 0x9a000006, mask=0xff000800

  541 17:45:16.515247  Relocation complete.

  542 17:45:16.515340  New SMBASE 0x99fff400

  543 17:45:16.518218  In relocation handler: CPU 3

  544 17:45:16.521844  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  545 17:45:16.528567  Writing SMRR. base = 0x9a000006, mask=0xff000800

  546 17:45:16.531384  Relocation complete.

  547 17:45:16.531476  New SMBASE 0x99fffc00

  548 17:45:16.535245  In relocation handler: CPU 1

  549 17:45:16.538175  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  550 17:45:16.544765  Writing SMRR. base = 0x9a000006, mask=0xff000800

  551 17:45:16.548259  Relocation complete.

  552 17:45:16.548351  New SMBASE 0x99ffe800

  553 17:45:16.551773  In relocation handler: CPU 6

  554 17:45:16.554857  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  555 17:45:16.561698  Writing SMRR. base = 0x9a000006, mask=0xff000800

  556 17:45:16.561791  Relocation complete.

  557 17:45:16.564515  New SMBASE 0x99ffec00

  558 17:45:16.567862  In relocation handler: CPU 5

  559 17:45:16.571178  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  560 17:45:16.578779  Writing SMRR. base = 0x9a000006, mask=0xff000800

  561 17:45:16.578872  Relocation complete.

  562 17:45:16.581302  Initializing CPU #0

  563 17:45:16.584479  CPU: vendor Intel device 806ec

  564 17:45:16.587877  CPU: family 06, model 8e, stepping 0c

  565 17:45:16.591404  Clearing out pending MCEs

  566 17:45:16.594618  Setting up local APIC...

  567 17:45:16.594711   apic_id: 0x00 done.

  568 17:45:16.597858  Turbo is available but hidden

  569 17:45:16.601245  Turbo is available and visible

  570 17:45:16.604729  VMX status: enabled

  571 17:45:16.608215  IA32_FEATURE_CONTROL status: locked

  572 17:45:16.611080  Skip microcode update

  573 17:45:16.611173  CPU #0 initialized

  574 17:45:16.614869  Initializing CPU #2

  575 17:45:16.614962  Initializing CPU #1

  576 17:45:16.618005  Initializing CPU #3

  577 17:45:16.621017  CPU: vendor Intel device 806ec

  578 17:45:16.624691  CPU: family 06, model 8e, stepping 0c

  579 17:45:16.627765  CPU: vendor Intel device 806ec

  580 17:45:16.630878  CPU: family 06, model 8e, stepping 0c

  581 17:45:16.634630  Clearing out pending MCEs

  582 17:45:16.637824  Clearing out pending MCEs

  583 17:45:16.641016  Setting up local APIC...

  584 17:45:16.644282  CPU: vendor Intel device 806ec

  585 17:45:16.648014  CPU: family 06, model 8e, stepping 0c

  586 17:45:16.648107  Clearing out pending MCEs

  587 17:45:16.650884  Initializing CPU #4

  588 17:45:16.654631  Initializing CPU #7

  589 17:45:16.657703  CPU: vendor Intel device 806ec

  590 17:45:16.661039  CPU: family 06, model 8e, stepping 0c

  591 17:45:16.664633  CPU: vendor Intel device 806ec

  592 17:45:16.667757  CPU: family 06, model 8e, stepping 0c

  593 17:45:16.671204  Clearing out pending MCEs

  594 17:45:16.671297  Initializing CPU #6

  595 17:45:16.674542  Initializing CPU #5

  596 17:45:16.677506  CPU: vendor Intel device 806ec

  597 17:45:16.680923  CPU: family 06, model 8e, stepping 0c

  598 17:45:16.683946  CPU: vendor Intel device 806ec

  599 17:45:16.687839  CPU: family 06, model 8e, stepping 0c

  600 17:45:16.691025  Clearing out pending MCEs

  601 17:45:16.694198  Clearing out pending MCEs

  602 17:45:16.694291  Setting up local APIC...

  603 17:45:16.697689  Setting up local APIC...

  604 17:45:16.700803  Setting up local APIC...

  605 17:45:16.704398   apic_id: 0x01 done.

  606 17:45:16.704492  Setting up local APIC...

  607 17:45:16.707605  VMX status: enabled

  608 17:45:16.711039   apic_id: 0x07 done.

  609 17:45:16.711133   apic_id: 0x06 done.

  610 17:45:16.713995  VMX status: enabled

  611 17:45:16.714089  VMX status: enabled

  612 17:45:16.720955  IA32_FEATURE_CONTROL status: locked

  613 17:45:16.724351  IA32_FEATURE_CONTROL status: locked

  614 17:45:16.724444  Skip microcode update

  615 17:45:16.727482  Skip microcode update

  616 17:45:16.730682  CPU #6 initialized

  617 17:45:16.730775  CPU #5 initialized

  618 17:45:16.734135  IA32_FEATURE_CONTROL status: locked

  619 17:45:16.737730   apic_id: 0x03 done.

  620 17:45:16.740872   apic_id: 0x02 done.

  621 17:45:16.740965  VMX status: enabled

  622 17:45:16.743918  VMX status: enabled

  623 17:45:16.747220  IA32_FEATURE_CONTROL status: locked

  624 17:45:16.750771  IA32_FEATURE_CONTROL status: locked

  625 17:45:16.753863  Skip microcode update

  626 17:45:16.753957  Skip microcode update

  627 17:45:16.757046  CPU #3 initialized

  628 17:45:16.757260  CPU #1 initialized

  629 17:45:16.760872  Setting up local APIC...

  630 17:45:16.763697  Skip microcode update

  631 17:45:16.767301   apic_id: 0x04 done.

  632 17:45:16.767424  Clearing out pending MCEs

  633 17:45:16.770705  VMX status: enabled

  634 17:45:16.774251  Setting up local APIC...

  635 17:45:16.774342  CPU #2 initialized

  636 17:45:16.777124  IA32_FEATURE_CONTROL status: locked

  637 17:45:16.780694   apic_id: 0x05 done.

  638 17:45:16.784302  Skip microcode update

  639 17:45:16.784394  VMX status: enabled

  640 17:45:16.787543  CPU #4 initialized

  641 17:45:16.791209  IA32_FEATURE_CONTROL status: locked

  642 17:45:16.793862  Skip microcode update

  643 17:45:16.793954  CPU #7 initialized

  644 17:45:16.801071  bsp_do_flight_plan done after 466 msecs.

  645 17:45:16.801164  CPU: frequency set to 4200 MHz

  646 17:45:16.803958  Enabling SMIs.

  647 17:45:16.804061  Locking SMM.

  648 17:45:16.819701  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  649 17:45:16.823503  CBFS @ c08000 size 3f8000

  650 17:45:16.829886  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  651 17:45:16.829979  CBFS: Locating 'vbt.bin'

  652 17:45:16.832985  CBFS: Found @ offset 5f5c0 size 499

  653 17:45:16.840224  Found a VBT of 4608 bytes after decompression

  654 17:45:17.022821  Display FSP Version Info HOB

  655 17:45:17.025960  Reference Code - CPU = 9.0.1e.30

  656 17:45:17.029076  uCode Version = 0.0.0.ca

  657 17:45:17.032450  TXT ACM version = ff.ff.ff.ffff

  658 17:45:17.035787  Display FSP Version Info HOB

  659 17:45:17.039203  Reference Code - ME = 9.0.1e.30

  660 17:45:17.042190  MEBx version = 0.0.0.0

  661 17:45:17.045754  ME Firmware Version = Consumer SKU

  662 17:45:17.049107  Display FSP Version Info HOB

  663 17:45:17.052489  Reference Code - CML PCH = 9.0.1e.30

  664 17:45:17.052583  PCH-CRID Status = Disabled

  665 17:45:17.058766  PCH-CRID Original Value = ff.ff.ff.ffff

  666 17:45:17.062303  PCH-CRID New Value = ff.ff.ff.ffff

  667 17:45:17.065880  OPROM - RST - RAID = ff.ff.ff.ffff

  668 17:45:17.069165  ChipsetInit Base Version = ff.ff.ff.ffff

  669 17:45:17.071987  ChipsetInit Oem Version = ff.ff.ff.ffff

  670 17:45:17.075757  Display FSP Version Info HOB

  671 17:45:17.082370  Reference Code - SA - System Agent = 9.0.1e.30

  672 17:45:17.082465  Reference Code - MRC = 0.7.1.6c

  673 17:45:17.085719  SA - PCIe Version = 9.0.1e.30

  674 17:45:17.089146  SA-CRID Status = Disabled

  675 17:45:17.092491  SA-CRID Original Value = 0.0.0.c

  676 17:45:17.095329  SA-CRID New Value = 0.0.0.c

  677 17:45:17.099073  OPROM - VBIOS = ff.ff.ff.ffff

  678 17:45:17.099167  RTC Init

  679 17:45:17.105485  Set power on after power failure.

  680 17:45:17.105610  Disabling Deep S3

  681 17:45:17.109287  Disabling Deep S3

  682 17:45:17.109380  Disabling Deep S4

  683 17:45:17.112604  Disabling Deep S4

  684 17:45:17.112718  Disabling Deep S5

  685 17:45:17.115689  Disabling Deep S5

  686 17:45:17.122295  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1

  687 17:45:17.122389  Enumerating buses...

  688 17:45:17.128685  Show all devs... Before device enumeration.

  689 17:45:17.128807  Root Device: enabled 1

  690 17:45:17.132407  CPU_CLUSTER: 0: enabled 1

  691 17:45:17.135589  DOMAIN: 0000: enabled 1

  692 17:45:17.135684  APIC: 00: enabled 1

  693 17:45:17.139362  PCI: 00:00.0: enabled 1

  694 17:45:17.142471  PCI: 00:02.0: enabled 1

  695 17:45:17.145939  PCI: 00:04.0: enabled 0

  696 17:45:17.146038  PCI: 00:05.0: enabled 0

  697 17:45:17.149499  PCI: 00:12.0: enabled 1

  698 17:45:17.152528  PCI: 00:12.5: enabled 0

  699 17:45:17.155869  PCI: 00:12.6: enabled 0

  700 17:45:17.155993  PCI: 00:14.0: enabled 1

  701 17:45:17.159500  PCI: 00:14.1: enabled 0

  702 17:45:17.162372  PCI: 00:14.3: enabled 1

  703 17:45:17.162465  PCI: 00:14.5: enabled 0

  704 17:45:17.165814  PCI: 00:15.0: enabled 1

  705 17:45:17.169109  PCI: 00:15.1: enabled 1

  706 17:45:17.171955  PCI: 00:15.2: enabled 0

  707 17:45:17.172068  PCI: 00:15.3: enabled 0

  708 17:45:17.175626  PCI: 00:16.0: enabled 1

  709 17:45:17.178899  PCI: 00:16.1: enabled 0

  710 17:45:17.182612  PCI: 00:16.2: enabled 0

  711 17:45:17.182705  PCI: 00:16.3: enabled 0

  712 17:45:17.185662  PCI: 00:16.4: enabled 0

  713 17:45:17.188997  PCI: 00:16.5: enabled 0

  714 17:45:17.192397  PCI: 00:17.0: enabled 1

  715 17:45:17.192491  PCI: 00:19.0: enabled 1

  716 17:45:17.195794  PCI: 00:19.1: enabled 0

  717 17:45:17.198872  PCI: 00:19.2: enabled 0

  718 17:45:17.198965  PCI: 00:1a.0: enabled 0

  719 17:45:17.202210  PCI: 00:1c.0: enabled 0

  720 17:45:17.205449  PCI: 00:1c.1: enabled 0

  721 17:45:17.208922  PCI: 00:1c.2: enabled 0

  722 17:45:17.209039  PCI: 00:1c.3: enabled 0

  723 17:45:17.212310  PCI: 00:1c.4: enabled 0

  724 17:45:17.215554  PCI: 00:1c.5: enabled 0

  725 17:45:17.218815  PCI: 00:1c.6: enabled 0

  726 17:45:17.218908  PCI: 00:1c.7: enabled 0

  727 17:45:17.222235  PCI: 00:1d.0: enabled 1

  728 17:45:17.225186  PCI: 00:1d.1: enabled 0

  729 17:45:17.228231  PCI: 00:1d.2: enabled 0

  730 17:45:17.228323  PCI: 00:1d.3: enabled 0

  731 17:45:17.231935  PCI: 00:1d.4: enabled 0

  732 17:45:17.235118  PCI: 00:1d.5: enabled 1

  733 17:45:17.238690  PCI: 00:1e.0: enabled 1

  734 17:45:17.238783  PCI: 00:1e.1: enabled 0

  735 17:45:17.241923  PCI: 00:1e.2: enabled 1

  736 17:45:17.245249  PCI: 00:1e.3: enabled 1

  737 17:45:17.245342  PCI: 00:1f.0: enabled 1

  738 17:45:17.248173  PCI: 00:1f.1: enabled 1

  739 17:45:17.251478  PCI: 00:1f.2: enabled 1

  740 17:45:17.254854  PCI: 00:1f.3: enabled 1

  741 17:45:17.254947  PCI: 00:1f.4: enabled 1

  742 17:45:17.258450  PCI: 00:1f.5: enabled 1

  743 17:45:17.261700  PCI: 00:1f.6: enabled 0

  744 17:45:17.265222  USB0 port 0: enabled 1

  745 17:45:17.265315  I2C: 00:15: enabled 1

  746 17:45:17.268195  I2C: 00:5d: enabled 1

  747 17:45:17.271686  GENERIC: 0.0: enabled 1

  748 17:45:17.271779  I2C: 00:1a: enabled 1

  749 17:45:17.275018  I2C: 00:38: enabled 1

  750 17:45:17.278659  I2C: 00:39: enabled 1

  751 17:45:17.278752  I2C: 00:3a: enabled 1

  752 17:45:17.281486  I2C: 00:3b: enabled 1

  753 17:45:17.285082  PCI: 00:00.0: enabled 1

  754 17:45:17.285175  SPI: 00: enabled 1

  755 17:45:17.288456  SPI: 01: enabled 1

  756 17:45:17.291394  PNP: 0c09.0: enabled 1

  757 17:45:17.291487  USB2 port 0: enabled 1

  758 17:45:17.294741  USB2 port 1: enabled 1

  759 17:45:17.298163  USB2 port 2: enabled 0

  760 17:45:17.298256  USB2 port 3: enabled 0

  761 17:45:17.301495  USB2 port 5: enabled 0

  762 17:45:17.304725  USB2 port 6: enabled 1

  763 17:45:17.307923  USB2 port 9: enabled 1

  764 17:45:17.308023  USB3 port 0: enabled 1

  765 17:45:17.311714  USB3 port 1: enabled 1

  766 17:45:17.314855  USB3 port 2: enabled 1

  767 17:45:17.314949  USB3 port 3: enabled 1

  768 17:45:17.317944  USB3 port 4: enabled 0

  769 17:45:17.321297  APIC: 02: enabled 1

  770 17:45:17.321391  APIC: 01: enabled 1

  771 17:45:17.324574  APIC: 03: enabled 1

  772 17:45:17.328272  APIC: 04: enabled 1

  773 17:45:17.328366  APIC: 06: enabled 1

  774 17:45:17.331358  APIC: 07: enabled 1

  775 17:45:17.331450  APIC: 05: enabled 1

  776 17:45:17.335070  Compare with tree...

  777 17:45:17.338338  Root Device: enabled 1

  778 17:45:17.341367   CPU_CLUSTER: 0: enabled 1

  779 17:45:17.341460    APIC: 00: enabled 1

  780 17:45:17.344696    APIC: 02: enabled 1

  781 17:45:17.347844    APIC: 01: enabled 1

  782 17:45:17.347937    APIC: 03: enabled 1

  783 17:45:17.351270    APIC: 04: enabled 1

  784 17:45:17.354661    APIC: 06: enabled 1

  785 17:45:17.354755    APIC: 07: enabled 1

  786 17:45:17.358032    APIC: 05: enabled 1

  787 17:45:17.360854   DOMAIN: 0000: enabled 1

  788 17:45:17.364687    PCI: 00:00.0: enabled 1

  789 17:45:17.364780    PCI: 00:02.0: enabled 1

  790 17:45:17.367654    PCI: 00:04.0: enabled 0

  791 17:45:17.370953    PCI: 00:05.0: enabled 0

  792 17:45:17.374364    PCI: 00:12.0: enabled 1

  793 17:45:17.374457    PCI: 00:12.5: enabled 0

  794 17:45:17.377812    PCI: 00:12.6: enabled 0

  795 17:45:17.381275    PCI: 00:14.0: enabled 1

  796 17:45:17.384708     USB0 port 0: enabled 1

  797 17:45:17.387591      USB2 port 0: enabled 1

  798 17:45:17.391014      USB2 port 1: enabled 1

  799 17:45:17.391108      USB2 port 2: enabled 0

  800 17:45:17.393927      USB2 port 3: enabled 0

  801 17:45:17.397373      USB2 port 5: enabled 0

  802 17:45:17.401141      USB2 port 6: enabled 1

  803 17:45:17.403803      USB2 port 9: enabled 1

  804 17:45:17.403896      USB3 port 0: enabled 1

  805 17:45:17.407315      USB3 port 1: enabled 1

  806 17:45:17.410950      USB3 port 2: enabled 1

  807 17:45:17.414317      USB3 port 3: enabled 1

  808 17:45:17.417266      USB3 port 4: enabled 0

  809 17:45:17.421006    PCI: 00:14.1: enabled 0

  810 17:45:17.421100    PCI: 00:14.3: enabled 1

  811 17:45:17.424249    PCI: 00:14.5: enabled 0

  812 17:45:17.427222    PCI: 00:15.0: enabled 1

  813 17:45:17.430342     I2C: 00:15: enabled 1

  814 17:45:17.433754    PCI: 00:15.1: enabled 1

  815 17:45:17.433847     I2C: 00:5d: enabled 1

  816 17:45:17.437176     GENERIC: 0.0: enabled 1

  817 17:45:17.440413    PCI: 00:15.2: enabled 0

  818 17:45:17.443673    PCI: 00:15.3: enabled 0

  819 17:45:17.443796    PCI: 00:16.0: enabled 1

  820 17:45:17.447000    PCI: 00:16.1: enabled 0

  821 17:45:17.450325    PCI: 00:16.2: enabled 0

  822 17:45:17.453647    PCI: 00:16.3: enabled 0

  823 17:45:17.456863    PCI: 00:16.4: enabled 0

  824 17:45:17.456973    PCI: 00:16.5: enabled 0

  825 17:45:17.460208    PCI: 00:17.0: enabled 1

  826 17:45:17.463894    PCI: 00:19.0: enabled 1

  827 17:45:17.467148     I2C: 00:1a: enabled 1

  828 17:45:17.470398     I2C: 00:38: enabled 1

  829 17:45:17.470499     I2C: 00:39: enabled 1

  830 17:45:17.473883     I2C: 00:3a: enabled 1

  831 17:45:17.476903     I2C: 00:3b: enabled 1

  832 17:45:17.480539    PCI: 00:19.1: enabled 0

  833 17:45:17.480633    PCI: 00:19.2: enabled 0

  834 17:45:17.483529    PCI: 00:1a.0: enabled 0

  835 17:45:17.487331    PCI: 00:1c.0: enabled 0

  836 17:45:17.490140    PCI: 00:1c.1: enabled 0

  837 17:45:17.493689    PCI: 00:1c.2: enabled 0

  838 17:45:17.493783    PCI: 00:1c.3: enabled 0

  839 17:45:17.497186    PCI: 00:1c.4: enabled 0

  840 17:45:17.500692    PCI: 00:1c.5: enabled 0

  841 17:45:17.503557    PCI: 00:1c.6: enabled 0

  842 17:45:17.503651    PCI: 00:1c.7: enabled 0

  843 17:45:17.507064    PCI: 00:1d.0: enabled 1

  844 17:45:17.510524    PCI: 00:1d.1: enabled 0

  845 17:45:17.513432    PCI: 00:1d.2: enabled 0

  846 17:45:17.516853    PCI: 00:1d.3: enabled 0

  847 17:45:17.516948    PCI: 00:1d.4: enabled 0

  848 17:45:17.520360    PCI: 00:1d.5: enabled 1

  849 17:45:17.523781     PCI: 00:00.0: enabled 1

  850 17:45:17.526915    PCI: 00:1e.0: enabled 1

  851 17:45:17.530373    PCI: 00:1e.1: enabled 0

  852 17:45:17.530503    PCI: 00:1e.2: enabled 1

  853 17:45:17.533497     SPI: 00: enabled 1

  854 17:45:17.537361    PCI: 00:1e.3: enabled 1

  855 17:45:17.540243     SPI: 01: enabled 1

  856 17:45:17.540336    PCI: 00:1f.0: enabled 1

  857 17:45:17.543807     PNP: 0c09.0: enabled 1

  858 17:45:17.547078    PCI: 00:1f.1: enabled 1

  859 17:45:17.550322    PCI: 00:1f.2: enabled 1

  860 17:45:17.550416    PCI: 00:1f.3: enabled 1

  861 17:45:17.553714    PCI: 00:1f.4: enabled 1

  862 17:45:17.557084    PCI: 00:1f.5: enabled 1

  863 17:45:17.560459    PCI: 00:1f.6: enabled 0

  864 17:45:17.563957  Root Device scanning...

  865 17:45:17.567295  scan_static_bus for Root Device

  866 17:45:17.567383  CPU_CLUSTER: 0 enabled

  867 17:45:17.570544  DOMAIN: 0000 enabled

  868 17:45:17.573311  DOMAIN: 0000 scanning...

  869 17:45:17.577049  PCI: pci_scan_bus for bus 00

  870 17:45:17.579947  PCI: 00:00.0 [8086/0000] ops

  871 17:45:17.583549  PCI: 00:00.0 [8086/9b61] enabled

  872 17:45:17.586951  PCI: 00:02.0 [8086/0000] bus ops

  873 17:45:17.590380  PCI: 00:02.0 [8086/9b41] enabled

  874 17:45:17.593654  PCI: 00:04.0 [8086/1903] disabled

  875 17:45:17.596830  PCI: 00:08.0 [8086/1911] enabled

  876 17:45:17.600355  PCI: 00:12.0 [8086/02f9] enabled

  877 17:45:17.603961  PCI: 00:14.0 [8086/0000] bus ops

  878 17:45:17.606824  PCI: 00:14.0 [8086/02ed] enabled

  879 17:45:17.610052  PCI: 00:14.2 [8086/02ef] enabled

  880 17:45:17.613738  PCI: 00:14.3 [8086/02f0] enabled

  881 17:45:17.616968  PCI: 00:15.0 [8086/0000] bus ops

  882 17:45:17.619902  PCI: 00:15.0 [8086/02e8] enabled

  883 17:45:17.623239  PCI: 00:15.1 [8086/0000] bus ops

  884 17:45:17.627463  PCI: 00:15.1 [8086/02e9] enabled

  885 17:45:17.629985  PCI: 00:16.0 [8086/0000] ops

  886 17:45:17.633372  PCI: 00:16.0 [8086/02e0] enabled

  887 17:45:17.633466  PCI: 00:17.0 [8086/0000] ops

  888 17:45:17.636949  PCI: 00:17.0 [8086/02d3] enabled

  889 17:45:17.640411  PCI: 00:19.0 [8086/0000] bus ops

  890 17:45:17.643636  PCI: 00:19.0 [8086/02c5] enabled

  891 17:45:17.646900  PCI: 00:1d.0 [8086/0000] bus ops

  892 17:45:17.650559  PCI: 00:1d.0 [8086/02b0] enabled

  893 17:45:17.656998  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  894 17:45:17.659873  PCI: 00:1e.0 [8086/0000] ops

  895 17:45:17.663275  PCI: 00:1e.0 [8086/02a8] enabled

  896 17:45:17.666663  PCI: 00:1e.2 [8086/0000] bus ops

  897 17:45:17.669875  PCI: 00:1e.2 [8086/02aa] enabled

  898 17:45:17.673575  PCI: 00:1e.3 [8086/0000] bus ops

  899 17:45:17.677082  PCI: 00:1e.3 [8086/02ab] enabled

  900 17:45:17.680188  PCI: 00:1f.0 [8086/0000] bus ops

  901 17:45:17.683632  PCI: 00:1f.0 [8086/0284] enabled

  902 17:45:17.690351  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  903 17:45:17.693201  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  904 17:45:17.697017  PCI: 00:1f.3 [8086/0000] bus ops

  905 17:45:17.699867  PCI: 00:1f.3 [8086/02c8] enabled

  906 17:45:17.703533  PCI: 00:1f.4 [8086/0000] bus ops

  907 17:45:17.706391  PCI: 00:1f.4 [8086/02a3] enabled

  908 17:45:17.709873  PCI: 00:1f.5 [8086/0000] bus ops

  909 17:45:17.713542  PCI: 00:1f.5 [8086/02a4] enabled

  910 17:45:17.716355  PCI: Leftover static devices:

  911 17:45:17.719651  PCI: 00:05.0

  912 17:45:17.719765  PCI: 00:12.5

  913 17:45:17.723136  PCI: 00:12.6

  914 17:45:17.723247  PCI: 00:14.1

  915 17:45:17.723349  PCI: 00:14.5

  916 17:45:17.726805  PCI: 00:15.2

  917 17:45:17.726898  PCI: 00:15.3

  918 17:45:17.730235  PCI: 00:16.1

  919 17:45:17.730328  PCI: 00:16.2

  920 17:45:17.730401  PCI: 00:16.3

  921 17:45:17.733239  PCI: 00:16.4

  922 17:45:17.733331  PCI: 00:16.5

  923 17:45:17.736323  PCI: 00:19.1

  924 17:45:17.736415  PCI: 00:19.2

  925 17:45:17.739830  PCI: 00:1a.0

  926 17:45:17.739922  PCI: 00:1c.0

  927 17:45:17.739995  PCI: 00:1c.1

  928 17:45:17.743360  PCI: 00:1c.2

  929 17:45:17.743453  PCI: 00:1c.3

  930 17:45:17.746624  PCI: 00:1c.4

  931 17:45:17.746721  PCI: 00:1c.5

  932 17:45:17.746808  PCI: 00:1c.6

  933 17:45:17.750075  PCI: 00:1c.7

  934 17:45:17.750167  PCI: 00:1d.1

  935 17:45:17.753081  PCI: 00:1d.2

  936 17:45:17.753174  PCI: 00:1d.3

  937 17:45:17.753247  PCI: 00:1d.4

  938 17:45:17.756189  PCI: 00:1d.5

  939 17:45:17.756281  PCI: 00:1e.1

  940 17:45:17.759691  PCI: 00:1f.1

  941 17:45:17.759783  PCI: 00:1f.2

  942 17:45:17.759856  PCI: 00:1f.6

  943 17:45:17.762866  PCI: Check your devicetree.cb.

  944 17:45:17.766333  PCI: 00:02.0 scanning...

  945 17:45:17.769622  scan_generic_bus for PCI: 00:02.0

  946 17:45:17.772899  scan_generic_bus for PCI: 00:02.0 done

  947 17:45:17.779884  scan_bus: scanning of bus PCI: 00:02.0 took 10181 usecs

  948 17:45:17.783122  PCI: 00:14.0 scanning...

  949 17:45:17.786062  scan_static_bus for PCI: 00:14.0

  950 17:45:17.789544  USB0 port 0 enabled

  951 17:45:17.789643  USB0 port 0 scanning...

  952 17:45:17.792770  scan_static_bus for USB0 port 0

  953 17:45:17.796076  USB2 port 0 enabled

  954 17:45:17.799566  USB2 port 1 enabled

  955 17:45:17.799681  USB2 port 2 disabled

  956 17:45:17.803132  USB2 port 3 disabled

  957 17:45:17.806501  USB2 port 5 disabled

  958 17:45:17.806615  USB2 port 6 enabled

  959 17:45:17.809559  USB2 port 9 enabled

  960 17:45:17.809671  USB3 port 0 enabled

  961 17:45:17.812788  USB3 port 1 enabled

  962 17:45:17.816417  USB3 port 2 enabled

  963 17:45:17.816511  USB3 port 3 enabled

  964 17:45:17.819835  USB3 port 4 disabled

  965 17:45:17.822721  USB2 port 0 scanning...

  966 17:45:17.826183  scan_static_bus for USB2 port 0

  967 17:45:17.829372  scan_static_bus for USB2 port 0 done

  968 17:45:17.832604  scan_bus: scanning of bus USB2 port 0 took 9708 usecs

  969 17:45:17.836169  USB2 port 1 scanning...

  970 17:45:17.839780  scan_static_bus for USB2 port 1

  971 17:45:17.842806  scan_static_bus for USB2 port 1 done

  972 17:45:17.849945  scan_bus: scanning of bus USB2 port 1 took 9708 usecs

  973 17:45:17.852729  USB2 port 6 scanning...

  974 17:45:17.856357  scan_static_bus for USB2 port 6

  975 17:45:17.859899  scan_static_bus for USB2 port 6 done

  976 17:45:17.862679  scan_bus: scanning of bus USB2 port 6 took 9711 usecs

  977 17:45:17.866095  USB2 port 9 scanning...

  978 17:45:17.869693  scan_static_bus for USB2 port 9

  979 17:45:17.873355  scan_static_bus for USB2 port 9 done

  980 17:45:17.879758  scan_bus: scanning of bus USB2 port 9 took 9684 usecs

  981 17:45:17.882696  USB3 port 0 scanning...

  982 17:45:17.886002  scan_static_bus for USB3 port 0

  983 17:45:17.889795  scan_static_bus for USB3 port 0 done

  984 17:45:17.893302  scan_bus: scanning of bus USB3 port 0 took 9701 usecs

  985 17:45:17.896337  USB3 port 1 scanning...

  986 17:45:17.899561  scan_static_bus for USB3 port 1

  987 17:45:17.902694  scan_static_bus for USB3 port 1 done

  988 17:45:17.909697  scan_bus: scanning of bus USB3 port 1 took 9699 usecs

  989 17:45:17.913074  USB3 port 2 scanning...

  990 17:45:17.916587  scan_static_bus for USB3 port 2

  991 17:45:17.919651  scan_static_bus for USB3 port 2 done

  992 17:45:17.923161  scan_bus: scanning of bus USB3 port 2 took 9700 usecs

  993 17:45:17.925899  USB3 port 3 scanning...

  994 17:45:17.929439  scan_static_bus for USB3 port 3

  995 17:45:17.932746  scan_static_bus for USB3 port 3 done

  996 17:45:17.939217  scan_bus: scanning of bus USB3 port 3 took 9700 usecs

  997 17:45:17.942703  scan_static_bus for USB0 port 0 done

  998 17:45:17.949311  scan_bus: scanning of bus USB0 port 0 took 155361 usecs

  999 17:45:17.952519  scan_static_bus for PCI: 00:14.0 done

 1000 17:45:17.959411  scan_bus: scanning of bus PCI: 00:14.0 took 172998 usecs

 1001 17:45:17.959508  PCI: 00:15.0 scanning...

 1002 17:45:17.962476  scan_generic_bus for PCI: 00:15.0

 1003 17:45:17.969561  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1004 17:45:17.972746  scan_generic_bus for PCI: 00:15.0 done

 1005 17:45:17.979147  scan_bus: scanning of bus PCI: 00:15.0 took 14300 usecs

 1006 17:45:17.979242  PCI: 00:15.1 scanning...

 1007 17:45:17.982542  scan_generic_bus for PCI: 00:15.1

 1008 17:45:17.988913  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1009 17:45:17.992328  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1010 17:45:17.995584  scan_generic_bus for PCI: 00:15.1 done

 1011 17:45:18.002436  scan_bus: scanning of bus PCI: 00:15.1 took 18602 usecs

 1012 17:45:18.005606  PCI: 00:19.0 scanning...

 1013 17:45:18.009154  scan_generic_bus for PCI: 00:19.0

 1014 17:45:18.012424  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1015 17:45:18.015684  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1016 17:45:18.019038  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1017 17:45:18.025528  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1018 17:45:18.028971  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1019 17:45:18.032057  scan_generic_bus for PCI: 00:19.0 done

 1020 17:45:18.038904  scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs

 1021 17:45:18.039001  PCI: 00:1d.0 scanning...

 1022 17:45:18.045666  do_pci_scan_bridge for PCI: 00:1d.0

 1023 17:45:18.045763  PCI: pci_scan_bus for bus 01

 1024 17:45:18.049395  PCI: 01:00.0 [1c5c/1327] enabled

 1025 17:45:18.056156  Enabling Common Clock Configuration

 1026 17:45:18.059053  L1 Sub-State supported from root port 29

 1027 17:45:18.062279  L1 Sub-State Support = 0xf

 1028 17:45:18.065817  CommonModeRestoreTime = 0x28

 1029 17:45:18.069437  Power On Value = 0x16, Power On Scale = 0x0

 1030 17:45:18.069529  ASPM: Enabled L1

 1031 17:45:18.075503  scan_bus: scanning of bus PCI: 00:1d.0 took 32781 usecs

 1032 17:45:18.078913  PCI: 00:1e.2 scanning...

 1033 17:45:18.082412  scan_generic_bus for PCI: 00:1e.2

 1034 17:45:18.086041  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1035 17:45:18.088848  scan_generic_bus for PCI: 00:1e.2 done

 1036 17:45:18.095956  scan_bus: scanning of bus PCI: 00:1e.2 took 14010 usecs

 1037 17:45:18.098839  PCI: 00:1e.3 scanning...

 1038 17:45:18.102122  scan_generic_bus for PCI: 00:1e.3

 1039 17:45:18.105438  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1040 17:45:18.108973  scan_generic_bus for PCI: 00:1e.3 done

 1041 17:45:18.115477  scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs

 1042 17:45:18.118985  PCI: 00:1f.0 scanning...

 1043 17:45:18.122131  scan_static_bus for PCI: 00:1f.0

 1044 17:45:18.122225  PNP: 0c09.0 enabled

 1045 17:45:18.125632  scan_static_bus for PCI: 00:1f.0 done

 1046 17:45:18.132348  scan_bus: scanning of bus PCI: 00:1f.0 took 12042 usecs

 1047 17:45:18.135651  PCI: 00:1f.3 scanning...

 1048 17:45:18.142292  scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs

 1049 17:45:18.142387  PCI: 00:1f.4 scanning...

 1050 17:45:18.145789  scan_generic_bus for PCI: 00:1f.4

 1051 17:45:18.151951  scan_generic_bus for PCI: 00:1f.4 done

 1052 17:45:18.155961  scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs

 1053 17:45:18.158959  PCI: 00:1f.5 scanning...

 1054 17:45:18.162087  scan_generic_bus for PCI: 00:1f.5

 1055 17:45:18.165461  scan_generic_bus for PCI: 00:1f.5 done

 1056 17:45:18.171960  scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs

 1057 17:45:18.178958  scan_bus: scanning of bus DOMAIN: 0000 took 605139 usecs

 1058 17:45:18.182346  scan_static_bus for Root Device done

 1059 17:45:18.185247  scan_bus: scanning of bus Root Device took 625012 usecs

 1060 17:45:18.189161  done

 1061 17:45:18.192640  Chrome EC: UHEPI supported

 1062 17:45:18.195512  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1063 17:45:18.202479  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1064 17:45:18.208826  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1065 17:45:18.215620  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1066 17:45:18.218989  SPI flash protection: WPSW=0 SRP0=0

 1067 17:45:18.225800  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1068 17:45:18.229249  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2

 1069 17:45:18.232485  found VGA at PCI: 00:02.0

 1070 17:45:18.235916  Setting up VGA for PCI: 00:02.0

 1071 17:45:18.242306  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1072 17:45:18.245461  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1073 17:45:18.248849  Allocating resources...

 1074 17:45:18.248942  Reading resources...

 1075 17:45:18.255950  Root Device read_resources bus 0 link: 0

 1076 17:45:18.258991  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1077 17:45:18.265721  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1078 17:45:18.269627  DOMAIN: 0000 read_resources bus 0 link: 0

 1079 17:45:18.275626  PCI: 00:14.0 read_resources bus 0 link: 0

 1080 17:45:18.278932  USB0 port 0 read_resources bus 0 link: 0

 1081 17:45:18.286807  USB0 port 0 read_resources bus 0 link: 0 done

 1082 17:45:18.290116  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1083 17:45:18.297729  PCI: 00:15.0 read_resources bus 1 link: 0

 1084 17:45:18.301431  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1085 17:45:18.307510  PCI: 00:15.1 read_resources bus 2 link: 0

 1086 17:45:18.310885  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1087 17:45:18.318253  PCI: 00:19.0 read_resources bus 3 link: 0

 1088 17:45:18.324922  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1089 17:45:18.328151  PCI: 00:1d.0 read_resources bus 1 link: 0

 1090 17:45:18.335007  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1091 17:45:18.338601  PCI: 00:1e.2 read_resources bus 4 link: 0

 1092 17:45:18.344931  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1093 17:45:18.348432  PCI: 00:1e.3 read_resources bus 5 link: 0

 1094 17:45:18.354981  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1095 17:45:18.358244  PCI: 00:1f.0 read_resources bus 0 link: 0

 1096 17:45:18.364916  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1097 17:45:18.371160  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1098 17:45:18.374586  Root Device read_resources bus 0 link: 0 done

 1099 17:45:18.377918  Done reading resources.

 1100 17:45:18.381402  Show resources in subtree (Root Device)...After reading.

 1101 17:45:18.388276   Root Device child on link 0 CPU_CLUSTER: 0

 1102 17:45:18.391339    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1103 17:45:18.391460     APIC: 00

 1104 17:45:18.394862     APIC: 02

 1105 17:45:18.394973     APIC: 01

 1106 17:45:18.397858     APIC: 03

 1107 17:45:18.397969     APIC: 04

 1108 17:45:18.398080     APIC: 06

 1109 17:45:18.401342     APIC: 07

 1110 17:45:18.401426     APIC: 05

 1111 17:45:18.404449    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1112 17:45:18.414713    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1113 17:45:18.467564    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1114 17:45:18.467932     PCI: 00:00.0

 1115 17:45:18.468064     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1116 17:45:18.468188     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1117 17:45:18.468291     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1118 17:45:18.468602     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1119 17:45:18.477148     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1120 17:45:18.483931     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1121 17:45:18.493671     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1122 17:45:18.500273     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1123 17:45:18.509978     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1124 17:45:18.520132     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1125 17:45:18.530284     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1126 17:45:18.540122     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1127 17:45:18.550201     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1128 17:45:18.559637     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1129 17:45:18.566341     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1130 17:45:18.576776     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1131 17:45:18.579711     PCI: 00:02.0

 1132 17:45:18.589703     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1133 17:45:18.599809     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1134 17:45:18.606331     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1135 17:45:18.609641     PCI: 00:04.0

 1136 17:45:18.609736     PCI: 00:08.0

 1137 17:45:18.619238     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1138 17:45:18.622555     PCI: 00:12.0

 1139 17:45:18.632600     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1140 17:45:18.636322     PCI: 00:14.0 child on link 0 USB0 port 0

 1141 17:45:18.645945     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1142 17:45:18.649218      USB0 port 0 child on link 0 USB2 port 0

 1143 17:45:18.652962       USB2 port 0

 1144 17:45:18.653054       USB2 port 1

 1145 17:45:18.655958       USB2 port 2

 1146 17:45:18.659168       USB2 port 3

 1147 17:45:18.659258       USB2 port 5

 1148 17:45:18.662966       USB2 port 6

 1149 17:45:18.663057       USB2 port 9

 1150 17:45:18.666036       USB3 port 0

 1151 17:45:18.666126       USB3 port 1

 1152 17:45:18.669218       USB3 port 2

 1153 17:45:18.669308       USB3 port 3

 1154 17:45:18.672610       USB3 port 4

 1155 17:45:18.672701     PCI: 00:14.2

 1156 17:45:18.682674     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1157 17:45:18.692666     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1158 17:45:18.695843     PCI: 00:14.3

 1159 17:45:18.705770     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1160 17:45:18.709100     PCI: 00:15.0 child on link 0 I2C: 01:15

 1161 17:45:18.718745     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1162 17:45:18.722725      I2C: 01:15

 1163 17:45:18.725794     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1164 17:45:18.735683     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1165 17:45:18.735781      I2C: 02:5d

 1166 17:45:18.739209      GENERIC: 0.0

 1167 17:45:18.739300     PCI: 00:16.0

 1168 17:45:18.749255     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1169 17:45:18.752354     PCI: 00:17.0

 1170 17:45:18.762235     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1171 17:45:18.768492     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1172 17:45:18.778377     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1173 17:45:18.785296     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1174 17:45:18.794970     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1175 17:45:18.805117     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1176 17:45:18.808581     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1177 17:45:18.818582     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1178 17:45:18.818717      I2C: 03:1a

 1179 17:45:18.821804      I2C: 03:38

 1180 17:45:18.821920      I2C: 03:39

 1181 17:45:18.824720      I2C: 03:3a

 1182 17:45:18.824835      I2C: 03:3b

 1183 17:45:18.831664     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1184 17:45:18.838124     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1185 17:45:18.848392     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1186 17:45:18.857957     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1187 17:45:18.858057      PCI: 01:00.0

 1188 17:45:18.868088      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1189 17:45:18.871682     PCI: 00:1e.0

 1190 17:45:18.881395     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1191 17:45:18.891683     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1192 17:45:18.894706     PCI: 00:1e.2 child on link 0 SPI: 00

 1193 17:45:18.904699     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1194 17:45:18.908077      SPI: 00

 1195 17:45:18.911229     PCI: 00:1e.3 child on link 0 SPI: 01

 1196 17:45:18.921319     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1197 17:45:18.921414      SPI: 01

 1198 17:45:18.928169     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1199 17:45:18.934794     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1200 17:45:18.944400     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1201 17:45:18.944494      PNP: 0c09.0

 1202 17:45:18.954163      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1203 17:45:18.957426     PCI: 00:1f.3

 1204 17:45:18.967631     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1205 17:45:18.977431     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1206 17:45:18.977527     PCI: 00:1f.4

 1207 17:45:18.987325     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1208 17:45:18.997480     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1209 17:45:18.997577     PCI: 00:1f.5

 1210 17:45:19.007494     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1211 17:45:19.014145  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1212 17:45:19.020904  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1213 17:45:19.027750  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1214 17:45:19.030393  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1215 17:45:19.033956  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1216 17:45:19.037305  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1217 17:45:19.040927  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1218 17:45:19.047067  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1219 17:45:19.053676  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1220 17:45:19.063646  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1221 17:45:19.070739  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1222 17:45:19.076996  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1223 17:45:19.083647  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1224 17:45:19.090353  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1225 17:45:19.093800  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1226 17:45:19.099877  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1227 17:45:19.103299  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1228 17:45:19.110166  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1229 17:45:19.113711  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1230 17:45:19.120323  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1231 17:45:19.123528  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1232 17:45:19.129922  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1233 17:45:19.133496  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1234 17:45:19.136602  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1235 17:45:19.143956  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1236 17:45:19.147238  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1237 17:45:19.153300  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1238 17:45:19.157015  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1239 17:45:19.163441  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1240 17:45:19.166761  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1241 17:45:19.172984  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1242 17:45:19.176327  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1243 17:45:19.182903  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1244 17:45:19.186481  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1245 17:45:19.192790  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1246 17:45:19.196798  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1247 17:45:19.199951  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1248 17:45:19.209913  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1249 17:45:19.213108  avoid_fixed_resources: DOMAIN: 0000

 1250 17:45:19.219579  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1251 17:45:19.226233  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1252 17:45:19.233236  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1253 17:45:19.239810  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1254 17:45:19.249649  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1255 17:45:19.256237  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1256 17:45:19.262921  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1257 17:45:19.272609  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1258 17:45:19.279359  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1259 17:45:19.286057  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1260 17:45:19.292269  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1261 17:45:19.302490  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1262 17:45:19.302587  Setting resources...

 1263 17:45:19.309188  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1264 17:45:19.312773  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1265 17:45:19.319276  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1266 17:45:19.322504  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1267 17:45:19.326029  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1268 17:45:19.332634  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1269 17:45:19.339563  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1270 17:45:19.346062  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1271 17:45:19.352268  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1272 17:45:19.355921  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1273 17:45:19.362502  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1274 17:45:19.365997  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1275 17:45:19.372217  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1276 17:45:19.375681  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1277 17:45:19.382480  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1278 17:45:19.385618  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1279 17:45:19.392376  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1280 17:45:19.395812  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1281 17:45:19.402149  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1282 17:45:19.405501  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1283 17:45:19.411938  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1284 17:45:19.415536  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1285 17:45:19.419125  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1286 17:45:19.425355  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1287 17:45:19.429021  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1288 17:45:19.435631  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1289 17:45:19.438950  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1290 17:45:19.445637  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1291 17:45:19.449140  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1292 17:45:19.455817  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1293 17:45:19.458836  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1294 17:45:19.465268  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1295 17:45:19.472415  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1296 17:45:19.478614  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1297 17:45:19.485076  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1298 17:45:19.495410  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1299 17:45:19.499026  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1300 17:45:19.504837  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1301 17:45:19.511747  Root Device assign_resources, bus 0 link: 0

 1302 17:45:19.515278  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1303 17:45:19.524659  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1304 17:45:19.531448  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1305 17:45:19.538395  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1306 17:45:19.548749  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1307 17:45:19.555282  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1308 17:45:19.565159  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1309 17:45:19.568548  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1310 17:45:19.575003  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1311 17:45:19.581730  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1312 17:45:19.591725  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1313 17:45:19.598025  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1314 17:45:19.608026  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1315 17:45:19.611269  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1316 17:45:19.614612  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1317 17:45:19.624881  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1318 17:45:19.627963  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1319 17:45:19.635101  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1320 17:45:19.641455  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1321 17:45:19.651412  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1322 17:45:19.657817  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1323 17:45:19.664780  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1324 17:45:19.674816  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1325 17:45:19.681248  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1326 17:45:19.687697  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1327 17:45:19.697880  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1328 17:45:19.700705  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1329 17:45:19.707345  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1330 17:45:19.714077  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1331 17:45:19.724426  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1332 17:45:19.730666  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1333 17:45:19.737317  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1334 17:45:19.744307  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1335 17:45:19.750739  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1336 17:45:19.757301  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1337 17:45:19.767181  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1338 17:45:19.770641  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1339 17:45:19.774214  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1340 17:45:19.784352  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1341 17:45:19.786964  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1342 17:45:19.793894  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1343 17:45:19.797476  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1344 17:45:19.803756  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1345 17:45:19.807051  LPC: Trying to open IO window from 800 size 1ff

 1346 17:45:19.817329  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1347 17:45:19.823853  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1348 17:45:19.833852  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1349 17:45:19.840126  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1350 17:45:19.843752  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1351 17:45:19.850364  Root Device assign_resources, bus 0 link: 0

 1352 17:45:19.853435  Done setting resources.

 1353 17:45:19.860109  Show resources in subtree (Root Device)...After assigning values.

 1354 17:45:19.863352   Root Device child on link 0 CPU_CLUSTER: 0

 1355 17:45:19.866650    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1356 17:45:19.866770     APIC: 00

 1357 17:45:19.870233     APIC: 02

 1358 17:45:19.870348     APIC: 01

 1359 17:45:19.873675     APIC: 03

 1360 17:45:19.873786     APIC: 04

 1361 17:45:19.873887     APIC: 06

 1362 17:45:19.876541     APIC: 07

 1363 17:45:19.876627     APIC: 05

 1364 17:45:19.880207    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1365 17:45:19.890314    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1366 17:45:19.903290    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1367 17:45:19.903393     PCI: 00:00.0

 1368 17:45:19.913039     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1369 17:45:19.923425     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1370 17:45:19.932708     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1371 17:45:19.942898     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1372 17:45:19.949272     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1373 17:45:19.959176     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1374 17:45:19.969200     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1375 17:45:19.979082     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1376 17:45:19.989439     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1377 17:45:19.995939     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1378 17:45:20.005584     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1379 17:45:20.015641     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1380 17:45:20.025802     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1381 17:45:20.035375     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1382 17:45:20.045548     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1383 17:45:20.055326     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1384 17:45:20.055422     PCI: 00:02.0

 1385 17:45:20.065549     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1386 17:45:20.078526     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1387 17:45:20.085033     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1388 17:45:20.088210     PCI: 00:04.0

 1389 17:45:20.088304     PCI: 00:08.0

 1390 17:45:20.098341     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1391 17:45:20.101288     PCI: 00:12.0

 1392 17:45:20.111668     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1393 17:45:20.114971     PCI: 00:14.0 child on link 0 USB0 port 0

 1394 17:45:20.127897     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1395 17:45:20.131170      USB0 port 0 child on link 0 USB2 port 0

 1396 17:45:20.131278       USB2 port 0

 1397 17:45:20.134544       USB2 port 1

 1398 17:45:20.134636       USB2 port 2

 1399 17:45:20.138037       USB2 port 3

 1400 17:45:20.141596       USB2 port 5

 1401 17:45:20.141687       USB2 port 6

 1402 17:45:20.144481       USB2 port 9

 1403 17:45:20.144600       USB3 port 0

 1404 17:45:20.147908       USB3 port 1

 1405 17:45:20.148033       USB3 port 2

 1406 17:45:20.151329       USB3 port 3

 1407 17:45:20.151424       USB3 port 4

 1408 17:45:20.154403     PCI: 00:14.2

 1409 17:45:20.164346     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1410 17:45:20.174455     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1411 17:45:20.174552     PCI: 00:14.3

 1412 17:45:20.187873     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1413 17:45:20.192175     PCI: 00:15.0 child on link 0 I2C: 01:15

 1414 17:45:20.201047     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1415 17:45:20.201151      I2C: 01:15

 1416 17:45:20.207592     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1417 17:45:20.217141     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1418 17:45:20.217241      I2C: 02:5d

 1419 17:45:20.220487      GENERIC: 0.0

 1420 17:45:20.220578     PCI: 00:16.0

 1421 17:45:20.230377     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1422 17:45:20.233772     PCI: 00:17.0

 1423 17:45:20.244193     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1424 17:45:20.253641     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1425 17:45:20.263683     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1426 17:45:20.273739     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1427 17:45:20.280391     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1428 17:45:20.290016     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1429 17:45:20.296488     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1430 17:45:20.306793     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1431 17:45:20.306890      I2C: 03:1a

 1432 17:45:20.310045      I2C: 03:38

 1433 17:45:20.310136      I2C: 03:39

 1434 17:45:20.313118      I2C: 03:3a

 1435 17:45:20.313208      I2C: 03:3b

 1436 17:45:20.319884     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1437 17:45:20.326642     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1438 17:45:20.336474     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1439 17:45:20.349913     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1440 17:45:20.350020      PCI: 01:00.0

 1441 17:45:20.359458      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1442 17:45:20.362863     PCI: 00:1e.0

 1443 17:45:20.373097     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1444 17:45:20.382668     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1445 17:45:20.386161     PCI: 00:1e.2 child on link 0 SPI: 00

 1446 17:45:20.399381     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1447 17:45:20.399509      SPI: 00

 1448 17:45:20.402468     PCI: 00:1e.3 child on link 0 SPI: 01

 1449 17:45:20.412669     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1450 17:45:20.415735      SPI: 01

 1451 17:45:20.418856     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1452 17:45:20.429178     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1453 17:45:20.435581     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1454 17:45:20.438730      PNP: 0c09.0

 1455 17:45:20.445703      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1456 17:45:20.448922     PCI: 00:1f.3

 1457 17:45:20.458656     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1458 17:45:20.468777     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1459 17:45:20.472189     PCI: 00:1f.4

 1460 17:45:20.478765     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1461 17:45:20.488532     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1462 17:45:20.492026     PCI: 00:1f.5

 1463 17:45:20.501562     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1464 17:45:20.505270  Done allocating resources.

 1465 17:45:20.511731  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1466 17:45:20.511819  Enabling resources...

 1467 17:45:20.519049  PCI: 00:00.0 subsystem <- 8086/9b61

 1468 17:45:20.519135  PCI: 00:00.0 cmd <- 06

 1469 17:45:20.522814  PCI: 00:02.0 subsystem <- 8086/9b41

 1470 17:45:20.525692  PCI: 00:02.0 cmd <- 03

 1471 17:45:20.528967  PCI: 00:08.0 cmd <- 06

 1472 17:45:20.532418  PCI: 00:12.0 subsystem <- 8086/02f9

 1473 17:45:20.535994  PCI: 00:12.0 cmd <- 02

 1474 17:45:20.539084  PCI: 00:14.0 subsystem <- 8086/02ed

 1475 17:45:20.542193  PCI: 00:14.0 cmd <- 02

 1476 17:45:20.542284  PCI: 00:14.2 cmd <- 02

 1477 17:45:20.549374  PCI: 00:14.3 subsystem <- 8086/02f0

 1478 17:45:20.549465  PCI: 00:14.3 cmd <- 02

 1479 17:45:20.552923  PCI: 00:15.0 subsystem <- 8086/02e8

 1480 17:45:20.556216  PCI: 00:15.0 cmd <- 02

 1481 17:45:20.559134  PCI: 00:15.1 subsystem <- 8086/02e9

 1482 17:45:20.562791  PCI: 00:15.1 cmd <- 02

 1483 17:45:20.566187  PCI: 00:16.0 subsystem <- 8086/02e0

 1484 17:45:20.569207  PCI: 00:16.0 cmd <- 02

 1485 17:45:20.572556  PCI: 00:17.0 subsystem <- 8086/02d3

 1486 17:45:20.575780  PCI: 00:17.0 cmd <- 03

 1487 17:45:20.579461  PCI: 00:19.0 subsystem <- 8086/02c5

 1488 17:45:20.582448  PCI: 00:19.0 cmd <- 02

 1489 17:45:20.585801  PCI: 00:1d.0 bridge ctrl <- 0013

 1490 17:45:20.589129  PCI: 00:1d.0 subsystem <- 8086/02b0

 1491 17:45:20.592772  PCI: 00:1d.0 cmd <- 06

 1492 17:45:20.596221  PCI: 00:1e.0 subsystem <- 8086/02a8

 1493 17:45:20.598878  PCI: 00:1e.0 cmd <- 06

 1494 17:45:20.602441  PCI: 00:1e.2 subsystem <- 8086/02aa

 1495 17:45:20.602537  PCI: 00:1e.2 cmd <- 06

 1496 17:45:20.609295  PCI: 00:1e.3 subsystem <- 8086/02ab

 1497 17:45:20.609388  PCI: 00:1e.3 cmd <- 02

 1498 17:45:20.612502  PCI: 00:1f.0 subsystem <- 8086/0284

 1499 17:45:20.615798  PCI: 00:1f.0 cmd <- 407

 1500 17:45:20.619424  PCI: 00:1f.3 subsystem <- 8086/02c8

 1501 17:45:20.622080  PCI: 00:1f.3 cmd <- 02

 1502 17:45:20.625621  PCI: 00:1f.4 subsystem <- 8086/02a3

 1503 17:45:20.629023  PCI: 00:1f.4 cmd <- 03

 1504 17:45:20.632498  PCI: 00:1f.5 subsystem <- 8086/02a4

 1505 17:45:20.635332  PCI: 00:1f.5 cmd <- 406

 1506 17:45:20.644333  PCI: 01:00.0 cmd <- 02

 1507 17:45:20.649339  done.

 1508 17:45:20.661627  ME: Version: 14.0.39.1367

 1509 17:45:20.667911  BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 11

 1510 17:45:20.671309  Initializing devices...

 1511 17:45:20.671400  Root Device init ...

 1512 17:45:20.677768  Chrome EC: Set SMI mask to 0x0000000000000000

 1513 17:45:20.681391  Chrome EC: clear events_b mask to 0x0000000000000000

 1514 17:45:20.688019  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1515 17:45:20.695163  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1516 17:45:20.701190  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1517 17:45:20.704669  Chrome EC: Set WAKE mask to 0x0000000000000000

 1518 17:45:20.707566  Root Device init finished in 35189 usecs

 1519 17:45:20.711145  CPU_CLUSTER: 0 init ...

 1520 17:45:20.717714  CPU_CLUSTER: 0 init finished in 2448 usecs

 1521 17:45:20.721922  PCI: 00:00.0 init ...

 1522 17:45:20.725549  CPU TDP: 15 Watts

 1523 17:45:20.728812  CPU PL2 = 64 Watts

 1524 17:45:20.732265  PCI: 00:00.0 init finished in 7080 usecs

 1525 17:45:20.735365  PCI: 00:02.0 init ...

 1526 17:45:20.739137  PCI: 00:02.0 init finished in 2254 usecs

 1527 17:45:20.741909  PCI: 00:08.0 init ...

 1528 17:45:20.745322  PCI: 00:08.0 init finished in 2253 usecs

 1529 17:45:20.748682  PCI: 00:12.0 init ...

 1530 17:45:20.752139  PCI: 00:12.0 init finished in 2253 usecs

 1531 17:45:20.755604  PCI: 00:14.0 init ...

 1532 17:45:20.758625  PCI: 00:14.0 init finished in 2252 usecs

 1533 17:45:20.762181  PCI: 00:14.2 init ...

 1534 17:45:20.765478  PCI: 00:14.2 init finished in 2244 usecs

 1535 17:45:20.768937  PCI: 00:14.3 init ...

 1536 17:45:20.771947  PCI: 00:14.3 init finished in 2272 usecs

 1537 17:45:20.775828  PCI: 00:15.0 init ...

 1538 17:45:20.778394  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1539 17:45:20.781847  PCI: 00:15.0 init finished in 5969 usecs

 1540 17:45:20.785601  PCI: 00:15.1 init ...

 1541 17:45:20.788664  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1542 17:45:20.791943  PCI: 00:15.1 init finished in 5976 usecs

 1543 17:45:20.795418  PCI: 00:16.0 init ...

 1544 17:45:20.799603  PCI: 00:16.0 init finished in 2242 usecs

 1545 17:45:20.802701  PCI: 00:19.0 init ...

 1546 17:45:20.805736  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1547 17:45:20.812395  PCI: 00:19.0 init finished in 5978 usecs

 1548 17:45:20.812489  PCI: 00:1d.0 init ...

 1549 17:45:20.815923  Initializing PCH PCIe bridge.

 1550 17:45:20.819182  PCI: 00:1d.0 init finished in 5285 usecs

 1551 17:45:20.824096  PCI: 00:1f.0 init ...

 1552 17:45:20.827673  IOAPIC: Initializing IOAPIC at 0xfec00000

 1553 17:45:20.834160  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1554 17:45:20.834255  IOAPIC: ID = 0x02

 1555 17:45:20.837436  IOAPIC: Dumping registers

 1556 17:45:20.840854    reg 0x0000: 0x02000000

 1557 17:45:20.843977    reg 0x0001: 0x00770020

 1558 17:45:20.844085    reg 0x0002: 0x00000000

 1559 17:45:20.850909  PCI: 00:1f.0 init finished in 23543 usecs

 1560 17:45:20.854600  PCI: 00:1f.4 init ...

 1561 17:45:20.857444  PCI: 00:1f.4 init finished in 2263 usecs

 1562 17:45:20.868315  PCI: 01:00.0 init ...

 1563 17:45:20.871821  PCI: 01:00.0 init finished in 2253 usecs

 1564 17:45:20.875964  PNP: 0c09.0 init ...

 1565 17:45:20.878990  Google Chrome EC uptime: 11.047 seconds

 1566 17:45:20.886051  Google Chrome AP resets since EC boot: 0

 1567 17:45:20.889473  Google Chrome most recent AP reset causes:

 1568 17:45:20.895935  Google Chrome EC reset flags at last EC boot: reset-pin

 1569 17:45:20.899223  PNP: 0c09.0 init finished in 20579 usecs

 1570 17:45:20.902805  Devices initialized

 1571 17:45:20.902955  Show all devs... After init.

 1572 17:45:20.905717  Root Device: enabled 1

 1573 17:45:20.909009  CPU_CLUSTER: 0: enabled 1

 1574 17:45:20.912609  DOMAIN: 0000: enabled 1

 1575 17:45:20.912705  APIC: 00: enabled 1

 1576 17:45:20.915809  PCI: 00:00.0: enabled 1

 1577 17:45:20.918962  PCI: 00:02.0: enabled 1

 1578 17:45:20.921943  PCI: 00:04.0: enabled 0

 1579 17:45:20.922035  PCI: 00:05.0: enabled 0

 1580 17:45:20.925490  PCI: 00:12.0: enabled 1

 1581 17:45:20.928631  PCI: 00:12.5: enabled 0

 1582 17:45:20.928743  PCI: 00:12.6: enabled 0

 1583 17:45:20.931939  PCI: 00:14.0: enabled 1

 1584 17:45:20.935465  PCI: 00:14.1: enabled 0

 1585 17:45:20.938960  PCI: 00:14.3: enabled 1

 1586 17:45:20.939051  PCI: 00:14.5: enabled 0

 1587 17:45:20.942694  PCI: 00:15.0: enabled 1

 1588 17:45:20.945327  PCI: 00:15.1: enabled 1

 1589 17:45:20.948735  PCI: 00:15.2: enabled 0

 1590 17:45:20.948826  PCI: 00:15.3: enabled 0

 1591 17:45:20.952207  PCI: 00:16.0: enabled 1

 1592 17:45:20.955642  PCI: 00:16.1: enabled 0

 1593 17:45:20.959104  PCI: 00:16.2: enabled 0

 1594 17:45:20.959205  PCI: 00:16.3: enabled 0

 1595 17:45:20.961793  PCI: 00:16.4: enabled 0

 1596 17:45:20.965553  PCI: 00:16.5: enabled 0

 1597 17:45:20.968904  PCI: 00:17.0: enabled 1

 1598 17:45:20.969021  PCI: 00:19.0: enabled 1

 1599 17:45:20.971794  PCI: 00:19.1: enabled 0

 1600 17:45:20.975077  PCI: 00:19.2: enabled 0

 1601 17:45:20.975167  PCI: 00:1a.0: enabled 0

 1602 17:45:20.978454  PCI: 00:1c.0: enabled 0

 1603 17:45:20.982055  PCI: 00:1c.1: enabled 0

 1604 17:45:20.985412  PCI: 00:1c.2: enabled 0

 1605 17:45:20.985502  PCI: 00:1c.3: enabled 0

 1606 17:45:20.988143  PCI: 00:1c.4: enabled 0

 1607 17:45:20.991587  PCI: 00:1c.5: enabled 0

 1608 17:45:20.995143  PCI: 00:1c.6: enabled 0

 1609 17:45:20.995233  PCI: 00:1c.7: enabled 0

 1610 17:45:20.998459  PCI: 00:1d.0: enabled 1

 1611 17:45:21.002044  PCI: 00:1d.1: enabled 0

 1612 17:45:21.004699  PCI: 00:1d.2: enabled 0

 1613 17:45:21.004789  PCI: 00:1d.3: enabled 0

 1614 17:45:21.008615  PCI: 00:1d.4: enabled 0

 1615 17:45:21.011856  PCI: 00:1d.5: enabled 0

 1616 17:45:21.011970  PCI: 00:1e.0: enabled 1

 1617 17:45:21.014753  PCI: 00:1e.1: enabled 0

 1618 17:45:21.018299  PCI: 00:1e.2: enabled 1

 1619 17:45:21.021766  PCI: 00:1e.3: enabled 1

 1620 17:45:21.021860  PCI: 00:1f.0: enabled 1

 1621 17:45:21.025040  PCI: 00:1f.1: enabled 0

 1622 17:45:21.028455  PCI: 00:1f.2: enabled 0

 1623 17:45:21.031286  PCI: 00:1f.3: enabled 1

 1624 17:45:21.031378  PCI: 00:1f.4: enabled 1

 1625 17:45:21.034582  PCI: 00:1f.5: enabled 1

 1626 17:45:21.038008  PCI: 00:1f.6: enabled 0

 1627 17:45:21.041615  USB0 port 0: enabled 1

 1628 17:45:21.041706  I2C: 01:15: enabled 1

 1629 17:45:21.044511  I2C: 02:5d: enabled 1

 1630 17:45:21.048223  GENERIC: 0.0: enabled 1

 1631 17:45:21.048324  I2C: 03:1a: enabled 1

 1632 17:45:21.051344  I2C: 03:38: enabled 1

 1633 17:45:21.054717  I2C: 03:39: enabled 1

 1634 17:45:21.054808  I2C: 03:3a: enabled 1

 1635 17:45:21.057676  I2C: 03:3b: enabled 1

 1636 17:45:21.061147  PCI: 00:00.0: enabled 1

 1637 17:45:21.061264  SPI: 00: enabled 1

 1638 17:45:21.064335  SPI: 01: enabled 1

 1639 17:45:21.067888  PNP: 0c09.0: enabled 1

 1640 17:45:21.067978  USB2 port 0: enabled 1

 1641 17:45:21.071478  USB2 port 1: enabled 1

 1642 17:45:21.074763  USB2 port 2: enabled 0

 1643 17:45:21.074853  USB2 port 3: enabled 0

 1644 17:45:21.077945  USB2 port 5: enabled 0

 1645 17:45:21.081164  USB2 port 6: enabled 1

 1646 17:45:21.084111  USB2 port 9: enabled 1

 1647 17:45:21.084202  USB3 port 0: enabled 1

 1648 17:45:21.087448  USB3 port 1: enabled 1

 1649 17:45:21.090746  USB3 port 2: enabled 1

 1650 17:45:21.090837  USB3 port 3: enabled 1

 1651 17:45:21.094426  USB3 port 4: enabled 0

 1652 17:45:21.097666  APIC: 02: enabled 1

 1653 17:45:21.097757  APIC: 01: enabled 1

 1654 17:45:21.101125  APIC: 03: enabled 1

 1655 17:45:21.104329  APIC: 04: enabled 1

 1656 17:45:21.104420  APIC: 06: enabled 1

 1657 17:45:21.107417  APIC: 07: enabled 1

 1658 17:45:21.107508  APIC: 05: enabled 1

 1659 17:45:21.110769  PCI: 00:08.0: enabled 1

 1660 17:45:21.114339  PCI: 00:14.2: enabled 1

 1661 17:45:21.117328  PCI: 01:00.0: enabled 1

 1662 17:45:21.121009  Disabling ACPI via APMC:

 1663 17:45:21.121100  done.

 1664 17:45:21.127414  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1665 17:45:21.130934  ELOG: NV offset 0xaf0000 size 0x4000

 1666 17:45:21.137373  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1667 17:45:21.143991  ELOG: Event(17) added with size 13 at 2023-10-20 17:44:59 UTC

 1668 17:45:21.150840  ELOG: Event(92) added with size 9 at 2023-10-20 17:44:59 UTC

 1669 17:45:21.157149  ELOG: Event(93) added with size 9 at 2023-10-20 17:44:59 UTC

 1670 17:45:21.164211  ELOG: Event(9A) added with size 9 at 2023-10-20 17:44:59 UTC

 1671 17:45:21.170417  ELOG: Event(9E) added with size 10 at 2023-10-20 17:44:59 UTC

 1672 17:45:21.177047  ELOG: Event(9F) added with size 14 at 2023-10-20 17:44:59 UTC

 1673 17:45:21.180404  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1674 17:45:21.187721  ELOG: Event(A1) added with size 10 at 2023-10-20 17:44:59 UTC

 1675 17:45:21.197959  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1676 17:45:21.204239  ELOG: Event(A0) added with size 9 at 2023-10-20 17:44:59 UTC

 1677 17:45:21.207486  elog_add_boot_reason: Logged dev mode boot

 1678 17:45:21.207580  Finalize devices...

 1679 17:45:21.211056  PCI: 00:17.0 final

 1680 17:45:21.214523  Devices finalized

 1681 17:45:21.217437  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1682 17:45:21.224376  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1683 17:45:21.227496  ME: HFSTS1                  : 0x90000245

 1684 17:45:21.231045  ME: HFSTS2                  : 0x3B850126

 1685 17:45:21.237095  ME: HFSTS3                  : 0x00000020

 1686 17:45:21.240994  ME: HFSTS4                  : 0x00004800

 1687 17:45:21.243820  ME: HFSTS5                  : 0x00000000

 1688 17:45:21.247184  ME: HFSTS6                  : 0x40400006

 1689 17:45:21.250728  ME: Manufacturing Mode      : NO

 1690 17:45:21.254499  ME: FW Partition Table      : OK

 1691 17:45:21.257165  ME: Bringup Loader Failure  : NO

 1692 17:45:21.260572  ME: Firmware Init Complete  : YES

 1693 17:45:21.264363  ME: Boot Options Present    : NO

 1694 17:45:21.267097  ME: Update In Progress      : NO

 1695 17:45:21.270721  ME: D0i3 Support            : YES

 1696 17:45:21.273872  ME: Low Power State Enabled : NO

 1697 17:45:21.277197  ME: CPU Replaced            : NO

 1698 17:45:21.280600  ME: CPU Replacement Valid   : YES

 1699 17:45:21.283750  ME: Current Working State   : 5

 1700 17:45:21.287205  ME: Current Operation State : 1

 1701 17:45:21.290199  ME: Current Operation Mode  : 0

 1702 17:45:21.293448  ME: Error Code              : 0

 1703 17:45:21.297252  ME: CPU Debug Disabled      : YES

 1704 17:45:21.300136  ME: TXT Support             : NO

 1705 17:45:21.307085  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1706 17:45:21.313319  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1707 17:45:21.313412  CBFS @ c08000 size 3f8000

 1708 17:45:21.320376  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1709 17:45:21.323656  CBFS: Locating 'fallback/dsdt.aml'

 1710 17:45:21.327288  CBFS: Found @ offset 10bb80 size 3fa5

 1711 17:45:21.333526  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1712 17:45:21.336989  CBFS @ c08000 size 3f8000

 1713 17:45:21.340232  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1714 17:45:21.343186  CBFS: Locating 'fallback/slic'

 1715 17:45:21.348418  CBFS: 'fallback/slic' not found.

 1716 17:45:21.355138  ACPI: Writing ACPI tables at 99b3e000.

 1717 17:45:21.355229  ACPI:    * FACS

 1718 17:45:21.358534  ACPI:    * DSDT

 1719 17:45:21.361448  Ramoops buffer: 0x100000@0x99a3d000.

 1720 17:45:21.364951  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1721 17:45:21.371195  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1722 17:45:21.374573  Google Chrome EC: version:

 1723 17:45:21.377952  	ro: helios_v2.0.2659-56403530b

 1724 17:45:21.381544  	rw: helios_v2.0.2849-c41de27e7d

 1725 17:45:21.381634    running image: 1

 1726 17:45:21.385882  ACPI:    * FADT

 1727 17:45:21.385972  SCI is IRQ9

 1728 17:45:21.392491  ACPI: added table 1/32, length now 40

 1729 17:45:21.392582  ACPI:     * SSDT

 1730 17:45:21.395650  Found 1 CPU(s) with 8 core(s) each.

 1731 17:45:21.398833  Error: Could not locate 'wifi_sar' in VPD.

 1732 17:45:21.405902  Checking CBFS for default SAR values

 1733 17:45:21.408557  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1734 17:45:21.412040  CBFS @ c08000 size 3f8000

 1735 17:45:21.418607  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1736 17:45:21.422168  CBFS: Locating 'wifi_sar_defaults.hex'

 1737 17:45:21.425185  CBFS: Found @ offset 5fac0 size 77

 1738 17:45:21.429079  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1739 17:45:21.435167  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1740 17:45:21.438447  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1741 17:45:21.445004  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1742 17:45:21.448444  failed to find key in VPD: dsm_calib_r0_0

 1743 17:45:21.458336  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1744 17:45:21.461555  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1745 17:45:21.465128  failed to find key in VPD: dsm_calib_r0_1

 1746 17:45:21.475031  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1747 17:45:21.481573  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1748 17:45:21.484825  failed to find key in VPD: dsm_calib_r0_2

 1749 17:45:21.494955  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1750 17:45:21.498222  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1751 17:45:21.504825  failed to find key in VPD: dsm_calib_r0_3

 1752 17:45:21.511276  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1753 17:45:21.517805  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1754 17:45:21.521317  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1755 17:45:21.524186  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1756 17:45:21.528252  EC returned error result code 1

 1757 17:45:21.532275  EC returned error result code 1

 1758 17:45:21.536016  EC returned error result code 1

 1759 17:45:21.542809  PS2K: Bad resp from EC. Vivaldi disabled!

 1760 17:45:21.545859  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1761 17:45:21.552440  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1762 17:45:21.559362  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1763 17:45:21.562871  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1764 17:45:21.569447  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1765 17:45:21.575588  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1766 17:45:21.582495  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1767 17:45:21.585549  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1768 17:45:21.592450  ACPI: added table 2/32, length now 44

 1769 17:45:21.592550  ACPI:    * MCFG

 1770 17:45:21.596235  ACPI: added table 3/32, length now 48

 1771 17:45:21.598841  ACPI:    * TPM2

 1772 17:45:21.602629  TPM2 log created at 99a2d000

 1773 17:45:21.605762  ACPI: added table 4/32, length now 52

 1774 17:45:21.605882  ACPI:    * MADT

 1775 17:45:21.609311  SCI is IRQ9

 1776 17:45:21.612609  ACPI: added table 5/32, length now 56

 1777 17:45:21.612700  current = 99b43ac0

 1778 17:45:21.615539  ACPI:    * DMAR

 1779 17:45:21.619132  ACPI: added table 6/32, length now 60

 1780 17:45:21.622426  ACPI:    * IGD OpRegion

 1781 17:45:21.622518  GMA: Found VBT in CBFS

 1782 17:45:21.625544  GMA: Found valid VBT in CBFS

 1783 17:45:21.628584  ACPI: added table 7/32, length now 64

 1784 17:45:21.632313  ACPI:    * HPET

 1785 17:45:21.635199  ACPI: added table 8/32, length now 68

 1786 17:45:21.635291  ACPI: done.

 1787 17:45:21.638607  ACPI tables: 31744 bytes.

 1788 17:45:21.642254  smbios_write_tables: 99a2c000

 1789 17:45:21.645586  EC returned error result code 3

 1790 17:45:21.648895  Couldn't obtain OEM name from CBI

 1791 17:45:21.652242  Create SMBIOS type 17

 1792 17:45:21.655616  PCI: 00:00.0 (Intel Cannonlake)

 1793 17:45:21.658905  PCI: 00:14.3 (Intel WiFi)

 1794 17:45:21.662187  SMBIOS tables: 939 bytes.

 1795 17:45:21.665741  Writing table forward entry at 0x00000500

 1796 17:45:21.672217  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1797 17:45:21.675628  Writing coreboot table at 0x99b62000

 1798 17:45:21.682247   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1799 17:45:21.685465   1. 0000000000001000-000000000009ffff: RAM

 1800 17:45:21.688661   2. 00000000000a0000-00000000000fffff: RESERVED

 1801 17:45:21.695142   3. 0000000000100000-0000000099a2bfff: RAM

 1802 17:45:21.698541   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1803 17:45:21.705435   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1804 17:45:21.711670   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1805 17:45:21.714830   7. 000000009a000000-000000009f7fffff: RESERVED

 1806 17:45:21.721609   8. 00000000e0000000-00000000efffffff: RESERVED

 1807 17:45:21.725401   9. 00000000fc000000-00000000fc000fff: RESERVED

 1808 17:45:21.728289  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1809 17:45:21.734814  11. 00000000fed10000-00000000fed17fff: RESERVED

 1810 17:45:21.738512  12. 00000000fed80000-00000000fed83fff: RESERVED

 1811 17:45:21.744778  13. 00000000fed90000-00000000fed91fff: RESERVED

 1812 17:45:21.748025  14. 00000000feda0000-00000000feda1fff: RESERVED

 1813 17:45:21.754845  15. 0000000100000000-000000045e7fffff: RAM

 1814 17:45:21.758376  Graphics framebuffer located at 0xc0000000

 1815 17:45:21.761248  Passing 5 GPIOs to payload:

 1816 17:45:21.765151              NAME |       PORT | POLARITY |     VALUE

 1817 17:45:21.771307     write protect |  undefined |     high |       low

 1818 17:45:21.774777               lid |  undefined |     high |      high

 1819 17:45:21.781346             power |  undefined |     high |       low

 1820 17:45:21.788217             oprom |  undefined |     high |       low

 1821 17:45:21.791108          EC in RW | 0x000000cb |     high |       low

 1822 17:45:21.794509  Board ID: 4

 1823 17:45:21.798150  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1824 17:45:21.801000  CBFS @ c08000 size 3f8000

 1825 17:45:21.807841  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1826 17:45:21.814635  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264

 1827 17:45:21.814729  coreboot table: 1492 bytes.

 1828 17:45:21.817888  IMD ROOT    0. 99fff000 00001000

 1829 17:45:21.821155  IMD SMALL   1. 99ffe000 00001000

 1830 17:45:21.824386  FSP MEMORY  2. 99c4e000 003b0000

 1831 17:45:21.828014  CONSOLE     3. 99c2e000 00020000

 1832 17:45:21.831762  FMAP        4. 99c2d000 0000054e

 1833 17:45:21.835002  TIME STAMP  5. 99c2c000 00000910

 1834 17:45:21.837744  VBOOT WORK  6. 99c18000 00014000

 1835 17:45:21.841138  MRC DATA    7. 99c16000 00001958

 1836 17:45:21.844343  ROMSTG STCK 8. 99c15000 00001000

 1837 17:45:21.847639  AFTER CAR   9. 99c0b000 0000a000

 1838 17:45:21.851031  RAMSTAGE   10. 99baf000 0005c000

 1839 17:45:21.854690  REFCODE    11. 99b7a000 00035000

 1840 17:45:21.857646  SMM BACKUP 12. 99b6a000 00010000

 1841 17:45:21.861142  COREBOOT   13. 99b62000 00008000

 1842 17:45:21.864194  ACPI       14. 99b3e000 00024000

 1843 17:45:21.867854  ACPI GNVS  15. 99b3d000 00001000

 1844 17:45:21.871215  RAMOOPS    16. 99a3d000 00100000

 1845 17:45:21.874259  TPM2 TCGLOG17. 99a2d000 00010000

 1846 17:45:21.877728  SMBIOS     18. 99a2c000 00000800

 1847 17:45:21.880861  IMD small region:

 1848 17:45:21.884127    IMD ROOT    0. 99ffec00 00000400

 1849 17:45:21.887612    FSP RUNTIME 1. 99ffebe0 00000004

 1850 17:45:21.891219    EC HOSTEVENT 2. 99ffebc0 00000008

 1851 17:45:21.894601    POWER STATE 3. 99ffeb80 00000040

 1852 17:45:21.897678    ROMSTAGE    4. 99ffeb60 00000004

 1853 17:45:21.901005    MEM INFO    5. 99ffe9a0 000001b9

 1854 17:45:21.904635    VPD         6. 99ffe920 0000006c

 1855 17:45:21.907171  MTRR: Physical address space:

 1856 17:45:21.913926  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1857 17:45:21.920832  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1858 17:45:21.927019  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1859 17:45:21.933761  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1860 17:45:21.940436  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1861 17:45:21.947050  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1862 17:45:21.953582  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1863 17:45:21.956686  MTRR: Fixed MSR 0x250 0x0606060606060606

 1864 17:45:21.960427  MTRR: Fixed MSR 0x258 0x0606060606060606

 1865 17:45:21.963144  MTRR: Fixed MSR 0x259 0x0000000000000000

 1866 17:45:21.970110  MTRR: Fixed MSR 0x268 0x0606060606060606

 1867 17:45:21.973483  MTRR: Fixed MSR 0x269 0x0606060606060606

 1868 17:45:21.977076  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1869 17:45:21.979930  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1870 17:45:21.983508  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1871 17:45:21.990222  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1872 17:45:21.993164  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1873 17:45:21.996582  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1874 17:45:22.000137  call enable_fixed_mtrr()

 1875 17:45:22.003165  CPU physical address size: 39 bits

 1876 17:45:22.009992  MTRR: default type WB/UC MTRR counts: 6/8.

 1877 17:45:22.012782  MTRR: WB selected as default type.

 1878 17:45:22.019857  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1879 17:45:22.022827  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1880 17:45:22.029329  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1881 17:45:22.036315  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1882 17:45:22.042770  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1883 17:45:22.049685  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1884 17:45:22.055901  MTRR: Fixed MSR 0x250 0x0606060606060606

 1885 17:45:22.059147  MTRR: Fixed MSR 0x258 0x0606060606060606

 1886 17:45:22.062508  MTRR: Fixed MSR 0x259 0x0000000000000000

 1887 17:45:22.066075  MTRR: Fixed MSR 0x268 0x0606060606060606

 1888 17:45:22.069095  MTRR: Fixed MSR 0x269 0x0606060606060606

 1889 17:45:22.075575  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1890 17:45:22.079007  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1891 17:45:22.083004  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1892 17:45:22.085813  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1893 17:45:22.092146  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1894 17:45:22.095906  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1895 17:45:22.096006  

 1896 17:45:22.096084  MTRR check

 1897 17:45:22.098843  Fixed MTRRs   : Enabled

 1898 17:45:22.102434  Variable MTRRs: Enabled

 1899 17:45:22.102525  

 1900 17:45:22.105695  call enable_fixed_mtrr()

 1901 17:45:22.109014  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1902 17:45:22.112381  CPU physical address size: 39 bits

 1903 17:45:22.119164  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1904 17:45:22.122474  MTRR: Fixed MSR 0x250 0x0606060606060606

 1905 17:45:22.125575  MTRR: Fixed MSR 0x250 0x0606060606060606

 1906 17:45:22.132590  MTRR: Fixed MSR 0x258 0x0606060606060606

 1907 17:45:22.135893  MTRR: Fixed MSR 0x259 0x0000000000000000

 1908 17:45:22.139194  MTRR: Fixed MSR 0x268 0x0606060606060606

 1909 17:45:22.142512  MTRR: Fixed MSR 0x269 0x0606060606060606

 1910 17:45:22.148615  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1911 17:45:22.152547  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1912 17:45:22.155584  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1913 17:45:22.158466  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1914 17:45:22.162055  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1915 17:45:22.168628  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1916 17:45:22.172119  MTRR: Fixed MSR 0x258 0x0606060606060606

 1917 17:45:22.175143  call enable_fixed_mtrr()

 1918 17:45:22.178672  MTRR: Fixed MSR 0x259 0x0000000000000000

 1919 17:45:22.182178  MTRR: Fixed MSR 0x268 0x0606060606060606

 1920 17:45:22.188698  MTRR: Fixed MSR 0x269 0x0606060606060606

 1921 17:45:22.192016  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1922 17:45:22.195037  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1923 17:45:22.198523  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1924 17:45:22.201940  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1925 17:45:22.208913  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1926 17:45:22.211854  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1927 17:45:22.215316  CPU physical address size: 39 bits

 1928 17:45:22.218512  call enable_fixed_mtrr()

 1929 17:45:22.221428  CBFS @ c08000 size 3f8000

 1930 17:45:22.224928  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1931 17:45:22.231532  CPU physical address size: 39 bits

 1932 17:45:22.234861  MTRR: Fixed MSR 0x250 0x0606060606060606

 1933 17:45:22.238268  MTRR: Fixed MSR 0x250 0x0606060606060606

 1934 17:45:22.241674  MTRR: Fixed MSR 0x258 0x0606060606060606

 1935 17:45:22.245093  MTRR: Fixed MSR 0x259 0x0000000000000000

 1936 17:45:22.251798  MTRR: Fixed MSR 0x268 0x0606060606060606

 1937 17:45:22.254592  MTRR: Fixed MSR 0x269 0x0606060606060606

 1938 17:45:22.257826  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1939 17:45:22.261474  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1940 17:45:22.267968  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1941 17:45:22.271420  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1942 17:45:22.274591  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1943 17:45:22.278006  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1944 17:45:22.284413  MTRR: Fixed MSR 0x258 0x0606060606060606

 1945 17:45:22.284505  call enable_fixed_mtrr()

 1946 17:45:22.291204  MTRR: Fixed MSR 0x259 0x0000000000000000

 1947 17:45:22.294436  MTRR: Fixed MSR 0x268 0x0606060606060606

 1948 17:45:22.297968  MTRR: Fixed MSR 0x269 0x0606060606060606

 1949 17:45:22.300861  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1950 17:45:22.307367  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1951 17:45:22.311200  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1952 17:45:22.314163  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1953 17:45:22.317305  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1954 17:45:22.324081  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1955 17:45:22.327647  CPU physical address size: 39 bits

 1956 17:45:22.330690  call enable_fixed_mtrr()

 1957 17:45:22.334289  CBFS: Locating 'fallback/payload'

 1958 17:45:22.337358  MTRR: Fixed MSR 0x250 0x0606060606060606

 1959 17:45:22.340733  MTRR: Fixed MSR 0x250 0x0606060606060606

 1960 17:45:22.343716  MTRR: Fixed MSR 0x258 0x0606060606060606

 1961 17:45:22.351059  MTRR: Fixed MSR 0x259 0x0000000000000000

 1962 17:45:22.353717  MTRR: Fixed MSR 0x268 0x0606060606060606

 1963 17:45:22.357141  MTRR: Fixed MSR 0x269 0x0606060606060606

 1964 17:45:22.360534  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1965 17:45:22.367226  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1966 17:45:22.370454  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1967 17:45:22.373685  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1968 17:45:22.377103  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1969 17:45:22.383380  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1970 17:45:22.386943  MTRR: Fixed MSR 0x258 0x0606060606060606

 1971 17:45:22.390382  call enable_fixed_mtrr()

 1972 17:45:22.393977  MTRR: Fixed MSR 0x259 0x0000000000000000

 1973 17:45:22.396952  MTRR: Fixed MSR 0x268 0x0606060606060606

 1974 17:45:22.400023  MTRR: Fixed MSR 0x269 0x0606060606060606

 1975 17:45:22.406541  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1976 17:45:22.409963  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1977 17:45:22.413256  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1978 17:45:22.416733  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1979 17:45:22.423286  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1980 17:45:22.426573  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1981 17:45:22.429715  CPU physical address size: 39 bits

 1982 17:45:22.432985  call enable_fixed_mtrr()

 1983 17:45:22.436817  CPU physical address size: 39 bits

 1984 17:45:22.439444  CPU physical address size: 39 bits

 1985 17:45:22.443147  CBFS: Found @ offset 1c96c0 size 3f798

 1986 17:45:22.446393  Checking segment from ROM address 0xffdd16f8

 1987 17:45:22.453112  Checking segment from ROM address 0xffdd1714

 1988 17:45:22.456030  Loading segment from ROM address 0xffdd16f8

 1989 17:45:22.459856    code (compression=0)

 1990 17:45:22.466215    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1991 17:45:22.476228  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1992 17:45:22.479662  it's not compressed!

 1993 17:45:22.570534  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1994 17:45:22.576915  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1995 17:45:22.580225  Loading segment from ROM address 0xffdd1714

 1996 17:45:22.583531    Entry Point 0x30000000

 1997 17:45:22.586758  Loaded segments

 1998 17:45:22.592547  Finalizing chipset.

 1999 17:45:22.595931  Finalizing SMM.

 2000 17:45:22.598821  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2001 17:45:22.602375  mp_park_aps done after 0 msecs.

 2002 17:45:22.608920  Jumping to boot code at 30000000(99b62000)

 2003 17:45:22.615659  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2004 17:45:22.615755  

 2005 17:45:22.615851  

 2006 17:45:22.615959  

 2007 17:45:22.618892  Starting depthcharge on Helios...

 2008 17:45:22.618985  

 2009 17:45:22.619371  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2010 17:45:22.619495  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2011 17:45:22.619598  Setting prompt string to ['hatch:']
 2012 17:45:22.619702  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2013 17:45:22.628657  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2014 17:45:22.628751  

 2015 17:45:22.635959  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2016 17:45:22.636060  

 2017 17:45:22.642140  board_setup: Info: eMMC controller not present; skipping

 2018 17:45:22.642233  

 2019 17:45:22.645410  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2020 17:45:22.645504  

 2021 17:45:22.651705  board_setup: Info: SDHCI controller not present; skipping

 2022 17:45:22.651799  

 2023 17:45:22.658394  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2024 17:45:22.658490  

 2025 17:45:22.658585  Wipe memory regions:

 2026 17:45:22.658674  

 2027 17:45:22.661838  	[0x00000000001000, 0x000000000a0000)

 2028 17:45:22.661930  

 2029 17:45:22.665217  	[0x00000000100000, 0x00000030000000)

 2030 17:45:22.731630  

 2031 17:45:22.734849  	[0x00000030657430, 0x00000099a2c000)

 2032 17:45:22.881647  

 2033 17:45:22.884925  	[0x00000100000000, 0x0000045e800000)

 2034 17:45:24.341048  

 2035 17:45:24.341212  R8152: Initializing

 2036 17:45:24.341315  

 2037 17:45:24.344272  Version 9 (ocp_data = 6010)

 2038 17:45:24.348367  

 2039 17:45:24.348498  R8152: Done initializing

 2040 17:45:24.348575  

 2041 17:45:24.352098  Adding net device

 2042 17:45:24.834307  

 2043 17:45:24.834462  R8152: Initializing

 2044 17:45:24.834537  

 2045 17:45:24.837651  Version 6 (ocp_data = 5c30)

 2046 17:45:24.837742  

 2047 17:45:24.841065  R8152: Done initializing

 2048 17:45:24.841155  

 2049 17:45:24.844173  net_add_device: Attemp to include the same device

 2050 17:45:24.847980  

 2051 17:45:24.854746  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2052 17:45:24.854837  

 2053 17:45:24.854909  

 2054 17:45:24.854975  

 2055 17:45:24.855265  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2057 17:45:24.955639  hatch: tftpboot 192.168.201.1 11831866/tftp-deploy-gbqrboo9/kernel/bzImage 11831866/tftp-deploy-gbqrboo9/kernel/cmdline 11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz

 2058 17:45:24.955800  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2059 17:45:24.955893  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2060 17:45:24.960116  tftpboot 192.168.201.1 11831866/tftp-deploy-gbqrboo9/kernel/bzImloy-gbqrboo9/kernel/cmdline 11831866/tftp-deploy-gbqrboo9/ramdisk/ramdisk.cpio.gz

 2061 17:45:24.960212  

 2062 17:45:24.960283  Waiting for link

 2063 17:45:25.161193  

 2064 17:45:25.161346  done.

 2065 17:45:25.161422  

 2066 17:45:25.161489  MAC: 00:24:32:50:1a:59

 2067 17:45:25.161553  

 2068 17:45:25.164100  Sending DHCP discover... done.

 2069 17:45:25.164192  

 2070 17:45:25.167581  Waiting for reply... done.

 2071 17:45:25.167671  

 2072 17:45:25.171096  Sending DHCP request... done.

 2073 17:45:25.171187  

 2074 17:45:25.177980  Waiting for reply... done.

 2075 17:45:25.178071  

 2076 17:45:25.178144  My ip is 192.168.201.14

 2077 17:45:25.178212  

 2078 17:45:25.181371  The DHCP server ip is 192.168.201.1

 2079 17:45:25.184887  

 2080 17:45:25.187969  TFTP server IP predefined by user: 192.168.201.1

 2081 17:45:25.188078  

 2082 17:45:25.194579  Bootfile predefined by user: 11831866/tftp-deploy-gbqrboo9/kernel/bzImage

 2083 17:45:25.194671  

 2084 17:45:25.198052  Sending tftp read request... done.

 2085 17:45:25.198143  

 2086 17:45:25.204108  Waiting for the transfer... 

 2087 17:45:25.204200  

 2088 17:45:25.770748  00000000 ################################################################

 2089 17:45:25.770905  

 2090 17:45:26.334710  00080000 ################################################################

 2091 17:45:26.334877  

 2092 17:45:26.915948  00100000 ################################################################

 2093 17:45:26.916108  

 2094 17:45:27.509952  00180000 ################################################################

 2095 17:45:27.510101  

 2096 17:45:28.098003  00200000 ################################################################

 2097 17:45:28.098147  

 2098 17:45:28.655175  00280000 ################################################################

 2099 17:45:28.655337  

 2100 17:45:29.224696  00300000 ################################################################

 2101 17:45:29.224859  

 2102 17:45:29.784376  00380000 ################################################################

 2103 17:45:29.784736  

 2104 17:45:30.463105  00400000 ################################################################

 2105 17:45:30.463616  

 2106 17:45:31.152345  00480000 ################################################################

 2107 17:45:31.152835  

 2108 17:45:31.855247  00500000 ################################################################

 2109 17:45:31.855787  

 2110 17:45:32.475693  00580000 ################################################################

 2111 17:45:32.475851  

 2112 17:45:33.047873  00600000 ################################################################

 2113 17:45:33.048076  

 2114 17:45:33.630375  00680000 ################################################################

 2115 17:45:33.630535  

 2116 17:45:34.211258  00700000 ################################################################

 2117 17:45:34.211427  

 2118 17:45:34.772354  00780000 ################################################################

 2119 17:45:34.772537  

 2120 17:45:34.898164  00800000 ############### done.

 2121 17:45:34.898424  

 2122 17:45:34.901637  The bootfile was 8507280 bytes long.

 2123 17:45:34.901863  

 2124 17:45:34.905106  Sending tftp read request... done.

 2125 17:45:34.905334  

 2126 17:45:34.907822  Waiting for the transfer... 

 2127 17:45:34.908050  

 2128 17:45:35.503793  00000000 ################################################################

 2129 17:45:35.503964  

 2130 17:45:36.193274  00080000 ################################################################

 2131 17:45:36.193713  

 2132 17:45:36.881254  00100000 ################################################################

 2133 17:45:36.881806  

 2134 17:45:37.601609  00180000 ################################################################

 2135 17:45:37.602125  

 2136 17:45:38.321753  00200000 ################################################################

 2137 17:45:38.322294  

 2138 17:45:39.036307  00280000 ################################################################

 2139 17:45:39.036826  

 2140 17:45:39.746696  00300000 ################################################################

 2141 17:45:39.747256  

 2142 17:45:40.451696  00380000 ################################################################

 2143 17:45:40.452299  

 2144 17:45:41.177156  00400000 ################################################################

 2145 17:45:41.177669  

 2146 17:45:41.909070  00480000 ################################################################

 2147 17:45:41.909589  

 2148 17:45:42.621499  00500000 ################################################################ done.

 2149 17:45:42.621992  

 2150 17:45:42.624706  Sending tftp read request... done.

 2151 17:45:42.625160  

 2152 17:45:42.628408  Waiting for the transfer... 

 2153 17:45:42.628984  

 2154 17:45:42.629454  00000000 # done.

 2155 17:45:42.629919  

 2156 17:45:42.638364  Command line loaded dynamically from TFTP file: 11831866/tftp-deploy-gbqrboo9/kernel/cmdline

 2157 17:45:42.638876  

 2158 17:45:42.668359  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831866/extract-nfsrootfs-3kl2sd7n,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2159 17:45:42.668886  

 2160 17:45:42.670996  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2161 17:45:42.676658  

 2162 17:45:42.680301  Shutting down all USB controllers.

 2163 17:45:42.680715  

 2164 17:45:42.681054  Removing current net device

 2165 17:45:42.684166  

 2166 17:45:42.684605  Finalizing coreboot

 2167 17:45:42.684931  

 2168 17:45:42.690990  Exiting depthcharge with code 4 at timestamp: 27411917

 2169 17:45:42.691400  

 2170 17:45:42.691721  

 2171 17:45:42.692063  Starting kernel ...

 2172 17:45:42.692371  

 2173 17:45:42.692670  

 2174 17:45:42.693812  end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
 2175 17:45:42.694331  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2176 17:45:42.694701  Setting prompt string to ['Linux version [0-9]']
 2177 17:45:42.695040  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2178 17:45:42.695372  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2180 17:50:04.694570  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2182 17:50:04.694794  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2184 17:50:04.694998  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2187 17:50:04.695283  end: 2 depthcharge-action (duration 00:05:00) [common]
 2189 17:50:04.695586  Cleaning after the job
 2190 17:50:04.695688  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/ramdisk
 2191 17:50:04.696698  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/kernel
 2192 17:50:04.698169  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/nfsrootfs
 2193 17:50:04.782413  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831866/tftp-deploy-gbqrboo9/modules
 2194 17:50:04.782923  start: 5.1 power-off (timeout 00:00:30) [common]
 2195 17:50:04.783116  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
 2196 17:50:04.865071  >> Command sent successfully.

 2197 17:50:04.867900  Returned 0 in 0 seconds
 2198 17:50:04.968380  end: 5.1 power-off (duration 00:00:00) [common]
 2200 17:50:04.968781  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2201 17:50:04.969133  Listened to connection for namespace 'common' for up to 1s
 2203 17:50:04.969547  Listened to connection for namespace 'common' for up to 1s
 2204 17:50:05.970028  Finalising connection for namespace 'common'
 2205 17:50:05.970227  Disconnecting from shell: Finalise
 2206 17:50:05.970315  
 2207 17:50:06.070694  end: 5.2 read-feedback (duration 00:00:01) [common]
 2208 17:50:06.070871  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831866
 2209 17:50:06.427259  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831866
 2210 17:50:06.427485  JobError: Your job cannot terminate cleanly.