Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:38:04.141053 lava-dispatcher, installed at version: 2023.08
2 17:38:04.141304 start: 0 validate
3 17:38:04.141465 Start time: 2023-10-20 17:38:04.141452+00:00 (UTC)
4 17:38:04.141614 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:38:04.141778 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:38:04.409975 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:38:04.410182 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:38:04.675166 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:38:04.675380 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:38:07.075399 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:38:07.075599 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:38:07.335281 validate duration: 3.19
14 17:38:07.335646 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:38:07.335788 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:38:07.335895 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:38:07.336037 Not decompressing ramdisk as can be used compressed.
18 17:38:07.336140 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:38:07.336214 saving as /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/ramdisk/initrd.cpio.gz
20 17:38:07.336296 total size: 5432690 (5 MB)
21 17:38:07.848765 progress 0 % (0 MB)
22 17:38:07.850850 progress 5 % (0 MB)
23 17:38:07.852506 progress 10 % (0 MB)
24 17:38:07.854177 progress 15 % (0 MB)
25 17:38:07.856163 progress 20 % (1 MB)
26 17:38:07.857937 progress 25 % (1 MB)
27 17:38:07.859618 progress 30 % (1 MB)
28 17:38:07.861457 progress 35 % (1 MB)
29 17:38:07.863068 progress 40 % (2 MB)
30 17:38:07.864742 progress 45 % (2 MB)
31 17:38:07.866422 progress 50 % (2 MB)
32 17:38:07.868477 progress 55 % (2 MB)
33 17:38:07.870218 progress 60 % (3 MB)
34 17:38:07.871864 progress 65 % (3 MB)
35 17:38:07.873887 progress 70 % (3 MB)
36 17:38:07.875584 progress 75 % (3 MB)
37 17:38:07.877400 progress 80 % (4 MB)
38 17:38:07.879162 progress 85 % (4 MB)
39 17:38:07.881085 progress 90 % (4 MB)
40 17:38:07.882785 progress 95 % (4 MB)
41 17:38:07.884474 progress 100 % (5 MB)
42 17:38:07.884756 5 MB downloaded in 0.55 s (9.45 MB/s)
43 17:38:07.884974 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:38:07.885420 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:38:07.885555 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:38:07.885689 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:38:07.885881 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:38:07.885990 saving as /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/kernel/bzImage
50 17:38:07.886097 total size: 8507280 (8 MB)
51 17:38:07.886208 No compression specified
52 17:38:07.888062 progress 0 % (0 MB)
53 17:38:07.890939 progress 5 % (0 MB)
54 17:38:07.893819 progress 10 % (0 MB)
55 17:38:07.896663 progress 15 % (1 MB)
56 17:38:07.899507 progress 20 % (1 MB)
57 17:38:07.902355 progress 25 % (2 MB)
58 17:38:07.905120 progress 30 % (2 MB)
59 17:38:07.907848 progress 35 % (2 MB)
60 17:38:07.910662 progress 40 % (3 MB)
61 17:38:07.913516 progress 45 % (3 MB)
62 17:38:07.916289 progress 50 % (4 MB)
63 17:38:07.919073 progress 55 % (4 MB)
64 17:38:07.922019 progress 60 % (4 MB)
65 17:38:07.924730 progress 65 % (5 MB)
66 17:38:07.927440 progress 70 % (5 MB)
67 17:38:07.930196 progress 75 % (6 MB)
68 17:38:07.932898 progress 80 % (6 MB)
69 17:38:07.935642 progress 85 % (6 MB)
70 17:38:07.938370 progress 90 % (7 MB)
71 17:38:07.941060 progress 95 % (7 MB)
72 17:38:07.943734 progress 100 % (8 MB)
73 17:38:07.943983 8 MB downloaded in 0.06 s (140.17 MB/s)
74 17:38:07.944200 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:38:07.944628 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:38:07.944762 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:38:07.944883 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:38:07.945044 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:38:07.945131 saving as /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/nfsrootfs/full.rootfs.tar
81 17:38:07.945210 total size: 133380384 (127 MB)
82 17:38:07.945318 Using unxz to decompress xz
83 17:38:07.950037 progress 0 % (0 MB)
84 17:38:08.356995 progress 5 % (6 MB)
85 17:38:08.773041 progress 10 % (12 MB)
86 17:38:09.110414 progress 15 % (19 MB)
87 17:38:09.322465 progress 20 % (25 MB)
88 17:38:09.621788 progress 25 % (31 MB)
89 17:38:10.053099 progress 30 % (38 MB)
90 17:38:10.469681 progress 35 % (44 MB)
91 17:38:10.993049 progress 40 % (50 MB)
92 17:38:11.505018 progress 45 % (57 MB)
93 17:38:11.950206 progress 50 % (63 MB)
94 17:38:12.405990 progress 55 % (69 MB)
95 17:38:12.834419 progress 60 % (76 MB)
96 17:38:13.276316 progress 65 % (82 MB)
97 17:38:13.725407 progress 70 % (89 MB)
98 17:38:14.179568 progress 75 % (95 MB)
99 17:38:14.698324 progress 80 % (101 MB)
100 17:38:15.205821 progress 85 % (108 MB)
101 17:38:15.530952 progress 90 % (114 MB)
102 17:38:15.952723 progress 95 % (120 MB)
103 17:38:16.423410 progress 100 % (127 MB)
104 17:38:16.430107 127 MB downloaded in 8.48 s (14.99 MB/s)
105 17:38:16.430422 end: 1.3.1 http-download (duration 00:00:08) [common]
107 17:38:16.430756 end: 1.3 download-retry (duration 00:00:08) [common]
108 17:38:16.430880 start: 1.4 download-retry (timeout 00:09:51) [common]
109 17:38:16.431001 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 17:38:16.431194 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:38:16.431281 saving as /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/modules/modules.tar
112 17:38:16.431376 total size: 253900 (0 MB)
113 17:38:16.431472 Using unxz to decompress xz
114 17:38:16.435951 progress 12 % (0 MB)
115 17:38:16.436418 progress 25 % (0 MB)
116 17:38:16.436696 progress 38 % (0 MB)
117 17:38:16.438350 progress 51 % (0 MB)
118 17:38:16.440477 progress 64 % (0 MB)
119 17:38:16.442658 progress 77 % (0 MB)
120 17:38:16.444913 progress 90 % (0 MB)
121 17:38:16.446871 progress 100 % (0 MB)
122 17:38:16.453683 0 MB downloaded in 0.02 s (10.86 MB/s)
123 17:38:16.454060 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:38:16.454598 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:38:16.454766 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 17:38:16.454946 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 17:38:19.465179 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831817/extract-nfsrootfs-jga5v1z9
129 17:38:19.465398 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 17:38:19.465532 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 17:38:19.465733 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj
132 17:38:19.465905 makedir: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin
133 17:38:19.466046 makedir: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/tests
134 17:38:19.466173 makedir: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/results
135 17:38:19.466289 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-add-keys
136 17:38:19.466474 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-add-sources
137 17:38:19.466642 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-background-process-start
138 17:38:19.466804 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-background-process-stop
139 17:38:19.466961 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-common-functions
140 17:38:19.467118 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-echo-ipv4
141 17:38:19.467274 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-install-packages
142 17:38:19.467420 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-installed-packages
143 17:38:19.467578 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-os-build
144 17:38:19.467740 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-probe-channel
145 17:38:19.467896 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-probe-ip
146 17:38:19.468052 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-target-ip
147 17:38:19.468205 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-target-mac
148 17:38:19.468367 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-target-storage
149 17:38:19.468527 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-case
150 17:38:19.468679 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-event
151 17:38:19.468847 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-feedback
152 17:38:19.469008 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-raise
153 17:38:19.469168 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-reference
154 17:38:19.469326 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-runner
155 17:38:19.469482 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-set
156 17:38:19.469636 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-test-shell
157 17:38:19.469802 Updating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-install-packages (oe)
158 17:38:19.469992 Updating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/bin/lava-installed-packages (oe)
159 17:38:19.470153 Creating /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/environment
160 17:38:19.470268 LAVA metadata
161 17:38:19.470364 - LAVA_JOB_ID=11831817
162 17:38:19.470439 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:38:19.470570 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
164 17:38:19.470647 skipped lava-vland-overlay
165 17:38:19.470741 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:38:19.470831 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
167 17:38:19.470917 skipped lava-multinode-overlay
168 17:38:19.471002 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:38:19.471101 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
170 17:38:19.471184 Loading test definitions
171 17:38:19.471299 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
172 17:38:19.471381 Using /lava-11831817 at stage 0
173 17:38:19.471762 uuid=11831817_1.5.2.3.1 testdef=None
174 17:38:19.471894 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:38:19.471992 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
176 17:38:19.472617 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:38:19.472926 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
179 17:38:19.473717 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:38:19.473997 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
182 17:38:19.474755 runner path: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/0/tests/0_dmesg test_uuid 11831817_1.5.2.3.1
183 17:38:19.474941 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:38:19.475306 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:48) [common]
186 17:38:19.475435 Using /lava-11831817 at stage 1
187 17:38:19.475852 uuid=11831817_1.5.2.3.5 testdef=None
188 17:38:19.475965 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:38:19.476064 start: 1.5.2.3.6 test-overlay (timeout 00:09:48) [common]
190 17:38:19.476632 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:38:19.476901 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:48) [common]
193 17:38:19.477669 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:38:19.477950 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:48) [common]
196 17:38:19.478741 runner path: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/1/tests/1_bootrr test_uuid 11831817_1.5.2.3.5
197 17:38:19.478931 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:38:19.479175 Creating lava-test-runner.conf files
200 17:38:19.479247 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/0 for stage 0
201 17:38:19.479370 - 0_dmesg
202 17:38:19.479462 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831817/lava-overlay-2mbr2mdj/lava-11831817/1 for stage 1
203 17:38:19.479576 - 1_bootrr
204 17:38:19.479684 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:38:19.479791 start: 1.5.2.4 compress-overlay (timeout 00:09:48) [common]
206 17:38:19.488718 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:38:19.488879 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:48) [common]
208 17:38:19.488991 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:38:19.489091 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:38:19.489202 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:48) [common]
211 17:38:19.650969 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:38:19.651403 start: 1.5.4 extract-modules (timeout 00:09:48) [common]
213 17:38:19.651523 extracting modules file /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831817/extract-nfsrootfs-jga5v1z9
214 17:38:19.667815 extracting modules file /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831817/extract-overlay-ramdisk-lo3_5i76/ramdisk
215 17:38:19.684052 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:38:19.684217 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
217 17:38:19.684322 [common] Applying overlay to NFS
218 17:38:19.684421 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831817/compress-overlay-q29cgh6g/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831817/extract-nfsrootfs-jga5v1z9
219 17:38:19.694415 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:38:19.694551 start: 1.5.6 configure-preseed-file (timeout 00:09:48) [common]
221 17:38:19.694653 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:38:19.694758 start: 1.5.7 compress-ramdisk (timeout 00:09:48) [common]
223 17:38:19.694846 Building ramdisk /var/lib/lava/dispatcher/tmp/11831817/extract-overlay-ramdisk-lo3_5i76/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831817/extract-overlay-ramdisk-lo3_5i76/ramdisk
224 17:38:19.777325 >> 26198 blocks
225 17:38:20.405808 rename /var/lib/lava/dispatcher/tmp/11831817/extract-overlay-ramdisk-lo3_5i76/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
226 17:38:20.406303 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 17:38:20.406442 start: 1.5.8 prepare-kernel (timeout 00:09:47) [common]
228 17:38:20.406557 start: 1.5.8.1 prepare-fit (timeout 00:09:47) [common]
229 17:38:20.406661 No mkimage arch provided, not using FIT.
230 17:38:20.406766 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:38:20.406876 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:38:20.406993 end: 1.5 prepare-tftp-overlay (duration 00:00:04) [common]
233 17:38:20.407111 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:47) [common]
234 17:38:20.407206 No LXC device requested
235 17:38:20.407298 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:38:20.407399 start: 1.7 deploy-device-env (timeout 00:09:47) [common]
237 17:38:20.407523 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:38:20.407619 Checking files for TFTP limit of 4294967296 bytes.
239 17:38:20.408117 end: 1 tftp-deploy (duration 00:00:13) [common]
240 17:38:20.408243 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:38:20.408358 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:38:20.408501 substitutions:
243 17:38:20.408577 - {DTB}: None
244 17:38:20.408650 - {INITRD}: 11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
245 17:38:20.408719 - {KERNEL}: 11831817/tftp-deploy-d5zryx4x/kernel/bzImage
246 17:38:20.408808 - {LAVA_MAC}: None
247 17:38:20.408885 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831817/extract-nfsrootfs-jga5v1z9
248 17:38:20.408953 - {NFS_SERVER_IP}: 192.168.201.1
249 17:38:20.409018 - {PRESEED_CONFIG}: None
250 17:38:20.409081 - {PRESEED_LOCAL}: None
251 17:38:20.409154 - {RAMDISK}: 11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
252 17:38:20.409219 - {ROOT_PART}: None
253 17:38:20.409294 - {ROOT}: None
254 17:38:20.409358 - {SERVER_IP}: 192.168.201.1
255 17:38:20.409429 - {TEE}: None
256 17:38:20.409491 Parsed boot commands:
257 17:38:20.409551 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:38:20.409769 Parsed boot commands: tftpboot 192.168.201.1 11831817/tftp-deploy-d5zryx4x/kernel/bzImage 11831817/tftp-deploy-d5zryx4x/kernel/cmdline 11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
259 17:38:20.409883 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:38:20.409979 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:38:20.410099 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:38:20.410211 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:38:20.410292 Not connected, no need to disconnect.
264 17:38:20.410389 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:38:20.410488 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:38:20.410567 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-4'
267 17:38:20.414951 Setting prompt string to ['lava-test: # ']
268 17:38:20.415382 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:38:20.415507 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:38:20.415620 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:38:20.415725 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:38:20.415954 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=reboot'
273 17:38:25.557544 >> Command sent successfully.
274 17:38:25.561619 Returned 0 in 5 seconds
275 17:38:25.662054 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 17:38:25.662504 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 17:38:25.662628 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 17:38:25.662735 Setting prompt string to 'Starting depthcharge on Voema...'
280 17:38:25.662815 Changing prompt to 'Starting depthcharge on Voema...'
281 17:38:25.662894 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 17:38:25.663198 [Enter `^Ec?' for help]
283 17:38:27.264837
284 17:38:27.264994
285 17:38:27.274450 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 17:38:27.277515 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 17:38:27.284640 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 17:38:27.287655 CPU: AES supported, TXT NOT supported, VT supported
289 17:38:27.294804 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 17:38:27.300952 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 17:38:27.304016 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 17:38:27.307738 VBOOT: Loading verstage.
293 17:38:27.310988 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 17:38:27.317559 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 17:38:27.320721 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 17:38:27.331705 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 17:38:27.338089 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 17:38:27.338202
299 17:38:27.338278
300 17:38:27.351387 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 17:38:27.365372 Probing TPM: . done!
302 17:38:27.368724 TPM ready after 0 ms
303 17:38:27.371954 Connected to device vid:did:rid of 1ae0:0028:00
304 17:38:27.383011 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
305 17:38:27.389496 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 17:38:27.393189 Initialized TPM device CR50 revision 0
307 17:38:27.443351 tlcl_send_startup: Startup return code is 0
308 17:38:27.443497 TPM: setup succeeded
309 17:38:27.458711 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 17:38:27.473321 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 17:38:27.486252 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 17:38:27.496032 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 17:38:27.499286 Chrome EC: UHEPI supported
314 17:38:27.503132 Phase 1
315 17:38:27.506360 FMAP: area GBB found @ 1805000 (458752 bytes)
316 17:38:27.516707 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 17:38:27.523061 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 17:38:27.529921 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 17:38:27.536186 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 17:38:27.539818 Recovery requested (1009000e)
321 17:38:27.543209 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 17:38:27.554796 tlcl_extend: response is 0
323 17:38:27.561847 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 17:38:27.571519 tlcl_extend: response is 0
325 17:38:27.578130 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 17:38:27.584686 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 17:38:27.591328 BS: verstage times (exec / console): total (unknown) / 142 ms
328 17:38:27.591421
329 17:38:27.591510
330 17:38:27.604560 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 17:38:27.611015 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 17:38:27.614215 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 17:38:27.617585 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 17:38:27.624576 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 17:38:27.627756 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 17:38:27.631423 gpe0_sts[3]: 00080000 gpe0_en[3]: 00092000
337 17:38:27.634590 TCO_STS: 0000 0000
338 17:38:27.637832 GEN_PMCON: d0015038 00002200
339 17:38:27.640845 GBLRST_CAUSE: 00000000 00000000
340 17:38:27.640941 HPR_CAUSE0: 00000000
341 17:38:27.644711 prev_sleep_state 5
342 17:38:27.647980 Boot Count incremented to 29966
343 17:38:27.654496 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 17:38:27.660755 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 17:38:27.667307 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 17:38:27.674286 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 17:38:27.678946 Chrome EC: UHEPI supported
348 17:38:27.685751 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 17:38:27.698481 Probing TPM: done!
350 17:38:27.705580 Connected to device vid:did:rid of 1ae0:0028:00
351 17:38:27.716021 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
352 17:38:27.724449 Initialized TPM device CR50 revision 0
353 17:38:27.735151 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 17:38:27.741595 MRC: Hash idx 0x100b comparison successful.
355 17:38:27.745370 MRC cache found, size faa8
356 17:38:27.745468 bootmode is set to: 2
357 17:38:27.748566 SPD index = 0
358 17:38:27.754982 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 17:38:27.758395 SPD: module type is LPDDR4X
360 17:38:27.762112 SPD: module part number is MT53E512M64D4NW-046
361 17:38:27.768650 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 17:38:27.771905 SPD: device width 16 bits, bus width 16 bits
363 17:38:27.778474 SPD: module size is 1024 MB (per channel)
364 17:38:28.213379 CBMEM:
365 17:38:28.216930 IMD: root @ 0x76fff000 254 entries.
366 17:38:28.219888 IMD: root @ 0x76ffec00 62 entries.
367 17:38:28.223142 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 17:38:28.230195 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 17:38:28.233350 External stage cache:
370 17:38:28.236288 IMD: root @ 0x7b3ff000 254 entries.
371 17:38:28.239792 IMD: root @ 0x7b3fec00 62 entries.
372 17:38:28.255556 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 17:38:28.261630 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 17:38:28.268453 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 17:38:28.282013 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 17:38:28.288669 cse_lite: Skip switching to RW in the recovery path
377 17:38:28.288812 8 DIMMs found
378 17:38:28.288899 SMM Memory Map
379 17:38:28.292576 SMRAM : 0x7b000000 0x800000
380 17:38:28.296440 Subregion 0: 0x7b000000 0x200000
381 17:38:28.300428 Subregion 1: 0x7b200000 0x200000
382 17:38:28.304279 Subregion 2: 0x7b400000 0x400000
383 17:38:28.307427 top_of_ram = 0x77000000
384 17:38:28.311146 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 17:38:28.317572 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 17:38:28.324141 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 17:38:28.326988 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 17:38:28.333736 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 17:38:28.340316 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 17:38:28.352145 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 17:38:28.358555 Processing 211 relocs. Offset value of 0x74c0b000
392 17:38:28.365316 BS: romstage times (exec / console): total (unknown) / 277 ms
393 17:38:28.371268
394 17:38:28.371364
395 17:38:28.381437 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 17:38:28.384693 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 17:38:28.394552 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 17:38:28.401127 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 17:38:28.407570 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 17:38:28.414431 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 17:38:28.461408 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 17:38:28.467994 Processing 5008 relocs. Offset value of 0x75d98000
403 17:38:28.471593 BS: postcar times (exec / console): total (unknown) / 59 ms
404 17:38:28.471692
405 17:38:28.474514
406 17:38:28.484253 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 17:38:28.484352 Normal boot
408 17:38:28.487939 FW_CONFIG value is 0x804c02
409 17:38:28.491060 PCI: 00:07.0 disabled by fw_config
410 17:38:28.495134 PCI: 00:07.1 disabled by fw_config
411 17:38:28.498457 PCI: 00:0d.2 disabled by fw_config
412 17:38:28.501738 PCI: 00:1c.7 disabled by fw_config
413 17:38:28.508296 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 17:38:28.514756 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 17:38:28.518607 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 17:38:28.521619 GENERIC: 0.0 disabled by fw_config
417 17:38:28.524909 GENERIC: 1.0 disabled by fw_config
418 17:38:28.531448 fw_config match found: DB_USB=USB3_ACTIVE
419 17:38:28.534844 fw_config match found: DB_USB=USB3_ACTIVE
420 17:38:28.538153 fw_config match found: DB_USB=USB3_ACTIVE
421 17:38:28.541435 fw_config match found: DB_USB=USB3_ACTIVE
422 17:38:28.548406 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 17:38:28.555192 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 17:38:28.561419 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 17:38:28.571517 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 17:38:28.574775 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 17:38:28.581556 microcode: Update skipped, already up-to-date
428 17:38:28.587689 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 17:38:28.614714 Detected 4 core, 8 thread CPU.
430 17:38:28.617928 Setting up SMI for CPU
431 17:38:28.621634 IED base = 0x7b400000
432 17:38:28.621729 IED size = 0x00400000
433 17:38:28.624632 Will perform SMM setup.
434 17:38:28.631274 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 17:38:28.638389 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 17:38:28.644642 Processing 16 relocs. Offset value of 0x00030000
437 17:38:28.647930 Attempting to start 7 APs
438 17:38:28.651159 Waiting for 10ms after sending INIT.
439 17:38:28.667022 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 17:38:28.667123 done.
441 17:38:28.669914 AP: slot 3 apic_id 5.
442 17:38:28.673457 AP: slot 6 apic_id 2.
443 17:38:28.673552 AP: slot 2 apic_id 3.
444 17:38:28.676887 AP: slot 5 apic_id 6.
445 17:38:28.680299 AP: slot 4 apic_id 7.
446 17:38:28.680394 AP: slot 7 apic_id 4.
447 17:38:28.686525 Waiting for 2nd SIPI to complete...done.
448 17:38:28.693567 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 17:38:28.700287 Processing 13 relocs. Offset value of 0x00038000
450 17:38:28.700385 Unable to locate Global NVS
451 17:38:28.710070 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 17:38:28.713626 Installing permanent SMM handler to 0x7b000000
453 17:38:28.723525 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 17:38:28.726684 Processing 794 relocs. Offset value of 0x7b010000
455 17:38:28.736701 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 17:38:28.740022 Processing 13 relocs. Offset value of 0x7b008000
457 17:38:28.746447 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 17:38:28.753043 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 17:38:28.756337 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 17:38:28.763264 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 17:38:28.769792 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 17:38:28.776506 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 17:38:28.782975 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 17:38:28.783071 Unable to locate Global NVS
465 17:38:28.792804 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 17:38:28.796683 Clearing SMI status registers
467 17:38:28.799776 SMI_STS: GPE0 PM1
468 17:38:28.799869 PM1_STS: PWRBTN
469 17:38:28.803076 GPE0 STD STS:
470 17:38:28.809811 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
471 17:38:28.813339 In relocation handler: CPU 0
472 17:38:28.816548 New SMBASE=0x7b000000 IEDBASE=0x7b400000
473 17:38:28.820015 Writing SMRR. base = 0x7b000006, mask=0xff800c00
474 17:38:28.822907 Relocation complete.
475 17:38:28.829443 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
476 17:38:28.833057 In relocation handler: CPU 1
477 17:38:28.836358 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
478 17:38:28.839654 Relocation complete.
479 17:38:28.846139 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
480 17:38:28.849468 In relocation handler: CPU 3
481 17:38:28.852777 New SMBASE=0x7afff400 IEDBASE=0x7b400000
482 17:38:28.856681 Relocation complete.
483 17:38:28.863123 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
484 17:38:28.866376 In relocation handler: CPU 5
485 17:38:28.869548 New SMBASE=0x7affec00 IEDBASE=0x7b400000
486 17:38:28.876707 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 17:38:28.876816 Relocation complete.
488 17:38:28.882771 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
489 17:38:28.886058 In relocation handler: CPU 4
490 17:38:28.893007 New SMBASE=0x7afff000 IEDBASE=0x7b400000
491 17:38:28.893102 Relocation complete.
492 17:38:28.899644 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
493 17:38:28.902707 In relocation handler: CPU 6
494 17:38:28.909865 New SMBASE=0x7affe800 IEDBASE=0x7b400000
495 17:38:28.912769 Writing SMRR. base = 0x7b000006, mask=0xff800c00
496 17:38:28.916363 Relocation complete.
497 17:38:28.922824 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
498 17:38:28.926587 In relocation handler: CPU 2
499 17:38:28.929646 New SMBASE=0x7afff800 IEDBASE=0x7b400000
500 17:38:28.932927 Relocation complete.
501 17:38:28.939510 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
502 17:38:28.942690 In relocation handler: CPU 7
503 17:38:28.946174 New SMBASE=0x7affe400 IEDBASE=0x7b400000
504 17:38:28.949542 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 17:38:28.952682 Relocation complete.
506 17:38:28.955996 Initializing CPU #0
507 17:38:28.959915 CPU: vendor Intel device 806c1
508 17:38:28.963094 CPU: family 06, model 8c, stepping 01
509 17:38:28.966950 Clearing out pending MCEs
510 17:38:28.967044 Setting up local APIC...
511 17:38:28.970691 apic_id: 0x00 done.
512 17:38:28.973827 Turbo is available but hidden
513 17:38:28.977079 Turbo is available and visible
514 17:38:28.980416 microcode: Update skipped, already up-to-date
515 17:38:28.983598 CPU #0 initialized
516 17:38:28.983692 Initializing CPU #6
517 17:38:28.986858 Initializing CPU #2
518 17:38:28.990104 CPU: vendor Intel device 806c1
519 17:38:28.993612 CPU: family 06, model 8c, stepping 01
520 17:38:28.996808 CPU: vendor Intel device 806c1
521 17:38:29.000130 CPU: family 06, model 8c, stepping 01
522 17:38:29.003851 Clearing out pending MCEs
523 17:38:29.007142 Clearing out pending MCEs
524 17:38:29.007236 Setting up local APIC...
525 17:38:29.010103 Initializing CPU #7
526 17:38:29.013606 Initializing CPU #3
527 17:38:29.016956 CPU: vendor Intel device 806c1
528 17:38:29.020155 CPU: family 06, model 8c, stepping 01
529 17:38:29.023340 CPU: vendor Intel device 806c1
530 17:38:29.026899 CPU: family 06, model 8c, stepping 01
531 17:38:29.030475 Clearing out pending MCEs
532 17:38:29.030569 Clearing out pending MCEs
533 17:38:29.033625 Setting up local APIC...
534 17:38:29.036774 Initializing CPU #1
535 17:38:29.036876 Initializing CPU #5
536 17:38:29.039882 Initializing CPU #4
537 17:38:29.043697 CPU: vendor Intel device 806c1
538 17:38:29.046762 CPU: family 06, model 8c, stepping 01
539 17:38:29.049803 CPU: vendor Intel device 806c1
540 17:38:29.053596 CPU: family 06, model 8c, stepping 01
541 17:38:29.056757 Clearing out pending MCEs
542 17:38:29.060028 Clearing out pending MCEs
543 17:38:29.063482 Setting up local APIC...
544 17:38:29.063576 Setting up local APIC...
545 17:38:29.066725 apic_id: 0x02 done.
546 17:38:29.069983 Setting up local APIC...
547 17:38:29.070077 apic_id: 0x05 done.
548 17:38:29.073103 apic_id: 0x04 done.
549 17:38:29.076796 microcode: Update skipped, already up-to-date
550 17:38:29.083291 microcode: Update skipped, already up-to-date
551 17:38:29.083389 CPU #3 initialized
552 17:38:29.086542 CPU #7 initialized
553 17:38:29.089755 CPU: vendor Intel device 806c1
554 17:38:29.093106 CPU: family 06, model 8c, stepping 01
555 17:38:29.096421 apic_id: 0x03 done.
556 17:38:29.099834 microcode: Update skipped, already up-to-date
557 17:38:29.106403 microcode: Update skipped, already up-to-date
558 17:38:29.106498 CPU #6 initialized
559 17:38:29.109640 CPU #2 initialized
560 17:38:29.109734 Clearing out pending MCEs
561 17:38:29.112755 Setting up local APIC...
562 17:38:29.116563 Setting up local APIC...
563 17:38:29.119643 apic_id: 0x07 done.
564 17:38:29.119737 apic_id: 0x06 done.
565 17:38:29.126310 microcode: Update skipped, already up-to-date
566 17:38:29.129459 microcode: Update skipped, already up-to-date
567 17:38:29.133111 CPU #4 initialized
568 17:38:29.133236 CPU #5 initialized
569 17:38:29.136735 apic_id: 0x01 done.
570 17:38:29.139588 microcode: Update skipped, already up-to-date
571 17:38:29.143441 CPU #1 initialized
572 17:38:29.146455 bsp_do_flight_plan done after 457 msecs.
573 17:38:29.149632 CPU: frequency set to 4000 MHz
574 17:38:29.152914 Enabling SMIs.
575 17:38:29.159789 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 319 ms
576 17:38:29.173946 SATAXPCIE1 indicates PCIe NVMe is present
577 17:38:29.177124 Probing TPM: done!
578 17:38:29.180980 Connected to device vid:did:rid of 1ae0:0028:00
579 17:38:29.191200 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
580 17:38:29.194306 Initialized TPM device CR50 revision 0
581 17:38:29.198191 Enabling S0i3.4
582 17:38:29.204881 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
583 17:38:29.208104 Found a VBT of 8704 bytes after decompression
584 17:38:29.214360 cse_lite: CSE RO boot. HybridStorageMode disabled
585 17:38:29.221490 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
586 17:38:29.296888 FSPS returned 0
587 17:38:29.300065 Executing Phase 1 of FspMultiPhaseSiInit
588 17:38:29.309955 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
589 17:38:29.313304 port C0 DISC req: usage 1 usb3 1 usb2 5
590 17:38:29.316448 Raw Buffer output 0 00000511
591 17:38:29.319846 Raw Buffer output 1 00000000
592 17:38:29.323583 pmc_send_ipc_cmd succeeded
593 17:38:29.330740 port C1 DISC req: usage 1 usb3 2 usb2 3
594 17:38:29.330875 Raw Buffer output 0 00000321
595 17:38:29.333745 Raw Buffer output 1 00000000
596 17:38:29.337508 pmc_send_ipc_cmd succeeded
597 17:38:29.343049 Detected 4 core, 8 thread CPU.
598 17:38:29.346331 Detected 4 core, 8 thread CPU.
599 17:38:29.581202 Display FSP Version Info HOB
600 17:38:29.583587 Reference Code - CPU = a.0.4c.31
601 17:38:29.587117 uCode Version = 0.0.0.86
602 17:38:29.590332 TXT ACM version = ff.ff.ff.ffff
603 17:38:29.593734 Reference Code - ME = a.0.4c.31
604 17:38:29.597044 MEBx version = 0.0.0.0
605 17:38:29.600305 ME Firmware Version = Consumer SKU
606 17:38:29.603580 Reference Code - PCH = a.0.4c.31
607 17:38:29.606826 PCH-CRID Status = Disabled
608 17:38:29.610834 PCH-CRID Original Value = ff.ff.ff.ffff
609 17:38:29.613887 PCH-CRID New Value = ff.ff.ff.ffff
610 17:38:29.617013 OPROM - RST - RAID = ff.ff.ff.ffff
611 17:38:29.620392 PCH Hsio Version = 4.0.0.0
612 17:38:29.623471 Reference Code - SA - System Agent = a.0.4c.31
613 17:38:29.627003 Reference Code - MRC = 2.0.0.1
614 17:38:29.630517 SA - PCIe Version = a.0.4c.31
615 17:38:29.633911 SA-CRID Status = Disabled
616 17:38:29.637196 SA-CRID Original Value = 0.0.0.1
617 17:38:29.640486 SA-CRID New Value = 0.0.0.1
618 17:38:29.643813 OPROM - VBIOS = ff.ff.ff.ffff
619 17:38:29.647078 IO Manageability Engine FW Version = 11.1.4.0
620 17:38:29.650134 PHY Build Version = 0.0.0.e0
621 17:38:29.653334 Thunderbolt(TM) FW Version = 0.0.0.0
622 17:38:29.660363 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
623 17:38:29.663772 ITSS IRQ Polarities Before:
624 17:38:29.663894 IPC0: 0xffffffff
625 17:38:29.666814 IPC1: 0xffffffff
626 17:38:29.666902 IPC2: 0xffffffff
627 17:38:29.670097 IPC3: 0xffffffff
628 17:38:29.673980 ITSS IRQ Polarities After:
629 17:38:29.674067 IPC0: 0xffffffff
630 17:38:29.676966 IPC1: 0xffffffff
631 17:38:29.677057 IPC2: 0xffffffff
632 17:38:29.680094 IPC3: 0xffffffff
633 17:38:29.683305 Found PCIe Root Port #9 at PCI: 00:1d.0.
634 17:38:29.696801 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
635 17:38:29.706607 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
636 17:38:29.720390 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
637 17:38:29.726442 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
638 17:38:29.726564 Enumerating buses...
639 17:38:29.733438 Show all devs... Before device enumeration.
640 17:38:29.733568 Root Device: enabled 1
641 17:38:29.736575 DOMAIN: 0000: enabled 1
642 17:38:29.739696 CPU_CLUSTER: 0: enabled 1
643 17:38:29.743201 PCI: 00:00.0: enabled 1
644 17:38:29.743303 PCI: 00:02.0: enabled 1
645 17:38:29.746787 PCI: 00:04.0: enabled 1
646 17:38:29.750062 PCI: 00:05.0: enabled 1
647 17:38:29.753410 PCI: 00:06.0: enabled 0
648 17:38:29.753570 PCI: 00:07.0: enabled 0
649 17:38:29.756371 PCI: 00:07.1: enabled 0
650 17:38:29.759818 PCI: 00:07.2: enabled 0
651 17:38:29.763629 PCI: 00:07.3: enabled 0
652 17:38:29.763764 PCI: 00:08.0: enabled 1
653 17:38:29.766930 PCI: 00:09.0: enabled 0
654 17:38:29.770136 PCI: 00:0a.0: enabled 0
655 17:38:29.773349 PCI: 00:0d.0: enabled 1
656 17:38:29.773478 PCI: 00:0d.1: enabled 0
657 17:38:29.776529 PCI: 00:0d.2: enabled 0
658 17:38:29.780314 PCI: 00:0d.3: enabled 0
659 17:38:29.780410 PCI: 00:0e.0: enabled 0
660 17:38:29.783372 PCI: 00:10.2: enabled 1
661 17:38:29.786648 PCI: 00:10.6: enabled 0
662 17:38:29.789922 PCI: 00:10.7: enabled 0
663 17:38:29.790041 PCI: 00:12.0: enabled 0
664 17:38:29.793024 PCI: 00:12.6: enabled 0
665 17:38:29.796749 PCI: 00:13.0: enabled 0
666 17:38:29.799759 PCI: 00:14.0: enabled 1
667 17:38:29.799874 PCI: 00:14.1: enabled 0
668 17:38:29.803106 PCI: 00:14.2: enabled 1
669 17:38:29.806479 PCI: 00:14.3: enabled 1
670 17:38:29.809806 PCI: 00:15.0: enabled 1
671 17:38:29.809896 PCI: 00:15.1: enabled 1
672 17:38:29.813150 PCI: 00:15.2: enabled 1
673 17:38:29.816422 PCI: 00:15.3: enabled 1
674 17:38:29.819620 PCI: 00:16.0: enabled 1
675 17:38:29.819744 PCI: 00:16.1: enabled 0
676 17:38:29.822739 PCI: 00:16.2: enabled 0
677 17:38:29.826618 PCI: 00:16.3: enabled 0
678 17:38:29.826718 PCI: 00:16.4: enabled 0
679 17:38:29.829725 PCI: 00:16.5: enabled 0
680 17:38:29.832710 PCI: 00:17.0: enabled 1
681 17:38:29.836395 PCI: 00:19.0: enabled 0
682 17:38:29.836522 PCI: 00:19.1: enabled 1
683 17:38:29.839700 PCI: 00:19.2: enabled 0
684 17:38:29.842868 PCI: 00:1c.0: enabled 1
685 17:38:29.846055 PCI: 00:1c.1: enabled 0
686 17:38:29.846151 PCI: 00:1c.2: enabled 0
687 17:38:29.849724 PCI: 00:1c.3: enabled 0
688 17:38:29.852728 PCI: 00:1c.4: enabled 0
689 17:38:29.856449 PCI: 00:1c.5: enabled 0
690 17:38:29.856566 PCI: 00:1c.6: enabled 1
691 17:38:29.859542 PCI: 00:1c.7: enabled 0
692 17:38:29.862662 PCI: 00:1d.0: enabled 1
693 17:38:29.865920 PCI: 00:1d.1: enabled 0
694 17:38:29.866015 PCI: 00:1d.2: enabled 1
695 17:38:29.869722 PCI: 00:1d.3: enabled 0
696 17:38:29.873052 PCI: 00:1e.0: enabled 1
697 17:38:29.873150 PCI: 00:1e.1: enabled 0
698 17:38:29.875682 PCI: 00:1e.2: enabled 1
699 17:38:29.879551 PCI: 00:1e.3: enabled 1
700 17:38:29.882835 PCI: 00:1f.0: enabled 1
701 17:38:29.882932 PCI: 00:1f.1: enabled 0
702 17:38:29.885803 PCI: 00:1f.2: enabled 1
703 17:38:29.889561 PCI: 00:1f.3: enabled 1
704 17:38:29.892612 PCI: 00:1f.4: enabled 0
705 17:38:29.892743 PCI: 00:1f.5: enabled 1
706 17:38:29.895951 PCI: 00:1f.6: enabled 0
707 17:38:29.899250 PCI: 00:1f.7: enabled 0
708 17:38:29.899357 APIC: 00: enabled 1
709 17:38:29.902443 GENERIC: 0.0: enabled 1
710 17:38:29.905685 GENERIC: 0.0: enabled 1
711 17:38:29.909442 GENERIC: 1.0: enabled 1
712 17:38:29.909538 GENERIC: 0.0: enabled 1
713 17:38:29.912727 GENERIC: 1.0: enabled 1
714 17:38:29.915959 USB0 port 0: enabled 1
715 17:38:29.919148 GENERIC: 0.0: enabled 1
716 17:38:29.919247 USB0 port 0: enabled 1
717 17:38:29.922344 GENERIC: 0.0: enabled 1
718 17:38:29.925616 I2C: 00:1a: enabled 1
719 17:38:29.925744 I2C: 00:31: enabled 1
720 17:38:29.929390 I2C: 00:32: enabled 1
721 17:38:29.932900 I2C: 00:10: enabled 1
722 17:38:29.932998 I2C: 00:15: enabled 1
723 17:38:29.935974 GENERIC: 0.0: enabled 0
724 17:38:29.938989 GENERIC: 1.0: enabled 0
725 17:38:29.942687 GENERIC: 0.0: enabled 1
726 17:38:29.942793 SPI: 00: enabled 1
727 17:38:29.945813 SPI: 00: enabled 1
728 17:38:29.949163 PNP: 0c09.0: enabled 1
729 17:38:29.949292 GENERIC: 0.0: enabled 1
730 17:38:29.952397 USB3 port 0: enabled 1
731 17:38:29.955490 USB3 port 1: enabled 1
732 17:38:29.955629 USB3 port 2: enabled 0
733 17:38:29.959036 USB3 port 3: enabled 0
734 17:38:29.962794 USB2 port 0: enabled 0
735 17:38:29.962974 USB2 port 1: enabled 1
736 17:38:29.965854 USB2 port 2: enabled 1
737 17:38:29.969093 USB2 port 3: enabled 0
738 17:38:29.972448 USB2 port 4: enabled 1
739 17:38:29.972548 USB2 port 5: enabled 0
740 17:38:29.975801 USB2 port 6: enabled 0
741 17:38:29.979107 USB2 port 7: enabled 0
742 17:38:29.979208 USB2 port 8: enabled 0
743 17:38:29.982259 USB2 port 9: enabled 0
744 17:38:29.985569 USB3 port 0: enabled 0
745 17:38:29.988743 USB3 port 1: enabled 1
746 17:38:29.988852 USB3 port 2: enabled 0
747 17:38:29.992579 USB3 port 3: enabled 0
748 17:38:29.995438 GENERIC: 0.0: enabled 1
749 17:38:29.995537 GENERIC: 1.0: enabled 1
750 17:38:29.999117 APIC: 01: enabled 1
751 17:38:30.002259 APIC: 03: enabled 1
752 17:38:30.002415 APIC: 05: enabled 1
753 17:38:30.005514 APIC: 07: enabled 1
754 17:38:30.005609 APIC: 06: enabled 1
755 17:38:30.008971 APIC: 02: enabled 1
756 17:38:30.012207 APIC: 04: enabled 1
757 17:38:30.012302 Compare with tree...
758 17:38:30.015402 Root Device: enabled 1
759 17:38:30.019077 DOMAIN: 0000: enabled 1
760 17:38:30.021972 PCI: 00:00.0: enabled 1
761 17:38:30.022067 PCI: 00:02.0: enabled 1
762 17:38:30.025543 PCI: 00:04.0: enabled 1
763 17:38:30.029023 GENERIC: 0.0: enabled 1
764 17:38:30.032464 PCI: 00:05.0: enabled 1
765 17:38:30.035602 PCI: 00:06.0: enabled 0
766 17:38:30.035690 PCI: 00:07.0: enabled 0
767 17:38:30.038887 GENERIC: 0.0: enabled 1
768 17:38:30.042000 PCI: 00:07.1: enabled 0
769 17:38:30.045785 GENERIC: 1.0: enabled 1
770 17:38:30.048752 PCI: 00:07.2: enabled 0
771 17:38:30.048868 GENERIC: 0.0: enabled 1
772 17:38:30.052396 PCI: 00:07.3: enabled 0
773 17:38:30.055713 GENERIC: 1.0: enabled 1
774 17:38:30.058786 PCI: 00:08.0: enabled 1
775 17:38:30.062425 PCI: 00:09.0: enabled 0
776 17:38:30.062513 PCI: 00:0a.0: enabled 0
777 17:38:30.065720 PCI: 00:0d.0: enabled 1
778 17:38:30.068861 USB0 port 0: enabled 1
779 17:38:30.071980 USB3 port 0: enabled 1
780 17:38:30.075574 USB3 port 1: enabled 1
781 17:38:30.078665 USB3 port 2: enabled 0
782 17:38:30.078769 USB3 port 3: enabled 0
783 17:38:30.081996 PCI: 00:0d.1: enabled 0
784 17:38:30.085245 PCI: 00:0d.2: enabled 0
785 17:38:30.089014 GENERIC: 0.0: enabled 1
786 17:38:30.092267 PCI: 00:0d.3: enabled 0
787 17:38:30.092353 PCI: 00:0e.0: enabled 0
788 17:38:30.095452 PCI: 00:10.2: enabled 1
789 17:38:30.098652 PCI: 00:10.6: enabled 0
790 17:38:30.101765 PCI: 00:10.7: enabled 0
791 17:38:30.105623 PCI: 00:12.0: enabled 0
792 17:38:30.105721 PCI: 00:12.6: enabled 0
793 17:38:30.108580 PCI: 00:13.0: enabled 0
794 17:38:30.111924 PCI: 00:14.0: enabled 1
795 17:38:30.115270 USB0 port 0: enabled 1
796 17:38:30.118574 USB2 port 0: enabled 0
797 17:38:30.118687 USB2 port 1: enabled 1
798 17:38:30.121942 USB2 port 2: enabled 1
799 17:38:30.125594 USB2 port 3: enabled 0
800 17:38:30.128830 USB2 port 4: enabled 1
801 17:38:30.132099 USB2 port 5: enabled 0
802 17:38:30.132214 USB2 port 6: enabled 0
803 17:38:30.135104 USB2 port 7: enabled 0
804 17:38:30.138466 USB2 port 8: enabled 0
805 17:38:30.142068 USB2 port 9: enabled 0
806 17:38:30.144945 USB3 port 0: enabled 0
807 17:38:30.148561 USB3 port 1: enabled 1
808 17:38:30.148682 USB3 port 2: enabled 0
809 17:38:30.152132 USB3 port 3: enabled 0
810 17:38:30.154978 PCI: 00:14.1: enabled 0
811 17:38:30.158594 PCI: 00:14.2: enabled 1
812 17:38:30.161530 PCI: 00:14.3: enabled 1
813 17:38:30.161617 GENERIC: 0.0: enabled 1
814 17:38:30.165386 PCI: 00:15.0: enabled 1
815 17:38:30.168463 I2C: 00:1a: enabled 1
816 17:38:30.171695 I2C: 00:31: enabled 1
817 17:38:30.174994 I2C: 00:32: enabled 1
818 17:38:30.175087 PCI: 00:15.1: enabled 1
819 17:38:30.178857 I2C: 00:10: enabled 1
820 17:38:30.181935 PCI: 00:15.2: enabled 1
821 17:38:30.185126 PCI: 00:15.3: enabled 1
822 17:38:30.185239 PCI: 00:16.0: enabled 1
823 17:38:30.188364 PCI: 00:16.1: enabled 0
824 17:38:30.191536 PCI: 00:16.2: enabled 0
825 17:38:30.195428 PCI: 00:16.3: enabled 0
826 17:38:30.198674 PCI: 00:16.4: enabled 0
827 17:38:30.198768 PCI: 00:16.5: enabled 0
828 17:38:30.202021 PCI: 00:17.0: enabled 1
829 17:38:30.205280 PCI: 00:19.0: enabled 0
830 17:38:30.208351 PCI: 00:19.1: enabled 1
831 17:38:30.212202 I2C: 00:15: enabled 1
832 17:38:30.212292 PCI: 00:19.2: enabled 0
833 17:38:30.215105 PCI: 00:1d.0: enabled 1
834 17:38:30.218991 GENERIC: 0.0: enabled 1
835 17:38:30.222369 PCI: 00:1e.0: enabled 1
836 17:38:30.222456 PCI: 00:1e.1: enabled 0
837 17:38:30.272644 PCI: 00:1e.2: enabled 1
838 17:38:30.272840 SPI: 00: enabled 1
839 17:38:30.273173 PCI: 00:1e.3: enabled 1
840 17:38:30.273281 SPI: 00: enabled 1
841 17:38:30.273357 PCI: 00:1f.0: enabled 1
842 17:38:30.273710 PNP: 0c09.0: enabled 1
843 17:38:30.273812 PCI: 00:1f.1: enabled 0
844 17:38:30.274122 PCI: 00:1f.2: enabled 1
845 17:38:30.274239 GENERIC: 0.0: enabled 1
846 17:38:30.274343 GENERIC: 0.0: enabled 1
847 17:38:30.274445 GENERIC: 1.0: enabled 1
848 17:38:30.274553 PCI: 00:1f.3: enabled 1
849 17:38:30.274655 PCI: 00:1f.4: enabled 0
850 17:38:30.274745 PCI: 00:1f.5: enabled 1
851 17:38:30.274824 PCI: 00:1f.6: enabled 0
852 17:38:30.274891 PCI: 00:1f.7: enabled 0
853 17:38:30.274954 CPU_CLUSTER: 0: enabled 1
854 17:38:30.275017 APIC: 00: enabled 1
855 17:38:30.275080 APIC: 01: enabled 1
856 17:38:30.304812 APIC: 03: enabled 1
857 17:38:30.304954 APIC: 05: enabled 1
858 17:38:30.305030 APIC: 07: enabled 1
859 17:38:30.305295 APIC: 06: enabled 1
860 17:38:30.305370 APIC: 02: enabled 1
861 17:38:30.305439 APIC: 04: enabled 1
862 17:38:30.305505 Root Device scanning...
863 17:38:30.305572 scan_static_bus for Root Device
864 17:38:30.305649 DOMAIN: 0000 enabled
865 17:38:30.305716 CPU_CLUSTER: 0 enabled
866 17:38:30.305780 DOMAIN: 0000 scanning...
867 17:38:30.308734 PCI: pci_scan_bus for bus 00
868 17:38:30.308854 PCI: 00:00.0 [8086/0000] ops
869 17:38:30.311988 PCI: 00:00.0 [8086/9a12] enabled
870 17:38:30.312100 PCI: 00:02.0 [8086/0000] bus ops
871 17:38:30.315239 PCI: 00:02.0 [8086/9a40] enabled
872 17:38:30.318350 PCI: 00:04.0 [8086/0000] bus ops
873 17:38:30.321627 PCI: 00:04.0 [8086/9a03] enabled
874 17:38:30.325290 PCI: 00:05.0 [8086/9a19] enabled
875 17:38:30.328517 PCI: 00:07.0 [0000/0000] hidden
876 17:38:30.331709 PCI: 00:08.0 [8086/9a11] enabled
877 17:38:30.335051 PCI: 00:0a.0 [8086/9a0d] disabled
878 17:38:30.338240 PCI: 00:0d.0 [8086/0000] bus ops
879 17:38:30.342007 PCI: 00:0d.0 [8086/9a13] enabled
880 17:38:30.345185 PCI: 00:14.0 [8086/0000] bus ops
881 17:38:30.348305 PCI: 00:14.0 [8086/a0ed] enabled
882 17:38:30.351549 PCI: 00:14.2 [8086/a0ef] enabled
883 17:38:30.355390 PCI: 00:14.3 [8086/0000] bus ops
884 17:38:30.358617 PCI: 00:14.3 [8086/a0f0] enabled
885 17:38:30.361752 PCI: 00:15.0 [8086/0000] bus ops
886 17:38:30.364791 PCI: 00:15.0 [8086/a0e8] enabled
887 17:38:30.368599 PCI: 00:15.1 [8086/0000] bus ops
888 17:38:30.371715 PCI: 00:15.1 [8086/a0e9] enabled
889 17:38:30.374962 PCI: 00:15.2 [8086/0000] bus ops
890 17:38:30.378644 PCI: 00:15.2 [8086/a0ea] enabled
891 17:38:30.381647 PCI: 00:15.3 [8086/0000] bus ops
892 17:38:30.385034 PCI: 00:15.3 [8086/a0eb] enabled
893 17:38:30.388416 PCI: 00:16.0 [8086/0000] ops
894 17:38:30.391904 PCI: 00:16.0 [8086/a0e0] enabled
895 17:38:30.398410 PCI: Static device PCI: 00:17.0 not found, disabling it.
896 17:38:30.401663 PCI: 00:19.0 [8086/0000] bus ops
897 17:38:30.405040 PCI: 00:19.0 [8086/a0c5] disabled
898 17:38:30.408318 PCI: 00:19.1 [8086/0000] bus ops
899 17:38:30.411523 PCI: 00:19.1 [8086/a0c6] enabled
900 17:38:30.415428 PCI: 00:1d.0 [8086/0000] bus ops
901 17:38:30.418504 PCI: 00:1d.0 [8086/a0b0] enabled
902 17:38:30.421778 PCI: 00:1e.0 [8086/0000] ops
903 17:38:30.425059 PCI: 00:1e.0 [8086/a0a8] enabled
904 17:38:30.428397 PCI: 00:1e.2 [8086/0000] bus ops
905 17:38:30.431473 PCI: 00:1e.2 [8086/a0aa] enabled
906 17:38:30.435249 PCI: 00:1e.3 [8086/0000] bus ops
907 17:38:30.438587 PCI: 00:1e.3 [8086/a0ab] enabled
908 17:38:30.441831 PCI: 00:1f.0 [8086/0000] bus ops
909 17:38:30.445133 PCI: 00:1f.0 [8086/a087] enabled
910 17:38:30.445235 RTC Init
911 17:38:30.448276 Set power on after power failure.
912 17:38:30.451428 Disabling Deep S3
913 17:38:30.454776 Disabling Deep S3
914 17:38:30.454909 Disabling Deep S4
915 17:38:30.458049 Disabling Deep S4
916 17:38:30.458135 Disabling Deep S5
917 17:38:30.461802 Disabling Deep S5
918 17:38:30.464913 PCI: 00:1f.2 [0000/0000] hidden
919 17:38:30.468156 PCI: 00:1f.3 [8086/0000] bus ops
920 17:38:30.471389 PCI: 00:1f.3 [8086/a0c8] enabled
921 17:38:30.475215 PCI: 00:1f.5 [8086/0000] bus ops
922 17:38:30.478378 PCI: 00:1f.5 [8086/a0a4] enabled
923 17:38:30.481651 PCI: Leftover static devices:
924 17:38:30.481744 PCI: 00:10.2
925 17:38:30.484824 PCI: 00:10.6
926 17:38:30.484916 PCI: 00:10.7
927 17:38:30.484990 PCI: 00:06.0
928 17:38:30.488502 PCI: 00:07.1
929 17:38:30.488618 PCI: 00:07.2
930 17:38:30.491598 PCI: 00:07.3
931 17:38:30.491699 PCI: 00:09.0
932 17:38:30.491777 PCI: 00:0d.1
933 17:38:30.494606 PCI: 00:0d.2
934 17:38:30.494699 PCI: 00:0d.3
935 17:38:30.498461 PCI: 00:0e.0
936 17:38:30.498557 PCI: 00:12.0
937 17:38:30.498649 PCI: 00:12.6
938 17:38:30.501527 PCI: 00:13.0
939 17:38:30.501617 PCI: 00:14.1
940 17:38:30.504911 PCI: 00:16.1
941 17:38:30.504997 PCI: 00:16.2
942 17:38:30.508723 PCI: 00:16.3
943 17:38:30.508856 PCI: 00:16.4
944 17:38:30.508929 PCI: 00:16.5
945 17:38:30.511604 PCI: 00:17.0
946 17:38:30.511697 PCI: 00:19.2
947 17:38:30.514907 PCI: 00:1e.1
948 17:38:30.515004 PCI: 00:1f.1
949 17:38:30.515077 PCI: 00:1f.4
950 17:38:30.518309 PCI: 00:1f.6
951 17:38:30.518451 PCI: 00:1f.7
952 17:38:30.521392 PCI: Check your devicetree.cb.
953 17:38:30.525379 PCI: 00:02.0 scanning...
954 17:38:30.528506 scan_generic_bus for PCI: 00:02.0
955 17:38:30.531787 scan_generic_bus for PCI: 00:02.0 done
956 17:38:30.538126 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
957 17:38:30.538229 PCI: 00:04.0 scanning...
958 17:38:30.545021 scan_generic_bus for PCI: 00:04.0
959 17:38:30.545127 GENERIC: 0.0 enabled
960 17:38:30.551687 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
961 17:38:30.554726 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
962 17:38:30.558015 PCI: 00:0d.0 scanning...
963 17:38:30.561808 scan_static_bus for PCI: 00:0d.0
964 17:38:30.565127 USB0 port 0 enabled
965 17:38:30.568254 USB0 port 0 scanning...
966 17:38:30.571436 scan_static_bus for USB0 port 0
967 17:38:30.571528 USB3 port 0 enabled
968 17:38:30.575200 USB3 port 1 enabled
969 17:38:30.578498 USB3 port 2 disabled
970 17:38:30.578590 USB3 port 3 disabled
971 17:38:30.581632 USB3 port 0 scanning...
972 17:38:30.584795 scan_static_bus for USB3 port 0
973 17:38:30.588113 scan_static_bus for USB3 port 0 done
974 17:38:30.591329 scan_bus: bus USB3 port 0 finished in 6 msecs
975 17:38:30.594967 USB3 port 1 scanning...
976 17:38:30.598488 scan_static_bus for USB3 port 1
977 17:38:30.601800 scan_static_bus for USB3 port 1 done
978 17:38:30.608247 scan_bus: bus USB3 port 1 finished in 6 msecs
979 17:38:30.611541 scan_static_bus for USB0 port 0 done
980 17:38:30.614786 scan_bus: bus USB0 port 0 finished in 43 msecs
981 17:38:30.617999 scan_static_bus for PCI: 00:0d.0 done
982 17:38:30.624714 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
983 17:38:30.628195 PCI: 00:14.0 scanning...
984 17:38:30.631173 scan_static_bus for PCI: 00:14.0
985 17:38:30.631261 USB0 port 0 enabled
986 17:38:30.634360 USB0 port 0 scanning...
987 17:38:30.637720 scan_static_bus for USB0 port 0
988 17:38:30.641594 USB2 port 0 disabled
989 17:38:30.641681 USB2 port 1 enabled
990 17:38:30.644737 USB2 port 2 enabled
991 17:38:30.647712 USB2 port 3 disabled
992 17:38:30.647809 USB2 port 4 enabled
993 17:38:30.651267 USB2 port 5 disabled
994 17:38:30.654579 USB2 port 6 disabled
995 17:38:30.654705 USB2 port 7 disabled
996 17:38:30.657685 USB2 port 8 disabled
997 17:38:30.657789 USB2 port 9 disabled
998 17:38:30.661424 USB3 port 0 disabled
999 17:38:30.664527 USB3 port 1 enabled
1000 17:38:30.664650 USB3 port 2 disabled
1001 17:38:30.667659 USB3 port 3 disabled
1002 17:38:30.671420 USB2 port 1 scanning...
1003 17:38:30.674552 scan_static_bus for USB2 port 1
1004 17:38:30.677873 scan_static_bus for USB2 port 1 done
1005 17:38:30.681206 scan_bus: bus USB2 port 1 finished in 6 msecs
1006 17:38:30.684253 USB2 port 2 scanning...
1007 17:38:30.688057 scan_static_bus for USB2 port 2
1008 17:38:30.691389 scan_static_bus for USB2 port 2 done
1009 17:38:30.697907 scan_bus: bus USB2 port 2 finished in 6 msecs
1010 17:38:30.698001 USB2 port 4 scanning...
1011 17:38:30.701058 scan_static_bus for USB2 port 4
1012 17:38:30.704675 scan_static_bus for USB2 port 4 done
1013 17:38:30.711158 scan_bus: bus USB2 port 4 finished in 6 msecs
1014 17:38:30.714440 USB3 port 1 scanning...
1015 17:38:30.717541 scan_static_bus for USB3 port 1
1016 17:38:30.721329 scan_static_bus for USB3 port 1 done
1017 17:38:30.724558 scan_bus: bus USB3 port 1 finished in 6 msecs
1018 17:38:30.727835 scan_static_bus for USB0 port 0 done
1019 17:38:30.734612 scan_bus: bus USB0 port 0 finished in 93 msecs
1020 17:38:30.737518 scan_static_bus for PCI: 00:14.0 done
1021 17:38:30.741234 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1022 17:38:30.744436 PCI: 00:14.3 scanning...
1023 17:38:30.747637 scan_static_bus for PCI: 00:14.3
1024 17:38:30.750942 GENERIC: 0.0 enabled
1025 17:38:30.754172 scan_static_bus for PCI: 00:14.3 done
1026 17:38:30.757742 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1027 17:38:30.760754 PCI: 00:15.0 scanning...
1028 17:38:30.764545 scan_static_bus for PCI: 00:15.0
1029 17:38:30.767576 I2C: 00:1a enabled
1030 17:38:30.767663 I2C: 00:31 enabled
1031 17:38:30.770856 I2C: 00:32 enabled
1032 17:38:30.774081 scan_static_bus for PCI: 00:15.0 done
1033 17:38:30.777717 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1034 17:38:30.780860 PCI: 00:15.1 scanning...
1035 17:38:30.784019 scan_static_bus for PCI: 00:15.1
1036 17:38:30.787794 I2C: 00:10 enabled
1037 17:38:30.790894 scan_static_bus for PCI: 00:15.1 done
1038 17:38:30.794302 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1039 17:38:30.797493 PCI: 00:15.2 scanning...
1040 17:38:30.801368 scan_static_bus for PCI: 00:15.2
1041 17:38:30.804581 scan_static_bus for PCI: 00:15.2 done
1042 17:38:30.811069 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1043 17:38:30.811191 PCI: 00:15.3 scanning...
1044 17:38:30.814902 scan_static_bus for PCI: 00:15.3
1045 17:38:30.821327 scan_static_bus for PCI: 00:15.3 done
1046 17:38:30.825036 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1047 17:38:30.828231 PCI: 00:19.1 scanning...
1048 17:38:30.831495 scan_static_bus for PCI: 00:19.1
1049 17:38:30.831587 I2C: 00:15 enabled
1050 17:38:30.837961 scan_static_bus for PCI: 00:19.1 done
1051 17:38:30.841014 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1052 17:38:30.844823 PCI: 00:1d.0 scanning...
1053 17:38:30.848053 do_pci_scan_bridge for PCI: 00:1d.0
1054 17:38:30.851336 PCI: pci_scan_bus for bus 01
1055 17:38:30.854550 PCI: 01:00.0 [1c5c/174a] enabled
1056 17:38:30.857804 GENERIC: 0.0 enabled
1057 17:38:30.861000 Enabling Common Clock Configuration
1058 17:38:30.864835 L1 Sub-State supported from root port 29
1059 17:38:30.867783 L1 Sub-State Support = 0xf
1060 17:38:30.871285 CommonModeRestoreTime = 0x28
1061 17:38:30.874770 Power On Value = 0x16, Power On Scale = 0x0
1062 17:38:30.874862 ASPM: Enabled L1
1063 17:38:30.880997 PCIe: Max_Payload_Size adjusted to 128
1064 17:38:30.884765 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1065 17:38:30.888012 PCI: 00:1e.2 scanning...
1066 17:38:30.891251 scan_generic_bus for PCI: 00:1e.2
1067 17:38:30.891374 SPI: 00 enabled
1068 17:38:30.897700 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1069 17:38:30.904763 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1070 17:38:30.904876 PCI: 00:1e.3 scanning...
1071 17:38:30.911160 scan_generic_bus for PCI: 00:1e.3
1072 17:38:30.911246 SPI: 00 enabled
1073 17:38:30.917808 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1074 17:38:30.921661 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1075 17:38:30.924719 PCI: 00:1f.0 scanning...
1076 17:38:30.927831 scan_static_bus for PCI: 00:1f.0
1077 17:38:30.931643 PNP: 0c09.0 enabled
1078 17:38:30.931764 PNP: 0c09.0 scanning...
1079 17:38:30.934938 scan_static_bus for PNP: 0c09.0
1080 17:38:30.941450 scan_static_bus for PNP: 0c09.0 done
1081 17:38:30.944969 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1082 17:38:30.948092 scan_static_bus for PCI: 00:1f.0 done
1083 17:38:30.954525 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1084 17:38:30.954619 PCI: 00:1f.2 scanning...
1085 17:38:30.958288 scan_static_bus for PCI: 00:1f.2
1086 17:38:30.961483 GENERIC: 0.0 enabled
1087 17:38:30.964754 GENERIC: 0.0 scanning...
1088 17:38:30.968045 scan_static_bus for GENERIC: 0.0
1089 17:38:30.971338 GENERIC: 0.0 enabled
1090 17:38:30.971422 GENERIC: 1.0 enabled
1091 17:38:30.975161 scan_static_bus for GENERIC: 0.0 done
1092 17:38:30.981915 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1093 17:38:30.984334 scan_static_bus for PCI: 00:1f.2 done
1094 17:38:30.987828 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1095 17:38:30.991441 PCI: 00:1f.3 scanning...
1096 17:38:30.995008 scan_static_bus for PCI: 00:1f.3
1097 17:38:30.997963 scan_static_bus for PCI: 00:1f.3 done
1098 17:38:31.004377 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1099 17:38:31.004475 PCI: 00:1f.5 scanning...
1100 17:38:31.011676 scan_generic_bus for PCI: 00:1f.5
1101 17:38:31.014878 scan_generic_bus for PCI: 00:1f.5 done
1102 17:38:31.017994 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1103 17:38:31.024932 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1104 17:38:31.028104 scan_static_bus for Root Device done
1105 17:38:31.031635 scan_bus: bus Root Device finished in 737 msecs
1106 17:38:31.031729 done
1107 17:38:31.037968 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1108 17:38:31.041240 Chrome EC: UHEPI supported
1109 17:38:31.048170 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1110 17:38:31.055008 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1111 17:38:31.058351 SPI flash protection: WPSW=1 SRP0=0
1112 17:38:31.061597 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1113 17:38:31.068158 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1114 17:38:31.071420 found VGA at PCI: 00:02.0
1115 17:38:31.074816 Setting up VGA for PCI: 00:02.0
1116 17:38:31.078046 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1117 17:38:31.085092 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1118 17:38:31.088183 Allocating resources...
1119 17:38:31.088276 Reading resources...
1120 17:38:31.094899 Root Device read_resources bus 0 link: 0
1121 17:38:31.097828 DOMAIN: 0000 read_resources bus 0 link: 0
1122 17:38:31.101271 PCI: 00:04.0 read_resources bus 1 link: 0
1123 17:38:31.108049 PCI: 00:04.0 read_resources bus 1 link: 0 done
1124 17:38:31.111831 PCI: 00:0d.0 read_resources bus 0 link: 0
1125 17:38:31.118042 USB0 port 0 read_resources bus 0 link: 0
1126 17:38:31.121873 USB0 port 0 read_resources bus 0 link: 0 done
1127 17:38:31.128138 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1128 17:38:31.131811 PCI: 00:14.0 read_resources bus 0 link: 0
1129 17:38:31.134933 USB0 port 0 read_resources bus 0 link: 0
1130 17:38:31.142819 USB0 port 0 read_resources bus 0 link: 0 done
1131 17:38:31.146076 PCI: 00:14.0 read_resources bus 0 link: 0 done
1132 17:38:31.152712 PCI: 00:14.3 read_resources bus 0 link: 0
1133 17:38:31.156458 PCI: 00:14.3 read_resources bus 0 link: 0 done
1134 17:38:31.162483 PCI: 00:15.0 read_resources bus 0 link: 0
1135 17:38:31.166215 PCI: 00:15.0 read_resources bus 0 link: 0 done
1136 17:38:31.172616 PCI: 00:15.1 read_resources bus 0 link: 0
1137 17:38:31.175747 PCI: 00:15.1 read_resources bus 0 link: 0 done
1138 17:38:31.183153 PCI: 00:19.1 read_resources bus 0 link: 0
1139 17:38:31.186365 PCI: 00:19.1 read_resources bus 0 link: 0 done
1140 17:38:31.193270 PCI: 00:1d.0 read_resources bus 1 link: 0
1141 17:38:31.196483 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1142 17:38:31.202851 PCI: 00:1e.2 read_resources bus 2 link: 0
1143 17:38:31.206249 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1144 17:38:31.212946 PCI: 00:1e.3 read_resources bus 3 link: 0
1145 17:38:31.216727 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1146 17:38:31.223020 PCI: 00:1f.0 read_resources bus 0 link: 0
1147 17:38:31.226375 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1148 17:38:31.229506 PCI: 00:1f.2 read_resources bus 0 link: 0
1149 17:38:31.236508 GENERIC: 0.0 read_resources bus 0 link: 0
1150 17:38:31.239723 GENERIC: 0.0 read_resources bus 0 link: 0 done
1151 17:38:31.246429 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1152 17:38:31.253476 DOMAIN: 0000 read_resources bus 0 link: 0 done
1153 17:38:31.256642 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1154 17:38:31.259916 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1155 17:38:31.266729 Root Device read_resources bus 0 link: 0 done
1156 17:38:31.270021 Done reading resources.
1157 17:38:31.273104 Show resources in subtree (Root Device)...After reading.
1158 17:38:31.279741 Root Device child on link 0 DOMAIN: 0000
1159 17:38:31.283093 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1160 17:38:31.293536 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1161 17:38:31.302985 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1162 17:38:31.303085 PCI: 00:00.0
1163 17:38:31.313116 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1164 17:38:31.322820 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1165 17:38:31.332836 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1166 17:38:31.343224 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1167 17:38:31.350003 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1168 17:38:31.359749 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1169 17:38:31.369578 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1170 17:38:31.379499 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1171 17:38:31.389781 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1172 17:38:31.399436 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1173 17:38:31.405899 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1174 17:38:31.416242 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1175 17:38:31.426064 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1176 17:38:31.435953 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1177 17:38:31.445808 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1178 17:38:31.452282 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1179 17:38:31.465225 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1180 17:38:31.472316 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1181 17:38:31.481869 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1182 17:38:31.492171 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1183 17:38:31.495390 PCI: 00:02.0
1184 17:38:31.505111 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1185 17:38:31.515084 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1186 17:38:31.521499 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1187 17:38:31.528679 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1188 17:38:31.538710 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1189 17:38:31.538803 GENERIC: 0.0
1190 17:38:31.541934 PCI: 00:05.0
1191 17:38:31.551605 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1192 17:38:31.554444 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1193 17:38:31.558373 GENERIC: 0.0
1194 17:38:31.558462 PCI: 00:08.0
1195 17:38:31.567977 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 17:38:31.571227 PCI: 00:0a.0
1197 17:38:31.574470 PCI: 00:0d.0 child on link 0 USB0 port 0
1198 17:38:31.584729 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1199 17:38:31.591088 USB0 port 0 child on link 0 USB3 port 0
1200 17:38:31.591213 USB3 port 0
1201 17:38:31.594351 USB3 port 1
1202 17:38:31.594475 USB3 port 2
1203 17:38:31.597540 USB3 port 3
1204 17:38:31.601540 PCI: 00:14.0 child on link 0 USB0 port 0
1205 17:38:31.611342 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1206 17:38:31.614502 USB0 port 0 child on link 0 USB2 port 0
1207 17:38:31.617565 USB2 port 0
1208 17:38:31.617688 USB2 port 1
1209 17:38:31.621415 USB2 port 2
1210 17:38:31.621504 USB2 port 3
1211 17:38:31.624469 USB2 port 4
1212 17:38:31.624568 USB2 port 5
1213 17:38:31.627751 USB2 port 6
1214 17:38:31.630893 USB2 port 7
1215 17:38:31.630986 USB2 port 8
1216 17:38:31.634724 USB2 port 9
1217 17:38:31.634817 USB3 port 0
1218 17:38:31.637982 USB3 port 1
1219 17:38:31.638076 USB3 port 2
1220 17:38:31.640936 USB3 port 3
1221 17:38:31.641030 PCI: 00:14.2
1222 17:38:31.651228 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 17:38:31.661066 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1224 17:38:31.667474 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1225 17:38:31.677756 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 17:38:31.677865 GENERIC: 0.0
1227 17:38:31.681174 PCI: 00:15.0 child on link 0 I2C: 00:1a
1228 17:38:31.690903 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1229 17:38:31.693997 I2C: 00:1a
1230 17:38:31.694091 I2C: 00:31
1231 17:38:31.697870 I2C: 00:32
1232 17:38:31.700926 PCI: 00:15.1 child on link 0 I2C: 00:10
1233 17:38:31.710963 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 17:38:31.714412 I2C: 00:10
1235 17:38:31.714506 PCI: 00:15.2
1236 17:38:31.724204 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 17:38:31.727327 PCI: 00:15.3
1238 17:38:31.737013 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 17:38:31.737114 PCI: 00:16.0
1240 17:38:31.747338 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 17:38:31.750777 PCI: 00:19.0
1242 17:38:31.754015 PCI: 00:19.1 child on link 0 I2C: 00:15
1243 17:38:31.764181 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 17:38:31.764312 I2C: 00:15
1245 17:38:31.770305 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1246 17:38:31.777332 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1247 17:38:31.786888 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1248 17:38:31.797251 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1249 17:38:31.800373 GENERIC: 0.0
1250 17:38:31.800506 PCI: 01:00.0
1251 17:38:31.810644 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1252 17:38:31.820247 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1253 17:38:31.830234 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1254 17:38:31.830334 PCI: 00:1e.0
1255 17:38:31.843279 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1256 17:38:31.847018 PCI: 00:1e.2 child on link 0 SPI: 00
1257 17:38:31.857017 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 17:38:31.857117 SPI: 00
1259 17:38:31.860108 PCI: 00:1e.3 child on link 0 SPI: 00
1260 17:38:31.870401 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 17:38:31.873468 SPI: 00
1262 17:38:31.876693 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 17:38:31.886585 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 17:38:31.886684 PNP: 0c09.0
1265 17:38:31.896426 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 17:38:31.899968 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1267 17:38:31.910238 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 17:38:31.920209 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1269 17:38:31.923388 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1270 17:38:31.926689 GENERIC: 0.0
1271 17:38:31.926806 GENERIC: 1.0
1272 17:38:31.929889 PCI: 00:1f.3
1273 17:38:31.939884 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1274 17:38:31.950010 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1275 17:38:31.950110 PCI: 00:1f.5
1276 17:38:31.959945 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1277 17:38:31.963164 CPU_CLUSTER: 0 child on link 0 APIC: 00
1278 17:38:31.966457 APIC: 00
1279 17:38:31.966550 APIC: 01
1280 17:38:31.966624 APIC: 03
1281 17:38:31.969666 APIC: 05
1282 17:38:31.969759 APIC: 07
1283 17:38:31.972848 APIC: 06
1284 17:38:31.973000 APIC: 02
1285 17:38:31.973135 APIC: 04
1286 17:38:31.983091 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1287 17:38:31.986392 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1288 17:38:31.992979 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1289 17:38:31.999270 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1290 17:38:32.002966 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1291 17:38:32.009683 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1292 17:38:32.012872 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1293 17:38:32.019725 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1294 17:38:32.026505 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1295 17:38:32.036093 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1296 17:38:32.042763 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1297 17:38:32.049293 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1298 17:38:32.060774 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1299 17:38:32.062470 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1300 17:38:32.072679 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1301 17:38:32.072859 DOMAIN: 0000: Resource ranges:
1302 17:38:32.079284 * Base: 1000, Size: 800, Tag: 100
1303 17:38:32.082398 * Base: 1900, Size: e700, Tag: 100
1304 17:38:32.085535 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1305 17:38:32.092590 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1306 17:38:32.099113 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1307 17:38:32.108700 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1308 17:38:32.115127 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1309 17:38:32.122276 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1310 17:38:32.131856 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1311 17:38:32.138400 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1312 17:38:32.145270 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1313 17:38:32.154974 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1314 17:38:32.162130 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1315 17:38:32.168674 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1316 17:38:32.178494 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1317 17:38:32.184739 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1318 17:38:32.191810 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1319 17:38:32.201530 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1320 17:38:32.208067 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1321 17:38:32.214534 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1322 17:38:32.224645 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1323 17:38:32.230979 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1324 17:38:32.237970 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1325 17:38:32.247830 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1326 17:38:32.254516 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1327 17:38:32.261104 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1328 17:38:32.270821 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1329 17:38:32.274344 DOMAIN: 0000: Resource ranges:
1330 17:38:32.277668 * Base: 7fc00000, Size: 40400000, Tag: 200
1331 17:38:32.280688 * Base: d0000000, Size: 28000000, Tag: 200
1332 17:38:32.287451 * Base: fa000000, Size: 1000000, Tag: 200
1333 17:38:32.291109 * Base: fb001000, Size: 2fff000, Tag: 200
1334 17:38:32.294431 * Base: fe010000, Size: 2e000, Tag: 200
1335 17:38:32.297679 * Base: fe03f000, Size: d41000, Tag: 200
1336 17:38:32.304123 * Base: fed88000, Size: 8000, Tag: 200
1337 17:38:32.307379 * Base: fed93000, Size: d000, Tag: 200
1338 17:38:32.310640 * Base: feda2000, Size: 1e000, Tag: 200
1339 17:38:32.313904 * Base: fede0000, Size: 1220000, Tag: 200
1340 17:38:32.320898 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1341 17:38:32.327421 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1342 17:38:32.333772 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1343 17:38:32.340755 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1344 17:38:32.347299 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1345 17:38:32.353700 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1346 17:38:32.360765 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1347 17:38:32.366883 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1348 17:38:32.373693 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1349 17:38:32.380621 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1350 17:38:32.387230 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1351 17:38:32.393980 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1352 17:38:32.400192 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1353 17:38:32.406870 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1354 17:38:32.413432 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1355 17:38:32.420000 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1356 17:38:32.426701 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1357 17:38:32.433325 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1358 17:38:32.440286 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1359 17:38:32.447172 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1360 17:38:32.453561 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1361 17:38:32.460004 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1362 17:38:32.466426 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1363 17:38:32.473278 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1364 17:38:32.483262 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1365 17:38:32.483397 PCI: 00:1d.0: Resource ranges:
1366 17:38:32.490101 * Base: 7fc00000, Size: 100000, Tag: 200
1367 17:38:32.496317 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1368 17:38:32.503014 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1369 17:38:32.509862 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1370 17:38:32.516334 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1371 17:38:32.523492 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1372 17:38:32.529922 Root Device assign_resources, bus 0 link: 0
1373 17:38:32.533072 DOMAIN: 0000 assign_resources, bus 0 link: 0
1374 17:38:32.542925 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1375 17:38:32.549814 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1376 17:38:32.559768 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1377 17:38:32.566393 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1378 17:38:32.569651 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 17:38:32.576105 PCI: 00:04.0 assign_resources, bus 1 link: 0
1380 17:38:32.583036 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1381 17:38:32.592975 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1382 17:38:32.599588 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1383 17:38:32.605804 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 17:38:32.609480 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1385 17:38:32.619246 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1386 17:38:32.622729 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 17:38:32.625766 PCI: 00:14.0 assign_resources, bus 0 link: 0
1388 17:38:32.636108 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1389 17:38:32.642551 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1390 17:38:32.652849 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1391 17:38:32.656112 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 17:38:32.659369 PCI: 00:14.3 assign_resources, bus 0 link: 0
1393 17:38:32.669413 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1394 17:38:32.673158 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 17:38:32.679513 PCI: 00:15.0 assign_resources, bus 0 link: 0
1396 17:38:32.686456 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1397 17:38:32.689723 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 17:38:32.696273 PCI: 00:15.1 assign_resources, bus 0 link: 0
1399 17:38:32.703134 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1400 17:38:32.712729 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1401 17:38:32.719740 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1402 17:38:32.729286 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1403 17:38:32.732878 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 17:38:32.739474 PCI: 00:19.1 assign_resources, bus 0 link: 0
1405 17:38:32.745907 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1406 17:38:32.755914 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1407 17:38:32.766034 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1408 17:38:32.769088 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1409 17:38:32.778871 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1410 17:38:32.785409 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1411 17:38:32.791934 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1412 17:38:32.799010 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1413 17:38:32.805404 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1414 17:38:32.812341 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 17:38:32.815329 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1416 17:38:32.825137 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1417 17:38:32.828347 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 17:38:32.832082 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1419 17:38:32.838725 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 17:38:32.841761 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1421 17:38:32.848427 LPC: Trying to open IO window from 800 size 1ff
1422 17:38:32.855407 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1423 17:38:32.865433 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1424 17:38:32.872090 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1425 17:38:32.878671 DOMAIN: 0000 assign_resources, bus 0 link: 0
1426 17:38:32.881844 Root Device assign_resources, bus 0 link: 0
1427 17:38:32.885071 Done setting resources.
1428 17:38:32.891593 Show resources in subtree (Root Device)...After assigning values.
1429 17:38:32.895333 Root Device child on link 0 DOMAIN: 0000
1430 17:38:32.898595 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1431 17:38:32.908325 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1432 17:38:32.918044 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1433 17:38:32.921839 PCI: 00:00.0
1434 17:38:32.928306 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1435 17:38:32.938173 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1436 17:38:32.948428 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1437 17:38:32.958004 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1438 17:38:32.968144 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1439 17:38:32.978546 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1440 17:38:32.984969 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1441 17:38:32.994774 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1442 17:38:33.004712 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1443 17:38:33.015126 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1444 17:38:33.024714 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1445 17:38:33.031524 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1446 17:38:33.041152 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1447 17:38:33.051541 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1448 17:38:33.060928 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1449 17:38:33.071445 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1450 17:38:33.081121 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1451 17:38:33.091035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1452 17:38:33.097685 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1453 17:38:33.107902 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1454 17:38:33.110954 PCI: 00:02.0
1455 17:38:33.120639 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1456 17:38:33.131066 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1457 17:38:33.140864 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1458 17:38:33.144389 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1459 17:38:33.154525 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1460 17:38:33.157590 GENERIC: 0.0
1461 17:38:33.157693 PCI: 00:05.0
1462 17:38:33.170964 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1463 17:38:33.174130 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1464 17:38:33.177727 GENERIC: 0.0
1465 17:38:33.177819 PCI: 00:08.0
1466 17:38:33.187815 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1467 17:38:33.190479 PCI: 00:0a.0
1468 17:38:33.194404 PCI: 00:0d.0 child on link 0 USB0 port 0
1469 17:38:33.204125 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1470 17:38:33.207298 USB0 port 0 child on link 0 USB3 port 0
1471 17:38:33.210488 USB3 port 0
1472 17:38:33.214099 USB3 port 1
1473 17:38:33.214192 USB3 port 2
1474 17:38:33.217350 USB3 port 3
1475 17:38:33.220458 PCI: 00:14.0 child on link 0 USB0 port 0
1476 17:38:33.230791 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1477 17:38:33.234100 USB0 port 0 child on link 0 USB2 port 0
1478 17:38:33.237410 USB2 port 0
1479 17:38:33.237504 USB2 port 1
1480 17:38:33.240492 USB2 port 2
1481 17:38:33.240577 USB2 port 3
1482 17:38:33.244391 USB2 port 4
1483 17:38:33.247225 USB2 port 5
1484 17:38:33.247310 USB2 port 6
1485 17:38:33.250862 USB2 port 7
1486 17:38:33.250950 USB2 port 8
1487 17:38:33.254066 USB2 port 9
1488 17:38:33.254152 USB3 port 0
1489 17:38:33.257254 USB3 port 1
1490 17:38:33.257348 USB3 port 2
1491 17:38:33.260946 USB3 port 3
1492 17:38:33.261028 PCI: 00:14.2
1493 17:38:33.270440 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1494 17:38:33.283715 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1495 17:38:33.287121 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1496 17:38:33.297119 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1497 17:38:33.300406 GENERIC: 0.0
1498 17:38:33.303706 PCI: 00:15.0 child on link 0 I2C: 00:1a
1499 17:38:33.313646 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1500 17:38:33.313740 I2C: 00:1a
1501 17:38:33.316730 I2C: 00:31
1502 17:38:33.316840 I2C: 00:32
1503 17:38:33.323848 PCI: 00:15.1 child on link 0 I2C: 00:10
1504 17:38:33.333635 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1505 17:38:33.333730 I2C: 00:10
1506 17:38:33.336804 PCI: 00:15.2
1507 17:38:33.347003 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1508 17:38:33.347091 PCI: 00:15.3
1509 17:38:33.357045 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1510 17:38:33.360120 PCI: 00:16.0
1511 17:38:33.370126 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1512 17:38:33.373425 PCI: 00:19.0
1513 17:38:33.376670 PCI: 00:19.1 child on link 0 I2C: 00:15
1514 17:38:33.386831 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1515 17:38:33.386928 I2C: 00:15
1516 17:38:33.393500 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1517 17:38:33.403252 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1518 17:38:33.413454 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1519 17:38:33.423048 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1520 17:38:33.426368 GENERIC: 0.0
1521 17:38:33.426455 PCI: 01:00.0
1522 17:38:33.439986 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1523 17:38:33.449573 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1524 17:38:33.459743 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1525 17:38:33.459836 PCI: 00:1e.0
1526 17:38:33.472905 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1527 17:38:33.476100 PCI: 00:1e.2 child on link 0 SPI: 00
1528 17:38:33.486433 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1529 17:38:33.486538 SPI: 00
1530 17:38:33.492946 PCI: 00:1e.3 child on link 0 SPI: 00
1531 17:38:33.502953 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1532 17:38:33.503066 SPI: 00
1533 17:38:33.505902 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1534 17:38:33.515951 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1535 17:38:33.519407 PNP: 0c09.0
1536 17:38:33.525909 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1537 17:38:33.532901 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1538 17:38:33.539430 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1539 17:38:33.549081 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1540 17:38:33.555925 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1541 17:38:33.556017 GENERIC: 0.0
1542 17:38:33.559307 GENERIC: 1.0
1543 17:38:33.559410 PCI: 00:1f.3
1544 17:38:33.568973 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1545 17:38:33.579067 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1546 17:38:33.582789 PCI: 00:1f.5
1547 17:38:33.592738 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1548 17:38:33.595793 CPU_CLUSTER: 0 child on link 0 APIC: 00
1549 17:38:33.599252 APIC: 00
1550 17:38:33.599339 APIC: 01
1551 17:38:33.599413 APIC: 03
1552 17:38:33.602692 APIC: 05
1553 17:38:33.602783 APIC: 07
1554 17:38:33.605939 APIC: 06
1555 17:38:33.606020 APIC: 02
1556 17:38:33.606093 APIC: 04
1557 17:38:33.609290 Done allocating resources.
1558 17:38:33.615730 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1559 17:38:33.622704 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1560 17:38:33.625495 Configure GPIOs for I2S audio on UP4.
1561 17:38:33.632366 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1562 17:38:33.635730 Enabling resources...
1563 17:38:33.638879 PCI: 00:00.0 subsystem <- 8086/9a12
1564 17:38:33.642083 PCI: 00:00.0 cmd <- 06
1565 17:38:33.645351 PCI: 00:02.0 subsystem <- 8086/9a40
1566 17:38:33.648689 PCI: 00:02.0 cmd <- 03
1567 17:38:33.652484 PCI: 00:04.0 subsystem <- 8086/9a03
1568 17:38:33.652597 PCI: 00:04.0 cmd <- 02
1569 17:38:33.658931 PCI: 00:05.0 subsystem <- 8086/9a19
1570 17:38:33.659016 PCI: 00:05.0 cmd <- 02
1571 17:38:33.662146 PCI: 00:08.0 subsystem <- 8086/9a11
1572 17:38:33.665833 PCI: 00:08.0 cmd <- 06
1573 17:38:33.669139 PCI: 00:0d.0 subsystem <- 8086/9a13
1574 17:38:33.672413 PCI: 00:0d.0 cmd <- 02
1575 17:38:33.675683 PCI: 00:14.0 subsystem <- 8086/a0ed
1576 17:38:33.679034 PCI: 00:14.0 cmd <- 02
1577 17:38:33.682373 PCI: 00:14.2 subsystem <- 8086/a0ef
1578 17:38:33.685474 PCI: 00:14.2 cmd <- 02
1579 17:38:33.689124 PCI: 00:14.3 subsystem <- 8086/a0f0
1580 17:38:33.692399 PCI: 00:14.3 cmd <- 02
1581 17:38:33.695716 PCI: 00:15.0 subsystem <- 8086/a0e8
1582 17:38:33.695798 PCI: 00:15.0 cmd <- 02
1583 17:38:33.702623 PCI: 00:15.1 subsystem <- 8086/a0e9
1584 17:38:33.702711 PCI: 00:15.1 cmd <- 02
1585 17:38:33.705753 PCI: 00:15.2 subsystem <- 8086/a0ea
1586 17:38:33.709046 PCI: 00:15.2 cmd <- 02
1587 17:38:33.712928 PCI: 00:15.3 subsystem <- 8086/a0eb
1588 17:38:33.716110 PCI: 00:15.3 cmd <- 02
1589 17:38:33.719224 PCI: 00:16.0 subsystem <- 8086/a0e0
1590 17:38:33.722393 PCI: 00:16.0 cmd <- 02
1591 17:38:33.726143 PCI: 00:19.1 subsystem <- 8086/a0c6
1592 17:38:33.729143 PCI: 00:19.1 cmd <- 02
1593 17:38:33.732217 PCI: 00:1d.0 bridge ctrl <- 0013
1594 17:38:33.735783 PCI: 00:1d.0 subsystem <- 8086/a0b0
1595 17:38:33.739230 PCI: 00:1d.0 cmd <- 06
1596 17:38:33.742601 PCI: 00:1e.0 subsystem <- 8086/a0a8
1597 17:38:33.742688 PCI: 00:1e.0 cmd <- 06
1598 17:38:33.749044 PCI: 00:1e.2 subsystem <- 8086/a0aa
1599 17:38:33.749165 PCI: 00:1e.2 cmd <- 06
1600 17:38:33.752361 PCI: 00:1e.3 subsystem <- 8086/a0ab
1601 17:38:33.756161 PCI: 00:1e.3 cmd <- 02
1602 17:38:33.759405 PCI: 00:1f.0 subsystem <- 8086/a087
1603 17:38:33.762689 PCI: 00:1f.0 cmd <- 407
1604 17:38:33.765804 PCI: 00:1f.3 subsystem <- 8086/a0c8
1605 17:38:33.768910 PCI: 00:1f.3 cmd <- 02
1606 17:38:33.772624 PCI: 00:1f.5 subsystem <- 8086/a0a4
1607 17:38:33.775824 PCI: 00:1f.5 cmd <- 406
1608 17:38:33.779783 PCI: 01:00.0 cmd <- 02
1609 17:38:33.784424 done.
1610 17:38:33.787694 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1611 17:38:33.790942 Initializing devices...
1612 17:38:33.793902 Root Device init
1613 17:38:33.797697 Chrome EC: Set SMI mask to 0x0000000000000000
1614 17:38:33.804230 Chrome EC: clear events_b mask to 0x0000000000000000
1615 17:38:33.810687 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1616 17:38:33.817208 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1617 17:38:33.824049 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1618 17:38:33.827321 Chrome EC: Set WAKE mask to 0x0000000000000000
1619 17:38:33.835197 fw_config match found: DB_USB=USB3_ACTIVE
1620 17:38:33.838442 Configure Right Type-C port orientation for retimer
1621 17:38:33.841730 Root Device init finished in 46 msecs
1622 17:38:33.846069 PCI: 00:00.0 init
1623 17:38:33.849095 CPU TDP = 9 Watts
1624 17:38:33.849177 CPU PL1 = 9 Watts
1625 17:38:33.852568 CPU PL2 = 40 Watts
1626 17:38:33.855671 CPU PL4 = 83 Watts
1627 17:38:33.859223 PCI: 00:00.0 init finished in 8 msecs
1628 17:38:33.859340 PCI: 00:02.0 init
1629 17:38:33.862483 GMA: Found VBT in CBFS
1630 17:38:33.865619 GMA: Found valid VBT in CBFS
1631 17:38:33.872584 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1632 17:38:33.879330 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1633 17:38:33.882618 PCI: 00:02.0 init finished in 18 msecs
1634 17:38:33.885815 PCI: 00:05.0 init
1635 17:38:33.889035 PCI: 00:05.0 init finished in 0 msecs
1636 17:38:33.892347 PCI: 00:08.0 init
1637 17:38:33.895570 PCI: 00:08.0 init finished in 0 msecs
1638 17:38:33.899344 PCI: 00:14.0 init
1639 17:38:33.902302 PCI: 00:14.0 init finished in 0 msecs
1640 17:38:33.905493 PCI: 00:14.2 init
1641 17:38:33.909263 PCI: 00:14.2 init finished in 0 msecs
1642 17:38:33.912497 PCI: 00:15.0 init
1643 17:38:33.912610 I2C bus 0 version 0x3230302a
1644 17:38:33.918899 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1645 17:38:33.922562 PCI: 00:15.0 init finished in 6 msecs
1646 17:38:33.922660 PCI: 00:15.1 init
1647 17:38:33.925477 I2C bus 1 version 0x3230302a
1648 17:38:33.928803 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1649 17:38:33.932477 PCI: 00:15.1 init finished in 6 msecs
1650 17:38:33.935733 PCI: 00:15.2 init
1651 17:38:33.938952 I2C bus 2 version 0x3230302a
1652 17:38:33.942848 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1653 17:38:33.946048 PCI: 00:15.2 init finished in 6 msecs
1654 17:38:33.949244 PCI: 00:15.3 init
1655 17:38:33.952372 I2C bus 3 version 0x3230302a
1656 17:38:33.956127 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1657 17:38:33.959366 PCI: 00:15.3 init finished in 6 msecs
1658 17:38:33.962393 PCI: 00:16.0 init
1659 17:38:33.965644 PCI: 00:16.0 init finished in 0 msecs
1660 17:38:33.969317 PCI: 00:19.1 init
1661 17:38:33.969398 I2C bus 5 version 0x3230302a
1662 17:38:33.975548 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1663 17:38:33.979295 PCI: 00:19.1 init finished in 6 msecs
1664 17:38:33.979413 PCI: 00:1d.0 init
1665 17:38:33.982310 Initializing PCH PCIe bridge.
1666 17:38:33.985765 PCI: 00:1d.0 init finished in 3 msecs
1667 17:38:33.990281 PCI: 00:1f.0 init
1668 17:38:33.993534 IOAPIC: Initializing IOAPIC at 0xfec00000
1669 17:38:34.000064 IOAPIC: Bootstrap Processor Local APIC = 0x00
1670 17:38:34.000150 IOAPIC: ID = 0x02
1671 17:38:34.003354 IOAPIC: Dumping registers
1672 17:38:34.006641 reg 0x0000: 0x02000000
1673 17:38:34.009685 reg 0x0001: 0x00770020
1674 17:38:34.009786 reg 0x0002: 0x00000000
1675 17:38:34.016354 PCI: 00:1f.0 init finished in 21 msecs
1676 17:38:34.016442 PCI: 00:1f.2 init
1677 17:38:34.020254 Disabling ACPI via APMC.
1678 17:38:34.023478 APMC done.
1679 17:38:34.026884 PCI: 00:1f.2 init finished in 5 msecs
1680 17:38:34.038595 PCI: 01:00.0 init
1681 17:38:34.041721 PCI: 01:00.0 init finished in 0 msecs
1682 17:38:34.045511 PNP: 0c09.0 init
1683 17:38:34.048711 Google Chrome EC uptime: 8.358 seconds
1684 17:38:34.055386 Google Chrome AP resets since EC boot: 1
1685 17:38:34.058491 Google Chrome most recent AP reset causes:
1686 17:38:34.061672 0.347: 32775 shutdown: entering G3
1687 17:38:34.068542 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1688 17:38:34.071695 PNP: 0c09.0 init finished in 22 msecs
1689 17:38:34.077523 Devices initialized
1690 17:38:34.080751 Show all devs... After init.
1691 17:38:34.083964 Root Device: enabled 1
1692 17:38:34.084063 DOMAIN: 0000: enabled 1
1693 17:38:34.087711 CPU_CLUSTER: 0: enabled 1
1694 17:38:34.090512 PCI: 00:00.0: enabled 1
1695 17:38:34.094118 PCI: 00:02.0: enabled 1
1696 17:38:34.094211 PCI: 00:04.0: enabled 1
1697 17:38:34.097336 PCI: 00:05.0: enabled 1
1698 17:38:34.100761 PCI: 00:06.0: enabled 0
1699 17:38:34.103922 PCI: 00:07.0: enabled 0
1700 17:38:34.104014 PCI: 00:07.1: enabled 0
1701 17:38:34.107123 PCI: 00:07.2: enabled 0
1702 17:38:34.110369 PCI: 00:07.3: enabled 0
1703 17:38:34.114340 PCI: 00:08.0: enabled 1
1704 17:38:34.114433 PCI: 00:09.0: enabled 0
1705 17:38:34.117330 PCI: 00:0a.0: enabled 0
1706 17:38:34.120549 PCI: 00:0d.0: enabled 1
1707 17:38:34.124239 PCI: 00:0d.1: enabled 0
1708 17:38:34.124333 PCI: 00:0d.2: enabled 0
1709 17:38:34.127308 PCI: 00:0d.3: enabled 0
1710 17:38:34.130571 PCI: 00:0e.0: enabled 0
1711 17:38:34.130664 PCI: 00:10.2: enabled 1
1712 17:38:34.133899 PCI: 00:10.6: enabled 0
1713 17:38:34.137107 PCI: 00:10.7: enabled 0
1714 17:38:34.140375 PCI: 00:12.0: enabled 0
1715 17:38:34.140467 PCI: 00:12.6: enabled 0
1716 17:38:34.143857 PCI: 00:13.0: enabled 0
1717 17:38:34.147324 PCI: 00:14.0: enabled 1
1718 17:38:34.150290 PCI: 00:14.1: enabled 0
1719 17:38:34.150382 PCI: 00:14.2: enabled 1
1720 17:38:34.153907 PCI: 00:14.3: enabled 1
1721 17:38:34.157213 PCI: 00:15.0: enabled 1
1722 17:38:34.160416 PCI: 00:15.1: enabled 1
1723 17:38:34.160507 PCI: 00:15.2: enabled 1
1724 17:38:34.163787 PCI: 00:15.3: enabled 1
1725 17:38:34.166985 PCI: 00:16.0: enabled 1
1726 17:38:34.167077 PCI: 00:16.1: enabled 0
1727 17:38:34.170570 PCI: 00:16.2: enabled 0
1728 17:38:34.173884 PCI: 00:16.3: enabled 0
1729 17:38:34.177003 PCI: 00:16.4: enabled 0
1730 17:38:34.177095 PCI: 00:16.5: enabled 0
1731 17:38:34.180368 PCI: 00:17.0: enabled 0
1732 17:38:34.183705 PCI: 00:19.0: enabled 0
1733 17:38:34.187045 PCI: 00:19.1: enabled 1
1734 17:38:34.187138 PCI: 00:19.2: enabled 0
1735 17:38:34.190302 PCI: 00:1c.0: enabled 1
1736 17:38:34.193984 PCI: 00:1c.1: enabled 0
1737 17:38:34.197162 PCI: 00:1c.2: enabled 0
1738 17:38:34.197255 PCI: 00:1c.3: enabled 0
1739 17:38:34.200322 PCI: 00:1c.4: enabled 0
1740 17:38:34.203951 PCI: 00:1c.5: enabled 0
1741 17:38:34.204033 PCI: 00:1c.6: enabled 1
1742 17:38:34.206909 PCI: 00:1c.7: enabled 0
1743 17:38:34.210074 PCI: 00:1d.0: enabled 1
1744 17:38:34.213451 PCI: 00:1d.1: enabled 0
1745 17:38:34.213540 PCI: 00:1d.2: enabled 1
1746 17:38:34.217036 PCI: 00:1d.3: enabled 0
1747 17:38:34.220251 PCI: 00:1e.0: enabled 1
1748 17:38:34.223469 PCI: 00:1e.1: enabled 0
1749 17:38:34.223562 PCI: 00:1e.2: enabled 1
1750 17:38:34.227141 PCI: 00:1e.3: enabled 1
1751 17:38:34.230328 PCI: 00:1f.0: enabled 1
1752 17:38:34.233510 PCI: 00:1f.1: enabled 0
1753 17:38:34.233602 PCI: 00:1f.2: enabled 1
1754 17:38:34.237089 PCI: 00:1f.3: enabled 1
1755 17:38:34.240365 PCI: 00:1f.4: enabled 0
1756 17:38:34.243575 PCI: 00:1f.5: enabled 1
1757 17:38:34.243667 PCI: 00:1f.6: enabled 0
1758 17:38:34.246806 PCI: 00:1f.7: enabled 0
1759 17:38:34.250576 APIC: 00: enabled 1
1760 17:38:34.250668 GENERIC: 0.0: enabled 1
1761 17:38:34.253671 GENERIC: 0.0: enabled 1
1762 17:38:34.256755 GENERIC: 1.0: enabled 1
1763 17:38:34.259778 GENERIC: 0.0: enabled 1
1764 17:38:34.259865 GENERIC: 1.0: enabled 1
1765 17:38:34.263614 USB0 port 0: enabled 1
1766 17:38:34.266851 GENERIC: 0.0: enabled 1
1767 17:38:34.267010 USB0 port 0: enabled 1
1768 17:38:34.270021 GENERIC: 0.0: enabled 1
1769 17:38:34.273008 I2C: 00:1a: enabled 1
1770 17:38:34.276789 I2C: 00:31: enabled 1
1771 17:38:34.276915 I2C: 00:32: enabled 1
1772 17:38:34.279954 I2C: 00:10: enabled 1
1773 17:38:34.283350 I2C: 00:15: enabled 1
1774 17:38:34.283442 GENERIC: 0.0: enabled 0
1775 17:38:34.286637 GENERIC: 1.0: enabled 0
1776 17:38:34.289814 GENERIC: 0.0: enabled 1
1777 17:38:34.289907 SPI: 00: enabled 1
1778 17:38:34.293101 SPI: 00: enabled 1
1779 17:38:34.296353 PNP: 0c09.0: enabled 1
1780 17:38:34.296445 GENERIC: 0.0: enabled 1
1781 17:38:34.299628 USB3 port 0: enabled 1
1782 17:38:34.302952 USB3 port 1: enabled 1
1783 17:38:34.306833 USB3 port 2: enabled 0
1784 17:38:34.306927 USB3 port 3: enabled 0
1785 17:38:34.309546 USB2 port 0: enabled 0
1786 17:38:34.313408 USB2 port 1: enabled 1
1787 17:38:34.313503 USB2 port 2: enabled 1
1788 17:38:34.316452 USB2 port 3: enabled 0
1789 17:38:34.319530 USB2 port 4: enabled 1
1790 17:38:34.319617 USB2 port 5: enabled 0
1791 17:38:34.322840 USB2 port 6: enabled 0
1792 17:38:34.326140 USB2 port 7: enabled 0
1793 17:38:34.329344 USB2 port 8: enabled 0
1794 17:38:34.329442 USB2 port 9: enabled 0
1795 17:38:34.332822 USB3 port 0: enabled 0
1796 17:38:34.336226 USB3 port 1: enabled 1
1797 17:38:34.336334 USB3 port 2: enabled 0
1798 17:38:34.339257 USB3 port 3: enabled 0
1799 17:38:34.342733 GENERIC: 0.0: enabled 1
1800 17:38:34.346392 GENERIC: 1.0: enabled 1
1801 17:38:34.346476 APIC: 01: enabled 1
1802 17:38:34.349631 APIC: 03: enabled 1
1803 17:38:34.349725 APIC: 05: enabled 1
1804 17:38:34.352911 APIC: 07: enabled 1
1805 17:38:34.355958 APIC: 06: enabled 1
1806 17:38:34.356060 APIC: 02: enabled 1
1807 17:38:34.359675 APIC: 04: enabled 1
1808 17:38:34.362892 PCI: 01:00.0: enabled 1
1809 17:38:34.365965 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1810 17:38:34.372964 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1811 17:38:34.376122 ELOG: NV offset 0xf30000 size 0x1000
1812 17:38:34.382447 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1813 17:38:34.389574 ELOG: Event(17) added with size 13 at 2023-10-20 17:38:34 UTC
1814 17:38:34.396014 ELOG: Event(92) added with size 9 at 2023-10-20 17:38:34 UTC
1815 17:38:34.402385 ELOG: Event(93) added with size 9 at 2023-10-20 17:38:34 UTC
1816 17:38:34.409316 ELOG: Event(16) added with size 11 at 2023-10-20 17:38:34 UTC
1817 17:38:34.412606 Erasing flash addr f30000 + 4 KiB
1818 17:38:34.473484 ELOG: Event(9E) added with size 10 at 2023-10-20 17:38:34 UTC
1819 17:38:34.480097 ELOG: Event(9F) added with size 14 at 2023-10-20 17:38:34 UTC
1820 17:38:34.486890 ELOG: Event(9F) added with size 14 at 2023-10-20 17:38:34 UTC
1821 17:38:34.493400 BS: BS_DEV_INIT exit times (exec / console): 33 / 61 ms
1822 17:38:34.499989 ELOG: Event(A1) added with size 10 at 2023-10-20 17:38:34 UTC
1823 17:38:34.506405 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1824 17:38:34.509770 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1825 17:38:34.513593 Finalize devices...
1826 17:38:34.516868 Devices finalized
1827 17:38:34.520142 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1828 17:38:34.526566 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1829 17:38:34.529924 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1830 17:38:34.536710 ME: HFSTS1 : 0x80030055
1831 17:38:34.540420 ME: HFSTS2 : 0x30280116
1832 17:38:34.546774 ME: HFSTS3 : 0x00000050
1833 17:38:34.550034 ME: HFSTS4 : 0x00004000
1834 17:38:34.553710 ME: HFSTS5 : 0x00000000
1835 17:38:34.560307 ME: HFSTS6 : 0x00400006
1836 17:38:34.563566 ME: Manufacturing Mode : YES
1837 17:38:34.566792 ME: SPI Protection Mode Enabled : NO
1838 17:38:34.569991 ME: FW Partition Table : OK
1839 17:38:34.573124 ME: Bringup Loader Failure : NO
1840 17:38:34.576485 ME: Firmware Init Complete : NO
1841 17:38:34.579782 ME: Boot Options Present : NO
1842 17:38:34.583146 ME: Update In Progress : NO
1843 17:38:34.590136 ME: D0i3 Support : YES
1844 17:38:34.592893 ME: Low Power State Enabled : NO
1845 17:38:34.596241 ME: CPU Replaced : YES
1846 17:38:34.600087 ME: CPU Replacement Valid : YES
1847 17:38:34.603464 ME: Current Working State : 5
1848 17:38:34.606702 ME: Current Operation State : 1
1849 17:38:34.610033 ME: Current Operation Mode : 3
1850 17:38:34.613300 ME: Error Code : 0
1851 17:38:34.616574 ME: Enhanced Debug Mode : NO
1852 17:38:34.622988 ME: CPU Debug Disabled : YES
1853 17:38:34.626168 ME: TXT Support : NO
1854 17:38:34.632761 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1855 17:38:34.639665 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1856 17:38:34.642873 CBFS: 'fallback/slic' not found.
1857 17:38:34.646603 ACPI: Writing ACPI tables at 76b01000.
1858 17:38:34.649817 ACPI: * FACS
1859 17:38:34.649916 ACPI: * DSDT
1860 17:38:34.653185 Ramoops buffer: 0x100000@0x76a00000.
1861 17:38:34.659282 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1862 17:38:34.663113 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1863 17:38:34.666248 Google Chrome EC: version:
1864 17:38:34.669477 ro: voema_v2.0.7540-147f8d37d1
1865 17:38:34.672576 rw: voema_v2.0.7540-147f8d37d1
1866 17:38:34.676186 running image: 2
1867 17:38:34.682596 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1868 17:38:34.686182 ACPI: * FADT
1869 17:38:34.686300 SCI is IRQ9
1870 17:38:34.689060 ACPI: added table 1/32, length now 40
1871 17:38:34.692406 ACPI: * SSDT
1872 17:38:34.695999 Found 1 CPU(s) with 8 core(s) each.
1873 17:38:34.699339 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1874 17:38:34.702738 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1875 17:38:34.709199 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1876 17:38:34.712354 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1877 17:38:34.718890 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1878 17:38:34.722100 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1879 17:38:34.729157 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1880 17:38:34.735712 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1881 17:38:34.742051 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1882 17:38:34.745727 \_SB.PCI0.RP09: Added StorageD3Enable property
1883 17:38:34.748805 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1884 17:38:34.755941 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1885 17:38:34.759001 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1886 17:38:34.762050 PS2K: Passing 80 keymaps to kernel
1887 17:38:34.769074 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1888 17:38:34.775717 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1889 17:38:34.782438 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1890 17:38:34.788695 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1891 17:38:34.795492 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1892 17:38:34.802014 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1893 17:38:34.808473 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1894 17:38:34.815353 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1895 17:38:34.818738 ACPI: added table 2/32, length now 44
1896 17:38:34.821779 ACPI: * MCFG
1897 17:38:34.825665 ACPI: added table 3/32, length now 48
1898 17:38:34.828793 ACPI: * TPM2
1899 17:38:34.828912 TPM2 log created at 0x769f0000
1900 17:38:34.835487 ACPI: added table 4/32, length now 52
1901 17:38:34.835614 ACPI: * MADT
1902 17:38:34.838763 SCI is IRQ9
1903 17:38:34.841939 ACPI: added table 5/32, length now 56
1904 17:38:34.842082 current = 76b09850
1905 17:38:34.845034 ACPI: * DMAR
1906 17:38:34.848896 ACPI: added table 6/32, length now 60
1907 17:38:34.852001 ACPI: added table 7/32, length now 64
1908 17:38:34.855119 ACPI: * HPET
1909 17:38:34.858463 ACPI: added table 8/32, length now 68
1910 17:38:34.858567 ACPI: done.
1911 17:38:34.861674 ACPI tables: 35216 bytes.
1912 17:38:34.864848 smbios_write_tables: 769ef000
1913 17:38:34.868463 EC returned error result code 3
1914 17:38:34.871674 Couldn't obtain OEM name from CBI
1915 17:38:34.875005 Create SMBIOS type 16
1916 17:38:34.875105 Create SMBIOS type 17
1917 17:38:34.878811 GENERIC: 0.0 (WIFI Device)
1918 17:38:34.882111 SMBIOS tables: 1750 bytes.
1919 17:38:34.885323 Writing table forward entry at 0x00000500
1920 17:38:34.892216 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1921 17:38:34.895182 Writing coreboot table at 0x76b25000
1922 17:38:34.902067 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1923 17:38:34.905367 1. 0000000000001000-000000000009ffff: RAM
1924 17:38:34.911496 2. 00000000000a0000-00000000000fffff: RESERVED
1925 17:38:34.915223 3. 0000000000100000-00000000769eefff: RAM
1926 17:38:34.921928 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1927 17:38:34.925250 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1928 17:38:34.931859 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1929 17:38:34.938095 7. 0000000077000000-000000007fbfffff: RESERVED
1930 17:38:34.941392 8. 00000000c0000000-00000000cfffffff: RESERVED
1931 17:38:34.945232 9. 00000000f8000000-00000000f9ffffff: RESERVED
1932 17:38:34.951666 10. 00000000fb000000-00000000fb000fff: RESERVED
1933 17:38:34.954808 11. 00000000fe000000-00000000fe00ffff: RESERVED
1934 17:38:34.961592 12. 00000000fed80000-00000000fed87fff: RESERVED
1935 17:38:34.964731 13. 00000000fed90000-00000000fed92fff: RESERVED
1936 17:38:34.971350 14. 00000000feda0000-00000000feda1fff: RESERVED
1937 17:38:34.974987 15. 00000000fedc0000-00000000feddffff: RESERVED
1938 17:38:34.978207 16. 0000000100000000-00000002803fffff: RAM
1939 17:38:34.981410 Passing 4 GPIOs to payload:
1940 17:38:34.987924 NAME | PORT | POLARITY | VALUE
1941 17:38:34.991198 lid | undefined | high | high
1942 17:38:34.998028 power | undefined | high | low
1943 17:38:35.004717 oprom | undefined | high | low
1944 17:38:35.008103 EC in RW | 0x000000e5 | high | high
1945 17:38:35.014489 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 725e
1946 17:38:35.018325 coreboot table: 1576 bytes.
1947 17:38:35.021385 IMD ROOT 0. 0x76fff000 0x00001000
1948 17:38:35.024448 IMD SMALL 1. 0x76ffe000 0x00001000
1949 17:38:35.028414 FSP MEMORY 2. 0x76c4e000 0x003b0000
1950 17:38:35.031462 VPD 3. 0x76c4d000 0x00000367
1951 17:38:35.037941 RO MCACHE 4. 0x76c4c000 0x00000fdc
1952 17:38:35.041213 CONSOLE 5. 0x76c2c000 0x00020000
1953 17:38:35.044588 FMAP 6. 0x76c2b000 0x00000578
1954 17:38:35.048217 TIME STAMP 7. 0x76c2a000 0x00000910
1955 17:38:35.051353 VBOOT WORK 8. 0x76c16000 0x00014000
1956 17:38:35.054520 ROMSTG STCK 9. 0x76c15000 0x00001000
1957 17:38:35.058221 AFTER CAR 10. 0x76c0a000 0x0000b000
1958 17:38:35.061358 RAMSTAGE 11. 0x76b97000 0x00073000
1959 17:38:35.064326 REFCODE 12. 0x76b42000 0x00055000
1960 17:38:35.071398 SMM BACKUP 13. 0x76b32000 0x00010000
1961 17:38:35.074554 4f444749 14. 0x76b30000 0x00002000
1962 17:38:35.077648 EXT VBT15. 0x76b2d000 0x0000219f
1963 17:38:35.081410 COREBOOT 16. 0x76b25000 0x00008000
1964 17:38:35.084689 ACPI 17. 0x76b01000 0x00024000
1965 17:38:35.087946 ACPI GNVS 18. 0x76b00000 0x00001000
1966 17:38:35.091182 RAMOOPS 19. 0x76a00000 0x00100000
1967 17:38:35.094435 TPM2 TCGLOG20. 0x769f0000 0x00010000
1968 17:38:35.098121 SMBIOS 21. 0x769ef000 0x00000800
1969 17:38:35.101235 IMD small region:
1970 17:38:35.104479 IMD ROOT 0. 0x76ffec00 0x00000400
1971 17:38:35.108079 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1972 17:38:35.111665 POWER STATE 2. 0x76ffeb80 0x00000044
1973 17:38:35.117732 ROMSTAGE 3. 0x76ffeb60 0x00000004
1974 17:38:35.121728 MEM INFO 4. 0x76ffe980 0x000001e0
1975 17:38:35.127966 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1976 17:38:35.131484 MTRR: Physical address space:
1977 17:38:35.134749 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1978 17:38:35.141444 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1979 17:38:35.147762 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1980 17:38:35.154578 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1981 17:38:35.161244 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1982 17:38:35.167881 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1983 17:38:35.174068 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1984 17:38:35.177933 MTRR: Fixed MSR 0x250 0x0606060606060606
1985 17:38:35.180957 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 17:38:35.187324 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 17:38:35.191160 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 17:38:35.193874 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 17:38:35.197659 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 17:38:35.200731 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 17:38:35.207097 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 17:38:35.210945 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 17:38:35.214110 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 17:38:35.217168 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 17:38:35.221382 call enable_fixed_mtrr()
1996 17:38:35.224914 CPU physical address size: 39 bits
1997 17:38:35.231422 MTRR: default type WB/UC MTRR counts: 6/6.
1998 17:38:35.235143 MTRR: UC selected as default type.
1999 17:38:35.241335 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2000 17:38:35.245235 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2001 17:38:35.251734 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2002 17:38:35.258058 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2003 17:38:35.264545 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2004 17:38:35.271332 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2005 17:38:35.278050 MTRR: Fixed MSR 0x250 0x0606060606060606
2006 17:38:35.281336 MTRR: Fixed MSR 0x258 0x0606060606060606
2007 17:38:35.284734 MTRR: Fixed MSR 0x259 0x0000000000000000
2008 17:38:35.288316 MTRR: Fixed MSR 0x268 0x0606060606060606
2009 17:38:35.294734 MTRR: Fixed MSR 0x269 0x0606060606060606
2010 17:38:35.297878 MTRR: Fixed MSR 0x26a 0x0606060606060606
2011 17:38:35.301066 MTRR: Fixed MSR 0x26b 0x0606060606060606
2012 17:38:35.304835 MTRR: Fixed MSR 0x26c 0x0606060606060606
2013 17:38:35.307947 MTRR: Fixed MSR 0x26d 0x0606060606060606
2014 17:38:35.314378 MTRR: Fixed MSR 0x26e 0x0606060606060606
2015 17:38:35.317593 MTRR: Fixed MSR 0x26f 0x0606060606060606
2016 17:38:35.317765
2017 17:38:35.321518 MTRR check
2018 17:38:35.321691 call enable_fixed_mtrr()
2019 17:38:35.324612 Fixed MTRRs : Enabled
2020 17:38:35.327790 Variable MTRRs: Enabled
2021 17:38:35.327991
2022 17:38:35.330991 CPU physical address size: 39 bits
2023 17:38:35.337568 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2024 17:38:35.341628 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 17:38:35.347499 MTRR: Fixed MSR 0x250 0x0606060606060606
2026 17:38:35.351353 MTRR: Fixed MSR 0x258 0x0606060606060606
2027 17:38:35.354686 MTRR: Fixed MSR 0x259 0x0000000000000000
2028 17:38:35.357836 MTRR: Fixed MSR 0x268 0x0606060606060606
2029 17:38:35.364402 MTRR: Fixed MSR 0x269 0x0606060606060606
2030 17:38:35.367685 MTRR: Fixed MSR 0x26a 0x0606060606060606
2031 17:38:35.370839 MTRR: Fixed MSR 0x26b 0x0606060606060606
2032 17:38:35.374406 MTRR: Fixed MSR 0x26c 0x0606060606060606
2033 17:38:35.380875 MTRR: Fixed MSR 0x26d 0x0606060606060606
2034 17:38:35.383989 MTRR: Fixed MSR 0x26e 0x0606060606060606
2035 17:38:35.387594 MTRR: Fixed MSR 0x26f 0x0606060606060606
2036 17:38:35.393970 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 17:38:35.394136 call enable_fixed_mtrr()
2038 17:38:35.400536 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 17:38:35.404420 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 17:38:35.407779 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 17:38:35.410904 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 17:38:35.413982 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 17:38:35.420516 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 17:38:35.424331 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 17:38:35.427466 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 17:38:35.430672 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 17:38:35.434873 CPU physical address size: 39 bits
2048 17:38:35.442010 call enable_fixed_mtrr()
2049 17:38:35.445271 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 17:38:35.448422 MTRR: Fixed MSR 0x250 0x0606060606060606
2051 17:38:35.451482 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 17:38:35.458093 MTRR: Fixed MSR 0x259 0x0000000000000000
2053 17:38:35.461321 MTRR: Fixed MSR 0x268 0x0606060606060606
2054 17:38:35.464548 MTRR: Fixed MSR 0x269 0x0606060606060606
2055 17:38:35.468392 MTRR: Fixed MSR 0x26a 0x0606060606060606
2056 17:38:35.471611 MTRR: Fixed MSR 0x26b 0x0606060606060606
2057 17:38:35.478087 MTRR: Fixed MSR 0x26c 0x0606060606060606
2058 17:38:35.481278 MTRR: Fixed MSR 0x26d 0x0606060606060606
2059 17:38:35.484892 MTRR: Fixed MSR 0x26e 0x0606060606060606
2060 17:38:35.488315 MTRR: Fixed MSR 0x26f 0x0606060606060606
2061 17:38:35.495895 MTRR: Fixed MSR 0x258 0x0606060606060606
2062 17:38:35.496066 call enable_fixed_mtrr()
2063 17:38:35.502339 MTRR: Fixed MSR 0x259 0x0000000000000000
2064 17:38:35.505397 MTRR: Fixed MSR 0x268 0x0606060606060606
2065 17:38:35.508889 MTRR: Fixed MSR 0x269 0x0606060606060606
2066 17:38:35.512200 MTRR: Fixed MSR 0x26a 0x0606060606060606
2067 17:38:35.518932 MTRR: Fixed MSR 0x26b 0x0606060606060606
2068 17:38:35.522108 MTRR: Fixed MSR 0x26c 0x0606060606060606
2069 17:38:35.525383 MTRR: Fixed MSR 0x26d 0x0606060606060606
2070 17:38:35.529055 MTRR: Fixed MSR 0x26e 0x0606060606060606
2071 17:38:35.535473 MTRR: Fixed MSR 0x26f 0x0606060606060606
2072 17:38:35.538611 CPU physical address size: 39 bits
2073 17:38:35.541902 call enable_fixed_mtrr()
2074 17:38:35.545848 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 17:38:35.548625 MTRR: Fixed MSR 0x250 0x0606060606060606
2076 17:38:35.555701 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 17:38:35.558822 MTRR: Fixed MSR 0x259 0x0000000000000000
2078 17:38:35.561869 MTRR: Fixed MSR 0x268 0x0606060606060606
2079 17:38:35.565383 MTRR: Fixed MSR 0x269 0x0606060606060606
2080 17:38:35.571814 MTRR: Fixed MSR 0x26a 0x0606060606060606
2081 17:38:35.575061 MTRR: Fixed MSR 0x26b 0x0606060606060606
2082 17:38:35.578373 MTRR: Fixed MSR 0x26c 0x0606060606060606
2083 17:38:35.581634 MTRR: Fixed MSR 0x26d 0x0606060606060606
2084 17:38:35.588675 MTRR: Fixed MSR 0x26e 0x0606060606060606
2085 17:38:35.591594 MTRR: Fixed MSR 0x26f 0x0606060606060606
2086 17:38:35.594755 MTRR: Fixed MSR 0x258 0x0606060606060606
2087 17:38:35.601802 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 17:38:35.604868 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 17:38:35.608480 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 17:38:35.611591 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 17:38:35.617988 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 17:38:35.621648 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 17:38:35.624671 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 17:38:35.628183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 17:38:35.634954 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 17:38:35.638344 call enable_fixed_mtrr()
2097 17:38:35.638520 call enable_fixed_mtrr()
2098 17:38:35.641607 CPU physical address size: 39 bits
2099 17:38:35.648171 CPU physical address size: 39 bits
2100 17:38:35.651441 CPU physical address size: 39 bits
2101 17:38:35.654826 CPU physical address size: 39 bits
2102 17:38:35.658112 Checking cr50 for pending updates
2103 17:38:35.664648 Reading cr50 TPM mode
2104 17:38:35.675071 BS: BS_PAYLOAD_LOAD entry times (exec / console): 326 / 6 ms
2105 17:38:35.685502 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2106 17:38:35.688761 Checking segment from ROM address 0xffc02b38
2107 17:38:35.692059 Checking segment from ROM address 0xffc02b54
2108 17:38:35.698971 Loading segment from ROM address 0xffc02b38
2109 17:38:35.699153 code (compression=0)
2110 17:38:35.708734 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2111 17:38:35.715317 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2112 17:38:35.718965 it's not compressed!
2113 17:38:35.858127 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2114 17:38:35.864686 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2115 17:38:35.870959 Loading segment from ROM address 0xffc02b54
2116 17:38:35.871139 Entry Point 0x30000000
2117 17:38:35.874853 Loaded segments
2118 17:38:35.881316 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2119 17:38:35.923660 Finalizing chipset.
2120 17:38:35.927199 Finalizing SMM.
2121 17:38:35.927410 APMC done.
2122 17:38:35.934050 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2123 17:38:35.937003 mp_park_aps done after 0 msecs.
2124 17:38:35.940607 Jumping to boot code at 0x30000000(0x76b25000)
2125 17:38:35.950572 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2126 17:38:35.950767
2127 17:38:35.950875
2128 17:38:35.950977
2129 17:38:35.953863 Starting depthcharge on Voema...
2130 17:38:35.954021
2131 17:38:35.954478 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2132 17:38:35.954636 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2133 17:38:35.954771 Setting prompt string to ['volteer:']
2134 17:38:35.954883 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2135 17:38:35.963901 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2136 17:38:35.964077
2137 17:38:35.970430 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2138 17:38:35.970605
2139 17:38:35.973599 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2140 17:38:35.978138
2141 17:38:35.978309 Failed to find eMMC card reader
2142 17:38:35.978410
2143 17:38:35.981639 Wipe memory regions:
2144 17:38:35.981802
2145 17:38:35.984924 [0x00000000001000, 0x000000000a0000)
2146 17:38:35.985089
2147 17:38:35.987599 [0x00000000100000, 0x00000030000000)
2148 17:38:36.016238
2149 17:38:36.019422 [0x00000032662db0, 0x000000769ef000)
2150 17:38:36.055364
2151 17:38:36.058444 [0x00000100000000, 0x00000280400000)
2152 17:38:36.260686
2153 17:38:36.264317 ec_init: CrosEC protocol v3 supported (256, 256)
2154 17:38:36.264428
2155 17:38:36.270700 update_port_state: port C0 state: usb enable 1 mux conn 0
2156 17:38:36.270804
2157 17:38:36.280364 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2158 17:38:36.280479
2159 17:38:36.287585 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2160 17:38:36.287729
2161 17:38:36.290777 send_conn_disc_msg: pmc_send_cmd succeeded
2162 17:38:36.721982
2163 17:38:36.722141 R8152: Initializing
2164 17:38:36.722221
2165 17:38:36.725183 Version 6 (ocp_data = 5c30)
2166 17:38:36.725278
2167 17:38:36.728352 R8152: Done initializing
2168 17:38:36.728475
2169 17:38:36.731637 Adding net device
2170 17:38:37.033022
2171 17:38:37.035915 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2172 17:38:37.036026
2173 17:38:37.036100
2174 17:38:37.036170
2175 17:38:37.039791 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2177 17:38:37.140229 volteer: tftpboot 192.168.201.1 11831817/tftp-deploy-d5zryx4x/kernel/bzImage 11831817/tftp-deploy-d5zryx4x/kernel/cmdline 11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
2178 17:38:37.140422 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2179 17:38:37.140519 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2180 17:38:37.144962 tftpboot 192.168.201.1 11831817/tftp-deploy-d5zryx4x/kernel/bzImploy-d5zryx4x/kernel/cmdline 11831817/tftp-deploy-d5zryx4x/ramdisk/ramdisk.cpio.gz
2181 17:38:37.145066
2182 17:38:37.145141 Waiting for link
2183 17:38:37.349049
2184 17:38:37.349211 done.
2185 17:38:37.349289
2186 17:38:37.349359 MAC: 00:24:32:30:7b:87
2187 17:38:37.349426
2188 17:38:37.352269 Sending DHCP discover... done.
2189 17:38:37.352366
2190 17:38:37.355480 Waiting for reply... done.
2191 17:38:37.355575
2192 17:38:37.358737 Sending DHCP request... done.
2193 17:38:37.358837
2194 17:38:37.367065 Waiting for reply... done.
2195 17:38:37.367187
2196 17:38:37.367264 My ip is 192.168.201.19
2197 17:38:37.367333
2198 17:38:37.370136 The DHCP server ip is 192.168.201.1
2199 17:38:37.373340
2200 17:38:37.377016 TFTP server IP predefined by user: 192.168.201.1
2201 17:38:37.377112
2202 17:38:37.383380 Bootfile predefined by user: 11831817/tftp-deploy-d5zryx4x/kernel/bzImage
2203 17:38:37.383477
2204 17:38:37.386450 Sending tftp read request... done.
2205 17:38:37.386546
2206 17:38:37.393467 Waiting for the transfer...
2207 17:38:37.393603
2208 17:38:37.929254 00000000 ################################################################
2209 17:38:37.929417
2210 17:38:38.467167 00080000 ################################################################
2211 17:38:38.467338
2212 17:38:39.005233 00100000 ################################################################
2213 17:38:39.005401
2214 17:38:39.533818 00180000 ################################################################
2215 17:38:39.533984
2216 17:38:40.094823 00200000 ################################################################
2217 17:38:40.095036
2218 17:38:40.649693 00280000 ################################################################
2219 17:38:40.649853
2220 17:38:41.210070 00300000 ################################################################
2221 17:38:41.210235
2222 17:38:41.737009 00380000 ################################################################
2223 17:38:41.737189
2224 17:38:42.268733 00400000 ################################################################
2225 17:38:42.268908
2226 17:38:42.826176 00480000 ################################################################
2227 17:38:42.826348
2228 17:38:43.388048 00500000 ################################################################
2229 17:38:43.388216
2230 17:38:43.931178 00580000 ################################################################
2231 17:38:43.931345
2232 17:38:44.480825 00600000 ################################################################
2233 17:38:44.480993
2234 17:38:45.025828 00680000 ################################################################
2235 17:38:45.025999
2236 17:38:45.571303 00700000 ################################################################
2237 17:38:45.571472
2238 17:38:46.122418 00780000 ################################################################
2239 17:38:46.122636
2240 17:38:46.246880 00800000 ############### done.
2241 17:38:46.247093
2242 17:38:46.250002 The bootfile was 8507280 bytes long.
2243 17:38:46.250129
2244 17:38:46.253260 Sending tftp read request... done.
2245 17:38:46.253391
2246 17:38:46.256462 Waiting for the transfer...
2247 17:38:46.256588
2248 17:38:46.798824 00000000 ################################################################
2249 17:38:46.799033
2250 17:38:47.334891 00080000 ################################################################
2251 17:38:47.335113
2252 17:38:47.876264 00100000 ################################################################
2253 17:38:47.876431
2254 17:38:48.422444 00180000 ################################################################
2255 17:38:48.422621
2256 17:38:48.961597 00200000 ################################################################
2257 17:38:48.961758
2258 17:38:49.509699 00280000 ################################################################
2259 17:38:49.509866
2260 17:38:50.075681 00300000 ################################################################
2261 17:38:50.075845
2262 17:38:50.625504 00380000 ################################################################
2263 17:38:50.625667
2264 17:38:51.161923 00400000 ################################################################
2265 17:38:51.162087
2266 17:38:51.699961 00480000 ################################################################
2267 17:38:51.700123
2268 17:38:52.237878 00500000 ################################################################ done.
2269 17:38:52.238072
2270 17:38:52.240989 Sending tftp read request... done.
2271 17:38:52.241079
2272 17:38:52.244060 Waiting for the transfer...
2273 17:38:52.244156
2274 17:38:52.244232 00000000 # done.
2275 17:38:52.244304
2276 17:38:52.253913 Command line loaded dynamically from TFTP file: 11831817/tftp-deploy-d5zryx4x/kernel/cmdline
2277 17:38:52.254058
2278 17:38:52.277207 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831817/extract-nfsrootfs-jga5v1z9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2279 17:38:52.283339
2280 17:38:52.286403 Shutting down all USB controllers.
2281 17:38:52.286498
2282 17:38:52.286572 Removing current net device
2283 17:38:52.286642
2284 17:38:52.289774 Finalizing coreboot
2285 17:38:52.289868
2286 17:38:52.296108 Exiting depthcharge with code 4 at timestamp: 25069481
2287 17:38:52.296205
2288 17:38:52.296279
2289 17:38:52.296350 Starting kernel ...
2290 17:38:52.296416
2291 17:38:52.296480
2292 17:38:52.296873 end: 2.2.4 bootloader-commands (duration 00:00:16) [common]
2293 17:38:52.296985 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2294 17:38:52.297070 Setting prompt string to ['Linux version [0-9]']
2295 17:38:52.297147 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2296 17:38:52.297223 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2298 17:43:20.297266 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2300 17:43:20.297542 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2302 17:43:20.297785 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2305 17:43:20.298233 end: 2 depthcharge-action (duration 00:05:00) [common]
2307 17:43:20.298560 Cleaning after the job
2308 17:43:20.298699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/ramdisk
2309 17:43:20.299797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/kernel
2310 17:43:20.301332 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/nfsrootfs
2311 17:43:20.387380 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831817/tftp-deploy-d5zryx4x/modules
2312 17:43:20.387950 start: 5.1 power-off (timeout 00:00:30) [common]
2313 17:43:20.388275 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-4' '--port=1' '--command=off'
2314 17:43:20.460282 >> Command sent successfully.
2315 17:43:20.462873 Returned 0 in 0 seconds
2316 17:43:20.563285 end: 5.1 power-off (duration 00:00:00) [common]
2318 17:43:20.563783 start: 5.2 read-feedback (timeout 00:10:00) [common]
2319 17:43:20.564136 Listened to connection for namespace 'common' for up to 1s
2320 17:43:21.564853 Finalising connection for namespace 'common'
2321 17:43:21.565074 Disconnecting from shell: Finalise
2322 17:43:21.565199
2323 17:43:21.665555 end: 5.2 read-feedback (duration 00:00:01) [common]
2324 17:43:21.665745 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831817
2325 17:43:22.019494 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831817
2326 17:43:22.019701 JobError: Your job cannot terminate cleanly.