Boot log: dell-latitude-5400-8665U-sarien
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:49:38.246659 lava-dispatcher, installed at version: 2023.08
2 17:49:38.246881 start: 0 validate
3 17:49:38.247024 Start time: 2023-10-20 17:49:38.247016+00:00 (UTC)
4 17:49:38.247143 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:49:38.247280 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:49:38.508082 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:49:38.508265 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:49:38.774577 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:49:38.774768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:49:39.032924 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:49:39.033097 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:49:39.300244 validate duration: 1.05
14 17:49:39.300537 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:49:39.300637 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:49:39.300722 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:49:39.300869 Not decompressing ramdisk as can be used compressed.
18 17:49:39.300959 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/initrd.cpio.gz
19 17:49:39.301023 saving as /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/ramdisk/initrd.cpio.gz
20 17:49:39.301094 total size: 5432690 (5 MB)
21 17:49:39.302176 progress 0 % (0 MB)
22 17:49:39.303891 progress 5 % (0 MB)
23 17:49:39.305353 progress 10 % (0 MB)
24 17:49:39.306826 progress 15 % (0 MB)
25 17:49:39.308502 progress 20 % (1 MB)
26 17:49:39.309994 progress 25 % (1 MB)
27 17:49:39.311480 progress 30 % (1 MB)
28 17:49:39.313071 progress 35 % (1 MB)
29 17:49:39.314484 progress 40 % (2 MB)
30 17:49:39.315973 progress 45 % (2 MB)
31 17:49:39.317408 progress 50 % (2 MB)
32 17:49:39.318986 progress 55 % (2 MB)
33 17:49:39.320453 progress 60 % (3 MB)
34 17:49:39.321866 progress 65 % (3 MB)
35 17:49:39.323484 progress 70 % (3 MB)
36 17:49:39.324898 progress 75 % (3 MB)
37 17:49:39.326305 progress 80 % (4 MB)
38 17:49:39.327725 progress 85 % (4 MB)
39 17:49:39.329307 progress 90 % (4 MB)
40 17:49:39.330747 progress 95 % (4 MB)
41 17:49:39.332222 progress 100 % (5 MB)
42 17:49:39.332439 5 MB downloaded in 0.03 s (165.29 MB/s)
43 17:49:39.332639 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:49:39.332896 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:49:39.332982 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:49:39.333065 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:49:39.333205 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:49:39.333273 saving as /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/kernel/bzImage
50 17:49:39.333332 total size: 8507280 (8 MB)
51 17:49:39.333397 No compression specified
52 17:49:39.334495 progress 0 % (0 MB)
53 17:49:39.336727 progress 5 % (0 MB)
54 17:49:39.339051 progress 10 % (0 MB)
55 17:49:39.341441 progress 15 % (1 MB)
56 17:49:39.343776 progress 20 % (1 MB)
57 17:49:39.346095 progress 25 % (2 MB)
58 17:49:39.348479 progress 30 % (2 MB)
59 17:49:39.350794 progress 35 % (2 MB)
60 17:49:39.353151 progress 40 % (3 MB)
61 17:49:39.355541 progress 45 % (3 MB)
62 17:49:39.357854 progress 50 % (4 MB)
63 17:49:39.360241 progress 55 % (4 MB)
64 17:49:39.362531 progress 60 % (4 MB)
65 17:49:39.364864 progress 65 % (5 MB)
66 17:49:39.367172 progress 70 % (5 MB)
67 17:49:39.369442 progress 75 % (6 MB)
68 17:49:39.371718 progress 80 % (6 MB)
69 17:49:39.373973 progress 85 % (6 MB)
70 17:49:39.376277 progress 90 % (7 MB)
71 17:49:39.378549 progress 95 % (7 MB)
72 17:49:39.380907 progress 100 % (8 MB)
73 17:49:39.381098 8 MB downloaded in 0.05 s (169.87 MB/s)
74 17:49:39.381246 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:49:39.381478 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:49:39.381595 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:49:39.381708 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:49:39.381890 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230623.0/amd64/full.rootfs.tar.xz
80 17:49:39.381983 saving as /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/nfsrootfs/full.rootfs.tar
81 17:49:39.382075 total size: 133380384 (127 MB)
82 17:49:39.382170 Using unxz to decompress xz
83 17:49:39.386470 progress 0 % (0 MB)
84 17:49:39.728911 progress 5 % (6 MB)
85 17:49:40.082802 progress 10 % (12 MB)
86 17:49:40.370389 progress 15 % (19 MB)
87 17:49:40.555450 progress 20 % (25 MB)
88 17:49:40.798147 progress 25 % (31 MB)
89 17:49:41.145707 progress 30 % (38 MB)
90 17:49:41.494826 progress 35 % (44 MB)
91 17:49:41.903432 progress 40 % (50 MB)
92 17:49:42.295753 progress 45 % (57 MB)
93 17:49:42.658949 progress 50 % (63 MB)
94 17:49:43.043621 progress 55 % (69 MB)
95 17:49:43.417188 progress 60 % (76 MB)
96 17:49:43.798630 progress 65 % (82 MB)
97 17:49:44.170159 progress 70 % (89 MB)
98 17:49:44.541612 progress 75 % (95 MB)
99 17:49:44.983950 progress 80 % (101 MB)
100 17:49:45.418906 progress 85 % (108 MB)
101 17:49:45.686296 progress 90 % (114 MB)
102 17:49:46.035271 progress 95 % (120 MB)
103 17:49:46.429891 progress 100 % (127 MB)
104 17:49:46.435476 127 MB downloaded in 7.05 s (18.03 MB/s)
105 17:49:46.435762 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:49:46.436166 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:49:46.436296 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:49:46.436424 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:49:46.436627 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:49:46.436763 saving as /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/modules/modules.tar
112 17:49:46.436863 total size: 253900 (0 MB)
113 17:49:46.436969 Using unxz to decompress xz
114 17:49:46.441934 progress 12 % (0 MB)
115 17:49:46.442403 progress 25 % (0 MB)
116 17:49:46.442668 progress 38 % (0 MB)
117 17:49:46.444262 progress 51 % (0 MB)
118 17:49:46.446019 progress 64 % (0 MB)
119 17:49:46.448012 progress 77 % (0 MB)
120 17:49:46.449888 progress 90 % (0 MB)
121 17:49:46.451675 progress 100 % (0 MB)
122 17:49:46.457397 0 MB downloaded in 0.02 s (11.79 MB/s)
123 17:49:46.457647 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:49:46.457943 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:49:46.458040 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 17:49:46.458138 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 17:49:48.696506 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831907/extract-nfsrootfs-kws_9vh9
129 17:49:48.696713 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 17:49:48.696816 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 17:49:48.696993 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt
132 17:49:48.697136 makedir: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin
133 17:49:48.697239 makedir: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/tests
134 17:49:48.697339 makedir: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/results
135 17:49:48.697444 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-add-keys
136 17:49:48.697587 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-add-sources
137 17:49:48.697721 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-background-process-start
138 17:49:48.697849 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-background-process-stop
139 17:49:48.697978 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-common-functions
140 17:49:48.698101 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-echo-ipv4
141 17:49:48.698231 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-install-packages
142 17:49:48.698369 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-installed-packages
143 17:49:48.698497 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-os-build
144 17:49:48.698622 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-probe-channel
145 17:49:48.698746 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-probe-ip
146 17:49:48.698875 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-target-ip
147 17:49:48.698998 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-target-mac
148 17:49:48.699130 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-target-storage
149 17:49:48.699254 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-case
150 17:49:48.699392 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-event
151 17:49:48.699555 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-feedback
152 17:49:48.699684 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-raise
153 17:49:48.699807 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-reference
154 17:49:48.699936 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-runner
155 17:49:48.700059 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-set
156 17:49:48.700185 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-test-shell
157 17:49:48.700320 Updating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-install-packages (oe)
158 17:49:48.700476 Updating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/bin/lava-installed-packages (oe)
159 17:49:48.700598 Creating /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/environment
160 17:49:48.700693 LAVA metadata
161 17:49:48.700765 - LAVA_JOB_ID=11831907
162 17:49:48.700827 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:49:48.700925 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 17:49:48.700993 skipped lava-vland-overlay
165 17:49:48.701068 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:49:48.701160 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 17:49:48.701223 skipped lava-multinode-overlay
168 17:49:48.701298 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:49:48.701375 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 17:49:48.701445 Loading test definitions
171 17:49:48.701535 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 17:49:48.701606 Using /lava-11831907 at stage 0
173 17:49:48.701934 uuid=11831907_1.5.2.3.1 testdef=None
174 17:49:48.702020 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 17:49:48.702104 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 17:49:48.702619 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 17:49:48.702841 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 17:49:48.703551 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 17:49:48.703779 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 17:49:48.704502 runner path: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/0/tests/0_dmesg test_uuid 11831907_1.5.2.3.1
183 17:49:48.704696 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 17:49:48.705053 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 17:49:48.705152 Using /lava-11831907 at stage 1
187 17:49:48.705533 uuid=11831907_1.5.2.3.5 testdef=None
188 17:49:48.705648 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 17:49:48.705762 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 17:49:48.706469 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 17:49:48.706812 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 17:49:48.707682 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 17:49:48.707909 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 17:49:48.708588 runner path: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/1/tests/1_bootrr test_uuid 11831907_1.5.2.3.5
197 17:49:48.708739 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 17:49:48.708941 Creating lava-test-runner.conf files
200 17:49:48.709002 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/0 for stage 0
201 17:49:48.709089 - 0_dmesg
202 17:49:48.709168 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831907/lava-overlay-i5p7yykt/lava-11831907/1 for stage 1
203 17:49:48.709258 - 1_bootrr
204 17:49:48.709351 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 17:49:48.709434 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 17:49:48.716660 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 17:49:48.716761 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 17:49:48.716844 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 17:49:48.716932 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 17:49:48.717015 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 17:49:48.854947 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 17:49:48.855327 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 17:49:48.855500 extracting modules file /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831907/extract-nfsrootfs-kws_9vh9
214 17:49:48.872146 extracting modules file /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831907/extract-overlay-ramdisk-jmxx1s6j/ramdisk
215 17:49:48.885998 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 17:49:48.886119 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 17:49:48.886208 [common] Applying overlay to NFS
218 17:49:48.886277 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831907/compress-overlay-m6ejqjmz/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831907/extract-nfsrootfs-kws_9vh9
219 17:49:48.894735 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 17:49:48.894849 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 17:49:48.894941 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 17:49:48.895029 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 17:49:48.895112 Building ramdisk /var/lib/lava/dispatcher/tmp/11831907/extract-overlay-ramdisk-jmxx1s6j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831907/extract-overlay-ramdisk-jmxx1s6j/ramdisk
224 17:49:48.965111 >> 26198 blocks
225 17:49:49.503691 rename /var/lib/lava/dispatcher/tmp/11831907/extract-overlay-ramdisk-jmxx1s6j/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
226 17:49:49.504127 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 17:49:49.504246 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 17:49:49.504347 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 17:49:49.504443 No mkimage arch provided, not using FIT.
230 17:49:49.504532 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 17:49:49.504617 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 17:49:49.504719 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 17:49:49.504810 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 17:49:49.504893 No LXC device requested
235 17:49:49.504975 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 17:49:49.505064 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 17:49:49.505147 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 17:49:49.505230 Checking files for TFTP limit of 4294967296 bytes.
239 17:49:49.505642 end: 1 tftp-deploy (duration 00:00:10) [common]
240 17:49:49.505748 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 17:49:49.505838 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 17:49:49.505962 substitutions:
243 17:49:49.506029 - {DTB}: None
244 17:49:49.506090 - {INITRD}: 11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
245 17:49:49.506152 - {KERNEL}: 11831907/tftp-deploy-icbau5dx/kernel/bzImage
246 17:49:49.506210 - {LAVA_MAC}: None
247 17:49:49.506266 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831907/extract-nfsrootfs-kws_9vh9
248 17:49:49.506322 - {NFS_SERVER_IP}: 192.168.201.1
249 17:49:49.506377 - {PRESEED_CONFIG}: None
250 17:49:49.506432 - {PRESEED_LOCAL}: None
251 17:49:49.506486 - {RAMDISK}: 11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
252 17:49:49.506541 - {ROOT_PART}: None
253 17:49:49.506596 - {ROOT}: None
254 17:49:49.506650 - {SERVER_IP}: 192.168.201.1
255 17:49:49.506704 - {TEE}: None
256 17:49:49.506758 Parsed boot commands:
257 17:49:49.506812 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 17:49:49.506987 Parsed boot commands: tftpboot 192.168.201.1 11831907/tftp-deploy-icbau5dx/kernel/bzImage 11831907/tftp-deploy-icbau5dx/kernel/cmdline 11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
259 17:49:49.507078 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 17:49:49.507164 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 17:49:49.507261 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 17:49:49.507344 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 17:49:49.507496 Not connected, no need to disconnect.
264 17:49:49.507577 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 17:49:49.507664 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 17:49:49.507732 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh dell-latitude-5400-8665U-sarien-cbg-4'
267 17:49:49.511724 Setting prompt string to ['lava-test: # ']
268 17:49:49.512079 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 17:49:49.512184 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 17:49:49.512283 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 17:49:49.512376 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 17:49:49.512576 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
273 17:50:06.455123 >> Command sent successfully.
274 17:50:06.462447 Returned 0 in 16 seconds
275 17:50:06.563316 end: 2.2.2.1 pdu-reboot (duration 00:00:17) [common]
277 17:50:06.564273 end: 2.2.2 reset-device (duration 00:00:17) [common]
278 17:50:06.564610 start: 2.2.3 depthcharge-start (timeout 00:04:43) [common]
279 17:50:06.564910 Setting prompt string to 'Starting depthcharge on sarien...'
280 17:50:06.565141 Changing prompt to 'Starting depthcharge on sarien...'
281 17:50:06.565372 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
282 17:50:06.566192 [Enter `^Ec?' for help]
283 17:50:06.566494
284 17:50:06.566722
285 17:50:06.566944 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
286 17:50:06.567161 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
287 17:50:06.567375 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
288 17:50:06.567620 CPU: AES supported, TXT supported, VT supported
289 17:50:06.567815 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
290 17:50:06.568009 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
291 17:50:06.568198 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
292 17:50:06.568387 VBOOT: Loading verstage.
293 17:50:06.568584 CBFS @ 1d00000 size 300000
294 17:50:06.568773 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
295 17:50:06.568960 CBFS: Locating 'fallback/verstage'
296 17:50:06.569148 CBFS: Found @ offset 10f6c0 size 1435c
297 17:50:06.569336
298 17:50:06.569552
299 17:50:06.569744 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
300 17:50:06.569934 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
301 17:50:06.570122 done! DID_VID 0x00281ae0
302 17:50:06.570307 TPM ready after 0 ms
303 17:50:06.570493 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
304 17:50:06.570681 tlcl_send_startup: Startup return code is 0
305 17:50:06.570868 TPM: setup succeeded
306 17:50:06.571052 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
307 17:50:06.571241 Checking cr50 for recovery request
308 17:50:06.571449 Phase 1
309 17:50:06.571639 FMAP: Found "FLASH" version 1.1 at 1c10000.
310 17:50:06.571826 FMAP: base = fe000000 size = 2000000 #areas = 37
311 17:50:06.572014 FMAP: area GBB found @ 1c11000 (978944 bytes)
312 17:50:06.572202 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
313 17:50:06.572389 Phase 2
314 17:50:06.572574 Phase 3
315 17:50:06.572758 FMAP: area GBB found @ 1c11000 (978944 bytes)
316 17:50:06.572944 VB2:vb2_report_dev_firmware() This is developer signed firmware
317 17:50:06.573132 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
318 17:50:06.573319 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
319 17:50:06.573504 VB2:vb2_verify_keyblock() Checking key block signature...
320 17:50:06.573688 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
321 17:50:06.573874 FMAP: area VBLOCK_A found @ 16d0000 (65536 bytes)
322 17:50:06.574057 VB2:vb2_verify_fw_preamble() Verifying preamble.
323 17:50:06.574241 Phase 4
324 17:50:06.574425 FMAP: area FW_MAIN_A found @ 16e0000 (2555840 bytes)
325 17:50:06.574611 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
326 17:50:06.574796 VB2:vb2_rsa_verify_digest() Digest check failed!
327 17:50:06.574980 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
328 17:50:06.575166 Saving nvdata
329 17:50:06.575349 Reboot requested (10020007)
330 17:50:06.575626 board_reset() called!
331 17:50:06.575929 full_reset() called!
332 17:50:10.738027
333 17:50:10.738620
334 17:50:10.746291 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
335 17:50:10.751354 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
336 17:50:10.756264 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
337 17:50:10.760663 CPU: AES supported, TXT supported, VT supported
338 17:50:10.765946 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
339 17:50:10.770557 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
340 17:50:10.776402 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
341 17:50:10.779471 VBOOT: Loading verstage.
342 17:50:10.782824 CBFS @ 1d00000 size 300000
343 17:50:10.788664 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
344 17:50:10.792536 CBFS: Locating 'fallback/verstage'
345 17:50:10.804617 CBFS: Found @ offset 10f6c0 size 1435c
346 17:50:10.811620
347 17:50:10.812055
348 17:50:10.819027 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
349 17:50:10.826101 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
350 17:50:10.951085 .done! DID_VID 0x00281ae0
351 17:50:10.954041 TPM ready after 0 ms
352 17:50:10.956863 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
353 17:50:11.035031 tlcl_send_startup: Startup return code is 0
354 17:50:11.037178 TPM: setup succeeded
355 17:50:11.054657 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
356 17:50:11.057670 Checking cr50 for recovery request
357 17:50:11.067477 Phase 1
358 17:50:11.072202 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 17:50:11.077701 FMAP: base = fe000000 size = 2000000 #areas = 37
360 17:50:11.083055 FMAP: area GBB found @ 1c11000 (978944 bytes)
361 17:50:11.089649 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 17:50:11.095804 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 17:50:11.099036 Recovery requested (1009000e)
364 17:50:11.100117 Saving nvdata
365 17:50:11.116634 tlcl_extend: response is 0
366 17:50:11.131818 tlcl_extend: response is 0
367 17:50:11.135830 CBFS @ 1d00000 size 300000
368 17:50:11.142240 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
369 17:50:11.146173 CBFS: Locating 'fallback/romstage'
370 17:50:11.148597 CBFS: Found @ offset 80 size 15b2c
371 17:50:11.150391
372 17:50:11.150947
373 17:50:11.158715 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
374 17:50:11.164520 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
375 17:50:11.168551 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 17:50:11.171907 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
377 17:50:11.177074 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 17:50:11.181293 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
379 17:50:11.183123 TCO_STS: 0000 0004
380 17:50:11.186558 GEN_PMCON: d0015209 00002200
381 17:50:11.190102 GBLRST_CAUSE: 00000000 00000000
382 17:50:11.191070 prev_sleep_state 5
383 17:50:11.195522 Boot Count incremented to 37847
384 17:50:11.198514 CBFS @ 1d00000 size 300000
385 17:50:11.204957 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 17:50:11.207223 CBFS: Locating 'fspm.bin'
387 17:50:11.210998 CBFS: Found @ offset 60fc0 size 70000
388 17:50:11.216685 FMAP: Found "FLASH" version 1.1 at 1c10000.
389 17:50:11.221609 FMAP: base = fe000000 size = 2000000 #areas = 37
390 17:50:11.227136 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
391 17:50:11.233410 Probing TPM I2C: done! DID_VID 0x00281ae0
392 17:50:11.235845 Locality already claimed
393 17:50:11.239176 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
394 17:50:11.258852 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
395 17:50:11.265135 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 17:50:11.267831 MRC cache found, size 18e0
397 17:50:11.270606 bootmode is set to :2
398 17:50:11.363104 CBMEM:
399 17:50:11.366143 IMD: root @ 89fff000 254 entries.
400 17:50:11.369063 IMD: root @ 89ffec00 62 entries.
401 17:50:11.371878 External stage cache:
402 17:50:11.375214 IMD: root @ 8abff000 254 entries.
403 17:50:11.379215 IMD: root @ 8abfec00 62 entries.
404 17:50:11.384498 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
405 17:50:11.388779 creating vboot_handoff structure
406 17:50:11.408995 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
407 17:50:11.425286 tlcl_write: response is 0
408 17:50:11.444235 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
409 17:50:11.447586 MRC: TPM MRC hash updated successfully.
410 17:50:11.448974 1 DIMMs found
411 17:50:11.451923 top_of_ram = 0x8a000000
412 17:50:11.457716 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
413 17:50:11.462979 MTRR Range: Start=ff000000 End=0 (Size 1000000)
414 17:50:11.464775 CBFS @ 1d00000 size 300000
415 17:50:11.471623 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
416 17:50:11.475064 CBFS: Locating 'fallback/postcar'
417 17:50:11.479048 CBFS: Found @ offset 107000 size 41a4
418 17:50:11.485114 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
419 17:50:11.495280 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
420 17:50:11.500311 Processing 126 relocs. Offset value of 0x87cdd000
421 17:50:11.503488
422 17:50:11.503938
423 17:50:11.511071 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
424 17:50:11.514554 CBFS @ 1d00000 size 300000
425 17:50:11.520349 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
426 17:50:11.524059 CBFS: Locating 'fallback/ramstage'
427 17:50:11.528661 CBFS: Found @ offset 458c0 size 1a8a8
428 17:50:11.535361 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
429 17:50:11.563727 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
430 17:50:11.569057 Processing 3754 relocs. Offset value of 0x88e81000
431 17:50:11.574800
432 17:50:11.575361
433 17:50:11.583715 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
434 17:50:11.588138 FMAP: Found "FLASH" version 1.1 at 1c10000.
435 17:50:11.592544 FMAP: base = fe000000 size = 2000000 #areas = 37
436 17:50:11.597856 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
437 17:50:11.601835 WARNING: RO_VPD is uninitialized or empty.
438 17:50:11.606486 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
439 17:50:11.612148 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
440 17:50:11.612855 Normal boot.
441 17:50:11.619613 BS: BS_PRE_DEVICE times (us): entry 0 run 59 exit 1161
442 17:50:11.623057 CBFS @ 1d00000 size 300000
443 17:50:11.628514 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
444 17:50:11.632878 CBFS: Locating 'cpu_microcode_blob.bin'
445 17:50:11.636463 CBFS: Found @ offset 15c40 size 2fc00
446 17:50:11.640758 microcode: sig=0x806ec pf=0x80 revision=0xb7
447 17:50:11.643375 Skip microcode update
448 17:50:11.646251 CBFS @ 1d00000 size 300000
449 17:50:11.652147 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
450 17:50:11.654781 CBFS: Locating 'fsps.bin'
451 17:50:11.658713 CBFS: Found @ offset d1fc0 size 35000
452 17:50:11.694256 Detected 4 core, 8 thread CPU.
453 17:50:11.695804 Setting up SMI for CPU
454 17:50:11.698356 IED base = 0x8ac00000
455 17:50:11.701098 IED size = 0x00400000
456 17:50:11.703000 Will perform SMM setup.
457 17:50:11.708025 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
458 17:50:11.716054 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
459 17:50:11.720485 Processing 16 relocs. Offset value of 0x00030000
460 17:50:11.723501 Attempting to start 7 APs
461 17:50:11.728067 Waiting for 10ms after sending INIT.
462 17:50:11.742936 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
463 17:50:11.744262 done.
464 17:50:11.746123 AP: slot 4 apic_id 3.
465 17:50:11.747988 AP: slot 1 apic_id 2.
466 17:50:11.750599 AP: slot 2 apic_id 6.
467 17:50:11.752741 AP: slot 7 apic_id 7.
468 17:50:11.754524 AP: slot 5 apic_id 4.
469 17:50:11.757903 AP: slot 6 apic_id 5.
470 17:50:11.761358 Waiting for 2nd SIPI to complete...done.
471 17:50:11.769291 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
472 17:50:11.774226 Processing 13 relocs. Offset value of 0x00038000
473 17:50:11.780647 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
474 17:50:11.784227 Installing SMM handler to 0x8a000000
475 17:50:11.792055 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
476 17:50:11.797521 Processing 867 relocs. Offset value of 0x8a010000
477 17:50:11.805627 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
478 17:50:11.810630 Processing 13 relocs. Offset value of 0x8a008000
479 17:50:11.816576 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
480 17:50:11.822158 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
481 17:50:11.827567 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
482 17:50:11.833521 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
483 17:50:11.838834 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
484 17:50:11.844669 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
485 17:50:11.850425 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
486 17:50:11.857301 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
487 17:50:11.860232 Clearing SMI status registers
488 17:50:11.862942 SMI_STS: PM1
489 17:50:11.864513 PM1_STS: WAK PWRBTN
490 17:50:11.867379 TCO_STS: BOOT SECOND_TO
491 17:50:11.869606 GPE0 STD STS: eSPI
492 17:50:11.871571 New SMBASE 0x8a000000
493 17:50:11.874586 In relocation handler: CPU 0
494 17:50:11.878489 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
495 17:50:11.883015 Writing SMRR. base = 0x8a000006, mask=0xff000800
496 17:50:11.885280 Relocation complete.
497 17:50:11.886988 New SMBASE 0x89fff400
498 17:50:11.891136 In relocation handler: CPU 3
499 17:50:11.894291 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
500 17:50:11.899198 Writing SMRR. base = 0x8a000006, mask=0xff000800
501 17:50:11.901833 Relocation complete.
502 17:50:11.903804 New SMBASE 0x89fff800
503 17:50:11.906740 In relocation handler: CPU 2
504 17:50:11.910981 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
505 17:50:11.916245 Writing SMRR. base = 0x8a000006, mask=0xff000800
506 17:50:11.918498 Relocation complete.
507 17:50:11.920627 New SMBASE 0x89ffe400
508 17:50:11.922600 In relocation handler: CPU 7
509 17:50:11.927353 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
510 17:50:11.932024 Writing SMRR. base = 0x8a000006, mask=0xff000800
511 17:50:11.933982 Relocation complete.
512 17:50:11.936334 New SMBASE 0x89ffe800
513 17:50:11.938936 In relocation handler: CPU 6
514 17:50:11.943254 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
515 17:50:11.948302 Writing SMRR. base = 0x8a000006, mask=0xff000800
516 17:50:11.950296 Relocation complete.
517 17:50:11.953217 New SMBASE 0x89ffec00
518 17:50:11.955294 In relocation handler: CPU 5
519 17:50:11.960203 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
520 17:50:11.964307 Writing SMRR. base = 0x8a000006, mask=0xff000800
521 17:50:11.967180 Relocation complete.
522 17:50:11.969665 New SMBASE 0x89fffc00
523 17:50:11.971845 In relocation handler: CPU 1
524 17:50:11.976507 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
525 17:50:11.981527 Writing SMRR. base = 0x8a000006, mask=0xff000800
526 17:50:11.983316 Relocation complete.
527 17:50:11.985606 New SMBASE 0x89fff000
528 17:50:11.988622 In relocation handler: CPU 4
529 17:50:11.992168 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
530 17:50:11.997346 Writing SMRR. base = 0x8a000006, mask=0xff000800
531 17:50:11.999829 Relocation complete.
532 17:50:12.001660 Initializing CPU #0
533 17:50:12.004473 CPU: vendor Intel device 806ec
534 17:50:12.008857 CPU: family 06, model 8e, stepping 0c
535 17:50:12.011108 Clearing out pending MCEs
536 17:50:12.016144 Setting up local APIC... apic_id: 0x00 done.
537 17:50:12.018632 Turbo is available but hidden
538 17:50:12.021114 Turbo has been enabled
539 17:50:12.022580 VMX status: enabled
540 17:50:12.026905 IA32_FEATURE_CONTROL status: locked
541 17:50:12.028604 Skip microcode update
542 17:50:12.031444 CPU #0 initialized
543 17:50:12.033959 Initializing CPU #3
544 17:50:12.034900 Initializing CPU #4
545 17:50:12.037606 Initializing CPU #1
546 17:50:12.040584 CPU: vendor Intel device 806ec
547 17:50:12.043813 CPU: family 06, model 8e, stepping 0c
548 17:50:12.047312 CPU: vendor Intel device 806ec
549 17:50:12.051546 CPU: family 06, model 8e, stepping 0c
550 17:50:12.053327 Clearing out pending MCEs
551 17:50:12.056239 Clearing out pending MCEs
552 17:50:12.060799 Setting up local APIC...Initializing CPU #7
553 17:50:12.064875 Setting up local APIC...Initializing CPU #6
554 17:50:12.066515 Initializing CPU #5
555 17:50:12.070467 CPU: vendor Intel device 806ec
556 17:50:12.074081 CPU: family 06, model 8e, stepping 0c
557 17:50:12.077114 CPU: vendor Intel device 806ec
558 17:50:12.080432 CPU: family 06, model 8e, stepping 0c
559 17:50:12.083981 Clearing out pending MCEs
560 17:50:12.086671 Clearing out pending MCEs
561 17:50:12.090729 Setting up local APIC... apic_id: 0x02 done.
562 17:50:12.092446 apic_id: 0x03 done.
563 17:50:12.094774 VMX status: enabled
564 17:50:12.097117 VMX status: enabled
565 17:50:12.100097 IA32_FEATURE_CONTROL status: locked
566 17:50:12.104008 IA32_FEATURE_CONTROL status: locked
567 17:50:12.105930 Skip microcode update
568 17:50:12.108446 Skip microcode update
569 17:50:12.110706 CPU #1 initialized
570 17:50:12.112130 CPU #4 initialized
571 17:50:12.115252 CPU: vendor Intel device 806ec
572 17:50:12.119164 CPU: family 06, model 8e, stepping 0c
573 17:50:12.121948 apic_id: 0x05 done.
574 17:50:12.127148 Setting up local APIC...CPU: vendor Intel device 806ec
575 17:50:12.131327 CPU: family 06, model 8e, stepping 0c
576 17:50:12.132584 Initializing CPU #2
577 17:50:12.135443 Clearing out pending MCEs
578 17:50:12.138325 CPU: vendor Intel device 806ec
579 17:50:12.142263 CPU: family 06, model 8e, stepping 0c
580 17:50:12.146265 Setting up local APIC...VMX status: enabled
581 17:50:12.148474 apic_id: 0x04 done.
582 17:50:12.151768 IA32_FEATURE_CONTROL status: locked
583 17:50:12.154720 VMX status: enabled
584 17:50:12.156328 Skip microcode update
585 17:50:12.159703 IA32_FEATURE_CONTROL status: locked
586 17:50:12.162434 CPU #6 initialized
587 17:50:12.163984 Skip microcode update
588 17:50:12.167034 Clearing out pending MCEs
589 17:50:12.169209 CPU #5 initialized
590 17:50:12.171473 Clearing out pending MCEs
591 17:50:12.174353 apic_id: 0x07 done.
592 17:50:12.180279 Setting up local APIC...Setting up local APIC... apic_id: 0x06 done.
593 17:50:12.182582 VMX status: enabled
594 17:50:12.184831 VMX status: enabled
595 17:50:12.187693 IA32_FEATURE_CONTROL status: locked
596 17:50:12.191169 IA32_FEATURE_CONTROL status: locked
597 17:50:12.194283 Skip microcode update
598 17:50:12.195681 Skip microcode update
599 17:50:12.198383 CPU #7 initialized
600 17:50:12.200079 CPU #2 initialized
601 17:50:12.202266 apic_id: 0x01 done.
602 17:50:12.203798 VMX status: enabled
603 17:50:12.208074 IA32_FEATURE_CONTROL status: locked
604 17:50:12.209586 Skip microcode update
605 17:50:12.212206 CPU #3 initialized
606 17:50:12.216570 bsp_do_flight_plan done after 451 msecs.
607 17:50:12.219361 CPU: frequency set to 4800 MHz
608 17:50:12.221351 Enabling SMIs.
609 17:50:12.222603 Locking SMM.
610 17:50:12.225726 CBFS @ 1d00000 size 300000
611 17:50:12.231939 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
612 17:50:12.234224 CBFS: Locating 'vbt.bin'
613 17:50:12.237692 CBFS: Found @ offset 60a40 size 4a0
614 17:50:12.242421 Found a VBT of 4608 bytes after decompression
615 17:50:12.256007 FMAP: area GBB found @ 1c11000 (978944 bytes)
616 17:50:12.316619 Detected 4 core, 8 thread CPU.
617 17:50:12.319719 Detected 4 core, 8 thread CPU.
618 17:50:12.546140 Display FSP Version Info HOB
619 17:50:12.549637 Reference Code - CPU = 7.0.5e.40
620 17:50:12.551764 uCode Version = 0.0.0.b8
621 17:50:12.555629 Display FSP Version Info HOB
622 17:50:12.557617 Reference Code - ME = 7.0.5e.40
623 17:50:12.560962 MEBx version = 0.0.0.0
624 17:50:12.564403 ME Firmware Version = Consumer SKU
625 17:50:12.567478 Display FSP Version Info HOB
626 17:50:12.570716 Reference Code - CNL PCH = 7.0.5e.40
627 17:50:12.572864 PCH-CRID Status = Disabled
628 17:50:12.576634 CNL PCH H A0 Hsio Version = 2.0.0.0
629 17:50:12.580693 CNL PCH H Ax Hsio Version = 9.0.0.0
630 17:50:12.583656 CNL PCH H Bx Hsio Version = a.0.0.0
631 17:50:12.587526 CNL PCH LP B0 Hsio Version = 7.0.0.0
632 17:50:12.591104 CNL PCH LP Bx Hsio Version = 6.0.0.0
633 17:50:12.595534 CNL PCH LP Dx Hsio Version = 7.0.0.0
634 17:50:12.597612 Display FSP Version Info HOB
635 17:50:12.602945 Reference Code - SA - System Agent = 7.0.5e.40
636 17:50:12.605414 Reference Code - MRC = 0.7.1.68
637 17:50:12.609587 SA - PCIe Version = 7.0.5e.40
638 17:50:12.611520 SA-CRID Status = Disabled
639 17:50:12.614373 SA-CRID Original Value = 0.0.0.c
640 17:50:12.617474 SA-CRID New Value = 0.0.0.c
641 17:50:12.636607 RTC Init
642 17:50:12.640359 Set power off after power failure.
643 17:50:12.641865 Disabling Deep S3
644 17:50:12.643694 Disabling Deep S3
645 17:50:12.645912 Disabling Deep S4
646 17:50:12.647145 Disabling Deep S4
647 17:50:12.649428 Disabling Deep S5
648 17:50:12.650879 Disabling Deep S5
649 17:50:12.658487 BS: BS_DEV_INIT_CHIPS times (us): entry 602904 run 412481 exit 16222
650 17:50:12.660438 Enumerating buses...
651 17:50:12.664849 Show all devs... Before device enumeration.
652 17:50:12.666696 Root Device: enabled 1
653 17:50:12.669751 CPU_CLUSTER: 0: enabled 1
654 17:50:12.672147 DOMAIN: 0000: enabled 1
655 17:50:12.673915 APIC: 00: enabled 1
656 17:50:12.676075 PCI: 00:00.0: enabled 1
657 17:50:12.679332 PCI: 00:02.0: enabled 1
658 17:50:12.681545 PCI: 00:04.0: enabled 1
659 17:50:12.683972 PCI: 00:12.0: enabled 1
660 17:50:12.685995 PCI: 00:12.5: enabled 0
661 17:50:12.688306 PCI: 00:12.6: enabled 0
662 17:50:12.691570 PCI: 00:13.0: enabled 0
663 17:50:12.693122 PCI: 00:14.0: enabled 1
664 17:50:12.696157 PCI: 00:14.1: enabled 0
665 17:50:12.698719 PCI: 00:14.3: enabled 1
666 17:50:12.700317 PCI: 00:14.5: enabled 0
667 17:50:12.702832 PCI: 00:15.0: enabled 1
668 17:50:12.705479 PCI: 00:15.1: enabled 1
669 17:50:12.708331 PCI: 00:15.2: enabled 0
670 17:50:12.710435 PCI: 00:15.3: enabled 0
671 17:50:12.712335 PCI: 00:16.0: enabled 1
672 17:50:12.715913 PCI: 00:16.1: enabled 0
673 17:50:12.718030 PCI: 00:16.2: enabled 0
674 17:50:12.719751 PCI: 00:16.3: enabled 0
675 17:50:12.722228 PCI: 00:16.4: enabled 0
676 17:50:12.725308 PCI: 00:16.5: enabled 0
677 17:50:12.727681 PCI: 00:17.0: enabled 1
678 17:50:12.730217 PCI: 00:19.0: enabled 1
679 17:50:12.732531 PCI: 00:19.1: enabled 0
680 17:50:12.734933 PCI: 00:19.2: enabled 1
681 17:50:12.737094 PCI: 00:1a.0: enabled 0
682 17:50:12.739310 PCI: 00:1c.0: enabled 1
683 17:50:12.741727 PCI: 00:1c.1: enabled 0
684 17:50:12.744238 PCI: 00:1c.2: enabled 0
685 17:50:12.746893 PCI: 00:1c.3: enabled 0
686 17:50:12.749073 PCI: 00:1c.4: enabled 0
687 17:50:12.751977 PCI: 00:1c.5: enabled 0
688 17:50:12.754086 PCI: 00:1c.6: enabled 0
689 17:50:12.756277 PCI: 00:1c.7: enabled 1
690 17:50:12.758990 PCI: 00:1d.0: enabled 1
691 17:50:12.761706 PCI: 00:1d.1: enabled 1
692 17:50:12.763573 PCI: 00:1d.2: enabled 0
693 17:50:12.765871 PCI: 00:1d.3: enabled 0
694 17:50:12.768972 PCI: 00:1d.4: enabled 1
695 17:50:12.771255 PCI: 00:1e.0: enabled 0
696 17:50:12.773953 PCI: 00:1e.1: enabled 0
697 17:50:12.775448 PCI: 00:1e.2: enabled 0
698 17:50:12.779127 PCI: 00:1e.3: enabled 0
699 17:50:12.780435 PCI: 00:1f.0: enabled 1
700 17:50:12.783374 PCI: 00:1f.1: enabled 1
701 17:50:12.785396 PCI: 00:1f.2: enabled 1
702 17:50:12.788082 PCI: 00:1f.3: enabled 1
703 17:50:12.790229 PCI: 00:1f.4: enabled 1
704 17:50:12.792744 PCI: 00:1f.5: enabled 1
705 17:50:12.794942 PCI: 00:1f.6: enabled 1
706 17:50:12.797223 USB0 port 0: enabled 1
707 17:50:12.800432 I2C: 00:10: enabled 1
708 17:50:12.802112 I2C: 00:10: enabled 1
709 17:50:12.804373 I2C: 00:34: enabled 1
710 17:50:12.807109 I2C: 00:2c: enabled 1
711 17:50:12.808893 I2C: 00:50: enabled 1
712 17:50:12.811172 PNP: 0c09.0: enabled 1
713 17:50:12.814141 USB2 port 0: enabled 1
714 17:50:12.816169 USB2 port 1: enabled 1
715 17:50:12.818654 USB2 port 2: enabled 1
716 17:50:12.820217 USB2 port 4: enabled 1
717 17:50:12.823136 USB2 port 5: enabled 1
718 17:50:12.824946 USB2 port 6: enabled 1
719 17:50:12.827303 USB2 port 7: enabled 1
720 17:50:12.830008 USB2 port 8: enabled 1
721 17:50:12.832440 USB2 port 9: enabled 1
722 17:50:12.834981 USB3 port 0: enabled 1
723 17:50:12.836782 USB3 port 1: enabled 1
724 17:50:12.840010 USB3 port 2: enabled 1
725 17:50:12.841855 USB3 port 3: enabled 1
726 17:50:12.843711 USB3 port 4: enabled 1
727 17:50:12.846649 APIC: 02: enabled 1
728 17:50:12.848329 APIC: 06: enabled 1
729 17:50:12.850274 APIC: 01: enabled 1
730 17:50:12.852128 APIC: 03: enabled 1
731 17:50:12.854255 APIC: 04: enabled 1
732 17:50:12.856330 APIC: 05: enabled 1
733 17:50:12.858633 APIC: 07: enabled 1
734 17:50:12.860250 Compare with tree...
735 17:50:12.862619 Root Device: enabled 1
736 17:50:12.865434 CPU_CLUSTER: 0: enabled 1
737 17:50:12.867416 APIC: 00: enabled 1
738 17:50:12.869649 APIC: 02: enabled 1
739 17:50:12.872654 APIC: 06: enabled 1
740 17:50:12.874353 APIC: 01: enabled 1
741 17:50:12.876505 APIC: 03: enabled 1
742 17:50:12.878892 APIC: 04: enabled 1
743 17:50:12.881522 APIC: 05: enabled 1
744 17:50:12.883956 APIC: 07: enabled 1
745 17:50:12.886348 DOMAIN: 0000: enabled 1
746 17:50:12.888571 PCI: 00:00.0: enabled 1
747 17:50:12.890768 PCI: 00:02.0: enabled 1
748 17:50:12.894106 PCI: 00:04.0: enabled 1
749 17:50:12.896073 PCI: 00:12.0: enabled 1
750 17:50:12.899672 PCI: 00:12.5: enabled 0
751 17:50:12.901256 PCI: 00:12.6: enabled 0
752 17:50:12.904267 PCI: 00:13.0: enabled 0
753 17:50:12.907071 PCI: 00:14.0: enabled 1
754 17:50:12.909478 USB0 port 0: enabled 1
755 17:50:12.912449 USB2 port 0: enabled 1
756 17:50:12.914897 USB2 port 1: enabled 1
757 17:50:12.917537 USB2 port 2: enabled 1
758 17:50:12.920942 USB2 port 4: enabled 1
759 17:50:12.922806 USB2 port 5: enabled 1
760 17:50:12.926090 USB2 port 6: enabled 1
761 17:50:12.928148 USB2 port 7: enabled 1
762 17:50:12.931483 USB2 port 8: enabled 1
763 17:50:12.934020 USB2 port 9: enabled 1
764 17:50:12.936968 USB3 port 0: enabled 1
765 17:50:12.939739 USB3 port 1: enabled 1
766 17:50:12.941726 USB3 port 2: enabled 1
767 17:50:12.945272 USB3 port 3: enabled 1
768 17:50:12.947807 USB3 port 4: enabled 1
769 17:50:12.950328 PCI: 00:14.1: enabled 0
770 17:50:12.953291 PCI: 00:14.3: enabled 1
771 17:50:12.955408 PCI: 00:14.5: enabled 0
772 17:50:12.958182 PCI: 00:15.0: enabled 1
773 17:50:12.961145 I2C: 00:10: enabled 1
774 17:50:12.963483 I2C: 00:10: enabled 1
775 17:50:12.965774 I2C: 00:34: enabled 1
776 17:50:12.968957 PCI: 00:15.1: enabled 1
777 17:50:12.971309 I2C: 00:2c: enabled 1
778 17:50:12.973173 PCI: 00:15.2: enabled 0
779 17:50:12.976171 PCI: 00:15.3: enabled 0
780 17:50:12.978889 PCI: 00:16.0: enabled 1
781 17:50:12.981622 PCI: 00:16.1: enabled 0
782 17:50:12.983845 PCI: 00:16.2: enabled 0
783 17:50:12.986641 PCI: 00:16.3: enabled 0
784 17:50:12.989123 PCI: 00:16.4: enabled 0
785 17:50:12.991988 PCI: 00:16.5: enabled 0
786 17:50:12.994378 PCI: 00:17.0: enabled 1
787 17:50:12.996733 PCI: 00:19.0: enabled 1
788 17:50:12.999521 I2C: 00:50: enabled 1
789 17:50:13.002261 PCI: 00:19.1: enabled 0
790 17:50:13.004730 PCI: 00:19.2: enabled 1
791 17:50:13.007300 PCI: 00:1a.0: enabled 0
792 17:50:13.009978 PCI: 00:1c.0: enabled 1
793 17:50:13.012587 PCI: 00:1c.1: enabled 0
794 17:50:13.015292 PCI: 00:1c.2: enabled 0
795 17:50:13.018546 PCI: 00:1c.3: enabled 0
796 17:50:13.020711 PCI: 00:1c.4: enabled 0
797 17:50:13.023433 PCI: 00:1c.5: enabled 0
798 17:50:13.025908 PCI: 00:1c.6: enabled 0
799 17:50:13.029144 PCI: 00:1c.7: enabled 1
800 17:50:13.031773 PCI: 00:1d.0: enabled 1
801 17:50:13.033617 PCI: 00:1d.1: enabled 1
802 17:50:13.036128 PCI: 00:1d.2: enabled 0
803 17:50:13.038525 PCI: 00:1d.3: enabled 0
804 17:50:13.042120 PCI: 00:1d.4: enabled 1
805 17:50:13.044222 PCI: 00:1e.0: enabled 0
806 17:50:13.046548 PCI: 00:1e.1: enabled 0
807 17:50:13.049029 PCI: 00:1e.2: enabled 0
808 17:50:13.051654 PCI: 00:1e.3: enabled 0
809 17:50:13.054525 PCI: 00:1f.0: enabled 1
810 17:50:13.057806 PNP: 0c09.0: enabled 1
811 17:50:13.060214 PCI: 00:1f.1: enabled 1
812 17:50:13.062707 PCI: 00:1f.2: enabled 1
813 17:50:13.065116 PCI: 00:1f.3: enabled 1
814 17:50:13.067771 PCI: 00:1f.4: enabled 1
815 17:50:13.070555 PCI: 00:1f.5: enabled 1
816 17:50:13.072790 PCI: 00:1f.6: enabled 1
817 17:50:13.075404 Root Device scanning...
818 17:50:13.079156 root_dev_scan_bus for Root Device
819 17:50:13.081322 CPU_CLUSTER: 0 enabled
820 17:50:13.083994 DOMAIN: 0000 enabled
821 17:50:13.086579 DOMAIN: 0000 scanning...
822 17:50:13.090291 PCI: pci_scan_bus for bus 00
823 17:50:13.092450 PCI: 00:00.0 [8086/0000] ops
824 17:50:13.095540 PCI: 00:00.0 [8086/3e34] enabled
825 17:50:13.099177 PCI: 00:02.0 [8086/0000] ops
826 17:50:13.102397 PCI: 00:02.0 [8086/3ea0] enabled
827 17:50:13.105153 PCI: 00:04.0 [8086/1903] enabled
828 17:50:13.108191 PCI: 00:08.0 [8086/1911] enabled
829 17:50:13.112046 PCI: 00:12.0 [8086/9df9] enabled
830 17:50:13.115521 PCI: 00:14.0 [8086/0000] bus ops
831 17:50:13.118625 PCI: 00:14.0 [8086/9ded] enabled
832 17:50:13.122016 PCI: 00:14.2 [8086/9def] enabled
833 17:50:13.125401 PCI: 00:14.3 [8086/9df0] enabled
834 17:50:13.128427 PCI: 00:15.0 [8086/0000] bus ops
835 17:50:13.131873 PCI: 00:15.0 [8086/9de8] enabled
836 17:50:13.135042 PCI: 00:15.1 [8086/0000] bus ops
837 17:50:13.138032 PCI: 00:15.1 [8086/9de9] enabled
838 17:50:13.141798 PCI: 00:16.0 [8086/0000] ops
839 17:50:13.145590 PCI: 00:16.0 [8086/9de0] enabled
840 17:50:13.147327 PCI: 00:17.0 [8086/0000] ops
841 17:50:13.151001 PCI: 00:17.0 [8086/9dd3] enabled
842 17:50:13.154035 PCI: 00:19.0 [8086/0000] bus ops
843 17:50:13.158364 PCI: 00:19.0 [8086/9dc5] enabled
844 17:50:13.160782 PCI: 00:19.2 [8086/0000] ops
845 17:50:13.163594 PCI: 00:19.2 [8086/9dc7] enabled
846 17:50:13.167040 PCI: 00:1c.0 [8086/0000] bus ops
847 17:50:13.170649 PCI: 00:1c.0 [8086/9dbf] enabled
848 17:50:13.175939 PCI: Static device PCI: 00:1c.7 not found, disabling it.
849 17:50:13.179406 PCI: 00:1d.0 [8086/0000] bus ops
850 17:50:13.182566 PCI: 00:1d.0 [8086/9db4] enabled
851 17:50:13.188615 PCI: Static device PCI: 00:1d.1 not found, disabling it.
852 17:50:13.194446 PCI: Static device PCI: 00:1d.4 not found, disabling it.
853 17:50:13.197261 PCI: 00:1f.0 [8086/0000] bus ops
854 17:50:13.200536 PCI: 00:1f.0 [8086/9d84] enabled
855 17:50:13.205942 PCI: Static device PCI: 00:1f.1 not found, disabling it.
856 17:50:13.211768 PCI: Static device PCI: 00:1f.2 not found, disabling it.
857 17:50:13.215643 PCI: 00:1f.3 [8086/0000] bus ops
858 17:50:13.218336 PCI: 00:1f.3 [8086/9dc8] enabled
859 17:50:13.222738 PCI: 00:1f.4 [8086/0000] bus ops
860 17:50:13.225190 PCI: 00:1f.4 [8086/9da3] enabled
861 17:50:13.229109 PCI: 00:1f.5 [8086/0000] bus ops
862 17:50:13.231676 PCI: 00:1f.5 [8086/9da4] enabled
863 17:50:13.235267 PCI: 00:1f.6 [8086/15be] enabled
864 17:50:13.238846 PCI: Leftover static devices:
865 17:50:13.239554 PCI: 00:12.5
866 17:50:13.241602 PCI: 00:12.6
867 17:50:13.242199 PCI: 00:13.0
868 17:50:13.243492 PCI: 00:14.1
869 17:50:13.245586 PCI: 00:14.5
870 17:50:13.246159 PCI: 00:15.2
871 17:50:13.247798 PCI: 00:15.3
872 17:50:13.249034 PCI: 00:16.1
873 17:50:13.250875 PCI: 00:16.2
874 17:50:13.252166 PCI: 00:16.3
875 17:50:13.252939 PCI: 00:16.4
876 17:50:13.254545 PCI: 00:16.5
877 17:50:13.256095 PCI: 00:19.1
878 17:50:13.257063 PCI: 00:1a.0
879 17:50:13.258707 PCI: 00:1c.1
880 17:50:13.260384 PCI: 00:1c.2
881 17:50:13.261715 PCI: 00:1c.3
882 17:50:13.262639 PCI: 00:1c.4
883 17:50:13.264551 PCI: 00:1c.5
884 17:50:13.265650 PCI: 00:1c.6
885 17:50:13.267255 PCI: 00:1c.7
886 17:50:13.267941 PCI: 00:1d.1
887 17:50:13.269375 PCI: 00:1d.2
888 17:50:13.271048 PCI: 00:1d.3
889 17:50:13.272788 PCI: 00:1d.4
890 17:50:13.274376 PCI: 00:1e.0
891 17:50:13.275250 PCI: 00:1e.1
892 17:50:13.276764 PCI: 00:1e.2
893 17:50:13.278282 PCI: 00:1e.3
894 17:50:13.279749 PCI: 00:1f.1
895 17:50:13.280925 PCI: 00:1f.2
896 17:50:13.283189 PCI: Check your devicetree.cb.
897 17:50:13.286089 PCI: 00:14.0 scanning...
898 17:50:13.290016 scan_usb_bus for PCI: 00:14.0
899 17:50:13.291241 USB0 port 0 enabled
900 17:50:13.294289 USB0 port 0 scanning...
901 17:50:13.297132 scan_usb_bus for USB0 port 0
902 17:50:13.298880 USB2 port 0 enabled
903 17:50:13.301342 USB2 port 1 enabled
904 17:50:13.303612 USB2 port 2 enabled
905 17:50:13.305942 USB2 port 4 enabled
906 17:50:13.307819 USB2 port 5 enabled
907 17:50:13.309634 USB2 port 6 enabled
908 17:50:13.311299 USB2 port 7 enabled
909 17:50:13.313504 USB2 port 8 enabled
910 17:50:13.315792 USB2 port 9 enabled
911 17:50:13.317758 USB3 port 0 enabled
912 17:50:13.319684 USB3 port 1 enabled
913 17:50:13.322142 USB3 port 2 enabled
914 17:50:13.324391 USB3 port 3 enabled
915 17:50:13.326007 USB3 port 4 enabled
916 17:50:13.328349 USB2 port 0 scanning...
917 17:50:13.331281 scan_usb_bus for USB2 port 0
918 17:50:13.334777 scan_usb_bus for USB2 port 0 done
919 17:50:13.340962 scan_bus: scanning of bus USB2 port 0 took 9061 usecs
920 17:50:13.343353 USB2 port 1 scanning...
921 17:50:13.345559 scan_usb_bus for USB2 port 1
922 17:50:13.349303 scan_usb_bus for USB2 port 1 done
923 17:50:13.355138 scan_bus: scanning of bus USB2 port 1 took 9060 usecs
924 17:50:13.356678 USB2 port 2 scanning...
925 17:50:13.360707 scan_usb_bus for USB2 port 2
926 17:50:13.363644 scan_usb_bus for USB2 port 2 done
927 17:50:13.368665 scan_bus: scanning of bus USB2 port 2 took 9059 usecs
928 17:50:13.371492 USB2 port 4 scanning...
929 17:50:13.374870 scan_usb_bus for USB2 port 4
930 17:50:13.378082 scan_usb_bus for USB2 port 4 done
931 17:50:13.383355 scan_bus: scanning of bus USB2 port 4 took 9061 usecs
932 17:50:13.386012 USB2 port 5 scanning...
933 17:50:13.388831 scan_usb_bus for USB2 port 5
934 17:50:13.392366 scan_usb_bus for USB2 port 5 done
935 17:50:13.397598 scan_bus: scanning of bus USB2 port 5 took 9060 usecs
936 17:50:13.400233 USB2 port 6 scanning...
937 17:50:13.403403 scan_usb_bus for USB2 port 6
938 17:50:13.406677 scan_usb_bus for USB2 port 6 done
939 17:50:13.412077 scan_bus: scanning of bus USB2 port 6 took 9059 usecs
940 17:50:13.415455 USB2 port 7 scanning...
941 17:50:13.417596 scan_usb_bus for USB2 port 7
942 17:50:13.421205 scan_usb_bus for USB2 port 7 done
943 17:50:13.426594 scan_bus: scanning of bus USB2 port 7 took 9059 usecs
944 17:50:13.429290 USB2 port 8 scanning...
945 17:50:13.432571 scan_usb_bus for USB2 port 8
946 17:50:13.436109 scan_usb_bus for USB2 port 8 done
947 17:50:13.441399 scan_bus: scanning of bus USB2 port 8 took 9059 usecs
948 17:50:13.443997 USB2 port 9 scanning...
949 17:50:13.446912 scan_usb_bus for USB2 port 9
950 17:50:13.450238 scan_usb_bus for USB2 port 9 done
951 17:50:13.455110 scan_bus: scanning of bus USB2 port 9 took 9061 usecs
952 17:50:13.457700 USB3 port 0 scanning...
953 17:50:13.461264 scan_usb_bus for USB3 port 0
954 17:50:13.464709 scan_usb_bus for USB3 port 0 done
955 17:50:13.469856 scan_bus: scanning of bus USB3 port 0 took 9061 usecs
956 17:50:13.472196 USB3 port 1 scanning...
957 17:50:13.475150 scan_usb_bus for USB3 port 1
958 17:50:13.478608 scan_usb_bus for USB3 port 1 done
959 17:50:13.484451 scan_bus: scanning of bus USB3 port 1 took 9058 usecs
960 17:50:13.486739 USB3 port 2 scanning...
961 17:50:13.489999 scan_usb_bus for USB3 port 2
962 17:50:13.493226 scan_usb_bus for USB3 port 2 done
963 17:50:13.498889 scan_bus: scanning of bus USB3 port 2 took 9059 usecs
964 17:50:13.501530 USB3 port 3 scanning...
965 17:50:13.504420 scan_usb_bus for USB3 port 3
966 17:50:13.507777 scan_usb_bus for USB3 port 3 done
967 17:50:13.512787 scan_bus: scanning of bus USB3 port 3 took 9061 usecs
968 17:50:13.515694 USB3 port 4 scanning...
969 17:50:13.518753 scan_usb_bus for USB3 port 4
970 17:50:13.522214 scan_usb_bus for USB3 port 4 done
971 17:50:13.528126 scan_bus: scanning of bus USB3 port 4 took 9059 usecs
972 17:50:13.530982 scan_usb_bus for USB0 port 0 done
973 17:50:13.536762 scan_bus: scanning of bus USB0 port 0 took 239273 usecs
974 17:50:13.539526 scan_usb_bus for PCI: 00:14.0 done
975 17:50:13.545291 scan_bus: scanning of bus PCI: 00:14.0 took 256202 usecs
976 17:50:13.548133 PCI: 00:15.0 scanning...
977 17:50:13.551712 scan_generic_bus for PCI: 00:15.0
978 17:50:13.556214 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
979 17:50:13.559920 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
980 17:50:13.563937 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
981 17:50:13.567612 scan_generic_bus for PCI: 00:15.0 done
982 17:50:13.574002 scan_bus: scanning of bus PCI: 00:15.0 took 22380 usecs
983 17:50:13.575846 PCI: 00:15.1 scanning...
984 17:50:13.580546 scan_generic_bus for PCI: 00:15.1
985 17:50:13.583541 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
986 17:50:13.588240 scan_generic_bus for PCI: 00:15.1 done
987 17:50:13.593965 scan_bus: scanning of bus PCI: 00:15.1 took 14211 usecs
988 17:50:13.596203 PCI: 00:19.0 scanning...
989 17:50:13.600372 scan_generic_bus for PCI: 00:19.0
990 17:50:13.604206 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
991 17:50:13.607478 scan_generic_bus for PCI: 00:19.0 done
992 17:50:13.613293 scan_bus: scanning of bus PCI: 00:19.0 took 14211 usecs
993 17:50:13.615367 PCI: 00:1c.0 scanning...
994 17:50:13.619403 do_pci_scan_bridge for PCI: 00:1c.0
995 17:50:13.622548 PCI: pci_scan_bus for bus 01
996 17:50:13.625759 PCI: 01:00.0 [10ec/525a] enabled
997 17:50:13.628474 Capability: type 0x01 @ 0x80
998 17:50:13.631728 Capability: type 0x05 @ 0x90
999 17:50:13.634961 Capability: type 0x10 @ 0xb0
1000 17:50:13.637533 Capability: type 0x10 @ 0x40
1001 17:50:13.641402 Enabling Common Clock Configuration
1002 17:50:13.646434 L1 Sub-State supported from root port 28
1003 17:50:13.648757 L1 Sub-State Support = 0xf
1004 17:50:13.651558 CommonModeRestoreTime = 0x3c
1005 17:50:13.654932 Power On Value = 0x6, Power On Scale = 0x1
1006 17:50:13.657816 ASPM: Enabled L0s and L1
1007 17:50:13.661192 Capability: type 0x01 @ 0x80
1008 17:50:13.664182 Capability: type 0x05 @ 0x90
1009 17:50:13.666976 Capability: type 0x10 @ 0xb0
1010 17:50:13.672028 scan_bus: scanning of bus PCI: 00:1c.0 took 53659 usecs
1011 17:50:13.674776 PCI: 00:1d.0 scanning...
1012 17:50:13.678330 do_pci_scan_bridge for PCI: 00:1d.0
1013 17:50:13.681615 PCI: pci_scan_bus for bus 02
1014 17:50:13.684484 PCI: 02:00.0 [1217/8620] enabled
1015 17:50:13.687605 Capability: type 0x01 @ 0x6c
1016 17:50:13.690720 Capability: type 0x05 @ 0x48
1017 17:50:13.693634 Capability: type 0x10 @ 0x80
1018 17:50:13.696684 Capability: type 0x10 @ 0x40
1019 17:50:13.701108 L1 Sub-State supported from root port 29
1020 17:50:13.703730 L1 Sub-State Support = 0xf
1021 17:50:13.706874 CommonModeRestoreTime = 0x78
1022 17:50:13.710700 Power On Value = 0x16, Power On Scale = 0x0
1023 17:50:13.712520 ASPM: Enabled L1
1024 17:50:13.717261 Capability: type 0x01 @ 0x6c
1025 17:50:13.722152 Capability: type 0x05 @ 0x48
1026 17:50:13.726822 Capability: type 0x10 @ 0x80
1027 17:50:13.733363 scan_bus: scanning of bus PCI: 00:1d.0 took 56010 usecs
1028 17:50:13.735881 PCI: 00:1f.0 scanning...
1029 17:50:13.740014 scan_lpc_bus for PCI: 00:1f.0
1030 17:50:13.742213 PNP: 0c09.0 enabled
1031 17:50:13.745425 scan_lpc_bus for PCI: 00:1f.0 done
1032 17:50:13.750332 scan_bus: scanning of bus PCI: 00:1f.0 took 11390 usecs
1033 17:50:13.752717 PCI: 00:1f.3 scanning...
1034 17:50:13.759139 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
1035 17:50:13.761287 PCI: 00:1f.4 scanning...
1036 17:50:13.765391 scan_generic_bus for PCI: 00:1f.4
1037 17:50:13.768746 scan_generic_bus for PCI: 00:1f.4 done
1038 17:50:13.774752 scan_bus: scanning of bus PCI: 00:1f.4 took 10128 usecs
1039 17:50:13.777034 PCI: 00:1f.5 scanning...
1040 17:50:13.781706 scan_generic_bus for PCI: 00:1f.5
1041 17:50:13.784700 scan_generic_bus for PCI: 00:1f.5 done
1042 17:50:13.790948 scan_bus: scanning of bus PCI: 00:1f.5 took 10127 usecs
1043 17:50:13.795836 scan_bus: scanning of bus DOMAIN: 0000 took 706642 usecs
1044 17:50:13.800060 root_dev_scan_bus for Root Device done
1045 17:50:13.805322 scan_bus: scanning of bus Root Device took 726780 usecs
1046 17:50:13.806146 done
1047 17:50:13.812017 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1048 17:50:13.818419 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1049 17:50:13.826124 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1050 17:50:13.832487 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1051 17:50:13.836762 SPI flash protection: WPSW=1 SRP0=1
1052 17:50:13.843315 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1053 17:50:13.849264 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1054 17:50:13.855836 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148443 exit 42577
1055 17:50:13.858205 found VGA at PCI: 00:02.0
1056 17:50:13.861645 Setting up VGA for PCI: 00:02.0
1057 17:50:13.866776 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1058 17:50:13.870889 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1059 17:50:13.873978 Allocating resources...
1060 17:50:13.875598 Reading resources...
1061 17:50:13.879708 Root Device read_resources bus 0 link: 0
1062 17:50:13.884363 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1063 17:50:13.889827 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1064 17:50:13.894468 DOMAIN: 0000 read_resources bus 0 link: 0
1065 17:50:13.900293 PCI: 00:14.0 read_resources bus 0 link: 0
1066 17:50:13.904424 USB0 port 0 read_resources bus 0 link: 0
1067 17:50:13.913807 USB0 port 0 read_resources bus 0 link: 0 done
1068 17:50:13.919258 PCI: 00:14.0 read_resources bus 0 link: 0 done
1069 17:50:13.924100 PCI: 00:15.0 read_resources bus 1 link: 0
1070 17:50:13.930066 PCI: 00:15.0 read_resources bus 1 link: 0 done
1071 17:50:13.934638 PCI: 00:15.1 read_resources bus 2 link: 0
1072 17:50:13.940415 PCI: 00:15.1 read_resources bus 2 link: 0 done
1073 17:50:13.945072 PCI: 00:19.0 read_resources bus 3 link: 0
1074 17:50:13.950611 PCI: 00:19.0 read_resources bus 3 link: 0 done
1075 17:50:13.955701 PCI: 00:1c.0 read_resources bus 1 link: 0
1076 17:50:13.960991 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1077 17:50:13.964926 PCI: 00:1d.0 read_resources bus 2 link: 0
1078 17:50:13.972000 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1079 17:50:13.977343 PCI: 00:1f.0 read_resources bus 0 link: 0
1080 17:50:13.982646 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1081 17:50:13.988425 DOMAIN: 0000 read_resources bus 0 link: 0 done
1082 17:50:13.993340 Root Device read_resources bus 0 link: 0 done
1083 17:50:13.995688 Done reading resources.
1084 17:50:14.001927 Show resources in subtree (Root Device)...After reading.
1085 17:50:14.005906 Root Device child on link 0 CPU_CLUSTER: 0
1086 17:50:14.009829 CPU_CLUSTER: 0 child on link 0 APIC: 00
1087 17:50:14.011553 APIC: 00
1088 17:50:14.013178 APIC: 02
1089 17:50:14.014147 APIC: 06
1090 17:50:14.015558 APIC: 01
1091 17:50:14.016575 APIC: 03
1092 17:50:14.018074 APIC: 04
1093 17:50:14.018869 APIC: 05
1094 17:50:14.020414 APIC: 07
1095 17:50:14.024516 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1096 17:50:14.033894 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1097 17:50:14.043588 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1098 17:50:14.045344 PCI: 00:00.0
1099 17:50:14.054621 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1100 17:50:14.063824 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1101 17:50:14.074272 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1102 17:50:14.082961 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1103 17:50:14.092002 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1104 17:50:14.101147 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1105 17:50:14.111068 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1106 17:50:14.119889 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1107 17:50:14.129140 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1108 17:50:14.138877 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1109 17:50:14.148325 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1110 17:50:14.158980 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1111 17:50:14.167452 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1112 17:50:14.177133 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1113 17:50:14.178334 PCI: 00:02.0
1114 17:50:14.188811 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1115 17:50:14.198388 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1116 17:50:14.206935 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1117 17:50:14.208852 PCI: 00:04.0
1118 17:50:14.219299 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1119 17:50:14.220793 PCI: 00:08.0
1120 17:50:14.230052 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1121 17:50:14.231860 PCI: 00:12.0
1122 17:50:14.241746 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1123 17:50:14.246082 PCI: 00:14.0 child on link 0 USB0 port 0
1124 17:50:14.256545 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1125 17:50:14.260572 USB0 port 0 child on link 0 USB2 port 0
1126 17:50:14.262273 USB2 port 0
1127 17:50:14.263684 USB2 port 1
1128 17:50:14.266269 USB2 port 2
1129 17:50:14.268068 USB2 port 4
1130 17:50:14.269657 USB2 port 5
1131 17:50:14.271107 USB2 port 6
1132 17:50:14.273660 USB2 port 7
1133 17:50:14.274394 USB2 port 8
1134 17:50:14.276201 USB2 port 9
1135 17:50:14.278318 USB3 port 0
1136 17:50:14.279978 USB3 port 1
1137 17:50:14.282293 USB3 port 2
1138 17:50:14.284152 USB3 port 3
1139 17:50:14.285130 USB3 port 4
1140 17:50:14.286473 PCI: 00:14.2
1141 17:50:14.296481 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1142 17:50:14.307482 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1143 17:50:14.308720 PCI: 00:14.3
1144 17:50:14.318045 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1145 17:50:14.322724 PCI: 00:15.0 child on link 0 I2C: 01:10
1146 17:50:14.332328 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 17:50:14.334547 I2C: 01:10
1148 17:50:14.335731 I2C: 01:10
1149 17:50:14.337491 I2C: 01:34
1150 17:50:14.341580 PCI: 00:15.1 child on link 0 I2C: 02:2c
1151 17:50:14.351655 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 17:50:14.353075 I2C: 02:2c
1153 17:50:14.354250 PCI: 00:16.0
1154 17:50:14.364642 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 17:50:14.365665 PCI: 00:17.0
1156 17:50:14.375218 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1157 17:50:14.384503 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1158 17:50:14.392498 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1159 17:50:14.400421 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1160 17:50:14.409331 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1161 17:50:14.418214 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1162 17:50:14.422943 PCI: 00:19.0 child on link 0 I2C: 03:50
1163 17:50:14.432688 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 17:50:14.442571 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1165 17:50:14.443763 I2C: 03:50
1166 17:50:14.445599 PCI: 00:19.2
1167 17:50:14.456904 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1168 17:50:14.466370 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1169 17:50:14.471250 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1170 17:50:14.479151 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1171 17:50:14.488958 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1172 17:50:14.498699 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1173 17:50:14.500101 PCI: 01:00.0
1174 17:50:14.509659 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1175 17:50:14.513366 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1176 17:50:14.522935 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 17:50:14.531977 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 17:50:14.541402 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 17:50:14.543050 PCI: 02:00.0
1180 17:50:14.552132 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1181 17:50:14.561389 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1182 17:50:14.565828 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1183 17:50:14.573686 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1184 17:50:14.582788 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1185 17:50:14.584830 PNP: 0c09.0
1186 17:50:14.592875 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1187 17:50:14.601847 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1188 17:50:14.610863 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1189 17:50:14.612516 PCI: 00:1f.3
1190 17:50:14.621896 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 17:50:14.632703 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1192 17:50:14.634145 PCI: 00:1f.4
1193 17:50:14.642685 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1194 17:50:14.653257 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1195 17:50:14.655098 PCI: 00:1f.5
1196 17:50:14.663494 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1197 17:50:14.665712 PCI: 00:1f.6
1198 17:50:14.674864 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1199 17:50:14.681215 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1200 17:50:14.687983 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1201 17:50:14.693891 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1202 17:50:14.700448 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1203 17:50:14.707014 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1204 17:50:14.710980 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1205 17:50:14.714585 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1206 17:50:14.717762 PCI: 00:17.0 18 * [0x60 - 0x67] io
1207 17:50:14.721835 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1208 17:50:14.728602 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1209 17:50:14.735047 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1210 17:50:14.743206 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1211 17:50:14.751013 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1212 17:50:14.758222 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1213 17:50:14.762357 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1214 17:50:14.769944 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1215 17:50:14.778365 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1216 17:50:14.786756 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1217 17:50:14.792899 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1218 17:50:14.796771 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1219 17:50:14.800867 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1220 17:50:14.809425 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1221 17:50:14.813198 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1222 17:50:14.818109 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1223 17:50:14.823441 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1224 17:50:14.828476 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1225 17:50:14.833341 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1226 17:50:14.838145 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1227 17:50:14.842248 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1228 17:50:14.847430 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1229 17:50:14.852136 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1230 17:50:14.857091 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1231 17:50:14.861612 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1232 17:50:14.866989 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1233 17:50:14.871445 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1234 17:50:14.876270 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1235 17:50:14.882093 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1236 17:50:14.886487 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1237 17:50:14.891818 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1238 17:50:14.896622 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1239 17:50:14.900629 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1240 17:50:14.905794 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1241 17:50:14.911362 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1242 17:50:14.915760 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1243 17:50:14.921002 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1244 17:50:14.925220 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1245 17:50:14.930183 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1246 17:50:14.939206 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1247 17:50:14.942916 avoid_fixed_resources: DOMAIN: 0000
1248 17:50:14.947957 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1249 17:50:14.954324 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1250 17:50:14.961912 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1251 17:50:14.969820 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1252 17:50:14.976507 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1253 17:50:14.984602 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1254 17:50:14.992371 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1255 17:50:14.999816 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1256 17:50:15.007939 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1257 17:50:15.015129 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1258 17:50:15.022454 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1259 17:50:15.029362 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1260 17:50:15.031521 Setting resources...
1261 17:50:15.038040 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1262 17:50:15.041987 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1263 17:50:15.046382 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1264 17:50:15.049979 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1265 17:50:15.054087 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1266 17:50:15.060590 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1267 17:50:15.066307 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1268 17:50:15.073257 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1269 17:50:15.078953 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 17:50:15.085245 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 17:50:15.092949 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1272 17:50:15.098193 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 17:50:15.103300 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 17:50:15.108370 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 17:50:15.113431 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1276 17:50:15.117873 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1277 17:50:15.122886 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1278 17:50:15.127218 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1279 17:50:15.132898 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1280 17:50:15.136915 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1281 17:50:15.142243 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1282 17:50:15.147550 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1283 17:50:15.151656 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1284 17:50:15.156810 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1285 17:50:15.161627 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1286 17:50:15.166264 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1287 17:50:15.170921 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1288 17:50:15.175743 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1289 17:50:15.180565 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1290 17:50:15.185802 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1291 17:50:15.190928 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1292 17:50:15.196156 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1293 17:50:15.200499 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1294 17:50:15.204839 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1295 17:50:15.210652 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1296 17:50:15.215020 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1297 17:50:15.222416 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1298 17:50:15.229411 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1299 17:50:15.237555 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1300 17:50:15.245053 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1301 17:50:15.249140 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1302 17:50:15.256602 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1303 17:50:15.264290 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1304 17:50:15.271592 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1305 17:50:15.279274 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1306 17:50:15.284117 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1307 17:50:15.288802 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1308 17:50:15.295834 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1309 17:50:15.300509 Root Device assign_resources, bus 0 link: 0
1310 17:50:15.305252 DOMAIN: 0000 assign_resources, bus 0 link: 0
1311 17:50:15.313540 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1312 17:50:15.321671 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1313 17:50:15.330349 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1314 17:50:15.338517 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1315 17:50:15.346563 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1316 17:50:15.355077 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1317 17:50:15.363086 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1318 17:50:15.367817 PCI: 00:14.0 assign_resources, bus 0 link: 0
1319 17:50:15.371916 PCI: 00:14.0 assign_resources, bus 0 link: 0
1320 17:50:15.380804 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1321 17:50:15.388903 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1322 17:50:15.396402 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1323 17:50:15.404742 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1324 17:50:15.409790 PCI: 00:15.0 assign_resources, bus 1 link: 0
1325 17:50:15.414530 PCI: 00:15.0 assign_resources, bus 1 link: 0
1326 17:50:15.422788 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1327 17:50:15.426593 PCI: 00:15.1 assign_resources, bus 2 link: 0
1328 17:50:15.432040 PCI: 00:15.1 assign_resources, bus 2 link: 0
1329 17:50:15.439969 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1330 17:50:15.447852 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1331 17:50:15.455825 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1332 17:50:15.464008 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1333 17:50:15.471741 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1334 17:50:15.479012 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1335 17:50:15.487141 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1336 17:50:15.494617 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1337 17:50:15.502973 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1338 17:50:15.506935 PCI: 00:19.0 assign_resources, bus 3 link: 0
1339 17:50:15.511757 PCI: 00:19.0 assign_resources, bus 3 link: 0
1340 17:50:15.520866 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1341 17:50:15.528974 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1342 17:50:15.537574 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1343 17:50:15.546721 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1344 17:50:15.550695 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1345 17:50:15.559314 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1346 17:50:15.564014 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1347 17:50:15.572707 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1348 17:50:15.581123 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1349 17:50:15.589643 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1350 17:50:15.593465 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1351 17:50:15.603888 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1352 17:50:15.613340 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1353 17:50:15.620100 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1354 17:50:15.624282 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1355 17:50:15.629846 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1356 17:50:15.633996 LPC: Trying to open IO window from 930 size 8
1357 17:50:15.638512 LPC: Trying to open IO window from 940 size 8
1358 17:50:15.643837 LPC: Trying to open IO window from 950 size 10
1359 17:50:15.651318 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1360 17:50:15.659895 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1361 17:50:15.668220 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1362 17:50:15.676738 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1363 17:50:15.684476 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1364 17:50:15.688809 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 17:50:15.693899 Root Device assign_resources, bus 0 link: 0
1366 17:50:15.696761 Done setting resources.
1367 17:50:15.702479 Show resources in subtree (Root Device)...After assigning values.
1368 17:50:15.706584 Root Device child on link 0 CPU_CLUSTER: 0
1369 17:50:15.711178 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 17:50:15.712305 APIC: 00
1371 17:50:15.713673 APIC: 02
1372 17:50:15.715156 APIC: 06
1373 17:50:15.716327 APIC: 01
1374 17:50:15.717271 APIC: 03
1375 17:50:15.718566 APIC: 04
1376 17:50:15.720234 APIC: 05
1377 17:50:15.721527 APIC: 07
1378 17:50:15.725392 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 17:50:15.735041 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 17:50:15.746904 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 17:50:15.748115 PCI: 00:00.0
1382 17:50:15.757877 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 17:50:15.767271 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 17:50:15.776039 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 17:50:15.785901 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 17:50:15.795032 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 17:50:15.804832 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 17:50:15.814055 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 17:50:15.822645 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1390 17:50:15.832763 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1391 17:50:15.841470 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1392 17:50:15.851115 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1393 17:50:15.861643 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1394 17:50:15.870258 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1395 17:50:15.879351 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1396 17:50:15.881246 PCI: 00:02.0
1397 17:50:15.891745 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1398 17:50:15.902296 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1399 17:50:15.912149 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1400 17:50:15.913194 PCI: 00:04.0
1401 17:50:15.923778 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1402 17:50:15.925568 PCI: 00:08.0
1403 17:50:15.935515 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1404 17:50:15.937255 PCI: 00:12.0
1405 17:50:15.947794 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1406 17:50:15.951458 PCI: 00:14.0 child on link 0 USB0 port 0
1407 17:50:15.962588 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1408 17:50:15.966136 USB0 port 0 child on link 0 USB2 port 0
1409 17:50:15.968223 USB2 port 0
1410 17:50:15.969987 USB2 port 1
1411 17:50:15.971350 USB2 port 2
1412 17:50:15.973618 USB2 port 4
1413 17:50:15.975630 USB2 port 5
1414 17:50:15.976688 USB2 port 6
1415 17:50:15.978594 USB2 port 7
1416 17:50:15.980895 USB2 port 8
1417 17:50:15.982118 USB2 port 9
1418 17:50:15.984339 USB3 port 0
1419 17:50:15.985399 USB3 port 1
1420 17:50:15.987349 USB3 port 2
1421 17:50:15.989001 USB3 port 3
1422 17:50:15.991066 USB3 port 4
1423 17:50:15.992952 PCI: 00:14.2
1424 17:50:16.002660 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1425 17:50:16.013026 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1426 17:50:16.015269 PCI: 00:14.3
1427 17:50:16.025485 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1428 17:50:16.029688 PCI: 00:15.0 child on link 0 I2C: 01:10
1429 17:50:16.039630 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1430 17:50:16.041197 I2C: 01:10
1431 17:50:16.042735 I2C: 01:10
1432 17:50:16.044633 I2C: 01:34
1433 17:50:16.049305 PCI: 00:15.1 child on link 0 I2C: 02:2c
1434 17:50:16.059245 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1435 17:50:16.061070 I2C: 02:2c
1436 17:50:16.062721 PCI: 00:16.0
1437 17:50:16.072329 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1438 17:50:16.073855 PCI: 00:17.0
1439 17:50:16.084633 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1440 17:50:16.094539 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1441 17:50:16.103097 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1442 17:50:16.112442 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1443 17:50:16.121462 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1444 17:50:16.131989 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1445 17:50:16.136704 PCI: 00:19.0 child on link 0 I2C: 03:50
1446 17:50:16.146996 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1447 17:50:16.156827 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1448 17:50:16.158399 I2C: 03:50
1449 17:50:16.160970 PCI: 00:19.2
1450 17:50:16.171057 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1451 17:50:16.180854 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1452 17:50:16.185394 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1453 17:50:16.194781 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1454 17:50:16.205354 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1455 17:50:16.215757 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1456 17:50:16.216817 PCI: 01:00.0
1457 17:50:16.227338 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1458 17:50:16.231790 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1459 17:50:16.241549 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1460 17:50:16.251044 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1461 17:50:16.262231 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1462 17:50:16.263175 PCI: 02:00.0
1463 17:50:16.273504 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1464 17:50:16.284518 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1465 17:50:16.288149 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 17:50:16.297577 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 17:50:16.305951 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 17:50:16.307909 PNP: 0c09.0
1469 17:50:16.316598 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1470 17:50:16.325450 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1471 17:50:16.333429 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1472 17:50:16.335012 PCI: 00:1f.3
1473 17:50:16.345727 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1474 17:50:16.355726 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1475 17:50:16.357966 PCI: 00:1f.4
1476 17:50:16.366850 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1477 17:50:16.377486 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1478 17:50:16.379239 PCI: 00:1f.5
1479 17:50:16.388918 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1480 17:50:16.390457 PCI: 00:1f.6
1481 17:50:16.400921 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1482 17:50:16.403584 Done allocating resources.
1483 17:50:16.409547 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548424 exit 14
1484 17:50:16.412600 Enabling resources...
1485 17:50:16.417326 PCI: 00:00.0 subsystem <- 1028/3e34
1486 17:50:16.419565 PCI: 00:00.0 cmd <- 06
1487 17:50:16.423923 PCI: 00:02.0 subsystem <- 1028/3ea0
1488 17:50:16.425604 PCI: 00:02.0 cmd <- 03
1489 17:50:16.430034 PCI: 00:04.0 subsystem <- 1028/1903
1490 17:50:16.432103 PCI: 00:04.0 cmd <- 02
1491 17:50:16.434705 PCI: 00:08.0 cmd <- 06
1492 17:50:16.439093 PCI: 00:12.0 subsystem <- 1028/9df9
1493 17:50:16.440507 PCI: 00:12.0 cmd <- 02
1494 17:50:16.444614 PCI: 00:14.0 subsystem <- 1028/9ded
1495 17:50:16.446837 PCI: 00:14.0 cmd <- 02
1496 17:50:16.449586 PCI: 00:14.2 cmd <- 02
1497 17:50:16.453359 PCI: 00:14.3 subsystem <- 1028/9df0
1498 17:50:16.456252 PCI: 00:14.3 cmd <- 02
1499 17:50:16.460341 PCI: 00:15.0 subsystem <- 1028/9de8
1500 17:50:16.462498 PCI: 00:15.0 cmd <- 02
1501 17:50:16.466188 PCI: 00:15.1 subsystem <- 1028/9de9
1502 17:50:16.468635 PCI: 00:15.1 cmd <- 02
1503 17:50:16.472601 PCI: 00:16.0 subsystem <- 1028/9de0
1504 17:50:16.474571 PCI: 00:16.0 cmd <- 02
1505 17:50:16.478221 PCI: 00:17.0 subsystem <- 1028/9dd3
1506 17:50:16.480980 PCI: 00:17.0 cmd <- 03
1507 17:50:16.484622 PCI: 00:19.0 subsystem <- 1028/9dc5
1508 17:50:16.486878 PCI: 00:19.0 cmd <- 06
1509 17:50:16.491080 PCI: 00:19.2 subsystem <- 1028/9dc7
1510 17:50:16.493828 PCI: 00:19.2 cmd <- 06
1511 17:50:16.497618 PCI: 00:1c.0 bridge ctrl <- 0003
1512 17:50:16.500283 PCI: 00:1c.0 subsystem <- 1028/9dbf
1513 17:50:16.504012 Capability: type 0x10 @ 0x40
1514 17:50:16.507180 Capability: type 0x05 @ 0x80
1515 17:50:16.509571 Capability: type 0x0d @ 0x90
1516 17:50:16.511594 PCI: 00:1c.0 cmd <- 06
1517 17:50:16.515731 PCI: 00:1d.0 bridge ctrl <- 0003
1518 17:50:16.519509 PCI: 00:1d.0 subsystem <- 1028/9db4
1519 17:50:16.521476 Capability: type 0x10 @ 0x40
1520 17:50:16.524499 Capability: type 0x05 @ 0x80
1521 17:50:16.527490 Capability: type 0x0d @ 0x90
1522 17:50:16.529821 PCI: 00:1d.0 cmd <- 06
1523 17:50:16.533624 PCI: 00:1f.0 subsystem <- 1028/9d84
1524 17:50:16.536064 PCI: 00:1f.0 cmd <- 407
1525 17:50:16.540362 PCI: 00:1f.3 subsystem <- 1028/9dc8
1526 17:50:16.542364 PCI: 00:1f.3 cmd <- 02
1527 17:50:16.546187 PCI: 00:1f.4 subsystem <- 1028/9da3
1528 17:50:16.548692 PCI: 00:1f.4 cmd <- 03
1529 17:50:16.553179 PCI: 00:1f.5 subsystem <- 1028/9da4
1530 17:50:16.555740 PCI: 00:1f.5 cmd <- 406
1531 17:50:16.559048 PCI: 00:1f.6 subsystem <- 1028/15be
1532 17:50:16.561174 PCI: 00:1f.6 cmd <- 02
1533 17:50:16.572381 PCI: 01:00.0 cmd <- 02
1534 17:50:16.577575 PCI: 02:00.0 cmd <- 06
1535 17:50:16.580594 done.
1536 17:50:16.586296 BS: BS_DEV_ENABLE times (us): entry 399 run 170404 exit 0
1537 17:50:16.589403 Initializing devices...
1538 17:50:16.591237 Root Device init ...
1539 17:50:16.595068 Root Device init finished in 2137 usecs
1540 17:50:16.597769 CPU_CLUSTER: 0 init ...
1541 17:50:16.601685 CPU_CLUSTER: 0 init finished in 2429 usecs
1542 17:50:16.608475 PCI: 00:00.0 init ...
1543 17:50:16.611578 CPU TDP: 15 Watts
1544 17:50:16.613405 CPU PL2 = 51 Watts
1545 17:50:16.617464 PCI: 00:00.0 init finished in 7033 usecs
1546 17:50:16.620326 PCI: 00:02.0 init ...
1547 17:50:16.623615 PCI: 00:02.0 init finished in 2236 usecs
1548 17:50:16.626718 PCI: 00:04.0 init ...
1549 17:50:16.630921 PCI: 00:04.0 init finished in 2234 usecs
1550 17:50:16.633040 PCI: 00:08.0 init ...
1551 17:50:16.637709 PCI: 00:08.0 init finished in 2234 usecs
1552 17:50:16.640180 PCI: 00:12.0 init ...
1553 17:50:16.644347 PCI: 00:12.0 init finished in 2235 usecs
1554 17:50:16.647542 PCI: 00:14.0 init ...
1555 17:50:16.650307 PCI: 00:14.0 init finished in 2235 usecs
1556 17:50:16.652896 PCI: 00:14.2 init ...
1557 17:50:16.657621 PCI: 00:14.2 init finished in 2234 usecs
1558 17:50:16.660160 PCI: 00:14.3 init ...
1559 17:50:16.664271 PCI: 00:14.3 init finished in 2239 usecs
1560 17:50:16.666488 PCI: 00:15.0 init ...
1561 17:50:16.670737 DW I2C bus 0 at 0xd1347000 (400 KHz)
1562 17:50:16.674496 PCI: 00:15.0 init finished in 5931 usecs
1563 17:50:16.677820 PCI: 00:15.1 init ...
1564 17:50:16.680982 DW I2C bus 1 at 0xd1348000 (400 KHz)
1565 17:50:16.684950 PCI: 00:15.1 init finished in 5930 usecs
1566 17:50:16.687339 PCI: 00:16.0 init ...
1567 17:50:16.691941 PCI: 00:16.0 init finished in 2235 usecs
1568 17:50:16.695346 PCI: 00:19.0 init ...
1569 17:50:16.699672 DW I2C bus 4 at 0xd134a000 (400 KHz)
1570 17:50:16.702896 PCI: 00:19.0 init finished in 5921 usecs
1571 17:50:16.705396 PCI: 00:1c.0 init ...
1572 17:50:16.708810 Initializing PCH PCIe bridge.
1573 17:50:16.712391 PCI: 00:1c.0 init finished in 5245 usecs
1574 17:50:16.715142 PCI: 00:1d.0 init ...
1575 17:50:16.718799 Initializing PCH PCIe bridge.
1576 17:50:16.722798 PCI: 00:1d.0 init finished in 5246 usecs
1577 17:50:16.725115 PCI: 00:1f.0 init ...
1578 17:50:16.729084 IOAPIC: Initializing IOAPIC at 0xfec00000
1579 17:50:16.734050 IOAPIC: Bootstrap Processor Local APIC = 0x00
1580 17:50:16.736062 IOAPIC: ID = 0x02
1581 17:50:16.738336 IOAPIC: Dumping registers
1582 17:50:16.741332 reg 0x0000: 0x02000000
1583 17:50:16.743445 reg 0x0001: 0x00770020
1584 17:50:16.746053 reg 0x0002: 0x00000000
1585 17:50:16.752182 PCI: 00:1f.0 init finished in 25017 usecs
1586 17:50:16.754599 PCI: 00:1f.3 init ...
1587 17:50:16.760813 HDA: codec_mask = 05
1588 17:50:16.763436 HDA: Initializing codec #2
1589 17:50:16.765751 HDA: codec viddid: 8086280b
1590 17:50:16.768545 HDA: No verb table entry found
1591 17:50:16.771348 HDA: Initializing codec #0
1592 17:50:16.773908 HDA: codec viddid: 10ec0236
1593 17:50:16.781339 HDA: verb loaded.
1594 17:50:16.785662 PCI: 00:1f.3 init finished in 28830 usecs
1595 17:50:16.788407 PCI: 00:1f.4 init ...
1596 17:50:16.792129 PCI: 00:1f.4 init finished in 2245 usecs
1597 17:50:16.795122 PCI: 00:1f.6 init ...
1598 17:50:16.799151 PCI: 00:1f.6 init finished in 2234 usecs
1599 17:50:16.810891 PCI: 01:00.0 init ...
1600 17:50:16.814150 PCI: 01:00.0 init finished in 2227 usecs
1601 17:50:16.817624 PCI: 02:00.0 init ...
1602 17:50:16.821171 PCI: 02:00.0 init finished in 2235 usecs
1603 17:50:16.823294 PNP: 0c09.0 init ...
1604 17:50:16.827434 EC Label : 00.00.20
1605 17:50:16.831190 EC Revision : 9ca674bba
1606 17:50:16.834748 EC Model Num : 08B9
1607 17:50:16.838193 EC Build Date : 05/10/19
1608 17:50:16.847838 PNP: 0c09.0 init finished in 21733 usecs
1609 17:50:16.849453 Devices initialized
1610 17:50:16.852926 Show all devs... After init.
1611 17:50:16.854390 Root Device: enabled 1
1612 17:50:16.857806 CPU_CLUSTER: 0: enabled 1
1613 17:50:16.859461 DOMAIN: 0000: enabled 1
1614 17:50:16.861562 APIC: 00: enabled 1
1615 17:50:16.864227 PCI: 00:00.0: enabled 1
1616 17:50:16.866515 PCI: 00:02.0: enabled 1
1617 17:50:16.869671 PCI: 00:04.0: enabled 1
1618 17:50:16.871679 PCI: 00:12.0: enabled 1
1619 17:50:16.873737 PCI: 00:12.5: enabled 0
1620 17:50:16.876588 PCI: 00:12.6: enabled 0
1621 17:50:16.878527 PCI: 00:13.0: enabled 0
1622 17:50:16.882004 PCI: 00:14.0: enabled 1
1623 17:50:16.883714 PCI: 00:14.1: enabled 0
1624 17:50:16.886862 PCI: 00:14.3: enabled 1
1625 17:50:16.889088 PCI: 00:14.5: enabled 0
1626 17:50:16.891866 PCI: 00:15.0: enabled 1
1627 17:50:16.893057 PCI: 00:15.1: enabled 1
1628 17:50:16.896316 PCI: 00:15.2: enabled 0
1629 17:50:16.898402 PCI: 00:15.3: enabled 0
1630 17:50:16.900592 PCI: 00:16.0: enabled 1
1631 17:50:16.903107 PCI: 00:16.1: enabled 0
1632 17:50:16.906159 PCI: 00:16.2: enabled 0
1633 17:50:16.908328 PCI: 00:16.3: enabled 0
1634 17:50:16.910327 PCI: 00:16.4: enabled 0
1635 17:50:16.913481 PCI: 00:16.5: enabled 0
1636 17:50:16.915250 PCI: 00:17.0: enabled 1
1637 17:50:16.917853 PCI: 00:19.0: enabled 1
1638 17:50:16.919912 PCI: 00:19.1: enabled 0
1639 17:50:16.922453 PCI: 00:19.2: enabled 1
1640 17:50:16.925387 PCI: 00:1a.0: enabled 0
1641 17:50:16.927997 PCI: 00:1c.0: enabled 1
1642 17:50:16.930128 PCI: 00:1c.1: enabled 0
1643 17:50:16.933195 PCI: 00:1c.2: enabled 0
1644 17:50:16.934400 PCI: 00:1c.3: enabled 0
1645 17:50:16.937147 PCI: 00:1c.4: enabled 0
1646 17:50:16.939454 PCI: 00:1c.5: enabled 0
1647 17:50:16.942857 PCI: 00:1c.6: enabled 0
1648 17:50:16.944160 PCI: 00:1c.7: enabled 0
1649 17:50:16.946732 PCI: 00:1d.0: enabled 1
1650 17:50:16.949060 PCI: 00:1d.1: enabled 0
1651 17:50:16.952271 PCI: 00:1d.2: enabled 0
1652 17:50:16.954076 PCI: 00:1d.3: enabled 0
1653 17:50:16.956993 PCI: 00:1d.4: enabled 0
1654 17:50:16.958634 PCI: 00:1e.0: enabled 0
1655 17:50:16.961824 PCI: 00:1e.1: enabled 0
1656 17:50:16.964445 PCI: 00:1e.2: enabled 0
1657 17:50:16.965896 PCI: 00:1e.3: enabled 0
1658 17:50:16.968658 PCI: 00:1f.0: enabled 1
1659 17:50:16.971452 PCI: 00:1f.1: enabled 0
1660 17:50:16.973217 PCI: 00:1f.2: enabled 0
1661 17:50:16.976607 PCI: 00:1f.3: enabled 1
1662 17:50:16.978329 PCI: 00:1f.4: enabled 1
1663 17:50:16.980573 PCI: 00:1f.5: enabled 1
1664 17:50:16.983791 PCI: 00:1f.6: enabled 1
1665 17:50:16.986290 USB0 port 0: enabled 1
1666 17:50:16.987317 I2C: 01:10: enabled 1
1667 17:50:16.990317 I2C: 01:10: enabled 1
1668 17:50:16.992289 I2C: 01:34: enabled 1
1669 17:50:16.994849 I2C: 02:2c: enabled 1
1670 17:50:16.997039 I2C: 03:50: enabled 1
1671 17:50:16.998896 PNP: 0c09.0: enabled 1
1672 17:50:17.001623 USB2 port 0: enabled 1
1673 17:50:17.003892 USB2 port 1: enabled 1
1674 17:50:17.006450 USB2 port 2: enabled 1
1675 17:50:17.008175 USB2 port 4: enabled 1
1676 17:50:17.010933 USB2 port 5: enabled 1
1677 17:50:17.013220 USB2 port 6: enabled 1
1678 17:50:17.015708 USB2 port 7: enabled 1
1679 17:50:17.017614 USB2 port 8: enabled 1
1680 17:50:17.020089 USB2 port 9: enabled 1
1681 17:50:17.022306 USB3 port 0: enabled 1
1682 17:50:17.024311 USB3 port 1: enabled 1
1683 17:50:17.027000 USB3 port 2: enabled 1
1684 17:50:17.029739 USB3 port 3: enabled 1
1685 17:50:17.031807 USB3 port 4: enabled 1
1686 17:50:17.033406 APIC: 02: enabled 1
1687 17:50:17.035457 APIC: 06: enabled 1
1688 17:50:17.037802 APIC: 01: enabled 1
1689 17:50:17.039877 APIC: 03: enabled 1
1690 17:50:17.041750 APIC: 04: enabled 1
1691 17:50:17.044585 APIC: 05: enabled 1
1692 17:50:17.045894 APIC: 07: enabled 1
1693 17:50:17.048127 PCI: 00:08.0: enabled 1
1694 17:50:17.050613 PCI: 00:14.2: enabled 1
1695 17:50:17.053095 PCI: 01:00.0: enabled 1
1696 17:50:17.055846 PCI: 02:00.0: enabled 1
1697 17:50:17.061540 Disabling ACPI via APMC:
1698 17:50:17.062503 done.
1699 17:50:17.067809 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1700 17:50:17.070966 ELOG: NV offset 0x1bf0000 size 0x4000
1701 17:50:17.078960 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1702 17:50:17.085324 ELOG: Event(17) added with size 13 at 2023-10-20 17:50:17 UTC
1703 17:50:17.090828 POST: Unexpected post code in previous boot: 0x72
1704 17:50:17.096964 ELOG: Event(A3) added with size 11 at 2023-10-20 17:50:17 UTC
1705 17:50:17.102960 ELOG: Event(92) added with size 9 at 2023-10-20 17:50:17 UTC
1706 17:50:17.110083 ELOG: Event(93) added with size 9 at 2023-10-20 17:50:17 UTC
1707 17:50:17.115513 ELOG: Event(9A) added with size 9 at 2023-10-20 17:50:17 UTC
1708 17:50:17.122638 ELOG: Event(9E) added with size 10 at 2023-10-20 17:50:17 UTC
1709 17:50:17.128394 ELOG: Event(9F) added with size 14 at 2023-10-20 17:50:17 UTC
1710 17:50:17.133992 BS: BS_DEV_INIT times (us): entry 0 run 469481 exit 72497
1711 17:50:17.141381 ELOG: Event(A1) added with size 10 at 2023-10-20 17:50:17 UTC
1712 17:50:17.148497 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1713 17:50:17.154776 ELOG: Event(A0) added with size 9 at 2023-10-20 17:50:17 UTC
1714 17:50:17.159236 elog_add_boot_reason: Logged dev mode boot
1715 17:50:17.160819 Finalize devices...
1716 17:50:17.162814 PCI: 00:17.0 final
1717 17:50:17.164520 Devices finalized
1718 17:50:17.170518 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1719 17:50:17.177059 BS: BS_POST_DEVICE times (us): entry 24764 run 5934 exit 5373
1720 17:50:17.181748 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1721 17:50:17.190561 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1722 17:50:17.195030 disable_unused_touchscreen: Disable ACPI0C50
1723 17:50:17.198944 disable_unused_touchscreen: Enable ELAN900C
1724 17:50:17.202816 CBFS @ 1d00000 size 300000
1725 17:50:17.208452 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1726 17:50:17.211910 CBFS: Locating 'fallback/dsdt.aml'
1727 17:50:17.216290 CBFS: Found @ offset 10b200 size 4448
1728 17:50:17.219377 CBFS @ 1d00000 size 300000
1729 17:50:17.224952 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1730 17:50:17.228333 CBFS: Locating 'fallback/slic'
1731 17:50:17.233481 CBFS: 'fallback/slic' not found.
1732 17:50:17.238005 ACPI: Writing ACPI tables at 89c0f000.
1733 17:50:17.239352 ACPI: * FACS
1734 17:50:17.240991 ACPI: * DSDT
1735 17:50:17.244340 Ramoops buffer: 0x100000@0x89b0e000.
1736 17:50:17.250092 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1737 17:50:17.253804 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1738 17:50:17.257602 ACPI: * FADT
1739 17:50:17.259291 SCI is IRQ9
1740 17:50:17.262411 ACPI: added table 1/32, length now 40
1741 17:50:17.265269 ACPI: * SSDT
1742 17:50:17.267962 Found 1 CPU(s) with 8 core(s) each.
1743 17:50:17.272812 Error: Could not locate 'wifi_sar' in VPD.
1744 17:50:17.276082 Error: failed from getting SAR limits!
1745 17:50:17.280942 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1746 17:50:17.284167 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1747 17:50:17.288626 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1748 17:50:17.292594 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1749 17:50:17.297927 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1750 17:50:17.303284 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1751 17:50:17.308508 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1752 17:50:17.312053 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1753 17:50:17.318032 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1754 17:50:17.324318 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1755 17:50:17.329426 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1756 17:50:17.335855 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1757 17:50:17.339797 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1758 17:50:17.345086 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1759 17:50:17.349695 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1760 17:50:17.354264 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1761 17:50:17.359833 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1762 17:50:17.365394 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1763 17:50:17.372073 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1764 17:50:17.376917 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1765 17:50:17.383332 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1766 17:50:17.387606 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1767 17:50:17.391023 ACPI: added table 2/32, length now 44
1768 17:50:17.393700 ACPI: * MCFG
1769 17:50:17.396442 ACPI: added table 3/32, length now 48
1770 17:50:17.398682 ACPI: * TPM2
1771 17:50:17.402066 TPM2 log created at 89afe000
1772 17:50:17.405631 ACPI: added table 4/32, length now 52
1773 17:50:17.406495 ACPI: * MADT
1774 17:50:17.408489 SCI is IRQ9
1775 17:50:17.412484 ACPI: added table 5/32, length now 56
1776 17:50:17.414397 current = 89c14bd0
1777 17:50:17.416278 ACPI: * IGD OpRegion
1778 17:50:17.418374 GMA: Found VBT in CBFS
1779 17:50:17.421918 GMA: Found valid VBT in CBFS
1780 17:50:17.425733 ACPI: added table 6/32, length now 60
1781 17:50:17.426680 ACPI: * HPET
1782 17:50:17.430714 ACPI: added table 7/32, length now 64
1783 17:50:17.432231 ACPI: done.
1784 17:50:17.435090 ACPI tables: 31872 bytes.
1785 17:50:17.437903 smbios_write_tables: 89afd000
1786 17:50:17.439935 recv_ec_data: 0x01
1787 17:50:17.442187 Create SMBIOS type 17
1788 17:50:17.445000 PCI: 00:14.3 (Intel WiFi)
1789 17:50:17.447376 SMBIOS tables: 708 bytes.
1790 17:50:17.451830 Writing table forward entry at 0x00000500
1791 17:50:17.457871 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1792 17:50:17.461137 Writing coreboot table at 0x89c33000
1793 17:50:17.467050 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1794 17:50:17.471942 1. 0000000000001000-000000000009ffff: RAM
1795 17:50:17.476352 2. 00000000000a0000-00000000000fffff: RESERVED
1796 17:50:17.480687 3. 0000000000100000-0000000089afcfff: RAM
1797 17:50:17.486695 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1798 17:50:17.490788 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1799 17:50:17.497411 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1800 17:50:17.502521 7. 000000008a000000-000000008f7fffff: RESERVED
1801 17:50:17.507281 8. 00000000e0000000-00000000efffffff: RESERVED
1802 17:50:17.511412 9. 00000000fc000000-00000000fc000fff: RESERVED
1803 17:50:17.516947 10. 00000000fe000000-00000000fe00ffff: RESERVED
1804 17:50:17.521122 11. 00000000fed10000-00000000fed17fff: RESERVED
1805 17:50:17.525924 12. 00000000fed80000-00000000fed83fff: RESERVED
1806 17:50:17.530850 13. 00000000feda0000-00000000feda1fff: RESERVED
1807 17:50:17.534746 14. 0000000100000000-000000026e7fffff: RAM
1808 17:50:17.540105 Graphics framebuffer located at 0xc0000000
1809 17:50:17.543043 Passing 6 GPIOs to payload:
1810 17:50:17.546866 NAME | PORT | POLARITY | VALUE
1811 17:50:17.552423 write protect | 0x000000dc | high | high
1812 17:50:17.558042 recovery | 0x000000d5 | low | high
1813 17:50:17.563419 lid | undefined | high | high
1814 17:50:17.568374 power | undefined | high | low
1815 17:50:17.573206 oprom | undefined | high | low
1816 17:50:17.578774 EC in RW | undefined | high | low
1817 17:50:17.581537 recv_ec_data: 0x01
1818 17:50:17.581832 SKU ID: 3
1819 17:50:17.584745 CBFS @ 1d00000 size 300000
1820 17:50:17.590888 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1821 17:50:17.597354 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a37d
1822 17:50:17.600215 coreboot table: 1484 bytes.
1823 17:50:17.604316 IMD ROOT 0. 89fff000 00001000
1824 17:50:17.606425 IMD SMALL 1. 89ffe000 00001000
1825 17:50:17.610412 FSP MEMORY 2. 89d0e000 002f0000
1826 17:50:17.613118 CONSOLE 3. 89cee000 00020000
1827 17:50:17.616739 TIME STAMP 4. 89ced000 00000910
1828 17:50:17.619404 VBOOT WORK 5. 89cea000 00003000
1829 17:50:17.623843 VBOOT 6. 89ce9000 00000c0c
1830 17:50:17.626400 MRC DATA 7. 89ce7000 000018f0
1831 17:50:17.630128 ROMSTG STCK 8. 89ce6000 00000400
1832 17:50:17.633117 AFTER CAR 9. 89cdc000 0000a000
1833 17:50:17.636523 RAMSTAGE 10. 89c80000 0005c000
1834 17:50:17.639267 REFCODE 11. 89c4b000 00035000
1835 17:50:17.642721 SMM BACKUP 12. 89c3b000 00010000
1836 17:50:17.646148 COREBOOT 13. 89c33000 00008000
1837 17:50:17.649784 ACPI 14. 89c0f000 00024000
1838 17:50:17.652893 ACPI GNVS 15. 89c0e000 00001000
1839 17:50:17.656111 RAMOOPS 16. 89b0e000 00100000
1840 17:50:17.660071 TPM2 TCGLOG17. 89afe000 00010000
1841 17:50:17.663032 SMBIOS 18. 89afd000 00000800
1842 17:50:17.664470 IMD small region:
1843 17:50:17.668320 IMD ROOT 0. 89ffec00 00000400
1844 17:50:17.672471 FSP RUNTIME 1. 89ffebe0 00000004
1845 17:50:17.674911 POWER STATE 2. 89ffeba0 00000040
1846 17:50:17.678498 ROMSTAGE 3. 89ffeb80 00000004
1847 17:50:17.682122 MEM INFO 4. 89ffe9c0 000001a9
1848 17:50:17.685707 VPD 5. 89ffe960 00000058
1849 17:50:17.688894 COREBOOTFWD 6. 89ffe920 00000028
1850 17:50:17.692635 MTRR: Physical address space:
1851 17:50:17.698184 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1852 17:50:17.705201 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1853 17:50:17.711260 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1854 17:50:17.717182 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1855 17:50:17.723124 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1856 17:50:17.729752 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1857 17:50:17.736664 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1858 17:50:17.740617 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 17:50:17.743731 MTRR: Fixed MSR 0x258 0x0606060606060606
1860 17:50:17.748446 MTRR: Fixed MSR 0x259 0x0000000000000000
1861 17:50:17.752826 MTRR: Fixed MSR 0x268 0x0606060606060606
1862 17:50:17.756464 MTRR: Fixed MSR 0x269 0x0606060606060606
1863 17:50:17.760870 MTRR: Fixed MSR 0x26a 0x0606060606060606
1864 17:50:17.764008 MTRR: Fixed MSR 0x26b 0x0606060606060606
1865 17:50:17.768190 MTRR: Fixed MSR 0x26c 0x0606060606060606
1866 17:50:17.773037 MTRR: Fixed MSR 0x26d 0x0606060606060606
1867 17:50:17.776703 MTRR: Fixed MSR 0x26e 0x0606060606060606
1868 17:50:17.780584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1869 17:50:17.784899 call enable_fixed_mtrr()
1870 17:50:17.787518 CPU physical address size: 39 bits
1871 17:50:17.791761 MTRR: default type WB/UC MTRR counts: 7/7.
1872 17:50:17.795435 MTRR: UC selected as default type.
1873 17:50:17.802137 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1874 17:50:17.808131 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1875 17:50:17.813844 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1876 17:50:17.820531 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1877 17:50:17.827156 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1878 17:50:17.832375 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1879 17:50:17.840067 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1880 17:50:17.840182
1881 17:50:17.841705 MTRR check
1882 17:50:17.843685 Fixed MTRRs : Enabled
1883 17:50:17.846035 Variable MTRRs: Enabled
1884 17:50:17.846334
1885 17:50:17.850057 MTRR: Fixed MSR 0x250 0x0606060606060606
1886 17:50:17.853982 MTRR: Fixed MSR 0x258 0x0606060606060606
1887 17:50:17.859003 MTRR: Fixed MSR 0x259 0x0000000000000000
1888 17:50:17.862273 MTRR: Fixed MSR 0x268 0x0606060606060606
1889 17:50:17.866066 MTRR: Fixed MSR 0x269 0x0606060606060606
1890 17:50:17.870363 MTRR: Fixed MSR 0x26a 0x0606060606060606
1891 17:50:17.874995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1892 17:50:17.879445 MTRR: Fixed MSR 0x26c 0x0606060606060606
1893 17:50:17.883047 MTRR: Fixed MSR 0x26d 0x0606060606060606
1894 17:50:17.887251 MTRR: Fixed MSR 0x26e 0x0606060606060606
1895 17:50:17.891420 MTRR: Fixed MSR 0x26f 0x0606060606060606
1896 17:50:17.898401 BS: BS_WRITE_TABLES times (us): entry 17189 run 489895 exit 157036
1897 17:50:17.900293 call enable_fixed_mtrr()
1898 17:50:17.902865 CBFS @ 1d00000 size 300000
1899 17:50:17.909706 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1900 17:50:17.913011 CPU physical address size: 39 bits
1901 17:50:17.917033 CBFS: Locating 'fallback/payload'
1902 17:50:17.920586 MTRR: Fixed MSR 0x250 0x0606060606060606
1903 17:50:17.925350 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 17:50:17.929093 MTRR: Fixed MSR 0x258 0x0606060606060606
1905 17:50:17.933324 MTRR: Fixed MSR 0x259 0x0000000000000000
1906 17:50:17.937655 MTRR: Fixed MSR 0x268 0x0606060606060606
1907 17:50:17.941150 MTRR: Fixed MSR 0x269 0x0606060606060606
1908 17:50:17.945889 MTRR: Fixed MSR 0x26a 0x0606060606060606
1909 17:50:17.949262 MTRR: Fixed MSR 0x26b 0x0606060606060606
1910 17:50:17.953628 MTRR: Fixed MSR 0x26c 0x0606060606060606
1911 17:50:17.958341 MTRR: Fixed MSR 0x26d 0x0606060606060606
1912 17:50:17.961690 MTRR: Fixed MSR 0x26e 0x0606060606060606
1913 17:50:17.966042 MTRR: Fixed MSR 0x26f 0x0606060606060606
1914 17:50:17.970656 MTRR: Fixed MSR 0x258 0x0606060606060606
1915 17:50:17.973104 call enable_fixed_mtrr()
1916 17:50:17.977030 MTRR: Fixed MSR 0x259 0x0000000000000000
1917 17:50:17.981076 MTRR: Fixed MSR 0x268 0x0606060606060606
1918 17:50:17.984741 MTRR: Fixed MSR 0x269 0x0606060606060606
1919 17:50:17.989343 MTRR: Fixed MSR 0x26a 0x0606060606060606
1920 17:50:17.993156 MTRR: Fixed MSR 0x26b 0x0606060606060606
1921 17:50:17.997441 MTRR: Fixed MSR 0x26c 0x0606060606060606
1922 17:50:18.001279 MTRR: Fixed MSR 0x26d 0x0606060606060606
1923 17:50:18.005526 MTRR: Fixed MSR 0x26e 0x0606060606060606
1924 17:50:18.010002 MTRR: Fixed MSR 0x26f 0x0606060606060606
1925 17:50:18.013945 CPU physical address size: 39 bits
1926 17:50:18.015774 call enable_fixed_mtrr()
1927 17:50:18.020005 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 17:50:18.024420 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 17:50:18.028446 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 17:50:18.032355 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 17:50:18.036444 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 17:50:18.040914 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 17:50:18.044979 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 17:50:18.049208 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 17:50:18.052990 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 17:50:18.056833 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 17:50:18.061049 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 17:50:18.065197 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 17:50:18.069967 MTRR: Fixed MSR 0x258 0x0606060606060606
1940 17:50:18.072559 call enable_fixed_mtrr()
1941 17:50:18.076025 MTRR: Fixed MSR 0x259 0x0000000000000000
1942 17:50:18.079989 MTRR: Fixed MSR 0x268 0x0606060606060606
1943 17:50:18.084589 MTRR: Fixed MSR 0x269 0x0606060606060606
1944 17:50:18.087936 MTRR: Fixed MSR 0x26a 0x0606060606060606
1945 17:50:18.092143 MTRR: Fixed MSR 0x26b 0x0606060606060606
1946 17:50:18.096930 MTRR: Fixed MSR 0x26c 0x0606060606060606
1947 17:50:18.101291 MTRR: Fixed MSR 0x26d 0x0606060606060606
1948 17:50:18.104846 MTRR: Fixed MSR 0x26e 0x0606060606060606
1949 17:50:18.109384 MTRR: Fixed MSR 0x26f 0x0606060606060606
1950 17:50:18.113042 CPU physical address size: 39 bits
1951 17:50:18.115380 call enable_fixed_mtrr()
1952 17:50:18.118634 CPU physical address size: 39 bits
1953 17:50:18.122490 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 17:50:18.126462 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 17:50:18.130398 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 17:50:18.135394 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 17:50:18.139301 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 17:50:18.142869 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 17:50:18.147898 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 17:50:18.150994 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 17:50:18.155636 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 17:50:18.159230 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 17:50:18.164243 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 17:50:18.167803 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 17:50:18.172277 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 17:50:18.174359 call enable_fixed_mtrr()
1967 17:50:18.178995 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 17:50:18.182789 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 17:50:18.187527 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 17:50:18.190715 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 17:50:18.195110 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 17:50:18.198758 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 17:50:18.203224 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 17:50:18.207452 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 17:50:18.211700 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 17:50:18.215141 CPU physical address size: 39 bits
1977 17:50:18.217796 call enable_fixed_mtrr()
1978 17:50:18.222047 CBFS: Found @ offset 1cf4c0 size 3a954
1979 17:50:18.224967 CPU physical address size: 39 bits
1980 17:50:18.228649 CPU physical address size: 39 bits
1981 17:50:18.233713 Checking segment from ROM address 0xffecf4f8
1982 17:50:18.237380 Checking segment from ROM address 0xffecf514
1983 17:50:18.242823 Loading segment from ROM address 0xffecf4f8
1984 17:50:18.244744 code (compression=0)
1985 17:50:18.253061 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1986 17:50:18.262218 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1987 17:50:18.264114 it's not compressed!
1988 17:50:18.345832 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1989 17:50:18.352124 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1990 17:50:18.360323 Loading segment from ROM address 0xffecf514
1991 17:50:18.362618 Entry Point 0x30100018
1992 17:50:18.364700 Loaded segments
1993 17:50:18.374513 Finalizing chipset.
1994 17:50:18.375646 Finalizing SMM.
1995 17:50:18.382101 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466304 exit 11536
1996 17:50:18.386110 mp_park_aps done after 0 msecs.
1997 17:50:18.390136 Jumping to boot code at 30100018(89c33000)
1998 17:50:18.398362 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1999 17:50:18.398846
2000 17:50:18.399213
2001 17:50:18.399962
2002 17:50:18.402808 Starting depthcharge on sarien...
2003 17:50:18.403268
2004 17:50:18.405643 end: 2.2.3 depthcharge-start (duration 00:00:12) [common]
2005 17:50:18.406199 start: 2.2.4 bootloader-commands (timeout 00:04:31) [common]
2006 17:50:18.406646 Setting prompt string to ['sarien:']
2007 17:50:18.407092 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:31)
2008 17:50:18.409962 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2009 17:50:18.410430
2010 17:50:18.417707 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2011 17:50:18.418170
2012 17:50:18.425451 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
2013 17:50:18.426202
2014 17:50:18.427381 BIOS MMAP details:
2015 17:50:18.428109
2016 17:50:18.429990 IFD Base Offset : 0x1000000
2017 17:50:18.430469
2018 17:50:18.433301 IFD End Offset : 0x2000000
2019 17:50:18.434093
2020 17:50:18.435551 MMAP Size : 0x1000000
2021 17:50:18.436324
2022 17:50:18.438394 MMAP Start : 0xff000000
2023 17:50:18.439727
2024 17:50:18.445723 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
2025 17:50:18.449942
2026 17:50:18.453907 New NVMe Controller 0x3214e110 @ 00:1d:04
2027 17:50:18.454442
2028 17:50:18.457790 New NVMe Controller 0x3214e1d8 @ 00:1d:00
2029 17:50:18.458566
2030 17:50:18.464463 The GBB signature is at 0x30000014 and is: 24 47 42 42
2031 17:50:18.468121
2032 17:50:18.470299 Wipe memory regions:
2033 17:50:18.471052
2034 17:50:18.473615 [0x00000000001000, 0x000000000a0000)
2035 17:50:18.474385
2036 17:50:18.478023 [0x00000000100000, 0x00000030000000)
2037 17:50:18.560804
2038 17:50:18.564479 [0x00000032751910, 0x00000089afd000)
2039 17:50:18.714089
2040 17:50:18.717081 [0x00000100000000, 0x0000026e800000)
2041 17:50:19.726478
2042 17:50:19.727948 R8152: Initializing
2043 17:50:19.728389
2044 17:50:19.730512 Version 6 (ocp_data = 5c30)
2045 17:50:19.731603
2046 17:50:19.733704 R8152: Done initializing
2047 17:50:19.734557
2048 17:50:19.735851 Adding net device
2049 17:50:19.741789
2050 17:50:19.747972 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2051 17:50:19.748842
2052 17:50:19.749216
2053 17:50:19.749535
2054 17:50:19.750363 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 17:50:19.851602 sarien: tftpboot 192.168.201.1 11831907/tftp-deploy-icbau5dx/kernel/bzImage 11831907/tftp-deploy-icbau5dx/kernel/cmdline 11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
2057 17:50:19.852245 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 17:50:19.852819 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:30)
2059 17:50:19.896004 tftpboot 192.168.201.1 11831907/tftp-deploy-icbau5dx/kernel/bzImage 11831907/tftp-deploy-icbau5dx/kernel/cmdline 11831907/tftp-deploy-icbau5dx/ramdisk/ramdisk.cpio.gz
2060 17:50:19.896584
2061 17:50:19.896961 Waiting for link
2062 17:50:20.056200
2063 17:50:20.057285 done.
2064 17:50:20.057665
2065 17:50:20.059157 MAC: 00:24:32:30:79:bd
2066 17:50:20.059634
2067 17:50:20.062705 Sending DHCP discover... done.
2068 17:50:20.063171
2069 17:50:20.065203 Waiting for reply... done.
2070 17:50:20.065860
2071 17:50:20.068037 Sending DHCP request... done.
2072 17:50:20.068533
2073 17:50:20.073665 Waiting for reply... done.
2074 17:50:20.074254
2075 17:50:20.076104 My ip is 192.168.201.166
2076 17:50:20.076590
2077 17:50:20.079117 The DHCP server ip is 192.168.201.1
2078 17:50:20.079848
2079 17:50:20.083880 TFTP server IP predefined by user: 192.168.201.1
2080 17:50:20.084469
2081 17:50:20.091861 Bootfile predefined by user: 11831907/tftp-deploy-icbau5dx/kernel/bzImage
2082 17:50:20.092292
2083 17:50:20.095029 Sending tftp read request... done.
2084 17:50:20.095594
2085 17:50:20.101775 Waiting for the transfer...
2086 17:50:20.102632
2087 17:50:20.814847 00000000 ################################################################
2088 17:50:20.815475
2089 17:50:21.548688 00080000 ################################################################
2090 17:50:21.549233
2091 17:50:22.288891 00100000 ################################################################
2092 17:50:22.290110
2093 17:50:23.015720 00180000 ################################################################
2094 17:50:23.016205
2095 17:50:23.746134 00200000 ################################################################
2096 17:50:23.746696
2097 17:50:24.425913 00280000 ################################################################
2098 17:50:24.426444
2099 17:50:25.146332 00300000 ################################################################
2100 17:50:25.146963
2101 17:50:25.846324 00380000 ################################################################
2102 17:50:25.847234
2103 17:50:26.574130 00400000 ################################################################
2104 17:50:26.575543
2105 17:50:27.292830 00480000 ################################################################
2106 17:50:27.293958
2107 17:50:28.015776 00500000 ################################################################
2108 17:50:28.016453
2109 17:50:28.732003 00580000 ################################################################
2110 17:50:28.732538
2111 17:50:29.439248 00600000 ################################################################
2112 17:50:29.439845
2113 17:50:30.144774 00680000 ################################################################
2114 17:50:30.145314
2115 17:50:30.853796 00700000 ################################################################
2116 17:50:30.855003
2117 17:50:31.571218 00780000 ################################################################
2118 17:50:31.571844
2119 17:50:31.741436 00800000 ############### done.
2120 17:50:31.741983
2121 17:50:31.745304 The bootfile was 8507280 bytes long.
2122 17:50:31.745882
2123 17:50:31.748562 Sending tftp read request... done.
2124 17:50:31.748960
2125 17:50:31.753181 Waiting for the transfer...
2126 17:50:31.753746
2127 17:50:32.442494 00000000 ################################################################
2128 17:50:32.443176
2129 17:50:33.012927 00080000 ################################################################
2130 17:50:33.013521
2131 17:50:33.536428 00100000 ################################################################
2132 17:50:33.537081
2133 17:50:34.052449 00180000 ################################################################
2134 17:50:34.053011
2135 17:50:34.596585 00200000 ################################################################
2136 17:50:34.596945
2137 17:50:35.153141 00280000 ################################################################
2138 17:50:35.153299
2139 17:50:35.694846 00300000 ################################################################
2140 17:50:35.695502
2141 17:50:36.246646 00380000 ################################################################
2142 17:50:36.247251
2143 17:50:36.768021 00400000 ################################################################
2144 17:50:36.768417
2145 17:50:37.286651 00480000 ################################################################
2146 17:50:37.287012
2147 17:50:37.803095 00500000 ################################################################ done.
2148 17:50:37.803225
2149 17:50:37.806154 Sending tftp read request... done.
2150 17:50:37.806462
2151 17:50:37.809046 Waiting for the transfer...
2152 17:50:37.809118
2153 17:50:37.810429 00000000 # done.
2154 17:50:37.810935
2155 17:50:37.819996 Command line loaded dynamically from TFTP file: 11831907/tftp-deploy-icbau5dx/kernel/cmdline
2156 17:50:37.820325
2157 17:50:37.849613 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831907/extract-nfsrootfs-kws_9vh9,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2158 17:50:37.851967
2159 17:50:37.855951 Shutting down all USB controllers.
2160 17:50:37.856047
2161 17:50:37.858462 Removing current net device
2162 17:50:37.859991
2163 17:50:37.862628 EC: exit firmware mode
2164 17:50:37.863252
2165 17:50:37.865823 Finalizing coreboot
2166 17:50:37.866868
2167 17:50:37.872077 Exiting depthcharge with code 4 at timestamp: 27154587
2168 17:50:37.872155
2169 17:50:37.872219
2170 17:50:37.874453 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2171 17:50:37.874557 start: 2.2.5 auto-login-action (timeout 00:04:12) [common]
2172 17:50:37.874645 Setting prompt string to ['Linux version [0-9]']
2173 17:50:37.874713 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 17:50:37.874781 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 17:50:37.874962 Starting kernel ...
2176 17:50:37.875032
2177 17:50:37.875100
2179 17:54:49.875654 end: 2.2.5 auto-login-action (duration 00:04:12) [common]
2181 17:54:49.876751 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 252 seconds'
2183 17:54:49.877592 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2186 17:54:49.879245 end: 2 depthcharge-action (duration 00:05:00) [common]
2188 17:54:49.880671 Cleaning after the job
2189 17:54:49.881151 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/ramdisk
2190 17:54:49.885840 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/kernel
2191 17:54:49.892914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/nfsrootfs
2192 17:54:49.996287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831907/tftp-deploy-icbau5dx/modules
2193 17:54:49.996734 start: 5.1 power-off (timeout 00:00:30) [common]
2194 17:54:49.996908 Calling: 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2195 17:54:55.138288 >> Command sent successfully.
2196 17:54:55.144164 Returned 0 in 5 seconds
2197 17:54:55.244897 end: 5.1 power-off (duration 00:00:05) [common]
2199 17:54:55.246296 start: 5.2 read-feedback (timeout 00:09:55) [common]
2200 17:54:55.247653 Listened to connection for namespace 'common' for up to 1s
2201 17:54:56.247669 Finalising connection for namespace 'common'
2202 17:54:56.248322 Disconnecting from shell: Finalise
2203 17:54:56.248726
2204 17:54:56.349789 end: 5.2 read-feedback (duration 00:00:01) [common]
2205 17:54:56.350369 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831907
2206 17:54:56.700999 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831907
2207 17:54:56.701191 JobError: Your job cannot terminate cleanly.