Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:44:13.315709 lava-dispatcher, installed at version: 2023.08
2 17:44:13.315919 start: 0 validate
3 17:44:13.316053 Start time: 2023-10-20 17:44:13.316046+00:00 (UTC)
4 17:44:13.316173 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:44:13.316305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230623.0%2Famd64%2Frootfs.cpio.gz exists
6 17:44:13.568182 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:44:13.568705 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:44:13.837086 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:44:13.837833 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 17:44:14.113756 validate duration: 0.80
12 17:44:14.115039 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 17:44:14.115749 start: 1.1 download-retry (timeout 00:10:00) [common]
14 17:44:14.116253 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 17:44:14.116864 Not decompressing ramdisk as can be used compressed.
16 17:44:14.117319 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230623.0/amd64/rootfs.cpio.gz
17 17:44:14.117659 saving as /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/ramdisk/rootfs.cpio.gz
18 17:44:14.117986 total size: 35760064 (34 MB)
19 17:44:14.122852 progress 0 % (0 MB)
20 17:44:14.152770 progress 5 % (1 MB)
21 17:44:14.166669 progress 10 % (3 MB)
22 17:44:14.177119 progress 15 % (5 MB)
23 17:44:14.186503 progress 20 % (6 MB)
24 17:44:14.195714 progress 25 % (8 MB)
25 17:44:14.205081 progress 30 % (10 MB)
26 17:44:14.214219 progress 35 % (11 MB)
27 17:44:14.223535 progress 40 % (13 MB)
28 17:44:14.232836 progress 45 % (15 MB)
29 17:44:14.241949 progress 50 % (17 MB)
30 17:44:14.251346 progress 55 % (18 MB)
31 17:44:14.260760 progress 60 % (20 MB)
32 17:44:14.270248 progress 65 % (22 MB)
33 17:44:14.279412 progress 70 % (23 MB)
34 17:44:14.288749 progress 75 % (25 MB)
35 17:44:14.298045 progress 80 % (27 MB)
36 17:44:14.307200 progress 85 % (29 MB)
37 17:44:14.316637 progress 90 % (30 MB)
38 17:44:14.325696 progress 95 % (32 MB)
39 17:44:14.334884 progress 100 % (34 MB)
40 17:44:14.335036 34 MB downloaded in 0.22 s (157.11 MB/s)
41 17:44:14.335195 end: 1.1.1 http-download (duration 00:00:00) [common]
43 17:44:14.335442 end: 1.1 download-retry (duration 00:00:00) [common]
44 17:44:14.335529 start: 1.2 download-retry (timeout 00:10:00) [common]
45 17:44:14.335612 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 17:44:14.335791 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 17:44:14.335861 saving as /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/kernel/bzImage
48 17:44:14.335921 total size: 8507280 (8 MB)
49 17:44:14.335989 No compression specified
50 17:44:14.337120 progress 0 % (0 MB)
51 17:44:14.339254 progress 5 % (0 MB)
52 17:44:14.341574 progress 10 % (0 MB)
53 17:44:14.343874 progress 15 % (1 MB)
54 17:44:14.346119 progress 20 % (1 MB)
55 17:44:14.348379 progress 25 % (2 MB)
56 17:44:14.350625 progress 30 % (2 MB)
57 17:44:14.352891 progress 35 % (2 MB)
58 17:44:14.355140 progress 40 % (3 MB)
59 17:44:14.357389 progress 45 % (3 MB)
60 17:44:14.359677 progress 50 % (4 MB)
61 17:44:14.361928 progress 55 % (4 MB)
62 17:44:14.364174 progress 60 % (4 MB)
63 17:44:14.366410 progress 65 % (5 MB)
64 17:44:14.368710 progress 70 % (5 MB)
65 17:44:14.370915 progress 75 % (6 MB)
66 17:44:14.373151 progress 80 % (6 MB)
67 17:44:14.375367 progress 85 % (6 MB)
68 17:44:14.377655 progress 90 % (7 MB)
69 17:44:14.379878 progress 95 % (7 MB)
70 17:44:14.382181 progress 100 % (8 MB)
71 17:44:14.382372 8 MB downloaded in 0.05 s (174.68 MB/s)
72 17:44:14.382516 end: 1.2.1 http-download (duration 00:00:00) [common]
74 17:44:14.382743 end: 1.2 download-retry (duration 00:00:00) [common]
75 17:44:14.382828 start: 1.3 download-retry (timeout 00:10:00) [common]
76 17:44:14.382916 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 17:44:14.383054 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 17:44:14.383122 saving as /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/modules/modules.tar
79 17:44:14.383182 total size: 253900 (0 MB)
80 17:44:14.383247 Using unxz to decompress xz
81 17:44:14.387565 progress 12 % (0 MB)
82 17:44:14.388025 progress 25 % (0 MB)
83 17:44:14.388260 progress 38 % (0 MB)
84 17:44:14.389849 progress 51 % (0 MB)
85 17:44:14.391702 progress 64 % (0 MB)
86 17:44:14.393605 progress 77 % (0 MB)
87 17:44:14.395464 progress 90 % (0 MB)
88 17:44:14.397219 progress 100 % (0 MB)
89 17:44:14.402928 0 MB downloaded in 0.02 s (12.27 MB/s)
90 17:44:14.403166 end: 1.3.1 http-download (duration 00:00:00) [common]
92 17:44:14.403429 end: 1.3 download-retry (duration 00:00:00) [common]
93 17:44:14.403525 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
94 17:44:14.403627 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
95 17:44:14.403767 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
96 17:44:14.403856 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
97 17:44:14.404079 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p
98 17:44:14.404213 makedir: /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin
99 17:44:14.404319 makedir: /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/tests
100 17:44:14.404418 makedir: /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/results
101 17:44:14.404533 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-add-keys
102 17:44:14.404678 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-add-sources
103 17:44:14.404811 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-background-process-start
104 17:44:14.404940 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-background-process-stop
105 17:44:14.405066 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-common-functions
106 17:44:14.405192 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-echo-ipv4
107 17:44:14.405319 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-install-packages
108 17:44:14.405445 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-installed-packages
109 17:44:14.405569 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-os-build
110 17:44:14.405694 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-probe-channel
111 17:44:14.405823 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-probe-ip
112 17:44:14.405948 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-target-ip
113 17:44:14.406071 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-target-mac
114 17:44:14.406194 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-target-storage
115 17:44:14.406325 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-case
116 17:44:14.406449 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-event
117 17:44:14.406574 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-feedback
118 17:44:14.406708 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-raise
119 17:44:14.406837 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-reference
120 17:44:14.406966 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-runner
121 17:44:14.407097 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-set
122 17:44:14.407225 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-test-shell
123 17:44:14.407356 Updating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-install-packages (oe)
124 17:44:14.407511 Updating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/bin/lava-installed-packages (oe)
125 17:44:14.407634 Creating /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/environment
126 17:44:14.407780 LAVA metadata
127 17:44:14.407853 - LAVA_JOB_ID=11831833
128 17:44:14.407918 - LAVA_DISPATCHER_IP=192.168.201.1
129 17:44:14.408021 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
130 17:44:14.408090 skipped lava-vland-overlay
131 17:44:14.408167 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
132 17:44:14.408250 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
133 17:44:14.408310 skipped lava-multinode-overlay
134 17:44:14.408388 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
135 17:44:14.408470 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
136 17:44:14.408546 Loading test definitions
137 17:44:14.408640 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
138 17:44:14.408717 Using /lava-11831833 at stage 0
139 17:44:14.409020 uuid=11831833_1.4.2.3.1 testdef=None
140 17:44:14.409106 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
141 17:44:14.409193 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
142 17:44:14.409708 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
144 17:44:14.409936 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
145 17:44:14.410540 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
147 17:44:14.410766 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
148 17:44:14.411372 runner path: /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/0/tests/0_cros-ec test_uuid 11831833_1.4.2.3.1
149 17:44:14.411527 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
151 17:44:14.411777 Creating lava-test-runner.conf files
152 17:44:14.411840 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831833/lava-overlay-l4c2w87p/lava-11831833/0 for stage 0
153 17:44:14.411929 - 0_cros-ec
154 17:44:14.412031 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
155 17:44:14.412115 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
156 17:44:14.418754 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
157 17:44:14.418858 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
158 17:44:14.418942 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
159 17:44:14.419025 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
160 17:44:14.419110 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
161 17:44:15.461517 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
162 17:44:15.461899 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
163 17:44:15.462014 extracting modules file /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831833/extract-overlay-ramdisk-skbvl6__/ramdisk
164 17:44:15.477140 end: 1.4.4 extract-modules (duration 00:00:00) [common]
165 17:44:15.477274 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
166 17:44:15.477370 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831833/compress-overlay-7_75b4ej/overlay-1.4.2.4.tar.gz to ramdisk
167 17:44:15.477449 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831833/compress-overlay-7_75b4ej/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831833/extract-overlay-ramdisk-skbvl6__/ramdisk
168 17:44:15.485185 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
169 17:44:15.485304 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
170 17:44:15.485396 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
171 17:44:15.485481 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
172 17:44:15.485558 Building ramdisk /var/lib/lava/dispatcher/tmp/11831833/extract-overlay-ramdisk-skbvl6__/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831833/extract-overlay-ramdisk-skbvl6__/ramdisk
173 17:44:16.029300 >> 184121 blocks
174 17:44:19.530289 rename /var/lib/lava/dispatcher/tmp/11831833/extract-overlay-ramdisk-skbvl6__/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
175 17:44:19.530782 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
176 17:44:19.530904 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
177 17:44:19.531003 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
178 17:44:19.531097 No mkimage arch provided, not using FIT.
179 17:44:19.531189 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
180 17:44:19.531271 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
181 17:44:19.531376 end: 1.4 prepare-tftp-overlay (duration 00:00:05) [common]
182 17:44:19.531467 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
183 17:44:19.531547 No LXC device requested
184 17:44:19.531626 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
185 17:44:19.531766 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
186 17:44:19.531848 end: 1.6 deploy-device-env (duration 00:00:00) [common]
187 17:44:19.531919 Checking files for TFTP limit of 4294967296 bytes.
188 17:44:19.532324 end: 1 tftp-deploy (duration 00:00:05) [common]
189 17:44:19.532426 start: 2 depthcharge-action (timeout 00:05:00) [common]
190 17:44:19.532512 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
191 17:44:19.532633 substitutions:
192 17:44:19.532699 - {DTB}: None
193 17:44:19.532763 - {INITRD}: 11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
194 17:44:19.532820 - {KERNEL}: 11831833/tftp-deploy-8onvd8br/kernel/bzImage
195 17:44:19.532877 - {LAVA_MAC}: None
196 17:44:19.532932 - {PRESEED_CONFIG}: None
197 17:44:19.532987 - {PRESEED_LOCAL}: None
198 17:44:19.533040 - {RAMDISK}: 11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
199 17:44:19.533095 - {ROOT_PART}: None
200 17:44:19.533148 - {ROOT}: None
201 17:44:19.533201 - {SERVER_IP}: 192.168.201.1
202 17:44:19.533253 - {TEE}: None
203 17:44:19.533306 Parsed boot commands:
204 17:44:19.533357 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
205 17:44:19.533534 Parsed boot commands: tftpboot 192.168.201.1 11831833/tftp-deploy-8onvd8br/kernel/bzImage 11831833/tftp-deploy-8onvd8br/kernel/cmdline 11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
206 17:44:19.533621 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
207 17:44:19.533701 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
208 17:44:19.533790 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
209 17:44:19.533875 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
210 17:44:19.533941 Not connected, no need to disconnect.
211 17:44:19.534015 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
212 17:44:19.534097 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
213 17:44:19.534161 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-14'
214 17:44:19.538251 Setting prompt string to ['lava-test: # ']
215 17:44:19.538611 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
216 17:44:19.538716 end: 2.2.1 reset-connection (duration 00:00:00) [common]
217 17:44:19.538815 start: 2.2.2 reset-device (timeout 00:05:00) [common]
218 17:44:19.538905 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
219 17:44:19.539102 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
220 17:44:24.684658 >> Command sent successfully.
221 17:44:24.695417 Returned 0 in 5 seconds
222 17:44:24.796713 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
224 17:44:24.798121 end: 2.2.2 reset-device (duration 00:00:05) [common]
225 17:44:24.798617 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
226 17:44:24.799054 Setting prompt string to 'Starting depthcharge on Voema...'
227 17:44:24.799393 Changing prompt to 'Starting depthcharge on Voema...'
228 17:44:24.799808 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
229 17:44:24.801181 [Enter `^Ec?' for help]
230 17:44:26.351912
231 17:44:26.352470
232 17:44:26.361768 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
233 17:44:26.368432 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
234 17:44:26.372115 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
235 17:44:26.375347 CPU: AES supported, TXT NOT supported, VT supported
236 17:44:26.382814 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
237 17:44:26.386093 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
238 17:44:26.392761 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
239 17:44:26.395815 VBOOT: Loading verstage.
240 17:44:26.399313 FMAP: Found "FLASH" version 1.1 at 0x1804000.
241 17:44:26.405765 FMAP: base = 0x0 size = 0x2000000 #areas = 32
242 17:44:26.408833 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
243 17:44:26.419004 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
244 17:44:26.426019 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
245 17:44:26.426545
246 17:44:26.426881
247 17:44:26.436142 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
248 17:44:26.452515 Probing TPM: . done!
249 17:44:26.456007 TPM ready after 0 ms
250 17:44:26.459722 Connected to device vid:did:rid of 1ae0:0028:00
251 17:44:26.470686 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
252 17:44:26.477165 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
253 17:44:26.480416 Initialized TPM device CR50 revision 0
254 17:44:26.537080 tlcl_send_startup: Startup return code is 0
255 17:44:26.537670 TPM: setup succeeded
256 17:44:26.551249 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
257 17:44:26.565265 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
258 17:44:26.578635 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
259 17:44:26.588403 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
260 17:44:26.591788 Chrome EC: UHEPI supported
261 17:44:26.595020 Phase 1
262 17:44:26.598770 FMAP: area GBB found @ 1805000 (458752 bytes)
263 17:44:26.608659 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
264 17:44:26.615161 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
265 17:44:26.621548 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
266 17:44:26.628401 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
267 17:44:26.631856 Recovery requested (1009000e)
268 17:44:26.634963 TPM: Extending digest for VBOOT: boot mode into PCR 0
269 17:44:26.646208 tlcl_extend: response is 0
270 17:44:26.653085 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
271 17:44:26.663632 tlcl_extend: response is 0
272 17:44:26.670328 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
273 17:44:26.676386 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
274 17:44:26.682921 BS: verstage times (exec / console): total (unknown) / 142 ms
275 17:44:26.683454
276 17:44:26.683849
277 17:44:26.696253 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
278 17:44:26.702932 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
279 17:44:26.706253 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
280 17:44:26.709593 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
281 17:44:26.715948 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
282 17:44:26.719441 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
283 17:44:26.722844 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
284 17:44:26.725894 TCO_STS: 0000 0000
285 17:44:26.729153 GEN_PMCON: d0015038 00002200
286 17:44:26.732359 GBLRST_CAUSE: 00000000 00000000
287 17:44:26.735469 HPR_CAUSE0: 00000000
288 17:44:26.736028 prev_sleep_state 5
289 17:44:26.739016 Boot Count incremented to 12848
290 17:44:26.745576 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 17:44:26.752394 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
292 17:44:26.762320 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
293 17:44:26.769210 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
294 17:44:26.772266 Chrome EC: UHEPI supported
295 17:44:26.778893 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
296 17:44:26.790952 Probing TPM: done!
297 17:44:26.797283 Connected to device vid:did:rid of 1ae0:0028:00
298 17:44:26.807162 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
299 17:44:26.810813 Initialized TPM device CR50 revision 0
300 17:44:26.825837 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
301 17:44:26.832237 MRC: Hash idx 0x100b comparison successful.
302 17:44:26.834914 MRC cache found, size faa8
303 17:44:26.835355 bootmode is set to: 2
304 17:44:26.838542 SPD index = 2
305 17:44:26.844951 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
306 17:44:26.848472 SPD: module type is LPDDR4X
307 17:44:26.851926 SPD: module part number is MT53D1G64D4NW-046
308 17:44:26.858742 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
309 17:44:26.861960 SPD: device width 16 bits, bus width 16 bits
310 17:44:26.868350 SPD: module size is 2048 MB (per channel)
311 17:44:27.297061 CBMEM:
312 17:44:27.300259 IMD: root @ 0x76fff000 254 entries.
313 17:44:27.303579 IMD: root @ 0x76ffec00 62 entries.
314 17:44:27.306860 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
315 17:44:27.313376 FMAP: area RW_VPD found @ f35000 (8192 bytes)
316 17:44:27.316659 External stage cache:
317 17:44:27.319904 IMD: root @ 0x7b3ff000 254 entries.
318 17:44:27.323574 IMD: root @ 0x7b3fec00 62 entries.
319 17:44:27.338838 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
320 17:44:27.345509 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
321 17:44:27.351823 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
322 17:44:27.366662 MRC: 'RECOVERY_MRC_CACHE' does not need update.
323 17:44:27.373178 cse_lite: Skip switching to RW in the recovery path
324 17:44:27.373706 8 DIMMs found
325 17:44:27.376353 SMM Memory Map
326 17:44:27.379888 SMRAM : 0x7b000000 0x800000
327 17:44:27.383216 Subregion 0: 0x7b000000 0x200000
328 17:44:27.386355 Subregion 1: 0x7b200000 0x200000
329 17:44:27.389464 Subregion 2: 0x7b400000 0x400000
330 17:44:27.389887 top_of_ram = 0x77000000
331 17:44:27.396235 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
332 17:44:27.402766 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
333 17:44:27.406330 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
334 17:44:27.412639 MTRR Range: Start=ff000000 End=0 (Size 1000000)
335 17:44:27.419017 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
336 17:44:27.425465 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
337 17:44:27.436089 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
338 17:44:27.442874 Processing 211 relocs. Offset value of 0x74c0b000
339 17:44:27.449897 BS: romstage times (exec / console): total (unknown) / 277 ms
340 17:44:27.455005
341 17:44:27.455479
342 17:44:27.464535 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
343 17:44:27.467950 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 17:44:27.478368 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 17:44:27.484921 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 17:44:27.491778 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
347 17:44:27.497958 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
348 17:44:27.541908 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
349 17:44:27.548174 Processing 5008 relocs. Offset value of 0x75d98000
350 17:44:27.551422 BS: postcar times (exec / console): total (unknown) / 59 ms
351 17:44:27.554958
352 17:44:27.555505
353 17:44:27.564471 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
354 17:44:27.564901 Normal boot
355 17:44:27.568476 FW_CONFIG value is 0x804c02
356 17:44:27.571750 PCI: 00:07.0 disabled by fw_config
357 17:44:27.575117 PCI: 00:07.1 disabled by fw_config
358 17:44:27.581735 PCI: 00:0d.2 disabled by fw_config
359 17:44:27.585171 PCI: 00:1c.7 disabled by fw_config
360 17:44:27.588652 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
361 17:44:27.594657 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
362 17:44:27.602106 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
363 17:44:27.604413 GENERIC: 0.0 disabled by fw_config
364 17:44:27.608416 GENERIC: 1.0 disabled by fw_config
365 17:44:27.611425 fw_config match found: DB_USB=USB3_ACTIVE
366 17:44:27.615216 fw_config match found: DB_USB=USB3_ACTIVE
367 17:44:27.621044 fw_config match found: DB_USB=USB3_ACTIVE
368 17:44:27.624379 fw_config match found: DB_USB=USB3_ACTIVE
369 17:44:27.628037 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
370 17:44:27.637532 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
371 17:44:27.644152 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
372 17:44:27.650669 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
373 17:44:27.657326 microcode: sig=0x806c1 pf=0x80 revision=0x86
374 17:44:27.660693 microcode: Update skipped, already up-to-date
375 17:44:27.667731 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
376 17:44:27.695841 Detected 4 core, 8 thread CPU.
377 17:44:27.699206 Setting up SMI for CPU
378 17:44:27.702464 IED base = 0x7b400000
379 17:44:27.706107 IED size = 0x00400000
380 17:44:27.706654 Will perform SMM setup.
381 17:44:27.712317 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
382 17:44:27.719013 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
383 17:44:27.725332 Processing 16 relocs. Offset value of 0x00030000
384 17:44:27.728615 Attempting to start 7 APs
385 17:44:27.731710 Waiting for 10ms after sending INIT.
386 17:44:27.748027 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
387 17:44:27.751413 AP: slot 3 apic_id 4.
388 17:44:27.754946 AP: slot 6 apic_id 5.
389 17:44:27.755470 AP: slot 4 apic_id 6.
390 17:44:27.755855 done.
391 17:44:27.757684 AP: slot 5 apic_id 7.
392 17:44:27.760930 AP: slot 1 apic_id 2.
393 17:44:27.761459 AP: slot 7 apic_id 3.
394 17:44:27.767261 Waiting for 2nd SIPI to complete...done.
395 17:44:27.774505 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
396 17:44:27.780960 Processing 13 relocs. Offset value of 0x00038000
397 17:44:27.783761 Unable to locate Global NVS
398 17:44:27.790666 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
399 17:44:27.793826 Installing permanent SMM handler to 0x7b000000
400 17:44:27.803725 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
401 17:44:27.806842 Processing 794 relocs. Offset value of 0x7b010000
402 17:44:27.817005 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
403 17:44:27.819877 Processing 13 relocs. Offset value of 0x7b008000
404 17:44:27.826714 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
405 17:44:27.833114 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
406 17:44:27.839984 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
407 17:44:27.843134 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
408 17:44:27.849859 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
409 17:44:27.856640 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
410 17:44:27.862866 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
411 17:44:27.865919 Unable to locate Global NVS
412 17:44:27.872635 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
413 17:44:27.876169 Clearing SMI status registers
414 17:44:27.879180 SMI_STS: PM1
415 17:44:27.879613 PM1_STS: PWRBTN
416 17:44:27.885785 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
417 17:44:27.888794 In relocation handler: CPU 0
418 17:44:27.895527 New SMBASE=0x7b000000 IEDBASE=0x7b400000
419 17:44:27.899217 Writing SMRR. base = 0x7b000006, mask=0xff800c00
420 17:44:27.902436 Relocation complete.
421 17:44:27.909100 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
422 17:44:27.912031 In relocation handler: CPU 2
423 17:44:27.915603 New SMBASE=0x7afff800 IEDBASE=0x7b400000
424 17:44:27.918591 Relocation complete.
425 17:44:27.925254 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
426 17:44:27.928356 In relocation handler: CPU 1
427 17:44:27.932021 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
428 17:44:27.938909 Writing SMRR. base = 0x7b000006, mask=0xff800c00
429 17:44:27.939434 Relocation complete.
430 17:44:27.944869 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
431 17:44:27.948791 In relocation handler: CPU 7
432 17:44:27.955673 New SMBASE=0x7affe400 IEDBASE=0x7b400000
433 17:44:27.956233 Relocation complete.
434 17:44:27.961653 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
435 17:44:27.965135 In relocation handler: CPU 4
436 17:44:27.968457 New SMBASE=0x7afff000 IEDBASE=0x7b400000
437 17:44:27.975058 Writing SMRR. base = 0x7b000006, mask=0xff800c00
438 17:44:27.978847 Relocation complete.
439 17:44:27.984592 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
440 17:44:27.988009 In relocation handler: CPU 5
441 17:44:27.991680 New SMBASE=0x7affec00 IEDBASE=0x7b400000
442 17:44:27.995085 Relocation complete.
443 17:44:28.001380 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
444 17:44:28.004786 In relocation handler: CPU 3
445 17:44:28.008041 New SMBASE=0x7afff400 IEDBASE=0x7b400000
446 17:44:28.011312 Writing SMRR. base = 0x7b000006, mask=0xff800c00
447 17:44:28.014541 Relocation complete.
448 17:44:28.021088 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
449 17:44:28.024143 In relocation handler: CPU 6
450 17:44:28.027573 New SMBASE=0x7affe800 IEDBASE=0x7b400000
451 17:44:28.031021 Relocation complete.
452 17:44:28.034036 Initializing CPU #0
453 17:44:28.037613 CPU: vendor Intel device 806c1
454 17:44:28.040442 CPU: family 06, model 8c, stepping 01
455 17:44:28.044169 Clearing out pending MCEs
456 17:44:28.047045 Setting up local APIC...
457 17:44:28.047480 apic_id: 0x00 done.
458 17:44:28.050547 Turbo is available but hidden
459 17:44:28.053980 Turbo is available and visible
460 17:44:28.057269 microcode: Update skipped, already up-to-date
461 17:44:28.060840 CPU #0 initialized
462 17:44:28.064005 Initializing CPU #5
463 17:44:28.064433 Initializing CPU #4
464 17:44:28.066933 CPU: vendor Intel device 806c1
465 17:44:28.071042 CPU: family 06, model 8c, stepping 01
466 17:44:28.073976 CPU: vendor Intel device 806c1
467 17:44:28.080470 CPU: family 06, model 8c, stepping 01
468 17:44:28.080901 Clearing out pending MCEs
469 17:44:28.083819 Clearing out pending MCEs
470 17:44:28.087403 Setting up local APIC...
471 17:44:28.087991 Initializing CPU #7
472 17:44:28.090560 Initializing CPU #1
473 17:44:28.094252 CPU: vendor Intel device 806c1
474 17:44:28.097528 CPU: family 06, model 8c, stepping 01
475 17:44:28.100680 Initializing CPU #6
476 17:44:28.101108 Initializing CPU #3
477 17:44:28.104087 CPU: vendor Intel device 806c1
478 17:44:28.111547 CPU: family 06, model 8c, stepping 01
479 17:44:28.112121 CPU: vendor Intel device 806c1
480 17:44:28.114851 CPU: family 06, model 8c, stepping 01
481 17:44:28.118487 Clearing out pending MCEs
482 17:44:28.121382 Clearing out pending MCEs
483 17:44:28.124584 Setting up local APIC...
484 17:44:28.124981 Setting up local APIC...
485 17:44:28.127845 Clearing out pending MCEs
486 17:44:28.131060 Setting up local APIC...
487 17:44:28.134506 Initializing CPU #2
488 17:44:28.137677 CPU: vendor Intel device 806c1
489 17:44:28.141072 CPU: family 06, model 8c, stepping 01
490 17:44:28.144705 CPU: vendor Intel device 806c1
491 17:44:28.148014 CPU: family 06, model 8c, stepping 01
492 17:44:28.148450 apic_id: 0x07 done.
493 17:44:28.151087 apic_id: 0x06 done.
494 17:44:28.154251 microcode: Update skipped, already up-to-date
495 17:44:28.161316 microcode: Update skipped, already up-to-date
496 17:44:28.161846 CPU #5 initialized
497 17:44:28.164556 apic_id: 0x05 done.
498 17:44:28.167731 apic_id: 0x04 done.
499 17:44:28.171105 Clearing out pending MCEs
500 17:44:28.171625 Setting up local APIC...
501 17:44:28.178103 microcode: Update skipped, already up-to-date
502 17:44:28.180966 microcode: Update skipped, already up-to-date
503 17:44:28.183920 CPU #3 initialized
504 17:44:28.184347 CPU #6 initialized
505 17:44:28.187506 Clearing out pending MCEs
506 17:44:28.190796 Setting up local APIC...
507 17:44:28.191324 CPU #4 initialized
508 17:44:28.194148 Setting up local APIC...
509 17:44:28.197586 apic_id: 0x02 done.
510 17:44:28.200630 apic_id: 0x03 done.
511 17:44:28.204658 microcode: Update skipped, already up-to-date
512 17:44:28.207694 microcode: Update skipped, already up-to-date
513 17:44:28.211240 CPU #1 initialized
514 17:44:28.211819 CPU #7 initialized
515 17:44:28.214302 apic_id: 0x01 done.
516 17:44:28.220407 microcode: Update skipped, already up-to-date
517 17:44:28.220932 CPU #2 initialized
518 17:44:28.223589 bsp_do_flight_plan done after 454 msecs.
519 17:44:28.226957 CPU: frequency set to 4400 MHz
520 17:44:28.230048 Enabling SMIs.
521 17:44:28.236961 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
522 17:44:28.252473 SATAXPCIE1 indicates PCIe NVMe is present
523 17:44:28.255888 Probing TPM: done!
524 17:44:28.259718 Connected to device vid:did:rid of 1ae0:0028:00
525 17:44:28.269447 Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
526 17:44:28.273169 Initialized TPM device CR50 revision 0
527 17:44:28.276087 Enabling S0i3.4
528 17:44:28.282975 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
529 17:44:28.286495 Found a VBT of 8704 bytes after decompression
530 17:44:28.292901 cse_lite: CSE RO boot. HybridStorageMode disabled
531 17:44:28.299579 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
532 17:44:28.374946 FSPS returned 0
533 17:44:28.378281 Executing Phase 1 of FspMultiPhaseSiInit
534 17:44:28.387997 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
535 17:44:28.391602 port C0 DISC req: usage 1 usb3 1 usb2 5
536 17:44:28.394265 Raw Buffer output 0 00000511
537 17:44:28.397669 Raw Buffer output 1 00000000
538 17:44:28.401703 pmc_send_ipc_cmd succeeded
539 17:44:28.408120 port C1 DISC req: usage 1 usb3 2 usb2 3
540 17:44:28.408672 Raw Buffer output 0 00000321
541 17:44:28.410985 Raw Buffer output 1 00000000
542 17:44:28.415865 pmc_send_ipc_cmd succeeded
543 17:44:28.420444 Detected 4 core, 8 thread CPU.
544 17:44:28.423577 Detected 4 core, 8 thread CPU.
545 17:44:28.623996 Display FSP Version Info HOB
546 17:44:28.627549 Reference Code - CPU = a.0.4c.31
547 17:44:28.631355 uCode Version = 0.0.0.86
548 17:44:28.633799 TXT ACM version = ff.ff.ff.ffff
549 17:44:28.637191 Reference Code - ME = a.0.4c.31
550 17:44:28.640435 MEBx version = 0.0.0.0
551 17:44:28.643854 ME Firmware Version = Consumer SKU
552 17:44:28.647493 Reference Code - PCH = a.0.4c.31
553 17:44:28.651048 PCH-CRID Status = Disabled
554 17:44:28.654160 PCH-CRID Original Value = ff.ff.ff.ffff
555 17:44:28.657818 PCH-CRID New Value = ff.ff.ff.ffff
556 17:44:28.660545 OPROM - RST - RAID = ff.ff.ff.ffff
557 17:44:28.663703 PCH Hsio Version = 4.0.0.0
558 17:44:28.666938 Reference Code - SA - System Agent = a.0.4c.31
559 17:44:28.670090 Reference Code - MRC = 2.0.0.1
560 17:44:28.673644 SA - PCIe Version = a.0.4c.31
561 17:44:28.676850 SA-CRID Status = Disabled
562 17:44:28.680264 SA-CRID Original Value = 0.0.0.1
563 17:44:28.683477 SA-CRID New Value = 0.0.0.1
564 17:44:28.686529 OPROM - VBIOS = ff.ff.ff.ffff
565 17:44:28.690793 IO Manageability Engine FW Version = 11.1.4.0
566 17:44:28.694755 PHY Build Version = 0.0.0.e0
567 17:44:28.697841 Thunderbolt(TM) FW Version = 0.0.0.0
568 17:44:28.704525 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
569 17:44:28.708016 ITSS IRQ Polarities Before:
570 17:44:28.708448 IPC0: 0xffffffff
571 17:44:28.711055 IPC1: 0xffffffff
572 17:44:28.711634 IPC2: 0xffffffff
573 17:44:28.714664 IPC3: 0xffffffff
574 17:44:28.718050 ITSS IRQ Polarities After:
575 17:44:28.718577 IPC0: 0xffffffff
576 17:44:28.720700 IPC1: 0xffffffff
577 17:44:28.721126 IPC2: 0xffffffff
578 17:44:28.723987 IPC3: 0xffffffff
579 17:44:28.727425 Found PCIe Root Port #9 at PCI: 00:1d.0.
580 17:44:28.740809 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
581 17:44:28.751034 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
582 17:44:28.764134 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
583 17:44:28.770770 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
584 17:44:28.771301 Enumerating buses...
585 17:44:28.777220 Show all devs... Before device enumeration.
586 17:44:28.777727 Root Device: enabled 1
587 17:44:28.780789 DOMAIN: 0000: enabled 1
588 17:44:28.783437 CPU_CLUSTER: 0: enabled 1
589 17:44:28.786971 PCI: 00:00.0: enabled 1
590 17:44:28.790350 PCI: 00:02.0: enabled 1
591 17:44:28.790870 PCI: 00:04.0: enabled 1
592 17:44:28.793660 PCI: 00:05.0: enabled 1
593 17:44:28.796990 PCI: 00:06.0: enabled 0
594 17:44:28.797535 PCI: 00:07.0: enabled 0
595 17:44:28.800179 PCI: 00:07.1: enabled 0
596 17:44:28.803359 PCI: 00:07.2: enabled 0
597 17:44:28.806708 PCI: 00:07.3: enabled 0
598 17:44:28.807234 PCI: 00:08.0: enabled 1
599 17:44:28.810330 PCI: 00:09.0: enabled 0
600 17:44:28.813361 PCI: 00:0a.0: enabled 0
601 17:44:28.816436 PCI: 00:0d.0: enabled 1
602 17:44:28.816960 PCI: 00:0d.1: enabled 0
603 17:44:28.819993 PCI: 00:0d.2: enabled 0
604 17:44:28.823185 PCI: 00:0d.3: enabled 0
605 17:44:28.826631 PCI: 00:0e.0: enabled 0
606 17:44:28.827093 PCI: 00:10.2: enabled 1
607 17:44:28.830043 PCI: 00:10.6: enabled 0
608 17:44:28.832853 PCI: 00:10.7: enabled 0
609 17:44:28.836007 PCI: 00:12.0: enabled 0
610 17:44:28.836440 PCI: 00:12.6: enabled 0
611 17:44:28.839439 PCI: 00:13.0: enabled 0
612 17:44:28.843037 PCI: 00:14.0: enabled 1
613 17:44:28.846452 PCI: 00:14.1: enabled 0
614 17:44:28.846981 PCI: 00:14.2: enabled 1
615 17:44:28.849470 PCI: 00:14.3: enabled 1
616 17:44:28.852577 PCI: 00:15.0: enabled 1
617 17:44:28.855848 PCI: 00:15.1: enabled 1
618 17:44:28.856283 PCI: 00:15.2: enabled 1
619 17:44:28.858806 PCI: 00:15.3: enabled 1
620 17:44:28.863008 PCI: 00:16.0: enabled 1
621 17:44:28.865853 PCI: 00:16.1: enabled 0
622 17:44:28.866285 PCI: 00:16.2: enabled 0
623 17:44:28.869017 PCI: 00:16.3: enabled 0
624 17:44:28.872447 PCI: 00:16.4: enabled 0
625 17:44:28.875756 PCI: 00:16.5: enabled 0
626 17:44:28.876191 PCI: 00:17.0: enabled 1
627 17:44:28.879154 PCI: 00:19.0: enabled 0
628 17:44:28.881982 PCI: 00:19.1: enabled 1
629 17:44:28.882501 PCI: 00:19.2: enabled 0
630 17:44:28.885270 PCI: 00:1c.0: enabled 1
631 17:44:28.888613 PCI: 00:1c.1: enabled 0
632 17:44:28.891846 PCI: 00:1c.2: enabled 0
633 17:44:28.892283 PCI: 00:1c.3: enabled 0
634 17:44:28.895503 PCI: 00:1c.4: enabled 0
635 17:44:28.898718 PCI: 00:1c.5: enabled 0
636 17:44:28.902083 PCI: 00:1c.6: enabled 1
637 17:44:28.902611 PCI: 00:1c.7: enabled 0
638 17:44:28.905327 PCI: 00:1d.0: enabled 1
639 17:44:28.908369 PCI: 00:1d.1: enabled 0
640 17:44:28.911823 PCI: 00:1d.2: enabled 1
641 17:44:28.912254 PCI: 00:1d.3: enabled 0
642 17:44:28.915258 PCI: 00:1e.0: enabled 1
643 17:44:28.918692 PCI: 00:1e.1: enabled 0
644 17:44:28.922115 PCI: 00:1e.2: enabled 1
645 17:44:28.922658 PCI: 00:1e.3: enabled 1
646 17:44:28.925075 PCI: 00:1f.0: enabled 1
647 17:44:28.928237 PCI: 00:1f.1: enabled 0
648 17:44:28.932008 PCI: 00:1f.2: enabled 1
649 17:44:28.932530 PCI: 00:1f.3: enabled 1
650 17:44:28.934938 PCI: 00:1f.4: enabled 0
651 17:44:28.938763 PCI: 00:1f.5: enabled 1
652 17:44:28.939293 PCI: 00:1f.6: enabled 0
653 17:44:28.941454 PCI: 00:1f.7: enabled 0
654 17:44:28.945247 APIC: 00: enabled 1
655 17:44:28.948072 GENERIC: 0.0: enabled 1
656 17:44:28.948527 GENERIC: 0.0: enabled 1
657 17:44:28.951629 GENERIC: 1.0: enabled 1
658 17:44:28.955257 GENERIC: 0.0: enabled 1
659 17:44:28.955924 GENERIC: 1.0: enabled 1
660 17:44:28.958048 USB0 port 0: enabled 1
661 17:44:28.961279 GENERIC: 0.0: enabled 1
662 17:44:28.965016 USB0 port 0: enabled 1
663 17:44:28.965544 GENERIC: 0.0: enabled 1
664 17:44:28.968093 I2C: 00:1a: enabled 1
665 17:44:28.971297 I2C: 00:31: enabled 1
666 17:44:28.971760 I2C: 00:32: enabled 1
667 17:44:28.974868 I2C: 00:10: enabled 1
668 17:44:28.977994 I2C: 00:15: enabled 1
669 17:44:28.981124 GENERIC: 0.0: enabled 0
670 17:44:28.981557 GENERIC: 1.0: enabled 0
671 17:44:28.984886 GENERIC: 0.0: enabled 1
672 17:44:28.988529 SPI: 00: enabled 1
673 17:44:28.989057 SPI: 00: enabled 1
674 17:44:28.991396 PNP: 0c09.0: enabled 1
675 17:44:28.994141 GENERIC: 0.0: enabled 1
676 17:44:28.994573 USB3 port 0: enabled 1
677 17:44:28.998125 USB3 port 1: enabled 1
678 17:44:29.001747 USB3 port 2: enabled 0
679 17:44:29.002276 USB3 port 3: enabled 0
680 17:44:29.004286 USB2 port 0: enabled 0
681 17:44:29.007940 USB2 port 1: enabled 1
682 17:44:29.011133 USB2 port 2: enabled 1
683 17:44:29.011685 USB2 port 3: enabled 0
684 17:44:29.014496 USB2 port 4: enabled 1
685 17:44:29.018183 USB2 port 5: enabled 0
686 17:44:29.018712 USB2 port 6: enabled 0
687 17:44:29.020831 USB2 port 7: enabled 0
688 17:44:29.024174 USB2 port 8: enabled 0
689 17:44:29.027415 USB2 port 9: enabled 0
690 17:44:29.027992 USB3 port 0: enabled 0
691 17:44:29.031002 USB3 port 1: enabled 1
692 17:44:29.033863 USB3 port 2: enabled 0
693 17:44:29.034298 USB3 port 3: enabled 0
694 17:44:29.037624 GENERIC: 0.0: enabled 1
695 17:44:29.040933 GENERIC: 1.0: enabled 1
696 17:44:29.044315 APIC: 02: enabled 1
697 17:44:29.044745 APIC: 01: enabled 1
698 17:44:29.047481 APIC: 04: enabled 1
699 17:44:29.048066 APIC: 06: enabled 1
700 17:44:29.050786 APIC: 07: enabled 1
701 17:44:29.054077 APIC: 05: enabled 1
702 17:44:29.054533 APIC: 03: enabled 1
703 17:44:29.057168 Compare with tree...
704 17:44:29.060452 Root Device: enabled 1
705 17:44:29.060886 DOMAIN: 0000: enabled 1
706 17:44:29.063738 PCI: 00:00.0: enabled 1
707 17:44:29.067398 PCI: 00:02.0: enabled 1
708 17:44:29.070786 PCI: 00:04.0: enabled 1
709 17:44:29.073633 GENERIC: 0.0: enabled 1
710 17:44:29.074069 PCI: 00:05.0: enabled 1
711 17:44:29.077164 PCI: 00:06.0: enabled 0
712 17:44:29.080195 PCI: 00:07.0: enabled 0
713 17:44:29.083397 GENERIC: 0.0: enabled 1
714 17:44:29.086780 PCI: 00:07.1: enabled 0
715 17:44:29.087212 GENERIC: 1.0: enabled 1
716 17:44:29.090794 PCI: 00:07.2: enabled 0
717 17:44:29.093618 GENERIC: 0.0: enabled 1
718 17:44:29.097434 PCI: 00:07.3: enabled 0
719 17:44:29.100525 GENERIC: 1.0: enabled 1
720 17:44:29.103789 PCI: 00:08.0: enabled 1
721 17:44:29.104317 PCI: 00:09.0: enabled 0
722 17:44:29.106920 PCI: 00:0a.0: enabled 0
723 17:44:29.110422 PCI: 00:0d.0: enabled 1
724 17:44:29.113655 USB0 port 0: enabled 1
725 17:44:29.117041 USB3 port 0: enabled 1
726 17:44:29.117507 USB3 port 1: enabled 1
727 17:44:29.120448 USB3 port 2: enabled 0
728 17:44:29.123920 USB3 port 3: enabled 0
729 17:44:29.126706 PCI: 00:0d.1: enabled 0
730 17:44:29.129582 PCI: 00:0d.2: enabled 0
731 17:44:29.130022 GENERIC: 0.0: enabled 1
732 17:44:29.133049 PCI: 00:0d.3: enabled 0
733 17:44:29.136360 PCI: 00:0e.0: enabled 0
734 17:44:29.139670 PCI: 00:10.2: enabled 1
735 17:44:29.142958 PCI: 00:10.6: enabled 0
736 17:44:29.143529 PCI: 00:10.7: enabled 0
737 17:44:29.146376 PCI: 00:12.0: enabled 0
738 17:44:29.149627 PCI: 00:12.6: enabled 0
739 17:44:29.152934 PCI: 00:13.0: enabled 0
740 17:44:29.156256 PCI: 00:14.0: enabled 1
741 17:44:29.156699 USB0 port 0: enabled 1
742 17:44:29.159904 USB2 port 0: enabled 0
743 17:44:29.163289 USB2 port 1: enabled 1
744 17:44:29.165947 USB2 port 2: enabled 1
745 17:44:29.169442 USB2 port 3: enabled 0
746 17:44:29.172524 USB2 port 4: enabled 1
747 17:44:29.173104 USB2 port 5: enabled 0
748 17:44:29.175582 USB2 port 6: enabled 0
749 17:44:29.179565 USB2 port 7: enabled 0
750 17:44:29.182173 USB2 port 8: enabled 0
751 17:44:29.185568 USB2 port 9: enabled 0
752 17:44:29.189408 USB3 port 0: enabled 0
753 17:44:29.190027 USB3 port 1: enabled 1
754 17:44:29.192604 USB3 port 2: enabled 0
755 17:44:29.195726 USB3 port 3: enabled 0
756 17:44:29.198914 PCI: 00:14.1: enabled 0
757 17:44:29.202148 PCI: 00:14.2: enabled 1
758 17:44:29.202263 PCI: 00:14.3: enabled 1
759 17:44:29.204967 GENERIC: 0.0: enabled 1
760 17:44:29.208705 PCI: 00:15.0: enabled 1
761 17:44:29.211654 I2C: 00:1a: enabled 1
762 17:44:29.215276 I2C: 00:31: enabled 1
763 17:44:29.215388 I2C: 00:32: enabled 1
764 17:44:29.218396 PCI: 00:15.1: enabled 1
765 17:44:29.221806 I2C: 00:10: enabled 1
766 17:44:29.225113 PCI: 00:15.2: enabled 1
767 17:44:29.228451 PCI: 00:15.3: enabled 1
768 17:44:29.228558 PCI: 00:16.0: enabled 1
769 17:44:29.231768 PCI: 00:16.1: enabled 0
770 17:44:29.235149 PCI: 00:16.2: enabled 0
771 17:44:29.238443 PCI: 00:16.3: enabled 0
772 17:44:29.241888 PCI: 00:16.4: enabled 0
773 17:44:29.242000 PCI: 00:16.5: enabled 0
774 17:44:29.245162 PCI: 00:17.0: enabled 1
775 17:44:29.248366 PCI: 00:19.0: enabled 0
776 17:44:29.251528 PCI: 00:19.1: enabled 1
777 17:44:29.251645 I2C: 00:15: enabled 1
778 17:44:29.254829 PCI: 00:19.2: enabled 0
779 17:44:29.258271 PCI: 00:1d.0: enabled 1
780 17:44:29.261493 GENERIC: 0.0: enabled 1
781 17:44:29.264881 PCI: 00:1e.0: enabled 1
782 17:44:29.268275 PCI: 00:1e.1: enabled 0
783 17:44:29.268381 PCI: 00:1e.2: enabled 1
784 17:44:29.271468 SPI: 00: enabled 1
785 17:44:29.274479 PCI: 00:1e.3: enabled 1
786 17:44:29.274592 SPI: 00: enabled 1
787 17:44:29.277844 PCI: 00:1f.0: enabled 1
788 17:44:29.281173 PNP: 0c09.0: enabled 1
789 17:44:29.329071 PCI: 00:1f.1: enabled 0
790 17:44:29.329195 PCI: 00:1f.2: enabled 1
791 17:44:29.329466 GENERIC: 0.0: enabled 1
792 17:44:29.329548 GENERIC: 0.0: enabled 1
793 17:44:29.329620 GENERIC: 1.0: enabled 1
794 17:44:29.329702 PCI: 00:1f.3: enabled 1
795 17:44:29.329772 PCI: 00:1f.4: enabled 0
796 17:44:29.329839 PCI: 00:1f.5: enabled 1
797 17:44:29.329904 PCI: 00:1f.6: enabled 0
798 17:44:29.329983 PCI: 00:1f.7: enabled 0
799 17:44:29.330069 CPU_CLUSTER: 0: enabled 1
800 17:44:29.330140 APIC: 00: enabled 1
801 17:44:29.330209 APIC: 02: enabled 1
802 17:44:29.330277 APIC: 01: enabled 1
803 17:44:29.330346 APIC: 04: enabled 1
804 17:44:29.330428 APIC: 06: enabled 1
805 17:44:29.330499 APIC: 07: enabled 1
806 17:44:29.335007 APIC: 05: enabled 1
807 17:44:29.335141 APIC: 03: enabled 1
808 17:44:29.335286 Root Device scanning...
809 17:44:29.337975 scan_static_bus for Root Device
810 17:44:29.338089 DOMAIN: 0000 enabled
811 17:44:29.341570 CPU_CLUSTER: 0 enabled
812 17:44:29.344758 DOMAIN: 0000 scanning...
813 17:44:29.347670 PCI: pci_scan_bus for bus 00
814 17:44:29.347812 PCI: 00:00.0 [8086/0000] ops
815 17:44:29.351599 PCI: 00:00.0 [8086/9a12] enabled
816 17:44:29.355442 PCI: 00:02.0 [8086/0000] bus ops
817 17:44:29.359414 PCI: 00:02.0 [8086/9a40] enabled
818 17:44:29.362650 PCI: 00:04.0 [8086/0000] bus ops
819 17:44:29.366179 PCI: 00:04.0 [8086/9a03] enabled
820 17:44:29.369554 PCI: 00:05.0 [8086/9a19] enabled
821 17:44:29.372761 PCI: 00:07.0 [0000/0000] hidden
822 17:44:29.376454 PCI: 00:08.0 [8086/9a11] enabled
823 17:44:29.379020 PCI: 00:0a.0 [8086/9a0d] disabled
824 17:44:29.382378 PCI: 00:0d.0 [8086/0000] bus ops
825 17:44:29.385581 PCI: 00:0d.0 [8086/9a13] enabled
826 17:44:29.389407 PCI: 00:14.0 [8086/0000] bus ops
827 17:44:29.393019 PCI: 00:14.0 [8086/a0ed] enabled
828 17:44:29.395540 PCI: 00:14.2 [8086/a0ef] enabled
829 17:44:29.398925 PCI: 00:14.3 [8086/0000] bus ops
830 17:44:29.402484 PCI: 00:14.3 [8086/a0f0] enabled
831 17:44:29.405813 PCI: 00:15.0 [8086/0000] bus ops
832 17:44:29.408772 PCI: 00:15.0 [8086/a0e8] enabled
833 17:44:29.412268 PCI: 00:15.1 [8086/0000] bus ops
834 17:44:29.415633 PCI: 00:15.1 [8086/a0e9] enabled
835 17:44:29.418823 PCI: 00:15.2 [8086/0000] bus ops
836 17:44:29.422049 PCI: 00:15.2 [8086/a0ea] enabled
837 17:44:29.425324 PCI: 00:15.3 [8086/0000] bus ops
838 17:44:29.428684 PCI: 00:15.3 [8086/a0eb] enabled
839 17:44:29.432012 PCI: 00:16.0 [8086/0000] ops
840 17:44:29.435411 PCI: 00:16.0 [8086/a0e0] enabled
841 17:44:29.441766 PCI: Static device PCI: 00:17.0 not found, disabling it.
842 17:44:29.444966 PCI: 00:19.0 [8086/0000] bus ops
843 17:44:29.448747 PCI: 00:19.0 [8086/a0c5] disabled
844 17:44:29.451586 PCI: 00:19.1 [8086/0000] bus ops
845 17:44:29.455049 PCI: 00:19.1 [8086/a0c6] enabled
846 17:44:29.459005 PCI: 00:1d.0 [8086/0000] bus ops
847 17:44:29.461412 PCI: 00:1d.0 [8086/a0b0] enabled
848 17:44:29.464685 PCI: 00:1e.0 [8086/0000] ops
849 17:44:29.468125 PCI: 00:1e.0 [8086/a0a8] enabled
850 17:44:29.471701 PCI: 00:1e.2 [8086/0000] bus ops
851 17:44:29.474989 PCI: 00:1e.2 [8086/a0aa] enabled
852 17:44:29.478346 PCI: 00:1e.3 [8086/0000] bus ops
853 17:44:29.481201 PCI: 00:1e.3 [8086/a0ab] enabled
854 17:44:29.485042 PCI: 00:1f.0 [8086/0000] bus ops
855 17:44:29.487734 PCI: 00:1f.0 [8086/a087] enabled
856 17:44:29.488297 RTC Init
857 17:44:29.490990 Set power on after power failure.
858 17:44:29.494826 Disabling Deep S3
859 17:44:29.498269 Disabling Deep S3
860 17:44:29.498699 Disabling Deep S4
861 17:44:29.501566 Disabling Deep S4
862 17:44:29.501959 Disabling Deep S5
863 17:44:29.504222 Disabling Deep S5
864 17:44:29.507533 PCI: 00:1f.2 [0000/0000] hidden
865 17:44:29.510843 PCI: 00:1f.3 [8086/0000] bus ops
866 17:44:29.514771 PCI: 00:1f.3 [8086/a0c8] enabled
867 17:44:29.518056 PCI: 00:1f.5 [8086/0000] bus ops
868 17:44:29.521253 PCI: 00:1f.5 [8086/a0a4] enabled
869 17:44:29.524500 PCI: Leftover static devices:
870 17:44:29.524942 PCI: 00:10.2
871 17:44:29.527689 PCI: 00:10.6
872 17:44:29.528184 PCI: 00:10.7
873 17:44:29.528504 PCI: 00:06.0
874 17:44:29.530770 PCI: 00:07.1
875 17:44:29.531180 PCI: 00:07.2
876 17:44:29.534191 PCI: 00:07.3
877 17:44:29.534601 PCI: 00:09.0
878 17:44:29.534933 PCI: 00:0d.1
879 17:44:29.537608 PCI: 00:0d.2
880 17:44:29.537945 PCI: 00:0d.3
881 17:44:29.540913 PCI: 00:0e.0
882 17:44:29.541205 PCI: 00:12.0
883 17:44:29.544203 PCI: 00:12.6
884 17:44:29.544490 PCI: 00:13.0
885 17:44:29.544713 PCI: 00:14.1
886 17:44:29.547685 PCI: 00:16.1
887 17:44:29.547973 PCI: 00:16.2
888 17:44:29.550815 PCI: 00:16.3
889 17:44:29.551219 PCI: 00:16.4
890 17:44:29.551581 PCI: 00:16.5
891 17:44:29.553619 PCI: 00:17.0
892 17:44:29.553989 PCI: 00:19.2
893 17:44:29.557650 PCI: 00:1e.1
894 17:44:29.557939 PCI: 00:1f.1
895 17:44:29.560857 PCI: 00:1f.4
896 17:44:29.561179 PCI: 00:1f.6
897 17:44:29.561407 PCI: 00:1f.7
898 17:44:29.564020 PCI: Check your devicetree.cb.
899 17:44:29.567291 PCI: 00:02.0 scanning...
900 17:44:29.570479 scan_generic_bus for PCI: 00:02.0
901 17:44:29.573871 scan_generic_bus for PCI: 00:02.0 done
902 17:44:29.580572 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
903 17:44:29.583593 PCI: 00:04.0 scanning...
904 17:44:29.587155 scan_generic_bus for PCI: 00:04.0
905 17:44:29.587502 GENERIC: 0.0 enabled
906 17:44:29.593497 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
907 17:44:29.600354 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
908 17:44:29.600869 PCI: 00:0d.0 scanning...
909 17:44:29.603758 scan_static_bus for PCI: 00:0d.0
910 17:44:29.606923 USB0 port 0 enabled
911 17:44:29.610580 USB0 port 0 scanning...
912 17:44:29.613889 scan_static_bus for USB0 port 0
913 17:44:29.614259 USB3 port 0 enabled
914 17:44:29.616605 USB3 port 1 enabled
915 17:44:29.620009 USB3 port 2 disabled
916 17:44:29.620387 USB3 port 3 disabled
917 17:44:29.623264 USB3 port 0 scanning...
918 17:44:29.626603 scan_static_bus for USB3 port 0
919 17:44:29.629792 scan_static_bus for USB3 port 0 done
920 17:44:29.636680 scan_bus: bus USB3 port 0 finished in 6 msecs
921 17:44:29.637110 USB3 port 1 scanning...
922 17:44:29.640074 scan_static_bus for USB3 port 1
923 17:44:29.646604 scan_static_bus for USB3 port 1 done
924 17:44:29.650358 scan_bus: bus USB3 port 1 finished in 6 msecs
925 17:44:29.653410 scan_static_bus for USB0 port 0 done
926 17:44:29.656718 scan_bus: bus USB0 port 0 finished in 43 msecs
927 17:44:29.663458 scan_static_bus for PCI: 00:0d.0 done
928 17:44:29.666656 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
929 17:44:29.669983 PCI: 00:14.0 scanning...
930 17:44:29.673107 scan_static_bus for PCI: 00:14.0
931 17:44:29.676343 USB0 port 0 enabled
932 17:44:29.676780 USB0 port 0 scanning...
933 17:44:29.680112 scan_static_bus for USB0 port 0
934 17:44:29.683459 USB2 port 0 disabled
935 17:44:29.686814 USB2 port 1 enabled
936 17:44:29.687336 USB2 port 2 enabled
937 17:44:29.689827 USB2 port 3 disabled
938 17:44:29.693125 USB2 port 4 enabled
939 17:44:29.693550 USB2 port 5 disabled
940 17:44:29.696405 USB2 port 6 disabled
941 17:44:29.696853 USB2 port 7 disabled
942 17:44:29.699569 USB2 port 8 disabled
943 17:44:29.702830 USB2 port 9 disabled
944 17:44:29.703258 USB3 port 0 disabled
945 17:44:29.706220 USB3 port 1 enabled
946 17:44:29.709645 USB3 port 2 disabled
947 17:44:29.710173 USB3 port 3 disabled
948 17:44:29.712913 USB2 port 1 scanning...
949 17:44:29.716029 scan_static_bus for USB2 port 1
950 17:44:29.719518 scan_static_bus for USB2 port 1 done
951 17:44:29.726215 scan_bus: bus USB2 port 1 finished in 6 msecs
952 17:44:29.726722 USB2 port 2 scanning...
953 17:44:29.729261 scan_static_bus for USB2 port 2
954 17:44:29.735816 scan_static_bus for USB2 port 2 done
955 17:44:29.739086 scan_bus: bus USB2 port 2 finished in 6 msecs
956 17:44:29.742450 USB2 port 4 scanning...
957 17:44:29.746129 scan_static_bus for USB2 port 4
958 17:44:29.748981 scan_static_bus for USB2 port 4 done
959 17:44:29.752789 scan_bus: bus USB2 port 4 finished in 6 msecs
960 17:44:29.755535 USB3 port 1 scanning...
961 17:44:29.759258 scan_static_bus for USB3 port 1
962 17:44:29.762451 scan_static_bus for USB3 port 1 done
963 17:44:29.769053 scan_bus: bus USB3 port 1 finished in 6 msecs
964 17:44:29.772600 scan_static_bus for USB0 port 0 done
965 17:44:29.775778 scan_bus: bus USB0 port 0 finished in 93 msecs
966 17:44:29.779280 scan_static_bus for PCI: 00:14.0 done
967 17:44:29.785906 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
968 17:44:29.786452 PCI: 00:14.3 scanning...
969 17:44:29.789089 scan_static_bus for PCI: 00:14.3
970 17:44:29.792613 GENERIC: 0.0 enabled
971 17:44:29.795799 scan_static_bus for PCI: 00:14.3 done
972 17:44:29.802517 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
973 17:44:29.805102 PCI: 00:15.0 scanning...
974 17:44:29.808626 scan_static_bus for PCI: 00:15.0
975 17:44:29.809149 I2C: 00:1a enabled
976 17:44:29.812328 I2C: 00:31 enabled
977 17:44:29.812847 I2C: 00:32 enabled
978 17:44:29.818741 scan_static_bus for PCI: 00:15.0 done
979 17:44:29.821611 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
980 17:44:29.825054 PCI: 00:15.1 scanning...
981 17:44:29.828353 scan_static_bus for PCI: 00:15.1
982 17:44:29.828892 I2C: 00:10 enabled
983 17:44:29.835149 scan_static_bus for PCI: 00:15.1 done
984 17:44:29.838128 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
985 17:44:29.841796 PCI: 00:15.2 scanning...
986 17:44:29.844616 scan_static_bus for PCI: 00:15.2
987 17:44:29.848327 scan_static_bus for PCI: 00:15.2 done
988 17:44:29.851437 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
989 17:44:29.854450 PCI: 00:15.3 scanning...
990 17:44:29.858287 scan_static_bus for PCI: 00:15.3
991 17:44:29.861964 scan_static_bus for PCI: 00:15.3 done
992 17:44:29.868405 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
993 17:44:29.871333 PCI: 00:19.1 scanning...
994 17:44:29.874537 scan_static_bus for PCI: 00:19.1
995 17:44:29.875045 I2C: 00:15 enabled
996 17:44:29.878031 scan_static_bus for PCI: 00:19.1 done
997 17:44:29.884604 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
998 17:44:29.887512 PCI: 00:1d.0 scanning...
999 17:44:29.891038 do_pci_scan_bridge for PCI: 00:1d.0
1000 17:44:29.894263 PCI: pci_scan_bus for bus 01
1001 17:44:29.897913 PCI: 01:00.0 [15b7/5009] enabled
1002 17:44:29.898434 GENERIC: 0.0 enabled
1003 17:44:29.904341 Enabling Common Clock Configuration
1004 17:44:29.907941 L1 Sub-State supported from root port 29
1005 17:44:29.911082 L1 Sub-State Support = 0x5
1006 17:44:29.914609 CommonModeRestoreTime = 0x28
1007 17:44:29.917905 Power On Value = 0x16, Power On Scale = 0x0
1008 17:44:29.918424 ASPM: Enabled L1
1009 17:44:29.924053 PCIe: Max_Payload_Size adjusted to 128
1010 17:44:29.927297 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1011 17:44:29.930889 PCI: 00:1e.2 scanning...
1012 17:44:29.934970 scan_generic_bus for PCI: 00:1e.2
1013 17:44:29.935506 SPI: 00 enabled
1014 17:44:29.941311 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1015 17:44:29.944634 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1016 17:44:29.947928 PCI: 00:1e.3 scanning...
1017 17:44:29.951208 scan_generic_bus for PCI: 00:1e.3
1018 17:44:29.954796 SPI: 00 enabled
1019 17:44:29.960983 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1020 17:44:29.964712 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1021 17:44:29.967490 PCI: 00:1f.0 scanning...
1022 17:44:29.971155 scan_static_bus for PCI: 00:1f.0
1023 17:44:29.974404 PNP: 0c09.0 enabled
1024 17:44:29.974836 PNP: 0c09.0 scanning...
1025 17:44:29.977437 scan_static_bus for PNP: 0c09.0
1026 17:44:29.981052 scan_static_bus for PNP: 0c09.0 done
1027 17:44:29.987845 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1028 17:44:29.990986 scan_static_bus for PCI: 00:1f.0 done
1029 17:44:29.993937 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1030 17:44:29.997379 PCI: 00:1f.2 scanning...
1031 17:44:30.000905 scan_static_bus for PCI: 00:1f.2
1032 17:44:30.004248 GENERIC: 0.0 enabled
1033 17:44:30.007774 GENERIC: 0.0 scanning...
1034 17:44:30.011062 scan_static_bus for GENERIC: 0.0
1035 17:44:30.011573 GENERIC: 0.0 enabled
1036 17:44:30.014298 GENERIC: 1.0 enabled
1037 17:44:30.017275 scan_static_bus for GENERIC: 0.0 done
1038 17:44:30.024049 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1039 17:44:30.027146 scan_static_bus for PCI: 00:1f.2 done
1040 17:44:30.030619 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1041 17:44:30.033962 PCI: 00:1f.3 scanning...
1042 17:44:30.036787 scan_static_bus for PCI: 00:1f.3
1043 17:44:30.040960 scan_static_bus for PCI: 00:1f.3 done
1044 17:44:30.047128 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1045 17:44:30.050357 PCI: 00:1f.5 scanning...
1046 17:44:30.053926 scan_generic_bus for PCI: 00:1f.5
1047 17:44:30.056328 scan_generic_bus for PCI: 00:1f.5 done
1048 17:44:30.059899 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1049 17:44:30.066876 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1050 17:44:30.070396 scan_static_bus for Root Device done
1051 17:44:30.073471 scan_bus: bus Root Device finished in 735 msecs
1052 17:44:30.076540 done
1053 17:44:30.080122 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1054 17:44:30.083163 Chrome EC: UHEPI supported
1055 17:44:30.090108 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1056 17:44:30.096799 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1057 17:44:30.100118 SPI flash protection: WPSW=0 SRP0=0
1058 17:44:30.107037 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1059 17:44:30.110491 BS: BS_DEV_ENUMERATE exit times (exec / console): 2 / 23 ms
1060 17:44:30.113935 found VGA at PCI: 00:02.0
1061 17:44:30.117176 Setting up VGA for PCI: 00:02.0
1062 17:44:30.124094 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1063 17:44:30.127320 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1064 17:44:30.129901 Allocating resources...
1065 17:44:30.133973 Reading resources...
1066 17:44:30.136943 Root Device read_resources bus 0 link: 0
1067 17:44:30.139745 DOMAIN: 0000 read_resources bus 0 link: 0
1068 17:44:30.146464 PCI: 00:04.0 read_resources bus 1 link: 0
1069 17:44:30.149890 PCI: 00:04.0 read_resources bus 1 link: 0 done
1070 17:44:30.156759 PCI: 00:0d.0 read_resources bus 0 link: 0
1071 17:44:30.160112 USB0 port 0 read_resources bus 0 link: 0
1072 17:44:30.166975 USB0 port 0 read_resources bus 0 link: 0 done
1073 17:44:30.169949 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1074 17:44:30.176648 PCI: 00:14.0 read_resources bus 0 link: 0
1075 17:44:30.179841 USB0 port 0 read_resources bus 0 link: 0
1076 17:44:30.186808 USB0 port 0 read_resources bus 0 link: 0 done
1077 17:44:30.189429 PCI: 00:14.0 read_resources bus 0 link: 0 done
1078 17:44:30.196321 PCI: 00:14.3 read_resources bus 0 link: 0
1079 17:44:30.199607 PCI: 00:14.3 read_resources bus 0 link: 0 done
1080 17:44:30.202781 PCI: 00:15.0 read_resources bus 0 link: 0
1081 17:44:30.210473 PCI: 00:15.0 read_resources bus 0 link: 0 done
1082 17:44:30.214182 PCI: 00:15.1 read_resources bus 0 link: 0
1083 17:44:30.220469 PCI: 00:15.1 read_resources bus 0 link: 0 done
1084 17:44:30.224080 PCI: 00:19.1 read_resources bus 0 link: 0
1085 17:44:30.230236 PCI: 00:19.1 read_resources bus 0 link: 0 done
1086 17:44:30.234032 PCI: 00:1d.0 read_resources bus 1 link: 0
1087 17:44:30.240736 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1088 17:44:30.244092 PCI: 00:1e.2 read_resources bus 2 link: 0
1089 17:44:30.250559 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1090 17:44:30.253403 PCI: 00:1e.3 read_resources bus 3 link: 0
1091 17:44:30.260975 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1092 17:44:30.263453 PCI: 00:1f.0 read_resources bus 0 link: 0
1093 17:44:30.270380 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1094 17:44:30.273715 PCI: 00:1f.2 read_resources bus 0 link: 0
1095 17:44:30.276484 GENERIC: 0.0 read_resources bus 0 link: 0
1096 17:44:30.284218 GENERIC: 0.0 read_resources bus 0 link: 0 done
1097 17:44:30.287157 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1098 17:44:30.294816 DOMAIN: 0000 read_resources bus 0 link: 0 done
1099 17:44:30.298476 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1100 17:44:30.304317 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1101 17:44:30.307730 Root Device read_resources bus 0 link: 0 done
1102 17:44:30.311242 Done reading resources.
1103 17:44:30.317848 Show resources in subtree (Root Device)...After reading.
1104 17:44:30.321086 Root Device child on link 0 DOMAIN: 0000
1105 17:44:30.324328 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1106 17:44:30.333742 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1107 17:44:30.344043 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1108 17:44:30.347504 PCI: 00:00.0
1109 17:44:30.357127 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1110 17:44:30.363668 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1111 17:44:30.373845 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1112 17:44:30.383440 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1113 17:44:30.393589 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1114 17:44:30.403194 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1115 17:44:30.413280 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1116 17:44:30.419539 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1117 17:44:30.429638 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1118 17:44:30.439498 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1119 17:44:30.449433 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1120 17:44:30.459022 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1121 17:44:30.469142 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1122 17:44:30.475590 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1123 17:44:30.485433 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1124 17:44:30.495363 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1125 17:44:30.505202 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1126 17:44:30.515527 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1127 17:44:30.525131 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1128 17:44:30.535212 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1129 17:44:30.535308 PCI: 00:02.0
1130 17:44:30.545290 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 17:44:30.555387 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 17:44:30.565361 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 17:44:30.568496 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1134 17:44:30.578698 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1135 17:44:30.581918 GENERIC: 0.0
1136 17:44:30.582212 PCI: 00:05.0
1137 17:44:30.595282 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 17:44:30.598294 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1139 17:44:30.598814 GENERIC: 0.0
1140 17:44:30.601674 PCI: 00:08.0
1141 17:44:30.611674 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1142 17:44:30.612200 PCI: 00:0a.0
1143 17:44:30.617998 PCI: 00:0d.0 child on link 0 USB0 port 0
1144 17:44:30.627885 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1145 17:44:30.631620 USB0 port 0 child on link 0 USB3 port 0
1146 17:44:30.634372 USB3 port 0
1147 17:44:30.635001 USB3 port 1
1148 17:44:30.637990 USB3 port 2
1149 17:44:30.638517 USB3 port 3
1150 17:44:30.644494 PCI: 00:14.0 child on link 0 USB0 port 0
1151 17:44:30.654380 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 17:44:30.657786 USB0 port 0 child on link 0 USB2 port 0
1153 17:44:30.661436 USB2 port 0
1154 17:44:30.661958 USB2 port 1
1155 17:44:30.664497 USB2 port 2
1156 17:44:30.664988 USB2 port 3
1157 17:44:30.667704 USB2 port 4
1158 17:44:30.668254 USB2 port 5
1159 17:44:30.671049 USB2 port 6
1160 17:44:30.671508 USB2 port 7
1161 17:44:30.674242 USB2 port 8
1162 17:44:30.674670 USB2 port 9
1163 17:44:30.677682 USB3 port 0
1164 17:44:30.678099 USB3 port 1
1165 17:44:30.680940 USB3 port 2
1166 17:44:30.681361 USB3 port 3
1167 17:44:30.684378 PCI: 00:14.2
1168 17:44:30.693894 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1169 17:44:30.704009 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1170 17:44:30.707017 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1171 17:44:30.717199 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1172 17:44:30.720511 GENERIC: 0.0
1173 17:44:30.723955 PCI: 00:15.0 child on link 0 I2C: 00:1a
1174 17:44:30.733366 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 17:44:30.736762 I2C: 00:1a
1176 17:44:30.737183 I2C: 00:31
1177 17:44:30.740441 I2C: 00:32
1178 17:44:30.743470 PCI: 00:15.1 child on link 0 I2C: 00:10
1179 17:44:30.753715 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1180 17:44:30.754245 I2C: 00:10
1181 17:44:30.756378 PCI: 00:15.2
1182 17:44:30.766911 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 17:44:30.767336 PCI: 00:15.3
1184 17:44:30.776278 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1185 17:44:30.779746 PCI: 00:16.0
1186 17:44:30.789991 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 17:44:30.793124 PCI: 00:19.0
1188 17:44:30.796560 PCI: 00:19.1 child on link 0 I2C: 00:15
1189 17:44:30.806465 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 17:44:30.806891 I2C: 00:15
1191 17:44:30.812658 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1192 17:44:30.819539 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1193 17:44:30.829482 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1194 17:44:30.839381 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1195 17:44:30.842598 GENERIC: 0.0
1196 17:44:30.843139 PCI: 01:00.0
1197 17:44:30.852736 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 17:44:30.862071 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1199 17:44:30.865807 PCI: 00:1e.0
1200 17:44:30.875312 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 17:44:30.879121 PCI: 00:1e.2 child on link 0 SPI: 00
1202 17:44:30.888819 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1203 17:44:30.892166 SPI: 00
1204 17:44:30.895599 PCI: 00:1e.3 child on link 0 SPI: 00
1205 17:44:30.904943 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1206 17:44:30.905366 SPI: 00
1207 17:44:30.911676 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1208 17:44:30.918146 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1209 17:44:30.921641 PNP: 0c09.0
1210 17:44:30.928386 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1211 17:44:30.935109 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1212 17:44:30.945358 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1213 17:44:30.951869 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1214 17:44:30.958334 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1215 17:44:30.958829 GENERIC: 0.0
1216 17:44:30.961660 GENERIC: 1.0
1217 17:44:30.962082 PCI: 00:1f.3
1218 17:44:30.971129 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 17:44:30.984333 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 17:44:30.984851 PCI: 00:1f.5
1221 17:44:30.994464 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 17:44:30.997820 CPU_CLUSTER: 0 child on link 0 APIC: 00
1223 17:44:30.998348 APIC: 00
1224 17:44:31.001242 APIC: 02
1225 17:44:31.001772 APIC: 01
1226 17:44:31.004339 APIC: 04
1227 17:44:31.004776 APIC: 06
1228 17:44:31.005222 APIC: 07
1229 17:44:31.008046 APIC: 05
1230 17:44:31.008557 APIC: 03
1231 17:44:31.014678 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1232 17:44:31.020647 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1233 17:44:31.027593 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1234 17:44:31.034404 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1235 17:44:31.036993 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1236 17:44:31.040870 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1237 17:44:31.050824 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1238 17:44:31.057067 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1239 17:44:31.064030 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1240 17:44:31.070503 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1241 17:44:31.077077 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1242 17:44:31.087294 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1243 17:44:31.093601 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1244 17:44:31.100523 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1245 17:44:31.103822 DOMAIN: 0000: Resource ranges:
1246 17:44:31.107312 * Base: 1000, Size: 800, Tag: 100
1247 17:44:31.110595 * Base: 1900, Size: e700, Tag: 100
1248 17:44:31.116613 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1249 17:44:31.123611 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1250 17:44:31.130268 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1251 17:44:31.136415 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1252 17:44:31.146696 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1253 17:44:31.152684 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1254 17:44:31.159206 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1255 17:44:31.169470 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1256 17:44:31.176061 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1257 17:44:31.182589 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1258 17:44:31.192430 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1259 17:44:31.198929 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1260 17:44:31.205829 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1261 17:44:31.215786 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1262 17:44:31.222582 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1263 17:44:31.228771 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1264 17:44:31.239119 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1265 17:44:31.245991 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1266 17:44:31.252020 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1267 17:44:31.261812 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1268 17:44:31.268804 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1269 17:44:31.275584 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1270 17:44:31.284832 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1271 17:44:31.291579 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1272 17:44:31.298093 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1273 17:44:31.301728 DOMAIN: 0000: Resource ranges:
1274 17:44:31.308184 * Base: 7fc00000, Size: 40400000, Tag: 200
1275 17:44:31.311616 * Base: d0000000, Size: 28000000, Tag: 200
1276 17:44:31.314910 * Base: fa000000, Size: 1000000, Tag: 200
1277 17:44:31.318246 * Base: fb001000, Size: 2fff000, Tag: 200
1278 17:44:31.324558 * Base: fe010000, Size: 2e000, Tag: 200
1279 17:44:31.328215 * Base: fe03f000, Size: d41000, Tag: 200
1280 17:44:31.331411 * Base: fed88000, Size: 8000, Tag: 200
1281 17:44:31.334646 * Base: fed93000, Size: d000, Tag: 200
1282 17:44:31.341219 * Base: feda2000, Size: 1e000, Tag: 200
1283 17:44:31.344332 * Base: fede0000, Size: 1220000, Tag: 200
1284 17:44:31.347610 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1285 17:44:31.357411 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1286 17:44:31.364284 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1287 17:44:31.371210 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1288 17:44:31.377455 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1289 17:44:31.384304 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1290 17:44:31.391277 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1291 17:44:31.397960 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1292 17:44:31.404467 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1293 17:44:31.410868 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1294 17:44:31.417207 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1295 17:44:31.423695 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1296 17:44:31.430635 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1297 17:44:31.437163 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1298 17:44:31.443581 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1299 17:44:31.450691 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1300 17:44:31.457179 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1301 17:44:31.463362 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1302 17:44:31.470335 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1303 17:44:31.476824 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1304 17:44:31.483478 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1305 17:44:31.490318 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1306 17:44:31.496365 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1307 17:44:31.503091 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1308 17:44:31.509565 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1309 17:44:31.513034 PCI: 00:1d.0: Resource ranges:
1310 17:44:31.520010 * Base: 7fc00000, Size: 100000, Tag: 200
1311 17:44:31.526280 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1312 17:44:31.533186 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1313 17:44:31.539247 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1314 17:44:31.546437 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1315 17:44:31.553008 Root Device assign_resources, bus 0 link: 0
1316 17:44:31.555732 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 17:44:31.565870 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1318 17:44:31.572226 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1319 17:44:31.582420 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1320 17:44:31.588988 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1321 17:44:31.592266 PCI: 00:04.0 assign_resources, bus 1 link: 0
1322 17:44:31.599284 PCI: 00:04.0 assign_resources, bus 1 link: 0
1323 17:44:31.605375 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1324 17:44:31.615807 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1325 17:44:31.621837 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1326 17:44:31.628440 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1327 17:44:31.631865 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1328 17:44:31.641624 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1329 17:44:31.645079 PCI: 00:14.0 assign_resources, bus 0 link: 0
1330 17:44:31.648107 PCI: 00:14.0 assign_resources, bus 0 link: 0
1331 17:44:31.657912 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1332 17:44:31.664905 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1333 17:44:31.674839 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1334 17:44:31.678128 PCI: 00:14.3 assign_resources, bus 0 link: 0
1335 17:44:31.684698 PCI: 00:14.3 assign_resources, bus 0 link: 0
1336 17:44:31.691195 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1337 17:44:31.694229 PCI: 00:15.0 assign_resources, bus 0 link: 0
1338 17:44:31.701474 PCI: 00:15.0 assign_resources, bus 0 link: 0
1339 17:44:31.708182 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1340 17:44:31.714336 PCI: 00:15.1 assign_resources, bus 0 link: 0
1341 17:44:31.717745 PCI: 00:15.1 assign_resources, bus 0 link: 0
1342 17:44:31.727782 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1343 17:44:31.734362 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1344 17:44:31.744500 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1345 17:44:31.750785 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1346 17:44:31.757219 PCI: 00:19.1 assign_resources, bus 0 link: 0
1347 17:44:31.760403 PCI: 00:19.1 assign_resources, bus 0 link: 0
1348 17:44:31.770487 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1349 17:44:31.780415 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1350 17:44:31.787110 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1351 17:44:31.793424 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1352 17:44:31.800035 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1353 17:44:31.806660 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1354 17:44:31.813245 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1355 17:44:31.819908 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1356 17:44:31.826616 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1357 17:44:31.829956 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1358 17:44:31.840103 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1359 17:44:31.843433 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1360 17:44:31.849880 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1361 17:44:31.853241 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1362 17:44:31.856355 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1363 17:44:31.862773 LPC: Trying to open IO window from 800 size 1ff
1364 17:44:31.869605 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1365 17:44:31.879048 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1366 17:44:31.885832 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1367 17:44:31.892304 DOMAIN: 0000 assign_resources, bus 0 link: 0
1368 17:44:31.896014 Root Device assign_resources, bus 0 link: 0
1369 17:44:31.899127 Done setting resources.
1370 17:44:31.906094 Show resources in subtree (Root Device)...After assigning values.
1371 17:44:31.909319 Root Device child on link 0 DOMAIN: 0000
1372 17:44:31.915504 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1373 17:44:31.922264 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1374 17:44:31.932206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1375 17:44:31.935540 PCI: 00:00.0
1376 17:44:31.945902 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1377 17:44:31.955254 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1378 17:44:31.962119 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1379 17:44:31.971834 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1380 17:44:31.981992 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1381 17:44:31.991499 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1382 17:44:32.001241 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1383 17:44:32.011758 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1384 17:44:32.018395 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1385 17:44:32.028184 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1386 17:44:32.037568 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1387 17:44:32.047740 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1388 17:44:32.057496 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1389 17:44:32.064186 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1390 17:44:32.074265 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1391 17:44:32.084010 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1392 17:44:32.093973 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1393 17:44:32.103882 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1394 17:44:32.113886 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1395 17:44:32.124004 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1396 17:44:32.124536 PCI: 00:02.0
1397 17:44:32.136526 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1398 17:44:32.146961 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1399 17:44:32.156874 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1400 17:44:32.159722 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1401 17:44:32.169664 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1402 17:44:32.173310 GENERIC: 0.0
1403 17:44:32.173729 PCI: 00:05.0
1404 17:44:32.183227 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1405 17:44:32.189404 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1406 17:44:32.189823 GENERIC: 0.0
1407 17:44:32.193284 PCI: 00:08.0
1408 17:44:32.203157 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1409 17:44:32.203682 PCI: 00:0a.0
1410 17:44:32.209497 PCI: 00:0d.0 child on link 0 USB0 port 0
1411 17:44:32.219531 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1412 17:44:32.222903 USB0 port 0 child on link 0 USB3 port 0
1413 17:44:32.226176 USB3 port 0
1414 17:44:32.226693 USB3 port 1
1415 17:44:32.229052 USB3 port 2
1416 17:44:32.229472 USB3 port 3
1417 17:44:32.236002 PCI: 00:14.0 child on link 0 USB0 port 0
1418 17:44:32.246109 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1419 17:44:32.249533 USB0 port 0 child on link 0 USB2 port 0
1420 17:44:32.253051 USB2 port 0
1421 17:44:32.253569 USB2 port 1
1422 17:44:32.256209 USB2 port 2
1423 17:44:32.256661 USB2 port 3
1424 17:44:32.258886 USB2 port 4
1425 17:44:32.259303 USB2 port 5
1426 17:44:32.262040 USB2 port 6
1427 17:44:32.262454 USB2 port 7
1428 17:44:32.265584 USB2 port 8
1429 17:44:32.266004 USB2 port 9
1430 17:44:32.268844 USB3 port 0
1431 17:44:32.272566 USB3 port 1
1432 17:44:32.272988 USB3 port 2
1433 17:44:32.275389 USB3 port 3
1434 17:44:32.275841 PCI: 00:14.2
1435 17:44:32.285709 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1436 17:44:32.295558 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1437 17:44:32.302020 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1438 17:44:32.311999 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1439 17:44:32.312482 GENERIC: 0.0
1440 17:44:32.318764 PCI: 00:15.0 child on link 0 I2C: 00:1a
1441 17:44:32.328863 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1442 17:44:32.329388 I2C: 00:1a
1443 17:44:32.331301 I2C: 00:31
1444 17:44:32.331745 I2C: 00:32
1445 17:44:32.338395 PCI: 00:15.1 child on link 0 I2C: 00:10
1446 17:44:32.348237 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1447 17:44:32.348669 I2C: 00:10
1448 17:44:32.351836 PCI: 00:15.2
1449 17:44:32.361293 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1450 17:44:32.361826 PCI: 00:15.3
1451 17:44:32.371348 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1452 17:44:32.374605 PCI: 00:16.0
1453 17:44:32.385047 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1454 17:44:32.388076 PCI: 00:19.0
1455 17:44:32.391207 PCI: 00:19.1 child on link 0 I2C: 00:15
1456 17:44:32.401238 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1457 17:44:32.404195 I2C: 00:15
1458 17:44:32.407398 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1459 17:44:32.417449 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1460 17:44:32.426913 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1461 17:44:32.436978 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1462 17:44:32.440541 GENERIC: 0.0
1463 17:44:32.443452 PCI: 01:00.0
1464 17:44:32.453220 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1465 17:44:32.463357 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1466 17:44:32.464063 PCI: 00:1e.0
1467 17:44:32.476737 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1468 17:44:32.480048 PCI: 00:1e.2 child on link 0 SPI: 00
1469 17:44:32.489576 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1470 17:44:32.490047 SPI: 00
1471 17:44:32.496232 PCI: 00:1e.3 child on link 0 SPI: 00
1472 17:44:32.506158 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1473 17:44:32.506660 SPI: 00
1474 17:44:32.512549 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1475 17:44:32.519330 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1476 17:44:32.522615 PNP: 0c09.0
1477 17:44:32.529329 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1478 17:44:32.536012 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1479 17:44:32.545890 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1480 17:44:32.552308 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1481 17:44:32.559255 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1482 17:44:32.559712 GENERIC: 0.0
1483 17:44:32.562333 GENERIC: 1.0
1484 17:44:32.562744 PCI: 00:1f.3
1485 17:44:32.572299 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1486 17:44:32.585569 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1487 17:44:32.586084 PCI: 00:1f.5
1488 17:44:32.595770 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1489 17:44:32.602013 CPU_CLUSTER: 0 child on link 0 APIC: 00
1490 17:44:32.602549 APIC: 00
1491 17:44:32.602889 APIC: 02
1492 17:44:32.605444 APIC: 01
1493 17:44:32.605987 APIC: 04
1494 17:44:32.606323 APIC: 06
1495 17:44:32.608709 APIC: 07
1496 17:44:32.609130 APIC: 05
1497 17:44:32.612047 APIC: 03
1498 17:44:32.612460 Done allocating resources.
1499 17:44:32.618426 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1500 17:44:32.625483 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1501 17:44:32.628608 Configure GPIOs for I2S audio on UP4.
1502 17:44:32.636042 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1503 17:44:32.639022 Enabling resources...
1504 17:44:32.642094 PCI: 00:00.0 subsystem <- 8086/9a12
1505 17:44:32.645485 PCI: 00:00.0 cmd <- 06
1506 17:44:32.648953 PCI: 00:02.0 subsystem <- 8086/9a40
1507 17:44:32.652094 PCI: 00:02.0 cmd <- 03
1508 17:44:32.655407 PCI: 00:04.0 subsystem <- 8086/9a03
1509 17:44:32.658741 PCI: 00:04.0 cmd <- 02
1510 17:44:32.661980 PCI: 00:05.0 subsystem <- 8086/9a19
1511 17:44:32.662408 PCI: 00:05.0 cmd <- 02
1512 17:44:32.668686 PCI: 00:08.0 subsystem <- 8086/9a11
1513 17:44:32.669102 PCI: 00:08.0 cmd <- 06
1514 17:44:32.671627 PCI: 00:0d.0 subsystem <- 8086/9a13
1515 17:44:32.675392 PCI: 00:0d.0 cmd <- 02
1516 17:44:32.678339 PCI: 00:14.0 subsystem <- 8086/a0ed
1517 17:44:32.681906 PCI: 00:14.0 cmd <- 02
1518 17:44:32.685366 PCI: 00:14.2 subsystem <- 8086/a0ef
1519 17:44:32.688346 PCI: 00:14.2 cmd <- 02
1520 17:44:32.691293 PCI: 00:14.3 subsystem <- 8086/a0f0
1521 17:44:32.694643 PCI: 00:14.3 cmd <- 02
1522 17:44:32.697936 PCI: 00:15.0 subsystem <- 8086/a0e8
1523 17:44:32.701418 PCI: 00:15.0 cmd <- 02
1524 17:44:32.704639 PCI: 00:15.1 subsystem <- 8086/a0e9
1525 17:44:32.707822 PCI: 00:15.1 cmd <- 02
1526 17:44:32.711587 PCI: 00:15.2 subsystem <- 8086/a0ea
1527 17:44:32.714753 PCI: 00:15.2 cmd <- 02
1528 17:44:32.717670 PCI: 00:15.3 subsystem <- 8086/a0eb
1529 17:44:32.718102 PCI: 00:15.3 cmd <- 02
1530 17:44:32.724581 PCI: 00:16.0 subsystem <- 8086/a0e0
1531 17:44:32.725002 PCI: 00:16.0 cmd <- 02
1532 17:44:32.728478 PCI: 00:19.1 subsystem <- 8086/a0c6
1533 17:44:32.730879 PCI: 00:19.1 cmd <- 02
1534 17:44:32.734375 PCI: 00:1d.0 bridge ctrl <- 0013
1535 17:44:32.737481 PCI: 00:1d.0 subsystem <- 8086/a0b0
1536 17:44:32.740741 PCI: 00:1d.0 cmd <- 06
1537 17:44:32.744282 PCI: 00:1e.0 subsystem <- 8086/a0a8
1538 17:44:32.747586 PCI: 00:1e.0 cmd <- 06
1539 17:44:32.751090 PCI: 00:1e.2 subsystem <- 8086/a0aa
1540 17:44:32.753990 PCI: 00:1e.2 cmd <- 06
1541 17:44:32.757442 PCI: 00:1e.3 subsystem <- 8086/a0ab
1542 17:44:32.760504 PCI: 00:1e.3 cmd <- 02
1543 17:44:32.763797 PCI: 00:1f.0 subsystem <- 8086/a087
1544 17:44:32.767588 PCI: 00:1f.0 cmd <- 407
1545 17:44:32.770772 PCI: 00:1f.3 subsystem <- 8086/a0c8
1546 17:44:32.773745 PCI: 00:1f.3 cmd <- 02
1547 17:44:32.776907 PCI: 00:1f.5 subsystem <- 8086/a0a4
1548 17:44:32.777328 PCI: 00:1f.5 cmd <- 406
1549 17:44:32.783376 PCI: 01:00.0 cmd <- 02
1550 17:44:32.787284 done.
1551 17:44:32.790267 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1552 17:44:32.793702 Initializing devices...
1553 17:44:32.796868 Root Device init
1554 17:44:32.800416 Chrome EC: Set SMI mask to 0x0000000000000000
1555 17:44:32.806982 Chrome EC: clear events_b mask to 0x0000000000000000
1556 17:44:32.813352 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1557 17:44:32.820215 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1558 17:44:32.826965 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1559 17:44:32.829801 Chrome EC: Set WAKE mask to 0x0000000000000000
1560 17:44:32.837085 fw_config match found: DB_USB=USB3_ACTIVE
1561 17:44:32.840408 Configure Right Type-C port orientation for retimer
1562 17:44:32.843812 Root Device init finished in 45 msecs
1563 17:44:32.847776 PCI: 00:00.0 init
1564 17:44:32.851418 CPU TDP = 9 Watts
1565 17:44:32.851982 CPU PL1 = 9 Watts
1566 17:44:32.854474 CPU PL2 = 40 Watts
1567 17:44:32.857912 CPU PL4 = 83 Watts
1568 17:44:32.861118 PCI: 00:00.0 init finished in 8 msecs
1569 17:44:32.861535 PCI: 00:02.0 init
1570 17:44:32.864378 GMA: Found VBT in CBFS
1571 17:44:32.867716 GMA: Found valid VBT in CBFS
1572 17:44:32.874384 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1573 17:44:32.881062 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1574 17:44:32.884215 PCI: 00:02.0 init finished in 18 msecs
1575 17:44:32.887968 PCI: 00:05.0 init
1576 17:44:32.891096 PCI: 00:05.0 init finished in 0 msecs
1577 17:44:32.894576 PCI: 00:08.0 init
1578 17:44:32.897638 PCI: 00:08.0 init finished in 0 msecs
1579 17:44:32.900999 PCI: 00:14.0 init
1580 17:44:32.904532 PCI: 00:14.0 init finished in 0 msecs
1581 17:44:32.907635 PCI: 00:14.2 init
1582 17:44:32.910572 PCI: 00:14.2 init finished in 0 msecs
1583 17:44:32.913748 PCI: 00:15.0 init
1584 17:44:32.917099 I2C bus 0 version 0x3230302a
1585 17:44:32.920314 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1586 17:44:32.923700 PCI: 00:15.0 init finished in 6 msecs
1587 17:44:32.927602 PCI: 00:15.1 init
1588 17:44:32.928157 I2C bus 1 version 0x3230302a
1589 17:44:32.934488 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1590 17:44:32.936885 PCI: 00:15.1 init finished in 6 msecs
1591 17:44:32.937308 PCI: 00:15.2 init
1592 17:44:32.940227 I2C bus 2 version 0x3230302a
1593 17:44:32.943539 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1594 17:44:32.950600 PCI: 00:15.2 init finished in 6 msecs
1595 17:44:32.951129 PCI: 00:15.3 init
1596 17:44:32.953725 I2C bus 3 version 0x3230302a
1597 17:44:32.956751 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1598 17:44:32.960158 PCI: 00:15.3 init finished in 6 msecs
1599 17:44:32.963201 PCI: 00:16.0 init
1600 17:44:32.966604 PCI: 00:16.0 init finished in 0 msecs
1601 17:44:32.969789 PCI: 00:19.1 init
1602 17:44:32.972924 I2C bus 5 version 0x3230302a
1603 17:44:32.976541 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1604 17:44:32.980075 PCI: 00:19.1 init finished in 6 msecs
1605 17:44:32.983192 PCI: 00:1d.0 init
1606 17:44:32.986461 Initializing PCH PCIe bridge.
1607 17:44:32.989615 PCI: 00:1d.0 init finished in 3 msecs
1608 17:44:32.992869 PCI: 00:1f.0 init
1609 17:44:32.996182 IOAPIC: Initializing IOAPIC at 0xfec00000
1610 17:44:32.999589 IOAPIC: Bootstrap Processor Local APIC = 0x00
1611 17:44:33.003297 IOAPIC: ID = 0x02
1612 17:44:33.006374 IOAPIC: Dumping registers
1613 17:44:33.009762 reg 0x0000: 0x02000000
1614 17:44:33.010214 reg 0x0001: 0x00770020
1615 17:44:33.012455 reg 0x0002: 0x00000000
1616 17:44:33.015937 PCI: 00:1f.0 init finished in 21 msecs
1617 17:44:33.019336 PCI: 00:1f.2 init
1618 17:44:33.022475 Disabling ACPI via APMC.
1619 17:44:33.025971 APMC done.
1620 17:44:33.029357 PCI: 00:1f.2 init finished in 6 msecs
1621 17:44:33.041224 PCI: 01:00.0 init
1622 17:44:33.044741 PCI: 01:00.0 init finished in 0 msecs
1623 17:44:33.048084 PNP: 0c09.0 init
1624 17:44:33.054854 Google Chrome EC uptime: 8.288 seconds
1625 17:44:33.058569 Google Chrome AP resets since EC boot: 1
1626 17:44:33.061453 Google Chrome most recent AP reset causes:
1627 17:44:33.065147 0.453: 32775 shutdown: entering G3
1628 17:44:33.071510 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1629 17:44:33.074692 PNP: 0c09.0 init finished in 24 msecs
1630 17:44:33.081480 Devices initialized
1631 17:44:33.085086 Show all devs... After init.
1632 17:44:33.088229 Root Device: enabled 1
1633 17:44:33.088652 DOMAIN: 0000: enabled 1
1634 17:44:33.091797 CPU_CLUSTER: 0: enabled 1
1635 17:44:33.094729 PCI: 00:00.0: enabled 1
1636 17:44:33.097914 PCI: 00:02.0: enabled 1
1637 17:44:33.098428 PCI: 00:04.0: enabled 1
1638 17:44:33.101322 PCI: 00:05.0: enabled 1
1639 17:44:33.105178 PCI: 00:06.0: enabled 0
1640 17:44:33.107800 PCI: 00:07.0: enabled 0
1641 17:44:33.108217 PCI: 00:07.1: enabled 0
1642 17:44:33.111129 PCI: 00:07.2: enabled 0
1643 17:44:33.114510 PCI: 00:07.3: enabled 0
1644 17:44:33.117917 PCI: 00:08.0: enabled 1
1645 17:44:33.118429 PCI: 00:09.0: enabled 0
1646 17:44:33.121113 PCI: 00:0a.0: enabled 0
1647 17:44:33.124313 PCI: 00:0d.0: enabled 1
1648 17:44:33.127865 PCI: 00:0d.1: enabled 0
1649 17:44:33.128369 PCI: 00:0d.2: enabled 0
1650 17:44:33.131466 PCI: 00:0d.3: enabled 0
1651 17:44:33.134813 PCI: 00:0e.0: enabled 0
1652 17:44:33.138116 PCI: 00:10.2: enabled 1
1653 17:44:33.138627 PCI: 00:10.6: enabled 0
1654 17:44:33.141198 PCI: 00:10.7: enabled 0
1655 17:44:33.144276 PCI: 00:12.0: enabled 0
1656 17:44:33.147375 PCI: 00:12.6: enabled 0
1657 17:44:33.147905 PCI: 00:13.0: enabled 0
1658 17:44:33.151240 PCI: 00:14.0: enabled 1
1659 17:44:33.154407 PCI: 00:14.1: enabled 0
1660 17:44:33.154912 PCI: 00:14.2: enabled 1
1661 17:44:33.157463 PCI: 00:14.3: enabled 1
1662 17:44:33.160751 PCI: 00:15.0: enabled 1
1663 17:44:33.164344 PCI: 00:15.1: enabled 1
1664 17:44:33.164755 PCI: 00:15.2: enabled 1
1665 17:44:33.167599 PCI: 00:15.3: enabled 1
1666 17:44:33.171026 PCI: 00:16.0: enabled 1
1667 17:44:33.174423 PCI: 00:16.1: enabled 0
1668 17:44:33.174936 PCI: 00:16.2: enabled 0
1669 17:44:33.177590 PCI: 00:16.3: enabled 0
1670 17:44:33.180863 PCI: 00:16.4: enabled 0
1671 17:44:33.184181 PCI: 00:16.5: enabled 0
1672 17:44:33.184594 PCI: 00:17.0: enabled 0
1673 17:44:33.187864 PCI: 00:19.0: enabled 0
1674 17:44:33.191010 PCI: 00:19.1: enabled 1
1675 17:44:33.193651 PCI: 00:19.2: enabled 0
1676 17:44:33.194061 PCI: 00:1c.0: enabled 1
1677 17:44:33.197282 PCI: 00:1c.1: enabled 0
1678 17:44:33.200552 PCI: 00:1c.2: enabled 0
1679 17:44:33.203850 PCI: 00:1c.3: enabled 0
1680 17:44:33.204399 PCI: 00:1c.4: enabled 0
1681 17:44:33.207203 PCI: 00:1c.5: enabled 0
1682 17:44:33.210575 PCI: 00:1c.6: enabled 1
1683 17:44:33.210988 PCI: 00:1c.7: enabled 0
1684 17:44:33.213713 PCI: 00:1d.0: enabled 1
1685 17:44:33.216728 PCI: 00:1d.1: enabled 0
1686 17:44:33.220257 PCI: 00:1d.2: enabled 1
1687 17:44:33.220668 PCI: 00:1d.3: enabled 0
1688 17:44:33.223755 PCI: 00:1e.0: enabled 1
1689 17:44:33.226972 PCI: 00:1e.1: enabled 0
1690 17:44:33.230107 PCI: 00:1e.2: enabled 1
1691 17:44:33.230514 PCI: 00:1e.3: enabled 1
1692 17:44:33.233587 PCI: 00:1f.0: enabled 1
1693 17:44:33.236993 PCI: 00:1f.1: enabled 0
1694 17:44:33.239888 PCI: 00:1f.2: enabled 1
1695 17:44:33.240439 PCI: 00:1f.3: enabled 1
1696 17:44:33.243820 PCI: 00:1f.4: enabled 0
1697 17:44:33.247048 PCI: 00:1f.5: enabled 1
1698 17:44:33.249762 PCI: 00:1f.6: enabled 0
1699 17:44:33.250172 PCI: 00:1f.7: enabled 0
1700 17:44:33.253795 APIC: 00: enabled 1
1701 17:44:33.256939 GENERIC: 0.0: enabled 1
1702 17:44:33.257408 GENERIC: 0.0: enabled 1
1703 17:44:33.260286 GENERIC: 1.0: enabled 1
1704 17:44:33.263486 GENERIC: 0.0: enabled 1
1705 17:44:33.266262 GENERIC: 1.0: enabled 1
1706 17:44:33.266668 USB0 port 0: enabled 1
1707 17:44:33.269903 GENERIC: 0.0: enabled 1
1708 17:44:33.273079 USB0 port 0: enabled 1
1709 17:44:33.273489 GENERIC: 0.0: enabled 1
1710 17:44:33.276291 I2C: 00:1a: enabled 1
1711 17:44:33.280152 I2C: 00:31: enabled 1
1712 17:44:33.283245 I2C: 00:32: enabled 1
1713 17:44:33.283810 I2C: 00:10: enabled 1
1714 17:44:33.286764 I2C: 00:15: enabled 1
1715 17:44:33.289743 GENERIC: 0.0: enabled 0
1716 17:44:33.290250 GENERIC: 1.0: enabled 0
1717 17:44:33.292953 GENERIC: 0.0: enabled 1
1718 17:44:33.296417 SPI: 00: enabled 1
1719 17:44:33.296945 SPI: 00: enabled 1
1720 17:44:33.299938 PNP: 0c09.0: enabled 1
1721 17:44:33.303193 GENERIC: 0.0: enabled 1
1722 17:44:33.303749 USB3 port 0: enabled 1
1723 17:44:33.306311 USB3 port 1: enabled 1
1724 17:44:33.309427 USB3 port 2: enabled 0
1725 17:44:33.312740 USB3 port 3: enabled 0
1726 17:44:33.313183 USB2 port 0: enabled 0
1727 17:44:33.316122 USB2 port 1: enabled 1
1728 17:44:33.319557 USB2 port 2: enabled 1
1729 17:44:33.320004 USB2 port 3: enabled 0
1730 17:44:33.322729 USB2 port 4: enabled 1
1731 17:44:33.325839 USB2 port 5: enabled 0
1732 17:44:33.329348 USB2 port 6: enabled 0
1733 17:44:33.329758 USB2 port 7: enabled 0
1734 17:44:33.332522 USB2 port 8: enabled 0
1735 17:44:33.335610 USB2 port 9: enabled 0
1736 17:44:33.336053 USB3 port 0: enabled 0
1737 17:44:33.339103 USB3 port 1: enabled 1
1738 17:44:33.342353 USB3 port 2: enabled 0
1739 17:44:33.345800 USB3 port 3: enabled 0
1740 17:44:33.346214 GENERIC: 0.0: enabled 1
1741 17:44:33.348655 GENERIC: 1.0: enabled 1
1742 17:44:33.352479 APIC: 02: enabled 1
1743 17:44:33.352890 APIC: 01: enabled 1
1744 17:44:33.355988 APIC: 04: enabled 1
1745 17:44:33.359065 APIC: 06: enabled 1
1746 17:44:33.359573 APIC: 07: enabled 1
1747 17:44:33.362522 APIC: 05: enabled 1
1748 17:44:33.362933 APIC: 03: enabled 1
1749 17:44:33.365453 PCI: 01:00.0: enabled 1
1750 17:44:33.372343 BS: BS_DEV_INIT run times (exec / console): 34 / 540 ms
1751 17:44:33.375458 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1752 17:44:33.379036 ELOG: NV offset 0xf30000 size 0x1000
1753 17:44:33.386862 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1754 17:44:33.393693 ELOG: Event(17) added with size 13 at 2023-10-20 17:42:59 UTC
1755 17:44:33.400388 ELOG: Event(92) added with size 9 at 2023-10-20 17:42:59 UTC
1756 17:44:33.407011 ELOG: Event(93) added with size 9 at 2023-10-20 17:42:59 UTC
1757 17:44:33.413363 ELOG: Event(9E) added with size 10 at 2023-10-20 17:42:59 UTC
1758 17:44:33.419869 ELOG: Event(9F) added with size 14 at 2023-10-20 17:42:59 UTC
1759 17:44:33.426320 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1760 17:44:33.433254 ELOG: Event(A1) added with size 10 at 2023-10-20 17:42:59 UTC
1761 17:44:33.439822 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1762 17:44:33.446737 ELOG: Event(A0) added with size 9 at 2023-10-20 17:42:59 UTC
1763 17:44:33.449793 elog_add_boot_reason: Logged dev mode boot
1764 17:44:33.456016 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1765 17:44:33.456533 Finalize devices...
1766 17:44:33.460189 Devices finalized
1767 17:44:33.466130 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1768 17:44:33.469485 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1769 17:44:33.476079 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1770 17:44:33.479056 ME: HFSTS1 : 0x80030055
1771 17:44:33.485963 ME: HFSTS2 : 0x30280116
1772 17:44:33.489056 ME: HFSTS3 : 0x00000050
1773 17:44:33.495715 ME: HFSTS4 : 0x00004000
1774 17:44:33.499122 ME: HFSTS5 : 0x00000000
1775 17:44:33.502157 ME: HFSTS6 : 0x40400006
1776 17:44:33.505301 ME: Manufacturing Mode : YES
1777 17:44:33.512049 ME: SPI Protection Mode Enabled : NO
1778 17:44:33.515398 ME: FW Partition Table : OK
1779 17:44:33.518874 ME: Bringup Loader Failure : NO
1780 17:44:33.522002 ME: Firmware Init Complete : NO
1781 17:44:33.525048 ME: Boot Options Present : NO
1782 17:44:33.528596 ME: Update In Progress : NO
1783 17:44:33.532156 ME: D0i3 Support : YES
1784 17:44:33.535375 ME: Low Power State Enabled : NO
1785 17:44:33.541748 ME: CPU Replaced : YES
1786 17:44:33.545555 ME: CPU Replacement Valid : YES
1787 17:44:33.548603 ME: Current Working State : 5
1788 17:44:33.551918 ME: Current Operation State : 1
1789 17:44:33.555278 ME: Current Operation Mode : 3
1790 17:44:33.558721 ME: Error Code : 0
1791 17:44:33.561851 ME: Enhanced Debug Mode : NO
1792 17:44:33.565145 ME: CPU Debug Disabled : YES
1793 17:44:33.568423 ME: TXT Support : NO
1794 17:44:33.575142 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1795 17:44:33.584973 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1796 17:44:33.588077 CBFS: 'fallback/slic' not found.
1797 17:44:33.591275 ACPI: Writing ACPI tables at 76b01000.
1798 17:44:33.591723 ACPI: * FACS
1799 17:44:33.594872 ACPI: * DSDT
1800 17:44:33.598353 Ramoops buffer: 0x100000@0x76a00000.
1801 17:44:33.601095 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1802 17:44:33.608333 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1803 17:44:33.611244 Google Chrome EC: version:
1804 17:44:33.614868 ro: voema_v2.0.10114-a447f03e46
1805 17:44:33.617980 rw: voema_v2.0.10132-7b2059e3bc
1806 17:44:33.621127 running image: 2
1807 17:44:33.627919 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1808 17:44:33.631589 ACPI: * FADT
1809 17:44:33.632172 SCI is IRQ9
1810 17:44:33.634506 ACPI: added table 1/32, length now 40
1811 17:44:33.637198 ACPI: * SSDT
1812 17:44:33.640435 Found 1 CPU(s) with 8 core(s) each.
1813 17:44:33.643867 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1814 17:44:33.650792 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1815 17:44:33.654026 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1816 17:44:33.657403 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1817 17:44:33.663976 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1818 17:44:33.671117 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1819 17:44:33.674053 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1820 17:44:33.680818 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1821 17:44:33.686642 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1822 17:44:33.691017 \_SB.PCI0.RP09: Added StorageD3Enable property
1823 17:44:33.693408 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1824 17:44:33.699943 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1825 17:44:33.706991 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1826 17:44:33.710410 PS2K: Passing 80 keymaps to kernel
1827 17:44:33.716793 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1828 17:44:33.723365 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1829 17:44:33.729634 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1830 17:44:33.736513 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1831 17:44:33.743244 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1832 17:44:33.749633 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1833 17:44:33.756284 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1834 17:44:33.763015 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1835 17:44:33.766420 ACPI: added table 2/32, length now 44
1836 17:44:33.769651 ACPI: * MCFG
1837 17:44:33.773409 ACPI: added table 3/32, length now 48
1838 17:44:33.773932 ACPI: * TPM2
1839 17:44:33.776470 TPM2 log created at 0x769f0000
1840 17:44:33.779750 ACPI: added table 4/32, length now 52
1841 17:44:33.783301 ACPI: * MADT
1842 17:44:33.783852 SCI is IRQ9
1843 17:44:33.785971 ACPI: added table 5/32, length now 56
1844 17:44:33.789399 current = 76b09850
1845 17:44:33.789811 ACPI: * DMAR
1846 17:44:33.796143 ACPI: added table 6/32, length now 60
1847 17:44:33.798963 ACPI: added table 7/32, length now 64
1848 17:44:33.799375 ACPI: * HPET
1849 17:44:33.802546 ACPI: added table 8/32, length now 68
1850 17:44:33.805880 ACPI: done.
1851 17:44:33.808926 ACPI tables: 35216 bytes.
1852 17:44:33.812286 smbios_write_tables: 769ef000
1853 17:44:33.816000 EC returned error result code 3
1854 17:44:33.818903 Couldn't obtain OEM name from CBI
1855 17:44:33.822390 Create SMBIOS type 16
1856 17:44:33.825372 Create SMBIOS type 17
1857 17:44:33.825834 GENERIC: 0.0 (WIFI Device)
1858 17:44:33.828463 SMBIOS tables: 1734 bytes.
1859 17:44:33.832120 Writing table forward entry at 0x00000500
1860 17:44:33.838561 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1861 17:44:33.845185 Writing coreboot table at 0x76b25000
1862 17:44:33.848519 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1863 17:44:33.854894 1. 0000000000001000-000000000009ffff: RAM
1864 17:44:33.858356 2. 00000000000a0000-00000000000fffff: RESERVED
1865 17:44:33.861783 3. 0000000000100000-00000000769eefff: RAM
1866 17:44:33.868095 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1867 17:44:33.874746 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1868 17:44:33.881380 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1869 17:44:33.884834 7. 0000000077000000-000000007fbfffff: RESERVED
1870 17:44:33.888267 8. 00000000c0000000-00000000cfffffff: RESERVED
1871 17:44:33.894684 9. 00000000f8000000-00000000f9ffffff: RESERVED
1872 17:44:33.897820 10. 00000000fb000000-00000000fb000fff: RESERVED
1873 17:44:33.904271 11. 00000000fe000000-00000000fe00ffff: RESERVED
1874 17:44:33.907871 12. 00000000fed80000-00000000fed87fff: RESERVED
1875 17:44:33.914712 13. 00000000fed90000-00000000fed92fff: RESERVED
1876 17:44:33.917990 14. 00000000feda0000-00000000feda1fff: RESERVED
1877 17:44:33.924247 15. 00000000fedc0000-00000000feddffff: RESERVED
1878 17:44:33.927431 16. 0000000100000000-00000004803fffff: RAM
1879 17:44:33.931345 Passing 4 GPIOs to payload:
1880 17:44:33.934080 NAME | PORT | POLARITY | VALUE
1881 17:44:33.940869 lid | undefined | high | high
1882 17:44:33.944120 power | undefined | high | low
1883 17:44:33.950469 oprom | undefined | high | low
1884 17:44:33.957179 EC in RW | 0x000000e5 | high | high
1885 17:44:33.963946 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1886 17:44:33.964361 coreboot table: 1576 bytes.
1887 17:44:33.970444 IMD ROOT 0. 0x76fff000 0x00001000
1888 17:44:33.973987 IMD SMALL 1. 0x76ffe000 0x00001000
1889 17:44:33.976988 FSP MEMORY 2. 0x76c4e000 0x003b0000
1890 17:44:33.980224 VPD 3. 0x76c4d000 0x00000367
1891 17:44:33.983897 RO MCACHE 4. 0x76c4c000 0x00000fdc
1892 17:44:33.986827 CONSOLE 5. 0x76c2c000 0x00020000
1893 17:44:33.990567 FMAP 6. 0x76c2b000 0x00000578
1894 17:44:33.997142 TIME STAMP 7. 0x76c2a000 0x00000910
1895 17:44:34.000611 VBOOT WORK 8. 0x76c16000 0x00014000
1896 17:44:34.003848 ROMSTG STCK 9. 0x76c15000 0x00001000
1897 17:44:34.007368 AFTER CAR 10. 0x76c0a000 0x0000b000
1898 17:44:34.010617 RAMSTAGE 11. 0x76b97000 0x00073000
1899 17:44:34.013597 REFCODE 12. 0x76b42000 0x00055000
1900 17:44:34.016626 SMM BACKUP 13. 0x76b32000 0x00010000
1901 17:44:34.020068 4f444749 14. 0x76b30000 0x00002000
1902 17:44:34.023288 EXT VBT15. 0x76b2d000 0x0000219f
1903 17:44:34.030304 COREBOOT 16. 0x76b25000 0x00008000
1904 17:44:34.032837 ACPI 17. 0x76b01000 0x00024000
1905 17:44:34.036732 ACPI GNVS 18. 0x76b00000 0x00001000
1906 17:44:34.039492 RAMOOPS 19. 0x76a00000 0x00100000
1907 17:44:34.043112 TPM2 TCGLOG20. 0x769f0000 0x00010000
1908 17:44:34.046016 SMBIOS 21. 0x769ef000 0x00000800
1909 17:44:34.049852 IMD small region:
1910 17:44:34.052578 IMD ROOT 0. 0x76ffec00 0x00000400
1911 17:44:34.056183 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1912 17:44:34.059006 POWER STATE 2. 0x76ffeb80 0x00000044
1913 17:44:34.065977 ROMSTAGE 3. 0x76ffeb60 0x00000004
1914 17:44:34.069343 MEM INFO 4. 0x76ffe980 0x000001e0
1915 17:44:34.075959 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1916 17:44:34.076469 MTRR: Physical address space:
1917 17:44:34.082174 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1918 17:44:34.089126 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1919 17:44:34.095776 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1920 17:44:34.102058 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1921 17:44:34.108921 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1922 17:44:34.115367 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1923 17:44:34.122237 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1924 17:44:34.125868 MTRR: Fixed MSR 0x250 0x0606060606060606
1925 17:44:34.129270 MTRR: Fixed MSR 0x258 0x0606060606060606
1926 17:44:34.132376 MTRR: Fixed MSR 0x259 0x0000000000000000
1927 17:44:34.138815 MTRR: Fixed MSR 0x268 0x0606060606060606
1928 17:44:34.142354 MTRR: Fixed MSR 0x269 0x0606060606060606
1929 17:44:34.145391 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 17:44:34.148918 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 17:44:34.155168 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 17:44:34.158341 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 17:44:34.162121 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 17:44:34.165112 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 17:44:34.170610 call enable_fixed_mtrr()
1936 17:44:34.173356 CPU physical address size: 39 bits
1937 17:44:34.179575 MTRR: default type WB/UC MTRR counts: 6/7.
1938 17:44:34.183200 MTRR: WB selected as default type.
1939 17:44:34.189945 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1940 17:44:34.193425 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1941 17:44:34.199236 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1942 17:44:34.206199 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1943 17:44:34.212842 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1944 17:44:34.219189 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1945 17:44:34.223393
1946 17:44:34.223723 MTRR check
1947 17:44:34.226879 Fixed MTRRs : Enabled
1948 17:44:34.227201 Variable MTRRs: Enabled
1949 17:44:34.227396
1950 17:44:34.233317 MTRR: Fixed MSR 0x250 0x0606060606060606
1951 17:44:34.236607 MTRR: Fixed MSR 0x258 0x0606060606060606
1952 17:44:34.240241 MTRR: Fixed MSR 0x259 0x0000000000000000
1953 17:44:34.243526 MTRR: Fixed MSR 0x268 0x0606060606060606
1954 17:44:34.249913 MTRR: Fixed MSR 0x269 0x0606060606060606
1955 17:44:34.252917 MTRR: Fixed MSR 0x26a 0x0606060606060606
1956 17:44:34.256111 MTRR: Fixed MSR 0x26b 0x0606060606060606
1957 17:44:34.259811 MTRR: Fixed MSR 0x26c 0x0606060606060606
1958 17:44:34.266482 MTRR: Fixed MSR 0x26d 0x0606060606060606
1959 17:44:34.269891 MTRR: Fixed MSR 0x26e 0x0606060606060606
1960 17:44:34.273306 MTRR: Fixed MSR 0x26f 0x0606060606060606
1961 17:44:34.280028 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 17:44:34.280528 call enable_fixed_mtrr()
1963 17:44:34.287461 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 17:44:34.290279 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 17:44:34.293622 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 17:44:34.296375 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 17:44:34.303165 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 17:44:34.306662 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 17:44:34.309593 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 17:44:34.312929 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 17:44:34.319579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 17:44:34.322971 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 17:44:34.326337 CPU physical address size: 39 bits
1974 17:44:34.332498 call enable_fixed_mtrr()
1975 17:44:34.335815 MTRR: Fixed MSR 0x250 0x0606060606060606
1976 17:44:34.338878 CPU physical address size: 39 bits
1977 17:44:34.342628 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 17:44:34.349152 MTRR: Fixed MSR 0x250 0x0606060606060606
1979 17:44:34.352460 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 17:44:34.355534 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 17:44:34.359293 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 17:44:34.365964 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 17:44:34.368610 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 17:44:34.371892 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 17:44:34.375210 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 17:44:34.382309 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 17:44:34.385381 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 17:44:34.388503 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 17:44:34.395864 MTRR: Fixed MSR 0x258 0x0606060606060606
1990 17:44:34.398998 MTRR: Fixed MSR 0x259 0x0000000000000000
1991 17:44:34.402115 MTRR: Fixed MSR 0x268 0x0606060606060606
1992 17:44:34.405878 MTRR: Fixed MSR 0x269 0x0606060606060606
1993 17:44:34.412358 MTRR: Fixed MSR 0x26a 0x0606060606060606
1994 17:44:34.415553 MTRR: Fixed MSR 0x26b 0x0606060606060606
1995 17:44:34.418863 MTRR: Fixed MSR 0x26c 0x0606060606060606
1996 17:44:34.422192 MTRR: Fixed MSR 0x26d 0x0606060606060606
1997 17:44:34.429004 MTRR: Fixed MSR 0x26e 0x0606060606060606
1998 17:44:34.431847 MTRR: Fixed MSR 0x26f 0x0606060606060606
1999 17:44:34.435611 call enable_fixed_mtrr()
2000 17:44:34.439219 call enable_fixed_mtrr()
2001 17:44:34.445164 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2002 17:44:34.448329 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 17:44:34.452387 Checking cr50 for pending updates
2004 17:44:34.455714 MTRR: Fixed MSR 0x258 0x0606060606060606
2005 17:44:34.459281 MTRR: Fixed MSR 0x259 0x0000000000000000
2006 17:44:34.462591 MTRR: Fixed MSR 0x268 0x0606060606060606
2007 17:44:34.469640 MTRR: Fixed MSR 0x269 0x0606060606060606
2008 17:44:34.472471 MTRR: Fixed MSR 0x26a 0x0606060606060606
2009 17:44:34.476024 MTRR: Fixed MSR 0x26b 0x0606060606060606
2010 17:44:34.479537 MTRR: Fixed MSR 0x26c 0x0606060606060606
2011 17:44:34.485874 MTRR: Fixed MSR 0x26d 0x0606060606060606
2012 17:44:34.489481 MTRR: Fixed MSR 0x26e 0x0606060606060606
2013 17:44:34.492559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2014 17:44:34.497507 Reading cr50 TPM mode
2015 17:44:34.501201 call enable_fixed_mtrr()
2016 17:44:34.504651 CPU physical address size: 39 bits
2017 17:44:34.508046 CPU physical address size: 39 bits
2018 17:44:34.511223 CPU physical address size: 39 bits
2019 17:44:34.519690 BS: BS_PAYLOAD_LOAD entry times (exec / console): 49 / 8 ms
2020 17:44:34.523130 MTRR: Fixed MSR 0x250 0x0606060606060606
2021 17:44:34.529077 MTRR: Fixed MSR 0x258 0x0606060606060606
2022 17:44:34.532499 MTRR: Fixed MSR 0x258 0x0606060606060606
2023 17:44:34.535761 MTRR: Fixed MSR 0x259 0x0000000000000000
2024 17:44:34.539018 MTRR: Fixed MSR 0x268 0x0606060606060606
2025 17:44:34.545695 MTRR: Fixed MSR 0x269 0x0606060606060606
2026 17:44:34.549123 MTRR: Fixed MSR 0x26a 0x0606060606060606
2027 17:44:34.552656 MTRR: Fixed MSR 0x26b 0x0606060606060606
2028 17:44:34.555915 MTRR: Fixed MSR 0x26c 0x0606060606060606
2029 17:44:34.562598 MTRR: Fixed MSR 0x26d 0x0606060606060606
2030 17:44:34.565822 MTRR: Fixed MSR 0x26e 0x0606060606060606
2031 17:44:34.569225 MTRR: Fixed MSR 0x26f 0x0606060606060606
2032 17:44:34.576743 MTRR: Fixed MSR 0x259 0x0000000000000000
2033 17:44:34.577183 call enable_fixed_mtrr()
2034 17:44:34.582675 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 17:44:34.586033 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 17:44:34.589297 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 17:44:34.593278 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 17:44:34.599626 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 17:44:34.602814 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 17:44:34.606573 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 17:44:34.609390 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 17:44:34.614604 CPU physical address size: 39 bits
2043 17:44:34.620939 call enable_fixed_mtrr()
2044 17:44:34.627818 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2045 17:44:34.631008 CPU physical address size: 39 bits
2046 17:44:34.637574 Checking segment from ROM address 0xffc02b38
2047 17:44:34.641016 Checking segment from ROM address 0xffc02b54
2048 17:44:34.643931 Loading segment from ROM address 0xffc02b38
2049 17:44:34.647547 code (compression=0)
2050 17:44:34.657657 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2051 17:44:34.663751 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2052 17:44:34.667167 it's not compressed!
2053 17:44:34.806999 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2054 17:44:34.813193 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2055 17:44:34.820321 Loading segment from ROM address 0xffc02b54
2056 17:44:34.823715 Entry Point 0x30000000
2057 17:44:34.824133 Loaded segments
2058 17:44:34.830815 BS: BS_PAYLOAD_LOAD run times (exec / console): 241 / 63 ms
2059 17:44:34.875473 Finalizing chipset.
2060 17:44:34.878730 Finalizing SMM.
2061 17:44:34.879247 APMC done.
2062 17:44:34.885178 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2063 17:44:34.888619 mp_park_aps done after 0 msecs.
2064 17:44:34.891892 Jumping to boot code at 0x30000000(0x76b25000)
2065 17:44:34.901692 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2066 17:44:34.902214
2067 17:44:34.905114
2068 17:44:34.905527
2069 17:44:34.906562 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2070 17:44:34.907042 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2071 17:44:34.907489 Setting prompt string to ['volteer:']
2072 17:44:34.908002 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2073 17:44:34.908694 Starting depthcharge on Voema...
2074 17:44:34.909077
2075 17:44:34.914743 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2076 17:44:34.915185
2077 17:44:34.921718 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2078 17:44:34.922140
2079 17:44:34.928322 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2080 17:44:34.928760
2081 17:44:34.931742 Failed to find eMMC card reader
2082 17:44:34.932161
2083 17:44:34.934486 Wipe memory regions:
2084 17:44:34.935023
2085 17:44:34.937853 [0x00000000001000, 0x000000000a0000)
2086 17:44:34.938270
2087 17:44:34.941169 [0x00000000100000, 0x00000030000000)
2088 17:44:34.976950
2089 17:44:34.980138 [0x00000032662db0, 0x000000769ef000)
2090 17:44:35.030253
2091 17:44:35.033620 [0x00000100000000, 0x00000480400000)
2092 17:44:35.662568
2093 17:44:35.665423 ec_init: CrosEC protocol v3 supported (256, 256)
2094 17:44:36.096096
2095 17:44:36.096610 R8152: Initializing
2096 17:44:36.096947
2097 17:44:36.099254 Version 6 (ocp_data = 5c30)
2098 17:44:36.099712
2099 17:44:36.102593 R8152: Done initializing
2100 17:44:36.103010
2101 17:44:36.106347 Adding net device
2102 17:44:36.408668
2103 17:44:36.411687 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2104 17:44:36.412110
2105 17:44:36.412438
2106 17:44:36.412743
2107 17:44:36.415598 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2109 17:44:36.516950 volteer: tftpboot 192.168.201.1 11831833/tftp-deploy-8onvd8br/kernel/bzImage 11831833/tftp-deploy-8onvd8br/kernel/cmdline 11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
2110 17:44:36.517552 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2111 17:44:36.517967 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2112 17:44:36.522610 tftpboot 192.168.201.1 11831833/tftp-deploy-8onvd8br/kernel/bzIploy-8onvd8br/kernel/cmdline 11831833/tftp-deploy-8onvd8br/ramdisk/ramdisk.cpio.gz
2113 17:44:36.523047
2114 17:44:36.523374 Waiting for link
2115 17:44:36.725696
2116 17:44:36.726216 done.
2117 17:44:36.726549
2118 17:44:36.726896 MAC: 00:24:32:30:7e:22
2119 17:44:36.727253
2120 17:44:36.728694 Sending DHCP discover... done.
2121 17:44:36.729168
2122 17:44:36.732407 Waiting for reply... done.
2123 17:44:36.732943
2124 17:44:36.735365 Sending DHCP request... done.
2125 17:44:36.735842
2126 17:44:36.738706 Waiting for reply... done.
2127 17:44:36.739222
2128 17:44:36.741456 My ip is 192.168.201.21
2129 17:44:36.741870
2130 17:44:36.745245 The DHCP server ip is 192.168.201.1
2131 17:44:36.745777
2132 17:44:36.751467 TFTP server IP predefined by user: 192.168.201.1
2133 17:44:36.752018
2134 17:44:36.758522 Bootfile predefined by user: 11831833/tftp-deploy-8onvd8br/kernel/bzImage
2135 17:44:36.758940
2136 17:44:36.762040 Sending tftp read request... done.
2137 17:44:36.762660
2138 17:44:36.770239 Waiting for the transfer...
2139 17:44:36.770761
2140 17:44:37.440421 00000000 ################################################################
2141 17:44:37.440949
2142 17:44:38.130545 00080000 ################################################################
2143 17:44:38.131040
2144 17:44:38.828803 00100000 ################################################################
2145 17:44:38.829351
2146 17:44:39.530874 00180000 ################################################################
2147 17:44:39.531435
2148 17:44:40.215761 00200000 ################################################################
2149 17:44:40.216264
2150 17:44:40.808887 00280000 ################################################################
2151 17:44:40.809034
2152 17:44:41.486421 00300000 ################################################################
2153 17:44:41.486927
2154 17:44:42.121449 00380000 ################################################################
2155 17:44:42.121596
2156 17:44:42.733843 00400000 ################################################################
2157 17:44:42.733994
2158 17:44:43.357469 00480000 ################################################################
2159 17:44:43.357986
2160 17:44:44.045024 00500000 ################################################################
2161 17:44:44.045516
2162 17:44:44.720303 00580000 ################################################################
2163 17:44:44.720878
2164 17:44:45.393994 00600000 ################################################################
2165 17:44:45.394629
2166 17:44:46.061008 00680000 ################################################################
2167 17:44:46.061563
2168 17:44:46.747190 00700000 ################################################################
2169 17:44:46.748094
2170 17:44:47.427555 00780000 ################################################################
2171 17:44:47.428107
2172 17:44:47.575313 00800000 ############### done.
2173 17:44:47.575915
2174 17:44:47.578903 The bootfile was 8507280 bytes long.
2175 17:44:47.579370
2176 17:44:47.582162 Sending tftp read request... done.
2177 17:44:47.582583
2178 17:44:47.585559 Waiting for the transfer...
2179 17:44:47.585979
2180 17:44:48.301979 00000000 ################################################################
2181 17:44:48.302505
2182 17:44:49.025668 00080000 ################################################################
2183 17:44:49.026219
2184 17:44:49.745142 00100000 ################################################################
2185 17:44:49.745673
2186 17:44:50.457186 00180000 ################################################################
2187 17:44:50.457807
2188 17:44:51.152131 00200000 ################################################################
2189 17:44:51.152645
2190 17:44:51.868368 00280000 ################################################################
2191 17:44:51.868885
2192 17:44:52.572359 00300000 ################################################################
2193 17:44:52.572531
2194 17:44:53.246316 00380000 ################################################################
2195 17:44:53.246460
2196 17:44:53.904790 00400000 ################################################################
2197 17:44:53.905391
2198 17:44:54.624545 00480000 ################################################################
2199 17:44:54.625072
2200 17:44:55.246090 00500000 ################################################################
2201 17:44:55.246225
2202 17:44:55.798843 00580000 ################################################################
2203 17:44:55.799009
2204 17:44:56.352775 00600000 ################################################################
2205 17:44:56.352998
2206 17:44:56.934751 00680000 ################################################################
2207 17:44:56.934922
2208 17:44:57.503475 00700000 ################################################################
2209 17:44:57.503660
2210 17:44:58.057400 00780000 ################################################################
2211 17:44:58.057563
2212 17:44:58.616002 00800000 ################################################################
2213 17:44:58.616135
2214 17:44:59.188814 00880000 ################################################################
2215 17:44:59.188964
2216 17:44:59.767937 00900000 ################################################################
2217 17:44:59.768094
2218 17:45:00.349445 00980000 ################################################################
2219 17:45:00.349595
2220 17:45:00.926645 00a00000 ################################################################
2221 17:45:00.926793
2222 17:45:01.507436 00a80000 ################################################################
2223 17:45:01.507590
2224 17:45:02.077945 00b00000 ################################################################
2225 17:45:02.078078
2226 17:45:02.650848 00b80000 ################################################################
2227 17:45:02.650995
2228 17:45:03.242513 00c00000 ################################################################
2229 17:45:03.242657
2230 17:45:03.814508 00c80000 ################################################################
2231 17:45:03.814689
2232 17:45:04.405947 00d00000 ################################################################
2233 17:45:04.406112
2234 17:45:04.991844 00d80000 ################################################################
2235 17:45:04.991997
2236 17:45:05.651560 00e00000 ################################################################
2237 17:45:05.652066
2238 17:45:06.367775 00e80000 ################################################################
2239 17:45:06.368260
2240 17:45:07.078813 00f00000 ################################################################
2241 17:45:07.079332
2242 17:45:07.788976 00f80000 ################################################################
2243 17:45:07.789467
2244 17:45:08.496410 01000000 ################################################################
2245 17:45:08.496940
2246 17:45:09.195283 01080000 ################################################################
2247 17:45:09.195974
2248 17:45:09.881908 01100000 ################################################################
2249 17:45:09.882402
2250 17:45:10.568584 01180000 ################################################################
2251 17:45:10.569082
2252 17:45:11.273917 01200000 ################################################################
2253 17:45:11.274458
2254 17:45:11.977734 01280000 ################################################################
2255 17:45:11.978272
2256 17:45:12.677971 01300000 ################################################################
2257 17:45:12.678514
2258 17:45:13.382337 01380000 ################################################################
2259 17:45:13.382872
2260 17:45:14.109303 01400000 ################################################################
2261 17:45:14.110019
2262 17:45:14.821142 01480000 ################################################################
2263 17:45:14.821291
2264 17:45:15.519791 01500000 ################################################################
2265 17:45:15.520285
2266 17:45:16.239251 01580000 ################################################################
2267 17:45:16.239828
2268 17:45:16.924736 01600000 ################################################################
2269 17:45:16.925031
2270 17:45:17.627294 01680000 ################################################################
2271 17:45:17.627843
2272 17:45:18.327899 01700000 ################################################################
2273 17:45:18.328058
2274 17:45:18.965256 01780000 ################################################################
2275 17:45:18.965770
2276 17:45:19.654074 01800000 ################################################################
2277 17:45:19.654589
2278 17:45:20.323490 01880000 ################################################################
2279 17:45:20.323678
2280 17:45:21.014491 01900000 ################################################################
2281 17:45:21.015003
2282 17:45:21.689433 01980000 ################################################################
2283 17:45:21.689922
2284 17:45:22.392793 01a00000 ################################################################
2285 17:45:22.393286
2286 17:45:23.069295 01a80000 ################################################################
2287 17:45:23.069421
2288 17:45:23.738293 01b00000 ################################################################
2289 17:45:23.738827
2290 17:45:24.306627 01b80000 ################################################################
2291 17:45:24.306763
2292 17:45:24.846498 01c00000 ################################################################
2293 17:45:24.846670
2294 17:45:25.510536 01c80000 ################################################################
2295 17:45:25.510751
2296 17:45:26.178431 01d00000 ################################################################
2297 17:45:26.178654
2298 17:45:26.721954 01d80000 ################################################################
2299 17:45:26.722120
2300 17:45:27.288236 01e00000 ################################################################
2301 17:45:27.288386
2302 17:45:27.819506 01e80000 ################################################################
2303 17:45:27.819688
2304 17:45:28.375811 01f00000 ################################################################
2305 17:45:28.375947
2306 17:45:28.918463 01f80000 ################################################################
2307 17:45:28.918594
2308 17:45:29.464319 02000000 ################################################################
2309 17:45:29.464510
2310 17:45:30.001069 02080000 ################################################################
2311 17:45:30.001242
2312 17:45:30.545797 02100000 ################################################################
2313 17:45:30.545927
2314 17:45:31.081682 02180000 ################################################################
2315 17:45:31.081828
2316 17:45:31.543178 02200000 ####################################################### done.
2317 17:45:31.543338
2318 17:45:31.546279 Sending tftp read request... done.
2319 17:45:31.546385
2320 17:45:31.550090 Waiting for the transfer...
2321 17:45:31.550191
2322 17:45:31.550280 00000000 # done.
2323 17:45:31.550372
2324 17:45:31.559832 Command line loaded dynamically from TFTP file: 11831833/tftp-deploy-8onvd8br/kernel/cmdline
2325 17:45:31.559910
2326 17:45:31.576228 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2327 17:45:31.581456
2328 17:45:31.584695 Shutting down all USB controllers.
2329 17:45:31.584777
2330 17:45:31.584841 Removing current net device
2331 17:45:31.584902
2332 17:45:31.587947 Finalizing coreboot
2333 17:45:31.588062
2334 17:45:31.594619 Exiting depthcharge with code 4 at timestamp: 65269883
2335 17:45:31.594729
2336 17:45:31.594822
2337 17:45:31.594911 Starting kernel ...
2338 17:45:31.594998
2339 17:45:31.595082
2340 17:45:31.595841 end: 2.2.4 bootloader-commands (duration 00:00:57) [common]
2341 17:45:31.595939 start: 2.2.5 auto-login-action (timeout 00:03:48) [common]
2342 17:45:31.596014 Setting prompt string to ['Linux version [0-9]']
2343 17:45:31.596081 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2344 17:45:31.596147 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2346 17:49:19.596860 end: 2.2.5 auto-login-action (duration 00:03:48) [common]
2348 17:49:19.597976 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 228 seconds'
2350 17:49:19.599032 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2353 17:49:19.600715 end: 2 depthcharge-action (duration 00:05:00) [common]
2355 17:49:19.601940 Cleaning after the job
2356 17:49:19.602456 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/ramdisk
2357 17:49:19.626100 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/kernel
2358 17:49:19.631784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831833/tftp-deploy-8onvd8br/modules
2359 17:49:19.633015 start: 4.1 power-off (timeout 00:00:30) [common]
2360 17:49:19.633587 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2361 17:49:19.728131 >> Command sent successfully.
2362 17:49:19.733404 Returned 0 in 0 seconds
2363 17:49:19.834482 end: 4.1 power-off (duration 00:00:00) [common]
2365 17:49:19.836191 start: 4.2 read-feedback (timeout 00:10:00) [common]
2366 17:49:19.837485 Listened to connection for namespace 'common' for up to 1s
2367 17:49:20.838110 Finalising connection for namespace 'common'
2368 17:49:20.838695 Disconnecting from shell: Finalise
2369 17:49:20.839075
2370 17:49:20.940011 end: 4.2 read-feedback (duration 00:00:01) [common]
2371 17:49:20.940540 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831833
2372 17:49:21.067576 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831833
2373 17:49:21.067800 JobError: Your job cannot terminate cleanly.