Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:50:32.219245 lava-dispatcher, installed at version: 2023.08
2 17:50:32.219474 start: 0 validate
3 17:50:32.219616 Start time: 2023-10-20 17:50:32.219606+00:00 (UTC)
4 17:50:32.219753 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:50:32.219952 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:50:32.491511 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:50:32.491700 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:50:32.757244 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:50:32.757433 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:50:33.023092 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:50:33.023303 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:50:33.289351 validate duration: 1.07
14 17:50:33.289669 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:50:33.289780 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:50:33.289875 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:50:33.290014 Not decompressing ramdisk as can be used compressed.
18 17:50:33.290107 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/initrd.cpio.gz
19 17:50:33.290178 saving as /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/ramdisk/initrd.cpio.gz
20 17:50:33.290247 total size: 6134299 (5 MB)
21 17:50:33.292402 progress 0 % (0 MB)
22 17:50:33.295498 progress 5 % (0 MB)
23 17:50:33.297580 progress 10 % (0 MB)
24 17:50:33.299713 progress 15 % (0 MB)
25 17:50:33.301645 progress 20 % (1 MB)
26 17:50:33.303511 progress 25 % (1 MB)
27 17:50:33.306135 progress 30 % (1 MB)
28 17:50:33.308085 progress 35 % (2 MB)
29 17:50:33.309918 progress 40 % (2 MB)
30 17:50:33.312034 progress 45 % (2 MB)
31 17:50:33.315236 progress 50 % (2 MB)
32 17:50:33.317670 progress 55 % (3 MB)
33 17:50:33.319853 progress 60 % (3 MB)
34 17:50:33.321807 progress 65 % (3 MB)
35 17:50:33.324049 progress 70 % (4 MB)
36 17:50:33.325919 progress 75 % (4 MB)
37 17:50:33.328014 progress 80 % (4 MB)
38 17:50:33.330656 progress 85 % (5 MB)
39 17:50:33.332645 progress 90 % (5 MB)
40 17:50:33.334566 progress 95 % (5 MB)
41 17:50:33.337337 progress 100 % (5 MB)
42 17:50:33.337515 5 MB downloaded in 0.05 s (123.77 MB/s)
43 17:50:33.337680 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:50:33.337942 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:50:33.338036 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:50:33.338131 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:50:33.338288 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:50:33.338365 saving as /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/kernel/bzImage
50 17:50:33.338431 total size: 8507280 (8 MB)
51 17:50:33.338496 No compression specified
52 17:50:33.339876 progress 0 % (0 MB)
53 17:50:33.342587 progress 5 % (0 MB)
54 17:50:33.345127 progress 10 % (0 MB)
55 17:50:33.347699 progress 15 % (1 MB)
56 17:50:33.350300 progress 20 % (1 MB)
57 17:50:33.352857 progress 25 % (2 MB)
58 17:50:33.355425 progress 30 % (2 MB)
59 17:50:33.358053 progress 35 % (2 MB)
60 17:50:33.360617 progress 40 % (3 MB)
61 17:50:33.363179 progress 45 % (3 MB)
62 17:50:33.365708 progress 50 % (4 MB)
63 17:50:33.368235 progress 55 % (4 MB)
64 17:50:33.370752 progress 60 % (4 MB)
65 17:50:33.373251 progress 65 % (5 MB)
66 17:50:33.375765 progress 70 % (5 MB)
67 17:50:33.378301 progress 75 % (6 MB)
68 17:50:33.380789 progress 80 % (6 MB)
69 17:50:33.383277 progress 85 % (6 MB)
70 17:50:33.385809 progress 90 % (7 MB)
71 17:50:33.388298 progress 95 % (7 MB)
72 17:50:33.390873 progress 100 % (8 MB)
73 17:50:33.391085 8 MB downloaded in 0.05 s (154.10 MB/s)
74 17:50:33.391241 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:50:33.391511 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:50:33.391607 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:50:33.391699 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:50:33.391856 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 17:50:33.391930 saving as /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/nfsrootfs/full.rootfs.tar
81 17:50:33.392009 total size: 202699900 (193 MB)
82 17:50:33.392081 Using unxz to decompress xz
83 17:50:33.399244 progress 0 % (0 MB)
84 17:50:34.038479 progress 5 % (9 MB)
85 17:50:34.611900 progress 10 % (19 MB)
86 17:50:35.240478 progress 15 % (29 MB)
87 17:50:35.549653 progress 20 % (38 MB)
88 17:50:36.138550 progress 25 % (48 MB)
89 17:50:36.765247 progress 30 % (58 MB)
90 17:50:37.446356 progress 35 % (67 MB)
91 17:50:38.060494 progress 40 % (77 MB)
92 17:50:38.685232 progress 45 % (87 MB)
93 17:50:39.349550 progress 50 % (96 MB)
94 17:50:40.014929 progress 55 % (106 MB)
95 17:50:40.767446 progress 60 % (116 MB)
96 17:50:41.236466 progress 65 % (125 MB)
97 17:50:41.338547 progress 70 % (135 MB)
98 17:50:41.498559 progress 75 % (145 MB)
99 17:50:41.588884 progress 80 % (154 MB)
100 17:50:41.647303 progress 85 % (164 MB)
101 17:50:41.747159 progress 90 % (174 MB)
102 17:50:42.144871 progress 95 % (183 MB)
103 17:50:42.795318 progress 100 % (193 MB)
104 17:50:42.802325 193 MB downloaded in 9.41 s (20.54 MB/s)
105 17:50:42.802666 end: 1.3.1 http-download (duration 00:00:09) [common]
107 17:50:42.803110 end: 1.3 download-retry (duration 00:00:09) [common]
108 17:50:42.803247 start: 1.4 download-retry (timeout 00:09:50) [common]
109 17:50:42.803385 start: 1.4.1 http-download (timeout 00:09:50) [common]
110 17:50:42.803590 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:50:42.803702 saving as /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/modules/modules.tar
112 17:50:42.803804 total size: 253900 (0 MB)
113 17:50:42.803907 Using unxz to decompress xz
114 17:50:42.809310 progress 12 % (0 MB)
115 17:50:42.809977 progress 25 % (0 MB)
116 17:50:42.810404 progress 38 % (0 MB)
117 17:50:42.811988 progress 51 % (0 MB)
118 17:50:42.814019 progress 64 % (0 MB)
119 17:50:42.816157 progress 77 % (0 MB)
120 17:50:42.818233 progress 90 % (0 MB)
121 17:50:42.820172 progress 100 % (0 MB)
122 17:50:42.826556 0 MB downloaded in 0.02 s (10.65 MB/s)
123 17:50:42.826945 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:50:42.827551 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:50:42.827737 start: 1.5 prepare-tftp-overlay (timeout 00:09:50) [common]
127 17:50:42.827924 start: 1.5.1 extract-nfsrootfs (timeout 00:09:50) [common]
128 17:50:47.109879 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831872/extract-nfsrootfs-epsaw0vp
129 17:50:47.110097 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 17:50:47.110211 start: 1.5.2 lava-overlay (timeout 00:09:46) [common]
131 17:50:47.110413 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt
132 17:50:47.110567 makedir: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin
133 17:50:47.110695 makedir: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/tests
134 17:50:47.110811 makedir: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/results
135 17:50:47.110933 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-add-keys
136 17:50:47.111094 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-add-sources
137 17:50:47.111253 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-background-process-start
138 17:50:47.111411 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-background-process-stop
139 17:50:47.111555 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-common-functions
140 17:50:47.111707 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-echo-ipv4
141 17:50:47.111858 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-install-packages
142 17:50:47.112006 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-installed-packages
143 17:50:47.112156 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-os-build
144 17:50:47.112308 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-probe-channel
145 17:50:47.112448 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-probe-ip
146 17:50:47.112597 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-target-ip
147 17:50:47.112739 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-target-mac
148 17:50:47.112887 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-target-storage
149 17:50:47.113031 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-case
150 17:50:47.113182 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-event
151 17:50:47.113322 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-feedback
152 17:50:47.113471 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-raise
153 17:50:47.113619 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-reference
154 17:50:47.113765 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-runner
155 17:50:47.113916 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-set
156 17:50:47.114073 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-test-shell
157 17:50:47.114215 Updating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-add-keys (debian)
158 17:50:47.114395 Updating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-add-sources (debian)
159 17:50:47.114562 Updating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-install-packages (debian)
160 17:50:47.114728 Updating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-installed-packages (debian)
161 17:50:47.114900 Updating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/bin/lava-os-build (debian)
162 17:50:47.115048 Creating /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/environment
163 17:50:47.115170 LAVA metadata
164 17:50:47.115248 - LAVA_JOB_ID=11831872
165 17:50:47.115319 - LAVA_DISPATCHER_IP=192.168.201.1
166 17:50:47.115429 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:46) [common]
167 17:50:47.115512 skipped lava-vland-overlay
168 17:50:47.115597 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 17:50:47.115685 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:46) [common]
170 17:50:47.115753 skipped lava-multinode-overlay
171 17:50:47.115844 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 17:50:47.115932 start: 1.5.2.3 test-definition (timeout 00:09:46) [common]
173 17:50:47.116138 Loading test definitions
174 17:50:47.116246 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:46) [common]
175 17:50:47.116327 Using /lava-11831872 at stage 0
176 17:50:47.116674 uuid=11831872_1.5.2.3.1 testdef=None
177 17:50:47.116773 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 17:50:47.116867 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
179 17:50:47.117491 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 17:50:47.117747 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
182 17:50:47.118399 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 17:50:47.118664 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
185 17:50:47.119311 runner path: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/0/tests/0_timesync-off test_uuid 11831872_1.5.2.3.1
186 17:50:47.119487 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 17:50:47.119755 start: 1.5.2.3.5 git-repo-action (timeout 00:09:46) [common]
189 17:50:47.119836 Using /lava-11831872 at stage 0
190 17:50:47.119943 Fetching tests from https://github.com/kernelci/test-definitions.git
191 17:50:47.120043 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/0/tests/1_kselftest-alsa'
192 17:50:50.326072 Running '/usr/bin/git checkout kernelci.org
193 17:50:50.489444 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 17:50:50.490275 uuid=11831872_1.5.2.3.5 testdef=None
195 17:50:50.490461 end: 1.5.2.3.5 git-repo-action (duration 00:00:03) [common]
197 17:50:50.490739 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
198 17:50:50.491584 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 17:50:50.491843 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
201 17:50:50.492970 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 17:50:50.493235 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
204 17:50:50.494285 runner path: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/0/tests/1_kselftest-alsa test_uuid 11831872_1.5.2.3.5
205 17:50:50.494389 BOARD='asus-C436FA-Flip-hatch'
206 17:50:50.494462 BRANCH='cip-gitlab'
207 17:50:50.494529 SKIPFILE='/dev/null'
208 17:50:50.494595 SKIP_INSTALL='True'
209 17:50:50.494658 TESTPROG_URL='None'
210 17:50:50.494720 TST_CASENAME=''
211 17:50:50.494783 TST_CMDFILES='alsa'
212 17:50:50.494943 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 17:50:50.495170 Creating lava-test-runner.conf files
215 17:50:50.495242 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831872/lava-overlay-x9_l8pwt/lava-11831872/0 for stage 0
216 17:50:50.495348 - 0_timesync-off
217 17:50:50.495426 - 1_kselftest-alsa
218 17:50:50.495538 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
219 17:50:50.495656 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
220 17:50:59.125417 end: 1.5.2.4 compress-overlay (duration 00:00:09) [common]
221 17:50:59.125625 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
222 17:50:59.125728 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 17:50:59.125842 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
224 17:50:59.125945 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
225 17:50:59.305222 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 17:50:59.305662 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
227 17:50:59.305793 extracting modules file /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831872/extract-nfsrootfs-epsaw0vp
228 17:50:59.321742 extracting modules file /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831872/extract-overlay-ramdisk-buxpzla4/ramdisk
229 17:50:59.337533 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 17:50:59.337731 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
231 17:50:59.337843 [common] Applying overlay to NFS
232 17:50:59.337923 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831872/compress-overlay-15whs032/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831872/extract-nfsrootfs-epsaw0vp
233 17:51:00.405706 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 17:51:00.405891 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
235 17:51:00.405996 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 17:51:00.406096 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
237 17:51:00.406186 Building ramdisk /var/lib/lava/dispatcher/tmp/11831872/extract-overlay-ramdisk-buxpzla4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831872/extract-overlay-ramdisk-buxpzla4/ramdisk
238 17:51:00.544384 >> 30709 blocks
239 17:51:01.283846 rename /var/lib/lava/dispatcher/tmp/11831872/extract-overlay-ramdisk-buxpzla4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
240 17:51:01.284423 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 17:51:01.284599 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
242 17:51:01.284754 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
243 17:51:01.284905 No mkimage arch provided, not using FIT.
244 17:51:01.285022 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 17:51:01.285147 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 17:51:01.285292 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 17:51:01.285420 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
248 17:51:01.285551 No LXC device requested
249 17:51:01.285668 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 17:51:01.285822 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
251 17:51:01.285957 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 17:51:01.286084 Checking files for TFTP limit of 4294967296 bytes.
253 17:51:01.286578 end: 1 tftp-deploy (duration 00:00:28) [common]
254 17:51:01.286713 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 17:51:01.286836 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 17:51:01.286996 substitutions:
257 17:51:01.287085 - {DTB}: None
258 17:51:01.287179 - {INITRD}: 11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
259 17:51:01.287269 - {KERNEL}: 11831872/tftp-deploy-p1vuqqvs/kernel/bzImage
260 17:51:01.287378 - {LAVA_MAC}: None
261 17:51:01.287487 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831872/extract-nfsrootfs-epsaw0vp
262 17:51:01.287598 - {NFS_SERVER_IP}: 192.168.201.1
263 17:51:01.287704 - {PRESEED_CONFIG}: None
264 17:51:01.287814 - {PRESEED_LOCAL}: None
265 17:51:01.287921 - {RAMDISK}: 11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
266 17:51:01.288035 - {ROOT_PART}: None
267 17:51:01.288143 - {ROOT}: None
268 17:51:01.288250 - {SERVER_IP}: 192.168.201.1
269 17:51:01.288356 - {TEE}: None
270 17:51:01.288462 Parsed boot commands:
271 17:51:01.288567 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 17:51:01.288843 Parsed boot commands: tftpboot 192.168.201.1 11831872/tftp-deploy-p1vuqqvs/kernel/bzImage 11831872/tftp-deploy-p1vuqqvs/kernel/cmdline 11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
273 17:51:01.288986 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 17:51:01.289128 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 17:51:01.289277 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 17:51:01.289424 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 17:51:01.289543 Not connected, no need to disconnect.
278 17:51:01.289675 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 17:51:01.289816 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 17:51:01.289932 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
281 17:51:01.294489 Setting prompt string to ['lava-test: # ']
282 17:51:01.294948 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 17:51:01.295126 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 17:51:01.295249 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 17:51:01.295371 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 17:51:01.295607 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
287 17:51:06.435162 >> Command sent successfully.
288 17:51:06.437837 Returned 0 in 5 seconds
289 17:51:06.538262 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 17:51:06.538624 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 17:51:06.538751 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 17:51:06.538854 Setting prompt string to 'Starting depthcharge on Helios...'
294 17:51:06.538945 Changing prompt to 'Starting depthcharge on Helios...'
295 17:51:06.539028 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
296 17:51:06.539340 [Enter `^Ec?' for help]
297 17:51:07.161679
298 17:51:07.161837
299 17:51:07.171475 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
300 17:51:07.175361 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
301 17:51:07.182047 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
302 17:51:07.185121 CPU: AES supported, TXT NOT supported, VT supported
303 17:51:07.191837 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
304 17:51:07.195443 PCH: device id 0284 (rev 00) is Cometlake-U Premium
305 17:51:07.201711 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
306 17:51:07.205175 VBOOT: Loading verstage.
307 17:51:07.208322 FMAP: Found "FLASH" version 1.1 at 0xc04000.
308 17:51:07.215360 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
309 17:51:07.218314 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
310 17:51:07.221690 CBFS @ c08000 size 3f8000
311 17:51:07.228419 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
312 17:51:07.231499 CBFS: Locating 'fallback/verstage'
313 17:51:07.234645 CBFS: Found @ offset 10fb80 size 1072c
314 17:51:07.238628
315 17:51:07.238723
316 17:51:07.248105 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
317 17:51:07.262464 Probing TPM: . done!
318 17:51:07.265852 TPM ready after 0 ms
319 17:51:07.269298 Connected to device vid:did:rid of 1ae0:0028:00
320 17:51:07.279515 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
321 17:51:07.283289 Initialized TPM device CR50 revision 0
322 17:51:07.328882 tlcl_send_startup: Startup return code is 0
323 17:51:07.329011 TPM: setup succeeded
324 17:51:07.341099 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
325 17:51:07.345083 Chrome EC: UHEPI supported
326 17:51:07.348998 Phase 1
327 17:51:07.352134 FMAP: area GBB found @ c05000 (12288 bytes)
328 17:51:07.358391 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
329 17:51:07.358483 Phase 2
330 17:51:07.361776 Phase 3
331 17:51:07.364913 FMAP: area GBB found @ c05000 (12288 bytes)
332 17:51:07.371993 VB2:vb2_report_dev_firmware() This is developer signed firmware
333 17:51:07.378265 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
334 17:51:07.381857 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
335 17:51:07.388432 VB2:vb2_verify_keyblock() Checking keyblock signature...
336 17:51:07.404216 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
337 17:51:07.407105 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
338 17:51:07.414234 VB2:vb2_verify_fw_preamble() Verifying preamble.
339 17:51:07.417968 Phase 4
340 17:51:07.421324 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
341 17:51:07.428012 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
342 17:51:07.607393 VB2:vb2_rsa_verify_digest() Digest check failed!
343 17:51:07.614350 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
344 17:51:07.614454 Saving nvdata
345 17:51:07.617753 Reboot requested (10020007)
346 17:51:07.621121 board_reset() called!
347 17:51:07.621213 full_reset() called!
348 17:51:12.129430
349 17:51:12.129846
350 17:51:12.139230 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
351 17:51:12.142968 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
352 17:51:12.149180 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
353 17:51:12.152653 CPU: AES supported, TXT NOT supported, VT supported
354 17:51:12.159451 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
355 17:51:12.162669 PCH: device id 0284 (rev 00) is Cometlake-U Premium
356 17:51:12.169315 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
357 17:51:12.172801 VBOOT: Loading verstage.
358 17:51:12.175942 FMAP: Found "FLASH" version 1.1 at 0xc04000.
359 17:51:12.182895 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
360 17:51:12.185840 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 17:51:12.189384 CBFS @ c08000 size 3f8000
362 17:51:12.195695 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
363 17:51:12.199036 CBFS: Locating 'fallback/verstage'
364 17:51:12.202538 CBFS: Found @ offset 10fb80 size 1072c
365 17:51:12.205859
366 17:51:12.206405
367 17:51:12.216033 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
368 17:51:12.230101 Probing TPM: . done!
369 17:51:12.233465 TPM ready after 0 ms
370 17:51:12.237306 Connected to device vid:did:rid of 1ae0:0028:00
371 17:51:12.247313 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
372 17:51:12.250636 Initialized TPM device CR50 revision 0
373 17:51:12.296064 tlcl_send_startup: Startup return code is 0
374 17:51:12.296429 TPM: setup succeeded
375 17:51:12.308988 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
376 17:51:12.312532 Chrome EC: UHEPI supported
377 17:51:12.316310 Phase 1
378 17:51:12.319535 FMAP: area GBB found @ c05000 (12288 bytes)
379 17:51:12.326016 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
380 17:51:12.332227 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
381 17:51:12.335880 Recovery requested (1009000e)
382 17:51:12.341270 Saving nvdata
383 17:51:12.347670 tlcl_extend: response is 0
384 17:51:12.356542 tlcl_extend: response is 0
385 17:51:12.363466 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
386 17:51:12.367240 CBFS @ c08000 size 3f8000
387 17:51:12.373556 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
388 17:51:12.376875 CBFS: Locating 'fallback/romstage'
389 17:51:12.379956 CBFS: Found @ offset 80 size 145fc
390 17:51:12.383369 Accumulated console time in verstage 98 ms
391 17:51:12.383732
392 17:51:12.384052
393 17:51:12.397061 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
394 17:51:12.403208 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
395 17:51:12.406515 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
396 17:51:12.410263 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
397 17:51:12.416435 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
398 17:51:12.419960 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
399 17:51:12.423693 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
400 17:51:12.426482 TCO_STS: 0000 0000
401 17:51:12.430146 GEN_PMCON: e0015238 00000200
402 17:51:12.433188 GBLRST_CAUSE: 00000000 00000000
403 17:51:12.433564 prev_sleep_state 5
404 17:51:12.436516 Boot Count incremented to 64515
405 17:51:12.443144 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
406 17:51:12.446404 CBFS @ c08000 size 3f8000
407 17:51:12.453438 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
408 17:51:12.453805 CBFS: Locating 'fspm.bin'
409 17:51:12.456514 CBFS: Found @ offset 5ffc0 size 71000
410 17:51:12.460614 Chrome EC: UHEPI supported
411 17:51:12.467882 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
412 17:51:12.473362 Probing TPM: done!
413 17:51:12.480410 Connected to device vid:did:rid of 1ae0:0028:00
414 17:51:12.490075 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
415 17:51:12.495621 Initialized TPM device CR50 revision 0
416 17:51:12.504638 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
417 17:51:12.511192 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
418 17:51:12.514428 MRC cache found, size 1948
419 17:51:12.517784 bootmode is set to: 2
420 17:51:12.521082 PRMRR disabled by config.
421 17:51:12.521176 SPD INDEX = 1
422 17:51:12.527555 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
423 17:51:12.530814 CBFS @ c08000 size 3f8000
424 17:51:12.538186 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
425 17:51:12.538280 CBFS: Locating 'spd.bin'
426 17:51:12.540750 CBFS: Found @ offset 5fb80 size 400
427 17:51:12.544395 SPD: module type is LPDDR3
428 17:51:12.547848 SPD: module part is
429 17:51:12.554141 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
430 17:51:12.557917 SPD: device width 4 bits, bus width 8 bits
431 17:51:12.561176 SPD: module size is 4096 MB (per channel)
432 17:51:12.564288 memory slot: 0 configuration done.
433 17:51:12.567414 memory slot: 2 configuration done.
434 17:51:12.618662 CBMEM:
435 17:51:12.622017 IMD: root @ 99fff000 254 entries.
436 17:51:12.625885 IMD: root @ 99ffec00 62 entries.
437 17:51:12.628626 External stage cache:
438 17:51:12.632347 IMD: root @ 9abff000 254 entries.
439 17:51:12.635374 IMD: root @ 9abfec00 62 entries.
440 17:51:12.638784 Chrome EC: clear events_b mask to 0x0000000020004000
441 17:51:12.655184 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
442 17:51:12.665103 tlcl_write: response is 0
443 17:51:12.677410 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
444 17:51:12.684390 MRC: TPM MRC hash updated successfully.
445 17:51:12.684485 2 DIMMs found
446 17:51:12.687505 SMM Memory Map
447 17:51:12.690908 SMRAM : 0x9a000000 0x1000000
448 17:51:12.694440 Subregion 0: 0x9a000000 0xa00000
449 17:51:12.697268 Subregion 1: 0x9aa00000 0x200000
450 17:51:12.700591 Subregion 2: 0x9ac00000 0x400000
451 17:51:12.704006 top_of_ram = 0x9a000000
452 17:51:12.707313 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
453 17:51:12.713984 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
454 17:51:12.716987 MTRR Range: Start=ff000000 End=0 (Size 1000000)
455 17:51:12.723854 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
456 17:51:12.726951 CBFS @ c08000 size 3f8000
457 17:51:12.730276 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
458 17:51:12.734079 CBFS: Locating 'fallback/postcar'
459 17:51:12.737072 CBFS: Found @ offset 107000 size 4b44
460 17:51:12.743495 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
461 17:51:12.756500 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
462 17:51:12.759798 Processing 180 relocs. Offset value of 0x97c0c000
463 17:51:12.767877 Accumulated console time in romstage 286 ms
464 17:51:12.767971
465 17:51:12.768057
466 17:51:12.777884 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
467 17:51:12.784486 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
468 17:51:12.787844 CBFS @ c08000 size 3f8000
469 17:51:12.790817 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
470 17:51:12.797580 CBFS: Locating 'fallback/ramstage'
471 17:51:12.800561 CBFS: Found @ offset 43380 size 1b9e8
472 17:51:12.807828 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
473 17:51:12.839552 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
474 17:51:12.843322 Processing 3976 relocs. Offset value of 0x98db0000
475 17:51:12.849524 Accumulated console time in postcar 52 ms
476 17:51:12.849619
477 17:51:12.849693
478 17:51:12.859507 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
479 17:51:12.865910 FMAP: area RO_VPD found @ c00000 (16384 bytes)
480 17:51:12.869537 WARNING: RO_VPD is uninitialized or empty.
481 17:51:12.873287 FMAP: area RW_VPD found @ af8000 (8192 bytes)
482 17:51:12.879319 FMAP: area RW_VPD found @ af8000 (8192 bytes)
483 17:51:12.879414 Normal boot.
484 17:51:12.885957 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
485 17:51:12.889335 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
486 17:51:12.892496 CBFS @ c08000 size 3f8000
487 17:51:12.899186 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
488 17:51:12.902347 CBFS: Locating 'cpu_microcode_blob.bin'
489 17:51:12.905689 CBFS: Found @ offset 14700 size 2ec00
490 17:51:12.909312 microcode: sig=0x806ec pf=0x4 revision=0xc9
491 17:51:12.912259 Skip microcode update
492 17:51:12.915809 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
493 17:51:12.919170 CBFS @ c08000 size 3f8000
494 17:51:12.925743 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
495 17:51:12.929199 CBFS: Locating 'fsps.bin'
496 17:51:12.932814 CBFS: Found @ offset d1fc0 size 35000
497 17:51:12.957580 Detected 4 core, 8 thread CPU.
498 17:51:12.961564 Setting up SMI for CPU
499 17:51:12.964480 IED base = 0x9ac00000
500 17:51:12.964573 IED size = 0x00400000
501 17:51:12.967657 Will perform SMM setup.
502 17:51:12.974219 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
503 17:51:12.980594 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
504 17:51:12.987714 Processing 16 relocs. Offset value of 0x00030000
505 17:51:12.987808 Attempting to start 7 APs
506 17:51:12.993995 Waiting for 10ms after sending INIT.
507 17:51:13.007482 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
508 17:51:13.007580 done.
509 17:51:13.011325 AP: slot 1 apic_id 4.
510 17:51:13.014151 AP: slot 6 apic_id 5.
511 17:51:13.014244 AP: slot 4 apic_id 2.
512 17:51:13.017948 AP: slot 7 apic_id 3.
513 17:51:13.020585 Waiting for 2nd SIPI to complete...done.
514 17:51:13.024125 AP: slot 3 apic_id 7.
515 17:51:13.027643 AP: slot 5 apic_id 6.
516 17:51:13.034033 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
517 17:51:13.040588 Processing 13 relocs. Offset value of 0x00038000
518 17:51:13.043880 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
519 17:51:13.050413 Installing SMM handler to 0x9a000000
520 17:51:13.057192 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
521 17:51:13.063921 Processing 658 relocs. Offset value of 0x9a010000
522 17:51:13.070835 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
523 17:51:13.073784 Processing 13 relocs. Offset value of 0x9a008000
524 17:51:13.080224 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
525 17:51:13.086885 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
526 17:51:13.093329 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
527 17:51:13.096878 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
528 17:51:13.103105 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
529 17:51:13.109931 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
530 17:51:13.116516 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
531 17:51:13.120326 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
532 17:51:13.123587 Clearing SMI status registers
533 17:51:13.126808 SMI_STS: PM1
534 17:51:13.126901 PM1_STS: PWRBTN
535 17:51:13.130163 TCO_STS: SECOND_TO
536 17:51:13.134013 New SMBASE 0x9a000000
537 17:51:13.137134 In relocation handler: CPU 0
538 17:51:13.140176 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
539 17:51:13.143724 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 17:51:13.147104 Relocation complete.
541 17:51:13.150654 New SMBASE 0x99fff800
542 17:51:13.150748 In relocation handler: CPU 2
543 17:51:13.157077 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 17:51:13.160289 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 17:51:13.163683 Relocation complete.
546 17:51:13.163776 New SMBASE 0x99ffe400
547 17:51:13.166951 In relocation handler: CPU 7
548 17:51:13.173977 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
549 17:51:13.176942 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 17:51:13.180256 Relocation complete.
551 17:51:13.180349 New SMBASE 0x99fff000
552 17:51:13.184139 In relocation handler: CPU 4
553 17:51:13.187451 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
554 17:51:13.193926 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 17:51:13.196901 Relocation complete.
556 17:51:13.197018 New SMBASE 0x99fffc00
557 17:51:13.200703 In relocation handler: CPU 1
558 17:51:13.203527 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
559 17:51:13.210437 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 17:51:13.213645 Relocation complete.
561 17:51:13.213767 New SMBASE 0x99ffe800
562 17:51:13.217077 In relocation handler: CPU 6
563 17:51:13.220439 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
564 17:51:13.227107 Writing SMRR. base = 0x9a000006, mask=0xff000800
565 17:51:13.227201 Relocation complete.
566 17:51:13.230406 New SMBASE 0x99fff400
567 17:51:13.233370 In relocation handler: CPU 3
568 17:51:13.237152 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
569 17:51:13.243470 Writing SMRR. base = 0x9a000006, mask=0xff000800
570 17:51:13.243564 Relocation complete.
571 17:51:13.246748 New SMBASE 0x99ffec00
572 17:51:13.250619 In relocation handler: CPU 5
573 17:51:13.253581 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
574 17:51:13.260148 Writing SMRR. base = 0x9a000006, mask=0xff000800
575 17:51:13.260243 Relocation complete.
576 17:51:13.263682 Initializing CPU #0
577 17:51:13.266675 CPU: vendor Intel device 806ec
578 17:51:13.270163 CPU: family 06, model 8e, stepping 0c
579 17:51:13.273609 Clearing out pending MCEs
580 17:51:13.276655 Setting up local APIC...
581 17:51:13.276759 apic_id: 0x00 done.
582 17:51:13.280283 Turbo is available but hidden
583 17:51:13.283173 Turbo is available and visible
584 17:51:13.286680 VMX status: enabled
585 17:51:13.290419 IA32_FEATURE_CONTROL status: locked
586 17:51:13.293834 Skip microcode update
587 17:51:13.293928 CPU #0 initialized
588 17:51:13.296613 Initializing CPU #2
589 17:51:13.296706 Initializing CPU #1
590 17:51:13.299983 Initializing CPU #6
591 17:51:13.303084 CPU: vendor Intel device 806ec
592 17:51:13.306798 CPU: family 06, model 8e, stepping 0c
593 17:51:13.309837 CPU: vendor Intel device 806ec
594 17:51:13.313320 CPU: family 06, model 8e, stepping 0c
595 17:51:13.316593 Clearing out pending MCEs
596 17:51:13.320136 Clearing out pending MCEs
597 17:51:13.323144 Setting up local APIC...
598 17:51:13.323237 CPU: vendor Intel device 806ec
599 17:51:13.330245 CPU: family 06, model 8e, stepping 0c
600 17:51:13.330338 Clearing out pending MCEs
601 17:51:13.333529 Initializing CPU #5
602 17:51:13.336726 Initializing CPU #3
603 17:51:13.339791 CPU: vendor Intel device 806ec
604 17:51:13.343412 CPU: family 06, model 8e, stepping 0c
605 17:51:13.346851 CPU: vendor Intel device 806ec
606 17:51:13.349924 CPU: family 06, model 8e, stepping 0c
607 17:51:13.353552 Clearing out pending MCEs
608 17:51:13.353646 Setting up local APIC...
609 17:51:13.356804 Initializing CPU #7
610 17:51:13.359758 Initializing CPU #4
611 17:51:13.363282 CPU: vendor Intel device 806ec
612 17:51:13.367023 CPU: family 06, model 8e, stepping 0c
613 17:51:13.369893 CPU: vendor Intel device 806ec
614 17:51:13.372829 CPU: family 06, model 8e, stepping 0c
615 17:51:13.376360 Clearing out pending MCEs
616 17:51:13.376454 Clearing out pending MCEs
617 17:51:13.379910 Setting up local APIC...
618 17:51:13.383292 apic_id: 0x05 done.
619 17:51:13.383384 apic_id: 0x04 done.
620 17:51:13.386247 VMX status: enabled
621 17:51:13.389818 VMX status: enabled
622 17:51:13.392860 IA32_FEATURE_CONTROL status: locked
623 17:51:13.396001 IA32_FEATURE_CONTROL status: locked
624 17:51:13.396096 Skip microcode update
625 17:51:13.399357 Skip microcode update
626 17:51:13.402831 Clearing out pending MCEs
627 17:51:13.406189 Setting up local APIC...
628 17:51:13.406284 Setting up local APIC...
629 17:51:13.409585 CPU #1 initialized
630 17:51:13.413252 apic_id: 0x02 done.
631 17:51:13.413346 Setting up local APIC...
632 17:51:13.416261 apic_id: 0x01 done.
633 17:51:13.419605 VMX status: enabled
634 17:51:13.419699 apic_id: 0x03 done.
635 17:51:13.422507 IA32_FEATURE_CONTROL status: locked
636 17:51:13.425972 VMX status: enabled
637 17:51:13.429233 Skip microcode update
638 17:51:13.432862 IA32_FEATURE_CONTROL status: locked
639 17:51:13.432956 CPU #4 initialized
640 17:51:13.436216 Skip microcode update
641 17:51:13.439427 VMX status: enabled
642 17:51:13.439520 CPU #6 initialized
643 17:51:13.442798 CPU #7 initialized
644 17:51:13.446057 IA32_FEATURE_CONTROL status: locked
645 17:51:13.449625 apic_id: 0x06 done.
646 17:51:13.449718 Setting up local APIC...
647 17:51:13.452532 Skip microcode update
648 17:51:13.455637 apic_id: 0x07 done.
649 17:51:13.455767 VMX status: enabled
650 17:51:13.459033 VMX status: enabled
651 17:51:13.462595 IA32_FEATURE_CONTROL status: locked
652 17:51:13.466281 IA32_FEATURE_CONTROL status: locked
653 17:51:13.469246 Skip microcode update
654 17:51:13.469363 Skip microcode update
655 17:51:13.472673 CPU #5 initialized
656 17:51:13.476380 CPU #3 initialized
657 17:51:13.476473 CPU #2 initialized
658 17:51:13.479130 bsp_do_flight_plan done after 457 msecs.
659 17:51:13.482543 CPU: frequency set to 4200 MHz
660 17:51:13.485575 Enabling SMIs.
661 17:51:13.485668 Locking SMM.
662 17:51:13.501856 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
663 17:51:13.505176 CBFS @ c08000 size 3f8000
664 17:51:13.511786 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
665 17:51:13.511908 CBFS: Locating 'vbt.bin'
666 17:51:13.515278 CBFS: Found @ offset 5f5c0 size 499
667 17:51:13.521908 Found a VBT of 4608 bytes after decompression
668 17:51:13.704004 Display FSP Version Info HOB
669 17:51:13.707015 Reference Code - CPU = 9.0.1e.30
670 17:51:13.710711 uCode Version = 0.0.0.ca
671 17:51:13.713815 TXT ACM version = ff.ff.ff.ffff
672 17:51:13.717443 Display FSP Version Info HOB
673 17:51:13.720571 Reference Code - ME = 9.0.1e.30
674 17:51:13.723657 MEBx version = 0.0.0.0
675 17:51:13.727077 ME Firmware Version = Consumer SKU
676 17:51:13.730576 Display FSP Version Info HOB
677 17:51:13.733797 Reference Code - CML PCH = 9.0.1e.30
678 17:51:13.737394 PCH-CRID Status = Disabled
679 17:51:13.740214 PCH-CRID Original Value = ff.ff.ff.ffff
680 17:51:13.743863 PCH-CRID New Value = ff.ff.ff.ffff
681 17:51:13.746816 OPROM - RST - RAID = ff.ff.ff.ffff
682 17:51:13.750160 ChipsetInit Base Version = ff.ff.ff.ffff
683 17:51:13.753916 ChipsetInit Oem Version = ff.ff.ff.ffff
684 17:51:13.757161 Display FSP Version Info HOB
685 17:51:13.763679 Reference Code - SA - System Agent = 9.0.1e.30
686 17:51:13.763773 Reference Code - MRC = 0.7.1.6c
687 17:51:13.767333 SA - PCIe Version = 9.0.1e.30
688 17:51:13.770260 SA-CRID Status = Disabled
689 17:51:13.773603 SA-CRID Original Value = 0.0.0.c
690 17:51:13.777004 SA-CRID New Value = 0.0.0.c
691 17:51:13.780420 OPROM - VBIOS = ff.ff.ff.ffff
692 17:51:13.780513 RTC Init
693 17:51:13.787196 Set power on after power failure.
694 17:51:13.787290 Disabling Deep S3
695 17:51:13.790220 Disabling Deep S3
696 17:51:13.790313 Disabling Deep S4
697 17:51:13.793982 Disabling Deep S4
698 17:51:13.794076 Disabling Deep S5
699 17:51:13.796845 Disabling Deep S5
700 17:51:13.803614 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
701 17:51:13.803739 Enumerating buses...
702 17:51:13.810563 Show all devs... Before device enumeration.
703 17:51:13.810657 Root Device: enabled 1
704 17:51:13.813725 CPU_CLUSTER: 0: enabled 1
705 17:51:13.816834 DOMAIN: 0000: enabled 1
706 17:51:13.816927 APIC: 00: enabled 1
707 17:51:13.820278 PCI: 00:00.0: enabled 1
708 17:51:13.823760 PCI: 00:02.0: enabled 1
709 17:51:13.827569 PCI: 00:04.0: enabled 0
710 17:51:13.827662 PCI: 00:05.0: enabled 0
711 17:51:13.830347 PCI: 00:12.0: enabled 1
712 17:51:13.833515 PCI: 00:12.5: enabled 0
713 17:51:13.836671 PCI: 00:12.6: enabled 0
714 17:51:13.836764 PCI: 00:14.0: enabled 1
715 17:51:13.839889 PCI: 00:14.1: enabled 0
716 17:51:13.843296 PCI: 00:14.3: enabled 1
717 17:51:13.846416 PCI: 00:14.5: enabled 0
718 17:51:13.846509 PCI: 00:15.0: enabled 1
719 17:51:13.850012 PCI: 00:15.1: enabled 1
720 17:51:13.853016 PCI: 00:15.2: enabled 0
721 17:51:13.856446 PCI: 00:15.3: enabled 0
722 17:51:13.856539 PCI: 00:16.0: enabled 1
723 17:51:13.859697 PCI: 00:16.1: enabled 0
724 17:51:13.862904 PCI: 00:16.2: enabled 0
725 17:51:13.862998 PCI: 00:16.3: enabled 0
726 17:51:13.866345 PCI: 00:16.4: enabled 0
727 17:51:13.870111 PCI: 00:16.5: enabled 0
728 17:51:13.872943 PCI: 00:17.0: enabled 1
729 17:51:13.873035 PCI: 00:19.0: enabled 1
730 17:51:13.876214 PCI: 00:19.1: enabled 0
731 17:51:13.879630 PCI: 00:19.2: enabled 0
732 17:51:13.882999 PCI: 00:1a.0: enabled 0
733 17:51:13.883091 PCI: 00:1c.0: enabled 0
734 17:51:13.886680 PCI: 00:1c.1: enabled 0
735 17:51:13.889411 PCI: 00:1c.2: enabled 0
736 17:51:13.893119 PCI: 00:1c.3: enabled 0
737 17:51:13.893212 PCI: 00:1c.4: enabled 0
738 17:51:13.896402 PCI: 00:1c.5: enabled 0
739 17:51:13.899415 PCI: 00:1c.6: enabled 0
740 17:51:13.899508 PCI: 00:1c.7: enabled 0
741 17:51:13.902870 PCI: 00:1d.0: enabled 1
742 17:51:13.906172 PCI: 00:1d.1: enabled 0
743 17:51:13.909887 PCI: 00:1d.2: enabled 0
744 17:51:13.909979 PCI: 00:1d.3: enabled 0
745 17:51:13.912580 PCI: 00:1d.4: enabled 0
746 17:51:13.916264 PCI: 00:1d.5: enabled 1
747 17:51:13.919601 PCI: 00:1e.0: enabled 1
748 17:51:13.919694 PCI: 00:1e.1: enabled 0
749 17:51:13.922705 PCI: 00:1e.2: enabled 1
750 17:51:13.926500 PCI: 00:1e.3: enabled 1
751 17:51:13.929487 PCI: 00:1f.0: enabled 1
752 17:51:13.929579 PCI: 00:1f.1: enabled 1
753 17:51:13.932847 PCI: 00:1f.2: enabled 1
754 17:51:13.936416 PCI: 00:1f.3: enabled 1
755 17:51:13.936508 PCI: 00:1f.4: enabled 1
756 17:51:13.939328 PCI: 00:1f.5: enabled 1
757 17:51:13.943061 PCI: 00:1f.6: enabled 0
758 17:51:13.945998 USB0 port 0: enabled 1
759 17:51:13.946090 I2C: 00:15: enabled 1
760 17:51:13.949862 I2C: 00:5d: enabled 1
761 17:51:13.952930 GENERIC: 0.0: enabled 1
762 17:51:13.953021 I2C: 00:1a: enabled 1
763 17:51:13.955947 I2C: 00:38: enabled 1
764 17:51:13.959307 I2C: 00:39: enabled 1
765 17:51:13.959399 I2C: 00:3a: enabled 1
766 17:51:13.962815 I2C: 00:3b: enabled 1
767 17:51:13.966229 PCI: 00:00.0: enabled 1
768 17:51:13.966320 SPI: 00: enabled 1
769 17:51:13.969536 SPI: 01: enabled 1
770 17:51:13.973138 PNP: 0c09.0: enabled 1
771 17:51:13.973228 USB2 port 0: enabled 1
772 17:51:13.976203 USB2 port 1: enabled 1
773 17:51:13.979634 USB2 port 2: enabled 0
774 17:51:13.979726 USB2 port 3: enabled 0
775 17:51:13.982692 USB2 port 5: enabled 0
776 17:51:13.986218 USB2 port 6: enabled 1
777 17:51:13.989435 USB2 port 9: enabled 1
778 17:51:13.989528 USB3 port 0: enabled 1
779 17:51:13.993164 USB3 port 1: enabled 1
780 17:51:13.995903 USB3 port 2: enabled 1
781 17:51:13.996001 USB3 port 3: enabled 1
782 17:51:14.000022 USB3 port 4: enabled 0
783 17:51:14.002786 APIC: 04: enabled 1
784 17:51:14.002879 APIC: 01: enabled 1
785 17:51:14.006405 APIC: 07: enabled 1
786 17:51:14.009549 APIC: 02: enabled 1
787 17:51:14.009642 APIC: 06: enabled 1
788 17:51:14.012695 APIC: 05: enabled 1
789 17:51:14.012789 APIC: 03: enabled 1
790 17:51:14.015870 Compare with tree...
791 17:51:14.019302 Root Device: enabled 1
792 17:51:14.022728 CPU_CLUSTER: 0: enabled 1
793 17:51:14.022822 APIC: 00: enabled 1
794 17:51:14.026084 APIC: 04: enabled 1
795 17:51:14.029792 APIC: 01: enabled 1
796 17:51:14.029886 APIC: 07: enabled 1
797 17:51:14.032619 APIC: 02: enabled 1
798 17:51:14.035962 APIC: 06: enabled 1
799 17:51:14.036065 APIC: 05: enabled 1
800 17:51:14.039564 APIC: 03: enabled 1
801 17:51:14.042536 DOMAIN: 0000: enabled 1
802 17:51:14.042627 PCI: 00:00.0: enabled 1
803 17:51:14.045717 PCI: 00:02.0: enabled 1
804 17:51:14.049160 PCI: 00:04.0: enabled 0
805 17:51:14.052837 PCI: 00:05.0: enabled 0
806 17:51:14.055808 PCI: 00:12.0: enabled 1
807 17:51:14.055903 PCI: 00:12.5: enabled 0
808 17:51:14.059242 PCI: 00:12.6: enabled 0
809 17:51:14.062800 PCI: 00:14.0: enabled 1
810 17:51:14.065686 USB0 port 0: enabled 1
811 17:51:14.069377 USB2 port 0: enabled 1
812 17:51:14.069468 USB2 port 1: enabled 1
813 17:51:14.072706 USB2 port 2: enabled 0
814 17:51:14.075806 USB2 port 3: enabled 0
815 17:51:14.078892 USB2 port 5: enabled 0
816 17:51:14.082531 USB2 port 6: enabled 1
817 17:51:14.085620 USB2 port 9: enabled 1
818 17:51:14.085711 USB3 port 0: enabled 1
819 17:51:14.089111 USB3 port 1: enabled 1
820 17:51:14.092451 USB3 port 2: enabled 1
821 17:51:14.095869 USB3 port 3: enabled 1
822 17:51:14.099051 USB3 port 4: enabled 0
823 17:51:14.099169 PCI: 00:14.1: enabled 0
824 17:51:14.102261 PCI: 00:14.3: enabled 1
825 17:51:14.105954 PCI: 00:14.5: enabled 0
826 17:51:14.108921 PCI: 00:15.0: enabled 1
827 17:51:14.112624 I2C: 00:15: enabled 1
828 17:51:14.112703 PCI: 00:15.1: enabled 1
829 17:51:14.116005 I2C: 00:5d: enabled 1
830 17:51:14.118905 GENERIC: 0.0: enabled 1
831 17:51:14.122353 PCI: 00:15.2: enabled 0
832 17:51:14.125904 PCI: 00:15.3: enabled 0
833 17:51:14.125996 PCI: 00:16.0: enabled 1
834 17:51:14.128723 PCI: 00:16.1: enabled 0
835 17:51:14.132227 PCI: 00:16.2: enabled 0
836 17:51:14.135925 PCI: 00:16.3: enabled 0
837 17:51:14.136022 PCI: 00:16.4: enabled 0
838 17:51:14.139262 PCI: 00:16.5: enabled 0
839 17:51:14.142223 PCI: 00:17.0: enabled 1
840 17:51:14.145539 PCI: 00:19.0: enabled 1
841 17:51:14.148750 I2C: 00:1a: enabled 1
842 17:51:14.148845 I2C: 00:38: enabled 1
843 17:51:14.151970 I2C: 00:39: enabled 1
844 17:51:14.155658 I2C: 00:3a: enabled 1
845 17:51:14.159095 I2C: 00:3b: enabled 1
846 17:51:14.159188 PCI: 00:19.1: enabled 0
847 17:51:14.162125 PCI: 00:19.2: enabled 0
848 17:51:14.165728 PCI: 00:1a.0: enabled 0
849 17:51:14.169287 PCI: 00:1c.0: enabled 0
850 17:51:14.172352 PCI: 00:1c.1: enabled 0
851 17:51:14.172444 PCI: 00:1c.2: enabled 0
852 17:51:14.175399 PCI: 00:1c.3: enabled 0
853 17:51:14.178682 PCI: 00:1c.4: enabled 0
854 17:51:14.182248 PCI: 00:1c.5: enabled 0
855 17:51:14.185153 PCI: 00:1c.6: enabled 0
856 17:51:14.185246 PCI: 00:1c.7: enabled 0
857 17:51:14.188874 PCI: 00:1d.0: enabled 1
858 17:51:14.192139 PCI: 00:1d.1: enabled 0
859 17:51:14.195316 PCI: 00:1d.2: enabled 0
860 17:51:14.198556 PCI: 00:1d.3: enabled 0
861 17:51:14.198649 PCI: 00:1d.4: enabled 0
862 17:51:14.202170 PCI: 00:1d.5: enabled 1
863 17:51:14.205092 PCI: 00:00.0: enabled 1
864 17:51:14.209005 PCI: 00:1e.0: enabled 1
865 17:51:14.212007 PCI: 00:1e.1: enabled 0
866 17:51:14.212101 PCI: 00:1e.2: enabled 1
867 17:51:14.215106 SPI: 00: enabled 1
868 17:51:14.218612 PCI: 00:1e.3: enabled 1
869 17:51:14.218705 SPI: 01: enabled 1
870 17:51:14.222126 PCI: 00:1f.0: enabled 1
871 17:51:14.225545 PNP: 0c09.0: enabled 1
872 17:51:14.228481 PCI: 00:1f.1: enabled 1
873 17:51:14.231849 PCI: 00:1f.2: enabled 1
874 17:51:14.231942 PCI: 00:1f.3: enabled 1
875 17:51:14.234910 PCI: 00:1f.4: enabled 1
876 17:51:14.238420 PCI: 00:1f.5: enabled 1
877 17:51:14.241846 PCI: 00:1f.6: enabled 0
878 17:51:14.245166 Root Device scanning...
879 17:51:14.248473 scan_static_bus for Root Device
880 17:51:14.248566 CPU_CLUSTER: 0 enabled
881 17:51:14.251611 DOMAIN: 0000 enabled
882 17:51:14.254635 DOMAIN: 0000 scanning...
883 17:51:14.257987 PCI: pci_scan_bus for bus 00
884 17:51:14.261550 PCI: 00:00.0 [8086/0000] ops
885 17:51:14.264681 PCI: 00:00.0 [8086/9b61] enabled
886 17:51:14.268047 PCI: 00:02.0 [8086/0000] bus ops
887 17:51:14.271255 PCI: 00:02.0 [8086/9b41] enabled
888 17:51:14.275055 PCI: 00:04.0 [8086/1903] disabled
889 17:51:14.278382 PCI: 00:08.0 [8086/1911] enabled
890 17:51:14.281274 PCI: 00:12.0 [8086/02f9] enabled
891 17:51:14.284821 PCI: 00:14.0 [8086/0000] bus ops
892 17:51:14.288462 PCI: 00:14.0 [8086/02ed] enabled
893 17:51:14.291496 PCI: 00:14.2 [8086/02ef] enabled
894 17:51:14.295081 PCI: 00:14.3 [8086/02f0] enabled
895 17:51:14.298016 PCI: 00:15.0 [8086/0000] bus ops
896 17:51:14.301465 PCI: 00:15.0 [8086/02e8] enabled
897 17:51:14.304504 PCI: 00:15.1 [8086/0000] bus ops
898 17:51:14.307944 PCI: 00:15.1 [8086/02e9] enabled
899 17:51:14.311641 PCI: 00:16.0 [8086/0000] ops
900 17:51:14.314673 PCI: 00:16.0 [8086/02e0] enabled
901 17:51:14.314766 PCI: 00:17.0 [8086/0000] ops
902 17:51:14.317990 PCI: 00:17.0 [8086/02d3] enabled
903 17:51:14.321140 PCI: 00:19.0 [8086/0000] bus ops
904 17:51:14.324932 PCI: 00:19.0 [8086/02c5] enabled
905 17:51:14.328244 PCI: 00:1d.0 [8086/0000] bus ops
906 17:51:14.331427 PCI: 00:1d.0 [8086/02b0] enabled
907 17:51:14.337953 PCI: Static device PCI: 00:1d.5 not found, disabling it.
908 17:51:14.341437 PCI: 00:1e.0 [8086/0000] ops
909 17:51:14.344778 PCI: 00:1e.0 [8086/02a8] enabled
910 17:51:14.347778 PCI: 00:1e.2 [8086/0000] bus ops
911 17:51:14.351591 PCI: 00:1e.2 [8086/02aa] enabled
912 17:51:14.354756 PCI: 00:1e.3 [8086/0000] bus ops
913 17:51:14.358095 PCI: 00:1e.3 [8086/02ab] enabled
914 17:51:14.361036 PCI: 00:1f.0 [8086/0000] bus ops
915 17:51:14.364437 PCI: 00:1f.0 [8086/0284] enabled
916 17:51:14.371096 PCI: Static device PCI: 00:1f.1 not found, disabling it.
917 17:51:14.374871 PCI: Static device PCI: 00:1f.2 not found, disabling it.
918 17:51:14.378288 PCI: 00:1f.3 [8086/0000] bus ops
919 17:51:14.381531 PCI: 00:1f.3 [8086/02c8] enabled
920 17:51:14.384915 PCI: 00:1f.4 [8086/0000] bus ops
921 17:51:14.387810 PCI: 00:1f.4 [8086/02a3] enabled
922 17:51:14.391354 PCI: 00:1f.5 [8086/0000] bus ops
923 17:51:14.394930 PCI: 00:1f.5 [8086/02a4] enabled
924 17:51:14.398039 PCI: Leftover static devices:
925 17:51:14.401600 PCI: 00:05.0
926 17:51:14.401692 PCI: 00:12.5
927 17:51:14.404642 PCI: 00:12.6
928 17:51:14.404734 PCI: 00:14.1
929 17:51:14.404807 PCI: 00:14.5
930 17:51:14.408016 PCI: 00:15.2
931 17:51:14.408107 PCI: 00:15.3
932 17:51:14.411061 PCI: 00:16.1
933 17:51:14.411153 PCI: 00:16.2
934 17:51:14.411225 PCI: 00:16.3
935 17:51:14.414878 PCI: 00:16.4
936 17:51:14.414971 PCI: 00:16.5
937 17:51:14.418077 PCI: 00:19.1
938 17:51:14.418168 PCI: 00:19.2
939 17:51:14.418242 PCI: 00:1a.0
940 17:51:14.421117 PCI: 00:1c.0
941 17:51:14.421209 PCI: 00:1c.1
942 17:51:14.424786 PCI: 00:1c.2
943 17:51:14.424877 PCI: 00:1c.3
944 17:51:14.428160 PCI: 00:1c.4
945 17:51:14.428253 PCI: 00:1c.5
946 17:51:14.428326 PCI: 00:1c.6
947 17:51:14.431396 PCI: 00:1c.7
948 17:51:14.431487 PCI: 00:1d.1
949 17:51:14.434382 PCI: 00:1d.2
950 17:51:14.434473 PCI: 00:1d.3
951 17:51:14.434546 PCI: 00:1d.4
952 17:51:14.437849 PCI: 00:1d.5
953 17:51:14.437940 PCI: 00:1e.1
954 17:51:14.441617 PCI: 00:1f.1
955 17:51:14.441709 PCI: 00:1f.2
956 17:51:14.441782 PCI: 00:1f.6
957 17:51:14.444609 PCI: Check your devicetree.cb.
958 17:51:14.447799 PCI: 00:02.0 scanning...
959 17:51:14.451183 scan_generic_bus for PCI: 00:02.0
960 17:51:14.454715 scan_generic_bus for PCI: 00:02.0 done
961 17:51:14.460961 scan_bus: scanning of bus PCI: 00:02.0 took 10180 usecs
962 17:51:14.464282 PCI: 00:14.0 scanning...
963 17:51:14.467799 scan_static_bus for PCI: 00:14.0
964 17:51:14.470890 USB0 port 0 enabled
965 17:51:14.470982 USB0 port 0 scanning...
966 17:51:14.474211 scan_static_bus for USB0 port 0
967 17:51:14.477792 USB2 port 0 enabled
968 17:51:14.480990 USB2 port 1 enabled
969 17:51:14.481083 USB2 port 2 disabled
970 17:51:14.484226 USB2 port 3 disabled
971 17:51:14.487603 USB2 port 5 disabled
972 17:51:14.487694 USB2 port 6 enabled
973 17:51:14.491117 USB2 port 9 enabled
974 17:51:14.491208 USB3 port 0 enabled
975 17:51:14.494066 USB3 port 1 enabled
976 17:51:14.497844 USB3 port 2 enabled
977 17:51:14.497936 USB3 port 3 enabled
978 17:51:14.500819 USB3 port 4 disabled
979 17:51:14.504466 USB2 port 0 scanning...
980 17:51:14.507661 scan_static_bus for USB2 port 0
981 17:51:14.510631 scan_static_bus for USB2 port 0 done
982 17:51:14.514138 scan_bus: scanning of bus USB2 port 0 took 9701 usecs
983 17:51:14.517708 USB2 port 1 scanning...
984 17:51:14.520784 scan_static_bus for USB2 port 1
985 17:51:14.524452 scan_static_bus for USB2 port 1 done
986 17:51:14.530813 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
987 17:51:14.534351 USB2 port 6 scanning...
988 17:51:14.537721 scan_static_bus for USB2 port 6
989 17:51:14.540706 scan_static_bus for USB2 port 6 done
990 17:51:14.544270 scan_bus: scanning of bus USB2 port 6 took 9699 usecs
991 17:51:14.547786 USB2 port 9 scanning...
992 17:51:14.551164 scan_static_bus for USB2 port 9
993 17:51:14.553948 scan_static_bus for USB2 port 9 done
994 17:51:14.560991 scan_bus: scanning of bus USB2 port 9 took 9707 usecs
995 17:51:14.564407 USB3 port 0 scanning...
996 17:51:14.567188 scan_static_bus for USB3 port 0
997 17:51:14.570666 scan_static_bus for USB3 port 0 done
998 17:51:14.574207 scan_bus: scanning of bus USB3 port 0 took 9707 usecs
999 17:51:14.577238 USB3 port 1 scanning...
1000 17:51:14.580804 scan_static_bus for USB3 port 1
1001 17:51:14.584002 scan_static_bus for USB3 port 1 done
1002 17:51:14.590398 scan_bus: scanning of bus USB3 port 1 took 9700 usecs
1003 17:51:14.594133 USB3 port 2 scanning...
1004 17:51:14.597371 scan_static_bus for USB3 port 2
1005 17:51:14.600526 scan_static_bus for USB3 port 2 done
1006 17:51:14.604470 scan_bus: scanning of bus USB3 port 2 took 9706 usecs
1007 17:51:14.607192 USB3 port 3 scanning...
1008 17:51:14.610939 scan_static_bus for USB3 port 3
1009 17:51:14.613744 scan_static_bus for USB3 port 3 done
1010 17:51:14.620461 scan_bus: scanning of bus USB3 port 3 took 9698 usecs
1011 17:51:14.623943 scan_static_bus for USB0 port 0 done
1012 17:51:14.630466 scan_bus: scanning of bus USB0 port 0 took 155377 usecs
1013 17:51:14.633619 scan_static_bus for PCI: 00:14.0 done
1014 17:51:14.640146 scan_bus: scanning of bus PCI: 00:14.0 took 172997 usecs
1015 17:51:14.640242 PCI: 00:15.0 scanning...
1016 17:51:14.643654 scan_generic_bus for PCI: 00:15.0
1017 17:51:14.650492 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1018 17:51:14.653982 scan_generic_bus for PCI: 00:15.0 done
1019 17:51:14.660564 scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs
1020 17:51:14.660657 PCI: 00:15.1 scanning...
1021 17:51:14.663947 scan_generic_bus for PCI: 00:15.1
1022 17:51:14.670127 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1023 17:51:14.673774 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1024 17:51:14.677085 scan_generic_bus for PCI: 00:15.1 done
1025 17:51:14.683681 scan_bus: scanning of bus PCI: 00:15.1 took 18604 usecs
1026 17:51:14.686806 PCI: 00:19.0 scanning...
1027 17:51:14.690018 scan_generic_bus for PCI: 00:19.0
1028 17:51:14.693255 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1029 17:51:14.696841 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1030 17:51:14.700272 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1031 17:51:14.706765 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1032 17:51:14.710420 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1033 17:51:14.713201 scan_generic_bus for PCI: 00:19.0 done
1034 17:51:14.720058 scan_bus: scanning of bus PCI: 00:19.0 took 30721 usecs
1035 17:51:14.720151 PCI: 00:1d.0 scanning...
1036 17:51:14.726530 do_pci_scan_bridge for PCI: 00:1d.0
1037 17:51:14.726621 PCI: pci_scan_bus for bus 01
1038 17:51:14.730103 PCI: 01:00.0 [1c5c/1327] enabled
1039 17:51:14.737362 Enabling Common Clock Configuration
1040 17:51:14.740110 L1 Sub-State supported from root port 29
1041 17:51:14.743439 L1 Sub-State Support = 0xf
1042 17:51:14.746861 CommonModeRestoreTime = 0x28
1043 17:51:14.750680 Power On Value = 0x16, Power On Scale = 0x0
1044 17:51:14.750772 ASPM: Enabled L1
1045 17:51:14.756900 scan_bus: scanning of bus PCI: 00:1d.0 took 32780 usecs
1046 17:51:14.759843 PCI: 00:1e.2 scanning...
1047 17:51:14.763691 scan_generic_bus for PCI: 00:1e.2
1048 17:51:14.767275 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1049 17:51:14.770580 scan_generic_bus for PCI: 00:1e.2 done
1050 17:51:14.776876 scan_bus: scanning of bus PCI: 00:1e.2 took 13998 usecs
1051 17:51:14.779923 PCI: 00:1e.3 scanning...
1052 17:51:14.783215 scan_generic_bus for PCI: 00:1e.3
1053 17:51:14.786707 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1054 17:51:14.789926 scan_generic_bus for PCI: 00:1e.3 done
1055 17:51:14.796458 scan_bus: scanning of bus PCI: 00:1e.3 took 14004 usecs
1056 17:51:14.800044 PCI: 00:1f.0 scanning...
1057 17:51:14.803594 scan_static_bus for PCI: 00:1f.0
1058 17:51:14.803686 PNP: 0c09.0 enabled
1059 17:51:14.806830 scan_static_bus for PCI: 00:1f.0 done
1060 17:51:14.813404 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1061 17:51:14.817106 PCI: 00:1f.3 scanning...
1062 17:51:14.823256 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1063 17:51:14.823354 PCI: 00:1f.4 scanning...
1064 17:51:14.827390 scan_generic_bus for PCI: 00:1f.4
1065 17:51:14.833389 scan_generic_bus for PCI: 00:1f.4 done
1066 17:51:14.836354 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1067 17:51:14.840011 PCI: 00:1f.5 scanning...
1068 17:51:14.843116 scan_generic_bus for PCI: 00:1f.5
1069 17:51:14.846966 scan_generic_bus for PCI: 00:1f.5 done
1070 17:51:14.853283 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1071 17:51:14.859804 scan_bus: scanning of bus DOMAIN: 0000 took 605060 usecs
1072 17:51:14.862915 scan_static_bus for Root Device done
1073 17:51:14.870259 scan_bus: scanning of bus Root Device took 624937 usecs
1074 17:51:14.870351 done
1075 17:51:14.872998 Chrome EC: UHEPI supported
1076 17:51:14.879956 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1077 17:51:14.886365 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1078 17:51:14.889451 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1079 17:51:14.897169 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1080 17:51:14.900952 SPI flash protection: WPSW=0 SRP0=0
1081 17:51:14.907789 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1082 17:51:14.911029 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 3
1083 17:51:14.913912 found VGA at PCI: 00:02.0
1084 17:51:14.917498 Setting up VGA for PCI: 00:02.0
1085 17:51:14.923707 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1086 17:51:14.927460 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1087 17:51:14.930790 Allocating resources...
1088 17:51:14.933550 Reading resources...
1089 17:51:14.937038 Root Device read_resources bus 0 link: 0
1090 17:51:14.940401 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1091 17:51:14.947323 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1092 17:51:14.950617 DOMAIN: 0000 read_resources bus 0 link: 0
1093 17:51:14.957252 PCI: 00:14.0 read_resources bus 0 link: 0
1094 17:51:14.960545 USB0 port 0 read_resources bus 0 link: 0
1095 17:51:14.969337 USB0 port 0 read_resources bus 0 link: 0 done
1096 17:51:14.972087 PCI: 00:14.0 read_resources bus 0 link: 0 done
1097 17:51:14.979459 PCI: 00:15.0 read_resources bus 1 link: 0
1098 17:51:14.982843 PCI: 00:15.0 read_resources bus 1 link: 0 done
1099 17:51:14.989650 PCI: 00:15.1 read_resources bus 2 link: 0
1100 17:51:14.993084 PCI: 00:15.1 read_resources bus 2 link: 0 done
1101 17:51:15.000111 PCI: 00:19.0 read_resources bus 3 link: 0
1102 17:51:15.006776 PCI: 00:19.0 read_resources bus 3 link: 0 done
1103 17:51:15.010059 PCI: 00:1d.0 read_resources bus 1 link: 0
1104 17:51:15.016778 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1105 17:51:15.020106 PCI: 00:1e.2 read_resources bus 4 link: 0
1106 17:51:15.026791 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1107 17:51:15.029947 PCI: 00:1e.3 read_resources bus 5 link: 0
1108 17:51:15.036867 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1109 17:51:15.039765 PCI: 00:1f.0 read_resources bus 0 link: 0
1110 17:51:15.046618 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1111 17:51:15.053446 DOMAIN: 0000 read_resources bus 0 link: 0 done
1112 17:51:15.056436 Root Device read_resources bus 0 link: 0 done
1113 17:51:15.060076 Done reading resources.
1114 17:51:15.063305 Show resources in subtree (Root Device)...After reading.
1115 17:51:15.070204 Root Device child on link 0 CPU_CLUSTER: 0
1116 17:51:15.073801 CPU_CLUSTER: 0 child on link 0 APIC: 00
1117 17:51:15.073915 APIC: 00
1118 17:51:15.076455 APIC: 04
1119 17:51:15.076538 APIC: 01
1120 17:51:15.079875 APIC: 07
1121 17:51:15.079990 APIC: 02
1122 17:51:15.080073 APIC: 06
1123 17:51:15.083237 APIC: 05
1124 17:51:15.083322 APIC: 03
1125 17:51:15.086754 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1126 17:51:15.096684 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1127 17:51:15.149554 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1128 17:51:15.149887 PCI: 00:00.0
1129 17:51:15.149999 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1130 17:51:15.150122 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1131 17:51:15.150713 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1132 17:51:15.151232 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1133 17:51:15.158960 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1134 17:51:15.165636 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1135 17:51:15.175796 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1136 17:51:15.182477 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1137 17:51:15.191986 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1138 17:51:15.202078 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1139 17:51:15.212101 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1140 17:51:15.222215 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1141 17:51:15.229079 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1142 17:51:15.238577 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1143 17:51:15.248539 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1144 17:51:15.258675 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1145 17:51:15.258800 PCI: 00:02.0
1146 17:51:15.271901 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1147 17:51:15.282196 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1148 17:51:15.288507 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1149 17:51:15.291934 PCI: 00:04.0
1150 17:51:15.292056 PCI: 00:08.0
1151 17:51:15.301916 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1152 17:51:15.305416 PCI: 00:12.0
1153 17:51:15.314930 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 17:51:15.318346 PCI: 00:14.0 child on link 0 USB0 port 0
1155 17:51:15.328645 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1156 17:51:15.331730 USB0 port 0 child on link 0 USB2 port 0
1157 17:51:15.334932 USB2 port 0
1158 17:51:15.335051 USB2 port 1
1159 17:51:15.338036 USB2 port 2
1160 17:51:15.338151 USB2 port 3
1161 17:51:15.341730 USB2 port 5
1162 17:51:15.344713 USB2 port 6
1163 17:51:15.344824 USB2 port 9
1164 17:51:15.348374 USB3 port 0
1165 17:51:15.348488 USB3 port 1
1166 17:51:15.351506 USB3 port 2
1167 17:51:15.351622 USB3 port 3
1168 17:51:15.355212 USB3 port 4
1169 17:51:15.355295 PCI: 00:14.2
1170 17:51:15.364776 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1171 17:51:15.375149 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1172 17:51:15.378126 PCI: 00:14.3
1173 17:51:15.388213 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1174 17:51:15.391770 PCI: 00:15.0 child on link 0 I2C: 01:15
1175 17:51:15.401683 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 17:51:15.401799 I2C: 01:15
1177 17:51:15.408063 PCI: 00:15.1 child on link 0 I2C: 02:5d
1178 17:51:15.418047 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 17:51:15.418162 I2C: 02:5d
1180 17:51:15.421673 GENERIC: 0.0
1181 17:51:15.421787 PCI: 00:16.0
1182 17:51:15.431525 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1183 17:51:15.435058 PCI: 00:17.0
1184 17:51:15.441568 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1185 17:51:15.451233 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1186 17:51:15.461456 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1187 17:51:15.467916 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1188 17:51:15.477973 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1189 17:51:15.484352 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1190 17:51:15.491161 PCI: 00:19.0 child on link 0 I2C: 03:1a
1191 17:51:15.500955 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 17:51:15.501045 I2C: 03:1a
1193 17:51:15.504511 I2C: 03:38
1194 17:51:15.504592 I2C: 03:39
1195 17:51:15.507983 I2C: 03:3a
1196 17:51:15.508072 I2C: 03:3b
1197 17:51:15.510833 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1198 17:51:15.520959 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1199 17:51:15.531224 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1200 17:51:15.541130 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1201 17:51:15.541249 PCI: 01:00.0
1202 17:51:15.550622 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 17:51:15.554161 PCI: 00:1e.0
1204 17:51:15.564028 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1205 17:51:15.574050 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1206 17:51:15.577057 PCI: 00:1e.2 child on link 0 SPI: 00
1207 17:51:15.586936 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 17:51:15.590506 SPI: 00
1209 17:51:15.593970 PCI: 00:1e.3 child on link 0 SPI: 01
1210 17:51:15.603927 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1211 17:51:15.604051 SPI: 01
1212 17:51:15.610143 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1213 17:51:15.616750 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1214 17:51:15.626851 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1215 17:51:15.626972 PNP: 0c09.0
1216 17:51:15.637099 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1217 17:51:15.637189 PCI: 00:1f.3
1218 17:51:15.646774 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1219 17:51:15.659753 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1220 17:51:15.659869 PCI: 00:1f.4
1221 17:51:15.669982 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1222 17:51:15.680167 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1223 17:51:15.680255 PCI: 00:1f.5
1224 17:51:15.689915 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1225 17:51:15.696882 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1226 17:51:15.703815 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1227 17:51:15.710098 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1228 17:51:15.713152 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1229 17:51:15.716711 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1230 17:51:15.719886 PCI: 00:17.0 18 * [0x60 - 0x67] io
1231 17:51:15.723445 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1232 17:51:15.729921 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1233 17:51:15.736365 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1234 17:51:15.747006 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1235 17:51:15.753225 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1236 17:51:15.759827 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1237 17:51:15.763045 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1238 17:51:15.773192 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1239 17:51:15.776283 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1240 17:51:15.782861 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1241 17:51:15.786448 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1242 17:51:15.789591 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1243 17:51:15.796397 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1244 17:51:15.799436 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1245 17:51:15.806094 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1246 17:51:15.810437 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1247 17:51:15.816093 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1248 17:51:15.819272 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1249 17:51:15.826433 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1250 17:51:15.829986 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1251 17:51:15.836484 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1252 17:51:15.839488 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1253 17:51:15.846087 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1254 17:51:15.849180 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1255 17:51:15.856073 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1256 17:51:15.859615 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1257 17:51:15.862573 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1258 17:51:15.869247 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1259 17:51:15.872745 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1260 17:51:15.879147 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1261 17:51:15.882627 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1262 17:51:15.892590 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1263 17:51:15.895605 avoid_fixed_resources: DOMAIN: 0000
1264 17:51:15.902322 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1265 17:51:15.908891 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1266 17:51:15.915916 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1267 17:51:15.922482 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1268 17:51:15.932036 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1269 17:51:15.939086 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1270 17:51:15.945907 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1271 17:51:15.952482 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1272 17:51:15.961948 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1273 17:51:15.969011 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1274 17:51:15.975566 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1275 17:51:15.982188 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1276 17:51:15.985417 Setting resources...
1277 17:51:15.991790 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1278 17:51:15.995245 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1279 17:51:15.998978 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1280 17:51:16.005814 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1281 17:51:16.008834 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1282 17:51:16.015061 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1283 17:51:16.018631 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1284 17:51:16.025556 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1285 17:51:16.035279 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1286 17:51:16.038697 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1287 17:51:16.045102 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1288 17:51:16.048660 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1289 17:51:16.054925 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1290 17:51:16.058378 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1291 17:51:16.065028 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1292 17:51:16.068500 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1293 17:51:16.074946 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1294 17:51:16.078518 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1295 17:51:16.081658 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1296 17:51:16.088190 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1297 17:51:16.091580 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1298 17:51:16.098050 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1299 17:51:16.101655 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1300 17:51:16.108758 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1301 17:51:16.111511 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1302 17:51:16.118097 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1303 17:51:16.121879 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1304 17:51:16.128456 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1305 17:51:16.131921 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1306 17:51:16.138104 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1307 17:51:16.142082 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1308 17:51:16.148256 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1309 17:51:16.154959 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1310 17:51:16.161346 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1311 17:51:16.167987 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1312 17:51:16.174618 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1313 17:51:16.181429 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1314 17:51:16.187777 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1315 17:51:16.191519 Root Device assign_resources, bus 0 link: 0
1316 17:51:16.198444 DOMAIN: 0000 assign_resources, bus 0 link: 0
1317 17:51:16.204910 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1318 17:51:16.214802 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1319 17:51:16.221323 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1320 17:51:16.231376 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1321 17:51:16.238021 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1322 17:51:16.247935 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1323 17:51:16.251525 PCI: 00:14.0 assign_resources, bus 0 link: 0
1324 17:51:16.254599 PCI: 00:14.0 assign_resources, bus 0 link: 0
1325 17:51:16.264811 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1326 17:51:16.271691 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1327 17:51:16.281542 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1328 17:51:16.288341 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1329 17:51:16.295510 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 17:51:16.298816 PCI: 00:15.0 assign_resources, bus 1 link: 0
1331 17:51:16.308328 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1332 17:51:16.311825 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 17:51:16.314671 PCI: 00:15.1 assign_resources, bus 2 link: 0
1334 17:51:16.325161 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1335 17:51:16.331880 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1336 17:51:16.341539 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1337 17:51:16.347898 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1338 17:51:16.355022 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1339 17:51:16.364767 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1340 17:51:16.371241 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1341 17:51:16.377931 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1342 17:51:16.384427 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 17:51:16.387657 PCI: 00:19.0 assign_resources, bus 3 link: 0
1344 17:51:16.398177 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1345 17:51:16.404674 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1346 17:51:16.414530 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1347 17:51:16.417715 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1348 17:51:16.427725 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1349 17:51:16.430778 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1350 17:51:16.441045 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1351 17:51:16.447683 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1352 17:51:16.453899 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 17:51:16.457316 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1354 17:51:16.467257 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1355 17:51:16.470898 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 17:51:16.474104 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1357 17:51:16.480597 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 17:51:16.484276 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1359 17:51:16.490551 LPC: Trying to open IO window from 800 size 1ff
1360 17:51:16.497410 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1361 17:51:16.507398 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1362 17:51:16.513624 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1363 17:51:16.524179 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1364 17:51:16.527419 DOMAIN: 0000 assign_resources, bus 0 link: 0
1365 17:51:16.534315 Root Device assign_resources, bus 0 link: 0
1366 17:51:16.534406 Done setting resources.
1367 17:51:16.540855 Show resources in subtree (Root Device)...After assigning values.
1368 17:51:16.547009 Root Device child on link 0 CPU_CLUSTER: 0
1369 17:51:16.550730 CPU_CLUSTER: 0 child on link 0 APIC: 00
1370 17:51:16.550849 APIC: 00
1371 17:51:16.553515 APIC: 04
1372 17:51:16.553631 APIC: 01
1373 17:51:16.553734 APIC: 07
1374 17:51:16.557164 APIC: 02
1375 17:51:16.557276 APIC: 06
1376 17:51:16.560611 APIC: 05
1377 17:51:16.560694 APIC: 03
1378 17:51:16.563504 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1379 17:51:16.573554 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1380 17:51:16.583764 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1381 17:51:16.586849 PCI: 00:00.0
1382 17:51:16.597211 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1383 17:51:16.606902 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1384 17:51:16.616710 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1385 17:51:16.623558 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1386 17:51:16.633582 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1387 17:51:16.642855 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1388 17:51:16.652905 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1389 17:51:16.662669 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1390 17:51:16.672849 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1391 17:51:16.679561 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1392 17:51:16.689233 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1393 17:51:16.699430 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1394 17:51:16.708988 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1395 17:51:16.718932 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1396 17:51:16.728940 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1397 17:51:16.735341 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1398 17:51:16.738913 PCI: 00:02.0
1399 17:51:16.749155 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1400 17:51:16.758857 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1401 17:51:16.768291 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1402 17:51:16.771988 PCI: 00:04.0
1403 17:51:16.772082 PCI: 00:08.0
1404 17:51:16.781606 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1405 17:51:16.785302 PCI: 00:12.0
1406 17:51:16.795202 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1407 17:51:16.798622 PCI: 00:14.0 child on link 0 USB0 port 0
1408 17:51:16.808404 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1409 17:51:16.814853 USB0 port 0 child on link 0 USB2 port 0
1410 17:51:16.814941 USB2 port 0
1411 17:51:16.818033 USB2 port 1
1412 17:51:16.818120 USB2 port 2
1413 17:51:16.821651 USB2 port 3
1414 17:51:16.821736 USB2 port 5
1415 17:51:16.825040 USB2 port 6
1416 17:51:16.825153 USB2 port 9
1417 17:51:16.827945 USB3 port 0
1418 17:51:16.828052 USB3 port 1
1419 17:51:16.831480 USB3 port 2
1420 17:51:16.831589 USB3 port 3
1421 17:51:16.834581 USB3 port 4
1422 17:51:16.834669 PCI: 00:14.2
1423 17:51:16.848178 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1424 17:51:16.858127 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1425 17:51:16.858253 PCI: 00:14.3
1426 17:51:16.868142 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1427 17:51:16.874409 PCI: 00:15.0 child on link 0 I2C: 01:15
1428 17:51:16.884868 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1429 17:51:16.884966 I2C: 01:15
1430 17:51:16.887835 PCI: 00:15.1 child on link 0 I2C: 02:5d
1431 17:51:16.900779 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1432 17:51:16.900867 I2C: 02:5d
1433 17:51:16.904379 GENERIC: 0.0
1434 17:51:16.904466 PCI: 00:16.0
1435 17:51:16.914074 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1436 17:51:16.917502 PCI: 00:17.0
1437 17:51:16.927385 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1438 17:51:16.937320 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1439 17:51:16.947494 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1440 17:51:16.954180 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1441 17:51:16.963890 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1442 17:51:16.973735 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1443 17:51:16.980497 PCI: 00:19.0 child on link 0 I2C: 03:1a
1444 17:51:16.990499 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1445 17:51:16.990619 I2C: 03:1a
1446 17:51:16.993876 I2C: 03:38
1447 17:51:16.993995 I2C: 03:39
1448 17:51:16.996858 I2C: 03:3a
1449 17:51:16.996971 I2C: 03:3b
1450 17:51:17.000452 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1451 17:51:17.010201 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 17:51:17.020129 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 17:51:17.030180 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 17:51:17.033481 PCI: 01:00.0
1455 17:51:17.043220 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 17:51:17.046270 PCI: 00:1e.0
1457 17:51:17.056825 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 17:51:17.066866 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 17:51:17.069405 PCI: 00:1e.2 child on link 0 SPI: 00
1460 17:51:17.079640 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 17:51:17.082895 SPI: 00
1462 17:51:17.086167 PCI: 00:1e.3 child on link 0 SPI: 01
1463 17:51:17.095933 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 17:51:17.096055 SPI: 01
1465 17:51:17.102925 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 17:51:17.109883 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 17:51:17.119819 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 17:51:17.119933 PNP: 0c09.0
1469 17:51:17.129468 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 17:51:17.132729 PCI: 00:1f.3
1471 17:51:17.142787 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 17:51:17.152780 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 17:51:17.152899 PCI: 00:1f.4
1474 17:51:17.162735 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 17:51:17.172622 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 17:51:17.175587 PCI: 00:1f.5
1477 17:51:17.185835 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1478 17:51:17.189389 Done allocating resources.
1479 17:51:17.191988 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1480 17:51:17.195672 Enabling resources...
1481 17:51:17.202074 PCI: 00:00.0 subsystem <- 8086/9b61
1482 17:51:17.202167 PCI: 00:00.0 cmd <- 06
1483 17:51:17.206052 PCI: 00:02.0 subsystem <- 8086/9b41
1484 17:51:17.209295 PCI: 00:02.0 cmd <- 03
1485 17:51:17.212284 PCI: 00:08.0 cmd <- 06
1486 17:51:17.215707 PCI: 00:12.0 subsystem <- 8086/02f9
1487 17:51:17.219438 PCI: 00:12.0 cmd <- 02
1488 17:51:17.222154 PCI: 00:14.0 subsystem <- 8086/02ed
1489 17:51:17.225423 PCI: 00:14.0 cmd <- 02
1490 17:51:17.225509 PCI: 00:14.2 cmd <- 02
1491 17:51:17.232510 PCI: 00:14.3 subsystem <- 8086/02f0
1492 17:51:17.232628 PCI: 00:14.3 cmd <- 02
1493 17:51:17.235809 PCI: 00:15.0 subsystem <- 8086/02e8
1494 17:51:17.238794 PCI: 00:15.0 cmd <- 02
1495 17:51:17.242454 PCI: 00:15.1 subsystem <- 8086/02e9
1496 17:51:17.246091 PCI: 00:15.1 cmd <- 02
1497 17:51:17.248913 PCI: 00:16.0 subsystem <- 8086/02e0
1498 17:51:17.252266 PCI: 00:16.0 cmd <- 02
1499 17:51:17.255838 PCI: 00:17.0 subsystem <- 8086/02d3
1500 17:51:17.259046 PCI: 00:17.0 cmd <- 03
1501 17:51:17.262079 PCI: 00:19.0 subsystem <- 8086/02c5
1502 17:51:17.265929 PCI: 00:19.0 cmd <- 02
1503 17:51:17.268650 PCI: 00:1d.0 bridge ctrl <- 0013
1504 17:51:17.272083 PCI: 00:1d.0 subsystem <- 8086/02b0
1505 17:51:17.275700 PCI: 00:1d.0 cmd <- 06
1506 17:51:17.278592 PCI: 00:1e.0 subsystem <- 8086/02a8
1507 17:51:17.278715 PCI: 00:1e.0 cmd <- 06
1508 17:51:17.285800 PCI: 00:1e.2 subsystem <- 8086/02aa
1509 17:51:17.285929 PCI: 00:1e.2 cmd <- 06
1510 17:51:17.289253 PCI: 00:1e.3 subsystem <- 8086/02ab
1511 17:51:17.292310 PCI: 00:1e.3 cmd <- 02
1512 17:51:17.295866 PCI: 00:1f.0 subsystem <- 8086/0284
1513 17:51:17.298873 PCI: 00:1f.0 cmd <- 407
1514 17:51:17.302257 PCI: 00:1f.3 subsystem <- 8086/02c8
1515 17:51:17.305800 PCI: 00:1f.3 cmd <- 02
1516 17:51:17.309080 PCI: 00:1f.4 subsystem <- 8086/02a3
1517 17:51:17.312618 PCI: 00:1f.4 cmd <- 03
1518 17:51:17.315729 PCI: 00:1f.5 subsystem <- 8086/02a4
1519 17:51:17.318948 PCI: 00:1f.5 cmd <- 406
1520 17:51:17.327141 PCI: 01:00.0 cmd <- 02
1521 17:51:17.332488 done.
1522 17:51:17.342703 ME: Version: 14.0.39.1367
1523 17:51:17.349622 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1524 17:51:17.353037 Initializing devices...
1525 17:51:17.353149 Root Device init ...
1526 17:51:17.359801 Chrome EC: Set SMI mask to 0x0000000000000000
1527 17:51:17.362534 Chrome EC: clear events_b mask to 0x0000000000000000
1528 17:51:17.369246 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1529 17:51:17.375911 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1530 17:51:17.382777 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1531 17:51:17.386360 Chrome EC: Set WAKE mask to 0x0000000000000000
1532 17:51:17.389336 Root Device init finished in 35271 usecs
1533 17:51:17.392870 CPU_CLUSTER: 0 init ...
1534 17:51:17.399397 CPU_CLUSTER: 0 init finished in 2447 usecs
1535 17:51:17.403522 PCI: 00:00.0 init ...
1536 17:51:17.407074 CPU TDP: 15 Watts
1537 17:51:17.410671 CPU PL2 = 64 Watts
1538 17:51:17.413394 PCI: 00:00.0 init finished in 7081 usecs
1539 17:51:17.417020 PCI: 00:02.0 init ...
1540 17:51:17.419901 PCI: 00:02.0 init finished in 2243 usecs
1541 17:51:17.423251 PCI: 00:08.0 init ...
1542 17:51:17.426656 PCI: 00:08.0 init finished in 2251 usecs
1543 17:51:17.430329 PCI: 00:12.0 init ...
1544 17:51:17.433276 PCI: 00:12.0 init finished in 2252 usecs
1545 17:51:17.436714 PCI: 00:14.0 init ...
1546 17:51:17.440325 PCI: 00:14.0 init finished in 2252 usecs
1547 17:51:17.443494 PCI: 00:14.2 init ...
1548 17:51:17.446634 PCI: 00:14.2 init finished in 2242 usecs
1549 17:51:17.449975 PCI: 00:14.3 init ...
1550 17:51:17.453159 PCI: 00:14.3 init finished in 2261 usecs
1551 17:51:17.456654 PCI: 00:15.0 init ...
1552 17:51:17.459711 DW I2C bus 0 at 0xd121f000 (400 KHz)
1553 17:51:17.463204 PCI: 00:15.0 init finished in 5960 usecs
1554 17:51:17.467081 PCI: 00:15.1 init ...
1555 17:51:17.469688 DW I2C bus 1 at 0xd1220000 (400 KHz)
1556 17:51:17.472988 PCI: 00:15.1 init finished in 5976 usecs
1557 17:51:17.476914 PCI: 00:16.0 init ...
1558 17:51:17.479783 PCI: 00:16.0 init finished in 2251 usecs
1559 17:51:17.483946 PCI: 00:19.0 init ...
1560 17:51:17.487164 DW I2C bus 4 at 0xd1222000 (400 KHz)
1561 17:51:17.494004 PCI: 00:19.0 init finished in 5976 usecs
1562 17:51:17.494114 PCI: 00:1d.0 init ...
1563 17:51:17.496965 Initializing PCH PCIe bridge.
1564 17:51:17.500570 PCI: 00:1d.0 init finished in 5284 usecs
1565 17:51:17.505507 PCI: 00:1f.0 init ...
1566 17:51:17.509003 IOAPIC: Initializing IOAPIC at 0xfec00000
1567 17:51:17.515167 IOAPIC: Bootstrap Processor Local APIC = 0x00
1568 17:51:17.515255 IOAPIC: ID = 0x02
1569 17:51:17.518688 IOAPIC: Dumping registers
1570 17:51:17.522171 reg 0x0000: 0x02000000
1571 17:51:17.525331 reg 0x0001: 0x00770020
1572 17:51:17.525431 reg 0x0002: 0x00000000
1573 17:51:17.531974 PCI: 00:1f.0 init finished in 23550 usecs
1574 17:51:17.535498 PCI: 00:1f.4 init ...
1575 17:51:17.538775 PCI: 00:1f.4 init finished in 2260 usecs
1576 17:51:17.549507 PCI: 01:00.0 init ...
1577 17:51:17.552900 PCI: 01:00.0 init finished in 2243 usecs
1578 17:51:17.557425 PNP: 0c09.0 init ...
1579 17:51:17.560295 Google Chrome EC uptime: 11.060 seconds
1580 17:51:17.567160 Google Chrome AP resets since EC boot: 0
1581 17:51:17.570246 Google Chrome most recent AP reset causes:
1582 17:51:17.577230 Google Chrome EC reset flags at last EC boot: reset-pin
1583 17:51:17.580194 PNP: 0c09.0 init finished in 20564 usecs
1584 17:51:17.583449 Devices initialized
1585 17:51:17.583560 Show all devs... After init.
1586 17:51:17.586980 Root Device: enabled 1
1587 17:51:17.590383 CPU_CLUSTER: 0: enabled 1
1588 17:51:17.593406 DOMAIN: 0000: enabled 1
1589 17:51:17.593515 APIC: 00: enabled 1
1590 17:51:17.596882 PCI: 00:00.0: enabled 1
1591 17:51:17.600234 PCI: 00:02.0: enabled 1
1592 17:51:17.603445 PCI: 00:04.0: enabled 0
1593 17:51:17.603553 PCI: 00:05.0: enabled 0
1594 17:51:17.607022 PCI: 00:12.0: enabled 1
1595 17:51:17.609751 PCI: 00:12.5: enabled 0
1596 17:51:17.613505 PCI: 00:12.6: enabled 0
1597 17:51:17.613594 PCI: 00:14.0: enabled 1
1598 17:51:17.617049 PCI: 00:14.1: enabled 0
1599 17:51:17.619910 PCI: 00:14.3: enabled 1
1600 17:51:17.620008 PCI: 00:14.5: enabled 0
1601 17:51:17.623300 PCI: 00:15.0: enabled 1
1602 17:51:17.627016 PCI: 00:15.1: enabled 1
1603 17:51:17.629929 PCI: 00:15.2: enabled 0
1604 17:51:17.630017 PCI: 00:15.3: enabled 0
1605 17:51:17.633271 PCI: 00:16.0: enabled 1
1606 17:51:17.636258 PCI: 00:16.1: enabled 0
1607 17:51:17.639951 PCI: 00:16.2: enabled 0
1608 17:51:17.640064 PCI: 00:16.3: enabled 0
1609 17:51:17.643320 PCI: 00:16.4: enabled 0
1610 17:51:17.646193 PCI: 00:16.5: enabled 0
1611 17:51:17.649510 PCI: 00:17.0: enabled 1
1612 17:51:17.649599 PCI: 00:19.0: enabled 1
1613 17:51:17.653231 PCI: 00:19.1: enabled 0
1614 17:51:17.656286 PCI: 00:19.2: enabled 0
1615 17:51:17.656375 PCI: 00:1a.0: enabled 0
1616 17:51:17.659730 PCI: 00:1c.0: enabled 0
1617 17:51:17.663188 PCI: 00:1c.1: enabled 0
1618 17:51:17.666355 PCI: 00:1c.2: enabled 0
1619 17:51:17.666475 PCI: 00:1c.3: enabled 0
1620 17:51:17.669245 PCI: 00:1c.4: enabled 0
1621 17:51:17.672671 PCI: 00:1c.5: enabled 0
1622 17:51:17.676195 PCI: 00:1c.6: enabled 0
1623 17:51:17.676301 PCI: 00:1c.7: enabled 0
1624 17:51:17.679525 PCI: 00:1d.0: enabled 1
1625 17:51:17.682699 PCI: 00:1d.1: enabled 0
1626 17:51:17.686253 PCI: 00:1d.2: enabled 0
1627 17:51:17.686342 PCI: 00:1d.3: enabled 0
1628 17:51:17.689346 PCI: 00:1d.4: enabled 0
1629 17:51:17.692607 PCI: 00:1d.5: enabled 0
1630 17:51:17.696201 PCI: 00:1e.0: enabled 1
1631 17:51:17.696290 PCI: 00:1e.1: enabled 0
1632 17:51:17.699628 PCI: 00:1e.2: enabled 1
1633 17:51:17.702862 PCI: 00:1e.3: enabled 1
1634 17:51:17.702951 PCI: 00:1f.0: enabled 1
1635 17:51:17.706156 PCI: 00:1f.1: enabled 0
1636 17:51:17.709133 PCI: 00:1f.2: enabled 0
1637 17:51:17.712825 PCI: 00:1f.3: enabled 1
1638 17:51:17.712914 PCI: 00:1f.4: enabled 1
1639 17:51:17.715636 PCI: 00:1f.5: enabled 1
1640 17:51:17.719201 PCI: 00:1f.6: enabled 0
1641 17:51:17.722263 USB0 port 0: enabled 1
1642 17:51:17.722351 I2C: 01:15: enabled 1
1643 17:51:17.726175 I2C: 02:5d: enabled 1
1644 17:51:17.728808 GENERIC: 0.0: enabled 1
1645 17:51:17.728897 I2C: 03:1a: enabled 1
1646 17:51:17.732321 I2C: 03:38: enabled 1
1647 17:51:17.735831 I2C: 03:39: enabled 1
1648 17:51:17.735920 I2C: 03:3a: enabled 1
1649 17:51:17.739242 I2C: 03:3b: enabled 1
1650 17:51:17.742192 PCI: 00:00.0: enabled 1
1651 17:51:17.742281 SPI: 00: enabled 1
1652 17:51:17.745870 SPI: 01: enabled 1
1653 17:51:17.749068 PNP: 0c09.0: enabled 1
1654 17:51:17.749157 USB2 port 0: enabled 1
1655 17:51:17.751970 USB2 port 1: enabled 1
1656 17:51:17.755595 USB2 port 2: enabled 0
1657 17:51:17.759125 USB2 port 3: enabled 0
1658 17:51:17.759215 USB2 port 5: enabled 0
1659 17:51:17.762263 USB2 port 6: enabled 1
1660 17:51:17.765416 USB2 port 9: enabled 1
1661 17:51:17.765505 USB3 port 0: enabled 1
1662 17:51:17.768792 USB3 port 1: enabled 1
1663 17:51:17.772198 USB3 port 2: enabled 1
1664 17:51:17.772288 USB3 port 3: enabled 1
1665 17:51:17.775179 USB3 port 4: enabled 0
1666 17:51:17.778829 APIC: 04: enabled 1
1667 17:51:17.778919 APIC: 01: enabled 1
1668 17:51:17.781738 APIC: 07: enabled 1
1669 17:51:17.785047 APIC: 02: enabled 1
1670 17:51:17.785137 APIC: 06: enabled 1
1671 17:51:17.788819 APIC: 05: enabled 1
1672 17:51:17.788909 APIC: 03: enabled 1
1673 17:51:17.791710 PCI: 00:08.0: enabled 1
1674 17:51:17.795065 PCI: 00:14.2: enabled 1
1675 17:51:17.798261 PCI: 01:00.0: enabled 1
1676 17:51:17.802365 Disabling ACPI via APMC:
1677 17:51:17.802454 done.
1678 17:51:17.808878 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1679 17:51:17.812012 ELOG: NV offset 0xaf0000 size 0x4000
1680 17:51:17.818366 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1681 17:51:17.825289 ELOG: Event(17) added with size 13 at 2023-10-20 17:50:55 UTC
1682 17:51:17.831828 ELOG: Event(92) added with size 9 at 2023-10-20 17:50:55 UTC
1683 17:51:17.838360 ELOG: Event(93) added with size 9 at 2023-10-20 17:50:55 UTC
1684 17:51:17.845215 ELOG: Event(9A) added with size 9 at 2023-10-20 17:50:55 UTC
1685 17:51:17.851581 ELOG: Event(9E) added with size 10 at 2023-10-20 17:50:55 UTC
1686 17:51:17.858547 ELOG: Event(9F) added with size 14 at 2023-10-20 17:50:55 UTC
1687 17:51:17.861690 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1688 17:51:17.869247 ELOG: Event(A1) added with size 10 at 2023-10-20 17:50:55 UTC
1689 17:51:17.879027 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1690 17:51:17.885709 ELOG: Event(A0) added with size 9 at 2023-10-20 17:50:55 UTC
1691 17:51:17.888756 elog_add_boot_reason: Logged dev mode boot
1692 17:51:17.888845 Finalize devices...
1693 17:51:17.892495 PCI: 00:17.0 final
1694 17:51:17.895557 Devices finalized
1695 17:51:17.898522 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1696 17:51:17.905684 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1697 17:51:17.908948 ME: HFSTS1 : 0x90000245
1698 17:51:17.912140 ME: HFSTS2 : 0x3B850126
1699 17:51:17.918764 ME: HFSTS3 : 0x00000020
1700 17:51:17.921857 ME: HFSTS4 : 0x00004800
1701 17:51:17.925276 ME: HFSTS5 : 0x00000000
1702 17:51:17.928754 ME: HFSTS6 : 0x40400006
1703 17:51:17.932191 ME: Manufacturing Mode : NO
1704 17:51:17.935279 ME: FW Partition Table : OK
1705 17:51:17.939021 ME: Bringup Loader Failure : NO
1706 17:51:17.941831 ME: Firmware Init Complete : YES
1707 17:51:17.945322 ME: Boot Options Present : NO
1708 17:51:17.948938 ME: Update In Progress : NO
1709 17:51:17.951655 ME: D0i3 Support : YES
1710 17:51:17.955175 ME: Low Power State Enabled : NO
1711 17:51:17.958536 ME: CPU Replaced : NO
1712 17:51:17.961608 ME: CPU Replacement Valid : YES
1713 17:51:17.965056 ME: Current Working State : 5
1714 17:51:17.968012 ME: Current Operation State : 1
1715 17:51:17.971747 ME: Current Operation Mode : 0
1716 17:51:17.974933 ME: Error Code : 0
1717 17:51:17.977921 ME: CPU Debug Disabled : YES
1718 17:51:17.981661 ME: TXT Support : NO
1719 17:51:17.988110 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1720 17:51:17.991671 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1721 17:51:17.994646 CBFS @ c08000 size 3f8000
1722 17:51:18.001168 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1723 17:51:18.004577 CBFS: Locating 'fallback/dsdt.aml'
1724 17:51:18.008072 CBFS: Found @ offset 10bb80 size 3fa5
1725 17:51:18.014702 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 17:51:18.017845 CBFS @ c08000 size 3f8000
1727 17:51:18.021212 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 17:51:18.024703 CBFS: Locating 'fallback/slic'
1729 17:51:18.029188 CBFS: 'fallback/slic' not found.
1730 17:51:18.036023 ACPI: Writing ACPI tables at 99b3e000.
1731 17:51:18.036116 ACPI: * FACS
1732 17:51:18.039533 ACPI: * DSDT
1733 17:51:18.042802 Ramoops buffer: 0x100000@0x99a3d000.
1734 17:51:18.046188 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1735 17:51:18.052459 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1736 17:51:18.055975 Google Chrome EC: version:
1737 17:51:18.059598 ro: helios_v2.0.2659-56403530b
1738 17:51:18.062352 rw: helios_v2.0.2849-c41de27e7d
1739 17:51:18.062442 running image: 1
1740 17:51:18.066436 ACPI: * FADT
1741 17:51:18.066552 SCI is IRQ9
1742 17:51:18.073209 ACPI: added table 1/32, length now 40
1743 17:51:18.073302 ACPI: * SSDT
1744 17:51:18.076792 Found 1 CPU(s) with 8 core(s) each.
1745 17:51:18.079949 Error: Could not locate 'wifi_sar' in VPD.
1746 17:51:18.086681 Checking CBFS for default SAR values
1747 17:51:18.089850 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1748 17:51:18.092979 CBFS @ c08000 size 3f8000
1749 17:51:18.099449 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1750 17:51:18.103013 CBFS: Locating 'wifi_sar_defaults.hex'
1751 17:51:18.106437 CBFS: Found @ offset 5fac0 size 77
1752 17:51:18.109821 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1753 17:51:18.116600 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1754 17:51:18.119724 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1755 17:51:18.125971 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1756 17:51:18.129401 failed to find key in VPD: dsm_calib_r0_0
1757 17:51:18.139215 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1758 17:51:18.142397 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1759 17:51:18.146096 failed to find key in VPD: dsm_calib_r0_1
1760 17:51:18.155642 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1761 17:51:18.162678 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1762 17:51:18.166101 failed to find key in VPD: dsm_calib_r0_2
1763 17:51:18.175534 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1764 17:51:18.179276 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1765 17:51:18.185573 failed to find key in VPD: dsm_calib_r0_3
1766 17:51:18.191960 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1767 17:51:18.198518 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1768 17:51:18.201986 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1769 17:51:18.208804 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1770 17:51:18.212094 EC returned error result code 1
1771 17:51:18.216280 EC returned error result code 1
1772 17:51:18.218962 EC returned error result code 1
1773 17:51:18.222784 PS2K: Bad resp from EC. Vivaldi disabled!
1774 17:51:18.229124 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1775 17:51:18.235576 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1776 17:51:18.239052 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1777 17:51:18.245377 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1778 17:51:18.249018 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1779 17:51:18.255557 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1780 17:51:18.262136 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1781 17:51:18.268844 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1782 17:51:18.272243 ACPI: added table 2/32, length now 44
1783 17:51:18.272335 ACPI: * MCFG
1784 17:51:18.278477 ACPI: added table 3/32, length now 48
1785 17:51:18.278568 ACPI: * TPM2
1786 17:51:18.281821 TPM2 log created at 99a2d000
1787 17:51:18.285467 ACPI: added table 4/32, length now 52
1788 17:51:18.288766 ACPI: * MADT
1789 17:51:18.288857 SCI is IRQ9
1790 17:51:18.291868 ACPI: added table 5/32, length now 56
1791 17:51:18.295253 current = 99b43ac0
1792 17:51:18.295344 ACPI: * DMAR
1793 17:51:18.298909 ACPI: added table 6/32, length now 60
1794 17:51:18.301912 ACPI: * IGD OpRegion
1795 17:51:18.305337 GMA: Found VBT in CBFS
1796 17:51:18.308578 GMA: Found valid VBT in CBFS
1797 17:51:18.311790 ACPI: added table 7/32, length now 64
1798 17:51:18.311881 ACPI: * HPET
1799 17:51:18.314732 ACPI: added table 8/32, length now 68
1800 17:51:18.318261 ACPI: done.
1801 17:51:18.321563 ACPI tables: 31744 bytes.
1802 17:51:18.324791 smbios_write_tables: 99a2c000
1803 17:51:18.328167 EC returned error result code 3
1804 17:51:18.331577 Couldn't obtain OEM name from CBI
1805 17:51:18.334864 Create SMBIOS type 17
1806 17:51:18.334955 PCI: 00:00.0 (Intel Cannonlake)
1807 17:51:18.338551 PCI: 00:14.3 (Intel WiFi)
1808 17:51:18.341501 SMBIOS tables: 939 bytes.
1809 17:51:18.344750 Writing table forward entry at 0x00000500
1810 17:51:18.351606 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1811 17:51:18.354978 Writing coreboot table at 0x99b62000
1812 17:51:18.361542 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1813 17:51:18.365285 1. 0000000000001000-000000000009ffff: RAM
1814 17:51:18.371431 2. 00000000000a0000-00000000000fffff: RESERVED
1815 17:51:18.374519 3. 0000000000100000-0000000099a2bfff: RAM
1816 17:51:18.381365 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1817 17:51:18.384326 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1818 17:51:18.391400 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1819 17:51:18.397868 7. 000000009a000000-000000009f7fffff: RESERVED
1820 17:51:18.401102 8. 00000000e0000000-00000000efffffff: RESERVED
1821 17:51:18.404361 9. 00000000fc000000-00000000fc000fff: RESERVED
1822 17:51:18.410910 10. 00000000fe000000-00000000fe00ffff: RESERVED
1823 17:51:18.414341 11. 00000000fed10000-00000000fed17fff: RESERVED
1824 17:51:18.420837 12. 00000000fed80000-00000000fed83fff: RESERVED
1825 17:51:18.424161 13. 00000000fed90000-00000000fed91fff: RESERVED
1826 17:51:18.430726 14. 00000000feda0000-00000000feda1fff: RESERVED
1827 17:51:18.433939 15. 0000000100000000-000000045e7fffff: RAM
1828 17:51:18.437435 Graphics framebuffer located at 0xc0000000
1829 17:51:18.440747 Passing 5 GPIOs to payload:
1830 17:51:18.447186 NAME | PORT | POLARITY | VALUE
1831 17:51:18.450853 write protect | undefined | high | low
1832 17:51:18.457448 lid | undefined | high | high
1833 17:51:18.460747 power | undefined | high | low
1834 17:51:18.467292 oprom | undefined | high | low
1835 17:51:18.474138 EC in RW | 0x000000cb | high | low
1836 17:51:18.474232 Board ID: 4
1837 17:51:18.481082 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1838 17:51:18.481175 CBFS @ c08000 size 3f8000
1839 17:51:18.487223 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1840 17:51:18.493528 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1841 17:51:18.497194 coreboot table: 1492 bytes.
1842 17:51:18.500853 IMD ROOT 0. 99fff000 00001000
1843 17:51:18.503546 IMD SMALL 1. 99ffe000 00001000
1844 17:51:18.506955 FSP MEMORY 2. 99c4e000 003b0000
1845 17:51:18.510604 CONSOLE 3. 99c2e000 00020000
1846 17:51:18.513765 FMAP 4. 99c2d000 0000054e
1847 17:51:18.517627 TIME STAMP 5. 99c2c000 00000910
1848 17:51:18.520465 VBOOT WORK 6. 99c18000 00014000
1849 17:51:18.523868 MRC DATA 7. 99c16000 00001958
1850 17:51:18.526881 ROMSTG STCK 8. 99c15000 00001000
1851 17:51:18.530487 AFTER CAR 9. 99c0b000 0000a000
1852 17:51:18.533917 RAMSTAGE 10. 99baf000 0005c000
1853 17:51:18.536946 REFCODE 11. 99b7a000 00035000
1854 17:51:18.540038 SMM BACKUP 12. 99b6a000 00010000
1855 17:51:18.543624 COREBOOT 13. 99b62000 00008000
1856 17:51:18.547418 ACPI 14. 99b3e000 00024000
1857 17:51:18.550231 ACPI GNVS 15. 99b3d000 00001000
1858 17:51:18.553727 RAMOOPS 16. 99a3d000 00100000
1859 17:51:18.557286 TPM2 TCGLOG17. 99a2d000 00010000
1860 17:51:18.560509 SMBIOS 18. 99a2c000 00000800
1861 17:51:18.560599 IMD small region:
1862 17:51:18.563410 IMD ROOT 0. 99ffec00 00000400
1863 17:51:18.566935 FSP RUNTIME 1. 99ffebe0 00000004
1864 17:51:18.573474 EC HOSTEVENT 2. 99ffebc0 00000008
1865 17:51:18.576848 POWER STATE 3. 99ffeb80 00000040
1866 17:51:18.580170 ROMSTAGE 4. 99ffeb60 00000004
1867 17:51:18.583540 MEM INFO 5. 99ffe9a0 000001b9
1868 17:51:18.587159 VPD 6. 99ffe920 0000006c
1869 17:51:18.590476 MTRR: Physical address space:
1870 17:51:18.597101 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1871 17:51:18.599941 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1872 17:51:18.606808 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1873 17:51:18.613531 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1874 17:51:18.620174 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1875 17:51:18.626927 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1876 17:51:18.633724 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1877 17:51:18.636652 MTRR: Fixed MSR 0x250 0x0606060606060606
1878 17:51:18.639917 MTRR: Fixed MSR 0x258 0x0606060606060606
1879 17:51:18.646576 MTRR: Fixed MSR 0x259 0x0000000000000000
1880 17:51:18.650291 MTRR: Fixed MSR 0x268 0x0606060606060606
1881 17:51:18.653447 MTRR: Fixed MSR 0x269 0x0606060606060606
1882 17:51:18.656337 MTRR: Fixed MSR 0x26a 0x0606060606060606
1883 17:51:18.663162 MTRR: Fixed MSR 0x26b 0x0606060606060606
1884 17:51:18.666781 MTRR: Fixed MSR 0x26c 0x0606060606060606
1885 17:51:18.669715 MTRR: Fixed MSR 0x26d 0x0606060606060606
1886 17:51:18.672977 MTRR: Fixed MSR 0x26e 0x0606060606060606
1887 17:51:18.676290 MTRR: Fixed MSR 0x26f 0x0606060606060606
1888 17:51:18.680317 call enable_fixed_mtrr()
1889 17:51:18.683940 CPU physical address size: 39 bits
1890 17:51:18.690056 MTRR: default type WB/UC MTRR counts: 6/8.
1891 17:51:18.693878 MTRR: WB selected as default type.
1892 17:51:18.699935 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1893 17:51:18.703751 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1894 17:51:18.710279 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1895 17:51:18.716957 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1896 17:51:18.723690 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1897 17:51:18.729813 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1898 17:51:18.733349 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 17:51:18.739813 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 17:51:18.743307 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 17:51:18.746791 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 17:51:18.749663 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 17:51:18.756664 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 17:51:18.759561 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 17:51:18.763014 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 17:51:18.766377 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 17:51:18.773182 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 17:51:18.776111 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 17:51:18.776202
1910 17:51:18.776276 MTRR check
1911 17:51:18.779933 Fixed MTRRs : Enabled
1912 17:51:18.783500 Variable MTRRs: Enabled
1913 17:51:18.783591
1914 17:51:18.785981 call enable_fixed_mtrr()
1915 17:51:18.789634 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 17:51:18.792858 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 17:51:18.795888 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 17:51:18.802886 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 17:51:18.806399 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 17:51:18.809238 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 17:51:18.812623 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 17:51:18.819409 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 17:51:18.822629 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 17:51:18.825703 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 17:51:18.829281 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 17:51:18.835842 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 17:51:18.835938 call enable_fixed_mtrr()
1928 17:51:18.842358 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 17:51:18.845612 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 17:51:18.849321 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 17:51:18.852298 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 17:51:18.859082 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 17:51:18.862593 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 17:51:18.865646 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 17:51:18.868638 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 17:51:18.872103 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 17:51:18.879235 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 17:51:18.881886 CPU physical address size: 39 bits
1939 17:51:18.885300 call enable_fixed_mtrr()
1940 17:51:18.888774 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 17:51:18.892462 MTRR: Fixed MSR 0x250 0x0606060606060606
1942 17:51:18.895936 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 17:51:18.902493 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 17:51:18.905890 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 17:51:18.909040 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 17:51:18.912173 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 17:51:18.918981 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 17:51:18.921996 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 17:51:18.925533 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 17:51:18.929188 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 17:51:18.932284 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 17:51:18.938695 MTRR: Fixed MSR 0x258 0x0606060606060606
1953 17:51:18.942220 call enable_fixed_mtrr()
1954 17:51:18.945207 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 17:51:18.948314 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 17:51:18.951707 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 17:51:18.958333 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 17:51:18.961708 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 17:51:18.965224 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 17:51:18.968072 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 17:51:18.971529 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 17:51:18.978267 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 17:51:18.981527 CPU physical address size: 39 bits
1964 17:51:18.984730 call enable_fixed_mtrr()
1965 17:51:18.988485 CPU physical address size: 39 bits
1966 17:51:18.991395 MTRR: Fixed MSR 0x250 0x0606060606060606
1967 17:51:18.994591 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 17:51:19.001248 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 17:51:19.004683 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 17:51:19.008182 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 17:51:19.010885 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 17:51:19.014531 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 17:51:19.020964 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 17:51:19.024767 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 17:51:19.027485 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 17:51:19.031334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 17:51:19.037888 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 17:51:19.037980 call enable_fixed_mtrr()
1979 17:51:19.043960 MTRR: Fixed MSR 0x258 0x0606060606060606
1980 17:51:19.047451 MTRR: Fixed MSR 0x259 0x0000000000000000
1981 17:51:19.050883 MTRR: Fixed MSR 0x268 0x0606060606060606
1982 17:51:19.053995 MTRR: Fixed MSR 0x269 0x0606060606060606
1983 17:51:19.060559 MTRR: Fixed MSR 0x26a 0x0606060606060606
1984 17:51:19.064110 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 17:51:19.067594 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 17:51:19.070959 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 17:51:19.077482 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 17:51:19.080702 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 17:51:19.084498 CPU physical address size: 39 bits
1990 17:51:19.087062 call enable_fixed_mtrr()
1991 17:51:19.090440 CPU physical address size: 39 bits
1992 17:51:19.096994 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1993 17:51:19.101029 CPU physical address size: 39 bits
1994 17:51:19.103794 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1995 17:51:19.106988 CPU physical address size: 39 bits
1996 17:51:19.110310 CBFS @ c08000 size 3f8000
1997 17:51:19.116864 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1998 17:51:19.120178 CBFS: Locating 'fallback/payload'
1999 17:51:19.123398 CBFS: Found @ offset 1c96c0 size 3f798
2000 17:51:19.130066 Checking segment from ROM address 0xffdd16f8
2001 17:51:19.133692 Checking segment from ROM address 0xffdd1714
2002 17:51:19.137236 Loading segment from ROM address 0xffdd16f8
2003 17:51:19.140543 code (compression=0)
2004 17:51:19.150386 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2005 17:51:19.156445 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2006 17:51:19.160178 it's not compressed!
2007 17:51:19.251484 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2008 17:51:19.258042 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2009 17:51:19.261544 Loading segment from ROM address 0xffdd1714
2010 17:51:19.264631 Entry Point 0x30000000
2011 17:51:19.268017 Loaded segments
2012 17:51:19.274209 Finalizing chipset.
2013 17:51:19.277134 Finalizing SMM.
2014 17:51:19.280602 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2015 17:51:19.283852 mp_park_aps done after 0 msecs.
2016 17:51:19.290263 Jumping to boot code at 30000000(99b62000)
2017 17:51:19.297159 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2018 17:51:19.297252
2019 17:51:19.297323
2020 17:51:19.297390
2021 17:51:19.300457 Starting depthcharge on Helios...
2022 17:51:19.300547
2023 17:51:19.300925 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2024 17:51:19.301036 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2025 17:51:19.301126 Setting prompt string to ['hatch:']
2026 17:51:19.301213 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2027 17:51:19.310152 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2028 17:51:19.310245
2029 17:51:19.316449 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2030 17:51:19.316539
2031 17:51:19.323586 board_setup: Info: eMMC controller not present; skipping
2032 17:51:19.323677
2033 17:51:19.326844 New NVMe Controller 0x30053ac0 @ 00:1d:00
2034 17:51:19.326935
2035 17:51:19.333177 board_setup: Info: SDHCI controller not present; skipping
2036 17:51:19.333268
2037 17:51:19.339643 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2038 17:51:19.339737
2039 17:51:19.339808 Wipe memory regions:
2040 17:51:19.339875
2041 17:51:19.343490 [0x00000000001000, 0x000000000a0000)
2042 17:51:19.343580
2043 17:51:19.346426 [0x00000000100000, 0x00000030000000)
2044 17:51:19.412717
2045 17:51:19.415849 [0x00000030657430, 0x00000099a2c000)
2046 17:51:19.563151
2047 17:51:19.565742 [0x00000100000000, 0x0000045e800000)
2048 17:51:21.021722
2049 17:51:21.021872 R8152: Initializing
2050 17:51:21.021947
2051 17:51:21.025198 Version 9 (ocp_data = 6010)
2052 17:51:21.029410
2053 17:51:21.029501 R8152: Done initializing
2054 17:51:21.029574
2055 17:51:21.032605 Adding net device
2056 17:51:21.516134
2057 17:51:21.516634 R8152: Initializing
2058 17:51:21.516968
2059 17:51:21.519674 Version 6 (ocp_data = 5c30)
2060 17:51:21.520149
2061 17:51:21.522177 R8152: Done initializing
2062 17:51:21.522591
2063 17:51:21.526257 net_add_device: Attemp to include the same device
2064 17:51:21.529544
2065 17:51:21.536312 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2066 17:51:21.536610
2067 17:51:21.536856
2068 17:51:21.537078
2069 17:51:21.537649 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2071 17:51:21.638326 hatch: tftpboot 192.168.201.1 11831872/tftp-deploy-p1vuqqvs/kernel/bzImage 11831872/tftp-deploy-p1vuqqvs/kernel/cmdline 11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
2072 17:51:21.638514 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2073 17:51:21.638606 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2074 17:51:21.642459 tftpboot 192.168.201.1 11831872/tftp-deploy-p1vuqqvs/kernel/bzImloy-p1vuqqvs/kernel/cmdline 11831872/tftp-deploy-p1vuqqvs/ramdisk/ramdisk.cpio.gz
2075 17:51:21.642553
2076 17:51:21.642627 Waiting for link
2077 17:51:21.843440
2078 17:51:21.843601 done.
2079 17:51:21.843675
2080 17:51:21.843742 MAC: 00:24:32:50:1a:59
2081 17:51:21.843806
2082 17:51:21.846681 Sending DHCP discover... done.
2083 17:51:21.846775
2084 17:51:21.849952 Waiting for reply... done.
2085 17:51:21.850044
2086 17:51:21.853820 Sending DHCP request... done.
2087 17:51:21.853924
2088 17:51:21.862883 Waiting for reply... done.
2089 17:51:21.862975
2090 17:51:21.863048 My ip is 192.168.201.14
2091 17:51:21.863115
2092 17:51:21.866429 The DHCP server ip is 192.168.201.1
2093 17:51:21.869400
2094 17:51:21.872949 TFTP server IP predefined by user: 192.168.201.1
2095 17:51:21.873042
2096 17:51:21.879476 Bootfile predefined by user: 11831872/tftp-deploy-p1vuqqvs/kernel/bzImage
2097 17:51:21.879568
2098 17:51:21.882788 Sending tftp read request... done.
2099 17:51:21.882880
2100 17:51:21.889419 Waiting for the transfer...
2101 17:51:21.889511
2102 17:51:22.547913 00000000 ################################################################
2103 17:51:22.548094
2104 17:51:23.194811 00080000 ################################################################
2105 17:51:23.194983
2106 17:51:23.759899 00100000 ################################################################
2107 17:51:23.760055
2108 17:51:24.356815 00180000 ################################################################
2109 17:51:24.356972
2110 17:51:25.003984 00200000 ################################################################
2111 17:51:25.004152
2112 17:51:25.649754 00280000 ################################################################
2113 17:51:25.649898
2114 17:51:26.289243 00300000 ################################################################
2115 17:51:26.289390
2116 17:51:26.935606 00380000 ################################################################
2117 17:51:26.935753
2118 17:51:27.598319 00400000 ################################################################
2119 17:51:27.598468
2120 17:51:28.257440 00480000 ################################################################
2121 17:51:28.257589
2122 17:51:28.905201 00500000 ################################################################
2123 17:51:28.905346
2124 17:51:29.544118 00580000 ################################################################
2125 17:51:29.544271
2126 17:51:30.208643 00600000 ################################################################
2127 17:51:30.208783
2128 17:51:30.807836 00680000 ################################################################
2129 17:51:30.808028
2130 17:51:31.355520 00700000 ################################################################
2131 17:51:31.355700
2132 17:51:31.894209 00780000 ################################################################
2133 17:51:31.894393
2134 17:51:32.014028 00800000 ############### done.
2135 17:51:32.014171
2136 17:51:32.016967 The bootfile was 8507280 bytes long.
2137 17:51:32.017060
2138 17:51:32.020567 Sending tftp read request... done.
2139 17:51:32.020658
2140 17:51:32.023863 Waiting for the transfer...
2141 17:51:32.023982
2142 17:51:32.551460 00000000 ################################################################
2143 17:51:32.551655
2144 17:51:33.079253 00080000 ################################################################
2145 17:51:33.079411
2146 17:51:33.604672 00100000 ################################################################
2147 17:51:33.604862
2148 17:51:34.147734 00180000 ################################################################
2149 17:51:34.147920
2150 17:51:34.686285 00200000 ################################################################
2151 17:51:34.686442
2152 17:51:35.215765 00280000 ################################################################
2153 17:51:35.215915
2154 17:51:35.757311 00300000 ################################################################
2155 17:51:35.757478
2156 17:51:36.297425 00380000 ################################################################
2157 17:51:36.297586
2158 17:51:36.828582 00400000 ################################################################
2159 17:51:36.828743
2160 17:51:37.357570 00480000 ################################################################
2161 17:51:37.357732
2162 17:51:37.887202 00500000 ################################################################
2163 17:51:37.887361
2164 17:51:38.414332 00580000 ################################################################
2165 17:51:38.414486
2166 17:51:38.588046 00600000 ##################### done.
2167 17:51:38.588207
2168 17:51:38.591374 Sending tftp read request... done.
2169 17:51:38.591457
2170 17:51:38.594304 Waiting for the transfer...
2171 17:51:38.594423
2172 17:51:38.594540 00000000 # done.
2173 17:51:38.594642
2174 17:51:38.604436 Command line loaded dynamically from TFTP file: 11831872/tftp-deploy-p1vuqqvs/kernel/cmdline
2175 17:51:38.604523
2176 17:51:38.633965 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831872/extract-nfsrootfs-epsaw0vp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2177 17:51:38.634070
2178 17:51:38.637469 ec_init(0): CrosEC protocol v3 supported (256, 256)
2179 17:51:38.643393
2180 17:51:38.647433 Shutting down all USB controllers.
2181 17:51:38.647526
2182 17:51:38.647598 Removing current net device
2183 17:51:38.650818
2184 17:51:38.650910 Finalizing coreboot
2185 17:51:38.650983
2186 17:51:38.657440 Exiting depthcharge with code 4 at timestamp: 26693522
2187 17:51:38.657533
2188 17:51:38.657605
2189 17:51:38.657673 Starting kernel ...
2190 17:51:38.657737
2191 17:51:38.657801
2192 17:51:38.658186 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2193 17:51:38.658295 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2194 17:51:38.658377 Setting prompt string to ['Linux version [0-9]']
2195 17:51:38.658452 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2196 17:51:38.658526 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2198 17:56:01.659162 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2200 17:56:01.660167 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2202 17:56:01.660952 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2205 17:56:01.662242 end: 2 depthcharge-action (duration 00:05:00) [common]
2207 17:56:01.663302 Cleaning after the job
2208 17:56:01.663490 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/ramdisk
2209 17:56:01.664577 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/kernel
2210 17:56:01.665970 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/nfsrootfs
2211 17:56:01.766277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831872/tftp-deploy-p1vuqqvs/modules
2212 17:56:01.766753 start: 4.1 power-off (timeout 00:00:30) [common]
2213 17:56:01.766937 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2214 17:56:01.847846 >> Command sent successfully.
2215 17:56:01.854045 Returned 0 in 0 seconds
2216 17:56:01.955213 end: 4.1 power-off (duration 00:00:00) [common]
2218 17:56:01.956931 start: 4.2 read-feedback (timeout 00:10:00) [common]
2219 17:56:01.958503 Listened to connection for namespace 'common' for up to 1s
2221 17:56:01.960211 Listened to connection for namespace 'common' for up to 1s
2222 17:56:02.958785 Finalising connection for namespace 'common'
2223 17:56:02.959511 Disconnecting from shell: Finalise
2224 17:56:02.960060
2225 17:56:03.061389 end: 4.2 read-feedback (duration 00:00:01) [common]
2226 17:56:03.062120 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831872
2227 17:56:03.733028 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831872
2228 17:56:03.733258 JobError: Your job cannot terminate cleanly.