Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:43:27.742406 lava-dispatcher, installed at version: 2023.08
2 17:43:27.742612 start: 0 validate
3 17:43:27.742742 Start time: 2023-10-20 17:43:27.742734+00:00 (UTC)
4 17:43:27.742866 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:43:27.743000 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:43:28.016811 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:43:28.016986 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:43:28.283470 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:43:28.283654 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:43:28.549223 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:43:28.549479 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:43:28.817319 validate duration: 1.07
14 17:43:28.817692 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:43:28.817827 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:43:28.817942 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:43:28.818113 Not decompressing ramdisk as can be used compressed.
18 17:43:28.818230 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/initrd.cpio.gz
19 17:43:28.818329 saving as /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/ramdisk/initrd.cpio.gz
20 17:43:28.818423 total size: 6134299 (5 MB)
21 17:43:28.819637 progress 0 % (0 MB)
22 17:43:28.821525 progress 5 % (0 MB)
23 17:43:28.823236 progress 10 % (0 MB)
24 17:43:28.825040 progress 15 % (0 MB)
25 17:43:28.826685 progress 20 % (1 MB)
26 17:43:28.828328 progress 25 % (1 MB)
27 17:43:28.830057 progress 30 % (1 MB)
28 17:43:28.831756 progress 35 % (2 MB)
29 17:43:28.833393 progress 40 % (2 MB)
30 17:43:28.835240 progress 45 % (2 MB)
31 17:43:28.836828 progress 50 % (2 MB)
32 17:43:28.838381 progress 55 % (3 MB)
33 17:43:28.840144 progress 60 % (3 MB)
34 17:43:28.841718 progress 65 % (3 MB)
35 17:43:28.843467 progress 70 % (4 MB)
36 17:43:28.845013 progress 75 % (4 MB)
37 17:43:28.846560 progress 80 % (4 MB)
38 17:43:28.848404 progress 85 % (5 MB)
39 17:43:28.850003 progress 90 % (5 MB)
40 17:43:28.851636 progress 95 % (5 MB)
41 17:43:28.853482 progress 100 % (5 MB)
42 17:43:28.853635 5 MB downloaded in 0.04 s (166.14 MB/s)
43 17:43:28.853787 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:43:28.854082 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:43:28.854178 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:43:28.854266 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:43:28.854405 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:43:28.854474 saving as /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/kernel/bzImage
50 17:43:28.854533 total size: 8507280 (8 MB)
51 17:43:28.854594 No compression specified
52 17:43:28.855777 progress 0 % (0 MB)
53 17:43:28.857919 progress 5 % (0 MB)
54 17:43:28.860223 progress 10 % (0 MB)
55 17:43:28.862493 progress 15 % (1 MB)
56 17:43:28.864780 progress 20 % (1 MB)
57 17:43:28.867077 progress 25 % (2 MB)
58 17:43:28.869431 progress 30 % (2 MB)
59 17:43:28.871778 progress 35 % (2 MB)
60 17:43:28.874017 progress 40 % (3 MB)
61 17:43:28.876317 progress 45 % (3 MB)
62 17:43:28.878562 progress 50 % (4 MB)
63 17:43:28.880766 progress 55 % (4 MB)
64 17:43:28.882979 progress 60 % (4 MB)
65 17:43:28.885176 progress 65 % (5 MB)
66 17:43:28.887427 progress 70 % (5 MB)
67 17:43:28.889663 progress 75 % (6 MB)
68 17:43:28.891984 progress 80 % (6 MB)
69 17:43:28.894322 progress 85 % (6 MB)
70 17:43:28.896573 progress 90 % (7 MB)
71 17:43:28.898793 progress 95 % (7 MB)
72 17:43:28.901067 progress 100 % (8 MB)
73 17:43:28.901255 8 MB downloaded in 0.05 s (173.67 MB/s)
74 17:43:28.901397 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:43:28.901624 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:43:28.901709 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:43:28.901793 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:43:28.901927 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230623.0/amd64/full.rootfs.tar.xz
80 17:43:28.901996 saving as /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/nfsrootfs/full.rootfs.tar
81 17:43:28.902118 total size: 202699900 (193 MB)
82 17:43:28.902189 Using unxz to decompress xz
83 17:43:28.906379 progress 0 % (0 MB)
84 17:43:29.485293 progress 5 % (9 MB)
85 17:43:30.004874 progress 10 % (19 MB)
86 17:43:30.570040 progress 15 % (29 MB)
87 17:43:30.848405 progress 20 % (38 MB)
88 17:43:31.395690 progress 25 % (48 MB)
89 17:43:31.967189 progress 30 % (58 MB)
90 17:43:32.584502 progress 35 % (67 MB)
91 17:43:33.130954 progress 40 % (77 MB)
92 17:43:33.696059 progress 45 % (87 MB)
93 17:43:34.302391 progress 50 % (96 MB)
94 17:43:34.923917 progress 55 % (106 MB)
95 17:43:35.595898 progress 60 % (116 MB)
96 17:43:36.015397 progress 65 % (125 MB)
97 17:43:36.107302 progress 70 % (135 MB)
98 17:43:36.250976 progress 75 % (145 MB)
99 17:43:36.332770 progress 80 % (154 MB)
100 17:43:36.385762 progress 85 % (164 MB)
101 17:43:36.476087 progress 90 % (174 MB)
102 17:43:36.832095 progress 95 % (183 MB)
103 17:43:37.416392 progress 100 % (193 MB)
104 17:43:37.422854 193 MB downloaded in 8.52 s (22.69 MB/s)
105 17:43:37.423113 end: 1.3.1 http-download (duration 00:00:09) [common]
107 17:43:37.423373 end: 1.3 download-retry (duration 00:00:09) [common]
108 17:43:37.423463 start: 1.4 download-retry (timeout 00:09:51) [common]
109 17:43:37.423550 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 17:43:37.423707 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:43:37.423779 saving as /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/modules/modules.tar
112 17:43:37.423840 total size: 253900 (0 MB)
113 17:43:37.423926 Using unxz to decompress xz
114 17:43:37.428076 progress 12 % (0 MB)
115 17:43:37.428490 progress 25 % (0 MB)
116 17:43:37.428726 progress 38 % (0 MB)
117 17:43:37.430349 progress 51 % (0 MB)
118 17:43:37.432339 progress 64 % (0 MB)
119 17:43:37.434297 progress 77 % (0 MB)
120 17:43:37.436291 progress 90 % (0 MB)
121 17:43:37.438184 progress 100 % (0 MB)
122 17:43:37.444114 0 MB downloaded in 0.02 s (11.96 MB/s)
123 17:43:37.444376 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:43:37.444643 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:43:37.444740 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
127 17:43:37.444839 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
128 17:43:41.111801 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831841/extract-nfsrootfs-1afqgiym
129 17:43:41.111998 end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
130 17:43:41.112098 start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
131 17:43:41.112275 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb
132 17:43:41.112414 makedir: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin
133 17:43:41.112523 makedir: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/tests
134 17:43:41.112626 makedir: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/results
135 17:43:41.112729 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-add-keys
136 17:43:41.112875 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-add-sources
137 17:43:41.113009 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-background-process-start
138 17:43:41.113143 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-background-process-stop
139 17:43:41.113271 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-common-functions
140 17:43:41.113399 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-echo-ipv4
141 17:43:41.113526 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-install-packages
142 17:43:41.113658 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-installed-packages
143 17:43:41.113785 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-os-build
144 17:43:41.113913 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-probe-channel
145 17:43:41.114039 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-probe-ip
146 17:43:41.114166 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-target-ip
147 17:43:41.114292 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-target-mac
148 17:43:41.114418 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-target-storage
149 17:43:41.114547 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-case
150 17:43:41.114674 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-event
151 17:43:41.114835 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-feedback
152 17:43:41.114977 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-raise
153 17:43:41.115103 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-reference
154 17:43:41.115229 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-runner
155 17:43:41.115356 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-set
156 17:43:41.115483 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-test-shell
157 17:43:41.115609 Updating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-add-keys (debian)
158 17:43:41.115769 Updating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-add-sources (debian)
159 17:43:41.115937 Updating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-install-packages (debian)
160 17:43:41.116084 Updating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-installed-packages (debian)
161 17:43:41.116230 Updating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/bin/lava-os-build (debian)
162 17:43:41.116358 Creating /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/environment
163 17:43:41.116467 LAVA metadata
164 17:43:41.116537 - LAVA_JOB_ID=11831841
165 17:43:41.116601 - LAVA_DISPATCHER_IP=192.168.201.1
166 17:43:41.116700 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
167 17:43:41.116767 skipped lava-vland-overlay
168 17:43:41.116840 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
169 17:43:41.116918 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
170 17:43:41.116979 skipped lava-multinode-overlay
171 17:43:41.117051 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
172 17:43:41.117129 start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
173 17:43:41.117201 Loading test definitions
174 17:43:41.117290 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
175 17:43:41.117362 Using /lava-11831841 at stage 0
176 17:43:41.117654 uuid=11831841_1.5.2.3.1 testdef=None
177 17:43:41.117742 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
178 17:43:41.117826 start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
179 17:43:41.118283 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
181 17:43:41.118500 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
182 17:43:41.119132 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
184 17:43:41.119412 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
185 17:43:41.119956 runner path: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/0/tests/0_timesync-off test_uuid 11831841_1.5.2.3.1
186 17:43:41.120114 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
188 17:43:41.120335 start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
189 17:43:41.120407 Using /lava-11831841 at stage 0
190 17:43:41.120503 Fetching tests from https://github.com/kernelci/test-definitions.git
191 17:43:41.120582 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/0/tests/1_kselftest-alsa'
192 17:43:45.747836 Running '/usr/bin/git checkout kernelci.org
193 17:43:45.897449 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
194 17:43:45.898255 uuid=11831841_1.5.2.3.5 testdef=None
195 17:43:45.898423 end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
197 17:43:45.898672 start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
198 17:43:45.899463 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 17:43:45.899700 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
201 17:43:45.900677 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 17:43:45.900913 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
204 17:43:45.901850 runner path: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/0/tests/1_kselftest-alsa test_uuid 11831841_1.5.2.3.5
205 17:43:45.901944 BOARD='asus-cx9400-volteer'
206 17:43:45.902009 BRANCH='cip-gitlab'
207 17:43:45.902070 SKIPFILE='/dev/null'
208 17:43:45.902129 SKIP_INSTALL='True'
209 17:43:45.902185 TESTPROG_URL='None'
210 17:43:45.902242 TST_CASENAME=''
211 17:43:45.902297 TST_CMDFILES='alsa'
212 17:43:45.902445 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
214 17:43:45.902651 Creating lava-test-runner.conf files
215 17:43:45.902715 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831841/lava-overlay-r2ji6pqb/lava-11831841/0 for stage 0
216 17:43:45.902851 - 0_timesync-off
217 17:43:45.902922 - 1_kselftest-alsa
218 17:43:45.903024 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
219 17:43:45.903114 start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
220 17:43:53.465157 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
221 17:43:53.465350 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:35) [common]
222 17:43:53.465446 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
223 17:43:53.465547 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
224 17:43:53.465639 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:35) [common]
225 17:43:53.634930 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
226 17:43:53.635322 start: 1.5.4 extract-modules (timeout 00:09:35) [common]
227 17:43:53.635456 extracting modules file /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831841/extract-nfsrootfs-1afqgiym
228 17:43:53.650919 extracting modules file /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831841/extract-overlay-ramdisk-uiby0a37/ramdisk
229 17:43:53.668034 end: 1.5.4 extract-modules (duration 00:00:00) [common]
230 17:43:53.668187 start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
231 17:43:53.668281 [common] Applying overlay to NFS
232 17:43:53.668372 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831841/compress-overlay-chwbah2s/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831841/extract-nfsrootfs-1afqgiym
233 17:43:54.652340 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
234 17:43:54.652514 start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
235 17:43:54.652609 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
236 17:43:54.652699 start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
237 17:43:54.652784 Building ramdisk /var/lib/lava/dispatcher/tmp/11831841/extract-overlay-ramdisk-uiby0a37/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831841/extract-overlay-ramdisk-uiby0a37/ramdisk
238 17:43:54.747635 >> 30709 blocks
239 17:43:55.389428 rename /var/lib/lava/dispatcher/tmp/11831841/extract-overlay-ramdisk-uiby0a37/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
240 17:43:55.389860 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
241 17:43:55.389984 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
242 17:43:55.390085 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
243 17:43:55.390183 No mkimage arch provided, not using FIT.
244 17:43:55.390276 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
245 17:43:55.390364 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
246 17:43:55.390472 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
247 17:43:55.390565 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
248 17:43:55.390647 No LXC device requested
249 17:43:55.390727 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
250 17:43:55.390865 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
251 17:43:55.390951 end: 1.7 deploy-device-env (duration 00:00:00) [common]
252 17:43:55.391028 Checking files for TFTP limit of 4294967296 bytes.
253 17:43:55.391447 end: 1 tftp-deploy (duration 00:00:27) [common]
254 17:43:55.391549 start: 2 depthcharge-action (timeout 00:05:00) [common]
255 17:43:55.391638 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
256 17:43:55.391770 substitutions:
257 17:43:55.391846 - {DTB}: None
258 17:43:55.391909 - {INITRD}: 11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
259 17:43:55.391969 - {KERNEL}: 11831841/tftp-deploy-s_iymnk9/kernel/bzImage
260 17:43:55.392027 - {LAVA_MAC}: None
261 17:43:55.392082 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831841/extract-nfsrootfs-1afqgiym
262 17:43:55.392140 - {NFS_SERVER_IP}: 192.168.201.1
263 17:43:55.392196 - {PRESEED_CONFIG}: None
264 17:43:55.392250 - {PRESEED_LOCAL}: None
265 17:43:55.392304 - {RAMDISK}: 11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
266 17:43:55.392359 - {ROOT_PART}: None
267 17:43:55.392412 - {ROOT}: None
268 17:43:55.392466 - {SERVER_IP}: 192.168.201.1
269 17:43:55.392520 - {TEE}: None
270 17:43:55.392573 Parsed boot commands:
271 17:43:55.392625 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
272 17:43:55.392811 Parsed boot commands: tftpboot 192.168.201.1 11831841/tftp-deploy-s_iymnk9/kernel/bzImage 11831841/tftp-deploy-s_iymnk9/kernel/cmdline 11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
273 17:43:55.392900 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
274 17:43:55.392982 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
275 17:43:55.393071 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
276 17:43:55.393157 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
277 17:43:55.393228 Not connected, no need to disconnect.
278 17:43:55.393301 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
279 17:43:55.393385 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
280 17:43:55.393450 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-2'
281 17:43:55.397581 Setting prompt string to ['lava-test: # ']
282 17:43:55.397938 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
283 17:43:55.398046 end: 2.2.1 reset-connection (duration 00:00:00) [common]
284 17:43:55.398146 start: 2.2.2 reset-device (timeout 00:05:00) [common]
285 17:43:55.398272 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
286 17:43:55.398461 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
287 17:44:00.534679 >> Command sent successfully.
288 17:44:00.537164 Returned 0 in 5 seconds
289 17:44:00.637565 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
291 17:44:00.637898 end: 2.2.2 reset-device (duration 00:00:05) [common]
292 17:44:00.638004 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
293 17:44:00.638094 Setting prompt string to 'Starting depthcharge on Voema...'
294 17:44:00.638164 Changing prompt to 'Starting depthcharge on Voema...'
295 17:44:00.638236 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
296 17:44:00.638502 [Enter `^Ec?' for help]
297 17:44:02.241576
298 17:44:02.241739
299 17:44:02.251391 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
300 17:44:02.258419 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
301 17:44:02.261515 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
302 17:44:02.264545 CPU: AES supported, TXT NOT supported, VT supported
303 17:44:02.271197 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
304 17:44:02.277942 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
305 17:44:02.281558 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
306 17:44:02.284475 VBOOT: Loading verstage.
307 17:44:02.291179 FMAP: Found "FLASH" version 1.1 at 0x1804000.
308 17:44:02.294334 FMAP: base = 0x0 size = 0x2000000 #areas = 32
309 17:44:02.301379 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
310 17:44:02.307497 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
311 17:44:02.313900 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
312 17:44:02.317746
313 17:44:02.317831
314 17:44:02.327410 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
315 17:44:02.342201 Probing TPM: . done!
316 17:44:02.345260 TPM ready after 0 ms
317 17:44:02.348733 Connected to device vid:did:rid of 1ae0:0028:00
318 17:44:02.360339 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
319 17:44:02.366883 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
320 17:44:02.370053 Initialized TPM device CR50 revision 0
321 17:44:02.421863 tlcl_send_startup: Startup return code is 0
322 17:44:02.421965 TPM: setup succeeded
323 17:44:02.437175 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
324 17:44:02.451613 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
325 17:44:02.464161 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
326 17:44:02.474215 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
327 17:44:02.478688 Chrome EC: UHEPI supported
328 17:44:02.481850 Phase 1
329 17:44:02.485466 FMAP: area GBB found @ 1805000 (458752 bytes)
330 17:44:02.495140 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
331 17:44:02.501903 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
332 17:44:02.508267 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
333 17:44:02.514928 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
334 17:44:02.518228 Recovery requested (1009000e)
335 17:44:02.521329 TPM: Extending digest for VBOOT: boot mode into PCR 0
336 17:44:02.533337 tlcl_extend: response is 0
337 17:44:02.539868 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
338 17:44:02.549977 tlcl_extend: response is 0
339 17:44:02.556283 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
340 17:44:02.562951 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
341 17:44:02.569471 BS: verstage times (exec / console): total (unknown) / 142 ms
342 17:44:02.569557
343 17:44:02.569624
344 17:44:02.582902 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
345 17:44:02.589220 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
346 17:44:02.592758 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
347 17:44:02.595743 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
348 17:44:02.602513 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
349 17:44:02.606085 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
350 17:44:02.609328 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
351 17:44:02.612516 TCO_STS: 0000 0000
352 17:44:02.615785 GEN_PMCON: d0015038 00002200
353 17:44:02.619240 GBLRST_CAUSE: 00000000 00000000
354 17:44:02.622386 HPR_CAUSE0: 00000000
355 17:44:02.622470 prev_sleep_state 5
356 17:44:02.625439 Boot Count incremented to 24672
357 17:44:02.632313 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
358 17:44:02.638604 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
359 17:44:02.648625 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
360 17:44:02.655310 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
361 17:44:02.658915 Chrome EC: UHEPI supported
362 17:44:02.665151 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
363 17:44:02.676608 Probing TPM: done!
364 17:44:02.683483 Connected to device vid:did:rid of 1ae0:0028:00
365 17:44:02.694047 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
366 17:44:02.704219 Initialized TPM device CR50 revision 0
367 17:44:02.713516 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
368 17:44:02.719762 MRC: Hash idx 0x100b comparison successful.
369 17:44:02.722850 MRC cache found, size faa8
370 17:44:02.722937 bootmode is set to: 2
371 17:44:02.726288 SPD index = 0
372 17:44:02.733152 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
373 17:44:02.736228 SPD: module type is LPDDR4X
374 17:44:02.739597 SPD: module part number is MT53E512M64D4NW-046
375 17:44:02.746646 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
376 17:44:02.752854 SPD: device width 16 bits, bus width 16 bits
377 17:44:02.755933 SPD: module size is 1024 MB (per channel)
378 17:44:03.190573 CBMEM:
379 17:44:03.193498 IMD: root @ 0x76fff000 254 entries.
380 17:44:03.196746 IMD: root @ 0x76ffec00 62 entries.
381 17:44:03.199800 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
382 17:44:03.206718 FMAP: area RW_VPD found @ f35000 (8192 bytes)
383 17:44:03.210047 External stage cache:
384 17:44:03.213449 IMD: root @ 0x7b3ff000 254 entries.
385 17:44:03.216388 IMD: root @ 0x7b3fec00 62 entries.
386 17:44:03.231976 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
387 17:44:03.238971 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
388 17:44:03.245616 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
389 17:44:03.259661 MRC: 'RECOVERY_MRC_CACHE' does not need update.
390 17:44:03.265800 cse_lite: Skip switching to RW in the recovery path
391 17:44:03.265887 8 DIMMs found
392 17:44:03.268961 SMM Memory Map
393 17:44:03.272865 SMRAM : 0x7b000000 0x800000
394 17:44:03.276461 Subregion 0: 0x7b000000 0x200000
395 17:44:03.276537 Subregion 1: 0x7b200000 0x200000
396 17:44:03.280170 Subregion 2: 0x7b400000 0x400000
397 17:44:03.284243 top_of_ram = 0x77000000
398 17:44:03.290937 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
399 17:44:03.293743 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
400 17:44:03.300110 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
401 17:44:03.303988 MTRR Range: Start=ff000000 End=0 (Size 1000000)
402 17:44:03.313781 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
403 17:44:03.319810 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
404 17:44:03.330189 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
405 17:44:03.333394 Processing 211 relocs. Offset value of 0x74c0b000
406 17:44:03.342201 BS: romstage times (exec / console): total (unknown) / 277 ms
407 17:44:03.348187
408 17:44:03.348264
409 17:44:03.358410 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
410 17:44:03.361443 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
411 17:44:03.371166 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
412 17:44:03.378111 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
413 17:44:03.384421 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
414 17:44:03.391092 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
415 17:44:03.438109 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
416 17:44:03.445208 Processing 5008 relocs. Offset value of 0x75d98000
417 17:44:03.448559 BS: postcar times (exec / console): total (unknown) / 59 ms
418 17:44:03.451653
419 17:44:03.451730
420 17:44:03.461686 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
421 17:44:03.461769 Normal boot
422 17:44:03.464893 FW_CONFIG value is 0x804c02
423 17:44:03.468105 PCI: 00:07.0 disabled by fw_config
424 17:44:03.471460 PCI: 00:07.1 disabled by fw_config
425 17:44:03.474875 PCI: 00:0d.2 disabled by fw_config
426 17:44:03.478669 PCI: 00:1c.7 disabled by fw_config
427 17:44:03.484953 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
428 17:44:03.491884 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
429 17:44:03.495079 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
430 17:44:03.498047 GENERIC: 0.0 disabled by fw_config
431 17:44:03.505003 GENERIC: 1.0 disabled by fw_config
432 17:44:03.508267 fw_config match found: DB_USB=USB3_ACTIVE
433 17:44:03.511362 fw_config match found: DB_USB=USB3_ACTIVE
434 17:44:03.514451 fw_config match found: DB_USB=USB3_ACTIVE
435 17:44:03.521361 fw_config match found: DB_USB=USB3_ACTIVE
436 17:44:03.524223 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
437 17:44:03.531244 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
438 17:44:03.541272 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
439 17:44:03.547906 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
440 17:44:03.550727 microcode: sig=0x806c1 pf=0x80 revision=0x86
441 17:44:03.557772 microcode: Update skipped, already up-to-date
442 17:44:03.563862 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
443 17:44:03.592366 Detected 4 core, 8 thread CPU.
444 17:44:03.595439 Setting up SMI for CPU
445 17:44:03.598588 IED base = 0x7b400000
446 17:44:03.598661 IED size = 0x00400000
447 17:44:03.601780 Will perform SMM setup.
448 17:44:03.608577 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
449 17:44:03.614909 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
450 17:44:03.621796 Processing 16 relocs. Offset value of 0x00030000
451 17:44:03.625012 Attempting to start 7 APs
452 17:44:03.628487 Waiting for 10ms after sending INIT.
453 17:44:03.643843 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
454 17:44:03.643929 done.
455 17:44:03.647397 AP: slot 2 apic_id 3.
456 17:44:03.650947 AP: slot 6 apic_id 2.
457 17:44:03.651032 AP: slot 3 apic_id 7.
458 17:44:03.653931 AP: slot 7 apic_id 6.
459 17:44:03.657174 AP: slot 5 apic_id 4.
460 17:44:03.657258 AP: slot 4 apic_id 5.
461 17:44:03.664294 Waiting for 2nd SIPI to complete...done.
462 17:44:03.670473 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
463 17:44:03.677081 Processing 13 relocs. Offset value of 0x00038000
464 17:44:03.680283 Unable to locate Global NVS
465 17:44:03.687147 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
466 17:44:03.690150 Installing permanent SMM handler to 0x7b000000
467 17:44:03.700395 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
468 17:44:03.703470 Processing 794 relocs. Offset value of 0x7b010000
469 17:44:03.713410 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
470 17:44:03.717195 Processing 13 relocs. Offset value of 0x7b008000
471 17:44:03.723464 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
472 17:44:03.729750 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
473 17:44:03.736784 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
474 17:44:03.739769 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
475 17:44:03.746527 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
476 17:44:03.753430 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
477 17:44:03.759873 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
478 17:44:03.763084 Unable to locate Global NVS
479 17:44:03.769848 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
480 17:44:03.773064 Clearing SMI status registers
481 17:44:03.776257 SMI_STS: PM1
482 17:44:03.776341 PM1_STS: PWRBTN
483 17:44:03.782697 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
484 17:44:03.786490 In relocation handler: CPU 0
485 17:44:03.789676 New SMBASE=0x7b000000 IEDBASE=0x7b400000
486 17:44:03.796532 Writing SMRR. base = 0x7b000006, mask=0xff800c00
487 17:44:03.799505 Relocation complete.
488 17:44:03.806212 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
489 17:44:03.809160 In relocation handler: CPU 1
490 17:44:03.812279 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
491 17:44:03.815793 Relocation complete.
492 17:44:03.822628 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
493 17:44:03.825868 In relocation handler: CPU 4
494 17:44:03.828966 New SMBASE=0x7afff000 IEDBASE=0x7b400000
495 17:44:03.832170 Relocation complete.
496 17:44:03.839189 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
497 17:44:03.842212 In relocation handler: CPU 5
498 17:44:03.845426 New SMBASE=0x7affec00 IEDBASE=0x7b400000
499 17:44:03.848744 Writing SMRR. base = 0x7b000006, mask=0xff800c00
500 17:44:03.852247 Relocation complete.
501 17:44:03.858418 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
502 17:44:03.861833 In relocation handler: CPU 6
503 17:44:03.865156 New SMBASE=0x7affe800 IEDBASE=0x7b400000
504 17:44:03.871900 Writing SMRR. base = 0x7b000006, mask=0xff800c00
505 17:44:03.875049 Relocation complete.
506 17:44:03.881412 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
507 17:44:03.885323 In relocation handler: CPU 2
508 17:44:03.888180 New SMBASE=0x7afff800 IEDBASE=0x7b400000
509 17:44:03.891777 Relocation complete.
510 17:44:03.898409 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
511 17:44:03.901615 In relocation handler: CPU 7
512 17:44:03.904867 New SMBASE=0x7affe400 IEDBASE=0x7b400000
513 17:44:03.907877 Writing SMRR. base = 0x7b000006, mask=0xff800c00
514 17:44:03.911494 Relocation complete.
515 17:44:03.917944 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
516 17:44:03.921471 In relocation handler: CPU 3
517 17:44:03.924367 New SMBASE=0x7afff400 IEDBASE=0x7b400000
518 17:44:03.928347 Relocation complete.
519 17:44:03.931359 Initializing CPU #0
520 17:44:03.934405 CPU: vendor Intel device 806c1
521 17:44:03.937654 CPU: family 06, model 8c, stepping 01
522 17:44:03.940838 Clearing out pending MCEs
523 17:44:03.940922 Setting up local APIC...
524 17:44:03.944808 apic_id: 0x00 done.
525 17:44:03.947739 Turbo is available but hidden
526 17:44:03.951663 Turbo is available and visible
527 17:44:03.955298 microcode: Update skipped, already up-to-date
528 17:44:03.959289 CPU #0 initialized
529 17:44:03.959373 Initializing CPU #3
530 17:44:03.962174 Initializing CPU #7
531 17:44:03.965125 CPU: vendor Intel device 806c1
532 17:44:03.969053 CPU: family 06, model 8c, stepping 01
533 17:44:03.972064 CPU: vendor Intel device 806c1
534 17:44:03.975598 CPU: family 06, model 8c, stepping 01
535 17:44:03.978541 Clearing out pending MCEs
536 17:44:03.981875 Clearing out pending MCEs
537 17:44:03.981985 Setting up local APIC...
538 17:44:03.985390 Initializing CPU #5
539 17:44:03.988591 Initializing CPU #4
540 17:44:03.991788 CPU: vendor Intel device 806c1
541 17:44:03.995422 CPU: family 06, model 8c, stepping 01
542 17:44:03.998458 CPU: vendor Intel device 806c1
543 17:44:04.001939 CPU: family 06, model 8c, stepping 01
544 17:44:04.005071 Clearing out pending MCEs
545 17:44:04.005155 Clearing out pending MCEs
546 17:44:04.008903 Setting up local APIC...
547 17:44:04.011966 Initializing CPU #1
548 17:44:04.015152 Setting up local APIC...
549 17:44:04.015237 Initializing CPU #2
550 17:44:04.018318 Initializing CPU #6
551 17:44:04.021522 CPU: vendor Intel device 806c1
552 17:44:04.024674 CPU: family 06, model 8c, stepping 01
553 17:44:04.028099 CPU: vendor Intel device 806c1
554 17:44:04.031504 CPU: family 06, model 8c, stepping 01
555 17:44:04.035237 Clearing out pending MCEs
556 17:44:04.038148 Clearing out pending MCEs
557 17:44:04.038231 Setting up local APIC...
558 17:44:04.041274 apic_id: 0x07 done.
559 17:44:04.044570 apic_id: 0x06 done.
560 17:44:04.047781 microcode: Update skipped, already up-to-date
561 17:44:04.054696 microcode: Update skipped, already up-to-date
562 17:44:04.054820 CPU #3 initialized
563 17:44:04.057798 CPU: vendor Intel device 806c1
564 17:44:04.060927 CPU: family 06, model 8c, stepping 01
565 17:44:04.064755 Setting up local APIC...
566 17:44:04.067818 CPU #7 initialized
567 17:44:04.067902 apic_id: 0x04 done.
568 17:44:04.071295 Setting up local APIC...
569 17:44:04.074336 apic_id: 0x02 done.
570 17:44:04.074420 apic_id: 0x03 done.
571 17:44:04.081142 microcode: Update skipped, already up-to-date
572 17:44:04.084243 microcode: Update skipped, already up-to-date
573 17:44:04.087894 CPU #6 initialized
574 17:44:04.087979 CPU #2 initialized
575 17:44:04.090807 apic_id: 0x05 done.
576 17:44:04.093804 microcode: Update skipped, already up-to-date
577 17:44:04.100496 microcode: Update skipped, already up-to-date
578 17:44:04.100581 CPU #5 initialized
579 17:44:04.104300 CPU #4 initialized
580 17:44:04.107142 Clearing out pending MCEs
581 17:44:04.107225 Setting up local APIC...
582 17:44:04.110882 apic_id: 0x01 done.
583 17:44:04.117570 microcode: Update skipped, already up-to-date
584 17:44:04.117657 CPU #1 initialized
585 17:44:04.120648 bsp_do_flight_plan done after 455 msecs.
586 17:44:04.123875 CPU: frequency set to 4000 MHz
587 17:44:04.127159 Enabling SMIs.
588 17:44:04.133344 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
589 17:44:04.149143 SATAXPCIE1 indicates PCIe NVMe is present
590 17:44:04.152269 Probing TPM: done!
591 17:44:04.155379 Connected to device vid:did:rid of 1ae0:0028:00
592 17:44:04.166182 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
593 17:44:04.169901 Initialized TPM device CR50 revision 0
594 17:44:04.173093 Enabling S0i3.4
595 17:44:04.179510 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
596 17:44:04.183091 Found a VBT of 8704 bytes after decompression
597 17:44:04.189602 cse_lite: CSE RO boot. HybridStorageMode disabled
598 17:44:04.196421 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
599 17:44:04.273189 FSPS returned 0
600 17:44:04.276314 Executing Phase 1 of FspMultiPhaseSiInit
601 17:44:04.285968 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
602 17:44:04.289832 port C0 DISC req: usage 1 usb3 1 usb2 5
603 17:44:04.292894 Raw Buffer output 0 00000511
604 17:44:04.296103 Raw Buffer output 1 00000000
605 17:44:04.299807 pmc_send_ipc_cmd succeeded
606 17:44:04.306555 port C1 DISC req: usage 1 usb3 2 usb2 3
607 17:44:04.306640 Raw Buffer output 0 00000321
608 17:44:04.309476 Raw Buffer output 1 00000000
609 17:44:04.313773 pmc_send_ipc_cmd succeeded
610 17:44:04.319408 Detected 4 core, 8 thread CPU.
611 17:44:04.322385 Detected 4 core, 8 thread CPU.
612 17:44:04.556353 Display FSP Version Info HOB
613 17:44:04.559636 Reference Code - CPU = a.0.4c.31
614 17:44:04.563174 uCode Version = 0.0.0.86
615 17:44:04.566280 TXT ACM version = ff.ff.ff.ffff
616 17:44:04.569373 Reference Code - ME = a.0.4c.31
617 17:44:04.572620 MEBx version = 0.0.0.0
618 17:44:04.576461 ME Firmware Version = Consumer SKU
619 17:44:04.579450 Reference Code - PCH = a.0.4c.31
620 17:44:04.582535 PCH-CRID Status = Disabled
621 17:44:04.586301 PCH-CRID Original Value = ff.ff.ff.ffff
622 17:44:04.589633 PCH-CRID New Value = ff.ff.ff.ffff
623 17:44:04.592434 OPROM - RST - RAID = ff.ff.ff.ffff
624 17:44:04.596046 PCH Hsio Version = 4.0.0.0
625 17:44:04.599185 Reference Code - SA - System Agent = a.0.4c.31
626 17:44:04.602302 Reference Code - MRC = 2.0.0.1
627 17:44:04.606169 SA - PCIe Version = a.0.4c.31
628 17:44:04.608887 SA-CRID Status = Disabled
629 17:44:04.612327 SA-CRID Original Value = 0.0.0.1
630 17:44:04.615382 SA-CRID New Value = 0.0.0.1
631 17:44:04.619077 OPROM - VBIOS = ff.ff.ff.ffff
632 17:44:04.622441 IO Manageability Engine FW Version = 11.1.4.0
633 17:44:04.625422 PHY Build Version = 0.0.0.e0
634 17:44:04.629094 Thunderbolt(TM) FW Version = 0.0.0.0
635 17:44:04.635635 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
636 17:44:04.638721 ITSS IRQ Polarities Before:
637 17:44:04.641718 IPC0: 0xffffffff
638 17:44:04.641802 IPC1: 0xffffffff
639 17:44:04.645307 IPC2: 0xffffffff
640 17:44:04.645392 IPC3: 0xffffffff
641 17:44:04.648490 ITSS IRQ Polarities After:
642 17:44:04.651650 IPC0: 0xffffffff
643 17:44:04.651734 IPC1: 0xffffffff
644 17:44:04.655052 IPC2: 0xffffffff
645 17:44:04.655136 IPC3: 0xffffffff
646 17:44:04.658687 Found PCIe Root Port #9 at PCI: 00:1d.0.
647 17:44:04.671450 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
648 17:44:04.684849 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
649 17:44:04.694891 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
650 17:44:04.701484 BS: BS_DEV_INIT_CHIPS run times (exec / console): 327 / 236 ms
651 17:44:04.704477 Enumerating buses...
652 17:44:04.707820 Show all devs... Before device enumeration.
653 17:44:04.710994 Root Device: enabled 1
654 17:44:04.714652 DOMAIN: 0000: enabled 1
655 17:44:04.717977 CPU_CLUSTER: 0: enabled 1
656 17:44:04.718062 PCI: 00:00.0: enabled 1
657 17:44:04.720789 PCI: 00:02.0: enabled 1
658 17:44:04.724295 PCI: 00:04.0: enabled 1
659 17:44:04.724380 PCI: 00:05.0: enabled 1
660 17:44:04.727598 PCI: 00:06.0: enabled 0
661 17:44:04.731113 PCI: 00:07.0: enabled 0
662 17:44:04.734257 PCI: 00:07.1: enabled 0
663 17:44:04.734348 PCI: 00:07.2: enabled 0
664 17:44:04.737399 PCI: 00:07.3: enabled 0
665 17:44:04.740597 PCI: 00:08.0: enabled 1
666 17:44:04.744418 PCI: 00:09.0: enabled 0
667 17:44:04.744523 PCI: 00:0a.0: enabled 0
668 17:44:04.747364 PCI: 00:0d.0: enabled 1
669 17:44:04.751151 PCI: 00:0d.1: enabled 0
670 17:44:04.754261 PCI: 00:0d.2: enabled 0
671 17:44:04.754386 PCI: 00:0d.3: enabled 0
672 17:44:04.757399 PCI: 00:0e.0: enabled 0
673 17:44:04.760475 PCI: 00:10.2: enabled 1
674 17:44:04.764167 PCI: 00:10.6: enabled 0
675 17:44:04.764324 PCI: 00:10.7: enabled 0
676 17:44:04.767332 PCI: 00:12.0: enabled 0
677 17:44:04.770261 PCI: 00:12.6: enabled 0
678 17:44:04.774156 PCI: 00:13.0: enabled 0
679 17:44:04.774363 PCI: 00:14.0: enabled 1
680 17:44:04.777135 PCI: 00:14.1: enabled 0
681 17:44:04.780327 PCI: 00:14.2: enabled 1
682 17:44:04.784217 PCI: 00:14.3: enabled 1
683 17:44:04.784526 PCI: 00:15.0: enabled 1
684 17:44:04.787252 PCI: 00:15.1: enabled 1
685 17:44:04.790718 PCI: 00:15.2: enabled 1
686 17:44:04.791266 PCI: 00:15.3: enabled 1
687 17:44:04.793652 PCI: 00:16.0: enabled 1
688 17:44:04.797760 PCI: 00:16.1: enabled 0
689 17:44:04.801024 PCI: 00:16.2: enabled 0
690 17:44:04.801457 PCI: 00:16.3: enabled 0
691 17:44:04.803950 PCI: 00:16.4: enabled 0
692 17:44:04.807079 PCI: 00:16.5: enabled 0
693 17:44:04.810640 PCI: 00:17.0: enabled 1
694 17:44:04.811127 PCI: 00:19.0: enabled 0
695 17:44:04.813699 PCI: 00:19.1: enabled 1
696 17:44:04.817343 PCI: 00:19.2: enabled 0
697 17:44:04.820606 PCI: 00:1c.0: enabled 1
698 17:44:04.821090 PCI: 00:1c.1: enabled 0
699 17:44:04.823541 PCI: 00:1c.2: enabled 0
700 17:44:04.826933 PCI: 00:1c.3: enabled 0
701 17:44:04.830413 PCI: 00:1c.4: enabled 0
702 17:44:04.830722 PCI: 00:1c.5: enabled 0
703 17:44:04.833351 PCI: 00:1c.6: enabled 1
704 17:44:04.836615 PCI: 00:1c.7: enabled 0
705 17:44:04.839993 PCI: 00:1d.0: enabled 1
706 17:44:04.840305 PCI: 00:1d.1: enabled 0
707 17:44:04.843597 PCI: 00:1d.2: enabled 1
708 17:44:04.846571 PCI: 00:1d.3: enabled 0
709 17:44:04.846934 PCI: 00:1e.0: enabled 1
710 17:44:04.850234 PCI: 00:1e.1: enabled 0
711 17:44:04.853068 PCI: 00:1e.2: enabled 1
712 17:44:04.857015 PCI: 00:1e.3: enabled 1
713 17:44:04.857324 PCI: 00:1f.0: enabled 1
714 17:44:04.859996 PCI: 00:1f.1: enabled 0
715 17:44:04.863058 PCI: 00:1f.2: enabled 1
716 17:44:04.866732 PCI: 00:1f.3: enabled 1
717 17:44:04.867087 PCI: 00:1f.4: enabled 0
718 17:44:04.870034 PCI: 00:1f.5: enabled 1
719 17:44:04.873288 PCI: 00:1f.6: enabled 0
720 17:44:04.876240 PCI: 00:1f.7: enabled 0
721 17:44:04.876549 APIC: 00: enabled 1
722 17:44:04.879871 GENERIC: 0.0: enabled 1
723 17:44:04.883062 GENERIC: 0.0: enabled 1
724 17:44:04.883460 GENERIC: 1.0: enabled 1
725 17:44:04.886269 GENERIC: 0.0: enabled 1
726 17:44:04.889743 GENERIC: 1.0: enabled 1
727 17:44:04.893029 USB0 port 0: enabled 1
728 17:44:04.893338 GENERIC: 0.0: enabled 1
729 17:44:04.896068 USB0 port 0: enabled 1
730 17:44:04.899203 GENERIC: 0.0: enabled 1
731 17:44:04.902459 I2C: 00:1a: enabled 1
732 17:44:04.902647 I2C: 00:31: enabled 1
733 17:44:04.906113 I2C: 00:32: enabled 1
734 17:44:04.909214 I2C: 00:10: enabled 1
735 17:44:04.909349 I2C: 00:15: enabled 1
736 17:44:04.912285 GENERIC: 0.0: enabled 0
737 17:44:04.915986 GENERIC: 1.0: enabled 0
738 17:44:04.916104 GENERIC: 0.0: enabled 1
739 17:44:04.918798 SPI: 00: enabled 1
740 17:44:04.922320 SPI: 00: enabled 1
741 17:44:04.922437 PNP: 0c09.0: enabled 1
742 17:44:04.925528 GENERIC: 0.0: enabled 1
743 17:44:04.928830 USB3 port 0: enabled 1
744 17:44:04.932532 USB3 port 1: enabled 1
745 17:44:04.932655 USB3 port 2: enabled 0
746 17:44:04.935685 USB3 port 3: enabled 0
747 17:44:04.938632 USB2 port 0: enabled 0
748 17:44:04.938794 USB2 port 1: enabled 1
749 17:44:04.942235 USB2 port 2: enabled 1
750 17:44:04.945366 USB2 port 3: enabled 0
751 17:44:04.948469 USB2 port 4: enabled 1
752 17:44:04.948598 USB2 port 5: enabled 0
753 17:44:04.951949 USB2 port 6: enabled 0
754 17:44:04.955482 USB2 port 7: enabled 0
755 17:44:04.955645 USB2 port 8: enabled 0
756 17:44:04.959062 USB2 port 9: enabled 0
757 17:44:04.961958 USB3 port 0: enabled 0
758 17:44:04.962153 USB3 port 1: enabled 1
759 17:44:04.965821 USB3 port 2: enabled 0
760 17:44:04.968906 USB3 port 3: enabled 0
761 17:44:04.972152 GENERIC: 0.0: enabled 1
762 17:44:04.972418 GENERIC: 1.0: enabled 1
763 17:44:04.975488 APIC: 01: enabled 1
764 17:44:04.978464 APIC: 03: enabled 1
765 17:44:04.979003 APIC: 07: enabled 1
766 17:44:04.981841 APIC: 05: enabled 1
767 17:44:04.985479 APIC: 04: enabled 1
768 17:44:04.985938 APIC: 02: enabled 1
769 17:44:04.988731 APIC: 06: enabled 1
770 17:44:04.989164 Compare with tree...
771 17:44:04.992024 Root Device: enabled 1
772 17:44:04.995095 DOMAIN: 0000: enabled 1
773 17:44:04.998760 PCI: 00:00.0: enabled 1
774 17:44:04.999238 PCI: 00:02.0: enabled 1
775 17:44:05.002062 PCI: 00:04.0: enabled 1
776 17:44:05.005012 GENERIC: 0.0: enabled 1
777 17:44:05.008024 PCI: 00:05.0: enabled 1
778 17:44:05.011949 PCI: 00:06.0: enabled 0
779 17:44:05.015164 PCI: 00:07.0: enabled 0
780 17:44:05.015600 GENERIC: 0.0: enabled 1
781 17:44:05.018205 PCI: 00:07.1: enabled 0
782 17:44:05.021542 GENERIC: 1.0: enabled 1
783 17:44:05.025212 PCI: 00:07.2: enabled 0
784 17:44:05.027991 GENERIC: 0.0: enabled 1
785 17:44:05.028428 PCI: 00:07.3: enabled 0
786 17:44:05.031678 GENERIC: 1.0: enabled 1
787 17:44:05.034754 PCI: 00:08.0: enabled 1
788 17:44:05.037992 PCI: 00:09.0: enabled 0
789 17:44:05.041069 PCI: 00:0a.0: enabled 0
790 17:44:05.041299 PCI: 00:0d.0: enabled 1
791 17:44:05.044127 USB0 port 0: enabled 1
792 17:44:05.047956 USB3 port 0: enabled 1
793 17:44:05.050974 USB3 port 1: enabled 1
794 17:44:05.054433 USB3 port 2: enabled 0
795 17:44:05.057970 USB3 port 3: enabled 0
796 17:44:05.058103 PCI: 00:0d.1: enabled 0
797 17:44:05.061365 PCI: 00:0d.2: enabled 0
798 17:44:05.064092 GENERIC: 0.0: enabled 1
799 17:44:05.067515 PCI: 00:0d.3: enabled 0
800 17:44:05.070785 PCI: 00:0e.0: enabled 0
801 17:44:05.070919 PCI: 00:10.2: enabled 1
802 17:44:05.074240 PCI: 00:10.6: enabled 0
803 17:44:05.077173 PCI: 00:10.7: enabled 0
804 17:44:05.080834 PCI: 00:12.0: enabled 0
805 17:44:05.084046 PCI: 00:12.6: enabled 0
806 17:44:05.084177 PCI: 00:13.0: enabled 0
807 17:44:05.087149 PCI: 00:14.0: enabled 1
808 17:44:05.090390 USB0 port 0: enabled 1
809 17:44:05.093557 USB2 port 0: enabled 0
810 17:44:05.097329 USB2 port 1: enabled 1
811 17:44:05.097418 USB2 port 2: enabled 1
812 17:44:05.100622 USB2 port 3: enabled 0
813 17:44:05.103536 USB2 port 4: enabled 1
814 17:44:05.107031 USB2 port 5: enabled 0
815 17:44:05.110205 USB2 port 6: enabled 0
816 17:44:05.113693 USB2 port 7: enabled 0
817 17:44:05.113825 USB2 port 8: enabled 0
818 17:44:05.116938 USB2 port 9: enabled 0
819 17:44:05.120173 USB3 port 0: enabled 0
820 17:44:05.123412 USB3 port 1: enabled 1
821 17:44:05.126691 USB3 port 2: enabled 0
822 17:44:05.130311 USB3 port 3: enabled 0
823 17:44:05.130436 PCI: 00:14.1: enabled 0
824 17:44:05.133270 PCI: 00:14.2: enabled 1
825 17:44:05.137039 PCI: 00:14.3: enabled 1
826 17:44:05.140045 GENERIC: 0.0: enabled 1
827 17:44:05.143247 PCI: 00:15.0: enabled 1
828 17:44:05.143386 I2C: 00:1a: enabled 1
829 17:44:05.146469 I2C: 00:31: enabled 1
830 17:44:05.150111 I2C: 00:32: enabled 1
831 17:44:05.153267 PCI: 00:15.1: enabled 1
832 17:44:05.156478 I2C: 00:10: enabled 1
833 17:44:05.156686 PCI: 00:15.2: enabled 1
834 17:44:05.159718 PCI: 00:15.3: enabled 1
835 17:44:05.163154 PCI: 00:16.0: enabled 1
836 17:44:05.166262 PCI: 00:16.1: enabled 0
837 17:44:05.169995 PCI: 00:16.2: enabled 0
838 17:44:05.170395 PCI: 00:16.3: enabled 0
839 17:44:05.172935 PCI: 00:16.4: enabled 0
840 17:44:05.176528 PCI: 00:16.5: enabled 0
841 17:44:05.180020 PCI: 00:17.0: enabled 1
842 17:44:05.182841 PCI: 00:19.0: enabled 0
843 17:44:05.183273 PCI: 00:19.1: enabled 1
844 17:44:05.233035 I2C: 00:15: enabled 1
845 17:44:05.233508 PCI: 00:19.2: enabled 0
846 17:44:05.234218 PCI: 00:1d.0: enabled 1
847 17:44:05.234576 GENERIC: 0.0: enabled 1
848 17:44:05.234932 PCI: 00:1e.0: enabled 1
849 17:44:05.235248 PCI: 00:1e.1: enabled 0
850 17:44:05.235548 PCI: 00:1e.2: enabled 1
851 17:44:05.235839 SPI: 00: enabled 1
852 17:44:05.236145 PCI: 00:1e.3: enabled 1
853 17:44:05.236436 SPI: 00: enabled 1
854 17:44:05.236721 PCI: 00:1f.0: enabled 1
855 17:44:05.237004 PNP: 0c09.0: enabled 1
856 17:44:05.237285 PCI: 00:1f.1: enabled 0
857 17:44:05.237566 PCI: 00:1f.2: enabled 1
858 17:44:05.237866 GENERIC: 0.0: enabled 1
859 17:44:05.238160 GENERIC: 0.0: enabled 1
860 17:44:05.238507 GENERIC: 1.0: enabled 1
861 17:44:05.239054 PCI: 00:1f.3: enabled 1
862 17:44:05.239375 PCI: 00:1f.4: enabled 0
863 17:44:05.239665 PCI: 00:1f.5: enabled 1
864 17:44:05.240429 PCI: 00:1f.6: enabled 0
865 17:44:05.241129 PCI: 00:1f.7: enabled 0
866 17:44:05.244075 CPU_CLUSTER: 0: enabled 1
867 17:44:05.247669 APIC: 00: enabled 1
868 17:44:05.250916 APIC: 01: enabled 1
869 17:44:05.251347 APIC: 03: enabled 1
870 17:44:05.254085 APIC: 07: enabled 1
871 17:44:05.257212 APIC: 05: enabled 1
872 17:44:05.257641 APIC: 04: enabled 1
873 17:44:05.260876 APIC: 02: enabled 1
874 17:44:05.263974 APIC: 06: enabled 1
875 17:44:05.267091 Root Device scanning...
876 17:44:05.270666 scan_static_bus for Root Device
877 17:44:05.271141 DOMAIN: 0000 enabled
878 17:44:05.273638 CPU_CLUSTER: 0 enabled
879 17:44:05.276862 DOMAIN: 0000 scanning...
880 17:44:05.280671 PCI: pci_scan_bus for bus 00
881 17:44:05.283994 PCI: 00:00.0 [8086/0000] ops
882 17:44:05.287290 PCI: 00:00.0 [8086/9a12] enabled
883 17:44:05.290459 PCI: 00:02.0 [8086/0000] bus ops
884 17:44:05.293605 PCI: 00:02.0 [8086/9a40] enabled
885 17:44:05.297090 PCI: 00:04.0 [8086/0000] bus ops
886 17:44:05.299981 PCI: 00:04.0 [8086/9a03] enabled
887 17:44:05.303415 PCI: 00:05.0 [8086/9a19] enabled
888 17:44:05.307077 PCI: 00:07.0 [0000/0000] hidden
889 17:44:05.310316 PCI: 00:08.0 [8086/9a11] enabled
890 17:44:05.313389 PCI: 00:0a.0 [8086/9a0d] disabled
891 17:44:05.316564 PCI: 00:0d.0 [8086/0000] bus ops
892 17:44:05.319677 PCI: 00:0d.0 [8086/9a13] enabled
893 17:44:05.323218 PCI: 00:14.0 [8086/0000] bus ops
894 17:44:05.326370 PCI: 00:14.0 [8086/a0ed] enabled
895 17:44:05.329931 PCI: 00:14.2 [8086/a0ef] enabled
896 17:44:05.333368 PCI: 00:14.3 [8086/0000] bus ops
897 17:44:05.336659 PCI: 00:14.3 [8086/a0f0] enabled
898 17:44:05.339923 PCI: 00:15.0 [8086/0000] bus ops
899 17:44:05.343324 PCI: 00:15.0 [8086/a0e8] enabled
900 17:44:05.346531 PCI: 00:15.1 [8086/0000] bus ops
901 17:44:05.349543 PCI: 00:15.1 [8086/a0e9] enabled
902 17:44:05.352999 PCI: 00:15.2 [8086/0000] bus ops
903 17:44:05.355936 PCI: 00:15.2 [8086/a0ea] enabled
904 17:44:05.359703 PCI: 00:15.3 [8086/0000] bus ops
905 17:44:05.362987 PCI: 00:15.3 [8086/a0eb] enabled
906 17:44:05.365668 PCI: 00:16.0 [8086/0000] ops
907 17:44:05.369496 PCI: 00:16.0 [8086/a0e0] enabled
908 17:44:05.375446 PCI: Static device PCI: 00:17.0 not found, disabling it.
909 17:44:05.379170 PCI: 00:19.0 [8086/0000] bus ops
910 17:44:05.382245 PCI: 00:19.0 [8086/a0c5] disabled
911 17:44:05.385494 PCI: 00:19.1 [8086/0000] bus ops
912 17:44:05.389098 PCI: 00:19.1 [8086/a0c6] enabled
913 17:44:05.392138 PCI: 00:1d.0 [8086/0000] bus ops
914 17:44:05.395740 PCI: 00:1d.0 [8086/a0b0] enabled
915 17:44:05.398964 PCI: 00:1e.0 [8086/0000] ops
916 17:44:05.402021 PCI: 00:1e.0 [8086/a0a8] enabled
917 17:44:05.405620 PCI: 00:1e.2 [8086/0000] bus ops
918 17:44:05.408695 PCI: 00:1e.2 [8086/a0aa] enabled
919 17:44:05.412295 PCI: 00:1e.3 [8086/0000] bus ops
920 17:44:05.415658 PCI: 00:1e.3 [8086/a0ab] enabled
921 17:44:05.418563 PCI: 00:1f.0 [8086/0000] bus ops
922 17:44:05.421876 PCI: 00:1f.0 [8086/a087] enabled
923 17:44:05.421952 RTC Init
924 17:44:05.424848 Set power on after power failure.
925 17:44:05.428676 Disabling Deep S3
926 17:44:05.428755 Disabling Deep S3
927 17:44:05.431660 Disabling Deep S4
928 17:44:05.434713 Disabling Deep S4
929 17:44:05.434854 Disabling Deep S5
930 17:44:05.438457 Disabling Deep S5
931 17:44:05.441679 PCI: 00:1f.2 [0000/0000] hidden
932 17:44:05.444752 PCI: 00:1f.3 [8086/0000] bus ops
933 17:44:05.447849 PCI: 00:1f.3 [8086/a0c8] enabled
934 17:44:05.451718 PCI: 00:1f.5 [8086/0000] bus ops
935 17:44:05.454920 PCI: 00:1f.5 [8086/a0a4] enabled
936 17:44:05.457772 PCI: Leftover static devices:
937 17:44:05.457869 PCI: 00:10.2
938 17:44:05.461374 PCI: 00:10.6
939 17:44:05.461472 PCI: 00:10.7
940 17:44:05.461560 PCI: 00:06.0
941 17:44:05.464668 PCI: 00:07.1
942 17:44:05.464741 PCI: 00:07.2
943 17:44:05.467600 PCI: 00:07.3
944 17:44:05.467698 PCI: 00:09.0
945 17:44:05.467786 PCI: 00:0d.1
946 17:44:05.470742 PCI: 00:0d.2
947 17:44:05.470833 PCI: 00:0d.3
948 17:44:05.474391 PCI: 00:0e.0
949 17:44:05.474486 PCI: 00:12.0
950 17:44:05.477693 PCI: 00:12.6
951 17:44:05.477764 PCI: 00:13.0
952 17:44:05.477824 PCI: 00:14.1
953 17:44:05.481283 PCI: 00:16.1
954 17:44:05.481380 PCI: 00:16.2
955 17:44:05.484266 PCI: 00:16.3
956 17:44:05.484338 PCI: 00:16.4
957 17:44:05.484399 PCI: 00:16.5
958 17:44:05.487539 PCI: 00:17.0
959 17:44:05.487610 PCI: 00:19.2
960 17:44:05.490672 PCI: 00:1e.1
961 17:44:05.490783 PCI: 00:1f.1
962 17:44:05.494375 PCI: 00:1f.4
963 17:44:05.494446 PCI: 00:1f.6
964 17:44:05.494507 PCI: 00:1f.7
965 17:44:05.497402 PCI: Check your devicetree.cb.
966 17:44:05.500957 PCI: 00:02.0 scanning...
967 17:44:05.504075 scan_generic_bus for PCI: 00:02.0
968 17:44:05.507295 scan_generic_bus for PCI: 00:02.0 done
969 17:44:05.514097 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
970 17:44:05.517148 PCI: 00:04.0 scanning...
971 17:44:05.520831 scan_generic_bus for PCI: 00:04.0
972 17:44:05.520907 GENERIC: 0.0 enabled
973 17:44:05.526884 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
974 17:44:05.533822 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
975 17:44:05.533899 PCI: 00:0d.0 scanning...
976 17:44:05.536948 scan_static_bus for PCI: 00:0d.0
977 17:44:05.540130 USB0 port 0 enabled
978 17:44:05.543906 USB0 port 0 scanning...
979 17:44:05.546946 scan_static_bus for USB0 port 0
980 17:44:05.550136 USB3 port 0 enabled
981 17:44:05.550207 USB3 port 1 enabled
982 17:44:05.553409 USB3 port 2 disabled
983 17:44:05.553484 USB3 port 3 disabled
984 17:44:05.556878 USB3 port 0 scanning...
985 17:44:05.559879 scan_static_bus for USB3 port 0
986 17:44:05.563455 scan_static_bus for USB3 port 0 done
987 17:44:05.569883 scan_bus: bus USB3 port 0 finished in 6 msecs
988 17:44:05.573023 USB3 port 1 scanning...
989 17:44:05.577034 scan_static_bus for USB3 port 1
990 17:44:05.579864 scan_static_bus for USB3 port 1 done
991 17:44:05.582983 scan_bus: bus USB3 port 1 finished in 6 msecs
992 17:44:05.586601 scan_static_bus for USB0 port 0 done
993 17:44:05.592971 scan_bus: bus USB0 port 0 finished in 43 msecs
994 17:44:05.596012 scan_static_bus for PCI: 00:0d.0 done
995 17:44:05.599293 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 17:44:05.602966 PCI: 00:14.0 scanning...
997 17:44:05.605873 scan_static_bus for PCI: 00:14.0
998 17:44:05.609534 USB0 port 0 enabled
999 17:44:05.609606 USB0 port 0 scanning...
1000 17:44:05.612689 scan_static_bus for USB0 port 0
1001 17:44:05.616334 USB2 port 0 disabled
1002 17:44:05.619720 USB2 port 1 enabled
1003 17:44:05.619808 USB2 port 2 enabled
1004 17:44:05.622689 USB2 port 3 disabled
1005 17:44:05.625795 USB2 port 4 enabled
1006 17:44:05.625873 USB2 port 5 disabled
1007 17:44:05.629553 USB2 port 6 disabled
1008 17:44:05.632663 USB2 port 7 disabled
1009 17:44:05.632744 USB2 port 8 disabled
1010 17:44:05.635743 USB2 port 9 disabled
1011 17:44:05.638906 USB3 port 0 disabled
1012 17:44:05.638988 USB3 port 1 enabled
1013 17:44:05.642702 USB3 port 2 disabled
1014 17:44:05.646008 USB3 port 3 disabled
1015 17:44:05.646090 USB2 port 1 scanning...
1016 17:44:05.648982 scan_static_bus for USB2 port 1
1017 17:44:05.652091 scan_static_bus for USB2 port 1 done
1018 17:44:05.658819 scan_bus: bus USB2 port 1 finished in 6 msecs
1019 17:44:05.661917 USB2 port 2 scanning...
1020 17:44:05.665801 scan_static_bus for USB2 port 2
1021 17:44:05.668480 scan_static_bus for USB2 port 2 done
1022 17:44:05.671931 scan_bus: bus USB2 port 2 finished in 6 msecs
1023 17:44:05.675504 USB2 port 4 scanning...
1024 17:44:05.678426 scan_static_bus for USB2 port 4
1025 17:44:05.682061 scan_static_bus for USB2 port 4 done
1026 17:44:05.684991 scan_bus: bus USB2 port 4 finished in 6 msecs
1027 17:44:05.688643 USB3 port 1 scanning...
1028 17:44:05.691786 scan_static_bus for USB3 port 1
1029 17:44:05.694847 scan_static_bus for USB3 port 1 done
1030 17:44:05.701927 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 17:44:05.705190 scan_static_bus for USB0 port 0 done
1032 17:44:05.708268 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 17:44:05.711232 scan_static_bus for PCI: 00:14.0 done
1034 17:44:05.718014 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1035 17:44:05.721736 PCI: 00:14.3 scanning...
1036 17:44:05.724843 scan_static_bus for PCI: 00:14.3
1037 17:44:05.724950 GENERIC: 0.0 enabled
1038 17:44:05.731075 scan_static_bus for PCI: 00:14.3 done
1039 17:44:05.734723 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1040 17:44:05.738253 PCI: 00:15.0 scanning...
1041 17:44:05.741333 scan_static_bus for PCI: 00:15.0
1042 17:44:05.741444 I2C: 00:1a enabled
1043 17:44:05.744636 I2C: 00:31 enabled
1044 17:44:05.747974 I2C: 00:32 enabled
1045 17:44:05.750940 scan_static_bus for PCI: 00:15.0 done
1046 17:44:05.754269 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1047 17:44:05.757843 PCI: 00:15.1 scanning...
1048 17:44:05.760919 scan_static_bus for PCI: 00:15.1
1049 17:44:05.764195 I2C: 00:10 enabled
1050 17:44:05.767458 scan_static_bus for PCI: 00:15.1 done
1051 17:44:05.771405 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1052 17:44:05.774354 PCI: 00:15.2 scanning...
1053 17:44:05.777698 scan_static_bus for PCI: 00:15.2
1054 17:44:05.780908 scan_static_bus for PCI: 00:15.2 done
1055 17:44:05.788319 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1056 17:44:05.788401 PCI: 00:15.3 scanning...
1057 17:44:05.791684 scan_static_bus for PCI: 00:15.3
1058 17:44:05.797813 scan_static_bus for PCI: 00:15.3 done
1059 17:44:05.801581 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1060 17:44:05.804719 PCI: 00:19.1 scanning...
1061 17:44:05.807957 scan_static_bus for PCI: 00:19.1
1062 17:44:05.808039 I2C: 00:15 enabled
1063 17:44:05.814606 scan_static_bus for PCI: 00:19.1 done
1064 17:44:05.817563 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1065 17:44:05.821028 PCI: 00:1d.0 scanning...
1066 17:44:05.824645 do_pci_scan_bridge for PCI: 00:1d.0
1067 17:44:05.827888 PCI: pci_scan_bus for bus 01
1068 17:44:05.831044 PCI: 01:00.0 [1c5c/174a] enabled
1069 17:44:05.834185 GENERIC: 0.0 enabled
1070 17:44:05.837378 Enabling Common Clock Configuration
1071 17:44:05.841085 L1 Sub-State supported from root port 29
1072 17:44:05.844205 L1 Sub-State Support = 0xf
1073 17:44:05.847137 CommonModeRestoreTime = 0x28
1074 17:44:05.850876 Power On Value = 0x16, Power On Scale = 0x0
1075 17:44:05.853968 ASPM: Enabled L1
1076 17:44:05.857121 PCIe: Max_Payload_Size adjusted to 128
1077 17:44:05.860324 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1078 17:44:05.864009 PCI: 00:1e.2 scanning...
1079 17:44:05.867104 scan_generic_bus for PCI: 00:1e.2
1080 17:44:05.870304 SPI: 00 enabled
1081 17:44:05.873706 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1082 17:44:05.880075 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1083 17:44:05.883335 PCI: 00:1e.3 scanning...
1084 17:44:05.886912 scan_generic_bus for PCI: 00:1e.3
1085 17:44:05.886994 SPI: 00 enabled
1086 17:44:05.893251 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1087 17:44:05.899593 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1088 17:44:05.899676 PCI: 00:1f.0 scanning...
1089 17:44:05.903014 scan_static_bus for PCI: 00:1f.0
1090 17:44:05.906359 PNP: 0c09.0 enabled
1091 17:44:05.909478 PNP: 0c09.0 scanning...
1092 17:44:05.913087 scan_static_bus for PNP: 0c09.0
1093 17:44:05.916076 scan_static_bus for PNP: 0c09.0 done
1094 17:44:05.920014 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1095 17:44:05.925993 scan_static_bus for PCI: 00:1f.0 done
1096 17:44:05.929444 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1097 17:44:05.932911 PCI: 00:1f.2 scanning...
1098 17:44:05.935962 scan_static_bus for PCI: 00:1f.2
1099 17:44:05.939161 GENERIC: 0.0 enabled
1100 17:44:05.939259 GENERIC: 0.0 scanning...
1101 17:44:05.942395 scan_static_bus for GENERIC: 0.0
1102 17:44:05.946146 GENERIC: 0.0 enabled
1103 17:44:05.949469 GENERIC: 1.0 enabled
1104 17:44:05.952398 scan_static_bus for GENERIC: 0.0 done
1105 17:44:05.955875 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1106 17:44:05.958947 scan_static_bus for PCI: 00:1f.2 done
1107 17:44:05.965381 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1108 17:44:05.969256 PCI: 00:1f.3 scanning...
1109 17:44:05.972420 scan_static_bus for PCI: 00:1f.3
1110 17:44:05.975525 scan_static_bus for PCI: 00:1f.3 done
1111 17:44:05.978773 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1112 17:44:05.981894 PCI: 00:1f.5 scanning...
1113 17:44:05.985665 scan_generic_bus for PCI: 00:1f.5
1114 17:44:05.988747 scan_generic_bus for PCI: 00:1f.5 done
1115 17:44:05.995000 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1116 17:44:05.998186 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1117 17:44:06.001883 scan_static_bus for Root Device done
1118 17:44:06.008123 scan_bus: bus Root Device finished in 737 msecs
1119 17:44:06.008200 done
1120 17:44:06.015103 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1121 17:44:06.018584 Chrome EC: UHEPI supported
1122 17:44:06.024611 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1123 17:44:06.031367 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1124 17:44:06.034870 SPI flash protection: WPSW=1 SRP0=0
1125 17:44:06.038127 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1126 17:44:06.044474 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1127 17:44:06.047552 found VGA at PCI: 00:02.0
1128 17:44:06.051463 Setting up VGA for PCI: 00:02.0
1129 17:44:06.054425 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1130 17:44:06.061265 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1131 17:44:06.064297 Allocating resources...
1132 17:44:06.064398 Reading resources...
1133 17:44:06.071119 Root Device read_resources bus 0 link: 0
1134 17:44:06.074331 DOMAIN: 0000 read_resources bus 0 link: 0
1135 17:44:06.077349 PCI: 00:04.0 read_resources bus 1 link: 0
1136 17:44:06.084571 PCI: 00:04.0 read_resources bus 1 link: 0 done
1137 17:44:06.087559 PCI: 00:0d.0 read_resources bus 0 link: 0
1138 17:44:06.093892 USB0 port 0 read_resources bus 0 link: 0
1139 17:44:06.097806 USB0 port 0 read_resources bus 0 link: 0 done
1140 17:44:06.103964 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1141 17:44:06.107738 PCI: 00:14.0 read_resources bus 0 link: 0
1142 17:44:06.113828 USB0 port 0 read_resources bus 0 link: 0
1143 17:44:06.116983 USB0 port 0 read_resources bus 0 link: 0 done
1144 17:44:06.123819 PCI: 00:14.0 read_resources bus 0 link: 0 done
1145 17:44:06.127005 PCI: 00:14.3 read_resources bus 0 link: 0
1146 17:44:06.133708 PCI: 00:14.3 read_resources bus 0 link: 0 done
1147 17:44:06.136713 PCI: 00:15.0 read_resources bus 0 link: 0
1148 17:44:06.143443 PCI: 00:15.0 read_resources bus 0 link: 0 done
1149 17:44:06.146736 PCI: 00:15.1 read_resources bus 0 link: 0
1150 17:44:06.153459 PCI: 00:15.1 read_resources bus 0 link: 0 done
1151 17:44:06.156609 PCI: 00:19.1 read_resources bus 0 link: 0
1152 17:44:06.164212 PCI: 00:19.1 read_resources bus 0 link: 0 done
1153 17:44:06.167161 PCI: 00:1d.0 read_resources bus 1 link: 0
1154 17:44:06.174017 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1155 17:44:06.177057 PCI: 00:1e.2 read_resources bus 2 link: 0
1156 17:44:06.184181 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1157 17:44:06.187446 PCI: 00:1e.3 read_resources bus 3 link: 0
1158 17:44:06.193701 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1159 17:44:06.196841 PCI: 00:1f.0 read_resources bus 0 link: 0
1160 17:44:06.203868 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1161 17:44:06.206982 PCI: 00:1f.2 read_resources bus 0 link: 0
1162 17:44:06.209994 GENERIC: 0.0 read_resources bus 0 link: 0
1163 17:44:06.217349 GENERIC: 0.0 read_resources bus 0 link: 0 done
1164 17:44:06.220582 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1165 17:44:06.228173 DOMAIN: 0000 read_resources bus 0 link: 0 done
1166 17:44:06.231608 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1167 17:44:06.237948 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1168 17:44:06.240913 Root Device read_resources bus 0 link: 0 done
1169 17:44:06.244788 Done reading resources.
1170 17:44:06.251056 Show resources in subtree (Root Device)...After reading.
1171 17:44:06.254554 Root Device child on link 0 DOMAIN: 0000
1172 17:44:06.257497 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1173 17:44:06.267510 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1174 17:44:06.277206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1175 17:44:06.280830 PCI: 00:00.0
1176 17:44:06.290670 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1177 17:44:06.300058 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1178 17:44:06.307089 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1179 17:44:06.317133 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1180 17:44:06.326710 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1181 17:44:06.336795 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1182 17:44:06.346687 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1183 17:44:06.356311 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1184 17:44:06.366302 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1185 17:44:06.372655 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1186 17:44:06.382442 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1187 17:44:06.392457 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1188 17:44:06.402187 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1189 17:44:06.412567 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1190 17:44:06.418655 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1191 17:44:06.428646 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1192 17:44:06.438710 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1193 17:44:06.448297 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1194 17:44:06.458405 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1195 17:44:06.467978 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1196 17:44:06.471434 PCI: 00:02.0
1197 17:44:06.481493 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 17:44:06.490679 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1199 17:44:06.497424 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1200 17:44:06.504289 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1201 17:44:06.514172 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1202 17:44:06.514259 GENERIC: 0.0
1203 17:44:06.517422 PCI: 00:05.0
1204 17:44:06.527056 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 17:44:06.530346 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1206 17:44:06.533645 GENERIC: 0.0
1207 17:44:06.533761 PCI: 00:08.0
1208 17:44:06.543400 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 17:44:06.547105 PCI: 00:0a.0
1210 17:44:06.550267 PCI: 00:0d.0 child on link 0 USB0 port 0
1211 17:44:06.560290 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 17:44:06.566611 USB0 port 0 child on link 0 USB3 port 0
1213 17:44:06.566715 USB3 port 0
1214 17:44:06.569749 USB3 port 1
1215 17:44:06.569848 USB3 port 2
1216 17:44:06.572873 USB3 port 3
1217 17:44:06.576727 PCI: 00:14.0 child on link 0 USB0 port 0
1218 17:44:06.586608 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 17:44:06.592944 USB0 port 0 child on link 0 USB2 port 0
1220 17:44:06.593049 USB2 port 0
1221 17:44:06.596313 USB2 port 1
1222 17:44:06.596421 USB2 port 2
1223 17:44:06.599514 USB2 port 3
1224 17:44:06.599621 USB2 port 4
1225 17:44:06.602836 USB2 port 5
1226 17:44:06.602915 USB2 port 6
1227 17:44:06.605903 USB2 port 7
1228 17:44:06.605980 USB2 port 8
1229 17:44:06.609726 USB2 port 9
1230 17:44:06.609832 USB3 port 0
1231 17:44:06.612918 USB3 port 1
1232 17:44:06.615542 USB3 port 2
1233 17:44:06.615616 USB3 port 3
1234 17:44:06.619290 PCI: 00:14.2
1235 17:44:06.629149 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1236 17:44:06.639081 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1237 17:44:06.642344 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1238 17:44:06.652051 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1239 17:44:06.655512 GENERIC: 0.0
1240 17:44:06.658584 PCI: 00:15.0 child on link 0 I2C: 00:1a
1241 17:44:06.668777 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 17:44:06.668896 I2C: 00:1a
1243 17:44:06.671886 I2C: 00:31
1244 17:44:06.671997 I2C: 00:32
1245 17:44:06.678083 PCI: 00:15.1 child on link 0 I2C: 00:10
1246 17:44:06.688254 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 17:44:06.688368 I2C: 00:10
1248 17:44:06.691386 PCI: 00:15.2
1249 17:44:06.701476 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 17:44:06.701584 PCI: 00:15.3
1251 17:44:06.711324 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 17:44:06.714531 PCI: 00:16.0
1253 17:44:06.724109 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 17:44:06.724220 PCI: 00:19.0
1255 17:44:06.730948 PCI: 00:19.1 child on link 0 I2C: 00:15
1256 17:44:06.740819 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 17:44:06.740923 I2C: 00:15
1258 17:44:06.743921 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1259 17:44:06.753884 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1260 17:44:06.763627 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1261 17:44:06.773781 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1262 17:44:06.773885 GENERIC: 0.0
1263 17:44:06.776742 PCI: 01:00.0
1264 17:44:06.786903 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1265 17:44:06.796463 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1266 17:44:06.806498 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1267 17:44:06.806602 PCI: 00:1e.0
1268 17:44:06.819817 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1269 17:44:06.822603 PCI: 00:1e.2 child on link 0 SPI: 00
1270 17:44:06.832768 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1271 17:44:06.832856 SPI: 00
1272 17:44:06.836375 PCI: 00:1e.3 child on link 0 SPI: 00
1273 17:44:06.845811 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1274 17:44:06.848794 SPI: 00
1275 17:44:06.852499 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1276 17:44:06.862599 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1277 17:44:06.862683 PNP: 0c09.0
1278 17:44:06.872471 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1279 17:44:06.875757 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1280 17:44:06.885359 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1281 17:44:06.895386 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1282 17:44:06.898562 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1283 17:44:06.901825 GENERIC: 0.0
1284 17:44:06.904876 GENERIC: 1.0
1285 17:44:06.904959 PCI: 00:1f.3
1286 17:44:06.914925 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1287 17:44:06.924989 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1288 17:44:06.928262 PCI: 00:1f.5
1289 17:44:06.934938 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1290 17:44:06.941520 CPU_CLUSTER: 0 child on link 0 APIC: 00
1291 17:44:06.941623 APIC: 00
1292 17:44:06.941717 APIC: 01
1293 17:44:06.944718 APIC: 03
1294 17:44:06.944817 APIC: 07
1295 17:44:06.947896 APIC: 05
1296 17:44:06.947997 APIC: 04
1297 17:44:06.948087 APIC: 02
1298 17:44:06.951111 APIC: 06
1299 17:44:06.958078 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1300 17:44:06.964471 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1301 17:44:06.971163 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1302 17:44:06.977278 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1303 17:44:06.981044 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1304 17:44:06.984225 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1305 17:44:06.987464 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1306 17:44:06.997099 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1307 17:44:07.003811 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1308 17:44:07.010202 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1309 17:44:07.016815 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1310 17:44:07.023543 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1311 17:44:07.033606 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1312 17:44:07.039821 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1313 17:44:07.046581 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1314 17:44:07.049585 DOMAIN: 0000: Resource ranges:
1315 17:44:07.053182 * Base: 1000, Size: 800, Tag: 100
1316 17:44:07.056196 * Base: 1900, Size: e700, Tag: 100
1317 17:44:07.063228 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1318 17:44:07.069402 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1319 17:44:07.076578 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1320 17:44:07.082524 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1321 17:44:07.092802 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1322 17:44:07.099746 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1323 17:44:07.105762 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1324 17:44:07.115641 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1325 17:44:07.122676 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1326 17:44:07.128952 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1327 17:44:07.139099 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1328 17:44:07.145326 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1329 17:44:07.152151 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1330 17:44:07.161953 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1331 17:44:07.168435 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1332 17:44:07.174879 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1333 17:44:07.185133 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1334 17:44:07.191683 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1335 17:44:07.198304 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1336 17:44:07.208147 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1337 17:44:07.214729 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1338 17:44:07.220988 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1339 17:44:07.231095 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1340 17:44:07.238068 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1341 17:44:07.244372 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1342 17:44:07.247499 DOMAIN: 0000: Resource ranges:
1343 17:44:07.254597 * Base: 7fc00000, Size: 40400000, Tag: 200
1344 17:44:07.257762 * Base: d0000000, Size: 28000000, Tag: 200
1345 17:44:07.260796 * Base: fa000000, Size: 1000000, Tag: 200
1346 17:44:07.267471 * Base: fb001000, Size: 2fff000, Tag: 200
1347 17:44:07.271148 * Base: fe010000, Size: 2e000, Tag: 200
1348 17:44:07.274317 * Base: fe03f000, Size: d41000, Tag: 200
1349 17:44:07.277545 * Base: fed88000, Size: 8000, Tag: 200
1350 17:44:07.283909 * Base: fed93000, Size: d000, Tag: 200
1351 17:44:07.287368 * Base: feda2000, Size: 1e000, Tag: 200
1352 17:44:07.290441 * Base: fede0000, Size: 1220000, Tag: 200
1353 17:44:07.297182 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 17:44:07.304271 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 17:44:07.310746 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 17:44:07.317158 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 17:44:07.323879 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 17:44:07.330419 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 17:44:07.337248 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 17:44:07.343876 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 17:44:07.350095 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 17:44:07.357047 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 17:44:07.363388 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 17:44:07.370042 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 17:44:07.376879 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 17:44:07.383258 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 17:44:07.390324 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 17:44:07.396365 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 17:44:07.403296 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 17:44:07.409754 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 17:44:07.416588 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 17:44:07.422690 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 17:44:07.429369 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 17:44:07.436348 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 17:44:07.442586 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 17:44:07.449561 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 17:44:07.459522 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 17:44:07.462676 PCI: 00:1d.0: Resource ranges:
1379 17:44:07.465932 * Base: 7fc00000, Size: 100000, Tag: 200
1380 17:44:07.472269 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 17:44:07.478971 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 17:44:07.485667 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 17:44:07.491901 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 17:44:07.501861 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 17:44:07.505197 Root Device assign_resources, bus 0 link: 0
1386 17:44:07.508931 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 17:44:07.518938 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 17:44:07.525462 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 17:44:07.535388 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 17:44:07.541511 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 17:44:07.548155 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 17:44:07.551410 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 17:44:07.561201 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 17:44:07.568075 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 17:44:07.578207 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 17:44:07.581600 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 17:44:07.584411 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 17:44:07.594153 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 17:44:07.597856 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 17:44:07.604485 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 17:44:07.610757 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 17:44:07.620619 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 17:44:07.627466 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 17:44:07.630740 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 17:44:07.637798 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 17:44:07.644220 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 17:44:07.650952 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 17:44:07.654092 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 17:44:07.664120 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 17:44:07.667043 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 17:44:07.670681 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 17:44:07.680412 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 17:44:07.687414 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 17:44:07.697052 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 17:44:07.703768 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 17:44:07.709811 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 17:44:07.713726 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 17:44:07.723155 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 17:44:07.733022 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 17:44:07.739535 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 17:44:07.746272 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 17:44:07.753061 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 17:44:07.763349 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 17:44:07.769551 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 17:44:07.776169 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 17:44:07.782751 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 17:44:07.785667 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 17:44:07.792745 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 17:44:07.798887 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 17:44:07.805823 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 17:44:07.808842 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 17:44:07.815577 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 17:44:07.819187 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 17:44:07.825447 LPC: Trying to open IO window from 800 size 1ff
1435 17:44:07.831704 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 17:44:07.841759 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 17:44:07.848393 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 17:44:07.855264 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 17:44:07.858497 Root Device assign_resources, bus 0 link: 0
1440 17:44:07.861677 Done setting resources.
1441 17:44:07.868179 Show resources in subtree (Root Device)...After assigning values.
1442 17:44:07.871652 Root Device child on link 0 DOMAIN: 0000
1443 17:44:07.874826 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 17:44:07.884648 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 17:44:07.895046 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 17:44:07.897921 PCI: 00:00.0
1447 17:44:07.904798 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 17:44:07.914443 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 17:44:07.924483 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 17:44:07.933894 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 17:44:07.943959 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 17:44:07.954096 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 17:44:07.963689 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 17:44:07.970527 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 17:44:07.980753 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 17:44:07.990439 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 17:44:08.000365 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 17:44:08.009832 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 17:44:08.019944 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 17:44:08.026351 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 17:44:08.036381 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 17:44:08.046730 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 17:44:08.056547 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 17:44:08.066292 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1465 17:44:08.076136 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1466 17:44:08.086144 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1467 17:44:08.086229 PCI: 00:02.0
1468 17:44:08.095803 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1469 17:44:08.109350 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1470 17:44:08.115759 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1471 17:44:08.122136 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1472 17:44:08.131979 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1473 17:44:08.132065 GENERIC: 0.0
1474 17:44:08.135419 PCI: 00:05.0
1475 17:44:08.144895 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1476 17:44:08.151930 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1477 17:44:08.152020 GENERIC: 0.0
1478 17:44:08.154973 PCI: 00:08.0
1479 17:44:08.164804 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1480 17:44:08.164888 PCI: 00:0a.0
1481 17:44:08.171669 PCI: 00:0d.0 child on link 0 USB0 port 0
1482 17:44:08.181554 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1483 17:44:08.184668 USB0 port 0 child on link 0 USB3 port 0
1484 17:44:08.188525 USB3 port 0
1485 17:44:08.188607 USB3 port 1
1486 17:44:08.191799 USB3 port 2
1487 17:44:08.191882 USB3 port 3
1488 17:44:08.197778 PCI: 00:14.0 child on link 0 USB0 port 0
1489 17:44:08.207967 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1490 17:44:08.211557 USB0 port 0 child on link 0 USB2 port 0
1491 17:44:08.214555 USB2 port 0
1492 17:44:08.214637 USB2 port 1
1493 17:44:08.217698 USB2 port 2
1494 17:44:08.217769 USB2 port 3
1495 17:44:08.220909 USB2 port 4
1496 17:44:08.220991 USB2 port 5
1497 17:44:08.224306 USB2 port 6
1498 17:44:08.224389 USB2 port 7
1499 17:44:08.227874 USB2 port 8
1500 17:44:08.227956 USB2 port 9
1501 17:44:08.231038 USB3 port 0
1502 17:44:08.234367 USB3 port 1
1503 17:44:08.234450 USB3 port 2
1504 17:44:08.237408 USB3 port 3
1505 17:44:08.237490 PCI: 00:14.2
1506 17:44:08.247430 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1507 17:44:08.257123 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1508 17:44:08.263982 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1509 17:44:08.273521 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1510 17:44:08.273607 GENERIC: 0.0
1511 17:44:08.280421 PCI: 00:15.0 child on link 0 I2C: 00:1a
1512 17:44:08.290015 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1513 17:44:08.290099 I2C: 00:1a
1514 17:44:08.293749 I2C: 00:31
1515 17:44:08.293832 I2C: 00:32
1516 17:44:08.300080 PCI: 00:15.1 child on link 0 I2C: 00:10
1517 17:44:08.310148 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1518 17:44:08.310232 I2C: 00:10
1519 17:44:08.313276 PCI: 00:15.2
1520 17:44:08.323237 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1521 17:44:08.323322 PCI: 00:15.3
1522 17:44:08.333439 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1523 17:44:08.336511 PCI: 00:16.0
1524 17:44:08.346459 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1525 17:44:08.349583 PCI: 00:19.0
1526 17:44:08.352763 PCI: 00:19.1 child on link 0 I2C: 00:15
1527 17:44:08.362625 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1528 17:44:08.366406 I2C: 00:15
1529 17:44:08.369455 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1530 17:44:08.379225 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1531 17:44:08.389228 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1532 17:44:08.398710 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1533 17:44:08.402155 GENERIC: 0.0
1534 17:44:08.405768 PCI: 01:00.0
1535 17:44:08.415626 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1536 17:44:08.425571 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1537 17:44:08.435109 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1538 17:44:08.438288 PCI: 00:1e.0
1539 17:44:08.448434 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1540 17:44:08.452207 PCI: 00:1e.2 child on link 0 SPI: 00
1541 17:44:08.461604 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1542 17:44:08.464799 SPI: 00
1543 17:44:08.468434 PCI: 00:1e.3 child on link 0 SPI: 00
1544 17:44:08.477968 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1545 17:44:08.478051 SPI: 00
1546 17:44:08.484967 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1547 17:44:08.491248 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1548 17:44:08.494541 PNP: 0c09.0
1549 17:44:08.501328 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1550 17:44:08.507806 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1551 17:44:08.517573 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1552 17:44:08.527509 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1553 17:44:08.531244 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1554 17:44:08.531328 GENERIC: 0.0
1555 17:44:08.534133 GENERIC: 1.0
1556 17:44:08.537266 PCI: 00:1f.3
1557 17:44:08.547472 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1558 17:44:08.557439 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1559 17:44:08.557523 PCI: 00:1f.5
1560 17:44:08.570585 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1561 17:44:08.573599 CPU_CLUSTER: 0 child on link 0 APIC: 00
1562 17:44:08.573672 APIC: 00
1563 17:44:08.576827 APIC: 01
1564 17:44:08.576909 APIC: 03
1565 17:44:08.576974 APIC: 07
1566 17:44:08.580615 APIC: 05
1567 17:44:08.580698 APIC: 04
1568 17:44:08.580762 APIC: 02
1569 17:44:08.583831 APIC: 06
1570 17:44:08.586987 Done allocating resources.
1571 17:44:08.593547 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1572 17:44:08.596640 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1573 17:44:08.603243 Configure GPIOs for I2S audio on UP4.
1574 17:44:08.610098 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1575 17:44:08.610182 Enabling resources...
1576 17:44:08.616625 PCI: 00:00.0 subsystem <- 8086/9a12
1577 17:44:08.616711 PCI: 00:00.0 cmd <- 06
1578 17:44:08.619891 PCI: 00:02.0 subsystem <- 8086/9a40
1579 17:44:08.622949 PCI: 00:02.0 cmd <- 03
1580 17:44:08.626630 PCI: 00:04.0 subsystem <- 8086/9a03
1581 17:44:08.629634 PCI: 00:04.0 cmd <- 02
1582 17:44:08.632906 PCI: 00:05.0 subsystem <- 8086/9a19
1583 17:44:08.636544 PCI: 00:05.0 cmd <- 02
1584 17:44:08.639691 PCI: 00:08.0 subsystem <- 8086/9a11
1585 17:44:08.643047 PCI: 00:08.0 cmd <- 06
1586 17:44:08.645997 PCI: 00:0d.0 subsystem <- 8086/9a13
1587 17:44:08.649192 PCI: 00:0d.0 cmd <- 02
1588 17:44:08.652901 PCI: 00:14.0 subsystem <- 8086/a0ed
1589 17:44:08.655934 PCI: 00:14.0 cmd <- 02
1590 17:44:08.659203 PCI: 00:14.2 subsystem <- 8086/a0ef
1591 17:44:08.663004 PCI: 00:14.2 cmd <- 02
1592 17:44:08.666135 PCI: 00:14.3 subsystem <- 8086/a0f0
1593 17:44:08.666219 PCI: 00:14.3 cmd <- 02
1594 17:44:08.672538 PCI: 00:15.0 subsystem <- 8086/a0e8
1595 17:44:08.672621 PCI: 00:15.0 cmd <- 02
1596 17:44:08.676036 PCI: 00:15.1 subsystem <- 8086/a0e9
1597 17:44:08.679212 PCI: 00:15.1 cmd <- 02
1598 17:44:08.682395 PCI: 00:15.2 subsystem <- 8086/a0ea
1599 17:44:08.685711 PCI: 00:15.2 cmd <- 02
1600 17:44:08.688790 PCI: 00:15.3 subsystem <- 8086/a0eb
1601 17:44:08.691952 PCI: 00:15.3 cmd <- 02
1602 17:44:08.695703 PCI: 00:16.0 subsystem <- 8086/a0e0
1603 17:44:08.698941 PCI: 00:16.0 cmd <- 02
1604 17:44:08.702175 PCI: 00:19.1 subsystem <- 8086/a0c6
1605 17:44:08.705175 PCI: 00:19.1 cmd <- 02
1606 17:44:08.708915 PCI: 00:1d.0 bridge ctrl <- 0013
1607 17:44:08.712396 PCI: 00:1d.0 subsystem <- 8086/a0b0
1608 17:44:08.715436 PCI: 00:1d.0 cmd <- 06
1609 17:44:08.718425 PCI: 00:1e.0 subsystem <- 8086/a0a8
1610 17:44:08.718507 PCI: 00:1e.0 cmd <- 06
1611 17:44:08.725509 PCI: 00:1e.2 subsystem <- 8086/a0aa
1612 17:44:08.725592 PCI: 00:1e.2 cmd <- 06
1613 17:44:08.728701 PCI: 00:1e.3 subsystem <- 8086/a0ab
1614 17:44:08.732111 PCI: 00:1e.3 cmd <- 02
1615 17:44:08.735391 PCI: 00:1f.0 subsystem <- 8086/a087
1616 17:44:08.738400 PCI: 00:1f.0 cmd <- 407
1617 17:44:08.742279 PCI: 00:1f.3 subsystem <- 8086/a0c8
1618 17:44:08.745253 PCI: 00:1f.3 cmd <- 02
1619 17:44:08.748796 PCI: 00:1f.5 subsystem <- 8086/a0a4
1620 17:44:08.751570 PCI: 00:1f.5 cmd <- 406
1621 17:44:08.755903 PCI: 01:00.0 cmd <- 02
1622 17:44:08.760660 done.
1623 17:44:08.763808 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1624 17:44:08.767026 Initializing devices...
1625 17:44:08.769889 Root Device init
1626 17:44:08.773784 Chrome EC: Set SMI mask to 0x0000000000000000
1627 17:44:08.780071 Chrome EC: clear events_b mask to 0x0000000000000000
1628 17:44:08.787074 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1629 17:44:08.793422 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1630 17:44:08.799841 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1631 17:44:08.803552 Chrome EC: Set WAKE mask to 0x0000000000000000
1632 17:44:08.811370 fw_config match found: DB_USB=USB3_ACTIVE
1633 17:44:08.814403 Configure Right Type-C port orientation for retimer
1634 17:44:08.817573 Root Device init finished in 46 msecs
1635 17:44:08.822213 PCI: 00:00.0 init
1636 17:44:08.825323 CPU TDP = 9 Watts
1637 17:44:08.828538 CPU PL1 = 9 Watts
1638 17:44:08.828619 CPU PL2 = 40 Watts
1639 17:44:08.831617 CPU PL4 = 83 Watts
1640 17:44:08.835096 PCI: 00:00.0 init finished in 8 msecs
1641 17:44:08.838572 PCI: 00:02.0 init
1642 17:44:08.838652 GMA: Found VBT in CBFS
1643 17:44:08.841744 GMA: Found valid VBT in CBFS
1644 17:44:08.848172 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1645 17:44:08.854599 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1646 17:44:08.858381 PCI: 00:02.0 init finished in 18 msecs
1647 17:44:08.861376 PCI: 00:05.0 init
1648 17:44:08.864842 PCI: 00:05.0 init finished in 0 msecs
1649 17:44:08.868197 PCI: 00:08.0 init
1650 17:44:08.871543 PCI: 00:08.0 init finished in 0 msecs
1651 17:44:08.874549 PCI: 00:14.0 init
1652 17:44:08.878377 PCI: 00:14.0 init finished in 0 msecs
1653 17:44:08.881366 PCI: 00:14.2 init
1654 17:44:08.884521 PCI: 00:14.2 init finished in 0 msecs
1655 17:44:08.887673 PCI: 00:15.0 init
1656 17:44:08.890909 I2C bus 0 version 0x3230302a
1657 17:44:08.894712 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1658 17:44:08.897881 PCI: 00:15.0 init finished in 6 msecs
1659 17:44:08.901041 PCI: 00:15.1 init
1660 17:44:08.901121 I2C bus 1 version 0x3230302a
1661 17:44:08.907932 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1662 17:44:08.911173 PCI: 00:15.1 init finished in 6 msecs
1663 17:44:08.911254 PCI: 00:15.2 init
1664 17:44:08.914418 I2C bus 2 version 0x3230302a
1665 17:44:08.917428 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1666 17:44:08.920723 PCI: 00:15.2 init finished in 6 msecs
1667 17:44:08.924370 PCI: 00:15.3 init
1668 17:44:08.927662 I2C bus 3 version 0x3230302a
1669 17:44:08.930857 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1670 17:44:08.934893 PCI: 00:15.3 init finished in 6 msecs
1671 17:44:08.937846 PCI: 00:16.0 init
1672 17:44:08.940831 PCI: 00:16.0 init finished in 0 msecs
1673 17:44:08.944061 PCI: 00:19.1 init
1674 17:44:08.947836 I2C bus 5 version 0x3230302a
1675 17:44:08.950929 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1676 17:44:08.954344 PCI: 00:19.1 init finished in 6 msecs
1677 17:44:08.957526 PCI: 00:1d.0 init
1678 17:44:08.960824 Initializing PCH PCIe bridge.
1679 17:44:08.964048 PCI: 00:1d.0 init finished in 3 msecs
1680 17:44:08.967373 PCI: 00:1f.0 init
1681 17:44:08.970682 IOAPIC: Initializing IOAPIC at 0xfec00000
1682 17:44:08.974240 IOAPIC: Bootstrap Processor Local APIC = 0x00
1683 17:44:08.977191 IOAPIC: ID = 0x02
1684 17:44:08.980493 IOAPIC: Dumping registers
1685 17:44:08.980575 reg 0x0000: 0x02000000
1686 17:44:08.983910 reg 0x0001: 0x00770020
1687 17:44:08.987502 reg 0x0002: 0x00000000
1688 17:44:08.990279 PCI: 00:1f.0 init finished in 21 msecs
1689 17:44:08.993604 PCI: 00:1f.2 init
1690 17:44:08.997280 Disabling ACPI via APMC.
1691 17:44:09.000452 APMC done.
1692 17:44:09.003713 PCI: 00:1f.2 init finished in 5 msecs
1693 17:44:09.014385 PCI: 01:00.0 init
1694 17:44:09.017674 PCI: 01:00.0 init finished in 0 msecs
1695 17:44:09.021449 PNP: 0c09.0 init
1696 17:44:09.024735 Google Chrome EC uptime: 8.351 seconds
1697 17:44:09.031633 Google Chrome AP resets since EC boot: 1
1698 17:44:09.034584 Google Chrome most recent AP reset causes:
1699 17:44:09.037586 0.346: 32775 shutdown: entering G3
1700 17:44:09.044544 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1701 17:44:09.047785 PNP: 0c09.0 init finished in 22 msecs
1702 17:44:09.053611 Devices initialized
1703 17:44:09.056837 Show all devs... After init.
1704 17:44:09.060338 Root Device: enabled 1
1705 17:44:09.060430 DOMAIN: 0000: enabled 1
1706 17:44:09.063446 CPU_CLUSTER: 0: enabled 1
1707 17:44:09.067013 PCI: 00:00.0: enabled 1
1708 17:44:09.069970 PCI: 00:02.0: enabled 1
1709 17:44:09.070045 PCI: 00:04.0: enabled 1
1710 17:44:09.073719 PCI: 00:05.0: enabled 1
1711 17:44:09.076486 PCI: 00:06.0: enabled 0
1712 17:44:09.079909 PCI: 00:07.0: enabled 0
1713 17:44:09.079980 PCI: 00:07.1: enabled 0
1714 17:44:09.083326 PCI: 00:07.2: enabled 0
1715 17:44:09.086317 PCI: 00:07.3: enabled 0
1716 17:44:09.089762 PCI: 00:08.0: enabled 1
1717 17:44:09.089844 PCI: 00:09.0: enabled 0
1718 17:44:09.093474 PCI: 00:0a.0: enabled 0
1719 17:44:09.096570 PCI: 00:0d.0: enabled 1
1720 17:44:09.100137 PCI: 00:0d.1: enabled 0
1721 17:44:09.100218 PCI: 00:0d.2: enabled 0
1722 17:44:09.102787 PCI: 00:0d.3: enabled 0
1723 17:44:09.106285 PCI: 00:0e.0: enabled 0
1724 17:44:09.109950 PCI: 00:10.2: enabled 1
1725 17:44:09.110032 PCI: 00:10.6: enabled 0
1726 17:44:09.112959 PCI: 00:10.7: enabled 0
1727 17:44:09.116205 PCI: 00:12.0: enabled 0
1728 17:44:09.119406 PCI: 00:12.6: enabled 0
1729 17:44:09.119487 PCI: 00:13.0: enabled 0
1730 17:44:09.123168 PCI: 00:14.0: enabled 1
1731 17:44:09.126652 PCI: 00:14.1: enabled 0
1732 17:44:09.126742 PCI: 00:14.2: enabled 1
1733 17:44:09.129640 PCI: 00:14.3: enabled 1
1734 17:44:09.132742 PCI: 00:15.0: enabled 1
1735 17:44:09.135956 PCI: 00:15.1: enabled 1
1736 17:44:09.136041 PCI: 00:15.2: enabled 1
1737 17:44:09.139790 PCI: 00:15.3: enabled 1
1738 17:44:09.142579 PCI: 00:16.0: enabled 1
1739 17:44:09.146275 PCI: 00:16.1: enabled 0
1740 17:44:09.146360 PCI: 00:16.2: enabled 0
1741 17:44:09.149489 PCI: 00:16.3: enabled 0
1742 17:44:09.152808 PCI: 00:16.4: enabled 0
1743 17:44:09.155832 PCI: 00:16.5: enabled 0
1744 17:44:09.155917 PCI: 00:17.0: enabled 0
1745 17:44:09.159546 PCI: 00:19.0: enabled 0
1746 17:44:09.162703 PCI: 00:19.1: enabled 1
1747 17:44:09.165951 PCI: 00:19.2: enabled 0
1748 17:44:09.166036 PCI: 00:1c.0: enabled 1
1749 17:44:09.169029 PCI: 00:1c.1: enabled 0
1750 17:44:09.172768 PCI: 00:1c.2: enabled 0
1751 17:44:09.172853 PCI: 00:1c.3: enabled 0
1752 17:44:09.176004 PCI: 00:1c.4: enabled 0
1753 17:44:09.179030 PCI: 00:1c.5: enabled 0
1754 17:44:09.182720 PCI: 00:1c.6: enabled 1
1755 17:44:09.182852 PCI: 00:1c.7: enabled 0
1756 17:44:09.185583 PCI: 00:1d.0: enabled 1
1757 17:44:09.189194 PCI: 00:1d.1: enabled 0
1758 17:44:09.192133 PCI: 00:1d.2: enabled 1
1759 17:44:09.192219 PCI: 00:1d.3: enabled 0
1760 17:44:09.195631 PCI: 00:1e.0: enabled 1
1761 17:44:09.198836 PCI: 00:1e.1: enabled 0
1762 17:44:09.202355 PCI: 00:1e.2: enabled 1
1763 17:44:09.202441 PCI: 00:1e.3: enabled 1
1764 17:44:09.205690 PCI: 00:1f.0: enabled 1
1765 17:44:09.208612 PCI: 00:1f.1: enabled 0
1766 17:44:09.212399 PCI: 00:1f.2: enabled 1
1767 17:44:09.212485 PCI: 00:1f.3: enabled 1
1768 17:44:09.215256 PCI: 00:1f.4: enabled 0
1769 17:44:09.218953 PCI: 00:1f.5: enabled 1
1770 17:44:09.222135 PCI: 00:1f.6: enabled 0
1771 17:44:09.222215 PCI: 00:1f.7: enabled 0
1772 17:44:09.225130 APIC: 00: enabled 1
1773 17:44:09.228682 GENERIC: 0.0: enabled 1
1774 17:44:09.228762 GENERIC: 0.0: enabled 1
1775 17:44:09.231793 GENERIC: 1.0: enabled 1
1776 17:44:09.235000 GENERIC: 0.0: enabled 1
1777 17:44:09.238170 GENERIC: 1.0: enabled 1
1778 17:44:09.238250 USB0 port 0: enabled 1
1779 17:44:09.241382 GENERIC: 0.0: enabled 1
1780 17:44:09.245139 USB0 port 0: enabled 1
1781 17:44:09.248161 GENERIC: 0.0: enabled 1
1782 17:44:09.248242 I2C: 00:1a: enabled 1
1783 17:44:09.251672 I2C: 00:31: enabled 1
1784 17:44:09.254865 I2C: 00:32: enabled 1
1785 17:44:09.254946 I2C: 00:10: enabled 1
1786 17:44:09.258065 I2C: 00:15: enabled 1
1787 17:44:09.261312 GENERIC: 0.0: enabled 0
1788 17:44:09.261392 GENERIC: 1.0: enabled 0
1789 17:44:09.264907 GENERIC: 0.0: enabled 1
1790 17:44:09.268025 SPI: 00: enabled 1
1791 17:44:09.268106 SPI: 00: enabled 1
1792 17:44:09.271692 PNP: 0c09.0: enabled 1
1793 17:44:09.274840 GENERIC: 0.0: enabled 1
1794 17:44:09.277807 USB3 port 0: enabled 1
1795 17:44:09.277888 USB3 port 1: enabled 1
1796 17:44:09.280947 USB3 port 2: enabled 0
1797 17:44:09.284092 USB3 port 3: enabled 0
1798 17:44:09.284173 USB2 port 0: enabled 0
1799 17:44:09.287289 USB2 port 1: enabled 1
1800 17:44:09.291036 USB2 port 2: enabled 1
1801 17:44:09.294050 USB2 port 3: enabled 0
1802 17:44:09.294130 USB2 port 4: enabled 1
1803 17:44:09.297277 USB2 port 5: enabled 0
1804 17:44:09.300810 USB2 port 6: enabled 0
1805 17:44:09.300890 USB2 port 7: enabled 0
1806 17:44:09.304321 USB2 port 8: enabled 0
1807 17:44:09.307331 USB2 port 9: enabled 0
1808 17:44:09.311108 USB3 port 0: enabled 0
1809 17:44:09.311194 USB3 port 1: enabled 1
1810 17:44:09.313586 USB3 port 2: enabled 0
1811 17:44:09.316989 USB3 port 3: enabled 0
1812 17:44:09.317074 GENERIC: 0.0: enabled 1
1813 17:44:09.320596 GENERIC: 1.0: enabled 1
1814 17:44:09.323793 APIC: 01: enabled 1
1815 17:44:09.323881 APIC: 03: enabled 1
1816 17:44:09.326834 APIC: 07: enabled 1
1817 17:44:09.330453 APIC: 05: enabled 1
1818 17:44:09.330538 APIC: 04: enabled 1
1819 17:44:09.333665 APIC: 02: enabled 1
1820 17:44:09.336955 APIC: 06: enabled 1
1821 17:44:09.337041 PCI: 01:00.0: enabled 1
1822 17:44:09.343835 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1823 17:44:09.346966 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1824 17:44:09.353311 ELOG: NV offset 0xf30000 size 0x1000
1825 17:44:09.359822 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1826 17:44:09.366699 ELOG: Event(17) added with size 13 at 2023-10-20 17:44:09 UTC
1827 17:44:09.373405 ELOG: Event(92) added with size 9 at 2023-10-20 17:44:09 UTC
1828 17:44:09.379666 ELOG: Event(93) added with size 9 at 2023-10-20 17:44:09 UTC
1829 17:44:09.386515 ELOG: Event(9E) added with size 10 at 2023-10-20 17:44:09 UTC
1830 17:44:09.392653 ELOG: Event(16) added with size 11 at 2023-10-20 17:44:09 UTC
1831 17:44:09.396379 Erasing flash addr f30000 + 4 KiB
1832 17:44:09.454125 ELOG: Event(9F) added with size 14 at 2023-10-20 17:44:09 UTC
1833 17:44:09.460568 BS: BS_DEV_INIT exit times (exec / console): 32 / 55 ms
1834 17:44:09.467296 ELOG: Event(A1) added with size 10 at 2023-10-20 17:44:09 UTC
1835 17:44:09.473904 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1836 17:44:09.480381 ELOG: Event(A0) added with size 9 at 2023-10-20 17:44:10 UTC
1837 17:44:09.484083 elog_add_boot_reason: Logged dev mode boot
1838 17:44:09.490112 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1839 17:44:09.493389 Finalize devices...
1840 17:44:09.493475 Devices finalized
1841 17:44:09.500395 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1842 17:44:09.506660 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1843 17:44:09.509690 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1844 17:44:09.516496 ME: HFSTS1 : 0x80030055
1845 17:44:09.520127 ME: HFSTS2 : 0x30280116
1846 17:44:09.526621 ME: HFSTS3 : 0x00000050
1847 17:44:09.530326 ME: HFSTS4 : 0x00004000
1848 17:44:09.532965 ME: HFSTS5 : 0x00000000
1849 17:44:09.539828 ME: HFSTS6 : 0x00400006
1850 17:44:09.543091 ME: Manufacturing Mode : YES
1851 17:44:09.546546 ME: SPI Protection Mode Enabled : NO
1852 17:44:09.549674 ME: FW Partition Table : OK
1853 17:44:09.552784 ME: Bringup Loader Failure : NO
1854 17:44:09.556626 ME: Firmware Init Complete : NO
1855 17:44:09.559871 ME: Boot Options Present : NO
1856 17:44:09.566201 ME: Update In Progress : NO
1857 17:44:09.569396 ME: D0i3 Support : YES
1858 17:44:09.573037 ME: Low Power State Enabled : NO
1859 17:44:09.575876 ME: CPU Replaced : YES
1860 17:44:09.579758 ME: CPU Replacement Valid : YES
1861 17:44:09.582638 ME: Current Working State : 5
1862 17:44:09.585823 ME: Current Operation State : 1
1863 17:44:09.588943 ME: Current Operation Mode : 3
1864 17:44:09.595841 ME: Error Code : 0
1865 17:44:09.598868 ME: Enhanced Debug Mode : NO
1866 17:44:09.602722 ME: CPU Debug Disabled : YES
1867 17:44:09.605753 ME: TXT Support : NO
1868 17:44:09.612756 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1869 17:44:09.618859 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1870 17:44:09.621969 CBFS: 'fallback/slic' not found.
1871 17:44:09.625826 ACPI: Writing ACPI tables at 76b01000.
1872 17:44:09.628919 ACPI: * FACS
1873 17:44:09.629004 ACPI: * DSDT
1874 17:44:09.631986 Ramoops buffer: 0x100000@0x76a00000.
1875 17:44:09.638736 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1876 17:44:09.641635 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1877 17:44:09.646466 Google Chrome EC: version:
1878 17:44:09.649771 ro: voema_v2.0.7540-147f8d37d1
1879 17:44:09.652961 rw: voema_v2.0.7540-147f8d37d1
1880 17:44:09.655951 running image: 2
1881 17:44:09.662613 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1882 17:44:09.665814 ACPI: * FADT
1883 17:44:09.665894 SCI is IRQ9
1884 17:44:09.669778 ACPI: added table 1/32, length now 40
1885 17:44:09.672784 ACPI: * SSDT
1886 17:44:09.675931 Found 1 CPU(s) with 8 core(s) each.
1887 17:44:09.682720 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1888 17:44:09.686114 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1889 17:44:09.689083 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1890 17:44:09.692397 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1891 17:44:09.699043 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1892 17:44:09.705705 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1893 17:44:09.708799 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1894 17:44:09.715847 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1895 17:44:09.721966 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1896 17:44:09.725725 \_SB.PCI0.RP09: Added StorageD3Enable property
1897 17:44:09.732291 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1898 17:44:09.735501 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1899 17:44:09.743124 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1900 17:44:09.746101 PS2K: Passing 80 keymaps to kernel
1901 17:44:09.752924 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1902 17:44:09.759736 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1903 17:44:09.765923 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1904 17:44:09.772493 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1905 17:44:09.779434 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1906 17:44:09.785611 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1907 17:44:09.792424 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1908 17:44:09.798642 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1909 17:44:09.801947 ACPI: added table 2/32, length now 44
1910 17:44:09.805556 ACPI: * MCFG
1911 17:44:09.808709 ACPI: added table 3/32, length now 48
1912 17:44:09.808795 ACPI: * TPM2
1913 17:44:09.811846 TPM2 log created at 0x769f0000
1914 17:44:09.815697 ACPI: added table 4/32, length now 52
1915 17:44:09.818647 ACPI: * MADT
1916 17:44:09.818736 SCI is IRQ9
1917 17:44:09.821761 ACPI: added table 5/32, length now 56
1918 17:44:09.824868 current = 76b09850
1919 17:44:09.828697 ACPI: * DMAR
1920 17:44:09.831768 ACPI: added table 6/32, length now 60
1921 17:44:09.834914 ACPI: added table 7/32, length now 64
1922 17:44:09.834999 ACPI: * HPET
1923 17:44:09.841759 ACPI: added table 8/32, length now 68
1924 17:44:09.841841 ACPI: done.
1925 17:44:09.844895 ACPI tables: 35216 bytes.
1926 17:44:09.848060 smbios_write_tables: 769ef000
1927 17:44:09.851846 EC returned error result code 3
1928 17:44:09.854642 Couldn't obtain OEM name from CBI
1929 17:44:09.858354 Create SMBIOS type 16
1930 17:44:09.858466 Create SMBIOS type 17
1931 17:44:09.861295 GENERIC: 0.0 (WIFI Device)
1932 17:44:09.864801 SMBIOS tables: 1750 bytes.
1933 17:44:09.867921 Writing table forward entry at 0x00000500
1934 17:44:09.874987 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1935 17:44:09.877907 Writing coreboot table at 0x76b25000
1936 17:44:09.884704 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1937 17:44:09.887954 1. 0000000000001000-000000000009ffff: RAM
1938 17:44:09.894433 2. 00000000000a0000-00000000000fffff: RESERVED
1939 17:44:09.897622 3. 0000000000100000-00000000769eefff: RAM
1940 17:44:09.904253 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1941 17:44:09.907840 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1942 17:44:09.914038 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1943 17:44:09.920838 7. 0000000077000000-000000007fbfffff: RESERVED
1944 17:44:09.924329 8. 00000000c0000000-00000000cfffffff: RESERVED
1945 17:44:09.927232 9. 00000000f8000000-00000000f9ffffff: RESERVED
1946 17:44:09.934167 10. 00000000fb000000-00000000fb000fff: RESERVED
1947 17:44:09.937478 11. 00000000fe000000-00000000fe00ffff: RESERVED
1948 17:44:09.943783 12. 00000000fed80000-00000000fed87fff: RESERVED
1949 17:44:09.946938 13. 00000000fed90000-00000000fed92fff: RESERVED
1950 17:44:09.953790 14. 00000000feda0000-00000000feda1fff: RESERVED
1951 17:44:09.956994 15. 00000000fedc0000-00000000feddffff: RESERVED
1952 17:44:09.960585 16. 0000000100000000-00000002803fffff: RAM
1953 17:44:09.963765 Passing 4 GPIOs to payload:
1954 17:44:09.970498 NAME | PORT | POLARITY | VALUE
1955 17:44:09.976776 lid | undefined | high | high
1956 17:44:09.980533 power | undefined | high | low
1957 17:44:09.986972 oprom | undefined | high | low
1958 17:44:09.990034 EC in RW | 0x000000e5 | high | high
1959 17:44:09.996578 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum fc38
1960 17:44:09.999844 coreboot table: 1576 bytes.
1961 17:44:10.003018 IMD ROOT 0. 0x76fff000 0x00001000
1962 17:44:10.006277 IMD SMALL 1. 0x76ffe000 0x00001000
1963 17:44:10.010146 FSP MEMORY 2. 0x76c4e000 0x003b0000
1964 17:44:10.016217 VPD 3. 0x76c4d000 0x00000367
1965 17:44:10.019782 RO MCACHE 4. 0x76c4c000 0x00000fdc
1966 17:44:10.022700 CONSOLE 5. 0x76c2c000 0x00020000
1967 17:44:10.026158 FMAP 6. 0x76c2b000 0x00000578
1968 17:44:10.029571 TIME STAMP 7. 0x76c2a000 0x00000910
1969 17:44:10.032787 VBOOT WORK 8. 0x76c16000 0x00014000
1970 17:44:10.036469 ROMSTG STCK 9. 0x76c15000 0x00001000
1971 17:44:10.042861 AFTER CAR 10. 0x76c0a000 0x0000b000
1972 17:44:10.045996 RAMSTAGE 11. 0x76b97000 0x00073000
1973 17:44:10.049398 REFCODE 12. 0x76b42000 0x00055000
1974 17:44:10.052522 SMM BACKUP 13. 0x76b32000 0x00010000
1975 17:44:10.056189 4f444749 14. 0x76b30000 0x00002000
1976 17:44:10.059367 EXT VBT15. 0x76b2d000 0x0000219f
1977 17:44:10.062450 COREBOOT 16. 0x76b25000 0x00008000
1978 17:44:10.065981 ACPI 17. 0x76b01000 0x00024000
1979 17:44:10.068928 ACPI GNVS 18. 0x76b00000 0x00001000
1980 17:44:10.076192 RAMOOPS 19. 0x76a00000 0x00100000
1981 17:44:10.079311 TPM2 TCGLOG20. 0x769f0000 0x00010000
1982 17:44:10.082605 SMBIOS 21. 0x769ef000 0x00000800
1983 17:44:10.082723 IMD small region:
1984 17:44:10.089151 IMD ROOT 0. 0x76ffec00 0x00000400
1985 17:44:10.092187 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1986 17:44:10.095416 POWER STATE 2. 0x76ffeb80 0x00000044
1987 17:44:10.099000 ROMSTAGE 3. 0x76ffeb60 0x00000004
1988 17:44:10.102060 MEM INFO 4. 0x76ffe980 0x000001e0
1989 17:44:10.108678 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1990 17:44:10.111878 MTRR: Physical address space:
1991 17:44:10.119057 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1992 17:44:10.125594 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1993 17:44:10.131920 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1994 17:44:10.138280 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1995 17:44:10.144833 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1996 17:44:10.148196 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1997 17:44:10.155080 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1998 17:44:10.161455 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 17:44:10.164689 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 17:44:10.168023 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 17:44:10.171393 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 17:44:10.178212 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 17:44:10.181029 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 17:44:10.184607 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 17:44:10.187712 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 17:44:10.194778 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 17:44:10.197960 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 17:44:10.201098 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 17:44:10.204274 call enable_fixed_mtrr()
2010 17:44:10.207964 CPU physical address size: 39 bits
2011 17:44:10.214482 MTRR: default type WB/UC MTRR counts: 6/6.
2012 17:44:10.217993 MTRR: UC selected as default type.
2013 17:44:10.221306 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2014 17:44:10.227562 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2015 17:44:10.233882 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2016 17:44:10.240995 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2017 17:44:10.247623 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2018 17:44:10.253778 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2019 17:44:10.253970
2020 17:44:10.257400 MTRR check
2021 17:44:10.257504 Fixed MTRRs : Enabled
2022 17:44:10.260466 Variable MTRRs: Enabled
2023 17:44:10.260602
2024 17:44:10.267450 MTRR: Fixed MSR 0x250 0x0606060606060606
2025 17:44:10.270484 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 17:44:10.273634 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 17:44:10.276925 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 17:44:10.283474 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 17:44:10.286681 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 17:44:10.290042 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 17:44:10.293292 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 17:44:10.296946 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 17:44:10.302992 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 17:44:10.307077 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 17:44:10.313160 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2036 17:44:10.316459 call enable_fixed_mtrr()
2037 17:44:10.320262 Checking cr50 for pending updates
2038 17:44:10.323464 CPU physical address size: 39 bits
2039 17:44:10.326811 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 17:44:10.330014 MTRR: Fixed MSR 0x250 0x0606060606060606
2041 17:44:10.336281 MTRR: Fixed MSR 0x258 0x0606060606060606
2042 17:44:10.340051 MTRR: Fixed MSR 0x259 0x0000000000000000
2043 17:44:10.343376 MTRR: Fixed MSR 0x268 0x0606060606060606
2044 17:44:10.346472 MTRR: Fixed MSR 0x269 0x0606060606060606
2045 17:44:10.353138 MTRR: Fixed MSR 0x26a 0x0606060606060606
2046 17:44:10.356427 MTRR: Fixed MSR 0x26b 0x0606060606060606
2047 17:44:10.359787 MTRR: Fixed MSR 0x26c 0x0606060606060606
2048 17:44:10.363341 MTRR: Fixed MSR 0x26d 0x0606060606060606
2049 17:44:10.369519 MTRR: Fixed MSR 0x26e 0x0606060606060606
2050 17:44:10.372559 MTRR: Fixed MSR 0x26f 0x0606060606060606
2051 17:44:10.376193 MTRR: Fixed MSR 0x258 0x0606060606060606
2052 17:44:10.379405 call enable_fixed_mtrr()
2053 17:44:10.382877 MTRR: Fixed MSR 0x259 0x0000000000000000
2054 17:44:10.389266 MTRR: Fixed MSR 0x268 0x0606060606060606
2055 17:44:10.392587 MTRR: Fixed MSR 0x269 0x0606060606060606
2056 17:44:10.395642 MTRR: Fixed MSR 0x26a 0x0606060606060606
2057 17:44:10.399284 MTRR: Fixed MSR 0x26b 0x0606060606060606
2058 17:44:10.405650 MTRR: Fixed MSR 0x26c 0x0606060606060606
2059 17:44:10.408884 MTRR: Fixed MSR 0x26d 0x0606060606060606
2060 17:44:10.412538 MTRR: Fixed MSR 0x26e 0x0606060606060606
2061 17:44:10.415668 MTRR: Fixed MSR 0x26f 0x0606060606060606
2062 17:44:10.420020 CPU physical address size: 39 bits
2063 17:44:10.426530 call enable_fixed_mtrr()
2064 17:44:10.429911 MTRR: Fixed MSR 0x250 0x0606060606060606
2065 17:44:10.433285 MTRR: Fixed MSR 0x250 0x0606060606060606
2066 17:44:10.435953 MTRR: Fixed MSR 0x258 0x0606060606060606
2067 17:44:10.442654 MTRR: Fixed MSR 0x259 0x0000000000000000
2068 17:44:10.445923 MTRR: Fixed MSR 0x268 0x0606060606060606
2069 17:44:10.449291 MTRR: Fixed MSR 0x269 0x0606060606060606
2070 17:44:10.453073 MTRR: Fixed MSR 0x26a 0x0606060606060606
2071 17:44:10.459387 MTRR: Fixed MSR 0x26b 0x0606060606060606
2072 17:44:10.462878 MTRR: Fixed MSR 0x26c 0x0606060606060606
2073 17:44:10.466046 MTRR: Fixed MSR 0x26d 0x0606060606060606
2074 17:44:10.469614 MTRR: Fixed MSR 0x26e 0x0606060606060606
2075 17:44:10.472768 MTRR: Fixed MSR 0x26f 0x0606060606060606
2076 17:44:10.479374 MTRR: Fixed MSR 0x258 0x0606060606060606
2077 17:44:10.482402 call enable_fixed_mtrr()
2078 17:44:10.485521 MTRR: Fixed MSR 0x259 0x0000000000000000
2079 17:44:10.488904 MTRR: Fixed MSR 0x268 0x0606060606060606
2080 17:44:10.495591 MTRR: Fixed MSR 0x269 0x0606060606060606
2081 17:44:10.498909 MTRR: Fixed MSR 0x26a 0x0606060606060606
2082 17:44:10.501975 MTRR: Fixed MSR 0x26b 0x0606060606060606
2083 17:44:10.505698 MTRR: Fixed MSR 0x26c 0x0606060606060606
2084 17:44:10.511916 MTRR: Fixed MSR 0x26d 0x0606060606060606
2085 17:44:10.515670 MTRR: Fixed MSR 0x26e 0x0606060606060606
2086 17:44:10.518494 MTRR: Fixed MSR 0x26f 0x0606060606060606
2087 17:44:10.522148 CPU physical address size: 39 bits
2088 17:44:10.526306 call enable_fixed_mtrr()
2089 17:44:10.529584 CPU physical address size: 39 bits
2090 17:44:10.532725 MTRR: Fixed MSR 0x250 0x0606060606060606
2091 17:44:10.539735 MTRR: Fixed MSR 0x250 0x0606060606060606
2092 17:44:10.542989 MTRR: Fixed MSR 0x258 0x0606060606060606
2093 17:44:10.546147 MTRR: Fixed MSR 0x259 0x0000000000000000
2094 17:44:10.549113 MTRR: Fixed MSR 0x268 0x0606060606060606
2095 17:44:10.555844 MTRR: Fixed MSR 0x269 0x0606060606060606
2096 17:44:10.559152 MTRR: Fixed MSR 0x26a 0x0606060606060606
2097 17:44:10.562364 MTRR: Fixed MSR 0x26b 0x0606060606060606
2098 17:44:10.566197 MTRR: Fixed MSR 0x26c 0x0606060606060606
2099 17:44:10.572728 MTRR: Fixed MSR 0x26d 0x0606060606060606
2100 17:44:10.575863 MTRR: Fixed MSR 0x26e 0x0606060606060606
2101 17:44:10.578926 MTRR: Fixed MSR 0x26f 0x0606060606060606
2102 17:44:10.586295 MTRR: Fixed MSR 0x258 0x0606060606060606
2103 17:44:10.586372 call enable_fixed_mtrr()
2104 17:44:10.592582 MTRR: Fixed MSR 0x259 0x0000000000000000
2105 17:44:10.595612 MTRR: Fixed MSR 0x268 0x0606060606060606
2106 17:44:10.599229 MTRR: Fixed MSR 0x269 0x0606060606060606
2107 17:44:10.602166 MTRR: Fixed MSR 0x26a 0x0606060606060606
2108 17:44:10.608880 MTRR: Fixed MSR 0x26b 0x0606060606060606
2109 17:44:10.612317 MTRR: Fixed MSR 0x26c 0x0606060606060606
2110 17:44:10.615601 MTRR: Fixed MSR 0x26d 0x0606060606060606
2111 17:44:10.618671 MTRR: Fixed MSR 0x26e 0x0606060606060606
2112 17:44:10.625227 MTRR: Fixed MSR 0x26f 0x0606060606060606
2113 17:44:10.629106 CPU physical address size: 39 bits
2114 17:44:10.632147 call enable_fixed_mtrr()
2115 17:44:10.635374 Reading cr50 TPM mode
2116 17:44:10.639529 CPU physical address size: 39 bits
2117 17:44:10.642991 CPU physical address size: 39 bits
2118 17:44:10.646217 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2119 17:44:10.655998 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2120 17:44:10.659442 Checking segment from ROM address 0xffc02b38
2121 17:44:10.662563 Checking segment from ROM address 0xffc02b54
2122 17:44:10.669546 Loading segment from ROM address 0xffc02b38
2123 17:44:10.672344 code (compression=0)
2124 17:44:10.679070 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2125 17:44:10.688990 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2126 17:44:10.689084 it's not compressed!
2127 17:44:10.829400 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2128 17:44:10.836076 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2129 17:44:10.842163 Loading segment from ROM address 0xffc02b54
2130 17:44:10.845753 Entry Point 0x30000000
2131 17:44:10.845856 Loaded segments
2132 17:44:10.852355 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2133 17:44:10.895374 Finalizing chipset.
2134 17:44:10.898302 Finalizing SMM.
2135 17:44:10.898382 APMC done.
2136 17:44:10.905507 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2137 17:44:10.908185 mp_park_aps done after 0 msecs.
2138 17:44:10.912090 Jumping to boot code at 0x30000000(0x76b25000)
2139 17:44:10.921771 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2140 17:44:10.921900
2141 17:44:10.921993
2142 17:44:10.924844
2143 17:44:10.924921 Starting depthcharge on Voema...
2144 17:44:10.925293 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2145 17:44:10.925398 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2146 17:44:10.925479 Setting prompt string to ['volteer:']
2147 17:44:10.925564 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2148 17:44:10.928314
2149 17:44:10.934738 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2150 17:44:10.934910
2151 17:44:10.941812 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2152 17:44:10.941909
2153 17:44:10.947840 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2154 17:44:10.947923
2155 17:44:10.951589 Failed to find eMMC card reader
2156 17:44:10.951672
2157 17:44:10.954550 Wipe memory regions:
2158 17:44:10.954631
2159 17:44:10.957936 [0x00000000001000, 0x000000000a0000)
2160 17:44:10.958038
2161 17:44:10.961027 [0x00000000100000, 0x00000030000000)
2162 17:44:10.987297
2163 17:44:10.990911 [0x00000032662db0, 0x000000769ef000)
2164 17:44:11.027042
2165 17:44:11.030194 [0x00000100000000, 0x00000280400000)
2166 17:44:11.232355
2167 17:44:11.235355 ec_init: CrosEC protocol v3 supported (256, 256)
2168 17:44:11.235446
2169 17:44:11.242002 update_port_state: port C0 state: usb enable 1 mux conn 0
2170 17:44:11.242113
2171 17:44:11.252282 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2172 17:44:11.255807
2173 17:44:11.258941 pmc_check_ipc_sts: STS_BUSY done after 1511 us
2174 17:44:11.259029
2175 17:44:11.261964 send_conn_disc_msg: pmc_send_cmd succeeded
2176 17:44:11.694813
2177 17:44:11.694968 R8152: Initializing
2178 17:44:11.695062
2179 17:44:11.697869 Version 6 (ocp_data = 5c30)
2180 17:44:11.697973
2181 17:44:11.701075 R8152: Done initializing
2182 17:44:11.701155
2183 17:44:11.703712 Adding net device
2184 17:44:12.006124
2185 17:44:12.009207 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2186 17:44:12.009297
2187 17:44:12.009381
2188 17:44:12.009462
2189 17:44:12.012459 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2191 17:44:12.112841 volteer: tftpboot 192.168.201.1 11831841/tftp-deploy-s_iymnk9/kernel/bzImage 11831841/tftp-deploy-s_iymnk9/kernel/cmdline 11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
2192 17:44:12.113023 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 17:44:12.113215 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2194 17:44:12.117221 tftpboot 192.168.201.1 11831841/tftp-deploy-s_iymnk9/kernel/bzIploy-s_iymnk9/kernel/cmdline 11831841/tftp-deploy-s_iymnk9/ramdisk/ramdisk.cpio.gz
2195 17:44:12.117342
2196 17:44:12.117480 Waiting for link
2197 17:44:12.320709
2198 17:44:12.320868 done.
2199 17:44:12.320985
2200 17:44:12.321080 MAC: 00:24:32:30:79:06
2201 17:44:12.321176
2202 17:44:12.324004 Sending DHCP discover... done.
2203 17:44:12.324137
2204 17:44:12.327128 Waiting for reply... done.
2205 17:44:12.327253
2206 17:44:12.330287 Sending DHCP request... done.
2207 17:44:12.330394
2208 17:44:12.337719 Waiting for reply... done.
2209 17:44:12.337846
2210 17:44:12.337918 My ip is 192.168.201.23
2211 17:44:12.338004
2212 17:44:12.344116 The DHCP server ip is 192.168.201.1
2213 17:44:12.344199
2214 17:44:12.347038 TFTP server IP predefined by user: 192.168.201.1
2215 17:44:12.347154
2216 17:44:12.354116 Bootfile predefined by user: 11831841/tftp-deploy-s_iymnk9/kernel/bzImage
2217 17:44:12.354199
2218 17:44:12.357085 Sending tftp read request... done.
2219 17:44:12.357167
2220 17:44:12.363752 Waiting for the transfer...
2221 17:44:12.363840
2222 17:44:12.903095 00000000 ################################################################
2223 17:44:12.903248
2224 17:44:13.454687 00080000 ################################################################
2225 17:44:13.454904
2226 17:44:14.063299 00100000 ################################################################
2227 17:44:14.063448
2228 17:44:14.703770 00180000 ################################################################
2229 17:44:14.703922
2230 17:44:15.265342 00200000 ################################################################
2231 17:44:15.265485
2232 17:44:15.831816 00280000 ################################################################
2233 17:44:15.831987
2234 17:44:16.398619 00300000 ################################################################
2235 17:44:16.398773
2236 17:44:16.932548 00380000 ################################################################
2237 17:44:16.932694
2238 17:44:17.468891 00400000 ################################################################
2239 17:44:17.469029
2240 17:44:18.011575 00480000 ################################################################
2241 17:44:18.011720
2242 17:44:18.567602 00500000 ################################################################
2243 17:44:18.567752
2244 17:44:19.119806 00580000 ################################################################
2245 17:44:19.119952
2246 17:44:19.680048 00600000 ################################################################
2247 17:44:19.680250
2248 17:44:20.209578 00680000 ################################################################
2249 17:44:20.209735
2250 17:44:20.737123 00700000 ################################################################
2251 17:44:20.737274
2252 17:44:21.273987 00780000 ################################################################
2253 17:44:21.274231
2254 17:44:21.391662 00800000 ############### done.
2255 17:44:21.391809
2256 17:44:21.394862 The bootfile was 8507280 bytes long.
2257 17:44:21.394945
2258 17:44:21.398583 Sending tftp read request... done.
2259 17:44:21.398683
2260 17:44:21.401657 Waiting for the transfer...
2261 17:44:21.401739
2262 17:44:21.994943 00000000 ################################################################
2263 17:44:21.995090
2264 17:44:22.638461 00080000 ################################################################
2265 17:44:22.638612
2266 17:44:23.226611 00100000 ################################################################
2267 17:44:23.226791
2268 17:44:23.834666 00180000 ################################################################
2269 17:44:23.834856
2270 17:44:24.444347 00200000 ################################################################
2271 17:44:24.444517
2272 17:44:25.109127 00280000 ################################################################
2273 17:44:25.109725
2274 17:44:25.742854 00300000 ################################################################
2275 17:44:25.743413
2276 17:44:26.305692 00380000 ################################################################
2277 17:44:26.305829
2278 17:44:26.846277 00400000 ################################################################
2279 17:44:26.846424
2280 17:44:27.400624 00480000 ################################################################
2281 17:44:27.400759
2282 17:44:28.033677 00500000 ################################################################
2283 17:44:28.033849
2284 17:44:28.628635 00580000 ################################################################
2285 17:44:28.628770
2286 17:44:28.813551 00600000 ###################### done.
2287 17:44:28.813683
2288 17:44:28.816820 Sending tftp read request... done.
2289 17:44:28.816903
2290 17:44:28.816967 Waiting for the transfer...
2291 17:44:28.819880
2292 17:44:28.819966 00000000 # done.
2293 17:44:28.820034
2294 17:44:28.830086 Command line loaded dynamically from TFTP file: 11831841/tftp-deploy-s_iymnk9/kernel/cmdline
2295 17:44:28.830174
2296 17:44:28.852897 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831841/extract-nfsrootfs-1afqgiym,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2297 17:44:28.859125
2298 17:44:28.862107 Shutting down all USB controllers.
2299 17:44:28.862191
2300 17:44:28.862256 Removing current net device
2301 17:44:28.862316
2302 17:44:28.865826 Finalizing coreboot
2303 17:44:28.865915
2304 17:44:28.872015 Exiting depthcharge with code 4 at timestamp: 26668830
2305 17:44:28.872099
2306 17:44:28.872164
2307 17:44:28.872230 Starting kernel ...
2308 17:44:28.872289
2309 17:44:28.872345
2310 17:44:28.872712 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2311 17:44:28.872813 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
2312 17:44:28.872891 Setting prompt string to ['Linux version [0-9]']
2313 17:44:28.872964 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2314 17:44:28.873032 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2316 17:48:55.873078 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
2318 17:48:55.873346 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
2320 17:48:55.873530 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2323 17:48:55.873831 end: 2 depthcharge-action (duration 00:05:00) [common]
2325 17:48:55.874078 Cleaning after the job
2326 17:48:55.874174 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/ramdisk
2327 17:48:55.875224 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/kernel
2328 17:48:55.876597 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/nfsrootfs
2329 17:48:55.970836 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831841/tftp-deploy-s_iymnk9/modules
2330 17:48:55.971354 start: 4.1 power-off (timeout 00:00:30) [common]
2331 17:48:55.971641 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2332 17:48:56.049046 >> Command sent successfully.
2333 17:48:56.051630 Returned 0 in 0 seconds
2334 17:48:56.152043 end: 4.1 power-off (duration 00:00:00) [common]
2336 17:48:56.152412 start: 4.2 read-feedback (timeout 00:10:00) [common]
2337 17:48:56.152692 Listened to connection for namespace 'common' for up to 1s
2338 17:48:57.153605 Finalising connection for namespace 'common'
2339 17:48:57.153804 Disconnecting from shell: Finalise
2340 17:48:57.153914
2341 17:48:57.254232 end: 4.2 read-feedback (duration 00:00:01) [common]
2342 17:48:57.254414 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831841
2343 17:48:57.876533 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831841
2344 17:48:57.876725 JobError: Your job cannot terminate cleanly.