Boot log: asus-C436FA-Flip-hatch

    1 17:48:07.880771  lava-dispatcher, installed at version: 2023.08
    2 17:48:07.880981  start: 0 validate
    3 17:48:07.881122  Start time: 2023-10-20 17:48:07.881114+00:00 (UTC)
    4 17:48:07.881274  Using caching service: 'http://localhost/cache/?uri=%s'
    5 17:48:07.881405  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
    6 17:48:08.148650  Using caching service: 'http://localhost/cache/?uri=%s'
    7 17:48:08.148849  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 17:48:08.414386  Using caching service: 'http://localhost/cache/?uri=%s'
    9 17:48:08.414574  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 17:48:08.679725  Using caching service: 'http://localhost/cache/?uri=%s'
   11 17:48:08.679904  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 17:48:08.946234  validate duration: 1.07
   14 17:48:08.946540  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 17:48:08.946637  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 17:48:08.946722  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 17:48:08.946900  Not decompressing ramdisk as can be used compressed.
   18 17:48:08.946985  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/initrd.cpio.gz
   19 17:48:08.947047  saving as /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/ramdisk/initrd.cpio.gz
   20 17:48:08.947110  total size: 5432480 (5 MB)
   21 17:48:08.948166  progress   0 % (0 MB)
   22 17:48:08.949963  progress   5 % (0 MB)
   23 17:48:08.951511  progress  10 % (0 MB)
   24 17:48:08.953077  progress  15 % (0 MB)
   25 17:48:08.954853  progress  20 % (1 MB)
   26 17:48:08.956272  progress  25 % (1 MB)
   27 17:48:08.957655  progress  30 % (1 MB)
   28 17:48:08.959249  progress  35 % (1 MB)
   29 17:48:08.960613  progress  40 % (2 MB)
   30 17:48:08.961978  progress  45 % (2 MB)
   31 17:48:08.963381  progress  50 % (2 MB)
   32 17:48:08.964898  progress  55 % (2 MB)
   33 17:48:08.966261  progress  60 % (3 MB)
   34 17:48:08.967678  progress  65 % (3 MB)
   35 17:48:08.969201  progress  70 % (3 MB)
   36 17:48:08.970559  progress  75 % (3 MB)
   37 17:48:08.971972  progress  80 % (4 MB)
   38 17:48:08.973485  progress  85 % (4 MB)
   39 17:48:08.975059  progress  90 % (4 MB)
   40 17:48:08.976432  progress  95 % (4 MB)
   41 17:48:08.977838  progress 100 % (5 MB)
   42 17:48:08.978044  5 MB downloaded in 0.03 s (167.48 MB/s)
   43 17:48:08.978192  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 17:48:08.978432  end: 1.1 download-retry (duration 00:00:00) [common]
   46 17:48:08.978533  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 17:48:08.978656  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 17:48:08.978877  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 17:48:08.978948  saving as /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/kernel/bzImage
   50 17:48:08.979009  total size: 8507280 (8 MB)
   51 17:48:08.979070  No compression specified
   52 17:48:08.980192  progress   0 % (0 MB)
   53 17:48:08.982551  progress   5 % (0 MB)
   54 17:48:08.985041  progress  10 % (0 MB)
   55 17:48:08.987488  progress  15 % (1 MB)
   56 17:48:08.989690  progress  20 % (1 MB)
   57 17:48:08.991962  progress  25 % (2 MB)
   58 17:48:08.994208  progress  30 % (2 MB)
   59 17:48:08.996484  progress  35 % (2 MB)
   60 17:48:08.998708  progress  40 % (3 MB)
   61 17:48:09.000954  progress  45 % (3 MB)
   62 17:48:09.003227  progress  50 % (4 MB)
   63 17:48:09.005495  progress  55 % (4 MB)
   64 17:48:09.007872  progress  60 % (4 MB)
   65 17:48:09.010283  progress  65 % (5 MB)
   66 17:48:09.012737  progress  70 % (5 MB)
   67 17:48:09.015160  progress  75 % (6 MB)
   68 17:48:09.017576  progress  80 % (6 MB)
   69 17:48:09.019929  progress  85 % (6 MB)
   70 17:48:09.022246  progress  90 % (7 MB)
   71 17:48:09.024611  progress  95 % (7 MB)
   72 17:48:09.027095  progress 100 % (8 MB)
   73 17:48:09.027298  8 MB downloaded in 0.05 s (168.03 MB/s)
   74 17:48:09.027473  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 17:48:09.027724  end: 1.2 download-retry (duration 00:00:00) [common]
   77 17:48:09.027856  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 17:48:09.027967  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 17:48:09.028155  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230623.0/amd64/full.rootfs.tar.xz
   80 17:48:09.028250  saving as /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/nfsrootfs/full.rootfs.tar
   81 17:48:09.028315  total size: 207157356 (197 MB)
   82 17:48:09.028377  Using unxz to decompress xz
   83 17:48:09.033171  progress   0 % (0 MB)
   84 17:48:09.607123  progress   5 % (9 MB)
   85 17:48:10.175814  progress  10 % (19 MB)
   86 17:48:10.849993  progress  15 % (29 MB)
   87 17:48:11.236161  progress  20 % (39 MB)
   88 17:48:11.603804  progress  25 % (49 MB)
   89 17:48:12.210468  progress  30 % (59 MB)
   90 17:48:12.759385  progress  35 % (69 MB)
   91 17:48:13.374561  progress  40 % (79 MB)
   92 17:48:13.940316  progress  45 % (88 MB)
   93 17:48:14.530162  progress  50 % (98 MB)
   94 17:48:15.171891  progress  55 % (108 MB)
   95 17:48:15.862113  progress  60 % (118 MB)
   96 17:48:16.001794  progress  65 % (128 MB)
   97 17:48:16.141608  progress  70 % (138 MB)
   98 17:48:16.238361  progress  75 % (148 MB)
   99 17:48:16.312904  progress  80 % (158 MB)
  100 17:48:16.386394  progress  85 % (167 MB)
  101 17:48:16.487561  progress  90 % (177 MB)
  102 17:48:16.764076  progress  95 % (187 MB)
  103 17:48:17.368038  progress 100 % (197 MB)
  104 17:48:17.375128  197 MB downloaded in 8.35 s (23.67 MB/s)
  105 17:48:17.375395  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 17:48:17.375655  end: 1.3 download-retry (duration 00:00:08) [common]
  108 17:48:17.375744  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 17:48:17.375834  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 17:48:17.375984  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 17:48:17.376055  saving as /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/modules/modules.tar
  112 17:48:17.376116  total size: 253900 (0 MB)
  113 17:48:17.376178  Using unxz to decompress xz
  114 17:48:17.380545  progress  12 % (0 MB)
  115 17:48:17.380953  progress  25 % (0 MB)
  116 17:48:17.381189  progress  38 % (0 MB)
  117 17:48:17.382789  progress  51 % (0 MB)
  118 17:48:17.384691  progress  64 % (0 MB)
  119 17:48:17.386581  progress  77 % (0 MB)
  120 17:48:17.388469  progress  90 % (0 MB)
  121 17:48:17.390178  progress 100 % (0 MB)
  122 17:48:17.395974  0 MB downloaded in 0.02 s (12.20 MB/s)
  123 17:48:17.396214  end: 1.4.1 http-download (duration 00:00:00) [common]
  125 17:48:17.396476  end: 1.4 download-retry (duration 00:00:00) [common]
  126 17:48:17.396574  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  127 17:48:17.396677  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  128 17:48:21.025164  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831848/extract-nfsrootfs-haed90xy
  129 17:48:21.025394  end: 1.5.1 extract-nfsrootfs (duration 00:00:04) [common]
  130 17:48:21.025523  start: 1.5.2 lava-overlay (timeout 00:09:48) [common]
  131 17:48:21.025702  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj
  132 17:48:21.025840  makedir: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin
  133 17:48:21.025947  makedir: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/tests
  134 17:48:21.026073  makedir: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/results
  135 17:48:21.026210  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-add-keys
  136 17:48:21.026397  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-add-sources
  137 17:48:21.026565  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-background-process-start
  138 17:48:21.026731  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-background-process-stop
  139 17:48:21.026919  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-common-functions
  140 17:48:21.027055  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-echo-ipv4
  141 17:48:21.027184  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-install-packages
  142 17:48:21.027316  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-installed-packages
  143 17:48:21.027451  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-os-build
  144 17:48:21.027581  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-probe-channel
  145 17:48:21.027712  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-probe-ip
  146 17:48:21.027839  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-target-ip
  147 17:48:21.027970  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-target-mac
  148 17:48:21.028094  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-target-storage
  149 17:48:21.028225  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-case
  150 17:48:21.028353  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-event
  151 17:48:21.028482  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-feedback
  152 17:48:21.028609  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-raise
  153 17:48:21.028771  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-reference
  154 17:48:21.028934  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-runner
  155 17:48:21.029093  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-set
  156 17:48:21.029257  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-test-shell
  157 17:48:21.029424  Updating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-add-keys (debian)
  158 17:48:21.029624  Updating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-add-sources (debian)
  159 17:48:21.029816  Updating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-install-packages (debian)
  160 17:48:21.030003  Updating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-installed-packages (debian)
  161 17:48:21.030183  Updating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/bin/lava-os-build (debian)
  162 17:48:21.030337  Creating /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/environment
  163 17:48:21.030475  LAVA metadata
  164 17:48:21.030578  - LAVA_JOB_ID=11831848
  165 17:48:21.030676  - LAVA_DISPATCHER_IP=192.168.201.1
  166 17:48:21.030849  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:48) [common]
  167 17:48:21.030951  skipped lava-vland-overlay
  168 17:48:21.031062  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  169 17:48:21.031177  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
  170 17:48:21.031267  skipped lava-multinode-overlay
  171 17:48:21.031370  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  172 17:48:21.031484  start: 1.5.2.3 test-definition (timeout 00:09:48) [common]
  173 17:48:21.031594  Loading test definitions
  174 17:48:21.031728  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:48) [common]
  175 17:48:21.031830  Using /lava-11831848 at stage 0
  176 17:48:21.032224  uuid=11831848_1.5.2.3.1 testdef=None
  177 17:48:21.032346  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  178 17:48:21.032463  start: 1.5.2.3.2 test-overlay (timeout 00:09:48) [common]
  179 17:48:21.033092  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  181 17:48:21.033368  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:48) [common]
  182 17:48:21.034144  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  184 17:48:21.034644  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
  185 17:48:21.035657  runner path: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/0/tests/0_timesync-off test_uuid 11831848_1.5.2.3.1
  186 17:48:21.035898  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  188 17:48:21.036349  start: 1.5.2.3.5 git-repo-action (timeout 00:09:48) [common]
  189 17:48:21.036467  Using /lava-11831848 at stage 0
  190 17:48:21.036618  Fetching tests from https://github.com/kernelci/test-definitions.git
  191 17:48:21.036730  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/0/tests/1_kselftest-filesystems'
  192 17:48:25.426288  Running '/usr/bin/git checkout kernelci.org
  193 17:48:25.573220  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/0/tests/1_kselftest-filesystems/automated/linux/kselftest/kselftest.yaml
  194 17:48:25.574203  uuid=11831848_1.5.2.3.5 testdef=None
  195 17:48:25.574421  end: 1.5.2.3.5 git-repo-action (duration 00:00:05) [common]
  197 17:48:25.574868  start: 1.5.2.3.6 test-overlay (timeout 00:09:43) [common]
  198 17:48:25.576027  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  200 17:48:25.576402  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:43) [common]
  201 17:48:25.578004  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  203 17:48:25.578387  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:43) [common]
  204 17:48:25.579754  runner path: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/0/tests/1_kselftest-filesystems test_uuid 11831848_1.5.2.3.5
  205 17:48:25.579883  BOARD='asus-C436FA-Flip-hatch'
  206 17:48:25.579982  BRANCH='cip-gitlab'
  207 17:48:25.580072  SKIPFILE='/dev/null'
  208 17:48:25.580160  SKIP_INSTALL='True'
  209 17:48:25.580245  TESTPROG_URL='None'
  210 17:48:25.580334  TST_CASENAME=''
  211 17:48:25.580420  TST_CMDFILES='filesystems'
  212 17:48:25.580607  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  214 17:48:25.580955  Creating lava-test-runner.conf files
  215 17:48:25.581047  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831848/lava-overlay-frrsvhgj/lava-11831848/0 for stage 0
  216 17:48:25.581174  - 0_timesync-off
  217 17:48:25.581276  - 1_kselftest-filesystems
  218 17:48:25.581407  end: 1.5.2.3 test-definition (duration 00:00:05) [common]
  219 17:48:25.581525  start: 1.5.2.4 compress-overlay (timeout 00:09:43) [common]
  220 17:48:33.369383  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  221 17:48:33.369581  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
  222 17:48:33.369796  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  223 17:48:33.369931  end: 1.5.2 lava-overlay (duration 00:00:12) [common]
  224 17:48:33.370028  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
  225 17:48:33.510560  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  226 17:48:33.511013  start: 1.5.4 extract-modules (timeout 00:09:35) [common]
  227 17:48:33.511133  extracting modules file /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831848/extract-nfsrootfs-haed90xy
  228 17:48:33.529489  extracting modules file /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831848/extract-overlay-ramdisk-zan4xia_/ramdisk
  229 17:48:33.547696  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  230 17:48:33.547834  start: 1.5.5 apply-overlay-tftp (timeout 00:09:35) [common]
  231 17:48:33.547925  [common] Applying overlay to NFS
  232 17:48:33.547994  [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831848/compress-overlay-ftmevg88/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831848/extract-nfsrootfs-haed90xy
  233 17:48:34.596473  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  234 17:48:34.596677  start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
  235 17:48:34.596818  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  236 17:48:34.596963  start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
  237 17:48:34.597085  Building ramdisk /var/lib/lava/dispatcher/tmp/11831848/extract-overlay-ramdisk-zan4xia_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831848/extract-overlay-ramdisk-zan4xia_/ramdisk
  238 17:48:34.669161  >> 26198 blocks

  239 17:48:35.213403  rename /var/lib/lava/dispatcher/tmp/11831848/extract-overlay-ramdisk-zan4xia_/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz
  240 17:48:35.213875  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  241 17:48:35.213996  start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
  242 17:48:35.214104  start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
  243 17:48:35.214200  No mkimage arch provided, not using FIT.
  244 17:48:35.214290  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  245 17:48:35.214383  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  246 17:48:35.214492  end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
  247 17:48:35.214587  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
  248 17:48:35.214674  No LXC device requested
  249 17:48:35.214772  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  250 17:48:35.214882  start: 1.7 deploy-device-env (timeout 00:09:34) [common]
  251 17:48:35.214978  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  252 17:48:35.215059  Checking files for TFTP limit of 4294967296 bytes.
  253 17:48:35.215501  end: 1 tftp-deploy (duration 00:00:26) [common]
  254 17:48:35.215614  start: 2 depthcharge-action (timeout 00:05:00) [common]
  255 17:48:35.215707  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  256 17:48:35.215849  substitutions:
  257 17:48:35.215921  - {DTB}: None
  258 17:48:35.215985  - {INITRD}: 11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz
  259 17:48:35.216058  - {KERNEL}: 11831848/tftp-deploy-0r06jblk/kernel/bzImage
  260 17:48:35.216117  - {LAVA_MAC}: None
  261 17:48:35.216173  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831848/extract-nfsrootfs-haed90xy
  262 17:48:35.216239  - {NFS_SERVER_IP}: 192.168.201.1
  263 17:48:35.216294  - {PRESEED_CONFIG}: None
  264 17:48:35.216348  - {PRESEED_LOCAL}: None
  265 17:48:35.216425  - {RAMDISK}: 11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz
  266 17:48:35.216481  - {ROOT_PART}: None
  267 17:48:35.216542  - {ROOT}: None
  268 17:48:35.216599  - {SERVER_IP}: 192.168.201.1
  269 17:48:35.216652  - {TEE}: None
  270 17:48:35.216706  Parsed boot commands:
  271 17:48:35.216795  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  272 17:48:35.217034  Parsed boot commands: tftpboot 192.168.201.1 11831848/tftp-deploy-0r06jblk/kernel/bzImage 11831848/tftp-deploy-0r06jblk/kernel/cmdline 11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz
  273 17:48:35.217157  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  274 17:48:35.217274  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  275 17:48:35.217406  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  276 17:48:35.217522  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  277 17:48:35.217622  Not connected, no need to disconnect.
  278 17:48:35.217737  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  279 17:48:35.217855  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  280 17:48:35.217952  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-2'
  281 17:48:35.222206  Setting prompt string to ['lava-test: # ']
  282 17:48:35.222572  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  283 17:48:35.222704  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  284 17:48:35.222835  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  285 17:48:35.222936  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  286 17:48:35.223129  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
  287 17:48:40.344792  >> Command sent successfully.

  288 17:48:40.347474  Returned 0 in 5 seconds
  289 17:48:40.447890  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  291 17:48:40.448224  end: 2.2.2 reset-device (duration 00:00:05) [common]
  292 17:48:40.448336  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  293 17:48:40.448434  Setting prompt string to 'Starting depthcharge on Helios...'
  294 17:48:40.448503  Changing prompt to 'Starting depthcharge on Helios...'
  295 17:48:40.448573  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  296 17:48:40.448844  [Enter `^Ec?' for help]

  297 17:48:41.071589  

  298 17:48:41.071759  

  299 17:48:41.081426  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  300 17:48:41.084571  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  301 17:48:41.091121  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  302 17:48:41.094331  CPU: AES supported, TXT NOT supported, VT supported

  303 17:48:41.101308  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  304 17:48:41.107586  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  305 17:48:41.111237  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  306 17:48:41.114209  VBOOT: Loading verstage.

  307 17:48:41.120590  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  308 17:48:41.124014  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  309 17:48:41.130713  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  310 17:48:41.130862  CBFS @ c08000 size 3f8000

  311 17:48:41.137641  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  312 17:48:41.140854  CBFS: Locating 'fallback/verstage'

  313 17:48:41.147326  CBFS: Found @ offset 10fb80 size 1072c

  314 17:48:41.147407  

  315 17:48:41.147474  

  316 17:48:41.156944  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  317 17:48:41.172523  Probing TPM: . done!

  318 17:48:41.176085  TPM ready after 0 ms

  319 17:48:41.179116  Connected to device vid:did:rid of 1ae0:0028:00

  320 17:48:41.189747  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  321 17:48:41.192713  Initialized TPM device CR50 revision 0

  322 17:48:41.238965  tlcl_send_startup: Startup return code is 0

  323 17:48:41.239063  TPM: setup succeeded

  324 17:48:41.251137  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  325 17:48:41.254930  Chrome EC: UHEPI supported

  326 17:48:41.258371  Phase 1

  327 17:48:41.261352  FMAP: area GBB found @ c05000 (12288 bytes)

  328 17:48:41.268163  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  329 17:48:41.271424  Phase 2

  330 17:48:41.271508  Phase 3

  331 17:48:41.274549  FMAP: area GBB found @ c05000 (12288 bytes)

  332 17:48:41.281485  VB2:vb2_report_dev_firmware() This is developer signed firmware

  333 17:48:41.288103  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  334 17:48:41.291076  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  335 17:48:41.297628  VB2:vb2_verify_keyblock() Checking keyblock signature...

  336 17:48:41.314220  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  337 17:48:41.317383  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  338 17:48:41.324015  VB2:vb2_verify_fw_preamble() Verifying preamble.

  339 17:48:41.327804  Phase 4

  340 17:48:41.331347  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  341 17:48:41.340863  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  342 17:48:41.517409  VB2:vb2_rsa_verify_digest() Digest check failed!

  343 17:48:41.523722  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  344 17:48:41.523813  Saving nvdata

  345 17:48:41.527637  Reboot requested (10020007)

  346 17:48:41.530463  board_reset() called!

  347 17:48:41.530562  full_reset() called!

  348 17:48:46.039647  

  349 17:48:46.040179  

  350 17:48:46.049455  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  351 17:48:46.052514  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  352 17:48:46.059463  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  353 17:48:46.062396  CPU: AES supported, TXT NOT supported, VT supported

  354 17:48:46.069338  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  355 17:48:46.072454  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  356 17:48:46.079082  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  357 17:48:46.082044  VBOOT: Loading verstage.

  358 17:48:46.088603  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  359 17:48:46.092280  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  360 17:48:46.098627  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  361 17:48:46.099101  CBFS @ c08000 size 3f8000

  362 17:48:46.104868  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  363 17:48:46.108076  CBFS: Locating 'fallback/verstage'

  364 17:48:46.111745  CBFS: Found @ offset 10fb80 size 1072c

  365 17:48:46.116629  

  366 17:48:46.117100  

  367 17:48:46.125771  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  368 17:48:46.140432  Probing TPM: . done!

  369 17:48:46.143784  TPM ready after 0 ms

  370 17:48:46.147346  Connected to device vid:did:rid of 1ae0:0028:00

  371 17:48:46.157299  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  372 17:48:46.160544  Initialized TPM device CR50 revision 0

  373 17:48:46.206351  tlcl_send_startup: Startup return code is 0

  374 17:48:46.206907  TPM: setup succeeded

  375 17:48:46.218926  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  376 17:48:46.223135  Chrome EC: UHEPI supported

  377 17:48:46.226284  Phase 1

  378 17:48:46.229911  FMAP: area GBB found @ c05000 (12288 bytes)

  379 17:48:46.236189  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  380 17:48:46.242420  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  381 17:48:46.246117  Recovery requested (1009000e)

  382 17:48:46.251764  Saving nvdata

  383 17:48:46.257971  tlcl_extend: response is 0

  384 17:48:46.266941  tlcl_extend: response is 0

  385 17:48:46.273436  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  386 17:48:46.276634  CBFS @ c08000 size 3f8000

  387 17:48:46.283785  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  388 17:48:46.286580  CBFS: Locating 'fallback/romstage'

  389 17:48:46.290097  CBFS: Found @ offset 80 size 145fc

  390 17:48:46.293302  Accumulated console time in verstage 98 ms

  391 17:48:46.293743  

  392 17:48:46.296447  

  393 17:48:46.306409  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  394 17:48:46.313323  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  395 17:48:46.316437  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  396 17:48:46.319515  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  397 17:48:46.325990  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  398 17:48:46.329303  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  399 17:48:46.332970  gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000

  400 17:48:46.335905  TCO_STS:   0000 0000

  401 17:48:46.339040  GEN_PMCON: e0015238 00000200

  402 17:48:46.342571  GBLRST_CAUSE: 00000000 00000000

  403 17:48:46.345811  prev_sleep_state 5

  404 17:48:46.348800  Boot Count incremented to 62300

  405 17:48:46.352016  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  406 17:48:46.355487  CBFS @ c08000 size 3f8000

  407 17:48:46.362582  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  408 17:48:46.365442  CBFS: Locating 'fspm.bin'

  409 17:48:46.368416  CBFS: Found @ offset 5ffc0 size 71000

  410 17:48:46.372271  Chrome EC: UHEPI supported

  411 17:48:46.378246  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  412 17:48:46.383405  Probing TPM:  done!

  413 17:48:46.389675  Connected to device vid:did:rid of 1ae0:0028:00

  414 17:48:46.399743  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  415 17:48:46.406109  Initialized TPM device CR50 revision 0

  416 17:48:46.414991  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  417 17:48:46.424875  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  418 17:48:46.425306  MRC cache found, size 1948

  419 17:48:46.428200  bootmode is set to: 2

  420 17:48:46.431291  PRMRR disabled by config.

  421 17:48:46.434496  SPD INDEX = 1

  422 17:48:46.438196  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  423 17:48:46.441438  CBFS @ c08000 size 3f8000

  424 17:48:46.447693  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  425 17:48:46.448127  CBFS: Locating 'spd.bin'

  426 17:48:46.454331  CBFS: Found @ offset 5fb80 size 400

  427 17:48:46.454753  SPD: module type is LPDDR3

  428 17:48:46.457582  SPD: module part is 

  429 17:48:46.463854  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  430 17:48:46.467610  SPD: device width 4 bits, bus width 8 bits

  431 17:48:46.470747  SPD: module size is 4096 MB (per channel)

  432 17:48:46.474339  memory slot: 0 configuration done.

  433 17:48:46.480515  memory slot: 2 configuration done.

  434 17:48:46.529367  CBMEM:

  435 17:48:46.532583  IMD: root @ 99fff000 254 entries.

  436 17:48:46.536299  IMD: root @ 99ffec00 62 entries.

  437 17:48:46.539477  External stage cache:

  438 17:48:46.542474  IMD: root @ 9abff000 254 entries.

  439 17:48:46.545749  IMD: root @ 9abfec00 62 entries.

  440 17:48:46.552714  Chrome EC: clear events_b mask to 0x0000000020004000

  441 17:48:46.565688  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  442 17:48:46.575913  tlcl_write: response is 0

  443 17:48:46.587475  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  444 17:48:46.593821  MRC: TPM MRC hash updated successfully.

  445 17:48:46.594252  2 DIMMs found

  446 17:48:46.597372  SMM Memory Map

  447 17:48:46.600671  SMRAM       : 0x9a000000 0x1000000

  448 17:48:46.603911   Subregion 0: 0x9a000000 0xa00000

  449 17:48:46.607483   Subregion 1: 0x9aa00000 0x200000

  450 17:48:46.610572   Subregion 2: 0x9ac00000 0x400000

  451 17:48:46.614029  top_of_ram = 0x9a000000

  452 17:48:46.616850  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  453 17:48:46.623779  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  454 17:48:46.627338  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  455 17:48:46.634096  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  456 17:48:46.637141  CBFS @ c08000 size 3f8000

  457 17:48:46.640262  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  458 17:48:46.643406  CBFS: Locating 'fallback/postcar'

  459 17:48:46.650231  CBFS: Found @ offset 107000 size 4b44

  460 17:48:46.656568  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  461 17:48:46.666569  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  462 17:48:46.669752  Processing 180 relocs. Offset value of 0x97c0c000

  463 17:48:46.677789  Accumulated console time in romstage 286 ms

  464 17:48:46.678478  

  465 17:48:46.679036  

  466 17:48:46.687646  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  467 17:48:46.694495  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  468 17:48:46.697316  CBFS @ c08000 size 3f8000

  469 17:48:46.701155  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  470 17:48:46.707685  CBFS: Locating 'fallback/ramstage'

  471 17:48:46.710516  CBFS: Found @ offset 43380 size 1b9e8

  472 17:48:46.717123  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  473 17:48:46.749385  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  474 17:48:46.755678  Processing 3976 relocs. Offset value of 0x98db0000

  475 17:48:46.758821  Accumulated console time in postcar 52 ms

  476 17:48:46.759270  

  477 17:48:46.759673  

  478 17:48:46.768893  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  479 17:48:46.775838  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  480 17:48:46.778861  WARNING: RO_VPD is uninitialized or empty.

  481 17:48:46.781843  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  482 17:48:46.788717  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  483 17:48:46.789153  Normal boot.

  484 17:48:46.795378  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  485 17:48:46.798280  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  486 17:48:46.801831  CBFS @ c08000 size 3f8000

  487 17:48:46.808535  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  488 17:48:46.811742  CBFS: Locating 'cpu_microcode_blob.bin'

  489 17:48:46.814684  CBFS: Found @ offset 14700 size 2ec00

  490 17:48:46.821904  microcode: sig=0x806ec pf=0x4 revision=0xc9

  491 17:48:46.822336  Skip microcode update

  492 17:48:46.828337  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 17:48:46.831226  CBFS @ c08000 size 3f8000

  494 17:48:46.834805  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 17:48:46.837717  CBFS: Locating 'fsps.bin'

  496 17:48:46.841075  CBFS: Found @ offset d1fc0 size 35000

  497 17:48:46.867898  Detected 4 core, 8 thread CPU.

  498 17:48:46.870892  Setting up SMI for CPU

  499 17:48:46.873913  IED base = 0x9ac00000

  500 17:48:46.874448  IED size = 0x00400000

  501 17:48:46.877173  Will perform SMM setup.

  502 17:48:46.884126  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  503 17:48:46.890273  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  504 17:48:46.897047  Processing 16 relocs. Offset value of 0x00030000

  505 17:48:46.897482  Attempting to start 7 APs

  506 17:48:46.903275  Waiting for 10ms after sending INIT.

  507 17:48:46.917182  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  508 17:48:46.917613  done.

  509 17:48:46.920469  AP: slot 7 apic_id 7.

  510 17:48:46.923638  AP: slot 6 apic_id 6.

  511 17:48:46.924063  AP: slot 2 apic_id 3.

  512 17:48:46.926982  AP: slot 1 apic_id 2.

  513 17:48:46.930189  AP: slot 4 apic_id 5.

  514 17:48:46.930623  AP: slot 5 apic_id 4.

  515 17:48:46.937177  Waiting for 2nd SIPI to complete...done.

  516 17:48:46.943282  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  517 17:48:46.949837  Processing 13 relocs. Offset value of 0x00038000

  518 17:48:46.956888  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  519 17:48:46.959919  Installing SMM handler to 0x9a000000

  520 17:48:46.966736  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  521 17:48:46.973139  Processing 658 relocs. Offset value of 0x9a010000

  522 17:48:46.979842  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  523 17:48:46.983067  Processing 13 relocs. Offset value of 0x9a008000

  524 17:48:46.989337  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  525 17:48:46.996351  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  526 17:48:47.002414  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  527 17:48:47.005951  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  528 17:48:47.012298  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  529 17:48:47.019278  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  530 17:48:47.025585  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  531 17:48:47.032207  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  532 17:48:47.035890  Clearing SMI status registers

  533 17:48:47.036315  SMI_STS: PM1 

  534 17:48:47.038672  PM1_STS: PWRBTN 

  535 17:48:47.039141  TCO_STS: SECOND_TO 

  536 17:48:47.041940  New SMBASE 0x9a000000

  537 17:48:47.045179  In relocation handler: CPU 0

  538 17:48:47.048683  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  539 17:48:47.055346  Writing SMRR. base = 0x9a000006, mask=0xff000800

  540 17:48:47.055775  Relocation complete.

  541 17:48:47.058636  New SMBASE 0x99fff400

  542 17:48:47.061653  In relocation handler: CPU 3

  543 17:48:47.064773  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  544 17:48:47.071361  Writing SMRR. base = 0x9a000006, mask=0xff000800

  545 17:48:47.071793  Relocation complete.

  546 17:48:47.075361  New SMBASE 0x99ffe400

  547 17:48:47.078413  In relocation handler: CPU 7

  548 17:48:47.081496  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  549 17:48:47.087796  Writing SMRR. base = 0x9a000006, mask=0xff000800

  550 17:48:47.088226  Relocation complete.

  551 17:48:47.091534  New SMBASE 0x99ffe800

  552 17:48:47.094818  In relocation handler: CPU 6

  553 17:48:47.097982  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  554 17:48:47.104214  Writing SMRR. base = 0x9a000006, mask=0xff000800

  555 17:48:47.104641  Relocation complete.

  556 17:48:47.107989  New SMBASE 0x99ffec00

  557 17:48:47.110836  In relocation handler: CPU 5

  558 17:48:47.114243  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  559 17:48:47.120691  Writing SMRR. base = 0x9a000006, mask=0xff000800

  560 17:48:47.121251  Relocation complete.

  561 17:48:47.123819  New SMBASE 0x99fff000

  562 17:48:47.127014  In relocation handler: CPU 4

  563 17:48:47.130709  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  564 17:48:47.137014  Writing SMRR. base = 0x9a000006, mask=0xff000800

  565 17:48:47.137481  Relocation complete.

  566 17:48:47.140478  New SMBASE 0x99fffc00

  567 17:48:47.143851  In relocation handler: CPU 1

  568 17:48:47.146840  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  569 17:48:47.153230  Writing SMRR. base = 0x9a000006, mask=0xff000800

  570 17:48:47.153661  Relocation complete.

  571 17:48:47.156598  New SMBASE 0x99fff800

  572 17:48:47.160008  In relocation handler: CPU 2

  573 17:48:47.163061  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  574 17:48:47.169663  Writing SMRR. base = 0x9a000006, mask=0xff000800

  575 17:48:47.170216  Relocation complete.

  576 17:48:47.173201  Initializing CPU #0

  577 17:48:47.176376  CPU: vendor Intel device 806ec

  578 17:48:47.179622  CPU: family 06, model 8e, stepping 0c

  579 17:48:47.183308  Clearing out pending MCEs

  580 17:48:47.186400  Setting up local APIC...

  581 17:48:47.186876   apic_id: 0x00 done.

  582 17:48:47.189541  Turbo is available but hidden

  583 17:48:47.192778  Turbo is available and visible

  584 17:48:47.195858  VMX status: enabled

  585 17:48:47.199641  IA32_FEATURE_CONTROL status: locked

  586 17:48:47.202745  Skip microcode update

  587 17:48:47.203228  CPU #0 initialized

  588 17:48:47.205920  Initializing CPU #3

  589 17:48:47.206353  Initializing CPU #1

  590 17:48:47.209006  Initializing CPU #2

  591 17:48:47.212972  CPU: vendor Intel device 806ec

  592 17:48:47.215906  CPU: family 06, model 8e, stepping 0c

  593 17:48:47.218744  CPU: vendor Intel device 806ec

  594 17:48:47.222428  CPU: family 06, model 8e, stepping 0c

  595 17:48:47.225819  Clearing out pending MCEs

  596 17:48:47.229014  Clearing out pending MCEs

  597 17:48:47.232121  Setting up local APIC...

  598 17:48:47.235885  CPU: vendor Intel device 806ec

  599 17:48:47.238899  CPU: family 06, model 8e, stepping 0c

  600 17:48:47.242026  Clearing out pending MCEs

  601 17:48:47.242656  Initializing CPU #4

  602 17:48:47.245645  Initializing CPU #5

  603 17:48:47.248546  CPU: vendor Intel device 806ec

  604 17:48:47.251872  CPU: family 06, model 8e, stepping 0c

  605 17:48:47.255382  Initializing CPU #7

  606 17:48:47.255815  Initializing CPU #6

  607 17:48:47.258407  Setting up local APIC...

  608 17:48:47.261484  CPU: vendor Intel device 806ec

  609 17:48:47.265220  CPU: family 06, model 8e, stepping 0c

  610 17:48:47.268246  CPU: vendor Intel device 806ec

  611 17:48:47.271750  CPU: family 06, model 8e, stepping 0c

  612 17:48:47.274636  Clearing out pending MCEs

  613 17:48:47.277967  Clearing out pending MCEs

  614 17:48:47.278396  Setting up local APIC...

  615 17:48:47.281510   apic_id: 0x02 done.

  616 17:48:47.284814  Setting up local APIC...

  617 17:48:47.288041   apic_id: 0x01 done.

  618 17:48:47.288472   apic_id: 0x03 done.

  619 17:48:47.291103  VMX status: enabled

  620 17:48:47.291535  VMX status: enabled

  621 17:48:47.298004  IA32_FEATURE_CONTROL status: locked

  622 17:48:47.301397  IA32_FEATURE_CONTROL status: locked

  623 17:48:47.301959  Skip microcode update

  624 17:48:47.304418  Skip microcode update

  625 17:48:47.307967  CPU #1 initialized

  626 17:48:47.308400  CPU #2 initialized

  627 17:48:47.311184  Setting up local APIC...

  628 17:48:47.314474  Clearing out pending MCEs

  629 17:48:47.317507  CPU: vendor Intel device 806ec

  630 17:48:47.320579  CPU: family 06, model 8e, stepping 0c

  631 17:48:47.324285  Clearing out pending MCEs

  632 17:48:47.324718  Setting up local APIC...

  633 17:48:47.327361  VMX status: enabled

  634 17:48:47.330517   apic_id: 0x06 done.

  635 17:48:47.330997   apic_id: 0x07 done.

  636 17:48:47.334196  VMX status: enabled

  637 17:48:47.337348  VMX status: enabled

  638 17:48:47.340607  IA32_FEATURE_CONTROL status: locked

  639 17:48:47.341108   apic_id: 0x05 done.

  640 17:48:47.343730  Setting up local APIC...

  641 17:48:47.347294  IA32_FEATURE_CONTROL status: locked

  642 17:48:47.350427  Skip microcode update

  643 17:48:47.353543  Skip microcode update

  644 17:48:47.353970  CPU #6 initialized

  645 17:48:47.356992  CPU #7 initialized

  646 17:48:47.359983  IA32_FEATURE_CONTROL status: locked

  647 17:48:47.363978   apic_id: 0x04 done.

  648 17:48:47.364405  VMX status: enabled

  649 17:48:47.366813  VMX status: enabled

  650 17:48:47.370247  IA32_FEATURE_CONTROL status: locked

  651 17:48:47.373186  IA32_FEATURE_CONTROL status: locked

  652 17:48:47.376239  Skip microcode update

  653 17:48:47.376664  Skip microcode update

  654 17:48:47.380186  CPU #4 initialized

  655 17:48:47.382965  CPU #5 initialized

  656 17:48:47.383509  Skip microcode update

  657 17:48:47.386513  CPU #3 initialized

  658 17:48:47.389667  bsp_do_flight_plan done after 452 msecs.

  659 17:48:47.393259  CPU: frequency set to 4200 MHz

  660 17:48:47.396513  Enabling SMIs.

  661 17:48:47.396940  Locking SMM.

  662 17:48:47.411072  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  663 17:48:47.414607  CBFS @ c08000 size 3f8000

  664 17:48:47.421021  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  665 17:48:47.421451  CBFS: Locating 'vbt.bin'

  666 17:48:47.424699  CBFS: Found @ offset 5f5c0 size 499

  667 17:48:47.430887  Found a VBT of 4608 bytes after decompression

  668 17:48:47.614471  Display FSP Version Info HOB

  669 17:48:47.618150  Reference Code - CPU = 9.0.1e.30

  670 17:48:47.620918  uCode Version = 0.0.0.ca

  671 17:48:47.624564  TXT ACM version = ff.ff.ff.ffff

  672 17:48:47.627535  Display FSP Version Info HOB

  673 17:48:47.631124  Reference Code - ME = 9.0.1e.30

  674 17:48:47.634203  MEBx version = 0.0.0.0

  675 17:48:47.637410  ME Firmware Version = Consumer SKU

  676 17:48:47.640472  Display FSP Version Info HOB

  677 17:48:47.644349  Reference Code - CML PCH = 9.0.1e.30

  678 17:48:47.647346  PCH-CRID Status = Disabled

  679 17:48:47.650500  PCH-CRID Original Value = ff.ff.ff.ffff

  680 17:48:47.653634  PCH-CRID New Value = ff.ff.ff.ffff

  681 17:48:47.657064  OPROM - RST - RAID = ff.ff.ff.ffff

  682 17:48:47.660026  ChipsetInit Base Version = ff.ff.ff.ffff

  683 17:48:47.666707  ChipsetInit Oem Version = ff.ff.ff.ffff

  684 17:48:47.666835  Display FSP Version Info HOB

  685 17:48:47.672911  Reference Code - SA - System Agent = 9.0.1e.30

  686 17:48:47.676581  Reference Code - MRC = 0.7.1.6c

  687 17:48:47.679818  SA - PCIe Version = 9.0.1e.30

  688 17:48:47.682892  SA-CRID Status = Disabled

  689 17:48:47.686042  SA-CRID Original Value = 0.0.0.c

  690 17:48:47.686144  SA-CRID New Value = 0.0.0.c

  691 17:48:47.689597  OPROM - VBIOS = ff.ff.ff.ffff

  692 17:48:47.693170  RTC Init

  693 17:48:47.696454  Set power on after power failure.

  694 17:48:47.699548  Disabling Deep S3

  695 17:48:47.699658  Disabling Deep S3

  696 17:48:47.703124  Disabling Deep S4

  697 17:48:47.703231  Disabling Deep S4

  698 17:48:47.706284  Disabling Deep S5

  699 17:48:47.706403  Disabling Deep S5

  700 17:48:47.712987  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1

  701 17:48:47.716258  Enumerating buses...

  702 17:48:47.719341  Show all devs... Before device enumeration.

  703 17:48:47.722576  Root Device: enabled 1

  704 17:48:47.725719  CPU_CLUSTER: 0: enabled 1

  705 17:48:47.725821  DOMAIN: 0000: enabled 1

  706 17:48:47.729435  APIC: 00: enabled 1

  707 17:48:47.732299  PCI: 00:00.0: enabled 1

  708 17:48:47.735715  PCI: 00:02.0: enabled 1

  709 17:48:47.735824  PCI: 00:04.0: enabled 0

  710 17:48:47.738877  PCI: 00:05.0: enabled 0

  711 17:48:47.742443  PCI: 00:12.0: enabled 1

  712 17:48:47.745473  PCI: 00:12.5: enabled 0

  713 17:48:47.745580  PCI: 00:12.6: enabled 0

  714 17:48:47.748620  PCI: 00:14.0: enabled 1

  715 17:48:47.752272  PCI: 00:14.1: enabled 0

  716 17:48:47.752464  PCI: 00:14.3: enabled 1

  717 17:48:47.755236  PCI: 00:14.5: enabled 0

  718 17:48:47.758381  PCI: 00:15.0: enabled 1

  719 17:48:47.761474  PCI: 00:15.1: enabled 1

  720 17:48:47.761575  PCI: 00:15.2: enabled 0

  721 17:48:47.765107  PCI: 00:15.3: enabled 0

  722 17:48:47.768149  PCI: 00:16.0: enabled 1

  723 17:48:47.771420  PCI: 00:16.1: enabled 0

  724 17:48:47.771542  PCI: 00:16.2: enabled 0

  725 17:48:47.775168  PCI: 00:16.3: enabled 0

  726 17:48:47.778106  PCI: 00:16.4: enabled 0

  727 17:48:47.781231  PCI: 00:16.5: enabled 0

  728 17:48:47.781342  PCI: 00:17.0: enabled 1

  729 17:48:47.784369  PCI: 00:19.0: enabled 1

  730 17:48:47.788099  PCI: 00:19.1: enabled 0

  731 17:48:47.791304  PCI: 00:19.2: enabled 0

  732 17:48:47.791408  PCI: 00:1a.0: enabled 0

  733 17:48:47.794414  PCI: 00:1c.0: enabled 0

  734 17:48:47.797421  PCI: 00:1c.1: enabled 0

  735 17:48:47.801010  PCI: 00:1c.2: enabled 0

  736 17:48:47.801115  PCI: 00:1c.3: enabled 0

  737 17:48:47.803940  PCI: 00:1c.4: enabled 0

  738 17:48:47.807389  PCI: 00:1c.5: enabled 0

  739 17:48:47.810661  PCI: 00:1c.6: enabled 0

  740 17:48:47.810790  PCI: 00:1c.7: enabled 0

  741 17:48:47.814224  PCI: 00:1d.0: enabled 1

  742 17:48:47.817356  PCI: 00:1d.1: enabled 0

  743 17:48:47.820500  PCI: 00:1d.2: enabled 0

  744 17:48:47.820619  PCI: 00:1d.3: enabled 0

  745 17:48:47.823661  PCI: 00:1d.4: enabled 0

  746 17:48:47.826697  PCI: 00:1d.5: enabled 1

  747 17:48:47.829992  PCI: 00:1e.0: enabled 1

  748 17:48:47.830093  PCI: 00:1e.1: enabled 0

  749 17:48:47.833951  PCI: 00:1e.2: enabled 1

  750 17:48:47.836889  PCI: 00:1e.3: enabled 1

  751 17:48:47.839861  PCI: 00:1f.0: enabled 1

  752 17:48:47.839939  PCI: 00:1f.1: enabled 1

  753 17:48:47.843335  PCI: 00:1f.2: enabled 1

  754 17:48:47.846296  PCI: 00:1f.3: enabled 1

  755 17:48:47.850042  PCI: 00:1f.4: enabled 1

  756 17:48:47.850154  PCI: 00:1f.5: enabled 1

  757 17:48:47.853137  PCI: 00:1f.6: enabled 0

  758 17:48:47.856243  USB0 port 0: enabled 1

  759 17:48:47.859808  I2C: 00:15: enabled 1

  760 17:48:47.859911  I2C: 00:5d: enabled 1

  761 17:48:47.862884  GENERIC: 0.0: enabled 1

  762 17:48:47.865884  I2C: 00:1a: enabled 1

  763 17:48:47.865991  I2C: 00:38: enabled 1

  764 17:48:47.869670  I2C: 00:39: enabled 1

  765 17:48:47.872739  I2C: 00:3a: enabled 1

  766 17:48:47.872839  I2C: 00:3b: enabled 1

  767 17:48:47.875862  PCI: 00:00.0: enabled 1

  768 17:48:47.878957  SPI: 00: enabled 1

  769 17:48:47.879034  SPI: 01: enabled 1

  770 17:48:47.882720  PNP: 0c09.0: enabled 1

  771 17:48:47.885520  USB2 port 0: enabled 1

  772 17:48:47.885593  USB2 port 1: enabled 1

  773 17:48:47.889377  USB2 port 2: enabled 0

  774 17:48:47.892650  USB2 port 3: enabled 0

  775 17:48:47.895685  USB2 port 5: enabled 0

  776 17:48:47.895787  USB2 port 6: enabled 1

  777 17:48:47.898815  USB2 port 9: enabled 1

  778 17:48:47.902063  USB3 port 0: enabled 1

  779 17:48:47.902170  USB3 port 1: enabled 1

  780 17:48:47.905075  USB3 port 2: enabled 1

  781 17:48:47.908709  USB3 port 3: enabled 1

  782 17:48:47.911719  USB3 port 4: enabled 0

  783 17:48:47.911793  APIC: 02: enabled 1

  784 17:48:47.915241  APIC: 03: enabled 1

  785 17:48:47.918237  APIC: 01: enabled 1

  786 17:48:47.918343  APIC: 05: enabled 1

  787 17:48:47.921721  APIC: 04: enabled 1

  788 17:48:47.921824  APIC: 06: enabled 1

  789 17:48:47.925318  APIC: 07: enabled 1

  790 17:48:47.928460  Compare with tree...

  791 17:48:47.928566  Root Device: enabled 1

  792 17:48:47.931435   CPU_CLUSTER: 0: enabled 1

  793 17:48:47.934640    APIC: 00: enabled 1

  794 17:48:47.937835    APIC: 02: enabled 1

  795 17:48:47.937933    APIC: 03: enabled 1

  796 17:48:47.941031    APIC: 01: enabled 1

  797 17:48:47.944653    APIC: 05: enabled 1

  798 17:48:47.944751    APIC: 04: enabled 1

  799 17:48:47.947530    APIC: 06: enabled 1

  800 17:48:47.951148    APIC: 07: enabled 1

  801 17:48:47.954142   DOMAIN: 0000: enabled 1

  802 17:48:47.954243    PCI: 00:00.0: enabled 1

  803 17:48:47.957342    PCI: 00:02.0: enabled 1

  804 17:48:47.960948    PCI: 00:04.0: enabled 0

  805 17:48:47.964137    PCI: 00:05.0: enabled 0

  806 17:48:47.967219    PCI: 00:12.0: enabled 1

  807 17:48:47.967295    PCI: 00:12.5: enabled 0

  808 17:48:47.970718    PCI: 00:12.6: enabled 0

  809 17:48:47.973806    PCI: 00:14.0: enabled 1

  810 17:48:47.976694     USB0 port 0: enabled 1

  811 17:48:47.980296      USB2 port 0: enabled 1

  812 17:48:47.980412      USB2 port 1: enabled 1

  813 17:48:47.983405      USB2 port 2: enabled 0

  814 17:48:47.986565      USB2 port 3: enabled 0

  815 17:48:47.990162      USB2 port 5: enabled 0

  816 17:48:47.993270      USB2 port 6: enabled 1

  817 17:48:47.996445      USB2 port 9: enabled 1

  818 17:48:47.996535      USB3 port 0: enabled 1

  819 17:48:47.999595      USB3 port 1: enabled 1

  820 17:48:48.003481      USB3 port 2: enabled 1

  821 17:48:48.006571      USB3 port 3: enabled 1

  822 17:48:48.009722      USB3 port 4: enabled 0

  823 17:48:48.012736    PCI: 00:14.1: enabled 0

  824 17:48:48.012821    PCI: 00:14.3: enabled 1

  825 17:48:48.016457    PCI: 00:14.5: enabled 0

  826 17:48:48.019372    PCI: 00:15.0: enabled 1

  827 17:48:48.022329     I2C: 00:15: enabled 1

  828 17:48:48.025958    PCI: 00:15.1: enabled 1

  829 17:48:48.026040     I2C: 00:5d: enabled 1

  830 17:48:48.028918     GENERIC: 0.0: enabled 1

  831 17:48:48.032367    PCI: 00:15.2: enabled 0

  832 17:48:48.035404    PCI: 00:15.3: enabled 0

  833 17:48:48.039206    PCI: 00:16.0: enabled 1

  834 17:48:48.039294    PCI: 00:16.1: enabled 0

  835 17:48:48.042283    PCI: 00:16.2: enabled 0

  836 17:48:48.045390    PCI: 00:16.3: enabled 0

  837 17:48:48.048587    PCI: 00:16.4: enabled 0

  838 17:48:48.052103    PCI: 00:16.5: enabled 0

  839 17:48:48.052186    PCI: 00:17.0: enabled 1

  840 17:48:48.054977    PCI: 00:19.0: enabled 1

  841 17:48:48.058731     I2C: 00:1a: enabled 1

  842 17:48:48.061841     I2C: 00:38: enabled 1

  843 17:48:48.064907     I2C: 00:39: enabled 1

  844 17:48:48.064990     I2C: 00:3a: enabled 1

  845 17:48:48.068038     I2C: 00:3b: enabled 1

  846 17:48:48.071789    PCI: 00:19.1: enabled 0

  847 17:48:48.074768    PCI: 00:19.2: enabled 0

  848 17:48:48.078332    PCI: 00:1a.0: enabled 0

  849 17:48:48.078415    PCI: 00:1c.0: enabled 0

  850 17:48:48.081222    PCI: 00:1c.1: enabled 0

  851 17:48:48.084612    PCI: 00:1c.2: enabled 0

  852 17:48:48.088021    PCI: 00:1c.3: enabled 0

  853 17:48:48.091107    PCI: 00:1c.4: enabled 0

  854 17:48:48.091189    PCI: 00:1c.5: enabled 0

  855 17:48:48.094778    PCI: 00:1c.6: enabled 0

  856 17:48:48.097942    PCI: 00:1c.7: enabled 0

  857 17:48:48.100960    PCI: 00:1d.0: enabled 1

  858 17:48:48.104015    PCI: 00:1d.1: enabled 0

  859 17:48:48.104116    PCI: 00:1d.2: enabled 0

  860 17:48:48.107820    PCI: 00:1d.3: enabled 0

  861 17:48:48.110964    PCI: 00:1d.4: enabled 0

  862 17:48:48.114002    PCI: 00:1d.5: enabled 1

  863 17:48:48.117183     PCI: 00:00.0: enabled 1

  864 17:48:48.117266    PCI: 00:1e.0: enabled 1

  865 17:48:48.120216    PCI: 00:1e.1: enabled 0

  866 17:48:48.123859    PCI: 00:1e.2: enabled 1

  867 17:48:48.126941     SPI: 00: enabled 1

  868 17:48:48.130042    PCI: 00:1e.3: enabled 1

  869 17:48:48.130137     SPI: 01: enabled 1

  870 17:48:48.133802    PCI: 00:1f.0: enabled 1

  871 17:48:48.136997     PNP: 0c09.0: enabled 1

  872 17:48:48.139860    PCI: 00:1f.1: enabled 1

  873 17:48:48.143183    PCI: 00:1f.2: enabled 1

  874 17:48:48.143265    PCI: 00:1f.3: enabled 1

  875 17:48:48.146397    PCI: 00:1f.4: enabled 1

  876 17:48:48.150039    PCI: 00:1f.5: enabled 1

  877 17:48:48.153210    PCI: 00:1f.6: enabled 0

  878 17:48:48.153324  Root Device scanning...

  879 17:48:48.156218  scan_static_bus for Root Device

  880 17:48:48.160191  CPU_CLUSTER: 0 enabled

  881 17:48:48.163155  DOMAIN: 0000 enabled

  882 17:48:48.166149  DOMAIN: 0000 scanning...

  883 17:48:48.169297  PCI: pci_scan_bus for bus 00

  884 17:48:48.172900  PCI: 00:00.0 [8086/0000] ops

  885 17:48:48.176154  PCI: 00:00.0 [8086/9b61] enabled

  886 17:48:48.179331  PCI: 00:02.0 [8086/0000] bus ops

  887 17:48:48.182384  PCI: 00:02.0 [8086/9b41] enabled

  888 17:48:48.185487  PCI: 00:04.0 [8086/1903] disabled

  889 17:48:48.189125  PCI: 00:08.0 [8086/1911] enabled

  890 17:48:48.191953  PCI: 00:12.0 [8086/02f9] enabled

  891 17:48:48.195543  PCI: 00:14.0 [8086/0000] bus ops

  892 17:48:48.198492  PCI: 00:14.0 [8086/02ed] enabled

  893 17:48:48.201737  PCI: 00:14.2 [8086/02ef] enabled

  894 17:48:48.205172  PCI: 00:14.3 [8086/02f0] enabled

  895 17:48:48.208305  PCI: 00:15.0 [8086/0000] bus ops

  896 17:48:48.212054  PCI: 00:15.0 [8086/02e8] enabled

  897 17:48:48.215156  PCI: 00:15.1 [8086/0000] bus ops

  898 17:48:48.218476  PCI: 00:15.1 [8086/02e9] enabled

  899 17:48:48.221543  PCI: 00:16.0 [8086/0000] ops

  900 17:48:48.224628  PCI: 00:16.0 [8086/02e0] enabled

  901 17:48:48.228259  PCI: 00:17.0 [8086/0000] ops

  902 17:48:48.231045  PCI: 00:17.0 [8086/02d3] enabled

  903 17:48:48.234580  PCI: 00:19.0 [8086/0000] bus ops

  904 17:48:48.237841  PCI: 00:19.0 [8086/02c5] enabled

  905 17:48:48.240964  PCI: 00:1d.0 [8086/0000] bus ops

  906 17:48:48.244666  PCI: 00:1d.0 [8086/02b0] enabled

  907 17:48:48.250566  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  908 17:48:48.254076  PCI: 00:1e.0 [8086/0000] ops

  909 17:48:48.257166  PCI: 00:1e.0 [8086/02a8] enabled

  910 17:48:48.260912  PCI: 00:1e.2 [8086/0000] bus ops

  911 17:48:48.263962  PCI: 00:1e.2 [8086/02aa] enabled

  912 17:48:48.267302  PCI: 00:1e.3 [8086/0000] bus ops

  913 17:48:48.270368  PCI: 00:1e.3 [8086/02ab] enabled

  914 17:48:48.273439  PCI: 00:1f.0 [8086/0000] bus ops

  915 17:48:48.277165  PCI: 00:1f.0 [8086/0284] enabled

  916 17:48:48.280203  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  917 17:48:48.286734  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  918 17:48:48.289806  PCI: 00:1f.3 [8086/0000] bus ops

  919 17:48:48.292930  PCI: 00:1f.3 [8086/02c8] enabled

  920 17:48:48.296706  PCI: 00:1f.4 [8086/0000] bus ops

  921 17:48:48.299755  PCI: 00:1f.4 [8086/02a3] enabled

  922 17:48:48.302754  PCI: 00:1f.5 [8086/0000] bus ops

  923 17:48:48.306566  PCI: 00:1f.5 [8086/02a4] enabled

  924 17:48:48.309286  PCI: Leftover static devices:

  925 17:48:48.312731  PCI: 00:05.0

  926 17:48:48.312813  PCI: 00:12.5

  927 17:48:48.312879  PCI: 00:12.6

  928 17:48:48.315909  PCI: 00:14.1

  929 17:48:48.315992  PCI: 00:14.5

  930 17:48:48.319452  PCI: 00:15.2

  931 17:48:48.319535  PCI: 00:15.3

  932 17:48:48.322710  PCI: 00:16.1

  933 17:48:48.322817  PCI: 00:16.2

  934 17:48:48.322884  PCI: 00:16.3

  935 17:48:48.325768  PCI: 00:16.4

  936 17:48:48.325850  PCI: 00:16.5

  937 17:48:48.328929  PCI: 00:19.1

  938 17:48:48.329011  PCI: 00:19.2

  939 17:48:48.329077  PCI: 00:1a.0

  940 17:48:48.332561  PCI: 00:1c.0

  941 17:48:48.332644  PCI: 00:1c.1

  942 17:48:48.335409  PCI: 00:1c.2

  943 17:48:48.335492  PCI: 00:1c.3

  944 17:48:48.338747  PCI: 00:1c.4

  945 17:48:48.338853  PCI: 00:1c.5

  946 17:48:48.338919  PCI: 00:1c.6

  947 17:48:48.342185  PCI: 00:1c.7

  948 17:48:48.342267  PCI: 00:1d.1

  949 17:48:48.345184  PCI: 00:1d.2

  950 17:48:48.345266  PCI: 00:1d.3

  951 17:48:48.345331  PCI: 00:1d.4

  952 17:48:48.348951  PCI: 00:1d.5

  953 17:48:48.349033  PCI: 00:1e.1

  954 17:48:48.352100  PCI: 00:1f.1

  955 17:48:48.352183  PCI: 00:1f.2

  956 17:48:48.355115  PCI: 00:1f.6

  957 17:48:48.358133  PCI: Check your devicetree.cb.

  958 17:48:48.358216  PCI: 00:02.0 scanning...

  959 17:48:48.361449  scan_generic_bus for PCI: 00:02.0

  960 17:48:48.368439  scan_generic_bus for PCI: 00:02.0 done

  961 17:48:48.371411  scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs

  962 17:48:48.374772  PCI: 00:14.0 scanning...

  963 17:48:48.377703  scan_static_bus for PCI: 00:14.0

  964 17:48:48.381309  USB0 port 0 enabled

  965 17:48:48.384385  USB0 port 0 scanning...

  966 17:48:48.387546  scan_static_bus for USB0 port 0

  967 17:48:48.387629  USB2 port 0 enabled

  968 17:48:48.390687  USB2 port 1 enabled

  969 17:48:48.393930  USB2 port 2 disabled

  970 17:48:48.394012  USB2 port 3 disabled

  971 17:48:48.397713  USB2 port 5 disabled

  972 17:48:48.400950  USB2 port 6 enabled

  973 17:48:48.401033  USB2 port 9 enabled

  974 17:48:48.404150  USB3 port 0 enabled

  975 17:48:48.404232  USB3 port 1 enabled

  976 17:48:48.407332  USB3 port 2 enabled

  977 17:48:48.410520  USB3 port 3 enabled

  978 17:48:48.410602  USB3 port 4 disabled

  979 17:48:48.413714  USB2 port 0 scanning...

  980 17:48:48.416825  scan_static_bus for USB2 port 0

  981 17:48:48.420222  scan_static_bus for USB2 port 0 done

  982 17:48:48.426708  scan_bus: scanning of bus USB2 port 0 took 9695 usecs

  983 17:48:48.429717  USB2 port 1 scanning...

  984 17:48:48.432888  scan_static_bus for USB2 port 1

  985 17:48:48.436686  scan_static_bus for USB2 port 1 done

  986 17:48:48.442842  scan_bus: scanning of bus USB2 port 1 took 9694 usecs

  987 17:48:48.442930  USB2 port 6 scanning...

  988 17:48:48.446333  scan_static_bus for USB2 port 6

  989 17:48:48.452675  scan_static_bus for USB2 port 6 done

  990 17:48:48.456039  scan_bus: scanning of bus USB2 port 6 took 9702 usecs

  991 17:48:48.459088  USB2 port 9 scanning...

  992 17:48:48.462877  scan_static_bus for USB2 port 9

  993 17:48:48.465716  scan_static_bus for USB2 port 9 done

  994 17:48:48.472470  scan_bus: scanning of bus USB2 port 9 took 9697 usecs

  995 17:48:48.475472  USB3 port 0 scanning...

  996 17:48:48.478447  scan_static_bus for USB3 port 0

  997 17:48:48.481901  scan_static_bus for USB3 port 0 done

  998 17:48:48.485576  scan_bus: scanning of bus USB3 port 0 took 9708 usecs

  999 17:48:48.488500  USB3 port 1 scanning...

 1000 17:48:48.491593  scan_static_bus for USB3 port 1

 1001 17:48:48.495338  scan_static_bus for USB3 port 1 done

 1002 17:48:48.501903  scan_bus: scanning of bus USB3 port 1 took 9683 usecs

 1003 17:48:48.504920  USB3 port 2 scanning...

 1004 17:48:48.507968  scan_static_bus for USB3 port 2

 1005 17:48:48.511717  scan_static_bus for USB3 port 2 done

 1006 17:48:48.517890  scan_bus: scanning of bus USB3 port 2 took 9708 usecs

 1007 17:48:48.517999  USB3 port 3 scanning...

 1008 17:48:48.520994  scan_static_bus for USB3 port 3

 1009 17:48:48.527435  scan_static_bus for USB3 port 3 done

 1010 17:48:48.531027  scan_bus: scanning of bus USB3 port 3 took 9708 usecs

 1011 17:48:48.533919  scan_static_bus for USB0 port 0 done

 1012 17:48:48.540508  scan_bus: scanning of bus USB0 port 0 took 155344 usecs

 1013 17:48:48.543735  scan_static_bus for PCI: 00:14.0 done

 1014 17:48:48.550543  scan_bus: scanning of bus PCI: 00:14.0 took 172976 usecs

 1015 17:48:48.553688  PCI: 00:15.0 scanning...

 1016 17:48:48.556699  scan_generic_bus for PCI: 00:15.0

 1017 17:48:48.560335  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1018 17:48:48.563776  scan_generic_bus for PCI: 00:15.0 done

 1019 17:48:48.570080  scan_bus: scanning of bus PCI: 00:15.0 took 14294 usecs

 1020 17:48:48.573062  PCI: 00:15.1 scanning...

 1021 17:48:48.576487  scan_generic_bus for PCI: 00:15.1

 1022 17:48:48.579786  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1023 17:48:48.583294  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1024 17:48:48.589412  scan_generic_bus for PCI: 00:15.1 done

 1025 17:48:48.593009  scan_bus: scanning of bus PCI: 00:15.1 took 18615 usecs

 1026 17:48:48.595996  PCI: 00:19.0 scanning...

 1027 17:48:48.599533  scan_generic_bus for PCI: 00:19.0

 1028 17:48:48.605717  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1029 17:48:48.608905  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1030 17:48:48.612022  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1031 17:48:48.615811  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1032 17:48:48.621994  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1033 17:48:48.625348  scan_generic_bus for PCI: 00:19.0 done

 1034 17:48:48.628909  scan_bus: scanning of bus PCI: 00:19.0 took 30758 usecs

 1035 17:48:48.632039  PCI: 00:1d.0 scanning...

 1036 17:48:48.635125  do_pci_scan_bridge for PCI: 00:1d.0

 1037 17:48:48.638424  PCI: pci_scan_bus for bus 01

 1038 17:48:48.641908  PCI: 01:00.0 [1c5c/1327] enabled

 1039 17:48:48.648196  Enabling Common Clock Configuration

 1040 17:48:48.651368  L1 Sub-State supported from root port 29

 1041 17:48:48.654532  L1 Sub-State Support = 0xf

 1042 17:48:48.657749  CommonModeRestoreTime = 0x28

 1043 17:48:48.660993  Power On Value = 0x16, Power On Scale = 0x0

 1044 17:48:48.661075  ASPM: Enabled L1

 1045 17:48:48.667912  scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs

 1046 17:48:48.671033  PCI: 00:1e.2 scanning...

 1047 17:48:48.674416  scan_generic_bus for PCI: 00:1e.2

 1048 17:48:48.677424  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1049 17:48:48.680921  scan_generic_bus for PCI: 00:1e.2 done

 1050 17:48:48.687300  scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs

 1051 17:48:48.690250  PCI: 00:1e.3 scanning...

 1052 17:48:48.693826  scan_generic_bus for PCI: 00:1e.3

 1053 17:48:48.696852  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1054 17:48:48.700512  scan_generic_bus for PCI: 00:1e.3 done

 1055 17:48:48.707236  scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs

 1056 17:48:48.710184  PCI: 00:1f.0 scanning...

 1057 17:48:48.713348  scan_static_bus for PCI: 00:1f.0

 1058 17:48:48.716370  PNP: 0c09.0 enabled

 1059 17:48:48.720213  scan_static_bus for PCI: 00:1f.0 done

 1060 17:48:48.726334  scan_bus: scanning of bus PCI: 00:1f.0 took 12052 usecs

 1061 17:48:48.726416  PCI: 00:1f.3 scanning...

 1062 17:48:48.733248  scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs

 1063 17:48:48.736335  PCI: 00:1f.4 scanning...

 1064 17:48:48.739483  scan_generic_bus for PCI: 00:1f.4

 1065 17:48:48.742619  scan_generic_bus for PCI: 00:1f.4 done

 1066 17:48:48.749555  scan_bus: scanning of bus PCI: 00:1f.4 took 10183 usecs

 1067 17:48:48.752711  PCI: 00:1f.5 scanning...

 1068 17:48:48.755744  scan_generic_bus for PCI: 00:1f.5

 1069 17:48:48.759268  scan_generic_bus for PCI: 00:1f.5 done

 1070 17:48:48.765369  scan_bus: scanning of bus PCI: 00:1f.5 took 10198 usecs

 1071 17:48:48.769068  scan_bus: scanning of bus DOMAIN: 0000 took 605170 usecs

 1072 17:48:48.775194  scan_static_bus for Root Device done

 1073 17:48:48.778272  scan_bus: scanning of bus Root Device took 625042 usecs

 1074 17:48:48.781789  done

 1075 17:48:48.781884  Chrome EC: UHEPI supported

 1076 17:48:48.788330  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1077 17:48:48.794975  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1078 17:48:48.801285  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1079 17:48:48.807992  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1080 17:48:48.811682  SPI flash protection: WPSW=0 SRP0=0

 1081 17:48:48.817781  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1082 17:48:48.821355  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1083 17:48:48.824469  found VGA at PCI: 00:02.0

 1084 17:48:48.827508  Setting up VGA for PCI: 00:02.0

 1085 17:48:48.834490  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1086 17:48:48.837751  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1087 17:48:48.840913  Allocating resources...

 1088 17:48:48.843956  Reading resources...

 1089 17:48:48.847110  Root Device read_resources bus 0 link: 0

 1090 17:48:48.850217  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1091 17:48:48.857209  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1092 17:48:48.860343  DOMAIN: 0000 read_resources bus 0 link: 0

 1093 17:48:48.867734  PCI: 00:14.0 read_resources bus 0 link: 0

 1094 17:48:48.871115  USB0 port 0 read_resources bus 0 link: 0

 1095 17:48:48.879249  USB0 port 0 read_resources bus 0 link: 0 done

 1096 17:48:48.882756  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1097 17:48:48.890033  PCI: 00:15.0 read_resources bus 1 link: 0

 1098 17:48:48.893083  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1099 17:48:48.899904  PCI: 00:15.1 read_resources bus 2 link: 0

 1100 17:48:48.903093  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1101 17:48:48.910583  PCI: 00:19.0 read_resources bus 3 link: 0

 1102 17:48:48.917421  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1103 17:48:48.920243  PCI: 00:1d.0 read_resources bus 1 link: 0

 1104 17:48:48.926758  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1105 17:48:48.929837  PCI: 00:1e.2 read_resources bus 4 link: 0

 1106 17:48:48.936741  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1107 17:48:48.939862  PCI: 00:1e.3 read_resources bus 5 link: 0

 1108 17:48:48.946648  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1109 17:48:48.949967  PCI: 00:1f.0 read_resources bus 0 link: 0

 1110 17:48:48.956702  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1111 17:48:48.963003  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1112 17:48:48.966125  Root Device read_resources bus 0 link: 0 done

 1113 17:48:48.969805  Done reading resources.

 1114 17:48:48.976155  Show resources in subtree (Root Device)...After reading.

 1115 17:48:48.979222   Root Device child on link 0 CPU_CLUSTER: 0

 1116 17:48:48.982294    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1117 17:48:48.985521     APIC: 00

 1118 17:48:48.985594     APIC: 02

 1119 17:48:48.989208     APIC: 03

 1120 17:48:48.989312     APIC: 01

 1121 17:48:48.989408     APIC: 05

 1122 17:48:48.991930     APIC: 04

 1123 17:48:48.992034     APIC: 06

 1124 17:48:49.041731     APIC: 07

 1125 17:48:49.041871    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1126 17:48:49.042163    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1127 17:48:49.042263    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1128 17:48:49.042381     PCI: 00:00.0

 1129 17:48:49.042493     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1130 17:48:49.042618     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1131 17:48:49.075790     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1132 17:48:49.076089     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1133 17:48:49.076196     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1134 17:48:49.079699     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1135 17:48:49.086028     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1136 17:48:49.092859     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1137 17:48:49.102298     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1138 17:48:49.112257     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1139 17:48:49.121858     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1140 17:48:49.131528     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1141 17:48:49.141232     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1142 17:48:49.151575     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1143 17:48:49.160921     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1144 17:48:49.167255     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1145 17:48:49.170993     PCI: 00:02.0

 1146 17:48:49.180290     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1147 17:48:49.190004     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1148 17:48:49.200100     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1149 17:48:49.200182     PCI: 00:04.0

 1150 17:48:49.203182     PCI: 00:08.0

 1151 17:48:49.213247     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1152 17:48:49.213348     PCI: 00:12.0

 1153 17:48:49.222579     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1154 17:48:49.229055     PCI: 00:14.0 child on link 0 USB0 port 0

 1155 17:48:49.238958     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1156 17:48:49.242254      USB0 port 0 child on link 0 USB2 port 0

 1157 17:48:49.245911       USB2 port 0

 1158 17:48:49.245997       USB2 port 1

 1159 17:48:49.248727       USB2 port 2

 1160 17:48:49.248799       USB2 port 3

 1161 17:48:49.252191       USB2 port 5

 1162 17:48:49.252268       USB2 port 6

 1163 17:48:49.255345       USB2 port 9

 1164 17:48:49.258703       USB3 port 0

 1165 17:48:49.258833       USB3 port 1

 1166 17:48:49.262159       USB3 port 2

 1167 17:48:49.262230       USB3 port 3

 1168 17:48:49.265156       USB3 port 4

 1169 17:48:49.265232     PCI: 00:14.2

 1170 17:48:49.275104     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1171 17:48:49.284431     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1172 17:48:49.287674     PCI: 00:14.3

 1173 17:48:49.297833     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1174 17:48:49.301006     PCI: 00:15.0 child on link 0 I2C: 01:15

 1175 17:48:49.310932     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1176 17:48:49.314009      I2C: 01:15

 1177 17:48:49.317530     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1178 17:48:49.326986     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1179 17:48:49.330446      I2C: 02:5d

 1180 17:48:49.330527      GENERIC: 0.0

 1181 17:48:49.333405     PCI: 00:16.0

 1182 17:48:49.343353     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 17:48:49.343435     PCI: 00:17.0

 1184 17:48:49.352965     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1185 17:48:49.363287     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1186 17:48:49.369290     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1187 17:48:49.379229     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1188 17:48:49.386077     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1189 17:48:49.395907     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1190 17:48:49.399061     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1191 17:48:49.408514     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1192 17:48:49.411716      I2C: 03:1a

 1193 17:48:49.411798      I2C: 03:38

 1194 17:48:49.415383      I2C: 03:39

 1195 17:48:49.415466      I2C: 03:3a

 1196 17:48:49.418667      I2C: 03:3b

 1197 17:48:49.421534     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1198 17:48:49.431571     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1199 17:48:49.441442     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1200 17:48:49.450911     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1201 17:48:49.451005      PCI: 01:00.0

 1202 17:48:49.460733      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1203 17:48:49.464165     PCI: 00:1e.0

 1204 17:48:49.473573     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1205 17:48:49.483225     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1206 17:48:49.486463     PCI: 00:1e.2 child on link 0 SPI: 00

 1207 17:48:49.499389     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1208 17:48:49.499479      SPI: 00

 1209 17:48:49.503066     PCI: 00:1e.3 child on link 0 SPI: 01

 1210 17:48:49.512558     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1211 17:48:49.516270      SPI: 01

 1212 17:48:49.519378     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1213 17:48:49.529153     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1214 17:48:49.535521     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1215 17:48:49.538698      PNP: 0c09.0

 1216 17:48:49.548665      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1217 17:48:49.548759     PCI: 00:1f.3

 1218 17:48:49.558314     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1219 17:48:49.568152     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1220 17:48:49.571705     PCI: 00:1f.4

 1221 17:48:49.577988     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1222 17:48:49.588060     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1223 17:48:49.591198     PCI: 00:1f.5

 1224 17:48:49.600444     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1225 17:48:49.607101  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1226 17:48:49.613755  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1227 17:48:49.620484  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1228 17:48:49.623708  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1229 17:48:49.626602  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1230 17:48:49.630209  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1231 17:48:49.633320  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1232 17:48:49.639716  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1233 17:48:49.646490  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1234 17:48:49.656029  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1235 17:48:49.662747  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1236 17:48:49.668895  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1237 17:48:49.675730  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1238 17:48:49.682379  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1239 17:48:49.685529  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1240 17:48:49.691756  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1241 17:48:49.694920  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1242 17:48:49.701651  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1243 17:48:49.704746  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1244 17:48:49.711574  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1245 17:48:49.714604  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1246 17:48:49.721167  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1247 17:48:49.724229  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1248 17:48:49.730934  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1249 17:48:49.733854  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1250 17:48:49.740777  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1251 17:48:49.743903  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1252 17:48:49.750230  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1253 17:48:49.753884  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1254 17:48:49.760142  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1255 17:48:49.763148  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1256 17:48:49.770033  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1257 17:48:49.773123  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1258 17:48:49.779423  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1259 17:48:49.783064  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1260 17:48:49.789680  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1261 17:48:49.792706  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1262 17:48:49.802760  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1263 17:48:49.805605  avoid_fixed_resources: DOMAIN: 0000

 1264 17:48:49.811985  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1265 17:48:49.818727  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1266 17:48:49.825384  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1267 17:48:49.831769  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1268 17:48:49.841711  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1269 17:48:49.847903  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1270 17:48:49.854708  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1271 17:48:49.864168  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1272 17:48:49.870806  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1273 17:48:49.877524  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1274 17:48:49.886983  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1275 17:48:49.893685  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1276 17:48:49.897311  Setting resources...

 1277 17:48:49.903297  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1278 17:48:49.906509  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1279 17:48:49.910118  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1280 17:48:49.913301  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1281 17:48:49.916432  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1282 17:48:49.922921  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1283 17:48:49.929224  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1284 17:48:49.935904  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1285 17:48:49.945987  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1286 17:48:49.949011  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1287 17:48:49.955569  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1288 17:48:49.958681  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1289 17:48:49.965498  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1290 17:48:49.968583  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1291 17:48:49.975034  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1292 17:48:49.978571  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1293 17:48:49.985110  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1294 17:48:49.988280  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1295 17:48:49.995091  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1296 17:48:49.998045  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1297 17:48:50.004694  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1298 17:48:50.007594  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1299 17:48:50.014239  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1300 17:48:50.017932  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1301 17:48:50.024137  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1302 17:48:50.027242  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1303 17:48:50.030486  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1304 17:48:50.037397  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1305 17:48:50.040372  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1306 17:48:50.046890  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1307 17:48:50.050035  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1308 17:48:50.056730  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1309 17:48:50.063169  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1310 17:48:50.073161  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1311 17:48:50.079526  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1312 17:48:50.085763  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1313 17:48:50.092404  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1314 17:48:50.099233  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1315 17:48:50.102235  Root Device assign_resources, bus 0 link: 0

 1316 17:48:50.108554  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1317 17:48:50.115304  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1318 17:48:50.125222  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1319 17:48:50.131912  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1320 17:48:50.141405  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1321 17:48:50.147661  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1322 17:48:50.157856  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1323 17:48:50.160952  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1324 17:48:50.167537  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1325 17:48:50.174103  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1326 17:48:50.183559  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1327 17:48:50.190649  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1328 17:48:50.200497  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1329 17:48:50.203324  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1330 17:48:50.210072  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1331 17:48:50.216267  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1332 17:48:50.220045  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1333 17:48:50.226262  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1334 17:48:50.233093  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1335 17:48:50.243151  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1336 17:48:50.249579  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1337 17:48:50.259286  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1338 17:48:50.266081  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1339 17:48:50.272315  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1340 17:48:50.281887  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1341 17:48:50.288616  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1342 17:48:50.294921  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1343 17:48:50.298652  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1344 17:48:50.308007  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1345 17:48:50.314613  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1346 17:48:50.324600  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1347 17:48:50.327785  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1348 17:48:50.337806  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1349 17:48:50.340876  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1350 17:48:50.350654  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1351 17:48:50.357400  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1352 17:48:50.363686  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1353 17:48:50.367183  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1354 17:48:50.376798  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1355 17:48:50.379820  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1356 17:48:50.386335  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1357 17:48:50.390023  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1358 17:48:50.396306  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1359 17:48:50.399501  LPC: Trying to open IO window from 800 size 1ff

 1360 17:48:50.409085  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1361 17:48:50.415936  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1362 17:48:50.425380  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1363 17:48:50.432196  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1364 17:48:50.438289  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1365 17:48:50.441981  Root Device assign_resources, bus 0 link: 0

 1366 17:48:50.445123  Done setting resources.

 1367 17:48:50.451354  Show resources in subtree (Root Device)...After assigning values.

 1368 17:48:50.454730   Root Device child on link 0 CPU_CLUSTER: 0

 1369 17:48:50.460862    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1370 17:48:50.460945     APIC: 00

 1371 17:48:50.461010     APIC: 02

 1372 17:48:50.464483     APIC: 03

 1373 17:48:50.464564     APIC: 01

 1374 17:48:50.467555     APIC: 05

 1375 17:48:50.467636     APIC: 04

 1376 17:48:50.467700     APIC: 06

 1377 17:48:50.471180     APIC: 07

 1378 17:48:50.474247    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1379 17:48:50.484021    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1380 17:48:50.493808    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1381 17:48:50.497029     PCI: 00:00.0

 1382 17:48:50.507070     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1383 17:48:50.516342     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1384 17:48:50.526376     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1385 17:48:50.533115     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1386 17:48:50.542746     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1387 17:48:50.552472     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1388 17:48:50.562079     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1389 17:48:50.571898     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1390 17:48:50.581829     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1391 17:48:50.588479     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1392 17:48:50.598049     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1393 17:48:50.607887     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1394 17:48:50.617302     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1395 17:48:50.627126     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1396 17:48:50.636663     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1397 17:48:50.646816     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1398 17:48:50.646900     PCI: 00:02.0

 1399 17:48:50.659874     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1400 17:48:50.669712     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1401 17:48:50.679332     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1402 17:48:50.679418     PCI: 00:04.0

 1403 17:48:50.682286     PCI: 00:08.0

 1404 17:48:50.692220     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1405 17:48:50.695771     PCI: 00:12.0

 1406 17:48:50.705271     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1407 17:48:50.708885     PCI: 00:14.0 child on link 0 USB0 port 0

 1408 17:48:50.718416     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1409 17:48:50.725246      USB0 port 0 child on link 0 USB2 port 0

 1410 17:48:50.725332       USB2 port 0

 1411 17:48:50.728181       USB2 port 1

 1412 17:48:50.728263       USB2 port 2

 1413 17:48:50.731392       USB2 port 3

 1414 17:48:50.731474       USB2 port 5

 1415 17:48:50.734453       USB2 port 6

 1416 17:48:50.734560       USB2 port 9

 1417 17:48:50.738301       USB3 port 0

 1418 17:48:50.738383       USB3 port 1

 1419 17:48:50.741571       USB3 port 2

 1420 17:48:50.741652       USB3 port 3

 1421 17:48:50.744743       USB3 port 4

 1422 17:48:50.747829     PCI: 00:14.2

 1423 17:48:50.757798     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1424 17:48:50.767433     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1425 17:48:50.767516     PCI: 00:14.3

 1426 17:48:50.780197     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1427 17:48:50.783826     PCI: 00:15.0 child on link 0 I2C: 01:15

 1428 17:48:50.793430     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1429 17:48:50.793514      I2C: 01:15

 1430 17:48:50.800008     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1431 17:48:50.809691     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1432 17:48:50.809772      I2C: 02:5d

 1433 17:48:50.813231      GENERIC: 0.0

 1434 17:48:50.813336     PCI: 00:16.0

 1435 17:48:50.826041     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1436 17:48:50.826150     PCI: 00:17.0

 1437 17:48:50.836181     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1438 17:48:50.845514     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1439 17:48:50.855550     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1440 17:48:50.865054     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1441 17:48:50.875145     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1442 17:48:50.884684     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1443 17:48:50.887759     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1444 17:48:50.897729     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1445 17:48:50.900540      I2C: 03:1a

 1446 17:48:50.900623      I2C: 03:38

 1447 17:48:50.904111      I2C: 03:39

 1448 17:48:50.904183      I2C: 03:3a

 1449 17:48:50.907229      I2C: 03:3b

 1450 17:48:50.910715     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1451 17:48:50.920200     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1452 17:48:50.930192     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1453 17:48:50.939964     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1454 17:48:50.943409      PCI: 01:00.0

 1455 17:48:50.952692      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1456 17:48:50.956552     PCI: 00:1e.0

 1457 17:48:50.965969     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1458 17:48:50.975900     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1459 17:48:50.979018     PCI: 00:1e.2 child on link 0 SPI: 00

 1460 17:48:50.988951     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1461 17:48:50.991934      SPI: 00

 1462 17:48:50.995707     PCI: 00:1e.3 child on link 0 SPI: 01

 1463 17:48:51.005359     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1464 17:48:51.008614      SPI: 01

 1465 17:48:51.011832     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1466 17:48:51.021602     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1467 17:48:51.028219     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1468 17:48:51.031140      PNP: 0c09.0

 1469 17:48:51.041274      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1470 17:48:51.041377     PCI: 00:1f.3

 1471 17:48:51.051077     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1472 17:48:51.060315     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1473 17:48:51.063618     PCI: 00:1f.4

 1474 17:48:51.073616     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1475 17:48:51.083699     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1476 17:48:51.083782     PCI: 00:1f.5

 1477 17:48:51.096313     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1478 17:48:51.096396  Done allocating resources.

 1479 17:48:51.103321  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1480 17:48:51.106408  Enabling resources...

 1481 17:48:51.109569  PCI: 00:00.0 subsystem <- 8086/9b61

 1482 17:48:51.112785  PCI: 00:00.0 cmd <- 06

 1483 17:48:51.115861  PCI: 00:02.0 subsystem <- 8086/9b41

 1484 17:48:51.119014  PCI: 00:02.0 cmd <- 03

 1485 17:48:51.122694  PCI: 00:08.0 cmd <- 06

 1486 17:48:51.125587  PCI: 00:12.0 subsystem <- 8086/02f9

 1487 17:48:51.129422  PCI: 00:12.0 cmd <- 02

 1488 17:48:51.132713  PCI: 00:14.0 subsystem <- 8086/02ed

 1489 17:48:51.135609  PCI: 00:14.0 cmd <- 02

 1490 17:48:51.135691  PCI: 00:14.2 cmd <- 02

 1491 17:48:51.141887  PCI: 00:14.3 subsystem <- 8086/02f0

 1492 17:48:51.141968  PCI: 00:14.3 cmd <- 02

 1493 17:48:51.145833  PCI: 00:15.0 subsystem <- 8086/02e8

 1494 17:48:51.148887  PCI: 00:15.0 cmd <- 02

 1495 17:48:51.151868  PCI: 00:15.1 subsystem <- 8086/02e9

 1496 17:48:51.154928  PCI: 00:15.1 cmd <- 02

 1497 17:48:51.158466  PCI: 00:16.0 subsystem <- 8086/02e0

 1498 17:48:51.161514  PCI: 00:16.0 cmd <- 02

 1499 17:48:51.164879  PCI: 00:17.0 subsystem <- 8086/02d3

 1500 17:48:51.168088  PCI: 00:17.0 cmd <- 03

 1501 17:48:51.171198  PCI: 00:19.0 subsystem <- 8086/02c5

 1502 17:48:51.174745  PCI: 00:19.0 cmd <- 02

 1503 17:48:51.177991  PCI: 00:1d.0 bridge ctrl <- 0013

 1504 17:48:51.181131  PCI: 00:1d.0 subsystem <- 8086/02b0

 1505 17:48:51.184225  PCI: 00:1d.0 cmd <- 06

 1506 17:48:51.187404  PCI: 00:1e.0 subsystem <- 8086/02a8

 1507 17:48:51.190995  PCI: 00:1e.0 cmd <- 06

 1508 17:48:51.194133  PCI: 00:1e.2 subsystem <- 8086/02aa

 1509 17:48:51.197380  PCI: 00:1e.2 cmd <- 06

 1510 17:48:51.200444  PCI: 00:1e.3 subsystem <- 8086/02ab

 1511 17:48:51.204151  PCI: 00:1e.3 cmd <- 02

 1512 17:48:51.207313  PCI: 00:1f.0 subsystem <- 8086/0284

 1513 17:48:51.210496  PCI: 00:1f.0 cmd <- 407

 1514 17:48:51.213557  PCI: 00:1f.3 subsystem <- 8086/02c8

 1515 17:48:51.213639  PCI: 00:1f.3 cmd <- 02

 1516 17:48:51.220559  PCI: 00:1f.4 subsystem <- 8086/02a3

 1517 17:48:51.220641  PCI: 00:1f.4 cmd <- 03

 1518 17:48:51.226645  PCI: 00:1f.5 subsystem <- 8086/02a4

 1519 17:48:51.226726  PCI: 00:1f.5 cmd <- 406

 1520 17:48:51.236438  PCI: 01:00.0 cmd <- 02

 1521 17:48:51.242097  done.

 1522 17:48:51.252649  ME: Version: 14.0.39.1367

 1523 17:48:51.259370  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10

 1524 17:48:51.262530  Initializing devices...

 1525 17:48:51.262612  Root Device init ...

 1526 17:48:51.269380  Chrome EC: Set SMI mask to 0x0000000000000000

 1527 17:48:51.275650  Chrome EC: clear events_b mask to 0x0000000000000000

 1528 17:48:51.279139  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1529 17:48:51.285792  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1530 17:48:51.291852  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1531 17:48:51.295213  Chrome EC: Set WAKE mask to 0x0000000000000000

 1532 17:48:51.301515  Root Device init finished in 35176 usecs

 1533 17:48:51.304847  CPU_CLUSTER: 0 init ...

 1534 17:48:51.308294  CPU_CLUSTER: 0 init finished in 2447 usecs

 1535 17:48:51.313743  PCI: 00:00.0 init ...

 1536 17:48:51.316994  CPU TDP: 15 Watts

 1537 17:48:51.319999  CPU PL2 = 64 Watts

 1538 17:48:51.323198  PCI: 00:00.0 init finished in 7069 usecs

 1539 17:48:51.327101  PCI: 00:02.0 init ...

 1540 17:48:51.330069  PCI: 00:02.0 init finished in 2253 usecs

 1541 17:48:51.333120  PCI: 00:08.0 init ...

 1542 17:48:51.336453  PCI: 00:08.0 init finished in 2251 usecs

 1543 17:48:51.339943  PCI: 00:12.0 init ...

 1544 17:48:51.343050  PCI: 00:12.0 init finished in 2253 usecs

 1545 17:48:51.346043  PCI: 00:14.0 init ...

 1546 17:48:51.349783  PCI: 00:14.0 init finished in 2252 usecs

 1547 17:48:51.352989  PCI: 00:14.2 init ...

 1548 17:48:51.356075  PCI: 00:14.2 init finished in 2252 usecs

 1549 17:48:51.359163  PCI: 00:14.3 init ...

 1550 17:48:51.362303  PCI: 00:14.3 init finished in 2268 usecs

 1551 17:48:51.365869  PCI: 00:15.0 init ...

 1552 17:48:51.369148  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1553 17:48:51.375988  PCI: 00:15.0 init finished in 5966 usecs

 1554 17:48:51.376071  PCI: 00:15.1 init ...

 1555 17:48:51.382250  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1556 17:48:51.385879  PCI: 00:15.1 init finished in 5973 usecs

 1557 17:48:51.389036  PCI: 00:16.0 init ...

 1558 17:48:51.392206  PCI: 00:16.0 init finished in 2250 usecs

 1559 17:48:51.395229  PCI: 00:19.0 init ...

 1560 17:48:51.398347  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1561 17:48:51.402048  PCI: 00:19.0 init finished in 5975 usecs

 1562 17:48:51.405039  PCI: 00:1d.0 init ...

 1563 17:48:51.408471  Initializing PCH PCIe bridge.

 1564 17:48:51.411503  PCI: 00:1d.0 init finished in 5282 usecs

 1565 17:48:51.415508  PCI: 00:1f.0 init ...

 1566 17:48:51.418977  IOAPIC: Initializing IOAPIC at 0xfec00000

 1567 17:48:51.425519  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1568 17:48:51.425606  IOAPIC: ID = 0x02

 1569 17:48:51.428586  IOAPIC: Dumping registers

 1570 17:48:51.431769    reg 0x0000: 0x02000000

 1571 17:48:51.434795    reg 0x0001: 0x00770020

 1572 17:48:51.438595    reg 0x0002: 0x00000000

 1573 17:48:51.441787  PCI: 00:1f.0 init finished in 23535 usecs

 1574 17:48:51.444833  PCI: 00:1f.4 init ...

 1575 17:48:51.447877  PCI: 00:1f.4 init finished in 2263 usecs

 1576 17:48:51.459760  PCI: 01:00.0 init ...

 1577 17:48:51.462893  PCI: 01:00.0 init finished in 2251 usecs

 1578 17:48:51.467081  PNP: 0c09.0 init ...

 1579 17:48:51.473841  Google Chrome EC uptime: 11.040 seconds

 1580 17:48:51.477088  Google Chrome AP resets since EC boot: 0

 1581 17:48:51.480463  Google Chrome most recent AP reset causes:

 1582 17:48:51.486564  Google Chrome EC reset flags at last EC boot: reset-pin

 1583 17:48:51.490041  PNP: 0c09.0 init finished in 20563 usecs

 1584 17:48:51.493099  Devices initialized

 1585 17:48:51.496289  Show all devs... After init.

 1586 17:48:51.496370  Root Device: enabled 1

 1587 17:48:51.499992  CPU_CLUSTER: 0: enabled 1

 1588 17:48:51.503201  DOMAIN: 0000: enabled 1

 1589 17:48:51.506206  APIC: 00: enabled 1

 1590 17:48:51.506305  PCI: 00:00.0: enabled 1

 1591 17:48:51.509402  PCI: 00:02.0: enabled 1

 1592 17:48:51.513002  PCI: 00:04.0: enabled 0

 1593 17:48:51.516227  PCI: 00:05.0: enabled 0

 1594 17:48:51.516307  PCI: 00:12.0: enabled 1

 1595 17:48:51.519379  PCI: 00:12.5: enabled 0

 1596 17:48:51.522337  PCI: 00:12.6: enabled 0

 1597 17:48:51.525868  PCI: 00:14.0: enabled 1

 1598 17:48:51.525970  PCI: 00:14.1: enabled 0

 1599 17:48:51.528971  PCI: 00:14.3: enabled 1

 1600 17:48:51.532495  PCI: 00:14.5: enabled 0

 1601 17:48:51.535522  PCI: 00:15.0: enabled 1

 1602 17:48:51.535601  PCI: 00:15.1: enabled 1

 1603 17:48:51.538631  PCI: 00:15.2: enabled 0

 1604 17:48:51.541796  PCI: 00:15.3: enabled 0

 1605 17:48:51.545465  PCI: 00:16.0: enabled 1

 1606 17:48:51.545544  PCI: 00:16.1: enabled 0

 1607 17:48:51.548500  PCI: 00:16.2: enabled 0

 1608 17:48:51.551646  PCI: 00:16.3: enabled 0

 1609 17:48:51.554730  PCI: 00:16.4: enabled 0

 1610 17:48:51.554850  PCI: 00:16.5: enabled 0

 1611 17:48:51.557904  PCI: 00:17.0: enabled 1

 1612 17:48:51.561709  PCI: 00:19.0: enabled 1

 1613 17:48:51.564821  PCI: 00:19.1: enabled 0

 1614 17:48:51.564914  PCI: 00:19.2: enabled 0

 1615 17:48:51.567907  PCI: 00:1a.0: enabled 0

 1616 17:48:51.570947  PCI: 00:1c.0: enabled 0

 1617 17:48:51.571037  PCI: 00:1c.1: enabled 0

 1618 17:48:51.574416  PCI: 00:1c.2: enabled 0

 1619 17:48:51.577666  PCI: 00:1c.3: enabled 0

 1620 17:48:51.580750  PCI: 00:1c.4: enabled 0

 1621 17:48:51.580831  PCI: 00:1c.5: enabled 0

 1622 17:48:51.584578  PCI: 00:1c.6: enabled 0

 1623 17:48:51.587735  PCI: 00:1c.7: enabled 0

 1624 17:48:51.590847  PCI: 00:1d.0: enabled 1

 1625 17:48:51.590952  PCI: 00:1d.1: enabled 0

 1626 17:48:51.593832  PCI: 00:1d.2: enabled 0

 1627 17:48:51.597544  PCI: 00:1d.3: enabled 0

 1628 17:48:51.600596  PCI: 00:1d.4: enabled 0

 1629 17:48:51.600676  PCI: 00:1d.5: enabled 0

 1630 17:48:51.603729  PCI: 00:1e.0: enabled 1

 1631 17:48:51.606902  PCI: 00:1e.1: enabled 0

 1632 17:48:51.610434  PCI: 00:1e.2: enabled 1

 1633 17:48:51.610514  PCI: 00:1e.3: enabled 1

 1634 17:48:51.613475  PCI: 00:1f.0: enabled 1

 1635 17:48:51.616505  PCI: 00:1f.1: enabled 0

 1636 17:48:51.619752  PCI: 00:1f.2: enabled 0

 1637 17:48:51.619833  PCI: 00:1f.3: enabled 1

 1638 17:48:51.623376  PCI: 00:1f.4: enabled 1

 1639 17:48:51.626248  PCI: 00:1f.5: enabled 1

 1640 17:48:51.629872  PCI: 00:1f.6: enabled 0

 1641 17:48:51.629953  USB0 port 0: enabled 1

 1642 17:48:51.633076  I2C: 01:15: enabled 1

 1643 17:48:51.636095  I2C: 02:5d: enabled 1

 1644 17:48:51.639662  GENERIC: 0.0: enabled 1

 1645 17:48:51.639819  I2C: 03:1a: enabled 1

 1646 17:48:51.642583  I2C: 03:38: enabled 1

 1647 17:48:51.646159  I2C: 03:39: enabled 1

 1648 17:48:51.646239  I2C: 03:3a: enabled 1

 1649 17:48:51.649210  I2C: 03:3b: enabled 1

 1650 17:48:51.652415  PCI: 00:00.0: enabled 1

 1651 17:48:51.652495  SPI: 00: enabled 1

 1652 17:48:51.656101  SPI: 01: enabled 1

 1653 17:48:51.659210  PNP: 0c09.0: enabled 1

 1654 17:48:51.659316  USB2 port 0: enabled 1

 1655 17:48:51.662237  USB2 port 1: enabled 1

 1656 17:48:51.665425  USB2 port 2: enabled 0

 1657 17:48:51.665520  USB2 port 3: enabled 0

 1658 17:48:51.669148  USB2 port 5: enabled 0

 1659 17:48:51.672099  USB2 port 6: enabled 1

 1660 17:48:51.675287  USB2 port 9: enabled 1

 1661 17:48:51.675366  USB3 port 0: enabled 1

 1662 17:48:51.678720  USB3 port 1: enabled 1

 1663 17:48:51.681919  USB3 port 2: enabled 1

 1664 17:48:51.681999  USB3 port 3: enabled 1

 1665 17:48:51.684968  USB3 port 4: enabled 0

 1666 17:48:51.688200  APIC: 02: enabled 1

 1667 17:48:51.688280  APIC: 03: enabled 1

 1668 17:48:51.691902  APIC: 01: enabled 1

 1669 17:48:51.695022  APIC: 05: enabled 1

 1670 17:48:51.695101  APIC: 04: enabled 1

 1671 17:48:51.698095  APIC: 06: enabled 1

 1672 17:48:51.701598  APIC: 07: enabled 1

 1673 17:48:51.701693  PCI: 00:08.0: enabled 1

 1674 17:48:51.704709  PCI: 00:14.2: enabled 1

 1675 17:48:51.707847  PCI: 01:00.0: enabled 1

 1676 17:48:51.711568  Disabling ACPI via APMC:

 1677 17:48:51.714856  done.

 1678 17:48:51.717750  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1679 17:48:51.721356  ELOG: NV offset 0xaf0000 size 0x4000

 1680 17:48:51.728279  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1681 17:48:51.734958  ELOG: Event(17) added with size 13 at 2023-10-20 17:48:51 UTC

 1682 17:48:51.741954  ELOG: Event(92) added with size 9 at 2023-10-20 17:48:51 UTC

 1683 17:48:51.748103  ELOG: Event(93) added with size 9 at 2023-10-20 17:48:51 UTC

 1684 17:48:51.754834  ELOG: Event(9A) added with size 9 at 2023-10-20 17:48:51 UTC

 1685 17:48:51.761152  ELOG: Event(9E) added with size 10 at 2023-10-20 17:48:51 UTC

 1686 17:48:51.768034  ELOG: Event(9F) added with size 14 at 2023-10-20 17:48:51 UTC

 1687 17:48:51.774263  BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6

 1688 17:48:51.780786  ELOG: Event(A1) added with size 10 at 2023-10-20 17:48:51 UTC

 1689 17:48:51.787115  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1690 17:48:51.793593  ELOG: Event(A0) added with size 9 at 2023-10-20 17:48:51 UTC

 1691 17:48:51.796823  elog_add_boot_reason: Logged dev mode boot

 1692 17:48:51.800101  Finalize devices...

 1693 17:48:51.803125  PCI: 00:17.0 final

 1694 17:48:51.803214  Devices finalized

 1695 17:48:51.809802  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1696 17:48:51.812834  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1697 17:48:51.819655  ME: HFSTS1                  : 0x90000245

 1698 17:48:51.822684  ME: HFSTS2                  : 0x3B850126

 1699 17:48:51.826189  ME: HFSTS3                  : 0x00000020

 1700 17:48:51.832487  ME: HFSTS4                  : 0x00004800

 1701 17:48:51.836327  ME: HFSTS5                  : 0x00000000

 1702 17:48:51.839368  ME: HFSTS6                  : 0x40400006

 1703 17:48:51.842447  ME: Manufacturing Mode      : NO

 1704 17:48:51.845708  ME: FW Partition Table      : OK

 1705 17:48:51.848719  ME: Bringup Loader Failure  : NO

 1706 17:48:51.852428  ME: Firmware Init Complete  : YES

 1707 17:48:51.855456  ME: Boot Options Present    : NO

 1708 17:48:51.858923  ME: Update In Progress      : NO

 1709 17:48:51.861879  ME: D0i3 Support            : YES

 1710 17:48:51.865298  ME: Low Power State Enabled : NO

 1711 17:48:51.868828  ME: CPU Replaced            : NO

 1712 17:48:51.871875  ME: CPU Replacement Valid   : YES

 1713 17:48:51.875054  ME: Current Working State   : 5

 1714 17:48:51.878035  ME: Current Operation State : 1

 1715 17:48:51.881766  ME: Current Operation Mode  : 0

 1716 17:48:51.885003  ME: Error Code              : 0

 1717 17:48:51.888122  ME: CPU Debug Disabled      : YES

 1718 17:48:51.891094  ME: TXT Support             : NO

 1719 17:48:51.897983  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1720 17:48:51.904157  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1721 17:48:51.904247  CBFS @ c08000 size 3f8000

 1722 17:48:51.911021  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1723 17:48:51.913901  CBFS: Locating 'fallback/dsdt.aml'

 1724 17:48:51.917253  CBFS: Found @ offset 10bb80 size 3fa5

 1725 17:48:51.924416  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1726 17:48:51.927379  CBFS @ c08000 size 3f8000

 1727 17:48:51.933657  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1728 17:48:51.937268  CBFS: Locating 'fallback/slic'

 1729 17:48:51.940337  CBFS: 'fallback/slic' not found.

 1730 17:48:51.943358  ACPI: Writing ACPI tables at 99b3e000.

 1731 17:48:51.947143  ACPI:    * FACS

 1732 17:48:51.947225  ACPI:    * DSDT

 1733 17:48:51.953425  Ramoops buffer: 0x100000@0x99a3d000.

 1734 17:48:51.956503  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1735 17:48:51.959710  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1736 17:48:51.963882  Google Chrome EC: version:

 1737 17:48:51.966967  	ro: helios_v2.0.2659-56403530b

 1738 17:48:51.970065  	rw: helios_v2.0.2849-c41de27e7d

 1739 17:48:51.973563    running image: 1

 1740 17:48:51.976526  ACPI:    * FADT

 1741 17:48:51.976606  SCI is IRQ9

 1742 17:48:51.983362  ACPI: added table 1/32, length now 40

 1743 17:48:51.983446  ACPI:     * SSDT

 1744 17:48:51.986664  Found 1 CPU(s) with 8 core(s) each.

 1745 17:48:51.989802  Error: Could not locate 'wifi_sar' in VPD.

 1746 17:48:51.996447  Checking CBFS for default SAR values

 1747 17:48:51.999614  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1748 17:48:52.002651  CBFS @ c08000 size 3f8000

 1749 17:48:52.009707  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1750 17:48:52.012838  CBFS: Locating 'wifi_sar_defaults.hex'

 1751 17:48:52.015900  CBFS: Found @ offset 5fac0 size 77

 1752 17:48:52.019002  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1753 17:48:52.025620  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1754 17:48:52.029015  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1755 17:48:52.035637  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1756 17:48:52.038526  failed to find key in VPD: dsm_calib_r0_0

 1757 17:48:52.048661  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1758 17:48:52.054834  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1759 17:48:52.058494  failed to find key in VPD: dsm_calib_r0_1

 1760 17:48:52.067716  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1761 17:48:52.070950  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1762 17:48:52.074531  failed to find key in VPD: dsm_calib_r0_2

 1763 17:48:52.084444  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1764 17:48:52.090547  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1765 17:48:52.094100  failed to find key in VPD: dsm_calib_r0_3

 1766 17:48:52.103867  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1767 17:48:52.107137  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1768 17:48:52.113299  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1769 17:48:52.116939  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1770 17:48:52.120187  EC returned error result code 1

 1771 17:48:52.123841  EC returned error result code 1

 1772 17:48:52.127117  EC returned error result code 1

 1773 17:48:52.133514  PS2K: Bad resp from EC. Vivaldi disabled!

 1774 17:48:52.140112  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1775 17:48:52.143499  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1776 17:48:52.149699  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1777 17:48:52.153085  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1778 17:48:52.159378  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1779 17:48:52.166022  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1780 17:48:52.172821  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1781 17:48:52.179125  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1782 17:48:52.182120  ACPI: added table 2/32, length now 44

 1783 17:48:52.182201  ACPI:    * MCFG

 1784 17:48:52.185849  ACPI: added table 3/32, length now 48

 1785 17:48:52.189011  ACPI:    * TPM2

 1786 17:48:52.192095  TPM2 log created at 99a2d000

 1787 17:48:52.195159  ACPI: added table 4/32, length now 52

 1788 17:48:52.198687  ACPI:    * MADT

 1789 17:48:52.198792  SCI is IRQ9

 1790 17:48:52.201889  ACPI: added table 5/32, length now 56

 1791 17:48:52.205364  current = 99b43ac0

 1792 17:48:52.205439  ACPI:    * DMAR

 1793 17:48:52.208156  ACPI: added table 6/32, length now 60

 1794 17:48:52.211881  ACPI:    * IGD OpRegion

 1795 17:48:52.214953  GMA: Found VBT in CBFS

 1796 17:48:52.218098  GMA: Found valid VBT in CBFS

 1797 17:48:52.221433  ACPI: added table 7/32, length now 64

 1798 17:48:52.221507  ACPI:    * HPET

 1799 17:48:52.228094  ACPI: added table 8/32, length now 68

 1800 17:48:52.228171  ACPI: done.

 1801 17:48:52.231163  ACPI tables: 31744 bytes.

 1802 17:48:52.234360  smbios_write_tables: 99a2c000

 1803 17:48:52.238175  EC returned error result code 3

 1804 17:48:52.241299  Couldn't obtain OEM name from CBI

 1805 17:48:52.244601  Create SMBIOS type 17

 1806 17:48:52.247371  PCI: 00:00.0 (Intel Cannonlake)

 1807 17:48:52.250949  PCI: 00:14.3 (Intel WiFi)

 1808 17:48:52.251021  SMBIOS tables: 939 bytes.

 1809 17:48:52.257746  Writing table forward entry at 0x00000500

 1810 17:48:52.260793  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1811 17:48:52.267420  Writing coreboot table at 0x99b62000

 1812 17:48:52.270526   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1813 17:48:52.277073   1. 0000000000001000-000000000009ffff: RAM

 1814 17:48:52.280207   2. 00000000000a0000-00000000000fffff: RESERVED

 1815 17:48:52.283298   3. 0000000000100000-0000000099a2bfff: RAM

 1816 17:48:52.290134   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1817 17:48:52.296984   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1818 17:48:52.303166   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1819 17:48:52.306295   7. 000000009a000000-000000009f7fffff: RESERVED

 1820 17:48:52.312920   8. 00000000e0000000-00000000efffffff: RESERVED

 1821 17:48:52.315853   9. 00000000fc000000-00000000fc000fff: RESERVED

 1822 17:48:52.319196  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1823 17:48:52.325925  11. 00000000fed10000-00000000fed17fff: RESERVED

 1824 17:48:52.328984  12. 00000000fed80000-00000000fed83fff: RESERVED

 1825 17:48:52.335457  13. 00000000fed90000-00000000fed91fff: RESERVED

 1826 17:48:52.339104  14. 00000000feda0000-00000000feda1fff: RESERVED

 1827 17:48:52.345326  15. 0000000100000000-000000045e7fffff: RAM

 1828 17:48:52.348571  Graphics framebuffer located at 0xc0000000

 1829 17:48:52.351623  Passing 5 GPIOs to payload:

 1830 17:48:52.355370              NAME |       PORT | POLARITY |     VALUE

 1831 17:48:52.361501     write protect |  undefined |     high |       low

 1832 17:48:52.368030               lid |  undefined |     high |      high

 1833 17:48:52.371486             power |  undefined |     high |       low

 1834 17:48:52.377582             oprom |  undefined |     high |       low

 1835 17:48:52.384469          EC in RW | 0x000000cb |     high |       low

 1836 17:48:52.384551  Board ID: 4

 1837 17:48:52.387625  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1838 17:48:52.390677  CBFS @ c08000 size 3f8000

 1839 17:48:52.397288  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1840 17:48:52.404279  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861

 1841 17:48:52.407521  coreboot table: 1492 bytes.

 1842 17:48:52.410578  IMD ROOT    0. 99fff000 00001000

 1843 17:48:52.413851  IMD SMALL   1. 99ffe000 00001000

 1844 17:48:52.416999  FSP MEMORY  2. 99c4e000 003b0000

 1845 17:48:52.420617  CONSOLE     3. 99c2e000 00020000

 1846 17:48:52.423473  FMAP        4. 99c2d000 0000054e

 1847 17:48:52.426514  TIME STAMP  5. 99c2c000 00000910

 1848 17:48:52.430162  VBOOT WORK  6. 99c18000 00014000

 1849 17:48:52.433507  MRC DATA    7. 99c16000 00001958

 1850 17:48:52.436523  ROMSTG STCK 8. 99c15000 00001000

 1851 17:48:52.439623  AFTER CAR   9. 99c0b000 0000a000

 1852 17:48:52.443442  RAMSTAGE   10. 99baf000 0005c000

 1853 17:48:52.446679  REFCODE    11. 99b7a000 00035000

 1854 17:48:52.449827  SMM BACKUP 12. 99b6a000 00010000

 1855 17:48:52.452926  COREBOOT   13. 99b62000 00008000

 1856 17:48:52.455929  ACPI       14. 99b3e000 00024000

 1857 17:48:52.459784  ACPI GNVS  15. 99b3d000 00001000

 1858 17:48:52.462759  RAMOOPS    16. 99a3d000 00100000

 1859 17:48:52.465917  TPM2 TCGLOG17. 99a2d000 00010000

 1860 17:48:52.469150  SMBIOS     18. 99a2c000 00000800

 1861 17:48:52.472605  IMD small region:

 1862 17:48:52.475704    IMD ROOT    0. 99ffec00 00000400

 1863 17:48:52.478743    FSP RUNTIME 1. 99ffebe0 00000004

 1864 17:48:52.481991    EC HOSTEVENT 2. 99ffebc0 00000008

 1865 17:48:52.485534    POWER STATE 3. 99ffeb80 00000040

 1866 17:48:52.488478    ROMSTAGE    4. 99ffeb60 00000004

 1867 17:48:52.491830    MEM INFO    5. 99ffe9a0 000001b9

 1868 17:48:52.495065    VPD         6. 99ffe920 0000006c

 1869 17:48:52.498346  MTRR: Physical address space:

 1870 17:48:52.504863  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1871 17:48:52.511571  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1872 17:48:52.517850  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1873 17:48:52.524733  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1874 17:48:52.530872  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1875 17:48:52.537313  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1876 17:48:52.544052  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1877 17:48:52.547746  MTRR: Fixed MSR 0x250 0x0606060606060606

 1878 17:48:52.550946  MTRR: Fixed MSR 0x258 0x0606060606060606

 1879 17:48:52.554019  MTRR: Fixed MSR 0x259 0x0000000000000000

 1880 17:48:52.560182  MTRR: Fixed MSR 0x268 0x0606060606060606

 1881 17:48:52.563317  MTRR: Fixed MSR 0x269 0x0606060606060606

 1882 17:48:52.567024  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1883 17:48:52.570063  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1884 17:48:52.576355  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1885 17:48:52.580213  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1886 17:48:52.583142  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1887 17:48:52.586268  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1888 17:48:52.590626  call enable_fixed_mtrr()

 1889 17:48:52.593779  CPU physical address size: 39 bits

 1890 17:48:52.600156  MTRR: default type WB/UC MTRR counts: 6/8.

 1891 17:48:52.603732  MTRR: WB selected as default type.

 1892 17:48:52.609940  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1893 17:48:52.616701  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1894 17:48:52.619649  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1895 17:48:52.626347  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1896 17:48:52.633344  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1897 17:48:52.639486  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1898 17:48:52.645482  MTRR: Fixed MSR 0x250 0x0606060606060606

 1899 17:48:52.649255  MTRR: Fixed MSR 0x258 0x0606060606060606

 1900 17:48:52.652289  MTRR: Fixed MSR 0x259 0x0000000000000000

 1901 17:48:52.655991  MTRR: Fixed MSR 0x268 0x0606060606060606

 1902 17:48:52.662265  MTRR: Fixed MSR 0x269 0x0606060606060606

 1903 17:48:52.665409  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1904 17:48:52.669109  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1905 17:48:52.672405  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1906 17:48:52.678695  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1907 17:48:52.681796  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1908 17:48:52.684996  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1909 17:48:52.685077  

 1910 17:48:52.688563  MTRR check

 1911 17:48:52.691659  call enable_fixed_mtrr()

 1912 17:48:52.691740  Fixed MTRRs   : Enabled

 1913 17:48:52.695055  Variable MTRRs: Enabled

 1914 17:48:52.695137  

 1915 17:48:52.698119  CPU physical address size: 39 bits

 1916 17:48:52.704504  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1917 17:48:52.707833  MTRR: Fixed MSR 0x250 0x0606060606060606

 1918 17:48:52.711428  MTRR: Fixed MSR 0x258 0x0606060606060606

 1919 17:48:52.717772  MTRR: Fixed MSR 0x259 0x0000000000000000

 1920 17:48:52.720696  MTRR: Fixed MSR 0x268 0x0606060606060606

 1921 17:48:52.724165  MTRR: Fixed MSR 0x269 0x0606060606060606

 1922 17:48:52.727568  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1923 17:48:52.734416  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1924 17:48:52.737159  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1925 17:48:52.740507  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1926 17:48:52.743942  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1927 17:48:52.750401  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1928 17:48:52.753280  MTRR: Fixed MSR 0x250 0x0606060606060606

 1929 17:48:52.756694  call enable_fixed_mtrr()

 1930 17:48:52.760110  MTRR: Fixed MSR 0x258 0x0606060606060606

 1931 17:48:52.763044  MTRR: Fixed MSR 0x259 0x0000000000000000

 1932 17:48:52.769841  MTRR: Fixed MSR 0x268 0x0606060606060606

 1933 17:48:52.773071  MTRR: Fixed MSR 0x269 0x0606060606060606

 1934 17:48:52.776052  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1935 17:48:52.779799  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1936 17:48:52.786389  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1937 17:48:52.789565  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1938 17:48:52.792777  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1939 17:48:52.795820  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1940 17:48:52.799692  CPU physical address size: 39 bits

 1941 17:48:52.802881  call enable_fixed_mtrr()

 1942 17:48:52.809200  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1943 17:48:52.812245  CPU physical address size: 39 bits

 1944 17:48:52.815428  MTRR: Fixed MSR 0x250 0x0606060606060606

 1945 17:48:52.819094  MTRR: Fixed MSR 0x250 0x0606060606060606

 1946 17:48:52.825331  MTRR: Fixed MSR 0x258 0x0606060606060606

 1947 17:48:52.828930  MTRR: Fixed MSR 0x259 0x0000000000000000

 1948 17:48:52.831945  MTRR: Fixed MSR 0x268 0x0606060606060606

 1949 17:48:52.835222  MTRR: Fixed MSR 0x269 0x0606060606060606

 1950 17:48:52.841969  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1951 17:48:52.845026  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1952 17:48:52.847995  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1953 17:48:52.851396  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1954 17:48:52.858201  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1955 17:48:52.861391  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1956 17:48:52.864496  MTRR: Fixed MSR 0x258 0x0606060606060606

 1957 17:48:52.867601  call enable_fixed_mtrr()

 1958 17:48:52.870989  MTRR: Fixed MSR 0x259 0x0000000000000000

 1959 17:48:52.877302  MTRR: Fixed MSR 0x268 0x0606060606060606

 1960 17:48:52.880520  MTRR: Fixed MSR 0x269 0x0606060606060606

 1961 17:48:52.883852  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1962 17:48:52.887273  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1963 17:48:52.893975  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1964 17:48:52.897082  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1965 17:48:52.900183  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1966 17:48:52.903380  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1967 17:48:52.910285  CPU physical address size: 39 bits

 1968 17:48:52.910366  call enable_fixed_mtrr()

 1969 17:48:52.913355  CBFS @ c08000 size 3f8000

 1970 17:48:52.919653  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1971 17:48:52.923506  MTRR: Fixed MSR 0x250 0x0606060606060606

 1972 17:48:52.926673  MTRR: Fixed MSR 0x258 0x0606060606060606

 1973 17:48:52.932889  MTRR: Fixed MSR 0x259 0x0000000000000000

 1974 17:48:52.936311  MTRR: Fixed MSR 0x268 0x0606060606060606

 1975 17:48:52.939561  MTRR: Fixed MSR 0x269 0x0606060606060606

 1976 17:48:52.942646  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1977 17:48:52.949557  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1978 17:48:52.952962  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1979 17:48:52.955970  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1980 17:48:52.959028  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1981 17:48:52.966035  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1982 17:48:52.969099  MTRR: Fixed MSR 0x250 0x0606060606060606

 1983 17:48:52.972721  call enable_fixed_mtrr()

 1984 17:48:52.975520  MTRR: Fixed MSR 0x258 0x0606060606060606

 1985 17:48:52.978623  MTRR: Fixed MSR 0x259 0x0000000000000000

 1986 17:48:52.984989  MTRR: Fixed MSR 0x268 0x0606060606060606

 1987 17:48:52.988335  MTRR: Fixed MSR 0x269 0x0606060606060606

 1988 17:48:52.991668  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1989 17:48:52.994922  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1990 17:48:53.001441  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1991 17:48:53.005120  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1992 17:48:53.008187  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1993 17:48:53.011281  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1994 17:48:53.017859  CPU physical address size: 39 bits

 1995 17:48:53.017945  call enable_fixed_mtrr()

 1996 17:48:53.024042  CPU physical address size: 39 bits

 1997 17:48:53.027360  CBFS: Locating 'fallback/payload'

 1998 17:48:53.030976  CPU physical address size: 39 bits

 1999 17:48:53.034091  CBFS: Found @ offset 1c96c0 size 3f798

 2000 17:48:53.037145  Checking segment from ROM address 0xffdd16f8

 2001 17:48:53.044009  Checking segment from ROM address 0xffdd1714

 2002 17:48:53.047114  Loading segment from ROM address 0xffdd16f8

 2003 17:48:53.050329    code (compression=0)

 2004 17:48:53.056664    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2005 17:48:53.066593  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2006 17:48:53.069677  it's not compressed!

 2007 17:48:53.160402  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2008 17:48:53.167230  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2009 17:48:53.173402  Loading segment from ROM address 0xffdd1714

 2010 17:48:53.173489    Entry Point 0x30000000

 2011 17:48:53.176712  Loaded segments

 2012 17:48:53.182982  Finalizing chipset.

 2013 17:48:53.186047  Finalizing SMM.

 2014 17:48:53.189073  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2015 17:48:53.192891  mp_park_aps done after 0 msecs.

 2016 17:48:53.198965  Jumping to boot code at 30000000(99b62000)

 2017 17:48:53.205833  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2018 17:48:53.205919  

 2019 17:48:53.206007  

 2020 17:48:53.206081  

 2021 17:48:53.209090  Starting depthcharge on Helios...

 2022 17:48:53.209448  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2023 17:48:53.209551  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2024 17:48:53.209667  Setting prompt string to ['hatch:']
 2025 17:48:53.209754  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2026 17:48:53.212048  

 2027 17:48:53.218515  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2028 17:48:53.218614  

 2029 17:48:53.224739  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2030 17:48:53.224877  

 2031 17:48:53.231423  board_setup: Info: eMMC controller not present; skipping

 2032 17:48:53.231504  

 2033 17:48:53.234835  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2034 17:48:53.234918  

 2035 17:48:53.241172  board_setup: Info: SDHCI controller not present; skipping

 2036 17:48:53.241254  

 2037 17:48:53.247455  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2038 17:48:53.247557  

 2039 17:48:53.251177  Wipe memory regions:

 2040 17:48:53.251275  

 2041 17:48:53.254285  	[0x00000000001000, 0x000000000a0000)

 2042 17:48:53.254383  

 2043 17:48:53.257433  	[0x00000000100000, 0x00000030000000)

 2044 17:48:53.320396  

 2045 17:48:53.323461  	[0x00000030657430, 0x00000099a2c000)

 2046 17:48:53.460895  

 2047 17:48:53.464262  	[0x00000100000000, 0x0000045e800000)

 2048 17:48:54.846976  

 2049 17:48:54.847130  R8152: Initializing

 2050 17:48:54.847227  

 2051 17:48:54.850063  Version 9 (ocp_data = 6010)

 2052 17:48:54.854339  

 2053 17:48:54.854421  R8152: Done initializing

 2054 17:48:54.854487  

 2055 17:48:54.857469  Adding net device

 2056 17:48:55.461716  

 2057 17:48:55.461867  R8152: Initializing

 2058 17:48:55.461937  

 2059 17:48:55.464730  Version 6 (ocp_data = 5c30)

 2060 17:48:55.464841  

 2061 17:48:55.468307  R8152: Done initializing

 2062 17:48:55.468390  

 2063 17:48:55.474785  net_add_device: Attemp to include the same device

 2064 17:48:55.474883  

 2065 17:48:55.481498  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2066 17:48:55.481581  

 2067 17:48:55.481646  

 2068 17:48:55.481706  

 2069 17:48:55.482022  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2071 17:48:55.582447  hatch: tftpboot 192.168.201.1 11831848/tftp-deploy-0r06jblk/kernel/bzImage 11831848/tftp-deploy-0r06jblk/kernel/cmdline 11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz

 2072 17:48:55.582613  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2073 17:48:55.582730  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2074 17:48:55.587053  tftpboot 192.168.201.1 11831848/tftp-deploy-0r06jblk/kernel/bzIloy-0r06jblk/kernel/cmdline 11831848/tftp-deploy-0r06jblk/ramdisk/ramdisk.cpio.gz

 2075 17:48:55.587142  

 2076 17:48:55.587243  Waiting for link

 2077 17:48:55.787694  

 2078 17:48:55.787829  done.

 2079 17:48:55.787898  

 2080 17:48:55.787959  MAC: 00:24:32:30:7f:7f

 2081 17:48:55.788018  

 2082 17:48:55.790958  Sending DHCP discover... done.

 2083 17:48:55.791042  

 2084 17:48:55.794467  Waiting for reply... done.

 2085 17:48:55.794606  

 2086 17:48:55.797510  Sending DHCP request... done.

 2087 17:48:55.797597  

 2088 17:48:55.817643  Waiting for reply... done.

 2089 17:48:55.817734  

 2090 17:48:55.817800  My ip is 192.168.201.15

 2091 17:48:55.817862  

 2092 17:48:55.824107  The DHCP server ip is 192.168.201.1

 2093 17:48:55.824191  

 2094 17:48:55.827181  TFTP server IP predefined by user: 192.168.201.1

 2095 17:48:55.827305  

 2096 17:48:55.833749  Bootfile predefined by user: 11831848/tftp-deploy-0r06jblk/kernel/bzImage

 2097 17:48:55.833866  

 2098 17:48:55.837173  Sending tftp read request... done.

 2099 17:48:55.837258  

 2100 17:48:55.843374  Waiting for the transfer... 

 2101 17:48:55.843460  

 2102 17:48:56.382956  00000000 ################################################################

 2103 17:48:56.383124  

 2104 17:48:56.920072  00080000 ################################################################

 2105 17:48:56.920220  

 2106 17:48:57.450212  00100000 ################################################################

 2107 17:48:57.450391  

 2108 17:48:57.992496  00180000 ################################################################

 2109 17:48:57.992645  

 2110 17:48:58.522586  00200000 ################################################################

 2111 17:48:58.522734  

 2112 17:48:59.043881  00280000 ################################################################

 2113 17:48:59.044051  

 2114 17:48:59.573955  00300000 ################################################################

 2115 17:48:59.574133  

 2116 17:49:00.107611  00380000 ################################################################

 2117 17:49:00.107760  

 2118 17:49:00.648285  00400000 ################################################################

 2119 17:49:00.648472  

 2120 17:49:01.201405  00480000 ################################################################

 2121 17:49:01.201554  

 2122 17:49:01.740454  00500000 ################################################################

 2123 17:49:01.740614  

 2124 17:49:02.284387  00580000 ################################################################

 2125 17:49:02.284541  

 2126 17:49:02.832663  00600000 ################################################################

 2127 17:49:02.832814  

 2128 17:49:03.372455  00680000 ################################################################

 2129 17:49:03.372587  

 2130 17:49:03.898468  00700000 ################################################################

 2131 17:49:03.898672  

 2132 17:49:04.435909  00780000 ################################################################

 2133 17:49:04.436042  

 2134 17:49:04.557728  00800000 ############### done.

 2135 17:49:04.557861  

 2136 17:49:04.560795  The bootfile was 8507280 bytes long.

 2137 17:49:04.560878  

 2138 17:49:04.563977  Sending tftp read request... done.

 2139 17:49:04.564060  

 2140 17:49:04.567531  Waiting for the transfer... 

 2141 17:49:04.567644  

 2142 17:49:05.081358  00000000 ################################################################

 2143 17:49:05.081546  

 2144 17:49:05.596216  00080000 ################################################################

 2145 17:49:05.596364  

 2146 17:49:06.111895  00100000 ################################################################

 2147 17:49:06.112041  

 2148 17:49:06.623969  00180000 ################################################################

 2149 17:49:06.624122  

 2150 17:49:07.136771  00200000 ################################################################

 2151 17:49:07.136920  

 2152 17:49:07.664750  00280000 ################################################################

 2153 17:49:07.664911  

 2154 17:49:08.188328  00300000 ################################################################

 2155 17:49:08.188477  

 2156 17:49:08.706061  00380000 ################################################################

 2157 17:49:08.706210  

 2158 17:49:09.221036  00400000 ################################################################

 2159 17:49:09.221220  

 2160 17:49:09.743622  00480000 ################################################################

 2161 17:49:09.743770  

 2162 17:49:10.275734  00500000 ################################################################ done.

 2163 17:49:10.275885  

 2164 17:49:10.278649  Sending tftp read request... done.

 2165 17:49:10.278754  

 2166 17:49:10.282359  Waiting for the transfer... 

 2167 17:49:10.282448  

 2168 17:49:10.282513  00000000 # done.

 2169 17:49:10.282575  

 2170 17:49:10.291737  Command line loaded dynamically from TFTP file: 11831848/tftp-deploy-0r06jblk/kernel/cmdline

 2171 17:49:10.291820  

 2172 17:49:10.321193  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831848/extract-nfsrootfs-haed90xy,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2173 17:49:10.321301  

 2174 17:49:10.327762  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2175 17:49:10.331106  

 2176 17:49:10.334696  Shutting down all USB controllers.

 2177 17:49:10.334806  

 2178 17:49:10.334885  Removing current net device

 2179 17:49:10.341903  

 2180 17:49:10.341985  Finalizing coreboot

 2181 17:49:10.342050  

 2182 17:49:10.348766  Exiting depthcharge with code 4 at timestamp: 24462140

 2183 17:49:10.348849  

 2184 17:49:10.348914  

 2185 17:49:10.348974  Starting kernel ...

 2186 17:49:10.349337  end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
 2187 17:49:10.349431  start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
 2188 17:49:10.349508  Setting prompt string to ['Linux version [0-9]']
 2189 17:49:10.349576  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2190 17:49:10.349644  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2191 17:49:10.351845  

 2192 17:49:10.351926  

 2194 17:53:35.350478  end: 2.2.5 auto-login-action (duration 00:04:25) [common]
 2196 17:53:35.351717  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
 2198 17:53:35.352580  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2201 17:53:35.354010  end: 2 depthcharge-action (duration 00:05:00) [common]
 2203 17:53:35.355287  Cleaning after the job
 2204 17:53:35.355804  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/ramdisk
 2205 17:53:35.360352  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/kernel
 2206 17:53:35.367135  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/nfsrootfs
 2207 17:53:35.485725  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831848/tftp-deploy-0r06jblk/modules
 2208 17:53:35.486195  start: 4.1 power-off (timeout 00:00:30) [common]
 2209 17:53:35.486376  Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
 2210 17:53:35.558886  >> Command sent successfully.

 2211 17:53:35.563016  Returned 0 in 0 seconds
 2212 17:53:35.663936  end: 4.1 power-off (duration 00:00:00) [common]
 2214 17:53:35.665744  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2215 17:53:35.667155  Listened to connection for namespace 'common' for up to 1s
 2217 17:53:35.668547  Listened to connection for namespace 'common' for up to 1s
 2218 17:53:35.669810  Listened to connection for namespace 'common' for up to 1s
 2219 17:53:35.672679  Listened to connection for namespace 'common' for up to 1s
 2220 17:53:35.676105  Listened to connection for namespace 'common' for up to 1s
 2221 17:53:35.679638  Listened to connection for namespace 'common' for up to 1s
 2222 17:53:35.683107  Listened to connection for namespace 'common' for up to 1s
 2223 17:53:35.686119  Listened to connection for namespace 'common' for up to 1s
 2224 17:53:35.689349  Listened to connection for namespace 'common' for up to 1s
 2225 17:53:35.692831  Listened to connection for namespace 'common' for up to 1s
 2226 17:53:35.695841  Listened to connection for namespace 'common' for up to 1s
 2227 17:53:35.699095  Listened to connection for namespace 'common' for up to 1s
 2228 17:53:35.702520  Listened to connection for namespace 'common' for up to 1s
 2229 17:53:35.705664  Listened to connection for namespace 'common' for up to 1s
 2230 17:53:35.708887  Listened to connection for namespace 'common' for up to 1s
 2231 17:53:35.712571  Listened to connection for namespace 'common' for up to 1s
 2232 17:53:35.715422  Listened to connection for namespace 'common' for up to 1s
 2233 17:53:35.718393  Listened to connection for namespace 'common' for up to 1s
 2234 17:53:35.722328  Listened to connection for namespace 'common' for up to 1s
 2235 17:53:35.725284  Listened to connection for namespace 'common' for up to 1s
 2236 17:53:35.728205  Listened to connection for namespace 'common' for up to 1s
 2237 17:53:35.731825  Listened to connection for namespace 'common' for up to 1s
 2238 17:53:35.734839  Listened to connection for namespace 'common' for up to 1s
 2239 17:53:35.737657  Listened to connection for namespace 'common' for up to 1s
 2240 17:53:35.740854  Listened to connection for namespace 'common' for up to 1s
 2241 17:53:35.744847  Listened to connection for namespace 'common' for up to 1s
 2242 17:53:35.747771  Listened to connection for namespace 'common' for up to 1s
 2243 17:53:35.751191  Listened to connection for namespace 'common' for up to 1s
 2244 17:53:35.754553  Listened to connection for namespace 'common' for up to 1s
 2245 17:53:35.757525  Listened to connection for namespace 'common' for up to 1s
 2246 17:53:35.761360  Listened to connection for namespace 'common' for up to 1s
 2247 17:53:35.764366  Listened to connection for namespace 'common' for up to 1s
 2248 17:53:35.767306  Listened to connection for namespace 'common' for up to 1s
 2249 17:53:35.770992  Listened to connection for namespace 'common' for up to 1s
 2250 17:53:35.774310  Listened to connection for namespace 'common' for up to 1s
 2251 17:53:35.777007  Listened to connection for namespace 'common' for up to 1s
 2252 17:53:35.780517  Listened to connection for namespace 'common' for up to 1s
 2253 17:53:35.784001  Listened to connection for namespace 'common' for up to 1s
 2254 17:53:35.787127  Listened to connection for namespace 'common' for up to 1s
 2255 17:53:35.790823  Listened to connection for namespace 'common' for up to 1s
 2256 17:53:35.794050  Listened to connection for namespace 'common' for up to 1s
 2257 17:53:35.797041  Listened to connection for namespace 'common' for up to 1s
 2258 17:53:35.799885  Listened to connection for namespace 'common' for up to 1s
 2259 17:53:35.804005  Listened to connection for namespace 'common' for up to 1s
 2260 17:53:35.806668  Listened to connection for namespace 'common' for up to 1s
 2261 17:53:35.810512  Listened to connection for namespace 'common' for up to 1s
 2262 17:53:35.813579  Listened to connection for namespace 'common' for up to 1s
 2263 17:53:35.816616  Listened to connection for namespace 'common' for up to 1s
 2264 17:53:35.820061  Listened to connection for namespace 'common' for up to 1s
 2265 17:53:35.823122  Listened to connection for namespace 'common' for up to 1s
 2266 17:53:35.826569  Listened to connection for namespace 'common' for up to 1s
 2267 17:53:35.829546  Listened to connection for namespace 'common' for up to 1s
 2268 17:53:35.832958  Listened to connection for namespace 'common' for up to 1s
 2269 17:53:35.836721  Listened to connection for namespace 'common' for up to 1s
 2270 17:53:35.839668  Listened to connection for namespace 'common' for up to 1s
 2271 17:53:35.842647  Listened to connection for namespace 'common' for up to 1s
 2272 17:53:35.846186  Listened to connection for namespace 'common' for up to 1s
 2273 17:53:35.849232  Listened to connection for namespace 'common' for up to 1s
 2274 17:53:35.852379  Listened to connection for namespace 'common' for up to 1s
 2275 17:53:35.855986  Listened to connection for namespace 'common' for up to 1s
 2276 17:53:35.858929  Listened to connection for namespace 'common' for up to 1s
 2277 17:53:35.861936  Listened to connection for namespace 'common' for up to 1s
 2278 17:53:35.865938  Listened to connection for namespace 'common' for up to 1s
 2279 17:53:35.868704  Listened to connection for namespace 'common' for up to 1s
 2280 17:53:35.871806  Listened to connection for namespace 'common' for up to 1s
 2281 17:53:35.875318  Listened to connection for namespace 'common' for up to 1s
 2282 17:53:35.879116  Listened to connection for namespace 'common' for up to 1s
 2283 17:53:35.882031  Listened to connection for namespace 'common' for up to 1s
 2284 17:53:35.884999  Listened to connection for namespace 'common' for up to 1s
 2285 17:53:35.888172  Listened to connection for namespace 'common' for up to 1s
 2286 17:53:35.891377  Listened to connection for namespace 'common' for up to 1s
 2287 17:53:35.894885  Listened to connection for namespace 'common' for up to 1s
 2288 17:53:35.897890  Listened to connection for namespace 'common' for up to 1s
 2289 17:53:35.902063  Listened to connection for namespace 'common' for up to 1s
 2290 17:53:35.904683  Listened to connection for namespace 'common' for up to 1s
 2291 17:53:35.908078  Listened to connection for namespace 'common' for up to 1s
 2292 17:53:35.911100  Listened to connection for namespace 'common' for up to 1s
 2293 17:53:35.914948  Listened to connection for namespace 'common' for up to 1s
 2294 17:53:35.917744  Listened to connection for namespace 'common' for up to 1s
 2295 17:53:35.920883  Listened to connection for namespace 'common' for up to 1s
 2296 17:53:35.924696  Listened to connection for namespace 'common' for up to 1s
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 2523 17:53:36.665439  Listened to connection for namespace 'common' for up to 1s
 2524 17:53:36.666717  Finalising connection for namespace 'common'
 2525 17:53:36.667326  Disconnecting from shell: Finalise
 2526 17:53:36.667827  
 2527 17:53:36.769812  end: 4.2 read-feedback (duration 00:00:01) [common]
 2528 17:53:36.770406  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831848
 2529 17:53:37.379169  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831848
 2530 17:53:37.379367  JobError: Your job cannot terminate cleanly.