Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:55:20.935986 lava-dispatcher, installed at version: 2023.08
2 17:55:20.936193 start: 0 validate
3 17:55:20.936327 Start time: 2023-10-20 17:55:20.936319+00:00 (UTC)
4 17:55:20.936450 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:55:20.936578 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:55:21.192615 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:55:21.193349 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:55:21.456676 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:55:21.457335 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:55:21.726858 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:55:21.727672 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:55:21.996346 validate duration: 1.06
14 17:55:21.997673 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:55:21.998189 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:55:21.998656 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:55:21.999273 Not decompressing ramdisk as can be used compressed.
18 17:55:21.999721 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 17:55:22.000079 saving as /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/ramdisk/initrd.cpio.gz
20 17:55:22.000420 total size: 5671549 (5 MB)
21 17:55:22.005338 progress 0 % (0 MB)
22 17:55:22.014266 progress 5 % (0 MB)
23 17:55:22.022334 progress 10 % (0 MB)
24 17:55:22.027307 progress 15 % (0 MB)
25 17:55:22.031540 progress 20 % (1 MB)
26 17:55:22.035149 progress 25 % (1 MB)
27 17:55:22.038012 progress 30 % (1 MB)
28 17:55:22.040980 progress 35 % (1 MB)
29 17:55:22.043474 progress 40 % (2 MB)
30 17:55:22.045713 progress 45 % (2 MB)
31 17:55:22.047937 progress 50 % (2 MB)
32 17:55:22.050098 progress 55 % (3 MB)
33 17:55:22.051938 progress 60 % (3 MB)
34 17:55:22.053883 progress 65 % (3 MB)
35 17:55:22.055826 progress 70 % (3 MB)
36 17:55:22.057412 progress 75 % (4 MB)
37 17:55:22.059154 progress 80 % (4 MB)
38 17:55:22.060891 progress 85 % (4 MB)
39 17:55:22.062329 progress 90 % (4 MB)
40 17:55:22.063918 progress 95 % (5 MB)
41 17:55:22.065524 progress 100 % (5 MB)
42 17:55:22.065636 5 MB downloaded in 0.07 s (82.91 MB/s)
43 17:55:22.065791 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:55:22.066051 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:55:22.066147 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:55:22.066231 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:55:22.066367 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:55:22.066437 saving as /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/kernel/bzImage
50 17:55:22.066497 total size: 8507280 (8 MB)
51 17:55:22.066608 No compression specified
52 17:55:22.067734 progress 0 % (0 MB)
53 17:55:22.069983 progress 5 % (0 MB)
54 17:55:22.072262 progress 10 % (0 MB)
55 17:55:22.074522 progress 15 % (1 MB)
56 17:55:22.076848 progress 20 % (1 MB)
57 17:55:22.079118 progress 25 % (2 MB)
58 17:55:22.081374 progress 30 % (2 MB)
59 17:55:22.083647 progress 35 % (2 MB)
60 17:55:22.085894 progress 40 % (3 MB)
61 17:55:22.088148 progress 45 % (3 MB)
62 17:55:22.090421 progress 50 % (4 MB)
63 17:55:22.092701 progress 55 % (4 MB)
64 17:55:22.094914 progress 60 % (4 MB)
65 17:55:22.097129 progress 65 % (5 MB)
66 17:55:22.099352 progress 70 % (5 MB)
67 17:55:22.101553 progress 75 % (6 MB)
68 17:55:22.103804 progress 80 % (6 MB)
69 17:55:22.106012 progress 85 % (6 MB)
70 17:55:22.108264 progress 90 % (7 MB)
71 17:55:22.110467 progress 95 % (7 MB)
72 17:55:22.112757 progress 100 % (8 MB)
73 17:55:22.112949 8 MB downloaded in 0.05 s (174.67 MB/s)
74 17:55:22.113094 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:55:22.113325 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:55:22.113416 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:55:22.113504 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:55:22.113646 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 17:55:22.113716 saving as /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/nfsrootfs/full.rootfs.tar
81 17:55:22.113778 total size: 126031368 (120 MB)
82 17:55:22.113841 Using unxz to decompress xz
83 17:55:22.118107 progress 0 % (0 MB)
84 17:55:22.603040 progress 5 % (6 MB)
85 17:55:23.086207 progress 10 % (12 MB)
86 17:55:23.575545 progress 15 % (18 MB)
87 17:55:24.079004 progress 20 % (24 MB)
88 17:55:24.414797 progress 25 % (30 MB)
89 17:55:24.752026 progress 30 % (36 MB)
90 17:55:25.012824 progress 35 % (42 MB)
91 17:55:25.192492 progress 40 % (48 MB)
92 17:55:25.554390 progress 45 % (54 MB)
93 17:55:25.947504 progress 50 % (60 MB)
94 17:55:26.302749 progress 55 % (66 MB)
95 17:55:26.668632 progress 60 % (72 MB)
96 17:55:27.021632 progress 65 % (78 MB)
97 17:55:27.423926 progress 70 % (84 MB)
98 17:55:27.850211 progress 75 % (90 MB)
99 17:55:28.275785 progress 80 % (96 MB)
100 17:55:28.372191 progress 85 % (102 MB)
101 17:55:28.525030 progress 90 % (108 MB)
102 17:55:28.856296 progress 95 % (114 MB)
103 17:55:29.226599 progress 100 % (120 MB)
104 17:55:29.231434 120 MB downloaded in 7.12 s (16.89 MB/s)
105 17:55:29.231701 end: 1.3.1 http-download (duration 00:00:07) [common]
107 17:55:29.231989 end: 1.3 download-retry (duration 00:00:07) [common]
108 17:55:29.232095 start: 1.4 download-retry (timeout 00:09:53) [common]
109 17:55:29.232200 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 17:55:29.232369 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:55:29.232447 saving as /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/modules/modules.tar
112 17:55:29.232529 total size: 253900 (0 MB)
113 17:55:29.232634 Using unxz to decompress xz
114 17:55:29.237531 progress 12 % (0 MB)
115 17:55:29.237968 progress 25 % (0 MB)
116 17:55:29.238213 progress 38 % (0 MB)
117 17:55:29.240066 progress 51 % (0 MB)
118 17:55:29.241952 progress 64 % (0 MB)
119 17:55:29.244098 progress 77 % (0 MB)
120 17:55:29.245965 progress 90 % (0 MB)
121 17:55:29.247745 progress 100 % (0 MB)
122 17:55:29.253441 0 MB downloaded in 0.02 s (11.58 MB/s)
123 17:55:29.253689 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:55:29.253978 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:55:29.254090 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 17:55:29.254232 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 17:55:32.229881 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831906/extract-nfsrootfs-watouy80
129 17:55:32.230079 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 17:55:32.230179 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
131 17:55:32.230347 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo
132 17:55:32.230482 makedir: /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin
133 17:55:32.230648 makedir: /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/tests
134 17:55:32.230751 makedir: /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/results
135 17:55:32.230852 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-add-keys
136 17:55:32.230992 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-add-sources
137 17:55:32.231122 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-background-process-start
138 17:55:32.231249 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-background-process-stop
139 17:55:32.231373 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-common-functions
140 17:55:32.231498 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-echo-ipv4
141 17:55:32.231622 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-install-packages
142 17:55:32.231745 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-installed-packages
143 17:55:32.231868 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-os-build
144 17:55:32.231990 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-probe-channel
145 17:55:32.232116 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-probe-ip
146 17:55:32.232239 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-target-ip
147 17:55:32.232362 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-target-mac
148 17:55:32.232485 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-target-storage
149 17:55:32.232611 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-case
150 17:55:32.232734 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-event
151 17:55:32.232857 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-feedback
152 17:55:32.232980 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-raise
153 17:55:32.233103 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-reference
154 17:55:32.233227 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-runner
155 17:55:32.233351 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-set
156 17:55:32.233473 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-test-shell
157 17:55:32.233601 Updating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-install-packages (oe)
158 17:55:32.233752 Updating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/bin/lava-installed-packages (oe)
159 17:55:32.233879 Creating /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/environment
160 17:55:32.233976 LAVA metadata
161 17:55:32.234046 - LAVA_JOB_ID=11831906
162 17:55:32.234108 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:55:32.234206 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
164 17:55:32.234271 skipped lava-vland-overlay
165 17:55:32.234342 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:55:32.234418 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
167 17:55:32.234476 skipped lava-multinode-overlay
168 17:55:32.234580 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:55:32.234683 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
170 17:55:32.234754 Loading test definitions
171 17:55:32.234838 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
172 17:55:32.234907 Using /lava-11831906 at stage 0
173 17:55:32.234999 Fetching tests from https://github.com/kernelci/test-definitions
174 17:55:32.235076 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/0/tests/0_ltp-mm'
175 17:55:34.540751 Running '/usr/bin/git checkout kernelci.org
176 17:55:34.686256 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
177 17:55:34.687112 uuid=11831906_1.5.2.3.1 testdef=None
178 17:55:34.687266 end: 1.5.2.3.1 git-repo-action (duration 00:00:02) [common]
180 17:55:34.687509 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
181 17:55:34.688291 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 17:55:34.688527 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
184 17:55:34.689561 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 17:55:34.689797 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
187 17:55:34.690827 runner path: /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/0/tests/0_ltp-mm test_uuid 11831906_1.5.2.3.1
188 17:55:34.690915 SKIPFILE='skipfile-lkft.yaml'
189 17:55:34.690978 SKIP_INSTALL='true'
190 17:55:34.691036 TST_CMDFILES='mm'
191 17:55:34.691174 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 17:55:34.691378 Creating lava-test-runner.conf files
194 17:55:34.691441 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831906/lava-overlay-aw78e2yo/lava-11831906/0 for stage 0
195 17:55:34.691533 - 0_ltp-mm
196 17:55:34.691637 end: 1.5.2.3 test-definition (duration 00:00:02) [common]
197 17:55:34.691722 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
198 17:55:42.108075 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
199 17:55:42.108235 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
200 17:55:42.108329 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
201 17:55:42.108427 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
202 17:55:42.108520 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
203 17:55:42.251872 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
204 17:55:42.252340 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
205 17:55:42.252491 extracting modules file /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831906/extract-nfsrootfs-watouy80
206 17:55:42.267385 extracting modules file /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831906/extract-overlay-ramdisk-w_20d_b0/ramdisk
207 17:55:42.280851 end: 1.5.4 extract-modules (duration 00:00:00) [common]
208 17:55:42.280973 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
209 17:55:42.281065 [common] Applying overlay to NFS
210 17:55:42.281138 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831906/compress-overlay-1avcb1md/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831906/extract-nfsrootfs-watouy80
211 17:55:43.188084 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
212 17:55:43.188252 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
213 17:55:43.188347 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
214 17:55:43.188433 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
215 17:55:43.188512 Building ramdisk /var/lib/lava/dispatcher/tmp/11831906/extract-overlay-ramdisk-w_20d_b0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831906/extract-overlay-ramdisk-w_20d_b0/ramdisk
216 17:55:43.282687 >> 27217 blocks
217 17:55:43.867678 rename /var/lib/lava/dispatcher/tmp/11831906/extract-overlay-ramdisk-w_20d_b0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
218 17:55:43.868144 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
219 17:55:43.868260 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
220 17:55:43.868360 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
221 17:55:43.868452 No mkimage arch provided, not using FIT.
222 17:55:43.868540 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
223 17:55:43.868624 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
224 17:55:43.868723 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
225 17:55:43.868810 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
226 17:55:43.868892 No LXC device requested
227 17:55:43.868968 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
228 17:55:43.869057 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
229 17:55:43.869142 end: 1.7 deploy-device-env (duration 00:00:00) [common]
230 17:55:43.869212 Checking files for TFTP limit of 4294967296 bytes.
231 17:55:43.869612 end: 1 tftp-deploy (duration 00:00:22) [common]
232 17:55:43.869716 start: 2 depthcharge-action (timeout 00:05:00) [common]
233 17:55:43.869806 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
234 17:55:43.869927 substitutions:
235 17:55:43.869998 - {DTB}: None
236 17:55:43.870058 - {INITRD}: 11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
237 17:55:43.870116 - {KERNEL}: 11831906/tftp-deploy-6cvdqpy5/kernel/bzImage
238 17:55:43.870172 - {LAVA_MAC}: None
239 17:55:43.870227 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831906/extract-nfsrootfs-watouy80
240 17:55:43.870282 - {NFS_SERVER_IP}: 192.168.201.1
241 17:55:43.870336 - {PRESEED_CONFIG}: None
242 17:55:43.870389 - {PRESEED_LOCAL}: None
243 17:55:43.870442 - {RAMDISK}: 11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
244 17:55:43.870495 - {ROOT_PART}: None
245 17:55:43.870582 - {ROOT}: None
246 17:55:43.870662 - {SERVER_IP}: 192.168.201.1
247 17:55:43.870714 - {TEE}: None
248 17:55:43.870767 Parsed boot commands:
249 17:55:43.870819 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
250 17:55:43.870994 Parsed boot commands: tftpboot 192.168.201.1 11831906/tftp-deploy-6cvdqpy5/kernel/bzImage 11831906/tftp-deploy-6cvdqpy5/kernel/cmdline 11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
251 17:55:43.871081 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
252 17:55:43.871164 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
253 17:55:43.871255 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
254 17:55:43.871339 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
255 17:55:43.871410 Not connected, no need to disconnect.
256 17:55:43.871482 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
257 17:55:43.871559 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
258 17:55:43.871627 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-0'
259 17:55:43.875803 Setting prompt string to ['lava-test: # ']
260 17:55:43.876167 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
261 17:55:43.876270 end: 2.2.1 reset-connection (duration 00:00:00) [common]
262 17:55:43.876364 start: 2.2.2 reset-device (timeout 00:05:00) [common]
263 17:55:43.876468 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
264 17:55:43.876700 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
265 17:55:49.028840 >> Command sent successfully.
266 17:55:49.040478 Returned 0 in 5 seconds
267 17:55:49.141864 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
269 17:55:49.143437 end: 2.2.2 reset-device (duration 00:00:05) [common]
270 17:55:49.144043 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
271 17:55:49.144550 Setting prompt string to 'Starting depthcharge on Helios...'
272 17:55:49.144949 Changing prompt to 'Starting depthcharge on Helios...'
273 17:55:49.145338 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
274 17:55:49.146711 [Enter `^Ec?' for help]
275 17:55:49.751977
276 17:55:49.752566
277 17:55:49.762080 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
278 17:55:49.765618 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
279 17:55:49.772372 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
280 17:55:49.775429 CPU: AES supported, TXT NOT supported, VT supported
281 17:55:49.782094 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
282 17:55:49.785540 PCH: device id 0284 (rev 00) is Cometlake-U Premium
283 17:55:49.792456 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
284 17:55:49.795384 VBOOT: Loading verstage.
285 17:55:49.799178 FMAP: Found "FLASH" version 1.1 at 0xc04000.
286 17:55:49.805987 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
287 17:55:49.808900 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
288 17:55:49.811969 CBFS @ c08000 size 3f8000
289 17:55:49.818577 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
290 17:55:49.822114 CBFS: Locating 'fallback/verstage'
291 17:55:49.825147 CBFS: Found @ offset 10fb80 size 1072c
292 17:55:49.828468
293 17:55:49.828957
294 17:55:49.838822 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
295 17:55:49.852898 Probing TPM: . done!
296 17:55:49.856301 TPM ready after 0 ms
297 17:55:49.859067 Connected to device vid:did:rid of 1ae0:0028:00
298 17:55:49.869477 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
299 17:55:49.873207 Initialized TPM device CR50 revision 0
300 17:55:49.920071 tlcl_send_startup: Startup return code is 0
301 17:55:49.920632 TPM: setup succeeded
302 17:55:49.933227 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
303 17:55:49.937061 Chrome EC: UHEPI supported
304 17:55:49.940268 Phase 1
305 17:55:49.943795 FMAP: area GBB found @ c05000 (12288 bytes)
306 17:55:49.949850 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
307 17:55:49.953611 Phase 2
308 17:55:49.954212 Phase 3
309 17:55:49.957157 FMAP: area GBB found @ c05000 (12288 bytes)
310 17:55:49.963435 VB2:vb2_report_dev_firmware() This is developer signed firmware
311 17:55:49.970265 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
312 17:55:49.973501 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
313 17:55:49.979536 VB2:vb2_verify_keyblock() Checking keyblock signature...
314 17:55:49.995561 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 17:55:49.998577 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 17:55:50.005542 VB2:vb2_verify_fw_preamble() Verifying preamble.
317 17:55:50.009714 Phase 4
318 17:55:50.013592 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
319 17:55:50.020017 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
320 17:55:50.199745 VB2:vb2_rsa_verify_digest() Digest check failed!
321 17:55:50.202924 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
322 17:55:50.206250 Saving nvdata
323 17:55:50.209617 Reboot requested (10020007)
324 17:55:50.212713 board_reset() called!
325 17:55:50.213187 full_reset() called!
326 17:55:54.718878
327 17:55:54.719040
328 17:55:54.728959 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
329 17:55:54.731923 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
330 17:55:54.738499 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
331 17:55:54.741969 CPU: AES supported, TXT NOT supported, VT supported
332 17:55:54.748393 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
333 17:55:54.752360 PCH: device id 0284 (rev 00) is Cometlake-U Premium
334 17:55:54.758471 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
335 17:55:54.762201 VBOOT: Loading verstage.
336 17:55:54.765453 FMAP: Found "FLASH" version 1.1 at 0xc04000.
337 17:55:54.771687 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
338 17:55:54.778903 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
339 17:55:54.778982 CBFS @ c08000 size 3f8000
340 17:55:54.785191 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
341 17:55:54.788231 CBFS: Locating 'fallback/verstage'
342 17:55:54.791547 CBFS: Found @ offset 10fb80 size 1072c
343 17:55:54.795783
344 17:55:54.795894
345 17:55:54.805554 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
346 17:55:54.820302 Probing TPM: . done!
347 17:55:54.823515 TPM ready after 0 ms
348 17:55:54.827380 Connected to device vid:did:rid of 1ae0:0028:00
349 17:55:54.837163 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
350 17:55:54.840400 Initialized TPM device CR50 revision 0
351 17:55:54.887905 tlcl_send_startup: Startup return code is 0
352 17:55:54.888351 TPM: setup succeeded
353 17:55:54.900383 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
354 17:55:54.904670 Chrome EC: UHEPI supported
355 17:55:54.907241 Phase 1
356 17:55:54.911008 FMAP: area GBB found @ c05000 (12288 bytes)
357 17:55:54.917653 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
358 17:55:54.924249 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
359 17:55:54.927935 Recovery requested (1009000e)
360 17:55:54.933822 Saving nvdata
361 17:55:54.939408 tlcl_extend: response is 0
362 17:55:54.948312 tlcl_extend: response is 0
363 17:55:54.955404 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
364 17:55:54.959032 CBFS @ c08000 size 3f8000
365 17:55:54.965908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
366 17:55:54.969060 CBFS: Locating 'fallback/romstage'
367 17:55:54.971801 CBFS: Found @ offset 80 size 145fc
368 17:55:54.975467 Accumulated console time in verstage 98 ms
369 17:55:54.976054
370 17:55:54.976428
371 17:55:54.988794 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
372 17:55:54.995102 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
373 17:55:54.998485 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
374 17:55:55.002306 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
375 17:55:55.008950 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
376 17:55:55.011441 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
377 17:55:55.014903 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
378 17:55:55.018142 TCO_STS: 0000 0000
379 17:55:55.021459 GEN_PMCON: e0015238 00000200
380 17:55:55.024896 GBLRST_CAUSE: 00000000 00000000
381 17:55:55.025467 prev_sleep_state 5
382 17:55:55.028384 Boot Count incremented to 71969
383 17:55:55.035264 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
384 17:55:55.038336 CBFS @ c08000 size 3f8000
385 17:55:55.044842 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
386 17:55:55.045405 CBFS: Locating 'fspm.bin'
387 17:55:55.048603 CBFS: Found @ offset 5ffc0 size 71000
388 17:55:55.052551 Chrome EC: UHEPI supported
389 17:55:55.060644 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
390 17:55:55.065004 Probing TPM: done!
391 17:55:55.072238 Connected to device vid:did:rid of 1ae0:0028:00
392 17:55:55.081713 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
393 17:55:55.087951 Initialized TPM device CR50 revision 0
394 17:55:55.096810 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
395 17:55:55.103968 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
396 17:55:55.106746 MRC cache found, size 1948
397 17:55:55.110647 bootmode is set to: 2
398 17:55:55.113414 PRMRR disabled by config.
399 17:55:55.113983 SPD INDEX = 1
400 17:55:55.119631 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
401 17:55:55.123034 CBFS @ c08000 size 3f8000
402 17:55:55.130191 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
403 17:55:55.130802 CBFS: Locating 'spd.bin'
404 17:55:55.133371 CBFS: Found @ offset 5fb80 size 400
405 17:55:55.136472 SPD: module type is LPDDR3
406 17:55:55.139895 SPD: module part is
407 17:55:55.146584 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
408 17:55:55.149727 SPD: device width 4 bits, bus width 8 bits
409 17:55:55.152728 SPD: module size is 4096 MB (per channel)
410 17:55:55.156587 memory slot: 0 configuration done.
411 17:55:55.159632 memory slot: 2 configuration done.
412 17:55:55.211462 CBMEM:
413 17:55:55.214473 IMD: root @ 99fff000 254 entries.
414 17:55:55.217694 IMD: root @ 99ffec00 62 entries.
415 17:55:55.221173 External stage cache:
416 17:55:55.224603 IMD: root @ 9abff000 254 entries.
417 17:55:55.228609 IMD: root @ 9abfec00 62 entries.
418 17:55:55.234825 Chrome EC: clear events_b mask to 0x0000000020004000
419 17:55:55.248047 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
420 17:55:55.260742 tlcl_write: response is 0
421 17:55:55.269673 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
422 17:55:55.277246 MRC: TPM MRC hash updated successfully.
423 17:55:55.277854 2 DIMMs found
424 17:55:55.279592 SMM Memory Map
425 17:55:55.283019 SMRAM : 0x9a000000 0x1000000
426 17:55:55.286021 Subregion 0: 0x9a000000 0xa00000
427 17:55:55.289954 Subregion 1: 0x9aa00000 0x200000
428 17:55:55.292964 Subregion 2: 0x9ac00000 0x400000
429 17:55:55.296150 top_of_ram = 0x9a000000
430 17:55:55.299974 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
431 17:55:55.305771 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
432 17:55:55.309401 MTRR Range: Start=ff000000 End=0 (Size 1000000)
433 17:55:55.316517 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 17:55:55.319240 CBFS @ c08000 size 3f8000
435 17:55:55.322756 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 17:55:55.326004 CBFS: Locating 'fallback/postcar'
437 17:55:55.333286 CBFS: Found @ offset 107000 size 4b44
438 17:55:55.335881 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
439 17:55:55.349317 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
440 17:55:55.352118 Processing 180 relocs. Offset value of 0x97c0c000
441 17:55:55.360252 Accumulated console time in romstage 286 ms
442 17:55:55.360833
443 17:55:55.361219
444 17:55:55.370102 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
445 17:55:55.376944 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
446 17:55:55.380066 CBFS @ c08000 size 3f8000
447 17:55:55.386723 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
448 17:55:55.390104 CBFS: Locating 'fallback/ramstage'
449 17:55:55.392898 CBFS: Found @ offset 43380 size 1b9e8
450 17:55:55.399721 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
451 17:55:55.432196 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
452 17:55:55.435441 Processing 3976 relocs. Offset value of 0x98db0000
453 17:55:55.442050 Accumulated console time in postcar 52 ms
454 17:55:55.442684
455 17:55:55.443068
456 17:55:55.451693 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
457 17:55:55.459176 FMAP: area RO_VPD found @ c00000 (16384 bytes)
458 17:55:55.462028 WARNING: RO_VPD is uninitialized or empty.
459 17:55:55.465073 FMAP: area RW_VPD found @ af8000 (8192 bytes)
460 17:55:55.471797 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 17:55:55.472363 Normal boot.
462 17:55:55.478096 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
463 17:55:55.481505 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
464 17:55:55.485172 CBFS @ c08000 size 3f8000
465 17:55:55.491906 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
466 17:55:55.495503 CBFS: Locating 'cpu_microcode_blob.bin'
467 17:55:55.498226 CBFS: Found @ offset 14700 size 2ec00
468 17:55:55.501545 microcode: sig=0x806ec pf=0x4 revision=0xc9
469 17:55:55.504880 Skip microcode update
470 17:55:55.511842 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 17:55:55.512431 CBFS @ c08000 size 3f8000
472 17:55:55.518979 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 17:55:55.521595 CBFS: Locating 'fsps.bin'
474 17:55:55.525297 CBFS: Found @ offset d1fc0 size 35000
475 17:55:55.550723 Detected 4 core, 8 thread CPU.
476 17:55:55.553732 Setting up SMI for CPU
477 17:55:55.557579 IED base = 0x9ac00000
478 17:55:55.558151 IED size = 0x00400000
479 17:55:55.560608 Will perform SMM setup.
480 17:55:55.567094 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
481 17:55:55.573723 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
482 17:55:55.577005 Processing 16 relocs. Offset value of 0x00030000
483 17:55:55.580484 Attempting to start 7 APs
484 17:55:55.584034 Waiting for 10ms after sending INIT.
485 17:55:55.600345 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
486 17:55:55.600927 done.
487 17:55:55.603416 AP: slot 4 apic_id 7.
488 17:55:55.606738 AP: slot 5 apic_id 6.
489 17:55:55.607304 AP: slot 1 apic_id 2.
490 17:55:55.610184 AP: slot 3 apic_id 3.
491 17:55:55.613719 Waiting for 2nd SIPI to complete...done.
492 17:55:55.616671 AP: slot 7 apic_id 5.
493 17:55:55.620351 AP: slot 6 apic_id 4.
494 17:55:55.627108 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
495 17:55:55.633046 Processing 13 relocs. Offset value of 0x00038000
496 17:55:55.639817 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
497 17:55:55.643215 Installing SMM handler to 0x9a000000
498 17:55:55.649770 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
499 17:55:55.656552 Processing 658 relocs. Offset value of 0x9a010000
500 17:55:55.663147 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
501 17:55:55.666656 Processing 13 relocs. Offset value of 0x9a008000
502 17:55:55.673041 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
503 17:55:55.679427 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
504 17:55:55.686104 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
505 17:55:55.689419 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
506 17:55:55.696330 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
507 17:55:55.702714 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
508 17:55:55.705894 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
509 17:55:55.712736 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
510 17:55:55.716369 Clearing SMI status registers
511 17:55:55.719632 SMI_STS: PM1
512 17:55:55.720141 PM1_STS: PWRBTN
513 17:55:55.723067 TCO_STS: SECOND_TO
514 17:55:55.726438 New SMBASE 0x9a000000
515 17:55:55.729855 In relocation handler: CPU 0
516 17:55:55.733102 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
517 17:55:55.736111 Writing SMRR. base = 0x9a000006, mask=0xff000800
518 17:55:55.740036 Relocation complete.
519 17:55:55.742883 New SMBASE 0x99fff800
520 17:55:55.743316 In relocation handler: CPU 2
521 17:55:55.749628 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
522 17:55:55.752848 Writing SMRR. base = 0x9a000006, mask=0xff000800
523 17:55:55.756496 Relocation complete.
524 17:55:55.759374 New SMBASE 0x99ffec00
525 17:55:55.759809 In relocation handler: CPU 5
526 17:55:55.766132 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
527 17:55:55.769593 Writing SMRR. base = 0x9a000006, mask=0xff000800
528 17:55:55.772783 Relocation complete.
529 17:55:55.773215 New SMBASE 0x99fff000
530 17:55:55.776059 In relocation handler: CPU 4
531 17:55:55.782969 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
532 17:55:55.786144 Writing SMRR. base = 0x9a000006, mask=0xff000800
533 17:55:55.789128 Relocation complete.
534 17:55:55.789561 New SMBASE 0x99fffc00
535 17:55:55.792516 In relocation handler: CPU 1
536 17:55:55.799603 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
537 17:55:55.802486 Writing SMRR. base = 0x9a000006, mask=0xff000800
538 17:55:55.806135 Relocation complete.
539 17:55:55.806796 New SMBASE 0x99fff400
540 17:55:55.809288 In relocation handler: CPU 3
541 17:55:55.812579 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
542 17:55:55.818881 Writing SMRR. base = 0x9a000006, mask=0xff000800
543 17:55:55.823039 Relocation complete.
544 17:55:55.823613 New SMBASE 0x99ffe800
545 17:55:55.825652 In relocation handler: CPU 6
546 17:55:55.829255 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
547 17:55:55.835759 Writing SMRR. base = 0x9a000006, mask=0xff000800
548 17:55:55.839109 Relocation complete.
549 17:55:55.839533 New SMBASE 0x99ffe400
550 17:55:55.842197 In relocation handler: CPU 7
551 17:55:55.845833 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
552 17:55:55.852776 Writing SMRR. base = 0x9a000006, mask=0xff000800
553 17:55:55.853209 Relocation complete.
554 17:55:55.855726 Initializing CPU #0
555 17:55:55.858716 CPU: vendor Intel device 806ec
556 17:55:55.862504 CPU: family 06, model 8e, stepping 0c
557 17:55:55.865343 Clearing out pending MCEs
558 17:55:55.868811 Setting up local APIC...
559 17:55:55.869236 apic_id: 0x00 done.
560 17:55:55.872285 Turbo is available but hidden
561 17:55:55.875631 Turbo is available and visible
562 17:55:55.878781 VMX status: enabled
563 17:55:55.882830 IA32_FEATURE_CONTROL status: locked
564 17:55:55.885337 Skip microcode update
565 17:55:55.885765 CPU #0 initialized
566 17:55:55.888712 Initializing CPU #2
567 17:55:55.892333 Initializing CPU #4
568 17:55:55.892761 Initializing CPU #5
569 17:55:55.895534 CPU: vendor Intel device 806ec
570 17:55:55.898992 CPU: family 06, model 8e, stepping 0c
571 17:55:55.902033 CPU: vendor Intel device 806ec
572 17:55:55.905623 CPU: family 06, model 8e, stepping 0c
573 17:55:55.908667 Clearing out pending MCEs
574 17:55:55.912032 Clearing out pending MCEs
575 17:55:55.915215 Setting up local APIC...
576 17:55:55.915650 Initializing CPU #3
577 17:55:55.919194 Initializing CPU #1
578 17:55:55.922073 CPU: vendor Intel device 806ec
579 17:55:55.925012 CPU: family 06, model 8e, stepping 0c
580 17:55:55.928302 CPU: vendor Intel device 806ec
581 17:55:55.931936 CPU: family 06, model 8e, stepping 0c
582 17:55:55.935072 Clearing out pending MCEs
583 17:55:55.938626 Clearing out pending MCEs
584 17:55:55.939067 Setting up local APIC...
585 17:55:55.941839 Initializing CPU #6
586 17:55:55.945177 CPU: vendor Intel device 806ec
587 17:55:55.948503 CPU: family 06, model 8e, stepping 0c
588 17:55:55.951496 Clearing out pending MCEs
589 17:55:55.954893 apic_id: 0x06 done.
590 17:55:55.955326 Setting up local APIC...
591 17:55:55.958562 apic_id: 0x03 done.
592 17:55:55.961749 Setting up local APIC...
593 17:55:55.965078 Setting up local APIC...
594 17:55:55.965513 VMX status: enabled
595 17:55:55.968557 apic_id: 0x07 done.
596 17:55:55.971736 IA32_FEATURE_CONTROL status: locked
597 17:55:55.972172 VMX status: enabled
598 17:55:55.975144 Skip microcode update
599 17:55:55.978358 IA32_FEATURE_CONTROL status: locked
600 17:55:55.981645 CPU #5 initialized
601 17:55:55.985035 Skip microcode update
602 17:55:55.985469 VMX status: enabled
603 17:55:55.988399 apic_id: 0x02 done.
604 17:55:55.991881 IA32_FEATURE_CONTROL status: locked
605 17:55:55.992316 VMX status: enabled
606 17:55:55.995033 Skip microcode update
607 17:55:55.997930 IA32_FEATURE_CONTROL status: locked
608 17:55:56.001420 CPU #3 initialized
609 17:55:56.001876 Skip microcode update
610 17:55:56.004768 apic_id: 0x01 done.
611 17:55:56.008280 CPU #4 initialized
612 17:55:56.008722 VMX status: enabled
613 17:55:56.011237 CPU #1 initialized
614 17:55:56.015061 IA32_FEATURE_CONTROL status: locked
615 17:55:56.018122 CPU: vendor Intel device 806ec
616 17:55:56.021310 CPU: family 06, model 8e, stepping 0c
617 17:55:56.024979 Initializing CPU #7
618 17:55:56.028240 Clearing out pending MCEs
619 17:55:56.028671 CPU: vendor Intel device 806ec
620 17:55:56.034579 CPU: family 06, model 8e, stepping 0c
621 17:55:56.035017 Setting up local APIC...
622 17:55:56.037783 Skip microcode update
623 17:55:56.041474 apic_id: 0x04 done.
624 17:55:56.041909 Clearing out pending MCEs
625 17:55:56.044652 VMX status: enabled
626 17:55:56.047750 Setting up local APIC...
627 17:55:56.048185 CPU #2 initialized
628 17:55:56.051426 apic_id: 0x05 done.
629 17:55:56.054697 IA32_FEATURE_CONTROL status: locked
630 17:55:56.057899 VMX status: enabled
631 17:55:56.058325 Skip microcode update
632 17:55:56.064850 IA32_FEATURE_CONTROL status: locked
633 17:55:56.065279 CPU #6 initialized
634 17:55:56.067900 Skip microcode update
635 17:55:56.068326 CPU #7 initialized
636 17:55:56.074823 bsp_do_flight_plan done after 457 msecs.
637 17:55:56.077865 CPU: frequency set to 4200 MHz
638 17:55:56.078291 Enabling SMIs.
639 17:55:56.081041 Locking SMM.
640 17:55:56.094870 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
641 17:55:56.097496 CBFS @ c08000 size 3f8000
642 17:55:56.104512 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
643 17:55:56.104945 CBFS: Locating 'vbt.bin'
644 17:55:56.107967 CBFS: Found @ offset 5f5c0 size 499
645 17:55:56.114851 Found a VBT of 4608 bytes after decompression
646 17:55:56.299150 Display FSP Version Info HOB
647 17:55:56.302758 Reference Code - CPU = 9.0.1e.30
648 17:55:56.306185 uCode Version = 0.0.0.ca
649 17:55:56.309382 TXT ACM version = ff.ff.ff.ffff
650 17:55:56.312578 Display FSP Version Info HOB
651 17:55:56.315931 Reference Code - ME = 9.0.1e.30
652 17:55:56.318743 MEBx version = 0.0.0.0
653 17:55:56.322234 ME Firmware Version = Consumer SKU
654 17:55:56.325417 Display FSP Version Info HOB
655 17:55:56.328580 Reference Code - CML PCH = 9.0.1e.30
656 17:55:56.331982 PCH-CRID Status = Disabled
657 17:55:56.335646 PCH-CRID Original Value = ff.ff.ff.ffff
658 17:55:56.339006 PCH-CRID New Value = ff.ff.ff.ffff
659 17:55:56.342464 OPROM - RST - RAID = ff.ff.ff.ffff
660 17:55:56.345456 ChipsetInit Base Version = ff.ff.ff.ffff
661 17:55:56.348773 ChipsetInit Oem Version = ff.ff.ff.ffff
662 17:55:56.352005 Display FSP Version Info HOB
663 17:55:56.358935 Reference Code - SA - System Agent = 9.0.1e.30
664 17:55:56.362062 Reference Code - MRC = 0.7.1.6c
665 17:55:56.362678 SA - PCIe Version = 9.0.1e.30
666 17:55:56.365251 SA-CRID Status = Disabled
667 17:55:56.368648 SA-CRID Original Value = 0.0.0.c
668 17:55:56.371995 SA-CRID New Value = 0.0.0.c
669 17:55:56.375433 OPROM - VBIOS = ff.ff.ff.ffff
670 17:55:56.378980 RTC Init
671 17:55:56.382104 Set power on after power failure.
672 17:55:56.382708 Disabling Deep S3
673 17:55:56.385108 Disabling Deep S3
674 17:55:56.385683 Disabling Deep S4
675 17:55:56.388719 Disabling Deep S4
676 17:55:56.389188 Disabling Deep S5
677 17:55:56.391825 Disabling Deep S5
678 17:55:56.398824 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 195 exit 1
679 17:55:56.399404 Enumerating buses...
680 17:55:56.405443 Show all devs... Before device enumeration.
681 17:55:56.406022 Root Device: enabled 1
682 17:55:56.408644 CPU_CLUSTER: 0: enabled 1
683 17:55:56.411732 DOMAIN: 0000: enabled 1
684 17:55:56.415217 APIC: 00: enabled 1
685 17:55:56.415693 PCI: 00:00.0: enabled 1
686 17:55:56.418614 PCI: 00:02.0: enabled 1
687 17:55:56.422044 PCI: 00:04.0: enabled 0
688 17:55:56.425339 PCI: 00:05.0: enabled 0
689 17:55:56.425836 PCI: 00:12.0: enabled 1
690 17:55:56.428166 PCI: 00:12.5: enabled 0
691 17:55:56.431457 PCI: 00:12.6: enabled 0
692 17:55:56.431935 PCI: 00:14.0: enabled 1
693 17:55:56.434805 PCI: 00:14.1: enabled 0
694 17:55:56.438305 PCI: 00:14.3: enabled 1
695 17:55:56.442072 PCI: 00:14.5: enabled 0
696 17:55:56.442725 PCI: 00:15.0: enabled 1
697 17:55:56.444897 PCI: 00:15.1: enabled 1
698 17:55:56.448569 PCI: 00:15.2: enabled 0
699 17:55:56.452235 PCI: 00:15.3: enabled 0
700 17:55:56.452813 PCI: 00:16.0: enabled 1
701 17:55:56.454887 PCI: 00:16.1: enabled 0
702 17:55:56.458128 PCI: 00:16.2: enabled 0
703 17:55:56.461464 PCI: 00:16.3: enabled 0
704 17:55:56.461936 PCI: 00:16.4: enabled 0
705 17:55:56.464712 PCI: 00:16.5: enabled 0
706 17:55:56.468147 PCI: 00:17.0: enabled 1
707 17:55:56.468618 PCI: 00:19.0: enabled 1
708 17:55:56.471308 PCI: 00:19.1: enabled 0
709 17:55:56.474505 PCI: 00:19.2: enabled 0
710 17:55:56.478120 PCI: 00:1a.0: enabled 0
711 17:55:56.478742 PCI: 00:1c.0: enabled 0
712 17:55:56.481259 PCI: 00:1c.1: enabled 0
713 17:55:56.485354 PCI: 00:1c.2: enabled 0
714 17:55:56.487714 PCI: 00:1c.3: enabled 0
715 17:55:56.488138 PCI: 00:1c.4: enabled 0
716 17:55:56.491245 PCI: 00:1c.5: enabled 0
717 17:55:56.494647 PCI: 00:1c.6: enabled 0
718 17:55:56.495076 PCI: 00:1c.7: enabled 0
719 17:55:56.497813 PCI: 00:1d.0: enabled 1
720 17:55:56.501118 PCI: 00:1d.1: enabled 0
721 17:55:56.504474 PCI: 00:1d.2: enabled 0
722 17:55:56.504906 PCI: 00:1d.3: enabled 0
723 17:55:56.508070 PCI: 00:1d.4: enabled 0
724 17:55:56.511130 PCI: 00:1d.5: enabled 1
725 17:55:56.514622 PCI: 00:1e.0: enabled 1
726 17:55:56.515050 PCI: 00:1e.1: enabled 0
727 17:55:56.518129 PCI: 00:1e.2: enabled 1
728 17:55:56.520976 PCI: 00:1e.3: enabled 1
729 17:55:56.524271 PCI: 00:1f.0: enabled 1
730 17:55:56.524697 PCI: 00:1f.1: enabled 1
731 17:55:56.527796 PCI: 00:1f.2: enabled 1
732 17:55:56.531058 PCI: 00:1f.3: enabled 1
733 17:55:56.534319 PCI: 00:1f.4: enabled 1
734 17:55:56.534890 PCI: 00:1f.5: enabled 1
735 17:55:56.538073 PCI: 00:1f.6: enabled 0
736 17:55:56.541569 USB0 port 0: enabled 1
737 17:55:56.542229 I2C: 00:15: enabled 1
738 17:55:56.544358 I2C: 00:5d: enabled 1
739 17:55:56.547992 GENERIC: 0.0: enabled 1
740 17:55:56.548426 I2C: 00:1a: enabled 1
741 17:55:56.551431 I2C: 00:38: enabled 1
742 17:55:56.554509 I2C: 00:39: enabled 1
743 17:55:56.555119 I2C: 00:3a: enabled 1
744 17:55:56.557829 I2C: 00:3b: enabled 1
745 17:55:56.561309 PCI: 00:00.0: enabled 1
746 17:55:56.561786 SPI: 00: enabled 1
747 17:55:56.564217 SPI: 01: enabled 1
748 17:55:56.567760 PNP: 0c09.0: enabled 1
749 17:55:56.568448 USB2 port 0: enabled 1
750 17:55:56.570821 USB2 port 1: enabled 1
751 17:55:56.574214 USB2 port 2: enabled 0
752 17:55:56.577648 USB2 port 3: enabled 0
753 17:55:56.578124 USB2 port 5: enabled 0
754 17:55:56.580904 USB2 port 6: enabled 1
755 17:55:56.583905 USB2 port 9: enabled 1
756 17:55:56.584383 USB3 port 0: enabled 1
757 17:55:56.587453 USB3 port 1: enabled 1
758 17:55:56.590844 USB3 port 2: enabled 1
759 17:55:56.594098 USB3 port 3: enabled 1
760 17:55:56.594713 USB3 port 4: enabled 0
761 17:55:56.597421 APIC: 02: enabled 1
762 17:55:56.597993 APIC: 01: enabled 1
763 17:55:56.600910 APIC: 03: enabled 1
764 17:55:56.604441 APIC: 07: enabled 1
765 17:55:56.605014 APIC: 06: enabled 1
766 17:55:56.607303 APIC: 04: enabled 1
767 17:55:56.607778 APIC: 05: enabled 1
768 17:55:56.611005 Compare with tree...
769 17:55:56.613905 Root Device: enabled 1
770 17:55:56.617319 CPU_CLUSTER: 0: enabled 1
771 17:55:56.617794 APIC: 00: enabled 1
772 17:55:56.620501 APIC: 02: enabled 1
773 17:55:56.623770 APIC: 01: enabled 1
774 17:55:56.624248 APIC: 03: enabled 1
775 17:55:56.627326 APIC: 07: enabled 1
776 17:55:56.630973 APIC: 06: enabled 1
777 17:55:56.631447 APIC: 04: enabled 1
778 17:55:56.633988 APIC: 05: enabled 1
779 17:55:56.637579 DOMAIN: 0000: enabled 1
780 17:55:56.641083 PCI: 00:00.0: enabled 1
781 17:55:56.641649 PCI: 00:02.0: enabled 1
782 17:55:56.644714 PCI: 00:04.0: enabled 0
783 17:55:56.647122 PCI: 00:05.0: enabled 0
784 17:55:56.650516 PCI: 00:12.0: enabled 1
785 17:55:56.653968 PCI: 00:12.5: enabled 0
786 17:55:56.654441 PCI: 00:12.6: enabled 0
787 17:55:56.657400 PCI: 00:14.0: enabled 1
788 17:55:56.660789 USB0 port 0: enabled 1
789 17:55:56.664254 USB2 port 0: enabled 1
790 17:55:56.667132 USB2 port 1: enabled 1
791 17:55:56.667602 USB2 port 2: enabled 0
792 17:55:56.670989 USB2 port 3: enabled 0
793 17:55:56.674009 USB2 port 5: enabled 0
794 17:55:56.677206 USB2 port 6: enabled 1
795 17:55:56.680883 USB2 port 9: enabled 1
796 17:55:56.683734 USB3 port 0: enabled 1
797 17:55:56.684207 USB3 port 1: enabled 1
798 17:55:56.687377 USB3 port 2: enabled 1
799 17:55:56.690581 USB3 port 3: enabled 1
800 17:55:56.693633 USB3 port 4: enabled 0
801 17:55:56.696902 PCI: 00:14.1: enabled 0
802 17:55:56.697473 PCI: 00:14.3: enabled 1
803 17:55:56.700650 PCI: 00:14.5: enabled 0
804 17:55:56.703434 PCI: 00:15.0: enabled 1
805 17:55:56.707522 I2C: 00:15: enabled 1
806 17:55:56.710309 PCI: 00:15.1: enabled 1
807 17:55:56.710986 I2C: 00:5d: enabled 1
808 17:55:56.713462 GENERIC: 0.0: enabled 1
809 17:55:56.717196 PCI: 00:15.2: enabled 0
810 17:55:56.720850 PCI: 00:15.3: enabled 0
811 17:55:56.721421 PCI: 00:16.0: enabled 1
812 17:55:56.723810 PCI: 00:16.1: enabled 0
813 17:55:56.727033 PCI: 00:16.2: enabled 0
814 17:55:56.730301 PCI: 00:16.3: enabled 0
815 17:55:56.733416 PCI: 00:16.4: enabled 0
816 17:55:56.733892 PCI: 00:16.5: enabled 0
817 17:55:56.736650 PCI: 00:17.0: enabled 1
818 17:55:56.740250 PCI: 00:19.0: enabled 1
819 17:55:56.744098 I2C: 00:1a: enabled 1
820 17:55:56.746786 I2C: 00:38: enabled 1
821 17:55:56.747260 I2C: 00:39: enabled 1
822 17:55:56.750681 I2C: 00:3a: enabled 1
823 17:55:56.753328 I2C: 00:3b: enabled 1
824 17:55:56.757126 PCI: 00:19.1: enabled 0
825 17:55:56.757699 PCI: 00:19.2: enabled 0
826 17:55:56.760248 PCI: 00:1a.0: enabled 0
827 17:55:56.763720 PCI: 00:1c.0: enabled 0
828 17:55:56.766685 PCI: 00:1c.1: enabled 0
829 17:55:56.770043 PCI: 00:1c.2: enabled 0
830 17:55:56.770652 PCI: 00:1c.3: enabled 0
831 17:55:56.773340 PCI: 00:1c.4: enabled 0
832 17:55:56.776542 PCI: 00:1c.5: enabled 0
833 17:55:56.780101 PCI: 00:1c.6: enabled 0
834 17:55:56.783429 PCI: 00:1c.7: enabled 0
835 17:55:56.784015 PCI: 00:1d.0: enabled 1
836 17:55:56.787115 PCI: 00:1d.1: enabled 0
837 17:55:56.790078 PCI: 00:1d.2: enabled 0
838 17:55:56.793134 PCI: 00:1d.3: enabled 0
839 17:55:56.793611 PCI: 00:1d.4: enabled 0
840 17:55:56.796685 PCI: 00:1d.5: enabled 1
841 17:55:56.799917 PCI: 00:00.0: enabled 1
842 17:55:56.803293 PCI: 00:1e.0: enabled 1
843 17:55:56.806441 PCI: 00:1e.1: enabled 0
844 17:55:56.807049 PCI: 00:1e.2: enabled 1
845 17:55:56.809792 SPI: 00: enabled 1
846 17:55:56.813350 PCI: 00:1e.3: enabled 1
847 17:55:56.816771 SPI: 01: enabled 1
848 17:55:56.817335 PCI: 00:1f.0: enabled 1
849 17:55:56.819660 PNP: 0c09.0: enabled 1
850 17:55:56.822979 PCI: 00:1f.1: enabled 1
851 17:55:56.826263 PCI: 00:1f.2: enabled 1
852 17:55:56.829775 PCI: 00:1f.3: enabled 1
853 17:55:56.830250 PCI: 00:1f.4: enabled 1
854 17:55:56.833210 PCI: 00:1f.5: enabled 1
855 17:55:56.836081 PCI: 00:1f.6: enabled 0
856 17:55:56.839850 Root Device scanning...
857 17:55:56.843244 scan_static_bus for Root Device
858 17:55:56.843722 CPU_CLUSTER: 0 enabled
859 17:55:56.846231 DOMAIN: 0000 enabled
860 17:55:56.849772 DOMAIN: 0000 scanning...
861 17:55:56.852790 PCI: pci_scan_bus for bus 00
862 17:55:56.856264 PCI: 00:00.0 [8086/0000] ops
863 17:55:56.859922 PCI: 00:00.0 [8086/9b61] enabled
864 17:55:56.862808 PCI: 00:02.0 [8086/0000] bus ops
865 17:55:56.865941 PCI: 00:02.0 [8086/9b41] enabled
866 17:55:56.869574 PCI: 00:04.0 [8086/1903] disabled
867 17:55:56.872521 PCI: 00:08.0 [8086/1911] enabled
868 17:55:56.876056 PCI: 00:12.0 [8086/02f9] enabled
869 17:55:56.879099 PCI: 00:14.0 [8086/0000] bus ops
870 17:55:56.882873 PCI: 00:14.0 [8086/02ed] enabled
871 17:55:56.885617 PCI: 00:14.2 [8086/02ef] enabled
872 17:55:56.889165 PCI: 00:14.3 [8086/02f0] enabled
873 17:55:56.892550 PCI: 00:15.0 [8086/0000] bus ops
874 17:55:56.895811 PCI: 00:15.0 [8086/02e8] enabled
875 17:55:56.898671 PCI: 00:15.1 [8086/0000] bus ops
876 17:55:56.902412 PCI: 00:15.1 [8086/02e9] enabled
877 17:55:56.905867 PCI: 00:16.0 [8086/0000] ops
878 17:55:56.909486 PCI: 00:16.0 [8086/02e0] enabled
879 17:55:56.912270 PCI: 00:17.0 [8086/0000] ops
880 17:55:56.915711 PCI: 00:17.0 [8086/02d3] enabled
881 17:55:56.919277 PCI: 00:19.0 [8086/0000] bus ops
882 17:55:56.922177 PCI: 00:19.0 [8086/02c5] enabled
883 17:55:56.925582 PCI: 00:1d.0 [8086/0000] bus ops
884 17:55:56.928828 PCI: 00:1d.0 [8086/02b0] enabled
885 17:55:56.932152 PCI: Static device PCI: 00:1d.5 not found, disabling it.
886 17:55:56.935619 PCI: 00:1e.0 [8086/0000] ops
887 17:55:56.939025 PCI: 00:1e.0 [8086/02a8] enabled
888 17:55:56.942107 PCI: 00:1e.2 [8086/0000] bus ops
889 17:55:56.945320 PCI: 00:1e.2 [8086/02aa] enabled
890 17:55:56.948636 PCI: 00:1e.3 [8086/0000] bus ops
891 17:55:56.952047 PCI: 00:1e.3 [8086/02ab] enabled
892 17:55:56.955248 PCI: 00:1f.0 [8086/0000] bus ops
893 17:55:56.958533 PCI: 00:1f.0 [8086/0284] enabled
894 17:55:56.965458 PCI: Static device PCI: 00:1f.1 not found, disabling it.
895 17:55:56.971944 PCI: Static device PCI: 00:1f.2 not found, disabling it.
896 17:55:56.975441 PCI: 00:1f.3 [8086/0000] bus ops
897 17:55:56.978760 PCI: 00:1f.3 [8086/02c8] enabled
898 17:55:56.982025 PCI: 00:1f.4 [8086/0000] bus ops
899 17:55:56.985686 PCI: 00:1f.4 [8086/02a3] enabled
900 17:55:56.988617 PCI: 00:1f.5 [8086/0000] bus ops
901 17:55:56.992482 PCI: 00:1f.5 [8086/02a4] enabled
902 17:55:56.995633 PCI: Leftover static devices:
903 17:55:56.996112 PCI: 00:05.0
904 17:55:56.996459 PCI: 00:12.5
905 17:55:56.999155 PCI: 00:12.6
906 17:55:56.999586 PCI: 00:14.1
907 17:55:57.001880 PCI: 00:14.5
908 17:55:57.002325 PCI: 00:15.2
909 17:55:57.002692 PCI: 00:15.3
910 17:55:57.005243 PCI: 00:16.1
911 17:55:57.005676 PCI: 00:16.2
912 17:55:57.008597 PCI: 00:16.3
913 17:55:57.009030 PCI: 00:16.4
914 17:55:57.012057 PCI: 00:16.5
915 17:55:57.012486 PCI: 00:19.1
916 17:55:57.012825 PCI: 00:19.2
917 17:55:57.015735 PCI: 00:1a.0
918 17:55:57.016181 PCI: 00:1c.0
919 17:55:57.018845 PCI: 00:1c.1
920 17:55:57.019275 PCI: 00:1c.2
921 17:55:57.019613 PCI: 00:1c.3
922 17:55:57.022263 PCI: 00:1c.4
923 17:55:57.022809 PCI: 00:1c.5
924 17:55:57.025053 PCI: 00:1c.6
925 17:55:57.025361 PCI: 00:1c.7
926 17:55:57.025604 PCI: 00:1d.1
927 17:55:57.028492 PCI: 00:1d.2
928 17:55:57.028798 PCI: 00:1d.3
929 17:55:57.031648 PCI: 00:1d.4
930 17:55:57.031879 PCI: 00:1d.5
931 17:55:57.034837 PCI: 00:1e.1
932 17:55:57.035024 PCI: 00:1f.1
933 17:55:57.035170 PCI: 00:1f.2
934 17:55:57.038675 PCI: 00:1f.6
935 17:55:57.041451 PCI: Check your devicetree.cb.
936 17:55:57.041621 PCI: 00:02.0 scanning...
937 17:55:57.048359 scan_generic_bus for PCI: 00:02.0
938 17:55:57.051913 scan_generic_bus for PCI: 00:02.0 done
939 17:55:57.055342 scan_bus: scanning of bus PCI: 00:02.0 took 10178 usecs
940 17:55:57.058640 PCI: 00:14.0 scanning...
941 17:55:57.061902 scan_static_bus for PCI: 00:14.0
942 17:55:57.065409 USB0 port 0 enabled
943 17:55:57.068978 USB0 port 0 scanning...
944 17:55:57.071865 scan_static_bus for USB0 port 0
945 17:55:57.072061 USB2 port 0 enabled
946 17:55:57.074821 USB2 port 1 enabled
947 17:55:57.078250 USB2 port 2 disabled
948 17:55:57.078413 USB2 port 3 disabled
949 17:55:57.081426 USB2 port 5 disabled
950 17:55:57.081548 USB2 port 6 enabled
951 17:55:57.084871 USB2 port 9 enabled
952 17:55:57.087947 USB3 port 0 enabled
953 17:55:57.088031 USB3 port 1 enabled
954 17:55:57.091451 USB3 port 2 enabled
955 17:55:57.094493 USB3 port 3 enabled
956 17:55:57.094619 USB3 port 4 disabled
957 17:55:57.098137 USB2 port 0 scanning...
958 17:55:57.101011 scan_static_bus for USB2 port 0
959 17:55:57.104375 scan_static_bus for USB2 port 0 done
960 17:55:57.111152 scan_bus: scanning of bus USB2 port 0 took 9709 usecs
961 17:55:57.111263 USB2 port 1 scanning...
962 17:55:57.114893 scan_static_bus for USB2 port 1
963 17:55:57.121441 scan_static_bus for USB2 port 1 done
964 17:55:57.125205 scan_bus: scanning of bus USB2 port 1 took 9692 usecs
965 17:55:57.128054 USB2 port 6 scanning...
966 17:55:57.131419 scan_static_bus for USB2 port 6
967 17:55:57.134420 scan_static_bus for USB2 port 6 done
968 17:55:57.141093 scan_bus: scanning of bus USB2 port 6 took 9704 usecs
969 17:55:57.141169 USB2 port 9 scanning...
970 17:55:57.145016 scan_static_bus for USB2 port 9
971 17:55:57.151123 scan_static_bus for USB2 port 9 done
972 17:55:57.154723 scan_bus: scanning of bus USB2 port 9 took 9690 usecs
973 17:55:57.157964 USB3 port 0 scanning...
974 17:55:57.160971 scan_static_bus for USB3 port 0
975 17:55:57.164211 scan_static_bus for USB3 port 0 done
976 17:55:57.171000 scan_bus: scanning of bus USB3 port 0 took 9696 usecs
977 17:55:57.171085 USB3 port 1 scanning...
978 17:55:57.174856 scan_static_bus for USB3 port 1
979 17:55:57.181255 scan_static_bus for USB3 port 1 done
980 17:55:57.184573 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
981 17:55:57.187730 USB3 port 2 scanning...
982 17:55:57.191192 scan_static_bus for USB3 port 2
983 17:55:57.194481 scan_static_bus for USB3 port 2 done
984 17:55:57.201085 scan_bus: scanning of bus USB3 port 2 took 9692 usecs
985 17:55:57.201177 USB3 port 3 scanning...
986 17:55:57.204664 scan_static_bus for USB3 port 3
987 17:55:57.211403 scan_static_bus for USB3 port 3 done
988 17:55:57.214420 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
989 17:55:57.217951 scan_static_bus for USB0 port 0 done
990 17:55:57.224471 scan_bus: scanning of bus USB0 port 0 took 155388 usecs
991 17:55:57.228126 scan_static_bus for PCI: 00:14.0 done
992 17:55:57.234275 scan_bus: scanning of bus PCI: 00:14.0 took 173058 usecs
993 17:55:57.237610 PCI: 00:15.0 scanning...
994 17:55:57.241000 scan_generic_bus for PCI: 00:15.0
995 17:55:57.244347 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
996 17:55:57.247459 scan_generic_bus for PCI: 00:15.0 done
997 17:55:57.254730 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
998 17:55:57.257335 PCI: 00:15.1 scanning...
999 17:55:57.260829 scan_generic_bus for PCI: 00:15.1
1000 17:55:57.264008 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1001 17:55:57.267055 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1002 17:55:57.270410 scan_generic_bus for PCI: 00:15.1 done
1003 17:55:57.277738 scan_bus: scanning of bus PCI: 00:15.1 took 18589 usecs
1004 17:55:57.280588 PCI: 00:19.0 scanning...
1005 17:55:57.283699 scan_generic_bus for PCI: 00:19.0
1006 17:55:57.287144 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1007 17:55:57.293688 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1008 17:55:57.297028 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1009 17:55:57.300523 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1010 17:55:57.303496 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1011 17:55:57.306998 scan_generic_bus for PCI: 00:19.0 done
1012 17:55:57.313869 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
1013 17:55:57.316882 PCI: 00:1d.0 scanning...
1014 17:55:57.320295 do_pci_scan_bridge for PCI: 00:1d.0
1015 17:55:57.323478 PCI: pci_scan_bus for bus 01
1016 17:55:57.326901 PCI: 01:00.0 [1c5c/1327] enabled
1017 17:55:57.329984 Enabling Common Clock Configuration
1018 17:55:57.333197 L1 Sub-State supported from root port 29
1019 17:55:57.336737 L1 Sub-State Support = 0xf
1020 17:55:57.340205 CommonModeRestoreTime = 0x28
1021 17:55:57.343160 Power On Value = 0x16, Power On Scale = 0x0
1022 17:55:57.346427 ASPM: Enabled L1
1023 17:55:57.353280 scan_bus: scanning of bus PCI: 00:1d.0 took 32798 usecs
1024 17:55:57.353364 PCI: 00:1e.2 scanning...
1025 17:55:57.356538 scan_generic_bus for PCI: 00:1e.2
1026 17:55:57.363188 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1027 17:55:57.366212 scan_generic_bus for PCI: 00:1e.2 done
1028 17:55:57.372872 scan_bus: scanning of bus PCI: 00:1e.2 took 14005 usecs
1029 17:55:57.372955 PCI: 00:1e.3 scanning...
1030 17:55:57.376518 scan_generic_bus for PCI: 00:1e.3
1031 17:55:57.383108 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1032 17:55:57.386698 scan_generic_bus for PCI: 00:1e.3 done
1033 17:55:57.390057 scan_bus: scanning of bus PCI: 00:1e.3 took 14012 usecs
1034 17:55:57.393363 PCI: 00:1f.0 scanning...
1035 17:55:57.396176 scan_static_bus for PCI: 00:1f.0
1036 17:55:57.399994 PNP: 0c09.0 enabled
1037 17:55:57.403540 scan_static_bus for PCI: 00:1f.0 done
1038 17:55:57.409718 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1039 17:55:57.409800 PCI: 00:1f.3 scanning...
1040 17:55:57.416372 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1041 17:55:57.419819 PCI: 00:1f.4 scanning...
1042 17:55:57.423034 scan_generic_bus for PCI: 00:1f.4
1043 17:55:57.426011 scan_generic_bus for PCI: 00:1f.4 done
1044 17:55:57.433199 scan_bus: scanning of bus PCI: 00:1f.4 took 10196 usecs
1045 17:55:57.435954 PCI: 00:1f.5 scanning...
1046 17:55:57.439370 scan_generic_bus for PCI: 00:1f.5
1047 17:55:57.443085 scan_generic_bus for PCI: 00:1f.5 done
1048 17:55:57.449574 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1049 17:55:57.452416 scan_bus: scanning of bus DOMAIN: 0000 took 605102 usecs
1050 17:55:57.456157 scan_static_bus for Root Device done
1051 17:55:57.462412 scan_bus: scanning of bus Root Device took 625018 usecs
1052 17:55:57.462500 done
1053 17:55:57.466017 Chrome EC: UHEPI supported
1054 17:55:57.472438 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1055 17:55:57.479291 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1056 17:55:57.485771 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1057 17:55:57.492314 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1058 17:55:57.495931 SPI flash protection: WPSW=0 SRP0=0
1059 17:55:57.502479 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1060 17:55:57.505728 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
1061 17:55:57.508604 found VGA at PCI: 00:02.0
1062 17:55:57.512868 Setting up VGA for PCI: 00:02.0
1063 17:55:57.515405 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1064 17:55:57.522536 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1065 17:55:57.525483 Allocating resources...
1066 17:55:57.525708 Reading resources...
1067 17:55:57.532461 Root Device read_resources bus 0 link: 0
1068 17:55:57.535284 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1069 17:55:57.542029 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1070 17:55:57.545747 DOMAIN: 0000 read_resources bus 0 link: 0
1071 17:55:57.552155 PCI: 00:14.0 read_resources bus 0 link: 0
1072 17:55:57.555641 USB0 port 0 read_resources bus 0 link: 0
1073 17:55:57.563302 USB0 port 0 read_resources bus 0 link: 0 done
1074 17:55:57.566728 PCI: 00:14.0 read_resources bus 0 link: 0 done
1075 17:55:57.574546 PCI: 00:15.0 read_resources bus 1 link: 0
1076 17:55:57.577320 PCI: 00:15.0 read_resources bus 1 link: 0 done
1077 17:55:57.584217 PCI: 00:15.1 read_resources bus 2 link: 0
1078 17:55:57.587375 PCI: 00:15.1 read_resources bus 2 link: 0 done
1079 17:55:57.595197 PCI: 00:19.0 read_resources bus 3 link: 0
1080 17:55:57.601472 PCI: 00:19.0 read_resources bus 3 link: 0 done
1081 17:55:57.605140 PCI: 00:1d.0 read_resources bus 1 link: 0
1082 17:55:57.611718 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1083 17:55:57.614831 PCI: 00:1e.2 read_resources bus 4 link: 0
1084 17:55:57.621698 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1085 17:55:57.625166 PCI: 00:1e.3 read_resources bus 5 link: 0
1086 17:55:57.631683 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1087 17:55:57.635109 PCI: 00:1f.0 read_resources bus 0 link: 0
1088 17:55:57.641790 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1089 17:55:57.644815 DOMAIN: 0000 read_resources bus 0 link: 0 done
1090 17:55:57.652115 Root Device read_resources bus 0 link: 0 done
1091 17:55:57.655168 Done reading resources.
1092 17:55:57.658591 Show resources in subtree (Root Device)...After reading.
1093 17:55:57.665781 Root Device child on link 0 CPU_CLUSTER: 0
1094 17:55:57.669312 CPU_CLUSTER: 0 child on link 0 APIC: 00
1095 17:55:57.669831 APIC: 00
1096 17:55:57.671722 APIC: 02
1097 17:55:57.672146 APIC: 01
1098 17:55:57.672480 APIC: 03
1099 17:55:57.675080 APIC: 07
1100 17:55:57.675516 APIC: 06
1101 17:55:57.678426 APIC: 04
1102 17:55:57.678892 APIC: 05
1103 17:55:57.682077 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1104 17:55:57.738325 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1105 17:55:57.738966 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1106 17:55:57.739763 PCI: 00:00.0
1107 17:55:57.740225 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1108 17:55:57.740652 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1109 17:55:57.741018 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1110 17:55:57.744338 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1111 17:55:57.750955 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1112 17:55:57.760941 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1113 17:55:57.770883 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1114 17:55:57.777580 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1115 17:55:57.787311 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1116 17:55:57.797875 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1117 17:55:57.807196 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1118 17:55:57.817002 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1119 17:55:57.827403 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1120 17:55:57.837086 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1121 17:55:57.843981 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1122 17:55:57.853723 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1123 17:55:57.854289 PCI: 00:02.0
1124 17:55:57.867006 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1125 17:55:57.876760 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1126 17:55:57.883214 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1127 17:55:57.886839 PCI: 00:04.0
1128 17:55:57.887400 PCI: 00:08.0
1129 17:55:57.896657 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1130 17:55:57.899880 PCI: 00:12.0
1131 17:55:57.910620 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 17:55:57.913475 PCI: 00:14.0 child on link 0 USB0 port 0
1133 17:55:57.922742 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1134 17:55:57.926213 USB0 port 0 child on link 0 USB2 port 0
1135 17:55:57.929699 USB2 port 0
1136 17:55:57.930253 USB2 port 1
1137 17:55:57.933222 USB2 port 2
1138 17:55:57.933788 USB2 port 3
1139 17:55:57.936688 USB2 port 5
1140 17:55:57.939755 USB2 port 6
1141 17:55:57.940224 USB2 port 9
1142 17:55:57.942715 USB3 port 0
1143 17:55:57.943196 USB3 port 1
1144 17:55:57.946187 USB3 port 2
1145 17:55:57.946685 USB3 port 3
1146 17:55:57.950406 USB3 port 4
1147 17:55:57.950957 PCI: 00:14.2
1148 17:55:57.959469 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1149 17:55:57.969855 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1150 17:55:57.972853 PCI: 00:14.3
1151 17:55:57.983163 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1152 17:55:57.986279 PCI: 00:15.0 child on link 0 I2C: 01:15
1153 17:55:57.995705 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1154 17:55:57.996295 I2C: 01:15
1155 17:55:58.002621 PCI: 00:15.1 child on link 0 I2C: 02:5d
1156 17:55:58.012753 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 17:55:58.013319 I2C: 02:5d
1158 17:55:58.015822 GENERIC: 0.0
1159 17:55:58.016286 PCI: 00:16.0
1160 17:55:58.025738 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 17:55:58.029053 PCI: 00:17.0
1162 17:55:58.039130 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1163 17:55:58.046208 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1164 17:55:58.055820 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1165 17:55:58.063197 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1166 17:55:58.071959 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1167 17:55:58.078832 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1168 17:55:58.085855 PCI: 00:19.0 child on link 0 I2C: 03:1a
1169 17:55:58.095696 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1170 17:55:58.096264 I2C: 03:1a
1171 17:55:58.098504 I2C: 03:38
1172 17:55:58.098999 I2C: 03:39
1173 17:55:58.102218 I2C: 03:3a
1174 17:55:58.102818 I2C: 03:3b
1175 17:55:58.105964 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1176 17:55:58.115264 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1177 17:55:58.125302 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1178 17:55:58.135195 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1179 17:55:58.135766 PCI: 01:00.0
1180 17:55:58.145971 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1181 17:55:58.148878 PCI: 00:1e.0
1182 17:55:58.158333 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1183 17:55:58.168490 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1184 17:55:58.171333 PCI: 00:1e.2 child on link 0 SPI: 00
1185 17:55:58.181487 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1186 17:55:58.185215 SPI: 00
1187 17:55:58.188244 PCI: 00:1e.3 child on link 0 SPI: 01
1188 17:55:58.198557 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1189 17:55:58.199128 SPI: 01
1190 17:55:58.204994 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1191 17:55:58.211594 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1192 17:55:58.221636 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1193 17:55:58.222187 PNP: 0c09.0
1194 17:55:58.231284 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1195 17:55:58.234844 PCI: 00:1f.3
1196 17:55:58.244645 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1197 17:55:58.254393 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1198 17:55:58.254915 PCI: 00:1f.4
1199 17:55:58.264449 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1200 17:55:58.274123 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1201 17:55:58.274584 PCI: 00:1f.5
1202 17:55:58.284065 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1203 17:55:58.290856 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1204 17:55:58.297222 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1205 17:55:58.304114 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1206 17:55:58.307287 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1207 17:55:58.310999 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1208 17:55:58.313960 PCI: 00:17.0 18 * [0x60 - 0x67] io
1209 17:55:58.317614 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1210 17:55:58.324362 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1211 17:55:58.330654 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1212 17:55:58.340937 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1213 17:55:58.347545 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1214 17:55:58.354148 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1215 17:55:58.357135 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1216 17:55:58.367544 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1217 17:55:58.370401 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1218 17:55:58.377029 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1219 17:55:58.380589 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1220 17:55:58.386862 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1221 17:55:58.390422 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1222 17:55:58.397085 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1223 17:55:58.400747 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1224 17:55:58.407129 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1225 17:55:58.410360 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1226 17:55:58.413660 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1227 17:55:58.420014 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1228 17:55:58.423325 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1229 17:55:58.430252 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1230 17:55:58.433536 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1231 17:55:58.439982 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1232 17:55:58.443276 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1233 17:55:58.450058 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1234 17:55:58.453722 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1235 17:55:58.460577 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1236 17:55:58.463119 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1237 17:55:58.469922 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1238 17:55:58.473252 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1239 17:55:58.480384 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1240 17:55:58.486937 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1241 17:55:58.489627 avoid_fixed_resources: DOMAIN: 0000
1242 17:55:58.497113 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1243 17:55:58.503113 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1244 17:55:58.509863 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1245 17:55:58.516760 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1246 17:55:58.526298 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1247 17:55:58.532981 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1248 17:55:58.539963 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1249 17:55:58.549683 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 17:55:58.556109 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1251 17:55:58.562701 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1252 17:55:58.569300 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1253 17:55:58.579731 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1254 17:55:58.580297 Setting resources...
1255 17:55:58.585971 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1256 17:55:58.589031 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1257 17:55:58.595909 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1258 17:55:58.599485 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1259 17:55:58.602507 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1260 17:55:58.609364 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1261 17:55:58.616289 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1262 17:55:58.622067 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1263 17:55:58.629153 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1264 17:55:58.635536 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1265 17:55:58.639225 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1266 17:55:58.645520 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1267 17:55:58.648799 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1268 17:55:58.655278 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1269 17:55:58.658751 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1270 17:55:58.662175 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1271 17:55:58.668902 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1272 17:55:58.672044 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1273 17:55:58.678721 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1274 17:55:58.682204 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1275 17:55:58.688155 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1276 17:55:58.692179 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1277 17:55:58.698152 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1278 17:55:58.701933 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1279 17:55:58.708224 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1280 17:55:58.712130 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1281 17:55:58.718816 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1282 17:55:58.721467 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1283 17:55:58.728277 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1284 17:55:58.731601 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1285 17:55:58.734730 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1286 17:55:58.741400 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1287 17:55:58.747978 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1288 17:55:58.754731 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1289 17:55:58.764591 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1290 17:55:58.771906 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1291 17:55:58.774848 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1292 17:55:58.784686 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1293 17:55:58.787909 Root Device assign_resources, bus 0 link: 0
1294 17:55:58.791101 DOMAIN: 0000 assign_resources, bus 0 link: 0
1295 17:55:58.801041 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1296 17:55:58.808024 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1297 17:55:58.817922 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1298 17:55:58.824698 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1299 17:55:58.834454 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1300 17:55:58.841182 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1301 17:55:58.847277 PCI: 00:14.0 assign_resources, bus 0 link: 0
1302 17:55:58.850671 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 17:55:58.860689 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1304 17:55:58.868024 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1305 17:55:58.874040 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1306 17:55:58.884503 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1307 17:55:58.887827 PCI: 00:15.0 assign_resources, bus 1 link: 0
1308 17:55:58.894491 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 17:55:58.900563 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1310 17:55:58.907433 PCI: 00:15.1 assign_resources, bus 2 link: 0
1311 17:55:58.911974 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 17:55:58.917522 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1313 17:55:58.927933 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1314 17:55:58.934891 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1315 17:55:58.941175 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1316 17:55:58.951077 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1317 17:55:58.957768 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1318 17:55:58.964102 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1319 17:55:58.974876 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1320 17:55:58.977944 PCI: 00:19.0 assign_resources, bus 3 link: 0
1321 17:55:58.984787 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 17:55:58.991268 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1323 17:55:59.001195 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1324 17:55:59.010906 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1325 17:55:59.014279 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1326 17:55:59.020483 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1327 17:55:59.027545 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1328 17:55:59.033995 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1329 17:55:59.044385 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1330 17:55:59.047055 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1331 17:55:59.053810 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 17:55:59.060238 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1333 17:55:59.067196 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1334 17:55:59.070429 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 17:55:59.073537 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1336 17:55:59.081131 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 17:55:59.083951 LPC: Trying to open IO window from 800 size 1ff
1338 17:55:59.094016 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1339 17:55:59.100588 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1340 17:55:59.110399 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1341 17:55:59.117091 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1342 17:55:59.123888 DOMAIN: 0000 assign_resources, bus 0 link: 0
1343 17:55:59.126705 Root Device assign_resources, bus 0 link: 0
1344 17:55:59.130121 Done setting resources.
1345 17:55:59.136909 Show resources in subtree (Root Device)...After assigning values.
1346 17:55:59.140242 Root Device child on link 0 CPU_CLUSTER: 0
1347 17:55:59.143979 CPU_CLUSTER: 0 child on link 0 APIC: 00
1348 17:55:59.146733 APIC: 00
1349 17:55:59.147196 APIC: 02
1350 17:55:59.147556 APIC: 01
1351 17:55:59.150602 APIC: 03
1352 17:55:59.151206 APIC: 07
1353 17:55:59.153436 APIC: 06
1354 17:55:59.153896 APIC: 04
1355 17:55:59.154259 APIC: 05
1356 17:55:59.160098 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1357 17:55:59.169856 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1358 17:55:59.179579 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1359 17:55:59.183090 PCI: 00:00.0
1360 17:55:59.189608 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1361 17:55:59.199699 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1362 17:55:59.209422 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1363 17:55:59.219485 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1364 17:55:59.229304 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1365 17:55:59.239244 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1366 17:55:59.245776 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1367 17:55:59.256002 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1368 17:55:59.265774 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1369 17:55:59.275500 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1370 17:55:59.285534 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1371 17:55:59.295662 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1372 17:55:59.302046 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1373 17:55:59.312079 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1374 17:55:59.322608 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1375 17:55:59.331636 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1376 17:55:59.332107 PCI: 00:02.0
1377 17:55:59.344917 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1378 17:55:59.354838 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1379 17:55:59.364743 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1380 17:55:59.365303 PCI: 00:04.0
1381 17:55:59.367866 PCI: 00:08.0
1382 17:55:59.377925 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1383 17:55:59.378506 PCI: 00:12.0
1384 17:55:59.388217 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1385 17:55:59.394450 PCI: 00:14.0 child on link 0 USB0 port 0
1386 17:55:59.403951 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1387 17:55:59.407825 USB0 port 0 child on link 0 USB2 port 0
1388 17:55:59.410589 USB2 port 0
1389 17:55:59.411083 USB2 port 1
1390 17:55:59.414143 USB2 port 2
1391 17:55:59.414783 USB2 port 3
1392 17:55:59.417820 USB2 port 5
1393 17:55:59.418377 USB2 port 6
1394 17:55:59.421206 USB2 port 9
1395 17:55:59.424006 USB3 port 0
1396 17:55:59.424474 USB3 port 1
1397 17:55:59.427449 USB3 port 2
1398 17:55:59.427912 USB3 port 3
1399 17:55:59.430606 USB3 port 4
1400 17:55:59.431070 PCI: 00:14.2
1401 17:55:59.441301 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1402 17:55:59.450721 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1403 17:55:59.453452 PCI: 00:14.3
1404 17:55:59.463373 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1405 17:55:59.467183 PCI: 00:15.0 child on link 0 I2C: 01:15
1406 17:55:59.477265 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1407 17:55:59.479986 I2C: 01:15
1408 17:55:59.483499 PCI: 00:15.1 child on link 0 I2C: 02:5d
1409 17:55:59.493885 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1410 17:55:59.496299 I2C: 02:5d
1411 17:55:59.496861 GENERIC: 0.0
1412 17:55:59.499782 PCI: 00:16.0
1413 17:55:59.509870 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1414 17:55:59.513022 PCI: 00:17.0
1415 17:55:59.523059 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1416 17:55:59.532869 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1417 17:55:59.539519 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1418 17:55:59.549280 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1419 17:55:59.559533 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1420 17:55:59.569601 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1421 17:55:59.572507 PCI: 00:19.0 child on link 0 I2C: 03:1a
1422 17:55:59.582316 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1423 17:55:59.585691 I2C: 03:1a
1424 17:55:59.586111 I2C: 03:38
1425 17:55:59.589172 I2C: 03:39
1426 17:55:59.589594 I2C: 03:3a
1427 17:55:59.592603 I2C: 03:3b
1428 17:55:59.595745 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1429 17:55:59.605703 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 17:55:59.615371 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 17:55:59.625292 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1432 17:55:59.629263 PCI: 01:00.0
1433 17:55:59.638628 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1434 17:55:59.639059 PCI: 00:1e.0
1435 17:55:59.651953 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1436 17:55:59.661955 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1437 17:55:59.664732 PCI: 00:1e.2 child on link 0 SPI: 00
1438 17:55:59.674567 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1439 17:55:59.678078 SPI: 00
1440 17:55:59.681131 PCI: 00:1e.3 child on link 0 SPI: 01
1441 17:55:59.691344 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1442 17:55:59.691774 SPI: 01
1443 17:55:59.698129 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1444 17:55:59.704722 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1445 17:55:59.714585 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1446 17:55:59.715164 PNP: 0c09.0
1447 17:55:59.724347 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1448 17:55:59.727668 PCI: 00:1f.3
1449 17:55:59.737608 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1450 17:55:59.747602 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1451 17:55:59.748260 PCI: 00:1f.4
1452 17:55:59.757303 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1453 17:55:59.767813 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1454 17:55:59.770947 PCI: 00:1f.5
1455 17:55:59.780327 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1456 17:55:59.784369 Done allocating resources.
1457 17:55:59.787739 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1458 17:55:59.790387 Enabling resources...
1459 17:55:59.793942 PCI: 00:00.0 subsystem <- 8086/9b61
1460 17:55:59.796980 PCI: 00:00.0 cmd <- 06
1461 17:55:59.800459 PCI: 00:02.0 subsystem <- 8086/9b41
1462 17:55:59.803537 PCI: 00:02.0 cmd <- 03
1463 17:55:59.806929 PCI: 00:08.0 cmd <- 06
1464 17:55:59.811066 PCI: 00:12.0 subsystem <- 8086/02f9
1465 17:55:59.813367 PCI: 00:12.0 cmd <- 02
1466 17:55:59.817140 PCI: 00:14.0 subsystem <- 8086/02ed
1467 17:55:59.820289 PCI: 00:14.0 cmd <- 02
1468 17:55:59.820887 PCI: 00:14.2 cmd <- 02
1469 17:55:59.827111 PCI: 00:14.3 subsystem <- 8086/02f0
1470 17:55:59.827787 PCI: 00:14.3 cmd <- 02
1471 17:55:59.830071 PCI: 00:15.0 subsystem <- 8086/02e8
1472 17:55:59.833340 PCI: 00:15.0 cmd <- 02
1473 17:55:59.836896 PCI: 00:15.1 subsystem <- 8086/02e9
1474 17:55:59.840551 PCI: 00:15.1 cmd <- 02
1475 17:55:59.843562 PCI: 00:16.0 subsystem <- 8086/02e0
1476 17:55:59.846708 PCI: 00:16.0 cmd <- 02
1477 17:55:59.850639 PCI: 00:17.0 subsystem <- 8086/02d3
1478 17:55:59.853471 PCI: 00:17.0 cmd <- 03
1479 17:55:59.856958 PCI: 00:19.0 subsystem <- 8086/02c5
1480 17:55:59.860052 PCI: 00:19.0 cmd <- 02
1481 17:55:59.863406 PCI: 00:1d.0 bridge ctrl <- 0013
1482 17:55:59.866913 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 17:55:59.870186 PCI: 00:1d.0 cmd <- 06
1484 17:55:59.873936 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 17:55:59.876665 PCI: 00:1e.0 cmd <- 06
1486 17:55:59.880086 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 17:55:59.880608 PCI: 00:1e.2 cmd <- 06
1488 17:55:59.886832 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 17:55:59.887387 PCI: 00:1e.3 cmd <- 02
1490 17:55:59.890327 PCI: 00:1f.0 subsystem <- 8086/0284
1491 17:55:59.893372 PCI: 00:1f.0 cmd <- 407
1492 17:55:59.896365 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 17:55:59.900138 PCI: 00:1f.3 cmd <- 02
1494 17:55:59.903223 PCI: 00:1f.4 subsystem <- 8086/02a3
1495 17:55:59.906620 PCI: 00:1f.4 cmd <- 03
1496 17:55:59.909576 PCI: 00:1f.5 subsystem <- 8086/02a4
1497 17:55:59.912754 PCI: 00:1f.5 cmd <- 406
1498 17:55:59.921776 PCI: 01:00.0 cmd <- 02
1499 17:55:59.927261 done.
1500 17:55:59.938262 ME: Version: 14.0.39.1367
1501 17:55:59.945023 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1502 17:55:59.948172 Initializing devices...
1503 17:55:59.948596 Root Device init ...
1504 17:55:59.954479 Chrome EC: Set SMI mask to 0x0000000000000000
1505 17:55:59.957677 Chrome EC: clear events_b mask to 0x0000000000000000
1506 17:55:59.964740 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1507 17:55:59.971066 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1508 17:55:59.977840 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1509 17:55:59.981071 Chrome EC: Set WAKE mask to 0x0000000000000000
1510 17:55:59.984660 Root Device init finished in 35182 usecs
1511 17:55:59.987807 CPU_CLUSTER: 0 init ...
1512 17:55:59.994718 CPU_CLUSTER: 0 init finished in 2450 usecs
1513 17:55:59.998622 PCI: 00:00.0 init ...
1514 17:56:00.002563 CPU TDP: 15 Watts
1515 17:56:00.005492 CPU PL2 = 64 Watts
1516 17:56:00.008673 PCI: 00:00.0 init finished in 7081 usecs
1517 17:56:00.012153 PCI: 00:02.0 init ...
1518 17:56:00.015224 PCI: 00:02.0 init finished in 2253 usecs
1519 17:56:00.018493 PCI: 00:08.0 init ...
1520 17:56:00.022098 PCI: 00:08.0 init finished in 2253 usecs
1521 17:56:00.025925 PCI: 00:12.0 init ...
1522 17:56:00.028744 PCI: 00:12.0 init finished in 2245 usecs
1523 17:56:00.032122 PCI: 00:14.0 init ...
1524 17:56:00.035558 PCI: 00:14.0 init finished in 2253 usecs
1525 17:56:00.038927 PCI: 00:14.2 init ...
1526 17:56:00.042173 PCI: 00:14.2 init finished in 2254 usecs
1527 17:56:00.046468 PCI: 00:14.3 init ...
1528 17:56:00.048438 PCI: 00:14.3 init finished in 2270 usecs
1529 17:56:00.051572 PCI: 00:15.0 init ...
1530 17:56:00.055017 DW I2C bus 0 at 0xd121f000 (400 KHz)
1531 17:56:00.058299 PCI: 00:15.0 init finished in 5973 usecs
1532 17:56:00.061713 PCI: 00:15.1 init ...
1533 17:56:00.064931 DW I2C bus 1 at 0xd1220000 (400 KHz)
1534 17:56:00.068321 PCI: 00:15.1 init finished in 5972 usecs
1535 17:56:00.072437 PCI: 00:16.0 init ...
1536 17:56:00.075380 PCI: 00:16.0 init finished in 2253 usecs
1537 17:56:00.079312 PCI: 00:19.0 init ...
1538 17:56:00.082707 DW I2C bus 4 at 0xd1222000 (400 KHz)
1539 17:56:00.089128 PCI: 00:19.0 init finished in 5980 usecs
1540 17:56:00.089728 PCI: 00:1d.0 init ...
1541 17:56:00.092371 Initializing PCH PCIe bridge.
1542 17:56:00.095497 PCI: 00:1d.0 init finished in 5288 usecs
1543 17:56:00.100982 PCI: 00:1f.0 init ...
1544 17:56:00.104332 IOAPIC: Initializing IOAPIC at 0xfec00000
1545 17:56:00.110437 IOAPIC: Bootstrap Processor Local APIC = 0x00
1546 17:56:00.110937 IOAPIC: ID = 0x02
1547 17:56:00.114095 IOAPIC: Dumping registers
1548 17:56:00.117313 reg 0x0000: 0x02000000
1549 17:56:00.120885 reg 0x0001: 0x00770020
1550 17:56:00.121312 reg 0x0002: 0x00000000
1551 17:56:00.127302 PCI: 00:1f.0 init finished in 23554 usecs
1552 17:56:00.131219 PCI: 00:1f.4 init ...
1553 17:56:00.134216 PCI: 00:1f.4 init finished in 2262 usecs
1554 17:56:00.145003 PCI: 01:00.0 init ...
1555 17:56:00.148729 PCI: 01:00.0 init finished in 2253 usecs
1556 17:56:00.152576 PNP: 0c09.0 init ...
1557 17:56:00.155701 Google Chrome EC uptime: 11.091 seconds
1558 17:56:00.162461 Google Chrome AP resets since EC boot: 0
1559 17:56:00.165686 Google Chrome most recent AP reset causes:
1560 17:56:00.172178 Google Chrome EC reset flags at last EC boot: reset-pin
1561 17:56:00.175675 PNP: 0c09.0 init finished in 20612 usecs
1562 17:56:00.178619 Devices initialized
1563 17:56:00.182800 Show all devs... After init.
1564 17:56:00.183297 Root Device: enabled 1
1565 17:56:00.185639 CPU_CLUSTER: 0: enabled 1
1566 17:56:00.189087 DOMAIN: 0000: enabled 1
1567 17:56:00.189757 APIC: 00: enabled 1
1568 17:56:00.192114 PCI: 00:00.0: enabled 1
1569 17:56:00.195594 PCI: 00:02.0: enabled 1
1570 17:56:00.198971 PCI: 00:04.0: enabled 0
1571 17:56:00.199533 PCI: 00:05.0: enabled 0
1572 17:56:00.202043 PCI: 00:12.0: enabled 1
1573 17:56:00.205398 PCI: 00:12.5: enabled 0
1574 17:56:00.209143 PCI: 00:12.6: enabled 0
1575 17:56:00.209657 PCI: 00:14.0: enabled 1
1576 17:56:00.211964 PCI: 00:14.1: enabled 0
1577 17:56:00.215250 PCI: 00:14.3: enabled 1
1578 17:56:00.215806 PCI: 00:14.5: enabled 0
1579 17:56:00.218903 PCI: 00:15.0: enabled 1
1580 17:56:00.222173 PCI: 00:15.1: enabled 1
1581 17:56:00.225410 PCI: 00:15.2: enabled 0
1582 17:56:00.225894 PCI: 00:15.3: enabled 0
1583 17:56:00.228805 PCI: 00:16.0: enabled 1
1584 17:56:00.232017 PCI: 00:16.1: enabled 0
1585 17:56:00.235170 PCI: 00:16.2: enabled 0
1586 17:56:00.235573 PCI: 00:16.3: enabled 0
1587 17:56:00.238615 PCI: 00:16.4: enabled 0
1588 17:56:00.241870 PCI: 00:16.5: enabled 0
1589 17:56:00.245142 PCI: 00:17.0: enabled 1
1590 17:56:00.245565 PCI: 00:19.0: enabled 1
1591 17:56:00.248209 PCI: 00:19.1: enabled 0
1592 17:56:00.251521 PCI: 00:19.2: enabled 0
1593 17:56:00.255279 PCI: 00:1a.0: enabled 0
1594 17:56:00.255717 PCI: 00:1c.0: enabled 0
1595 17:56:00.258253 PCI: 00:1c.1: enabled 0
1596 17:56:00.261595 PCI: 00:1c.2: enabled 0
1597 17:56:00.262015 PCI: 00:1c.3: enabled 0
1598 17:56:00.265234 PCI: 00:1c.4: enabled 0
1599 17:56:00.268101 PCI: 00:1c.5: enabled 0
1600 17:56:00.271863 PCI: 00:1c.6: enabled 0
1601 17:56:00.272284 PCI: 00:1c.7: enabled 0
1602 17:56:00.274618 PCI: 00:1d.0: enabled 1
1603 17:56:00.278259 PCI: 00:1d.1: enabled 0
1604 17:56:00.281525 PCI: 00:1d.2: enabled 0
1605 17:56:00.281943 PCI: 00:1d.3: enabled 0
1606 17:56:00.284860 PCI: 00:1d.4: enabled 0
1607 17:56:00.288431 PCI: 00:1d.5: enabled 0
1608 17:56:00.291324 PCI: 00:1e.0: enabled 1
1609 17:56:00.291744 PCI: 00:1e.1: enabled 0
1610 17:56:00.294605 PCI: 00:1e.2: enabled 1
1611 17:56:00.297904 PCI: 00:1e.3: enabled 1
1612 17:56:00.298321 PCI: 00:1f.0: enabled 1
1613 17:56:00.301270 PCI: 00:1f.1: enabled 0
1614 17:56:00.304825 PCI: 00:1f.2: enabled 0
1615 17:56:00.308007 PCI: 00:1f.3: enabled 1
1616 17:56:00.308427 PCI: 00:1f.4: enabled 1
1617 17:56:00.311089 PCI: 00:1f.5: enabled 1
1618 17:56:00.314584 PCI: 00:1f.6: enabled 0
1619 17:56:00.317688 USB0 port 0: enabled 1
1620 17:56:00.318105 I2C: 01:15: enabled 1
1621 17:56:00.321398 I2C: 02:5d: enabled 1
1622 17:56:00.324416 GENERIC: 0.0: enabled 1
1623 17:56:00.324835 I2C: 03:1a: enabled 1
1624 17:56:00.327914 I2C: 03:38: enabled 1
1625 17:56:00.330915 I2C: 03:39: enabled 1
1626 17:56:00.331337 I2C: 03:3a: enabled 1
1627 17:56:00.334370 I2C: 03:3b: enabled 1
1628 17:56:00.337658 PCI: 00:00.0: enabled 1
1629 17:56:00.338052 SPI: 00: enabled 1
1630 17:56:00.340974 SPI: 01: enabled 1
1631 17:56:00.344186 PNP: 0c09.0: enabled 1
1632 17:56:00.344605 USB2 port 0: enabled 1
1633 17:56:00.347512 USB2 port 1: enabled 1
1634 17:56:00.351212 USB2 port 2: enabled 0
1635 17:56:00.354438 USB2 port 3: enabled 0
1636 17:56:00.354906 USB2 port 5: enabled 0
1637 17:56:00.357426 USB2 port 6: enabled 1
1638 17:56:00.360945 USB2 port 9: enabled 1
1639 17:56:00.361328 USB3 port 0: enabled 1
1640 17:56:00.364001 USB3 port 1: enabled 1
1641 17:56:00.367608 USB3 port 2: enabled 1
1642 17:56:00.368083 USB3 port 3: enabled 1
1643 17:56:00.370586 USB3 port 4: enabled 0
1644 17:56:00.374128 APIC: 02: enabled 1
1645 17:56:00.374608 APIC: 01: enabled 1
1646 17:56:00.377551 APIC: 03: enabled 1
1647 17:56:00.380675 APIC: 07: enabled 1
1648 17:56:00.381133 APIC: 06: enabled 1
1649 17:56:00.384042 APIC: 04: enabled 1
1650 17:56:00.387371 APIC: 05: enabled 1
1651 17:56:00.387795 PCI: 00:08.0: enabled 1
1652 17:56:00.390767 PCI: 00:14.2: enabled 1
1653 17:56:00.393660 PCI: 01:00.0: enabled 1
1654 17:56:00.397265 Disabling ACPI via APMC:
1655 17:56:00.401220 done.
1656 17:56:00.403847 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1657 17:56:00.407644 ELOG: NV offset 0xaf0000 size 0x4000
1658 17:56:00.413945 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1659 17:56:00.420851 ELOG: Event(17) added with size 13 at 2023-10-20 17:56:00 UTC
1660 17:56:00.427321 ELOG: Event(92) added with size 9 at 2023-10-20 17:56:00 UTC
1661 17:56:00.434212 ELOG: Event(93) added with size 9 at 2023-10-20 17:56:00 UTC
1662 17:56:00.440672 ELOG: Event(9A) added with size 9 at 2023-10-20 17:56:00 UTC
1663 17:56:00.447512 ELOG: Event(9E) added with size 10 at 2023-10-20 17:56:00 UTC
1664 17:56:00.453906 ELOG: Event(9F) added with size 14 at 2023-10-20 17:56:00 UTC
1665 17:56:00.457072 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1666 17:56:00.464773 ELOG: Event(A1) added with size 10 at 2023-10-20 17:56:00 UTC
1667 17:56:00.474616 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1668 17:56:00.481181 ELOG: Event(A0) added with size 9 at 2023-10-20 17:56:00 UTC
1669 17:56:00.484121 elog_add_boot_reason: Logged dev mode boot
1670 17:56:00.487833 Finalize devices...
1671 17:56:00.488263 PCI: 00:17.0 final
1672 17:56:00.490929 Devices finalized
1673 17:56:00.494014 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1674 17:56:00.501440 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1675 17:56:00.504230 ME: HFSTS1 : 0x90000245
1676 17:56:00.507743 ME: HFSTS2 : 0x3B850126
1677 17:56:00.514287 ME: HFSTS3 : 0x00000020
1678 17:56:00.517480 ME: HFSTS4 : 0x00004800
1679 17:56:00.520746 ME: HFSTS5 : 0x00000000
1680 17:56:00.524105 ME: HFSTS6 : 0x40400006
1681 17:56:00.527549 ME: Manufacturing Mode : NO
1682 17:56:00.530597 ME: FW Partition Table : OK
1683 17:56:00.534071 ME: Bringup Loader Failure : NO
1684 17:56:00.538059 ME: Firmware Init Complete : YES
1685 17:56:00.540462 ME: Boot Options Present : NO
1686 17:56:00.543837 ME: Update In Progress : NO
1687 17:56:00.547078 ME: D0i3 Support : YES
1688 17:56:00.550667 ME: Low Power State Enabled : NO
1689 17:56:00.553442 ME: CPU Replaced : NO
1690 17:56:00.557394 ME: CPU Replacement Valid : YES
1691 17:56:00.560689 ME: Current Working State : 5
1692 17:56:00.563595 ME: Current Operation State : 1
1693 17:56:00.567742 ME: Current Operation Mode : 0
1694 17:56:00.570140 ME: Error Code : 0
1695 17:56:00.573303 ME: CPU Debug Disabled : YES
1696 17:56:00.577160 ME: TXT Support : NO
1697 17:56:00.583819 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1698 17:56:00.590428 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1699 17:56:00.590913 CBFS @ c08000 size 3f8000
1700 17:56:00.597340 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1701 17:56:00.600419 CBFS: Locating 'fallback/dsdt.aml'
1702 17:56:00.603216 CBFS: Found @ offset 10bb80 size 3fa5
1703 17:56:00.610194 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1704 17:56:00.613307 CBFS @ c08000 size 3f8000
1705 17:56:00.620428 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1706 17:56:00.620900 CBFS: Locating 'fallback/slic'
1707 17:56:00.625513 CBFS: 'fallback/slic' not found.
1708 17:56:00.632184 ACPI: Writing ACPI tables at 99b3e000.
1709 17:56:00.632651 ACPI: * FACS
1710 17:56:00.635617 ACPI: * DSDT
1711 17:56:00.638449 Ramoops buffer: 0x100000@0x99a3d000.
1712 17:56:00.642183 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1713 17:56:00.648915 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1714 17:56:00.652203 Google Chrome EC: version:
1715 17:56:00.655342 ro: helios_v2.0.2659-56403530b
1716 17:56:00.658625 rw: helios_v2.0.2849-c41de27e7d
1717 17:56:00.659093 running image: 1
1718 17:56:00.663142 ACPI: * FADT
1719 17:56:00.663717 SCI is IRQ9
1720 17:56:00.669355 ACPI: added table 1/32, length now 40
1721 17:56:00.669911 ACPI: * SSDT
1722 17:56:00.672748 Found 1 CPU(s) with 8 core(s) each.
1723 17:56:00.675905 Error: Could not locate 'wifi_sar' in VPD.
1724 17:56:00.682186 Checking CBFS for default SAR values
1725 17:56:00.685912 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 17:56:00.689469 CBFS @ c08000 size 3f8000
1727 17:56:00.695742 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 17:56:00.699077 CBFS: Locating 'wifi_sar_defaults.hex'
1729 17:56:00.702515 CBFS: Found @ offset 5fac0 size 77
1730 17:56:00.705747 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1731 17:56:00.712436 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1732 17:56:00.716195 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1733 17:56:00.722250 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1734 17:56:00.725486 failed to find key in VPD: dsm_calib_r0_0
1735 17:56:00.735712 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1736 17:56:00.738693 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1737 17:56:00.742347 failed to find key in VPD: dsm_calib_r0_1
1738 17:56:00.752387 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1739 17:56:00.758873 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1740 17:56:00.761959 failed to find key in VPD: dsm_calib_r0_2
1741 17:56:00.771725 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1742 17:56:00.775180 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1743 17:56:00.781733 failed to find key in VPD: dsm_calib_r0_3
1744 17:56:00.788204 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1745 17:56:00.794996 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1746 17:56:00.798013 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1747 17:56:00.801486 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1748 17:56:00.806075 EC returned error result code 1
1749 17:56:00.809416 EC returned error result code 1
1750 17:56:00.812983 EC returned error result code 1
1751 17:56:00.819597 PS2K: Bad resp from EC. Vivaldi disabled!
1752 17:56:00.825862 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1753 17:56:00.829759 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1754 17:56:00.836011 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1755 17:56:00.839515 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1756 17:56:00.846056 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1757 17:56:00.852460 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1758 17:56:00.858800 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1759 17:56:00.862622 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1760 17:56:00.869346 ACPI: added table 2/32, length now 44
1761 17:56:00.869870 ACPI: * MCFG
1762 17:56:00.872146 ACPI: added table 3/32, length now 48
1763 17:56:00.876421 ACPI: * TPM2
1764 17:56:00.878878 TPM2 log created at 99a2d000
1765 17:56:00.883184 ACPI: added table 4/32, length now 52
1766 17:56:00.883750 ACPI: * MADT
1767 17:56:00.885626 SCI is IRQ9
1768 17:56:00.889105 ACPI: added table 5/32, length now 56
1769 17:56:00.889663 current = 99b43ac0
1770 17:56:00.892129 ACPI: * DMAR
1771 17:56:00.895725 ACPI: added table 6/32, length now 60
1772 17:56:00.899094 ACPI: * IGD OpRegion
1773 17:56:00.902097 GMA: Found VBT in CBFS
1774 17:56:00.902727 GMA: Found valid VBT in CBFS
1775 17:56:00.909407 ACPI: added table 7/32, length now 64
1776 17:56:00.910129 ACPI: * HPET
1777 17:56:00.912095 ACPI: added table 8/32, length now 68
1778 17:56:00.915425 ACPI: done.
1779 17:56:00.915984 ACPI tables: 31744 bytes.
1780 17:56:00.918450 smbios_write_tables: 99a2c000
1781 17:56:00.921833 EC returned error result code 3
1782 17:56:00.925591 Couldn't obtain OEM name from CBI
1783 17:56:00.929061 Create SMBIOS type 17
1784 17:56:00.932473 PCI: 00:00.0 (Intel Cannonlake)
1785 17:56:00.935516 PCI: 00:14.3 (Intel WiFi)
1786 17:56:00.939065 SMBIOS tables: 939 bytes.
1787 17:56:00.942242 Writing table forward entry at 0x00000500
1788 17:56:00.949190 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1789 17:56:00.952854 Writing coreboot table at 0x99b62000
1790 17:56:00.958823 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1791 17:56:00.962704 1. 0000000000001000-000000000009ffff: RAM
1792 17:56:00.965321 2. 00000000000a0000-00000000000fffff: RESERVED
1793 17:56:00.972215 3. 0000000000100000-0000000099a2bfff: RAM
1794 17:56:00.979116 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1795 17:56:00.981950 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1796 17:56:00.988312 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1797 17:56:00.991957 7. 000000009a000000-000000009f7fffff: RESERVED
1798 17:56:00.998913 8. 00000000e0000000-00000000efffffff: RESERVED
1799 17:56:01.001559 9. 00000000fc000000-00000000fc000fff: RESERVED
1800 17:56:01.008136 10. 00000000fe000000-00000000fe00ffff: RESERVED
1801 17:56:01.012467 11. 00000000fed10000-00000000fed17fff: RESERVED
1802 17:56:01.014832 12. 00000000fed80000-00000000fed83fff: RESERVED
1803 17:56:01.021512 13. 00000000fed90000-00000000fed91fff: RESERVED
1804 17:56:01.025368 14. 00000000feda0000-00000000feda1fff: RESERVED
1805 17:56:01.031221 15. 0000000100000000-000000045e7fffff: RAM
1806 17:56:01.034703 Graphics framebuffer located at 0xc0000000
1807 17:56:01.038214 Passing 5 GPIOs to payload:
1808 17:56:01.041408 NAME | PORT | POLARITY | VALUE
1809 17:56:01.048122 write protect | undefined | high | low
1810 17:56:01.054379 lid | undefined | high | high
1811 17:56:01.058214 power | undefined | high | low
1812 17:56:01.064395 oprom | undefined | high | low
1813 17:56:01.067938 EC in RW | 0x000000cb | high | low
1814 17:56:01.070904 Board ID: 4
1815 17:56:01.074792 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1816 17:56:01.078334 CBFS @ c08000 size 3f8000
1817 17:56:01.084393 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1818 17:56:01.091754 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1819 17:56:01.094352 coreboot table: 1492 bytes.
1820 17:56:01.097335 IMD ROOT 0. 99fff000 00001000
1821 17:56:01.101053 IMD SMALL 1. 99ffe000 00001000
1822 17:56:01.103961 FSP MEMORY 2. 99c4e000 003b0000
1823 17:56:01.107316 CONSOLE 3. 99c2e000 00020000
1824 17:56:01.111152 FMAP 4. 99c2d000 0000054e
1825 17:56:01.114472 TIME STAMP 5. 99c2c000 00000910
1826 17:56:01.117589 VBOOT WORK 6. 99c18000 00014000
1827 17:56:01.120972 MRC DATA 7. 99c16000 00001958
1828 17:56:01.124166 ROMSTG STCK 8. 99c15000 00001000
1829 17:56:01.127393 AFTER CAR 9. 99c0b000 0000a000
1830 17:56:01.130716 RAMSTAGE 10. 99baf000 0005c000
1831 17:56:01.134194 REFCODE 11. 99b7a000 00035000
1832 17:56:01.137426 SMM BACKUP 12. 99b6a000 00010000
1833 17:56:01.140631 COREBOOT 13. 99b62000 00008000
1834 17:56:01.144063 ACPI 14. 99b3e000 00024000
1835 17:56:01.147265 ACPI GNVS 15. 99b3d000 00001000
1836 17:56:01.150344 RAMOOPS 16. 99a3d000 00100000
1837 17:56:01.153688 TPM2 TCGLOG17. 99a2d000 00010000
1838 17:56:01.156803 SMBIOS 18. 99a2c000 00000800
1839 17:56:01.157281 IMD small region:
1840 17:56:01.160493 IMD ROOT 0. 99ffec00 00000400
1841 17:56:01.163687 FSP RUNTIME 1. 99ffebe0 00000004
1842 17:56:01.166746 EC HOSTEVENT 2. 99ffebc0 00000008
1843 17:56:01.170381 POWER STATE 3. 99ffeb80 00000040
1844 17:56:01.177268 ROMSTAGE 4. 99ffeb60 00000004
1845 17:56:01.180636 MEM INFO 5. 99ffe9a0 000001b9
1846 17:56:01.183866 VPD 6. 99ffe920 0000006c
1847 17:56:01.187290 MTRR: Physical address space:
1848 17:56:01.193630 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1849 17:56:01.196823 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1850 17:56:01.203433 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1851 17:56:01.209875 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1852 17:56:01.216014 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1853 17:56:01.222632 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1854 17:56:01.230305 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1855 17:56:01.233043 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 17:56:01.235852 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 17:56:01.242714 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 17:56:01.246047 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 17:56:01.249057 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 17:56:01.252564 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 17:56:01.259146 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 17:56:01.262353 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 17:56:01.265674 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 17:56:01.270045 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 17:56:01.276062 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 17:56:01.279215 call enable_fixed_mtrr()
1867 17:56:01.282609 CPU physical address size: 39 bits
1868 17:56:01.285914 MTRR: default type WB/UC MTRR counts: 6/8.
1869 17:56:01.288991 MTRR: WB selected as default type.
1870 17:56:01.296702 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1871 17:56:01.302588 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1872 17:56:01.308898 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1873 17:56:01.315858 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1874 17:56:01.318344 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1875 17:56:01.325457 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1876 17:56:01.332139 MTRR: Fixed MSR 0x250 0x0606060606060606
1877 17:56:01.335747 MTRR: Fixed MSR 0x258 0x0606060606060606
1878 17:56:01.339243 MTRR: Fixed MSR 0x259 0x0000000000000000
1879 17:56:01.342473 MTRR: Fixed MSR 0x268 0x0606060606060606
1880 17:56:01.348528 MTRR: Fixed MSR 0x269 0x0606060606060606
1881 17:56:01.351875 MTRR: Fixed MSR 0x26a 0x0606060606060606
1882 17:56:01.355270 MTRR: Fixed MSR 0x26b 0x0606060606060606
1883 17:56:01.358806 MTRR: Fixed MSR 0x26c 0x0606060606060606
1884 17:56:01.364831 MTRR: Fixed MSR 0x26d 0x0606060606060606
1885 17:56:01.368515 MTRR: Fixed MSR 0x26e 0x0606060606060606
1886 17:56:01.371843 MTRR: Fixed MSR 0x26f 0x0606060606060606
1887 17:56:01.372412
1888 17:56:01.375087 MTRR check
1889 17:56:01.375549 Fixed MTRRs : Enabled
1890 17:56:01.378498 Variable MTRRs: Enabled
1891 17:56:01.379111
1892 17:56:01.381669 call enable_fixed_mtrr()
1893 17:56:01.388509 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 17:56:01.391721 CPU physical address size: 39 bits
1895 17:56:01.395123 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 17:56:01.398300 MTRR: Fixed MSR 0x250 0x0606060606060606
1897 17:56:01.405100 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 17:56:01.408064 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 17:56:01.411492 MTRR: Fixed MSR 0x259 0x0000000000000000
1900 17:56:01.415105 MTRR: Fixed MSR 0x268 0x0606060606060606
1901 17:56:01.421779 MTRR: Fixed MSR 0x269 0x0606060606060606
1902 17:56:01.424366 MTRR: Fixed MSR 0x26a 0x0606060606060606
1903 17:56:01.427939 MTRR: Fixed MSR 0x26b 0x0606060606060606
1904 17:56:01.431272 MTRR: Fixed MSR 0x26c 0x0606060606060606
1905 17:56:01.437644 MTRR: Fixed MSR 0x26d 0x0606060606060606
1906 17:56:01.441183 MTRR: Fixed MSR 0x26e 0x0606060606060606
1907 17:56:01.444275 MTRR: Fixed MSR 0x26f 0x0606060606060606
1908 17:56:01.447971 MTRR: Fixed MSR 0x258 0x0606060606060606
1909 17:56:01.451204 call enable_fixed_mtrr()
1910 17:56:01.454392 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 17:56:01.461061 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 17:56:01.464789 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 17:56:01.467669 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 17:56:01.470597 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 17:56:01.477723 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 17:56:01.480701 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 17:56:01.484409 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 17:56:01.487249 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 17:56:01.490994 CPU physical address size: 39 bits
1920 17:56:01.494679 call enable_fixed_mtrr()
1921 17:56:01.497796 MTRR: Fixed MSR 0x250 0x0606060606060606
1922 17:56:01.504286 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 17:56:01.507692 MTRR: Fixed MSR 0x258 0x0606060606060606
1924 17:56:01.511232 MTRR: Fixed MSR 0x259 0x0000000000000000
1925 17:56:01.514033 MTRR: Fixed MSR 0x268 0x0606060606060606
1926 17:56:01.520723 MTRR: Fixed MSR 0x269 0x0606060606060606
1927 17:56:01.524786 MTRR: Fixed MSR 0x26a 0x0606060606060606
1928 17:56:01.527723 MTRR: Fixed MSR 0x26b 0x0606060606060606
1929 17:56:01.531284 MTRR: Fixed MSR 0x26c 0x0606060606060606
1930 17:56:01.537036 MTRR: Fixed MSR 0x26d 0x0606060606060606
1931 17:56:01.540406 MTRR: Fixed MSR 0x26e 0x0606060606060606
1932 17:56:01.543819 MTRR: Fixed MSR 0x26f 0x0606060606060606
1933 17:56:01.547131 MTRR: Fixed MSR 0x258 0x0606060606060606
1934 17:56:01.550716 call enable_fixed_mtrr()
1935 17:56:01.553870 MTRR: Fixed MSR 0x259 0x0000000000000000
1936 17:56:01.560661 MTRR: Fixed MSR 0x268 0x0606060606060606
1937 17:56:01.564014 MTRR: Fixed MSR 0x269 0x0606060606060606
1938 17:56:01.566688 MTRR: Fixed MSR 0x26a 0x0606060606060606
1939 17:56:01.570652 MTRR: Fixed MSR 0x26b 0x0606060606060606
1940 17:56:01.577797 MTRR: Fixed MSR 0x26c 0x0606060606060606
1941 17:56:01.580472 MTRR: Fixed MSR 0x26d 0x0606060606060606
1942 17:56:01.583473 MTRR: Fixed MSR 0x26e 0x0606060606060606
1943 17:56:01.586974 MTRR: Fixed MSR 0x26f 0x0606060606060606
1944 17:56:01.593472 CPU physical address size: 39 bits
1945 17:56:01.594042 call enable_fixed_mtrr()
1946 17:56:01.596531 CBFS @ c08000 size 3f8000
1947 17:56:01.603442 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1948 17:56:01.606581 CBFS: Locating 'fallback/payload'
1949 17:56:01.609922 CPU physical address size: 39 bits
1950 17:56:01.613081 CPU physical address size: 39 bits
1951 17:56:01.616547 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 17:56:01.623509 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 17:56:01.626040 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 17:56:01.629918 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 17:56:01.632754 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 17:56:01.639139 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 17:56:01.642661 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 17:56:01.646959 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 17:56:01.649572 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 17:56:01.652516 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 17:56:01.659111 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 17:56:01.662774 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 17:56:01.666144 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 17:56:01.672186 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 17:56:01.675383 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 17:56:01.679800 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 17:56:01.682382 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 17:56:01.689141 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 17:56:01.692282 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 17:56:01.695873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 17:56:01.698906 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 17:56:01.702451 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 17:56:01.705393 call enable_fixed_mtrr()
1974 17:56:01.708876 call enable_fixed_mtrr()
1975 17:56:01.711826 CBFS: Found @ offset 1c96c0 size 3f798
1976 17:56:01.715145 CPU physical address size: 39 bits
1977 17:56:01.718847 CPU physical address size: 39 bits
1978 17:56:01.725772 Checking segment from ROM address 0xffdd16f8
1979 17:56:01.728533 Checking segment from ROM address 0xffdd1714
1980 17:56:01.732163 Loading segment from ROM address 0xffdd16f8
1981 17:56:01.735513 code (compression=0)
1982 17:56:01.744957 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1983 17:56:01.751688 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1984 17:56:01.755475 it's not compressed!
1985 17:56:01.847503 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1986 17:56:01.854438 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1987 17:56:01.857411 Loading segment from ROM address 0xffdd1714
1988 17:56:01.861016 Entry Point 0x30000000
1989 17:56:01.863889 Loaded segments
1990 17:56:01.869833 Finalizing chipset.
1991 17:56:01.872696 Finalizing SMM.
1992 17:56:01.876403 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1993 17:56:01.879807 mp_park_aps done after 0 msecs.
1994 17:56:01.885822 Jumping to boot code at 30000000(99b62000)
1995 17:56:01.892876 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1996 17:56:01.893447
1997 17:56:01.894128
1998 17:56:01.894809
1999 17:56:01.895735 Starting depthcharge on Helios...
2000 17:56:01.896197
2001 17:56:01.897387 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2002 17:56:01.897953 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2003 17:56:01.898793 Setting prompt string to ['hatch:']
2004 17:56:01.899479 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2005 17:56:01.906379 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2006 17:56:01.906996
2007 17:56:01.912490 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2008 17:56:01.913040
2009 17:56:01.919400 board_setup: Info: eMMC controller not present; skipping
2010 17:56:01.919867
2011 17:56:01.922552 New NVMe Controller 0x30053ac0 @ 00:1d:00
2012 17:56:01.923131
2013 17:56:01.929085 board_setup: Info: SDHCI controller not present; skipping
2014 17:56:01.929548
2015 17:56:01.935718 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2016 17:56:01.936280
2017 17:56:01.936643 Wipe memory regions:
2018 17:56:01.936980
2019 17:56:01.938847 [0x00000000001000, 0x000000000a0000)
2020 17:56:01.939312
2021 17:56:01.942503 [0x00000000100000, 0x00000030000000)
2022 17:56:02.008347
2023 17:56:02.011571 [0x00000030657430, 0x00000099a2c000)
2024 17:56:02.149016
2025 17:56:02.151630 [0x00000100000000, 0x0000045e800000)
2026 17:56:03.535321
2027 17:56:03.535875 R8152: Initializing
2028 17:56:03.536240
2029 17:56:03.538350 Version 9 (ocp_data = 6010)
2030 17:56:03.543224
2031 17:56:03.543786 R8152: Done initializing
2032 17:56:03.544162
2033 17:56:03.545864 Adding net device
2034 17:56:04.155427
2035 17:56:04.155938 R8152: Initializing
2036 17:56:04.156273
2037 17:56:04.158200 Version 6 (ocp_data = 5c30)
2038 17:56:04.158665
2039 17:56:04.161763 R8152: Done initializing
2040 17:56:04.162179
2041 17:56:04.164890 net_add_device: Attemp to include the same device
2042 17:56:04.168719
2043 17:56:04.176007 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2044 17:56:04.176429
2045 17:56:04.176758
2046 17:56:04.177063
2047 17:56:04.177795 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2049 17:56:04.278956 hatch: tftpboot 192.168.201.1 11831906/tftp-deploy-6cvdqpy5/kernel/bzImage 11831906/tftp-deploy-6cvdqpy5/kernel/cmdline 11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
2050 17:56:04.279604 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2051 17:56:04.280082 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2052 17:56:04.284666 tftpboot 192.168.201.1 11831906/tftp-deploy-6cvdqpy5/kernel/bzIloy-6cvdqpy5/kernel/cmdline 11831906/tftp-deploy-6cvdqpy5/ramdisk/ramdisk.cpio.gz
2053 17:56:04.285244
2054 17:56:04.285609 Waiting for link
2055 17:56:04.485804
2056 17:56:04.486372 done.
2057 17:56:04.486809
2058 17:56:04.487161 MAC: 00:24:32:50:1a:5f
2059 17:56:04.487571
2060 17:56:04.488586 Sending DHCP discover... done.
2061 17:56:04.489050
2062 17:56:04.492360 Waiting for reply... done.
2063 17:56:04.492947
2064 17:56:04.495490 Sending DHCP request... done.
2065 17:56:04.495958
2066 17:56:04.514883 Waiting for reply... done.
2067 17:56:04.515467
2068 17:56:04.515833 My ip is 192.168.201.21
2069 17:56:04.516170
2070 17:56:04.517906 The DHCP server ip is 192.168.201.1
2071 17:56:04.521284
2072 17:56:04.524444 TFTP server IP predefined by user: 192.168.201.1
2073 17:56:04.524915
2074 17:56:04.531128 Bootfile predefined by user: 11831906/tftp-deploy-6cvdqpy5/kernel/bzImage
2075 17:56:04.531701
2076 17:56:04.534717 Sending tftp read request... done.
2077 17:56:04.535291
2078 17:56:04.543826 Waiting for the transfer...
2079 17:56:04.544400
2080 17:56:05.238688 00000000 ################################################################
2081 17:56:05.239558
2082 17:56:05.931000 00080000 ################################################################
2083 17:56:05.931578
2084 17:56:06.650351 00100000 ################################################################
2085 17:56:06.650979
2086 17:56:07.373645 00180000 ################################################################
2087 17:56:07.373815
2088 17:56:08.057713 00200000 ################################################################
2089 17:56:08.058239
2090 17:56:08.738327 00280000 ################################################################
2091 17:56:08.738937
2092 17:56:09.460136 00300000 ################################################################
2093 17:56:09.460738
2094 17:56:10.193907 00380000 ################################################################
2095 17:56:10.194481
2096 17:56:10.904966 00400000 ################################################################
2097 17:56:10.905483
2098 17:56:11.634112 00480000 ################################################################
2099 17:56:11.634690
2100 17:56:12.357568 00500000 ################################################################
2101 17:56:12.358147
2102 17:56:13.058098 00580000 ################################################################
2103 17:56:13.058690
2104 17:56:13.760896 00600000 ################################################################
2105 17:56:13.761485
2106 17:56:14.450355 00680000 ################################################################
2107 17:56:14.450900
2108 17:56:15.143092 00700000 ################################################################
2109 17:56:15.143602
2110 17:56:15.830372 00780000 ################################################################
2111 17:56:15.831005
2112 17:56:15.993704 00800000 ############### done.
2113 17:56:15.994262
2114 17:56:15.997267 The bootfile was 8507280 bytes long.
2115 17:56:15.997834
2116 17:56:16.000249 Sending tftp read request... done.
2117 17:56:16.000716
2118 17:56:16.003460 Waiting for the transfer...
2119 17:56:16.003929
2120 17:56:16.719688 00000000 ################################################################
2121 17:56:16.720249
2122 17:56:17.440420 00080000 ################################################################
2123 17:56:17.440934
2124 17:56:18.126797 00100000 ################################################################
2125 17:56:18.127584
2126 17:56:18.837809 00180000 ################################################################
2127 17:56:18.838385
2128 17:56:19.552351 00200000 ################################################################
2129 17:56:19.552514
2130 17:56:20.225656 00280000 ################################################################
2131 17:56:20.225894
2132 17:56:20.919573 00300000 ################################################################
2133 17:56:20.920143
2134 17:56:21.653455 00380000 ################################################################
2135 17:56:21.654038
2136 17:56:22.294298 00400000 ################################################################
2137 17:56:22.294852
2138 17:56:22.995431 00480000 ################################################################
2139 17:56:22.995966
2140 17:56:23.721446 00500000 ################################################################
2141 17:56:23.722020
2142 17:56:24.045512 00580000 ############################# done.
2143 17:56:24.046043
2144 17:56:24.048765 Sending tftp read request... done.
2145 17:56:24.049344
2146 17:56:24.052034 Waiting for the transfer...
2147 17:56:24.052454
2148 17:56:24.052785 00000000 # done.
2149 17:56:24.053103
2150 17:56:24.062039 Command line loaded dynamically from TFTP file: 11831906/tftp-deploy-6cvdqpy5/kernel/cmdline
2151 17:56:24.062623
2152 17:56:24.092346 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831906/extract-nfsrootfs-watouy80,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2153 17:56:24.092915
2154 17:56:24.098620 ec_init(0): CrosEC protocol v3 supported (256, 256)
2155 17:56:24.101645
2156 17:56:24.104897 Shutting down all USB controllers.
2157 17:56:24.105364
2158 17:56:24.105735 Removing current net device
2159 17:56:24.112708
2160 17:56:24.113254 Finalizing coreboot
2161 17:56:24.113627
2162 17:56:24.119433 Exiting depthcharge with code 4 at timestamp: 29581235
2163 17:56:24.119978
2164 17:56:24.120386
2165 17:56:24.120733 Starting kernel ...
2166 17:56:24.121069
2167 17:56:24.121426
2168 17:56:24.122734 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2169 17:56:24.123261 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2170 17:56:24.123675 Setting prompt string to ['Linux version [0-9]']
2171 17:56:24.124048 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2172 17:56:24.124415 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2174 18:00:44.124131 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2176 18:00:44.125225 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2178 18:00:44.126096 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2181 18:00:44.127595 end: 2 depthcharge-action (duration 00:05:00) [common]
2183 18:00:44.128785 Cleaning after the job
2184 18:00:44.128956 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/ramdisk
2185 18:00:44.129997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/kernel
2186 18:00:44.131330 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/nfsrootfs
2187 18:00:44.249525 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831906/tftp-deploy-6cvdqpy5/modules
2188 18:00:44.249983 start: 4.1 power-off (timeout 00:00:30) [common]
2189 18:00:44.250154 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2190 18:00:44.333174 >> Command sent successfully.
2191 18:00:44.344494 Returned 0 in 0 seconds
2192 18:00:44.445853 end: 4.1 power-off (duration 00:00:00) [common]
2194 18:00:44.447530 start: 4.2 read-feedback (timeout 00:10:00) [common]
2195 18:00:44.448864 Listened to connection for namespace 'common' for up to 1s
2197 18:00:44.450234 Listened to connection for namespace 'common' for up to 1s
2198 18:00:45.449484 Finalising connection for namespace 'common'
2199 18:00:45.450192 Disconnecting from shell: Finalise
2200 18:00:45.450665
2201 18:00:45.551736 end: 4.2 read-feedback (duration 00:00:01) [common]
2202 18:00:45.552357 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831906
2203 18:00:46.093723 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831906
2204 18:00:46.093923 JobError: Your job cannot terminate cleanly.