Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
- Errors: 2
- Boot result: FAIL
1 17:56:32.563490 lava-dispatcher, installed at version: 2023.08
2 17:56:32.563734 start: 0 validate
3 17:56:32.563884 Start time: 2023-10-20 17:56:32.563874+00:00 (UTC)
4 17:56:32.564026 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:56:32.564174 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Finitrd.cpio.gz exists
6 17:56:32.858407 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:56:32.859153 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 17:56:33.128973 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:56:33.129665 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230623.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 17:56:33.399749 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:56:33.400625 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip78-rt45-338-gf468de833aa13%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:56:33.675303 validate duration: 1.11
14 17:56:33.676750 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:56:33.677299 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:56:33.677775 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:56:33.678393 Not decompressing ramdisk as can be used compressed.
18 17:56:33.678834 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/initrd.cpio.gz
19 17:56:33.679174 saving as /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/ramdisk/initrd.cpio.gz
20 17:56:33.679512 total size: 5671549 (5 MB)
21 17:56:33.684650 progress 0 % (0 MB)
22 17:56:33.693721 progress 5 % (0 MB)
23 17:56:33.700125 progress 10 % (0 MB)
24 17:56:33.704262 progress 15 % (0 MB)
25 17:56:33.707984 progress 20 % (1 MB)
26 17:56:33.711371 progress 25 % (1 MB)
27 17:56:33.714005 progress 30 % (1 MB)
28 17:56:33.716696 progress 35 % (1 MB)
29 17:56:33.719157 progress 40 % (2 MB)
30 17:56:33.721277 progress 45 % (2 MB)
31 17:56:33.723438 progress 50 % (2 MB)
32 17:56:33.725619 progress 55 % (3 MB)
33 17:56:33.727354 progress 60 % (3 MB)
34 17:56:33.729298 progress 65 % (3 MB)
35 17:56:33.731157 progress 70 % (3 MB)
36 17:56:33.732724 progress 75 % (4 MB)
37 17:56:33.734468 progress 80 % (4 MB)
38 17:56:33.736212 progress 85 % (4 MB)
39 17:56:33.737798 progress 90 % (4 MB)
40 17:56:33.739540 progress 95 % (5 MB)
41 17:56:33.741305 progress 100 % (5 MB)
42 17:56:33.741429 5 MB downloaded in 0.06 s (87.32 MB/s)
43 17:56:33.741597 end: 1.1.1 http-download (duration 00:00:00) [common]
45 17:56:33.741863 end: 1.1 download-retry (duration 00:00:00) [common]
46 17:56:33.741976 start: 1.2 download-retry (timeout 00:10:00) [common]
47 17:56:33.742074 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 17:56:33.742234 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 17:56:33.742315 saving as /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/kernel/bzImage
50 17:56:33.742384 total size: 8507280 (8 MB)
51 17:56:33.742477 No compression specified
52 17:56:33.743696 progress 0 % (0 MB)
53 17:56:33.746158 progress 5 % (0 MB)
54 17:56:33.748797 progress 10 % (0 MB)
55 17:56:33.751363 progress 15 % (1 MB)
56 17:56:33.753961 progress 20 % (1 MB)
57 17:56:33.756497 progress 25 % (2 MB)
58 17:56:33.759030 progress 30 % (2 MB)
59 17:56:33.761579 progress 35 % (2 MB)
60 17:56:33.764111 progress 40 % (3 MB)
61 17:56:33.766638 progress 45 % (3 MB)
62 17:56:33.769190 progress 50 % (4 MB)
63 17:56:33.771718 progress 55 % (4 MB)
64 17:56:33.774214 progress 60 % (4 MB)
65 17:56:33.776764 progress 65 % (5 MB)
66 17:56:33.779248 progress 70 % (5 MB)
67 17:56:33.781755 progress 75 % (6 MB)
68 17:56:33.784335 progress 80 % (6 MB)
69 17:56:33.786863 progress 85 % (6 MB)
70 17:56:33.789364 progress 90 % (7 MB)
71 17:56:33.791860 progress 95 % (7 MB)
72 17:56:33.794377 progress 100 % (8 MB)
73 17:56:33.794587 8 MB downloaded in 0.05 s (155.43 MB/s)
74 17:56:33.794754 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:56:33.795012 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:56:33.795115 start: 1.3 download-retry (timeout 00:10:00) [common]
78 17:56:33.795216 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 17:56:33.795375 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230623.0/amd64/full.rootfs.tar.xz
80 17:56:33.795454 saving as /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/nfsrootfs/full.rootfs.tar
81 17:56:33.795523 total size: 126031368 (120 MB)
82 17:56:33.795594 Using unxz to decompress xz
83 17:56:33.800151 progress 0 % (0 MB)
84 17:56:34.338784 progress 5 % (6 MB)
85 17:56:34.888623 progress 10 % (12 MB)
86 17:56:35.438896 progress 15 % (18 MB)
87 17:56:36.008636 progress 20 % (24 MB)
88 17:56:36.389779 progress 25 % (30 MB)
89 17:56:36.765027 progress 30 % (36 MB)
90 17:56:37.058829 progress 35 % (42 MB)
91 17:56:37.262750 progress 40 % (48 MB)
92 17:56:37.666351 progress 45 % (54 MB)
93 17:56:38.075517 progress 50 % (60 MB)
94 17:56:38.454472 progress 55 % (66 MB)
95 17:56:38.850310 progress 60 % (72 MB)
96 17:56:39.226800 progress 65 % (78 MB)
97 17:56:39.658712 progress 70 % (84 MB)
98 17:56:40.116932 progress 75 % (90 MB)
99 17:56:40.581502 progress 80 % (96 MB)
100 17:56:40.690161 progress 85 % (102 MB)
101 17:56:40.862753 progress 90 % (108 MB)
102 17:56:41.235550 progress 95 % (114 MB)
103 17:56:41.652601 progress 100 % (120 MB)
104 17:56:41.658078 120 MB downloaded in 7.86 s (15.29 MB/s)
105 17:56:41.658394 end: 1.3.1 http-download (duration 00:00:08) [common]
107 17:56:41.658722 end: 1.3 download-retry (duration 00:00:08) [common]
108 17:56:41.658871 start: 1.4 download-retry (timeout 00:09:52) [common]
109 17:56:41.659019 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 17:56:41.659238 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip78-rt45-338-gf468de833aa13/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 17:56:41.659329 saving as /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/modules/modules.tar
112 17:56:41.659424 total size: 253900 (0 MB)
113 17:56:41.659521 Using unxz to decompress xz
114 17:56:41.664216 progress 12 % (0 MB)
115 17:56:41.664688 progress 25 % (0 MB)
116 17:56:41.664971 progress 38 % (0 MB)
117 17:56:41.666754 progress 51 % (0 MB)
118 17:56:41.668796 progress 64 % (0 MB)
119 17:56:41.670915 progress 77 % (0 MB)
120 17:56:41.673020 progress 90 % (0 MB)
121 17:56:41.674983 progress 100 % (0 MB)
122 17:56:41.681398 0 MB downloaded in 0.02 s (11.02 MB/s)
123 17:56:41.681687 end: 1.4.1 http-download (duration 00:00:00) [common]
125 17:56:41.682013 end: 1.4 download-retry (duration 00:00:00) [common]
126 17:56:41.682137 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 17:56:41.682268 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 17:56:45.010142 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/11831882/extract-nfsrootfs-zoyzvpn2
129 17:56:45.010363 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
130 17:56:45.010485 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 17:56:45.010670 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i
132 17:56:45.010821 makedir: /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin
133 17:56:45.010937 makedir: /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/tests
134 17:56:45.011050 makedir: /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/results
135 17:56:45.011164 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-add-keys
136 17:56:45.011331 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-add-sources
137 17:56:45.011481 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-background-process-start
138 17:56:45.011629 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-background-process-stop
139 17:56:45.011775 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-common-functions
140 17:56:45.011920 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-echo-ipv4
141 17:56:45.012070 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-install-packages
142 17:56:45.012213 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-installed-packages
143 17:56:45.012357 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-os-build
144 17:56:45.012500 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-probe-channel
145 17:56:45.012643 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-probe-ip
146 17:56:45.012787 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-target-ip
147 17:56:45.012930 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-target-mac
148 17:56:45.013071 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-target-storage
149 17:56:45.013219 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-case
150 17:56:45.013361 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-event
151 17:56:45.013504 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-feedback
152 17:56:45.013648 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-raise
153 17:56:45.013790 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-reference
154 17:56:45.013933 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-runner
155 17:56:45.014077 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-set
156 17:56:45.014219 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-test-shell
157 17:56:45.014362 Updating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-install-packages (oe)
158 17:56:45.014535 Updating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/bin/lava-installed-packages (oe)
159 17:56:45.014675 Creating /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/environment
160 17:56:45.014782 LAVA metadata
161 17:56:45.014863 - LAVA_JOB_ID=11831882
162 17:56:45.014935 - LAVA_DISPATCHER_IP=192.168.201.1
163 17:56:45.015047 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 17:56:45.015121 skipped lava-vland-overlay
165 17:56:45.015204 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 17:56:45.015293 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 17:56:45.015361 skipped lava-multinode-overlay
168 17:56:45.015452 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 17:56:45.015541 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 17:56:45.015623 Loading test definitions
171 17:56:45.015724 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
172 17:56:45.015805 Using /lava-11831882 at stage 0
173 17:56:45.015912 Fetching tests from https://github.com/kernelci/test-definitions
174 17:56:45.016007 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/0/tests/0_ltp-timers'
175 17:56:48.621988 Running '/usr/bin/git checkout kernelci.org
176 17:56:48.785643 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
177 17:56:48.786451 uuid=11831882_1.5.2.3.1 testdef=None
178 17:56:48.786641 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
180 17:56:48.786920 start: 1.5.2.3.2 test-overlay (timeout 00:09:45) [common]
181 17:56:48.787688 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
183 17:56:48.787954 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:45) [common]
184 17:56:48.788967 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
186 17:56:48.789228 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:45) [common]
187 17:56:48.790182 runner path: /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/0/tests/0_ltp-timers test_uuid 11831882_1.5.2.3.1
188 17:56:48.790284 GRP_TEST='TMR'
189 17:56:48.790357 SKIPFILE='skipfile-lkft.yaml'
190 17:56:48.790425 SKIP_INSTALL='true'
191 17:56:48.790490 TST_CMDFILES=''
192 17:56:48.790660 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
194 17:56:48.790897 Creating lava-test-runner.conf files
195 17:56:48.790970 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/11831882/lava-overlay-tycdfk3i/lava-11831882/0 for stage 0
196 17:56:48.791074 - 0_ltp-timers
197 17:56:48.791193 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
198 17:56:48.791293 start: 1.5.2.4 compress-overlay (timeout 00:09:45) [common]
199 17:56:57.166830 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
200 17:56:57.166997 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
201 17:56:57.167099 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
202 17:56:57.167213 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
203 17:56:57.167316 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
204 17:56:57.327562 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
205 17:56:57.328016 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
206 17:56:57.328159 extracting modules file /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831882/extract-nfsrootfs-zoyzvpn2
207 17:56:57.344159 extracting modules file /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/11831882/extract-overlay-ramdisk-684bvcwm/ramdisk
208 17:56:57.359585 end: 1.5.4 extract-modules (duration 00:00:00) [common]
209 17:56:57.359741 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
210 17:56:57.359845 [common] Applying overlay to NFS
211 17:56:57.359954 [common] Applying overlay /var/lib/lava/dispatcher/tmp/11831882/compress-overlay-aqmgzdov/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/11831882/extract-nfsrootfs-zoyzvpn2
212 17:56:58.395706 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
213 17:56:58.395890 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
214 17:56:58.396003 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
215 17:56:58.396101 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
216 17:56:58.396194 Building ramdisk /var/lib/lava/dispatcher/tmp/11831882/extract-overlay-ramdisk-684bvcwm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/11831882/extract-overlay-ramdisk-684bvcwm/ramdisk
217 17:56:58.476962 >> 27217 blocks
218 17:56:59.107257 rename /var/lib/lava/dispatcher/tmp/11831882/extract-overlay-ramdisk-684bvcwm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
219 17:56:59.107774 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
220 17:56:59.107922 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
221 17:56:59.108056 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
222 17:56:59.108166 No mkimage arch provided, not using FIT.
223 17:56:59.108272 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
224 17:56:59.108363 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
225 17:56:59.108478 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
226 17:56:59.108585 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
227 17:56:59.108670 No LXC device requested
228 17:56:59.108758 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
229 17:56:59.108863 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
230 17:56:59.108956 end: 1.7 deploy-device-env (duration 00:00:00) [common]
231 17:56:59.109039 Checking files for TFTP limit of 4294967296 bytes.
232 17:56:59.109487 end: 1 tftp-deploy (duration 00:00:25) [common]
233 17:56:59.109607 start: 2 depthcharge-action (timeout 00:05:00) [common]
234 17:56:59.109710 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
235 17:56:59.109853 substitutions:
236 17:56:59.109934 - {DTB}: None
237 17:56:59.110006 - {INITRD}: 11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
238 17:56:59.110074 - {KERNEL}: 11831882/tftp-deploy-yf2kmvbh/kernel/bzImage
239 17:56:59.110139 - {LAVA_MAC}: None
240 17:56:59.110203 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/11831882/extract-nfsrootfs-zoyzvpn2
241 17:56:59.110269 - {NFS_SERVER_IP}: 192.168.201.1
242 17:56:59.110332 - {PRESEED_CONFIG}: None
243 17:56:59.110394 - {PRESEED_LOCAL}: None
244 17:56:59.110456 - {RAMDISK}: 11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
245 17:56:59.110518 - {ROOT_PART}: None
246 17:56:59.110580 - {ROOT}: None
247 17:56:59.110641 - {SERVER_IP}: 192.168.201.1
248 17:56:59.110701 - {TEE}: None
249 17:56:59.110762 Parsed boot commands:
250 17:56:59.110822 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
251 17:56:59.111019 Parsed boot commands: tftpboot 192.168.201.1 11831882/tftp-deploy-yf2kmvbh/kernel/bzImage 11831882/tftp-deploy-yf2kmvbh/kernel/cmdline 11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
252 17:56:59.111119 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
253 17:56:59.111214 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
254 17:56:59.111321 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
255 17:56:59.111416 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
256 17:56:59.111499 Not connected, no need to disconnect.
257 17:56:59.111583 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
258 17:56:59.111678 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
259 17:56:59.111755 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
260 17:56:59.116166 Setting prompt string to ['lava-test: # ']
261 17:56:59.116584 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
262 17:56:59.116709 end: 2.2.1 reset-connection (duration 00:00:00) [common]
263 17:56:59.116818 start: 2.2.2 reset-device (timeout 00:05:00) [common]
264 17:56:59.116917 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
265 17:56:59.117138 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
266 17:57:04.255767 >> Command sent successfully.
267 17:57:04.258320 Returned 0 in 5 seconds
268 17:57:04.358731 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
270 17:57:04.359093 end: 2.2.2 reset-device (duration 00:00:05) [common]
271 17:57:04.359206 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
272 17:57:04.359305 Setting prompt string to 'Starting depthcharge on Helios...'
273 17:57:04.359442 Changing prompt to 'Starting depthcharge on Helios...'
274 17:57:04.359523 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
275 17:57:04.359852 [Enter `^Ec?' for help]
276 17:57:04.981184
277 17:57:04.981356
278 17:57:04.991240 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
279 17:57:04.994633 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
280 17:57:05.001331 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
281 17:57:05.004538 CPU: AES supported, TXT NOT supported, VT supported
282 17:57:05.011548 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
283 17:57:05.014680 PCH: device id 0284 (rev 00) is Cometlake-U Premium
284 17:57:05.021079 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
285 17:57:05.024689 VBOOT: Loading verstage.
286 17:57:05.028128 FMAP: Found "FLASH" version 1.1 at 0xc04000.
287 17:57:05.034360 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
288 17:57:05.038502 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
289 17:57:05.041329 CBFS @ c08000 size 3f8000
290 17:57:05.047756 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
291 17:57:05.051226 CBFS: Locating 'fallback/verstage'
292 17:57:05.054464 CBFS: Found @ offset 10fb80 size 1072c
293 17:57:05.057631
294 17:57:05.057727
295 17:57:05.067840 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
296 17:57:05.081869 Probing TPM: . done!
297 17:57:05.085539 TPM ready after 0 ms
298 17:57:05.088883 Connected to device vid:did:rid of 1ae0:0028:00
299 17:57:05.098962 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
300 17:57:05.102377 Initialized TPM device CR50 revision 0
301 17:57:05.148402 tlcl_send_startup: Startup return code is 0
302 17:57:05.148530 TPM: setup succeeded
303 17:57:05.160812 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
304 17:57:05.165058 Chrome EC: UHEPI supported
305 17:57:05.168238 Phase 1
306 17:57:05.171070 FMAP: area GBB found @ c05000 (12288 bytes)
307 17:57:05.178210 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
308 17:57:05.181560 Phase 2
309 17:57:05.181657 Phase 3
310 17:57:05.184889 FMAP: area GBB found @ c05000 (12288 bytes)
311 17:57:05.191597 VB2:vb2_report_dev_firmware() This is developer signed firmware
312 17:57:05.198001 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
313 17:57:05.201267 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
314 17:57:05.208172 VB2:vb2_verify_keyblock() Checking keyblock signature...
315 17:57:05.223767 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
316 17:57:05.226906 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
317 17:57:05.233638 VB2:vb2_verify_fw_preamble() Verifying preamble.
318 17:57:05.237844 Phase 4
319 17:57:05.241215 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
320 17:57:05.247684 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
321 17:57:05.427451 VB2:vb2_rsa_verify_digest() Digest check failed!
322 17:57:05.433951 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
323 17:57:05.434076 Saving nvdata
324 17:57:05.436888 Reboot requested (10020007)
325 17:57:05.440452 board_reset() called!
326 17:57:05.440557 full_reset() called!
327 17:57:09.949010
328 17:57:09.949505
329 17:57:09.958450 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
330 17:57:09.962107 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
331 17:57:09.968847 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
332 17:57:09.971607 CPU: AES supported, TXT NOT supported, VT supported
333 17:57:09.978654 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
334 17:57:09.981910 PCH: device id 0284 (rev 00) is Cometlake-U Premium
335 17:57:09.988425 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
336 17:57:09.991992 VBOOT: Loading verstage.
337 17:57:09.995094 FMAP: Found "FLASH" version 1.1 at 0xc04000.
338 17:57:10.001951 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
339 17:57:10.005038 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
340 17:57:10.008089 CBFS @ c08000 size 3f8000
341 17:57:10.014822 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
342 17:57:10.018348 CBFS: Locating 'fallback/verstage'
343 17:57:10.021208 CBFS: Found @ offset 10fb80 size 1072c
344 17:57:10.025714
345 17:57:10.026077
346 17:57:10.035981 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
347 17:57:10.050196 Probing TPM: . done!
348 17:57:10.053576 TPM ready after 0 ms
349 17:57:10.056841 Connected to device vid:did:rid of 1ae0:0028:00
350 17:57:10.066932 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
351 17:57:10.070489 Initialized TPM device CR50 revision 0
352 17:57:10.116457 tlcl_send_startup: Startup return code is 0
353 17:57:10.117051 TPM: setup succeeded
354 17:57:10.128779 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
355 17:57:10.132540 Chrome EC: UHEPI supported
356 17:57:10.135750 Phase 1
357 17:57:10.138932 FMAP: area GBB found @ c05000 (12288 bytes)
358 17:57:10.146038 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
359 17:57:10.152419 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
360 17:57:10.155947 Recovery requested (1009000e)
361 17:57:10.161389 Saving nvdata
362 17:57:10.167729 tlcl_extend: response is 0
363 17:57:10.176221 tlcl_extend: response is 0
364 17:57:10.184108 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
365 17:57:10.186808 CBFS @ c08000 size 3f8000
366 17:57:10.193103 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
367 17:57:10.196821 CBFS: Locating 'fallback/romstage'
368 17:57:10.199903 CBFS: Found @ offset 80 size 145fc
369 17:57:10.203206 Accumulated console time in verstage 98 ms
370 17:57:10.203728
371 17:57:10.204136
372 17:57:10.216836 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
373 17:57:10.223319 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
374 17:57:10.226605 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
375 17:57:10.230079 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
376 17:57:10.236477 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
377 17:57:10.240418 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
378 17:57:10.243138 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
379 17:57:10.247078 TCO_STS: 0000 0000
380 17:57:10.249896 GEN_PMCON: e0015238 00000200
381 17:57:10.253093 GBLRST_CAUSE: 00000000 00000000
382 17:57:10.253532 prev_sleep_state 5
383 17:57:10.256704 Boot Count incremented to 64516
384 17:57:10.263700 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
385 17:57:10.266419 CBFS @ c08000 size 3f8000
386 17:57:10.272774 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
387 17:57:10.273278 CBFS: Locating 'fspm.bin'
388 17:57:10.280068 CBFS: Found @ offset 5ffc0 size 71000
389 17:57:10.282881 Chrome EC: UHEPI supported
390 17:57:10.289267 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
391 17:57:10.292681 Probing TPM: done!
392 17:57:10.299591 Connected to device vid:did:rid of 1ae0:0028:00
393 17:57:10.309926 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
394 17:57:10.315453 Initialized TPM device CR50 revision 0
395 17:57:10.324568 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
396 17:57:10.331067 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
397 17:57:10.334372 MRC cache found, size 1948
398 17:57:10.337895 bootmode is set to: 2
399 17:57:10.341292 PRMRR disabled by config.
400 17:57:10.341823 SPD INDEX = 1
401 17:57:10.347682 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 17:57:10.351311 CBFS @ c08000 size 3f8000
403 17:57:10.357494 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 17:57:10.358091 CBFS: Locating 'spd.bin'
405 17:57:10.360920 CBFS: Found @ offset 5fb80 size 400
406 17:57:10.363853 SPD: module type is LPDDR3
407 17:57:10.367564 SPD: module part is
408 17:57:10.374018 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
409 17:57:10.377595 SPD: device width 4 bits, bus width 8 bits
410 17:57:10.380702 SPD: module size is 4096 MB (per channel)
411 17:57:10.383818 memory slot: 0 configuration done.
412 17:57:10.387555 memory slot: 2 configuration done.
413 17:57:10.439203 CBMEM:
414 17:57:10.442602 IMD: root @ 99fff000 254 entries.
415 17:57:10.445661 IMD: root @ 99ffec00 62 entries.
416 17:57:10.448965 External stage cache:
417 17:57:10.452301 IMD: root @ 9abff000 254 entries.
418 17:57:10.455754 IMD: root @ 9abfec00 62 entries.
419 17:57:10.458986 Chrome EC: clear events_b mask to 0x0000000020004000
420 17:57:10.475443 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
421 17:57:10.488545 tlcl_write: response is 0
422 17:57:10.497373 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
423 17:57:10.503870 MRC: TPM MRC hash updated successfully.
424 17:57:10.504469 2 DIMMs found
425 17:57:10.507284 SMM Memory Map
426 17:57:10.510789 SMRAM : 0x9a000000 0x1000000
427 17:57:10.513949 Subregion 0: 0x9a000000 0xa00000
428 17:57:10.516839 Subregion 1: 0x9aa00000 0x200000
429 17:57:10.520275 Subregion 2: 0x9ac00000 0x400000
430 17:57:10.523819 top_of_ram = 0x9a000000
431 17:57:10.527611 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
432 17:57:10.534296 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
433 17:57:10.537512 MTRR Range: Start=ff000000 End=0 (Size 1000000)
434 17:57:10.543695 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
435 17:57:10.547239 CBFS @ c08000 size 3f8000
436 17:57:10.550734 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
437 17:57:10.553925 CBFS: Locating 'fallback/postcar'
438 17:57:10.556921 CBFS: Found @ offset 107000 size 4b44
439 17:57:10.563469 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
440 17:57:10.575891 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
441 17:57:10.579121 Processing 180 relocs. Offset value of 0x97c0c000
442 17:57:10.587435 Accumulated console time in romstage 286 ms
443 17:57:10.587961
444 17:57:10.588351
445 17:57:10.597921 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
446 17:57:10.604675 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
447 17:57:10.607321 CBFS @ c08000 size 3f8000
448 17:57:10.610836 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
449 17:57:10.614780 CBFS: Locating 'fallback/ramstage'
450 17:57:10.621058 CBFS: Found @ offset 43380 size 1b9e8
451 17:57:10.627910 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
452 17:57:10.659409 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
453 17:57:10.662862 Processing 3976 relocs. Offset value of 0x98db0000
454 17:57:10.668738 Accumulated console time in postcar 52 ms
455 17:57:10.669266
456 17:57:10.669660
457 17:57:10.678997 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
458 17:57:10.685903 FMAP: area RO_VPD found @ c00000 (16384 bytes)
459 17:57:10.689372 WARNING: RO_VPD is uninitialized or empty.
460 17:57:10.692520 FMAP: area RW_VPD found @ af8000 (8192 bytes)
461 17:57:10.698875 FMAP: area RW_VPD found @ af8000 (8192 bytes)
462 17:57:10.699309 Normal boot.
463 17:57:10.705610 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
464 17:57:10.708716 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
465 17:57:10.712833 CBFS @ c08000 size 3f8000
466 17:57:10.719163 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
467 17:57:10.722880 CBFS: Locating 'cpu_microcode_blob.bin'
468 17:57:10.726104 CBFS: Found @ offset 14700 size 2ec00
469 17:57:10.729163 microcode: sig=0x806ec pf=0x4 revision=0xc9
470 17:57:10.732323 Skip microcode update
471 17:57:10.736213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 17:57:10.738878 CBFS @ c08000 size 3f8000
473 17:57:10.746332 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 17:57:10.748814 CBFS: Locating 'fsps.bin'
475 17:57:10.752436 CBFS: Found @ offset d1fc0 size 35000
476 17:57:10.778139 Detected 4 core, 8 thread CPU.
477 17:57:10.780889 Setting up SMI for CPU
478 17:57:10.784214 IED base = 0x9ac00000
479 17:57:10.784751 IED size = 0x00400000
480 17:57:10.787480 Will perform SMM setup.
481 17:57:10.793981 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
482 17:57:10.800768 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
483 17:57:10.803831 Processing 16 relocs. Offset value of 0x00030000
484 17:57:10.807680 Attempting to start 7 APs
485 17:57:10.810823 Waiting for 10ms after sending INIT.
486 17:57:10.827323 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
487 17:57:10.827861 done.
488 17:57:10.830837 AP: slot 5 apic_id 7.
489 17:57:10.834087 AP: slot 4 apic_id 6.
490 17:57:10.836872 Waiting for 2nd SIPI to complete...done.
491 17:57:10.840303 AP: slot 6 apic_id 2.
492 17:57:10.840697 AP: slot 7 apic_id 3.
493 17:57:10.844104 AP: slot 2 apic_id 4.
494 17:57:10.847071 AP: slot 3 apic_id 5.
495 17:57:10.853815 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
496 17:57:10.860100 Processing 13 relocs. Offset value of 0x00038000
497 17:57:10.863759 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
498 17:57:10.870286 Installing SMM handler to 0x9a000000
499 17:57:10.876630 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
500 17:57:10.883835 Processing 658 relocs. Offset value of 0x9a010000
501 17:57:10.890459 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
502 17:57:10.893549 Processing 13 relocs. Offset value of 0x9a008000
503 17:57:10.900420 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
504 17:57:10.906953 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
505 17:57:10.913405 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
506 17:57:10.916468 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
507 17:57:10.923735 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
508 17:57:10.930074 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
509 17:57:10.933197 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
510 17:57:10.939799 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
511 17:57:10.943563 Clearing SMI status registers
512 17:57:10.946638 SMI_STS: PM1
513 17:57:10.947040 PM1_STS: PWRBTN
514 17:57:10.950620 TCO_STS: SECOND_TO
515 17:57:10.953566 New SMBASE 0x9a000000
516 17:57:10.956842 In relocation handler: CPU 0
517 17:57:10.960174 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
518 17:57:10.963582 Writing SMRR. base = 0x9a000006, mask=0xff000800
519 17:57:10.966927 Relocation complete.
520 17:57:10.970568 New SMBASE 0x99fffc00
521 17:57:10.971082 In relocation handler: CPU 1
522 17:57:10.977241 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
523 17:57:10.979845 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 17:57:10.983563 Relocation complete.
525 17:57:10.984175 New SMBASE 0x99ffe800
526 17:57:10.987253 In relocation handler: CPU 6
527 17:57:10.993481 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
528 17:57:10.996581 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 17:57:10.999736 Relocation complete.
530 17:57:11.000214 New SMBASE 0x99ffe400
531 17:57:11.003263 In relocation handler: CPU 7
532 17:57:11.010168 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
533 17:57:11.013330 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 17:57:11.016539 Relocation complete.
535 17:57:11.016926 New SMBASE 0x99fff000
536 17:57:11.019848 In relocation handler: CPU 4
537 17:57:11.023389 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
538 17:57:11.029833 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 17:57:11.033274 Relocation complete.
540 17:57:11.033706 New SMBASE 0x99fff400
541 17:57:11.036549 In relocation handler: CPU 3
542 17:57:11.039770 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
543 17:57:11.046316 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 17:57:11.046681 Relocation complete.
545 17:57:11.050116 New SMBASE 0x99fff800
546 17:57:11.053679 In relocation handler: CPU 2
547 17:57:11.056434 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
548 17:57:11.063489 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 17:57:11.063887 Relocation complete.
550 17:57:11.066499 New SMBASE 0x99ffec00
551 17:57:11.070057 In relocation handler: CPU 5
552 17:57:11.073019 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
553 17:57:11.079592 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 17:57:11.080182 Relocation complete.
555 17:57:11.083420 Initializing CPU #0
556 17:57:11.086421 CPU: vendor Intel device 806ec
557 17:57:11.089916 CPU: family 06, model 8e, stepping 0c
558 17:57:11.092679 Clearing out pending MCEs
559 17:57:11.095827 Setting up local APIC...
560 17:57:11.095950 apic_id: 0x00 done.
561 17:57:11.099053 Turbo is available but hidden
562 17:57:11.102680 Turbo is available and visible
563 17:57:11.106268 VMX status: enabled
564 17:57:11.109509 IA32_FEATURE_CONTROL status: locked
565 17:57:11.112771 Skip microcode update
566 17:57:11.112903 CPU #0 initialized
567 17:57:11.115753 Initializing CPU #1
568 17:57:11.115876 Initializing CPU #5
569 17:57:11.119355 Initializing CPU #6
570 17:57:11.122884 Initializing CPU #7
571 17:57:11.125807 CPU: vendor Intel device 806ec
572 17:57:11.129277 CPU: family 06, model 8e, stepping 0c
573 17:57:11.132407 CPU: vendor Intel device 806ec
574 17:57:11.135918 CPU: family 06, model 8e, stepping 0c
575 17:57:11.138922 Clearing out pending MCEs
576 17:57:11.139042 Clearing out pending MCEs
577 17:57:11.142353 Setting up local APIC...
578 17:57:11.145705 Initializing CPU #4
579 17:57:11.149176 CPU: vendor Intel device 806ec
580 17:57:11.152514 CPU: family 06, model 8e, stepping 0c
581 17:57:11.155848 Setting up local APIC...
582 17:57:11.155982 Initializing CPU #3
583 17:57:11.159146 Initializing CPU #2
584 17:57:11.162519 CPU: vendor Intel device 806ec
585 17:57:11.165704 CPU: family 06, model 8e, stepping 0c
586 17:57:11.169382 CPU: vendor Intel device 806ec
587 17:57:11.172437 CPU: family 06, model 8e, stepping 0c
588 17:57:11.175931 Clearing out pending MCEs
589 17:57:11.179218 Clearing out pending MCEs
590 17:57:11.179412 Setting up local APIC...
591 17:57:11.182544 Setting up local APIC...
592 17:57:11.185754 CPU: vendor Intel device 806ec
593 17:57:11.188965 CPU: family 06, model 8e, stepping 0c
594 17:57:11.192502 Clearing out pending MCEs
595 17:57:11.195964 Clearing out pending MCEs
596 17:57:11.196389 apic_id: 0x02 done.
597 17:57:11.199340 apic_id: 0x03 done.
598 17:57:11.203065 VMX status: enabled
599 17:57:11.203430 VMX status: enabled
600 17:57:11.205901 IA32_FEATURE_CONTROL status: locked
601 17:57:11.212631 IA32_FEATURE_CONTROL status: locked
602 17:57:11.212997 Skip microcode update
603 17:57:11.215907 Skip microcode update
604 17:57:11.216413 CPU #6 initialized
605 17:57:11.219328 CPU #7 initialized
606 17:57:11.222292 Setting up local APIC...
607 17:57:11.225573 CPU: vendor Intel device 806ec
608 17:57:11.229085 CPU: family 06, model 8e, stepping 0c
609 17:57:11.232232 Clearing out pending MCEs
610 17:57:11.232699 apic_id: 0x06 done.
611 17:57:11.235510 Setting up local APIC...
612 17:57:11.238624 apic_id: 0x04 done.
613 17:57:11.239073 apic_id: 0x05 done.
614 17:57:11.242191 VMX status: enabled
615 17:57:11.245794 VMX status: enabled
616 17:57:11.248879 IA32_FEATURE_CONTROL status: locked
617 17:57:11.252507 IA32_FEATURE_CONTROL status: locked
618 17:57:11.252874 Skip microcode update
619 17:57:11.255606 Setting up local APIC...
620 17:57:11.258679 Skip microcode update
621 17:57:11.262071 CPU #2 initialized
622 17:57:11.262458 CPU #3 initialized
623 17:57:11.265516 VMX status: enabled
624 17:57:11.265888 apic_id: 0x07 done.
625 17:57:11.268937 IA32_FEATURE_CONTROL status: locked
626 17:57:11.271908 VMX status: enabled
627 17:57:11.275186 Skip microcode update
628 17:57:11.278331 IA32_FEATURE_CONTROL status: locked
629 17:57:11.278426 CPU #4 initialized
630 17:57:11.281629 Skip microcode update
631 17:57:11.285184 apic_id: 0x01 done.
632 17:57:11.285314 CPU #5 initialized
633 17:57:11.288631 VMX status: enabled
634 17:57:11.291680 IA32_FEATURE_CONTROL status: locked
635 17:57:11.295192 Skip microcode update
636 17:57:11.295576 CPU #1 initialized
637 17:57:11.302594 bsp_do_flight_plan done after 461 msecs.
638 17:57:11.303061 CPU: frequency set to 4200 MHz
639 17:57:11.305694 Enabling SMIs.
640 17:57:11.306150 Locking SMM.
641 17:57:11.321325 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
642 17:57:11.324766 CBFS @ c08000 size 3f8000
643 17:57:11.331392 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
644 17:57:11.331872 CBFS: Locating 'vbt.bin'
645 17:57:11.334837 CBFS: Found @ offset 5f5c0 size 499
646 17:57:11.341372 Found a VBT of 4608 bytes after decompression
647 17:57:11.523805 Display FSP Version Info HOB
648 17:57:11.527367 Reference Code - CPU = 9.0.1e.30
649 17:57:11.530976 uCode Version = 0.0.0.ca
650 17:57:11.533667 TXT ACM version = ff.ff.ff.ffff
651 17:57:11.537233 Display FSP Version Info HOB
652 17:57:11.540345 Reference Code - ME = 9.0.1e.30
653 17:57:11.544413 MEBx version = 0.0.0.0
654 17:57:11.546751 ME Firmware Version = Consumer SKU
655 17:57:11.550457 Display FSP Version Info HOB
656 17:57:11.553987 Reference Code - CML PCH = 9.0.1e.30
657 17:57:11.554421 PCH-CRID Status = Disabled
658 17:57:11.560239 PCH-CRID Original Value = ff.ff.ff.ffff
659 17:57:11.564154 PCH-CRID New Value = ff.ff.ff.ffff
660 17:57:11.567281 OPROM - RST - RAID = ff.ff.ff.ffff
661 17:57:11.570664 ChipsetInit Base Version = ff.ff.ff.ffff
662 17:57:11.574242 ChipsetInit Oem Version = ff.ff.ff.ffff
663 17:57:11.576915 Display FSP Version Info HOB
664 17:57:11.580388 Reference Code - SA - System Agent = 9.0.1e.30
665 17:57:11.583460 Reference Code - MRC = 0.7.1.6c
666 17:57:11.586904 SA - PCIe Version = 9.0.1e.30
667 17:57:11.590626 SA-CRID Status = Disabled
668 17:57:11.593627 SA-CRID Original Value = 0.0.0.c
669 17:57:11.596914 SA-CRID New Value = 0.0.0.c
670 17:57:11.600292 OPROM - VBIOS = ff.ff.ff.ffff
671 17:57:11.600691 RTC Init
672 17:57:11.607192 Set power on after power failure.
673 17:57:11.607691 Disabling Deep S3
674 17:57:11.610661 Disabling Deep S3
675 17:57:11.611104 Disabling Deep S4
676 17:57:11.613619 Disabling Deep S4
677 17:57:11.614110 Disabling Deep S5
678 17:57:11.617050 Disabling Deep S5
679 17:57:11.623617 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 193 exit 1
680 17:57:11.624154 Enumerating buses...
681 17:57:11.630034 Show all devs... Before device enumeration.
682 17:57:11.630428 Root Device: enabled 1
683 17:57:11.633487 CPU_CLUSTER: 0: enabled 1
684 17:57:11.636686 DOMAIN: 0000: enabled 1
685 17:57:11.639984 APIC: 00: enabled 1
686 17:57:11.640407 PCI: 00:00.0: enabled 1
687 17:57:11.643071 PCI: 00:02.0: enabled 1
688 17:57:11.646973 PCI: 00:04.0: enabled 0
689 17:57:11.647506 PCI: 00:05.0: enabled 0
690 17:57:11.649749 PCI: 00:12.0: enabled 1
691 17:57:11.653599 PCI: 00:12.5: enabled 0
692 17:57:11.656359 PCI: 00:12.6: enabled 0
693 17:57:11.656752 PCI: 00:14.0: enabled 1
694 17:57:11.659517 PCI: 00:14.1: enabled 0
695 17:57:11.663145 PCI: 00:14.3: enabled 1
696 17:57:11.666565 PCI: 00:14.5: enabled 0
697 17:57:11.666960 PCI: 00:15.0: enabled 1
698 17:57:11.669993 PCI: 00:15.1: enabled 1
699 17:57:11.673207 PCI: 00:15.2: enabled 0
700 17:57:11.676249 PCI: 00:15.3: enabled 0
701 17:57:11.676647 PCI: 00:16.0: enabled 1
702 17:57:11.679688 PCI: 00:16.1: enabled 0
703 17:57:11.683100 PCI: 00:16.2: enabled 0
704 17:57:11.683494 PCI: 00:16.3: enabled 0
705 17:57:11.686539 PCI: 00:16.4: enabled 0
706 17:57:11.689525 PCI: 00:16.5: enabled 0
707 17:57:11.692663 PCI: 00:17.0: enabled 1
708 17:57:11.693057 PCI: 00:19.0: enabled 1
709 17:57:11.695991 PCI: 00:19.1: enabled 0
710 17:57:11.699983 PCI: 00:19.2: enabled 0
711 17:57:11.702984 PCI: 00:1a.0: enabled 0
712 17:57:11.703377 PCI: 00:1c.0: enabled 0
713 17:57:11.706243 PCI: 00:1c.1: enabled 0
714 17:57:11.709945 PCI: 00:1c.2: enabled 0
715 17:57:11.713021 PCI: 00:1c.3: enabled 0
716 17:57:11.713464 PCI: 00:1c.4: enabled 0
717 17:57:11.716151 PCI: 00:1c.5: enabled 0
718 17:57:11.719792 PCI: 00:1c.6: enabled 0
719 17:57:11.720225 PCI: 00:1c.7: enabled 0
720 17:57:11.722975 PCI: 00:1d.0: enabled 1
721 17:57:11.726539 PCI: 00:1d.1: enabled 0
722 17:57:11.729281 PCI: 00:1d.2: enabled 0
723 17:57:11.729676 PCI: 00:1d.3: enabled 0
724 17:57:11.733403 PCI: 00:1d.4: enabled 0
725 17:57:11.736628 PCI: 00:1d.5: enabled 1
726 17:57:11.739527 PCI: 00:1e.0: enabled 1
727 17:57:11.740067 PCI: 00:1e.1: enabled 0
728 17:57:11.742843 PCI: 00:1e.2: enabled 1
729 17:57:11.746436 PCI: 00:1e.3: enabled 1
730 17:57:11.749371 PCI: 00:1f.0: enabled 1
731 17:57:11.749867 PCI: 00:1f.1: enabled 1
732 17:57:11.752632 PCI: 00:1f.2: enabled 1
733 17:57:11.756299 PCI: 00:1f.3: enabled 1
734 17:57:11.756697 PCI: 00:1f.4: enabled 1
735 17:57:11.759495 PCI: 00:1f.5: enabled 1
736 17:57:11.763029 PCI: 00:1f.6: enabled 0
737 17:57:11.766046 USB0 port 0: enabled 1
738 17:57:11.766661 I2C: 00:15: enabled 1
739 17:57:11.768951 I2C: 00:5d: enabled 1
740 17:57:11.772358 GENERIC: 0.0: enabled 1
741 17:57:11.772753 I2C: 00:1a: enabled 1
742 17:57:11.775816 I2C: 00:38: enabled 1
743 17:57:11.778980 I2C: 00:39: enabled 1
744 17:57:11.779473 I2C: 00:3a: enabled 1
745 17:57:11.782463 I2C: 00:3b: enabled 1
746 17:57:11.785618 PCI: 00:00.0: enabled 1
747 17:57:11.786013 SPI: 00: enabled 1
748 17:57:11.788949 SPI: 01: enabled 1
749 17:57:11.792162 PNP: 0c09.0: enabled 1
750 17:57:11.792559 USB2 port 0: enabled 1
751 17:57:11.795598 USB2 port 1: enabled 1
752 17:57:11.798498 USB2 port 2: enabled 0
753 17:57:11.802136 USB2 port 3: enabled 0
754 17:57:11.802528 USB2 port 5: enabled 0
755 17:57:11.805462 USB2 port 6: enabled 1
756 17:57:11.809163 USB2 port 9: enabled 1
757 17:57:11.809664 USB3 port 0: enabled 1
758 17:57:11.811820 USB3 port 1: enabled 1
759 17:57:11.815176 USB3 port 2: enabled 1
760 17:57:11.818958 USB3 port 3: enabled 1
761 17:57:11.819452 USB3 port 4: enabled 0
762 17:57:11.822194 APIC: 01: enabled 1
763 17:57:11.822587 APIC: 04: enabled 1
764 17:57:11.825561 APIC: 05: enabled 1
765 17:57:11.828722 APIC: 06: enabled 1
766 17:57:11.829114 APIC: 07: enabled 1
767 17:57:11.831576 APIC: 02: enabled 1
768 17:57:11.835551 APIC: 03: enabled 1
769 17:57:11.836073 Compare with tree...
770 17:57:11.839328 Root Device: enabled 1
771 17:57:11.842117 CPU_CLUSTER: 0: enabled 1
772 17:57:11.842616 APIC: 00: enabled 1
773 17:57:11.845672 APIC: 01: enabled 1
774 17:57:11.848579 APIC: 04: enabled 1
775 17:57:11.849078 APIC: 05: enabled 1
776 17:57:11.851859 APIC: 06: enabled 1
777 17:57:11.855264 APIC: 07: enabled 1
778 17:57:11.855769 APIC: 02: enabled 1
779 17:57:11.858652 APIC: 03: enabled 1
780 17:57:11.861531 DOMAIN: 0000: enabled 1
781 17:57:11.865012 PCI: 00:00.0: enabled 1
782 17:57:11.865407 PCI: 00:02.0: enabled 1
783 17:57:11.868210 PCI: 00:04.0: enabled 0
784 17:57:11.872099 PCI: 00:05.0: enabled 0
785 17:57:11.875838 PCI: 00:12.0: enabled 1
786 17:57:11.878674 PCI: 00:12.5: enabled 0
787 17:57:11.879165 PCI: 00:12.6: enabled 0
788 17:57:11.881631 PCI: 00:14.0: enabled 1
789 17:57:11.884873 USB0 port 0: enabled 1
790 17:57:11.888277 USB2 port 0: enabled 1
791 17:57:11.891835 USB2 port 1: enabled 1
792 17:57:11.895082 USB2 port 2: enabled 0
793 17:57:11.895526 USB2 port 3: enabled 0
794 17:57:11.898037 USB2 port 5: enabled 0
795 17:57:11.901751 USB2 port 6: enabled 1
796 17:57:11.904563 USB2 port 9: enabled 1
797 17:57:11.908471 USB3 port 0: enabled 1
798 17:57:11.908867 USB3 port 1: enabled 1
799 17:57:11.911973 USB3 port 2: enabled 1
800 17:57:11.915524 USB3 port 3: enabled 1
801 17:57:11.918026 USB3 port 4: enabled 0
802 17:57:11.922003 PCI: 00:14.1: enabled 0
803 17:57:11.922398 PCI: 00:14.3: enabled 1
804 17:57:11.925348 PCI: 00:14.5: enabled 0
805 17:57:11.928750 PCI: 00:15.0: enabled 1
806 17:57:11.931960 I2C: 00:15: enabled 1
807 17:57:11.935349 PCI: 00:15.1: enabled 1
808 17:57:11.935850 I2C: 00:5d: enabled 1
809 17:57:11.938501 GENERIC: 0.0: enabled 1
810 17:57:11.941970 PCI: 00:15.2: enabled 0
811 17:57:11.944906 PCI: 00:15.3: enabled 0
812 17:57:11.948639 PCI: 00:16.0: enabled 1
813 17:57:11.949146 PCI: 00:16.1: enabled 0
814 17:57:11.951564 PCI: 00:16.2: enabled 0
815 17:57:11.954868 PCI: 00:16.3: enabled 0
816 17:57:11.958476 PCI: 00:16.4: enabled 0
817 17:57:11.958971 PCI: 00:16.5: enabled 0
818 17:57:11.961248 PCI: 00:17.0: enabled 1
819 17:57:11.964529 PCI: 00:19.0: enabled 1
820 17:57:11.968273 I2C: 00:1a: enabled 1
821 17:57:11.971708 I2C: 00:38: enabled 1
822 17:57:11.972251 I2C: 00:39: enabled 1
823 17:57:11.974633 I2C: 00:3a: enabled 1
824 17:57:11.978056 I2C: 00:3b: enabled 1
825 17:57:11.981502 PCI: 00:19.1: enabled 0
826 17:57:11.982158 PCI: 00:19.2: enabled 0
827 17:57:11.984627 PCI: 00:1a.0: enabled 0
828 17:57:11.987778 PCI: 00:1c.0: enabled 0
829 17:57:11.991419 PCI: 00:1c.1: enabled 0
830 17:57:11.994661 PCI: 00:1c.2: enabled 0
831 17:57:11.995074 PCI: 00:1c.3: enabled 0
832 17:57:11.997715 PCI: 00:1c.4: enabled 0
833 17:57:12.001158 PCI: 00:1c.5: enabled 0
834 17:57:12.004721 PCI: 00:1c.6: enabled 0
835 17:57:12.007601 PCI: 00:1c.7: enabled 0
836 17:57:12.008143 PCI: 00:1d.0: enabled 1
837 17:57:12.011509 PCI: 00:1d.1: enabled 0
838 17:57:12.014321 PCI: 00:1d.2: enabled 0
839 17:57:12.018141 PCI: 00:1d.3: enabled 0
840 17:57:12.021204 PCI: 00:1d.4: enabled 0
841 17:57:12.021653 PCI: 00:1d.5: enabled 1
842 17:57:12.024538 PCI: 00:00.0: enabled 1
843 17:57:12.027701 PCI: 00:1e.0: enabled 1
844 17:57:12.031401 PCI: 00:1e.1: enabled 0
845 17:57:12.031763 PCI: 00:1e.2: enabled 1
846 17:57:12.034309 SPI: 00: enabled 1
847 17:57:12.038281 PCI: 00:1e.3: enabled 1
848 17:57:12.041436 SPI: 01: enabled 1
849 17:57:12.041936 PCI: 00:1f.0: enabled 1
850 17:57:12.044267 PNP: 0c09.0: enabled 1
851 17:57:12.047910 PCI: 00:1f.1: enabled 1
852 17:57:12.051579 PCI: 00:1f.2: enabled 1
853 17:57:12.055204 PCI: 00:1f.3: enabled 1
854 17:57:12.055697 PCI: 00:1f.4: enabled 1
855 17:57:12.058052 PCI: 00:1f.5: enabled 1
856 17:57:12.061196 PCI: 00:1f.6: enabled 0
857 17:57:12.064200 Root Device scanning...
858 17:57:12.067630 scan_static_bus for Root Device
859 17:57:12.068057 CPU_CLUSTER: 0 enabled
860 17:57:12.071660 DOMAIN: 0000 enabled
861 17:57:12.074373 DOMAIN: 0000 scanning...
862 17:57:12.078065 PCI: pci_scan_bus for bus 00
863 17:57:12.081095 PCI: 00:00.0 [8086/0000] ops
864 17:57:12.084334 PCI: 00:00.0 [8086/9b61] enabled
865 17:57:12.087416 PCI: 00:02.0 [8086/0000] bus ops
866 17:57:12.091064 PCI: 00:02.0 [8086/9b41] enabled
867 17:57:12.094337 PCI: 00:04.0 [8086/1903] disabled
868 17:57:12.097653 PCI: 00:08.0 [8086/1911] enabled
869 17:57:12.101197 PCI: 00:12.0 [8086/02f9] enabled
870 17:57:12.104430 PCI: 00:14.0 [8086/0000] bus ops
871 17:57:12.107766 PCI: 00:14.0 [8086/02ed] enabled
872 17:57:12.111034 PCI: 00:14.2 [8086/02ef] enabled
873 17:57:12.114403 PCI: 00:14.3 [8086/02f0] enabled
874 17:57:12.118011 PCI: 00:15.0 [8086/0000] bus ops
875 17:57:12.121006 PCI: 00:15.0 [8086/02e8] enabled
876 17:57:12.124371 PCI: 00:15.1 [8086/0000] bus ops
877 17:57:12.127554 PCI: 00:15.1 [8086/02e9] enabled
878 17:57:12.131011 PCI: 00:16.0 [8086/0000] ops
879 17:57:12.133894 PCI: 00:16.0 [8086/02e0] enabled
880 17:57:12.137628 PCI: 00:17.0 [8086/0000] ops
881 17:57:12.141697 PCI: 00:17.0 [8086/02d3] enabled
882 17:57:12.144316 PCI: 00:19.0 [8086/0000] bus ops
883 17:57:12.147242 PCI: 00:19.0 [8086/02c5] enabled
884 17:57:12.150841 PCI: 00:1d.0 [8086/0000] bus ops
885 17:57:12.154647 PCI: 00:1d.0 [8086/02b0] enabled
886 17:57:12.157879 PCI: Static device PCI: 00:1d.5 not found, disabling it.
887 17:57:12.160575 PCI: 00:1e.0 [8086/0000] ops
888 17:57:12.163839 PCI: 00:1e.0 [8086/02a8] enabled
889 17:57:12.167787 PCI: 00:1e.2 [8086/0000] bus ops
890 17:57:12.170657 PCI: 00:1e.2 [8086/02aa] enabled
891 17:57:12.174382 PCI: 00:1e.3 [8086/0000] bus ops
892 17:57:12.177706 PCI: 00:1e.3 [8086/02ab] enabled
893 17:57:12.180592 PCI: 00:1f.0 [8086/0000] bus ops
894 17:57:12.184507 PCI: 00:1f.0 [8086/0284] enabled
895 17:57:12.191334 PCI: Static device PCI: 00:1f.1 not found, disabling it.
896 17:57:12.197224 PCI: Static device PCI: 00:1f.2 not found, disabling it.
897 17:57:12.200682 PCI: 00:1f.3 [8086/0000] bus ops
898 17:57:12.203764 PCI: 00:1f.3 [8086/02c8] enabled
899 17:57:12.206907 PCI: 00:1f.4 [8086/0000] bus ops
900 17:57:12.210786 PCI: 00:1f.4 [8086/02a3] enabled
901 17:57:12.213541 PCI: 00:1f.5 [8086/0000] bus ops
902 17:57:12.217122 PCI: 00:1f.5 [8086/02a4] enabled
903 17:57:12.217513 PCI: Leftover static devices:
904 17:57:12.220520 PCI: 00:05.0
905 17:57:12.220910 PCI: 00:12.5
906 17:57:12.223484 PCI: 00:12.6
907 17:57:12.223871 PCI: 00:14.1
908 17:57:12.226895 PCI: 00:14.5
909 17:57:12.227254 PCI: 00:15.2
910 17:57:12.227554 PCI: 00:15.3
911 17:57:12.230481 PCI: 00:16.1
912 17:57:12.230884 PCI: 00:16.2
913 17:57:12.233917 PCI: 00:16.3
914 17:57:12.234306 PCI: 00:16.4
915 17:57:12.234619 PCI: 00:16.5
916 17:57:12.236699 PCI: 00:19.1
917 17:57:12.237087 PCI: 00:19.2
918 17:57:12.240387 PCI: 00:1a.0
919 17:57:12.240746 PCI: 00:1c.0
920 17:57:12.241031 PCI: 00:1c.1
921 17:57:12.243842 PCI: 00:1c.2
922 17:57:12.244347 PCI: 00:1c.3
923 17:57:12.247116 PCI: 00:1c.4
924 17:57:12.247473 PCI: 00:1c.5
925 17:57:12.250917 PCI: 00:1c.6
926 17:57:12.251403 PCI: 00:1c.7
927 17:57:12.251697 PCI: 00:1d.1
928 17:57:12.253537 PCI: 00:1d.2
929 17:57:12.254007 PCI: 00:1d.3
930 17:57:12.256651 PCI: 00:1d.4
931 17:57:12.257012 PCI: 00:1d.5
932 17:57:12.257300 PCI: 00:1e.1
933 17:57:12.260083 PCI: 00:1f.1
934 17:57:12.260444 PCI: 00:1f.2
935 17:57:12.263305 PCI: 00:1f.6
936 17:57:12.266674 PCI: Check your devicetree.cb.
937 17:57:12.267037 PCI: 00:02.0 scanning...
938 17:57:12.270206 scan_generic_bus for PCI: 00:02.0
939 17:57:12.277247 scan_generic_bus for PCI: 00:02.0 done
940 17:57:12.280209 scan_bus: scanning of bus PCI: 00:02.0 took 10194 usecs
941 17:57:12.284180 PCI: 00:14.0 scanning...
942 17:57:12.287149 scan_static_bus for PCI: 00:14.0
943 17:57:12.290424 USB0 port 0 enabled
944 17:57:12.290948 USB0 port 0 scanning...
945 17:57:12.293725 scan_static_bus for USB0 port 0
946 17:57:12.297019 USB2 port 0 enabled
947 17:57:12.300462 USB2 port 1 enabled
948 17:57:12.300958 USB2 port 2 disabled
949 17:57:12.304187 USB2 port 3 disabled
950 17:57:12.306925 USB2 port 5 disabled
951 17:57:12.307352 USB2 port 6 enabled
952 17:57:12.310372 USB2 port 9 enabled
953 17:57:12.313861 USB3 port 0 enabled
954 17:57:12.314285 USB3 port 1 enabled
955 17:57:12.316764 USB3 port 2 enabled
956 17:57:12.317189 USB3 port 3 enabled
957 17:57:12.320076 USB3 port 4 disabled
958 17:57:12.323336 USB2 port 0 scanning...
959 17:57:12.327612 scan_static_bus for USB2 port 0
960 17:57:12.330070 scan_static_bus for USB2 port 0 done
961 17:57:12.336673 scan_bus: scanning of bus USB2 port 0 took 9714 usecs
962 17:57:12.337141 USB2 port 1 scanning...
963 17:57:12.340444 scan_static_bus for USB2 port 1
964 17:57:12.343834 scan_static_bus for USB2 port 1 done
965 17:57:12.350537 scan_bus: scanning of bus USB2 port 1 took 9715 usecs
966 17:57:12.353589 USB2 port 6 scanning...
967 17:57:12.357338 scan_static_bus for USB2 port 6
968 17:57:12.359726 scan_static_bus for USB2 port 6 done
969 17:57:12.366655 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
970 17:57:12.367184 USB2 port 9 scanning...
971 17:57:12.370029 scan_static_bus for USB2 port 9
972 17:57:12.373306 scan_static_bus for USB2 port 9 done
973 17:57:12.380368 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
974 17:57:12.383961 USB3 port 0 scanning...
975 17:57:12.386362 scan_static_bus for USB3 port 0
976 17:57:12.389745 scan_static_bus for USB3 port 0 done
977 17:57:12.397080 scan_bus: scanning of bus USB3 port 0 took 9716 usecs
978 17:57:12.397630 USB3 port 1 scanning...
979 17:57:12.399850 scan_static_bus for USB3 port 1
980 17:57:12.404154 scan_static_bus for USB3 port 1 done
981 17:57:12.410520 scan_bus: scanning of bus USB3 port 1 took 9699 usecs
982 17:57:12.413374 USB3 port 2 scanning...
983 17:57:12.416696 scan_static_bus for USB3 port 2
984 17:57:12.420099 scan_static_bus for USB3 port 2 done
985 17:57:12.426842 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
986 17:57:12.427232 USB3 port 3 scanning...
987 17:57:12.429854 scan_static_bus for USB3 port 3
988 17:57:12.433382 scan_static_bus for USB3 port 3 done
989 17:57:12.439802 scan_bus: scanning of bus USB3 port 3 took 9706 usecs
990 17:57:12.443018 scan_static_bus for USB0 port 0 done
991 17:57:12.450422 scan_bus: scanning of bus USB0 port 0 took 155483 usecs
992 17:57:12.453546 scan_static_bus for PCI: 00:14.0 done
993 17:57:12.459722 scan_bus: scanning of bus PCI: 00:14.0 took 173110 usecs
994 17:57:12.460193 PCI: 00:15.0 scanning...
995 17:57:12.466679 scan_generic_bus for PCI: 00:15.0
996 17:57:12.470226 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
997 17:57:12.473344 scan_generic_bus for PCI: 00:15.0 done
998 17:57:12.479771 scan_bus: scanning of bus PCI: 00:15.0 took 14308 usecs
999 17:57:12.480262 PCI: 00:15.1 scanning...
1000 17:57:12.483909 scan_generic_bus for PCI: 00:15.1
1001 17:57:12.490097 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1002 17:57:12.493214 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1003 17:57:12.496498 scan_generic_bus for PCI: 00:15.1 done
1004 17:57:12.503176 scan_bus: scanning of bus PCI: 00:15.1 took 18609 usecs
1005 17:57:12.506543 PCI: 00:19.0 scanning...
1006 17:57:12.510456 scan_generic_bus for PCI: 00:19.0
1007 17:57:12.513188 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1008 17:57:12.516734 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1009 17:57:12.520231 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1010 17:57:12.526674 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1011 17:57:12.529990 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1012 17:57:12.533254 scan_generic_bus for PCI: 00:19.0 done
1013 17:57:12.540159 scan_bus: scanning of bus PCI: 00:19.0 took 30724 usecs
1014 17:57:12.540734 PCI: 00:1d.0 scanning...
1015 17:57:12.547378 do_pci_scan_bridge for PCI: 00:1d.0
1016 17:57:12.547909 PCI: pci_scan_bus for bus 01
1017 17:57:12.550003 PCI: 01:00.0 [1c5c/1327] enabled
1018 17:57:12.557402 Enabling Common Clock Configuration
1019 17:57:12.560652 L1 Sub-State supported from root port 29
1020 17:57:12.564070 L1 Sub-State Support = 0xf
1021 17:57:12.566945 CommonModeRestoreTime = 0x28
1022 17:57:12.570438 Power On Value = 0x16, Power On Scale = 0x0
1023 17:57:12.570970 ASPM: Enabled L1
1024 17:57:12.576962 scan_bus: scanning of bus PCI: 00:1d.0 took 32792 usecs
1025 17:57:12.579958 PCI: 00:1e.2 scanning...
1026 17:57:12.583289 scan_generic_bus for PCI: 00:1e.2
1027 17:57:12.586636 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1028 17:57:12.589887 scan_generic_bus for PCI: 00:1e.2 done
1029 17:57:12.596756 scan_bus: scanning of bus PCI: 00:1e.2 took 14004 usecs
1030 17:57:12.599898 PCI: 00:1e.3 scanning...
1031 17:57:12.603512 scan_generic_bus for PCI: 00:1e.3
1032 17:57:12.606976 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1033 17:57:12.609897 scan_generic_bus for PCI: 00:1e.3 done
1034 17:57:12.616982 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1035 17:57:12.620432 PCI: 00:1f.0 scanning...
1036 17:57:12.623473 scan_static_bus for PCI: 00:1f.0
1037 17:57:12.624116 PNP: 0c09.0 enabled
1038 17:57:12.627068 scan_static_bus for PCI: 00:1f.0 done
1039 17:57:12.633533 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1040 17:57:12.636596 PCI: 00:1f.3 scanning...
1041 17:57:12.643648 scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
1042 17:57:12.644217 PCI: 00:1f.4 scanning...
1043 17:57:12.646951 scan_generic_bus for PCI: 00:1f.4
1044 17:57:12.653689 scan_generic_bus for PCI: 00:1f.4 done
1045 17:57:12.656969 scan_bus: scanning of bus PCI: 00:1f.4 took 10189 usecs
1046 17:57:12.660605 PCI: 00:1f.5 scanning...
1047 17:57:12.663633 scan_generic_bus for PCI: 00:1f.5
1048 17:57:12.666788 scan_generic_bus for PCI: 00:1f.5 done
1049 17:57:12.673478 scan_bus: scanning of bus PCI: 00:1f.5 took 10190 usecs
1050 17:57:12.680032 scan_bus: scanning of bus DOMAIN: 0000 took 605079 usecs
1051 17:57:12.683956 scan_static_bus for Root Device done
1052 17:57:12.686860 scan_bus: scanning of bus Root Device took 624941 usecs
1053 17:57:12.690249 done
1054 17:57:12.693481 Chrome EC: UHEPI supported
1055 17:57:12.700357 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1056 17:57:12.703847 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1057 17:57:12.709788 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1058 17:57:12.717158 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1059 17:57:12.720384 SPI flash protection: WPSW=0 SRP0=0
1060 17:57:12.727122 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1061 17:57:12.730160 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1062 17:57:12.733356 found VGA at PCI: 00:02.0
1063 17:57:12.737306 Setting up VGA for PCI: 00:02.0
1064 17:57:12.743655 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1065 17:57:12.747224 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1066 17:57:12.750210 Allocating resources...
1067 17:57:12.753736 Reading resources...
1068 17:57:12.757386 Root Device read_resources bus 0 link: 0
1069 17:57:12.760381 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1070 17:57:12.767056 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1071 17:57:12.770187 DOMAIN: 0000 read_resources bus 0 link: 0
1072 17:57:12.777561 PCI: 00:14.0 read_resources bus 0 link: 0
1073 17:57:12.780057 USB0 port 0 read_resources bus 0 link: 0
1074 17:57:12.788350 USB0 port 0 read_resources bus 0 link: 0 done
1075 17:57:12.791656 PCI: 00:14.0 read_resources bus 0 link: 0 done
1076 17:57:12.799221 PCI: 00:15.0 read_resources bus 1 link: 0
1077 17:57:12.802619 PCI: 00:15.0 read_resources bus 1 link: 0 done
1078 17:57:12.809393 PCI: 00:15.1 read_resources bus 2 link: 0
1079 17:57:12.812897 PCI: 00:15.1 read_resources bus 2 link: 0 done
1080 17:57:12.819849 PCI: 00:19.0 read_resources bus 3 link: 0
1081 17:57:12.827022 PCI: 00:19.0 read_resources bus 3 link: 0 done
1082 17:57:12.830244 PCI: 00:1d.0 read_resources bus 1 link: 0
1083 17:57:12.836291 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1084 17:57:12.839725 PCI: 00:1e.2 read_resources bus 4 link: 0
1085 17:57:12.846312 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1086 17:57:12.849895 PCI: 00:1e.3 read_resources bus 5 link: 0
1087 17:57:12.856654 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1088 17:57:12.859926 PCI: 00:1f.0 read_resources bus 0 link: 0
1089 17:57:12.866460 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1090 17:57:12.870336 DOMAIN: 0000 read_resources bus 0 link: 0 done
1091 17:57:12.876919 Root Device read_resources bus 0 link: 0 done
1092 17:57:12.880809 Done reading resources.
1093 17:57:12.883350 Show resources in subtree (Root Device)...After reading.
1094 17:57:12.890218 Root Device child on link 0 CPU_CLUSTER: 0
1095 17:57:12.893934 CPU_CLUSTER: 0 child on link 0 APIC: 00
1096 17:57:12.894456 APIC: 00
1097 17:57:12.897061 APIC: 01
1098 17:57:12.897485 APIC: 04
1099 17:57:12.897824 APIC: 05
1100 17:57:12.900242 APIC: 06
1101 17:57:12.900751 APIC: 07
1102 17:57:12.902983 APIC: 02
1103 17:57:12.903497 APIC: 03
1104 17:57:12.906866 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1105 17:57:12.916853 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1106 17:57:12.966686 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1107 17:57:12.967308 PCI: 00:00.0
1108 17:57:12.967667 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1109 17:57:12.968405 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1110 17:57:12.968772 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1111 17:57:12.969159 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1112 17:57:12.980560 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1113 17:57:12.984114 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1114 17:57:12.993880 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1115 17:57:13.003706 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1116 17:57:13.013375 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1117 17:57:13.020184 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1118 17:57:13.030060 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1119 17:57:13.040062 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1120 17:57:13.049911 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1121 17:57:13.059863 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1122 17:57:13.070090 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1123 17:57:13.077140 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1124 17:57:13.079992 PCI: 00:02.0
1125 17:57:13.089722 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1126 17:57:13.099626 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1127 17:57:13.109524 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1128 17:57:13.110060 PCI: 00:04.0
1129 17:57:13.112877 PCI: 00:08.0
1130 17:57:13.123361 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1131 17:57:13.123885 PCI: 00:12.0
1132 17:57:13.133355 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1133 17:57:13.140086 PCI: 00:14.0 child on link 0 USB0 port 0
1134 17:57:13.149422 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1135 17:57:13.152946 USB0 port 0 child on link 0 USB2 port 0
1136 17:57:13.153464 USB2 port 0
1137 17:57:13.156319 USB2 port 1
1138 17:57:13.156740 USB2 port 2
1139 17:57:13.159223 USB2 port 3
1140 17:57:13.159641 USB2 port 5
1141 17:57:13.162925 USB2 port 6
1142 17:57:13.166081 USB2 port 9
1143 17:57:13.166587 USB3 port 0
1144 17:57:13.169037 USB3 port 1
1145 17:57:13.169437 USB3 port 2
1146 17:57:13.172635 USB3 port 3
1147 17:57:13.173025 USB3 port 4
1148 17:57:13.176074 PCI: 00:14.2
1149 17:57:13.186221 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1150 17:57:13.195929 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1151 17:57:13.196497 PCI: 00:14.3
1152 17:57:13.206002 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1153 17:57:13.208967 PCI: 00:15.0 child on link 0 I2C: 01:15
1154 17:57:13.219664 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1155 17:57:13.223013 I2C: 01:15
1156 17:57:13.225930 PCI: 00:15.1 child on link 0 I2C: 02:5d
1157 17:57:13.235912 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1158 17:57:13.239295 I2C: 02:5d
1159 17:57:13.239719 GENERIC: 0.0
1160 17:57:13.243166 PCI: 00:16.0
1161 17:57:13.252665 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 17:57:13.253195 PCI: 00:17.0
1163 17:57:13.262661 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1164 17:57:13.272404 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1165 17:57:13.279300 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1166 17:57:13.288881 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1167 17:57:13.296565 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1168 17:57:13.305450 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1169 17:57:13.309279 PCI: 00:19.0 child on link 0 I2C: 03:1a
1170 17:57:13.318914 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1171 17:57:13.322677 I2C: 03:1a
1172 17:57:13.323192 I2C: 03:38
1173 17:57:13.323535 I2C: 03:39
1174 17:57:13.325720 I2C: 03:3a
1175 17:57:13.326136 I2C: 03:3b
1176 17:57:13.332326 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1177 17:57:13.338992 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1178 17:57:13.349290 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1179 17:57:13.358825 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1180 17:57:13.362436 PCI: 01:00.0
1181 17:57:13.372050 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1182 17:57:13.372467 PCI: 00:1e.0
1183 17:57:13.381836 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1184 17:57:13.391905 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1185 17:57:13.398555 PCI: 00:1e.2 child on link 0 SPI: 00
1186 17:57:13.408114 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 17:57:13.408208 SPI: 00
1188 17:57:13.411858 PCI: 00:1e.3 child on link 0 SPI: 01
1189 17:57:13.421751 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 17:57:13.425201 SPI: 01
1191 17:57:13.428100 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1192 17:57:13.438294 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1193 17:57:13.444931 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1194 17:57:13.448121 PNP: 0c09.0
1195 17:57:13.455195 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1196 17:57:13.457841 PCI: 00:1f.3
1197 17:57:13.467756 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1198 17:57:13.477643 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1199 17:57:13.478051 PCI: 00:1f.4
1200 17:57:13.487562 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1201 17:57:13.497965 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1202 17:57:13.501940 PCI: 00:1f.5
1203 17:57:13.507546 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1204 17:57:13.514320 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1205 17:57:13.520913 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1206 17:57:13.527567 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1207 17:57:13.530968 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1208 17:57:13.534248 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1209 17:57:13.541342 PCI: 00:17.0 18 * [0x60 - 0x67] io
1210 17:57:13.544440 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1211 17:57:13.550790 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1212 17:57:13.557904 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1213 17:57:13.564598 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1214 17:57:13.574646 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1215 17:57:13.581042 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1216 17:57:13.584111 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1217 17:57:13.590914 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1218 17:57:13.597465 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1219 17:57:13.600733 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1220 17:57:13.604383 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1221 17:57:13.610723 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1222 17:57:13.613834 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1223 17:57:13.620697 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1224 17:57:13.624161 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1225 17:57:13.630370 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1226 17:57:13.634200 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1227 17:57:13.640614 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1228 17:57:13.644130 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1229 17:57:13.650543 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1230 17:57:13.653959 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1231 17:57:13.660917 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1232 17:57:13.664177 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1233 17:57:13.670614 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1234 17:57:13.673888 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1235 17:57:13.677185 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1236 17:57:13.683610 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1237 17:57:13.687126 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1238 17:57:13.693279 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1239 17:57:13.697185 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1240 17:57:13.703821 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1241 17:57:13.710111 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1242 17:57:13.713384 avoid_fixed_resources: DOMAIN: 0000
1243 17:57:13.720173 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1244 17:57:13.726564 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1245 17:57:13.733801 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1246 17:57:13.743624 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1247 17:57:13.749842 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1248 17:57:13.756667 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1249 17:57:13.766889 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1250 17:57:13.773542 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1251 17:57:13.779926 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1252 17:57:13.789986 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1253 17:57:13.796807 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1254 17:57:13.803097 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1255 17:57:13.805952 Setting resources...
1256 17:57:13.809489 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1257 17:57:13.816615 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1258 17:57:13.820108 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1259 17:57:13.823109 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1260 17:57:13.826554 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1261 17:57:13.833150 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1262 17:57:13.839908 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1263 17:57:13.846786 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1264 17:57:13.853226 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1265 17:57:13.859950 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1266 17:57:13.863450 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1267 17:57:13.870085 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1268 17:57:13.872804 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1269 17:57:13.879534 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1270 17:57:13.883027 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1271 17:57:13.889317 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1272 17:57:13.892986 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1273 17:57:13.899323 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1274 17:57:13.902663 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1275 17:57:13.906470 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1276 17:57:13.912901 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1277 17:57:13.916118 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1278 17:57:13.922645 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1279 17:57:13.926337 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1280 17:57:13.932734 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1281 17:57:13.936237 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1282 17:57:13.942699 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1283 17:57:13.945674 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1284 17:57:13.952771 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1285 17:57:13.955694 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1286 17:57:13.962703 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1287 17:57:13.965580 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1288 17:57:13.972353 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1289 17:57:13.979012 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1290 17:57:13.989135 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1291 17:57:13.995441 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1292 17:57:13.999201 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1293 17:57:14.008936 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1294 17:57:14.012362 Root Device assign_resources, bus 0 link: 0
1295 17:57:14.015504 DOMAIN: 0000 assign_resources, bus 0 link: 0
1296 17:57:14.025754 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1297 17:57:14.032656 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1298 17:57:14.042423 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1299 17:57:14.049713 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1300 17:57:14.059265 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1301 17:57:14.065692 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1302 17:57:14.072290 PCI: 00:14.0 assign_resources, bus 0 link: 0
1303 17:57:14.076070 PCI: 00:14.0 assign_resources, bus 0 link: 0
1304 17:57:14.082316 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1305 17:57:14.092281 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1306 17:57:14.099229 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1307 17:57:14.109043 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1308 17:57:14.112372 PCI: 00:15.0 assign_resources, bus 1 link: 0
1309 17:57:14.119088 PCI: 00:15.0 assign_resources, bus 1 link: 0
1310 17:57:14.125610 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1311 17:57:14.129136 PCI: 00:15.1 assign_resources, bus 2 link: 0
1312 17:57:14.136061 PCI: 00:15.1 assign_resources, bus 2 link: 0
1313 17:57:14.142398 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1314 17:57:14.152614 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1315 17:57:14.159521 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1316 17:57:14.166171 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1317 17:57:14.176281 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1318 17:57:14.182674 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1319 17:57:14.189110 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1320 17:57:14.199315 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1321 17:57:14.202272 PCI: 00:19.0 assign_resources, bus 3 link: 0
1322 17:57:14.208981 PCI: 00:19.0 assign_resources, bus 3 link: 0
1323 17:57:14.215839 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1324 17:57:14.225626 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1325 17:57:14.231923 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1326 17:57:14.238969 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1327 17:57:14.245542 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1328 17:57:14.252036 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1329 17:57:14.258847 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1330 17:57:14.268341 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1331 17:57:14.272131 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1332 17:57:14.279210 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1333 17:57:14.285295 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1334 17:57:14.288418 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1335 17:57:14.295347 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1336 17:57:14.298684 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1337 17:57:14.304989 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1338 17:57:14.308682 LPC: Trying to open IO window from 800 size 1ff
1339 17:57:14.318444 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1340 17:57:14.325428 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1341 17:57:14.335382 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1342 17:57:14.341720 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1343 17:57:14.348386 DOMAIN: 0000 assign_resources, bus 0 link: 0
1344 17:57:14.351977 Root Device assign_resources, bus 0 link: 0
1345 17:57:14.355575 Done setting resources.
1346 17:57:14.361832 Show resources in subtree (Root Device)...After assigning values.
1347 17:57:14.364536 Root Device child on link 0 CPU_CLUSTER: 0
1348 17:57:14.368157 CPU_CLUSTER: 0 child on link 0 APIC: 00
1349 17:57:14.371521 APIC: 00
1350 17:57:14.371933 APIC: 01
1351 17:57:14.372299 APIC: 04
1352 17:57:14.374663 APIC: 05
1353 17:57:14.375074 APIC: 06
1354 17:57:14.378699 APIC: 07
1355 17:57:14.379330 APIC: 02
1356 17:57:14.379676 APIC: 03
1357 17:57:14.384737 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1358 17:57:14.394949 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1359 17:57:14.404785 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1360 17:57:14.405299 PCI: 00:00.0
1361 17:57:14.414873 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1362 17:57:14.424518 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1363 17:57:14.434144 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1364 17:57:14.444152 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1365 17:57:14.454132 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1366 17:57:14.464628 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1367 17:57:14.471067 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1368 17:57:14.480326 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1369 17:57:14.490510 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1370 17:57:14.499874 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1371 17:57:14.510177 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1372 17:57:14.516904 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1373 17:57:14.526947 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1374 17:57:14.536632 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1375 17:57:14.546601 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1376 17:57:14.556587 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1377 17:57:14.557133 PCI: 00:02.0
1378 17:57:14.569343 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1379 17:57:14.579094 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1380 17:57:14.589294 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1381 17:57:14.589909 PCI: 00:04.0
1382 17:57:14.592512 PCI: 00:08.0
1383 17:57:14.602424 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1384 17:57:14.603015 PCI: 00:12.0
1385 17:57:14.612231 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1386 17:57:14.619178 PCI: 00:14.0 child on link 0 USB0 port 0
1387 17:57:14.628609 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1388 17:57:14.631938 USB0 port 0 child on link 0 USB2 port 0
1389 17:57:14.635368 USB2 port 0
1390 17:57:14.635687 USB2 port 1
1391 17:57:14.638991 USB2 port 2
1392 17:57:14.639345 USB2 port 3
1393 17:57:14.642392 USB2 port 5
1394 17:57:14.642849 USB2 port 6
1395 17:57:14.645603 USB2 port 9
1396 17:57:14.645992 USB3 port 0
1397 17:57:14.648876 USB3 port 1
1398 17:57:14.649231 USB3 port 2
1399 17:57:14.652470 USB3 port 3
1400 17:57:14.655408 USB3 port 4
1401 17:57:14.655762 PCI: 00:14.2
1402 17:57:14.665693 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1403 17:57:14.676213 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1404 17:57:14.678861 PCI: 00:14.3
1405 17:57:14.688916 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1406 17:57:14.691560 PCI: 00:15.0 child on link 0 I2C: 01:15
1407 17:57:14.702630 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1408 17:57:14.705372 I2C: 01:15
1409 17:57:14.708697 PCI: 00:15.1 child on link 0 I2C: 02:5d
1410 17:57:14.718117 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1411 17:57:14.721613 I2C: 02:5d
1412 17:57:14.722030 GENERIC: 0.0
1413 17:57:14.725089 PCI: 00:16.0
1414 17:57:14.734758 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1415 17:57:14.735267 PCI: 00:17.0
1416 17:57:14.745468 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1417 17:57:14.754509 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1418 17:57:14.764640 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1419 17:57:14.774491 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1420 17:57:14.784156 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1421 17:57:14.794660 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1422 17:57:14.797511 PCI: 00:19.0 child on link 0 I2C: 03:1a
1423 17:57:14.807090 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1424 17:57:14.810632 I2C: 03:1a
1425 17:57:14.811162 I2C: 03:38
1426 17:57:14.814078 I2C: 03:39
1427 17:57:14.814434 I2C: 03:3a
1428 17:57:14.817321 I2C: 03:3b
1429 17:57:14.820876 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1430 17:57:14.830292 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1431 17:57:14.840549 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1432 17:57:14.850591 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1433 17:57:14.853641 PCI: 01:00.0
1434 17:57:14.863560 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1435 17:57:14.864069 PCI: 00:1e.0
1436 17:57:14.877142 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1437 17:57:14.886442 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1438 17:57:14.890052 PCI: 00:1e.2 child on link 0 SPI: 00
1439 17:57:14.899637 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1440 17:57:14.900049 SPI: 00
1441 17:57:14.906051 PCI: 00:1e.3 child on link 0 SPI: 01
1442 17:57:14.915588 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1443 17:57:14.915680 SPI: 01
1444 17:57:14.918990 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1445 17:57:14.928940 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1446 17:57:14.939386 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1447 17:57:14.939743 PNP: 0c09.0
1448 17:57:14.949038 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1449 17:57:14.949511 PCI: 00:1f.3
1450 17:57:14.963068 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1451 17:57:14.972608 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1452 17:57:14.972992 PCI: 00:1f.4
1453 17:57:14.982649 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1454 17:57:14.992146 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1455 17:57:14.995879 PCI: 00:1f.5
1456 17:57:15.005537 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1457 17:57:15.005947 Done allocating resources.
1458 17:57:15.012051 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1459 17:57:15.015290 Enabling resources...
1460 17:57:15.018837 PCI: 00:00.0 subsystem <- 8086/9b61
1461 17:57:15.021961 PCI: 00:00.0 cmd <- 06
1462 17:57:15.025852 PCI: 00:02.0 subsystem <- 8086/9b41
1463 17:57:15.028487 PCI: 00:02.0 cmd <- 03
1464 17:57:15.032140 PCI: 00:08.0 cmd <- 06
1465 17:57:15.035717 PCI: 00:12.0 subsystem <- 8086/02f9
1466 17:57:15.038787 PCI: 00:12.0 cmd <- 02
1467 17:57:15.041994 PCI: 00:14.0 subsystem <- 8086/02ed
1468 17:57:15.044878 PCI: 00:14.0 cmd <- 02
1469 17:57:15.045297 PCI: 00:14.2 cmd <- 02
1470 17:57:15.052229 PCI: 00:14.3 subsystem <- 8086/02f0
1471 17:57:15.052747 PCI: 00:14.3 cmd <- 02
1472 17:57:15.055867 PCI: 00:15.0 subsystem <- 8086/02e8
1473 17:57:15.058611 PCI: 00:15.0 cmd <- 02
1474 17:57:15.061874 PCI: 00:15.1 subsystem <- 8086/02e9
1475 17:57:15.065097 PCI: 00:15.1 cmd <- 02
1476 17:57:15.068283 PCI: 00:16.0 subsystem <- 8086/02e0
1477 17:57:15.071660 PCI: 00:16.0 cmd <- 02
1478 17:57:15.075351 PCI: 00:17.0 subsystem <- 8086/02d3
1479 17:57:15.078260 PCI: 00:17.0 cmd <- 03
1480 17:57:15.081435 PCI: 00:19.0 subsystem <- 8086/02c5
1481 17:57:15.085271 PCI: 00:19.0 cmd <- 02
1482 17:57:15.088399 PCI: 00:1d.0 bridge ctrl <- 0013
1483 17:57:15.091510 PCI: 00:1d.0 subsystem <- 8086/02b0
1484 17:57:15.094617 PCI: 00:1d.0 cmd <- 06
1485 17:57:15.098127 PCI: 00:1e.0 subsystem <- 8086/02a8
1486 17:57:15.101349 PCI: 00:1e.0 cmd <- 06
1487 17:57:15.104276 PCI: 00:1e.2 subsystem <- 8086/02aa
1488 17:57:15.104695 PCI: 00:1e.2 cmd <- 06
1489 17:57:15.111166 PCI: 00:1e.3 subsystem <- 8086/02ab
1490 17:57:15.111589 PCI: 00:1e.3 cmd <- 02
1491 17:57:15.114336 PCI: 00:1f.0 subsystem <- 8086/0284
1492 17:57:15.117659 PCI: 00:1f.0 cmd <- 407
1493 17:57:15.121082 PCI: 00:1f.3 subsystem <- 8086/02c8
1494 17:57:15.124758 PCI: 00:1f.3 cmd <- 02
1495 17:57:15.127923 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 17:57:15.131333 PCI: 00:1f.4 cmd <- 03
1497 17:57:15.134351 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 17:57:15.137436 PCI: 00:1f.5 cmd <- 406
1499 17:57:15.146455 PCI: 01:00.0 cmd <- 02
1500 17:57:15.150879 done.
1501 17:57:15.162459 ME: Version: 14.0.39.1367
1502 17:57:15.168708 BS: BS_DEV_ENABLE times (ms): entry 0 run 18 exit 10
1503 17:57:15.172261 Initializing devices...
1504 17:57:15.172349 Root Device init ...
1505 17:57:15.179099 Chrome EC: Set SMI mask to 0x0000000000000000
1506 17:57:15.182118 Chrome EC: clear events_b mask to 0x0000000000000000
1507 17:57:15.188808 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 17:57:15.195514 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 17:57:15.202165 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 17:57:15.205093 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 17:57:15.208522 Root Device init finished in 35187 usecs
1512 17:57:15.211791 CPU_CLUSTER: 0 init ...
1513 17:57:15.218477 CPU_CLUSTER: 0 init finished in 2447 usecs
1514 17:57:15.222838 PCI: 00:00.0 init ...
1515 17:57:15.226126 CPU TDP: 15 Watts
1516 17:57:15.229599 CPU PL2 = 64 Watts
1517 17:57:15.232735 PCI: 00:00.0 init finished in 7079 usecs
1518 17:57:15.236103 PCI: 00:02.0 init ...
1519 17:57:15.239547 PCI: 00:02.0 init finished in 2253 usecs
1520 17:57:15.243094 PCI: 00:08.0 init ...
1521 17:57:15.246157 PCI: 00:08.0 init finished in 2253 usecs
1522 17:57:15.249648 PCI: 00:12.0 init ...
1523 17:57:15.253022 PCI: 00:12.0 init finished in 2243 usecs
1524 17:57:15.256224 PCI: 00:14.0 init ...
1525 17:57:15.259291 PCI: 00:14.0 init finished in 2251 usecs
1526 17:57:15.262692 PCI: 00:14.2 init ...
1527 17:57:15.266462 PCI: 00:14.2 init finished in 2252 usecs
1528 17:57:15.269156 PCI: 00:14.3 init ...
1529 17:57:15.272903 PCI: 00:14.3 init finished in 2269 usecs
1530 17:57:15.275810 PCI: 00:15.0 init ...
1531 17:57:15.279770 DW I2C bus 0 at 0xd121f000 (400 KHz)
1532 17:57:15.282601 PCI: 00:15.0 init finished in 5976 usecs
1533 17:57:15.286259 PCI: 00:15.1 init ...
1534 17:57:15.289133 DW I2C bus 1 at 0xd1220000 (400 KHz)
1535 17:57:15.292603 PCI: 00:15.1 init finished in 5976 usecs
1536 17:57:15.296279 PCI: 00:16.0 init ...
1537 17:57:15.299531 PCI: 00:16.0 init finished in 2252 usecs
1538 17:57:15.303025 PCI: 00:19.0 init ...
1539 17:57:15.306744 DW I2C bus 4 at 0xd1222000 (400 KHz)
1540 17:57:15.313338 PCI: 00:19.0 init finished in 5976 usecs
1541 17:57:15.313484 PCI: 00:1d.0 init ...
1542 17:57:15.316472 Initializing PCH PCIe bridge.
1543 17:57:15.319634 PCI: 00:1d.0 init finished in 5284 usecs
1544 17:57:15.324828 PCI: 00:1f.0 init ...
1545 17:57:15.328321 IOAPIC: Initializing IOAPIC at 0xfec00000
1546 17:57:15.334330 IOAPIC: Bootstrap Processor Local APIC = 0x00
1547 17:57:15.334421 IOAPIC: ID = 0x02
1548 17:57:15.338010 IOAPIC: Dumping registers
1549 17:57:15.341085 reg 0x0000: 0x02000000
1550 17:57:15.344471 reg 0x0001: 0x00770020
1551 17:57:15.344577 reg 0x0002: 0x00000000
1552 17:57:15.351587 PCI: 00:1f.0 init finished in 23525 usecs
1553 17:57:15.354916 PCI: 00:1f.4 init ...
1554 17:57:15.357822 PCI: 00:1f.4 init finished in 2263 usecs
1555 17:57:15.368980 PCI: 01:00.0 init ...
1556 17:57:15.372471 PCI: 01:00.0 init finished in 2251 usecs
1557 17:57:15.376555 PNP: 0c09.0 init ...
1558 17:57:15.379675 Google Chrome EC uptime: 11.060 seconds
1559 17:57:15.386453 Google Chrome AP resets since EC boot: 0
1560 17:57:15.389874 Google Chrome most recent AP reset causes:
1561 17:57:15.396482 Google Chrome EC reset flags at last EC boot: reset-pin
1562 17:57:15.399852 PNP: 0c09.0 init finished in 20574 usecs
1563 17:57:15.403019 Devices initialized
1564 17:57:15.403271 Show all devs... After init.
1565 17:57:15.406174 Root Device: enabled 1
1566 17:57:15.409798 CPU_CLUSTER: 0: enabled 1
1567 17:57:15.412885 DOMAIN: 0000: enabled 1
1568 17:57:15.413062 APIC: 00: enabled 1
1569 17:57:15.416247 PCI: 00:00.0: enabled 1
1570 17:57:15.419504 PCI: 00:02.0: enabled 1
1571 17:57:15.422887 PCI: 00:04.0: enabled 0
1572 17:57:15.423031 PCI: 00:05.0: enabled 0
1573 17:57:15.426065 PCI: 00:12.0: enabled 1
1574 17:57:15.429401 PCI: 00:12.5: enabled 0
1575 17:57:15.429532 PCI: 00:12.6: enabled 0
1576 17:57:15.433012 PCI: 00:14.0: enabled 1
1577 17:57:15.435990 PCI: 00:14.1: enabled 0
1578 17:57:15.439179 PCI: 00:14.3: enabled 1
1579 17:57:15.439288 PCI: 00:14.5: enabled 0
1580 17:57:15.442492 PCI: 00:15.0: enabled 1
1581 17:57:15.446233 PCI: 00:15.1: enabled 1
1582 17:57:15.449245 PCI: 00:15.2: enabled 0
1583 17:57:15.449336 PCI: 00:15.3: enabled 0
1584 17:57:15.452283 PCI: 00:16.0: enabled 1
1585 17:57:15.455949 PCI: 00:16.1: enabled 0
1586 17:57:15.459600 PCI: 00:16.2: enabled 0
1587 17:57:15.459728 PCI: 00:16.3: enabled 0
1588 17:57:15.462746 PCI: 00:16.4: enabled 0
1589 17:57:15.465719 PCI: 00:16.5: enabled 0
1590 17:57:15.469170 PCI: 00:17.0: enabled 1
1591 17:57:15.469264 PCI: 00:19.0: enabled 1
1592 17:57:15.472484 PCI: 00:19.1: enabled 0
1593 17:57:15.475947 PCI: 00:19.2: enabled 0
1594 17:57:15.476054 PCI: 00:1a.0: enabled 0
1595 17:57:15.479081 PCI: 00:1c.0: enabled 0
1596 17:57:15.482519 PCI: 00:1c.1: enabled 0
1597 17:57:15.485412 PCI: 00:1c.2: enabled 0
1598 17:57:15.485502 PCI: 00:1c.3: enabled 0
1599 17:57:15.488937 PCI: 00:1c.4: enabled 0
1600 17:57:15.492156 PCI: 00:1c.5: enabled 0
1601 17:57:15.495321 PCI: 00:1c.6: enabled 0
1602 17:57:15.495411 PCI: 00:1c.7: enabled 0
1603 17:57:15.498665 PCI: 00:1d.0: enabled 1
1604 17:57:15.502328 PCI: 00:1d.1: enabled 0
1605 17:57:15.505339 PCI: 00:1d.2: enabled 0
1606 17:57:15.505437 PCI: 00:1d.3: enabled 0
1607 17:57:15.508678 PCI: 00:1d.4: enabled 0
1608 17:57:15.512081 PCI: 00:1d.5: enabled 0
1609 17:57:15.512188 PCI: 00:1e.0: enabled 1
1610 17:57:15.515590 PCI: 00:1e.1: enabled 0
1611 17:57:15.518883 PCI: 00:1e.2: enabled 1
1612 17:57:15.522471 PCI: 00:1e.3: enabled 1
1613 17:57:15.522600 PCI: 00:1f.0: enabled 1
1614 17:57:15.525594 PCI: 00:1f.1: enabled 0
1615 17:57:15.528564 PCI: 00:1f.2: enabled 0
1616 17:57:15.532375 PCI: 00:1f.3: enabled 1
1617 17:57:15.532506 PCI: 00:1f.4: enabled 1
1618 17:57:15.535092 PCI: 00:1f.5: enabled 1
1619 17:57:15.539036 PCI: 00:1f.6: enabled 0
1620 17:57:15.541997 USB0 port 0: enabled 1
1621 17:57:15.542132 I2C: 01:15: enabled 1
1622 17:57:15.545379 I2C: 02:5d: enabled 1
1623 17:57:15.548330 GENERIC: 0.0: enabled 1
1624 17:57:15.548450 I2C: 03:1a: enabled 1
1625 17:57:15.551796 I2C: 03:38: enabled 1
1626 17:57:15.555416 I2C: 03:39: enabled 1
1627 17:57:15.555515 I2C: 03:3a: enabled 1
1628 17:57:15.558333 I2C: 03:3b: enabled 1
1629 17:57:15.561716 PCI: 00:00.0: enabled 1
1630 17:57:15.561811 SPI: 00: enabled 1
1631 17:57:15.565266 SPI: 01: enabled 1
1632 17:57:15.568152 PNP: 0c09.0: enabled 1
1633 17:57:15.568245 USB2 port 0: enabled 1
1634 17:57:15.571372 USB2 port 1: enabled 1
1635 17:57:15.574893 USB2 port 2: enabled 0
1636 17:57:15.575043 USB2 port 3: enabled 0
1637 17:57:15.578466 USB2 port 5: enabled 0
1638 17:57:15.581947 USB2 port 6: enabled 1
1639 17:57:15.585274 USB2 port 9: enabled 1
1640 17:57:15.585365 USB3 port 0: enabled 1
1641 17:57:15.588201 USB3 port 1: enabled 1
1642 17:57:15.591868 USB3 port 2: enabled 1
1643 17:57:15.592020 USB3 port 3: enabled 1
1644 17:57:15.594861 USB3 port 4: enabled 0
1645 17:57:15.598130 APIC: 01: enabled 1
1646 17:57:15.598263 APIC: 04: enabled 1
1647 17:57:15.601667 APIC: 05: enabled 1
1648 17:57:15.604700 APIC: 06: enabled 1
1649 17:57:15.604823 APIC: 07: enabled 1
1650 17:57:15.607974 APIC: 02: enabled 1
1651 17:57:15.608072 APIC: 03: enabled 1
1652 17:57:15.611215 PCI: 00:08.0: enabled 1
1653 17:57:15.614606 PCI: 00:14.2: enabled 1
1654 17:57:15.618075 PCI: 01:00.0: enabled 1
1655 17:57:15.621454 Disabling ACPI via APMC:
1656 17:57:15.621589 done.
1657 17:57:15.628086 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1658 17:57:15.631866 ELOG: NV offset 0xaf0000 size 0x4000
1659 17:57:15.637919 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1660 17:57:15.644465 ELOG: Event(17) added with size 13 at 2023-10-20 17:56:53 UTC
1661 17:57:15.651089 ELOG: Event(92) added with size 9 at 2023-10-20 17:56:53 UTC
1662 17:57:15.658042 ELOG: Event(93) added with size 9 at 2023-10-20 17:56:53 UTC
1663 17:57:15.664430 ELOG: Event(9A) added with size 9 at 2023-10-20 17:56:53 UTC
1664 17:57:15.671209 ELOG: Event(9E) added with size 10 at 2023-10-20 17:56:53 UTC
1665 17:57:15.678098 ELOG: Event(9F) added with size 14 at 2023-10-20 17:56:53 UTC
1666 17:57:15.681504 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1667 17:57:15.688062 ELOG: Event(A1) added with size 10 at 2023-10-20 17:56:53 UTC
1668 17:57:15.698157 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1669 17:57:15.705118 ELOG: Event(A0) added with size 9 at 2023-10-20 17:56:53 UTC
1670 17:57:15.708315 elog_add_boot_reason: Logged dev mode boot
1671 17:57:15.708423 Finalize devices...
1672 17:57:15.711739 PCI: 00:17.0 final
1673 17:57:15.714651 Devices finalized
1674 17:57:15.718227 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1675 17:57:15.724757 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1676 17:57:15.728175 ME: HFSTS1 : 0x90000245
1677 17:57:15.731381 ME: HFSTS2 : 0x3B850126
1678 17:57:15.738239 ME: HFSTS3 : 0x00000020
1679 17:57:15.741624 ME: HFSTS4 : 0x00004800
1680 17:57:15.745093 ME: HFSTS5 : 0x00000000
1681 17:57:15.748565 ME: HFSTS6 : 0x40400006
1682 17:57:15.751619 ME: Manufacturing Mode : NO
1683 17:57:15.755291 ME: FW Partition Table : OK
1684 17:57:15.758307 ME: Bringup Loader Failure : NO
1685 17:57:15.762217 ME: Firmware Init Complete : YES
1686 17:57:15.765139 ME: Boot Options Present : NO
1687 17:57:15.768397 ME: Update In Progress : NO
1688 17:57:15.771878 ME: D0i3 Support : YES
1689 17:57:15.774790 ME: Low Power State Enabled : NO
1690 17:57:15.778352 ME: CPU Replaced : NO
1691 17:57:15.781867 ME: CPU Replacement Valid : YES
1692 17:57:15.784703 ME: Current Working State : 5
1693 17:57:15.788660 ME: Current Operation State : 1
1694 17:57:15.791293 ME: Current Operation Mode : 0
1695 17:57:15.794501 ME: Error Code : 0
1696 17:57:15.798234 ME: CPU Debug Disabled : YES
1697 17:57:15.801217 ME: TXT Support : NO
1698 17:57:15.808099 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1699 17:57:15.814712 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1700 17:57:15.815248 CBFS @ c08000 size 3f8000
1701 17:57:15.821237 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1702 17:57:15.824665 CBFS: Locating 'fallback/dsdt.aml'
1703 17:57:15.827401 CBFS: Found @ offset 10bb80 size 3fa5
1704 17:57:15.834439 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1705 17:57:15.837770 CBFS @ c08000 size 3f8000
1706 17:57:15.840810 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1707 17:57:15.844261 CBFS: Locating 'fallback/slic'
1708 17:57:15.849485 CBFS: 'fallback/slic' not found.
1709 17:57:15.855889 ACPI: Writing ACPI tables at 99b3e000.
1710 17:57:15.856457 ACPI: * FACS
1711 17:57:15.859316 ACPI: * DSDT
1712 17:57:15.863249 Ramoops buffer: 0x100000@0x99a3d000.
1713 17:57:15.865729 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1714 17:57:15.872691 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1715 17:57:15.875595 Google Chrome EC: version:
1716 17:57:15.879102 ro: helios_v2.0.2659-56403530b
1717 17:57:15.882315 rw: helios_v2.0.2849-c41de27e7d
1718 17:57:15.882844 running image: 1
1719 17:57:15.886770 ACPI: * FADT
1720 17:57:15.887279 SCI is IRQ9
1721 17:57:15.893207 ACPI: added table 1/32, length now 40
1722 17:57:15.893729 ACPI: * SSDT
1723 17:57:15.896441 Found 1 CPU(s) with 8 core(s) each.
1724 17:57:15.900235 Error: Could not locate 'wifi_sar' in VPD.
1725 17:57:15.906604 Checking CBFS for default SAR values
1726 17:57:15.909900 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1727 17:57:15.913182 CBFS @ c08000 size 3f8000
1728 17:57:15.919928 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1729 17:57:15.922615 CBFS: Locating 'wifi_sar_defaults.hex'
1730 17:57:15.926522 CBFS: Found @ offset 5fac0 size 77
1731 17:57:15.930192 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1732 17:57:15.936426 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1733 17:57:15.939699 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1734 17:57:15.946771 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1735 17:57:15.949793 failed to find key in VPD: dsm_calib_r0_0
1736 17:57:15.959592 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1737 17:57:15.963180 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1738 17:57:15.966193 failed to find key in VPD: dsm_calib_r0_1
1739 17:57:15.976703 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1740 17:57:15.982672 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1741 17:57:15.986250 failed to find key in VPD: dsm_calib_r0_2
1742 17:57:15.996343 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1743 17:57:15.999156 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1744 17:57:16.006604 failed to find key in VPD: dsm_calib_r0_3
1745 17:57:16.012440 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1746 17:57:16.018899 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1747 17:57:16.022540 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1748 17:57:16.025486 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1749 17:57:16.029828 EC returned error result code 1
1750 17:57:16.033291 EC returned error result code 1
1751 17:57:16.036934 EC returned error result code 1
1752 17:57:16.043693 PS2K: Bad resp from EC. Vivaldi disabled!
1753 17:57:16.047399 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1754 17:57:16.053735 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1755 17:57:16.060390 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1756 17:57:16.063992 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1757 17:57:16.069911 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1758 17:57:16.076794 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1759 17:57:16.083320 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1760 17:57:16.086882 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1761 17:57:16.093315 ACPI: added table 2/32, length now 44
1762 17:57:16.093779 ACPI: * MCFG
1763 17:57:16.096524 ACPI: added table 3/32, length now 48
1764 17:57:16.100415 ACPI: * TPM2
1765 17:57:16.103130 TPM2 log created at 99a2d000
1766 17:57:16.106683 ACPI: added table 4/32, length now 52
1767 17:57:16.107201 ACPI: * MADT
1768 17:57:16.109885 SCI is IRQ9
1769 17:57:16.113388 ACPI: added table 5/32, length now 56
1770 17:57:16.113808 current = 99b43ac0
1771 17:57:16.116607 ACPI: * DMAR
1772 17:57:16.120601 ACPI: added table 6/32, length now 60
1773 17:57:16.122963 ACPI: * IGD OpRegion
1774 17:57:16.123378 GMA: Found VBT in CBFS
1775 17:57:16.126235 GMA: Found valid VBT in CBFS
1776 17:57:16.129628 ACPI: added table 7/32, length now 64
1777 17:57:16.132820 ACPI: * HPET
1778 17:57:16.136381 ACPI: added table 8/32, length now 68
1779 17:57:16.136895 ACPI: done.
1780 17:57:16.139448 ACPI tables: 31744 bytes.
1781 17:57:16.143065 smbios_write_tables: 99a2c000
1782 17:57:16.146555 EC returned error result code 3
1783 17:57:16.149867 Couldn't obtain OEM name from CBI
1784 17:57:16.153436 Create SMBIOS type 17
1785 17:57:16.157014 PCI: 00:00.0 (Intel Cannonlake)
1786 17:57:16.159746 PCI: 00:14.3 (Intel WiFi)
1787 17:57:16.163457 SMBIOS tables: 939 bytes.
1788 17:57:16.166866 Writing table forward entry at 0x00000500
1789 17:57:16.173253 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1790 17:57:16.176817 Writing coreboot table at 0x99b62000
1791 17:57:16.183419 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1792 17:57:16.186435 1. 0000000000001000-000000000009ffff: RAM
1793 17:57:16.189363 2. 00000000000a0000-00000000000fffff: RESERVED
1794 17:57:16.196174 3. 0000000000100000-0000000099a2bfff: RAM
1795 17:57:16.199262 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1796 17:57:16.206627 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1797 17:57:16.212946 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1798 17:57:16.215587 7. 000000009a000000-000000009f7fffff: RESERVED
1799 17:57:16.223267 8. 00000000e0000000-00000000efffffff: RESERVED
1800 17:57:16.225841 9. 00000000fc000000-00000000fc000fff: RESERVED
1801 17:57:16.229131 10. 00000000fe000000-00000000fe00ffff: RESERVED
1802 17:57:16.236128 11. 00000000fed10000-00000000fed17fff: RESERVED
1803 17:57:16.239276 12. 00000000fed80000-00000000fed83fff: RESERVED
1804 17:57:16.245506 13. 00000000fed90000-00000000fed91fff: RESERVED
1805 17:57:16.249448 14. 00000000feda0000-00000000feda1fff: RESERVED
1806 17:57:16.255354 15. 0000000100000000-000000045e7fffff: RAM
1807 17:57:16.258883 Graphics framebuffer located at 0xc0000000
1808 17:57:16.262255 Passing 5 GPIOs to payload:
1809 17:57:16.266004 NAME | PORT | POLARITY | VALUE
1810 17:57:16.272760 write protect | undefined | high | low
1811 17:57:16.275589 lid | undefined | high | high
1812 17:57:16.282396 power | undefined | high | low
1813 17:57:16.288520 oprom | undefined | high | low
1814 17:57:16.292690 EC in RW | 0x000000cb | high | low
1815 17:57:16.295157 Board ID: 4
1816 17:57:16.299244 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1817 17:57:16.302190 CBFS @ c08000 size 3f8000
1818 17:57:16.308697 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1819 17:57:16.312166 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1820 17:57:16.315020 coreboot table: 1492 bytes.
1821 17:57:16.318559 IMD ROOT 0. 99fff000 00001000
1822 17:57:16.321818 IMD SMALL 1. 99ffe000 00001000
1823 17:57:16.325030 FSP MEMORY 2. 99c4e000 003b0000
1824 17:57:16.328710 CONSOLE 3. 99c2e000 00020000
1825 17:57:16.332284 FMAP 4. 99c2d000 0000054e
1826 17:57:16.335364 TIME STAMP 5. 99c2c000 00000910
1827 17:57:16.338564 VBOOT WORK 6. 99c18000 00014000
1828 17:57:16.342090 MRC DATA 7. 99c16000 00001958
1829 17:57:16.345633 ROMSTG STCK 8. 99c15000 00001000
1830 17:57:16.348808 AFTER CAR 9. 99c0b000 0000a000
1831 17:57:16.352104 RAMSTAGE 10. 99baf000 0005c000
1832 17:57:16.355245 REFCODE 11. 99b7a000 00035000
1833 17:57:16.358944 SMM BACKUP 12. 99b6a000 00010000
1834 17:57:16.361486 COREBOOT 13. 99b62000 00008000
1835 17:57:16.365556 ACPI 14. 99b3e000 00024000
1836 17:57:16.368250 ACPI GNVS 15. 99b3d000 00001000
1837 17:57:16.371753 RAMOOPS 16. 99a3d000 00100000
1838 17:57:16.374988 TPM2 TCGLOG17. 99a2d000 00010000
1839 17:57:16.378763 SMBIOS 18. 99a2c000 00000800
1840 17:57:16.381828 IMD small region:
1841 17:57:16.385232 IMD ROOT 0. 99ffec00 00000400
1842 17:57:16.388734 FSP RUNTIME 1. 99ffebe0 00000004
1843 17:57:16.391848 EC HOSTEVENT 2. 99ffebc0 00000008
1844 17:57:16.395407 POWER STATE 3. 99ffeb80 00000040
1845 17:57:16.398798 ROMSTAGE 4. 99ffeb60 00000004
1846 17:57:16.401854 MEM INFO 5. 99ffe9a0 000001b9
1847 17:57:16.404810 VPD 6. 99ffe920 0000006c
1848 17:57:16.408349 MTRR: Physical address space:
1849 17:57:16.414913 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1850 17:57:16.421363 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1851 17:57:16.427828 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1852 17:57:16.434534 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1853 17:57:16.441240 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1854 17:57:16.448083 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1855 17:57:16.451108 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1856 17:57:16.458184 MTRR: Fixed MSR 0x250 0x0606060606060606
1857 17:57:16.461386 MTRR: Fixed MSR 0x258 0x0606060606060606
1858 17:57:16.464501 MTRR: Fixed MSR 0x259 0x0000000000000000
1859 17:57:16.467891 MTRR: Fixed MSR 0x268 0x0606060606060606
1860 17:57:16.474167 MTRR: Fixed MSR 0x269 0x0606060606060606
1861 17:57:16.477895 MTRR: Fixed MSR 0x26a 0x0606060606060606
1862 17:57:16.480654 MTRR: Fixed MSR 0x26b 0x0606060606060606
1863 17:57:16.484168 MTRR: Fixed MSR 0x26c 0x0606060606060606
1864 17:57:16.491013 MTRR: Fixed MSR 0x26d 0x0606060606060606
1865 17:57:16.494510 MTRR: Fixed MSR 0x26e 0x0606060606060606
1866 17:57:16.497334 MTRR: Fixed MSR 0x26f 0x0606060606060606
1867 17:57:16.500932 call enable_fixed_mtrr()
1868 17:57:16.504420 CPU physical address size: 39 bits
1869 17:57:16.507560 MTRR: default type WB/UC MTRR counts: 6/8.
1870 17:57:16.510953 MTRR: WB selected as default type.
1871 17:57:16.517525 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1872 17:57:16.524224 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1873 17:57:16.530572 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1874 17:57:16.537759 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1875 17:57:16.543884 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1876 17:57:16.550608 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1877 17:57:16.551129
1878 17:57:16.551460 MTRR check
1879 17:57:16.554247 Fixed MTRRs : Enabled
1880 17:57:16.557059 Variable MTRRs: Enabled
1881 17:57:16.557574
1882 17:57:16.560900 MTRR: Fixed MSR 0x250 0x0606060606060606
1883 17:57:16.563965 MTRR: Fixed MSR 0x258 0x0606060606060606
1884 17:57:16.570102 MTRR: Fixed MSR 0x259 0x0000000000000000
1885 17:57:16.573676 MTRR: Fixed MSR 0x268 0x0606060606060606
1886 17:57:16.576992 MTRR: Fixed MSR 0x269 0x0606060606060606
1887 17:57:16.580338 MTRR: Fixed MSR 0x26a 0x0606060606060606
1888 17:57:16.586707 MTRR: Fixed MSR 0x26b 0x0606060606060606
1889 17:57:16.590037 MTRR: Fixed MSR 0x26c 0x0606060606060606
1890 17:57:16.593477 MTRR: Fixed MSR 0x26d 0x0606060606060606
1891 17:57:16.596353 MTRR: Fixed MSR 0x26e 0x0606060606060606
1892 17:57:16.603507 MTRR: Fixed MSR 0x26f 0x0606060606060606
1893 17:57:16.606553 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1894 17:57:16.610435 call enable_fixed_mtrr()
1895 17:57:16.616810 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1896 17:57:16.620133 CPU physical address size: 39 bits
1897 17:57:16.623219 CBFS @ c08000 size 3f8000
1898 17:57:16.626852 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1899 17:57:16.633336 MTRR: Fixed MSR 0x250 0x0606060606060606
1900 17:57:16.636168 MTRR: Fixed MSR 0x250 0x0606060606060606
1901 17:57:16.639686 MTRR: Fixed MSR 0x258 0x0606060606060606
1902 17:57:16.643662 MTRR: Fixed MSR 0x259 0x0000000000000000
1903 17:57:16.646413 MTRR: Fixed MSR 0x268 0x0606060606060606
1904 17:57:16.652747 MTRR: Fixed MSR 0x269 0x0606060606060606
1905 17:57:16.656259 MTRR: Fixed MSR 0x26a 0x0606060606060606
1906 17:57:16.659814 MTRR: Fixed MSR 0x26b 0x0606060606060606
1907 17:57:16.662922 MTRR: Fixed MSR 0x26c 0x0606060606060606
1908 17:57:16.669543 MTRR: Fixed MSR 0x26d 0x0606060606060606
1909 17:57:16.673168 MTRR: Fixed MSR 0x26e 0x0606060606060606
1910 17:57:16.676396 MTRR: Fixed MSR 0x26f 0x0606060606060606
1911 17:57:16.679423 MTRR: Fixed MSR 0x258 0x0606060606060606
1912 17:57:16.683033 call enable_fixed_mtrr()
1913 17:57:16.686460 MTRR: Fixed MSR 0x259 0x0000000000000000
1914 17:57:16.692489 MTRR: Fixed MSR 0x268 0x0606060606060606
1915 17:57:16.695888 MTRR: Fixed MSR 0x269 0x0606060606060606
1916 17:57:16.699373 MTRR: Fixed MSR 0x26a 0x0606060606060606
1917 17:57:16.702856 MTRR: Fixed MSR 0x26b 0x0606060606060606
1918 17:57:16.709103 MTRR: Fixed MSR 0x26c 0x0606060606060606
1919 17:57:16.712215 MTRR: Fixed MSR 0x26d 0x0606060606060606
1920 17:57:16.715766 MTRR: Fixed MSR 0x26e 0x0606060606060606
1921 17:57:16.719089 MTRR: Fixed MSR 0x26f 0x0606060606060606
1922 17:57:16.725986 CPU physical address size: 39 bits
1923 17:57:16.726534 call enable_fixed_mtrr()
1924 17:57:16.729140 CBFS: Locating 'fallback/payload'
1925 17:57:16.732158 CPU physical address size: 39 bits
1926 17:57:16.738605 MTRR: Fixed MSR 0x250 0x0606060606060606
1927 17:57:16.742970 MTRR: Fixed MSR 0x250 0x0606060606060606
1928 17:57:16.745932 MTRR: Fixed MSR 0x258 0x0606060606060606
1929 17:57:16.749046 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 17:57:16.755654 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 17:57:16.759449 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 17:57:16.761862 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 17:57:16.765563 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 17:57:16.772499 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 17:57:16.775328 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 17:57:16.778577 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 17:57:16.782348 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 17:57:16.788872 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 17:57:16.789379 call enable_fixed_mtrr()
1940 17:57:16.795319 MTRR: Fixed MSR 0x259 0x0000000000000000
1941 17:57:16.798705 MTRR: Fixed MSR 0x268 0x0606060606060606
1942 17:57:16.802113 MTRR: Fixed MSR 0x269 0x0606060606060606
1943 17:57:16.805091 MTRR: Fixed MSR 0x26a 0x0606060606060606
1944 17:57:16.808350 MTRR: Fixed MSR 0x26b 0x0606060606060606
1945 17:57:16.815313 MTRR: Fixed MSR 0x26c 0x0606060606060606
1946 17:57:16.818219 MTRR: Fixed MSR 0x26d 0x0606060606060606
1947 17:57:16.821736 MTRR: Fixed MSR 0x26e 0x0606060606060606
1948 17:57:16.825116 MTRR: Fixed MSR 0x26f 0x0606060606060606
1949 17:57:16.831438 CPU physical address size: 39 bits
1950 17:57:16.831866 call enable_fixed_mtrr()
1951 17:57:16.838179 MTRR: Fixed MSR 0x250 0x0606060606060606
1952 17:57:16.841486 MTRR: Fixed MSR 0x250 0x0606060606060606
1953 17:57:16.845061 MTRR: Fixed MSR 0x258 0x0606060606060606
1954 17:57:16.848525 MTRR: Fixed MSR 0x259 0x0000000000000000
1955 17:57:16.854938 MTRR: Fixed MSR 0x268 0x0606060606060606
1956 17:57:16.857999 MTRR: Fixed MSR 0x269 0x0606060606060606
1957 17:57:16.861853 MTRR: Fixed MSR 0x26a 0x0606060606060606
1958 17:57:16.865325 MTRR: Fixed MSR 0x26b 0x0606060606060606
1959 17:57:16.871867 MTRR: Fixed MSR 0x26c 0x0606060606060606
1960 17:57:16.874711 MTRR: Fixed MSR 0x26d 0x0606060606060606
1961 17:57:16.878091 MTRR: Fixed MSR 0x26e 0x0606060606060606
1962 17:57:16.881584 MTRR: Fixed MSR 0x26f 0x0606060606060606
1963 17:57:16.887975 MTRR: Fixed MSR 0x258 0x0606060606060606
1964 17:57:16.891123 MTRR: Fixed MSR 0x259 0x0000000000000000
1965 17:57:16.894973 MTRR: Fixed MSR 0x268 0x0606060606060606
1966 17:57:16.898217 MTRR: Fixed MSR 0x269 0x0606060606060606
1967 17:57:16.901649 MTRR: Fixed MSR 0x26a 0x0606060606060606
1968 17:57:16.908068 MTRR: Fixed MSR 0x26b 0x0606060606060606
1969 17:57:16.911365 MTRR: Fixed MSR 0x26c 0x0606060606060606
1970 17:57:16.914687 MTRR: Fixed MSR 0x26d 0x0606060606060606
1971 17:57:16.918120 MTRR: Fixed MSR 0x26e 0x0606060606060606
1972 17:57:16.924719 MTRR: Fixed MSR 0x26f 0x0606060606060606
1973 17:57:16.925179 call enable_fixed_mtrr()
1974 17:57:16.928429 call enable_fixed_mtrr()
1975 17:57:16.930950 CPU physical address size: 39 bits
1976 17:57:16.934126 CPU physical address size: 39 bits
1977 17:57:16.941412 CPU physical address size: 39 bits
1978 17:57:16.944145 CBFS: Found @ offset 1c96c0 size 3f798
1979 17:57:16.948105 Checking segment from ROM address 0xffdd16f8
1980 17:57:16.950730 Checking segment from ROM address 0xffdd1714
1981 17:57:16.958011 Loading segment from ROM address 0xffdd16f8
1982 17:57:16.958538 code (compression=0)
1983 17:57:16.967524 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1984 17:57:16.977783 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1985 17:57:16.978302 it's not compressed!
1986 17:57:17.070946 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1987 17:57:17.077400 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1988 17:57:17.080716 Loading segment from ROM address 0xffdd1714
1989 17:57:17.083988 Entry Point 0x30000000
1990 17:57:17.087502 Loaded segments
1991 17:57:17.092801 Finalizing chipset.
1992 17:57:17.095973 Finalizing SMM.
1993 17:57:17.099400 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1994 17:57:17.102974 mp_park_aps done after 0 msecs.
1995 17:57:17.109420 Jumping to boot code at 30000000(99b62000)
1996 17:57:17.116155 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1997 17:57:17.116588
1998 17:57:17.116929
1999 17:57:17.117246
2000 17:57:17.119214 Starting depthcharge on Helios...
2001 17:57:17.119636
2002 17:57:17.120737 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2003 17:57:17.121248 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2004 17:57:17.121652 Setting prompt string to ['hatch:']
2005 17:57:17.122065 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2006 17:57:17.128930 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2007 17:57:17.129354
2008 17:57:17.135659 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2009 17:57:17.136129
2010 17:57:17.142187 board_setup: Info: eMMC controller not present; skipping
2011 17:57:17.142693
2012 17:57:17.145779 New NVMe Controller 0x30053ac0 @ 00:1d:00
2013 17:57:17.146263
2014 17:57:17.153005 board_setup: Info: SDHCI controller not present; skipping
2015 17:57:17.153522
2016 17:57:17.155773 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2017 17:57:17.156235
2018 17:57:17.159164 Wipe memory regions:
2019 17:57:17.159681
2020 17:57:17.162419 [0x00000000001000, 0x000000000a0000)
2021 17:57:17.162929
2022 17:57:17.165805 [0x00000000100000, 0x00000030000000)
2023 17:57:17.232431
2024 17:57:17.234664 [0x00000030657430, 0x00000099a2c000)
2025 17:57:17.381412
2026 17:57:17.384699 [0x00000100000000, 0x0000045e800000)
2027 17:57:18.841358
2028 17:57:18.841884 R8152: Initializing
2029 17:57:18.842292
2030 17:57:18.844036 Version 9 (ocp_data = 6010)
2031 17:57:18.848323
2032 17:57:18.848872 R8152: Done initializing
2033 17:57:18.849214
2034 17:57:18.851839 Adding net device
2035 17:57:19.334271
2036 17:57:19.334762 R8152: Initializing
2037 17:57:19.335075
2038 17:57:19.337521 Version 6 (ocp_data = 5c30)
2039 17:57:19.337907
2040 17:57:19.341139 R8152: Done initializing
2041 17:57:19.341521
2042 17:57:19.343966 net_add_device: Attemp to include the same device
2043 17:57:19.347702
2044 17:57:19.354678 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2045 17:57:19.355069
2046 17:57:19.355374
2047 17:57:19.355660
2048 17:57:19.356354 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2050 17:57:19.457030 hatch: tftpboot 192.168.201.1 11831882/tftp-deploy-yf2kmvbh/kernel/bzImage 11831882/tftp-deploy-yf2kmvbh/kernel/cmdline 11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
2051 17:57:19.457677 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2052 17:57:19.458109 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2053 17:57:19.463295 tftpboot 192.168.201.1 11831882/tftp-deploy-yf2kmvbh/kernel/bzImloy-yf2kmvbh/kernel/cmdline 11831882/tftp-deploy-yf2kmvbh/ramdisk/ramdisk.cpio.gz
2054 17:57:19.463861
2055 17:57:19.464243 Waiting for link
2056 17:57:19.663620
2057 17:57:19.664206 done.
2058 17:57:19.664525
2059 17:57:19.664821 MAC: 00:24:32:50:1a:59
2060 17:57:19.665108
2061 17:57:19.667304 Sending DHCP discover... done.
2062 17:57:19.667694
2063 17:57:19.670085 Waiting for reply... done.
2064 17:57:19.670478
2065 17:57:19.673580 Sending DHCP request... done.
2066 17:57:19.673971
2067 17:57:19.676443 Waiting for reply... done.
2068 17:57:19.676883
2069 17:57:19.680151 My ip is 192.168.201.14
2070 17:57:19.680547
2071 17:57:19.683210 The DHCP server ip is 192.168.201.1
2072 17:57:19.683600
2073 17:57:19.686465 TFTP server IP predefined by user: 192.168.201.1
2074 17:57:19.689988
2075 17:57:19.696510 Bootfile predefined by user: 11831882/tftp-deploy-yf2kmvbh/kernel/bzImage
2076 17:57:19.696927
2077 17:57:19.700081 Sending tftp read request... done.
2078 17:57:19.700569
2079 17:57:19.707325 Waiting for the transfer...
2080 17:57:19.707718
2081 17:57:20.298098 00000000 ################################################################
2082 17:57:20.298258
2083 17:57:20.884799 00080000 ################################################################
2084 17:57:20.885256
2085 17:57:21.551859 00100000 ################################################################
2086 17:57:21.552419
2087 17:57:22.251813 00180000 ################################################################
2088 17:57:22.252404
2089 17:57:22.953400 00200000 ################################################################
2090 17:57:22.953901
2091 17:57:23.656807 00280000 ################################################################
2092 17:57:23.657349
2093 17:57:24.347458 00300000 ################################################################
2094 17:57:24.347964
2095 17:57:25.042316 00380000 ################################################################
2096 17:57:25.042811
2097 17:57:25.739118 00400000 ################################################################
2098 17:57:25.739642
2099 17:57:26.358132 00480000 ################################################################
2100 17:57:26.358781
2101 17:57:27.020784 00500000 ################################################################
2102 17:57:27.021417
2103 17:57:27.642197 00580000 ################################################################
2104 17:57:27.642374
2105 17:57:28.249984 00600000 ################################################################
2106 17:57:28.250224
2107 17:57:28.945060 00680000 ################################################################
2108 17:57:28.945572
2109 17:57:29.639823 00700000 ################################################################
2110 17:57:29.640367
2111 17:57:30.254906 00780000 ################################################################
2112 17:57:30.255062
2113 17:57:30.389322 00800000 ############### done.
2114 17:57:30.389465
2115 17:57:30.392805 The bootfile was 8507280 bytes long.
2116 17:57:30.392906
2117 17:57:30.395906 Sending tftp read request... done.
2118 17:57:30.396014
2119 17:57:30.399085 Waiting for the transfer...
2120 17:57:30.399193
2121 17:57:31.063570 00000000 ################################################################
2122 17:57:31.064287
2123 17:57:31.642074 00080000 ################################################################
2124 17:57:31.642240
2125 17:57:32.215649 00100000 ################################################################
2126 17:57:32.215809
2127 17:57:32.790835 00180000 ################################################################
2128 17:57:32.790995
2129 17:57:33.416998 00200000 ################################################################
2130 17:57:33.417523
2131 17:57:34.088773 00280000 ################################################################
2132 17:57:34.089291
2133 17:57:34.769725 00300000 ################################################################
2134 17:57:34.770358
2135 17:57:35.402474 00380000 ################################################################
2136 17:57:35.402635
2137 17:57:35.971908 00400000 ################################################################
2138 17:57:35.972081
2139 17:57:36.521315 00480000 ################################################################
2140 17:57:36.521471
2141 17:57:37.044258 00500000 ################################################################
2142 17:57:37.044421
2143 17:57:37.288922 00580000 ############################# done.
2144 17:57:37.289078
2145 17:57:37.291854 Sending tftp read request... done.
2146 17:57:37.291956
2147 17:57:37.295304 Waiting for the transfer...
2148 17:57:37.295405
2149 17:57:37.295484 00000000 # done.
2150 17:57:37.295562
2151 17:57:37.305480 Command line loaded dynamically from TFTP file: 11831882/tftp-deploy-yf2kmvbh/kernel/cmdline
2152 17:57:37.305602
2153 17:57:37.335214 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/11831882/extract-nfsrootfs-zoyzvpn2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2154 17:57:37.335509
2155 17:57:37.338342 ec_init(0): CrosEC protocol v3 supported (256, 256)
2156 17:57:37.344740
2157 17:57:37.347913 Shutting down all USB controllers.
2158 17:57:37.348366
2159 17:57:37.348708 Removing current net device
2160 17:57:37.352109
2161 17:57:37.352532 Finalizing coreboot
2162 17:57:37.352873
2163 17:57:37.358752 Exiting depthcharge with code 4 at timestamp: 27579771
2164 17:57:37.359176
2165 17:57:37.359510
2166 17:57:37.359825 Starting kernel ...
2167 17:57:37.360166
2168 17:57:37.360465
2169 17:57:37.361606 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2170 17:57:37.362081 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2171 17:57:37.362449 Setting prompt string to ['Linux version [0-9]']
2172 17:57:37.362788 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 17:57:37.363129 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2175 18:01:59.362924 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2177 18:01:59.363929 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2179 18:01:59.364782 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 18:01:59.366094 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 18:01:59.367177 Cleaning after the job
2185 18:01:59.367513 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/ramdisk
2186 18:01:59.368546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/kernel
2187 18:01:59.369963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/nfsrootfs
2188 18:01:59.497341 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/11831882/tftp-deploy-yf2kmvbh/modules
2189 18:01:59.497814 start: 4.1 power-off (timeout 00:00:30) [common]
2190 18:01:59.497993 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2191 18:01:59.579688 >> Command sent successfully.
2192 18:01:59.588762 Returned 0 in 0 seconds
2193 18:01:59.690027 end: 4.1 power-off (duration 00:00:00) [common]
2195 18:01:59.691389 start: 4.2 read-feedback (timeout 00:10:00) [common]
2196 18:01:59.692773 Listened to connection for namespace 'common' for up to 1s
2198 18:01:59.694087 Listened to connection for namespace 'common' for up to 1s
2199 18:02:00.692313 Finalising connection for namespace 'common'
2200 18:02:00.692960 Disconnecting from shell: Finalise
2201 18:02:00.693338
2202 18:02:00.794436 end: 4.2 read-feedback (duration 00:00:01) [common]
2203 18:02:00.794924 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/11831882
2204 18:02:01.398531 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/11831882
2205 18:02:01.398782 JobError: Your job cannot terminate cleanly.