Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:03:59.057580 lava-dispatcher, installed at version: 2024.01
2 11:03:59.057816 start: 0 validate
3 11:03:59.057967 Start time: 2024-03-18 11:03:59.057958+00:00 (UTC)
4 11:03:59.058110 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:03:59.058257 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:03:59.333362 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:03:59.333553 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip83-rt47-235-g261e3020817c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:03:59.590579 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:03:59.590854 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:04:02.582776 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:04:02.583470 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip83-rt47-235-g261e3020817c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:04:03.590117 validate duration: 4.53
14 11:04:03.590435 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:04:03.590543 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:04:03.590638 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:04:03.590779 Not decompressing ramdisk as can be used compressed.
18 11:04:03.590871 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 11:04:03.590941 saving as /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/ramdisk/initrd.cpio.gz
20 11:04:03.591012 total size: 5431448 (5 MB)
21 11:04:03.592157 progress 0 % (0 MB)
22 11:04:03.594045 progress 5 % (0 MB)
23 11:04:03.595768 progress 10 % (0 MB)
24 11:04:03.597394 progress 15 % (0 MB)
25 11:04:03.599268 progress 20 % (1 MB)
26 11:04:03.600990 progress 25 % (1 MB)
27 11:04:03.602680 progress 30 % (1 MB)
28 11:04:03.604575 progress 35 % (1 MB)
29 11:04:03.606264 progress 40 % (2 MB)
30 11:04:03.607959 progress 45 % (2 MB)
31 11:04:03.609558 progress 50 % (2 MB)
32 11:04:03.611391 progress 55 % (2 MB)
33 11:04:03.613080 progress 60 % (3 MB)
34 11:04:03.614651 progress 65 % (3 MB)
35 11:04:03.616563 progress 70 % (3 MB)
36 11:04:03.618174 progress 75 % (3 MB)
37 11:04:03.619784 progress 80 % (4 MB)
38 11:04:03.621486 progress 85 % (4 MB)
39 11:04:03.623252 progress 90 % (4 MB)
40 11:04:03.624945 progress 95 % (4 MB)
41 11:04:03.626534 progress 100 % (5 MB)
42 11:04:03.626771 5 MB downloaded in 0.04 s (144.85 MB/s)
43 11:04:03.626942 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:04:03.627213 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:04:03.627308 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:04:03.627401 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:04:03.627551 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip83-rt47-235-g261e3020817c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:04:03.627626 saving as /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/kernel/bzImage
50 11:04:03.627693 total size: 9371536 (8 MB)
51 11:04:03.627759 No compression specified
52 11:04:03.629076 progress 0 % (0 MB)
53 11:04:03.631890 progress 5 % (0 MB)
54 11:04:03.634647 progress 10 % (0 MB)
55 11:04:03.637463 progress 15 % (1 MB)
56 11:04:03.640749 progress 20 % (1 MB)
57 11:04:03.643507 progress 25 % (2 MB)
58 11:04:03.646264 progress 30 % (2 MB)
59 11:04:03.649220 progress 35 % (3 MB)
60 11:04:03.651955 progress 40 % (3 MB)
61 11:04:03.654723 progress 45 % (4 MB)
62 11:04:03.657504 progress 50 % (4 MB)
63 11:04:03.660385 progress 55 % (4 MB)
64 11:04:03.663079 progress 60 % (5 MB)
65 11:04:03.665751 progress 65 % (5 MB)
66 11:04:03.668615 progress 70 % (6 MB)
67 11:04:03.671286 progress 75 % (6 MB)
68 11:04:03.673956 progress 80 % (7 MB)
69 11:04:03.676818 progress 85 % (7 MB)
70 11:04:03.679484 progress 90 % (8 MB)
71 11:04:03.682158 progress 95 % (8 MB)
72 11:04:03.684922 progress 100 % (8 MB)
73 11:04:03.685206 8 MB downloaded in 0.06 s (155.41 MB/s)
74 11:04:03.685390 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:04:03.685688 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:04:03.685802 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:04:03.685915 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:04:03.686086 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 11:04:03.686168 saving as /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/nfsrootfs/full.rootfs.tar
81 11:04:03.686278 total size: 133429172 (127 MB)
82 11:04:03.686390 Using unxz to decompress xz
83 11:04:03.691464 progress 0 % (0 MB)
84 11:04:04.087871 progress 5 % (6 MB)
85 11:04:04.510855 progress 10 % (12 MB)
86 11:04:04.861902 progress 15 % (19 MB)
87 11:04:05.074702 progress 20 % (25 MB)
88 11:04:05.362314 progress 25 % (31 MB)
89 11:04:05.774872 progress 30 % (38 MB)
90 11:04:06.188159 progress 35 % (44 MB)
91 11:04:06.665445 progress 40 % (50 MB)
92 11:04:07.124078 progress 45 % (57 MB)
93 11:04:07.547079 progress 50 % (63 MB)
94 11:04:07.993716 progress 55 % (70 MB)
95 11:04:08.416631 progress 60 % (76 MB)
96 11:04:08.844631 progress 65 % (82 MB)
97 11:04:09.275996 progress 70 % (89 MB)
98 11:04:09.693514 progress 75 % (95 MB)
99 11:04:10.192117 progress 80 % (101 MB)
100 11:04:10.696668 progress 85 % (108 MB)
101 11:04:11.009517 progress 90 % (114 MB)
102 11:04:11.411649 progress 95 % (120 MB)
103 11:04:11.866955 progress 100 % (127 MB)
104 11:04:11.874343 127 MB downloaded in 8.19 s (15.54 MB/s)
105 11:04:11.874744 end: 1.3.1 http-download (duration 00:00:08) [common]
107 11:04:11.875225 end: 1.3 download-retry (duration 00:00:08) [common]
108 11:04:11.875380 start: 1.4 download-retry (timeout 00:09:52) [common]
109 11:04:11.875534 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 11:04:11.875772 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip83-rt47-235-g261e3020817c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:04:11.875899 saving as /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/modules/modules.tar
112 11:04:11.876013 total size: 254088 (0 MB)
113 11:04:11.876132 Using unxz to decompress xz
114 11:04:11.882411 progress 12 % (0 MB)
115 11:04:11.883089 progress 25 % (0 MB)
116 11:04:11.883515 progress 38 % (0 MB)
117 11:04:11.885203 progress 51 % (0 MB)
118 11:04:11.887323 progress 64 % (0 MB)
119 11:04:11.889314 progress 77 % (0 MB)
120 11:04:11.891500 progress 90 % (0 MB)
121 11:04:11.893664 progress 100 % (0 MB)
122 11:04:11.900153 0 MB downloaded in 0.02 s (10.04 MB/s)
123 11:04:11.900537 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:04:11.901020 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:04:11.901187 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
127 11:04:11.901360 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
128 11:04:14.378000 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086276/extract-nfsrootfs-nwixk1d1
129 11:04:14.378231 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:04:14.378348 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
131 11:04:14.378535 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg
132 11:04:14.378689 makedir: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin
133 11:04:14.378806 makedir: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/tests
134 11:04:14.378919 makedir: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/results
135 11:04:14.379033 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-add-keys
136 11:04:14.379193 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-add-sources
137 11:04:14.379339 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-background-process-start
138 11:04:14.379483 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-background-process-stop
139 11:04:14.379625 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-common-functions
140 11:04:14.379765 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-echo-ipv4
141 11:04:14.379906 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-install-packages
142 11:04:14.380047 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-installed-packages
143 11:04:14.380186 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-os-build
144 11:04:14.380340 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-probe-channel
145 11:04:14.380482 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-probe-ip
146 11:04:14.380623 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-target-ip
147 11:04:14.380763 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-target-mac
148 11:04:14.380901 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-target-storage
149 11:04:14.381045 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-case
150 11:04:14.381185 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-event
151 11:04:14.381324 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-feedback
152 11:04:14.381462 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-raise
153 11:04:14.381603 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-reference
154 11:04:14.381744 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-runner
155 11:04:14.381885 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-set
156 11:04:14.382024 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-test-shell
157 11:04:14.382167 Updating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-install-packages (oe)
158 11:04:14.382339 Updating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/bin/lava-installed-packages (oe)
159 11:04:14.382477 Creating /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/environment
160 11:04:14.382585 LAVA metadata
161 11:04:14.382664 - LAVA_JOB_ID=13086276
162 11:04:14.382735 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:04:14.382856 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
164 11:04:14.382939 skipped lava-vland-overlay
165 11:04:14.383061 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:04:14.383232 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
167 11:04:14.383334 skipped lava-multinode-overlay
168 11:04:14.383421 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:04:14.383511 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
170 11:04:14.383598 Loading test definitions
171 11:04:14.383697 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
172 11:04:14.383777 Using /lava-13086276 at stage 0
173 11:04:14.384136 uuid=13086276_1.5.2.3.1 testdef=None
174 11:04:14.384235 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:04:14.384344 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
176 11:04:14.384915 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:04:14.385158 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
179 11:04:14.385885 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:04:14.386139 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
182 11:04:14.386834 runner path: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/0/tests/0_dmesg test_uuid 13086276_1.5.2.3.1
183 11:04:14.387014 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:04:14.387261 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:49) [common]
186 11:04:14.387340 Using /lava-13086276 at stage 1
187 11:04:14.387686 uuid=13086276_1.5.2.3.5 testdef=None
188 11:04:14.387783 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:04:14.387875 start: 1.5.2.3.6 test-overlay (timeout 00:09:49) [common]
190 11:04:14.388413 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:04:14.388653 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:49) [common]
193 11:04:14.389375 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:04:14.389626 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:49) [common]
196 11:04:14.390328 runner path: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/1/tests/1_bootrr test_uuid 13086276_1.5.2.3.5
197 11:04:14.390500 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:04:14.390726 Creating lava-test-runner.conf files
200 11:04:14.390795 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/0 for stage 0
201 11:04:14.390892 - 0_dmesg
202 11:04:14.390979 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086276/lava-overlay-ahzz8vcg/lava-13086276/1 for stage 1
203 11:04:14.391081 - 1_bootrr
204 11:04:14.391187 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:04:14.391281 start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
206 11:04:14.399689 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:04:14.399854 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:49) [common]
208 11:04:14.399955 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:04:14.400052 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:04:14.400146 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:49) [common]
211 11:04:14.556346 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:04:14.556766 start: 1.5.4 extract-modules (timeout 00:09:49) [common]
213 11:04:14.556891 extracting modules file /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086276/extract-nfsrootfs-nwixk1d1
214 11:04:14.574050 extracting modules file /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086276/extract-overlay-ramdisk-ortvkoko/ramdisk
215 11:04:14.589373 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:04:14.589543 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
217 11:04:14.589652 [common] Applying overlay to NFS
218 11:04:14.589733 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086276/compress-overlay-1qdjqxbw/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086276/extract-nfsrootfs-nwixk1d1
219 11:04:14.599231 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:04:14.599386 start: 1.5.6 configure-preseed-file (timeout 00:09:49) [common]
221 11:04:14.599491 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:04:14.599593 start: 1.5.7 compress-ramdisk (timeout 00:09:49) [common]
223 11:04:14.599685 Building ramdisk /var/lib/lava/dispatcher/tmp/13086276/extract-overlay-ramdisk-ortvkoko/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086276/extract-overlay-ramdisk-ortvkoko/ramdisk
224 11:04:14.679618 >> 26190 blocks
225 11:04:15.277782 rename /var/lib/lava/dispatcher/tmp/13086276/extract-overlay-ramdisk-ortvkoko/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
226 11:04:15.278272 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:04:15.278406 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
228 11:04:15.278515 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
229 11:04:15.278616 No mkimage arch provided, not using FIT.
230 11:04:15.278714 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:04:15.278812 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:04:15.278928 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 11:04:15.279031 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:48) [common]
234 11:04:15.279130 No LXC device requested
235 11:04:15.279219 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:04:15.279316 start: 1.7 deploy-device-env (timeout 00:09:48) [common]
237 11:04:15.279409 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:04:15.279489 Checking files for TFTP limit of 4294967296 bytes.
239 11:04:15.279942 end: 1 tftp-deploy (duration 00:00:12) [common]
240 11:04:15.280056 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:04:15.280159 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:04:15.280312 substitutions:
243 11:04:15.280390 - {DTB}: None
244 11:04:15.280458 - {INITRD}: 13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
245 11:04:15.280524 - {KERNEL}: 13086276/tftp-deploy-ih3x6w6x/kernel/bzImage
246 11:04:15.280591 - {LAVA_MAC}: None
247 11:04:15.280655 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086276/extract-nfsrootfs-nwixk1d1
248 11:04:15.280718 - {NFS_SERVER_IP}: 192.168.201.1
249 11:04:15.280780 - {PRESEED_CONFIG}: None
250 11:04:15.280839 - {PRESEED_LOCAL}: None
251 11:04:15.280898 - {RAMDISK}: 13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
252 11:04:15.280957 - {ROOT_PART}: None
253 11:04:15.281018 - {ROOT}: None
254 11:04:15.281076 - {SERVER_IP}: 192.168.201.1
255 11:04:15.281135 - {TEE}: None
256 11:04:15.281194 Parsed boot commands:
257 11:04:15.281253 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:04:15.281448 Parsed boot commands: tftpboot 192.168.201.1 13086276/tftp-deploy-ih3x6w6x/kernel/bzImage 13086276/tftp-deploy-ih3x6w6x/kernel/cmdline 13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
259 11:04:15.281546 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:04:15.281644 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:04:15.281744 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:04:15.281841 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:04:15.281920 Not connected, no need to disconnect.
264 11:04:15.282004 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:04:15.282097 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:04:15.282171 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
267 11:04:15.286584 Setting prompt string to ['lava-test: # ']
268 11:04:15.286977 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:04:15.287096 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:04:15.287200 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:04:15.287301 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:04:15.287520 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
273 11:04:20.422407 >> Command sent successfully.
274 11:04:20.425027 Returned 0 in 5 seconds
275 11:04:20.525446 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:04:20.525815 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:04:20.525929 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:04:20.526073 Setting prompt string to 'Starting depthcharge on Helios...'
280 11:04:20.526159 Changing prompt to 'Starting depthcharge on Helios...'
281 11:04:20.526240 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 11:04:20.526529 [Enter `^Ec?' for help]
283 11:04:21.147677
284 11:04:21.147831
285 11:04:21.157658 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 11:04:21.160669 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 11:04:21.167493 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 11:04:21.170785 CPU: AES supported, TXT NOT supported, VT supported
289 11:04:21.178192 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 11:04:21.181018 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 11:04:21.187441 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 11:04:21.190934 VBOOT: Loading verstage.
293 11:04:21.194151 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 11:04:21.200879 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 11:04:21.204651 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 11:04:21.208148 CBFS @ c08000 size 3f8000
297 11:04:21.214083 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 11:04:21.217389 CBFS: Locating 'fallback/verstage'
299 11:04:21.221141 CBFS: Found @ offset 10fb80 size 1072c
300 11:04:21.221232
301 11:04:21.221302
302 11:04:21.234588 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 11:04:21.247993 Probing TPM: . done!
304 11:04:21.251493 TPM ready after 0 ms
305 11:04:21.254440 Connected to device vid:did:rid of 1ae0:0028:00
306 11:04:21.264846 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 11:04:21.268414 Initialized TPM device CR50 revision 0
308 11:04:21.312798 tlcl_send_startup: Startup return code is 0
309 11:04:21.312908 TPM: setup succeeded
310 11:04:21.325920 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 11:04:21.329512 Chrome EC: UHEPI supported
312 11:04:21.332706 Phase 1
313 11:04:21.335911 FMAP: area GBB found @ c05000 (12288 bytes)
314 11:04:21.342895 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 11:04:21.342986 Phase 2
316 11:04:21.346012 Phase 3
317 11:04:21.349756 FMAP: area GBB found @ c05000 (12288 bytes)
318 11:04:21.355998 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 11:04:21.362913 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
320 11:04:21.366352 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 11:04:21.372734 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 11:04:21.387979 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
323 11:04:21.391743 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
324 11:04:21.398145 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 11:04:21.402660 Phase 4
326 11:04:21.405618 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
327 11:04:21.412541 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 11:04:21.591401 VB2:vb2_rsa_verify_digest() Digest check failed!
329 11:04:21.598193 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 11:04:21.598287 Saving nvdata
331 11:04:21.601974 Reboot requested (10020007)
332 11:04:21.604978 board_reset() called!
333 11:04:21.605074 full_reset() called!
334 11:04:26.114312
335 11:04:26.114801
336 11:04:26.123345 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 11:04:26.126690 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 11:04:26.133488 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 11:04:26.136910 CPU: AES supported, TXT NOT supported, VT supported
340 11:04:26.143535 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 11:04:26.146976 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 11:04:26.153650 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 11:04:26.156959 VBOOT: Loading verstage.
344 11:04:26.160316 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 11:04:26.167248 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 11:04:26.170462 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 11:04:26.173566 CBFS @ c08000 size 3f8000
348 11:04:26.180630 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 11:04:26.183943 CBFS: Locating 'fallback/verstage'
350 11:04:26.186699 CBFS: Found @ offset 10fb80 size 1072c
351 11:04:26.190714
352 11:04:26.191169
353 11:04:26.200854 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 11:04:26.215542 Probing TPM: . done!
355 11:04:26.218229 TPM ready after 0 ms
356 11:04:26.222012 Connected to device vid:did:rid of 1ae0:0028:00
357 11:04:26.232203 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 11:04:26.235723 Initialized TPM device CR50 revision 0
359 11:04:26.281060 tlcl_send_startup: Startup return code is 0
360 11:04:26.281573 TPM: setup succeeded
361 11:04:26.293704 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 11:04:26.297391 Chrome EC: UHEPI supported
363 11:04:26.300592 Phase 1
364 11:04:26.304610 FMAP: area GBB found @ c05000 (12288 bytes)
365 11:04:26.310803 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 11:04:26.317214 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 11:04:26.320776 Recovery requested (1009000e)
368 11:04:26.326246 Saving nvdata
369 11:04:26.332229 tlcl_extend: response is 0
370 11:04:26.341581 tlcl_extend: response is 0
371 11:04:26.348668 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 11:04:26.352303 CBFS @ c08000 size 3f8000
373 11:04:26.358456 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 11:04:26.361464 CBFS: Locating 'fallback/romstage'
375 11:04:26.365051 CBFS: Found @ offset 80 size 145fc
376 11:04:26.368332 Accumulated console time in verstage 98 ms
377 11:04:26.368754
378 11:04:26.369086
379 11:04:26.381607 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 11:04:26.384807 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 11:04:26.392459 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 11:04:26.395393 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 11:04:26.398515 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 11:04:26.405030 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 11:04:26.408749 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 11:04:26.411788 TCO_STS: 0000 0000
387 11:04:26.414948 GEN_PMCON: e0015238 00000200
388 11:04:26.418332 GBLRST_CAUSE: 00000000 00000000
389 11:04:26.418759 prev_sleep_state 5
390 11:04:26.421862 Boot Count incremented to 72692
391 11:04:26.428571 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 11:04:26.431684 CBFS @ c08000 size 3f8000
393 11:04:26.435377 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 11:04:26.438383 CBFS: Locating 'fspm.bin'
395 11:04:26.442074 CBFS: Found @ offset 5ffc0 size 71000
396 11:04:26.445182 Chrome EC: UHEPI supported
397 11:04:26.452979 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 11:04:26.458317 Probing TPM: done!
399 11:04:26.464896 Connected to device vid:did:rid of 1ae0:0028:00
400 11:04:26.474362 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 11:04:26.480322 Initialized TPM device CR50 revision 0
402 11:04:26.489420 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 11:04:26.496308 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 11:04:26.499261 MRC cache found, size 1948
405 11:04:26.502751 bootmode is set to: 2
406 11:04:26.506560 PRMRR disabled by config.
407 11:04:26.507108 SPD INDEX = 1
408 11:04:26.512760 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 11:04:26.516493 CBFS @ c08000 size 3f8000
410 11:04:26.519566 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 11:04:26.523007 CBFS: Locating 'spd.bin'
412 11:04:26.526386 CBFS: Found @ offset 5fb80 size 400
413 11:04:26.529545 SPD: module type is LPDDR3
414 11:04:26.532802 SPD: module part is
415 11:04:26.539234 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 11:04:26.543312 SPD: device width 4 bits, bus width 8 bits
417 11:04:26.546394 SPD: module size is 4096 MB (per channel)
418 11:04:26.549470 memory slot: 0 configuration done.
419 11:04:26.552578 memory slot: 2 configuration done.
420 11:04:26.603796 CBMEM:
421 11:04:26.607382 IMD: root @ 99fff000 254 entries.
422 11:04:26.610675 IMD: root @ 99ffec00 62 entries.
423 11:04:26.613605 External stage cache:
424 11:04:26.616982 IMD: root @ 9abff000 254 entries.
425 11:04:26.620609 IMD: root @ 9abfec00 62 entries.
426 11:04:26.624049 Chrome EC: clear events_b mask to 0x0000000020004000
427 11:04:26.640440 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 11:04:26.653074 tlcl_write: response is 0
429 11:04:26.661956 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 11:04:26.668715 MRC: TPM MRC hash updated successfully.
431 11:04:26.669137 2 DIMMs found
432 11:04:26.671980 SMM Memory Map
433 11:04:26.675574 SMRAM : 0x9a000000 0x1000000
434 11:04:26.679060 Subregion 0: 0x9a000000 0xa00000
435 11:04:26.682147 Subregion 1: 0x9aa00000 0x200000
436 11:04:26.686031 Subregion 2: 0x9ac00000 0x400000
437 11:04:26.688879 top_of_ram = 0x9a000000
438 11:04:26.691927 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 11:04:26.698516 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 11:04:26.702097 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 11:04:26.708708 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 11:04:26.711725 CBFS @ c08000 size 3f8000
443 11:04:26.715207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 11:04:26.718229 CBFS: Locating 'fallback/postcar'
445 11:04:26.722076 CBFS: Found @ offset 107000 size 4b44
446 11:04:26.728176 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 11:04:26.739992 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 11:04:26.743744 Processing 180 relocs. Offset value of 0x97c0c000
449 11:04:26.752303 Accumulated console time in romstage 286 ms
450 11:04:26.752820
451 11:04:26.753155
452 11:04:26.762379 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 11:04:26.768790 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 11:04:26.771960 CBFS @ c08000 size 3f8000
455 11:04:26.775955 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 11:04:26.779088 CBFS: Locating 'fallback/ramstage'
457 11:04:26.785902 CBFS: Found @ offset 43380 size 1b9e8
458 11:04:26.791898 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 11:04:26.823926 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 11:04:26.826991 Processing 3976 relocs. Offset value of 0x98db0000
461 11:04:26.833900 Accumulated console time in postcar 52 ms
462 11:04:26.834322
463 11:04:26.834656
464 11:04:26.844032 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 11:04:26.850411 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 11:04:26.853552 WARNING: RO_VPD is uninitialized or empty.
467 11:04:26.857409 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 11:04:26.863916 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 11:04:26.864562 Normal boot.
470 11:04:26.870512 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 11:04:26.873871 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 11:04:26.877269 CBFS @ c08000 size 3f8000
473 11:04:26.883542 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 11:04:26.886863 CBFS: Locating 'cpu_microcode_blob.bin'
475 11:04:26.890412 CBFS: Found @ offset 14700 size 2ec00
476 11:04:26.893578 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 11:04:26.897171 Skip microcode update
478 11:04:26.900177 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 11:04:26.903665 CBFS @ c08000 size 3f8000
480 11:04:26.909998 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 11:04:26.913867 CBFS: Locating 'fsps.bin'
482 11:04:26.916812 CBFS: Found @ offset d1fc0 size 35000
483 11:04:26.941836 Detected 4 core, 8 thread CPU.
484 11:04:26.945587 Setting up SMI for CPU
485 11:04:26.948394 IED base = 0x9ac00000
486 11:04:26.948819 IED size = 0x00400000
487 11:04:26.951564 Will perform SMM setup.
488 11:04:26.958673 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 11:04:26.965348 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 11:04:26.968568 Processing 16 relocs. Offset value of 0x00030000
491 11:04:26.972140 Attempting to start 7 APs
492 11:04:26.975521 Waiting for 10ms after sending INIT.
493 11:04:26.991935 Waiting for 1st SIPI to complete...done.
494 11:04:26.992543 AP: slot 4 apic_id 2.
495 11:04:26.994588 AP: slot 1 apic_id 3.
496 11:04:26.998294 AP: slot 2 apic_id 6.
497 11:04:26.998772 AP: slot 7 apic_id 7.
498 11:04:27.001377 AP: slot 3 apic_id 1.
499 11:04:27.005195 Waiting for 2nd SIPI to complete...done.
500 11:04:27.007830 AP: slot 5 apic_id 4.
501 11:04:27.011358 AP: slot 6 apic_id 5.
502 11:04:27.017973 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 11:04:27.024427 Processing 13 relocs. Offset value of 0x00038000
504 11:04:27.028128 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 11:04:27.034406 Installing SMM handler to 0x9a000000
506 11:04:27.041550 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 11:04:27.047952 Processing 658 relocs. Offset value of 0x9a010000
508 11:04:27.055186 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 11:04:27.058186 Processing 13 relocs. Offset value of 0x9a008000
510 11:04:27.064628 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 11:04:27.071153 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 11:04:27.075084 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 11:04:27.081049 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 11:04:27.087818 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 11:04:27.094120 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 11:04:27.097928 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 11:04:27.104117 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 11:04:27.107884 Clearing SMI status registers
519 11:04:27.111127 SMI_STS: PM1
520 11:04:27.111674 PM1_STS: PWRBTN
521 11:04:27.114200 TCO_STS: SECOND_TO
522 11:04:27.117433 New SMBASE 0x9a000000
523 11:04:27.121101 In relocation handler: CPU 0
524 11:04:27.124384 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 11:04:27.127765 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 11:04:27.130965 Relocation complete.
527 11:04:27.134396 New SMBASE 0x99fff400
528 11:04:27.134952 In relocation handler: CPU 3
529 11:04:27.141003 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 11:04:27.144466 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 11:04:27.148038 Relocation complete.
532 11:04:27.148620 New SMBASE 0x99fff000
533 11:04:27.151383 In relocation handler: CPU 4
534 11:04:27.157767 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
535 11:04:27.161024 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 11:04:27.164196 Relocation complete.
537 11:04:27.164652 New SMBASE 0x99fffc00
538 11:04:27.167588 In relocation handler: CPU 1
539 11:04:27.174055 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
540 11:04:27.177408 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 11:04:27.180651 Relocation complete.
542 11:04:27.181068 New SMBASE 0x99ffe400
543 11:04:27.184186 In relocation handler: CPU 7
544 11:04:27.187638 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
545 11:04:27.194473 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 11:04:27.197555 Relocation complete.
547 11:04:27.197971 New SMBASE 0x99fff800
548 11:04:27.200599 In relocation handler: CPU 2
549 11:04:27.204566 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
550 11:04:27.210716 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 11:04:27.211207 Relocation complete.
552 11:04:27.214482 New SMBASE 0x99ffe800
553 11:04:27.217573 In relocation handler: CPU 6
554 11:04:27.220609 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
555 11:04:27.227738 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 11:04:27.228225 Relocation complete.
557 11:04:27.230862 New SMBASE 0x99ffec00
558 11:04:27.234154 In relocation handler: CPU 5
559 11:04:27.237151 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
560 11:04:27.244216 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 11:04:27.244666 Relocation complete.
562 11:04:27.247446 Initializing CPU #0
563 11:04:27.250389 CPU: vendor Intel device 806ec
564 11:04:27.254160 CPU: family 06, model 8e, stepping 0c
565 11:04:27.257382 Clearing out pending MCEs
566 11:04:27.260312 Setting up local APIC...
567 11:04:27.260734 apic_id: 0x00 done.
568 11:04:27.263786 Turbo is available but hidden
569 11:04:27.267263 Turbo is available and visible
570 11:04:27.270967 VMX status: enabled
571 11:04:27.273839 IA32_FEATURE_CONTROL status: locked
572 11:04:27.274301 Skip microcode update
573 11:04:27.277270 CPU #0 initialized
574 11:04:27.280752 Initializing CPU #3
575 11:04:27.281190 Initializing CPU #7
576 11:04:27.284184 Initializing CPU #2
577 11:04:27.287706 CPU: vendor Intel device 806ec
578 11:04:27.290746 CPU: family 06, model 8e, stepping 0c
579 11:04:27.293791 CPU: vendor Intel device 806ec
580 11:04:27.297442 CPU: family 06, model 8e, stepping 0c
581 11:04:27.300699 Clearing out pending MCEs
582 11:04:27.304626 Clearing out pending MCEs
583 11:04:27.305101 Setting up local APIC...
584 11:04:27.307148 Initializing CPU #6
585 11:04:27.311002 Initializing CPU #4
586 11:04:27.311580 Initializing CPU #1
587 11:04:27.314242 CPU: vendor Intel device 806ec
588 11:04:27.317292 CPU: family 06, model 8e, stepping 0c
589 11:04:27.320530 CPU: vendor Intel device 806ec
590 11:04:27.323887 CPU: family 06, model 8e, stepping 0c
591 11:04:27.327782 Clearing out pending MCEs
592 11:04:27.330788 Clearing out pending MCEs
593 11:04:27.333919 Setting up local APIC...
594 11:04:27.337963 CPU: vendor Intel device 806ec
595 11:04:27.340811 CPU: family 06, model 8e, stepping 0c
596 11:04:27.341310 Initializing CPU #5
597 11:04:27.343854 Clearing out pending MCEs
598 11:04:27.346955 CPU: vendor Intel device 806ec
599 11:04:27.350812 CPU: family 06, model 8e, stepping 0c
600 11:04:27.353760 Setting up local APIC...
601 11:04:27.357059 apic_id: 0x03 done.
602 11:04:27.360488 Setting up local APIC...
603 11:04:27.360988 CPU: vendor Intel device 806ec
604 11:04:27.366876 CPU: family 06, model 8e, stepping 0c
605 11:04:27.367318 Clearing out pending MCEs
606 11:04:27.370323 apic_id: 0x05 done.
607 11:04:27.373595 Clearing out pending MCEs
608 11:04:27.374016 VMX status: enabled
609 11:04:27.377456 Setting up local APIC...
610 11:04:27.380695 VMX status: enabled
611 11:04:27.381108 apic_id: 0x02 done.
612 11:04:27.387245 IA32_FEATURE_CONTROL status: locked
613 11:04:27.387662 VMX status: enabled
614 11:04:27.390417 Skip microcode update
615 11:04:27.394253 IA32_FEATURE_CONTROL status: locked
616 11:04:27.394779 CPU #1 initialized
617 11:04:27.397291 Skip microcode update
618 11:04:27.400240 IA32_FEATURE_CONTROL status: locked
619 11:04:27.403463 apic_id: 0x04 done.
620 11:04:27.407017 Skip microcode update
621 11:04:27.407435 CPU #4 initialized
622 11:04:27.410746 Setting up local APIC...
623 11:04:27.413682 Setting up local APIC...
624 11:04:27.414255 VMX status: enabled
625 11:04:27.417238 CPU #6 initialized
626 11:04:27.420241 IA32_FEATURE_CONTROL status: locked
627 11:04:27.423926 apic_id: 0x06 done.
628 11:04:27.424478 apic_id: 0x07 done.
629 11:04:27.426841 VMX status: enabled
630 11:04:27.427251 VMX status: enabled
631 11:04:27.434158 IA32_FEATURE_CONTROL status: locked
632 11:04:27.436908 IA32_FEATURE_CONTROL status: locked
633 11:04:27.437322 Skip microcode update
634 11:04:27.440087 Skip microcode update
635 11:04:27.443901 apic_id: 0x01 done.
636 11:04:27.444368 Skip microcode update
637 11:04:27.446911 CPU #2 initialized
638 11:04:27.447322 CPU #7 initialized
639 11:04:27.450031 CPU #5 initialized
640 11:04:27.453959 VMX status: enabled
641 11:04:27.456956 IA32_FEATURE_CONTROL status: locked
642 11:04:27.457368 Skip microcode update
643 11:04:27.460160 CPU #3 initialized
644 11:04:27.463686 bsp_do_flight_plan done after 456 msecs.
645 11:04:27.466806 CPU: frequency set to 4200 MHz
646 11:04:27.470191 Enabling SMIs.
647 11:04:27.470603 Locking SMM.
648 11:04:27.485730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 11:04:27.488578 CBFS @ c08000 size 3f8000
650 11:04:27.495085 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 11:04:27.495501 CBFS: Locating 'vbt.bin'
652 11:04:27.498969 CBFS: Found @ offset 5f5c0 size 499
653 11:04:27.505276 Found a VBT of 4608 bytes after decompression
654 11:04:27.689066 Display FSP Version Info HOB
655 11:04:27.692867 Reference Code - CPU = 9.0.1e.30
656 11:04:27.695956 uCode Version = 0.0.0.ca
657 11:04:27.699654 TXT ACM version = ff.ff.ff.ffff
658 11:04:27.702459 Display FSP Version Info HOB
659 11:04:27.706395 Reference Code - ME = 9.0.1e.30
660 11:04:27.709565 MEBx version = 0.0.0.0
661 11:04:27.712967 ME Firmware Version = Consumer SKU
662 11:04:27.715786 Display FSP Version Info HOB
663 11:04:27.719050 Reference Code - CML PCH = 9.0.1e.30
664 11:04:27.719469 PCH-CRID Status = Disabled
665 11:04:27.726109 PCH-CRID Original Value = ff.ff.ff.ffff
666 11:04:27.729177 PCH-CRID New Value = ff.ff.ff.ffff
667 11:04:27.733016 OPROM - RST - RAID = ff.ff.ff.ffff
668 11:04:27.736604 ChipsetInit Base Version = ff.ff.ff.ffff
669 11:04:27.739577 ChipsetInit Oem Version = ff.ff.ff.ffff
670 11:04:27.742525 Display FSP Version Info HOB
671 11:04:27.746288 Reference Code - SA - System Agent = 9.0.1e.30
672 11:04:27.749432 Reference Code - MRC = 0.7.1.6c
673 11:04:27.752895 SA - PCIe Version = 9.0.1e.30
674 11:04:27.755741 SA-CRID Status = Disabled
675 11:04:27.759436 SA-CRID Original Value = 0.0.0.c
676 11:04:27.762764 SA-CRID New Value = 0.0.0.c
677 11:04:27.765874 OPROM - VBIOS = ff.ff.ff.ffff
678 11:04:27.766389 RTC Init
679 11:04:27.772371 Set power on after power failure.
680 11:04:27.772789 Disabling Deep S3
681 11:04:27.775717 Disabling Deep S3
682 11:04:27.776128 Disabling Deep S4
683 11:04:27.779502 Disabling Deep S4
684 11:04:27.779912 Disabling Deep S5
685 11:04:27.782219 Disabling Deep S5
686 11:04:27.789002 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1
687 11:04:27.789427 Enumerating buses...
688 11:04:27.795705 Show all devs... Before device enumeration.
689 11:04:27.796213 Root Device: enabled 1
690 11:04:27.798845 CPU_CLUSTER: 0: enabled 1
691 11:04:27.802457 DOMAIN: 0000: enabled 1
692 11:04:27.802875 APIC: 00: enabled 1
693 11:04:27.806184 PCI: 00:00.0: enabled 1
694 11:04:27.809415 PCI: 00:02.0: enabled 1
695 11:04:27.812397 PCI: 00:04.0: enabled 0
696 11:04:27.812815 PCI: 00:05.0: enabled 0
697 11:04:27.815427 PCI: 00:12.0: enabled 1
698 11:04:27.818926 PCI: 00:12.5: enabled 0
699 11:04:27.821984 PCI: 00:12.6: enabled 0
700 11:04:27.822422 PCI: 00:14.0: enabled 1
701 11:04:27.825745 PCI: 00:14.1: enabled 0
702 11:04:27.828903 PCI: 00:14.3: enabled 1
703 11:04:27.831986 PCI: 00:14.5: enabled 0
704 11:04:27.832455 PCI: 00:15.0: enabled 1
705 11:04:27.835283 PCI: 00:15.1: enabled 1
706 11:04:27.839111 PCI: 00:15.2: enabled 0
707 11:04:27.842522 PCI: 00:15.3: enabled 0
708 11:04:27.843052 PCI: 00:16.0: enabled 1
709 11:04:27.845438 PCI: 00:16.1: enabled 0
710 11:04:27.848605 PCI: 00:16.2: enabled 0
711 11:04:27.849111 PCI: 00:16.3: enabled 0
712 11:04:27.851700 PCI: 00:16.4: enabled 0
713 11:04:27.855603 PCI: 00:16.5: enabled 0
714 11:04:27.858658 PCI: 00:17.0: enabled 1
715 11:04:27.859092 PCI: 00:19.0: enabled 1
716 11:04:27.861908 PCI: 00:19.1: enabled 0
717 11:04:27.865055 PCI: 00:19.2: enabled 0
718 11:04:27.868193 PCI: 00:1a.0: enabled 0
719 11:04:27.868705 PCI: 00:1c.0: enabled 0
720 11:04:27.871782 PCI: 00:1c.1: enabled 0
721 11:04:27.874869 PCI: 00:1c.2: enabled 0
722 11:04:27.878292 PCI: 00:1c.3: enabled 0
723 11:04:27.878710 PCI: 00:1c.4: enabled 0
724 11:04:27.881928 PCI: 00:1c.5: enabled 0
725 11:04:27.884729 PCI: 00:1c.6: enabled 0
726 11:04:27.888338 PCI: 00:1c.7: enabled 0
727 11:04:27.888754 PCI: 00:1d.0: enabled 1
728 11:04:27.891457 PCI: 00:1d.1: enabled 0
729 11:04:27.894703 PCI: 00:1d.2: enabled 0
730 11:04:27.895119 PCI: 00:1d.3: enabled 0
731 11:04:27.898075 PCI: 00:1d.4: enabled 0
732 11:04:27.901779 PCI: 00:1d.5: enabled 1
733 11:04:27.905218 PCI: 00:1e.0: enabled 1
734 11:04:27.905656 PCI: 00:1e.1: enabled 0
735 11:04:27.908364 PCI: 00:1e.2: enabled 1
736 11:04:27.911622 PCI: 00:1e.3: enabled 1
737 11:04:27.914675 PCI: 00:1f.0: enabled 1
738 11:04:27.915195 PCI: 00:1f.1: enabled 1
739 11:04:27.917860 PCI: 00:1f.2: enabled 1
740 11:04:27.921310 PCI: 00:1f.3: enabled 1
741 11:04:27.924902 PCI: 00:1f.4: enabled 1
742 11:04:27.925313 PCI: 00:1f.5: enabled 1
743 11:04:27.928049 PCI: 00:1f.6: enabled 0
744 11:04:27.931712 USB0 port 0: enabled 1
745 11:04:27.932312 I2C: 00:15: enabled 1
746 11:04:27.934682 I2C: 00:5d: enabled 1
747 11:04:27.938104 GENERIC: 0.0: enabled 1
748 11:04:27.938523 I2C: 00:1a: enabled 1
749 11:04:27.941447 I2C: 00:38: enabled 1
750 11:04:27.944957 I2C: 00:39: enabled 1
751 11:04:27.945372 I2C: 00:3a: enabled 1
752 11:04:27.948092 I2C: 00:3b: enabled 1
753 11:04:27.951193 PCI: 00:00.0: enabled 1
754 11:04:27.951622 SPI: 00: enabled 1
755 11:04:27.954391 SPI: 01: enabled 1
756 11:04:27.957908 PNP: 0c09.0: enabled 1
757 11:04:27.960889 USB2 port 0: enabled 1
758 11:04:27.961318 USB2 port 1: enabled 1
759 11:04:27.964584 USB2 port 2: enabled 0
760 11:04:27.967850 USB2 port 3: enabled 0
761 11:04:27.968418 USB2 port 5: enabled 0
762 11:04:27.971040 USB2 port 6: enabled 1
763 11:04:27.974175 USB2 port 9: enabled 1
764 11:04:27.974604 USB3 port 0: enabled 1
765 11:04:27.977979 USB3 port 1: enabled 1
766 11:04:27.980793 USB3 port 2: enabled 1
767 11:04:27.984585 USB3 port 3: enabled 1
768 11:04:27.985089 USB3 port 4: enabled 0
769 11:04:27.987707 APIC: 03: enabled 1
770 11:04:27.988133 APIC: 06: enabled 1
771 11:04:27.991243 APIC: 01: enabled 1
772 11:04:27.993975 APIC: 02: enabled 1
773 11:04:27.994413 APIC: 04: enabled 1
774 11:04:27.997501 APIC: 05: enabled 1
775 11:04:28.000936 APIC: 07: enabled 1
776 11:04:28.001448 Compare with tree...
777 11:04:28.005081 Root Device: enabled 1
778 11:04:28.008133 CPU_CLUSTER: 0: enabled 1
779 11:04:28.008739 APIC: 00: enabled 1
780 11:04:28.010706 APIC: 03: enabled 1
781 11:04:28.014126 APIC: 06: enabled 1
782 11:04:28.014660 APIC: 01: enabled 1
783 11:04:28.017302 APIC: 02: enabled 1
784 11:04:28.020891 APIC: 04: enabled 1
785 11:04:28.021356 APIC: 05: enabled 1
786 11:04:28.024184 APIC: 07: enabled 1
787 11:04:28.027229 DOMAIN: 0000: enabled 1
788 11:04:28.030904 PCI: 00:00.0: enabled 1
789 11:04:28.031471 PCI: 00:02.0: enabled 1
790 11:04:28.034003 PCI: 00:04.0: enabled 0
791 11:04:28.037117 PCI: 00:05.0: enabled 0
792 11:04:28.040502 PCI: 00:12.0: enabled 1
793 11:04:28.044294 PCI: 00:12.5: enabled 0
794 11:04:28.044749 PCI: 00:12.6: enabled 0
795 11:04:28.047234 PCI: 00:14.0: enabled 1
796 11:04:28.050898 USB0 port 0: enabled 1
797 11:04:28.053953 USB2 port 0: enabled 1
798 11:04:28.057136 USB2 port 1: enabled 1
799 11:04:28.060684 USB2 port 2: enabled 0
800 11:04:28.061220 USB2 port 3: enabled 0
801 11:04:28.064058 USB2 port 5: enabled 0
802 11:04:28.067326 USB2 port 6: enabled 1
803 11:04:28.070509 USB2 port 9: enabled 1
804 11:04:28.073634 USB3 port 0: enabled 1
805 11:04:28.074163 USB3 port 1: enabled 1
806 11:04:28.076784 USB3 port 2: enabled 1
807 11:04:28.080724 USB3 port 3: enabled 1
808 11:04:28.083611 USB3 port 4: enabled 0
809 11:04:28.087285 PCI: 00:14.1: enabled 0
810 11:04:28.090297 PCI: 00:14.3: enabled 1
811 11:04:28.090741 PCI: 00:14.5: enabled 0
812 11:04:28.093267 PCI: 00:15.0: enabled 1
813 11:04:28.096972 I2C: 00:15: enabled 1
814 11:04:28.100115 PCI: 00:15.1: enabled 1
815 11:04:28.100576 I2C: 00:5d: enabled 1
816 11:04:28.103617 GENERIC: 0.0: enabled 1
817 11:04:28.106821 PCI: 00:15.2: enabled 0
818 11:04:28.109974 PCI: 00:15.3: enabled 0
819 11:04:28.113969 PCI: 00:16.0: enabled 1
820 11:04:28.114503 PCI: 00:16.1: enabled 0
821 11:04:28.116798 PCI: 00:16.2: enabled 0
822 11:04:28.120318 PCI: 00:16.3: enabled 0
823 11:04:28.123518 PCI: 00:16.4: enabled 0
824 11:04:28.126483 PCI: 00:16.5: enabled 0
825 11:04:28.127159 PCI: 00:17.0: enabled 1
826 11:04:28.129900 PCI: 00:19.0: enabled 1
827 11:04:28.133504 I2C: 00:1a: enabled 1
828 11:04:28.136532 I2C: 00:38: enabled 1
829 11:04:28.140145 I2C: 00:39: enabled 1
830 11:04:28.140744 I2C: 00:3a: enabled 1
831 11:04:28.143012 I2C: 00:3b: enabled 1
832 11:04:28.146994 PCI: 00:19.1: enabled 0
833 11:04:28.149542 PCI: 00:19.2: enabled 0
834 11:04:28.150198 PCI: 00:1a.0: enabled 0
835 11:04:28.153339 PCI: 00:1c.0: enabled 0
836 11:04:28.156113 PCI: 00:1c.1: enabled 0
837 11:04:28.159744 PCI: 00:1c.2: enabled 0
838 11:04:28.163232 PCI: 00:1c.3: enabled 0
839 11:04:28.163656 PCI: 00:1c.4: enabled 0
840 11:04:28.166346 PCI: 00:1c.5: enabled 0
841 11:04:28.169526 PCI: 00:1c.6: enabled 0
842 11:04:28.172926 PCI: 00:1c.7: enabled 0
843 11:04:28.176328 PCI: 00:1d.0: enabled 1
844 11:04:28.176747 PCI: 00:1d.1: enabled 0
845 11:04:28.179927 PCI: 00:1d.2: enabled 0
846 11:04:28.183118 PCI: 00:1d.3: enabled 0
847 11:04:28.186217 PCI: 00:1d.4: enabled 0
848 11:04:28.189242 PCI: 00:1d.5: enabled 1
849 11:04:28.189712 PCI: 00:00.0: enabled 1
850 11:04:28.192554 PCI: 00:1e.0: enabled 1
851 11:04:28.196438 PCI: 00:1e.1: enabled 0
852 11:04:28.199218 PCI: 00:1e.2: enabled 1
853 11:04:28.199633 SPI: 00: enabled 1
854 11:04:28.202948 PCI: 00:1e.3: enabled 1
855 11:04:28.205739 SPI: 01: enabled 1
856 11:04:28.209389 PCI: 00:1f.0: enabled 1
857 11:04:28.209806 PNP: 0c09.0: enabled 1
858 11:04:28.212459 PCI: 00:1f.1: enabled 1
859 11:04:28.216352 PCI: 00:1f.2: enabled 1
860 11:04:28.219308 PCI: 00:1f.3: enabled 1
861 11:04:28.222894 PCI: 00:1f.4: enabled 1
862 11:04:28.223311 PCI: 00:1f.5: enabled 1
863 11:04:28.226002 PCI: 00:1f.6: enabled 0
864 11:04:28.229140 Root Device scanning...
865 11:04:28.232931 scan_static_bus for Root Device
866 11:04:28.236307 CPU_CLUSTER: 0 enabled
867 11:04:28.236802 DOMAIN: 0000 enabled
868 11:04:28.239129 DOMAIN: 0000 scanning...
869 11:04:28.242942 PCI: pci_scan_bus for bus 00
870 11:04:28.246321 PCI: 00:00.0 [8086/0000] ops
871 11:04:28.249198 PCI: 00:00.0 [8086/9b61] enabled
872 11:04:28.252321 PCI: 00:02.0 [8086/0000] bus ops
873 11:04:28.255364 PCI: 00:02.0 [8086/9b41] enabled
874 11:04:28.259095 PCI: 00:04.0 [8086/1903] disabled
875 11:04:28.262264 PCI: 00:08.0 [8086/1911] enabled
876 11:04:28.265850 PCI: 00:12.0 [8086/02f9] enabled
877 11:04:28.268707 PCI: 00:14.0 [8086/0000] bus ops
878 11:04:28.272623 PCI: 00:14.0 [8086/02ed] enabled
879 11:04:28.275693 PCI: 00:14.2 [8086/02ef] enabled
880 11:04:28.278896 PCI: 00:14.3 [8086/02f0] enabled
881 11:04:28.282176 PCI: 00:15.0 [8086/0000] bus ops
882 11:04:28.285790 PCI: 00:15.0 [8086/02e8] enabled
883 11:04:28.288823 PCI: 00:15.1 [8086/0000] bus ops
884 11:04:28.292191 PCI: 00:15.1 [8086/02e9] enabled
885 11:04:28.295818 PCI: 00:16.0 [8086/0000] ops
886 11:04:28.299070 PCI: 00:16.0 [8086/02e0] enabled
887 11:04:28.302052 PCI: 00:17.0 [8086/0000] ops
888 11:04:28.305907 PCI: 00:17.0 [8086/02d3] enabled
889 11:04:28.308580 PCI: 00:19.0 [8086/0000] bus ops
890 11:04:28.311909 PCI: 00:19.0 [8086/02c5] enabled
891 11:04:28.315769 PCI: 00:1d.0 [8086/0000] bus ops
892 11:04:28.318987 PCI: 00:1d.0 [8086/02b0] enabled
893 11:04:28.325498 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 11:04:28.328876 PCI: 00:1e.0 [8086/0000] ops
895 11:04:28.331904 PCI: 00:1e.0 [8086/02a8] enabled
896 11:04:28.335673 PCI: 00:1e.2 [8086/0000] bus ops
897 11:04:28.338718 PCI: 00:1e.2 [8086/02aa] enabled
898 11:04:28.341779 PCI: 00:1e.3 [8086/0000] bus ops
899 11:04:28.345110 PCI: 00:1e.3 [8086/02ab] enabled
900 11:04:28.348868 PCI: 00:1f.0 [8086/0000] bus ops
901 11:04:28.351819 PCI: 00:1f.0 [8086/0284] enabled
902 11:04:28.354853 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 11:04:28.361880 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 11:04:28.365236 PCI: 00:1f.3 [8086/0000] bus ops
905 11:04:28.368206 PCI: 00:1f.3 [8086/02c8] enabled
906 11:04:28.371492 PCI: 00:1f.4 [8086/0000] bus ops
907 11:04:28.375197 PCI: 00:1f.4 [8086/02a3] enabled
908 11:04:28.378850 PCI: 00:1f.5 [8086/0000] bus ops
909 11:04:28.381924 PCI: 00:1f.5 [8086/02a4] enabled
910 11:04:28.385218 PCI: Leftover static devices:
911 11:04:28.385735 PCI: 00:05.0
912 11:04:28.388211 PCI: 00:12.5
913 11:04:28.388714 PCI: 00:12.6
914 11:04:28.389048 PCI: 00:14.1
915 11:04:28.391792 PCI: 00:14.5
916 11:04:28.392211 PCI: 00:15.2
917 11:04:28.395024 PCI: 00:15.3
918 11:04:28.395441 PCI: 00:16.1
919 11:04:28.398366 PCI: 00:16.2
920 11:04:28.398808 PCI: 00:16.3
921 11:04:28.399149 PCI: 00:16.4
922 11:04:28.401717 PCI: 00:16.5
923 11:04:28.402202 PCI: 00:19.1
924 11:04:28.404909 PCI: 00:19.2
925 11:04:28.405326 PCI: 00:1a.0
926 11:04:28.405656 PCI: 00:1c.0
927 11:04:28.408362 PCI: 00:1c.1
928 11:04:28.408793 PCI: 00:1c.2
929 11:04:28.411378 PCI: 00:1c.3
930 11:04:28.411789 PCI: 00:1c.4
931 11:04:28.412118 PCI: 00:1c.5
932 11:04:28.415375 PCI: 00:1c.6
933 11:04:28.415787 PCI: 00:1c.7
934 11:04:28.418418 PCI: 00:1d.1
935 11:04:28.418847 PCI: 00:1d.2
936 11:04:28.421364 PCI: 00:1d.3
937 11:04:28.421890 PCI: 00:1d.4
938 11:04:28.422227 PCI: 00:1d.5
939 11:04:28.425423 PCI: 00:1e.1
940 11:04:28.425864 PCI: 00:1f.1
941 11:04:28.428100 PCI: 00:1f.2
942 11:04:28.428538 PCI: 00:1f.6
943 11:04:28.431586 PCI: Check your devicetree.cb.
944 11:04:28.434631 PCI: 00:02.0 scanning...
945 11:04:28.438354 scan_generic_bus for PCI: 00:02.0
946 11:04:28.441343 scan_generic_bus for PCI: 00:02.0 done
947 11:04:28.448888 scan_bus: scanning of bus PCI: 00:02.0 took 10197 usecs
948 11:04:28.449418 PCI: 00:14.0 scanning...
949 11:04:28.451675 scan_static_bus for PCI: 00:14.0
950 11:04:28.454593 USB0 port 0 enabled
951 11:04:28.458385 USB0 port 0 scanning...
952 11:04:28.461958 scan_static_bus for USB0 port 0
953 11:04:28.464856 USB2 port 0 enabled
954 11:04:28.465277 USB2 port 1 enabled
955 11:04:28.467819 USB2 port 2 disabled
956 11:04:28.468236 USB2 port 3 disabled
957 11:04:28.471702 USB2 port 5 disabled
958 11:04:28.474764 USB2 port 6 enabled
959 11:04:28.475184 USB2 port 9 enabled
960 11:04:28.478264 USB3 port 0 enabled
961 11:04:28.481307 USB3 port 1 enabled
962 11:04:28.481721 USB3 port 2 enabled
963 11:04:28.485269 USB3 port 3 enabled
964 11:04:28.485765 USB3 port 4 disabled
965 11:04:28.488242 USB2 port 0 scanning...
966 11:04:28.491337 scan_static_bus for USB2 port 0
967 11:04:28.494548 scan_static_bus for USB2 port 0 done
968 11:04:28.501276 scan_bus: scanning of bus USB2 port 0 took 9708 usecs
969 11:04:28.504712 USB2 port 1 scanning...
970 11:04:28.507814 scan_static_bus for USB2 port 1
971 11:04:28.511526 scan_static_bus for USB2 port 1 done
972 11:04:28.515071 scan_bus: scanning of bus USB2 port 1 took 9699 usecs
973 11:04:28.518276 USB2 port 6 scanning...
974 11:04:28.521501 scan_static_bus for USB2 port 6
975 11:04:28.524597 scan_static_bus for USB2 port 6 done
976 11:04:28.531834 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
977 11:04:28.534553 USB2 port 9 scanning...
978 11:04:28.538458 scan_static_bus for USB2 port 9
979 11:04:28.541840 scan_static_bus for USB2 port 9 done
980 11:04:28.544777 scan_bus: scanning of bus USB2 port 9 took 9704 usecs
981 11:04:28.548532 USB3 port 0 scanning...
982 11:04:28.551599 scan_static_bus for USB3 port 0
983 11:04:28.554653 scan_static_bus for USB3 port 0 done
984 11:04:28.561836 scan_bus: scanning of bus USB3 port 0 took 9691 usecs
985 11:04:28.564607 USB3 port 1 scanning...
986 11:04:28.567850 scan_static_bus for USB3 port 1
987 11:04:28.571219 scan_static_bus for USB3 port 1 done
988 11:04:28.574362 scan_bus: scanning of bus USB3 port 1 took 9698 usecs
989 11:04:28.578329 USB3 port 2 scanning...
990 11:04:28.581254 scan_static_bus for USB3 port 2
991 11:04:28.584410 scan_static_bus for USB3 port 2 done
992 11:04:28.591160 scan_bus: scanning of bus USB3 port 2 took 9698 usecs
993 11:04:28.594971 USB3 port 3 scanning...
994 11:04:28.598123 scan_static_bus for USB3 port 3
995 11:04:28.601152 scan_static_bus for USB3 port 3 done
996 11:04:28.604387 scan_bus: scanning of bus USB3 port 3 took 9711 usecs
997 11:04:28.611008 scan_static_bus for USB0 port 0 done
998 11:04:28.614813 scan_bus: scanning of bus USB0 port 0 took 155395 usecs
999 11:04:28.617511 scan_static_bus for PCI: 00:14.0 done
1000 11:04:28.624687 scan_bus: scanning of bus PCI: 00:14.0 took 173016 usecs
1001 11:04:28.627598 PCI: 00:15.0 scanning...
1002 11:04:28.631262 scan_generic_bus for PCI: 00:15.0
1003 11:04:28.634493 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 11:04:28.637876 scan_generic_bus for PCI: 00:15.0 done
1005 11:04:28.644548 scan_bus: scanning of bus PCI: 00:15.0 took 14314 usecs
1006 11:04:28.647730 PCI: 00:15.1 scanning...
1007 11:04:28.650835 scan_generic_bus for PCI: 00:15.1
1008 11:04:28.654435 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 11:04:28.658487 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 11:04:28.664145 scan_generic_bus for PCI: 00:15.1 done
1011 11:04:28.667731 scan_bus: scanning of bus PCI: 00:15.1 took 18622 usecs
1012 11:04:28.671242 PCI: 00:19.0 scanning...
1013 11:04:28.674231 scan_generic_bus for PCI: 00:19.0
1014 11:04:28.677594 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 11:04:28.683968 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 11:04:28.688111 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 11:04:28.691361 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 11:04:28.694080 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 11:04:28.697771 scan_generic_bus for PCI: 00:19.0 done
1020 11:04:28.704425 scan_bus: scanning of bus PCI: 00:19.0 took 30734 usecs
1021 11:04:28.707827 PCI: 00:1d.0 scanning...
1022 11:04:28.710823 do_pci_scan_bridge for PCI: 00:1d.0
1023 11:04:28.714325 PCI: pci_scan_bus for bus 01
1024 11:04:28.717353 PCI: 01:00.0 [1c5c/1327] enabled
1025 11:04:28.720759 Enabling Common Clock Configuration
1026 11:04:28.723911 L1 Sub-State supported from root port 29
1027 11:04:28.727511 L1 Sub-State Support = 0xf
1028 11:04:28.730827 CommonModeRestoreTime = 0x28
1029 11:04:28.733998 Power On Value = 0x16, Power On Scale = 0x0
1030 11:04:28.737947 ASPM: Enabled L1
1031 11:04:28.744591 scan_bus: scanning of bus PCI: 00:1d.0 took 32801 usecs
1032 11:04:28.745131 PCI: 00:1e.2 scanning...
1033 11:04:28.751012 scan_generic_bus for PCI: 00:1e.2
1034 11:04:28.754468 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 11:04:28.757292 scan_generic_bus for PCI: 00:1e.2 done
1036 11:04:28.760733 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1037 11:04:28.764144 PCI: 00:1e.3 scanning...
1038 11:04:28.767836 scan_generic_bus for PCI: 00:1e.3
1039 11:04:28.773725 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 11:04:28.777271 scan_generic_bus for PCI: 00:1e.3 done
1041 11:04:28.780540 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
1042 11:04:28.784388 PCI: 00:1f.0 scanning...
1043 11:04:28.787709 scan_static_bus for PCI: 00:1f.0
1044 11:04:28.791064 PNP: 0c09.0 enabled
1045 11:04:28.794355 scan_static_bus for PCI: 00:1f.0 done
1046 11:04:28.800489 scan_bus: scanning of bus PCI: 00:1f.0 took 12060 usecs
1047 11:04:28.800987 PCI: 00:1f.3 scanning...
1048 11:04:28.807612 scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs
1049 11:04:28.810826 PCI: 00:1f.4 scanning...
1050 11:04:28.813866 scan_generic_bus for PCI: 00:1f.4
1051 11:04:28.817695 scan_generic_bus for PCI: 00:1f.4 done
1052 11:04:28.823883 scan_bus: scanning of bus PCI: 00:1f.4 took 10197 usecs
1053 11:04:28.827347 PCI: 00:1f.5 scanning...
1054 11:04:28.830866 scan_generic_bus for PCI: 00:1f.5
1055 11:04:28.833867 scan_generic_bus for PCI: 00:1f.5 done
1056 11:04:28.840303 scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs
1057 11:04:28.844036 scan_bus: scanning of bus DOMAIN: 0000 took 605175 usecs
1058 11:04:28.847000 scan_static_bus for Root Device done
1059 11:04:28.853827 scan_bus: scanning of bus Root Device took 625035 usecs
1060 11:04:28.854390 done
1061 11:04:28.857404 Chrome EC: UHEPI supported
1062 11:04:28.863620 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 11:04:28.870730 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 11:04:28.876953 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 11:04:28.884419 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 11:04:28.887629 SPI flash protection: WPSW=0 SRP0=0
1067 11:04:28.890619 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 11:04:28.897265 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 11:04:28.900461 found VGA at PCI: 00:02.0
1070 11:04:28.904141 Setting up VGA for PCI: 00:02.0
1071 11:04:28.907714 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 11:04:28.914008 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 11:04:28.914430 Allocating resources...
1074 11:04:28.917074 Reading resources...
1075 11:04:28.920365 Root Device read_resources bus 0 link: 0
1076 11:04:28.927252 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 11:04:28.930455 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 11:04:28.937391 DOMAIN: 0000 read_resources bus 0 link: 0
1079 11:04:28.940737 PCI: 00:14.0 read_resources bus 0 link: 0
1080 11:04:28.946762 USB0 port 0 read_resources bus 0 link: 0
1081 11:04:28.954068 USB0 port 0 read_resources bus 0 link: 0 done
1082 11:04:28.957372 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 11:04:28.964726 PCI: 00:15.0 read_resources bus 1 link: 0
1084 11:04:28.967793 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 11:04:28.975035 PCI: 00:15.1 read_resources bus 2 link: 0
1086 11:04:28.978260 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 11:04:28.985530 PCI: 00:19.0 read_resources bus 3 link: 0
1088 11:04:28.992162 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 11:04:28.995185 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 11:04:29.002266 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 11:04:29.005200 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 11:04:29.012167 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 11:04:29.015384 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 11:04:29.021820 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 11:04:29.025697 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 11:04:29.032605 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 11:04:29.035305 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 11:04:29.043049 Root Device read_resources bus 0 link: 0 done
1099 11:04:29.045550 Done reading resources.
1100 11:04:29.049171 Show resources in subtree (Root Device)...After reading.
1101 11:04:29.055439 Root Device child on link 0 CPU_CLUSTER: 0
1102 11:04:29.058717 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 11:04:29.059130 APIC: 00
1104 11:04:29.062122 APIC: 03
1105 11:04:29.062526 APIC: 06
1106 11:04:29.062877 APIC: 01
1107 11:04:29.066169 APIC: 02
1108 11:04:29.066682 APIC: 04
1109 11:04:29.069080 APIC: 05
1110 11:04:29.069488 APIC: 07
1111 11:04:29.072053 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 11:04:29.082073 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 11:04:29.135673 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 11:04:29.136414 PCI: 00:00.0
1115 11:04:29.136962 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 11:04:29.137680 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 11:04:29.138017 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 11:04:29.138326 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 11:04:29.142090 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 11:04:29.148753 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 11:04:29.158726 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 11:04:29.168923 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 11:04:29.178499 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 11:04:29.185229 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 11:04:29.195401 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 11:04:29.205640 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 11:04:29.215271 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 11:04:29.225888 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 11:04:29.235298 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 11:04:29.245588 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 11:04:29.246032 PCI: 00:02.0
1132 11:04:29.255235 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 11:04:29.265055 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 11:04:29.275187 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 11:04:29.275612 PCI: 00:04.0
1136 11:04:29.278589 PCI: 00:08.0
1137 11:04:29.288387 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 11:04:29.288827 PCI: 00:12.0
1139 11:04:29.298457 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 11:04:29.304427 PCI: 00:14.0 child on link 0 USB0 port 0
1141 11:04:29.315292 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 11:04:29.318197 USB0 port 0 child on link 0 USB2 port 0
1143 11:04:29.318691 USB2 port 0
1144 11:04:29.321179 USB2 port 1
1145 11:04:29.324675 USB2 port 2
1146 11:04:29.325090 USB2 port 3
1147 11:04:29.327704 USB2 port 5
1148 11:04:29.328121 USB2 port 6
1149 11:04:29.331361 USB2 port 9
1150 11:04:29.331779 USB3 port 0
1151 11:04:29.334900 USB3 port 1
1152 11:04:29.335426 USB3 port 2
1153 11:04:29.337963 USB3 port 3
1154 11:04:29.338479 USB3 port 4
1155 11:04:29.341478 PCI: 00:14.2
1156 11:04:29.351592 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 11:04:29.361444 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 11:04:29.361942 PCI: 00:14.3
1159 11:04:29.371188 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 11:04:29.377932 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 11:04:29.387796 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 11:04:29.388232 I2C: 01:15
1163 11:04:29.391892 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 11:04:29.400996 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 11:04:29.404663 I2C: 02:5d
1166 11:04:29.405117 GENERIC: 0.0
1167 11:04:29.407532 PCI: 00:16.0
1168 11:04:29.417479 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 11:04:29.417904 PCI: 00:17.0
1170 11:04:29.427437 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 11:04:29.437701 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 11:04:29.444625 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 11:04:29.454616 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 11:04:29.461050 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 11:04:29.471126 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 11:04:29.473945 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 11:04:29.484746 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 11:04:29.487626 I2C: 03:1a
1179 11:04:29.488058 I2C: 03:38
1180 11:04:29.490564 I2C: 03:39
1181 11:04:29.490985 I2C: 03:3a
1182 11:04:29.494448 I2C: 03:3b
1183 11:04:29.497419 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 11:04:29.504597 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 11:04:29.514558 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 11:04:29.524315 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 11:04:29.527624 PCI: 01:00.0
1188 11:04:29.537710 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 11:04:29.538150 PCI: 00:1e.0
1190 11:04:29.547645 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 11:04:29.557207 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 11:04:29.564355 PCI: 00:1e.2 child on link 0 SPI: 00
1193 11:04:29.574227 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 11:04:29.574652 SPI: 00
1195 11:04:29.577422 PCI: 00:1e.3 child on link 0 SPI: 01
1196 11:04:29.587214 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 11:04:29.590486 SPI: 01
1198 11:04:29.594138 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 11:04:29.604411 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 11:04:29.610520 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 11:04:29.614234 PNP: 0c09.0
1202 11:04:29.620459 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 11:04:29.624436 PCI: 00:1f.3
1204 11:04:29.634017 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 11:04:29.643832 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 11:04:29.644373 PCI: 00:1f.4
1207 11:04:29.653478 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 11:04:29.663960 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 11:04:29.667392 PCI: 00:1f.5
1210 11:04:29.673742 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 11:04:29.680177 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 11:04:29.686974 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 11:04:29.693743 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 11:04:29.697012 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 11:04:29.700643 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 11:04:29.703607 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 11:04:29.706932 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 11:04:29.717191 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 11:04:29.723479 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 11:04:29.729930 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 11:04:29.736879 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 11:04:29.743332 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 11:04:29.750284 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 11:04:29.756786 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 11:04:29.760083 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 11:04:29.766794 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 11:04:29.770308 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 11:04:29.776684 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 11:04:29.780132 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 11:04:29.786465 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 11:04:29.789716 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 11:04:29.796692 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 11:04:29.799919 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 11:04:29.807162 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 11:04:29.810069 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 11:04:29.816224 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 11:04:29.819852 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 11:04:29.823126 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 11:04:29.829855 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 11:04:29.833005 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 11:04:29.839399 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 11:04:29.843148 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 11:04:29.849420 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 11:04:29.853441 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 11:04:29.859446 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 11:04:29.863195 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 11:04:29.869492 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 11:04:29.876153 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 11:04:29.879717 avoid_fixed_resources: DOMAIN: 0000
1250 11:04:29.886200 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 11:04:29.893088 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 11:04:29.899526 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 11:04:29.909358 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 11:04:29.916288 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 11:04:29.922558 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 11:04:29.929919 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 11:04:29.939993 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 11:04:29.946307 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 11:04:29.952354 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 11:04:29.962726 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 11:04:29.969407 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 11:04:29.969887 Setting resources...
1263 11:04:29.975462 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 11:04:29.982185 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 11:04:29.986217 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 11:04:29.988924 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 11:04:29.992588 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 11:04:29.998836 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 11:04:30.005547 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 11:04:30.012305 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 11:04:30.019328 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 11:04:30.025360 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 11:04:30.028801 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 11:04:30.035396 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 11:04:30.038858 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 11:04:30.042325 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 11:04:30.048978 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 11:04:30.052342 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 11:04:30.059044 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 11:04:30.061919 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 11:04:30.068615 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 11:04:30.072597 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 11:04:30.078713 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 11:04:30.082011 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 11:04:30.088948 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 11:04:30.091932 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 11:04:30.098789 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 11:04:30.101936 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 11:04:30.108541 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 11:04:30.112234 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 11:04:30.115188 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 11:04:30.121793 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 11:04:30.124969 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 11:04:30.131869 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 11:04:30.138198 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 11:04:30.145106 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 11:04:30.155268 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 11:04:30.161498 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 11:04:30.165611 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 11:04:30.172015 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 11:04:30.178135 Root Device assign_resources, bus 0 link: 0
1302 11:04:30.181489 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 11:04:30.191877 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 11:04:30.198770 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 11:04:30.208365 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 11:04:30.214788 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 11:04:30.225111 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 11:04:30.231298 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 11:04:30.234373 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 11:04:30.241512 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 11:04:30.248127 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 11:04:30.258368 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 11:04:30.264877 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 11:04:30.274903 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 11:04:30.278291 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 11:04:30.284662 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 11:04:30.291568 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 11:04:30.294723 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 11:04:30.301566 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 11:04:30.308453 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 11:04:30.318083 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 11:04:30.324715 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 11:04:30.331636 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 11:04:30.340772 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 11:04:30.347748 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 11:04:30.354442 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 11:04:30.364425 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 11:04:30.367578 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 11:04:30.374430 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 11:04:30.380870 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 11:04:30.390920 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 11:04:30.400592 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 11:04:30.403960 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 11:04:30.411029 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 11:04:30.417690 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 11:04:30.423712 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 11:04:30.433924 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 11:04:30.436817 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 11:04:30.443620 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 11:04:30.450218 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 11:04:30.453729 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 11:04:30.460241 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 11:04:30.463818 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 11:04:30.470480 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 11:04:30.473690 LPC: Trying to open IO window from 800 size 1ff
1346 11:04:30.483970 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 11:04:30.490581 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 11:04:30.500559 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 11:04:30.507039 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 11:04:30.513999 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 11:04:30.516778 Root Device assign_resources, bus 0 link: 0
1352 11:04:30.520293 Done setting resources.
1353 11:04:30.527118 Show resources in subtree (Root Device)...After assigning values.
1354 11:04:30.530299 Root Device child on link 0 CPU_CLUSTER: 0
1355 11:04:30.533489 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 11:04:30.536709 APIC: 00
1357 11:04:30.537117 APIC: 03
1358 11:04:30.537436 APIC: 06
1359 11:04:30.540634 APIC: 01
1360 11:04:30.541101 APIC: 02
1361 11:04:30.543373 APIC: 04
1362 11:04:30.543777 APIC: 05
1363 11:04:30.544097 APIC: 07
1364 11:04:30.550364 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 11:04:30.560150 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 11:04:30.569855 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 11:04:30.570270 PCI: 00:00.0
1368 11:04:30.580292 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 11:04:30.589878 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 11:04:30.599710 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 11:04:30.610083 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 11:04:30.619829 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 11:04:30.626290 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 11:04:30.636054 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 11:04:30.646563 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 11:04:30.656458 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 11:04:30.665938 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 11:04:30.672914 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 11:04:30.682909 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 11:04:30.692427 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 11:04:30.702623 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 11:04:30.712470 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 11:04:30.722755 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 11:04:30.723176 PCI: 00:02.0
1385 11:04:30.732189 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 11:04:30.747685 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 11:04:30.752205 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 11:04:30.755430 PCI: 00:04.0
1389 11:04:30.755879 PCI: 00:08.0
1390 11:04:30.768964 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 11:04:30.769383 PCI: 00:12.0
1392 11:04:30.778373 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 11:04:30.785468 PCI: 00:14.0 child on link 0 USB0 port 0
1394 11:04:30.795201 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 11:04:30.798380 USB0 port 0 child on link 0 USB2 port 0
1396 11:04:30.802112 USB2 port 0
1397 11:04:30.802533 USB2 port 1
1398 11:04:30.805179 USB2 port 2
1399 11:04:30.805604 USB2 port 3
1400 11:04:30.808334 USB2 port 5
1401 11:04:30.808758 USB2 port 6
1402 11:04:30.811561 USB2 port 9
1403 11:04:30.811984 USB3 port 0
1404 11:04:30.815438 USB3 port 1
1405 11:04:30.815864 USB3 port 2
1406 11:04:30.818233 USB3 port 3
1407 11:04:30.818645 USB3 port 4
1408 11:04:30.821825 PCI: 00:14.2
1409 11:04:30.832192 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 11:04:30.841559 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 11:04:30.844718 PCI: 00:14.3
1412 11:04:30.854709 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 11:04:30.858595 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 11:04:30.867822 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 11:04:30.871357 I2C: 01:15
1416 11:04:30.874539 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 11:04:30.884474 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 11:04:30.884948 I2C: 02:5d
1419 11:04:30.888043 GENERIC: 0.0
1420 11:04:30.888554 PCI: 00:16.0
1421 11:04:30.901136 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 11:04:30.901558 PCI: 00:17.0
1423 11:04:30.911189 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 11:04:30.921093 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 11:04:30.931413 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 11:04:30.940741 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 11:04:30.950956 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 11:04:30.960635 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 11:04:30.964235 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 11:04:30.973713 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 11:04:30.976886 I2C: 03:1a
1432 11:04:30.977295 I2C: 03:38
1433 11:04:30.977618 I2C: 03:39
1434 11:04:30.980209 I2C: 03:3a
1435 11:04:30.980671 I2C: 03:3b
1436 11:04:30.987261 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 11:04:30.996783 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 11:04:31.007039 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 11:04:31.017297 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 11:04:31.017779 PCI: 01:00.0
1441 11:04:31.027034 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 11:04:31.029925 PCI: 00:1e.0
1443 11:04:31.039925 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 11:04:31.050028 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 11:04:31.057109 PCI: 00:1e.2 child on link 0 SPI: 00
1446 11:04:31.066275 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 11:04:31.066802 SPI: 00
1448 11:04:31.070158 PCI: 00:1e.3 child on link 0 SPI: 01
1449 11:04:31.079616 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 11:04:31.083251 SPI: 01
1451 11:04:31.086395 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 11:04:31.096493 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 11:04:31.102956 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 11:04:31.106038 PNP: 0c09.0
1455 11:04:31.116344 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 11:04:31.116852 PCI: 00:1f.3
1457 11:04:31.126034 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 11:04:31.135831 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 11:04:31.138954 PCI: 00:1f.4
1460 11:04:31.148948 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 11:04:31.159514 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 11:04:31.160013 PCI: 00:1f.5
1463 11:04:31.169090 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 11:04:31.172145 Done allocating resources.
1465 11:04:31.179204 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 11:04:31.182181 Enabling resources...
1467 11:04:31.185565 PCI: 00:00.0 subsystem <- 8086/9b61
1468 11:04:31.188629 PCI: 00:00.0 cmd <- 06
1469 11:04:31.192128 PCI: 00:02.0 subsystem <- 8086/9b41
1470 11:04:31.195256 PCI: 00:02.0 cmd <- 03
1471 11:04:31.195758 PCI: 00:08.0 cmd <- 06
1472 11:04:31.202351 PCI: 00:12.0 subsystem <- 8086/02f9
1473 11:04:31.202872 PCI: 00:12.0 cmd <- 02
1474 11:04:31.205308 PCI: 00:14.0 subsystem <- 8086/02ed
1475 11:04:31.209199 PCI: 00:14.0 cmd <- 02
1476 11:04:31.212142 PCI: 00:14.2 cmd <- 02
1477 11:04:31.215425 PCI: 00:14.3 subsystem <- 8086/02f0
1478 11:04:31.219130 PCI: 00:14.3 cmd <- 02
1479 11:04:31.222211 PCI: 00:15.0 subsystem <- 8086/02e8
1480 11:04:31.225603 PCI: 00:15.0 cmd <- 02
1481 11:04:31.228725 PCI: 00:15.1 subsystem <- 8086/02e9
1482 11:04:31.232497 PCI: 00:15.1 cmd <- 02
1483 11:04:31.235468 PCI: 00:16.0 subsystem <- 8086/02e0
1484 11:04:31.238813 PCI: 00:16.0 cmd <- 02
1485 11:04:31.241846 PCI: 00:17.0 subsystem <- 8086/02d3
1486 11:04:31.242293 PCI: 00:17.0 cmd <- 03
1487 11:04:31.248631 PCI: 00:19.0 subsystem <- 8086/02c5
1488 11:04:31.249135 PCI: 00:19.0 cmd <- 02
1489 11:04:31.251588 PCI: 00:1d.0 bridge ctrl <- 0013
1490 11:04:31.255416 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 11:04:31.258249 PCI: 00:1d.0 cmd <- 06
1492 11:04:31.261758 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 11:04:31.264886 PCI: 00:1e.0 cmd <- 06
1494 11:04:31.268113 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 11:04:31.271295 PCI: 00:1e.2 cmd <- 06
1496 11:04:31.275247 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 11:04:31.278433 PCI: 00:1e.3 cmd <- 02
1498 11:04:31.281608 PCI: 00:1f.0 subsystem <- 8086/0284
1499 11:04:31.284748 PCI: 00:1f.0 cmd <- 407
1500 11:04:31.288772 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 11:04:31.291887 PCI: 00:1f.3 cmd <- 02
1502 11:04:31.294797 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 11:04:31.298419 PCI: 00:1f.4 cmd <- 03
1504 11:04:31.301630 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 11:04:31.302044 PCI: 00:1f.5 cmd <- 406
1506 11:04:31.312637 PCI: 01:00.0 cmd <- 02
1507 11:04:31.317366 done.
1508 11:04:31.327396 ME: Version: 14.0.39.1367
1509 11:04:31.333837 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 9
1510 11:04:31.336797 Initializing devices...
1511 11:04:31.337214 Root Device init ...
1512 11:04:31.343627 Chrome EC: Set SMI mask to 0x0000000000000000
1513 11:04:31.347157 Chrome EC: clear events_b mask to 0x0000000000000000
1514 11:04:31.353592 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 11:04:31.360390 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 11:04:31.366823 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 11:04:31.369896 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 11:04:31.373647 Root Device init finished in 35263 usecs
1519 11:04:31.377028 CPU_CLUSTER: 0 init ...
1520 11:04:31.384077 CPU_CLUSTER: 0 init finished in 2448 usecs
1521 11:04:31.388140 PCI: 00:00.0 init ...
1522 11:04:31.391116 CPU TDP: 15 Watts
1523 11:04:31.395217 CPU PL2 = 64 Watts
1524 11:04:31.397617 PCI: 00:00.0 init finished in 7081 usecs
1525 11:04:31.401798 PCI: 00:02.0 init ...
1526 11:04:31.404102 PCI: 00:02.0 init finished in 2253 usecs
1527 11:04:31.407751 PCI: 00:08.0 init ...
1528 11:04:31.411321 PCI: 00:08.0 init finished in 2254 usecs
1529 11:04:31.414817 PCI: 00:12.0 init ...
1530 11:04:31.417952 PCI: 00:12.0 init finished in 2253 usecs
1531 11:04:31.420970 PCI: 00:14.0 init ...
1532 11:04:31.424440 PCI: 00:14.0 init finished in 2253 usecs
1533 11:04:31.428098 PCI: 00:14.2 init ...
1534 11:04:31.430966 PCI: 00:14.2 init finished in 2253 usecs
1535 11:04:31.434360 PCI: 00:14.3 init ...
1536 11:04:31.437560 PCI: 00:14.3 init finished in 2263 usecs
1537 11:04:31.440779 PCI: 00:15.0 init ...
1538 11:04:31.444680 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 11:04:31.447675 PCI: 00:15.0 init finished in 5978 usecs
1540 11:04:31.450752 PCI: 00:15.1 init ...
1541 11:04:31.454106 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 11:04:31.457948 PCI: 00:15.1 init finished in 5977 usecs
1543 11:04:31.461399 PCI: 00:16.0 init ...
1544 11:04:31.464586 PCI: 00:16.0 init finished in 2245 usecs
1545 11:04:31.468559 PCI: 00:19.0 init ...
1546 11:04:31.471669 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 11:04:31.478383 PCI: 00:19.0 init finished in 5979 usecs
1548 11:04:31.478938 PCI: 00:1d.0 init ...
1549 11:04:31.481584 Initializing PCH PCIe bridge.
1550 11:04:31.484695 PCI: 00:1d.0 init finished in 5286 usecs
1551 11:04:31.489824 PCI: 00:1f.0 init ...
1552 11:04:31.492899 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 11:04:31.499787 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 11:04:31.500456 IOAPIC: ID = 0x02
1555 11:04:31.503286 IOAPIC: Dumping registers
1556 11:04:31.506348 reg 0x0000: 0x02000000
1557 11:04:31.509775 reg 0x0001: 0x00770020
1558 11:04:31.510192 reg 0x0002: 0x00000000
1559 11:04:31.516621 PCI: 00:1f.0 init finished in 23553 usecs
1560 11:04:31.520364 PCI: 00:1f.4 init ...
1561 11:04:31.523127 PCI: 00:1f.4 init finished in 2262 usecs
1562 11:04:31.533704 PCI: 01:00.0 init ...
1563 11:04:31.537596 PCI: 01:00.0 init finished in 2243 usecs
1564 11:04:31.541477 PNP: 0c09.0 init ...
1565 11:04:31.545242 Google Chrome EC uptime: 11.046 seconds
1566 11:04:31.551568 Google Chrome AP resets since EC boot: 0
1567 11:04:31.554652 Google Chrome most recent AP reset causes:
1568 11:04:31.561216 Google Chrome EC reset flags at last EC boot: reset-pin
1569 11:04:31.564722 PNP: 0c09.0 init finished in 20571 usecs
1570 11:04:31.567755 Devices initialized
1571 11:04:31.568402 Show all devs... After init.
1572 11:04:31.571568 Root Device: enabled 1
1573 11:04:31.574582 CPU_CLUSTER: 0: enabled 1
1574 11:04:31.577681 DOMAIN: 0000: enabled 1
1575 11:04:31.578219 APIC: 00: enabled 1
1576 11:04:31.581049 PCI: 00:00.0: enabled 1
1577 11:04:31.584335 PCI: 00:02.0: enabled 1
1578 11:04:31.587858 PCI: 00:04.0: enabled 0
1579 11:04:31.588495 PCI: 00:05.0: enabled 0
1580 11:04:31.591235 PCI: 00:12.0: enabled 1
1581 11:04:31.594564 PCI: 00:12.5: enabled 0
1582 11:04:31.594972 PCI: 00:12.6: enabled 0
1583 11:04:31.597730 PCI: 00:14.0: enabled 1
1584 11:04:31.601491 PCI: 00:14.1: enabled 0
1585 11:04:31.604568 PCI: 00:14.3: enabled 1
1586 11:04:31.605082 PCI: 00:14.5: enabled 0
1587 11:04:31.607988 PCI: 00:15.0: enabled 1
1588 11:04:31.611282 PCI: 00:15.1: enabled 1
1589 11:04:31.614626 PCI: 00:15.2: enabled 0
1590 11:04:31.615212 PCI: 00:15.3: enabled 0
1591 11:04:31.617848 PCI: 00:16.0: enabled 1
1592 11:04:31.620698 PCI: 00:16.1: enabled 0
1593 11:04:31.624148 PCI: 00:16.2: enabled 0
1594 11:04:31.624737 PCI: 00:16.3: enabled 0
1595 11:04:31.627793 PCI: 00:16.4: enabled 0
1596 11:04:31.630851 PCI: 00:16.5: enabled 0
1597 11:04:31.631400 PCI: 00:17.0: enabled 1
1598 11:04:31.634580 PCI: 00:19.0: enabled 1
1599 11:04:31.637685 PCI: 00:19.1: enabled 0
1600 11:04:31.640939 PCI: 00:19.2: enabled 0
1601 11:04:31.641372 PCI: 00:1a.0: enabled 0
1602 11:04:31.643855 PCI: 00:1c.0: enabled 0
1603 11:04:31.647783 PCI: 00:1c.1: enabled 0
1604 11:04:31.651024 PCI: 00:1c.2: enabled 0
1605 11:04:31.651435 PCI: 00:1c.3: enabled 0
1606 11:04:31.654094 PCI: 00:1c.4: enabled 0
1607 11:04:31.657509 PCI: 00:1c.5: enabled 0
1608 11:04:31.660920 PCI: 00:1c.6: enabled 0
1609 11:04:31.661354 PCI: 00:1c.7: enabled 0
1610 11:04:31.663856 PCI: 00:1d.0: enabled 1
1611 11:04:31.667238 PCI: 00:1d.1: enabled 0
1612 11:04:31.670471 PCI: 00:1d.2: enabled 0
1613 11:04:31.670883 PCI: 00:1d.3: enabled 0
1614 11:04:31.674271 PCI: 00:1d.4: enabled 0
1615 11:04:31.677405 PCI: 00:1d.5: enabled 0
1616 11:04:31.677987 PCI: 00:1e.0: enabled 1
1617 11:04:31.680365 PCI: 00:1e.1: enabled 0
1618 11:04:31.683980 PCI: 00:1e.2: enabled 1
1619 11:04:31.687167 PCI: 00:1e.3: enabled 1
1620 11:04:31.687670 PCI: 00:1f.0: enabled 1
1621 11:04:31.690789 PCI: 00:1f.1: enabled 0
1622 11:04:31.693886 PCI: 00:1f.2: enabled 0
1623 11:04:31.696965 PCI: 00:1f.3: enabled 1
1624 11:04:31.697381 PCI: 00:1f.4: enabled 1
1625 11:04:31.700908 PCI: 00:1f.5: enabled 1
1626 11:04:31.703782 PCI: 00:1f.6: enabled 0
1627 11:04:31.707066 USB0 port 0: enabled 1
1628 11:04:31.707722 I2C: 01:15: enabled 1
1629 11:04:31.710123 I2C: 02:5d: enabled 1
1630 11:04:31.713801 GENERIC: 0.0: enabled 1
1631 11:04:31.714300 I2C: 03:1a: enabled 1
1632 11:04:31.716703 I2C: 03:38: enabled 1
1633 11:04:31.720463 I2C: 03:39: enabled 1
1634 11:04:31.720878 I2C: 03:3a: enabled 1
1635 11:04:31.723772 I2C: 03:3b: enabled 1
1636 11:04:31.726860 PCI: 00:00.0: enabled 1
1637 11:04:31.727268 SPI: 00: enabled 1
1638 11:04:31.730408 SPI: 01: enabled 1
1639 11:04:31.733687 PNP: 0c09.0: enabled 1
1640 11:04:31.734257 USB2 port 0: enabled 1
1641 11:04:31.736514 USB2 port 1: enabled 1
1642 11:04:31.741330 USB2 port 2: enabled 0
1643 11:04:31.741741 USB2 port 3: enabled 0
1644 11:04:31.743454 USB2 port 5: enabled 0
1645 11:04:31.746418 USB2 port 6: enabled 1
1646 11:04:31.749861 USB2 port 9: enabled 1
1647 11:04:31.750271 USB3 port 0: enabled 1
1648 11:04:31.753691 USB3 port 1: enabled 1
1649 11:04:31.756495 USB3 port 2: enabled 1
1650 11:04:31.757035 USB3 port 3: enabled 1
1651 11:04:31.759972 USB3 port 4: enabled 0
1652 11:04:31.763580 APIC: 03: enabled 1
1653 11:04:31.763985 APIC: 06: enabled 1
1654 11:04:31.766821 APIC: 01: enabled 1
1655 11:04:31.770098 APIC: 02: enabled 1
1656 11:04:31.770648 APIC: 04: enabled 1
1657 11:04:31.773253 APIC: 05: enabled 1
1658 11:04:31.773742 APIC: 07: enabled 1
1659 11:04:31.776457 PCI: 00:08.0: enabled 1
1660 11:04:31.779876 PCI: 00:14.2: enabled 1
1661 11:04:31.783057 PCI: 01:00.0: enabled 1
1662 11:04:31.786890 Disabling ACPI via APMC:
1663 11:04:31.787300 done.
1664 11:04:31.793216 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 11:04:31.796816 ELOG: NV offset 0xaf0000 size 0x4000
1666 11:04:31.803258 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 11:04:31.810239 ELOG: Event(17) added with size 13 at 2024-03-18 11:03:50 UTC
1668 11:04:31.816891 ELOG: Event(92) added with size 9 at 2024-03-18 11:03:50 UTC
1669 11:04:31.823104 ELOG: Event(93) added with size 9 at 2024-03-18 11:03:50 UTC
1670 11:04:31.829873 ELOG: Event(9A) added with size 9 at 2024-03-18 11:03:50 UTC
1671 11:04:31.836637 ELOG: Event(9E) added with size 10 at 2024-03-18 11:03:50 UTC
1672 11:04:31.843078 ELOG: Event(9F) added with size 14 at 2024-03-18 11:03:50 UTC
1673 11:04:31.846435 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1674 11:04:31.853871 ELOG: Event(A1) added with size 10 at 2024-03-18 11:03:50 UTC
1675 11:04:31.863676 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1676 11:04:31.867019 ELOG: Event(A0) added with size 9 at 2024-03-18 11:03:50 UTC
1677 11:04:31.873385 elog_add_boot_reason: Logged dev mode boot
1678 11:04:31.873890 Finalize devices...
1679 11:04:31.876471 PCI: 00:17.0 final
1680 11:04:31.880237 Devices finalized
1681 11:04:31.883506 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 11:04:31.889851 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1683 11:04:31.893295 ME: HFSTS1 : 0x90000245
1684 11:04:31.896417 ME: HFSTS2 : 0x3B850126
1685 11:04:31.900203 ME: HFSTS3 : 0x00000020
1686 11:04:31.906950 ME: HFSTS4 : 0x00004800
1687 11:04:31.909953 ME: HFSTS5 : 0x00000000
1688 11:04:31.913185 ME: HFSTS6 : 0x40400006
1689 11:04:31.916308 ME: Manufacturing Mode : NO
1690 11:04:31.920131 ME: FW Partition Table : OK
1691 11:04:31.922993 ME: Bringup Loader Failure : NO
1692 11:04:31.926329 ME: Firmware Init Complete : YES
1693 11:04:31.930123 ME: Boot Options Present : NO
1694 11:04:31.933054 ME: Update In Progress : NO
1695 11:04:31.936161 ME: D0i3 Support : YES
1696 11:04:31.939556 ME: Low Power State Enabled : NO
1697 11:04:31.943212 ME: CPU Replaced : NO
1698 11:04:31.946040 ME: CPU Replacement Valid : YES
1699 11:04:31.949805 ME: Current Working State : 5
1700 11:04:31.952587 ME: Current Operation State : 1
1701 11:04:31.956347 ME: Current Operation Mode : 0
1702 11:04:31.959446 ME: Error Code : 0
1703 11:04:31.962479 ME: CPU Debug Disabled : YES
1704 11:04:31.966226 ME: TXT Support : NO
1705 11:04:31.972954 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 11:04:31.975940 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 11:04:31.979204 CBFS @ c08000 size 3f8000
1708 11:04:31.985888 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 11:04:31.989144 CBFS: Locating 'fallback/dsdt.aml'
1710 11:04:31.993221 CBFS: Found @ offset 10bb80 size 3fa5
1711 11:04:31.999116 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 11:04:32.003132 CBFS @ c08000 size 3f8000
1713 11:04:32.005899 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 11:04:32.009074 CBFS: Locating 'fallback/slic'
1715 11:04:32.013884 CBFS: 'fallback/slic' not found.
1716 11:04:32.020565 ACPI: Writing ACPI tables at 99b3e000.
1717 11:04:32.020980 ACPI: * FACS
1718 11:04:32.023547 ACPI: * DSDT
1719 11:04:32.027511 Ramoops buffer: 0x100000@0x99a3d000.
1720 11:04:32.030593 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 11:04:32.036718 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 11:04:32.040484 Google Chrome EC: version:
1723 11:04:32.043480 ro: helios_v2.0.2659-56403530b
1724 11:04:32.046679 rw: helios_v2.0.2849-c41de27e7d
1725 11:04:32.047218 running image: 1
1726 11:04:32.051338 ACPI: * FADT
1727 11:04:32.051753 SCI is IRQ9
1728 11:04:32.057390 ACPI: added table 1/32, length now 40
1729 11:04:32.057824 ACPI: * SSDT
1730 11:04:32.060920 Found 1 CPU(s) with 8 core(s) each.
1731 11:04:32.064488 Error: Could not locate 'wifi_sar' in VPD.
1732 11:04:32.071328 Checking CBFS for default SAR values
1733 11:04:32.074270 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 11:04:32.077508 CBFS @ c08000 size 3f8000
1735 11:04:32.084392 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 11:04:32.087713 CBFS: Locating 'wifi_sar_defaults.hex'
1737 11:04:32.091252 CBFS: Found @ offset 5fac0 size 77
1738 11:04:32.094356 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 11:04:32.100526 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 11:04:32.104372 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 11:04:32.110585 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 11:04:32.114097 failed to find key in VPD: dsm_calib_r0_0
1743 11:04:32.124171 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 11:04:32.127136 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 11:04:32.130242 failed to find key in VPD: dsm_calib_r0_1
1746 11:04:32.140429 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 11:04:32.146921 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 11:04:32.150673 failed to find key in VPD: dsm_calib_r0_2
1749 11:04:32.160222 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 11:04:32.163432 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 11:04:32.170324 failed to find key in VPD: dsm_calib_r0_3
1752 11:04:32.176623 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 11:04:32.183891 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 11:04:32.186984 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 11:04:32.190433 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 11:04:32.194612 EC returned error result code 1
1757 11:04:32.197799 EC returned error result code 1
1758 11:04:32.201999 EC returned error result code 1
1759 11:04:32.208539 PS2K: Bad resp from EC. Vivaldi disabled!
1760 11:04:32.211785 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 11:04:32.218605 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 11:04:32.224706 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 11:04:32.228070 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 11:04:32.234908 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 11:04:32.242055 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 11:04:32.248308 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 11:04:32.251462 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 11:04:32.258065 ACPI: added table 2/32, length now 44
1769 11:04:32.258578 ACPI: * MCFG
1770 11:04:32.261651 ACPI: added table 3/32, length now 48
1771 11:04:32.264362 ACPI: * TPM2
1772 11:04:32.267991 TPM2 log created at 99a2d000
1773 11:04:32.271786 ACPI: added table 4/32, length now 52
1774 11:04:32.272322 ACPI: * MADT
1775 11:04:32.275049 SCI is IRQ9
1776 11:04:32.278391 ACPI: added table 5/32, length now 56
1777 11:04:32.278807 current = 99b43ac0
1778 11:04:32.281132 ACPI: * DMAR
1779 11:04:32.284225 ACPI: added table 6/32, length now 60
1780 11:04:32.287798 ACPI: * IGD OpRegion
1781 11:04:32.288427 GMA: Found VBT in CBFS
1782 11:04:32.291349 GMA: Found valid VBT in CBFS
1783 11:04:32.294675 ACPI: added table 7/32, length now 64
1784 11:04:32.297505 ACPI: * HPET
1785 11:04:32.300731 ACPI: added table 8/32, length now 68
1786 11:04:32.301146 ACPI: done.
1787 11:04:32.304350 ACPI tables: 31744 bytes.
1788 11:04:32.307849 smbios_write_tables: 99a2c000
1789 11:04:32.311410 EC returned error result code 3
1790 11:04:32.314579 Couldn't obtain OEM name from CBI
1791 11:04:32.318055 Create SMBIOS type 17
1792 11:04:32.320975 PCI: 00:00.0 (Intel Cannonlake)
1793 11:04:32.324561 PCI: 00:14.3 (Intel WiFi)
1794 11:04:32.327783 SMBIOS tables: 939 bytes.
1795 11:04:32.331289 Writing table forward entry at 0x00000500
1796 11:04:32.337664 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 11:04:32.340839 Writing coreboot table at 0x99b62000
1798 11:04:32.347760 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 11:04:32.351028 1. 0000000000001000-000000000009ffff: RAM
1800 11:04:32.354096 2. 00000000000a0000-00000000000fffff: RESERVED
1801 11:04:32.360864 3. 0000000000100000-0000000099a2bfff: RAM
1802 11:04:32.364544 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 11:04:32.370713 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 11:04:32.377460 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 11:04:32.380741 7. 000000009a000000-000000009f7fffff: RESERVED
1806 11:04:32.387906 8. 00000000e0000000-00000000efffffff: RESERVED
1807 11:04:32.390951 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 11:04:32.393799 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 11:04:32.400702 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 11:04:32.403810 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 11:04:32.410729 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 11:04:32.413728 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 11:04:32.417410 15. 0000000100000000-000000045e7fffff: RAM
1814 11:04:32.423952 Graphics framebuffer located at 0xc0000000
1815 11:04:32.427033 Passing 5 GPIOs to payload:
1816 11:04:32.430672 NAME | PORT | POLARITY | VALUE
1817 11:04:32.437344 write protect | undefined | high | low
1818 11:04:32.440276 lid | undefined | high | high
1819 11:04:32.447078 power | undefined | high | low
1820 11:04:32.453794 oprom | undefined | high | low
1821 11:04:32.457033 EC in RW | 0x000000cb | high | low
1822 11:04:32.460648 Board ID: 4
1823 11:04:32.463650 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 11:04:32.467177 CBFS @ c08000 size 3f8000
1825 11:04:32.473622 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 11:04:32.477153 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 11:04:32.480018 coreboot table: 1492 bytes.
1828 11:04:32.483187 IMD ROOT 0. 99fff000 00001000
1829 11:04:32.486991 IMD SMALL 1. 99ffe000 00001000
1830 11:04:32.490433 FSP MEMORY 2. 99c4e000 003b0000
1831 11:04:32.493451 CONSOLE 3. 99c2e000 00020000
1832 11:04:32.497310 FMAP 4. 99c2d000 0000054e
1833 11:04:32.500175 TIME STAMP 5. 99c2c000 00000910
1834 11:04:32.503647 VBOOT WORK 6. 99c18000 00014000
1835 11:04:32.507027 MRC DATA 7. 99c16000 00001958
1836 11:04:32.510027 ROMSTG STCK 8. 99c15000 00001000
1837 11:04:32.513684 AFTER CAR 9. 99c0b000 0000a000
1838 11:04:32.516669 RAMSTAGE 10. 99baf000 0005c000
1839 11:04:32.519872 REFCODE 11. 99b7a000 00035000
1840 11:04:32.523657 SMM BACKUP 12. 99b6a000 00010000
1841 11:04:32.526533 COREBOOT 13. 99b62000 00008000
1842 11:04:32.530203 ACPI 14. 99b3e000 00024000
1843 11:04:32.533304 ACPI GNVS 15. 99b3d000 00001000
1844 11:04:32.536645 RAMOOPS 16. 99a3d000 00100000
1845 11:04:32.539933 TPM2 TCGLOG17. 99a2d000 00010000
1846 11:04:32.543653 SMBIOS 18. 99a2c000 00000800
1847 11:04:32.546758 IMD small region:
1848 11:04:32.550166 IMD ROOT 0. 99ffec00 00000400
1849 11:04:32.553812 FSP RUNTIME 1. 99ffebe0 00000004
1850 11:04:32.556799 EC HOSTEVENT 2. 99ffebc0 00000008
1851 11:04:32.559987 POWER STATE 3. 99ffeb80 00000040
1852 11:04:32.563859 ROMSTAGE 4. 99ffeb60 00000004
1853 11:04:32.566827 MEM INFO 5. 99ffe9a0 000001b9
1854 11:04:32.569972 VPD 6. 99ffe920 0000006c
1855 11:04:32.573767 MTRR: Physical address space:
1856 11:04:32.579838 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 11:04:32.586395 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 11:04:32.593347 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 11:04:32.599984 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 11:04:32.606803 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 11:04:32.612925 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 11:04:32.616608 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 11:04:32.623044 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 11:04:32.626205 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 11:04:32.629292 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 11:04:32.632912 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 11:04:32.639599 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 11:04:32.642835 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 11:04:32.646318 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 11:04:32.649235 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 11:04:32.656046 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 11:04:32.659081 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 11:04:32.662409 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 11:04:32.666120 call enable_fixed_mtrr()
1875 11:04:32.669141 CPU physical address size: 39 bits
1876 11:04:32.673116 MTRR: default type WB/UC MTRR counts: 6/8.
1877 11:04:32.676142 MTRR: WB selected as default type.
1878 11:04:32.682417 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 11:04:32.689262 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 11:04:32.695968 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 11:04:32.702274 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 11:04:32.709012 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 11:04:32.716063 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 11:04:32.719157 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 11:04:32.725444 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 11:04:32.729289 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 11:04:32.732446 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 11:04:32.735528 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 11:04:32.738480 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 11:04:32.745359 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 11:04:32.748771 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 11:04:32.751785 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 11:04:32.754927 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 11:04:32.761713 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 11:04:32.762129
1896 11:04:32.762454 MTRR check
1897 11:04:32.765394 Fixed MTRRs : Enabled
1898 11:04:32.768310 Variable MTRRs: Enabled
1899 11:04:32.768724
1900 11:04:32.769051 call enable_fixed_mtrr()
1901 11:04:32.775146 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1902 11:04:32.778421 CPU physical address size: 39 bits
1903 11:04:32.784811 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1904 11:04:32.788567 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 11:04:32.791771 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 11:04:32.794744 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 11:04:32.801831 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 11:04:32.804864 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 11:04:32.808661 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 11:04:32.811425 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 11:04:32.818259 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 11:04:32.821352 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 11:04:32.824947 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 11:04:32.828075 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 11:04:32.835295 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 11:04:32.835803 call enable_fixed_mtrr()
1917 11:04:32.842086 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 11:04:32.844939 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 11:04:32.848175 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 11:04:32.851782 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 11:04:32.858705 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 11:04:32.861649 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 11:04:32.864897 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 11:04:32.868346 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 11:04:32.871509 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 11:04:32.878335 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 11:04:32.881254 CPU physical address size: 39 bits
1928 11:04:32.884798 call enable_fixed_mtrr()
1929 11:04:32.888133 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 11:04:32.891178 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 11:04:32.894961 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 11:04:32.901054 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 11:04:32.904619 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 11:04:32.907657 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 11:04:32.911289 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 11:04:32.918019 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 11:04:32.921270 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 11:04:32.924417 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 11:04:32.928169 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 11:04:32.934468 MTRR: Fixed MSR 0x250 0x0606060606060606
1941 11:04:32.934877 call enable_fixed_mtrr()
1942 11:04:32.941257 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 11:04:32.944358 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 11:04:32.948347 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 11:04:32.951261 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 11:04:32.954309 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 11:04:32.961319 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 11:04:32.964403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 11:04:32.967585 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 11:04:32.970781 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 11:04:32.977547 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 11:04:32.981036 CPU physical address size: 39 bits
1953 11:04:32.984377 call enable_fixed_mtrr()
1954 11:04:32.987399 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 11:04:32.990973 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 11:04:32.994294 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 11:04:33.000869 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 11:04:33.004914 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 11:04:33.007128 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 11:04:33.010762 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 11:04:33.017288 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 11:04:33.020398 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 11:04:33.024131 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 11:04:33.027210 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 11:04:33.034098 MTRR: Fixed MSR 0x250 0x0606060606060606
1966 11:04:33.034553 call enable_fixed_mtrr()
1967 11:04:33.040324 MTRR: Fixed MSR 0x258 0x0606060606060606
1968 11:04:33.044194 MTRR: Fixed MSR 0x259 0x0000000000000000
1969 11:04:33.047219 MTRR: Fixed MSR 0x268 0x0606060606060606
1970 11:04:33.050426 MTRR: Fixed MSR 0x269 0x0606060606060606
1971 11:04:33.054006 MTRR: Fixed MSR 0x26a 0x0606060606060606
1972 11:04:33.060022 MTRR: Fixed MSR 0x26b 0x0606060606060606
1973 11:04:33.063918 MTRR: Fixed MSR 0x26c 0x0606060606060606
1974 11:04:33.066914 MTRR: Fixed MSR 0x26d 0x0606060606060606
1975 11:04:33.070020 MTRR: Fixed MSR 0x26e 0x0606060606060606
1976 11:04:33.077003 MTRR: Fixed MSR 0x26f 0x0606060606060606
1977 11:04:33.080125 CPU physical address size: 39 bits
1978 11:04:33.083827 call enable_fixed_mtrr()
1979 11:04:33.084234 CBFS @ c08000 size 3f8000
1980 11:04:33.090116 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1981 11:04:33.093519 CBFS: Locating 'fallback/payload'
1982 11:04:33.096637 CPU physical address size: 39 bits
1983 11:04:33.100378 CBFS: Found @ offset 1c96c0 size 3f798
1984 11:04:33.107024 CPU physical address size: 39 bits
1985 11:04:33.110134 CPU physical address size: 39 bits
1986 11:04:33.113382 Checking segment from ROM address 0xffdd16f8
1987 11:04:33.116831 Checking segment from ROM address 0xffdd1714
1988 11:04:33.123552 Loading segment from ROM address 0xffdd16f8
1989 11:04:33.123982 code (compression=0)
1990 11:04:33.133374 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 11:04:33.139944 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 11:04:33.143275 it's not compressed!
1993 11:04:33.235698 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 11:04:33.242378 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 11:04:33.245403 Loading segment from ROM address 0xffdd1714
1996 11:04:33.248808 Entry Point 0x30000000
1997 11:04:33.252314 Loaded segments
1998 11:04:33.257793 Finalizing chipset.
1999 11:04:33.260948 Finalizing SMM.
2000 11:04:33.264043 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2001 11:04:33.267743 mp_park_aps done after 0 msecs.
2002 11:04:33.274577 Jumping to boot code at 30000000(99b62000)
2003 11:04:33.280834 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 11:04:33.281237
2005 11:04:33.281605
2006 11:04:33.282063
2007 11:04:33.284180 Starting depthcharge on Helios...
2008 11:04:33.284595
2009 11:04:33.285621 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 11:04:33.286226 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 11:04:33.286649 Setting prompt string to ['hatch:']
2012 11:04:33.287086 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 11:04:33.293889 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 11:04:33.294469
2015 11:04:33.300496 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 11:04:33.301047
2017 11:04:33.307598 board_setup: Info: eMMC controller not present; skipping
2018 11:04:33.308031
2019 11:04:33.310593 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 11:04:33.311018
2021 11:04:33.317053 board_setup: Info: SDHCI controller not present; skipping
2022 11:04:33.317470
2023 11:04:33.320503 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 11:04:33.324096
2025 11:04:33.324588 Wipe memory regions:
2026 11:04:33.324919
2027 11:04:33.327060 [0x00000000001000, 0x000000000a0000)
2028 11:04:33.327472
2029 11:04:33.330635 [0x00000000100000, 0x00000030000000)
2030 11:04:33.396855
2031 11:04:33.399883 [0x00000030657430, 0x00000099a2c000)
2032 11:04:33.547187
2033 11:04:33.549331 [0x00000100000000, 0x0000045e800000)
2034 11:04:35.005507
2035 11:04:35.005658 R8152: Initializing
2036 11:04:35.005768
2037 11:04:35.008621 Version 9 (ocp_data = 6010)
2038 11:04:35.012817
2039 11:04:35.012912 R8152: Done initializing
2040 11:04:35.013008
2041 11:04:35.016468 Adding net device
2042 11:04:35.498776
2043 11:04:35.498927 R8152: Initializing
2044 11:04:35.499039
2045 11:04:35.502357 Version 6 (ocp_data = 5c30)
2046 11:04:35.502476
2047 11:04:35.505486 R8152: Done initializing
2048 11:04:35.505577
2049 11:04:35.508939 net_add_device: Attemp to include the same device
2050 11:04:35.512256
2051 11:04:35.519398 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 11:04:35.519502
2053 11:04:35.519577
2054 11:04:35.519644
2055 11:04:35.519953 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 11:04:35.620273 hatch: tftpboot 192.168.201.1 13086276/tftp-deploy-ih3x6w6x/kernel/bzImage 13086276/tftp-deploy-ih3x6w6x/kernel/cmdline 13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
2058 11:04:35.620445 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 11:04:35.620554 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 11:04:35.624728 tftpboot 192.168.201.1 13086276/tftp-deploy-ih3x6w6x/kernel/bzImploy-ih3x6w6x/kernel/cmdline 13086276/tftp-deploy-ih3x6w6x/ramdisk/ramdisk.cpio.gz
2061 11:04:35.624825
2062 11:04:35.624908 Waiting for link
2063 11:04:35.825461
2064 11:04:35.825597 done.
2065 11:04:35.825670
2066 11:04:35.825746 MAC: 00:24:32:50:1a:59
2067 11:04:35.825811
2068 11:04:35.829051 Sending DHCP discover... done.
2069 11:04:35.829171
2070 11:04:35.832259 Waiting for reply... done.
2071 11:04:35.832344
2072 11:04:35.836506 Sending DHCP request... done.
2073 11:04:35.836604
2074 11:04:35.844931 Waiting for reply... done.
2075 11:04:35.845029
2076 11:04:35.845101 My ip is 192.168.201.14
2077 11:04:35.845168
2078 11:04:35.847877 The DHCP server ip is 192.168.201.1
2079 11:04:35.851339
2080 11:04:35.854967 TFTP server IP predefined by user: 192.168.201.1
2081 11:04:35.855067
2082 11:04:35.861312 Bootfile predefined by user: 13086276/tftp-deploy-ih3x6w6x/kernel/bzImage
2083 11:04:35.861441
2084 11:04:35.864927 Sending tftp read request... done.
2085 11:04:35.865027
2086 11:04:35.871156 Waiting for the transfer...
2087 11:04:35.871260
2088 11:04:36.388035 00000000 ################################################################
2089 11:04:36.388186
2090 11:04:36.897556 00080000 ################################################################
2091 11:04:36.897734
2092 11:04:37.406316 00100000 ################################################################
2093 11:04:37.406487
2094 11:04:37.933550 00180000 ################################################################
2095 11:04:37.933733
2096 11:04:38.454509 00200000 ################################################################
2097 11:04:38.454702
2098 11:04:38.982158 00280000 ################################################################
2099 11:04:38.982328
2100 11:04:39.517055 00300000 ################################################################
2101 11:04:39.517229
2102 11:04:40.034930 00380000 ################################################################
2103 11:04:40.035101
2104 11:04:40.548773 00400000 ################################################################
2105 11:04:40.548946
2106 11:04:41.076789 00480000 ################################################################
2107 11:04:41.076927
2108 11:04:41.612293 00500000 ################################################################
2109 11:04:41.612435
2110 11:04:42.139417 00580000 ################################################################
2111 11:04:42.139589
2112 11:04:42.662233 00600000 ################################################################
2113 11:04:42.662410
2114 11:04:43.206288 00680000 ################################################################
2115 11:04:43.206450
2116 11:04:43.762052 00700000 ################################################################
2117 11:04:43.762196
2118 11:04:44.359589 00780000 ################################################################
2119 11:04:44.359733
2120 11:04:44.946788 00800000 ################################################################
2121 11:04:44.946935
2122 11:04:45.414408 00880000 ######################################################## done.
2123 11:04:45.414558
2124 11:04:45.417470 The bootfile was 9371536 bytes long.
2125 11:04:45.417565
2126 11:04:45.420909 Sending tftp read request... done.
2127 11:04:45.421003
2128 11:04:45.424045 Waiting for the transfer...
2129 11:04:45.424173
2130 11:04:45.967463 00000000 ################################################################
2131 11:04:45.967624
2132 11:04:46.520857 00080000 ################################################################
2133 11:04:46.521029
2134 11:04:47.039040 00100000 ################################################################
2135 11:04:47.039194
2136 11:04:47.564297 00180000 ################################################################
2137 11:04:47.564461
2138 11:04:48.073282 00200000 ################################################################
2139 11:04:48.073440
2140 11:04:48.615970 00280000 ################################################################
2141 11:04:48.616151
2142 11:04:49.162637 00300000 ################################################################
2143 11:04:49.162792
2144 11:04:49.712395 00380000 ################################################################
2145 11:04:49.712554
2146 11:04:50.273259 00400000 ################################################################
2147 11:04:50.273427
2148 11:04:50.832941 00480000 ################################################################
2149 11:04:50.833092
2150 11:04:51.378700 00500000 ################################################################ done.
2151 11:04:51.378853
2152 11:04:51.381815 Sending tftp read request... done.
2153 11:04:51.381911
2154 11:04:51.384921 Waiting for the transfer...
2155 11:04:51.385010
2156 11:04:51.388630 00000000 # done.
2157 11:04:51.388721
2158 11:04:51.398009 Command line loaded dynamically from TFTP file: 13086276/tftp-deploy-ih3x6w6x/kernel/cmdline
2159 11:04:51.398099
2160 11:04:51.424813 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086276/extract-nfsrootfs-nwixk1d1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2161 11:04:51.427768
2162 11:04:51.431542 ec_init(0): CrosEC protocol v3 supported (256, 256)
2163 11:04:51.436330
2164 11:04:51.439722 Shutting down all USB controllers.
2165 11:04:51.439814
2166 11:04:51.439884 Removing current net device
2167 11:04:51.443713
2168 11:04:51.443803 Finalizing coreboot
2169 11:04:51.443875
2170 11:04:51.450034 Exiting depthcharge with code 4 at timestamp: 25494626
2171 11:04:51.450127
2172 11:04:51.450198
2173 11:04:51.450265 Starting kernel ...
2174 11:04:51.450328
2175 11:04:51.450390
2176 11:04:51.450772 end: 2.2.4 bootloader-commands (duration 00:00:18) [common]
2177 11:04:51.450877 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2178 11:04:51.450959 Setting prompt string to ['Linux version [0-9]']
2179 11:04:51.451034 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 11:04:51.451110 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2182 11:09:15.451827 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2184 11:09:15.453004 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2186 11:09:15.453867 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2189 11:09:15.455264 end: 2 depthcharge-action (duration 00:05:00) [common]
2191 11:09:15.456519 Cleaning after the job
2192 11:09:15.457014 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/ramdisk
2193 11:09:15.461346 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/kernel
2194 11:09:15.467703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/nfsrootfs
2195 11:09:15.574510 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086276/tftp-deploy-ih3x6w6x/modules
2196 11:09:15.575017 start: 5.1 power-off (timeout 00:00:30) [common]
2197 11:09:15.575207 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2198 11:09:15.656380 >> Command sent successfully.
2199 11:09:15.662590 Returned 0 in 0 seconds
2200 11:09:15.763817 end: 5.1 power-off (duration 00:00:00) [common]
2202 11:09:15.765386 start: 5.2 read-feedback (timeout 00:10:00) [common]
2203 11:09:15.766718 Listened to connection for namespace 'common' for up to 1s
2205 11:09:15.768122 Listened to connection for namespace 'common' for up to 1s
2206 11:09:16.766259 Finalising connection for namespace 'common'
2207 11:09:16.766527 Disconnecting from shell: Finalise
2208 11:09:16.766699
2209 11:09:16.867196 end: 5.2 read-feedback (duration 00:00:01) [common]
2210 11:09:16.867466 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086276
2211 11:09:17.230088 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086276
2212 11:09:17.230296 JobError: Your job cannot terminate cleanly.