Boot log: asus-cx9400-volteer
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 11:03:02.844362 lava-dispatcher, installed at version: 2024.01
2 11:03:02.844600 start: 0 validate
3 11:03:02.844767 Start time: 2024-03-18 11:03:02.844759+00:00 (UTC)
4 11:03:02.844889 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:03:02.845013 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Finitrd.cpio.gz exists
6 11:03:02.847805 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:03:02.847922 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip83-rt47-235-g261e3020817c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 11:03:05.357733 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:03:05.358502 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20240129.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 11:03:05.612122 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:03:05.612926 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip83-rt47-235-g261e3020817c%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
12 11:03:06.179301 validate duration: 3.33
14 11:03:06.179586 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:03:06.179688 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:03:06.179774 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:03:06.179899 Not decompressing ramdisk as can be used compressed.
18 11:03:06.179985 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/initrd.cpio.gz
19 11:03:06.180049 saving as /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/ramdisk/initrd.cpio.gz
20 11:03:06.180114 total size: 5431448 (5 MB)
21 11:03:06.181175 progress 0 % (0 MB)
22 11:03:06.182822 progress 5 % (0 MB)
23 11:03:06.184271 progress 10 % (0 MB)
24 11:03:06.185700 progress 15 % (0 MB)
25 11:03:06.187342 progress 20 % (1 MB)
26 11:03:06.188796 progress 25 % (1 MB)
27 11:03:06.190204 progress 30 % (1 MB)
28 11:03:06.191775 progress 35 % (1 MB)
29 11:03:06.193190 progress 40 % (2 MB)
30 11:03:06.194604 progress 45 % (2 MB)
31 11:03:06.196012 progress 50 % (2 MB)
32 11:03:06.197569 progress 55 % (2 MB)
33 11:03:06.199017 progress 60 % (3 MB)
34 11:03:06.200491 progress 65 % (3 MB)
35 11:03:06.202081 progress 70 % (3 MB)
36 11:03:06.203497 progress 75 % (3 MB)
37 11:03:06.204896 progress 80 % (4 MB)
38 11:03:06.206287 progress 85 % (4 MB)
39 11:03:06.207848 progress 90 % (4 MB)
40 11:03:06.209245 progress 95 % (4 MB)
41 11:03:06.210661 progress 100 % (5 MB)
42 11:03:06.210871 5 MB downloaded in 0.03 s (168.41 MB/s)
43 11:03:06.211032 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:03:06.211286 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:03:06.211374 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:03:06.211460 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:03:06.211602 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip83-rt47-235-g261e3020817c/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
49 11:03:06.211672 saving as /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/kernel/bzImage
50 11:03:06.211733 total size: 9371536 (8 MB)
51 11:03:06.211795 No compression specified
52 11:03:06.212921 progress 0 % (0 MB)
53 11:03:06.215459 progress 5 % (0 MB)
54 11:03:06.217910 progress 10 % (0 MB)
55 11:03:06.220420 progress 15 % (1 MB)
56 11:03:06.223072 progress 20 % (1 MB)
57 11:03:06.225577 progress 25 % (2 MB)
58 11:03:06.228085 progress 30 % (2 MB)
59 11:03:06.230765 progress 35 % (3 MB)
60 11:03:06.233205 progress 40 % (3 MB)
61 11:03:06.235732 progress 45 % (4 MB)
62 11:03:06.238232 progress 50 % (4 MB)
63 11:03:06.240882 progress 55 % (4 MB)
64 11:03:06.243477 progress 60 % (5 MB)
65 11:03:06.245920 progress 65 % (5 MB)
66 11:03:06.248597 progress 70 % (6 MB)
67 11:03:06.251049 progress 75 % (6 MB)
68 11:03:06.253434 progress 80 % (7 MB)
69 11:03:06.256033 progress 85 % (7 MB)
70 11:03:06.258444 progress 90 % (8 MB)
71 11:03:06.260840 progress 95 % (8 MB)
72 11:03:06.263276 progress 100 % (8 MB)
73 11:03:06.263524 8 MB downloaded in 0.05 s (172.58 MB/s)
74 11:03:06.263674 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:03:06.263916 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:03:06.264004 start: 1.3 download-retry (timeout 00:10:00) [common]
78 11:03:06.264091 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 11:03:06.264231 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20240129.0/amd64/full.rootfs.tar.xz
80 11:03:06.264301 saving as /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/nfsrootfs/full.rootfs.tar
81 11:03:06.264364 total size: 133429172 (127 MB)
82 11:03:06.264427 Using unxz to decompress xz
83 11:03:06.268890 progress 0 % (0 MB)
84 11:03:06.612774 progress 5 % (6 MB)
85 11:03:06.983713 progress 10 % (12 MB)
86 11:03:07.291445 progress 15 % (19 MB)
87 11:03:07.475580 progress 20 % (25 MB)
88 11:03:07.719435 progress 25 % (31 MB)
89 11:03:08.102955 progress 30 % (38 MB)
90 11:03:08.469066 progress 35 % (44 MB)
91 11:03:08.878466 progress 40 % (50 MB)
92 11:03:09.277869 progress 45 % (57 MB)
93 11:03:09.640585 progress 50 % (63 MB)
94 11:03:10.024386 progress 55 % (70 MB)
95 11:03:10.393585 progress 60 % (76 MB)
96 11:03:10.763493 progress 65 % (82 MB)
97 11:03:11.134314 progress 70 % (89 MB)
98 11:03:11.511208 progress 75 % (95 MB)
99 11:03:11.966186 progress 80 % (101 MB)
100 11:03:12.407461 progress 85 % (108 MB)
101 11:03:12.677461 progress 90 % (114 MB)
102 11:03:13.029044 progress 95 % (120 MB)
103 11:03:13.428143 progress 100 % (127 MB)
104 11:03:13.434838 127 MB downloaded in 7.17 s (17.75 MB/s)
105 11:03:13.435126 end: 1.3.1 http-download (duration 00:00:07) [common]
107 11:03:13.435391 end: 1.3 download-retry (duration 00:00:07) [common]
108 11:03:13.435481 start: 1.4 download-retry (timeout 00:09:53) [common]
109 11:03:13.435568 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 11:03:13.435719 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip83-rt47-235-g261e3020817c/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
111 11:03:13.435791 saving as /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/modules/modules.tar
112 11:03:13.435852 total size: 254088 (0 MB)
113 11:03:13.435916 Using unxz to decompress xz
114 11:03:13.440187 progress 12 % (0 MB)
115 11:03:13.440599 progress 25 % (0 MB)
116 11:03:13.440843 progress 38 % (0 MB)
117 11:03:13.442462 progress 51 % (0 MB)
118 11:03:13.444374 progress 64 % (0 MB)
119 11:03:13.446136 progress 77 % (0 MB)
120 11:03:13.448152 progress 90 % (0 MB)
121 11:03:13.450047 progress 100 % (0 MB)
122 11:03:13.455623 0 MB downloaded in 0.02 s (12.26 MB/s)
123 11:03:13.455884 end: 1.4.1 http-download (duration 00:00:00) [common]
125 11:03:13.456153 end: 1.4 download-retry (duration 00:00:00) [common]
126 11:03:13.456248 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
127 11:03:13.456344 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
128 11:03:15.615741 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/13086326/extract-nfsrootfs-jj_y53l5
129 11:03:15.615948 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
130 11:03:15.616048 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
131 11:03:15.616209 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i
132 11:03:15.616344 makedir: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin
133 11:03:15.616448 makedir: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/tests
134 11:03:15.616549 makedir: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/results
135 11:03:15.616652 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-add-keys
136 11:03:15.616796 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-add-sources
137 11:03:15.616928 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-background-process-start
138 11:03:15.617059 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-background-process-stop
139 11:03:15.617188 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-common-functions
140 11:03:15.617315 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-echo-ipv4
141 11:03:15.617442 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-install-packages
142 11:03:15.617568 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-installed-packages
143 11:03:15.617693 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-os-build
144 11:03:15.617820 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-probe-channel
145 11:03:15.617947 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-probe-ip
146 11:03:15.618074 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-target-ip
147 11:03:15.618200 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-target-mac
148 11:03:15.618327 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-target-storage
149 11:03:15.618531 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-case
150 11:03:15.618665 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-event
151 11:03:15.618792 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-feedback
152 11:03:15.618919 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-raise
153 11:03:15.619046 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-reference
154 11:03:15.619172 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-runner
155 11:03:15.619298 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-set
156 11:03:15.619424 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-test-shell
157 11:03:15.619552 Updating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-install-packages (oe)
158 11:03:15.619709 Updating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/bin/lava-installed-packages (oe)
159 11:03:15.619835 Creating /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/environment
160 11:03:15.619932 LAVA metadata
161 11:03:15.620003 - LAVA_JOB_ID=13086326
162 11:03:15.620068 - LAVA_DISPATCHER_IP=192.168.201.1
163 11:03:15.620169 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
164 11:03:15.620236 skipped lava-vland-overlay
165 11:03:15.620311 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
166 11:03:15.620390 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
167 11:03:15.620451 skipped lava-multinode-overlay
168 11:03:15.620523 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
169 11:03:15.620601 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
170 11:03:15.620673 Loading test definitions
171 11:03:15.620759 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
172 11:03:15.620830 Using /lava-13086326 at stage 0
173 11:03:15.621145 uuid=13086326_1.5.2.3.1 testdef=None
174 11:03:15.621235 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
175 11:03:15.621319 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
176 11:03:15.621823 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
178 11:03:15.622045 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
179 11:03:15.622688 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
181 11:03:15.622918 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
182 11:03:15.623535 runner path: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/0/tests/0_dmesg test_uuid 13086326_1.5.2.3.1
183 11:03:15.623697 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
185 11:03:15.623920 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
186 11:03:15.623990 Using /lava-13086326 at stage 1
187 11:03:15.624287 uuid=13086326_1.5.2.3.5 testdef=None
188 11:03:15.624374 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
189 11:03:15.624457 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
190 11:03:15.624923 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
192 11:03:15.625137 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
193 11:03:15.625776 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
195 11:03:15.626003 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
196 11:03:15.626641 runner path: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/1/tests/1_bootrr test_uuid 13086326_1.5.2.3.5
197 11:03:15.626796 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
199 11:03:15.627000 Creating lava-test-runner.conf files
200 11:03:15.627063 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/0 for stage 0
201 11:03:15.627154 - 0_dmesg
202 11:03:15.627234 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13086326/lava-overlay-4tybj8_i/lava-13086326/1 for stage 1
203 11:03:15.627325 - 1_bootrr
204 11:03:15.627421 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
205 11:03:15.627504 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
206 11:03:15.634958 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
207 11:03:15.635066 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
208 11:03:15.635152 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 11:03:15.635237 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
210 11:03:15.635323 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
211 11:03:15.774067 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 11:03:15.774653 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
213 11:03:15.774861 extracting modules file /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086326/extract-nfsrootfs-jj_y53l5
214 11:03:15.803523 extracting modules file /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13086326/extract-overlay-ramdisk-89c21sc2/ramdisk
215 11:03:15.824790 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 11:03:15.825057 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
217 11:03:15.825218 [common] Applying overlay to NFS
218 11:03:15.825302 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13086326/compress-overlay-cx16xpli/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13086326/extract-nfsrootfs-jj_y53l5
219 11:03:15.833555 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
220 11:03:15.833722 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
221 11:03:15.833859 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 11:03:15.833999 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
223 11:03:15.834120 Building ramdisk /var/lib/lava/dispatcher/tmp/13086326/extract-overlay-ramdisk-89c21sc2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13086326/extract-overlay-ramdisk-89c21sc2/ramdisk
224 11:03:15.915722 >> 26190 blocks
225 11:03:16.460516 rename /var/lib/lava/dispatcher/tmp/13086326/extract-overlay-ramdisk-89c21sc2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
226 11:03:16.460991 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 11:03:16.461125 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
228 11:03:16.461247 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
229 11:03:16.461357 No mkimage arch provided, not using FIT.
230 11:03:16.461462 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 11:03:16.461566 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 11:03:16.461687 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
233 11:03:16.461824 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
234 11:03:16.461943 No LXC device requested
235 11:03:16.462066 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 11:03:16.462198 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
237 11:03:16.462319 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 11:03:16.462460 Checking files for TFTP limit of 4294967296 bytes.
239 11:03:16.463006 end: 1 tftp-deploy (duration 00:00:10) [common]
240 11:03:16.463153 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 11:03:16.463288 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 11:03:16.463472 substitutions:
243 11:03:16.463575 - {DTB}: None
244 11:03:16.463657 - {INITRD}: 13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
245 11:03:16.463739 - {KERNEL}: 13086326/tftp-deploy-ytoru72r/kernel/bzImage
246 11:03:16.463818 - {LAVA_MAC}: None
247 11:03:16.463896 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/13086326/extract-nfsrootfs-jj_y53l5
248 11:03:16.463976 - {NFS_SERVER_IP}: 192.168.201.1
249 11:03:16.464053 - {PRESEED_CONFIG}: None
250 11:03:16.464149 - {PRESEED_LOCAL}: None
251 11:03:16.464246 - {RAMDISK}: 13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
252 11:03:16.464341 - {ROOT_PART}: None
253 11:03:16.464437 - {ROOT}: None
254 11:03:16.464532 - {SERVER_IP}: 192.168.201.1
255 11:03:16.464627 - {TEE}: None
256 11:03:16.464722 Parsed boot commands:
257 11:03:16.464815 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 11:03:16.465057 Parsed boot commands: tftpboot 192.168.201.1 13086326/tftp-deploy-ytoru72r/kernel/bzImage 13086326/tftp-deploy-ytoru72r/kernel/cmdline 13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
259 11:03:16.465187 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 11:03:16.465317 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 11:03:16.465452 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 11:03:16.465581 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 11:03:16.465692 Not connected, no need to disconnect.
264 11:03:16.465812 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 11:03:16.465944 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 11:03:16.466052 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-cx9400-volteer-cbg-0'
267 11:03:16.470409 Setting prompt string to ['lava-test: # ']
268 11:03:16.470803 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 11:03:16.470924 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 11:03:16.471064 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 11:03:16.471199 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 11:03:16.471483 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=reboot'
273 11:03:21.624151 >> Command sent successfully.
274 11:03:21.634810 Returned 0 in 5 seconds
275 11:03:21.736117 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 11:03:21.738048 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 11:03:21.738685 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 11:03:21.739194 Setting prompt string to 'Starting depthcharge on Voema...'
280 11:03:21.739579 Changing prompt to 'Starting depthcharge on Voema...'
281 11:03:21.739966 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
282 11:03:21.741255 [Enter `^Ec?' for help]
283 11:03:23.358471
284 11:03:23.358971
285 11:03:23.368400 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
286 11:03:23.371942 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
287 11:03:23.378886 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
288 11:03:23.381945 CPU: AES supported, TXT NOT supported, VT supported
289 11:03:23.388620 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
290 11:03:23.392069 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
291 11:03:23.398293 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
292 11:03:23.402432 VBOOT: Loading verstage.
293 11:03:23.405122 FMAP: Found "FLASH" version 1.1 at 0x1804000.
294 11:03:23.412166 FMAP: base = 0x0 size = 0x2000000 #areas = 32
295 11:03:23.415165 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
296 11:03:23.425525 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
297 11:03:23.432064 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
298 11:03:23.432610
299 11:03:23.432969
300 11:03:23.445549 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
301 11:03:23.459026 Probing TPM: . done!
302 11:03:23.462516 TPM ready after 0 ms
303 11:03:23.465927 Connected to device vid:did:rid of 1ae0:0028:00
304 11:03:23.477359 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
305 11:03:23.484129 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
306 11:03:23.487300 Initialized TPM device CR50 revision 0
307 11:03:23.536408 tlcl_send_startup: Startup return code is 0
308 11:03:23.537008 TPM: setup succeeded
309 11:03:23.551054 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
310 11:03:23.564528 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 11:03:23.577463 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
312 11:03:23.587488 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
313 11:03:23.591008 Chrome EC: UHEPI supported
314 11:03:23.594325 Phase 1
315 11:03:23.597697 FMAP: area GBB found @ 1805000 (458752 bytes)
316 11:03:23.607747 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
317 11:03:23.614533 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
318 11:03:23.621146 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
319 11:03:23.628005 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
320 11:03:23.631064 Recovery requested (1009000e)
321 11:03:23.634593 TPM: Extending digest for VBOOT: boot mode into PCR 0
322 11:03:23.646178 tlcl_extend: response is 0
323 11:03:23.653068 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
324 11:03:23.662652 tlcl_extend: response is 0
325 11:03:23.669277 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
326 11:03:23.676055 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
327 11:03:23.682314 BS: verstage times (exec / console): total (unknown) / 142 ms
328 11:03:23.682820
329 11:03:23.683193
330 11:03:23.695706 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
331 11:03:23.701982 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
332 11:03:23.705444 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
333 11:03:23.708937 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
334 11:03:23.715673 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
335 11:03:23.718802 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
336 11:03:23.722156 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
337 11:03:23.725588 TCO_STS: 0000 0000
338 11:03:23.728738 GEN_PMCON: d0015038 00002200
339 11:03:23.732222 GBLRST_CAUSE: 00000000 00000000
340 11:03:23.732679 HPR_CAUSE0: 00000000
341 11:03:23.736130 prev_sleep_state 5
342 11:03:23.738990 Boot Count incremented to 30401
343 11:03:23.745599 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
344 11:03:23.752215 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
345 11:03:23.759306 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
346 11:03:23.765728 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
347 11:03:23.770281 Chrome EC: UHEPI supported
348 11:03:23.776514 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
349 11:03:23.789889 Probing TPM: done!
350 11:03:23.797075 Connected to device vid:did:rid of 1ae0:0028:00
351 11:03:23.807392 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
352 11:03:23.814020 Initialized TPM device CR50 revision 0
353 11:03:23.823554 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
354 11:03:23.830258 MRC: Hash idx 0x100b comparison successful.
355 11:03:23.833733 MRC cache found, size faa8
356 11:03:23.834193 bootmode is set to: 2
357 11:03:23.836707 SPD index = 0
358 11:03:23.843496 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
359 11:03:23.846826 SPD: module type is LPDDR4X
360 11:03:23.850187 SPD: module part number is MT53E512M64D4NW-046
361 11:03:23.856697 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
362 11:03:23.863681 SPD: device width 16 bits, bus width 16 bits
363 11:03:23.866872 SPD: module size is 1024 MB (per channel)
364 11:03:24.298269 CBMEM:
365 11:03:24.301398 IMD: root @ 0x76fff000 254 entries.
366 11:03:24.305068 IMD: root @ 0x76ffec00 62 entries.
367 11:03:24.308351 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
368 11:03:24.314704 FMAP: area RW_VPD found @ f35000 (8192 bytes)
369 11:03:24.318318 External stage cache:
370 11:03:24.321463 IMD: root @ 0x7b3ff000 254 entries.
371 11:03:24.324445 IMD: root @ 0x7b3fec00 62 entries.
372 11:03:24.339967 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
373 11:03:24.346621 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
374 11:03:24.352901 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
375 11:03:24.367136 MRC: 'RECOVERY_MRC_CACHE' does not need update.
376 11:03:24.373642 cse_lite: Skip switching to RW in the recovery path
377 11:03:24.374096 8 DIMMs found
378 11:03:24.374660 SMM Memory Map
379 11:03:24.377918 SMRAM : 0x7b000000 0x800000
380 11:03:24.381669 Subregion 0: 0x7b000000 0x200000
381 11:03:24.385590 Subregion 1: 0x7b200000 0x200000
382 11:03:24.388930 Subregion 2: 0x7b400000 0x400000
383 11:03:24.392178 top_of_ram = 0x77000000
384 11:03:24.395557 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
385 11:03:24.402684 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
386 11:03:24.408822 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
387 11:03:24.412557 MTRR Range: Start=ff000000 End=0 (Size 1000000)
388 11:03:24.418799 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
389 11:03:24.425296 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
390 11:03:24.437036 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
391 11:03:24.443373 Processing 211 relocs. Offset value of 0x74c0b000
392 11:03:24.449880 BS: romstage times (exec / console): total (unknown) / 277 ms
393 11:03:24.456184
394 11:03:24.456703
395 11:03:24.465891 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
396 11:03:24.469636 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
397 11:03:24.479434 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
398 11:03:24.486088 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
399 11:03:24.492495 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
400 11:03:24.499354 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
401 11:03:24.546309 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
402 11:03:24.552859 Processing 5008 relocs. Offset value of 0x75d98000
403 11:03:24.556312 BS: postcar times (exec / console): total (unknown) / 59 ms
404 11:03:24.559220
405 11:03:24.559646
406 11:03:24.569236 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
407 11:03:24.569785 Normal boot
408 11:03:24.572974 FW_CONFIG value is 0x804c02
409 11:03:24.576354 PCI: 00:07.0 disabled by fw_config
410 11:03:24.579830 PCI: 00:07.1 disabled by fw_config
411 11:03:24.583348 PCI: 00:0d.2 disabled by fw_config
412 11:03:24.586709 PCI: 00:1c.7 disabled by fw_config
413 11:03:24.593589 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 11:03:24.600371 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 11:03:24.603118 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
416 11:03:24.606358 GENERIC: 0.0 disabled by fw_config
417 11:03:24.609903 GENERIC: 1.0 disabled by fw_config
418 11:03:24.616288 fw_config match found: DB_USB=USB3_ACTIVE
419 11:03:24.620222 fw_config match found: DB_USB=USB3_ACTIVE
420 11:03:24.622822 fw_config match found: DB_USB=USB3_ACTIVE
421 11:03:24.626476 fw_config match found: DB_USB=USB3_ACTIVE
422 11:03:24.632817 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
423 11:03:24.640014 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
424 11:03:24.646154 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
425 11:03:24.656191 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
426 11:03:24.659659 microcode: sig=0x806c1 pf=0x80 revision=0x86
427 11:03:24.666466 microcode: Update skipped, already up-to-date
428 11:03:24.672883 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
429 11:03:24.699629 Detected 4 core, 8 thread CPU.
430 11:03:24.703208 Setting up SMI for CPU
431 11:03:24.706274 IED base = 0x7b400000
432 11:03:24.706731 IED size = 0x00400000
433 11:03:24.709652 Will perform SMM setup.
434 11:03:24.716250 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
435 11:03:24.723359 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
436 11:03:24.729784 Processing 16 relocs. Offset value of 0x00030000
437 11:03:24.732956 Attempting to start 7 APs
438 11:03:24.736025 Waiting for 10ms after sending INIT.
439 11:03:24.752212 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
440 11:03:24.755000 AP: slot 6 apic_id 3.
441 11:03:24.758294 AP: slot 2 apic_id 2.
442 11:03:24.758843 AP: slot 7 apic_id 4.
443 11:03:24.761937 AP: slot 3 apic_id 5.
444 11:03:24.764791 AP: slot 4 apic_id 7.
445 11:03:24.765231 done.
446 11:03:24.765580 AP: slot 5 apic_id 6.
447 11:03:24.772276 Waiting for 2nd SIPI to complete...done.
448 11:03:24.778912 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
449 11:03:24.784917 Processing 13 relocs. Offset value of 0x00038000
450 11:03:24.785370 Unable to locate Global NVS
451 11:03:24.794642 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
452 11:03:24.798620 Installing permanent SMM handler to 0x7b000000
453 11:03:24.808352 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
454 11:03:24.811436 Processing 794 relocs. Offset value of 0x7b010000
455 11:03:24.821174 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
456 11:03:24.824583 Processing 13 relocs. Offset value of 0x7b008000
457 11:03:24.831386 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
458 11:03:24.838327 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
459 11:03:24.841858 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
460 11:03:24.847925 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
461 11:03:24.854829 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
462 11:03:24.861532 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
463 11:03:24.868178 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
464 11:03:24.868679 Unable to locate Global NVS
465 11:03:24.877957 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
466 11:03:24.881064 Clearing SMI status registers
467 11:03:24.881645 SMI_STS: PM1
468 11:03:24.884720 PM1_STS: PWRBTN
469 11:03:24.891391 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
470 11:03:24.894736 In relocation handler: CPU 0
471 11:03:24.897943 New SMBASE=0x7b000000 IEDBASE=0x7b400000
472 11:03:24.904392 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 11:03:24.904966 Relocation complete.
474 11:03:24.914623 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
475 11:03:24.915066 In relocation handler: CPU 1
476 11:03:24.921149 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
477 11:03:24.921591 Relocation complete.
478 11:03:24.931402 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
479 11:03:24.931845 In relocation handler: CPU 3
480 11:03:24.937826 New SMBASE=0x7afff400 IEDBASE=0x7b400000
481 11:03:24.938306 Relocation complete.
482 11:03:24.944778 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 11:03:24.947556 In relocation handler: CPU 7
484 11:03:24.954019 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 11:03:24.957290 Writing SMRR. base = 0x7b000006, mask=0xff800c00
486 11:03:24.960440 Relocation complete.
487 11:03:24.967128 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
488 11:03:24.970721 In relocation handler: CPU 6
489 11:03:24.974019 New SMBASE=0x7affe800 IEDBASE=0x7b400000
490 11:03:24.977870 Relocation complete.
491 11:03:24.983983 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
492 11:03:24.987118 In relocation handler: CPU 2
493 11:03:24.990820 New SMBASE=0x7afff800 IEDBASE=0x7b400000
494 11:03:24.993999 Writing SMRR. base = 0x7b000006, mask=0xff800c00
495 11:03:24.997140 Relocation complete.
496 11:03:25.003923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
497 11:03:25.007444 In relocation handler: CPU 4
498 11:03:25.010653 New SMBASE=0x7afff000 IEDBASE=0x7b400000
499 11:03:25.013897 Relocation complete.
500 11:03:25.020925 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
501 11:03:25.023567 In relocation handler: CPU 5
502 11:03:25.026952 New SMBASE=0x7affec00 IEDBASE=0x7b400000
503 11:03:25.033486 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 11:03:25.036984 Relocation complete.
505 11:03:25.037433 Initializing CPU #0
506 11:03:25.040460 CPU: vendor Intel device 806c1
507 11:03:25.044608 CPU: family 06, model 8c, stepping 01
508 11:03:25.047842 Clearing out pending MCEs
509 11:03:25.051835 Setting up local APIC...
510 11:03:25.052271 apic_id: 0x00 done.
511 11:03:25.054504 Turbo is available but hidden
512 11:03:25.058306 Turbo is available and visible
513 11:03:25.061440 microcode: Update skipped, already up-to-date
514 11:03:25.065272 CPU #0 initialized
515 11:03:25.068435 Initializing CPU #3
516 11:03:25.068878 Initializing CPU #7
517 11:03:25.071329 CPU: vendor Intel device 806c1
518 11:03:25.075539 CPU: family 06, model 8c, stepping 01
519 11:03:25.078215 CPU: vendor Intel device 806c1
520 11:03:25.081993 CPU: family 06, model 8c, stepping 01
521 11:03:25.084908 Clearing out pending MCEs
522 11:03:25.088420 Clearing out pending MCEs
523 11:03:25.091620 Setting up local APIC...
524 11:03:25.092114 Initializing CPU #1
525 11:03:25.094845 Initializing CPU #2
526 11:03:25.098548 Initializing CPU #6
527 11:03:25.101450 CPU: vendor Intel device 806c1
528 11:03:25.104904 CPU: family 06, model 8c, stepping 01
529 11:03:25.105477 Initializing CPU #4
530 11:03:25.108225 Initializing CPU #5
531 11:03:25.111452 CPU: vendor Intel device 806c1
532 11:03:25.114851 CPU: family 06, model 8c, stepping 01
533 11:03:25.118448 CPU: vendor Intel device 806c1
534 11:03:25.121388 CPU: family 06, model 8c, stepping 01
535 11:03:25.125184 Clearing out pending MCEs
536 11:03:25.128138 Clearing out pending MCEs
537 11:03:25.131367 Setting up local APIC...
538 11:03:25.131878 apic_id: 0x05 done.
539 11:03:25.134786 Setting up local APIC...
540 11:03:25.137581 apic_id: 0x07 done.
541 11:03:25.138025 Setting up local APIC...
542 11:03:25.144504 microcode: Update skipped, already up-to-date
543 11:03:25.144879 apic_id: 0x04 done.
544 11:03:25.147838 CPU #3 initialized
545 11:03:25.151280 microcode: Update skipped, already up-to-date
546 11:03:25.154525 apic_id: 0x06 done.
547 11:03:25.157596 microcode: Update skipped, already up-to-date
548 11:03:25.164806 microcode: Update skipped, already up-to-date
549 11:03:25.165112 CPU #4 initialized
550 11:03:25.167446 CPU #5 initialized
551 11:03:25.171329 Clearing out pending MCEs
552 11:03:25.174121 CPU: vendor Intel device 806c1
553 11:03:25.177529 CPU: family 06, model 8c, stepping 01
554 11:03:25.181024 CPU: vendor Intel device 806c1
555 11:03:25.184207 CPU: family 06, model 8c, stepping 01
556 11:03:25.187591 Clearing out pending MCEs
557 11:03:25.190994 Clearing out pending MCEs
558 11:03:25.191394 Setting up local APIC...
559 11:03:25.194287 Setting up local APIC...
560 11:03:25.197438 apic_id: 0x02 done.
561 11:03:25.200774 Setting up local APIC...
562 11:03:25.201081 CPU #7 initialized
563 11:03:25.204271 apic_id: 0x01 done.
564 11:03:25.204582 apic_id: 0x03 done.
565 11:03:25.210533 microcode: Update skipped, already up-to-date
566 11:03:25.213924 microcode: Update skipped, already up-to-date
567 11:03:25.217404 CPU #2 initialized
568 11:03:25.217768 CPU #6 initialized
569 11:03:25.223987 microcode: Update skipped, already up-to-date
570 11:03:25.224338 CPU #1 initialized
571 11:03:25.230567 bsp_do_flight_plan done after 455 msecs.
572 11:03:25.234068 CPU: frequency set to 4000 MHz
573 11:03:25.234523 Enabling SMIs.
574 11:03:25.240528 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
575 11:03:25.256651 SATAXPCIE1 indicates PCIe NVMe is present
576 11:03:25.260096 Probing TPM: done!
577 11:03:25.263241 Connected to device vid:did:rid of 1ae0:0028:00
578 11:03:25.273782 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c
579 11:03:25.277578 Initialized TPM device CR50 revision 0
580 11:03:25.280359 Enabling S0i3.4
581 11:03:25.287349 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
582 11:03:25.290785 Found a VBT of 8704 bytes after decompression
583 11:03:25.296916 cse_lite: CSE RO boot. HybridStorageMode disabled
584 11:03:25.303845 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
585 11:03:25.379775 FSPS returned 0
586 11:03:25.383022 Executing Phase 1 of FspMultiPhaseSiInit
587 11:03:25.393305 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
588 11:03:25.396180 port C0 DISC req: usage 1 usb3 1 usb2 5
589 11:03:25.399818 Raw Buffer output 0 00000511
590 11:03:25.402780 Raw Buffer output 1 00000000
591 11:03:25.406769 pmc_send_ipc_cmd succeeded
592 11:03:25.413782 port C1 DISC req: usage 1 usb3 2 usb2 3
593 11:03:25.414216 Raw Buffer output 0 00000321
594 11:03:25.416623 Raw Buffer output 1 00000000
595 11:03:25.421162 pmc_send_ipc_cmd succeeded
596 11:03:25.426106 Detected 4 core, 8 thread CPU.
597 11:03:25.429177 Detected 4 core, 8 thread CPU.
598 11:03:25.662863 Display FSP Version Info HOB
599 11:03:25.665980 Reference Code - CPU = a.0.4c.31
600 11:03:25.669564 uCode Version = 0.0.0.86
601 11:03:25.672692 TXT ACM version = ff.ff.ff.ffff
602 11:03:25.676164 Reference Code - ME = a.0.4c.31
603 11:03:25.679603 MEBx version = 0.0.0.0
604 11:03:25.682866 ME Firmware Version = Consumer SKU
605 11:03:25.686251 Reference Code - PCH = a.0.4c.31
606 11:03:25.689289 PCH-CRID Status = Disabled
607 11:03:25.692636 PCH-CRID Original Value = ff.ff.ff.ffff
608 11:03:25.696395 PCH-CRID New Value = ff.ff.ff.ffff
609 11:03:25.699709 OPROM - RST - RAID = ff.ff.ff.ffff
610 11:03:25.703484 PCH Hsio Version = 4.0.0.0
611 11:03:25.706095 Reference Code - SA - System Agent = a.0.4c.31
612 11:03:25.709396 Reference Code - MRC = 2.0.0.1
613 11:03:25.712775 SA - PCIe Version = a.0.4c.31
614 11:03:25.715960 SA-CRID Status = Disabled
615 11:03:25.719723 SA-CRID Original Value = 0.0.0.1
616 11:03:25.722707 SA-CRID New Value = 0.0.0.1
617 11:03:25.725828 OPROM - VBIOS = ff.ff.ff.ffff
618 11:03:25.729333 IO Manageability Engine FW Version = 11.1.4.0
619 11:03:25.732521 PHY Build Version = 0.0.0.e0
620 11:03:25.735625 Thunderbolt(TM) FW Version = 0.0.0.0
621 11:03:25.742763 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
622 11:03:25.746030 ITSS IRQ Polarities Before:
623 11:03:25.746337 IPC0: 0xffffffff
624 11:03:25.748866 IPC1: 0xffffffff
625 11:03:25.749169 IPC2: 0xffffffff
626 11:03:25.752718 IPC3: 0xffffffff
627 11:03:25.755789 ITSS IRQ Polarities After:
628 11:03:25.756094 IPC0: 0xffffffff
629 11:03:25.759447 IPC1: 0xffffffff
630 11:03:25.759752 IPC2: 0xffffffff
631 11:03:25.762477 IPC3: 0xffffffff
632 11:03:25.765814 Found PCIe Root Port #9 at PCI: 00:1d.0.
633 11:03:25.778685 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
634 11:03:25.789100 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
635 11:03:25.802128 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
636 11:03:25.809176 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
637 11:03:25.809615 Enumerating buses...
638 11:03:25.815291 Show all devs... Before device enumeration.
639 11:03:25.819114 Root Device: enabled 1
640 11:03:25.819546 DOMAIN: 0000: enabled 1
641 11:03:25.821873 CPU_CLUSTER: 0: enabled 1
642 11:03:25.825345 PCI: 00:00.0: enabled 1
643 11:03:25.828857 PCI: 00:02.0: enabled 1
644 11:03:25.829292 PCI: 00:04.0: enabled 1
645 11:03:25.832317 PCI: 00:05.0: enabled 1
646 11:03:25.835761 PCI: 00:06.0: enabled 0
647 11:03:25.836198 PCI: 00:07.0: enabled 0
648 11:03:25.838991 PCI: 00:07.1: enabled 0
649 11:03:25.841942 PCI: 00:07.2: enabled 0
650 11:03:25.845263 PCI: 00:07.3: enabled 0
651 11:03:25.845666 PCI: 00:08.0: enabled 1
652 11:03:25.848648 PCI: 00:09.0: enabled 0
653 11:03:25.852095 PCI: 00:0a.0: enabled 0
654 11:03:25.855714 PCI: 00:0d.0: enabled 1
655 11:03:25.856145 PCI: 00:0d.1: enabled 0
656 11:03:25.858969 PCI: 00:0d.2: enabled 0
657 11:03:25.861853 PCI: 00:0d.3: enabled 0
658 11:03:25.865510 PCI: 00:0e.0: enabled 0
659 11:03:25.865945 PCI: 00:10.2: enabled 1
660 11:03:25.869095 PCI: 00:10.6: enabled 0
661 11:03:25.871942 PCI: 00:10.7: enabled 0
662 11:03:25.872376 PCI: 00:12.0: enabled 0
663 11:03:25.875528 PCI: 00:12.6: enabled 0
664 11:03:25.878473 PCI: 00:13.0: enabled 0
665 11:03:25.882364 PCI: 00:14.0: enabled 1
666 11:03:25.882837 PCI: 00:14.1: enabled 0
667 11:03:25.885643 PCI: 00:14.2: enabled 1
668 11:03:25.888536 PCI: 00:14.3: enabled 1
669 11:03:25.892161 PCI: 00:15.0: enabled 1
670 11:03:25.892575 PCI: 00:15.1: enabled 1
671 11:03:25.895171 PCI: 00:15.2: enabled 1
672 11:03:25.898646 PCI: 00:15.3: enabled 1
673 11:03:25.901808 PCI: 00:16.0: enabled 1
674 11:03:25.902211 PCI: 00:16.1: enabled 0
675 11:03:25.906017 PCI: 00:16.2: enabled 0
676 11:03:25.908619 PCI: 00:16.3: enabled 0
677 11:03:25.909048 PCI: 00:16.4: enabled 0
678 11:03:25.912422 PCI: 00:16.5: enabled 0
679 11:03:25.915325 PCI: 00:17.0: enabled 1
680 11:03:25.918886 PCI: 00:19.0: enabled 0
681 11:03:25.919437 PCI: 00:19.1: enabled 1
682 11:03:25.922220 PCI: 00:19.2: enabled 0
683 11:03:25.925558 PCI: 00:1c.0: enabled 1
684 11:03:25.928425 PCI: 00:1c.1: enabled 0
685 11:03:25.928857 PCI: 00:1c.2: enabled 0
686 11:03:25.931870 PCI: 00:1c.3: enabled 0
687 11:03:25.935329 PCI: 00:1c.4: enabled 0
688 11:03:25.938996 PCI: 00:1c.5: enabled 0
689 11:03:25.939433 PCI: 00:1c.6: enabled 1
690 11:03:25.941844 PCI: 00:1c.7: enabled 0
691 11:03:25.945457 PCI: 00:1d.0: enabled 1
692 11:03:25.948856 PCI: 00:1d.1: enabled 0
693 11:03:25.949290 PCI: 00:1d.2: enabled 1
694 11:03:25.952084 PCI: 00:1d.3: enabled 0
695 11:03:25.955389 PCI: 00:1e.0: enabled 1
696 11:03:25.955847 PCI: 00:1e.1: enabled 0
697 11:03:25.958701 PCI: 00:1e.2: enabled 1
698 11:03:25.961874 PCI: 00:1e.3: enabled 1
699 11:03:25.965296 PCI: 00:1f.0: enabled 1
700 11:03:25.965731 PCI: 00:1f.1: enabled 0
701 11:03:25.968500 PCI: 00:1f.2: enabled 1
702 11:03:25.971540 PCI: 00:1f.3: enabled 1
703 11:03:25.974982 PCI: 00:1f.4: enabled 0
704 11:03:25.975415 PCI: 00:1f.5: enabled 1
705 11:03:25.978447 PCI: 00:1f.6: enabled 0
706 11:03:25.981511 PCI: 00:1f.7: enabled 0
707 11:03:25.981945 APIC: 00: enabled 1
708 11:03:25.985069 GENERIC: 0.0: enabled 1
709 11:03:25.988794 GENERIC: 0.0: enabled 1
710 11:03:25.992300 GENERIC: 1.0: enabled 1
711 11:03:25.992735 GENERIC: 0.0: enabled 1
712 11:03:25.994882 GENERIC: 1.0: enabled 1
713 11:03:25.998694 USB0 port 0: enabled 1
714 11:03:26.001445 GENERIC: 0.0: enabled 1
715 11:03:26.001960 USB0 port 0: enabled 1
716 11:03:26.005006 GENERIC: 0.0: enabled 1
717 11:03:26.008652 I2C: 00:1a: enabled 1
718 11:03:26.009087 I2C: 00:31: enabled 1
719 11:03:26.011860 I2C: 00:32: enabled 1
720 11:03:26.015702 I2C: 00:10: enabled 1
721 11:03:26.016135 I2C: 00:15: enabled 1
722 11:03:26.018327 GENERIC: 0.0: enabled 0
723 11:03:26.021837 GENERIC: 1.0: enabled 0
724 11:03:26.024705 GENERIC: 0.0: enabled 1
725 11:03:26.025148 SPI: 00: enabled 1
726 11:03:26.028302 SPI: 00: enabled 1
727 11:03:26.028813 PNP: 0c09.0: enabled 1
728 11:03:26.031526 GENERIC: 0.0: enabled 1
729 11:03:26.034827 USB3 port 0: enabled 1
730 11:03:26.038251 USB3 port 1: enabled 1
731 11:03:26.038731 USB3 port 2: enabled 0
732 11:03:26.041678 USB3 port 3: enabled 0
733 11:03:26.045395 USB2 port 0: enabled 0
734 11:03:26.045830 USB2 port 1: enabled 1
735 11:03:26.048002 USB2 port 2: enabled 1
736 11:03:26.051612 USB2 port 3: enabled 0
737 11:03:26.055149 USB2 port 4: enabled 1
738 11:03:26.055628 USB2 port 5: enabled 0
739 11:03:26.058878 USB2 port 6: enabled 0
740 11:03:26.061974 USB2 port 7: enabled 0
741 11:03:26.062444 USB2 port 8: enabled 0
742 11:03:26.065321 USB2 port 9: enabled 0
743 11:03:26.068357 USB3 port 0: enabled 0
744 11:03:26.068789 USB3 port 1: enabled 1
745 11:03:26.071688 USB3 port 2: enabled 0
746 11:03:26.074792 USB3 port 3: enabled 0
747 11:03:26.078362 GENERIC: 0.0: enabled 1
748 11:03:26.078968 GENERIC: 1.0: enabled 1
749 11:03:26.081632 APIC: 01: enabled 1
750 11:03:26.084950 APIC: 02: enabled 1
751 11:03:26.085521 APIC: 05: enabled 1
752 11:03:26.087930 APIC: 07: enabled 1
753 11:03:26.088364 APIC: 06: enabled 1
754 11:03:26.092031 APIC: 03: enabled 1
755 11:03:26.094711 APIC: 04: enabled 1
756 11:03:26.095192 Compare with tree...
757 11:03:26.097998 Root Device: enabled 1
758 11:03:26.101567 DOMAIN: 0000: enabled 1
759 11:03:26.105002 PCI: 00:00.0: enabled 1
760 11:03:26.105438 PCI: 00:02.0: enabled 1
761 11:03:26.108441 PCI: 00:04.0: enabled 1
762 11:03:26.111137 GENERIC: 0.0: enabled 1
763 11:03:26.114692 PCI: 00:05.0: enabled 1
764 11:03:26.118262 PCI: 00:06.0: enabled 0
765 11:03:26.118770 PCI: 00:07.0: enabled 0
766 11:03:26.121253 GENERIC: 0.0: enabled 1
767 11:03:26.124769 PCI: 00:07.1: enabled 0
768 11:03:26.128236 GENERIC: 1.0: enabled 1
769 11:03:26.131645 PCI: 00:07.2: enabled 0
770 11:03:26.132116 GENERIC: 0.0: enabled 1
771 11:03:26.135003 PCI: 00:07.3: enabled 0
772 11:03:26.138164 GENERIC: 1.0: enabled 1
773 11:03:26.141653 PCI: 00:08.0: enabled 1
774 11:03:26.144448 PCI: 00:09.0: enabled 0
775 11:03:26.144882 PCI: 00:0a.0: enabled 0
776 11:03:26.148136 PCI: 00:0d.0: enabled 1
777 11:03:26.151974 USB0 port 0: enabled 1
778 11:03:26.154697 USB3 port 0: enabled 1
779 11:03:26.158176 USB3 port 1: enabled 1
780 11:03:26.158762 USB3 port 2: enabled 0
781 11:03:26.161832 USB3 port 3: enabled 0
782 11:03:26.164944 PCI: 00:0d.1: enabled 0
783 11:03:26.167900 PCI: 00:0d.2: enabled 0
784 11:03:26.171317 GENERIC: 0.0: enabled 1
785 11:03:26.174836 PCI: 00:0d.3: enabled 0
786 11:03:26.175266 PCI: 00:0e.0: enabled 0
787 11:03:26.178528 PCI: 00:10.2: enabled 1
788 11:03:26.181666 PCI: 00:10.6: enabled 0
789 11:03:26.184803 PCI: 00:10.7: enabled 0
790 11:03:26.185417 PCI: 00:12.0: enabled 0
791 11:03:26.187919 PCI: 00:12.6: enabled 0
792 11:03:26.191397 PCI: 00:13.0: enabled 0
793 11:03:26.194605 PCI: 00:14.0: enabled 1
794 11:03:26.197598 USB0 port 0: enabled 1
795 11:03:26.198025 USB2 port 0: enabled 0
796 11:03:26.201588 USB2 port 1: enabled 1
797 11:03:26.204514 USB2 port 2: enabled 1
798 11:03:26.207696 USB2 port 3: enabled 0
799 11:03:26.211636 USB2 port 4: enabled 1
800 11:03:26.214486 USB2 port 5: enabled 0
801 11:03:26.214945 USB2 port 6: enabled 0
802 11:03:26.218164 USB2 port 7: enabled 0
803 11:03:26.220922 USB2 port 8: enabled 0
804 11:03:26.224680 USB2 port 9: enabled 0
805 11:03:26.227877 USB3 port 0: enabled 0
806 11:03:26.231315 USB3 port 1: enabled 1
807 11:03:26.231889 USB3 port 2: enabled 0
808 11:03:26.234222 USB3 port 3: enabled 0
809 11:03:26.237632 PCI: 00:14.1: enabled 0
810 11:03:26.241168 PCI: 00:14.2: enabled 1
811 11:03:26.244464 PCI: 00:14.3: enabled 1
812 11:03:26.244901 GENERIC: 0.0: enabled 1
813 11:03:26.248185 PCI: 00:15.0: enabled 1
814 11:03:26.251016 I2C: 00:1a: enabled 1
815 11:03:26.254557 I2C: 00:31: enabled 1
816 11:03:26.254993 I2C: 00:32: enabled 1
817 11:03:26.257417 PCI: 00:15.1: enabled 1
818 11:03:26.260735 I2C: 00:10: enabled 1
819 11:03:26.264268 PCI: 00:15.2: enabled 1
820 11:03:26.267723 PCI: 00:15.3: enabled 1
821 11:03:26.268157 PCI: 00:16.0: enabled 1
822 11:03:26.271143 PCI: 00:16.1: enabled 0
823 11:03:26.274205 PCI: 00:16.2: enabled 0
824 11:03:26.277266 PCI: 00:16.3: enabled 0
825 11:03:26.280950 PCI: 00:16.4: enabled 0
826 11:03:26.281387 PCI: 00:16.5: enabled 0
827 11:03:26.284341 PCI: 00:17.0: enabled 1
828 11:03:26.288121 PCI: 00:19.0: enabled 0
829 11:03:26.291865 PCI: 00:19.1: enabled 1
830 11:03:26.292294 I2C: 00:15: enabled 1
831 11:03:26.295143 PCI: 00:19.2: enabled 0
832 11:03:26.298956 PCI: 00:1d.0: enabled 1
833 11:03:26.302256 GENERIC: 0.0: enabled 1
834 11:03:26.302908 PCI: 00:1e.0: enabled 1
835 11:03:26.305600 PCI: 00:1e.1: enabled 0
836 11:03:26.308567 PCI: 00:1e.2: enabled 1
837 11:03:26.359234 SPI: 00: enabled 1
838 11:03:26.360003 PCI: 00:1e.3: enabled 1
839 11:03:26.360588 SPI: 00: enabled 1
840 11:03:26.361511 PCI: 00:1f.0: enabled 1
841 11:03:26.362079 PNP: 0c09.0: enabled 1
842 11:03:26.362489 PCI: 00:1f.1: enabled 0
843 11:03:26.363012 PCI: 00:1f.2: enabled 1
844 11:03:26.363544 GENERIC: 0.0: enabled 1
845 11:03:26.363886 GENERIC: 0.0: enabled 1
846 11:03:26.364199 GENERIC: 1.0: enabled 1
847 11:03:26.364502 PCI: 00:1f.3: enabled 1
848 11:03:26.364855 PCI: 00:1f.4: enabled 0
849 11:03:26.365178 PCI: 00:1f.5: enabled 1
850 11:03:26.365468 PCI: 00:1f.6: enabled 0
851 11:03:26.365756 PCI: 00:1f.7: enabled 0
852 11:03:26.366042 CPU_CLUSTER: 0: enabled 1
853 11:03:26.366328 APIC: 00: enabled 1
854 11:03:26.366732 APIC: 01: enabled 1
855 11:03:26.367030 APIC: 02: enabled 1
856 11:03:26.367316 APIC: 05: enabled 1
857 11:03:26.367599 APIC: 07: enabled 1
858 11:03:26.367882 APIC: 06: enabled 1
859 11:03:26.368193 APIC: 03: enabled 1
860 11:03:26.368591 APIC: 04: enabled 1
861 11:03:26.371842 Root Device scanning...
862 11:03:26.375301 scan_static_bus for Root Device
863 11:03:26.378253 DOMAIN: 0000 enabled
864 11:03:26.381205 CPU_CLUSTER: 0 enabled
865 11:03:26.381631 DOMAIN: 0000 scanning...
866 11:03:26.384809 PCI: pci_scan_bus for bus 00
867 11:03:26.388844 PCI: 00:00.0 [8086/0000] ops
868 11:03:26.391774 PCI: 00:00.0 [8086/9a12] enabled
869 11:03:26.395197 PCI: 00:02.0 [8086/0000] bus ops
870 11:03:26.398322 PCI: 00:02.0 [8086/9a40] enabled
871 11:03:26.401521 PCI: 00:04.0 [8086/0000] bus ops
872 11:03:26.404693 PCI: 00:04.0 [8086/9a03] enabled
873 11:03:26.408152 PCI: 00:05.0 [8086/9a19] enabled
874 11:03:26.411268 PCI: 00:07.0 [0000/0000] hidden
875 11:03:26.414770 PCI: 00:08.0 [8086/9a11] enabled
876 11:03:26.417823 PCI: 00:0a.0 [8086/9a0d] disabled
877 11:03:26.421222 PCI: 00:0d.0 [8086/0000] bus ops
878 11:03:26.424425 PCI: 00:0d.0 [8086/9a13] enabled
879 11:03:26.427649 PCI: 00:14.0 [8086/0000] bus ops
880 11:03:26.431565 PCI: 00:14.0 [8086/a0ed] enabled
881 11:03:26.434616 PCI: 00:14.2 [8086/a0ef] enabled
882 11:03:26.437913 PCI: 00:14.3 [8086/0000] bus ops
883 11:03:26.441220 PCI: 00:14.3 [8086/a0f0] enabled
884 11:03:26.444769 PCI: 00:15.0 [8086/0000] bus ops
885 11:03:26.448202 PCI: 00:15.0 [8086/a0e8] enabled
886 11:03:26.451065 PCI: 00:15.1 [8086/0000] bus ops
887 11:03:26.454693 PCI: 00:15.1 [8086/a0e9] enabled
888 11:03:26.458181 PCI: 00:15.2 [8086/0000] bus ops
889 11:03:26.461597 PCI: 00:15.2 [8086/a0ea] enabled
890 11:03:26.464887 PCI: 00:15.3 [8086/0000] bus ops
891 11:03:26.468523 PCI: 00:15.3 [8086/a0eb] enabled
892 11:03:26.471539 PCI: 00:16.0 [8086/0000] ops
893 11:03:26.474682 PCI: 00:16.0 [8086/a0e0] enabled
894 11:03:26.481449 PCI: Static device PCI: 00:17.0 not found, disabling it.
895 11:03:26.484493 PCI: 00:19.0 [8086/0000] bus ops
896 11:03:26.487744 PCI: 00:19.0 [8086/a0c5] disabled
897 11:03:26.491101 PCI: 00:19.1 [8086/0000] bus ops
898 11:03:26.494429 PCI: 00:19.1 [8086/a0c6] enabled
899 11:03:26.497672 PCI: 00:1d.0 [8086/0000] bus ops
900 11:03:26.501198 PCI: 00:1d.0 [8086/a0b0] enabled
901 11:03:26.504176 PCI: 00:1e.0 [8086/0000] ops
902 11:03:26.507633 PCI: 00:1e.0 [8086/a0a8] enabled
903 11:03:26.510908 PCI: 00:1e.2 [8086/0000] bus ops
904 11:03:26.514881 PCI: 00:1e.2 [8086/a0aa] enabled
905 11:03:26.518139 PCI: 00:1e.3 [8086/0000] bus ops
906 11:03:26.521070 PCI: 00:1e.3 [8086/a0ab] enabled
907 11:03:26.524482 PCI: 00:1f.0 [8086/0000] bus ops
908 11:03:26.527523 PCI: 00:1f.0 [8086/a087] enabled
909 11:03:26.527680 RTC Init
910 11:03:26.530712 Set power on after power failure.
911 11:03:26.534567 Disabling Deep S3
912 11:03:26.534744 Disabling Deep S3
913 11:03:26.537776 Disabling Deep S4
914 11:03:26.540966 Disabling Deep S4
915 11:03:26.541172 Disabling Deep S5
916 11:03:26.544139 Disabling Deep S5
917 11:03:26.548013 PCI: 00:1f.2 [0000/0000] hidden
918 11:03:26.550758 PCI: 00:1f.3 [8086/0000] bus ops
919 11:03:26.554376 PCI: 00:1f.3 [8086/a0c8] enabled
920 11:03:26.557445 PCI: 00:1f.5 [8086/0000] bus ops
921 11:03:26.560903 PCI: 00:1f.5 [8086/a0a4] enabled
922 11:03:26.564289 PCI: Leftover static devices:
923 11:03:26.564586 PCI: 00:10.2
924 11:03:26.564821 PCI: 00:10.6
925 11:03:26.567617 PCI: 00:10.7
926 11:03:26.567917 PCI: 00:06.0
927 11:03:26.570840 PCI: 00:07.1
928 11:03:26.571138 PCI: 00:07.2
929 11:03:26.571375 PCI: 00:07.3
930 11:03:26.574876 PCI: 00:09.0
931 11:03:26.575174 PCI: 00:0d.1
932 11:03:26.577794 PCI: 00:0d.2
933 11:03:26.578094 PCI: 00:0d.3
934 11:03:26.581074 PCI: 00:0e.0
935 11:03:26.581373 PCI: 00:12.0
936 11:03:26.581611 PCI: 00:12.6
937 11:03:26.584553 PCI: 00:13.0
938 11:03:26.584857 PCI: 00:14.1
939 11:03:26.587635 PCI: 00:16.1
940 11:03:26.587943 PCI: 00:16.2
941 11:03:26.588319 PCI: 00:16.3
942 11:03:26.591427 PCI: 00:16.4
943 11:03:26.591735 PCI: 00:16.5
944 11:03:26.594492 PCI: 00:17.0
945 11:03:26.594795 PCI: 00:19.2
946 11:03:26.595041 PCI: 00:1e.1
947 11:03:26.597542 PCI: 00:1f.1
948 11:03:26.597846 PCI: 00:1f.4
949 11:03:26.601079 PCI: 00:1f.6
950 11:03:26.601470 PCI: 00:1f.7
951 11:03:26.604974 PCI: Check your devicetree.cb.
952 11:03:26.607643 PCI: 00:02.0 scanning...
953 11:03:26.611341 scan_generic_bus for PCI: 00:02.0
954 11:03:26.614133 scan_generic_bus for PCI: 00:02.0 done
955 11:03:26.621376 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
956 11:03:26.621676 PCI: 00:04.0 scanning...
957 11:03:26.624166 scan_generic_bus for PCI: 00:04.0
958 11:03:26.627385 GENERIC: 0.0 enabled
959 11:03:26.634322 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
960 11:03:26.637582 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
961 11:03:26.640874 PCI: 00:0d.0 scanning...
962 11:03:26.644501 scan_static_bus for PCI: 00:0d.0
963 11:03:26.647435 USB0 port 0 enabled
964 11:03:26.647790 USB0 port 0 scanning...
965 11:03:26.651634 scan_static_bus for USB0 port 0
966 11:03:26.654329 USB3 port 0 enabled
967 11:03:26.657601 USB3 port 1 enabled
968 11:03:26.657971 USB3 port 2 disabled
969 11:03:26.660967 USB3 port 3 disabled
970 11:03:26.664574 USB3 port 0 scanning...
971 11:03:26.668642 scan_static_bus for USB3 port 0
972 11:03:26.671301 scan_static_bus for USB3 port 0 done
973 11:03:26.674489 scan_bus: bus USB3 port 0 finished in 6 msecs
974 11:03:26.677610 USB3 port 1 scanning...
975 11:03:26.681093 scan_static_bus for USB3 port 1
976 11:03:26.684760 scan_static_bus for USB3 port 1 done
977 11:03:26.690928 scan_bus: bus USB3 port 1 finished in 6 msecs
978 11:03:26.693962 scan_static_bus for USB0 port 0 done
979 11:03:26.697374 scan_bus: bus USB0 port 0 finished in 43 msecs
980 11:03:26.700759 scan_static_bus for PCI: 00:0d.0 done
981 11:03:26.707563 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
982 11:03:26.707863 PCI: 00:14.0 scanning...
983 11:03:26.711333 scan_static_bus for PCI: 00:14.0
984 11:03:26.714180 USB0 port 0 enabled
985 11:03:26.717290 USB0 port 0 scanning...
986 11:03:26.720710 scan_static_bus for USB0 port 0
987 11:03:26.724383 USB2 port 0 disabled
988 11:03:26.724683 USB2 port 1 enabled
989 11:03:26.727388 USB2 port 2 enabled
990 11:03:26.727686 USB2 port 3 disabled
991 11:03:26.731067 USB2 port 4 enabled
992 11:03:26.734642 USB2 port 5 disabled
993 11:03:26.734938 USB2 port 6 disabled
994 11:03:26.737613 USB2 port 7 disabled
995 11:03:26.740532 USB2 port 8 disabled
996 11:03:26.740828 USB2 port 9 disabled
997 11:03:26.744222 USB3 port 0 disabled
998 11:03:26.747547 USB3 port 1 enabled
999 11:03:26.747844 USB3 port 2 disabled
1000 11:03:26.750673 USB3 port 3 disabled
1001 11:03:26.754422 USB2 port 1 scanning...
1002 11:03:26.758528 scan_static_bus for USB2 port 1
1003 11:03:26.760503 scan_static_bus for USB2 port 1 done
1004 11:03:26.764247 scan_bus: bus USB2 port 1 finished in 6 msecs
1005 11:03:26.767148 USB2 port 2 scanning...
1006 11:03:26.770969 scan_static_bus for USB2 port 2
1007 11:03:26.774042 scan_static_bus for USB2 port 2 done
1008 11:03:26.777362 scan_bus: bus USB2 port 2 finished in 6 msecs
1009 11:03:26.780985 USB2 port 4 scanning...
1010 11:03:26.784104 scan_static_bus for USB2 port 4
1011 11:03:26.787613 scan_static_bus for USB2 port 4 done
1012 11:03:26.794364 scan_bus: bus USB2 port 4 finished in 6 msecs
1013 11:03:26.794701 USB3 port 1 scanning...
1014 11:03:26.797583 scan_static_bus for USB3 port 1
1015 11:03:26.804229 scan_static_bus for USB3 port 1 done
1016 11:03:26.807110 scan_bus: bus USB3 port 1 finished in 6 msecs
1017 11:03:26.811384 scan_static_bus for USB0 port 0 done
1018 11:03:26.814157 scan_bus: bus USB0 port 0 finished in 93 msecs
1019 11:03:26.820824 scan_static_bus for PCI: 00:14.0 done
1020 11:03:26.823861 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1021 11:03:26.827185 PCI: 00:14.3 scanning...
1022 11:03:26.830873 scan_static_bus for PCI: 00:14.3
1023 11:03:26.833660 GENERIC: 0.0 enabled
1024 11:03:26.836885 scan_static_bus for PCI: 00:14.3 done
1025 11:03:26.840483 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1026 11:03:26.844180 PCI: 00:15.0 scanning...
1027 11:03:26.847205 scan_static_bus for PCI: 00:15.0
1028 11:03:26.850211 I2C: 00:1a enabled
1029 11:03:26.850553 I2C: 00:31 enabled
1030 11:03:26.853613 I2C: 00:32 enabled
1031 11:03:26.857251 scan_static_bus for PCI: 00:15.0 done
1032 11:03:26.860261 scan_bus: bus PCI: 00:15.0 finished in 13 msecs
1033 11:03:26.863951 PCI: 00:15.1 scanning...
1034 11:03:26.867701 scan_static_bus for PCI: 00:15.1
1035 11:03:26.870796 I2C: 00:10 enabled
1036 11:03:26.874149 scan_static_bus for PCI: 00:15.1 done
1037 11:03:26.877575 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1038 11:03:26.881378 PCI: 00:15.2 scanning...
1039 11:03:26.884768 scan_static_bus for PCI: 00:15.2
1040 11:03:26.887763 scan_static_bus for PCI: 00:15.2 done
1041 11:03:26.891077 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1042 11:03:26.894639 PCI: 00:15.3 scanning...
1043 11:03:26.897564 scan_static_bus for PCI: 00:15.3
1044 11:03:26.901409 scan_static_bus for PCI: 00:15.3 done
1045 11:03:26.907661 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1046 11:03:26.911310 PCI: 00:19.1 scanning...
1047 11:03:26.914955 scan_static_bus for PCI: 00:19.1
1048 11:03:26.915260 I2C: 00:15 enabled
1049 11:03:26.917601 scan_static_bus for PCI: 00:19.1 done
1050 11:03:26.924469 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1051 11:03:26.927607 PCI: 00:1d.0 scanning...
1052 11:03:26.930971 do_pci_scan_bridge for PCI: 00:1d.0
1053 11:03:26.934232 PCI: pci_scan_bus for bus 01
1054 11:03:26.938116 PCI: 01:00.0 [1c5c/174a] enabled
1055 11:03:26.938591 GENERIC: 0.0 enabled
1056 11:03:26.940878 Enabling Common Clock Configuration
1057 11:03:26.947585 L1 Sub-State supported from root port 29
1058 11:03:26.950844 L1 Sub-State Support = 0xf
1059 11:03:26.951260 CommonModeRestoreTime = 0x28
1060 11:03:26.957297 Power On Value = 0x16, Power On Scale = 0x0
1061 11:03:26.957851 ASPM: Enabled L1
1062 11:03:26.960902 PCIe: Max_Payload_Size adjusted to 128
1063 11:03:26.967564 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1064 11:03:26.970936 PCI: 00:1e.2 scanning...
1065 11:03:26.974674 scan_generic_bus for PCI: 00:1e.2
1066 11:03:26.975069 SPI: 00 enabled
1067 11:03:26.980516 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1068 11:03:26.988268 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1069 11:03:26.988907 PCI: 00:1e.3 scanning...
1070 11:03:26.991093 scan_generic_bus for PCI: 00:1e.3
1071 11:03:26.993974 SPI: 00 enabled
1072 11:03:27.000699 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1073 11:03:27.004257 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1074 11:03:27.007422 PCI: 00:1f.0 scanning...
1075 11:03:27.010755 scan_static_bus for PCI: 00:1f.0
1076 11:03:27.013948 PNP: 0c09.0 enabled
1077 11:03:27.014533 PNP: 0c09.0 scanning...
1078 11:03:27.017366 scan_static_bus for PNP: 0c09.0
1079 11:03:27.023632 scan_static_bus for PNP: 0c09.0 done
1080 11:03:27.026871 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1081 11:03:27.030125 scan_static_bus for PCI: 00:1f.0 done
1082 11:03:27.037417 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1083 11:03:27.037816 PCI: 00:1f.2 scanning...
1084 11:03:27.040647 scan_static_bus for PCI: 00:1f.2
1085 11:03:27.043667 GENERIC: 0.0 enabled
1086 11:03:27.047812 GENERIC: 0.0 scanning...
1087 11:03:27.050325 scan_static_bus for GENERIC: 0.0
1088 11:03:27.053710 GENERIC: 0.0 enabled
1089 11:03:27.054063 GENERIC: 1.0 enabled
1090 11:03:27.056960 scan_static_bus for GENERIC: 0.0 done
1091 11:03:27.063669 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1092 11:03:27.066949 scan_static_bus for PCI: 00:1f.2 done
1093 11:03:27.070341 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1094 11:03:27.073786 PCI: 00:1f.3 scanning...
1095 11:03:27.077074 scan_static_bus for PCI: 00:1f.3
1096 11:03:27.080451 scan_static_bus for PCI: 00:1f.3 done
1097 11:03:27.086663 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1098 11:03:27.089980 PCI: 00:1f.5 scanning...
1099 11:03:27.093361 scan_generic_bus for PCI: 00:1f.5
1100 11:03:27.096430 scan_generic_bus for PCI: 00:1f.5 done
1101 11:03:27.100694 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1102 11:03:27.106460 scan_bus: bus DOMAIN: 0000 finished in 718 msecs
1103 11:03:27.110377 scan_static_bus for Root Device done
1104 11:03:27.113538 scan_bus: bus Root Device finished in 737 msecs
1105 11:03:27.116511 done
1106 11:03:27.119885 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1107 11:03:27.123159 Chrome EC: UHEPI supported
1108 11:03:27.130544 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1109 11:03:27.136360 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1110 11:03:27.139696 SPI flash protection: WPSW=0 SRP0=0
1111 11:03:27.146193 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1112 11:03:27.150223 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1113 11:03:27.153312 found VGA at PCI: 00:02.0
1114 11:03:27.156242 Setting up VGA for PCI: 00:02.0
1115 11:03:27.162892 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1116 11:03:27.166459 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1117 11:03:27.169657 Allocating resources...
1118 11:03:27.173224 Reading resources...
1119 11:03:27.176449 Root Device read_resources bus 0 link: 0
1120 11:03:27.179997 DOMAIN: 0000 read_resources bus 0 link: 0
1121 11:03:27.186528 PCI: 00:04.0 read_resources bus 1 link: 0
1122 11:03:27.189916 PCI: 00:04.0 read_resources bus 1 link: 0 done
1123 11:03:27.196740 PCI: 00:0d.0 read_resources bus 0 link: 0
1124 11:03:27.199632 USB0 port 0 read_resources bus 0 link: 0
1125 11:03:27.206527 USB0 port 0 read_resources bus 0 link: 0 done
1126 11:03:27.209836 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1127 11:03:27.213387 PCI: 00:14.0 read_resources bus 0 link: 0
1128 11:03:27.219553 USB0 port 0 read_resources bus 0 link: 0
1129 11:03:27.223367 USB0 port 0 read_resources bus 0 link: 0 done
1130 11:03:27.229526 PCI: 00:14.0 read_resources bus 0 link: 0 done
1131 11:03:27.232602 PCI: 00:14.3 read_resources bus 0 link: 0
1132 11:03:27.240346 PCI: 00:14.3 read_resources bus 0 link: 0 done
1133 11:03:27.243397 PCI: 00:15.0 read_resources bus 0 link: 0
1134 11:03:27.249994 PCI: 00:15.0 read_resources bus 0 link: 0 done
1135 11:03:27.253428 PCI: 00:15.1 read_resources bus 0 link: 0
1136 11:03:27.259731 PCI: 00:15.1 read_resources bus 0 link: 0 done
1137 11:03:27.262892 PCI: 00:19.1 read_resources bus 0 link: 0
1138 11:03:27.270046 PCI: 00:19.1 read_resources bus 0 link: 0 done
1139 11:03:27.273771 PCI: 00:1d.0 read_resources bus 1 link: 0
1140 11:03:27.280151 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1141 11:03:27.283303 PCI: 00:1e.2 read_resources bus 2 link: 0
1142 11:03:27.290194 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1143 11:03:27.293766 PCI: 00:1e.3 read_resources bus 3 link: 0
1144 11:03:27.300115 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1145 11:03:27.303180 PCI: 00:1f.0 read_resources bus 0 link: 0
1146 11:03:27.309805 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1147 11:03:27.313358 PCI: 00:1f.2 read_resources bus 0 link: 0
1148 11:03:27.316927 GENERIC: 0.0 read_resources bus 0 link: 0
1149 11:03:27.324117 GENERIC: 0.0 read_resources bus 0 link: 0 done
1150 11:03:27.326704 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1151 11:03:27.334150 DOMAIN: 0000 read_resources bus 0 link: 0 done
1152 11:03:27.337592 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1153 11:03:27.344646 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1154 11:03:27.347534 Root Device read_resources bus 0 link: 0 done
1155 11:03:27.351041 Done reading resources.
1156 11:03:27.357410 Show resources in subtree (Root Device)...After reading.
1157 11:03:27.360998 Root Device child on link 0 DOMAIN: 0000
1158 11:03:27.364196 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1159 11:03:27.374179 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1160 11:03:27.383968 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1161 11:03:27.387623 PCI: 00:00.0
1162 11:03:27.394491 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1163 11:03:27.404457 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1164 11:03:27.413962 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1165 11:03:27.424608 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1166 11:03:27.433794 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1167 11:03:27.443972 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1168 11:03:27.451398 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1169 11:03:27.460616 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1170 11:03:27.470650 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1171 11:03:27.480421 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1172 11:03:27.490315 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1173 11:03:27.500819 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1174 11:03:27.506866 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1175 11:03:27.517252 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1176 11:03:27.527280 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1177 11:03:27.537048 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1178 11:03:27.547137 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1179 11:03:27.556908 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1180 11:03:27.563252 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1181 11:03:27.573519 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1182 11:03:27.576632 PCI: 00:02.0
1183 11:03:27.587363 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1184 11:03:27.596560 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1185 11:03:27.606353 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1186 11:03:27.610074 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1187 11:03:27.619439 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1188 11:03:27.622661 GENERIC: 0.0
1189 11:03:27.623166 PCI: 00:05.0
1190 11:03:27.632685 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 11:03:27.639259 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1192 11:03:27.639684 GENERIC: 0.0
1193 11:03:27.642547 PCI: 00:08.0
1194 11:03:27.652276 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 11:03:27.652715 PCI: 00:0a.0
1196 11:03:27.656354 PCI: 00:0d.0 child on link 0 USB0 port 0
1197 11:03:27.665847 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1198 11:03:27.672652 USB0 port 0 child on link 0 USB3 port 0
1199 11:03:27.673074 USB3 port 0
1200 11:03:27.676078 USB3 port 1
1201 11:03:27.676499 USB3 port 2
1202 11:03:27.681512 USB3 port 3
1203 11:03:27.682986 PCI: 00:14.0 child on link 0 USB0 port 0
1204 11:03:27.692888 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 11:03:27.699598 USB0 port 0 child on link 0 USB2 port 0
1206 11:03:27.700023 USB2 port 0
1207 11:03:27.702572 USB2 port 1
1208 11:03:27.702994 USB2 port 2
1209 11:03:27.706090 USB2 port 3
1210 11:03:27.706549 USB2 port 4
1211 11:03:27.708627 USB2 port 5
1212 11:03:27.709060 USB2 port 6
1213 11:03:27.712206 USB2 port 7
1214 11:03:27.712628 USB2 port 8
1215 11:03:27.715786 USB2 port 9
1216 11:03:27.716207 USB3 port 0
1217 11:03:27.719275 USB3 port 1
1218 11:03:27.719699 USB3 port 2
1219 11:03:27.722518 USB3 port 3
1220 11:03:27.722940 PCI: 00:14.2
1221 11:03:27.732310 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1222 11:03:27.742143 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1223 11:03:27.749523 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1224 11:03:27.758961 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1225 11:03:27.759385 GENERIC: 0.0
1226 11:03:27.765431 PCI: 00:15.0 child on link 0 I2C: 00:1a
1227 11:03:27.775337 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 11:03:27.775891 I2C: 00:1a
1229 11:03:27.778922 I2C: 00:31
1230 11:03:27.779428 I2C: 00:32
1231 11:03:27.782251 PCI: 00:15.1 child on link 0 I2C: 00:10
1232 11:03:27.791906 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1233 11:03:27.795825 I2C: 00:10
1234 11:03:27.796383 PCI: 00:15.2
1235 11:03:27.805047 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 11:03:27.808832 PCI: 00:15.3
1237 11:03:27.818770 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 11:03:27.819243 PCI: 00:16.0
1239 11:03:27.828660 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 11:03:27.831724 PCI: 00:19.0
1241 11:03:27.835179 PCI: 00:19.1 child on link 0 I2C: 00:15
1242 11:03:27.844926 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 11:03:27.848714 I2C: 00:15
1244 11:03:27.851876 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1245 11:03:27.861512 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1246 11:03:27.871820 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1247 11:03:27.878176 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1248 11:03:27.881716 GENERIC: 0.0
1249 11:03:27.882164 PCI: 01:00.0
1250 11:03:27.891429 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1251 11:03:27.901596 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1252 11:03:27.911842 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1253 11:03:27.912267 PCI: 00:1e.0
1254 11:03:27.924592 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 11:03:27.928558 PCI: 00:1e.2 child on link 0 SPI: 00
1256 11:03:27.937981 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 11:03:27.938436 SPI: 00
1258 11:03:27.944436 PCI: 00:1e.3 child on link 0 SPI: 00
1259 11:03:27.954623 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1260 11:03:27.954924 SPI: 00
1261 11:03:27.957838 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1262 11:03:27.968085 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1263 11:03:27.968385 PNP: 0c09.0
1264 11:03:27.977971 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1265 11:03:27.981391 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1266 11:03:27.991005 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1267 11:03:28.000973 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1268 11:03:28.004164 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1269 11:03:28.007869 GENERIC: 0.0
1270 11:03:28.010923 GENERIC: 1.0
1271 11:03:28.011225 PCI: 00:1f.3
1272 11:03:28.020781 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1273 11:03:28.030934 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1274 11:03:28.034103 PCI: 00:1f.5
1275 11:03:28.040971 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1276 11:03:28.047457 CPU_CLUSTER: 0 child on link 0 APIC: 00
1277 11:03:28.047535 APIC: 00
1278 11:03:28.047600 APIC: 01
1279 11:03:28.050259 APIC: 02
1280 11:03:28.050362 APIC: 05
1281 11:03:28.054083 APIC: 07
1282 11:03:28.054201 APIC: 06
1283 11:03:28.054304 APIC: 03
1284 11:03:28.057171 APIC: 04
1285 11:03:28.063652 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1286 11:03:28.070579 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1287 11:03:28.077087 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1288 11:03:28.080730 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1289 11:03:28.087259 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1290 11:03:28.090289 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1291 11:03:28.093897 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1292 11:03:28.100263 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1293 11:03:28.110525 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1294 11:03:28.117162 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1295 11:03:28.123618 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1296 11:03:28.131087 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1297 11:03:28.137033 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1298 11:03:28.147141 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1299 11:03:28.153602 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1300 11:03:28.157233 DOMAIN: 0000: Resource ranges:
1301 11:03:28.160785 * Base: 1000, Size: 800, Tag: 100
1302 11:03:28.163617 * Base: 1900, Size: e700, Tag: 100
1303 11:03:28.170161 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1304 11:03:28.177222 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1305 11:03:28.183633 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1306 11:03:28.190293 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1307 11:03:28.196680 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1308 11:03:28.206638 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1309 11:03:28.213869 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1310 11:03:28.220120 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1311 11:03:28.229980 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1312 11:03:28.236698 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1313 11:03:28.243064 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1314 11:03:28.253216 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1315 11:03:28.259401 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1316 11:03:28.266158 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1317 11:03:28.275857 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1318 11:03:28.283105 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1319 11:03:28.289543 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1320 11:03:28.299281 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1321 11:03:28.306299 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1322 11:03:28.312515 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1323 11:03:28.322652 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1324 11:03:28.329357 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1325 11:03:28.336011 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1326 11:03:28.342573 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1327 11:03:28.352724 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1328 11:03:28.356797 DOMAIN: 0000: Resource ranges:
1329 11:03:28.359184 * Base: 7fc00000, Size: 40400000, Tag: 200
1330 11:03:28.362636 * Base: d0000000, Size: 28000000, Tag: 200
1331 11:03:28.369074 * Base: fa000000, Size: 1000000, Tag: 200
1332 11:03:28.372595 * Base: fb001000, Size: 2fff000, Tag: 200
1333 11:03:28.375905 * Base: fe010000, Size: 2e000, Tag: 200
1334 11:03:28.382416 * Base: fe03f000, Size: d41000, Tag: 200
1335 11:03:28.385930 * Base: fed88000, Size: 8000, Tag: 200
1336 11:03:28.389103 * Base: fed93000, Size: d000, Tag: 200
1337 11:03:28.392682 * Base: feda2000, Size: 1e000, Tag: 200
1338 11:03:28.396450 * Base: fede0000, Size: 1220000, Tag: 200
1339 11:03:28.402457 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1340 11:03:28.409371 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1341 11:03:28.415507 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1342 11:03:28.422487 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1343 11:03:28.428917 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1344 11:03:28.435438 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1345 11:03:28.442367 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1346 11:03:28.448973 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1347 11:03:28.455420 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1348 11:03:28.461977 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1349 11:03:28.468543 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1350 11:03:28.475564 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1351 11:03:28.482228 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1352 11:03:28.488898 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1353 11:03:28.495394 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1354 11:03:28.501807 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1355 11:03:28.508510 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1356 11:03:28.515780 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1357 11:03:28.521915 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1358 11:03:28.528937 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1359 11:03:28.534934 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1360 11:03:28.541963 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1361 11:03:28.548538 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1362 11:03:28.555047 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1363 11:03:28.565010 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1364 11:03:28.568654 PCI: 00:1d.0: Resource ranges:
1365 11:03:28.571637 * Base: 7fc00000, Size: 100000, Tag: 200
1366 11:03:28.578945 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1367 11:03:28.585024 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1368 11:03:28.591971 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1369 11:03:28.598374 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1370 11:03:28.608377 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1371 11:03:28.611877 Root Device assign_resources, bus 0 link: 0
1372 11:03:28.614584 DOMAIN: 0000 assign_resources, bus 0 link: 0
1373 11:03:28.624737 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1374 11:03:28.631458 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1375 11:03:28.641967 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1376 11:03:28.648133 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1377 11:03:28.654630 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 11:03:28.658304 PCI: 00:04.0 assign_resources, bus 1 link: 0
1379 11:03:28.667785 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1380 11:03:28.674508 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1381 11:03:28.684805 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1382 11:03:28.687605 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 11:03:28.691153 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1384 11:03:28.700879 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1385 11:03:28.704349 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 11:03:28.710667 PCI: 00:14.0 assign_resources, bus 0 link: 0
1387 11:03:28.717674 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1388 11:03:28.724244 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1389 11:03:28.734173 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1390 11:03:28.737629 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 11:03:28.744305 PCI: 00:14.3 assign_resources, bus 0 link: 0
1392 11:03:28.750795 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1393 11:03:28.757245 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 11:03:28.760906 PCI: 00:15.0 assign_resources, bus 0 link: 0
1395 11:03:28.767148 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1396 11:03:28.774343 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 11:03:28.777358 PCI: 00:15.1 assign_resources, bus 0 link: 0
1398 11:03:28.787129 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1399 11:03:28.793879 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1400 11:03:28.804084 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1401 11:03:28.810579 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1402 11:03:28.817171 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 11:03:28.820900 PCI: 00:19.1 assign_resources, bus 0 link: 0
1404 11:03:28.830544 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1405 11:03:28.840336 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1406 11:03:28.846707 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1407 11:03:28.853788 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1408 11:03:28.860271 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1409 11:03:28.866681 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1410 11:03:28.876591 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1411 11:03:28.880069 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1412 11:03:28.889708 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1413 11:03:28.893733 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 11:03:28.899699 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1415 11:03:28.906469 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1416 11:03:28.909832 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 11:03:28.916110 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1418 11:03:28.919942 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 11:03:28.926169 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1420 11:03:28.929730 LPC: Trying to open IO window from 800 size 1ff
1421 11:03:28.939548 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1422 11:03:28.945990 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1423 11:03:28.955726 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1424 11:03:28.959144 DOMAIN: 0000 assign_resources, bus 0 link: 0
1425 11:03:28.963281 Root Device assign_resources, bus 0 link: 0
1426 11:03:28.965716 Done setting resources.
1427 11:03:28.972978 Show resources in subtree (Root Device)...After assigning values.
1428 11:03:28.975877 Root Device child on link 0 DOMAIN: 0000
1429 11:03:28.982852 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1430 11:03:28.993063 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1431 11:03:28.999168 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1432 11:03:29.002853 PCI: 00:00.0
1433 11:03:29.012701 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1434 11:03:29.022394 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1435 11:03:29.032501 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1436 11:03:29.038885 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1437 11:03:29.049009 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1438 11:03:29.059382 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1439 11:03:29.068918 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1440 11:03:29.079572 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1441 11:03:29.088505 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1442 11:03:29.095353 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1443 11:03:29.105436 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1444 11:03:29.115301 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1445 11:03:29.125074 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1446 11:03:29.131802 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1447 11:03:29.141606 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1448 11:03:29.151727 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1449 11:03:29.161613 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1450 11:03:29.171427 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1451 11:03:29.181830 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1452 11:03:29.191379 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1453 11:03:29.191972 PCI: 00:02.0
1454 11:03:29.205052 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1455 11:03:29.214730 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1456 11:03:29.225033 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1457 11:03:29.227861 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1458 11:03:29.238174 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1459 11:03:29.241266 GENERIC: 0.0
1460 11:03:29.241666 PCI: 00:05.0
1461 11:03:29.251253 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1462 11:03:29.258281 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1463 11:03:29.258758 GENERIC: 0.0
1464 11:03:29.261161 PCI: 00:08.0
1465 11:03:29.271205 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1466 11:03:29.271668 PCI: 00:0a.0
1467 11:03:29.278310 PCI: 00:0d.0 child on link 0 USB0 port 0
1468 11:03:29.287962 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1469 11:03:29.291302 USB0 port 0 child on link 0 USB3 port 0
1470 11:03:29.294869 USB3 port 0
1471 11:03:29.295291 USB3 port 1
1472 11:03:29.297554 USB3 port 2
1473 11:03:29.297978 USB3 port 3
1474 11:03:29.301036 PCI: 00:14.0 child on link 0 USB0 port 0
1475 11:03:29.314640 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1476 11:03:29.317487 USB0 port 0 child on link 0 USB2 port 0
1477 11:03:29.317906 USB2 port 0
1478 11:03:29.320931 USB2 port 1
1479 11:03:29.324141 USB2 port 2
1480 11:03:29.324561 USB2 port 3
1481 11:03:29.327675 USB2 port 4
1482 11:03:29.328093 USB2 port 5
1483 11:03:29.330670 USB2 port 6
1484 11:03:29.331094 USB2 port 7
1485 11:03:29.334254 USB2 port 8
1486 11:03:29.334728 USB2 port 9
1487 11:03:29.337943 USB3 port 0
1488 11:03:29.338367 USB3 port 1
1489 11:03:29.341234 USB3 port 2
1490 11:03:29.341654 USB3 port 3
1491 11:03:29.344194 PCI: 00:14.2
1492 11:03:29.354066 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1493 11:03:29.364177 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1494 11:03:29.370559 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1495 11:03:29.380895 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1496 11:03:29.381419 GENERIC: 0.0
1497 11:03:29.384259 PCI: 00:15.0 child on link 0 I2C: 00:1a
1498 11:03:29.397218 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1499 11:03:29.397524 I2C: 00:1a
1500 11:03:29.397764 I2C: 00:31
1501 11:03:29.401108 I2C: 00:32
1502 11:03:29.404199 PCI: 00:15.1 child on link 0 I2C: 00:10
1503 11:03:29.413706 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1504 11:03:29.417156 I2C: 00:10
1505 11:03:29.417456 PCI: 00:15.2
1506 11:03:29.427197 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1507 11:03:29.430491 PCI: 00:15.3
1508 11:03:29.440362 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1509 11:03:29.443820 PCI: 00:16.0
1510 11:03:29.454042 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1511 11:03:29.454346 PCI: 00:19.0
1512 11:03:29.457671 PCI: 00:19.1 child on link 0 I2C: 00:15
1513 11:03:29.470188 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1514 11:03:29.470526 I2C: 00:15
1515 11:03:29.473661 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1516 11:03:29.483521 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1517 11:03:29.497093 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1518 11:03:29.506992 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1519 11:03:29.507325 GENERIC: 0.0
1520 11:03:29.510286 PCI: 01:00.0
1521 11:03:29.520091 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1522 11:03:29.530524 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1523 11:03:29.540156 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1524 11:03:29.543317 PCI: 00:1e.0
1525 11:03:29.553382 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1526 11:03:29.556866 PCI: 00:1e.2 child on link 0 SPI: 00
1527 11:03:29.570067 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1528 11:03:29.570379 SPI: 00
1529 11:03:29.573228 PCI: 00:1e.3 child on link 0 SPI: 00
1530 11:03:29.583719 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1531 11:03:29.586753 SPI: 00
1532 11:03:29.590223 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1533 11:03:29.599892 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1534 11:03:29.600302 PNP: 0c09.0
1535 11:03:29.610149 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1536 11:03:29.613372 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1537 11:03:29.623046 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1538 11:03:29.633361 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1539 11:03:29.636604 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1540 11:03:29.639602 GENERIC: 0.0
1541 11:03:29.639918 GENERIC: 1.0
1542 11:03:29.642898 PCI: 00:1f.3
1543 11:03:29.653005 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1544 11:03:29.662531 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1545 11:03:29.666938 PCI: 00:1f.5
1546 11:03:29.675879 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1547 11:03:29.679298 CPU_CLUSTER: 0 child on link 0 APIC: 00
1548 11:03:29.679710 APIC: 00
1549 11:03:29.682493 APIC: 01
1550 11:03:29.682819 APIC: 02
1551 11:03:29.683083 APIC: 05
1552 11:03:29.686347 APIC: 07
1553 11:03:29.686683 APIC: 06
1554 11:03:29.689523 APIC: 03
1555 11:03:29.689822 APIC: 04
1556 11:03:29.692585 Done allocating resources.
1557 11:03:29.699389 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1558 11:03:29.702279 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1559 11:03:29.708944 Configure GPIOs for I2S audio on UP4.
1560 11:03:29.715851 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1561 11:03:29.716150 Enabling resources...
1562 11:03:29.723060 PCI: 00:00.0 subsystem <- 8086/9a12
1563 11:03:29.723360 PCI: 00:00.0 cmd <- 06
1564 11:03:29.725952 PCI: 00:02.0 subsystem <- 8086/9a40
1565 11:03:29.729209 PCI: 00:02.0 cmd <- 03
1566 11:03:29.732508 PCI: 00:04.0 subsystem <- 8086/9a03
1567 11:03:29.735924 PCI: 00:04.0 cmd <- 02
1568 11:03:29.739045 PCI: 00:05.0 subsystem <- 8086/9a19
1569 11:03:29.742655 PCI: 00:05.0 cmd <- 02
1570 11:03:29.745867 PCI: 00:08.0 subsystem <- 8086/9a11
1571 11:03:29.749178 PCI: 00:08.0 cmd <- 06
1572 11:03:29.752971 PCI: 00:0d.0 subsystem <- 8086/9a13
1573 11:03:29.756199 PCI: 00:0d.0 cmd <- 02
1574 11:03:29.758816 PCI: 00:14.0 subsystem <- 8086/a0ed
1575 11:03:29.762257 PCI: 00:14.0 cmd <- 02
1576 11:03:29.765951 PCI: 00:14.2 subsystem <- 8086/a0ef
1577 11:03:29.766343 PCI: 00:14.2 cmd <- 02
1578 11:03:29.772510 PCI: 00:14.3 subsystem <- 8086/a0f0
1579 11:03:29.772915 PCI: 00:14.3 cmd <- 02
1580 11:03:29.775648 PCI: 00:15.0 subsystem <- 8086/a0e8
1581 11:03:29.779123 PCI: 00:15.0 cmd <- 02
1582 11:03:29.782452 PCI: 00:15.1 subsystem <- 8086/a0e9
1583 11:03:29.785490 PCI: 00:15.1 cmd <- 02
1584 11:03:29.788823 PCI: 00:15.2 subsystem <- 8086/a0ea
1585 11:03:29.792121 PCI: 00:15.2 cmd <- 02
1586 11:03:29.795796 PCI: 00:15.3 subsystem <- 8086/a0eb
1587 11:03:29.798770 PCI: 00:15.3 cmd <- 02
1588 11:03:29.802256 PCI: 00:16.0 subsystem <- 8086/a0e0
1589 11:03:29.805494 PCI: 00:16.0 cmd <- 02
1590 11:03:29.809410 PCI: 00:19.1 subsystem <- 8086/a0c6
1591 11:03:29.809711 PCI: 00:19.1 cmd <- 02
1592 11:03:29.812358 PCI: 00:1d.0 bridge ctrl <- 0013
1593 11:03:29.819089 PCI: 00:1d.0 subsystem <- 8086/a0b0
1594 11:03:29.819370 PCI: 00:1d.0 cmd <- 06
1595 11:03:29.822577 PCI: 00:1e.0 subsystem <- 8086/a0a8
1596 11:03:29.825571 PCI: 00:1e.0 cmd <- 06
1597 11:03:29.829192 PCI: 00:1e.2 subsystem <- 8086/a0aa
1598 11:03:29.832420 PCI: 00:1e.2 cmd <- 06
1599 11:03:29.835993 PCI: 00:1e.3 subsystem <- 8086/a0ab
1600 11:03:29.838763 PCI: 00:1e.3 cmd <- 02
1601 11:03:29.842608 PCI: 00:1f.0 subsystem <- 8086/a087
1602 11:03:29.846265 PCI: 00:1f.0 cmd <- 407
1603 11:03:29.848897 PCI: 00:1f.3 subsystem <- 8086/a0c8
1604 11:03:29.852496 PCI: 00:1f.3 cmd <- 02
1605 11:03:29.855747 PCI: 00:1f.5 subsystem <- 8086/a0a4
1606 11:03:29.858733 PCI: 00:1f.5 cmd <- 406
1607 11:03:29.862266 PCI: 01:00.0 cmd <- 02
1608 11:03:29.866727 done.
1609 11:03:29.869898 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1610 11:03:29.873270 Initializing devices...
1611 11:03:29.876319 Root Device init
1612 11:03:29.879697 Chrome EC: Set SMI mask to 0x0000000000000000
1613 11:03:29.886535 Chrome EC: clear events_b mask to 0x0000000000000000
1614 11:03:29.892950 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1615 11:03:29.896430 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1616 11:03:29.903054 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1617 11:03:29.910464 Chrome EC: Set WAKE mask to 0x0000000000000000
1618 11:03:29.913343 fw_config match found: DB_USB=USB3_ACTIVE
1619 11:03:29.919818 Configure Right Type-C port orientation for retimer
1620 11:03:29.923590 Root Device init finished in 42 msecs
1621 11:03:29.926495 PCI: 00:00.0 init
1622 11:03:29.926939 CPU TDP = 9 Watts
1623 11:03:29.930070 CPU PL1 = 9 Watts
1624 11:03:29.933093 CPU PL2 = 40 Watts
1625 11:03:29.933641 CPU PL4 = 83 Watts
1626 11:03:29.935972 PCI: 00:00.0 init finished in 8 msecs
1627 11:03:29.939976 PCI: 00:02.0 init
1628 11:03:29.943062 GMA: Found VBT in CBFS
1629 11:03:29.946248 GMA: Found valid VBT in CBFS
1630 11:03:29.949196 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1631 11:03:29.958901 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1632 11:03:29.962450 PCI: 00:02.0 init finished in 18 msecs
1633 11:03:29.965545 PCI: 00:05.0 init
1634 11:03:29.969031 PCI: 00:05.0 init finished in 0 msecs
1635 11:03:29.972283 PCI: 00:08.0 init
1636 11:03:29.975724 PCI: 00:08.0 init finished in 0 msecs
1637 11:03:29.978700 PCI: 00:14.0 init
1638 11:03:29.981824 PCI: 00:14.0 init finished in 0 msecs
1639 11:03:29.982064 PCI: 00:14.2 init
1640 11:03:29.988236 PCI: 00:14.2 init finished in 0 msecs
1641 11:03:29.988317 PCI: 00:15.0 init
1642 11:03:29.991751 I2C bus 0 version 0x3230302a
1643 11:03:29.995093 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1644 11:03:29.998793 PCI: 00:15.0 init finished in 6 msecs
1645 11:03:30.002060 PCI: 00:15.1 init
1646 11:03:30.005340 I2C bus 1 version 0x3230302a
1647 11:03:30.008778 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1648 11:03:30.011984 PCI: 00:15.1 init finished in 6 msecs
1649 11:03:30.015584 PCI: 00:15.2 init
1650 11:03:30.018430 I2C bus 2 version 0x3230302a
1651 11:03:30.022273 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1652 11:03:30.024997 PCI: 00:15.2 init finished in 6 msecs
1653 11:03:30.028768 PCI: 00:15.3 init
1654 11:03:30.031878 I2C bus 3 version 0x3230302a
1655 11:03:30.035359 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1656 11:03:30.038440 PCI: 00:15.3 init finished in 6 msecs
1657 11:03:30.038555 PCI: 00:16.0 init
1658 11:03:30.045403 PCI: 00:16.0 init finished in 0 msecs
1659 11:03:30.045496 PCI: 00:19.1 init
1660 11:03:30.048463 I2C bus 5 version 0x3230302a
1661 11:03:30.052325 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1662 11:03:30.055470 PCI: 00:19.1 init finished in 6 msecs
1663 11:03:30.058924 PCI: 00:1d.0 init
1664 11:03:30.062056 Initializing PCH PCIe bridge.
1665 11:03:30.065337 PCI: 00:1d.0 init finished in 3 msecs
1666 11:03:30.069224 PCI: 00:1f.0 init
1667 11:03:30.072493 IOAPIC: Initializing IOAPIC at 0xfec00000
1668 11:03:30.079113 IOAPIC: Bootstrap Processor Local APIC = 0x00
1669 11:03:30.079532 IOAPIC: ID = 0x02
1670 11:03:30.082280 IOAPIC: Dumping registers
1671 11:03:30.085490 reg 0x0000: 0x02000000
1672 11:03:30.089472 reg 0x0001: 0x00770020
1673 11:03:30.089888 reg 0x0002: 0x00000000
1674 11:03:30.095714 PCI: 00:1f.0 init finished in 21 msecs
1675 11:03:30.096133 PCI: 00:1f.2 init
1676 11:03:30.098672 Disabling ACPI via APMC.
1677 11:03:30.103672 APMC done.
1678 11:03:30.107218 PCI: 00:1f.2 init finished in 6 msecs
1679 11:03:30.119096 PCI: 01:00.0 init
1680 11:03:30.123006 PCI: 01:00.0 init finished in 0 msecs
1681 11:03:30.125522 PNP: 0c09.0 init
1682 11:03:30.132531 Google Chrome EC uptime: 8.429 seconds
1683 11:03:30.135799 Google Chrome AP resets since EC boot: 1
1684 11:03:30.139012 Google Chrome most recent AP reset causes:
1685 11:03:30.142442 0.379: 32775 shutdown: entering G3
1686 11:03:30.149013 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1687 11:03:30.152125 PNP: 0c09.0 init finished in 24 msecs
1688 11:03:30.158977 Devices initialized
1689 11:03:30.162194 Show all devs... After init.
1690 11:03:30.165877 Root Device: enabled 1
1691 11:03:30.166296 DOMAIN: 0000: enabled 1
1692 11:03:30.168966 CPU_CLUSTER: 0: enabled 1
1693 11:03:30.172172 PCI: 00:00.0: enabled 1
1694 11:03:30.175669 PCI: 00:02.0: enabled 1
1695 11:03:30.176161 PCI: 00:04.0: enabled 1
1696 11:03:30.178969 PCI: 00:05.0: enabled 1
1697 11:03:30.182538 PCI: 00:06.0: enabled 0
1698 11:03:30.185779 PCI: 00:07.0: enabled 0
1699 11:03:30.186196 PCI: 00:07.1: enabled 0
1700 11:03:30.189474 PCI: 00:07.2: enabled 0
1701 11:03:30.192381 PCI: 00:07.3: enabled 0
1702 11:03:30.195828 PCI: 00:08.0: enabled 1
1703 11:03:30.196375 PCI: 00:09.0: enabled 0
1704 11:03:30.198997 PCI: 00:0a.0: enabled 0
1705 11:03:30.202577 PCI: 00:0d.0: enabled 1
1706 11:03:30.203158 PCI: 00:0d.1: enabled 0
1707 11:03:30.205616 PCI: 00:0d.2: enabled 0
1708 11:03:30.209516 PCI: 00:0d.3: enabled 0
1709 11:03:30.212529 PCI: 00:0e.0: enabled 0
1710 11:03:30.212946 PCI: 00:10.2: enabled 1
1711 11:03:30.215305 PCI: 00:10.6: enabled 0
1712 11:03:30.218705 PCI: 00:10.7: enabled 0
1713 11:03:30.222276 PCI: 00:12.0: enabled 0
1714 11:03:30.222752 PCI: 00:12.6: enabled 0
1715 11:03:30.225433 PCI: 00:13.0: enabled 0
1716 11:03:30.229132 PCI: 00:14.0: enabled 1
1717 11:03:30.232204 PCI: 00:14.1: enabled 0
1718 11:03:30.232647 PCI: 00:14.2: enabled 1
1719 11:03:30.235603 PCI: 00:14.3: enabled 1
1720 11:03:30.239108 PCI: 00:15.0: enabled 1
1721 11:03:30.242309 PCI: 00:15.1: enabled 1
1722 11:03:30.242769 PCI: 00:15.2: enabled 1
1723 11:03:30.245918 PCI: 00:15.3: enabled 1
1724 11:03:30.249173 PCI: 00:16.0: enabled 1
1725 11:03:30.249592 PCI: 00:16.1: enabled 0
1726 11:03:30.252383 PCI: 00:16.2: enabled 0
1727 11:03:30.255525 PCI: 00:16.3: enabled 0
1728 11:03:30.259360 PCI: 00:16.4: enabled 0
1729 11:03:30.259869 PCI: 00:16.5: enabled 0
1730 11:03:30.262086 PCI: 00:17.0: enabled 0
1731 11:03:30.265118 PCI: 00:19.0: enabled 0
1732 11:03:30.268778 PCI: 00:19.1: enabled 1
1733 11:03:30.269196 PCI: 00:19.2: enabled 0
1734 11:03:30.272081 PCI: 00:1c.0: enabled 1
1735 11:03:30.275513 PCI: 00:1c.1: enabled 0
1736 11:03:30.279365 PCI: 00:1c.2: enabled 0
1737 11:03:30.279884 PCI: 00:1c.3: enabled 0
1738 11:03:30.282157 PCI: 00:1c.4: enabled 0
1739 11:03:30.285732 PCI: 00:1c.5: enabled 0
1740 11:03:30.288386 PCI: 00:1c.6: enabled 1
1741 11:03:30.288943 PCI: 00:1c.7: enabled 0
1742 11:03:30.292344 PCI: 00:1d.0: enabled 1
1743 11:03:30.295406 PCI: 00:1d.1: enabled 0
1744 11:03:30.295965 PCI: 00:1d.2: enabled 1
1745 11:03:30.298913 PCI: 00:1d.3: enabled 0
1746 11:03:30.302939 PCI: 00:1e.0: enabled 1
1747 11:03:30.305151 PCI: 00:1e.1: enabled 0
1748 11:03:30.305615 PCI: 00:1e.2: enabled 1
1749 11:03:30.308544 PCI: 00:1e.3: enabled 1
1750 11:03:30.311797 PCI: 00:1f.0: enabled 1
1751 11:03:30.315279 PCI: 00:1f.1: enabled 0
1752 11:03:30.315744 PCI: 00:1f.2: enabled 1
1753 11:03:30.318917 PCI: 00:1f.3: enabled 1
1754 11:03:30.321690 PCI: 00:1f.4: enabled 0
1755 11:03:30.325285 PCI: 00:1f.5: enabled 1
1756 11:03:30.325747 PCI: 00:1f.6: enabled 0
1757 11:03:30.328661 PCI: 00:1f.7: enabled 0
1758 11:03:30.331780 APIC: 00: enabled 1
1759 11:03:30.332242 GENERIC: 0.0: enabled 1
1760 11:03:30.335352 GENERIC: 0.0: enabled 1
1761 11:03:30.338703 GENERIC: 1.0: enabled 1
1762 11:03:30.341967 GENERIC: 0.0: enabled 1
1763 11:03:30.342481 GENERIC: 1.0: enabled 1
1764 11:03:30.345369 USB0 port 0: enabled 1
1765 11:03:30.348892 GENERIC: 0.0: enabled 1
1766 11:03:30.349451 USB0 port 0: enabled 1
1767 11:03:30.351859 GENERIC: 0.0: enabled 1
1768 11:03:30.355252 I2C: 00:1a: enabled 1
1769 11:03:30.358763 I2C: 00:31: enabled 1
1770 11:03:30.359319 I2C: 00:32: enabled 1
1771 11:03:30.361935 I2C: 00:10: enabled 1
1772 11:03:30.365369 I2C: 00:15: enabled 1
1773 11:03:30.365925 GENERIC: 0.0: enabled 0
1774 11:03:30.368150 GENERIC: 1.0: enabled 0
1775 11:03:30.371544 GENERIC: 0.0: enabled 1
1776 11:03:30.372157 SPI: 00: enabled 1
1777 11:03:30.375102 SPI: 00: enabled 1
1778 11:03:30.378569 PNP: 0c09.0: enabled 1
1779 11:03:30.379150 GENERIC: 0.0: enabled 1
1780 11:03:30.381856 USB3 port 0: enabled 1
1781 11:03:30.385063 USB3 port 1: enabled 1
1782 11:03:30.388739 USB3 port 2: enabled 0
1783 11:03:30.389296 USB3 port 3: enabled 0
1784 11:03:30.392066 USB2 port 0: enabled 0
1785 11:03:30.394942 USB2 port 1: enabled 1
1786 11:03:30.395501 USB2 port 2: enabled 1
1787 11:03:30.398994 USB2 port 3: enabled 0
1788 11:03:30.401573 USB2 port 4: enabled 1
1789 11:03:30.402033 USB2 port 5: enabled 0
1790 11:03:30.405019 USB2 port 6: enabled 0
1791 11:03:30.408132 USB2 port 7: enabled 0
1792 11:03:30.411909 USB2 port 8: enabled 0
1793 11:03:30.412411 USB2 port 9: enabled 0
1794 11:03:30.415154 USB3 port 0: enabled 0
1795 11:03:30.418459 USB3 port 1: enabled 1
1796 11:03:30.419127 USB3 port 2: enabled 0
1797 11:03:30.421427 USB3 port 3: enabled 0
1798 11:03:30.425047 GENERIC: 0.0: enabled 1
1799 11:03:30.427846 GENERIC: 1.0: enabled 1
1800 11:03:30.428329 APIC: 01: enabled 1
1801 11:03:30.431438 APIC: 02: enabled 1
1802 11:03:30.431899 APIC: 05: enabled 1
1803 11:03:30.435153 APIC: 07: enabled 1
1804 11:03:30.437723 APIC: 06: enabled 1
1805 11:03:30.438136 APIC: 03: enabled 1
1806 11:03:30.441170 APIC: 04: enabled 1
1807 11:03:30.444510 PCI: 01:00.0: enabled 1
1808 11:03:30.447957 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1809 11:03:30.454557 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1810 11:03:30.457573 ELOG: NV offset 0xf30000 size 0x1000
1811 11:03:30.464657 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1812 11:03:30.471463 ELOG: Event(17) added with size 13 at 2024-03-18 11:03:30 UTC
1813 11:03:30.478222 ELOG: Event(92) added with size 9 at 2024-03-18 11:03:30 UTC
1814 11:03:30.484824 ELOG: Event(93) added with size 9 at 2024-03-18 11:03:30 UTC
1815 11:03:30.491119 ELOG: Event(9E) added with size 10 at 2024-03-18 11:03:30 UTC
1816 11:03:30.498072 ELOG: Event(9F) added with size 14 at 2024-03-18 11:03:30 UTC
1817 11:03:30.504435 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1818 11:03:30.507612 ELOG: Event(A1) added with size 10 at 2024-03-18 11:03:30 UTC
1819 11:03:30.514265 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 11:03:30.520886 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 11:03:30.524094 Finalize devices...
1822 11:03:30.524510 Devices finalized
1823 11:03:30.530860 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 11:03:30.534702 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 11:03:30.540924 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 11:03:30.547547 ME: HFSTS1 : 0x80030055
1827 11:03:30.551040 ME: HFSTS2 : 0x30280116
1828 11:03:30.554175 ME: HFSTS3 : 0x00000050
1829 11:03:30.560977 ME: HFSTS4 : 0x00004000
1830 11:03:30.564066 ME: HFSTS5 : 0x00000000
1831 11:03:30.567692 ME: HFSTS6 : 0x00400006
1832 11:03:30.570925 ME: Manufacturing Mode : YES
1833 11:03:30.577458 ME: SPI Protection Mode Enabled : NO
1834 11:03:30.580783 ME: FW Partition Table : OK
1835 11:03:30.584179 ME: Bringup Loader Failure : NO
1836 11:03:30.587405 ME: Firmware Init Complete : NO
1837 11:03:30.591426 ME: Boot Options Present : NO
1838 11:03:30.594511 ME: Update In Progress : NO
1839 11:03:30.597492 ME: D0i3 Support : YES
1840 11:03:30.601338 ME: Low Power State Enabled : NO
1841 11:03:30.607533 ME: CPU Replaced : YES
1842 11:03:30.610683 ME: CPU Replacement Valid : YES
1843 11:03:30.614237 ME: Current Working State : 5
1844 11:03:30.617858 ME: Current Operation State : 1
1845 11:03:30.620419 ME: Current Operation Mode : 3
1846 11:03:30.624379 ME: Error Code : 0
1847 11:03:30.627555 ME: Enhanced Debug Mode : NO
1848 11:03:30.630745 ME: CPU Debug Disabled : YES
1849 11:03:30.634068 ME: TXT Support : NO
1850 11:03:30.640392 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 11:03:30.650627 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 11:03:30.654179 CBFS: 'fallback/slic' not found.
1853 11:03:30.657252 ACPI: Writing ACPI tables at 76b01000.
1854 11:03:30.657812 ACPI: * FACS
1855 11:03:30.660280 ACPI: * DSDT
1856 11:03:30.664271 Ramoops buffer: 0x100000@0x76a00000.
1857 11:03:30.667304 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 11:03:30.673999 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 11:03:30.677600 Google Chrome EC: version:
1860 11:03:30.680326 ro: voema_v2.0.7540-147f8d37d1
1861 11:03:30.683596 rw: voema_v2.0.7540-147f8d37d1
1862 11:03:30.684149 running image: 2
1863 11:03:30.690088 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 11:03:30.695513 ACPI: * FADT
1865 11:03:30.696072 SCI is IRQ9
1866 11:03:30.702564 ACPI: added table 1/32, length now 40
1867 11:03:30.703126 ACPI: * SSDT
1868 11:03:30.705104 Found 1 CPU(s) with 8 core(s) each.
1869 11:03:30.711586 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 11:03:30.715673 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 11:03:30.718448 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 11:03:30.721489 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 11:03:30.728357 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 11:03:30.734988 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 11:03:30.738291 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 11:03:30.745363 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 11:03:30.751697 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 11:03:30.755163 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 11:03:30.761945 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 11:03:30.764916 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 11:03:30.771949 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 11:03:30.775070 PS2K: Passing 80 keymaps to kernel
1883 11:03:30.781773 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 11:03:30.788574 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 11:03:30.794750 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 11:03:30.801399 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 11:03:30.808109 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 11:03:30.814591 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 11:03:30.821380 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 11:03:30.828153 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 11:03:30.831385 ACPI: added table 2/32, length now 44
1892 11:03:30.831847 ACPI: * MCFG
1893 11:03:30.834517 ACPI: added table 3/32, length now 48
1894 11:03:30.838013 ACPI: * TPM2
1895 11:03:30.841388 TPM2 log created at 0x769f0000
1896 11:03:30.844782 ACPI: added table 4/32, length now 52
1897 11:03:30.845239 ACPI: * MADT
1898 11:03:30.847845 SCI is IRQ9
1899 11:03:30.851092 ACPI: added table 5/32, length now 56
1900 11:03:30.854213 current = 76b09850
1901 11:03:30.854712 ACPI: * DMAR
1902 11:03:30.857975 ACPI: added table 6/32, length now 60
1903 11:03:30.861327 ACPI: added table 7/32, length now 64
1904 11:03:30.864313 ACPI: * HPET
1905 11:03:30.867952 ACPI: added table 8/32, length now 68
1906 11:03:30.868339 ACPI: done.
1907 11:03:30.870727 ACPI tables: 35216 bytes.
1908 11:03:30.874245 smbios_write_tables: 769ef000
1909 11:03:30.877228 EC returned error result code 3
1910 11:03:30.881495 Couldn't obtain OEM name from CBI
1911 11:03:30.884444 Create SMBIOS type 16
1912 11:03:30.887293 Create SMBIOS type 17
1913 11:03:30.890711 GENERIC: 0.0 (WIFI Device)
1914 11:03:30.891078 SMBIOS tables: 1750 bytes.
1915 11:03:30.897404 Writing table forward entry at 0x00000500
1916 11:03:30.904385 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 11:03:30.907509 Writing coreboot table at 0x76b25000
1918 11:03:30.914456 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 11:03:30.917567 1. 0000000000001000-000000000009ffff: RAM
1920 11:03:30.920897 2. 00000000000a0000-00000000000fffff: RESERVED
1921 11:03:30.927606 3. 0000000000100000-00000000769eefff: RAM
1922 11:03:30.930795 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 11:03:30.937525 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 11:03:30.944085 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 11:03:30.947684 7. 0000000077000000-000000007fbfffff: RESERVED
1926 11:03:30.950819 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 11:03:30.957896 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 11:03:30.961190 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 11:03:30.967649 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 11:03:30.971118 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 11:03:30.977445 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 11:03:30.981712 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 11:03:30.987487 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 11:03:30.990782 16. 0000000100000000-00000002803fffff: RAM
1935 11:03:30.994249 Passing 4 GPIOs to payload:
1936 11:03:30.997340 NAME | PORT | POLARITY | VALUE
1937 11:03:31.004096 lid | undefined | high | high
1938 11:03:31.007708 power | undefined | high | low
1939 11:03:31.014498 oprom | undefined | high | low
1940 11:03:31.020937 EC in RW | 0x000000e5 | high | high
1941 11:03:31.027426 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7a35
1942 11:03:31.027980 coreboot table: 1576 bytes.
1943 11:03:31.033831 IMD ROOT 0. 0x76fff000 0x00001000
1944 11:03:31.037417 IMD SMALL 1. 0x76ffe000 0x00001000
1945 11:03:31.040488 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 11:03:31.044098 VPD 3. 0x76c4d000 0x00000367
1947 11:03:31.047427 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 11:03:31.050812 CONSOLE 5. 0x76c2c000 0x00020000
1949 11:03:31.054475 FMAP 6. 0x76c2b000 0x00000578
1950 11:03:31.057492 TIME STAMP 7. 0x76c2a000 0x00000910
1951 11:03:31.060804 VBOOT WORK 8. 0x76c16000 0x00014000
1952 11:03:31.067204 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 11:03:31.070506 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 11:03:31.073782 RAMSTAGE 11. 0x76b97000 0x00073000
1955 11:03:31.077333 REFCODE 12. 0x76b42000 0x00055000
1956 11:03:31.081370 SMM BACKUP 13. 0x76b32000 0x00010000
1957 11:03:31.083892 4f444749 14. 0x76b30000 0x00002000
1958 11:03:31.087710 EXT VBT15. 0x76b2d000 0x0000219f
1959 11:03:31.091199 COREBOOT 16. 0x76b25000 0x00008000
1960 11:03:31.094538 ACPI 17. 0x76b01000 0x00024000
1961 11:03:31.100349 ACPI GNVS 18. 0x76b00000 0x00001000
1962 11:03:31.104098 RAMOOPS 19. 0x76a00000 0x00100000
1963 11:03:31.107339 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 11:03:31.110961 SMBIOS 21. 0x769ef000 0x00000800
1965 11:03:31.111421 IMD small region:
1966 11:03:31.117183 IMD ROOT 0. 0x76ffec00 0x00000400
1967 11:03:31.120452 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 11:03:31.124035 POWER STATE 2. 0x76ffeb80 0x00000044
1969 11:03:31.127374 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 11:03:31.130963 MEM INFO 4. 0x76ffe980 0x000001e0
1971 11:03:31.137675 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1972 11:03:31.141015 MTRR: Physical address space:
1973 11:03:31.147320 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 11:03:31.153943 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 11:03:31.160848 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 11:03:31.163893 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 11:03:31.170523 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 11:03:31.177634 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 11:03:31.183559 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 11:03:31.186941 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 11:03:31.194441 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 11:03:31.197645 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 11:03:31.200478 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 11:03:31.204825 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 11:03:31.210308 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 11:03:31.213730 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 11:03:31.217192 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 11:03:31.220541 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 11:03:31.227278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 11:03:31.229941 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 11:03:31.233669 call enable_fixed_mtrr()
1992 11:03:31.237122 CPU physical address size: 39 bits
1993 11:03:31.240375 MTRR: default type WB/UC MTRR counts: 6/6.
1994 11:03:31.243722 MTRR: UC selected as default type.
1995 11:03:31.249967 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 11:03:31.256688 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 11:03:31.263239 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 11:03:31.270579 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 11:03:31.276750 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 11:03:31.283765 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 11:03:31.286467 MTRR: Fixed MSR 0x250 0x0606060606060606
2002 11:03:31.289767 MTRR: Fixed MSR 0x258 0x0606060606060606
2003 11:03:31.296443 MTRR: Fixed MSR 0x259 0x0000000000000000
2004 11:03:31.300779 MTRR: Fixed MSR 0x268 0x0606060606060606
2005 11:03:31.303228 MTRR: Fixed MSR 0x269 0x0606060606060606
2006 11:03:31.306600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2007 11:03:31.313056 MTRR: Fixed MSR 0x26b 0x0606060606060606
2008 11:03:31.317190 MTRR: Fixed MSR 0x26c 0x0606060606060606
2009 11:03:31.320797 MTRR: Fixed MSR 0x26d 0x0606060606060606
2010 11:03:31.323055 MTRR: Fixed MSR 0x26e 0x0606060606060606
2011 11:03:31.329488 MTRR: Fixed MSR 0x26f 0x0606060606060606
2012 11:03:31.333156 MTRR: Fixed MSR 0x250 0x0606060606060606
2013 11:03:31.336814 call enable_fixed_mtrr()
2014 11:03:31.339933 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 11:03:31.343078 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 11:03:31.350140 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 11:03:31.353239 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 11:03:31.356600 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 11:03:31.360027 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 11:03:31.366260 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 11:03:31.369865 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 11:03:31.372993 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 11:03:31.376591 MTRR: Fixed MSR 0x26f 0x0606060606060606
2024 11:03:31.380427 CPU physical address size: 39 bits
2025 11:03:31.387139 call enable_fixed_mtrr()
2026 11:03:31.390383 MTRR: Fixed MSR 0x250 0x0606060606060606
2027 11:03:31.390924
2028 11:03:31.391424 MTRR check
2029 11:03:31.393418 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 11:03:31.399936 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 11:03:31.403543 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 11:03:31.407061 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 11:03:31.410098 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 11:03:31.417938 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 11:03:31.420216 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 11:03:31.423406 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 11:03:31.426695 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 11:03:31.432998 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 11:03:31.436443 Fixed MTRRs : Enabled
2040 11:03:31.436917 Variable MTRRs: Enabled
2041 11:03:31.437287
2042 11:03:31.439993 call enable_fixed_mtrr()
2043 11:03:31.446716 BS: BS_WRITE_TABLES exit times (exec / console): 150 / 151 ms
2044 11:03:31.449241 CPU physical address size: 39 bits
2045 11:03:31.453156 Checking cr50 for pending updates
2046 11:03:31.456984 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 11:03:31.464314 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 11:03:31.467385 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 11:03:31.470362 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 11:03:31.474297 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 11:03:31.480731 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 11:03:31.483924 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 11:03:31.487212 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 11:03:31.490473 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 11:03:31.494131 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 11:03:31.500194 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 11:03:31.503939 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 11:03:31.506873 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 11:03:31.510683 call enable_fixed_mtrr()
2060 11:03:31.513461 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 11:03:31.520355 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 11:03:31.523331 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 11:03:31.526986 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 11:03:31.530013 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 11:03:31.536728 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 11:03:31.540243 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 11:03:31.543454 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 11:03:31.546928 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 11:03:31.550766 CPU physical address size: 39 bits
2070 11:03:31.557279 call enable_fixed_mtrr()
2071 11:03:31.561182 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 11:03:31.564211 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 11:03:31.567700 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 11:03:31.570990 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 11:03:31.577865 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 11:03:31.580485 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 11:03:31.583898 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 11:03:31.587148 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 11:03:31.594325 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 11:03:31.597212 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 11:03:31.600657 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 11:03:31.603797 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 11:03:31.611202 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 11:03:31.615190 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 11:03:31.618340 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 11:03:31.621491 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 11:03:31.627909 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 11:03:31.631574 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 11:03:31.634765 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 11:03:31.638062 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 11:03:31.644497 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 11:03:31.647929 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 11:03:31.651243 CPU physical address size: 39 bits
2094 11:03:31.655076 call enable_fixed_mtrr()
2095 11:03:31.655175 call enable_fixed_mtrr()
2096 11:03:31.658092 Reading cr50 TPM mode
2097 11:03:31.661881 CPU physical address size: 39 bits
2098 11:03:31.665166 CPU physical address size: 39 bits
2099 11:03:31.668657 CPU physical address size: 39 bits
2100 11:03:31.675233 BS: BS_PAYLOAD_LOAD entry times (exec / console): 210 / 7 ms
2101 11:03:31.681733 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 11:03:31.688392 Checking segment from ROM address 0xffc02b38
2103 11:03:31.691592 Checking segment from ROM address 0xffc02b54
2104 11:03:31.695191 Loading segment from ROM address 0xffc02b38
2105 11:03:31.698661 code (compression=0)
2106 11:03:31.708154 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 11:03:31.714596 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 11:03:31.718236 it's not compressed!
2109 11:03:31.857595 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 11:03:31.864288 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 11:03:31.870337 Loading segment from ROM address 0xffc02b54
2112 11:03:31.870463 Entry Point 0x30000000
2113 11:03:31.873790 Loaded segments
2114 11:03:31.880422 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 11:03:31.923484 Finalizing chipset.
2116 11:03:31.926739 Finalizing SMM.
2117 11:03:31.926827 APMC done.
2118 11:03:31.933178 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 11:03:31.936332 mp_park_aps done after 0 msecs.
2120 11:03:31.940053 Jumping to boot code at 0x30000000(0x76b25000)
2121 11:03:31.949503 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 11:03:31.949612
2123 11:03:31.949705
2124 11:03:31.953021
2125 11:03:31.953115 Starting depthcharge on Voema...
2126 11:03:31.953492 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 11:03:31.953607 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2128 11:03:31.953705 Setting prompt string to ['volteer:']
2129 11:03:31.953804 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2130 11:03:31.956471
2131 11:03:31.962971 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 11:03:31.963057
2133 11:03:31.969457 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 11:03:31.969543
2135 11:03:31.976218 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 11:03:31.976305
2137 11:03:31.979251 Failed to find eMMC card reader
2138 11:03:31.979336
2139 11:03:31.979425 Wipe memory regions:
2140 11:03:31.983029
2141 11:03:31.986281 [0x00000000001000, 0x000000000a0000)
2142 11:03:31.986367
2143 11:03:31.989179 [0x00000000100000, 0x00000030000000)
2144 11:03:32.015229
2145 11:03:32.018659 [0x00000032662db0, 0x000000769ef000)
2146 11:03:32.054673
2147 11:03:32.058171 [0x00000100000000, 0x00000280400000)
2148 11:03:32.258190
2149 11:03:32.261143 ec_init: CrosEC protocol v3 supported (256, 256)
2150 11:03:32.261231
2151 11:03:32.267783 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 11:03:32.267909
2153 11:03:32.277657 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 11:03:32.277750
2155 11:03:32.284706 pmc_check_ipc_sts: STS_BUSY done after 1565 us
2156 11:03:32.284814
2157 11:03:32.287600 send_conn_disc_msg: pmc_send_cmd succeeded
2158 11:03:32.718347
2159 11:03:32.718534 R8152: Initializing
2160 11:03:32.718603
2161 11:03:32.721338 Version 6 (ocp_data = 5c30)
2162 11:03:32.721453
2163 11:03:32.724739 R8152: Done initializing
2164 11:03:32.724821
2165 11:03:32.728058 Adding net device
2166 11:03:33.029026
2167 11:03:33.032657 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 11:03:33.032742
2169 11:03:33.032812
2170 11:03:33.032883
2171 11:03:33.036104 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 11:03:33.136424 volteer: tftpboot 192.168.201.1 13086326/tftp-deploy-ytoru72r/kernel/bzImage 13086326/tftp-deploy-ytoru72r/kernel/cmdline 13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
2174 11:03:33.136567 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 11:03:33.136652 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 11:03:33.141060 tftpboot 192.168.201.1 13086326/tftp-deploy-ytoru72r/kernel/bzImploy-ytoru72r/kernel/cmdline 13086326/tftp-deploy-ytoru72r/ramdisk/ramdisk.cpio.gz
2177 11:03:33.141144
2178 11:03:33.141211 Waiting for link
2179 11:03:33.344027
2180 11:03:33.344166 done.
2181 11:03:33.344241
2182 11:03:33.344304 MAC: 00:24:32:30:7b:ec
2183 11:03:33.344370
2184 11:03:33.347460 Sending DHCP discover... done.
2185 11:03:33.347547
2186 11:03:33.350644 Waiting for reply... done.
2187 11:03:33.350726
2188 11:03:33.354196 Sending DHCP request... done.
2189 11:03:33.354285
2190 11:03:33.357463 Waiting for reply... done.
2191 11:03:33.357535
2192 11:03:33.360746 My ip is 192.168.201.11
2193 11:03:33.360820
2194 11:03:33.363853 The DHCP server ip is 192.168.201.1
2195 11:03:33.363925
2196 11:03:33.367651 TFTP server IP predefined by user: 192.168.201.1
2197 11:03:33.367757
2198 11:03:33.374150 Bootfile predefined by user: 13086326/tftp-deploy-ytoru72r/kernel/bzImage
2199 11:03:33.374228
2200 11:03:33.377248 Sending tftp read request... done.
2201 11:03:33.377322
2202 11:03:33.384126 Waiting for the transfer...
2203 11:03:33.384209
2204 11:03:33.923281 00000000 ################################################################
2205 11:03:33.923427
2206 11:03:34.441017 00080000 ################################################################
2207 11:03:34.441154
2208 11:03:34.966960 00100000 ################################################################
2209 11:03:34.967104
2210 11:03:35.489174 00180000 ################################################################
2211 11:03:35.489315
2212 11:03:36.019509 00200000 ################################################################
2213 11:03:36.019690
2214 11:03:36.550919 00280000 ################################################################
2215 11:03:36.551065
2216 11:03:37.074788 00300000 ################################################################
2217 11:03:37.074950
2218 11:03:37.603507 00380000 ################################################################
2219 11:03:37.603650
2220 11:03:38.116599 00400000 ################################################################
2221 11:03:38.116798
2222 11:03:38.641695 00480000 ################################################################
2223 11:03:38.641835
2224 11:03:39.183565 00500000 ################################################################
2225 11:03:39.183704
2226 11:03:39.709291 00580000 ################################################################
2227 11:03:39.709432
2228 11:03:40.262554 00600000 ################################################################
2229 11:03:40.262698
2230 11:03:40.808206 00680000 ################################################################
2231 11:03:40.808342
2232 11:03:41.343233 00700000 ################################################################
2233 11:03:41.343367
2234 11:03:41.880371 00780000 ################################################################
2235 11:03:41.880514
2236 11:03:42.410064 00800000 ################################################################
2237 11:03:42.410203
2238 11:03:42.880913 00880000 ######################################################## done.
2239 11:03:42.881057
2240 11:03:42.883801 The bootfile was 9371536 bytes long.
2241 11:03:42.883885
2242 11:03:42.887082 Sending tftp read request... done.
2243 11:03:42.887159
2244 11:03:42.890607 Waiting for the transfer...
2245 11:03:42.890687
2246 11:03:43.403452 00000000 ################################################################
2247 11:03:43.403598
2248 11:03:43.929472 00080000 ################################################################
2249 11:03:43.929608
2250 11:03:44.456680 00100000 ################################################################
2251 11:03:44.456816
2252 11:03:44.986870 00180000 ################################################################
2253 11:03:44.987013
2254 11:03:45.497676 00200000 ################################################################
2255 11:03:45.497813
2256 11:03:46.041743 00280000 ################################################################
2257 11:03:46.041879
2258 11:03:46.565528 00300000 ################################################################
2259 11:03:46.565657
2260 11:03:47.111575 00380000 ################################################################
2261 11:03:47.111720
2262 11:03:47.655404 00400000 ################################################################
2263 11:03:47.655544
2264 11:03:48.185509 00480000 ################################################################
2265 11:03:48.185654
2266 11:03:48.689313 00500000 ############################################################### done.
2267 11:03:48.689469
2268 11:03:48.692578 Sending tftp read request... done.
2269 11:03:48.692661
2270 11:03:48.695525 Waiting for the transfer...
2271 11:03:48.695603
2272 11:03:48.695693 00000000 # done.
2273 11:03:48.695772
2274 11:03:48.705532 Command line loaded dynamically from TFTP file: 13086326/tftp-deploy-ytoru72r/kernel/cmdline
2275 11:03:48.705622
2276 11:03:48.729106 The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/13086326/extract-nfsrootfs-jj_y53l5,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2277 11:03:48.734893
2278 11:03:48.738496 Shutting down all USB controllers.
2279 11:03:48.738581
2280 11:03:48.738666 Removing current net device
2281 11:03:48.738746
2282 11:03:48.741796 Finalizing coreboot
2283 11:03:48.741878
2284 11:03:48.748358 Exiting depthcharge with code 4 at timestamp: 25428111
2285 11:03:48.748447
2286 11:03:48.748531
2287 11:03:48.748610 Starting kernel ...
2288 11:03:48.748693
2289 11:03:48.748791
2290 11:03:48.749249 end: 2.2.4 bootloader-commands (duration 00:00:17) [common]
2291 11:03:48.749369 start: 2.2.5 auto-login-action (timeout 00:04:28) [common]
2292 11:03:48.749456 Setting prompt string to ['Linux version [0-9]']
2293 11:03:48.749563 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2294 11:03:48.749675 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2296 11:08:16.750230 end: 2.2.5 auto-login-action (duration 00:04:28) [common]
2298 11:08:16.751995 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 268 seconds'
2300 11:08:16.753426 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2303 11:08:16.755876 end: 2 depthcharge-action (duration 00:05:00) [common]
2305 11:08:16.757139 Cleaning after the job
2306 11:08:16.757603 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/ramdisk
2307 11:08:16.762365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/kernel
2308 11:08:16.769807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/nfsrootfs
2309 11:08:16.868038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13086326/tftp-deploy-ytoru72r/modules
2310 11:08:16.868492 start: 5.1 power-off (timeout 00:00:30) [common]
2311 11:08:16.868658 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-0' '--port=1' '--command=off'
2312 11:08:16.945941 >> Command sent successfully.
2313 11:08:16.950493 Returned 0 in 0 seconds
2314 11:08:17.051581 end: 5.1 power-off (duration 00:00:00) [common]
2316 11:08:17.053225 start: 5.2 read-feedback (timeout 00:10:00) [common]
2317 11:08:17.054790 Listened to connection for namespace 'common' for up to 1s
2318 11:08:18.054994 Finalising connection for namespace 'common'
2319 11:08:18.055177 Disconnecting from shell: Finalise
2320 11:08:18.055259
2321 11:08:18.155612 end: 5.2 read-feedback (duration 00:00:01) [common]
2322 11:08:18.155797 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13086326
2323 11:08:18.473425 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13086326
2324 11:08:18.473628 JobError: Your job cannot terminate cleanly.