Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 20:04:16.068175 lava-dispatcher, installed at version: 2024.01
2 20:04:16.068398 start: 0 validate
3 20:04:16.068547 Start time: 2024-05-12 20:04:16.068539+00:00 (UTC)
4 20:04:16.068691 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:04:16.068836 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 20:04:16.342510 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:04:16.342734 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip85-rt48-238-gfd3c5843fe2a2%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:04:16.600177 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:04:16.600448 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip85-rt48-238-gfd3c5843fe2a2%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 20:04:16.858623 validate duration: 0.79
12 20:04:16.858920 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:04:16.859045 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:04:16.859153 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:04:16.859285 Not decompressing ramdisk as can be used compressed.
16 20:04:16.859376 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 20:04:16.859445 saving as /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/ramdisk/rootfs.cpio.gz
18 20:04:16.859512 total size: 8417901 (8 MB)
19 20:04:16.860701 progress 0 % (0 MB)
20 20:04:16.863281 progress 5 % (0 MB)
21 20:04:16.865760 progress 10 % (0 MB)
22 20:04:16.868245 progress 15 % (1 MB)
23 20:04:16.870738 progress 20 % (1 MB)
24 20:04:16.873207 progress 25 % (2 MB)
25 20:04:16.875681 progress 30 % (2 MB)
26 20:04:16.877975 progress 35 % (2 MB)
27 20:04:16.880442 progress 40 % (3 MB)
28 20:04:16.882932 progress 45 % (3 MB)
29 20:04:16.885431 progress 50 % (4 MB)
30 20:04:16.887944 progress 55 % (4 MB)
31 20:04:16.890402 progress 60 % (4 MB)
32 20:04:16.892654 progress 65 % (5 MB)
33 20:04:16.895101 progress 70 % (5 MB)
34 20:04:16.897590 progress 75 % (6 MB)
35 20:04:16.900030 progress 80 % (6 MB)
36 20:04:16.902513 progress 85 % (6 MB)
37 20:04:16.904985 progress 90 % (7 MB)
38 20:04:16.907398 progress 95 % (7 MB)
39 20:04:16.909774 progress 100 % (8 MB)
40 20:04:16.910059 8 MB downloaded in 0.05 s (158.82 MB/s)
41 20:04:16.910287 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:04:16.910599 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:04:16.910694 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:04:16.910786 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:04:16.910935 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip85-rt48-238-gfd3c5843fe2a2/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 20:04:16.911010 saving as /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/kernel/bzImage
48 20:04:16.911075 total size: 14122896 (13 MB)
49 20:04:16.911140 No compression specified
50 20:04:16.912400 progress 0 % (0 MB)
51 20:04:16.916523 progress 5 % (0 MB)
52 20:04:16.920695 progress 10 % (1 MB)
53 20:04:16.924634 progress 15 % (2 MB)
54 20:04:16.928783 progress 20 % (2 MB)
55 20:04:16.932777 progress 25 % (3 MB)
56 20:04:16.936966 progress 30 % (4 MB)
57 20:04:16.940968 progress 35 % (4 MB)
58 20:04:16.945176 progress 40 % (5 MB)
59 20:04:16.949154 progress 45 % (6 MB)
60 20:04:16.953287 progress 50 % (6 MB)
61 20:04:16.957483 progress 55 % (7 MB)
62 20:04:16.961439 progress 60 % (8 MB)
63 20:04:16.965631 progress 65 % (8 MB)
64 20:04:16.969598 progress 70 % (9 MB)
65 20:04:16.973681 progress 75 % (10 MB)
66 20:04:16.977576 progress 80 % (10 MB)
67 20:04:16.981616 progress 85 % (11 MB)
68 20:04:16.985486 progress 90 % (12 MB)
69 20:04:16.989540 progress 95 % (12 MB)
70 20:04:16.993418 progress 100 % (13 MB)
71 20:04:16.993685 13 MB downloaded in 0.08 s (163.05 MB/s)
72 20:04:16.993861 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:04:16.994118 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:04:16.994214 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:04:16.994310 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:04:16.994460 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip85-rt48-238-gfd3c5843fe2a2/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 20:04:16.994535 saving as /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/modules/modules.tar
79 20:04:16.994601 total size: 486996 (0 MB)
80 20:04:16.994669 Using unxz to decompress xz
81 20:04:16.999145 progress 6 % (0 MB)
82 20:04:16.999604 progress 13 % (0 MB)
83 20:04:16.999880 progress 20 % (0 MB)
84 20:04:17.001727 progress 26 % (0 MB)
85 20:04:17.003799 progress 33 % (0 MB)
86 20:04:17.006103 progress 40 % (0 MB)
87 20:04:17.008172 progress 47 % (0 MB)
88 20:04:17.010125 progress 53 % (0 MB)
89 20:04:17.012203 progress 60 % (0 MB)
90 20:04:17.014089 progress 67 % (0 MB)
91 20:04:17.016074 progress 74 % (0 MB)
92 20:04:17.018347 progress 80 % (0 MB)
93 20:04:17.020305 progress 87 % (0 MB)
94 20:04:17.022546 progress 94 % (0 MB)
95 20:04:17.024547 progress 100 % (0 MB)
96 20:04:17.031390 0 MB downloaded in 0.04 s (12.63 MB/s)
97 20:04:17.031705 end: 1.3.1 http-download (duration 00:00:00) [common]
99 20:04:17.032000 end: 1.3 download-retry (duration 00:00:00) [common]
100 20:04:17.032104 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 20:04:17.032211 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 20:04:17.032301 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 20:04:17.032394 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 20:04:17.032629 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e
105 20:04:17.032775 makedir: /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin
106 20:04:17.032943 makedir: /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/tests
107 20:04:17.033061 makedir: /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/results
108 20:04:17.033191 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-add-keys
109 20:04:17.033352 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-add-sources
110 20:04:17.033492 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-background-process-start
111 20:04:17.033637 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-background-process-stop
112 20:04:17.033774 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-common-functions
113 20:04:17.033931 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-echo-ipv4
114 20:04:17.034068 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-install-packages
115 20:04:17.034203 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-installed-packages
116 20:04:17.034337 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-os-build
117 20:04:17.034474 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-probe-channel
118 20:04:17.034609 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-probe-ip
119 20:04:17.034743 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-target-ip
120 20:04:17.034877 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-target-mac
121 20:04:17.035011 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-target-storage
122 20:04:17.035149 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-case
123 20:04:17.035283 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-event
124 20:04:17.035417 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-feedback
125 20:04:17.035551 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-raise
126 20:04:17.035700 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-reference
127 20:04:17.035847 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-runner
128 20:04:17.035989 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-set
129 20:04:17.036128 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-test-shell
130 20:04:17.036268 Updating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-install-packages (oe)
131 20:04:17.036432 Updating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/bin/lava-installed-packages (oe)
132 20:04:17.036573 Creating /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/environment
133 20:04:17.036688 LAVA metadata
134 20:04:17.036772 - LAVA_JOB_ID=13751498
135 20:04:17.036845 - LAVA_DISPATCHER_IP=192.168.201.1
136 20:04:17.036968 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 20:04:17.037044 skipped lava-vland-overlay
138 20:04:17.037130 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 20:04:17.037221 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 20:04:17.037298 skipped lava-multinode-overlay
141 20:04:17.037381 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 20:04:17.037472 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 20:04:17.037554 Loading test definitions
144 20:04:17.037654 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 20:04:17.037733 Using /lava-13751498 at stage 0
146 20:04:17.038077 uuid=13751498_1.4.2.3.1 testdef=None
147 20:04:17.038173 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 20:04:17.038267 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 20:04:17.038860 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 20:04:17.039106 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 20:04:17.039811 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 20:04:17.040089 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 20:04:17.040758 runner path: /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/0/tests/0_dmesg test_uuid 13751498_1.4.2.3.1
156 20:04:17.040931 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 20:04:17.041166 Creating lava-test-runner.conf files
159 20:04:17.041235 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13751498/lava-overlay-iq4lxc8e/lava-13751498/0 for stage 0
160 20:04:17.041332 - 0_dmesg
161 20:04:17.041439 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 20:04:17.041530 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 20:04:17.049714 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 20:04:17.049850 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 20:04:17.049951 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 20:04:17.050064 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 20:04:17.050206 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 20:04:17.347864 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 20:04:17.348280 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
170 20:04:17.348404 extracting modules file /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13751498/extract-overlay-ramdisk-al0mb_m9/ramdisk
171 20:04:17.370585 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 20:04:17.370743 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
173 20:04:17.370858 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13751498/compress-overlay-4nwxi314/overlay-1.4.2.4.tar.gz to ramdisk
174 20:04:17.370936 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13751498/compress-overlay-4nwxi314/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13751498/extract-overlay-ramdisk-al0mb_m9/ramdisk
175 20:04:17.381188 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 20:04:17.381344 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
177 20:04:17.381450 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 20:04:17.381547 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
179 20:04:17.381645 Building ramdisk /var/lib/lava/dispatcher/tmp/13751498/extract-overlay-ramdisk-al0mb_m9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13751498/extract-overlay-ramdisk-al0mb_m9/ramdisk
180 20:04:17.535263 >> 51692 blocks
181 20:04:18.532504 rename /var/lib/lava/dispatcher/tmp/13751498/extract-overlay-ramdisk-al0mb_m9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
182 20:04:18.533012 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 20:04:18.533173 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
184 20:04:18.533308 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
185 20:04:18.533429 No mkimage arch provided, not using FIT.
186 20:04:18.533535 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 20:04:18.533630 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 20:04:18.533741 end: 1.4 prepare-tftp-overlay (duration 00:00:02) [common]
189 20:04:18.533840 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
190 20:04:18.533930 No LXC device requested
191 20:04:18.534026 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 20:04:18.534126 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
193 20:04:18.534219 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 20:04:18.534307 Checking files for TFTP limit of 4294967296 bytes.
195 20:04:18.534773 end: 1 tftp-deploy (duration 00:00:02) [common]
196 20:04:18.534889 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 20:04:18.534994 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 20:04:18.535129 substitutions:
199 20:04:18.535207 - {DTB}: None
200 20:04:18.535276 - {INITRD}: 13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
201 20:04:18.535342 - {KERNEL}: 13751498/tftp-deploy-8i6w0s1a/kernel/bzImage
202 20:04:18.535407 - {LAVA_MAC}: None
203 20:04:18.535470 - {PRESEED_CONFIG}: None
204 20:04:18.535537 - {PRESEED_LOCAL}: None
205 20:04:18.535661 - {RAMDISK}: 13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
206 20:04:18.535741 - {ROOT_PART}: None
207 20:04:18.535804 - {ROOT}: None
208 20:04:18.535867 - {SERVER_IP}: 192.168.201.1
209 20:04:18.535928 - {TEE}: None
210 20:04:18.535989 Parsed boot commands:
211 20:04:18.536050 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 20:04:18.536250 Parsed boot commands: tftpboot 192.168.201.1 13751498/tftp-deploy-8i6w0s1a/kernel/bzImage 13751498/tftp-deploy-8i6w0s1a/kernel/cmdline 13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
213 20:04:18.536348 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 20:04:18.536445 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 20:04:18.536545 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 20:04:18.536642 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 20:04:18.536723 Not connected, no need to disconnect.
218 20:04:18.536809 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 20:04:18.536906 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 20:04:18.536984 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-4'
221 20:04:18.541185 Setting prompt string to ['lava-test: # ']
222 20:04:18.541769 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 20:04:18.541899 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 20:04:18.542024 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 20:04:18.542141 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 20:04:18.542356 Calling: '/usr/local/bin/chromebook-reboot.sh' 'asus-C436FA-Flip-hatch-cbg-4'
227 20:04:27.554659 Returned 0 in 9 seconds
228 20:04:27.655349 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
230 20:04:27.655721 end: 2.2.2 reset-device (duration 00:00:09) [common]
231 20:04:27.655835 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
232 20:04:27.655934 Setting prompt string to 'Starting depthcharge on Helios...'
233 20:04:27.656012 Changing prompt to 'Starting depthcharge on Helios...'
234 20:04:27.656086 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
235 20:04:27.656398 [Enter `^Ec?' for help]
236 20:04:27.656485
237 20:04:27.656556
238 20:04:27.656626 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
239 20:04:27.656720 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
240 20:04:27.656795 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
241 20:04:27.656863 CPU: AES supported, TXT NOT supported, VT supported
242 20:04:27.656928 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
243 20:04:27.656991 PCH: device id 0284 (rev 00) is Cometlake-U Premium
244 20:04:27.657052 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
245 20:04:27.657113 VBOOT: Loading verstage.
246 20:04:27.657174 FMAP: Found "FLASH" version 1.1 at 0xc04000.
247 20:04:27.657236 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
248 20:04:27.657296 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
249 20:04:27.657358 CBFS @ c08000 size 3f8000
250 20:04:27.657418 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
251 20:04:27.657480 CBFS: Locating 'fallback/verstage'
252 20:04:27.657540 CBFS: Found @ offset 10fb80 size 1072c
253 20:04:27.657619
254 20:04:27.657684
255 20:04:27.657744 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
256 20:04:27.657805 Probing TPM: . done!
257 20:04:27.657866 TPM ready after 0 ms
258 20:04:27.657952 Connected to device vid:did:rid of 1ae0:0028:00
259 20:04:27.658016 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
260 20:04:27.658078 Initialized TPM device CR50 revision 0
261 20:04:27.658139 tlcl_send_startup: Startup return code is 0
262 20:04:27.658199 TPM: setup succeeded
263 20:04:27.658259 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
264 20:04:27.658320 Chrome EC: UHEPI supported
265 20:04:27.658380 Phase 1
266 20:04:27.658439 FMAP: area GBB found @ c05000 (12288 bytes)
267 20:04:27.658499 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
268 20:04:27.658560 VB2:vb2_check_recovery() Recovery was requested manually
269 20:04:27.658621 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
270 20:04:27.658680 Recovery requested (1009000e)
271 20:04:27.658740 tlcl_extend: response is 0
272 20:04:27.658800 tlcl_extend: response is 0
273 20:04:27.658860 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
274 20:04:27.658920 CBFS @ c08000 size 3f8000
275 20:04:27.658980 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
276 20:04:27.659040 CBFS: Locating 'fallback/romstage'
277 20:04:27.659100 CBFS: Found @ offset 80 size 145fc
278 20:04:27.659159 Accumulated console time in verstage 102 ms
279 20:04:27.659219
280 20:04:27.659278
281 20:04:27.659337 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
282 20:04:27.659397 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
283 20:04:27.659457 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
284 20:04:27.659517 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
285 20:04:27.659576 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
286 20:04:27.659646 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
287 20:04:27.659707 gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
288 20:04:27.659767 TCO_STS: 0000 0000
289 20:04:27.659827 GEN_PMCON: e0015038 00000200
290 20:04:27.659886 GBLRST_CAUSE: 00000000 00000000
291 20:04:27.659945 prev_sleep_state 5
292 20:04:27.660005 Boot Count incremented to 1836
293 20:04:27.660064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
294 20:04:27.660124 CBFS @ c08000 size 3f8000
295 20:04:27.660183 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
296 20:04:27.660242 CBFS: Locating 'fspm.bin'
297 20:04:27.660300 CBFS: Found @ offset 5ffc0 size 71000
298 20:04:27.660359 Chrome EC: UHEPI supported
299 20:04:27.660419 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
300 20:04:27.660480 Probing TPM: done!
301 20:04:27.660539 Connected to device vid:did:rid of 1ae0:0028:00
302 20:04:27.660598 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.153/cr50_v2.94_mp.151-b967c9caf7
303 20:04:27.660689 Initialized TPM device CR50 revision 0
304 20:04:27.660754 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
305 20:04:27.660814 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
306 20:04:27.660875 MRC cache found, size 1948
307 20:04:27.660935 bootmode is set to: 2
308 20:04:27.660997 PRMRR disabled by config.
309 20:04:27.661077 SPD INDEX = 1
310 20:04:27.661138 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
311 20:04:27.661199 CBFS @ c08000 size 3f8000
312 20:04:27.661258 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
313 20:04:27.661319 CBFS: Locating 'spd.bin'
314 20:04:27.661379 CBFS: Found @ offset 5fb80 size 400
315 20:04:27.661462 SPD: module type is LPDDR3
316 20:04:27.661525 SPD: module part is
317 20:04:27.661585 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
318 20:04:27.661646 SPD: device width 4 bits, bus width 8 bits
319 20:04:27.661706 SPD: module size is 4096 MB (per channel)
320 20:04:27.661766 memory slot: 0 configuration done.
321 20:04:27.661825 memory slot: 2 configuration done.
322 20:04:27.661885 CBMEM:
323 20:04:27.661944 IMD: root @ 99fff000 254 entries.
324 20:04:27.662004 IMD: root @ 99ffec00 62 entries.
325 20:04:27.662063 External stage cache:
326 20:04:27.662123 IMD: root @ 9abff000 254 entries.
327 20:04:27.662181 IMD: root @ 9abfec00 62 entries.
328 20:04:27.662241 Chrome EC: clear events_b mask to 0x0000000020004000
329 20:04:27.662301 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
330 20:04:27.662361 tlcl_write: response is 0
331 20:04:27.662421 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
332 20:04:27.662481 MRC: TPM MRC hash updated successfully.
333 20:04:27.662541 2 DIMMs found
334 20:04:27.662602 SMM Memory Map
335 20:04:27.662660 SMRAM : 0x9a000000 0x1000000
336 20:04:27.662916 Subregion 0: 0x9a000000 0xa00000
337 20:04:27.662984 Subregion 1: 0x9aa00000 0x200000
338 20:04:27.663045 Subregion 2: 0x9ac00000 0x400000
339 20:04:27.663105 top_of_ram = 0x9a000000
340 20:04:27.663165 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
341 20:04:27.663225 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
342 20:04:27.663284 MTRR Range: Start=ff000000 End=0 (Size 1000000)
343 20:04:27.663345 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
344 20:04:27.663405 CBFS @ c08000 size 3f8000
345 20:04:27.663465 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
346 20:04:27.663525 CBFS: Locating 'fallback/postcar'
347 20:04:27.663584 CBFS: Found @ offset 107000 size 4b44
348 20:04:27.663672 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
349 20:04:27.663769 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
350 20:04:27.663864 Processing 180 relocs. Offset value of 0x97c0c000
351 20:04:27.663942 Accumulated console time in romstage 286 ms
352 20:04:27.664004
353 20:04:27.664064
354 20:04:27.664124 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
355 20:04:27.664203 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
356 20:04:27.664268 CBFS @ c08000 size 3f8000
357 20:04:27.664329 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
358 20:04:27.664390 CBFS: Locating 'fallback/ramstage'
359 20:04:27.664450 CBFS: Found @ offset 43380 size 1b9e8
360 20:04:27.664533 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
361 20:04:27.664596 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
362 20:04:27.664657 Processing 3976 relocs. Offset value of 0x98db0000
363 20:04:27.664735 Accumulated console time in postcar 52 ms
364 20:04:27.664803
365 20:04:27.664863
366 20:04:27.664923 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
367 20:04:27.664983 FMAP: area RO_VPD found @ c00000 (16384 bytes)
368 20:04:27.665044 WARNING: RO_VPD is uninitialized or empty.
369 20:04:27.665105 FMAP: area RW_VPD found @ af8000 (8192 bytes)
370 20:04:27.665165 FMAP: area RW_VPD found @ af8000 (8192 bytes)
371 20:04:27.665225 Normal boot.
372 20:04:27.665288 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
373 20:04:27.665348 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
374 20:04:27.665408 CBFS @ c08000 size 3f8000
375 20:04:27.665468 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
376 20:04:27.665528 CBFS: Locating 'cpu_microcode_blob.bin'
377 20:04:27.665588 CBFS: Found @ offset 14700 size 2ec00
378 20:04:27.665647 microcode: sig=0x806ec pf=0x4 revision=0xc9
379 20:04:27.665707 Skip microcode update
380 20:04:27.665766 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
381 20:04:27.665826 CBFS @ c08000 size 3f8000
382 20:04:27.665885 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
383 20:04:27.665950 CBFS: Locating 'fsps.bin'
384 20:04:27.666010 CBFS: Found @ offset d1fc0 size 35000
385 20:04:27.666070 Detected 4 core, 8 thread CPU.
386 20:04:27.666129 Setting up SMI for CPU
387 20:04:27.666189 IED base = 0x9ac00000
388 20:04:27.666248 IED size = 0x00400000
389 20:04:27.666308 Will perform SMM setup.
390 20:04:27.666367 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
391 20:04:27.666427 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
392 20:04:27.666488 Processing 16 relocs. Offset value of 0x00030000
393 20:04:27.666547 Attempting to start 7 APs
394 20:04:27.666606 Waiting for 10ms after sending INIT.
395 20:04:27.666666 Waiting for 1st SIPI to complete...done.
396 20:04:27.666725 AP: slot 2 apic_id 1.
397 20:04:27.666785 Waiting for 2nd SIPI to complete...done.
398 20:04:27.666844 AP: slot 7 apic_id 6.
399 20:04:27.666904 AP: slot 6 apic_id 7.
400 20:04:27.666962 AP: slot 5 apic_id 5.
401 20:04:27.667021 AP: slot 4 apic_id 4.
402 20:04:27.667080 AP: slot 3 apic_id 2.
403 20:04:27.667139 AP: slot 1 apic_id 3.
404 20:04:27.667198 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
405 20:04:27.667259 Processing 13 relocs. Offset value of 0x00038000
406 20:04:27.667318 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
407 20:04:27.667378 Installing SMM handler to 0x9a000000
408 20:04:27.667438 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
409 20:04:27.667516 Processing 658 relocs. Offset value of 0x9a010000
410 20:04:27.667622 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
411 20:04:27.667689 Processing 13 relocs. Offset value of 0x9a008000
412 20:04:27.667750 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
413 20:04:27.667833 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
414 20:04:27.667897 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
415 20:04:27.667957 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
416 20:04:27.668019 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
417 20:04:27.668080 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
418 20:04:27.668140 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
419 20:04:27.668200 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
420 20:04:27.668261 Clearing SMI status registers
421 20:04:27.668321 SMI_STS: PM1
422 20:04:27.668381 PM1_STS: PWRBTN
423 20:04:27.668441 TCO_STS: SECOND_TO
424 20:04:27.668510 New SMBASE 0x9a000000
425 20:04:27.668589 In relocation handler: CPU 0
426 20:04:27.668650 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
427 20:04:27.668711 Writing SMRR. base = 0x9a000006, mask=0xff000800
428 20:04:27.668771 Relocation complete.
429 20:04:27.668831 New SMBASE 0x99fff800
430 20:04:27.668891 In relocation handler: CPU 2
431 20:04:27.669144 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
432 20:04:27.669214 Writing SMRR. base = 0x9a000006, mask=0xff000800
433 20:04:27.669276 Relocation complete.
434 20:04:27.669336 New SMBASE 0x99fff400
435 20:04:27.669397 In relocation handler: CPU 3
436 20:04:27.669457 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
437 20:04:27.669517 Writing SMRR. base = 0x9a000006, mask=0xff000800
438 20:04:27.669578 Relocation complete.
439 20:04:27.669638 New SMBASE 0x99fffc00
440 20:04:27.669698 In relocation handler: CPU 1
441 20:04:27.669757 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
442 20:04:27.669817 Writing SMRR. base = 0x9a000006, mask=0xff000800
443 20:04:27.669877 Relocation complete.
444 20:04:27.669937 New SMBASE 0x99ffec00
445 20:04:27.670008 In relocation handler: CPU 5
446 20:04:27.670069 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
447 20:04:27.670129 Writing SMRR. base = 0x9a000006, mask=0xff000800
448 20:04:27.670189 Relocation complete.
449 20:04:27.670247 New SMBASE 0x99fff000
450 20:04:27.670307 In relocation handler: CPU 4
451 20:04:27.670366 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
452 20:04:27.670426 Writing SMRR. base = 0x9a000006, mask=0xff000800
453 20:04:27.670486 Relocation complete.
454 20:04:27.670546 New SMBASE 0x99ffe800
455 20:04:27.670606 In relocation handler: CPU 6
456 20:04:27.670666 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
457 20:04:27.670725 Writing SMRR. base = 0x9a000006, mask=0xff000800
458 20:04:27.670785 Relocation complete.
459 20:04:27.670870 New SMBASE 0x99ffe400
460 20:04:27.670934 In relocation handler: CPU 7
461 20:04:27.670994 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
462 20:04:27.671072 Writing SMRR. base = 0x9a000006, mask=0xff000800
463 20:04:27.671137 Relocation complete.
464 20:04:27.671196 Initializing CPU #0
465 20:04:27.671256 CPU: vendor Intel device 806ec
466 20:04:27.671316 CPU: family 06, model 8e, stepping 0c
467 20:04:27.671376 Clearing out pending MCEs
468 20:04:27.671435 Setting up local APIC...
469 20:04:27.671495 apic_id: 0x00 done.
470 20:04:27.671554 Turbo is available but hidden
471 20:04:27.671624 Turbo is available and visible
472 20:04:27.671720 VMX status: enabled
473 20:04:27.671814 IA32_FEATURE_CONTROL status: locked
474 20:04:27.671911 Skip microcode update
475 20:04:27.671981 CPU #0 initialized
476 20:04:27.672042 Initializing CPU #2
477 20:04:27.672102 Initializing CPU #4
478 20:04:27.672161 Initializing CPU #5
479 20:04:27.672220 CPU: vendor Intel device 806ec
480 20:04:27.672280 CPU: family 06, model 8e, stepping 0c
481 20:04:27.672372 Initializing CPU #1
482 20:04:27.672434 Initializing CPU #3
483 20:04:27.672494 CPU: vendor Intel device 806ec
484 20:04:27.672555 CPU: family 06, model 8e, stepping 0c
485 20:04:27.672615 CPU: vendor Intel device 806ec
486 20:04:27.672675 CPU: family 06, model 8e, stepping 0c
487 20:04:27.672734 Clearing out pending MCEs
488 20:04:27.672794 Clearing out pending MCEs
489 20:04:27.672854 Setting up local APIC...
490 20:04:27.672915 Initializing CPU #6
491 20:04:27.672974 Initializing CPU #7
492 20:04:27.673034 Clearing out pending MCEs
493 20:04:27.673094 CPU: vendor Intel device 806ec
494 20:04:27.673154 CPU: family 06, model 8e, stepping 0c
495 20:04:27.673218 CPU: vendor Intel device 806ec
496 20:04:27.673286 CPU: family 06, model 8e, stepping 0c
497 20:04:27.673346 CPU: vendor Intel device 806ec
498 20:04:27.673405 CPU: family 06, model 8e, stepping 0c
499 20:04:27.673465 Clearing out pending MCEs
500 20:04:27.673525 apic_id: 0x03 done.
501 20:04:27.673585 Setting up local APIC...
502 20:04:27.673644 Clearing out pending MCEs
503 20:04:27.673704 CPU: vendor Intel device 806ec
504 20:04:27.673763 CPU: family 06, model 8e, stepping 0c
505 20:04:27.673823 Setting up local APIC...
506 20:04:27.673881 apic_id: 0x02 done.
507 20:04:27.673940 VMX status: enabled
508 20:04:27.673999 VMX status: enabled
509 20:04:27.674084 IA32_FEATURE_CONTROL status: locked
510 20:04:27.674146 IA32_FEATURE_CONTROL status: locked
511 20:04:27.674205 Skip microcode update
512 20:04:27.674264 Skip microcode update
513 20:04:27.674331 CPU #1 initialized
514 20:04:27.674404 CPU #3 initialized
515 20:04:27.674465 Setting up local APIC...
516 20:04:27.674524 apic_id: 0x07 done.
517 20:04:27.674584 Clearing out pending MCEs
518 20:04:27.674642 VMX status: enabled
519 20:04:27.674701 Setting up local APIC...
520 20:04:27.674761 Setting up local APIC...
521 20:04:27.674820 apic_id: 0x06 done.
522 20:04:27.674879 IA32_FEATURE_CONTROL status: locked
523 20:04:27.674938 VMX status: enabled
524 20:04:27.674998 Skip microcode update
525 20:04:27.675057 IA32_FEATURE_CONTROL status: locked
526 20:04:27.675116 CPU #6 initialized
527 20:04:27.675175 Skip microcode update
528 20:04:27.675234 apic_id: 0x01 done.
529 20:04:27.675293 Clearing out pending MCEs
530 20:04:27.675352 apic_id: 0x04 done.
531 20:04:27.675412 Setting up local APIC...
532 20:04:27.675470 CPU #7 initialized
533 20:04:27.675529 VMX status: enabled
534 20:04:27.675588 apic_id: 0x05 done.
535 20:04:27.675658 VMX status: enabled
536 20:04:27.675718 VMX status: enabled
537 20:04:27.675777 IA32_FEATURE_CONTROL status: locked
538 20:04:27.675837 IA32_FEATURE_CONTROL status: locked
539 20:04:27.675897 Skip microcode update
540 20:04:27.675995 Skip microcode update
541 20:04:27.676057 CPU #4 initialized
542 20:04:27.676116 CPU #5 initialized
543 20:04:27.676176 IA32_FEATURE_CONTROL status: locked
544 20:04:27.676236 Skip microcode update
545 20:04:27.676295 CPU #2 initialized
546 20:04:27.676355 bsp_do_flight_plan done after 466 msecs.
547 20:04:27.676415 CPU: frequency set to 4200 MHz
548 20:04:27.676475 Enabling SMIs.
549 20:04:27.676534 Locking SMM.
550 20:04:27.676594 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
551 20:04:27.676689 CBFS @ c08000 size 3f8000
552 20:04:27.676752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
553 20:04:27.676812 CBFS: Locating 'vbt.bin'
554 20:04:27.676872 CBFS: Found @ offset 5f5c0 size 499
555 20:04:27.676932 Found a VBT of 4608 bytes after decompression
556 20:04:27.676992 Display FSP Version Info HOB
557 20:04:27.677052 Reference Code - CPU = 9.0.1e.30
558 20:04:27.677111 uCode Version = 0.0.0.ca
559 20:04:27.677171 TXT ACM version = ff.ff.ff.ffff
560 20:04:27.677231 Display FSP Version Info HOB
561 20:04:27.677289 Reference Code - ME = 9.0.1e.30
562 20:04:27.677376 MEBx version = 0.0.0.0
563 20:04:27.677438 ME Firmware Version = Consumer SKU
564 20:04:27.677498 Display FSP Version Info HOB
565 20:04:27.677557 Reference Code - CML PCH = 9.0.1e.30
566 20:04:27.677618 PCH-CRID Status = Disabled
567 20:04:27.677691 PCH-CRID Original Value = ff.ff.ff.ffff
568 20:04:27.677756 PCH-CRID New Value = ff.ff.ff.ffff
569 20:04:27.678030 OPROM - RST - RAID = ff.ff.ff.ffff
570 20:04:27.678100 ChipsetInit Base Version = ff.ff.ff.ffff
571 20:04:27.678161 ChipsetInit Oem Version = ff.ff.ff.ffff
572 20:04:27.678222 Display FSP Version Info HOB
573 20:04:27.678282 Reference Code - SA - System Agent = 9.0.1e.30
574 20:04:27.678342 Reference Code - MRC = 0.7.1.6c
575 20:04:27.678402 SA - PCIe Version = 9.0.1e.30
576 20:04:27.678462 SA-CRID Status = Disabled
577 20:04:27.678522 SA-CRID Original Value = 0.0.0.c
578 20:04:27.678581 SA-CRID New Value = 0.0.0.c
579 20:04:27.678641 OPROM - VBIOS = ff.ff.ff.ffff
580 20:04:27.678701 RTC Init
581 20:04:27.678760 Set power on after power failure.
582 20:04:27.678820 Disabling Deep S3
583 20:04:27.678879 Disabling Deep S3
584 20:04:27.678938 Disabling Deep S4
585 20:04:27.678997 Disabling Deep S4
586 20:04:27.679056 Disabling Deep S5
587 20:04:27.679114 Disabling Deep S5
588 20:04:27.679174 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 196 exit 1
589 20:04:27.679234 Enumerating buses...
590 20:04:27.679293 Show all devs... Before device enumeration.
591 20:04:27.679353 Root Device: enabled 1
592 20:04:27.679412 CPU_CLUSTER: 0: enabled 1
593 20:04:27.679471 DOMAIN: 0000: enabled 1
594 20:04:27.679530 APIC: 00: enabled 1
595 20:04:27.679589 PCI: 00:00.0: enabled 1
596 20:04:27.679660 PCI: 00:02.0: enabled 1
597 20:04:27.679720 PCI: 00:04.0: enabled 0
598 20:04:27.679780 PCI: 00:05.0: enabled 0
599 20:04:27.679839 PCI: 00:12.0: enabled 1
600 20:04:27.679898 PCI: 00:12.5: enabled 0
601 20:04:27.679957 PCI: 00:12.6: enabled 0
602 20:04:27.680016 PCI: 00:14.0: enabled 1
603 20:04:27.680075 PCI: 00:14.1: enabled 0
604 20:04:27.680135 PCI: 00:14.3: enabled 1
605 20:04:27.680194 PCI: 00:14.5: enabled 0
606 20:04:27.680253 PCI: 00:15.0: enabled 1
607 20:04:27.680312 PCI: 00:15.1: enabled 1
608 20:04:27.680371 PCI: 00:15.2: enabled 0
609 20:04:27.680430 PCI: 00:15.3: enabled 0
610 20:04:27.680489 PCI: 00:16.0: enabled 1
611 20:04:27.680547 PCI: 00:16.1: enabled 0
612 20:04:27.680606 PCI: 00:16.2: enabled 0
613 20:04:27.680664 PCI: 00:16.3: enabled 0
614 20:04:27.680723 PCI: 00:16.4: enabled 0
615 20:04:27.680782 PCI: 00:16.5: enabled 0
616 20:04:27.680841 PCI: 00:17.0: enabled 1
617 20:04:27.680899 PCI: 00:19.0: enabled 1
618 20:04:27.680958 PCI: 00:19.1: enabled 0
619 20:04:27.681017 PCI: 00:19.2: enabled 0
620 20:04:27.681076 PCI: 00:1a.0: enabled 0
621 20:04:27.681135 PCI: 00:1c.0: enabled 0
622 20:04:27.681194 PCI: 00:1c.1: enabled 0
623 20:04:27.681253 PCI: 00:1c.2: enabled 0
624 20:04:27.681311 PCI: 00:1c.3: enabled 0
625 20:04:27.681370 PCI: 00:1c.4: enabled 0
626 20:04:27.681429 PCI: 00:1c.5: enabled 0
627 20:04:27.681487 PCI: 00:1c.6: enabled 0
628 20:04:27.681545 PCI: 00:1c.7: enabled 0
629 20:04:27.681604 PCI: 00:1d.0: enabled 1
630 20:04:27.681663 PCI: 00:1d.1: enabled 0
631 20:04:27.681722 PCI: 00:1d.2: enabled 0
632 20:04:27.681781 PCI: 00:1d.3: enabled 0
633 20:04:27.681841 PCI: 00:1d.4: enabled 0
634 20:04:27.681900 PCI: 00:1d.5: enabled 1
635 20:04:27.681974 PCI: 00:1e.0: enabled 1
636 20:04:27.682077 PCI: 00:1e.1: enabled 0
637 20:04:27.682142 PCI: 00:1e.2: enabled 1
638 20:04:27.682202 PCI: 00:1e.3: enabled 1
639 20:04:27.682262 PCI: 00:1f.0: enabled 1
640 20:04:27.682322 PCI: 00:1f.1: enabled 1
641 20:04:27.682381 PCI: 00:1f.2: enabled 1
642 20:04:27.682440 PCI: 00:1f.3: enabled 1
643 20:04:27.682499 PCI: 00:1f.4: enabled 1
644 20:04:27.682558 PCI: 00:1f.5: enabled 1
645 20:04:27.682617 PCI: 00:1f.6: enabled 0
646 20:04:27.682675 USB0 port 0: enabled 1
647 20:04:27.682734 I2C: 00:15: enabled 1
648 20:04:27.682792 I2C: 00:5d: enabled 1
649 20:04:27.682851 GENERIC: 0.0: enabled 1
650 20:04:27.682910 I2C: 00:1a: enabled 1
651 20:04:27.682969 I2C: 00:38: enabled 1
652 20:04:27.683028 I2C: 00:39: enabled 1
653 20:04:27.683086 I2C: 00:3a: enabled 1
654 20:04:27.683145 I2C: 00:3b: enabled 1
655 20:04:27.683203 PCI: 00:00.0: enabled 1
656 20:04:27.683262 SPI: 00: enabled 1
657 20:04:27.683320 SPI: 01: enabled 1
658 20:04:27.683379 PNP: 0c09.0: enabled 1
659 20:04:27.683437 USB2 port 0: enabled 1
660 20:04:27.683496 USB2 port 1: enabled 1
661 20:04:27.683555 USB2 port 2: enabled 0
662 20:04:27.683620 USB2 port 3: enabled 0
663 20:04:27.683683 USB2 port 5: enabled 0
664 20:04:27.683742 USB2 port 6: enabled 1
665 20:04:27.683801 USB2 port 9: enabled 1
666 20:04:27.683860 USB3 port 0: enabled 1
667 20:04:27.683918 USB3 port 1: enabled 1
668 20:04:27.683977 USB3 port 2: enabled 1
669 20:04:27.684046 USB3 port 3: enabled 1
670 20:04:27.684106 USB3 port 4: enabled 0
671 20:04:27.684165 APIC: 03: enabled 1
672 20:04:27.684224 APIC: 01: enabled 1
673 20:04:27.684283 APIC: 02: enabled 1
674 20:04:27.684341 APIC: 04: enabled 1
675 20:04:27.684400 APIC: 05: enabled 1
676 20:04:27.684459 APIC: 07: enabled 1
677 20:04:27.684517 APIC: 06: enabled 1
678 20:04:27.684576 Compare with tree...
679 20:04:27.684634 Root Device: enabled 1
680 20:04:27.684693 CPU_CLUSTER: 0: enabled 1
681 20:04:27.684752 APIC: 00: enabled 1
682 20:04:27.684810 APIC: 03: enabled 1
683 20:04:27.684869 APIC: 01: enabled 1
684 20:04:27.684928 APIC: 02: enabled 1
685 20:04:27.684987 APIC: 04: enabled 1
686 20:04:27.685046 APIC: 05: enabled 1
687 20:04:27.685104 APIC: 07: enabled 1
688 20:04:27.685163 APIC: 06: enabled 1
689 20:04:27.685222 DOMAIN: 0000: enabled 1
690 20:04:27.685281 PCI: 00:00.0: enabled 1
691 20:04:27.685340 PCI: 00:02.0: enabled 1
692 20:04:27.685400 PCI: 00:04.0: enabled 0
693 20:04:27.685459 PCI: 00:05.0: enabled 0
694 20:04:27.685518 PCI: 00:12.0: enabled 1
695 20:04:27.685576 PCI: 00:12.5: enabled 0
696 20:04:27.685635 PCI: 00:12.6: enabled 0
697 20:04:27.685694 PCI: 00:14.0: enabled 1
698 20:04:27.685753 USB0 port 0: enabled 1
699 20:04:27.685812 USB2 port 0: enabled 1
700 20:04:27.685871 USB2 port 1: enabled 1
701 20:04:27.685929 USB2 port 2: enabled 0
702 20:04:27.685987 USB2 port 3: enabled 0
703 20:04:27.686046 USB2 port 5: enabled 0
704 20:04:27.686105 USB2 port 6: enabled 1
705 20:04:27.686163 USB2 port 9: enabled 1
706 20:04:27.686222 USB3 port 0: enabled 1
707 20:04:27.686280 USB3 port 1: enabled 1
708 20:04:27.686339 USB3 port 2: enabled 1
709 20:04:27.686398 USB3 port 3: enabled 1
710 20:04:27.686456 USB3 port 4: enabled 0
711 20:04:27.686515 PCI: 00:14.1: enabled 0
712 20:04:27.686574 PCI: 00:14.3: enabled 1
713 20:04:27.686633 PCI: 00:14.5: enabled 0
714 20:04:27.686692 PCI: 00:15.0: enabled 1
715 20:04:27.686750 I2C: 00:15: enabled 1
716 20:04:27.686809 PCI: 00:15.1: enabled 1
717 20:04:27.686868 I2C: 00:5d: enabled 1
718 20:04:27.686927 GENERIC: 0.0: enabled 1
719 20:04:27.686986 PCI: 00:15.2: enabled 0
720 20:04:27.687045 PCI: 00:15.3: enabled 0
721 20:04:27.687104 PCI: 00:16.0: enabled 1
722 20:04:27.687163 PCI: 00:16.1: enabled 0
723 20:04:27.687222 PCI: 00:16.2: enabled 0
724 20:04:27.687281 PCI: 00:16.3: enabled 0
725 20:04:27.687340 PCI: 00:16.4: enabled 0
726 20:04:27.687399 PCI: 00:16.5: enabled 0
727 20:04:27.687458 PCI: 00:17.0: enabled 1
728 20:04:27.687719 PCI: 00:19.0: enabled 1
729 20:04:27.687787 I2C: 00:1a: enabled 1
730 20:04:27.687895 I2C: 00:38: enabled 1
731 20:04:27.688015 I2C: 00:39: enabled 1
732 20:04:27.688123 I2C: 00:3a: enabled 1
733 20:04:27.688224 I2C: 00:3b: enabled 1
734 20:04:27.688317 PCI: 00:19.1: enabled 0
735 20:04:27.688413 PCI: 00:19.2: enabled 0
736 20:04:27.688507 PCI: 00:1a.0: enabled 0
737 20:04:27.688600 PCI: 00:1c.0: enabled 0
738 20:04:27.688705 PCI: 00:1c.1: enabled 0
739 20:04:27.688808 PCI: 00:1c.2: enabled 0
740 20:04:27.688905 PCI: 00:1c.3: enabled 0
741 20:04:27.688998 PCI: 00:1c.4: enabled 0
742 20:04:27.689090 PCI: 00:1c.5: enabled 0
743 20:04:27.689183 PCI: 00:1c.6: enabled 0
744 20:04:27.689276 PCI: 00:1c.7: enabled 0
745 20:04:27.689369 PCI: 00:1d.0: enabled 1
746 20:04:27.689461 PCI: 00:1d.1: enabled 0
747 20:04:27.689553 PCI: 00:1d.2: enabled 0
748 20:04:27.689646 PCI: 00:1d.3: enabled 0
749 20:04:27.689739 PCI: 00:1d.4: enabled 0
750 20:04:27.689831 PCI: 00:1d.5: enabled 1
751 20:04:27.689924 PCI: 00:00.0: enabled 1
752 20:04:27.690016 PCI: 00:1e.0: enabled 1
753 20:04:27.690109 PCI: 00:1e.1: enabled 0
754 20:04:27.690201 PCI: 00:1e.2: enabled 1
755 20:04:27.690293 SPI: 00: enabled 1
756 20:04:27.690385 PCI: 00:1e.3: enabled 1
757 20:04:27.690478 SPI: 01: enabled 1
758 20:04:27.690570 PCI: 00:1f.0: enabled 1
759 20:04:27.690663 PNP: 0c09.0: enabled 1
760 20:04:27.690755 PCI: 00:1f.1: enabled 1
761 20:04:27.690847 PCI: 00:1f.2: enabled 1
762 20:04:27.690940 PCI: 00:1f.3: enabled 1
763 20:04:27.691032 PCI: 00:1f.4: enabled 1
764 20:04:27.691124 PCI: 00:1f.5: enabled 1
765 20:04:27.691216 PCI: 00:1f.6: enabled 0
766 20:04:27.691309 Root Device scanning...
767 20:04:27.691402 scan_static_bus for Root Device
768 20:04:27.691495 CPU_CLUSTER: 0 enabled
769 20:04:27.691587 DOMAIN: 0000 enabled
770 20:04:27.691668 DOMAIN: 0000 scanning...
771 20:04:27.691730 PCI: pci_scan_bus for bus 00
772 20:04:27.691789 PCI: 00:00.0 [8086/0000] ops
773 20:04:27.691848 PCI: 00:00.0 [8086/9b61] enabled
774 20:04:27.691908 PCI: 00:02.0 [8086/0000] bus ops
775 20:04:27.691967 PCI: 00:02.0 [8086/9b41] enabled
776 20:04:27.692026 PCI: 00:04.0 [8086/1903] disabled
777 20:04:27.692086 PCI: 00:08.0 [8086/1911] enabled
778 20:04:27.692145 PCI: 00:12.0 [8086/02f9] enabled
779 20:04:27.692204 PCI: 00:14.0 [8086/0000] bus ops
780 20:04:27.692262 PCI: 00:14.0 [8086/02ed] enabled
781 20:04:27.692320 PCI: 00:14.2 [8086/02ef] enabled
782 20:04:27.692378 PCI: 00:14.3 [8086/02f0] enabled
783 20:04:27.692437 PCI: 00:15.0 [8086/0000] bus ops
784 20:04:27.692496 PCI: 00:15.0 [8086/02e8] enabled
785 20:04:27.692554 PCI: 00:15.1 [8086/0000] bus ops
786 20:04:27.692613 PCI: 00:15.1 [8086/02e9] enabled
787 20:04:27.692672 PCI: 00:16.0 [8086/0000] ops
788 20:04:27.692730 PCI: 00:16.0 [8086/02e0] enabled
789 20:04:27.692790 PCI: 00:17.0 [8086/0000] ops
790 20:04:27.692849 PCI: 00:17.0 [8086/02d3] enabled
791 20:04:27.692908 PCI: 00:19.0 [8086/0000] bus ops
792 20:04:27.692966 PCI: 00:19.0 [8086/02c5] enabled
793 20:04:27.693025 PCI: 00:1d.0 [8086/0000] bus ops
794 20:04:27.693084 PCI: 00:1d.0 [8086/02b0] enabled
795 20:04:27.693143 PCI: Static device PCI: 00:1d.5 not found, disabling it.
796 20:04:27.693203 PCI: 00:1e.0 [8086/0000] ops
797 20:04:27.693262 PCI: 00:1e.0 [8086/02a8] enabled
798 20:04:27.693322 PCI: 00:1e.2 [8086/0000] bus ops
799 20:04:27.693380 PCI: 00:1e.2 [8086/02aa] enabled
800 20:04:27.693439 PCI: 00:1e.3 [8086/0000] bus ops
801 20:04:27.693497 PCI: 00:1e.3 [8086/02ab] enabled
802 20:04:27.693556 PCI: 00:1f.0 [8086/0000] bus ops
803 20:04:27.693615 PCI: 00:1f.0 [8086/0284] enabled
804 20:04:27.693674 PCI: Static device PCI: 00:1f.1 not found, disabling it.
805 20:04:27.693733 PCI: Static device PCI: 00:1f.2 not found, disabling it.
806 20:04:27.693793 PCI: 00:1f.3 [8086/0000] bus ops
807 20:04:27.693852 PCI: 00:1f.3 [8086/02c8] enabled
808 20:04:27.693911 PCI: 00:1f.4 [8086/0000] bus ops
809 20:04:27.693984 PCI: 00:1f.4 [8086/02a3] enabled
810 20:04:27.694060 PCI: 00:1f.5 [8086/0000] bus ops
811 20:04:27.694144 PCI: 00:1f.5 [8086/02a4] enabled
812 20:04:27.694229 PCI: Leftover static devices:
813 20:04:27.694292 PCI: 00:05.0
814 20:04:27.694353 PCI: 00:12.5
815 20:04:27.694412 PCI: 00:12.6
816 20:04:27.694471 PCI: 00:14.1
817 20:04:27.694530 PCI: 00:14.5
818 20:04:27.694588 PCI: 00:15.2
819 20:04:27.694648 PCI: 00:15.3
820 20:04:27.694707 PCI: 00:16.1
821 20:04:27.694769 PCI: 00:16.2
822 20:04:27.694828 PCI: 00:16.3
823 20:04:27.694887 PCI: 00:16.4
824 20:04:27.694946 PCI: 00:16.5
825 20:04:27.695005 PCI: 00:19.1
826 20:04:27.695064 PCI: 00:19.2
827 20:04:27.695123 PCI: 00:1a.0
828 20:04:27.695181 PCI: 00:1c.0
829 20:04:27.695240 PCI: 00:1c.1
830 20:04:27.695299 PCI: 00:1c.2
831 20:04:27.695358 PCI: 00:1c.3
832 20:04:27.695417 PCI: 00:1c.4
833 20:04:27.695475 PCI: 00:1c.5
834 20:04:27.695534 PCI: 00:1c.6
835 20:04:27.695592 PCI: 00:1c.7
836 20:04:27.695661 PCI: 00:1d.1
837 20:04:27.695721 PCI: 00:1d.2
838 20:04:27.695779 PCI: 00:1d.3
839 20:04:27.695838 PCI: 00:1d.4
840 20:04:27.695897 PCI: 00:1d.5
841 20:04:27.695955 PCI: 00:1e.1
842 20:04:27.696013 PCI: 00:1f.1
843 20:04:27.696072 PCI: 00:1f.2
844 20:04:27.696131 PCI: 00:1f.6
845 20:04:27.696189 PCI: Check your devicetree.cb.
846 20:04:27.696248 PCI: 00:02.0 scanning...
847 20:04:27.696307 scan_generic_bus for PCI: 00:02.0
848 20:04:27.696366 scan_generic_bus for PCI: 00:02.0 done
849 20:04:27.696427 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
850 20:04:27.696488 PCI: 00:14.0 scanning...
851 20:04:27.696546 scan_static_bus for PCI: 00:14.0
852 20:04:27.696606 USB0 port 0 enabled
853 20:04:27.696665 USB0 port 0 scanning...
854 20:04:27.696723 scan_static_bus for USB0 port 0
855 20:04:27.696781 USB2 port 0 enabled
856 20:04:27.696840 USB2 port 1 enabled
857 20:04:27.696899 USB2 port 2 disabled
858 20:04:27.696958 USB2 port 3 disabled
859 20:04:27.697016 USB2 port 5 disabled
860 20:04:27.697075 USB2 port 6 enabled
861 20:04:27.697134 USB2 port 9 enabled
862 20:04:27.697193 USB3 port 0 enabled
863 20:04:27.697252 USB3 port 1 enabled
864 20:04:27.697311 USB3 port 2 enabled
865 20:04:27.697370 USB3 port 3 enabled
866 20:04:27.697444 USB3 port 4 disabled
867 20:04:27.697505 USB2 port 0 scanning...
868 20:04:27.697564 scan_static_bus for USB2 port 0
869 20:04:27.697624 scan_static_bus for USB2 port 0 done
870 20:04:27.697684 scan_bus: scanning of bus USB2 port 0 took 9712 usecs
871 20:04:27.697744 USB2 port 1 scanning...
872 20:04:27.697803 scan_static_bus for USB2 port 1
873 20:04:27.697864 scan_static_bus for USB2 port 1 done
874 20:04:27.697923 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
875 20:04:27.697982 USB2 port 6 scanning...
876 20:04:27.698041 scan_static_bus for USB2 port 6
877 20:04:27.698101 scan_static_bus for USB2 port 6 done
878 20:04:27.698160 scan_bus: scanning of bus USB2 port 6 took 9703 usecs
879 20:04:27.698416 USB2 port 9 scanning...
880 20:04:27.698483 scan_static_bus for USB2 port 9
881 20:04:27.698544 scan_static_bus for USB2 port 9 done
882 20:04:27.698604 scan_bus: scanning of bus USB2 port 9 took 9700 usecs
883 20:04:27.698665 USB3 port 0 scanning...
884 20:04:27.698724 scan_static_bus for USB3 port 0
885 20:04:27.698783 scan_static_bus for USB3 port 0 done
886 20:04:27.698843 scan_bus: scanning of bus USB3 port 0 took 9712 usecs
887 20:04:27.698903 USB3 port 1 scanning...
888 20:04:27.698962 scan_static_bus for USB3 port 1
889 20:04:27.699022 scan_static_bus for USB3 port 1 done
890 20:04:27.699081 scan_bus: scanning of bus USB3 port 1 took 9702 usecs
891 20:04:27.699140 USB3 port 2 scanning...
892 20:04:27.699199 scan_static_bus for USB3 port 2
893 20:04:27.699258 scan_static_bus for USB3 port 2 done
894 20:04:27.699317 scan_bus: scanning of bus USB3 port 2 took 9711 usecs
895 20:04:27.699376 USB3 port 3 scanning...
896 20:04:27.699435 scan_static_bus for USB3 port 3
897 20:04:27.699494 scan_static_bus for USB3 port 3 done
898 20:04:27.699554 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
899 20:04:27.699622 scan_static_bus for USB0 port 0 done
900 20:04:27.699685 scan_bus: scanning of bus USB0 port 0 took 155438 usecs
901 20:04:27.699744 scan_static_bus for PCI: 00:14.0 done
902 20:04:27.699803 scan_bus: scanning of bus PCI: 00:14.0 took 173069 usecs
903 20:04:27.699863 PCI: 00:15.0 scanning...
904 20:04:27.699923 scan_generic_bus for PCI: 00:15.0
905 20:04:27.699983 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
906 20:04:27.700066 scan_generic_bus for PCI: 00:15.0 done
907 20:04:27.700168 scan_bus: scanning of bus PCI: 00:15.0 took 14307 usecs
908 20:04:27.700234 PCI: 00:15.1 scanning...
909 20:04:27.700295 scan_generic_bus for PCI: 00:15.1
910 20:04:27.700355 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
911 20:04:27.700415 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
912 20:04:27.700474 scan_generic_bus for PCI: 00:15.1 done
913 20:04:27.700533 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
914 20:04:27.700593 PCI: 00:19.0 scanning...
915 20:04:27.700652 scan_generic_bus for PCI: 00:19.0
916 20:04:27.700711 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
917 20:04:27.700771 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
918 20:04:27.700830 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
919 20:04:27.700889 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
920 20:04:27.700948 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
921 20:04:27.701007 scan_generic_bus for PCI: 00:19.0 done
922 20:04:27.701066 scan_bus: scanning of bus PCI: 00:19.0 took 30723 usecs
923 20:04:27.701125 PCI: 00:1d.0 scanning...
924 20:04:27.701185 do_pci_scan_bridge for PCI: 00:1d.0
925 20:04:27.701244 PCI: pci_scan_bus for bus 01
926 20:04:27.701303 PCI: 01:00.0 [1c5c/1327] enabled
927 20:04:27.701362 Enabling Common Clock Configuration
928 20:04:27.701422 L1 Sub-State supported from root port 29
929 20:04:27.701481 L1 Sub-State Support = 0xf
930 20:04:27.701541 CommonModeRestoreTime = 0x28
931 20:04:27.701599 Power On Value = 0x16, Power On Scale = 0x0
932 20:04:27.701658 ASPM: Enabled L1
933 20:04:27.701718 scan_bus: scanning of bus PCI: 00:1d.0 took 32788 usecs
934 20:04:27.701777 PCI: 00:1e.2 scanning...
935 20:04:27.701836 scan_generic_bus for PCI: 00:1e.2
936 20:04:27.701895 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
937 20:04:27.701954 scan_generic_bus for PCI: 00:1e.2 done
938 20:04:27.702014 scan_bus: scanning of bus PCI: 00:1e.2 took 14012 usecs
939 20:04:27.702073 PCI: 00:1e.3 scanning...
940 20:04:27.702133 scan_generic_bus for PCI: 00:1e.3
941 20:04:27.702192 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
942 20:04:27.702251 scan_generic_bus for PCI: 00:1e.3 done
943 20:04:27.702310 scan_bus: scanning of bus PCI: 00:1e.3 took 14008 usecs
944 20:04:27.702369 PCI: 00:1f.0 scanning...
945 20:04:27.702427 scan_static_bus for PCI: 00:1f.0
946 20:04:27.702486 PNP: 0c09.0 enabled
947 20:04:27.702550 scan_static_bus for PCI: 00:1f.0 done
948 20:04:27.702609 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
949 20:04:27.702668 PCI: 00:1f.3 scanning...
950 20:04:27.702727 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
951 20:04:27.702786 PCI: 00:1f.4 scanning...
952 20:04:27.702845 scan_generic_bus for PCI: 00:1f.4
953 20:04:27.702904 scan_generic_bus for PCI: 00:1f.4 done
954 20:04:27.702962 scan_bus: scanning of bus PCI: 00:1f.4 took 10195 usecs
955 20:04:27.703021 PCI: 00:1f.5 scanning...
956 20:04:27.703079 scan_generic_bus for PCI: 00:1f.5
957 20:04:27.703138 scan_generic_bus for PCI: 00:1f.5 done
958 20:04:27.703197 scan_bus: scanning of bus PCI: 00:1f.5 took 10201 usecs
959 20:04:27.703255 scan_bus: scanning of bus DOMAIN: 0000 took 605196 usecs
960 20:04:27.703314 scan_static_bus for Root Device done
961 20:04:27.703374 scan_bus: scanning of bus Root Device took 625075 usecs
962 20:04:27.703432 done
963 20:04:27.703491 Chrome EC: UHEPI supported
964 20:04:27.703550 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
965 20:04:27.703610 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
966 20:04:27.703681 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
967 20:04:27.703740 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
968 20:04:27.703799 SPI flash protection: WPSW=0 SRP0=0
969 20:04:27.703858 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
970 20:04:27.703917 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
971 20:04:27.703977 found VGA at PCI: 00:02.0
972 20:04:27.704036 Setting up VGA for PCI: 00:02.0
973 20:04:27.704095 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
974 20:04:27.704154 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
975 20:04:27.704212 Allocating resources...
976 20:04:27.704270 Reading resources...
977 20:04:27.704329 Root Device read_resources bus 0 link: 0
978 20:04:27.704388 CPU_CLUSTER: 0 read_resources bus 0 link: 0
979 20:04:27.704446 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
980 20:04:27.704505 DOMAIN: 0000 read_resources bus 0 link: 0
981 20:04:27.704770 PCI: 00:14.0 read_resources bus 0 link: 0
982 20:04:27.704895 USB0 port 0 read_resources bus 0 link: 0
983 20:04:27.705015 USB0 port 0 read_resources bus 0 link: 0 done
984 20:04:27.705135 PCI: 00:14.0 read_resources bus 0 link: 0 done
985 20:04:27.705253 PCI: 00:15.0 read_resources bus 1 link: 0
986 20:04:27.705352 PCI: 00:15.0 read_resources bus 1 link: 0 done
987 20:04:27.705446 PCI: 00:15.1 read_resources bus 2 link: 0
988 20:04:27.705539 PCI: 00:15.1 read_resources bus 2 link: 0 done
989 20:04:27.705633 PCI: 00:19.0 read_resources bus 3 link: 0
990 20:04:27.705726 PCI: 00:19.0 read_resources bus 3 link: 0 done
991 20:04:27.705818 PCI: 00:1d.0 read_resources bus 1 link: 0
992 20:04:27.705911 PCI: 00:1d.0 read_resources bus 1 link: 0 done
993 20:04:27.706004 PCI: 00:1e.2 read_resources bus 4 link: 0
994 20:04:27.706096 PCI: 00:1e.2 read_resources bus 4 link: 0 done
995 20:04:27.706189 PCI: 00:1e.3 read_resources bus 5 link: 0
996 20:04:27.706289 PCI: 00:1e.3 read_resources bus 5 link: 0 done
997 20:04:27.706381 PCI: 00:1f.0 read_resources bus 0 link: 0
998 20:04:27.706474 PCI: 00:1f.0 read_resources bus 0 link: 0 done
999 20:04:27.706573 DOMAIN: 0000 read_resources bus 0 link: 0 done
1000 20:04:27.706666 Root Device read_resources bus 0 link: 0 done
1001 20:04:27.706759 Done reading resources.
1002 20:04:27.706852 Show resources in subtree (Root Device)...After reading.
1003 20:04:27.706944 Root Device child on link 0 CPU_CLUSTER: 0
1004 20:04:27.707037 CPU_CLUSTER: 0 child on link 0 APIC: 00
1005 20:04:27.707129 APIC: 00
1006 20:04:27.707221 APIC: 03
1007 20:04:27.707312 APIC: 01
1008 20:04:27.707403 APIC: 02
1009 20:04:27.707498 APIC: 04
1010 20:04:27.707590 APIC: 05
1011 20:04:27.707692 APIC: 07
1012 20:04:27.707785 APIC: 06
1013 20:04:27.707878 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1014 20:04:27.707977 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1015 20:04:27.708073 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1016 20:04:27.708166 PCI: 00:00.0
1017 20:04:27.708274 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1018 20:04:27.708371 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1019 20:04:27.708467 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1020 20:04:27.708563 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1021 20:04:27.708657 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1022 20:04:27.708752 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1023 20:04:27.708847 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1024 20:04:27.708942 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1025 20:04:27.709046 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1026 20:04:27.709143 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1027 20:04:27.709238 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1028 20:04:27.709332 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1029 20:04:27.709426 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1030 20:04:27.709513 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1031 20:04:27.709576 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1032 20:04:27.709637 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1033 20:04:27.709697 PCI: 00:02.0
1034 20:04:27.709757 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1035 20:04:27.709818 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1036 20:04:27.709878 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1037 20:04:27.709938 PCI: 00:04.0
1038 20:04:27.709997 PCI: 00:08.0
1039 20:04:27.710055 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 20:04:27.710114 PCI: 00:12.0
1041 20:04:27.710173 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1042 20:04:27.710240 PCI: 00:14.0 child on link 0 USB0 port 0
1043 20:04:27.710334 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1044 20:04:27.710414 USB0 port 0 child on link 0 USB2 port 0
1045 20:04:27.710474 USB2 port 0
1046 20:04:27.710533 USB2 port 1
1047 20:04:27.710591 USB2 port 2
1048 20:04:27.710650 USB2 port 3
1049 20:04:27.710708 USB2 port 5
1050 20:04:27.710767 USB2 port 6
1051 20:04:27.710826 USB2 port 9
1052 20:04:27.710889 USB3 port 0
1053 20:04:27.710950 USB3 port 1
1054 20:04:27.711008 USB3 port 2
1055 20:04:27.711067 USB3 port 3
1056 20:04:27.711126 USB3 port 4
1057 20:04:27.711184 PCI: 00:14.2
1058 20:04:27.711242 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1059 20:04:27.711504 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1060 20:04:27.711603 PCI: 00:14.3
1061 20:04:27.711679 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1062 20:04:27.711740 PCI: 00:15.0 child on link 0 I2C: 01:15
1063 20:04:27.711801 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1064 20:04:27.711861 I2C: 01:15
1065 20:04:27.711924 PCI: 00:15.1 child on link 0 I2C: 02:5d
1066 20:04:27.711988 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1067 20:04:27.712050 I2C: 02:5d
1068 20:04:27.712109 GENERIC: 0.0
1069 20:04:27.712167 PCI: 00:16.0
1070 20:04:27.712226 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1071 20:04:27.712285 PCI: 00:17.0
1072 20:04:27.712344 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1073 20:04:27.712403 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1074 20:04:27.712463 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1075 20:04:27.712522 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1076 20:04:27.712581 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1077 20:04:27.712640 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1078 20:04:27.712699 PCI: 00:19.0 child on link 0 I2C: 03:1a
1079 20:04:27.712758 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1080 20:04:27.712817 I2C: 03:1a
1081 20:04:27.712875 I2C: 03:38
1082 20:04:27.712933 I2C: 03:39
1083 20:04:27.712991 I2C: 03:3a
1084 20:04:27.713050 I2C: 03:3b
1085 20:04:27.713107 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1086 20:04:27.713166 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1087 20:04:27.713225 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1088 20:04:27.713284 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1089 20:04:27.713342 PCI: 01:00.0
1090 20:04:27.713401 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1091 20:04:27.713460 PCI: 00:1e.0
1092 20:04:27.713519 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1093 20:04:27.713577 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1094 20:04:27.713636 PCI: 00:1e.2 child on link 0 SPI: 00
1095 20:04:27.713694 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1096 20:04:27.713772 SPI: 00
1097 20:04:27.713834 PCI: 00:1e.3 child on link 0 SPI: 01
1098 20:04:27.713894 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1099 20:04:27.713953 SPI: 01
1100 20:04:27.714012 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1101 20:04:27.714071 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1102 20:04:27.714130 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1103 20:04:27.714190 PNP: 0c09.0
1104 20:04:27.714248 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1105 20:04:27.714307 PCI: 00:1f.3
1106 20:04:27.714366 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1107 20:04:27.714425 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1108 20:04:27.714485 PCI: 00:1f.4
1109 20:04:27.714543 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1110 20:04:27.714602 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1111 20:04:27.714660 PCI: 00:1f.5
1112 20:04:27.714719 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1113 20:04:27.714778 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1114 20:04:27.714840 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1115 20:04:27.714900 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1116 20:04:27.714959 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1117 20:04:27.715017 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1118 20:04:27.715076 PCI: 00:17.0 18 * [0x60 - 0x67] io
1119 20:04:27.715135 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1120 20:04:27.715193 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1121 20:04:27.715252 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1122 20:04:27.715311 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1123 20:04:27.715371 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1124 20:04:27.715430 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1125 20:04:27.715488 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1126 20:04:27.715745 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1127 20:04:27.715814 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1128 20:04:27.715874 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1129 20:04:27.715934 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1130 20:04:27.715994 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1131 20:04:27.716063 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1132 20:04:27.716123 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1133 20:04:27.716182 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1134 20:04:27.716242 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1135 20:04:27.716301 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1136 20:04:27.716359 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1137 20:04:27.716418 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1138 20:04:27.716476 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1139 20:04:27.716534 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1140 20:04:27.716593 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1141 20:04:27.716652 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1142 20:04:27.716710 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1143 20:04:27.716769 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1144 20:04:27.716827 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1145 20:04:27.716886 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1146 20:04:27.716945 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1147 20:04:27.717004 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1148 20:04:27.717063 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1149 20:04:27.717121 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1150 20:04:27.717189 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1151 20:04:27.717252 avoid_fixed_resources: DOMAIN: 0000
1152 20:04:27.717311 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1153 20:04:27.717371 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1154 20:04:27.717436 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1155 20:04:27.717497 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1156 20:04:27.717556 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1157 20:04:27.717615 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1158 20:04:27.717674 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1159 20:04:27.717743 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1160 20:04:27.717804 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1161 20:04:27.717863 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1162 20:04:27.717922 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1163 20:04:27.717981 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1164 20:04:27.718040 Setting resources...
1165 20:04:27.718099 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1166 20:04:27.718159 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1167 20:04:27.718218 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1168 20:04:27.718277 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1169 20:04:27.718335 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1170 20:04:27.718394 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1171 20:04:27.718453 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1172 20:04:27.718513 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1173 20:04:27.718571 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1174 20:04:27.718633 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1175 20:04:27.718692 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1176 20:04:27.718752 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1177 20:04:27.718810 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1178 20:04:27.718870 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1179 20:04:27.718929 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1180 20:04:27.718987 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1181 20:04:27.719045 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1182 20:04:27.719104 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1183 20:04:27.719163 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1184 20:04:27.719222 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1185 20:04:27.719318 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1186 20:04:27.719396 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1187 20:04:27.719457 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1188 20:04:27.719516 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1189 20:04:27.719597 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1190 20:04:27.719672 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1191 20:04:27.719732 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1192 20:04:27.719791 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1193 20:04:27.719850 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1194 20:04:27.719909 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1195 20:04:27.719967 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1196 20:04:27.720026 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1197 20:04:27.720085 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1198 20:04:27.720145 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1199 20:04:27.720403 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1200 20:04:27.720471 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1201 20:04:27.720533 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1202 20:04:27.720593 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1203 20:04:27.720653 Root Device assign_resources, bus 0 link: 0
1204 20:04:27.720713 DOMAIN: 0000 assign_resources, bus 0 link: 0
1205 20:04:27.720773 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1206 20:04:27.720833 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1207 20:04:27.720892 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1208 20:04:27.720951 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1209 20:04:27.721011 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1210 20:04:27.721070 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1211 20:04:27.721129 PCI: 00:14.0 assign_resources, bus 0 link: 0
1212 20:04:27.721187 PCI: 00:14.0 assign_resources, bus 0 link: 0
1213 20:04:27.721250 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1214 20:04:27.721312 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1215 20:04:27.721375 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1216 20:04:27.721435 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1217 20:04:27.721493 PCI: 00:15.0 assign_resources, bus 1 link: 0
1218 20:04:27.721552 PCI: 00:15.0 assign_resources, bus 1 link: 0
1219 20:04:27.721611 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1220 20:04:27.721671 PCI: 00:15.1 assign_resources, bus 2 link: 0
1221 20:04:27.721729 PCI: 00:15.1 assign_resources, bus 2 link: 0
1222 20:04:27.721788 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1223 20:04:27.721847 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1224 20:04:27.721906 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1225 20:04:27.721965 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1226 20:04:27.722024 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1227 20:04:27.722083 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1228 20:04:27.722141 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1229 20:04:27.722200 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1230 20:04:27.722258 PCI: 00:19.0 assign_resources, bus 3 link: 0
1231 20:04:27.722317 PCI: 00:19.0 assign_resources, bus 3 link: 0
1232 20:04:27.722375 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1233 20:04:27.722435 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1234 20:04:27.722494 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1235 20:04:27.722552 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1236 20:04:27.722611 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1237 20:04:27.722670 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1238 20:04:27.722728 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1239 20:04:27.722786 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1240 20:04:27.722845 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1241 20:04:27.722903 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1242 20:04:27.722960 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1243 20:04:27.723019 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1244 20:04:27.723077 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1245 20:04:27.723135 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1246 20:04:27.723193 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1247 20:04:27.723251 LPC: Trying to open IO window from 800 size 1ff
1248 20:04:27.723310 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1249 20:04:27.723369 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1250 20:04:27.723427 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1251 20:04:27.723486 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1252 20:04:27.723544 DOMAIN: 0000 assign_resources, bus 0 link: 0
1253 20:04:27.723602 Root Device assign_resources, bus 0 link: 0
1254 20:04:27.723672 Done setting resources.
1255 20:04:27.723739 Show resources in subtree (Root Device)...After assigning values.
1256 20:04:27.723803 Root Device child on link 0 CPU_CLUSTER: 0
1257 20:04:27.723863 CPU_CLUSTER: 0 child on link 0 APIC: 00
1258 20:04:27.723923 APIC: 00
1259 20:04:27.723982 APIC: 03
1260 20:04:27.724040 APIC: 01
1261 20:04:27.724098 APIC: 02
1262 20:04:27.724155 APIC: 04
1263 20:04:27.724212 APIC: 05
1264 20:04:27.724270 APIC: 07
1265 20:04:27.724327 APIC: 06
1266 20:04:27.724385 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1267 20:04:27.724644 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1268 20:04:27.724713 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1269 20:04:27.724776 PCI: 00:00.0
1270 20:04:27.724871 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1271 20:04:27.724965 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1272 20:04:27.725059 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1273 20:04:27.725152 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1274 20:04:27.725246 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1275 20:04:27.725339 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1276 20:04:27.725432 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1277 20:04:27.725525 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1278 20:04:27.725618 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1279 20:04:27.725711 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1280 20:04:27.725804 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1281 20:04:27.725900 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1282 20:04:27.725994 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1283 20:04:27.726087 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1284 20:04:27.726180 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1285 20:04:27.726273 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1286 20:04:27.726364 PCI: 00:02.0
1287 20:04:27.726456 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1288 20:04:27.726551 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1289 20:04:27.726644 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1290 20:04:27.726735 PCI: 00:04.0
1291 20:04:27.726825 PCI: 00:08.0
1292 20:04:27.726917 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1293 20:04:27.727011 PCI: 00:12.0
1294 20:04:27.727103 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1295 20:04:27.727196 PCI: 00:14.0 child on link 0 USB0 port 0
1296 20:04:27.727270 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1297 20:04:27.727366 USB0 port 0 child on link 0 USB2 port 0
1298 20:04:27.727457 USB2 port 0
1299 20:04:27.727549 USB2 port 1
1300 20:04:27.727654 USB2 port 2
1301 20:04:27.727716 USB2 port 3
1302 20:04:27.727774 USB2 port 5
1303 20:04:27.727832 USB2 port 6
1304 20:04:27.727890 USB2 port 9
1305 20:04:27.727948 USB3 port 0
1306 20:04:27.728006 USB3 port 1
1307 20:04:27.728063 USB3 port 2
1308 20:04:27.728120 USB3 port 3
1309 20:04:27.728178 USB3 port 4
1310 20:04:27.728235 PCI: 00:14.2
1311 20:04:27.728293 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1312 20:04:27.728352 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1313 20:04:27.728411 PCI: 00:14.3
1314 20:04:27.728469 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1315 20:04:27.728527 PCI: 00:15.0 child on link 0 I2C: 01:15
1316 20:04:27.728586 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1317 20:04:27.728645 I2C: 01:15
1318 20:04:27.728703 PCI: 00:15.1 child on link 0 I2C: 02:5d
1319 20:04:27.728762 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1320 20:04:27.728821 I2C: 02:5d
1321 20:04:27.728879 GENERIC: 0.0
1322 20:04:27.728937 PCI: 00:16.0
1323 20:04:27.728996 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1324 20:04:27.729055 PCI: 00:17.0
1325 20:04:27.729113 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1326 20:04:27.729172 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1327 20:04:27.729231 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1328 20:04:27.729289 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1329 20:04:27.729348 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1330 20:04:27.729603 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1331 20:04:27.729669 PCI: 00:19.0 child on link 0 I2C: 03:1a
1332 20:04:27.729729 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1333 20:04:27.729789 I2C: 03:1a
1334 20:04:27.729847 I2C: 03:38
1335 20:04:27.729904 I2C: 03:39
1336 20:04:27.729962 I2C: 03:3a
1337 20:04:27.730019 I2C: 03:3b
1338 20:04:27.730077 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1339 20:04:27.730135 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1340 20:04:27.730193 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1341 20:04:27.730252 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1342 20:04:27.730311 PCI: 01:00.0
1343 20:04:27.730369 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1344 20:04:27.730428 PCI: 00:1e.0
1345 20:04:27.730486 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1346 20:04:27.730546 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1347 20:04:27.730604 PCI: 00:1e.2 child on link 0 SPI: 00
1348 20:04:27.730663 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1349 20:04:27.730722 SPI: 00
1350 20:04:27.730780 PCI: 00:1e.3 child on link 0 SPI: 01
1351 20:04:27.730839 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1352 20:04:27.730898 SPI: 01
1353 20:04:27.730957 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1354 20:04:27.731016 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1355 20:04:27.731075 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1356 20:04:27.731134 PNP: 0c09.0
1357 20:04:27.731215 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1358 20:04:27.731277 PCI: 00:1f.3
1359 20:04:27.731336 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1360 20:04:27.731395 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1361 20:04:27.731454 PCI: 00:1f.4
1362 20:04:27.731512 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1363 20:04:27.731571 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1364 20:04:27.731640 PCI: 00:1f.5
1365 20:04:27.731701 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1366 20:04:27.731760 Done allocating resources.
1367 20:04:27.731818 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1368 20:04:27.731876 Enabling resources...
1369 20:04:27.731934 PCI: 00:00.0 subsystem <- 8086/9b61
1370 20:04:27.731992 PCI: 00:00.0 cmd <- 06
1371 20:04:27.732049 PCI: 00:02.0 subsystem <- 8086/9b41
1372 20:04:27.732107 PCI: 00:02.0 cmd <- 03
1373 20:04:27.732165 PCI: 00:08.0 cmd <- 06
1374 20:04:27.732223 PCI: 00:12.0 subsystem <- 8086/02f9
1375 20:04:27.732282 PCI: 00:12.0 cmd <- 02
1376 20:04:27.732340 PCI: 00:14.0 subsystem <- 8086/02ed
1377 20:04:27.732398 PCI: 00:14.0 cmd <- 02
1378 20:04:27.732455 PCI: 00:14.2 cmd <- 02
1379 20:04:27.732512 PCI: 00:14.3 subsystem <- 8086/02f0
1380 20:04:27.732570 PCI: 00:14.3 cmd <- 02
1381 20:04:27.732628 PCI: 00:15.0 subsystem <- 8086/02e8
1382 20:04:27.732686 PCI: 00:15.0 cmd <- 02
1383 20:04:27.732744 PCI: 00:15.1 subsystem <- 8086/02e9
1384 20:04:27.732802 PCI: 00:15.1 cmd <- 02
1385 20:04:27.732860 PCI: 00:16.0 subsystem <- 8086/02e0
1386 20:04:27.732918 PCI: 00:16.0 cmd <- 02
1387 20:04:27.732976 PCI: 00:17.0 subsystem <- 8086/02d3
1388 20:04:27.733034 PCI: 00:17.0 cmd <- 03
1389 20:04:27.733092 PCI: 00:19.0 subsystem <- 8086/02c5
1390 20:04:27.733149 PCI: 00:19.0 cmd <- 02
1391 20:04:27.733206 PCI: 00:1d.0 bridge ctrl <- 0013
1392 20:04:27.733264 PCI: 00:1d.0 subsystem <- 8086/02b0
1393 20:04:27.733321 PCI: 00:1d.0 cmd <- 06
1394 20:04:27.733378 PCI: 00:1e.0 subsystem <- 8086/02a8
1395 20:04:27.733436 PCI: 00:1e.0 cmd <- 06
1396 20:04:27.733494 PCI: 00:1e.2 subsystem <- 8086/02aa
1397 20:04:27.733551 PCI: 00:1e.2 cmd <- 06
1398 20:04:27.733609 PCI: 00:1e.3 subsystem <- 8086/02ab
1399 20:04:27.733667 PCI: 00:1e.3 cmd <- 02
1400 20:04:27.733724 PCI: 00:1f.0 subsystem <- 8086/0284
1401 20:04:27.733782 PCI: 00:1f.0 cmd <- 407
1402 20:04:27.733839 PCI: 00:1f.3 subsystem <- 8086/02c8
1403 20:04:27.733897 PCI: 00:1f.3 cmd <- 02
1404 20:04:27.733955 PCI: 00:1f.4 subsystem <- 8086/02a3
1405 20:04:27.734012 PCI: 00:1f.4 cmd <- 03
1406 20:04:27.734069 PCI: 00:1f.5 subsystem <- 8086/02a4
1407 20:04:27.734127 PCI: 00:1f.5 cmd <- 406
1408 20:04:27.734184 PCI: 01:00.0 cmd <- 02
1409 20:04:27.734266 done.
1410 20:04:27.734328 ME: Version: 14.0.39.1367
1411 20:04:27.734387 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1412 20:04:27.734446 Initializing devices...
1413 20:04:27.734504 Root Device init ...
1414 20:04:27.734768 Chrome EC: Set SMI mask to 0x0000000000000000
1415 20:04:27.737840 Chrome EC: clear events_b mask to 0x0000000000000000
1416 20:04:27.744273 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1417 20:04:27.751161 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1418 20:04:27.757463 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1419 20:04:27.761003 Chrome EC: Set WAKE mask to 0x0000000000000000
1420 20:04:27.763997 Root Device init finished in 35188 usecs
1421 20:04:27.767645 CPU_CLUSTER: 0 init ...
1422 20:04:27.774485 CPU_CLUSTER: 0 init finished in 2448 usecs
1423 20:04:27.778428 PCI: 00:00.0 init ...
1424 20:04:27.781689 CPU TDP: 15 Watts
1425 20:04:27.785401 CPU PL2 = 64 Watts
1426 20:04:27.788519 PCI: 00:00.0 init finished in 7081 usecs
1427 20:04:27.791877 PCI: 00:02.0 init ...
1428 20:04:27.795368 PCI: 00:02.0 init finished in 2254 usecs
1429 20:04:27.798769 PCI: 00:08.0 init ...
1430 20:04:27.801900 PCI: 00:08.0 init finished in 2253 usecs
1431 20:04:27.805040 PCI: 00:12.0 init ...
1432 20:04:27.808609 PCI: 00:12.0 init finished in 2253 usecs
1433 20:04:27.811865 PCI: 00:14.0 init ...
1434 20:04:27.815322 PCI: 00:14.0 init finished in 2252 usecs
1435 20:04:27.818515 PCI: 00:14.2 init ...
1436 20:04:27.822093 PCI: 00:14.2 init finished in 2252 usecs
1437 20:04:27.825164 PCI: 00:14.3 init ...
1438 20:04:27.828753 PCI: 00:14.3 init finished in 2273 usecs
1439 20:04:27.831557 PCI: 00:15.0 init ...
1440 20:04:27.835108 DW I2C bus 0 at 0xd121f000 (400 KHz)
1441 20:04:27.838218 PCI: 00:15.0 init finished in 5979 usecs
1442 20:04:27.841587 PCI: 00:15.1 init ...
1443 20:04:27.844806 DW I2C bus 1 at 0xd1220000 (400 KHz)
1444 20:04:27.848092 PCI: 00:15.1 init finished in 5979 usecs
1445 20:04:27.852030 PCI: 00:16.0 init ...
1446 20:04:27.855272 PCI: 00:16.0 init finished in 2253 usecs
1447 20:04:27.859148 PCI: 00:19.0 init ...
1448 20:04:27.862629 DW I2C bus 4 at 0xd1222000 (400 KHz)
1449 20:04:27.869033 PCI: 00:19.0 init finished in 5977 usecs
1450 20:04:27.869125 PCI: 00:1d.0 init ...
1451 20:04:27.872531 Initializing PCH PCIe bridge.
1452 20:04:27.875367 PCI: 00:1d.0 init finished in 5277 usecs
1453 20:04:27.880504 PCI: 00:1f.0 init ...
1454 20:04:27.884100 IOAPIC: Initializing IOAPIC at 0xfec00000
1455 20:04:27.890464 IOAPIC: Bootstrap Processor Local APIC = 0x00
1456 20:04:27.890560 IOAPIC: ID = 0x02
1457 20:04:27.893694 IOAPIC: Dumping registers
1458 20:04:27.897236 reg 0x0000: 0x02000000
1459 20:04:27.900665 reg 0x0001: 0x00770020
1460 20:04:27.900785 reg 0x0002: 0x00000000
1461 20:04:27.907189 PCI: 00:1f.0 init finished in 23547 usecs
1462 20:04:27.910614 PCI: 00:1f.4 init ...
1463 20:04:27.914086 PCI: 00:1f.4 init finished in 2261 usecs
1464 20:04:27.924799 PCI: 01:00.0 init ...
1465 20:04:27.927932 PCI: 01:00.0 init finished in 2253 usecs
1466 20:04:27.932192 PNP: 0c09.0 init ...
1467 20:04:27.935872 Google Chrome EC uptime: 8.162 seconds
1468 20:04:27.942182 Google Chrome AP resets since EC boot: 0
1469 20:04:27.945638 Google Chrome most recent AP reset causes:
1470 20:04:27.952579 Google Chrome EC reset flags at last EC boot: reset-pin | hard | ap-off
1471 20:04:27.955766 PNP: 0c09.0 init finished in 22055 usecs
1472 20:04:27.959117 Devices initialized
1473 20:04:27.962458 Show all devs... After init.
1474 20:04:27.965536 Root Device: enabled 1
1475 20:04:27.965632 CPU_CLUSTER: 0: enabled 1
1476 20:04:27.969214 DOMAIN: 0000: enabled 1
1477 20:04:27.972076 APIC: 00: enabled 1
1478 20:04:27.972199 PCI: 00:00.0: enabled 1
1479 20:04:27.975498 PCI: 00:02.0: enabled 1
1480 20:04:27.978970 PCI: 00:04.0: enabled 0
1481 20:04:27.981867 PCI: 00:05.0: enabled 0
1482 20:04:27.981960 PCI: 00:12.0: enabled 1
1483 20:04:27.985404 PCI: 00:12.5: enabled 0
1484 20:04:27.988401 PCI: 00:12.6: enabled 0
1485 20:04:27.991929 PCI: 00:14.0: enabled 1
1486 20:04:27.992021 PCI: 00:14.1: enabled 0
1487 20:04:27.995338 PCI: 00:14.3: enabled 1
1488 20:04:27.998897 PCI: 00:14.5: enabled 0
1489 20:04:28.001802 PCI: 00:15.0: enabled 1
1490 20:04:28.001893 PCI: 00:15.1: enabled 1
1491 20:04:28.005010 PCI: 00:15.2: enabled 0
1492 20:04:28.008807 PCI: 00:15.3: enabled 0
1493 20:04:28.011649 PCI: 00:16.0: enabled 1
1494 20:04:28.011737 PCI: 00:16.1: enabled 0
1495 20:04:28.015117 PCI: 00:16.2: enabled 0
1496 20:04:28.018768 PCI: 00:16.3: enabled 0
1497 20:04:28.018864 PCI: 00:16.4: enabled 0
1498 20:04:28.021646 PCI: 00:16.5: enabled 0
1499 20:04:28.025419 PCI: 00:17.0: enabled 1
1500 20:04:28.028339 PCI: 00:19.0: enabled 1
1501 20:04:28.028436 PCI: 00:19.1: enabled 0
1502 20:04:28.031944 PCI: 00:19.2: enabled 0
1503 20:04:28.035141 PCI: 00:1a.0: enabled 0
1504 20:04:28.038405 PCI: 00:1c.0: enabled 0
1505 20:04:28.038544 PCI: 00:1c.1: enabled 0
1506 20:04:28.041417 PCI: 00:1c.2: enabled 0
1507 20:04:28.044671 PCI: 00:1c.3: enabled 0
1508 20:04:28.048168 PCI: 00:1c.4: enabled 0
1509 20:04:28.048313 PCI: 00:1c.5: enabled 0
1510 20:04:28.051746 PCI: 00:1c.6: enabled 0
1511 20:04:28.054699 PCI: 00:1c.7: enabled 0
1512 20:04:28.058057 PCI: 00:1d.0: enabled 1
1513 20:04:28.058206 PCI: 00:1d.1: enabled 0
1514 20:04:28.061178 PCI: 00:1d.2: enabled 0
1515 20:04:28.064764 PCI: 00:1d.3: enabled 0
1516 20:04:28.064892 PCI: 00:1d.4: enabled 0
1517 20:04:28.068211 PCI: 00:1d.5: enabled 0
1518 20:04:28.071271 PCI: 00:1e.0: enabled 1
1519 20:04:28.074785 PCI: 00:1e.1: enabled 0
1520 20:04:28.074884 PCI: 00:1e.2: enabled 1
1521 20:04:28.077861 PCI: 00:1e.3: enabled 1
1522 20:04:28.080923 PCI: 00:1f.0: enabled 1
1523 20:04:28.084829 PCI: 00:1f.1: enabled 0
1524 20:04:28.084925 PCI: 00:1f.2: enabled 0
1525 20:04:28.087726 PCI: 00:1f.3: enabled 1
1526 20:04:28.090845 PCI: 00:1f.4: enabled 1
1527 20:04:28.094320 PCI: 00:1f.5: enabled 1
1528 20:04:28.094415 PCI: 00:1f.6: enabled 0
1529 20:04:28.097775 USB0 port 0: enabled 1
1530 20:04:28.101094 I2C: 01:15: enabled 1
1531 20:04:28.101189 I2C: 02:5d: enabled 1
1532 20:04:28.104685 GENERIC: 0.0: enabled 1
1533 20:04:28.107439 I2C: 03:1a: enabled 1
1534 20:04:28.107534 I2C: 03:38: enabled 1
1535 20:04:28.110861 I2C: 03:39: enabled 1
1536 20:04:28.114170 I2C: 03:3a: enabled 1
1537 20:04:28.114266 I2C: 03:3b: enabled 1
1538 20:04:28.117728 PCI: 00:00.0: enabled 1
1539 20:04:28.121088 SPI: 00: enabled 1
1540 20:04:28.121244 SPI: 01: enabled 1
1541 20:04:28.124058 PNP: 0c09.0: enabled 1
1542 20:04:28.127449 USB2 port 0: enabled 1
1543 20:04:28.130901 USB2 port 1: enabled 1
1544 20:04:28.131050 USB2 port 2: enabled 0
1545 20:04:28.133978 USB2 port 3: enabled 0
1546 20:04:28.137395 USB2 port 5: enabled 0
1547 20:04:28.137534 USB2 port 6: enabled 1
1548 20:04:28.140966 USB2 port 9: enabled 1
1549 20:04:28.144327 USB3 port 0: enabled 1
1550 20:04:28.144479 USB3 port 1: enabled 1
1551 20:04:28.147549 USB3 port 2: enabled 1
1552 20:04:28.150944 USB3 port 3: enabled 1
1553 20:04:28.153696 USB3 port 4: enabled 0
1554 20:04:28.153836 APIC: 03: enabled 1
1555 20:04:28.157146 APIC: 01: enabled 1
1556 20:04:28.157285 APIC: 02: enabled 1
1557 20:04:28.160619 APIC: 04: enabled 1
1558 20:04:28.164257 APIC: 05: enabled 1
1559 20:04:28.164392 APIC: 07: enabled 1
1560 20:04:28.166962 APIC: 06: enabled 1
1561 20:04:28.170326 PCI: 00:08.0: enabled 1
1562 20:04:28.170473 PCI: 00:14.2: enabled 1
1563 20:04:28.173894 PCI: 01:00.0: enabled 1
1564 20:04:28.177494 Disabling ACPI via APMC:
1565 20:04:28.181539 done.
1566 20:04:28.184565 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1567 20:04:28.187995 ELOG: NV offset 0xaf0000 size 0x4000
1568 20:04:28.195567 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1569 20:04:28.202158 ELOG: Event(17) added with size 13 at 2024-05-12 20:03:35 UTC
1570 20:04:28.208844 ELOG: Event(92) added with size 9 at 2024-05-12 20:03:35 UTC
1571 20:04:28.215304 ELOG: Event(93) added with size 9 at 2024-05-12 20:03:35 UTC
1572 20:04:28.222249 ELOG: Event(9E) added with size 10 at 2024-05-12 20:03:35 UTC
1573 20:04:28.228847 ELOG: Event(9F) added with size 14 at 2024-05-12 20:03:35 UTC
1574 20:04:28.231806 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1575 20:04:28.239788 ELOG: Event(A1) added with size 10 at 2024-05-12 20:03:35 UTC
1576 20:04:28.249619 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
1577 20:04:28.253195 ELOG: Event(A0) added with size 9 at 2024-05-12 20:03:35 UTC
1578 20:04:28.259841 elog_add_boot_reason: Logged dev mode boot
1579 20:04:28.259935 Finalize devices...
1580 20:04:28.262739 PCI: 00:17.0 final
1581 20:04:28.266410 Devices finalized
1582 20:04:28.269358 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1583 20:04:28.276333 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1584 20:04:28.279355 ME: HFSTS1 : 0x90000245
1585 20:04:28.282996 ME: HFSTS2 : 0x30850126
1586 20:04:28.286045 ME: HFSTS3 : 0x00000020
1587 20:04:28.292708 ME: HFSTS4 : 0x00004800
1588 20:04:28.296009 ME: HFSTS5 : 0x00000000
1589 20:04:28.299566 ME: HFSTS6 : 0x40400006
1590 20:04:28.302578 ME: Manufacturing Mode : NO
1591 20:04:28.306153 ME: FW Partition Table : OK
1592 20:04:28.309501 ME: Bringup Loader Failure : NO
1593 20:04:28.312854 ME: Firmware Init Complete : YES
1594 20:04:28.315735 ME: Boot Options Present : NO
1595 20:04:28.319193 ME: Update In Progress : NO
1596 20:04:28.322802 ME: D0i3 Support : YES
1597 20:04:28.325716 ME: Low Power State Enabled : NO
1598 20:04:28.329178 ME: CPU Replaced : NO
1599 20:04:28.332372 ME: CPU Replacement Valid : YES
1600 20:04:28.335853 ME: Current Working State : 5
1601 20:04:28.338948 ME: Current Operation State : 1
1602 20:04:28.342332 ME: Current Operation Mode : 0
1603 20:04:28.345666 ME: Error Code : 0
1604 20:04:28.348759 ME: CPU Debug Disabled : YES
1605 20:04:28.352101 ME: TXT Support : NO
1606 20:04:28.358949 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1607 20:04:28.365551 ELOG: Event(91) added with size 10 at 2024-05-12 20:03:35 UTC
1608 20:04:28.369142 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1609 20:04:28.372273 CBFS @ c08000 size 3f8000
1610 20:04:28.378738 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1611 20:04:28.382283 CBFS: Locating 'fallback/dsdt.aml'
1612 20:04:28.385661 CBFS: Found @ offset 10bb80 size 3fa5
1613 20:04:28.391895 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1614 20:04:28.391994 CBFS @ c08000 size 3f8000
1615 20:04:28.398826 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1616 20:04:28.401770 CBFS: Locating 'fallback/slic'
1617 20:04:28.406541 CBFS: 'fallback/slic' not found.
1618 20:04:28.412795 ACPI: Writing ACPI tables at 99b3e000.
1619 20:04:28.412895 ACPI: * FACS
1620 20:04:28.416287 ACPI: * DSDT
1621 20:04:28.419505 Ramoops buffer: 0x100000@0x99a3d000.
1622 20:04:28.422795 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1623 20:04:28.429322 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1624 20:04:28.432414 Google Chrome EC: version:
1625 20:04:28.435844 ro: helios_v2.0.2659-56403530b
1626 20:04:28.439190 rw: helios_v2.0.2849-c41de27e7d
1627 20:04:28.439319 running image: 1
1628 20:04:28.443408 ACPI: * FADT
1629 20:04:28.443539 SCI is IRQ9
1630 20:04:28.450050 ACPI: added table 1/32, length now 40
1631 20:04:28.450165 ACPI: * SSDT
1632 20:04:28.453707 Found 1 CPU(s) with 8 core(s) each.
1633 20:04:28.457278 Error: Could not locate 'wifi_sar' in VPD.
1634 20:04:28.463574 Checking CBFS for default SAR values
1635 20:04:28.467055 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1636 20:04:28.469908 CBFS @ c08000 size 3f8000
1637 20:04:28.476737 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1638 20:04:28.480165 CBFS: Locating 'wifi_sar_defaults.hex'
1639 20:04:28.483754 CBFS: Found @ offset 5fac0 size 77
1640 20:04:28.486684 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1641 20:04:28.490253 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1642 20:04:28.496707 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1643 20:04:28.503054 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1644 20:04:28.506481 failed to find key in VPD: dsm_calib_r0_0
1645 20:04:28.516329 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1646 20:04:28.520008 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1647 20:04:28.523383 failed to find key in VPD: dsm_calib_r0_1
1648 20:04:28.533436 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1649 20:04:28.540044 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1650 20:04:28.542987 failed to find key in VPD: dsm_calib_r0_2
1651 20:04:28.553320 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1652 20:04:28.556608 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1653 20:04:28.559941 failed to find key in VPD: dsm_calib_r0_3
1654 20:04:28.569858 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1655 20:04:28.576413 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1656 20:04:28.579983 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1657 20:04:28.582822 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1658 20:04:28.586482 EC returned error result code 1
1659 20:04:28.590031 EC returned error result code 1
1660 20:04:28.594223 EC returned error result code 1
1661 20:04:28.600601 PS2K: Bad resp from EC. Vivaldi disabled!
1662 20:04:28.604144 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1663 20:04:28.610562 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1664 20:04:28.616945 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1665 20:04:28.620399 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1666 20:04:28.627041 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1667 20:04:28.634148 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1668 20:04:28.637051 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1669 20:04:28.643520 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1670 20:04:28.647025 ACPI: added table 2/32, length now 44
1671 20:04:28.650591 ACPI: * MCFG
1672 20:04:28.653503 ACPI: added table 3/32, length now 48
1673 20:04:28.657322 ACPI: * TPM2
1674 20:04:28.657426 TPM2 log created at 99a2d000
1675 20:04:28.663882 ACPI: added table 4/32, length now 52
1676 20:04:28.663975 ACPI: * MADT
1677 20:04:28.664076 SCI is IRQ9
1678 20:04:28.670098 ACPI: added table 5/32, length now 56
1679 20:04:28.670206 current = 99b43ac0
1680 20:04:28.673363 ACPI: * DMAR
1681 20:04:28.676758 ACPI: added table 6/32, length now 60
1682 20:04:28.680268 ACPI: * IGD OpRegion
1683 20:04:28.680370 GMA: Found VBT in CBFS
1684 20:04:28.683499 GMA: Found valid VBT in CBFS
1685 20:04:28.686854 ACPI: added table 7/32, length now 64
1686 20:04:28.690472 ACPI: * HPET
1687 20:04:28.693480 ACPI: added table 8/32, length now 68
1688 20:04:28.693577 ACPI: done.
1689 20:04:28.697001 ACPI tables: 31744 bytes.
1690 20:04:28.700717 smbios_write_tables: 99a2c000
1691 20:04:28.704326 EC returned error result code 3
1692 20:04:28.707238 Couldn't obtain OEM name from CBI
1693 20:04:28.710641 Create SMBIOS type 17
1694 20:04:28.713766 PCI: 00:00.0 (Intel Cannonlake)
1695 20:04:28.717189 PCI: 00:14.3 (Intel WiFi)
1696 20:04:28.717278 SMBIOS tables: 939 bytes.
1697 20:04:28.723869 Writing table forward entry at 0x00000500
1698 20:04:28.730293 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1699 20:04:28.734010 Writing coreboot table at 0x99b62000
1700 20:04:28.737174 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1701 20:04:28.743769 1. 0000000000001000-000000000009ffff: RAM
1702 20:04:28.746993 2. 00000000000a0000-00000000000fffff: RESERVED
1703 20:04:28.750799 3. 0000000000100000-0000000099a2bfff: RAM
1704 20:04:28.757023 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1705 20:04:28.763812 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1706 20:04:28.767025 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1707 20:04:28.773426 7. 000000009a000000-000000009f7fffff: RESERVED
1708 20:04:28.776899 8. 00000000e0000000-00000000efffffff: RESERVED
1709 20:04:28.783540 9. 00000000fc000000-00000000fc000fff: RESERVED
1710 20:04:28.786589 10. 00000000fe000000-00000000fe00ffff: RESERVED
1711 20:04:28.793284 11. 00000000fed10000-00000000fed17fff: RESERVED
1712 20:04:28.796955 12. 00000000fed80000-00000000fed83fff: RESERVED
1713 20:04:28.803454 13. 00000000fed90000-00000000fed91fff: RESERVED
1714 20:04:28.806861 14. 00000000feda0000-00000000feda1fff: RESERVED
1715 20:04:28.809873 15. 0000000100000000-000000045e7fffff: RAM
1716 20:04:28.816899 Graphics framebuffer located at 0xc0000000
1717 20:04:28.816995 Passing 5 GPIOs to payload:
1718 20:04:28.823401 NAME | PORT | POLARITY | VALUE
1719 20:04:28.829931 write protect | undefined | high | low
1720 20:04:28.833394 lid | undefined | high | high
1721 20:04:28.839773 power | undefined | high | low
1722 20:04:28.843120 oprom | undefined | high | low
1723 20:04:28.849751 EC in RW | 0x000000cb | high | low
1724 20:04:28.849853 Board ID: 4
1725 20:04:28.856731 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1726 20:04:28.860004 CBFS @ c08000 size 3f8000
1727 20:04:28.863240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1728 20:04:28.869741 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1729 20:04:28.872834 coreboot table: 1492 bytes.
1730 20:04:28.876422 IMD ROOT 0. 99fff000 00001000
1731 20:04:28.879985 IMD SMALL 1. 99ffe000 00001000
1732 20:04:28.882913 FSP MEMORY 2. 99c4e000 003b0000
1733 20:04:28.886398 CONSOLE 3. 99c2e000 00020000
1734 20:04:28.889735 FMAP 4. 99c2d000 0000054e
1735 20:04:28.892910 TIME STAMP 5. 99c2c000 00000910
1736 20:04:28.896226 VBOOT WORK 6. 99c18000 00014000
1737 20:04:28.900054 MRC DATA 7. 99c16000 00001958
1738 20:04:28.902743 ROMSTG STCK 8. 99c15000 00001000
1739 20:04:28.906129 AFTER CAR 9. 99c0b000 0000a000
1740 20:04:28.909696 RAMSTAGE 10. 99baf000 0005c000
1741 20:04:28.913094 REFCODE 11. 99b7a000 00035000
1742 20:04:28.916253 SMM BACKUP 12. 99b6a000 00010000
1743 20:04:28.919816 COREBOOT 13. 99b62000 00008000
1744 20:04:28.922828 ACPI 14. 99b3e000 00024000
1745 20:04:28.926508 ACPI GNVS 15. 99b3d000 00001000
1746 20:04:28.929450 RAMOOPS 16. 99a3d000 00100000
1747 20:04:28.933012 TPM2 TCGLOG17. 99a2d000 00010000
1748 20:04:28.936499 SMBIOS 18. 99a2c000 00000800
1749 20:04:28.939586 IMD small region:
1750 20:04:28.943064 IMD ROOT 0. 99ffec00 00000400
1751 20:04:28.946547 FSP RUNTIME 1. 99ffebe0 00000004
1752 20:04:28.949964 EC HOSTEVENT 2. 99ffebc0 00000008
1753 20:04:28.953259 POWER STATE 3. 99ffeb80 00000040
1754 20:04:28.956302 ROMSTAGE 4. 99ffeb60 00000004
1755 20:04:28.959803 MEM INFO 5. 99ffe9a0 000001b9
1756 20:04:28.963267 VPD 6. 99ffe920 0000006c
1757 20:04:28.966200 MTRR: Physical address space:
1758 20:04:28.973024 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1759 20:04:28.979666 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1760 20:04:28.986316 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1761 20:04:28.989638 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1762 20:04:28.996148 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1763 20:04:29.002612 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1764 20:04:29.009216 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1765 20:04:29.012660 MTRR: Fixed MSR 0x250 0x0606060606060606
1766 20:04:29.019466 MTRR: Fixed MSR 0x258 0x0606060606060606
1767 20:04:29.022373 MTRR: Fixed MSR 0x259 0x0000000000000000
1768 20:04:29.025768 MTRR: Fixed MSR 0x268 0x0606060606060606
1769 20:04:29.029283 MTRR: Fixed MSR 0x269 0x0606060606060606
1770 20:04:29.035815 MTRR: Fixed MSR 0x26a 0x0606060606060606
1771 20:04:29.038807 MTRR: Fixed MSR 0x26b 0x0606060606060606
1772 20:04:29.042433 MTRR: Fixed MSR 0x26c 0x0606060606060606
1773 20:04:29.045919 MTRR: Fixed MSR 0x26d 0x0606060606060606
1774 20:04:29.049456 MTRR: Fixed MSR 0x26e 0x0606060606060606
1775 20:04:29.055849 MTRR: Fixed MSR 0x26f 0x0606060606060606
1776 20:04:29.059320 call enable_fixed_mtrr()
1777 20:04:29.062175 CPU physical address size: 39 bits
1778 20:04:29.065874 MTRR: default type WB/UC MTRR counts: 6/8.
1779 20:04:29.068906 MTRR: WB selected as default type.
1780 20:04:29.075929 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1781 20:04:29.082309 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1782 20:04:29.089187 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1783 20:04:29.095514 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1784 20:04:29.098675 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1785 20:04:29.105309 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1786 20:04:29.112726 MTRR: Fixed MSR 0x250 0x0606060606060606
1787 20:04:29.116113 MTRR: Fixed MSR 0x258 0x0606060606060606
1788 20:04:29.119214 MTRR: Fixed MSR 0x259 0x0000000000000000
1789 20:04:29.122621 MTRR: Fixed MSR 0x268 0x0606060606060606
1790 20:04:29.129258 MTRR: Fixed MSR 0x269 0x0606060606060606
1791 20:04:29.132896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1792 20:04:29.135932 MTRR: Fixed MSR 0x26b 0x0606060606060606
1793 20:04:29.139340 MTRR: Fixed MSR 0x26c 0x0606060606060606
1794 20:04:29.146006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1795 20:04:29.148908 MTRR: Fixed MSR 0x26e 0x0606060606060606
1796 20:04:29.152494 MTRR: Fixed MSR 0x26f 0x0606060606060606
1797 20:04:29.152637
1798 20:04:29.156057 MTRR check
1799 20:04:29.156150 Fixed MTRRs : Enabled
1800 20:04:29.159043 Variable MTRRs: Enabled
1801 20:04:29.159165
1802 20:04:29.162619 call enable_fixed_mtrr()
1803 20:04:29.166168 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1804 20:04:29.169090 CPU physical address size: 39 bits
1805 20:04:29.175555 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1806 20:04:29.179319 MTRR: Fixed MSR 0x250 0x0606060606060606
1807 20:04:29.185660 MTRR: Fixed MSR 0x250 0x0606060606060606
1808 20:04:29.188996 MTRR: Fixed MSR 0x258 0x0606060606060606
1809 20:04:29.192494 MTRR: Fixed MSR 0x259 0x0000000000000000
1810 20:04:29.195456 MTRR: Fixed MSR 0x268 0x0606060606060606
1811 20:04:29.202434 MTRR: Fixed MSR 0x269 0x0606060606060606
1812 20:04:29.205860 MTRR: Fixed MSR 0x26a 0x0606060606060606
1813 20:04:29.209146 MTRR: Fixed MSR 0x26b 0x0606060606060606
1814 20:04:29.212434 MTRR: Fixed MSR 0x26c 0x0606060606060606
1815 20:04:29.215253 MTRR: Fixed MSR 0x26d 0x0606060606060606
1816 20:04:29.222315 MTRR: Fixed MSR 0x26e 0x0606060606060606
1817 20:04:29.225256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1818 20:04:29.228580 MTRR: Fixed MSR 0x258 0x0606060606060606
1819 20:04:29.235413 MTRR: Fixed MSR 0x259 0x0000000000000000
1820 20:04:29.238836 MTRR: Fixed MSR 0x268 0x0606060606060606
1821 20:04:29.241795 MTRR: Fixed MSR 0x269 0x0606060606060606
1822 20:04:29.245476 MTRR: Fixed MSR 0x26a 0x0606060606060606
1823 20:04:29.248472 MTRR: Fixed MSR 0x26b 0x0606060606060606
1824 20:04:29.255385 MTRR: Fixed MSR 0x26c 0x0606060606060606
1825 20:04:29.258378 MTRR: Fixed MSR 0x26d 0x0606060606060606
1826 20:04:29.261883 MTRR: Fixed MSR 0x26e 0x0606060606060606
1827 20:04:29.265433 MTRR: Fixed MSR 0x26f 0x0606060606060606
1828 20:04:29.268364 call enable_fixed_mtrr()
1829 20:04:29.271639 call enable_fixed_mtrr()
1830 20:04:29.275218 CPU physical address size: 39 bits
1831 20:04:29.278629 CPU physical address size: 39 bits
1832 20:04:29.281991 MTRR: Fixed MSR 0x250 0x0606060606060606
1833 20:04:29.288494 MTRR: Fixed MSR 0x250 0x0606060606060606
1834 20:04:29.291662 MTRR: Fixed MSR 0x258 0x0606060606060606
1835 20:04:29.295530 MTRR: Fixed MSR 0x259 0x0000000000000000
1836 20:04:29.298340 MTRR: Fixed MSR 0x268 0x0606060606060606
1837 20:04:29.304956 MTRR: Fixed MSR 0x269 0x0606060606060606
1838 20:04:29.308370 MTRR: Fixed MSR 0x26a 0x0606060606060606
1839 20:04:29.311993 MTRR: Fixed MSR 0x26b 0x0606060606060606
1840 20:04:29.314876 MTRR: Fixed MSR 0x26c 0x0606060606060606
1841 20:04:29.318339 MTRR: Fixed MSR 0x26d 0x0606060606060606
1842 20:04:29.325208 MTRR: Fixed MSR 0x26e 0x0606060606060606
1843 20:04:29.328281 MTRR: Fixed MSR 0x26f 0x0606060606060606
1844 20:04:29.331453 MTRR: Fixed MSR 0x258 0x0606060606060606
1845 20:04:29.338437 MTRR: Fixed MSR 0x259 0x0000000000000000
1846 20:04:29.341639 MTRR: Fixed MSR 0x268 0x0606060606060606
1847 20:04:29.344703 MTRR: Fixed MSR 0x269 0x0606060606060606
1848 20:04:29.348150 MTRR: Fixed MSR 0x26a 0x0606060606060606
1849 20:04:29.351668 MTRR: Fixed MSR 0x26b 0x0606060606060606
1850 20:04:29.358202 MTRR: Fixed MSR 0x26c 0x0606060606060606
1851 20:04:29.361228 MTRR: Fixed MSR 0x26d 0x0606060606060606
1852 20:04:29.364908 MTRR: Fixed MSR 0x26e 0x0606060606060606
1853 20:04:29.367962 MTRR: Fixed MSR 0x26f 0x0606060606060606
1854 20:04:29.371376 call enable_fixed_mtrr()
1855 20:04:29.374457 call enable_fixed_mtrr()
1856 20:04:29.377847 CPU physical address size: 39 bits
1857 20:04:29.381384 CPU physical address size: 39 bits
1858 20:04:29.384980 MTRR: Fixed MSR 0x250 0x0606060606060606
1859 20:04:29.391287 MTRR: Fixed MSR 0x250 0x0606060606060606
1860 20:04:29.394561 MTRR: Fixed MSR 0x258 0x0606060606060606
1861 20:04:29.397945 MTRR: Fixed MSR 0x259 0x0000000000000000
1862 20:04:29.401335 MTRR: Fixed MSR 0x268 0x0606060606060606
1863 20:04:29.407828 MTRR: Fixed MSR 0x269 0x0606060606060606
1864 20:04:29.411217 MTRR: Fixed MSR 0x26a 0x0606060606060606
1865 20:04:29.414417 MTRR: Fixed MSR 0x26b 0x0606060606060606
1866 20:04:29.417948 MTRR: Fixed MSR 0x26c 0x0606060606060606
1867 20:04:29.424229 MTRR: Fixed MSR 0x26d 0x0606060606060606
1868 20:04:29.427821 MTRR: Fixed MSR 0x26e 0x0606060606060606
1869 20:04:29.431170 MTRR: Fixed MSR 0x26f 0x0606060606060606
1870 20:04:29.434491 MTRR: Fixed MSR 0x258 0x0606060606060606
1871 20:04:29.440822 MTRR: Fixed MSR 0x259 0x0000000000000000
1872 20:04:29.444181 MTRR: Fixed MSR 0x268 0x0606060606060606
1873 20:04:29.447630 MTRR: Fixed MSR 0x269 0x0606060606060606
1874 20:04:29.450896 MTRR: Fixed MSR 0x26a 0x0606060606060606
1875 20:04:29.457345 MTRR: Fixed MSR 0x26b 0x0606060606060606
1876 20:04:29.460774 MTRR: Fixed MSR 0x26c 0x0606060606060606
1877 20:04:29.464454 MTRR: Fixed MSR 0x26d 0x0606060606060606
1878 20:04:29.467380 MTRR: Fixed MSR 0x26e 0x0606060606060606
1879 20:04:29.470983 MTRR: Fixed MSR 0x26f 0x0606060606060606
1880 20:04:29.473960 call enable_fixed_mtrr()
1881 20:04:29.477574 call enable_fixed_mtrr()
1882 20:04:29.481164 CBFS @ c08000 size 3f8000
1883 20:04:29.487651 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1884 20:04:29.490489 CBFS: Locating 'fallback/payload'
1885 20:04:29.493981 CPU physical address size: 39 bits
1886 20:04:29.497353 CPU physical address size: 39 bits
1887 20:04:29.500573 CBFS: Found @ offset 1c96c0 size 3f798
1888 20:04:29.504126 Checking segment from ROM address 0xffdd16f8
1889 20:04:29.510695 Checking segment from ROM address 0xffdd1714
1890 20:04:29.514135 Loading segment from ROM address 0xffdd16f8
1891 20:04:29.517004 code (compression=0)
1892 20:04:29.523889 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1893 20:04:29.533824 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1894 20:04:29.537384 it's not compressed!
1895 20:04:29.628040 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1896 20:04:29.634580 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1897 20:04:29.637717 Loading segment from ROM address 0xffdd1714
1898 20:04:29.641290 Entry Point 0x30000000
1899 20:04:29.644226 Loaded segments
1900 20:04:29.649898 Finalizing chipset.
1901 20:04:29.653187 Finalizing SMM.
1902 20:04:29.656527 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1903 20:04:29.659698 mp_park_aps done after 0 msecs.
1904 20:04:29.666326 Jumping to boot code at 30000000(99b62000)
1905 20:04:29.673127 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1906 20:04:29.673250
1907 20:04:29.673373
1908 20:04:29.673476
1909 20:04:29.676160 Starting depthcharge on Helios...
1910 20:04:29.676244
1911 20:04:29.676640 end: 2.2.3 depthcharge-start (duration 00:00:02) [common]
1912 20:04:29.676765 start: 2.2.4 bootloader-commands (timeout 00:04:49) [common]
1913 20:04:29.676892 Setting prompt string to ['hatch:']
1914 20:04:29.677001 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:49)
1915 20:04:29.686397 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1916 20:04:29.686527
1917 20:04:29.692871 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1918 20:04:29.692957
1919 20:04:29.699939 board_setup: Info: eMMC controller not present; skipping
1920 20:04:29.700040
1921 20:04:29.702807 New NVMe Controller 0x30053ac0 @ 00:1d:00
1922 20:04:29.702918
1923 20:04:29.709754 board_setup: Info: SDHCI controller not present; skipping
1924 20:04:29.709858
1925 20:04:29.712945 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1926 20:04:29.716237
1927 20:04:29.716321 Wipe memory regions:
1928 20:04:29.716421
1929 20:04:29.719560 [0x00000000001000, 0x000000000a0000)
1930 20:04:29.719693
1931 20:04:29.722658 [0x00000000100000, 0x00000030000000)
1932 20:04:29.789287
1933 20:04:29.792154 [0x00000030657430, 0x00000099a2c000)
1934 20:04:29.939015
1935 20:04:29.941844 [0x00000100000000, 0x0000045e800000)
1936 20:04:31.398455
1937 20:04:31.398689 R8152: Initializing
1938 20:04:31.398822
1939 20:04:31.401515 Version 9 (ocp_data = 6010)
1940 20:04:31.406192
1941 20:04:31.406327 R8152: Done initializing
1942 20:04:31.406454
1943 20:04:31.409075 Adding net device
1944 20:04:31.892031
1945 20:04:31.892193 R8152: Initializing
1946 20:04:31.892270
1947 20:04:31.895539 Version 6 (ocp_data = 5c30)
1948 20:04:31.895648
1949 20:04:31.898343 R8152: Done initializing
1950 20:04:31.898438
1951 20:04:31.901828 net_add_device: Attemp to include the same device
1952 20:04:31.905631
1953 20:04:31.912482 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
1954 20:04:31.912571
1955 20:04:31.912666
1956 20:04:31.912759
1957 20:04:31.913073 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1959 20:04:32.013441 hatch: tftpboot 192.168.201.1 13751498/tftp-deploy-8i6w0s1a/kernel/bzImage 13751498/tftp-deploy-8i6w0s1a/kernel/cmdline 13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
1960 20:04:32.013621 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1961 20:04:32.013740 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:47)
1962 20:04:32.018162 tftpboot 192.168.201.1 13751498/tftp-deploy-8i6w0s1a/kernel/bzImploy-8i6w0s1a/kernel/cmdline 13751498/tftp-deploy-8i6w0s1a/ramdisk/ramdisk.cpio.gz
1963 20:04:32.018265
1964 20:04:32.018363 Waiting for link
1965 20:04:32.218769
1966 20:04:32.218991 done.
1967 20:04:32.219135
1968 20:04:32.219266 MAC: 00:24:32:50:1a:59
1969 20:04:32.219395
1970 20:04:32.222290 Sending DHCP discover... done.
1971 20:04:32.222431
1972 20:04:32.225152 Waiting for reply... done.
1973 20:04:32.225289
1974 20:04:32.228643 Sending DHCP request... done.
1975 20:04:32.228783
1976 20:04:32.231709 Waiting for reply... done.
1977 20:04:32.231844
1978 20:04:32.235240 My ip is 192.168.201.14
1979 20:04:32.235339
1980 20:04:32.238782 The DHCP server ip is 192.168.201.1
1981 20:04:32.238867
1982 20:04:32.244898 TFTP server IP predefined by user: 192.168.201.1
1983 20:04:32.244984
1984 20:04:32.251843 Bootfile predefined by user: 13751498/tftp-deploy-8i6w0s1a/kernel/bzImage
1985 20:04:32.251943
1986 20:04:32.254950 Sending tftp read request... done.
1987 20:04:32.255038
1988 20:04:32.258432 Waiting for the transfer...
1989 20:04:32.258595
1990 20:04:32.776564 00000000 ################################################################
1991 20:04:32.776785
1992 20:04:33.304802 00080000 ################################################################
1993 20:04:33.304963
1994 20:04:33.820903 00100000 ################################################################
1995 20:04:33.821054
1996 20:04:34.339932 00180000 ################################################################
1997 20:04:34.340087
1998 20:04:34.866777 00200000 ################################################################
1999 20:04:34.866994
2000 20:04:35.385074 00280000 ################################################################
2001 20:04:35.385283
2002 20:04:35.920776 00300000 ################################################################
2003 20:04:35.920931
2004 20:04:36.459832 00380000 ################################################################
2005 20:04:36.460058
2006 20:04:36.990718 00400000 ################################################################
2007 20:04:36.990925
2008 20:04:37.523752 00480000 ################################################################
2009 20:04:37.523964
2010 20:04:38.063360 00500000 ################################################################
2011 20:04:38.063518
2012 20:04:38.601659 00580000 ################################################################
2013 20:04:38.601903
2014 20:04:39.143596 00600000 ################################################################
2015 20:04:39.143815
2016 20:04:39.678619 00680000 ################################################################
2017 20:04:39.678792
2018 20:04:40.209945 00700000 ################################################################
2019 20:04:40.210108
2020 20:04:40.743072 00780000 ################################################################
2021 20:04:40.743249
2022 20:04:41.278412 00800000 ################################################################
2023 20:04:41.278633
2024 20:04:41.806411 00880000 ################################################################
2025 20:04:41.806594
2026 20:04:42.334465 00900000 ################################################################
2027 20:04:42.334627
2028 20:04:42.871030 00980000 ################################################################
2029 20:04:42.871221
2030 20:04:43.401752 00a00000 ################################################################
2031 20:04:43.401925
2032 20:04:43.940345 00a80000 ################################################################
2033 20:04:43.940544
2034 20:04:44.476790 00b00000 ################################################################
2035 20:04:44.476967
2036 20:04:45.033118 00b80000 ################################################################
2037 20:04:45.033343
2038 20:04:45.585870 00c00000 ################################################################
2039 20:04:45.586034
2040 20:04:46.129259 00c80000 ################################################################
2041 20:04:46.129450
2042 20:04:46.637750 00d00000 ############################################################ done.
2043 20:04:46.637907
2044 20:04:46.641032 The bootfile was 14122896 bytes long.
2045 20:04:46.641172
2046 20:04:46.644459 Sending tftp read request... done.
2047 20:04:46.644551
2048 20:04:46.647683 Waiting for the transfer...
2049 20:04:46.647780
2050 20:04:47.207721 00000000 ################################################################
2051 20:04:47.207882
2052 20:04:47.762561 00080000 ################################################################
2053 20:04:47.762724
2054 20:04:48.311021 00100000 ################################################################
2055 20:04:48.311234
2056 20:04:48.871132 00180000 ################################################################
2057 20:04:48.871300
2058 20:04:49.447951 00200000 ################################################################
2059 20:04:49.448113
2060 20:04:50.010638 00280000 ################################################################
2061 20:04:50.010798
2062 20:04:50.563162 00300000 ################################################################
2063 20:04:50.563325
2064 20:04:51.125280 00380000 ################################################################
2065 20:04:51.125516
2066 20:04:51.667984 00400000 ################################################################
2067 20:04:51.668171
2068 20:04:52.206696 00480000 ################################################################
2069 20:04:52.206846
2070 20:04:52.752680 00500000 ################################################################
2071 20:04:52.752836
2072 20:04:53.285410 00580000 ################################################################
2073 20:04:53.285575
2074 20:04:54.798429 00600000 ################################################################
2075 20:04:54.798679
2076 20:04:54.798824 00680000 ################################################################
2077 20:04:54.798957
2078 20:04:54.913279 00700000 ################################################################
2079 20:04:54.913470
2080 20:04:55.468547 00780000 ################################################################
2081 20:04:55.468766
2082 20:04:56.034656 00800000 ################################################################
2083 20:04:56.034815
2084 20:04:56.270347 00880000 ########################### done.
2085 20:04:56.270576
2086 20:04:56.273992 Sending tftp read request... done.
2087 20:04:56.274133
2088 20:04:56.277480 Waiting for the transfer...
2089 20:04:56.277598
2090 20:04:56.277702 00000000 # done.
2091 20:04:56.277804
2092 20:04:56.287259 Command line loaded dynamically from TFTP file: 13751498/tftp-deploy-8i6w0s1a/kernel/cmdline
2093 20:04:56.287354
2094 20:04:56.306869 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2095 20:04:56.306973
2096 20:04:56.310385 ec_init(0): CrosEC protocol v3 supported (256, 256)
2097 20:04:56.318172
2098 20:04:56.321604 Shutting down all USB controllers.
2099 20:04:56.321696
2100 20:04:56.321768 Removing current net device
2101 20:04:56.325500
2102 20:04:56.325592 Finalizing coreboot
2103 20:04:56.325665
2104 20:04:56.332236 Exiting depthcharge with code 4 at timestamp: 34041844
2105 20:04:56.332385
2106 20:04:56.332507
2107 20:04:56.332629 Starting kernel ...
2108 20:04:56.332751
2109 20:04:56.332872
2110 20:04:56.333534 end: 2.2.4 bootloader-commands (duration 00:00:27) [common]
2111 20:04:56.333709 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2112 20:04:56.333854 Setting prompt string to ['Linux version [0-9]']
2113 20:04:56.333994 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2114 20:04:56.334133 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2116 20:09:18.333957 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2118 20:09:18.334189 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2120 20:09:18.334371 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2123 20:09:18.334646 end: 2 depthcharge-action (duration 00:05:00) [common]
2125 20:09:18.334893 Cleaning after the job
2126 20:09:18.334991 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/ramdisk
2127 20:09:18.336155 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/kernel
2128 20:09:18.337932 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13751498/tftp-deploy-8i6w0s1a/modules
2129 20:09:18.338513 start: 4.1 power-off (timeout 00:00:30) [common]
2130 20:09:18.338693 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2131 20:09:19.140817 >> Command sent successfully.
2132 20:09:19.143409 Returned 0 in 0 seconds
2133 20:09:19.243776 end: 4.1 power-off (duration 00:00:01) [common]
2135 20:09:19.244163 start: 4.2 read-feedback (timeout 00:09:59) [common]
2136 20:09:19.244503 Listened to connection for namespace 'common' for up to 1s
2138 20:09:19.244972 Listened to connection for namespace 'common' for up to 1s
2139 20:09:20.245391 Finalising connection for namespace 'common'
2140 20:09:20.245620 Disconnecting from shell: Finalise
2141 20:09:20.245748
2142 20:09:20.346133 end: 4.2 read-feedback (duration 00:00:01) [common]
2143 20:09:20.346310 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13751498
2144 20:09:20.362126 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13751498
2145 20:09:20.362304 JobError: Your job cannot terminate cleanly.