Boot log: acer-cp514-2h-1130g7-volteer

    1 09:15:07.821906  lava-dispatcher, installed at version: 2024.03
    2 09:15:07.822119  start: 0 validate
    3 09:15:07.822262  Start time: 2024-05-13 09:15:07.822254+00:00 (UTC)
    4 09:15:07.822394  Using caching service: 'http://localhost/cache/?uri=%s'
    5 09:15:07.822533  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
    6 09:15:08.086753  Using caching service: 'http://localhost/cache/?uri=%s'
    7 09:15:08.086996  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
    8 09:15:08.346336  Using caching service: 'http://localhost/cache/?uri=%s'
    9 09:15:08.346559  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
   10 09:15:14.171488  validate duration: 6.35
   12 09:15:14.171782  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 09:15:14.171898  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 09:15:14.172037  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 09:15:14.172213  Not decompressing ramdisk as can be used compressed.
   16 09:15:14.172354  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
   17 09:15:14.172462  saving as /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/ramdisk/rootfs.cpio.gz
   18 09:15:14.172555  total size: 8417901 (8 MB)
   19 09:15:14.820072  progress   0 % (0 MB)
   20 09:15:14.822555  progress   5 % (0 MB)
   21 09:15:14.825039  progress  10 % (0 MB)
   22 09:15:14.827518  progress  15 % (1 MB)
   23 09:15:14.830059  progress  20 % (1 MB)
   24 09:15:14.832653  progress  25 % (2 MB)
   25 09:15:14.835369  progress  30 % (2 MB)
   26 09:15:14.837707  progress  35 % (2 MB)
   27 09:15:14.840214  progress  40 % (3 MB)
   28 09:15:14.842765  progress  45 % (3 MB)
   29 09:15:14.845289  progress  50 % (4 MB)
   30 09:15:14.847841  progress  55 % (4 MB)
   31 09:15:14.850345  progress  60 % (4 MB)
   32 09:15:14.852594  progress  65 % (5 MB)
   33 09:15:14.855030  progress  70 % (5 MB)
   34 09:15:14.857457  progress  75 % (6 MB)
   35 09:15:14.859875  progress  80 % (6 MB)
   36 09:15:14.862343  progress  85 % (6 MB)
   37 09:15:14.864873  progress  90 % (7 MB)
   38 09:15:14.867297  progress  95 % (7 MB)
   39 09:15:14.869546  progress 100 % (8 MB)
   40 09:15:14.869818  8 MB downloaded in 0.70 s (11.51 MB/s)
   41 09:15:14.870053  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 09:15:14.870353  end: 1.1 download-retry (duration 00:00:01) [common]
   44 09:15:14.870447  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 09:15:14.870541  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 09:15:14.870687  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip87-rt49/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
   47 09:15:14.870763  saving as /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/kernel/bzImage
   48 09:15:14.870848  total size: 14122896 (13 MB)
   49 09:15:14.870915  No compression specified
   50 09:15:14.872122  progress   0 % (0 MB)
   51 09:15:14.876369  progress   5 % (0 MB)
   52 09:15:14.880703  progress  10 % (1 MB)
   53 09:15:14.884717  progress  15 % (2 MB)
   54 09:15:14.888875  progress  20 % (2 MB)
   55 09:15:14.892814  progress  25 % (3 MB)
   56 09:15:14.896977  progress  30 % (4 MB)
   57 09:15:14.900972  progress  35 % (4 MB)
   58 09:15:14.905118  progress  40 % (5 MB)
   59 09:15:14.909097  progress  45 % (6 MB)
   60 09:15:14.913160  progress  50 % (6 MB)
   61 09:15:14.917246  progress  55 % (7 MB)
   62 09:15:14.921303  progress  60 % (8 MB)
   63 09:15:14.925486  progress  65 % (8 MB)
   64 09:15:14.929410  progress  70 % (9 MB)
   65 09:15:14.933541  progress  75 % (10 MB)
   66 09:15:14.937358  progress  80 % (10 MB)
   67 09:15:14.941339  progress  85 % (11 MB)
   68 09:15:14.945160  progress  90 % (12 MB)
   69 09:15:14.949219  progress  95 % (12 MB)
   70 09:15:14.953228  progress 100 % (13 MB)
   71 09:15:14.953542  13 MB downloaded in 0.08 s (162.88 MB/s)
   72 09:15:14.953704  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 09:15:14.953960  end: 1.2 download-retry (duration 00:00:00) [common]
   75 09:15:14.954054  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 09:15:14.954151  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 09:15:14.954300  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip87-rt49/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
   78 09:15:14.954374  saving as /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/modules/modules.tar
   79 09:15:14.954439  total size: 486540 (0 MB)
   80 09:15:14.954506  Using unxz to decompress xz
   81 09:15:14.959023  progress   6 % (0 MB)
   82 09:15:14.959481  progress  13 % (0 MB)
   83 09:15:14.959747  progress  20 % (0 MB)
   84 09:15:14.961549  progress  26 % (0 MB)
   85 09:15:14.963694  progress  33 % (0 MB)
   86 09:15:14.965862  progress  40 % (0 MB)
   87 09:15:14.968092  progress  47 % (0 MB)
   88 09:15:14.969969  progress  53 % (0 MB)
   89 09:15:14.971967  progress  60 % (0 MB)
   90 09:15:14.974154  progress  67 % (0 MB)
   91 09:15:14.976063  progress  74 % (0 MB)
   92 09:15:14.978273  progress  80 % (0 MB)
   93 09:15:14.980266  progress  87 % (0 MB)
   94 09:15:14.982547  progress  94 % (0 MB)
   95 09:15:14.984546  progress 100 % (0 MB)
   96 09:15:14.991261  0 MB downloaded in 0.04 s (12.60 MB/s)
   97 09:15:14.991568  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 09:15:14.991878  end: 1.3 download-retry (duration 00:00:00) [common]
  100 09:15:14.992014  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 09:15:14.992155  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 09:15:14.992289  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 09:15:14.992420  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 09:15:14.992702  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g
  105 09:15:14.992846  makedir: /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin
  106 09:15:14.992964  makedir: /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/tests
  107 09:15:14.993070  makedir: /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/results
  108 09:15:14.993197  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-add-keys
  109 09:15:14.993356  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-add-sources
  110 09:15:14.993528  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-background-process-start
  111 09:15:14.993673  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-background-process-stop
  112 09:15:14.993811  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-common-functions
  113 09:15:14.993949  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-echo-ipv4
  114 09:15:14.994086  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-install-packages
  115 09:15:14.994239  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-installed-packages
  116 09:15:14.994374  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-os-build
  117 09:15:14.994508  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-probe-channel
  118 09:15:14.994641  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-probe-ip
  119 09:15:14.994775  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-target-ip
  120 09:15:14.994907  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-target-mac
  121 09:15:14.995039  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-target-storage
  122 09:15:14.995177  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-case
  123 09:15:14.995322  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-event
  124 09:15:14.995457  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-feedback
  125 09:15:14.995590  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-raise
  126 09:15:14.995724  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-reference
  127 09:15:14.995860  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-runner
  128 09:15:14.995995  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-set
  129 09:15:14.996135  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-test-shell
  130 09:15:14.996303  Updating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-install-packages (oe)
  131 09:15:14.996503  Updating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/bin/lava-installed-packages (oe)
  132 09:15:14.996666  Creating /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/environment
  133 09:15:14.996805  LAVA metadata
  134 09:15:14.996914  - LAVA_JOB_ID=13757372
  135 09:15:14.997016  - LAVA_DISPATCHER_IP=192.168.201.1
  136 09:15:14.997160  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 09:15:14.997266  skipped lava-vland-overlay
  138 09:15:14.997381  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 09:15:14.997531  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 09:15:14.997604  skipped lava-multinode-overlay
  141 09:15:14.997684  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 09:15:14.997776  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 09:15:14.997866  Loading test definitions
  144 09:15:14.997970  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 09:15:14.998055  Using /lava-13757372 at stage 0
  146 09:15:14.998429  uuid=13757372_1.4.2.3.1 testdef=None
  147 09:15:14.998526  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 09:15:14.998631  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 09:15:14.999247  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 09:15:14.999510  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 09:15:15.000241  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 09:15:15.000585  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 09:15:15.001408  runner path: /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/0/tests/0_dmesg test_uuid 13757372_1.4.2.3.1
  156 09:15:15.001631  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 09:15:15.002016  Creating lava-test-runner.conf files
  159 09:15:15.002116  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13757372/lava-overlay-g6oie04g/lava-13757372/0 for stage 0
  160 09:15:15.002268  - 0_dmesg
  161 09:15:15.002415  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  162 09:15:15.002542  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  163 09:15:15.011296  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  164 09:15:15.011449  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  165 09:15:15.011579  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  166 09:15:15.011720  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  167 09:15:15.011853  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  168 09:15:15.282397  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  169 09:15:15.282810  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  170 09:15:15.282925  extracting modules file /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13757372/extract-overlay-ramdisk-kbd87z8t/ramdisk
  171 09:15:15.301007  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  172 09:15:15.301168  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  173 09:15:15.301273  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757372/compress-overlay-7u9emm3o/overlay-1.4.2.4.tar.gz to ramdisk
  174 09:15:15.301350  [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757372/compress-overlay-7u9emm3o/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13757372/extract-overlay-ramdisk-kbd87z8t/ramdisk
  175 09:15:15.308823  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  176 09:15:15.308961  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  177 09:15:15.309062  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  178 09:15:15.309162  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  179 09:15:15.309261  Building ramdisk /var/lib/lava/dispatcher/tmp/13757372/extract-overlay-ramdisk-kbd87z8t/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13757372/extract-overlay-ramdisk-kbd87z8t/ramdisk
  180 09:15:15.447829  >> 51692 blocks

  181 09:15:16.444553  rename /var/lib/lava/dispatcher/tmp/13757372/extract-overlay-ramdisk-kbd87z8t/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz
  182 09:15:16.445034  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  183 09:15:16.445174  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  184 09:15:16.445281  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  185 09:15:16.445391  No mkimage arch provided, not using FIT.
  186 09:15:16.445495  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  187 09:15:16.445584  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  188 09:15:16.445726  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  189 09:15:16.445826  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  190 09:15:16.445911  No LXC device requested
  191 09:15:16.445995  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  192 09:15:16.446092  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  193 09:15:16.446183  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  194 09:15:16.446264  Checking files for TFTP limit of 4294967296 bytes.
  195 09:15:16.446711  end: 1 tftp-deploy (duration 00:00:02) [common]
  196 09:15:16.446827  start: 2 depthcharge-action (timeout 00:05:00) [common]
  197 09:15:16.446935  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  198 09:15:16.447070  substitutions:
  199 09:15:16.447149  - {DTB}: None
  200 09:15:16.447218  - {INITRD}: 13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz
  201 09:15:16.447282  - {KERNEL}: 13757372/tftp-deploy-1hji3pvb/kernel/bzImage
  202 09:15:16.447344  - {LAVA_MAC}: None
  203 09:15:16.447405  - {PRESEED_CONFIG}: None
  204 09:15:16.447465  - {PRESEED_LOCAL}: None
  205 09:15:16.447524  - {RAMDISK}: 13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz
  206 09:15:16.447584  - {ROOT_PART}: None
  207 09:15:16.447646  - {ROOT}: None
  208 09:15:16.447719  - {SERVER_IP}: 192.168.201.1
  209 09:15:16.447778  - {TEE}: None
  210 09:15:16.447837  Parsed boot commands:
  211 09:15:16.447895  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  212 09:15:16.448091  Parsed boot commands: tftpboot 192.168.201.1 13757372/tftp-deploy-1hji3pvb/kernel/bzImage 13757372/tftp-deploy-1hji3pvb/kernel/cmdline 13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz
  213 09:15:16.448188  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  214 09:15:16.448279  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  215 09:15:16.448404  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  216 09:15:16.448501  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  217 09:15:16.448580  Not connected, no need to disconnect.
  218 09:15:16.448662  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  219 09:15:16.448775  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  220 09:15:16.448849  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh acer-cp514-2h-1130g7-volteer-cbg-4'
  221 09:15:16.452739  Setting prompt string to ['lava-test: # ']
  222 09:15:16.453295  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  223 09:15:16.453404  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  224 09:15:16.453522  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  225 09:15:16.453622  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  226 09:15:16.453876  Calling: ['/usr/local/bin/chromebook-reboot.sh', 'acer-cp514-2h-1130g7-volteer-cbg-4']
  227 09:15:25.135922  Returned 0 in 8 seconds
  228 09:15:25.236670  end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
  230 09:15:25.237016  end: 2.2.2 reset-device (duration 00:00:09) [common]
  231 09:15:25.237125  start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
  232 09:15:25.237220  Setting prompt string to 'Starting depthcharge on Voema...'
  233 09:15:25.237297  Changing prompt to 'Starting depthcharge on Voema...'
  234 09:15:25.237372  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  235 09:15:25.237959  [Enter `^Ec?' for help]

  236 09:15:25.238108  

  237 09:15:25.238238  

  238 09:15:25.238357  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...

  239 09:15:25.238464  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz

  240 09:15:25.238564  CPU: ID 806c1, Tigerlake B0, ucode: 00000086

  241 09:15:25.238646  CPU: AES supported, TXT NOT supported, VT supported

  242 09:15:25.238713  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2

  243 09:15:25.238776  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU

  244 09:15:25.238842  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2

  245 09:15:25.238903  VBOOT: Loading verstage.

  246 09:15:25.238964  FMAP: Found "FLASH" version 1.1 at 0x1804000.

  247 09:15:25.239025  FMAP: base = 0x0 size = 0x2000000 #areas = 32

  248 09:15:25.239086  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  249 09:15:25.239147  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes

  250 09:15:25.239210  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984

  251 09:15:25.239271  

  252 09:15:25.239336  

  253 09:15:25.239396  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...

  254 09:15:25.239464  Probing TPM: . done!

  255 09:15:25.239525  TPM ready after 0 ms

  256 09:15:25.239585  Connected to device vid:did:rid of 1ae0:0028:00

  257 09:15:25.239646  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  258 09:15:25.239711  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001

  259 09:15:25.239772  Initialized TPM device CR50 revision 0

  260 09:15:25.239832  tlcl_send_startup: Startup return code is 0

  261 09:15:25.239892  TPM: setup succeeded

  262 09:15:25.239953  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  263 09:15:25.240015  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  264 09:15:25.240075  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  265 09:15:25.240136  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  266 09:15:25.240196  Chrome EC: UHEPI supported

  267 09:15:25.240255  Phase 1

  268 09:15:25.240315  FMAP: area GBB found @ 1805000 (458752 bytes)

  269 09:15:25.240375  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  270 09:15:25.240436  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  271 09:15:25.240496  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  272 09:15:25.240556  VB2:vb2_check_recovery() Recovery was requested manually

  273 09:15:25.240616  VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x7

  274 09:15:25.240676  Recovery requested (1009000e)

  275 09:15:25.240736  TPM: Extending digest for VBOOT: boot mode into PCR 0

  276 09:15:25.240797  tlcl_extend: response is 0

  277 09:15:25.240857  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  278 09:15:25.240918  tlcl_extend: response is 0

  279 09:15:25.240978  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  280 09:15:25.241038  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638

  281 09:15:25.241099  BS: verstage times (exec / console): total (unknown) / 148 ms

  282 09:15:25.241159  

  283 09:15:25.241218  

  284 09:15:25.241277  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...

  285 09:15:25.241338  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  286 09:15:25.241399  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  287 09:15:25.241472  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000

  288 09:15:25.241542  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000

  289 09:15:25.241603  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000

  290 09:15:25.241663  gpe0_sts[3]: 00080000 gpe0_en[3]: 00092000

  291 09:15:25.241723  TCO_STS:   0000 0000

  292 09:15:25.241783  GEN_PMCON: d0015038 00002200

  293 09:15:25.241844  GBLRST_CAUSE: 00000000 00000000

  294 09:15:25.241903  HPR_CAUSE0: 00000000

  295 09:15:25.241963  prev_sleep_state 5

  296 09:15:25.242022  Boot Count incremented to 35133

  297 09:15:25.242083  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  298 09:15:25.242143  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  299 09:15:25.242204  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  300 09:15:25.242264  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c

  301 09:15:25.242324  Chrome EC: UHEPI supported

  302 09:15:25.242383  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  303 09:15:25.242444  Probing TPM:  done!

  304 09:15:25.242504  Connected to device vid:did:rid of 1ae0:0028:00

  305 09:15:25.242564  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  306 09:15:25.242625  Initialized TPM device CR50 revision 0

  307 09:15:25.242684  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0

  308 09:15:25.242745  MRC: Hash idx 0x100b comparison successful.

  309 09:15:25.242804  MRC cache found, size faa8

  310 09:15:25.242863  bootmode is set to: 2

  311 09:15:25.242923  SPD index = 0

  312 09:15:25.242983  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c

  313 09:15:25.243044  SPD: module type is LPDDR4X

  314 09:15:25.243104  SPD: module part number is MT53E512M64D4NW-046

  315 09:15:25.243164  SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb

  316 09:15:25.243225  SPD: device width 16 bits, bus width 16 bits

  317 09:15:25.243284  SPD: module size is 1024 MB (per channel)

  318 09:15:25.243344  CBMEM:

  319 09:15:25.243403  IMD: root @ 0x76fff000 254 entries.

  320 09:15:25.243462  IMD: root @ 0x76ffec00 62 entries.

  321 09:15:25.243521  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

  322 09:15:25.243780  FMAP: area RW_VPD found @ f35000 (8192 bytes)

  323 09:15:25.243896  External stage cache:

  324 09:15:25.244016  IMD: root @ 0x7b3ff000 254 entries.

  325 09:15:25.244136  IMD: root @ 0x7b3fec00 62 entries.

  326 09:15:25.244255  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)

  327 09:15:25.244368  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

  328 09:15:25.244472  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

  329 09:15:25.244568  MRC: 'RECOVERY_MRC_CACHE' does not need update.

  330 09:15:25.244662  cse_lite: Skip switching to RW in the recovery path

  331 09:15:25.244755  8 DIMMs found

  332 09:15:25.244850  SMM Memory Map

  333 09:15:25.244943  SMRAM       : 0x7b000000 0x800000

  334 09:15:25.245036   Subregion 0: 0x7b000000 0x200000

  335 09:15:25.245129   Subregion 1: 0x7b200000 0x200000

  336 09:15:25.245222   Subregion 2: 0x7b400000 0x400000

  337 09:15:25.245314  top_of_ram = 0x77000000

  338 09:15:25.245407  MTRR Range: Start=76000000 End=77000000 (Size 1000000)

  339 09:15:25.245491  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)

  340 09:15:25.245553  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)

  341 09:15:25.245620  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  342 09:15:25.245683  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c

  343 09:15:25.245763  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)

  344 09:15:25.245826  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500

  345 09:15:25.245887  Processing 211 relocs. Offset value of 0x74c0b000

  346 09:15:25.245947  BS: romstage times (exec / console): total (unknown) / 277 ms

  347 09:15:25.246008  

  348 09:15:25.246067  

  349 09:15:25.246127  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...

  350 09:15:25.246188  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  351 09:15:25.246248  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  352 09:15:25.246309  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  353 09:15:25.246369  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec

  354 09:15:25.246429  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)

  355 09:15:25.246490  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270

  356 09:15:25.246550  Processing 5008 relocs. Offset value of 0x75d98000

  357 09:15:25.246610  BS: postcar times (exec / console): total (unknown) / 59 ms

  358 09:15:25.246671  

  359 09:15:25.246730  

  360 09:15:25.246789  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...

  361 09:15:25.246849  Normal boot

  362 09:15:25.246912  FW_CONFIG value is 0x804c02

  363 09:15:25.246972  PCI: 00:07.0 disabled by fw_config

  364 09:15:25.247031  PCI: 00:07.1 disabled by fw_config

  365 09:15:25.247091  PCI: 00:0d.2 disabled by fw_config

  366 09:15:25.247150  PCI: 00:1c.7 disabled by fw_config

  367 09:15:25.247209  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  368 09:15:25.247269  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  369 09:15:25.247329  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

  370 09:15:25.247389  GENERIC: 0.0 disabled by fw_config

  371 09:15:25.247448  GENERIC: 1.0 disabled by fw_config

  372 09:15:25.247508  fw_config match found: DB_USB=USB3_ACTIVE

  373 09:15:25.247568  fw_config match found: DB_USB=USB3_ACTIVE

  374 09:15:25.247628  fw_config match found: DB_USB=USB3_ACTIVE

  375 09:15:25.247687  fw_config match found: DB_USB=USB3_ACTIVE

  376 09:15:25.247746  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)

  377 09:15:25.247807  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000

  378 09:15:25.247867  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000

  379 09:15:25.247926  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c

  380 09:15:25.247987  microcode: sig=0x806c1 pf=0x80 revision=0x86

  381 09:15:25.248046  microcode: Update skipped, already up-to-date

  382 09:15:25.248106  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c

  383 09:15:25.248166  Detected 4 core, 8 thread CPU.

  384 09:15:25.248226  Setting up SMI for CPU

  385 09:15:25.248285  IED base = 0x7b400000

  386 09:15:25.248344  IED size = 0x00400000

  387 09:15:25.248403  Will perform SMM setup.

  388 09:15:25.248462  CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.

  389 09:15:25.248523  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170

  390 09:15:25.248587  Processing 16 relocs. Offset value of 0x00030000

  391 09:15:25.248652  Attempting to start 7 APs

  392 09:15:25.248717  Waiting for 10ms after sending INIT.

  393 09:15:25.248778  Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.

  394 09:15:25.248837  done.

  395 09:15:25.248897  AP: slot 6 apic_id 2.

  396 09:15:25.248956  AP: slot 2 apic_id 3.

  397 09:15:25.249016  AP: slot 5 apic_id 4.

  398 09:15:25.249075  AP: slot 3 apic_id 7.

  399 09:15:25.249134  AP: slot 7 apic_id 6.

  400 09:15:25.249193  Waiting for 2nd SIPI to complete...done.

  401 09:15:25.249253  AP: slot 4 apic_id 5.

  402 09:15:25.249312  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8

  403 09:15:25.249372  Processing 13 relocs. Offset value of 0x00038000

  404 09:15:25.249439  Unable to locate Global NVS

  405 09:15:25.249501  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)

  406 09:15:25.249562  Installing permanent SMM handler to 0x7b000000

  407 09:15:25.249623  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908

  408 09:15:25.249684  Processing 794 relocs. Offset value of 0x7b010000

  409 09:15:25.249939  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8

  410 09:15:25.250070  Processing 13 relocs. Offset value of 0x7b008000

  411 09:15:25.250191  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd

  412 09:15:25.250311  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd

  413 09:15:25.250432  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd

  414 09:15:25.250550  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd

  415 09:15:25.250646  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd

  416 09:15:25.250740  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd

  417 09:15:25.250833  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd

  418 09:15:25.250926  Unable to locate Global NVS

  419 09:15:25.251019  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)

  420 09:15:25.251113  Clearing SMI status registers

  421 09:15:25.251205  SMI_STS: GPE0 PM1 

  422 09:15:25.251297  PM1_STS: PWRBTN 

  423 09:15:25.251388  GPE0 STD STS: 

  424 09:15:25.251481  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0

  425 09:15:25.251574  In relocation handler: CPU 0

  426 09:15:25.251675  New SMBASE=0x7b000000 IEDBASE=0x7b400000

  427 09:15:25.251786  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  428 09:15:25.251882  Relocation complete.

  429 09:15:25.251977  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1

  430 09:15:25.252071  In relocation handler: CPU 1

  431 09:15:25.252164  New SMBASE=0x7afffc00 IEDBASE=0x7b400000

  432 09:15:25.252257  Relocation complete.

  433 09:15:25.252351  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3

  434 09:15:25.252444  In relocation handler: CPU 3

  435 09:15:25.252537  New SMBASE=0x7afff400 IEDBASE=0x7b400000

  436 09:15:25.252630  Relocation complete.

  437 09:15:25.252724  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7

  438 09:15:25.252817  In relocation handler: CPU 7

  439 09:15:25.252909  New SMBASE=0x7affe400 IEDBASE=0x7b400000

  440 09:15:25.253003  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  441 09:15:25.253095  Relocation complete.

  442 09:15:25.253189  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2

  443 09:15:25.253281  In relocation handler: CPU 2

  444 09:15:25.253374  New SMBASE=0x7afff800 IEDBASE=0x7b400000

  445 09:15:25.253467  Relocation complete.

  446 09:15:25.253534  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6

  447 09:15:25.253596  In relocation handler: CPU 6

  448 09:15:25.253656  New SMBASE=0x7affe800 IEDBASE=0x7b400000

  449 09:15:25.253717  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  450 09:15:25.253776  Relocation complete.

  451 09:15:25.253835  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4

  452 09:15:25.253895  In relocation handler: CPU 4

  453 09:15:25.253955  New SMBASE=0x7afff000 IEDBASE=0x7b400000

  454 09:15:25.254016  Relocation complete.

  455 09:15:25.254075  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5

  456 09:15:25.254134  In relocation handler: CPU 5

  457 09:15:25.254194  New SMBASE=0x7affec00 IEDBASE=0x7b400000

  458 09:15:25.254254  Writing SMRR. base = 0x7b000006, mask=0xff800c00

  459 09:15:25.254313  Relocation complete.

  460 09:15:25.254373  Initializing CPU #0

  461 09:15:25.254432  CPU: vendor Intel device 806c1

  462 09:15:25.254492  CPU: family 06, model 8c, stepping 01

  463 09:15:25.254551  Clearing out pending MCEs

  464 09:15:25.254611  Setting up local APIC...

  465 09:15:25.254670   apic_id: 0x00 done.

  466 09:15:25.254729  Turbo is available but hidden

  467 09:15:25.254789  Turbo is available and visible

  468 09:15:25.254866  microcode: Update skipped, already up-to-date

  469 09:15:25.254932  CPU #0 initialized

  470 09:15:25.254992  Initializing CPU #3

  471 09:15:25.255051  Initializing CPU #7

  472 09:15:25.255110  CPU: vendor Intel device 806c1

  473 09:15:25.255170  CPU: family 06, model 8c, stepping 01

  474 09:15:25.255229  CPU: vendor Intel device 806c1

  475 09:15:25.255288  CPU: family 06, model 8c, stepping 01

  476 09:15:25.255347  Clearing out pending MCEs

  477 09:15:25.255406  Clearing out pending MCEs

  478 09:15:25.255466  Setting up local APIC...

  479 09:15:25.255524  Initializing CPU #2

  480 09:15:25.255584  Initializing CPU #6

  481 09:15:25.255643  CPU: vendor Intel device 806c1

  482 09:15:25.255702  CPU: family 06, model 8c, stepping 01

  483 09:15:25.255761  Setting up local APIC...

  484 09:15:25.255821  Clearing out pending MCEs

  485 09:15:25.255880   apic_id: 0x07 done.

  486 09:15:25.255939  CPU: vendor Intel device 806c1

  487 09:15:25.255999  CPU: family 06, model 8c, stepping 01

  488 09:15:25.256059  Setting up local APIC...

  489 09:15:25.256118  Initializing CPU #4

  490 09:15:25.256176  Initializing CPU #5

  491 09:15:25.256236  CPU: vendor Intel device 806c1

  492 09:15:25.256295  CPU: family 06, model 8c, stepping 01

  493 09:15:25.256355  CPU: vendor Intel device 806c1

  494 09:15:25.256415  CPU: family 06, model 8c, stepping 01

  495 09:15:25.256474  Clearing out pending MCEs

  496 09:15:25.256533  Clearing out pending MCEs

  497 09:15:25.256592  Setting up local APIC...

  498 09:15:25.256651  Initializing CPU #1

  499 09:15:25.256709  Setting up local APIC...

  500 09:15:25.256769  Clearing out pending MCEs

  501 09:15:25.256827   apic_id: 0x06 done.

  502 09:15:25.256886  microcode: Update skipped, already up-to-date

  503 09:15:25.256945  microcode: Update skipped, already up-to-date

  504 09:15:25.257005  CPU #3 initialized

  505 09:15:25.257063  CPU #7 initialized

  506 09:15:25.257123   apic_id: 0x04 done.

  507 09:15:25.257181   apic_id: 0x05 done.

  508 09:15:25.257240  microcode: Update skipped, already up-to-date

  509 09:15:25.257299  microcode: Update skipped, already up-to-date

  510 09:15:25.257358  CPU #5 initialized

  511 09:15:25.257417  CPU #4 initialized

  512 09:15:25.257487  Setting up local APIC...

  513 09:15:25.257548  CPU: vendor Intel device 806c1

  514 09:15:25.257607  CPU: family 06, model 8c, stepping 01

  515 09:15:25.257666   apic_id: 0x02 done.

  516 09:15:25.257726   apic_id: 0x03 done.

  517 09:15:25.257785  microcode: Update skipped, already up-to-date

  518 09:15:25.257845  microcode: Update skipped, already up-to-date

  519 09:15:25.257904  CPU #6 initialized

  520 09:15:25.257964  CPU #2 initialized

  521 09:15:25.258023  Clearing out pending MCEs

  522 09:15:25.258082  Setting up local APIC...

  523 09:15:25.258141   apic_id: 0x01 done.

  524 09:15:25.258407  microcode: Update skipped, already up-to-date

  525 09:15:25.258494  CPU #1 initialized

  526 09:15:25.258562  bsp_do_flight_plan done after 459 msecs.

  527 09:15:25.258624  CPU: frequency set to 4000 MHz

  528 09:15:25.258685  Enabling SMIs.

  529 09:15:25.258745  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 319 ms

  530 09:15:25.258822  SATAXPCIE1 indicates PCIe NVMe is present

  531 09:15:25.258892  Probing TPM:  done!

  532 09:15:25.258953  Connected to device vid:did:rid of 1ae0:0028:00

  533 09:15:25.259014  Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  534 09:15:25.259075  Initialized TPM device CR50 revision 0

  535 09:15:25.259135  Enabling S0i3.4

  536 09:15:25.259195  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc

  537 09:15:25.259256  Found a VBT of 8704 bytes after decompression

  538 09:15:25.259317  cse_lite: CSE RO boot. HybridStorageMode disabled

  539 09:15:25.259380  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called

  540 09:15:25.259441  FSPS returned 0

  541 09:15:25.259501  Executing Phase 1 of FspMultiPhaseSiInit

  542 09:15:25.259562  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called

  543 09:15:25.259622  port C0 DISC req: usage 1 usb3 1 usb2 5

  544 09:15:25.259682  Raw Buffer output 0 00000511

  545 09:15:25.259742  Raw Buffer output 1 00000000

  546 09:15:25.259801  pmc_send_ipc_cmd succeeded

  547 09:15:25.259861  port C1 DISC req: usage 1 usb3 2 usb2 3

  548 09:15:25.259920  Raw Buffer output 0 00000321

  549 09:15:25.259979  Raw Buffer output 1 00000000

  550 09:15:25.260039  pmc_send_ipc_cmd succeeded

  551 09:15:25.260098  Detected 4 core, 8 thread CPU.

  552 09:15:25.260157  Detected 4 core, 8 thread CPU.

  553 09:15:25.260217  Display FSP Version Info HOB

  554 09:15:25.260276  Reference Code - CPU = a.0.4c.31

  555 09:15:25.260336  uCode Version = 0.0.0.86

  556 09:15:25.260395  TXT ACM version = ff.ff.ff.ffff

  557 09:15:25.260456  Reference Code - ME = a.0.4c.31

  558 09:15:25.260515  MEBx version = 0.0.0.0

  559 09:15:25.260575  ME Firmware Version = Consumer SKU

  560 09:15:25.260634  Reference Code - PCH = a.0.4c.31

  561 09:15:25.260694  PCH-CRID Status = Disabled

  562 09:15:25.260753  PCH-CRID Original Value = ff.ff.ff.ffff

  563 09:15:25.260813  PCH-CRID New Value = ff.ff.ff.ffff

  564 09:15:25.260872  OPROM - RST - RAID = ff.ff.ff.ffff

  565 09:15:25.260932  PCH Hsio Version = 4.0.0.0

  566 09:15:25.260991  Reference Code - SA - System Agent = a.0.4c.31

  567 09:15:25.261051  Reference Code - MRC = 2.0.0.1

  568 09:15:25.261110  SA - PCIe Version = a.0.4c.31

  569 09:15:25.261170  SA-CRID Status = Disabled

  570 09:15:25.261229  SA-CRID Original Value = 0.0.0.1

  571 09:15:25.261289  SA-CRID New Value = 0.0.0.1

  572 09:15:25.261348  OPROM - VBIOS = ff.ff.ff.ffff

  573 09:15:25.261408  IO Manageability Engine FW Version = 11.1.4.0

  574 09:15:25.261477  PHY Build Version = 0.0.0.e0

  575 09:15:25.261566  Thunderbolt(TM) FW Version = 0.0.0.0

  576 09:15:25.261630  System Agent Manageability Engine FW Version = ff.ff.ff.ffff

  577 09:15:25.261692  ITSS IRQ Polarities Before:

  578 09:15:25.261753  IPC0: 0xffffffff

  579 09:15:25.261812  IPC1: 0xffffffff

  580 09:15:25.261871  IPC2: 0xffffffff

  581 09:15:25.261930  IPC3: 0xffffffff

  582 09:15:25.261990  ITSS IRQ Polarities After:

  583 09:15:25.262049  IPC0: 0xffffffff

  584 09:15:25.262108  IPC1: 0xffffffff

  585 09:15:25.262168  IPC2: 0xffffffff

  586 09:15:25.262227  IPC3: 0xffffffff

  587 09:15:25.262286  Found PCIe Root Port #9 at PCI: 00:1d.0.

  588 09:15:25.262347  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.

  589 09:15:25.262412  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.

  590 09:15:25.262473  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.

  591 09:15:25.262533  BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms

  592 09:15:25.262594  Enumerating buses...

  593 09:15:25.262654  Show all devs... Before device enumeration.

  594 09:15:25.262714  Root Device: enabled 1

  595 09:15:25.262773  DOMAIN: 0000: enabled 1

  596 09:15:25.262833  CPU_CLUSTER: 0: enabled 1

  597 09:15:25.262892  PCI: 00:00.0: enabled 1

  598 09:15:25.262951  PCI: 00:02.0: enabled 1

  599 09:15:25.263010  PCI: 00:04.0: enabled 1

  600 09:15:25.263069  PCI: 00:05.0: enabled 1

  601 09:15:25.263129  PCI: 00:06.0: enabled 0

  602 09:15:25.263188  PCI: 00:07.0: enabled 0

  603 09:15:25.263247  PCI: 00:07.1: enabled 0

  604 09:15:25.263306  PCI: 00:07.2: enabled 0

  605 09:15:25.263366  PCI: 00:07.3: enabled 0

  606 09:15:25.263424  PCI: 00:08.0: enabled 1

  607 09:15:25.263484  PCI: 00:09.0: enabled 0

  608 09:15:25.263543  PCI: 00:0a.0: enabled 0

  609 09:15:25.263602  PCI: 00:0d.0: enabled 1

  610 09:15:25.263661  PCI: 00:0d.1: enabled 0

  611 09:15:25.263720  PCI: 00:0d.2: enabled 0

  612 09:15:25.263780  PCI: 00:0d.3: enabled 0

  613 09:15:25.263839  PCI: 00:0e.0: enabled 0

  614 09:15:25.263898  PCI: 00:10.2: enabled 1

  615 09:15:25.263957  PCI: 00:10.6: enabled 0

  616 09:15:25.264016  PCI: 00:10.7: enabled 0

  617 09:15:25.264075  PCI: 00:12.0: enabled 0

  618 09:15:25.264135  PCI: 00:12.6: enabled 0

  619 09:15:25.264194  PCI: 00:13.0: enabled 0

  620 09:15:25.264253  PCI: 00:14.0: enabled 1

  621 09:15:25.264312  PCI: 00:14.1: enabled 0

  622 09:15:25.264372  PCI: 00:14.2: enabled 1

  623 09:15:25.264431  PCI: 00:14.3: enabled 1

  624 09:15:25.264490  PCI: 00:15.0: enabled 1

  625 09:15:25.264549  PCI: 00:15.1: enabled 1

  626 09:15:25.264608  PCI: 00:15.2: enabled 1

  627 09:15:25.264667  PCI: 00:15.3: enabled 1

  628 09:15:25.264726  PCI: 00:16.0: enabled 1

  629 09:15:25.264784  PCI: 00:16.1: enabled 0

  630 09:15:25.264843  PCI: 00:16.2: enabled 0

  631 09:15:25.264903  PCI: 00:16.3: enabled 0

  632 09:15:25.264989  PCI: 00:16.4: enabled 0

  633 09:15:25.265054  PCI: 00:16.5: enabled 0

  634 09:15:25.265113  PCI: 00:17.0: enabled 1

  635 09:15:25.265173  PCI: 00:19.0: enabled 0

  636 09:15:25.265277  PCI: 00:19.1: enabled 1

  637 09:15:25.265371  PCI: 00:19.2: enabled 0

  638 09:15:25.265468  PCI: 00:1c.0: enabled 1

  639 09:15:25.265531  PCI: 00:1c.1: enabled 0

  640 09:15:25.265592  PCI: 00:1c.2: enabled 0

  641 09:15:25.265652  PCI: 00:1c.3: enabled 0

  642 09:15:25.265712  PCI: 00:1c.4: enabled 0

  643 09:15:25.265772  PCI: 00:1c.5: enabled 0

  644 09:15:25.265831  PCI: 00:1c.6: enabled 1

  645 09:15:25.265890  PCI: 00:1c.7: enabled 0

  646 09:15:25.265949  PCI: 00:1d.0: enabled 1

  647 09:15:25.266207  PCI: 00:1d.1: enabled 0

  648 09:15:25.266273  PCI: 00:1d.2: enabled 1

  649 09:15:25.266334  PCI: 00:1d.3: enabled 0

  650 09:15:25.266393  PCI: 00:1e.0: enabled 1

  651 09:15:25.266453  PCI: 00:1e.1: enabled 0

  652 09:15:25.266513  PCI: 00:1e.2: enabled 1

  653 09:15:25.266572  PCI: 00:1e.3: enabled 1

  654 09:15:25.266632  PCI: 00:1f.0: enabled 1

  655 09:15:25.266691  PCI: 00:1f.1: enabled 0

  656 09:15:25.266751  PCI: 00:1f.2: enabled 1

  657 09:15:25.266810  PCI: 00:1f.3: enabled 1

  658 09:15:25.266870  PCI: 00:1f.4: enabled 0

  659 09:15:25.266930  PCI: 00:1f.5: enabled 1

  660 09:15:25.266989  PCI: 00:1f.6: enabled 0

  661 09:15:25.267048  PCI: 00:1f.7: enabled 0

  662 09:15:25.267108  APIC: 00: enabled 1

  663 09:15:25.267168  GENERIC: 0.0: enabled 1

  664 09:15:25.267227  GENERIC: 0.0: enabled 1

  665 09:15:25.267286  GENERIC: 1.0: enabled 1

  666 09:15:25.267345  GENERIC: 0.0: enabled 1

  667 09:15:25.267404  GENERIC: 1.0: enabled 1

  668 09:15:25.267464  USB0 port 0: enabled 1

  669 09:15:25.267524  GENERIC: 0.0: enabled 1

  670 09:15:25.267583  USB0 port 0: enabled 1

  671 09:15:25.267642  GENERIC: 0.0: enabled 1

  672 09:15:25.267702  I2C: 00:1a: enabled 1

  673 09:15:25.267762  I2C: 00:31: enabled 1

  674 09:15:25.267820  I2C: 00:32: enabled 1

  675 09:15:25.267879  I2C: 00:10: enabled 1

  676 09:15:25.267938  I2C: 00:15: enabled 1

  677 09:15:25.268008  GENERIC: 0.0: enabled 0

  678 09:15:25.268083  GENERIC: 1.0: enabled 0

  679 09:15:25.268143  GENERIC: 0.0: enabled 1

  680 09:15:25.268203  SPI: 00: enabled 1

  681 09:15:25.268263  SPI: 00: enabled 1

  682 09:15:25.268322  PNP: 0c09.0: enabled 1

  683 09:15:25.268382  GENERIC: 0.0: enabled 1

  684 09:15:25.268478  USB3 port 0: enabled 1

  685 09:15:25.268541  USB3 port 1: enabled 1

  686 09:15:25.268601  USB3 port 2: enabled 0

  687 09:15:25.268661  USB3 port 3: enabled 0

  688 09:15:25.268721  USB2 port 0: enabled 0

  689 09:15:25.268781  USB2 port 1: enabled 1

  690 09:15:25.268840  USB2 port 2: enabled 1

  691 09:15:25.268900  USB2 port 3: enabled 0

  692 09:15:25.268959  USB2 port 4: enabled 1

  693 09:15:25.269018  USB2 port 5: enabled 0

  694 09:15:25.269078  USB2 port 6: enabled 0

  695 09:15:25.269136  USB2 port 7: enabled 0

  696 09:15:25.269195  USB2 port 8: enabled 0

  697 09:15:25.269254  USB2 port 9: enabled 0

  698 09:15:25.269314  USB3 port 0: enabled 0

  699 09:15:25.269373  USB3 port 1: enabled 1

  700 09:15:25.269441  USB3 port 2: enabled 0

  701 09:15:25.269503  USB3 port 3: enabled 0

  702 09:15:25.269562  GENERIC: 0.0: enabled 1

  703 09:15:25.269622  GENERIC: 1.0: enabled 1

  704 09:15:25.269681  APIC: 01: enabled 1

  705 09:15:25.269741  APIC: 03: enabled 1

  706 09:15:25.269799  APIC: 07: enabled 1

  707 09:15:25.269859  APIC: 05: enabled 1

  708 09:15:25.269918  APIC: 04: enabled 1

  709 09:15:25.269977  APIC: 02: enabled 1

  710 09:15:25.270035  APIC: 06: enabled 1

  711 09:15:25.270094  Compare with tree...

  712 09:15:25.270152  Root Device: enabled 1

  713 09:15:25.270212   DOMAIN: 0000: enabled 1

  714 09:15:25.270271    PCI: 00:00.0: enabled 1

  715 09:15:25.270330    PCI: 00:02.0: enabled 1

  716 09:15:25.270389    PCI: 00:04.0: enabled 1

  717 09:15:25.270449     GENERIC: 0.0: enabled 1

  718 09:15:25.270508    PCI: 00:05.0: enabled 1

  719 09:15:25.270567    PCI: 00:06.0: enabled 0

  720 09:15:25.270626    PCI: 00:07.0: enabled 0

  721 09:15:25.270685     GENERIC: 0.0: enabled 1

  722 09:15:25.270744    PCI: 00:07.1: enabled 0

  723 09:15:25.270803     GENERIC: 1.0: enabled 1

  724 09:15:25.270862    PCI: 00:07.2: enabled 0

  725 09:15:25.270921     GENERIC: 0.0: enabled 1

  726 09:15:25.270981    PCI: 00:07.3: enabled 0

  727 09:15:25.271040     GENERIC: 1.0: enabled 1

  728 09:15:25.271099    PCI: 00:08.0: enabled 1

  729 09:15:25.271158    PCI: 00:09.0: enabled 0

  730 09:15:25.271218    PCI: 00:0a.0: enabled 0

  731 09:15:25.271277    PCI: 00:0d.0: enabled 1

  732 09:15:25.271336     USB0 port 0: enabled 1

  733 09:15:25.271409      USB3 port 0: enabled 1

  734 09:15:25.271471      USB3 port 1: enabled 1

  735 09:15:25.271530      USB3 port 2: enabled 0

  736 09:15:25.271589      USB3 port 3: enabled 0

  737 09:15:25.271648    PCI: 00:0d.1: enabled 0

  738 09:15:25.271707    PCI: 00:0d.2: enabled 0

  739 09:15:25.271766     GENERIC: 0.0: enabled 1

  740 09:15:25.271825    PCI: 00:0d.3: enabled 0

  741 09:15:25.271884    PCI: 00:0e.0: enabled 0

  742 09:15:25.271982    PCI: 00:10.2: enabled 1

  743 09:15:25.272046    PCI: 00:10.6: enabled 0

  744 09:15:25.272105    PCI: 00:10.7: enabled 0

  745 09:15:25.272165    PCI: 00:12.0: enabled 0

  746 09:15:25.272224    PCI: 00:12.6: enabled 0

  747 09:15:25.272283    PCI: 00:13.0: enabled 0

  748 09:15:25.272342    PCI: 00:14.0: enabled 1

  749 09:15:25.272402     USB0 port 0: enabled 1

  750 09:15:25.272461      USB2 port 0: enabled 0

  751 09:15:25.272521      USB2 port 1: enabled 1

  752 09:15:25.272580      USB2 port 2: enabled 1

  753 09:15:25.272640      USB2 port 3: enabled 0

  754 09:15:25.272699      USB2 port 4: enabled 1

  755 09:15:25.272758      USB2 port 5: enabled 0

  756 09:15:25.272817      USB2 port 6: enabled 0

  757 09:15:25.272877      USB2 port 7: enabled 0

  758 09:15:25.272937      USB2 port 8: enabled 0

  759 09:15:25.272996      USB2 port 9: enabled 0

  760 09:15:25.273054      USB3 port 0: enabled 0

  761 09:15:25.273113      USB3 port 1: enabled 1

  762 09:15:25.273173      USB3 port 2: enabled 0

  763 09:15:25.273233      USB3 port 3: enabled 0

  764 09:15:25.273291    PCI: 00:14.1: enabled 0

  765 09:15:25.273351    PCI: 00:14.2: enabled 1

  766 09:15:25.273411    PCI: 00:14.3: enabled 1

  767 09:15:25.273488     GENERIC: 0.0: enabled 1

  768 09:15:25.273548    PCI: 00:15.0: enabled 1

  769 09:15:25.273607     I2C: 00:1a: enabled 1

  770 09:15:25.273666     I2C: 00:31: enabled 1

  771 09:15:25.273726     I2C: 00:32: enabled 1

  772 09:15:25.273785    PCI: 00:15.1: enabled 1

  773 09:15:25.273844     I2C: 00:10: enabled 1

  774 09:15:25.273904    PCI: 00:15.2: enabled 1

  775 09:15:25.273963    PCI: 00:15.3: enabled 1

  776 09:15:25.274022    PCI: 00:16.0: enabled 1

  777 09:15:25.274082    PCI: 00:16.1: enabled 0

  778 09:15:25.274141    PCI: 00:16.2: enabled 0

  779 09:15:25.274201    PCI: 00:16.3: enabled 0

  780 09:15:25.274260    PCI: 00:16.4: enabled 0

  781 09:15:25.274320    PCI: 00:16.5: enabled 0

  782 09:15:25.274380    PCI: 00:17.0: enabled 1

  783 09:15:25.274439    PCI: 00:19.0: enabled 0

  784 09:15:25.274497    PCI: 00:19.1: enabled 1

  785 09:15:25.274556     I2C: 00:15: enabled 1

  786 09:15:25.274615    PCI: 00:19.2: enabled 0

  787 09:15:25.274674    PCI: 00:1d.0: enabled 1

  788 09:15:25.274733     GENERIC: 0.0: enabled 1

  789 09:15:25.274792    PCI: 00:1e.0: enabled 1

  790 09:15:25.274865    PCI: 00:1e.1: enabled 0

  791 09:15:25.274935    PCI: 00:1e.2: enabled 1

  792 09:15:25.275013     SPI: 00: enabled 1

  793 09:15:25.275078    PCI: 00:1e.3: enabled 1

  794 09:15:25.275139     SPI: 00: enabled 1

  795 09:15:25.275198    PCI: 00:1f.0: enabled 1

  796 09:15:25.275258     PNP: 0c09.0: enabled 1

  797 09:15:25.275317    PCI: 00:1f.1: enabled 0

  798 09:15:25.275383    PCI: 00:1f.2: enabled 1

  799 09:15:25.275443     GENERIC: 0.0: enabled 1

  800 09:15:25.275503      GENERIC: 0.0: enabled 1

  801 09:15:25.275562      GENERIC: 1.0: enabled 1

  802 09:15:25.275621    PCI: 00:1f.3: enabled 1

  803 09:15:25.275680    PCI: 00:1f.4: enabled 0

  804 09:15:25.275739    PCI: 00:1f.5: enabled 1

  805 09:15:25.275998    PCI: 00:1f.6: enabled 0

  806 09:15:25.276068    PCI: 00:1f.7: enabled 0

  807 09:15:25.276128   CPU_CLUSTER: 0: enabled 1

  808 09:15:25.276188    APIC: 00: enabled 1

  809 09:15:25.276247    APIC: 01: enabled 1

  810 09:15:25.276306    APIC: 03: enabled 1

  811 09:15:25.276365    APIC: 07: enabled 1

  812 09:15:25.276425    APIC: 05: enabled 1

  813 09:15:25.276484    APIC: 04: enabled 1

  814 09:15:25.276543    APIC: 02: enabled 1

  815 09:15:25.276602    APIC: 06: enabled 1

  816 09:15:25.276662  Root Device scanning...

  817 09:15:25.276722  scan_static_bus for Root Device

  818 09:15:25.276781  DOMAIN: 0000 enabled

  819 09:15:25.276841  CPU_CLUSTER: 0 enabled

  820 09:15:25.276900  DOMAIN: 0000 scanning...

  821 09:15:25.276960  PCI: pci_scan_bus for bus 00

  822 09:15:25.277019  PCI: 00:00.0 [8086/0000] ops

  823 09:15:25.277078  PCI: 00:00.0 [8086/9a12] enabled

  824 09:15:25.277138  PCI: 00:02.0 [8086/0000] bus ops

  825 09:15:25.277198  PCI: 00:02.0 [8086/9a40] enabled

  826 09:15:25.277258  PCI: 00:04.0 [8086/0000] bus ops

  827 09:15:25.277317  PCI: 00:04.0 [8086/9a03] enabled

  828 09:15:25.277401  PCI: 00:05.0 [8086/9a19] enabled

  829 09:15:25.277488  PCI: 00:07.0 [0000/0000] hidden

  830 09:15:25.277550  PCI: 00:08.0 [8086/9a11] enabled

  831 09:15:25.277610  PCI: 00:0a.0 [8086/9a0d] disabled

  832 09:15:25.277698  PCI: 00:0d.0 [8086/0000] bus ops

  833 09:15:25.277761  PCI: 00:0d.0 [8086/9a13] enabled

  834 09:15:25.277821  PCI: 00:14.0 [8086/0000] bus ops

  835 09:15:25.277881  PCI: 00:14.0 [8086/a0ed] enabled

  836 09:15:25.277941  PCI: 00:14.2 [8086/a0ef] enabled

  837 09:15:25.278000  PCI: 00:14.3 [8086/0000] bus ops

  838 09:15:25.278059  PCI: 00:14.3 [8086/a0f0] enabled

  839 09:15:25.278118  PCI: 00:15.0 [8086/0000] bus ops

  840 09:15:25.278178  PCI: 00:15.0 [8086/a0e8] enabled

  841 09:15:25.278237  PCI: 00:15.1 [8086/0000] bus ops

  842 09:15:25.278296  PCI: 00:15.1 [8086/a0e9] enabled

  843 09:15:25.278356  PCI: 00:15.2 [8086/0000] bus ops

  844 09:15:25.278415  PCI: 00:15.2 [8086/a0ea] enabled

  845 09:15:25.278474  PCI: 00:15.3 [8086/0000] bus ops

  846 09:15:25.278561  PCI: 00:15.3 [8086/a0eb] enabled

  847 09:15:25.278624  PCI: 00:16.0 [8086/0000] ops

  848 09:15:25.278684  PCI: 00:16.0 [8086/a0e0] enabled

  849 09:15:25.278744  PCI: Static device PCI: 00:17.0 not found, disabling it.

  850 09:15:25.278805  PCI: 00:19.0 [8086/0000] bus ops

  851 09:15:25.278865  PCI: 00:19.0 [8086/a0c5] disabled

  852 09:15:25.278925  PCI: 00:19.1 [8086/0000] bus ops

  853 09:15:25.278985  PCI: 00:19.1 [8086/a0c6] enabled

  854 09:15:25.279044  PCI: 00:1d.0 [8086/0000] bus ops

  855 09:15:25.279104  PCI: 00:1d.0 [8086/a0b0] enabled

  856 09:15:25.279164  PCI: 00:1e.0 [8086/0000] ops

  857 09:15:25.279223  PCI: 00:1e.0 [8086/a0a8] enabled

  858 09:15:25.279283  PCI: 00:1e.2 [8086/0000] bus ops

  859 09:15:25.279343  PCI: 00:1e.2 [8086/a0aa] enabled

  860 09:15:25.279402  PCI: 00:1e.3 [8086/0000] bus ops

  861 09:15:25.279462  PCI: 00:1e.3 [8086/a0ab] enabled

  862 09:15:25.279522  PCI: 00:1f.0 [8086/0000] bus ops

  863 09:15:25.279582  PCI: 00:1f.0 [8086/a087] enabled

  864 09:15:25.279641  RTC Init

  865 09:15:25.279701  Set power on after power failure.

  866 09:15:25.279760  Disabling Deep S3

  867 09:15:25.279819  Disabling Deep S3

  868 09:15:25.279879  Disabling Deep S4

  869 09:15:25.279938  Disabling Deep S4

  870 09:15:25.279996  Disabling Deep S5

  871 09:15:25.280055  Disabling Deep S5

  872 09:15:25.280114  PCI: 00:1f.2 [0000/0000] hidden

  873 09:15:25.280173  PCI: 00:1f.3 [8086/0000] bus ops

  874 09:15:25.280232  PCI: 00:1f.3 [8086/a0c8] enabled

  875 09:15:25.280291  PCI: 00:1f.5 [8086/0000] bus ops

  876 09:15:25.280349  PCI: 00:1f.5 [8086/a0a4] enabled

  877 09:15:25.280409  PCI: Leftover static devices:

  878 09:15:25.280468  PCI: 00:10.2

  879 09:15:25.280527  PCI: 00:10.6

  880 09:15:25.280587  PCI: 00:10.7

  881 09:15:25.280646  PCI: 00:06.0

  882 09:15:25.280704  PCI: 00:07.1

  883 09:15:25.280764  PCI: 00:07.2

  884 09:15:25.280823  PCI: 00:07.3

  885 09:15:25.280884  PCI: 00:09.0

  886 09:15:25.280943  PCI: 00:0d.1

  887 09:15:25.281002  PCI: 00:0d.2

  888 09:15:25.281061  PCI: 00:0d.3

  889 09:15:25.281120  PCI: 00:0e.0

  890 09:15:25.281179  PCI: 00:12.0

  891 09:15:25.281238  PCI: 00:12.6

  892 09:15:25.281297  PCI: 00:13.0

  893 09:15:25.281356  PCI: 00:14.1

  894 09:15:25.281460  PCI: 00:16.1

  895 09:15:25.281582  PCI: 00:16.2

  896 09:15:25.281679  PCI: 00:16.3

  897 09:15:25.281778  PCI: 00:16.4

  898 09:15:25.281843  PCI: 00:16.5

  899 09:15:25.281903  PCI: 00:17.0

  900 09:15:25.281962  PCI: 00:19.2

  901 09:15:25.282021  PCI: 00:1e.1

  902 09:15:25.282081  PCI: 00:1f.1

  903 09:15:25.282140  PCI: 00:1f.4

  904 09:15:25.282199  PCI: 00:1f.6

  905 09:15:25.282258  PCI: 00:1f.7

  906 09:15:25.282317  PCI: Check your devicetree.cb.

  907 09:15:25.282377  PCI: 00:02.0 scanning...

  908 09:15:25.282437  scan_generic_bus for PCI: 00:02.0

  909 09:15:25.282497  scan_generic_bus for PCI: 00:02.0 done

  910 09:15:25.282557  scan_bus: bus PCI: 00:02.0 finished in 7 msecs

  911 09:15:25.282617  PCI: 00:04.0 scanning...

  912 09:15:25.282677  scan_generic_bus for PCI: 00:04.0

  913 09:15:25.282737  GENERIC: 0.0 enabled

  914 09:15:25.282797  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done

  915 09:15:25.282857  scan_bus: bus PCI: 00:04.0 finished in 11 msecs

  916 09:15:25.282918  PCI: 00:0d.0 scanning...

  917 09:15:25.282977  scan_static_bus for PCI: 00:0d.0

  918 09:15:25.283037  USB0 port 0 enabled

  919 09:15:25.283097  USB0 port 0 scanning...

  920 09:15:25.283156  scan_static_bus for USB0 port 0

  921 09:15:25.283215  USB3 port 0 enabled

  922 09:15:25.283274  USB3 port 1 enabled

  923 09:15:25.283334  USB3 port 2 disabled

  924 09:15:25.283394  USB3 port 3 disabled

  925 09:15:25.283453  USB3 port 0 scanning...

  926 09:15:25.283513  scan_static_bus for USB3 port 0

  927 09:15:25.283573  scan_static_bus for USB3 port 0 done

  928 09:15:25.283632  scan_bus: bus USB3 port 0 finished in 6 msecs

  929 09:15:25.283692  USB3 port 1 scanning...

  930 09:15:25.283751  scan_static_bus for USB3 port 1

  931 09:15:25.283810  scan_static_bus for USB3 port 1 done

  932 09:15:25.283870  scan_bus: bus USB3 port 1 finished in 6 msecs

  933 09:15:25.283930  scan_static_bus for USB0 port 0 done

  934 09:15:25.283989  scan_bus: bus USB0 port 0 finished in 43 msecs

  935 09:15:25.284048  scan_static_bus for PCI: 00:0d.0 done

  936 09:15:25.284108  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs

  937 09:15:25.284167  PCI: 00:14.0 scanning...

  938 09:15:25.284227  scan_static_bus for PCI: 00:14.0

  939 09:15:25.284287  USB0 port 0 enabled

  940 09:15:25.284346  USB0 port 0 scanning...

  941 09:15:25.284405  scan_static_bus for USB0 port 0

  942 09:15:25.284464  USB2 port 0 disabled

  943 09:15:25.284543  USB2 port 1 enabled

  944 09:15:25.284608  USB2 port 2 enabled

  945 09:15:25.284668  USB2 port 3 disabled

  946 09:15:25.284727  USB2 port 4 enabled

  947 09:15:25.284789  USB2 port 5 disabled

  948 09:15:25.284849  USB2 port 6 disabled

  949 09:15:25.284908  USB2 port 7 disabled

  950 09:15:25.284967  USB2 port 8 disabled

  951 09:15:25.285027  USB2 port 9 disabled

  952 09:15:25.285098  USB3 port 0 disabled

  953 09:15:25.285197  USB3 port 1 enabled

  954 09:15:25.285289  USB3 port 2 disabled

  955 09:15:25.285581  USB3 port 3 disabled

  956 09:15:25.285650  USB2 port 1 scanning...

  957 09:15:25.285712  scan_static_bus for USB2 port 1

  958 09:15:25.285773  scan_static_bus for USB2 port 1 done

  959 09:15:25.285833  scan_bus: bus USB2 port 1 finished in 6 msecs

  960 09:15:25.285894  USB2 port 2 scanning...

  961 09:15:25.285953  scan_static_bus for USB2 port 2

  962 09:15:25.286013  scan_static_bus for USB2 port 2 done

  963 09:15:25.286073  scan_bus: bus USB2 port 2 finished in 6 msecs

  964 09:15:25.286132  USB2 port 4 scanning...

  965 09:15:25.286191  scan_static_bus for USB2 port 4

  966 09:15:25.286251  scan_static_bus for USB2 port 4 done

  967 09:15:25.286310  scan_bus: bus USB2 port 4 finished in 6 msecs

  968 09:15:25.286371  USB3 port 1 scanning...

  969 09:15:25.286430  scan_static_bus for USB3 port 1

  970 09:15:25.286489  scan_static_bus for USB3 port 1 done

  971 09:15:25.286549  scan_bus: bus USB3 port 1 finished in 6 msecs

  972 09:15:25.286614  scan_static_bus for USB0 port 0 done

  973 09:15:25.286696  scan_bus: bus USB0 port 0 finished in 93 msecs

  974 09:15:25.286758  scan_static_bus for PCI: 00:14.0 done

  975 09:15:25.286818  scan_bus: bus PCI: 00:14.0 finished in 110 msecs

  976 09:15:25.286878  PCI: 00:14.3 scanning...

  977 09:15:25.286938  scan_static_bus for PCI: 00:14.3

  978 09:15:25.286998  GENERIC: 0.0 enabled

  979 09:15:25.287057  scan_static_bus for PCI: 00:14.3 done

  980 09:15:25.287116  scan_bus: bus PCI: 00:14.3 finished in 9 msecs

  981 09:15:25.287176  PCI: 00:15.0 scanning...

  982 09:15:25.287235  scan_static_bus for PCI: 00:15.0

  983 09:15:25.287295  I2C: 00:1a enabled

  984 09:15:25.287354  I2C: 00:31 enabled

  985 09:15:25.287413  I2C: 00:32 enabled

  986 09:15:25.287472  scan_static_bus for PCI: 00:15.0 done

  987 09:15:25.287562  scan_bus: bus PCI: 00:15.0 finished in 13 msecs

  988 09:15:25.287625  PCI: 00:15.1 scanning...

  989 09:15:25.287686  scan_static_bus for PCI: 00:15.1

  990 09:15:25.287745  I2C: 00:10 enabled

  991 09:15:25.287805  scan_static_bus for PCI: 00:15.1 done

  992 09:15:25.287864  scan_bus: bus PCI: 00:15.1 finished in 9 msecs

  993 09:15:25.287924  PCI: 00:15.2 scanning...

  994 09:15:25.287983  scan_static_bus for PCI: 00:15.2

  995 09:15:25.288043  scan_static_bus for PCI: 00:15.2 done

  996 09:15:25.288102  scan_bus: bus PCI: 00:15.2 finished in 7 msecs

  997 09:15:25.288162  PCI: 00:15.3 scanning...

  998 09:15:25.288222  scan_static_bus for PCI: 00:15.3

  999 09:15:25.288281  scan_static_bus for PCI: 00:15.3 done

 1000 09:15:25.288369  scan_bus: bus PCI: 00:15.3 finished in 7 msecs

 1001 09:15:25.288432  PCI: 00:19.1 scanning...

 1002 09:15:25.288491  scan_static_bus for PCI: 00:19.1

 1003 09:15:25.288551  I2C: 00:15 enabled

 1004 09:15:25.288611  scan_static_bus for PCI: 00:19.1 done

 1005 09:15:25.288671  scan_bus: bus PCI: 00:19.1 finished in 9 msecs

 1006 09:15:25.288730  PCI: 00:1d.0 scanning...

 1007 09:15:25.288789  do_pci_scan_bridge for PCI: 00:1d.0

 1008 09:15:25.288848  PCI: pci_scan_bus for bus 01

 1009 09:15:25.288908  PCI: 01:00.0 [1c5c/174a] enabled

 1010 09:15:25.288968  GENERIC: 0.0 enabled

 1011 09:15:25.289027  Enabling Common Clock Configuration

 1012 09:15:25.289086  L1 Sub-State supported from root port 29

 1013 09:15:25.289145  L1 Sub-State Support = 0xf

 1014 09:15:25.289204  CommonModeRestoreTime = 0x28

 1015 09:15:25.289263  Power On Value = 0x16, Power On Scale = 0x0

 1016 09:15:25.289322  ASPM: Enabled L1

 1017 09:15:25.289383  PCIe: Max_Payload_Size adjusted to 128

 1018 09:15:25.289457  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs

 1019 09:15:25.289520  PCI: 00:1e.2 scanning...

 1020 09:15:25.289579  scan_generic_bus for PCI: 00:1e.2

 1021 09:15:25.289639  SPI: 00 enabled

 1022 09:15:25.289698  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done

 1023 09:15:25.289758  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs

 1024 09:15:25.289818  PCI: 00:1e.3 scanning...

 1025 09:15:25.289886  scan_generic_bus for PCI: 00:1e.3

 1026 09:15:25.289951  SPI: 00 enabled

 1027 09:15:25.290013  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done

 1028 09:15:25.290074  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs

 1029 09:15:25.290134  PCI: 00:1f.0 scanning...

 1030 09:15:25.290193  scan_static_bus for PCI: 00:1f.0

 1031 09:15:25.290253  PNP: 0c09.0 enabled

 1032 09:15:25.290312  PNP: 0c09.0 scanning...

 1033 09:15:25.290372  scan_static_bus for PNP: 0c09.0

 1034 09:15:25.290431  scan_static_bus for PNP: 0c09.0 done

 1035 09:15:25.290490  scan_bus: bus PNP: 0c09.0 finished in 6 msecs

 1036 09:15:25.290549  scan_static_bus for PCI: 00:1f.0 done

 1037 09:15:25.290608  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs

 1038 09:15:25.290668  PCI: 00:1f.2 scanning...

 1039 09:15:25.290729  scan_static_bus for PCI: 00:1f.2

 1040 09:15:25.290814  GENERIC: 0.0 enabled

 1041 09:15:25.290876  GENERIC: 0.0 scanning...

 1042 09:15:25.290935  scan_static_bus for GENERIC: 0.0

 1043 09:15:25.290995  GENERIC: 0.0 enabled

 1044 09:15:25.291054  GENERIC: 1.0 enabled

 1045 09:15:25.291113  scan_static_bus for GENERIC: 0.0 done

 1046 09:15:25.291173  scan_bus: bus GENERIC: 0.0 finished in 11 msecs

 1047 09:15:25.291232  scan_static_bus for PCI: 00:1f.2 done

 1048 09:15:25.291291  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs

 1049 09:15:25.291350  PCI: 00:1f.3 scanning...

 1050 09:15:25.291409  scan_static_bus for PCI: 00:1f.3

 1051 09:15:25.291468  scan_static_bus for PCI: 00:1f.3 done

 1052 09:15:25.291528  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs

 1053 09:15:25.291587  PCI: 00:1f.5 scanning...

 1054 09:15:25.291674  scan_generic_bus for PCI: 00:1f.5

 1055 09:15:25.291737  scan_generic_bus for PCI: 00:1f.5 done

 1056 09:15:25.291797  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs

 1057 09:15:25.291856  scan_bus: bus DOMAIN: 0000 finished in 718 msecs

 1058 09:15:25.291916  scan_static_bus for Root Device done

 1059 09:15:25.291975  scan_bus: bus Root Device finished in 737 msecs

 1060 09:15:25.292035  done

 1061 09:15:25.292094  BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms

 1062 09:15:25.292155  Chrome EC: UHEPI supported

 1063 09:15:25.292215  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)

 1064 09:15:25.292275  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000

 1065 09:15:25.292335  SPI flash protection: WPSW=0 SRP0=0

 1066 09:15:25.292395  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1067 09:15:25.292454  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms

 1068 09:15:25.292514  found VGA at PCI: 00:02.0

 1069 09:15:25.292771  Setting up VGA for PCI: 00:02.0

 1070 09:15:25.292839  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1071 09:15:25.292901  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1072 09:15:25.292961  Allocating resources...

 1073 09:15:25.293021  Reading resources...

 1074 09:15:25.293081  Root Device read_resources bus 0 link: 0

 1075 09:15:25.293141  DOMAIN: 0000 read_resources bus 0 link: 0

 1076 09:15:25.293200  PCI: 00:04.0 read_resources bus 1 link: 0

 1077 09:15:25.293259  PCI: 00:04.0 read_resources bus 1 link: 0 done

 1078 09:15:25.293319  PCI: 00:0d.0 read_resources bus 0 link: 0

 1079 09:15:25.293379  USB0 port 0 read_resources bus 0 link: 0

 1080 09:15:25.293446  USB0 port 0 read_resources bus 0 link: 0 done

 1081 09:15:25.293508  PCI: 00:0d.0 read_resources bus 0 link: 0 done

 1082 09:15:25.293568  PCI: 00:14.0 read_resources bus 0 link: 0

 1083 09:15:25.293627  USB0 port 0 read_resources bus 0 link: 0

 1084 09:15:25.293686  USB0 port 0 read_resources bus 0 link: 0 done

 1085 09:15:25.293745  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1086 09:15:25.293804  PCI: 00:14.3 read_resources bus 0 link: 0

 1087 09:15:25.293864  PCI: 00:14.3 read_resources bus 0 link: 0 done

 1088 09:15:25.293923  PCI: 00:15.0 read_resources bus 0 link: 0

 1089 09:15:25.293982  PCI: 00:15.0 read_resources bus 0 link: 0 done

 1090 09:15:25.294042  PCI: 00:15.1 read_resources bus 0 link: 0

 1091 09:15:25.294101  PCI: 00:15.1 read_resources bus 0 link: 0 done

 1092 09:15:25.294160  PCI: 00:19.1 read_resources bus 0 link: 0

 1093 09:15:25.294219  PCI: 00:19.1 read_resources bus 0 link: 0 done

 1094 09:15:25.294279  PCI: 00:1d.0 read_resources bus 1 link: 0

 1095 09:15:25.294338  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1096 09:15:25.294397  PCI: 00:1e.2 read_resources bus 2 link: 0

 1097 09:15:25.294480  PCI: 00:1e.2 read_resources bus 2 link: 0 done

 1098 09:15:25.294544  PCI: 00:1e.3 read_resources bus 3 link: 0

 1099 09:15:25.294604  PCI: 00:1e.3 read_resources bus 3 link: 0 done

 1100 09:15:25.294664  PCI: 00:1f.0 read_resources bus 0 link: 0

 1101 09:15:25.294723  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1102 09:15:25.294783  PCI: 00:1f.2 read_resources bus 0 link: 0

 1103 09:15:25.294842  GENERIC: 0.0 read_resources bus 0 link: 0

 1104 09:15:25.294902  GENERIC: 0.0 read_resources bus 0 link: 0 done

 1105 09:15:25.294961  PCI: 00:1f.2 read_resources bus 0 link: 0 done

 1106 09:15:25.295048  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1107 09:15:25.295109  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1108 09:15:25.295169  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1109 09:15:25.295228  Root Device read_resources bus 0 link: 0 done

 1110 09:15:25.295288  Done reading resources.

 1111 09:15:25.295347  Show resources in subtree (Root Device)...After reading.

 1112 09:15:25.295408   Root Device child on link 0 DOMAIN: 0000

 1113 09:15:25.295467    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1114 09:15:25.295527    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1115 09:15:25.295588    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1116 09:15:25.295648     PCI: 00:00.0

 1117 09:15:25.295707     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1118 09:15:25.295791     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1119 09:15:25.295856     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1120 09:15:25.295917     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1121 09:15:25.295977     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1122 09:15:25.296037     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1123 09:15:25.296097     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1124 09:15:25.296157     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1125 09:15:25.296217     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1126 09:15:25.296277     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1127 09:15:25.296336     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1128 09:15:25.296396     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1129 09:15:25.296455     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1130 09:15:25.296514     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1131 09:15:25.296573     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1132 09:15:25.296633     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1133 09:15:25.296692     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1134 09:15:25.296752     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1135 09:15:25.296812     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1136 09:15:25.297064     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1137 09:15:25.297132     PCI: 00:02.0

 1138 09:15:25.297193     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1139 09:15:25.297254     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1140 09:15:25.297315     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1141 09:15:25.297375     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1142 09:15:25.297445     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10

 1143 09:15:25.297509      GENERIC: 0.0

 1144 09:15:25.297569     PCI: 00:05.0

 1145 09:15:25.297629     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1146 09:15:25.297690     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1147 09:15:25.297750      GENERIC: 0.0

 1148 09:15:25.297809     PCI: 00:08.0

 1149 09:15:25.297869     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1150 09:15:25.297929     PCI: 00:0a.0

 1151 09:15:25.297988     PCI: 00:0d.0 child on link 0 USB0 port 0

 1152 09:15:25.298057     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1153 09:15:25.298134      USB0 port 0 child on link 0 USB3 port 0

 1154 09:15:25.298195       USB3 port 0

 1155 09:15:25.298255       USB3 port 1

 1156 09:15:25.298314       USB3 port 2

 1157 09:15:25.298373       USB3 port 3

 1158 09:15:25.298431     PCI: 00:14.0 child on link 0 USB0 port 0

 1159 09:15:25.298491     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1160 09:15:25.298551      USB0 port 0 child on link 0 USB2 port 0

 1161 09:15:25.298610       USB2 port 0

 1162 09:15:25.298683       USB2 port 1

 1163 09:15:25.298745       USB2 port 2

 1164 09:15:25.301835       USB2 port 3

 1165 09:15:25.301926       USB2 port 4

 1166 09:15:25.305085       USB2 port 5

 1167 09:15:25.305183       USB2 port 6

 1168 09:15:25.308763       USB2 port 7

 1169 09:15:25.308854       USB2 port 8

 1170 09:15:25.311506       USB2 port 9

 1171 09:15:25.311596       USB3 port 0

 1172 09:15:25.314980       USB3 port 1

 1173 09:15:25.315070       USB3 port 2

 1174 09:15:25.318493       USB3 port 3

 1175 09:15:25.318584     PCI: 00:14.2

 1176 09:15:25.328470     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1177 09:15:25.338394     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1178 09:15:25.345111     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1179 09:15:25.355478     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1180 09:15:25.355570      GENERIC: 0.0

 1181 09:15:25.361671     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1182 09:15:25.371436     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 09:15:25.371528      I2C: 00:1a

 1184 09:15:25.375013      I2C: 00:31

 1185 09:15:25.375104      I2C: 00:32

 1186 09:15:25.378361     PCI: 00:15.1 child on link 0 I2C: 00:10

 1187 09:15:25.388465     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1188 09:15:25.391657      I2C: 00:10

 1189 09:15:25.391747     PCI: 00:15.2

 1190 09:15:25.401670     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1191 09:15:25.405085     PCI: 00:15.3

 1192 09:15:25.414795     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1193 09:15:25.414887     PCI: 00:16.0

 1194 09:15:25.424978     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1195 09:15:25.427980     PCI: 00:19.0

 1196 09:15:25.431759     PCI: 00:19.1 child on link 0 I2C: 00:15

 1197 09:15:25.441185     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1198 09:15:25.441285      I2C: 00:15

 1199 09:15:25.448014     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1200 09:15:25.454799     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1201 09:15:25.464523     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1202 09:15:25.474700     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1203 09:15:25.477670      GENERIC: 0.0

 1204 09:15:25.477761      PCI: 01:00.0

 1205 09:15:25.487627      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1206 09:15:25.497569      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18

 1207 09:15:25.507980      PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c

 1208 09:15:25.508118     PCI: 00:1e.0

 1209 09:15:25.521711     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1210 09:15:25.524425     PCI: 00:1e.2 child on link 0 SPI: 00

 1211 09:15:25.534246     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1212 09:15:25.534342      SPI: 00

 1213 09:15:25.537811     PCI: 00:1e.3 child on link 0 SPI: 00

 1214 09:15:25.547561     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 09:15:25.554917      SPI: 00

 1216 09:15:25.555031     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1217 09:15:25.564353     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1218 09:15:25.564466      PNP: 0c09.0

 1219 09:15:25.574323      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1220 09:15:25.577337     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1221 09:15:25.587510     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1222 09:15:25.597256     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1223 09:15:25.600955      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1224 09:15:25.604427       GENERIC: 0.0

 1225 09:15:25.604569       GENERIC: 1.0

 1226 09:15:25.607339     PCI: 00:1f.3

 1227 09:15:25.617900     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1228 09:15:25.627503     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1229 09:15:25.627696     PCI: 00:1f.5

 1230 09:15:25.637114     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1231 09:15:25.644333    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1232 09:15:25.644427     APIC: 00

 1233 09:15:25.644499     APIC: 01

 1234 09:15:25.647627     APIC: 03

 1235 09:15:25.647717     APIC: 07

 1236 09:15:25.647788     APIC: 05

 1237 09:15:25.650612     APIC: 04

 1238 09:15:25.650701     APIC: 02

 1239 09:15:25.653903     APIC: 06

 1240 09:15:25.660445  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===

 1241 09:15:25.667244   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff

 1242 09:15:25.670567   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done

 1243 09:15:25.677347   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff

 1244 09:15:25.683735    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 09:15:25.687108    PCI: 01:00.0 18 *  [0x4000 - 0x4fff] mem

 1246 09:15:25.690220    PCI: 01:00.0 1c *  [0x5000 - 0x5fff] mem

 1247 09:15:25.697031   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done

 1248 09:15:25.703453   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1249 09:15:25.713876   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1250 09:15:25.719990  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===

 1251 09:15:25.727065  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1252 09:15:25.733278   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1253 09:15:25.739812   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)

 1254 09:15:25.750173   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)

 1255 09:15:25.753263   DOMAIN: 0000: Resource ranges:

 1256 09:15:25.756639   * Base: 1000, Size: 800, Tag: 100

 1257 09:15:25.759783   * Base: 1900, Size: e700, Tag: 100

 1258 09:15:25.766159    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io

 1259 09:15:25.772914  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done

 1260 09:15:25.779465  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff

 1261 09:15:25.785964   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)

 1262 09:15:25.793422   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)

 1263 09:15:25.802468   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)

 1264 09:15:25.809490   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)

 1265 09:15:25.815976   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)

 1266 09:15:25.825753   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)

 1267 09:15:25.832666   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)

 1268 09:15:25.838935   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)

 1269 09:15:25.848639   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)

 1270 09:15:25.855401   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)

 1271 09:15:25.862212   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)

 1272 09:15:25.871897   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)

 1273 09:15:25.878411   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)

 1274 09:15:25.885204   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)

 1275 09:15:25.895439   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)

 1276 09:15:25.901385   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)

 1277 09:15:25.908344   update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)

 1278 09:15:25.918265   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)

 1279 09:15:25.924992   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)

 1280 09:15:25.931882   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)

 1281 09:15:25.941745   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)

 1282 09:15:25.947730   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)

 1283 09:15:25.951410   DOMAIN: 0000: Resource ranges:

 1284 09:15:25.954902   * Base: 7fc00000, Size: 40400000, Tag: 200

 1285 09:15:25.960919   * Base: d0000000, Size: 28000000, Tag: 200

 1286 09:15:25.964643   * Base: fa000000, Size: 1000000, Tag: 200

 1287 09:15:25.967660   * Base: fb001000, Size: 2fff000, Tag: 200

 1288 09:15:25.971110   * Base: fe010000, Size: 2e000, Tag: 200

 1289 09:15:25.977452   * Base: fe03f000, Size: d41000, Tag: 200

 1290 09:15:25.981046   * Base: fed88000, Size: 8000, Tag: 200

 1291 09:15:25.984173   * Base: fed93000, Size: d000, Tag: 200

 1292 09:15:25.987383   * Base: feda2000, Size: 1e000, Tag: 200

 1293 09:15:25.994520   * Base: fede0000, Size: 1220000, Tag: 200

 1294 09:15:25.997578   * Base: 280400000, Size: 7d7fc00000, Tag: 100200

 1295 09:15:26.004201    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem

 1296 09:15:26.010727    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem

 1297 09:15:26.017356    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem

 1298 09:15:26.023937    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem

 1299 09:15:26.030850    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem

 1300 09:15:26.037756    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem

 1301 09:15:26.044144    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem

 1302 09:15:26.050825    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem

 1303 09:15:26.057251    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem

 1304 09:15:26.064016    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem

 1305 09:15:26.070773    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem

 1306 09:15:26.077406    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem

 1307 09:15:26.083881    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem

 1308 09:15:26.090512    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem

 1309 09:15:26.097208    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem

 1310 09:15:26.103688    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem

 1311 09:15:26.110691    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem

 1312 09:15:26.117738    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem

 1313 09:15:26.123775    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem

 1314 09:15:26.130505    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem

 1315 09:15:26.136880    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem

 1316 09:15:26.143929    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem

 1317 09:15:26.150298  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done

 1318 09:15:26.160616  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff

 1319 09:15:26.163860   PCI: 00:1d.0: Resource ranges:

 1320 09:15:26.166905   * Base: 7fc00000, Size: 100000, Tag: 200

 1321 09:15:26.173749    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem

 1322 09:15:26.180011    PCI: 01:00.0 18 *  [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem

 1323 09:15:26.186936    PCI: 01:00.0 1c *  [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem

 1324 09:15:26.197031  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done

 1325 09:15:26.203311  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===

 1326 09:15:26.206882  Root Device assign_resources, bus 0 link: 0

 1327 09:15:26.213275  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1328 09:15:26.220873  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64

 1329 09:15:26.229939  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64

 1330 09:15:26.236708  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io

 1331 09:15:26.243584  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64

 1332 09:15:26.250062  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1333 09:15:26.252992  PCI: 00:04.0 assign_resources, bus 1 link: 0

 1334 09:15:26.263674  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64

 1335 09:15:26.269624  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64

 1336 09:15:26.280034  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64

 1337 09:15:26.283213  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1338 09:15:26.286449  PCI: 00:0d.0 assign_resources, bus 0 link: 0

 1339 09:15:26.296611  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64

 1340 09:15:26.299915  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1341 09:15:26.306257  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1342 09:15:26.313543  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64

 1343 09:15:26.323148  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64

 1344 09:15:26.330204  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64

 1345 09:15:26.332916  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1346 09:15:26.339745  PCI: 00:14.3 assign_resources, bus 0 link: 0

 1347 09:15:26.346137  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64

 1348 09:15:26.352930  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1349 09:15:26.356077  PCI: 00:15.0 assign_resources, bus 0 link: 0

 1350 09:15:26.366147  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64

 1351 09:15:26.369435  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1352 09:15:26.372486  PCI: 00:15.1 assign_resources, bus 0 link: 0

 1353 09:15:26.382506  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64

 1354 09:15:26.389664  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64

 1355 09:15:26.399748  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64

 1356 09:15:26.406497  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64

 1357 09:15:26.412763  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1358 09:15:26.416316  PCI: 00:19.1 assign_resources, bus 0 link: 0

 1359 09:15:26.426107  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io

 1360 09:15:26.436206  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1361 09:15:26.442472  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem

 1362 09:15:26.449437  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1363 09:15:26.456210  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64

 1364 09:15:26.462294  PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem

 1365 09:15:26.472161  PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem

 1366 09:15:26.475585  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1367 09:15:26.485283  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64

 1368 09:15:26.488533  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1369 09:15:26.495311  PCI: 00:1e.2 assign_resources, bus 2 link: 0

 1370 09:15:26.502273  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64

 1371 09:15:26.505662  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1372 09:15:26.511937  PCI: 00:1e.3 assign_resources, bus 3 link: 0

 1373 09:15:26.515789  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1374 09:15:26.522317  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1375 09:15:26.525457  LPC: Trying to open IO window from 800 size 1ff

 1376 09:15:26.535649  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64

 1377 09:15:26.542380  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64

 1378 09:15:26.551897  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem

 1379 09:15:26.555548  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1380 09:15:26.559042  Root Device assign_resources, bus 0 link: 0

 1381 09:15:26.562352  Done setting resources.

 1382 09:15:26.568734  Show resources in subtree (Root Device)...After assigning values.

 1383 09:15:26.572652   Root Device child on link 0 DOMAIN: 0000

 1384 09:15:26.578812    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1385 09:15:26.585416    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1386 09:15:26.595663    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100

 1387 09:15:26.599031     PCI: 00:00.0

 1388 09:15:26.608855     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1389 09:15:26.618623     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1

 1390 09:15:26.628773     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1391 09:15:26.635630     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1392 09:15:26.645250     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1393 09:15:26.655264     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1394 09:15:26.665467     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6

 1395 09:15:26.675798     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1396 09:15:26.681957     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1397 09:15:26.692038     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9

 1398 09:15:26.701784     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a

 1399 09:15:26.711966     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b

 1400 09:15:26.721628     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c

 1401 09:15:26.728053     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d

 1402 09:15:26.737683     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e

 1403 09:15:26.747599     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f

 1404 09:15:26.757693     PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10

 1405 09:15:26.767612     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11

 1406 09:15:26.777537     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12

 1407 09:15:26.787627     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13

 1408 09:15:26.787718     PCI: 00:02.0

 1409 09:15:26.797676     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10

 1410 09:15:26.811026     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18

 1411 09:15:26.817370     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20

 1412 09:15:26.824174     PCI: 00:04.0 child on link 0 GENERIC: 0.0

 1413 09:15:26.833979     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10

 1414 09:15:26.834070      GENERIC: 0.0

 1415 09:15:26.837403     PCI: 00:05.0

 1416 09:15:26.847237     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10

 1417 09:15:26.853920     PCI: 00:07.0 child on link 0 GENERIC: 0.0

 1418 09:15:26.854015      GENERIC: 0.0

 1419 09:15:26.857147     PCI: 00:08.0

 1420 09:15:26.867063     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10

 1421 09:15:26.867153     PCI: 00:0a.0

 1422 09:15:26.874258     PCI: 00:0d.0 child on link 0 USB0 port 0

 1423 09:15:26.884088     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10

 1424 09:15:26.887495      USB0 port 0 child on link 0 USB3 port 0

 1425 09:15:26.890654       USB3 port 0

 1426 09:15:26.890742       USB3 port 1

 1427 09:15:26.894099       USB3 port 2

 1428 09:15:26.894187       USB3 port 3

 1429 09:15:26.897119     PCI: 00:14.0 child on link 0 USB0 port 0

 1430 09:15:26.910815     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10

 1431 09:15:26.913511      USB0 port 0 child on link 0 USB2 port 0

 1432 09:15:26.913596       USB2 port 0

 1433 09:15:26.917075       USB2 port 1

 1434 09:15:26.917152       USB2 port 2

 1435 09:15:26.920448       USB2 port 3

 1436 09:15:26.924205       USB2 port 4

 1437 09:15:26.924309       USB2 port 5

 1438 09:15:26.927050       USB2 port 6

 1439 09:15:26.927153       USB2 port 7

 1440 09:15:26.930297       USB2 port 8

 1441 09:15:26.930399       USB2 port 9

 1442 09:15:26.934163       USB3 port 0

 1443 09:15:26.934241       USB3 port 1

 1444 09:15:26.937741       USB3 port 2

 1445 09:15:26.937837       USB3 port 3

 1446 09:15:26.940572     PCI: 00:14.2

 1447 09:15:26.950676     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10

 1448 09:15:26.961130     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18

 1449 09:15:26.963974     PCI: 00:14.3 child on link 0 GENERIC: 0.0

 1450 09:15:26.973637     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10

 1451 09:15:26.977020      GENERIC: 0.0

 1452 09:15:26.980541     PCI: 00:15.0 child on link 0 I2C: 00:1a

 1453 09:15:26.990173     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10

 1454 09:15:26.993443      I2C: 00:1a

 1455 09:15:26.993533      I2C: 00:31

 1456 09:15:26.997061      I2C: 00:32

 1457 09:15:27.000188     PCI: 00:15.1 child on link 0 I2C: 00:10

 1458 09:15:27.010203     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10

 1459 09:15:27.013438      I2C: 00:10

 1460 09:15:27.013528     PCI: 00:15.2

 1461 09:15:27.023790     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10

 1462 09:15:27.027132     PCI: 00:15.3

 1463 09:15:27.037007     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10

 1464 09:15:27.037119     PCI: 00:16.0

 1465 09:15:27.050401     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10

 1466 09:15:27.050498     PCI: 00:19.0

 1467 09:15:27.053404     PCI: 00:19.1 child on link 0 I2C: 00:15

 1468 09:15:27.063636     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10

 1469 09:15:27.066921      I2C: 00:15

 1470 09:15:27.070259     PCI: 00:1d.0 child on link 0 GENERIC: 0.0

 1471 09:15:27.080059     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c

 1472 09:15:27.093377     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24

 1473 09:15:27.103343     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20

 1474 09:15:27.103447      GENERIC: 0.0

 1475 09:15:27.106883      PCI: 01:00.0

 1476 09:15:27.116632      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10

 1477 09:15:27.126296      PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18

 1478 09:15:27.136433      PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c

 1479 09:15:27.140007     PCI: 00:1e.0

 1480 09:15:27.149564     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1481 09:15:27.153688     PCI: 00:1e.2 child on link 0 SPI: 00

 1482 09:15:27.163317     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10

 1483 09:15:27.166100      SPI: 00

 1484 09:15:27.170041     PCI: 00:1e.3 child on link 0 SPI: 00

 1485 09:15:27.179401     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10

 1486 09:15:27.179496      SPI: 00

 1487 09:15:27.186513     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1488 09:15:27.193292     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1489 09:15:27.196688      PNP: 0c09.0

 1490 09:15:27.206494      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1491 09:15:27.210193     PCI: 00:1f.2 child on link 0 GENERIC: 0.0

 1492 09:15:27.219455     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0

 1493 09:15:27.229422     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1

 1494 09:15:27.232587      GENERIC: 0.0 child on link 0 GENERIC: 0.0

 1495 09:15:27.232688       GENERIC: 0.0

 1496 09:15:27.236254       GENERIC: 1.0

 1497 09:15:27.239747     PCI: 00:1f.3

 1498 09:15:27.249642     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10

 1499 09:15:27.259072     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20

 1500 09:15:27.259174     PCI: 00:1f.5

 1501 09:15:27.269096     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10

 1502 09:15:27.276009    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1503 09:15:27.276105     APIC: 00

 1504 09:15:27.276177     APIC: 01

 1505 09:15:27.279581     APIC: 03

 1506 09:15:27.279671     APIC: 07

 1507 09:15:27.283066     APIC: 05

 1508 09:15:27.283155     APIC: 04

 1509 09:15:27.283225     APIC: 02

 1510 09:15:27.286033     APIC: 06

 1511 09:15:27.289291  Done allocating resources.

 1512 09:15:27.292692  BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms

 1513 09:15:27.299587  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4

 1514 09:15:27.303414  Configure GPIOs for I2S audio on UP4.

 1515 09:15:27.310551  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms

 1516 09:15:27.313639  Enabling resources...

 1517 09:15:27.317085  PCI: 00:00.0 subsystem <- 8086/9a12

 1518 09:15:27.320216  PCI: 00:00.0 cmd <- 06

 1519 09:15:27.323626  PCI: 00:02.0 subsystem <- 8086/9a40

 1520 09:15:27.327011  PCI: 00:02.0 cmd <- 03

 1521 09:15:27.330401  PCI: 00:04.0 subsystem <- 8086/9a03

 1522 09:15:27.330491  PCI: 00:04.0 cmd <- 02

 1523 09:15:27.337141  PCI: 00:05.0 subsystem <- 8086/9a19

 1524 09:15:27.337234  PCI: 00:05.0 cmd <- 02

 1525 09:15:27.340764  PCI: 00:08.0 subsystem <- 8086/9a11

 1526 09:15:27.344120  PCI: 00:08.0 cmd <- 06

 1527 09:15:27.347004  PCI: 00:0d.0 subsystem <- 8086/9a13

 1528 09:15:27.351088  PCI: 00:0d.0 cmd <- 02

 1529 09:15:27.353748  PCI: 00:14.0 subsystem <- 8086/a0ed

 1530 09:15:27.357225  PCI: 00:14.0 cmd <- 02

 1531 09:15:27.360751  PCI: 00:14.2 subsystem <- 8086/a0ef

 1532 09:15:27.363807  PCI: 00:14.2 cmd <- 02

 1533 09:15:27.367713  PCI: 00:14.3 subsystem <- 8086/a0f0

 1534 09:15:27.370345  PCI: 00:14.3 cmd <- 02

 1535 09:15:27.373406  PCI: 00:15.0 subsystem <- 8086/a0e8

 1536 09:15:27.377023  PCI: 00:15.0 cmd <- 02

 1537 09:15:27.380041  PCI: 00:15.1 subsystem <- 8086/a0e9

 1538 09:15:27.380131  PCI: 00:15.1 cmd <- 02

 1539 09:15:27.387279  PCI: 00:15.2 subsystem <- 8086/a0ea

 1540 09:15:27.387378  PCI: 00:15.2 cmd <- 02

 1541 09:15:27.390326  PCI: 00:15.3 subsystem <- 8086/a0eb

 1542 09:15:27.393638  PCI: 00:15.3 cmd <- 02

 1543 09:15:27.396543  PCI: 00:16.0 subsystem <- 8086/a0e0

 1544 09:15:27.400401  PCI: 00:16.0 cmd <- 02

 1545 09:15:27.403670  PCI: 00:19.1 subsystem <- 8086/a0c6

 1546 09:15:27.406838  PCI: 00:19.1 cmd <- 02

 1547 09:15:27.410060  PCI: 00:1d.0 bridge ctrl <- 0013

 1548 09:15:27.413563  PCI: 00:1d.0 subsystem <- 8086/a0b0

 1549 09:15:27.416681  PCI: 00:1d.0 cmd <- 06

 1550 09:15:27.419874  PCI: 00:1e.0 subsystem <- 8086/a0a8

 1551 09:15:27.423212  PCI: 00:1e.0 cmd <- 06

 1552 09:15:27.426702  PCI: 00:1e.2 subsystem <- 8086/a0aa

 1553 09:15:27.430157  PCI: 00:1e.2 cmd <- 06

 1554 09:15:27.433205  PCI: 00:1e.3 subsystem <- 8086/a0ab

 1555 09:15:27.433295  PCI: 00:1e.3 cmd <- 02

 1556 09:15:27.439808  PCI: 00:1f.0 subsystem <- 8086/a087

 1557 09:15:27.439905  PCI: 00:1f.0 cmd <- 407

 1558 09:15:27.443048  PCI: 00:1f.3 subsystem <- 8086/a0c8

 1559 09:15:27.446437  PCI: 00:1f.3 cmd <- 02

 1560 09:15:27.449819  PCI: 00:1f.5 subsystem <- 8086/a0a4

 1561 09:15:27.453385  PCI: 00:1f.5 cmd <- 406

 1562 09:15:27.457853  PCI: 01:00.0 cmd <- 02

 1563 09:15:27.462205  done.

 1564 09:15:27.465416  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms

 1565 09:15:27.468872  Initializing devices...

 1566 09:15:27.472432  Root Device init

 1567 09:15:27.475818  Chrome EC: Set SMI mask to 0x0000000000000000

 1568 09:15:27.483090  Chrome EC: clear events_b mask to 0x0000000000000000

 1569 09:15:27.489420  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1570 09:15:27.496740  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e

 1571 09:15:27.502641  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e

 1572 09:15:27.509113  Chrome EC: Set WAKE mask to 0x0000000000000000

 1573 09:15:27.512311  fw_config match found: DB_USB=USB3_ACTIVE

 1574 09:15:27.519379  Configure Right Type-C port orientation for retimer

 1575 09:15:27.522668  Root Device init finished in 47 msecs

 1576 09:15:27.525977  PCI: 00:00.0 init

 1577 09:15:27.529873  CPU TDP = 9 Watts

 1578 09:15:27.530012  CPU PL1 = 9 Watts

 1579 09:15:27.532578  CPU PL2 = 40 Watts

 1580 09:15:27.532721  CPU PL4 = 83 Watts

 1581 09:15:27.539228  PCI: 00:00.0 init finished in 8 msecs

 1582 09:15:27.539344  PCI: 00:02.0 init

 1583 09:15:27.542784  GMA: Found VBT in CBFS

 1584 09:15:27.546306  GMA: Found valid VBT in CBFS

 1585 09:15:27.552770  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 1586 09:15:27.559042                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000

 1587 09:15:27.562232  PCI: 00:02.0 init finished in 18 msecs

 1588 09:15:27.565458  PCI: 00:05.0 init

 1589 09:15:27.568903  PCI: 00:05.0 init finished in 0 msecs

 1590 09:15:27.572183  PCI: 00:08.0 init

 1591 09:15:27.575324  PCI: 00:08.0 init finished in 0 msecs

 1592 09:15:27.578771  PCI: 00:14.0 init

 1593 09:15:27.582119  PCI: 00:14.0 init finished in 0 msecs

 1594 09:15:27.582227  PCI: 00:14.2 init

 1595 09:15:27.588699  PCI: 00:14.2 init finished in 0 msecs

 1596 09:15:27.588823  PCI: 00:15.0 init

 1597 09:15:27.592606  I2C bus 0 version 0x3230302a

 1598 09:15:27.595810  DW I2C bus 0 at 0x7fe4e000 (400 KHz)

 1599 09:15:27.598629  PCI: 00:15.0 init finished in 6 msecs

 1600 09:15:27.602228  PCI: 00:15.1 init

 1601 09:15:27.605647  I2C bus 1 version 0x3230302a

 1602 09:15:27.608806  DW I2C bus 1 at 0x7fe4f000 (400 KHz)

 1603 09:15:27.612307  PCI: 00:15.1 init finished in 6 msecs

 1604 09:15:27.615857  PCI: 00:15.2 init

 1605 09:15:27.618682  I2C bus 2 version 0x3230302a

 1606 09:15:27.622012  DW I2C bus 2 at 0x7fe50000 (400 KHz)

 1607 09:15:27.625520  PCI: 00:15.2 init finished in 6 msecs

 1608 09:15:27.628668  PCI: 00:15.3 init

 1609 09:15:27.632287  I2C bus 3 version 0x3230302a

 1610 09:15:27.636410  DW I2C bus 3 at 0x7fe51000 (400 KHz)

 1611 09:15:27.638637  PCI: 00:15.3 init finished in 6 msecs

 1612 09:15:27.638748  PCI: 00:16.0 init

 1613 09:15:27.645417  PCI: 00:16.0 init finished in 0 msecs

 1614 09:15:27.645568  PCI: 00:19.1 init

 1615 09:15:27.648919  I2C bus 5 version 0x3230302a

 1616 09:15:27.651961  DW I2C bus 5 at 0x7fe53000 (400 KHz)

 1617 09:15:27.655523  PCI: 00:19.1 init finished in 6 msecs

 1618 09:15:27.658913  PCI: 00:1d.0 init

 1619 09:15:27.662635  Initializing PCH PCIe bridge.

 1620 09:15:27.665622  PCI: 00:1d.0 init finished in 3 msecs

 1621 09:15:27.669137  PCI: 00:1f.0 init

 1622 09:15:27.672211  IOAPIC: Initializing IOAPIC at 0xfec00000

 1623 09:15:27.679464  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1624 09:15:27.679621  IOAPIC: ID = 0x02

 1625 09:15:27.682342  IOAPIC: Dumping registers

 1626 09:15:27.685441    reg 0x0000: 0x02000000

 1627 09:15:27.688976    reg 0x0001: 0x00770020

 1628 09:15:27.689084    reg 0x0002: 0x00000000

 1629 09:15:27.695504  PCI: 00:1f.0 init finished in 21 msecs

 1630 09:15:27.695605  PCI: 00:1f.2 init

 1631 09:15:27.698682  Disabling ACPI via APMC.

 1632 09:15:27.702378  APMC done.

 1633 09:15:27.706100  PCI: 00:1f.2 init finished in 5 msecs

 1634 09:15:27.717588  PCI: 01:00.0 init

 1635 09:15:27.721042  PCI: 01:00.0 init finished in 0 msecs

 1636 09:15:27.723848  PNP: 0c09.0 init

 1637 09:15:27.727266  Google Chrome EC uptime: 10.153 seconds

 1638 09:15:27.734366  Google Chrome AP resets since EC boot: 0

 1639 09:15:27.737182  Google Chrome most recent AP reset causes:

 1640 09:15:27.744242  Google Chrome EC reset flags at last EC boot: reset-pin | hard

 1641 09:15:27.747964  PNP: 0c09.0 init finished in 19 msecs

 1642 09:15:27.752765  Devices initialized

 1643 09:15:27.755533  Show all devs... After init.

 1644 09:15:27.759034  Root Device: enabled 1

 1645 09:15:27.759131  DOMAIN: 0000: enabled 1

 1646 09:15:27.762358  CPU_CLUSTER: 0: enabled 1

 1647 09:15:27.766037  PCI: 00:00.0: enabled 1

 1648 09:15:27.769222  PCI: 00:02.0: enabled 1

 1649 09:15:27.769297  PCI: 00:04.0: enabled 1

 1650 09:15:27.772566  PCI: 00:05.0: enabled 1

 1651 09:15:27.775656  PCI: 00:06.0: enabled 0

 1652 09:15:27.778846  PCI: 00:07.0: enabled 0

 1653 09:15:27.778937  PCI: 00:07.1: enabled 0

 1654 09:15:27.782133  PCI: 00:07.2: enabled 0

 1655 09:15:27.785380  PCI: 00:07.3: enabled 0

 1656 09:15:27.789364  PCI: 00:08.0: enabled 1

 1657 09:15:27.789462  PCI: 00:09.0: enabled 0

 1658 09:15:27.792225  PCI: 00:0a.0: enabled 0

 1659 09:15:27.795505  PCI: 00:0d.0: enabled 1

 1660 09:15:27.798878  PCI: 00:0d.1: enabled 0

 1661 09:15:27.798969  PCI: 00:0d.2: enabled 0

 1662 09:15:27.802130  PCI: 00:0d.3: enabled 0

 1663 09:15:27.805570  PCI: 00:0e.0: enabled 0

 1664 09:15:27.805661  PCI: 00:10.2: enabled 1

 1665 09:15:27.809188  PCI: 00:10.6: enabled 0

 1666 09:15:27.812281  PCI: 00:10.7: enabled 0

 1667 09:15:27.815477  PCI: 00:12.0: enabled 0

 1668 09:15:27.815567  PCI: 00:12.6: enabled 0

 1669 09:15:27.818804  PCI: 00:13.0: enabled 0

 1670 09:15:27.822035  PCI: 00:14.0: enabled 1

 1671 09:15:27.825527  PCI: 00:14.1: enabled 0

 1672 09:15:27.825618  PCI: 00:14.2: enabled 1

 1673 09:15:27.828594  PCI: 00:14.3: enabled 1

 1674 09:15:27.832237  PCI: 00:15.0: enabled 1

 1675 09:15:27.835314  PCI: 00:15.1: enabled 1

 1676 09:15:27.835438  PCI: 00:15.2: enabled 1

 1677 09:15:27.838669  PCI: 00:15.3: enabled 1

 1678 09:15:27.842242  PCI: 00:16.0: enabled 1

 1679 09:15:27.845340  PCI: 00:16.1: enabled 0

 1680 09:15:27.845436  PCI: 00:16.2: enabled 0

 1681 09:15:27.848625  PCI: 00:16.3: enabled 0

 1682 09:15:27.851975  PCI: 00:16.4: enabled 0

 1683 09:15:27.852065  PCI: 00:16.5: enabled 0

 1684 09:15:27.855200  PCI: 00:17.0: enabled 0

 1685 09:15:27.858365  PCI: 00:19.0: enabled 0

 1686 09:15:27.862110  PCI: 00:19.1: enabled 1

 1687 09:15:27.862200  PCI: 00:19.2: enabled 0

 1688 09:15:27.865310  PCI: 00:1c.0: enabled 1

 1689 09:15:27.868514  PCI: 00:1c.1: enabled 0

 1690 09:15:27.871979  PCI: 00:1c.2: enabled 0

 1691 09:15:27.872070  PCI: 00:1c.3: enabled 0

 1692 09:15:27.875221  PCI: 00:1c.4: enabled 0

 1693 09:15:27.878507  PCI: 00:1c.5: enabled 0

 1694 09:15:27.881664  PCI: 00:1c.6: enabled 1

 1695 09:15:27.881755  PCI: 00:1c.7: enabled 0

 1696 09:15:27.885251  PCI: 00:1d.0: enabled 1

 1697 09:15:27.888766  PCI: 00:1d.1: enabled 0

 1698 09:15:27.888878  PCI: 00:1d.2: enabled 1

 1699 09:15:27.892236  PCI: 00:1d.3: enabled 0

 1700 09:15:27.895105  PCI: 00:1e.0: enabled 1

 1701 09:15:27.898599  PCI: 00:1e.1: enabled 0

 1702 09:15:27.898753  PCI: 00:1e.2: enabled 1

 1703 09:15:27.901675  PCI: 00:1e.3: enabled 1

 1704 09:15:27.905226  PCI: 00:1f.0: enabled 1

 1705 09:15:27.908490  PCI: 00:1f.1: enabled 0

 1706 09:15:27.908638  PCI: 00:1f.2: enabled 1

 1707 09:15:27.912153  PCI: 00:1f.3: enabled 1

 1708 09:15:27.915159  PCI: 00:1f.4: enabled 0

 1709 09:15:27.919078  PCI: 00:1f.5: enabled 1

 1710 09:15:27.919179  PCI: 00:1f.6: enabled 0

 1711 09:15:27.921879  PCI: 00:1f.7: enabled 0

 1712 09:15:27.925170  APIC: 00: enabled 1

 1713 09:15:27.925259  GENERIC: 0.0: enabled 1

 1714 09:15:27.928972  GENERIC: 0.0: enabled 1

 1715 09:15:27.931915  GENERIC: 1.0: enabled 1

 1716 09:15:27.935446  GENERIC: 0.0: enabled 1

 1717 09:15:27.935535  GENERIC: 1.0: enabled 1

 1718 09:15:27.938408  USB0 port 0: enabled 1

 1719 09:15:27.941414  GENERIC: 0.0: enabled 1

 1720 09:15:27.941516  USB0 port 0: enabled 1

 1721 09:15:27.944736  GENERIC: 0.0: enabled 1

 1722 09:15:27.948269  I2C: 00:1a: enabled 1

 1723 09:15:27.951408  I2C: 00:31: enabled 1

 1724 09:15:27.951498  I2C: 00:32: enabled 1

 1725 09:15:27.955060  I2C: 00:10: enabled 1

 1726 09:15:27.958724  I2C: 00:15: enabled 1

 1727 09:15:27.958814  GENERIC: 0.0: enabled 0

 1728 09:15:27.961947  GENERIC: 1.0: enabled 0

 1729 09:15:27.965315  GENERIC: 0.0: enabled 1

 1730 09:15:27.965404  SPI: 00: enabled 1

 1731 09:15:27.968031  SPI: 00: enabled 1

 1732 09:15:27.971381  PNP: 0c09.0: enabled 1

 1733 09:15:27.971471  GENERIC: 0.0: enabled 1

 1734 09:15:27.974819  USB3 port 0: enabled 1

 1735 09:15:27.977963  USB3 port 1: enabled 1

 1736 09:15:27.981713  USB3 port 2: enabled 0

 1737 09:15:27.981804  USB3 port 3: enabled 0

 1738 09:15:27.984649  USB2 port 0: enabled 0

 1739 09:15:27.988192  USB2 port 1: enabled 1

 1740 09:15:27.988282  USB2 port 2: enabled 1

 1741 09:15:27.991823  USB2 port 3: enabled 0

 1742 09:15:27.994766  USB2 port 4: enabled 1

 1743 09:15:27.994856  USB2 port 5: enabled 0

 1744 09:15:27.998234  USB2 port 6: enabled 0

 1745 09:15:28.001713  USB2 port 7: enabled 0

 1746 09:15:28.004875  USB2 port 8: enabled 0

 1747 09:15:28.004965  USB2 port 9: enabled 0

 1748 09:15:28.008571  USB3 port 0: enabled 0

 1749 09:15:28.011368  USB3 port 1: enabled 1

 1750 09:15:28.011457  USB3 port 2: enabled 0

 1751 09:15:28.014781  USB3 port 3: enabled 0

 1752 09:15:28.018718  GENERIC: 0.0: enabled 1

 1753 09:15:28.021273  GENERIC: 1.0: enabled 1

 1754 09:15:28.021363  APIC: 01: enabled 1

 1755 09:15:28.024761  APIC: 03: enabled 1

 1756 09:15:28.024851  APIC: 07: enabled 1

 1757 09:15:28.027815  APIC: 05: enabled 1

 1758 09:15:28.031896  APIC: 04: enabled 1

 1759 09:15:28.031990  APIC: 02: enabled 1

 1760 09:15:28.035041  APIC: 06: enabled 1

 1761 09:15:28.038138  PCI: 01:00.0: enabled 1

 1762 09:15:28.041623  BS: BS_DEV_INIT run times (exec / console): 34 / 536 ms

 1763 09:15:28.047668  FMAP: area RW_ELOG found @ f30000 (4096 bytes)

 1764 09:15:28.051125  ELOG: NV offset 0xf30000 size 0x1000

 1765 09:15:28.057740  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1766 09:15:28.064473  ELOG: Event(17) added with size 13 at 2024-05-13 09:15:28 UTC

 1767 09:15:28.071241  ELOG: Event(92) added with size 9 at 2024-05-13 09:15:28 UTC

 1768 09:15:28.077804  ELOG: Event(93) added with size 9 at 2024-05-13 09:15:28 UTC

 1769 09:15:28.083927  ELOG: Event(9E) added with size 10 at 2024-05-13 09:15:28 UTC

 1770 09:15:28.091052  ELOG: Event(9F) added with size 14 at 2024-05-13 09:15:28 UTC

 1771 09:15:28.097258  ELOG: Event(9F) added with size 14 at 2024-05-13 09:15:28 UTC

 1772 09:15:28.103735  BS: BS_DEV_INIT exit times (exec / console): 3 / 51 ms

 1773 09:15:28.107205  ELOG: Event(A1) added with size 10 at 2024-05-13 09:15:28 UTC

 1774 09:15:28.114143  elog_add_boot_reason: Logged recovery mode boot, reason: 0x02

 1775 09:15:28.120826  BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms

 1776 09:15:28.123745  Finalize devices...

 1777 09:15:28.123923  Devices finalized

 1778 09:15:28.130275  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms

 1779 09:15:28.134339  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)

 1780 09:15:28.140399  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms

 1781 09:15:28.146979  ME: HFSTS1                      : 0x80030055

 1782 09:15:28.150602  ME: HFSTS2                      : 0x30280116

 1783 09:15:28.153828  ME: HFSTS3                      : 0x00000050

 1784 09:15:28.160206  ME: HFSTS4                      : 0x00004000

 1785 09:15:28.164066  ME: HFSTS5                      : 0x00000000

 1786 09:15:28.167336  ME: HFSTS6                      : 0x00400006

 1787 09:15:28.170160  ME: Manufacturing Mode          : YES

 1788 09:15:28.176855  ME: SPI Protection Mode Enabled : NO

 1789 09:15:28.180531  ME: FW Partition Table          : OK

 1790 09:15:28.183729  ME: Bringup Loader Failure      : NO

 1791 09:15:28.187524  ME: Firmware Init Complete      : NO

 1792 09:15:28.190115  ME: Boot Options Present        : NO

 1793 09:15:28.193500  ME: Update In Progress          : NO

 1794 09:15:28.196774  ME: D0i3 Support                : YES

 1795 09:15:28.200135  ME: Low Power State Enabled     : NO

 1796 09:15:28.207080  ME: CPU Replaced                : YES

 1797 09:15:28.210129  ME: CPU Replacement Valid       : YES

 1798 09:15:28.213921  ME: Current Working State       : 5

 1799 09:15:28.216998  ME: Current Operation State     : 1

 1800 09:15:28.219797  ME: Current Operation Mode      : 3

 1801 09:15:28.223544  ME: Error Code                  : 0

 1802 09:15:28.226791  ME: Enhanced Debug Mode         : NO

 1803 09:15:28.229829  ME: CPU Debug Disabled          : YES

 1804 09:15:28.233257  ME: TXT Support                 : NO

 1805 09:15:28.240149  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms

 1806 09:15:28.247972  ELOG: Event(91) added with size 10 at 2024-05-13 09:15:28 UTC

 1807 09:15:28.254292  Chrome EC: clear events_b mask to 0x0000000020004000

 1808 09:15:28.261071  BS: BS_WRITE_TABLES entry times (exec / console): 3 / 11 ms

 1809 09:15:28.267201  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4

 1810 09:15:28.270884  CBFS: 'fallback/slic' not found.

 1811 09:15:28.277261  ACPI: Writing ACPI tables at 76b01000.

 1812 09:15:28.277370  ACPI:    * FACS

 1813 09:15:28.280589  ACPI:    * DSDT

 1814 09:15:28.284190  Ramoops buffer: 0x100000@0x76a00000.

 1815 09:15:28.287383  FMAP: area RO_VPD found @ 1800000 (16384 bytes)

 1816 09:15:28.294370  FMAP: area RW_VPD found @ f35000 (8192 bytes)

 1817 09:15:28.297366  Google Chrome EC: version:

 1818 09:15:28.300428  	ro: voema_v2.0.7540-147f8d37d1

 1819 09:15:28.304089  	rw: voema_v2.0.7540-147f8d37d1

 1820 09:15:28.304192    running image: 1

 1821 09:15:28.310969  PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000

 1822 09:15:28.314462  ACPI:    * FADT

 1823 09:15:28.314557  SCI is IRQ9

 1824 09:15:28.321866  ACPI: added table 1/32, length now 40

 1825 09:15:28.321973  ACPI:     * SSDT

 1826 09:15:28.325088  Found 1 CPU(s) with 8 core(s) each.

 1827 09:15:28.331872  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2

 1828 09:15:28.334576  \_SB.DPTF: Intel DPTF at GENERIC: 0.0

 1829 09:15:28.338475  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0

 1830 09:15:28.341203  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a

 1831 09:15:28.347655  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h

 1832 09:15:28.354984  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h

 1833 09:15:28.358104  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10

 1834 09:15:28.364325  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15

 1835 09:15:28.371742  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)

 1836 09:15:28.374736  \_SB.PCI0.RP09: Added StorageD3Enable property

 1837 09:15:28.378551  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1838 09:15:28.384342  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00

 1839 09:15:28.391125  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]

 1840 09:15:28.394753  PS2K: Passing 80 keymaps to kernel

 1841 09:15:28.400904  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0

 1842 09:15:28.407590  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1

 1843 09:15:28.414300  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1

 1844 09:15:28.420776  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2

 1845 09:15:28.427926  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4

 1846 09:15:28.434151  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1

 1847 09:15:28.441080  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0

 1848 09:15:28.447878  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0

 1849 09:15:28.450774  ACPI: added table 2/32, length now 44

 1850 09:15:28.450884  ACPI:    * MCFG

 1851 09:15:28.457715  ACPI: added table 3/32, length now 48

 1852 09:15:28.457847  ACPI:    * TPM2

 1853 09:15:28.461169  TPM2 log created at 0x769f0000

 1854 09:15:28.464053  ACPI: added table 4/32, length now 52

 1855 09:15:28.467475  ACPI:    * MADT

 1856 09:15:28.467565  SCI is IRQ9

 1857 09:15:28.470610  ACPI: added table 5/32, length now 56

 1858 09:15:28.473938  current = 76b09850

 1859 09:15:28.474027  ACPI:    * DMAR

 1860 09:15:28.481064  ACPI: added table 6/32, length now 60

 1861 09:15:28.483966  ACPI: added table 7/32, length now 64

 1862 09:15:28.484058  ACPI:    * HPET

 1863 09:15:28.487131  ACPI: added table 8/32, length now 68

 1864 09:15:28.491020  ACPI: done.

 1865 09:15:28.491111  ACPI tables: 35216 bytes.

 1866 09:15:28.493965  smbios_write_tables: 769ef000

 1867 09:15:28.497121  EC returned error result code 3

 1868 09:15:28.501084  Couldn't obtain OEM name from CBI

 1869 09:15:28.504494  Create SMBIOS type 16

 1870 09:15:28.507593  Create SMBIOS type 17

 1871 09:15:28.511256  GENERIC: 0.0 (WIFI Device)

 1872 09:15:28.511347  SMBIOS tables: 1750 bytes.

 1873 09:15:28.517709  Writing table forward entry at 0x00000500

 1874 09:15:28.524293  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c

 1875 09:15:28.528023  Writing coreboot table at 0x76b25000

 1876 09:15:28.534357   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1877 09:15:28.537361   1. 0000000000001000-000000000009ffff: RAM

 1878 09:15:28.540794   2. 00000000000a0000-00000000000fffff: RESERVED

 1879 09:15:28.547999   3. 0000000000100000-00000000769eefff: RAM

 1880 09:15:28.551158   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES

 1881 09:15:28.557410   5. 0000000076b98000-0000000076c09fff: RAMSTAGE

 1882 09:15:28.564382   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES

 1883 09:15:28.567280   7. 0000000077000000-000000007fbfffff: RESERVED

 1884 09:15:28.570739   8. 00000000c0000000-00000000cfffffff: RESERVED

 1885 09:15:28.577884   9. 00000000f8000000-00000000f9ffffff: RESERVED

 1886 09:15:28.581114  10. 00000000fb000000-00000000fb000fff: RESERVED

 1887 09:15:28.587330  11. 00000000fe000000-00000000fe00ffff: RESERVED

 1888 09:15:28.590772  12. 00000000fed80000-00000000fed87fff: RESERVED

 1889 09:15:28.597781  13. 00000000fed90000-00000000fed92fff: RESERVED

 1890 09:15:28.601613  14. 00000000feda0000-00000000feda1fff: RESERVED

 1891 09:15:28.607539  15. 00000000fedc0000-00000000feddffff: RESERVED

 1892 09:15:28.611181  16. 0000000100000000-00000002803fffff: RAM

 1893 09:15:28.614076  Passing 4 GPIOs to payload:

 1894 09:15:28.617356              NAME |       PORT | POLARITY |     VALUE

 1895 09:15:28.624176               lid |  undefined |     high |      high

 1896 09:15:28.627341             power |  undefined |     high |       low

 1897 09:15:28.634082             oprom |  undefined |     high |       low

 1898 09:15:28.640523          EC in RW | 0x000000e5 |     high |       low

 1899 09:15:28.647276  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum fe0d

 1900 09:15:28.647372  coreboot table: 1576 bytes.

 1901 09:15:28.653873  IMD ROOT    0. 0x76fff000 0x00001000

 1902 09:15:28.657636  IMD SMALL   1. 0x76ffe000 0x00001000

 1903 09:15:28.660394  FSP MEMORY  2. 0x76c4e000 0x003b0000

 1904 09:15:28.663979  VPD         3. 0x76c4d000 0x00000367

 1905 09:15:28.667398  RO MCACHE   4. 0x76c4c000 0x00000fdc

 1906 09:15:28.670521  CONSOLE     5. 0x76c2c000 0x00020000

 1907 09:15:28.673927  FMAP        6. 0x76c2b000 0x00000578

 1908 09:15:28.677251  TIME STAMP  7. 0x76c2a000 0x00000910

 1909 09:15:28.681182  VBOOT WORK  8. 0x76c16000 0x00014000

 1910 09:15:28.686952  ROMSTG STCK 9. 0x76c15000 0x00001000

 1911 09:15:28.690908  AFTER CAR  10. 0x76c0a000 0x0000b000

 1912 09:15:28.694125  RAMSTAGE   11. 0x76b97000 0x00073000

 1913 09:15:28.696810  REFCODE    12. 0x76b42000 0x00055000

 1914 09:15:28.700476  SMM BACKUP 13. 0x76b32000 0x00010000

 1915 09:15:28.704246  4f444749   14. 0x76b30000 0x00002000

 1916 09:15:28.707191  EXT VBT15. 0x76b2d000 0x0000219f

 1917 09:15:28.710470  COREBOOT   16. 0x76b25000 0x00008000

 1918 09:15:28.713900  ACPI       17. 0x76b01000 0x00024000

 1919 09:15:28.720222  ACPI GNVS  18. 0x76b00000 0x00001000

 1920 09:15:28.724057  RAMOOPS    19. 0x76a00000 0x00100000

 1921 09:15:28.726885  TPM2 TCGLOG20. 0x769f0000 0x00010000

 1922 09:15:28.730367  SMBIOS     21. 0x769ef000 0x00000800

 1923 09:15:28.733852  IMD small region:

 1924 09:15:28.736868    IMD ROOT    0. 0x76ffec00 0x00000400

 1925 09:15:28.740305    FSP RUNTIME 1. 0x76ffebe0 0x00000004

 1926 09:15:28.743937    POWER STATE 2. 0x76ffeb80 0x00000044

 1927 09:15:28.747037    ROMSTAGE    3. 0x76ffeb60 0x00000004

 1928 09:15:28.750441    MEM INFO    4. 0x76ffe980 0x000001e0

 1929 09:15:28.756752  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms

 1930 09:15:28.760227  MTRR: Physical address space:

 1931 09:15:28.766622  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1932 09:15:28.773313  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1933 09:15:28.780100  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6

 1934 09:15:28.786652  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0

 1935 09:15:28.793530  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1

 1936 09:15:28.796941  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0

 1937 09:15:28.803312  0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6

 1938 09:15:28.810084  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 09:15:28.813205  MTRR: Fixed MSR 0x258 0x0606060606060606

 1940 09:15:28.816617  MTRR: Fixed MSR 0x259 0x0000000000000000

 1941 09:15:28.820337  MTRR: Fixed MSR 0x268 0x0606060606060606

 1942 09:15:28.823083  MTRR: Fixed MSR 0x269 0x0606060606060606

 1943 09:15:28.829892  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1944 09:15:28.833589  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1945 09:15:28.836729  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1946 09:15:28.840105  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1947 09:15:28.846604  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1948 09:15:28.849927  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1949 09:15:28.853346  call enable_fixed_mtrr()

 1950 09:15:28.856498  CPU physical address size: 39 bits

 1951 09:15:28.859495  MTRR: default type WB/UC MTRR counts: 6/6.

 1952 09:15:28.863724  MTRR: UC selected as default type.

 1953 09:15:28.869689  MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6

 1954 09:15:28.876000  MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0

 1955 09:15:28.882974  MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0

 1956 09:15:28.889775  MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1

 1957 09:15:28.896183  MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6

 1958 09:15:28.902577  MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6

 1959 09:15:28.902678  

 1960 09:15:28.906236  MTRR check

 1961 09:15:28.906325  Fixed MTRRs   : Enabled

 1962 09:15:28.909302  Variable MTRRs: Enabled

 1963 09:15:28.909391  

 1964 09:15:28.912400  MTRR: Fixed MSR 0x250 0x0606060606060606

 1965 09:15:28.919479  MTRR: Fixed MSR 0x258 0x0606060606060606

 1966 09:15:28.922757  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 09:15:28.925841  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 09:15:28.929212  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 09:15:28.935765  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 09:15:28.939107  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 09:15:28.942703  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 09:15:28.945536  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 09:15:28.952140  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 09:15:28.955958  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 09:15:28.959142  MTRR: Fixed MSR 0x250 0x0606060606060606

 1976 09:15:28.962272  MTRR: Fixed MSR 0x250 0x0606060606060606

 1977 09:15:28.965540  MTRR: Fixed MSR 0x258 0x0606060606060606

 1978 09:15:28.972092  MTRR: Fixed MSR 0x259 0x0000000000000000

 1979 09:15:28.975580  MTRR: Fixed MSR 0x268 0x0606060606060606

 1980 09:15:28.978901  MTRR: Fixed MSR 0x269 0x0606060606060606

 1981 09:15:28.982402  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1982 09:15:28.988635  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1983 09:15:28.992008  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1984 09:15:28.995568  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1985 09:15:28.998748  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1986 09:15:29.005548  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1987 09:15:29.008686  MTRR: Fixed MSR 0x258 0x0606060606060606

 1988 09:15:29.011933  call enable_fixed_mtrr()

 1989 09:15:29.015093  MTRR: Fixed MSR 0x259 0x0000000000000000

 1990 09:15:29.018873  MTRR: Fixed MSR 0x268 0x0606060606060606

 1991 09:15:29.025692  MTRR: Fixed MSR 0x269 0x0606060606060606

 1992 09:15:29.028926  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1993 09:15:29.032108  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1994 09:15:29.035632  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1995 09:15:29.041758  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1996 09:15:29.045455  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1997 09:15:29.048415  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1998 09:15:29.051841  CPU physical address size: 39 bits

 1999 09:15:29.056031  call enable_fixed_mtrr()

 2000 09:15:29.059620  MTRR: Fixed MSR 0x250 0x0606060606060606

 2001 09:15:29.066206  MTRR: Fixed MSR 0x250 0x0606060606060606

 2002 09:15:29.069344  MTRR: Fixed MSR 0x258 0x0606060606060606

 2003 09:15:29.073143  MTRR: Fixed MSR 0x259 0x0000000000000000

 2004 09:15:29.076173  MTRR: Fixed MSR 0x268 0x0606060606060606

 2005 09:15:29.082816  MTRR: Fixed MSR 0x269 0x0606060606060606

 2006 09:15:29.085992  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2007 09:15:29.089301  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2008 09:15:29.093159  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2009 09:15:29.099181  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2010 09:15:29.102413  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2011 09:15:29.106506  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2012 09:15:29.113068  MTRR: Fixed MSR 0x258 0x0606060606060606

 2013 09:15:29.113166  call enable_fixed_mtrr()

 2014 09:15:29.118959  MTRR: Fixed MSR 0x259 0x0000000000000000

 2015 09:15:29.123077  MTRR: Fixed MSR 0x268 0x0606060606060606

 2016 09:15:29.125590  MTRR: Fixed MSR 0x269 0x0606060606060606

 2017 09:15:29.128948  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2018 09:15:29.135957  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2019 09:15:29.139163  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2020 09:15:29.142824  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2021 09:15:29.145826  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2022 09:15:29.148980  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2023 09:15:29.155456  CPU physical address size: 39 bits

 2024 09:15:29.159090  call enable_fixed_mtrr()

 2025 09:15:29.161958  call enable_fixed_mtrr()

 2026 09:15:29.168804  BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms

 2027 09:15:29.172518  CPU physical address size: 39 bits

 2028 09:15:29.178590  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60

 2029 09:15:29.181929  CPU physical address size: 39 bits

 2030 09:15:29.185546  CPU physical address size: 39 bits

 2031 09:15:29.191945  MTRR: Fixed MSR 0x250 0x0606060606060606

 2032 09:15:29.195084  MTRR: Fixed MSR 0x250 0x0606060606060606

 2033 09:15:29.198514  MTRR: Fixed MSR 0x258 0x0606060606060606

 2034 09:15:29.202525  MTRR: Fixed MSR 0x259 0x0000000000000000

 2035 09:15:29.206273  MTRR: Fixed MSR 0x268 0x0606060606060606

 2036 09:15:29.211901  MTRR: Fixed MSR 0x269 0x0606060606060606

 2037 09:15:29.215403  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2038 09:15:29.218576  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2039 09:15:29.222080  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2040 09:15:29.228778  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2041 09:15:29.231910  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2042 09:15:29.235300  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2043 09:15:29.241709  MTRR: Fixed MSR 0x258 0x0606060606060606

 2044 09:15:29.245162  MTRR: Fixed MSR 0x259 0x0000000000000000

 2045 09:15:29.248596  MTRR: Fixed MSR 0x268 0x0606060606060606

 2046 09:15:29.252175  MTRR: Fixed MSR 0x269 0x0606060606060606

 2047 09:15:29.258696  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2048 09:15:29.261964  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2049 09:15:29.265308  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2050 09:15:29.268582  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2051 09:15:29.275597  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2052 09:15:29.279112  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2053 09:15:29.282023  call enable_fixed_mtrr()

 2054 09:15:29.284996  call enable_fixed_mtrr()

 2055 09:15:29.288371  Checking segment from ROM address 0xffc02b38

 2056 09:15:29.291493  CPU physical address size: 39 bits

 2057 09:15:29.295259  CPU physical address size: 39 bits

 2058 09:15:29.301938  Checking segment from ROM address 0xffc02b54

 2059 09:15:29.305068  Loading segment from ROM address 0xffc02b38

 2060 09:15:29.309058    code (compression=0)

 2061 09:15:29.314688    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64

 2062 09:15:29.324651  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64

 2063 09:15:29.328176  it's not compressed!

 2064 09:15:29.465903  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70

 2065 09:15:29.472309  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c

 2066 09:15:29.478993  Loading segment from ROM address 0xffc02b54

 2067 09:15:29.479083    Entry Point 0x30000000

 2068 09:15:29.482137  Loaded segments

 2069 09:15:29.488963  BS: BS_PAYLOAD_LOAD run times (exec / console): 251 / 64 ms

 2070 09:15:29.532136  Finalizing chipset.

 2071 09:15:29.535097  Finalizing SMM.

 2072 09:15:29.535189  APMC done.

 2073 09:15:29.542102  BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms

 2074 09:15:29.545295  mp_park_aps done after 0 msecs.

 2075 09:15:29.548424  Jumping to boot code at 0x30000000(0x76b25000)

 2076 09:15:29.558367  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes

 2077 09:15:29.558458  

 2078 09:15:29.558530  

 2079 09:15:29.562161  

 2080 09:15:29.562251  Starting depthcharge on Voema...

 2081 09:15:29.562604  end: 2.2.3 depthcharge-start (duration 00:00:04) [common]
 2082 09:15:29.562722  start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
 2083 09:15:29.562815  Setting prompt string to ['volteer:']
 2084 09:15:29.562904  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:47)
 2085 09:15:29.564962  

 2086 09:15:29.571439  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2087 09:15:29.571529  

 2088 09:15:29.578037  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2089 09:15:29.578127  

 2090 09:15:29.584523  Looking for NVMe Controller 0x3005f238 @ 00:1d:00

 2091 09:15:29.584614  

 2092 09:15:29.588116  Failed to find eMMC card reader

 2093 09:15:29.588217  

 2094 09:15:29.588288  Wipe memory regions:

 2095 09:15:29.591335  

 2096 09:15:29.594810  	[0x00000000001000, 0x000000000a0000)

 2097 09:15:29.594900  

 2098 09:15:29.597797  	[0x00000000100000, 0x00000030000000)

 2099 09:15:29.623949  

 2100 09:15:29.626840  	[0x00000032662db0, 0x000000769ef000)

 2101 09:15:29.662665  

 2102 09:15:29.665375  	[0x00000100000000, 0x00000280400000)

 2103 09:15:29.865881  

 2104 09:15:29.869291  ec_init: CrosEC protocol v3 supported (256, 256)

 2105 09:15:29.869440  

 2106 09:15:29.876001  update_port_state: port C0 state: usb enable 1 mux conn 0

 2107 09:15:29.876094  

 2108 09:15:29.882812  update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1

 2109 09:15:29.887100  

 2110 09:15:29.890206  pmc_check_ipc_sts: STS_BUSY done after 1561 us

 2111 09:15:29.890303  

 2112 09:15:29.894063  send_conn_disc_msg: pmc_send_cmd succeeded

 2113 09:15:30.325461  

 2114 09:15:30.325616  R8152: Initializing

 2115 09:15:30.325691  

 2116 09:15:30.328755  Version 6 (ocp_data = 5c30)

 2117 09:15:30.328846  

 2118 09:15:30.331750  R8152: Done initializing

 2119 09:15:30.331840  

 2120 09:15:30.335057  Adding net device

 2121 09:15:30.636740  

 2122 09:15:30.639644  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35

 2123 09:15:30.639740  

 2124 09:15:30.639811  


 2125 09:15:30.643384  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2127 09:15:30.743761  volteer: tftpboot 192.168.201.1 13757372/tftp-deploy-1hji3pvb/kernel/bzImage 13757372/tftp-deploy-1hji3pvb/kernel/cmdline 13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz

 2128 09:15:30.743942  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2129 09:15:30.744032  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:46)
 2130 09:15:30.747848  tftpboot 192.168.201.1 13757372/tftp-deploy-1hji3pvb/kernel/bzIploy-1hji3pvb/kernel/cmdline 13757372/tftp-deploy-1hji3pvb/ramdisk/ramdisk.cpio.gz

 2131 09:15:30.747942  

 2132 09:15:30.748013  Waiting for link

 2133 09:15:30.952104  

 2134 09:15:30.952253  done.

 2135 09:15:30.952328  

 2136 09:15:30.952395  MAC: 00:24:32:30:7b:87

 2137 09:15:30.952459  

 2138 09:15:30.955316  Sending DHCP discover... done.

 2139 09:15:30.955409  

 2140 09:15:30.959144  Waiting for reply... done.

 2141 09:15:30.959263  

 2142 09:15:30.961882  Sending DHCP request... done.

 2143 09:15:30.961974  

 2144 09:15:30.965390  Waiting for reply... done.

 2145 09:15:30.965503  

 2146 09:15:30.968468  My ip is 192.168.201.19

 2147 09:15:30.968559  

 2148 09:15:30.972123  The DHCP server ip is 192.168.201.1

 2149 09:15:30.972216  

 2150 09:15:30.975556  TFTP server IP predefined by user: 192.168.201.1

 2151 09:15:30.975649  

 2152 09:15:30.981917  Bootfile predefined by user: 13757372/tftp-deploy-1hji3pvb/kernel/bzImage

 2153 09:15:30.982018  

 2154 09:15:30.985199  Sending tftp read request... done.

 2155 09:15:30.985290  

 2156 09:15:30.992447  Waiting for the transfer... 

 2157 09:15:30.992566  

 2158 09:15:31.521229  00000000 ################################################################

 2159 09:15:31.521385  

 2160 09:15:32.060571  00080000 ################################################################

 2161 09:15:32.060726  

 2162 09:15:32.594303  00100000 ################################################################

 2163 09:15:32.594511  

 2164 09:15:33.138252  00180000 ################################################################

 2165 09:15:33.138412  

 2166 09:15:33.684200  00200000 ################################################################

 2167 09:15:33.684384  

 2168 09:15:34.225036  00280000 ################################################################

 2169 09:15:34.225191  

 2170 09:15:34.760118  00300000 ################################################################

 2171 09:15:34.760316  

 2172 09:15:35.299012  00380000 ################################################################

 2173 09:15:35.299170  

 2174 09:15:35.850732  00400000 ################################################################

 2175 09:15:35.850891  

 2176 09:15:36.401849  00480000 ################################################################

 2177 09:15:36.402004  

 2178 09:15:36.960692  00500000 ################################################################

 2179 09:15:36.960848  

 2180 09:15:37.497343  00580000 ################################################################

 2181 09:15:37.497559  

 2182 09:15:38.019380  00600000 ################################################################

 2183 09:15:38.019569  

 2184 09:15:38.550236  00680000 ################################################################

 2185 09:15:38.550391  

 2186 09:15:39.082429  00700000 ################################################################

 2187 09:15:39.082588  

 2188 09:15:39.616073  00780000 ################################################################

 2189 09:15:39.616215  

 2190 09:15:40.159073  00800000 ################################################################

 2191 09:15:40.159227  

 2192 09:15:40.696911  00880000 ################################################################

 2193 09:15:40.697067  

 2194 09:15:41.232961  00900000 ################################################################

 2195 09:15:41.233144  

 2196 09:15:41.771512  00980000 ################################################################

 2197 09:15:41.771659  

 2198 09:15:42.300419  00a00000 ################################################################

 2199 09:15:42.300570  

 2200 09:15:42.818689  00a80000 ################################################################

 2201 09:15:42.818847  

 2202 09:15:43.350871  00b00000 ################################################################

 2203 09:15:43.351023  

 2204 09:15:43.897098  00b80000 ################################################################

 2205 09:15:43.897284  

 2206 09:15:44.440758  00c00000 ################################################################

 2207 09:15:44.440918  

 2208 09:15:44.965791  00c80000 ################################################################

 2209 09:15:44.965936  

 2210 09:15:45.469332  00d00000 ############################################################ done.

 2211 09:15:45.469511  

 2212 09:15:45.472861  The bootfile was 14122896 bytes long.

 2213 09:15:45.472944  

 2214 09:15:45.476025  Sending tftp read request... done.

 2215 09:15:45.476113  

 2216 09:15:45.479159  Waiting for the transfer... 

 2217 09:15:45.479241  

 2218 09:15:45.993766  00000000 ################################################################

 2219 09:15:45.993918  

 2220 09:15:46.508373  00080000 ################################################################

 2221 09:15:46.508532  

 2222 09:15:47.040723  00100000 ################################################################

 2223 09:15:47.040879  

 2224 09:15:47.580439  00180000 ################################################################

 2225 09:15:47.580621  

 2226 09:15:48.108987  00200000 ################################################################

 2227 09:15:48.109134  

 2228 09:15:48.636636  00280000 ################################################################

 2229 09:15:48.636918  

 2230 09:15:49.159798  00300000 ################################################################

 2231 09:15:49.159938  

 2232 09:15:49.685539  00380000 ################################################################

 2233 09:15:49.685725  

 2234 09:15:50.214961  00400000 ################################################################

 2235 09:15:50.215146  

 2236 09:15:50.762037  00480000 ################################################################

 2237 09:15:50.762234  

 2238 09:15:51.299526  00500000 ################################################################

 2239 09:15:51.299709  

 2240 09:15:51.844205  00580000 ################################################################

 2241 09:15:51.844389  

 2242 09:15:52.377693  00600000 ################################################################

 2243 09:15:52.377843  

 2244 09:15:52.909530  00680000 ################################################################

 2245 09:15:52.909712  

 2246 09:15:53.442065  00700000 ################################################################

 2247 09:15:53.442250  

 2248 09:15:53.968874  00780000 ################################################################

 2249 09:15:53.969060  

 2250 09:15:54.496468  00800000 ################################################################

 2251 09:15:54.496681  

 2252 09:15:54.717750  00880000 ############################ done.

 2253 09:15:54.717961  

 2254 09:15:54.720792  Sending tftp read request... done.

 2255 09:15:54.720941  

 2256 09:15:54.724416  Waiting for the transfer... 

 2257 09:15:54.724558  

 2258 09:15:54.727564  00000000 # done.

 2259 09:15:54.727709  

 2260 09:15:54.734487  Command line loaded dynamically from TFTP file: 13757372/tftp-deploy-1hji3pvb/kernel/cmdline

 2261 09:15:54.734631  

 2262 09:15:54.750936  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2263 09:15:54.756206  

 2264 09:15:54.759706  Shutting down all USB controllers.

 2265 09:15:54.759853  

 2266 09:15:54.759966  Removing current net device

 2267 09:15:54.760082  

 2268 09:15:54.763133  Finalizing coreboot

 2269 09:15:54.763266  

 2270 09:15:54.769318  Exiting depthcharge with code 4 at timestamp: 33869538

 2271 09:15:54.769489  

 2272 09:15:54.769612  

 2273 09:15:54.769729  Starting kernel ...

 2274 09:15:54.769842  

 2275 09:15:54.769954  

 2276 09:15:54.770572  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2277 09:15:54.770745  start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
 2278 09:15:54.770885  Setting prompt string to ['Linux version [0-9]']
 2279 09:15:54.771009  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2280 09:15:54.771133  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2282 09:20:16.770992  end: 2.2.5 auto-login-action (duration 00:04:22) [common]
 2284 09:20:16.771332  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
 2286 09:20:16.771565  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2289 09:20:16.771991  end: 2 depthcharge-action (duration 00:05:00) [common]
 2291 09:20:16.772347  Cleaning after the job
 2292 09:20:16.772470  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/ramdisk
 2293 09:20:16.773659  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/kernel
 2294 09:20:16.775283  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757372/tftp-deploy-1hji3pvb/modules
 2295 09:20:16.775736  start: 4.1 power-off (timeout 00:00:30) [common]
 2296 09:20:16.776049  Calling: ['pduclient', '--daemon=localhost', '--hostname=acer-cp514-2h-1130g7-volteer-cbg-4', '--port=1', '--command=off']
 2297 09:20:17.717249  >> Command sent successfully.

 2298 09:20:17.720012  Returned 0 in 0 seconds
 2299 09:20:17.820410  end: 4.1 power-off (duration 00:00:01) [common]
 2301 09:20:17.820744  start: 4.2 read-feedback (timeout 00:09:59) [common]
 2302 09:20:17.821017  Listened to connection for namespace 'common' for up to 1s
 2304 09:20:17.821407  Listened to connection for namespace 'common' for up to 1s
 2305 09:20:18.821539  Finalising connection for namespace 'common'
 2306 09:20:18.821713  Disconnecting from shell: Finalise
 2307 09:20:18.821797  
 2308 09:20:18.922135  end: 4.2 read-feedback (duration 00:00:01) [common]
 2309 09:20:18.922295  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13757372
 2310 09:20:18.937933  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13757372
 2311 09:20:18.938094  JobError: Your job cannot terminate cleanly.