Boot log: asus-C436FA-Flip-hatch
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Kernel Errors: 0
- Boot result: FAIL
1 09:02:36.022417 lava-dispatcher, installed at version: 2024.03
2 09:02:36.022650 start: 0 validate
3 09:02:36.022828 Start time: 2024-05-13 09:02:36.022817+00:00 (UTC)
4 09:02:36.022998 Using caching service: 'http://localhost/cache/?uri=%s'
5 09:02:36.023189 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Fx86%2Frootfs.cpio.gz exists
6 09:02:36.026566 Using caching service: 'http://localhost/cache/?uri=%s'
7 09:02:36.026754 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fkernel%2FbzImage exists
8 09:02:36.283635 Using caching service: 'http://localhost/cache/?uri=%s'
9 09:02:36.283817 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv4.4.302-cip87-rt49%2Fx86_64%2Fx86_64_defconfig%2Bx86-board%2Fgcc-10%2Fmodules.tar.xz exists
10 09:02:36.542274 validate duration: 0.52
12 09:02:36.542631 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 09:02:36.542775 start: 1.1 download-retry (timeout 00:10:00) [common]
14 09:02:36.542898 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 09:02:36.543045 Not decompressing ramdisk as can be used compressed.
16 09:02:36.543147 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/x86/rootfs.cpio.gz
17 09:02:36.543244 saving as /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/ramdisk/rootfs.cpio.gz
18 09:02:36.543332 total size: 8417901 (8 MB)
19 09:02:36.544943 progress 0 % (0 MB)
20 09:02:36.547379 progress 5 % (0 MB)
21 09:02:36.549798 progress 10 % (0 MB)
22 09:02:36.552290 progress 15 % (1 MB)
23 09:02:36.554768 progress 20 % (1 MB)
24 09:02:36.557114 progress 25 % (2 MB)
25 09:02:36.559376 progress 30 % (2 MB)
26 09:02:36.561514 progress 35 % (2 MB)
27 09:02:36.563928 progress 40 % (3 MB)
28 09:02:36.566324 progress 45 % (3 MB)
29 09:02:36.568755 progress 50 % (4 MB)
30 09:02:36.571117 progress 55 % (4 MB)
31 09:02:36.573541 progress 60 % (4 MB)
32 09:02:36.575742 progress 65 % (5 MB)
33 09:02:36.577953 progress 70 % (5 MB)
34 09:02:36.580162 progress 75 % (6 MB)
35 09:02:36.582373 progress 80 % (6 MB)
36 09:02:36.584590 progress 85 % (6 MB)
37 09:02:36.586821 progress 90 % (7 MB)
38 09:02:36.589037 progress 95 % (7 MB)
39 09:02:36.591091 progress 100 % (8 MB)
40 09:02:36.591324 8 MB downloaded in 0.05 s (167.27 MB/s)
41 09:02:36.591484 end: 1.1.1 http-download (duration 00:00:00) [common]
43 09:02:36.591726 end: 1.1 download-retry (duration 00:00:00) [common]
44 09:02:36.591813 start: 1.2 download-retry (timeout 00:10:00) [common]
45 09:02:36.591900 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 09:02:36.592037 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip87-rt49/x86_64/x86_64_defconfig+x86-board/gcc-10/kernel/bzImage
47 09:02:36.592111 saving as /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/kernel/bzImage
48 09:02:36.592174 total size: 14122896 (13 MB)
49 09:02:36.592236 No compression specified
50 09:02:36.593336 progress 0 % (0 MB)
51 09:02:36.596955 progress 5 % (0 MB)
52 09:02:36.600749 progress 10 % (1 MB)
53 09:02:36.604384 progress 15 % (2 MB)
54 09:02:36.608196 progress 20 % (2 MB)
55 09:02:36.611768 progress 25 % (3 MB)
56 09:02:36.615528 progress 30 % (4 MB)
57 09:02:36.619109 progress 35 % (4 MB)
58 09:02:36.622886 progress 40 % (5 MB)
59 09:02:36.626497 progress 45 % (6 MB)
60 09:02:36.630303 progress 50 % (6 MB)
61 09:02:36.634091 progress 55 % (7 MB)
62 09:02:36.637735 progress 60 % (8 MB)
63 09:02:36.641509 progress 65 % (8 MB)
64 09:02:36.645176 progress 70 % (9 MB)
65 09:02:36.649063 progress 75 % (10 MB)
66 09:02:36.652719 progress 80 % (10 MB)
67 09:02:36.656557 progress 85 % (11 MB)
68 09:02:36.660206 progress 90 % (12 MB)
69 09:02:36.664309 progress 95 % (12 MB)
70 09:02:36.668109 progress 100 % (13 MB)
71 09:02:36.668394 13 MB downloaded in 0.08 s (176.72 MB/s)
72 09:02:36.668598 end: 1.2.1 http-download (duration 00:00:00) [common]
74 09:02:36.668969 end: 1.2 download-retry (duration 00:00:00) [common]
75 09:02:36.669086 start: 1.3 download-retry (timeout 00:10:00) [common]
76 09:02:36.669202 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 09:02:36.669379 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v4.4.302-cip87-rt49/x86_64/x86_64_defconfig+x86-board/gcc-10/modules.tar.xz
78 09:02:36.669477 saving as /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/modules/modules.tar
79 09:02:36.669577 total size: 486540 (0 MB)
80 09:02:36.669655 Using unxz to decompress xz
81 09:02:36.674144 progress 6 % (0 MB)
82 09:02:36.674599 progress 13 % (0 MB)
83 09:02:36.674889 progress 20 % (0 MB)
84 09:02:36.676591 progress 26 % (0 MB)
85 09:02:36.678591 progress 33 % (0 MB)
86 09:02:36.680608 progress 40 % (0 MB)
87 09:02:36.682695 progress 47 % (0 MB)
88 09:02:36.684546 progress 53 % (0 MB)
89 09:02:36.686351 progress 60 % (0 MB)
90 09:02:36.688441 progress 67 % (0 MB)
91 09:02:36.690221 progress 74 % (0 MB)
92 09:02:36.692297 progress 80 % (0 MB)
93 09:02:36.694144 progress 87 % (0 MB)
94 09:02:36.696205 progress 94 % (0 MB)
95 09:02:36.698099 progress 100 % (0 MB)
96 09:02:36.704561 0 MB downloaded in 0.03 s (13.27 MB/s)
97 09:02:36.704833 end: 1.3.1 http-download (duration 00:00:00) [common]
99 09:02:36.705106 end: 1.3 download-retry (duration 00:00:00) [common]
100 09:02:36.705219 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 09:02:36.705319 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 09:02:36.705409 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 09:02:36.705506 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 09:02:36.705736 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a
105 09:02:36.705873 makedir: /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin
106 09:02:36.705994 makedir: /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/tests
107 09:02:36.706134 makedir: /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/results
108 09:02:36.706302 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-add-keys
109 09:02:36.706499 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-add-sources
110 09:02:36.706659 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-background-process-start
111 09:02:36.706824 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-background-process-stop
112 09:02:36.706996 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-common-functions
113 09:02:36.707146 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-echo-ipv4
114 09:02:36.707280 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-install-packages
115 09:02:36.707409 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-installed-packages
116 09:02:36.707548 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-os-build
117 09:02:36.707710 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-probe-channel
118 09:02:36.707871 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-probe-ip
119 09:02:36.708030 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-target-ip
120 09:02:36.708190 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-target-mac
121 09:02:36.708365 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-target-storage
122 09:02:36.708500 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-case
123 09:02:36.708629 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-event
124 09:02:36.708753 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-feedback
125 09:02:36.708885 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-raise
126 09:02:36.709026 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-reference
127 09:02:36.709155 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-runner
128 09:02:36.709283 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-set
129 09:02:36.709413 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-test-shell
130 09:02:36.709542 Updating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-install-packages (oe)
131 09:02:36.709701 Updating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/bin/lava-installed-packages (oe)
132 09:02:36.709829 Creating /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/environment
133 09:02:36.709930 LAVA metadata
134 09:02:36.710005 - LAVA_JOB_ID=13757419
135 09:02:36.710069 - LAVA_DISPATCHER_IP=192.168.201.1
136 09:02:36.710183 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 09:02:36.710257 skipped lava-vland-overlay
138 09:02:36.710337 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 09:02:36.710450 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 09:02:36.710539 skipped lava-multinode-overlay
141 09:02:36.710656 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 09:02:36.710755 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 09:02:36.710836 Loading test definitions
144 09:02:36.710932 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 09:02:36.711008 Using /lava-13757419 at stage 0
146 09:02:36.711334 uuid=13757419_1.4.2.3.1 testdef=None
147 09:02:36.711426 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 09:02:36.711513 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 09:02:36.712070 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 09:02:36.712299 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 09:02:36.712977 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 09:02:36.713208 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 09:02:36.713975 runner path: /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/0/tests/0_dmesg test_uuid 13757419_1.4.2.3.1
156 09:02:36.714142 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 09:02:36.714381 Creating lava-test-runner.conf files
159 09:02:36.714473 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/13757419/lava-overlay-4eeg9f5a/lava-13757419/0 for stage 0
160 09:02:36.714602 - 0_dmesg
161 09:02:36.714737 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 09:02:36.714861 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
163 09:02:36.722722 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 09:02:36.722899 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
165 09:02:36.723028 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 09:02:36.723148 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 09:02:36.723269 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
168 09:02:36.990126 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
169 09:02:36.990484 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
170 09:02:36.990594 extracting modules file /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/13757419/extract-overlay-ramdisk-iryq_8v2/ramdisk
171 09:02:37.007867 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 09:02:37.008064 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
173 09:02:37.008194 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757419/compress-overlay-fr833xmp/overlay-1.4.2.4.tar.gz to ramdisk
174 09:02:37.008297 [common] Applying overlay /var/lib/lava/dispatcher/tmp/13757419/compress-overlay-fr833xmp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/13757419/extract-overlay-ramdisk-iryq_8v2/ramdisk
175 09:02:37.018163 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 09:02:37.018336 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
177 09:02:37.018471 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 09:02:37.018603 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
179 09:02:37.018723 Building ramdisk /var/lib/lava/dispatcher/tmp/13757419/extract-overlay-ramdisk-iryq_8v2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/13757419/extract-overlay-ramdisk-iryq_8v2/ramdisk
180 09:02:37.155915 >> 51692 blocks
181 09:02:38.084790 rename /var/lib/lava/dispatcher/tmp/13757419/extract-overlay-ramdisk-iryq_8v2/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
182 09:02:38.085225 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
183 09:02:38.085370 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
184 09:02:38.085476 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
185 09:02:38.085582 No mkimage arch provided, not using FIT.
186 09:02:38.085672 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 09:02:38.085759 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 09:02:38.085868 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
189 09:02:38.085958 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
190 09:02:38.086038 No LXC device requested
191 09:02:38.086149 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 09:02:38.086274 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
193 09:02:38.086390 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 09:02:38.086493 Checking files for TFTP limit of 4294967296 bytes.
195 09:02:38.087059 end: 1 tftp-deploy (duration 00:00:02) [common]
196 09:02:38.087222 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 09:02:38.087359 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 09:02:38.087535 substitutions:
199 09:02:38.087638 - {DTB}: None
200 09:02:38.087734 - {INITRD}: 13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
201 09:02:38.087824 - {KERNEL}: 13757419/tftp-deploy-f517a00_/kernel/bzImage
202 09:02:38.087917 - {LAVA_MAC}: None
203 09:02:38.088004 - {PRESEED_CONFIG}: None
204 09:02:38.088092 - {PRESEED_LOCAL}: None
205 09:02:38.088180 - {RAMDISK}: 13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
206 09:02:38.088266 - {ROOT_PART}: None
207 09:02:38.088362 - {ROOT}: None
208 09:02:38.088426 - {SERVER_IP}: 192.168.201.1
209 09:02:38.088482 - {TEE}: None
210 09:02:38.088537 Parsed boot commands:
211 09:02:38.088594 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 09:02:38.088778 Parsed boot commands: tftpboot 192.168.201.1 13757419/tftp-deploy-f517a00_/kernel/bzImage 13757419/tftp-deploy-f517a00_/kernel/cmdline 13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
213 09:02:38.088871 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 09:02:38.088959 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 09:02:38.089062 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 09:02:38.089162 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 09:02:38.089266 Not connected, no need to disconnect.
218 09:02:38.089380 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 09:02:38.089497 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 09:02:38.089597 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh asus-C436FA-Flip-hatch-cbg-3'
221 09:02:38.093147 Setting prompt string to ['lava-test: # ']
222 09:02:38.093762 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 09:02:38.093916 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 09:02:38.094054 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 09:02:38.094194 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 09:02:38.094540 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-3', '--port=1', '--command=reboot']
227 09:02:43.224443 >> Command sent successfully.
228 09:02:43.227080 Returned 0 in 5 seconds
229 09:02:43.327517 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 09:02:43.328014 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 09:02:43.328206 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 09:02:43.328357 Setting prompt string to 'Starting depthcharge on Helios...'
234 09:02:43.328496 Changing prompt to 'Starting depthcharge on Helios...'
235 09:02:43.328584 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
236 09:02:43.329113 [Enter `^Ec?' for help]
237 09:02:43.950623
238 09:02:43.950802
239 09:02:43.959998 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
240 09:02:43.963844 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
241 09:02:43.970293 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
242 09:02:43.973395 CPU: AES supported, TXT NOT supported, VT supported
243 09:02:43.980047 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
244 09:02:43.983664 PCH: device id 0284 (rev 00) is Cometlake-U Premium
245 09:02:43.989719 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
246 09:02:43.993442 VBOOT: Loading verstage.
247 09:02:43.996482 FMAP: Found "FLASH" version 1.1 at 0xc04000.
248 09:02:44.003290 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
249 09:02:44.007042 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
250 09:02:44.009690 CBFS @ c08000 size 3f8000
251 09:02:44.016609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
252 09:02:44.020213 CBFS: Locating 'fallback/verstage'
253 09:02:44.023264 CBFS: Found @ offset 10fb80 size 1072c
254 09:02:44.023350
255 09:02:44.023417
256 09:02:44.036351 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
257 09:02:44.050554 Probing TPM: . done!
258 09:02:44.053991 TPM ready after 0 ms
259 09:02:44.057151 Connected to device vid:did:rid of 1ae0:0028:00
260 09:02:44.067207 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
261 09:02:44.070371 Initialized TPM device CR50 revision 0
262 09:02:44.132677 tlcl_send_startup: Startup return code is 0
263 09:02:44.132815 TPM: setup succeeded
264 09:02:44.145236 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
265 09:02:44.148790 Chrome EC: UHEPI supported
266 09:02:44.152516 Phase 1
267 09:02:44.156116 FMAP: area GBB found @ c05000 (12288 bytes)
268 09:02:44.162266 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
269 09:02:44.162369 Phase 2
270 09:02:44.165752 Phase 3
271 09:02:44.169178 FMAP: area GBB found @ c05000 (12288 bytes)
272 09:02:44.176032 VB2:vb2_report_dev_firmware() This is developer signed firmware
273 09:02:44.182787 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
274 09:02:44.185653 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
275 09:02:44.191968 VB2:vb2_verify_keyblock() Checking keyblock signature...
276 09:02:44.207812 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 09:02:44.210949 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 09:02:44.217537 VB2:vb2_verify_fw_preamble() Verifying preamble.
279 09:02:44.222098 Phase 4
280 09:02:44.225027 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
281 09:02:44.231794 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
282 09:02:44.411281 VB2:vb2_rsa_verify_digest() Digest check failed!
283 09:02:44.418011 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
284 09:02:44.418151 Saving nvdata
285 09:02:44.421602 Reboot requested (10020007)
286 09:02:44.424611 board_reset() called!
287 09:02:44.424697 full_reset() called!
288 09:02:48.916492
289 09:02:48.916626
290 09:02:48.926159 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
291 09:02:48.929302 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
292 09:02:48.935805 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
293 09:02:48.939368 CPU: AES supported, TXT NOT supported, VT supported
294 09:02:48.945712 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
295 09:02:48.949586 PCH: device id 0284 (rev 00) is Cometlake-U Premium
296 09:02:48.956119 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
297 09:02:48.959380 VBOOT: Loading verstage.
298 09:02:48.962266 FMAP: Found "FLASH" version 1.1 at 0xc04000.
299 09:02:48.969358 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
300 09:02:48.976027 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
301 09:02:48.976135 CBFS @ c08000 size 3f8000
302 09:02:48.982815 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
303 09:02:48.985849 CBFS: Locating 'fallback/verstage'
304 09:02:48.988824 CBFS: Found @ offset 10fb80 size 1072c
305 09:02:48.993467
306 09:02:48.993570
307 09:02:49.002578 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
308 09:02:49.017498 Probing TPM: . done!
309 09:02:49.020435 TPM ready after 0 ms
310 09:02:49.023912 Connected to device vid:did:rid of 1ae0:0028:00
311 09:02:49.034338 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
312 09:02:49.037278 Initialized TPM device CR50 revision 0
313 09:02:49.099371 tlcl_send_startup: Startup return code is 0
314 09:02:49.099510 TPM: setup succeeded
315 09:02:49.112018 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
316 09:02:49.116215 Chrome EC: UHEPI supported
317 09:02:49.119152 Phase 1
318 09:02:49.123077 FMAP: area GBB found @ c05000 (12288 bytes)
319 09:02:49.129712 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
320 09:02:49.136532 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
321 09:02:49.139504 Recovery requested (1009000e)
322 09:02:49.144513 Saving nvdata
323 09:02:49.151231 tlcl_extend: response is 0
324 09:02:49.160221 tlcl_extend: response is 0
325 09:02:49.167105 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
326 09:02:49.170080 CBFS @ c08000 size 3f8000
327 09:02:49.177245 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
328 09:02:49.180067 CBFS: Locating 'fallback/romstage'
329 09:02:49.183587 CBFS: Found @ offset 80 size 145fc
330 09:02:49.186983 Accumulated console time in verstage 98 ms
331 09:02:49.187092
332 09:02:49.187211
333 09:02:49.199811 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
334 09:02:49.206648 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
335 09:02:49.209916 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
336 09:02:49.213462 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
337 09:02:49.219947 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
338 09:02:49.222906 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
339 09:02:49.226642 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
340 09:02:49.229550 TCO_STS: 0000 0000
341 09:02:49.233316 GEN_PMCON: e0015238 00000200
342 09:02:49.236190 GBLRST_CAUSE: 00000000 00000000
343 09:02:49.236308 prev_sleep_state 5
344 09:02:49.240107 Boot Count incremented to 14625
345 09:02:49.246536 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 09:02:49.249717 CBFS @ c08000 size 3f8000
347 09:02:49.256217 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 09:02:49.256331 CBFS: Locating 'fspm.bin'
349 09:02:49.262963 CBFS: Found @ offset 5ffc0 size 71000
350 09:02:49.266764 Chrome EC: UHEPI supported
351 09:02:49.272611 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
352 09:02:49.276358 Probing TPM: done!
353 09:02:49.283139 Connected to device vid:did:rid of 1ae0:0028:00
354 09:02:49.293132 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
355 09:02:49.299083 Initialized TPM device CR50 revision 0
356 09:02:49.307946 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
357 09:02:49.314653 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
358 09:02:49.318351 MRC cache found, size 1948
359 09:02:49.321518 bootmode is set to: 2
360 09:02:49.324646 PRMRR disabled by config.
361 09:02:49.324734 SPD INDEX = 1
362 09:02:49.331634 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
363 09:02:49.334316 CBFS @ c08000 size 3f8000
364 09:02:49.341216 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
365 09:02:49.341335 CBFS: Locating 'spd.bin'
366 09:02:49.344126 CBFS: Found @ offset 5fb80 size 400
367 09:02:49.348061 SPD: module type is LPDDR3
368 09:02:49.350850 SPD: module part is
369 09:02:49.357575 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
370 09:02:49.361198 SPD: device width 4 bits, bus width 8 bits
371 09:02:49.364126 SPD: module size is 4096 MB (per channel)
372 09:02:49.368044 memory slot: 0 configuration done.
373 09:02:49.370980 memory slot: 2 configuration done.
374 09:02:49.422404 CBMEM:
375 09:02:49.425936 IMD: root @ 99fff000 254 entries.
376 09:02:49.428766 IMD: root @ 99ffec00 62 entries.
377 09:02:49.432644 External stage cache:
378 09:02:49.435584 IMD: root @ 9abff000 254 entries.
379 09:02:49.438559 IMD: root @ 9abfec00 62 entries.
380 09:02:49.445783 Chrome EC: clear events_b mask to 0x0000000020004000
381 09:02:49.458204 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
382 09:02:49.471867 tlcl_write: response is 0
383 09:02:49.480852 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
384 09:02:49.487400 MRC: TPM MRC hash updated successfully.
385 09:02:49.487498 2 DIMMs found
386 09:02:49.490172 SMM Memory Map
387 09:02:49.493872 SMRAM : 0x9a000000 0x1000000
388 09:02:49.496892 Subregion 0: 0x9a000000 0xa00000
389 09:02:49.500561 Subregion 1: 0x9aa00000 0x200000
390 09:02:49.503656 Subregion 2: 0x9ac00000 0x400000
391 09:02:49.507410 top_of_ram = 0x9a000000
392 09:02:49.510276 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
393 09:02:49.517116 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
394 09:02:49.520076 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 09:02:49.527021 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
396 09:02:49.530029 CBFS @ c08000 size 3f8000
397 09:02:49.533598 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
398 09:02:49.537223 CBFS: Locating 'fallback/postcar'
399 09:02:49.543326 CBFS: Found @ offset 107000 size 4b44
400 09:02:49.546992 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
401 09:02:49.559401 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
402 09:02:49.562533 Processing 180 relocs. Offset value of 0x97c0c000
403 09:02:49.571483 Accumulated console time in romstage 286 ms
404 09:02:49.571578
405 09:02:49.571659
406 09:02:49.581082 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
407 09:02:49.587425 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 09:02:49.591102 CBFS @ c08000 size 3f8000
409 09:02:49.594054 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 09:02:49.600765 CBFS: Locating 'fallback/ramstage'
411 09:02:49.604539 CBFS: Found @ offset 43380 size 1b9e8
412 09:02:49.610244 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
413 09:02:49.642988 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
414 09:02:49.645990 Processing 3976 relocs. Offset value of 0x98db0000
415 09:02:49.652660 Accumulated console time in postcar 52 ms
416 09:02:49.652746
417 09:02:49.652818
418 09:02:49.662774 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
419 09:02:49.669680 FMAP: area RO_VPD found @ c00000 (16384 bytes)
420 09:02:49.672735 WARNING: RO_VPD is uninitialized or empty.
421 09:02:49.675813 FMAP: area RW_VPD found @ af8000 (8192 bytes)
422 09:02:49.682589 FMAP: area RW_VPD found @ af8000 (8192 bytes)
423 09:02:49.682673 Normal boot.
424 09:02:49.689381 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
425 09:02:49.692952 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
426 09:02:49.695827 CBFS @ c08000 size 3f8000
427 09:02:49.702264 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
428 09:02:49.705616 CBFS: Locating 'cpu_microcode_blob.bin'
429 09:02:49.708914 CBFS: Found @ offset 14700 size 2ec00
430 09:02:49.712164 microcode: sig=0x806ec pf=0x4 revision=0xc9
431 09:02:49.715962 Skip microcode update
432 09:02:49.722172 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
433 09:02:49.722268 CBFS @ c08000 size 3f8000
434 09:02:49.728830 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
435 09:02:49.732214 CBFS: Locating 'fsps.bin'
436 09:02:49.735654 CBFS: Found @ offset d1fc0 size 35000
437 09:02:49.760748 Detected 4 core, 8 thread CPU.
438 09:02:49.764300 Setting up SMI for CPU
439 09:02:49.767863 IED base = 0x9ac00000
440 09:02:49.767954 IED size = 0x00400000
441 09:02:49.770773 Will perform SMM setup.
442 09:02:49.777713 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
443 09:02:49.784273 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
444 09:02:49.787401 Processing 16 relocs. Offset value of 0x00030000
445 09:02:49.791156 Attempting to start 7 APs
446 09:02:49.794241 Waiting for 10ms after sending INIT.
447 09:02:49.810606 Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
448 09:02:49.810706 done.
449 09:02:49.814430 AP: slot 5 apic_id 7.
450 09:02:49.817031 AP: slot 4 apic_id 6.
451 09:02:49.820503 Waiting for 2nd SIPI to complete...done.
452 09:02:49.823841 AP: slot 3 apic_id 2.
453 09:02:49.823923 AP: slot 1 apic_id 3.
454 09:02:49.827604 AP: slot 6 apic_id 4.
455 09:02:49.830492 AP: slot 7 apic_id 5.
456 09:02:49.837328 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
457 09:02:49.844263 Processing 13 relocs. Offset value of 0x00038000
458 09:02:49.847048 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
459 09:02:49.853883 Installing SMM handler to 0x9a000000
460 09:02:49.860260 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
461 09:02:49.867199 Processing 658 relocs. Offset value of 0x9a010000
462 09:02:49.873796 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
463 09:02:49.876887 Processing 13 relocs. Offset value of 0x9a008000
464 09:02:49.883376 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
465 09:02:49.890214 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
466 09:02:49.896681 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
467 09:02:49.899976 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
468 09:02:49.906744 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
469 09:02:49.913413 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
470 09:02:49.916308 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
471 09:02:49.923061 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
472 09:02:49.926532 Clearing SMI status registers
473 09:02:49.929754 SMI_STS: PM1
474 09:02:49.929835 PM1_STS: PWRBTN
475 09:02:49.933081 TCO_STS: SECOND_TO
476 09:02:49.936918 New SMBASE 0x9a000000
477 09:02:49.939826 In relocation handler: CPU 0
478 09:02:49.943617 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
479 09:02:49.947020 Writing SMRR. base = 0x9a000006, mask=0xff000800
480 09:02:49.949808 Relocation complete.
481 09:02:49.953476 New SMBASE 0x99fff800
482 09:02:49.956286 In relocation handler: CPU 2
483 09:02:49.960010 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
484 09:02:49.963400 Writing SMRR. base = 0x9a000006, mask=0xff000800
485 09:02:49.966406 Relocation complete.
486 09:02:49.970126 New SMBASE 0x99fffc00
487 09:02:49.970236 In relocation handler: CPU 1
488 09:02:49.977004 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
489 09:02:49.979917 Writing SMRR. base = 0x9a000006, mask=0xff000800
490 09:02:49.983091 Relocation complete.
491 09:02:49.983197 New SMBASE 0x99fff400
492 09:02:49.986768 In relocation handler: CPU 3
493 09:02:49.993398 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
494 09:02:49.996666 Writing SMRR. base = 0x9a000006, mask=0xff000800
495 09:02:49.999754 Relocation complete.
496 09:02:49.999865 New SMBASE 0x99ffec00
497 09:02:50.003261 In relocation handler: CPU 5
498 09:02:50.006722 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
499 09:02:50.013790 Writing SMRR. base = 0x9a000006, mask=0xff000800
500 09:02:50.016692 Relocation complete.
501 09:02:50.016805 New SMBASE 0x99fff000
502 09:02:50.019723 In relocation handler: CPU 4
503 09:02:50.022811 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
504 09:02:50.029745 Writing SMRR. base = 0x9a000006, mask=0xff000800
505 09:02:50.032780 Relocation complete.
506 09:02:50.032862 New SMBASE 0x99ffe400
507 09:02:50.036437 In relocation handler: CPU 7
508 09:02:50.039815 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
509 09:02:50.046251 Writing SMRR. base = 0x9a000006, mask=0xff000800
510 09:02:50.046372 Relocation complete.
511 09:02:50.049489 New SMBASE 0x99ffe800
512 09:02:50.053115 In relocation handler: CPU 6
513 09:02:50.056116 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
514 09:02:50.063343 Writing SMRR. base = 0x9a000006, mask=0xff000800
515 09:02:50.063467 Relocation complete.
516 09:02:50.066033 Initializing CPU #0
517 09:02:50.069945 CPU: vendor Intel device 806ec
518 09:02:50.072522 CPU: family 06, model 8e, stepping 0c
519 09:02:50.076009 Clearing out pending MCEs
520 09:02:50.079800 Setting up local APIC...
521 09:02:50.079884 apic_id: 0x00 done.
522 09:02:50.082875 Turbo is available but hidden
523 09:02:50.086102 Turbo is available and visible
524 09:02:50.089793 VMX status: enabled
525 09:02:50.092766 IA32_FEATURE_CONTROL status: locked
526 09:02:50.096656 Skip microcode update
527 09:02:50.096739 CPU #0 initialized
528 09:02:50.099561 Initializing CPU #2
529 09:02:50.099645 Initializing CPU #4
530 09:02:50.102372 Initializing CPU #5
531 09:02:50.106017 CPU: vendor Intel device 806ec
532 09:02:50.109678 CPU: family 06, model 8e, stepping 0c
533 09:02:50.112423 Initializing CPU #3
534 09:02:50.112510 Initializing CPU #1
535 09:02:50.115760 CPU: vendor Intel device 806ec
536 09:02:50.122469 CPU: family 06, model 8e, stepping 0c
537 09:02:50.122582 CPU: vendor Intel device 806ec
538 09:02:50.128839 CPU: family 06, model 8e, stepping 0c
539 09:02:50.128988 Clearing out pending MCEs
540 09:02:50.132722 Clearing out pending MCEs
541 09:02:50.135692 Setting up local APIC...
542 09:02:50.139434 CPU: vendor Intel device 806ec
543 09:02:50.142331 CPU: family 06, model 8e, stepping 0c
544 09:02:50.145185 Clearing out pending MCEs
545 09:02:50.148764 Setting up local APIC...
546 09:02:50.148853 Setting up local APIC...
547 09:02:50.151897 Initializing CPU #6
548 09:02:50.155437 apic_id: 0x02 done.
549 09:02:50.155546 apic_id: 0x03 done.
550 09:02:50.158524 VMX status: enabled
551 09:02:50.162144 VMX status: enabled
552 09:02:50.165321 IA32_FEATURE_CONTROL status: locked
553 09:02:50.169009 IA32_FEATURE_CONTROL status: locked
554 09:02:50.169129 Skip microcode update
555 09:02:50.172042 Skip microcode update
556 09:02:50.175685 CPU #3 initialized
557 09:02:50.175794 CPU #1 initialized
558 09:02:50.178369 CPU: vendor Intel device 806ec
559 09:02:50.181617 CPU: family 06, model 8e, stepping 0c
560 09:02:50.185096 Initializing CPU #7
561 09:02:50.188192 Clearing out pending MCEs
562 09:02:50.191820 CPU: vendor Intel device 806ec
563 09:02:50.195417 CPU: family 06, model 8e, stepping 0c
564 09:02:50.198594 Clearing out pending MCEs
565 09:02:50.198716 Setting up local APIC...
566 09:02:50.202045 apic_id: 0x01 done.
567 09:02:50.205121 CPU: vendor Intel device 806ec
568 09:02:50.208199 CPU: family 06, model 8e, stepping 0c
569 09:02:50.211175 Clearing out pending MCEs
570 09:02:50.214925 Clearing out pending MCEs
571 09:02:50.218154 Setting up local APIC...
572 09:02:50.218275 Setting up local APIC...
573 09:02:50.221638 VMX status: enabled
574 09:02:50.224644 Setting up local APIC...
575 09:02:50.228226 IA32_FEATURE_CONTROL status: locked
576 09:02:50.228361 apic_id: 0x04 done.
577 09:02:50.231126 apic_id: 0x05 done.
578 09:02:50.234630 VMX status: enabled
579 09:02:50.234746 VMX status: enabled
580 09:02:50.237932 IA32_FEATURE_CONTROL status: locked
581 09:02:50.244454 IA32_FEATURE_CONTROL status: locked
582 09:02:50.244543 Skip microcode update
583 09:02:50.248082 Skip microcode update
584 09:02:50.248190 CPU #6 initialized
585 09:02:50.251348 CPU #7 initialized
586 09:02:50.254770 Skip microcode update
587 09:02:50.254890 apic_id: 0x06 done.
588 09:02:50.257646 apic_id: 0x07 done.
589 09:02:50.261066 VMX status: enabled
590 09:02:50.261145 CPU #2 initialized
591 09:02:50.264270 VMX status: enabled
592 09:02:50.267601 IA32_FEATURE_CONTROL status: locked
593 09:02:50.271016 IA32_FEATURE_CONTROL status: locked
594 09:02:50.274615 Skip microcode update
595 09:02:50.274726 Skip microcode update
596 09:02:50.277810 CPU #4 initialized
597 09:02:50.280817 CPU #5 initialized
598 09:02:50.284415 bsp_do_flight_plan done after 461 msecs.
599 09:02:50.287449 CPU: frequency set to 4200 MHz
600 09:02:50.287537 Enabling SMIs.
601 09:02:50.291084 Locking SMM.
602 09:02:50.304625 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
603 09:02:50.308087 CBFS @ c08000 size 3f8000
604 09:02:50.314878 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
605 09:02:50.315014 CBFS: Locating 'vbt.bin'
606 09:02:50.317980 CBFS: Found @ offset 5f5c0 size 499
607 09:02:50.324794 Found a VBT of 4608 bytes after decompression
608 09:02:50.506572 Display FSP Version Info HOB
609 09:02:50.509541 Reference Code - CPU = 9.0.1e.30
610 09:02:50.512647 uCode Version = 0.0.0.ca
611 09:02:50.516286 TXT ACM version = ff.ff.ff.ffff
612 09:02:50.519250 Display FSP Version Info HOB
613 09:02:50.522731 Reference Code - ME = 9.0.1e.30
614 09:02:50.526274 MEBx version = 0.0.0.0
615 09:02:50.529179 ME Firmware Version = Consumer SKU
616 09:02:50.532805 Display FSP Version Info HOB
617 09:02:50.536267 Reference Code - CML PCH = 9.0.1e.30
618 09:02:50.539425 PCH-CRID Status = Disabled
619 09:02:50.542881 PCH-CRID Original Value = ff.ff.ff.ffff
620 09:02:50.545897 PCH-CRID New Value = ff.ff.ff.ffff
621 09:02:50.548998 OPROM - RST - RAID = ff.ff.ff.ffff
622 09:02:50.552695 ChipsetInit Base Version = ff.ff.ff.ffff
623 09:02:50.555705 ChipsetInit Oem Version = ff.ff.ff.ffff
624 09:02:50.559457 Display FSP Version Info HOB
625 09:02:50.566018 Reference Code - SA - System Agent = 9.0.1e.30
626 09:02:50.569099 Reference Code - MRC = 0.7.1.6c
627 09:02:50.569200 SA - PCIe Version = 9.0.1e.30
628 09:02:50.572661 SA-CRID Status = Disabled
629 09:02:50.575737 SA-CRID Original Value = 0.0.0.c
630 09:02:50.579424 SA-CRID New Value = 0.0.0.c
631 09:02:50.582575 OPROM - VBIOS = ff.ff.ff.ffff
632 09:02:50.585380 RTC Init
633 09:02:50.588833 Set power on after power failure.
634 09:02:50.588927 Disabling Deep S3
635 09:02:50.592447 Disabling Deep S3
636 09:02:50.592544 Disabling Deep S4
637 09:02:50.595957 Disabling Deep S4
638 09:02:50.596038 Disabling Deep S5
639 09:02:50.598858 Disabling Deep S5
640 09:02:50.605918 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 192 exit 1
641 09:02:50.606003 Enumerating buses...
642 09:02:50.612046 Show all devs... Before device enumeration.
643 09:02:50.612159 Root Device: enabled 1
644 09:02:50.615649 CPU_CLUSTER: 0: enabled 1
645 09:02:50.618552 DOMAIN: 0000: enabled 1
646 09:02:50.622425 APIC: 00: enabled 1
647 09:02:50.622500 PCI: 00:00.0: enabled 1
648 09:02:50.625426 PCI: 00:02.0: enabled 1
649 09:02:50.628719 PCI: 00:04.0: enabled 0
650 09:02:50.632075 PCI: 00:05.0: enabled 0
651 09:02:50.632182 PCI: 00:12.0: enabled 1
652 09:02:50.635287 PCI: 00:12.5: enabled 0
653 09:02:50.638780 PCI: 00:12.6: enabled 0
654 09:02:50.641789 PCI: 00:14.0: enabled 1
655 09:02:50.641874 PCI: 00:14.1: enabled 0
656 09:02:50.644926 PCI: 00:14.3: enabled 1
657 09:02:50.648638 PCI: 00:14.5: enabled 0
658 09:02:50.648745 PCI: 00:15.0: enabled 1
659 09:02:50.651759 PCI: 00:15.1: enabled 1
660 09:02:50.655136 PCI: 00:15.2: enabled 0
661 09:02:50.658590 PCI: 00:15.3: enabled 0
662 09:02:50.658673 PCI: 00:16.0: enabled 1
663 09:02:50.661890 PCI: 00:16.1: enabled 0
664 09:02:50.664823 PCI: 00:16.2: enabled 0
665 09:02:50.668680 PCI: 00:16.3: enabled 0
666 09:02:50.668793 PCI: 00:16.4: enabled 0
667 09:02:50.671412 PCI: 00:16.5: enabled 0
668 09:02:50.674972 PCI: 00:17.0: enabled 1
669 09:02:50.677964 PCI: 00:19.0: enabled 1
670 09:02:50.678059 PCI: 00:19.1: enabled 0
671 09:02:50.681783 PCI: 00:19.2: enabled 0
672 09:02:50.684762 PCI: 00:1a.0: enabled 0
673 09:02:50.684847 PCI: 00:1c.0: enabled 0
674 09:02:50.687920 PCI: 00:1c.1: enabled 0
675 09:02:50.691792 PCI: 00:1c.2: enabled 0
676 09:02:50.694687 PCI: 00:1c.3: enabled 0
677 09:02:50.694775 PCI: 00:1c.4: enabled 0
678 09:02:50.698217 PCI: 00:1c.5: enabled 0
679 09:02:50.701701 PCI: 00:1c.6: enabled 0
680 09:02:50.704556 PCI: 00:1c.7: enabled 0
681 09:02:50.704642 PCI: 00:1d.0: enabled 1
682 09:02:50.708424 PCI: 00:1d.1: enabled 0
683 09:02:50.711379 PCI: 00:1d.2: enabled 0
684 09:02:50.714787 PCI: 00:1d.3: enabled 0
685 09:02:50.714868 PCI: 00:1d.4: enabled 0
686 09:02:50.717765 PCI: 00:1d.5: enabled 1
687 09:02:50.721711 PCI: 00:1e.0: enabled 1
688 09:02:50.724832 PCI: 00:1e.1: enabled 0
689 09:02:50.724914 PCI: 00:1e.2: enabled 1
690 09:02:50.727574 PCI: 00:1e.3: enabled 1
691 09:02:50.731425 PCI: 00:1f.0: enabled 1
692 09:02:50.731509 PCI: 00:1f.1: enabled 1
693 09:02:50.734396 PCI: 00:1f.2: enabled 1
694 09:02:50.738178 PCI: 00:1f.3: enabled 1
695 09:02:50.741145 PCI: 00:1f.4: enabled 1
696 09:02:50.741228 PCI: 00:1f.5: enabled 1
697 09:02:50.744814 PCI: 00:1f.6: enabled 0
698 09:02:50.747930 USB0 port 0: enabled 1
699 09:02:50.748022 I2C: 00:15: enabled 1
700 09:02:50.751694 I2C: 00:5d: enabled 1
701 09:02:50.754260 GENERIC: 0.0: enabled 1
702 09:02:50.758236 I2C: 00:1a: enabled 1
703 09:02:50.758348 I2C: 00:38: enabled 1
704 09:02:50.761131 I2C: 00:39: enabled 1
705 09:02:50.764633 I2C: 00:3a: enabled 1
706 09:02:50.764723 I2C: 00:3b: enabled 1
707 09:02:50.768021 PCI: 00:00.0: enabled 1
708 09:02:50.771402 SPI: 00: enabled 1
709 09:02:50.771495 SPI: 01: enabled 1
710 09:02:50.774435 PNP: 0c09.0: enabled 1
711 09:02:50.778052 USB2 port 0: enabled 1
712 09:02:50.778148 USB2 port 1: enabled 1
713 09:02:50.781005 USB2 port 2: enabled 0
714 09:02:50.784264 USB2 port 3: enabled 0
715 09:02:50.784386 USB2 port 5: enabled 0
716 09:02:50.788049 USB2 port 6: enabled 1
717 09:02:50.790981 USB2 port 9: enabled 1
718 09:02:50.791066 USB3 port 0: enabled 1
719 09:02:50.794265 USB3 port 1: enabled 1
720 09:02:50.797384 USB3 port 2: enabled 1
721 09:02:50.800965 USB3 port 3: enabled 1
722 09:02:50.801062 USB3 port 4: enabled 0
723 09:02:50.804585 APIC: 03: enabled 1
724 09:02:50.807452 APIC: 01: enabled 1
725 09:02:50.807540 APIC: 02: enabled 1
726 09:02:50.811042 APIC: 06: enabled 1
727 09:02:50.811129 APIC: 07: enabled 1
728 09:02:50.813955 APIC: 04: enabled 1
729 09:02:50.817884 APIC: 05: enabled 1
730 09:02:50.817973 Compare with tree...
731 09:02:50.820808 Root Device: enabled 1
732 09:02:50.823692 CPU_CLUSTER: 0: enabled 1
733 09:02:50.823779 APIC: 00: enabled 1
734 09:02:50.827444 APIC: 03: enabled 1
735 09:02:50.830803 APIC: 01: enabled 1
736 09:02:50.833648 APIC: 02: enabled 1
737 09:02:50.833740 APIC: 06: enabled 1
738 09:02:50.837301 APIC: 07: enabled 1
739 09:02:50.840382 APIC: 04: enabled 1
740 09:02:50.840481 APIC: 05: enabled 1
741 09:02:50.843416 DOMAIN: 0000: enabled 1
742 09:02:50.846926 PCI: 00:00.0: enabled 1
743 09:02:50.850644 PCI: 00:02.0: enabled 1
744 09:02:50.850742 PCI: 00:04.0: enabled 0
745 09:02:50.853838 PCI: 00:05.0: enabled 0
746 09:02:50.856894 PCI: 00:12.0: enabled 1
747 09:02:50.860477 PCI: 00:12.5: enabled 0
748 09:02:50.864166 PCI: 00:12.6: enabled 0
749 09:02:50.864260 PCI: 00:14.0: enabled 1
750 09:02:50.867012 USB0 port 0: enabled 1
751 09:02:50.870080 USB2 port 0: enabled 1
752 09:02:50.873742 USB2 port 1: enabled 1
753 09:02:50.876778 USB2 port 2: enabled 0
754 09:02:50.876872 USB2 port 3: enabled 0
755 09:02:50.879762 USB2 port 5: enabled 0
756 09:02:50.883290 USB2 port 6: enabled 1
757 09:02:50.886869 USB2 port 9: enabled 1
758 09:02:50.889700 USB3 port 0: enabled 1
759 09:02:50.893346 USB3 port 1: enabled 1
760 09:02:50.893436 USB3 port 2: enabled 1
761 09:02:50.896846 USB3 port 3: enabled 1
762 09:02:50.899565 USB3 port 4: enabled 0
763 09:02:50.902998 PCI: 00:14.1: enabled 0
764 09:02:50.906409 PCI: 00:14.3: enabled 1
765 09:02:50.906492 PCI: 00:14.5: enabled 0
766 09:02:50.909550 PCI: 00:15.0: enabled 1
767 09:02:50.912856 I2C: 00:15: enabled 1
768 09:02:50.916751 PCI: 00:15.1: enabled 1
769 09:02:50.919851 I2C: 00:5d: enabled 1
770 09:02:50.919951 GENERIC: 0.0: enabled 1
771 09:02:50.923110 PCI: 00:15.2: enabled 0
772 09:02:50.926399 PCI: 00:15.3: enabled 0
773 09:02:50.929530 PCI: 00:16.0: enabled 1
774 09:02:50.932977 PCI: 00:16.1: enabled 0
775 09:02:50.933082 PCI: 00:16.2: enabled 0
776 09:02:50.936531 PCI: 00:16.3: enabled 0
777 09:02:50.939897 PCI: 00:16.4: enabled 0
778 09:02:50.942877 PCI: 00:16.5: enabled 0
779 09:02:50.945888 PCI: 00:17.0: enabled 1
780 09:02:50.945972 PCI: 00:19.0: enabled 1
781 09:02:50.949715 I2C: 00:1a: enabled 1
782 09:02:50.952592 I2C: 00:38: enabled 1
783 09:02:50.956321 I2C: 00:39: enabled 1
784 09:02:50.956416 I2C: 00:3a: enabled 1
785 09:02:50.959405 I2C: 00:3b: enabled 1
786 09:02:50.962395 PCI: 00:19.1: enabled 0
787 09:02:50.965941 PCI: 00:19.2: enabled 0
788 09:02:50.969398 PCI: 00:1a.0: enabled 0
789 09:02:50.969511 PCI: 00:1c.0: enabled 0
790 09:02:50.972427 PCI: 00:1c.1: enabled 0
791 09:02:50.976217 PCI: 00:1c.2: enabled 0
792 09:02:50.979008 PCI: 00:1c.3: enabled 0
793 09:02:50.982774 PCI: 00:1c.4: enabled 0
794 09:02:50.982859 PCI: 00:1c.5: enabled 0
795 09:02:50.985641 PCI: 00:1c.6: enabled 0
796 09:02:50.989371 PCI: 00:1c.7: enabled 0
797 09:02:50.992284 PCI: 00:1d.0: enabled 1
798 09:02:50.995911 PCI: 00:1d.1: enabled 0
799 09:02:50.995997 PCI: 00:1d.2: enabled 0
800 09:02:50.999005 PCI: 00:1d.3: enabled 0
801 09:02:51.002674 PCI: 00:1d.4: enabled 0
802 09:02:51.005583 PCI: 00:1d.5: enabled 1
803 09:02:51.009413 PCI: 00:00.0: enabled 1
804 09:02:51.009530 PCI: 00:1e.0: enabled 1
805 09:02:51.012288 PCI: 00:1e.1: enabled 0
806 09:02:51.015461 PCI: 00:1e.2: enabled 1
807 09:02:51.019023 SPI: 00: enabled 1
808 09:02:51.019150 PCI: 00:1e.3: enabled 1
809 09:02:51.022415 SPI: 01: enabled 1
810 09:02:51.025288 PCI: 00:1f.0: enabled 1
811 09:02:51.028959 PNP: 0c09.0: enabled 1
812 09:02:51.029063 PCI: 00:1f.1: enabled 1
813 09:02:51.031919 PCI: 00:1f.2: enabled 1
814 09:02:51.035501 PCI: 00:1f.3: enabled 1
815 09:02:51.038366 PCI: 00:1f.4: enabled 1
816 09:02:51.041953 PCI: 00:1f.5: enabled 1
817 09:02:51.042045 PCI: 00:1f.6: enabled 0
818 09:02:51.045150 Root Device scanning...
819 09:02:51.048538 scan_static_bus for Root Device
820 09:02:51.051637 CPU_CLUSTER: 0 enabled
821 09:02:51.055514 DOMAIN: 0000 enabled
822 09:02:51.055611 DOMAIN: 0000 scanning...
823 09:02:51.058780 PCI: pci_scan_bus for bus 00
824 09:02:51.061581 PCI: 00:00.0 [8086/0000] ops
825 09:02:51.065114 PCI: 00:00.0 [8086/9b61] enabled
826 09:02:51.068871 PCI: 00:02.0 [8086/0000] bus ops
827 09:02:51.071803 PCI: 00:02.0 [8086/9b41] enabled
828 09:02:51.075574 PCI: 00:04.0 [8086/1903] disabled
829 09:02:51.078310 PCI: 00:08.0 [8086/1911] enabled
830 09:02:51.082188 PCI: 00:12.0 [8086/02f9] enabled
831 09:02:51.085069 PCI: 00:14.0 [8086/0000] bus ops
832 09:02:51.088876 PCI: 00:14.0 [8086/02ed] enabled
833 09:02:51.091720 PCI: 00:14.2 [8086/02ef] enabled
834 09:02:51.095451 PCI: 00:14.3 [8086/02f0] enabled
835 09:02:51.098389 PCI: 00:15.0 [8086/0000] bus ops
836 09:02:51.101944 PCI: 00:15.0 [8086/02e8] enabled
837 09:02:51.104863 PCI: 00:15.1 [8086/0000] bus ops
838 09:02:51.108772 PCI: 00:15.1 [8086/02e9] enabled
839 09:02:51.111537 PCI: 00:16.0 [8086/0000] ops
840 09:02:51.114755 PCI: 00:16.0 [8086/02e0] enabled
841 09:02:51.118276 PCI: 00:17.0 [8086/0000] ops
842 09:02:51.122195 PCI: 00:17.0 [8086/02d3] enabled
843 09:02:51.125015 PCI: 00:19.0 [8086/0000] bus ops
844 09:02:51.128644 PCI: 00:19.0 [8086/02c5] enabled
845 09:02:51.131590 PCI: 00:1d.0 [8086/0000] bus ops
846 09:02:51.135040 PCI: 00:1d.0 [8086/02b0] enabled
847 09:02:51.141207 PCI: Static device PCI: 00:1d.5 not found, disabling it.
848 09:02:51.144932 PCI: 00:1e.0 [8086/0000] ops
849 09:02:51.148020 PCI: 00:1e.0 [8086/02a8] enabled
850 09:02:51.151084 PCI: 00:1e.2 [8086/0000] bus ops
851 09:02:51.154758 PCI: 00:1e.2 [8086/02aa] enabled
852 09:02:51.158343 PCI: 00:1e.3 [8086/0000] bus ops
853 09:02:51.161281 PCI: 00:1e.3 [8086/02ab] enabled
854 09:02:51.164662 PCI: 00:1f.0 [8086/0000] bus ops
855 09:02:51.168009 PCI: 00:1f.0 [8086/0284] enabled
856 09:02:51.171242 PCI: Static device PCI: 00:1f.1 not found, disabling it.
857 09:02:51.177888 PCI: Static device PCI: 00:1f.2 not found, disabling it.
858 09:02:51.181172 PCI: 00:1f.3 [8086/0000] bus ops
859 09:02:51.184669 PCI: 00:1f.3 [8086/02c8] enabled
860 09:02:51.188310 PCI: 00:1f.4 [8086/0000] bus ops
861 09:02:51.191070 PCI: 00:1f.4 [8086/02a3] enabled
862 09:02:51.194827 PCI: 00:1f.5 [8086/0000] bus ops
863 09:02:51.197788 PCI: 00:1f.5 [8086/02a4] enabled
864 09:02:51.201505 PCI: Leftover static devices:
865 09:02:51.201615 PCI: 00:05.0
866 09:02:51.204357 PCI: 00:12.5
867 09:02:51.204467 PCI: 00:12.6
868 09:02:51.207876 PCI: 00:14.1
869 09:02:51.207965 PCI: 00:14.5
870 09:02:51.208034 PCI: 00:15.2
871 09:02:51.210998 PCI: 00:15.3
872 09:02:51.211101 PCI: 00:16.1
873 09:02:51.214481 PCI: 00:16.2
874 09:02:51.214588 PCI: 00:16.3
875 09:02:51.214682 PCI: 00:16.4
876 09:02:51.218125 PCI: 00:16.5
877 09:02:51.218229 PCI: 00:19.1
878 09:02:51.221123 PCI: 00:19.2
879 09:02:51.221225 PCI: 00:1a.0
880 09:02:51.224847 PCI: 00:1c.0
881 09:02:51.224925 PCI: 00:1c.1
882 09:02:51.224989 PCI: 00:1c.2
883 09:02:51.227856 PCI: 00:1c.3
884 09:02:51.227954 PCI: 00:1c.4
885 09:02:51.230937 PCI: 00:1c.5
886 09:02:51.231040 PCI: 00:1c.6
887 09:02:51.231137 PCI: 00:1c.7
888 09:02:51.234717 PCI: 00:1d.1
889 09:02:51.234794 PCI: 00:1d.2
890 09:02:51.237657 PCI: 00:1d.3
891 09:02:51.237765 PCI: 00:1d.4
892 09:02:51.237858 PCI: 00:1d.5
893 09:02:51.241416 PCI: 00:1e.1
894 09:02:51.241499 PCI: 00:1f.1
895 09:02:51.244275 PCI: 00:1f.2
896 09:02:51.244362 PCI: 00:1f.6
897 09:02:51.247737 PCI: Check your devicetree.cb.
898 09:02:51.251078 PCI: 00:02.0 scanning...
899 09:02:51.254373 scan_generic_bus for PCI: 00:02.0
900 09:02:51.257503 scan_generic_bus for PCI: 00:02.0 done
901 09:02:51.264135 scan_bus: scanning of bus PCI: 00:02.0 took 10192 usecs
902 09:02:51.267857 PCI: 00:14.0 scanning...
903 09:02:51.271049 scan_static_bus for PCI: 00:14.0
904 09:02:51.271129 USB0 port 0 enabled
905 09:02:51.274496 USB0 port 0 scanning...
906 09:02:51.277394 scan_static_bus for USB0 port 0
907 09:02:51.280825 USB2 port 0 enabled
908 09:02:51.280904 USB2 port 1 enabled
909 09:02:51.284294 USB2 port 2 disabled
910 09:02:51.287898 USB2 port 3 disabled
911 09:02:51.287977 USB2 port 5 disabled
912 09:02:51.290834 USB2 port 6 enabled
913 09:02:51.290929 USB2 port 9 enabled
914 09:02:51.294456 USB3 port 0 enabled
915 09:02:51.297240 USB3 port 1 enabled
916 09:02:51.297319 USB3 port 2 enabled
917 09:02:51.300730 USB3 port 3 enabled
918 09:02:51.304002 USB3 port 4 disabled
919 09:02:51.304110 USB2 port 0 scanning...
920 09:02:51.307226 scan_static_bus for USB2 port 0
921 09:02:51.310452 scan_static_bus for USB2 port 0 done
922 09:02:51.317404 scan_bus: scanning of bus USB2 port 0 took 9696 usecs
923 09:02:51.320365 USB2 port 1 scanning...
924 09:02:51.323744 scan_static_bus for USB2 port 1
925 09:02:51.327008 scan_static_bus for USB2 port 1 done
926 09:02:51.333727 scan_bus: scanning of bus USB2 port 1 took 9703 usecs
927 09:02:51.333816 USB2 port 6 scanning...
928 09:02:51.336964 scan_static_bus for USB2 port 6
929 09:02:51.343688 scan_static_bus for USB2 port 6 done
930 09:02:51.347536 scan_bus: scanning of bus USB2 port 6 took 9697 usecs
931 09:02:51.350441 USB2 port 9 scanning...
932 09:02:51.353488 scan_static_bus for USB2 port 9
933 09:02:51.357088 scan_static_bus for USB2 port 9 done
934 09:02:51.363846 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
935 09:02:51.363970 USB3 port 0 scanning...
936 09:02:51.367241 scan_static_bus for USB3 port 0
937 09:02:51.374005 scan_static_bus for USB3 port 0 done
938 09:02:51.377033 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
939 09:02:51.380001 USB3 port 1 scanning...
940 09:02:51.383740 scan_static_bus for USB3 port 1
941 09:02:51.386639 scan_static_bus for USB3 port 1 done
942 09:02:51.393407 scan_bus: scanning of bus USB3 port 1 took 9706 usecs
943 09:02:51.393508 USB3 port 2 scanning...
944 09:02:51.396866 scan_static_bus for USB3 port 2
945 09:02:51.403859 scan_static_bus for USB3 port 2 done
946 09:02:51.406734 scan_bus: scanning of bus USB3 port 2 took 9696 usecs
947 09:02:51.410563 USB3 port 3 scanning...
948 09:02:51.414039 scan_static_bus for USB3 port 3
949 09:02:51.416811 scan_static_bus for USB3 port 3 done
950 09:02:51.423202 scan_bus: scanning of bus USB3 port 3 took 9688 usecs
951 09:02:51.426707 scan_static_bus for USB0 port 0 done
952 09:02:51.430092 scan_bus: scanning of bus USB0 port 0 took 155322 usecs
953 09:02:51.436683 scan_static_bus for PCI: 00:14.0 done
954 09:02:51.440326 scan_bus: scanning of bus PCI: 00:14.0 took 172949 usecs
955 09:02:51.443350 PCI: 00:15.0 scanning...
956 09:02:51.446819 scan_generic_bus for PCI: 00:15.0
957 09:02:51.450599 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
958 09:02:51.456331 scan_generic_bus for PCI: 00:15.0 done
959 09:02:51.460245 scan_bus: scanning of bus PCI: 00:15.0 took 14305 usecs
960 09:02:51.463151 PCI: 00:15.1 scanning...
961 09:02:51.467017 scan_generic_bus for PCI: 00:15.1
962 09:02:51.469773 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
963 09:02:51.476638 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
964 09:02:51.479453 scan_generic_bus for PCI: 00:15.1 done
965 09:02:51.486276 scan_bus: scanning of bus PCI: 00:15.1 took 18607 usecs
966 09:02:51.486362 PCI: 00:19.0 scanning...
967 09:02:51.489948 scan_generic_bus for PCI: 00:19.0
968 09:02:51.496520 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
969 09:02:51.499291 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
970 09:02:51.502890 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
971 09:02:51.506150 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
972 09:02:51.512978 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
973 09:02:51.515750 scan_generic_bus for PCI: 00:19.0 done
974 09:02:51.522821 scan_bus: scanning of bus PCI: 00:19.0 took 30735 usecs
975 09:02:51.522903 PCI: 00:1d.0 scanning...
976 09:02:51.526225 do_pci_scan_bridge for PCI: 00:1d.0
977 09:02:51.529056 PCI: pci_scan_bus for bus 01
978 09:02:51.532839 PCI: 01:00.0 [1c5c/1327] enabled
979 09:02:51.538821 Enabling Common Clock Configuration
980 09:02:51.542501 L1 Sub-State supported from root port 29
981 09:02:51.545640 L1 Sub-State Support = 0xf
982 09:02:51.549186 CommonModeRestoreTime = 0x28
983 09:02:51.552049 Power On Value = 0x16, Power On Scale = 0x0
984 09:02:51.552129 ASPM: Enabled L1
985 09:02:51.558665 scan_bus: scanning of bus PCI: 00:1d.0 took 32785 usecs
986 09:02:51.562278 PCI: 00:1e.2 scanning...
987 09:02:51.565446 scan_generic_bus for PCI: 00:1e.2
988 09:02:51.568597 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
989 09:02:51.572181 scan_generic_bus for PCI: 00:1e.2 done
990 09:02:51.578934 scan_bus: scanning of bus PCI: 00:1e.2 took 14003 usecs
991 09:02:51.581888 PCI: 00:1e.3 scanning...
992 09:02:51.585364 scan_generic_bus for PCI: 00:1e.3
993 09:02:51.588657 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
994 09:02:51.592254 scan_generic_bus for PCI: 00:1e.3 done
995 09:02:51.598472 scan_bus: scanning of bus PCI: 00:1e.3 took 14001 usecs
996 09:02:51.602145 PCI: 00:1f.0 scanning...
997 09:02:51.605227 scan_static_bus for PCI: 00:1f.0
998 09:02:51.605307 PNP: 0c09.0 enabled
999 09:02:51.611642 scan_static_bus for PCI: 00:1f.0 done
1000 09:02:51.615112 scan_bus: scanning of bus PCI: 00:1f.0 took 12053 usecs
1001 09:02:51.618823 PCI: 00:1f.3 scanning...
1002 09:02:51.624856 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1003 09:02:51.624941 PCI: 00:1f.4 scanning...
1004 09:02:51.631974 scan_generic_bus for PCI: 00:1f.4
1005 09:02:51.635297 scan_generic_bus for PCI: 00:1f.4 done
1006 09:02:51.638057 scan_bus: scanning of bus PCI: 00:1f.4 took 10180 usecs
1007 09:02:51.641804 PCI: 00:1f.5 scanning...
1008 09:02:51.644708 scan_generic_bus for PCI: 00:1f.5
1009 09:02:51.648478 scan_generic_bus for PCI: 00:1f.5 done
1010 09:02:51.655257 scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs
1011 09:02:51.661108 scan_bus: scanning of bus DOMAIN: 0000 took 604911 usecs
1012 09:02:51.664887 scan_static_bus for Root Device done
1013 09:02:51.671355 scan_bus: scanning of bus Root Device took 624764 usecs
1014 09:02:51.671443 done
1015 09:02:51.674684 Chrome EC: UHEPI supported
1016 09:02:51.681300 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1017 09:02:51.684437 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1018 09:02:51.691024 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1019 09:02:51.698580 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1020 09:02:51.701893 SPI flash protection: WPSW=0 SRP0=0
1021 09:02:51.708948 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1022 09:02:51.711897 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1023 09:02:51.715670 found VGA at PCI: 00:02.0
1024 09:02:51.718529 Setting up VGA for PCI: 00:02.0
1025 09:02:51.725405 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1026 09:02:51.728140 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1027 09:02:51.732155 Allocating resources...
1028 09:02:51.735089 Reading resources...
1029 09:02:51.738161 Root Device read_resources bus 0 link: 0
1030 09:02:51.741823 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1031 09:02:51.748050 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1032 09:02:51.751303 DOMAIN: 0000 read_resources bus 0 link: 0
1033 09:02:51.758901 PCI: 00:14.0 read_resources bus 0 link: 0
1034 09:02:51.761825 USB0 port 0 read_resources bus 0 link: 0
1035 09:02:51.770091 USB0 port 0 read_resources bus 0 link: 0 done
1036 09:02:51.773986 PCI: 00:14.0 read_resources bus 0 link: 0 done
1037 09:02:51.780799 PCI: 00:15.0 read_resources bus 1 link: 0
1038 09:02:51.784461 PCI: 00:15.0 read_resources bus 1 link: 0 done
1039 09:02:51.790957 PCI: 00:15.1 read_resources bus 2 link: 0
1040 09:02:51.793861 PCI: 00:15.1 read_resources bus 2 link: 0 done
1041 09:02:51.801395 PCI: 00:19.0 read_resources bus 3 link: 0
1042 09:02:51.808304 PCI: 00:19.0 read_resources bus 3 link: 0 done
1043 09:02:51.811731 PCI: 00:1d.0 read_resources bus 1 link: 0
1044 09:02:51.818287 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1045 09:02:51.821541 PCI: 00:1e.2 read_resources bus 4 link: 0
1046 09:02:51.828222 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1047 09:02:51.831851 PCI: 00:1e.3 read_resources bus 5 link: 0
1048 09:02:51.838056 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1049 09:02:51.841826 PCI: 00:1f.0 read_resources bus 0 link: 0
1050 09:02:51.847776 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1051 09:02:51.854941 DOMAIN: 0000 read_resources bus 0 link: 0 done
1052 09:02:51.857751 Root Device read_resources bus 0 link: 0 done
1053 09:02:51.861474 Done reading resources.
1054 09:02:51.864514 Show resources in subtree (Root Device)...After reading.
1055 09:02:51.871233 Root Device child on link 0 CPU_CLUSTER: 0
1056 09:02:51.874341 CPU_CLUSTER: 0 child on link 0 APIC: 00
1057 09:02:51.874421 APIC: 00
1058 09:02:51.924207 APIC: 03
1059 09:02:51.924378 APIC: 01
1060 09:02:51.924489 APIC: 02
1061 09:02:51.924569 APIC: 06
1062 09:02:51.924642 APIC: 07
1063 09:02:51.924916 APIC: 04
1064 09:02:51.924987 APIC: 05
1065 09:02:51.925046 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1066 09:02:51.925106 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1067 09:02:51.925181 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1068 09:02:51.925243 PCI: 00:00.0
1069 09:02:51.925308 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 09:02:51.944800 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1071 09:02:51.945081 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1072 09:02:51.948716 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1073 09:02:51.957900 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1074 09:02:51.965139 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1075 09:02:51.975131 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1076 09:02:51.985030 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1077 09:02:51.994678 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1078 09:02:52.004304 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1079 09:02:52.010988 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1080 09:02:52.020890 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1081 09:02:52.031225 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1082 09:02:52.041144 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1083 09:02:52.050994 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1084 09:02:52.060759 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1085 09:02:52.060862 PCI: 00:02.0
1086 09:02:52.070428 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1087 09:02:52.080943 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1088 09:02:52.090928 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1089 09:02:52.091045 PCI: 00:04.0
1090 09:02:52.093869 PCI: 00:08.0
1091 09:02:52.103435 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1092 09:02:52.103533 PCI: 00:12.0
1093 09:02:52.113438 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1094 09:02:52.120488 PCI: 00:14.0 child on link 0 USB0 port 0
1095 09:02:52.130082 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1096 09:02:52.133493 USB0 port 0 child on link 0 USB2 port 0
1097 09:02:52.136533 USB2 port 0
1098 09:02:52.136619 USB2 port 1
1099 09:02:52.140236 USB2 port 2
1100 09:02:52.140314 USB2 port 3
1101 09:02:52.143239 USB2 port 5
1102 09:02:52.143323 USB2 port 6
1103 09:02:52.146992 USB2 port 9
1104 09:02:52.147103 USB3 port 0
1105 09:02:52.150152 USB3 port 1
1106 09:02:52.150235 USB3 port 2
1107 09:02:52.153749 USB3 port 3
1108 09:02:52.153864 USB3 port 4
1109 09:02:52.156629 PCI: 00:14.2
1110 09:02:52.166649 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1111 09:02:52.176802 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1112 09:02:52.176897 PCI: 00:14.3
1113 09:02:52.186748 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1114 09:02:52.193057 PCI: 00:15.0 child on link 0 I2C: 01:15
1115 09:02:52.203132 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1116 09:02:52.203235 I2C: 01:15
1117 09:02:52.209445 PCI: 00:15.1 child on link 0 I2C: 02:5d
1118 09:02:52.219636 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1119 09:02:52.219768 I2C: 02:5d
1120 09:02:52.222620 GENERIC: 0.0
1121 09:02:52.222700 PCI: 00:16.0
1122 09:02:52.232784 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1123 09:02:52.236550 PCI: 00:17.0
1124 09:02:52.242545 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1125 09:02:52.252709 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1126 09:02:52.262909 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1127 09:02:52.269096 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1128 09:02:52.279293 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1129 09:02:52.285744 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1130 09:02:52.292073 PCI: 00:19.0 child on link 0 I2C: 03:1a
1131 09:02:52.302415 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1132 09:02:52.302517 I2C: 03:1a
1133 09:02:52.305553 I2C: 03:38
1134 09:02:52.305658 I2C: 03:39
1135 09:02:52.305751 I2C: 03:3a
1136 09:02:52.308404 I2C: 03:3b
1137 09:02:52.311958 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1138 09:02:52.322010 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1139 09:02:52.331872 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1140 09:02:52.341780 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1141 09:02:52.341873 PCI: 01:00.0
1142 09:02:52.351788 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1143 09:02:52.355582 PCI: 00:1e.0
1144 09:02:52.365073 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1145 09:02:52.375158 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1146 09:02:52.378782 PCI: 00:1e.2 child on link 0 SPI: 00
1147 09:02:52.388242 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 09:02:52.391743 SPI: 00
1149 09:02:52.394671 PCI: 00:1e.3 child on link 0 SPI: 01
1150 09:02:52.404793 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1151 09:02:52.404881 SPI: 01
1152 09:02:52.407804 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1153 09:02:52.418297 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1154 09:02:52.428077 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1155 09:02:52.428166 PNP: 0c09.0
1156 09:02:52.437860 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1157 09:02:52.437950 PCI: 00:1f.3
1158 09:02:52.447676 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 09:02:52.461093 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1160 09:02:52.461201 PCI: 00:1f.4
1161 09:02:52.470557 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1162 09:02:52.480981 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1163 09:02:52.481109 PCI: 00:1f.5
1164 09:02:52.490728 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1165 09:02:52.497125 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1166 09:02:52.503960 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1167 09:02:52.510450 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1168 09:02:52.513393 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1169 09:02:52.516898 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1170 09:02:52.520737 PCI: 00:17.0 18 * [0x60 - 0x67] io
1171 09:02:52.523730 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1172 09:02:52.530220 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1173 09:02:52.537071 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1174 09:02:52.546557 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1175 09:02:52.553299 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1176 09:02:52.560004 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1177 09:02:52.566678 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1178 09:02:52.572674 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1179 09:02:52.576405 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1180 09:02:52.583097 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1181 09:02:52.586461 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1182 09:02:52.592558 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1183 09:02:52.595961 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1184 09:02:52.602754 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1185 09:02:52.606283 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1186 09:02:52.612276 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1187 09:02:52.615921 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1188 09:02:52.622523 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1189 09:02:52.625621 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1190 09:02:52.632296 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1191 09:02:52.635975 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1192 09:02:52.639048 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1193 09:02:52.646131 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1194 09:02:52.648872 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1195 09:02:52.655777 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1196 09:02:52.658654 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1197 09:02:52.665546 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1198 09:02:52.668493 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1199 09:02:52.675405 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1200 09:02:52.678431 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1201 09:02:52.685506 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1202 09:02:52.691679 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1203 09:02:52.695300 avoid_fixed_resources: DOMAIN: 0000
1204 09:02:52.701958 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1205 09:02:52.708650 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1206 09:02:52.714654 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1207 09:02:52.725095 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1208 09:02:52.731191 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1209 09:02:52.737728 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1210 09:02:52.748258 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1211 09:02:52.754802 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1212 09:02:52.761299 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1213 09:02:52.770858 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1214 09:02:52.777596 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1215 09:02:52.784668 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1216 09:02:52.787591 Setting resources...
1217 09:02:52.794160 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1218 09:02:52.797082 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1219 09:02:52.800249 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1220 09:02:52.804071 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1221 09:02:52.806820 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1222 09:02:52.814119 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1223 09:02:52.820410 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1224 09:02:52.826816 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1225 09:02:52.833699 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1226 09:02:52.840047 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1227 09:02:52.843562 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1228 09:02:52.849673 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1229 09:02:52.852967 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1230 09:02:52.860113 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1231 09:02:52.863106 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1232 09:02:52.870040 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1233 09:02:52.872904 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1234 09:02:52.879754 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1235 09:02:52.882843 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1236 09:02:52.889410 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1237 09:02:52.892853 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1238 09:02:52.899520 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1239 09:02:52.902445 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1240 09:02:52.909423 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1241 09:02:52.912246 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1242 09:02:52.919495 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1243 09:02:52.922400 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1244 09:02:52.929043 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1245 09:02:52.932090 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1246 09:02:52.938748 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1247 09:02:52.942490 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1248 09:02:52.945246 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1249 09:02:52.955278 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1250 09:02:52.961968 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1251 09:02:52.968549 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1252 09:02:52.975210 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1253 09:02:52.981676 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1254 09:02:52.988669 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1255 09:02:52.991418 Root Device assign_resources, bus 0 link: 0
1256 09:02:52.998259 DOMAIN: 0000 assign_resources, bus 0 link: 0
1257 09:02:53.004973 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1258 09:02:53.014796 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1259 09:02:53.021474 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1260 09:02:53.031277 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1261 09:02:53.038268 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1262 09:02:53.047774 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1263 09:02:53.051794 PCI: 00:14.0 assign_resources, bus 0 link: 0
1264 09:02:53.057646 PCI: 00:14.0 assign_resources, bus 0 link: 0
1265 09:02:53.064459 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1266 09:02:53.074742 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1267 09:02:53.081199 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1268 09:02:53.090923 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1269 09:02:53.094236 PCI: 00:15.0 assign_resources, bus 1 link: 0
1270 09:02:53.097471 PCI: 00:15.0 assign_resources, bus 1 link: 0
1271 09:02:53.107858 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1272 09:02:53.110724 PCI: 00:15.1 assign_resources, bus 2 link: 0
1273 09:02:53.117433 PCI: 00:15.1 assign_resources, bus 2 link: 0
1274 09:02:53.124128 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1275 09:02:53.134506 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1276 09:02:53.140432 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1277 09:02:53.147633 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1278 09:02:53.157174 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1279 09:02:53.163776 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1280 09:02:53.170335 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1281 09:02:53.180304 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1282 09:02:53.183984 PCI: 00:19.0 assign_resources, bus 3 link: 0
1283 09:02:53.190241 PCI: 00:19.0 assign_resources, bus 3 link: 0
1284 09:02:53.196836 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1285 09:02:53.206640 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1286 09:02:53.213256 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1287 09:02:53.220156 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1288 09:02:53.227210 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1289 09:02:53.233297 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1290 09:02:53.239689 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1291 09:02:53.250044 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1292 09:02:53.253168 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1293 09:02:53.256666 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1294 09:02:53.267178 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1295 09:02:53.270071 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1296 09:02:53.276689 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1297 09:02:53.280163 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1298 09:02:53.286870 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1299 09:02:53.289874 LPC: Trying to open IO window from 800 size 1ff
1300 09:02:53.299717 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1301 09:02:53.306130 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1302 09:02:53.316764 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1303 09:02:53.323096 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1304 09:02:53.325952 DOMAIN: 0000 assign_resources, bus 0 link: 0
1305 09:02:53.333175 Root Device assign_resources, bus 0 link: 0
1306 09:02:53.336430 Done setting resources.
1307 09:02:53.342636 Show resources in subtree (Root Device)...After assigning values.
1308 09:02:53.346183 Root Device child on link 0 CPU_CLUSTER: 0
1309 09:02:53.349411 CPU_CLUSTER: 0 child on link 0 APIC: 00
1310 09:02:53.349484 APIC: 00
1311 09:02:53.353106 APIC: 03
1312 09:02:53.353211 APIC: 01
1313 09:02:53.356460 APIC: 02
1314 09:02:53.356564 APIC: 06
1315 09:02:53.356653 APIC: 07
1316 09:02:53.359490 APIC: 04
1317 09:02:53.359578 APIC: 05
1318 09:02:53.362899 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1319 09:02:53.372575 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1320 09:02:53.385899 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1321 09:02:53.385999 PCI: 00:00.0
1322 09:02:53.396119 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1323 09:02:53.405638 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1324 09:02:53.415927 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1325 09:02:53.425672 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1326 09:02:53.432489 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1327 09:02:53.442035 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1328 09:02:53.452023 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1329 09:02:53.461865 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1330 09:02:53.472158 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1331 09:02:53.478215 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1332 09:02:53.488581 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1333 09:02:53.498058 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1334 09:02:53.507885 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1335 09:02:53.517942 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1336 09:02:53.528197 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1337 09:02:53.537716 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1338 09:02:53.537809 PCI: 00:02.0
1339 09:02:53.547606 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1340 09:02:53.560935 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1341 09:02:53.567759 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1342 09:02:53.571093 PCI: 00:04.0
1343 09:02:53.571179 PCI: 00:08.0
1344 09:02:53.581032 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1345 09:02:53.584393 PCI: 00:12.0
1346 09:02:53.594115 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1347 09:02:53.597691 PCI: 00:14.0 child on link 0 USB0 port 0
1348 09:02:53.610730 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1349 09:02:53.613697 USB0 port 0 child on link 0 USB2 port 0
1350 09:02:53.613825 USB2 port 0
1351 09:02:53.617499 USB2 port 1
1352 09:02:53.617587 USB2 port 2
1353 09:02:53.620670 USB2 port 3
1354 09:02:53.624204 USB2 port 5
1355 09:02:53.624308 USB2 port 6
1356 09:02:53.627102 USB2 port 9
1357 09:02:53.627177 USB3 port 0
1358 09:02:53.630639 USB3 port 1
1359 09:02:53.630716 USB3 port 2
1360 09:02:53.633666 USB3 port 3
1361 09:02:53.633736 USB3 port 4
1362 09:02:53.637148 PCI: 00:14.2
1363 09:02:53.647501 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1364 09:02:53.657120 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1365 09:02:53.657208 PCI: 00:14.3
1366 09:02:53.669996 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1367 09:02:53.673702 PCI: 00:15.0 child on link 0 I2C: 01:15
1368 09:02:53.683692 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1369 09:02:53.683781 I2C: 01:15
1370 09:02:53.690206 PCI: 00:15.1 child on link 0 I2C: 02:5d
1371 09:02:53.700038 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1372 09:02:53.700152 I2C: 02:5d
1373 09:02:53.702854 GENERIC: 0.0
1374 09:02:53.702962 PCI: 00:16.0
1375 09:02:53.716091 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1376 09:02:53.716217 PCI: 00:17.0
1377 09:02:53.725909 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1378 09:02:53.735559 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1379 09:02:53.746174 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1380 09:02:53.756061 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1381 09:02:53.765930 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1382 09:02:53.775739 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1383 09:02:53.778947 PCI: 00:19.0 child on link 0 I2C: 03:1a
1384 09:02:53.788761 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1385 09:02:53.792406 I2C: 03:1a
1386 09:02:53.792491 I2C: 03:38
1387 09:02:53.792556 I2C: 03:39
1388 09:02:53.795053 I2C: 03:3a
1389 09:02:53.795135 I2C: 03:3b
1390 09:02:53.801906 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1391 09:02:53.811918 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1392 09:02:53.821327 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1393 09:02:53.831371 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1394 09:02:53.831456 PCI: 01:00.0
1395 09:02:53.841700 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1396 09:02:53.844630 PCI: 00:1e.0
1397 09:02:53.858072 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1398 09:02:53.864951 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1399 09:02:53.871232 PCI: 00:1e.2 child on link 0 SPI: 00
1400 09:02:53.880859 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1401 09:02:53.880945 SPI: 00
1402 09:02:53.884743 PCI: 00:1e.3 child on link 0 SPI: 01
1403 09:02:53.893993 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1404 09:02:53.897631 SPI: 01
1405 09:02:53.901229 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1406 09:02:53.911271 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1407 09:02:53.920568 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1408 09:02:53.920652 PNP: 0c09.0
1409 09:02:53.930477 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1410 09:02:53.930560 PCI: 00:1f.3
1411 09:02:53.940449 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1412 09:02:53.950553 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1413 09:02:53.953215 PCI: 00:1f.4
1414 09:02:53.963470 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1415 09:02:53.973320 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1416 09:02:53.973474 PCI: 00:1f.5
1417 09:02:53.983156 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1418 09:02:53.987060 Done allocating resources.
1419 09:02:53.992964 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1420 09:02:53.996756 Enabling resources...
1421 09:02:53.999614 PCI: 00:00.0 subsystem <- 8086/9b61
1422 09:02:54.003153 PCI: 00:00.0 cmd <- 06
1423 09:02:54.006718 PCI: 00:02.0 subsystem <- 8086/9b41
1424 09:02:54.009662 PCI: 00:02.0 cmd <- 03
1425 09:02:54.013163 PCI: 00:08.0 cmd <- 06
1426 09:02:54.016468 PCI: 00:12.0 subsystem <- 8086/02f9
1427 09:02:54.016604 PCI: 00:12.0 cmd <- 02
1428 09:02:54.023029 PCI: 00:14.0 subsystem <- 8086/02ed
1429 09:02:54.023143 PCI: 00:14.0 cmd <- 02
1430 09:02:54.026663 PCI: 00:14.2 cmd <- 02
1431 09:02:54.029550 PCI: 00:14.3 subsystem <- 8086/02f0
1432 09:02:54.033025 PCI: 00:14.3 cmd <- 02
1433 09:02:54.036658 PCI: 00:15.0 subsystem <- 8086/02e8
1434 09:02:54.039299 PCI: 00:15.0 cmd <- 02
1435 09:02:54.042913 PCI: 00:15.1 subsystem <- 8086/02e9
1436 09:02:54.046294 PCI: 00:15.1 cmd <- 02
1437 09:02:54.049208 PCI: 00:16.0 subsystem <- 8086/02e0
1438 09:02:54.052935 PCI: 00:16.0 cmd <- 02
1439 09:02:54.055686 PCI: 00:17.0 subsystem <- 8086/02d3
1440 09:02:54.059215 PCI: 00:17.0 cmd <- 03
1441 09:02:54.062660 PCI: 00:19.0 subsystem <- 8086/02c5
1442 09:02:54.065482 PCI: 00:19.0 cmd <- 02
1443 09:02:54.069043 PCI: 00:1d.0 bridge ctrl <- 0013
1444 09:02:54.072067 PCI: 00:1d.0 subsystem <- 8086/02b0
1445 09:02:54.072174 PCI: 00:1d.0 cmd <- 06
1446 09:02:54.079309 PCI: 00:1e.0 subsystem <- 8086/02a8
1447 09:02:54.079393 PCI: 00:1e.0 cmd <- 06
1448 09:02:54.082337 PCI: 00:1e.2 subsystem <- 8086/02aa
1449 09:02:54.085695 PCI: 00:1e.2 cmd <- 06
1450 09:02:54.089120 PCI: 00:1e.3 subsystem <- 8086/02ab
1451 09:02:54.092202 PCI: 00:1e.3 cmd <- 02
1452 09:02:54.096112 PCI: 00:1f.0 subsystem <- 8086/0284
1453 09:02:54.099040 PCI: 00:1f.0 cmd <- 407
1454 09:02:54.102843 PCI: 00:1f.3 subsystem <- 8086/02c8
1455 09:02:54.105744 PCI: 00:1f.3 cmd <- 02
1456 09:02:54.108883 PCI: 00:1f.4 subsystem <- 8086/02a3
1457 09:02:54.112068 PCI: 00:1f.4 cmd <- 03
1458 09:02:54.115646 PCI: 00:1f.5 subsystem <- 8086/02a4
1459 09:02:54.118559 PCI: 00:1f.5 cmd <- 406
1460 09:02:54.126456 PCI: 01:00.0 cmd <- 02
1461 09:02:54.132474 done.
1462 09:02:54.145481 ME: Version: 14.0.39.1367
1463 09:02:54.152081 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1464 09:02:54.155343 Initializing devices...
1465 09:02:54.155440 Root Device init ...
1466 09:02:54.162145 Chrome EC: Set SMI mask to 0x0000000000000000
1467 09:02:54.164956 Chrome EC: clear events_b mask to 0x0000000000000000
1468 09:02:54.172176 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1469 09:02:54.178676 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1470 09:02:54.185421 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1471 09:02:54.188314 Chrome EC: Set WAKE mask to 0x0000000000000000
1472 09:02:54.192028 Root Device init finished in 35165 usecs
1473 09:02:54.195407 CPU_CLUSTER: 0 init ...
1474 09:02:54.201765 CPU_CLUSTER: 0 init finished in 2446 usecs
1475 09:02:54.206160 PCI: 00:00.0 init ...
1476 09:02:54.209906 CPU TDP: 15 Watts
1477 09:02:54.212575 CPU PL2 = 64 Watts
1478 09:02:54.216228 PCI: 00:00.0 init finished in 7080 usecs
1479 09:02:54.220010 PCI: 00:02.0 init ...
1480 09:02:54.222887 PCI: 00:02.0 init finished in 2254 usecs
1481 09:02:54.226524 PCI: 00:08.0 init ...
1482 09:02:54.229454 PCI: 00:08.0 init finished in 2252 usecs
1483 09:02:54.232976 PCI: 00:12.0 init ...
1484 09:02:54.236065 PCI: 00:12.0 init finished in 2252 usecs
1485 09:02:54.239615 PCI: 00:14.0 init ...
1486 09:02:54.242543 PCI: 00:14.0 init finished in 2252 usecs
1487 09:02:54.246124 PCI: 00:14.2 init ...
1488 09:02:54.249367 PCI: 00:14.2 init finished in 2244 usecs
1489 09:02:54.252877 PCI: 00:14.3 init ...
1490 09:02:54.256294 PCI: 00:14.3 init finished in 2272 usecs
1491 09:02:54.259263 PCI: 00:15.0 init ...
1492 09:02:54.262774 DW I2C bus 0 at 0xd121f000 (400 KHz)
1493 09:02:54.266239 PCI: 00:15.0 init finished in 5971 usecs
1494 09:02:54.268893 PCI: 00:15.1 init ...
1495 09:02:54.273036 DW I2C bus 1 at 0xd1220000 (400 KHz)
1496 09:02:54.276053 PCI: 00:15.1 init finished in 5977 usecs
1497 09:02:54.279147 PCI: 00:16.0 init ...
1498 09:02:54.282423 PCI: 00:16.0 init finished in 2254 usecs
1499 09:02:54.286756 PCI: 00:19.0 init ...
1500 09:02:54.289623 DW I2C bus 4 at 0xd1222000 (400 KHz)
1501 09:02:54.296521 PCI: 00:19.0 init finished in 5977 usecs
1502 09:02:54.296629 PCI: 00:1d.0 init ...
1503 09:02:54.299551 Initializing PCH PCIe bridge.
1504 09:02:54.303094 PCI: 00:1d.0 init finished in 5286 usecs
1505 09:02:54.307959 PCI: 00:1f.0 init ...
1506 09:02:54.311101 IOAPIC: Initializing IOAPIC at 0xfec00000
1507 09:02:54.317776 IOAPIC: Bootstrap Processor Local APIC = 0x00
1508 09:02:54.317864 IOAPIC: ID = 0x02
1509 09:02:54.321266 IOAPIC: Dumping registers
1510 09:02:54.324286 reg 0x0000: 0x02000000
1511 09:02:54.327995 reg 0x0001: 0x00770020
1512 09:02:54.328107 reg 0x0002: 0x00000000
1513 09:02:54.334780 PCI: 00:1f.0 init finished in 23522 usecs
1514 09:02:54.338146 PCI: 00:1f.4 init ...
1515 09:02:54.341245 PCI: 00:1f.4 init finished in 2263 usecs
1516 09:02:54.352556 PCI: 01:00.0 init ...
1517 09:02:54.355766 PCI: 01:00.0 init finished in 2252 usecs
1518 09:02:54.360081 PNP: 0c09.0 init ...
1519 09:02:54.366865 Google Chrome EC uptime: 11.121 seconds
1520 09:02:54.370034 Google Chrome AP resets since EC boot: 0
1521 09:02:54.373143 Google Chrome most recent AP reset causes:
1522 09:02:54.379809 Google Chrome EC reset flags at last EC boot: reset-pin
1523 09:02:54.383259 PNP: 0c09.0 init finished in 20825 usecs
1524 09:02:54.386183 Devices initialized
1525 09:02:54.389707 Show all devs... After init.
1526 09:02:54.389794 Root Device: enabled 1
1527 09:02:54.392555 CPU_CLUSTER: 0: enabled 1
1528 09:02:54.396418 DOMAIN: 0000: enabled 1
1529 09:02:54.396524 APIC: 00: enabled 1
1530 09:02:54.399504 PCI: 00:00.0: enabled 1
1531 09:02:54.402859 PCI: 00:02.0: enabled 1
1532 09:02:54.406029 PCI: 00:04.0: enabled 0
1533 09:02:54.406151 PCI: 00:05.0: enabled 0
1534 09:02:54.409373 PCI: 00:12.0: enabled 1
1535 09:02:54.412858 PCI: 00:12.5: enabled 0
1536 09:02:54.416161 PCI: 00:12.6: enabled 0
1537 09:02:54.416249 PCI: 00:14.0: enabled 1
1538 09:02:54.419157 PCI: 00:14.1: enabled 0
1539 09:02:54.422879 PCI: 00:14.3: enabled 1
1540 09:02:54.425773 PCI: 00:14.5: enabled 0
1541 09:02:54.425856 PCI: 00:15.0: enabled 1
1542 09:02:54.429448 PCI: 00:15.1: enabled 1
1543 09:02:54.433048 PCI: 00:15.2: enabled 0
1544 09:02:54.433139 PCI: 00:15.3: enabled 0
1545 09:02:54.435763 PCI: 00:16.0: enabled 1
1546 09:02:54.439588 PCI: 00:16.1: enabled 0
1547 09:02:54.442294 PCI: 00:16.2: enabled 0
1548 09:02:54.442376 PCI: 00:16.3: enabled 0
1549 09:02:54.445690 PCI: 00:16.4: enabled 0
1550 09:02:54.449313 PCI: 00:16.5: enabled 0
1551 09:02:54.452279 PCI: 00:17.0: enabled 1
1552 09:02:54.452391 PCI: 00:19.0: enabled 1
1553 09:02:54.456069 PCI: 00:19.1: enabled 0
1554 09:02:54.459057 PCI: 00:19.2: enabled 0
1555 09:02:54.462218 PCI: 00:1a.0: enabled 0
1556 09:02:54.462301 PCI: 00:1c.0: enabled 0
1557 09:02:54.465775 PCI: 00:1c.1: enabled 0
1558 09:02:54.468768 PCI: 00:1c.2: enabled 0
1559 09:02:54.472525 PCI: 00:1c.3: enabled 0
1560 09:02:54.472608 PCI: 00:1c.4: enabled 0
1561 09:02:54.475518 PCI: 00:1c.5: enabled 0
1562 09:02:54.479059 PCI: 00:1c.6: enabled 0
1563 09:02:54.479143 PCI: 00:1c.7: enabled 0
1564 09:02:54.482092 PCI: 00:1d.0: enabled 1
1565 09:02:54.485838 PCI: 00:1d.1: enabled 0
1566 09:02:54.489041 PCI: 00:1d.2: enabled 0
1567 09:02:54.489124 PCI: 00:1d.3: enabled 0
1568 09:02:54.491848 PCI: 00:1d.4: enabled 0
1569 09:02:54.495716 PCI: 00:1d.5: enabled 0
1570 09:02:54.498654 PCI: 00:1e.0: enabled 1
1571 09:02:54.498735 PCI: 00:1e.1: enabled 0
1572 09:02:54.501672 PCI: 00:1e.2: enabled 1
1573 09:02:54.505391 PCI: 00:1e.3: enabled 1
1574 09:02:54.508960 PCI: 00:1f.0: enabled 1
1575 09:02:54.509045 PCI: 00:1f.1: enabled 0
1576 09:02:54.511733 PCI: 00:1f.2: enabled 0
1577 09:02:54.515140 PCI: 00:1f.3: enabled 1
1578 09:02:54.515222 PCI: 00:1f.4: enabled 1
1579 09:02:54.518478 PCI: 00:1f.5: enabled 1
1580 09:02:54.522023 PCI: 00:1f.6: enabled 0
1581 09:02:54.525207 USB0 port 0: enabled 1
1582 09:02:54.525288 I2C: 01:15: enabled 1
1583 09:02:54.528580 I2C: 02:5d: enabled 1
1584 09:02:54.531771 GENERIC: 0.0: enabled 1
1585 09:02:54.531858 I2C: 03:1a: enabled 1
1586 09:02:54.535212 I2C: 03:38: enabled 1
1587 09:02:54.538532 I2C: 03:39: enabled 1
1588 09:02:54.538636 I2C: 03:3a: enabled 1
1589 09:02:54.542138 I2C: 03:3b: enabled 1
1590 09:02:54.544772 PCI: 00:00.0: enabled 1
1591 09:02:54.544859 SPI: 00: enabled 1
1592 09:02:54.548430 SPI: 01: enabled 1
1593 09:02:54.551404 PNP: 0c09.0: enabled 1
1594 09:02:54.551487 USB2 port 0: enabled 1
1595 09:02:54.554772 USB2 port 1: enabled 1
1596 09:02:54.558747 USB2 port 2: enabled 0
1597 09:02:54.561708 USB2 port 3: enabled 0
1598 09:02:54.561820 USB2 port 5: enabled 0
1599 09:02:54.564711 USB2 port 6: enabled 1
1600 09:02:54.568392 USB2 port 9: enabled 1
1601 09:02:54.568596 USB3 port 0: enabled 1
1602 09:02:54.571400 USB3 port 1: enabled 1
1603 09:02:54.574519 USB3 port 2: enabled 1
1604 09:02:54.578327 USB3 port 3: enabled 1
1605 09:02:54.578428 USB3 port 4: enabled 0
1606 09:02:54.581839 APIC: 03: enabled 1
1607 09:02:54.581927 APIC: 01: enabled 1
1608 09:02:54.584680 APIC: 02: enabled 1
1609 09:02:54.588559 APIC: 06: enabled 1
1610 09:02:54.588650 APIC: 07: enabled 1
1611 09:02:54.591319 APIC: 04: enabled 1
1612 09:02:54.594992 APIC: 05: enabled 1
1613 09:02:54.595078 PCI: 00:08.0: enabled 1
1614 09:02:54.598062 PCI: 00:14.2: enabled 1
1615 09:02:54.601097 PCI: 01:00.0: enabled 1
1616 09:02:54.604701 Disabling ACPI via APMC:
1617 09:02:54.608637 done.
1618 09:02:54.611545 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1619 09:02:54.615012 ELOG: NV offset 0xaf0000 size 0x4000
1620 09:02:54.621605 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1621 09:02:54.628613 ELOG: Event(17) added with size 13 at 2024-05-13 08:58:16 UTC
1622 09:02:54.635194 ELOG: Event(92) added with size 9 at 2024-05-13 08:58:16 UTC
1623 09:02:54.641338 ELOG: Event(93) added with size 9 at 2024-05-13 08:58:16 UTC
1624 09:02:54.648185 ELOG: Event(9A) added with size 9 at 2024-05-13 08:58:16 UTC
1625 09:02:54.654805 ELOG: Event(9E) added with size 10 at 2024-05-13 08:58:16 UTC
1626 09:02:54.661454 ELOG: Event(9F) added with size 14 at 2024-05-13 08:58:16 UTC
1627 09:02:54.664933 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1628 09:02:54.672077 ELOG: Event(A1) added with size 10 at 2024-05-13 08:58:16 UTC
1629 09:02:54.681988 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1630 09:02:54.688743 ELOG: Event(A0) added with size 9 at 2024-05-13 08:58:16 UTC
1631 09:02:54.691428 elog_add_boot_reason: Logged dev mode boot
1632 09:02:54.695032 Finalize devices...
1633 09:02:54.695113 PCI: 00:17.0 final
1634 09:02:54.698621 Devices finalized
1635 09:02:54.701751 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1636 09:02:54.708365 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1637 09:02:54.712017 ME: HFSTS1 : 0x90000245
1638 09:02:54.715073 ME: HFSTS2 : 0x3B850126
1639 09:02:54.721502 ME: HFSTS3 : 0x00000020
1640 09:02:54.725180 ME: HFSTS4 : 0x00004800
1641 09:02:54.727981 ME: HFSTS5 : 0x00000000
1642 09:02:54.731731 ME: HFSTS6 : 0x40400006
1643 09:02:54.734665 ME: Manufacturing Mode : NO
1644 09:02:54.738283 ME: FW Partition Table : OK
1645 09:02:54.741270 ME: Bringup Loader Failure : NO
1646 09:02:54.744945 ME: Firmware Init Complete : YES
1647 09:02:54.747936 ME: Boot Options Present : NO
1648 09:02:54.751257 ME: Update In Progress : NO
1649 09:02:54.754761 ME: D0i3 Support : YES
1650 09:02:54.757779 ME: Low Power State Enabled : NO
1651 09:02:54.761616 ME: CPU Replaced : NO
1652 09:02:54.764489 ME: CPU Replacement Valid : YES
1653 09:02:54.768212 ME: Current Working State : 5
1654 09:02:54.771049 ME: Current Operation State : 1
1655 09:02:54.774333 ME: Current Operation Mode : 0
1656 09:02:54.777606 ME: Error Code : 0
1657 09:02:54.780764 ME: CPU Debug Disabled : YES
1658 09:02:54.784022 ME: TXT Support : NO
1659 09:02:54.790839 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1660 09:02:54.797213 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1661 09:02:54.797295 CBFS @ c08000 size 3f8000
1662 09:02:54.804671 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1663 09:02:54.807559 CBFS: Locating 'fallback/dsdt.aml'
1664 09:02:54.810491 CBFS: Found @ offset 10bb80 size 3fa5
1665 09:02:54.817742 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1666 09:02:54.820638 CBFS @ c08000 size 3f8000
1667 09:02:54.823777 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1668 09:02:54.827301 CBFS: Locating 'fallback/slic'
1669 09:02:54.832310 CBFS: 'fallback/slic' not found.
1670 09:02:54.838973 ACPI: Writing ACPI tables at 99b3e000.
1671 09:02:54.839048 ACPI: * FACS
1672 09:02:54.842603 ACPI: * DSDT
1673 09:02:54.845434 Ramoops buffer: 0x100000@0x99a3d000.
1674 09:02:54.849051 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1675 09:02:54.855734 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1676 09:02:54.859040 Google Chrome EC: version:
1677 09:02:54.862510 ro: helios_v2.0.2659-56403530b
1678 09:02:54.865778 rw: helios_v2.0.2849-c41de27e7d
1679 09:02:54.865853 running image: 1
1680 09:02:54.870058 ACPI: * FADT
1681 09:02:54.870134 SCI is IRQ9
1682 09:02:54.876133 ACPI: added table 1/32, length now 40
1683 09:02:54.876210 ACPI: * SSDT
1684 09:02:54.879651 Found 1 CPU(s) with 8 core(s) each.
1685 09:02:54.883338 Error: Could not locate 'wifi_sar' in VPD.
1686 09:02:54.889749 Checking CBFS for default SAR values
1687 09:02:54.892741 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1688 09:02:54.896200 CBFS @ c08000 size 3f8000
1689 09:02:54.902663 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1690 09:02:54.905838 CBFS: Locating 'wifi_sar_defaults.hex'
1691 09:02:54.909561 CBFS: Found @ offset 5fac0 size 77
1692 09:02:54.912754 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1693 09:02:54.919201 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1694 09:02:54.922476 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1695 09:02:54.929086 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1696 09:02:54.932787 failed to find key in VPD: dsm_calib_r0_0
1697 09:02:54.942339 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1698 09:02:54.945528 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1699 09:02:54.949087 failed to find key in VPD: dsm_calib_r0_1
1700 09:02:54.959186 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1701 09:02:54.965988 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1702 09:02:54.968837 failed to find key in VPD: dsm_calib_r0_2
1703 09:02:54.978895 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1704 09:02:54.981838 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1705 09:02:54.988504 failed to find key in VPD: dsm_calib_r0_3
1706 09:02:54.995707 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1707 09:02:55.002223 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1708 09:02:55.005113 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1709 09:02:55.008546 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1710 09:02:55.012238 EC returned error result code 1
1711 09:02:55.016535 EC returned error result code 1
1712 09:02:55.020062 EC returned error result code 1
1713 09:02:55.026505 PS2K: Bad resp from EC. Vivaldi disabled!
1714 09:02:55.029846 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1715 09:02:55.036662 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1716 09:02:55.043283 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1717 09:02:55.046764 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1718 09:02:55.052984 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1719 09:02:55.059951 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1720 09:02:55.066774 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1721 09:02:55.069683 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1722 09:02:55.076267 ACPI: added table 2/32, length now 44
1723 09:02:55.076383 ACPI: * MCFG
1724 09:02:55.079936 ACPI: added table 3/32, length now 48
1725 09:02:55.082818 ACPI: * TPM2
1726 09:02:55.086189 TPM2 log created at 99a2d000
1727 09:02:55.089495 ACPI: added table 4/32, length now 52
1728 09:02:55.089607 ACPI: * MADT
1729 09:02:55.092646 SCI is IRQ9
1730 09:02:55.095990 ACPI: added table 5/32, length now 56
1731 09:02:55.096068 current = 99b43ac0
1732 09:02:55.099657 ACPI: * DMAR
1733 09:02:55.102681 ACPI: added table 6/32, length now 60
1734 09:02:55.105861 ACPI: * IGD OpRegion
1735 09:02:55.105944 GMA: Found VBT in CBFS
1736 09:02:55.109601 GMA: Found valid VBT in CBFS
1737 09:02:55.112464 ACPI: added table 7/32, length now 64
1738 09:02:55.116187 ACPI: * HPET
1739 09:02:55.119121 ACPI: added table 8/32, length now 68
1740 09:02:55.119208 ACPI: done.
1741 09:02:55.122665 ACPI tables: 31744 bytes.
1742 09:02:55.126206 smbios_write_tables: 99a2c000
1743 09:02:55.129124 EC returned error result code 3
1744 09:02:55.132748 Couldn't obtain OEM name from CBI
1745 09:02:55.135776 Create SMBIOS type 17
1746 09:02:55.139500 PCI: 00:00.0 (Intel Cannonlake)
1747 09:02:55.143100 PCI: 00:14.3 (Intel WiFi)
1748 09:02:55.146065 SMBIOS tables: 939 bytes.
1749 09:02:55.149605 Writing table forward entry at 0x00000500
1750 09:02:55.156252 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1751 09:02:55.159601 Writing coreboot table at 0x99b62000
1752 09:02:55.165889 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1753 09:02:55.169116 1. 0000000000001000-000000000009ffff: RAM
1754 09:02:55.172442 2. 00000000000a0000-00000000000fffff: RESERVED
1755 09:02:55.178940 3. 0000000000100000-0000000099a2bfff: RAM
1756 09:02:55.185569 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1757 09:02:55.189129 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1758 09:02:55.195681 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1759 09:02:55.198756 7. 000000009a000000-000000009f7fffff: RESERVED
1760 09:02:55.205740 8. 00000000e0000000-00000000efffffff: RESERVED
1761 09:02:55.208583 9. 00000000fc000000-00000000fc000fff: RESERVED
1762 09:02:55.215249 10. 00000000fe000000-00000000fe00ffff: RESERVED
1763 09:02:55.218729 11. 00000000fed10000-00000000fed17fff: RESERVED
1764 09:02:55.221717 12. 00000000fed80000-00000000fed83fff: RESERVED
1765 09:02:55.228441 13. 00000000fed90000-00000000fed91fff: RESERVED
1766 09:02:55.232100 14. 00000000feda0000-00000000feda1fff: RESERVED
1767 09:02:55.238819 15. 0000000100000000-000000045e7fffff: RAM
1768 09:02:55.241888 Graphics framebuffer located at 0xc0000000
1769 09:02:55.245393 Passing 5 GPIOs to payload:
1770 09:02:55.248117 NAME | PORT | POLARITY | VALUE
1771 09:02:55.254833 write protect | undefined | high | low
1772 09:02:55.261476 lid | undefined | high | high
1773 09:02:55.265334 power | undefined | high | low
1774 09:02:55.271688 oprom | undefined | high | low
1775 09:02:55.274580 EC in RW | 0x000000cb | high | low
1776 09:02:55.277981 Board ID: 4
1777 09:02:55.281572 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1778 09:02:55.284864 CBFS @ c08000 size 3f8000
1779 09:02:55.291285 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1780 09:02:55.297802 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1781 09:02:55.297902 coreboot table: 1492 bytes.
1782 09:02:55.301153 IMD ROOT 0. 99fff000 00001000
1783 09:02:55.304554 IMD SMALL 1. 99ffe000 00001000
1784 09:02:55.307929 FSP MEMORY 2. 99c4e000 003b0000
1785 09:02:55.311291 CONSOLE 3. 99c2e000 00020000
1786 09:02:55.314897 FMAP 4. 99c2d000 0000054e
1787 09:02:55.318056 TIME STAMP 5. 99c2c000 00000910
1788 09:02:55.321610 VBOOT WORK 6. 99c18000 00014000
1789 09:02:55.324545 MRC DATA 7. 99c16000 00001958
1790 09:02:55.328295 ROMSTG STCK 8. 99c15000 00001000
1791 09:02:55.331395 AFTER CAR 9. 99c0b000 0000a000
1792 09:02:55.334849 RAMSTAGE 10. 99baf000 0005c000
1793 09:02:55.337711 REFCODE 11. 99b7a000 00035000
1794 09:02:55.344539 SMM BACKUP 12. 99b6a000 00010000
1795 09:02:55.348336 COREBOOT 13. 99b62000 00008000
1796 09:02:55.351330 ACPI 14. 99b3e000 00024000
1797 09:02:55.354875 ACPI GNVS 15. 99b3d000 00001000
1798 09:02:55.357837 RAMOOPS 16. 99a3d000 00100000
1799 09:02:55.361686 TPM2 TCGLOG17. 99a2d000 00010000
1800 09:02:55.364337 SMBIOS 18. 99a2c000 00000800
1801 09:02:55.364779 IMD small region:
1802 09:02:55.368288 IMD ROOT 0. 99ffec00 00000400
1803 09:02:55.371663 FSP RUNTIME 1. 99ffebe0 00000004
1804 09:02:55.374658 EC HOSTEVENT 2. 99ffebc0 00000008
1805 09:02:55.377886 POWER STATE 3. 99ffeb80 00000040
1806 09:02:55.381348 ROMSTAGE 4. 99ffeb60 00000004
1807 09:02:55.384468 MEM INFO 5. 99ffe9a0 000001b9
1808 09:02:55.391090 VPD 6. 99ffe920 0000006c
1809 09:02:55.391558 MTRR: Physical address space:
1810 09:02:55.397616 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1811 09:02:55.404502 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1812 09:02:55.411048 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1813 09:02:55.417506 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1814 09:02:55.424147 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1815 09:02:55.430570 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1816 09:02:55.437804 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1817 09:02:55.441121 MTRR: Fixed MSR 0x250 0x0606060606060606
1818 09:02:55.444178 MTRR: Fixed MSR 0x258 0x0606060606060606
1819 09:02:55.447421 MTRR: Fixed MSR 0x259 0x0000000000000000
1820 09:02:55.454091 MTRR: Fixed MSR 0x268 0x0606060606060606
1821 09:02:55.457066 MTRR: Fixed MSR 0x269 0x0606060606060606
1822 09:02:55.460575 MTRR: Fixed MSR 0x26a 0x0606060606060606
1823 09:02:55.464188 MTRR: Fixed MSR 0x26b 0x0606060606060606
1824 09:02:55.470151 MTRR: Fixed MSR 0x26c 0x0606060606060606
1825 09:02:55.473809 MTRR: Fixed MSR 0x26d 0x0606060606060606
1826 09:02:55.477765 MTRR: Fixed MSR 0x26e 0x0606060606060606
1827 09:02:55.480188 MTRR: Fixed MSR 0x26f 0x0606060606060606
1828 09:02:55.483652 call enable_fixed_mtrr()
1829 09:02:55.486803 CPU physical address size: 39 bits
1830 09:02:55.493448 MTRR: default type WB/UC MTRR counts: 6/8.
1831 09:02:55.497070 MTRR: WB selected as default type.
1832 09:02:55.503293 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1833 09:02:55.507101 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1834 09:02:55.513569 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1835 09:02:55.520325 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1836 09:02:55.526613 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1837 09:02:55.533001 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1838 09:02:55.533084
1839 09:02:55.536605 MTRR check
1840 09:02:55.536688 Fixed MTRRs : Enabled
1841 09:02:55.539972 Variable MTRRs: Enabled
1842 09:02:55.540054
1843 09:02:55.543290 MTRR: Fixed MSR 0x250 0x0606060606060606
1844 09:02:55.550051 MTRR: Fixed MSR 0x258 0x0606060606060606
1845 09:02:55.553376 MTRR: Fixed MSR 0x259 0x0000000000000000
1846 09:02:55.556611 MTRR: Fixed MSR 0x268 0x0606060606060606
1847 09:02:55.559887 MTRR: Fixed MSR 0x269 0x0606060606060606
1848 09:02:55.566162 MTRR: Fixed MSR 0x26a 0x0606060606060606
1849 09:02:55.569886 MTRR: Fixed MSR 0x26b 0x0606060606060606
1850 09:02:55.572750 MTRR: Fixed MSR 0x26c 0x0606060606060606
1851 09:02:55.576580 MTRR: Fixed MSR 0x26d 0x0606060606060606
1852 09:02:55.583227 MTRR: Fixed MSR 0x26e 0x0606060606060606
1853 09:02:55.586252 MTRR: Fixed MSR 0x26f 0x0606060606060606
1854 09:02:55.589348 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1855 09:02:55.592725 call enable_fixed_mtrr()
1856 09:02:55.599364 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1857 09:02:55.602395 CPU physical address size: 39 bits
1858 09:02:55.606162 CBFS @ c08000 size 3f8000
1859 09:02:55.609184 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1860 09:02:55.612858 CBFS: Locating 'fallback/payload'
1861 09:02:55.619515 MTRR: Fixed MSR 0x250 0x0606060606060606
1862 09:02:55.622371 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 09:02:55.625915 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 09:02:55.629185 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 09:02:55.635491 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 09:02:55.639046 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 09:02:55.642439 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 09:02:55.646023 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 09:02:55.652673 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 09:02:55.655546 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 09:02:55.659204 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 09:02:55.662058 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 09:02:55.669584 MTRR: Fixed MSR 0x258 0x0606060606060606
1874 09:02:55.669666 call enable_fixed_mtrr()
1875 09:02:55.675873 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 09:02:55.678886 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 09:02:55.682150 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 09:02:55.685984 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 09:02:55.689102 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 09:02:55.695766 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 09:02:55.698770 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 09:02:55.702172 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 09:02:55.705477 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 09:02:55.712085 CPU physical address size: 39 bits
1885 09:02:55.712191 call enable_fixed_mtrr()
1886 09:02:55.718886 MTRR: Fixed MSR 0x250 0x0606060606060606
1887 09:02:55.721894 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 09:02:55.725535 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 09:02:55.728585 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 09:02:55.735264 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 09:02:55.738871 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 09:02:55.741969 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 09:02:55.744922 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 09:02:55.751984 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 09:02:55.754733 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 09:02:55.758191 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 09:02:55.761937 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 09:02:55.768520 MTRR: Fixed MSR 0x258 0x0606060606060606
1899 09:02:55.768627 call enable_fixed_mtrr()
1900 09:02:55.775289 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 09:02:55.779101 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 09:02:55.782067 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 09:02:55.785230 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 09:02:55.788878 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 09:02:55.795117 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 09:02:55.798538 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 09:02:55.801349 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 09:02:55.805358 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 09:02:55.811616 CPU physical address size: 39 bits
1910 09:02:55.811698 call enable_fixed_mtrr()
1911 09:02:55.818003 CPU physical address size: 39 bits
1912 09:02:55.821803 CBFS: Found @ offset 1c96c0 size 3f798
1913 09:02:55.824553 CPU physical address size: 39 bits
1914 09:02:55.828051 Checking segment from ROM address 0xffdd16f8
1915 09:02:55.831366 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 09:02:55.838086 MTRR: Fixed MSR 0x250 0x0606060606060606
1917 09:02:55.841093 MTRR: Fixed MSR 0x258 0x0606060606060606
1918 09:02:55.844732 MTRR: Fixed MSR 0x259 0x0000000000000000
1919 09:02:55.847813 MTRR: Fixed MSR 0x268 0x0606060606060606
1920 09:02:55.854348 MTRR: Fixed MSR 0x269 0x0606060606060606
1921 09:02:55.857667 MTRR: Fixed MSR 0x26a 0x0606060606060606
1922 09:02:55.861117 MTRR: Fixed MSR 0x26b 0x0606060606060606
1923 09:02:55.863881 MTRR: Fixed MSR 0x26c 0x0606060606060606
1924 09:02:55.870666 MTRR: Fixed MSR 0x26d 0x0606060606060606
1925 09:02:55.874230 MTRR: Fixed MSR 0x26e 0x0606060606060606
1926 09:02:55.877275 MTRR: Fixed MSR 0x26f 0x0606060606060606
1927 09:02:55.880813 MTRR: Fixed MSR 0x258 0x0606060606060606
1928 09:02:55.883794 call enable_fixed_mtrr()
1929 09:02:55.887657 MTRR: Fixed MSR 0x259 0x0000000000000000
1930 09:02:55.894267 MTRR: Fixed MSR 0x268 0x0606060606060606
1931 09:02:55.897361 MTRR: Fixed MSR 0x269 0x0606060606060606
1932 09:02:55.900703 MTRR: Fixed MSR 0x26a 0x0606060606060606
1933 09:02:55.903439 MTRR: Fixed MSR 0x26b 0x0606060606060606
1934 09:02:55.910311 MTRR: Fixed MSR 0x26c 0x0606060606060606
1935 09:02:55.913400 MTRR: Fixed MSR 0x26d 0x0606060606060606
1936 09:02:55.917191 MTRR: Fixed MSR 0x26e 0x0606060606060606
1937 09:02:55.920220 MTRR: Fixed MSR 0x26f 0x0606060606060606
1938 09:02:55.924085 CPU physical address size: 39 bits
1939 09:02:55.927006 call enable_fixed_mtrr()
1940 09:02:55.933496 Checking segment from ROM address 0xffdd1714
1941 09:02:55.936945 CPU physical address size: 39 bits
1942 09:02:55.940037 Loading segment from ROM address 0xffdd16f8
1943 09:02:55.943145 code (compression=0)
1944 09:02:55.950187 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1945 09:02:55.959835 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1946 09:02:55.963514 it's not compressed!
1947 09:02:56.054692 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1948 09:02:56.060808 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1949 09:02:56.064375 Loading segment from ROM address 0xffdd1714
1950 09:02:56.067278 Entry Point 0x30000000
1951 09:02:56.070507 Loaded segments
1952 09:02:56.076613 Finalizing chipset.
1953 09:02:56.079654 Finalizing SMM.
1954 09:02:56.083167 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
1955 09:02:56.086080 mp_park_aps done after 0 msecs.
1956 09:02:56.092871 Jumping to boot code at 30000000(99b62000)
1957 09:02:56.099586 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
1958 09:02:56.100010
1959 09:02:56.100368
1960 09:02:56.100684
1961 09:02:56.103506 Starting depthcharge on Helios...
1962 09:02:56.104029
1963 09:02:56.105101 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
1964 09:02:56.105612 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
1965 09:02:56.106020 Setting prompt string to ['hatch:']
1966 09:02:56.106431 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
1967 09:02:56.112942 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1968 09:02:56.113364
1969 09:02:56.119874 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1970 09:02:56.120466
1971 09:02:56.126061 board_setup: Info: eMMC controller not present; skipping
1972 09:02:56.126585
1973 09:02:56.129468 New NVMe Controller 0x30053ac0 @ 00:1d:00
1974 09:02:56.129937
1975 09:02:56.136170 board_setup: Info: SDHCI controller not present; skipping
1976 09:02:56.136738
1977 09:02:56.142605 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
1978 09:02:56.143054
1979 09:02:56.143388 Wipe memory regions:
1980 09:02:56.143700
1981 09:02:56.146363 [0x00000000001000, 0x000000000a0000)
1982 09:02:56.146785
1983 09:02:56.149433 [0x00000000100000, 0x00000030000000)
1984 09:02:56.216246
1985 09:02:56.219296 [0x00000030657430, 0x00000099a2c000)
1986 09:02:56.356618
1987 09:02:56.359257 [0x00000100000000, 0x0000045e800000)
1988 09:02:57.741926
1989 09:02:57.742086 R8152: Initializing
1990 09:02:57.742187
1991 09:02:57.744648 Version 9 (ocp_data = 6010)
1992 09:02:57.749031
1993 09:02:57.749119 R8152: Done initializing
1994 09:02:57.749184
1995 09:02:57.752016 Adding net device
1996 09:02:58.235083
1997 09:02:58.235247 R8152: Initializing
1998 09:02:58.235348
1999 09:02:58.238564 Version 6 (ocp_data = 5c30)
2000 09:02:58.238692
2001 09:02:58.242096 R8152: Done initializing
2002 09:02:58.242202
2003 09:02:58.245224 net_add_device: Attemp to include the same device
2004 09:02:58.248797
2005 09:02:58.255492 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2006 09:02:58.255600
2007 09:02:58.255696
2008 09:02:58.255994 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2010 09:02:58.356361 hatch: tftpboot 192.168.201.1 13757419/tftp-deploy-f517a00_/kernel/bzImage 13757419/tftp-deploy-f517a00_/kernel/cmdline 13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
2011 09:02:58.356507 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2012 09:02:58.356590 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2013 09:02:58.360643 tftpboot 192.168.201.1 13757419/tftp-deploy-f517a00_/kernel/bzImploy-f517a00_/kernel/cmdline 13757419/tftp-deploy-f517a00_/ramdisk/ramdisk.cpio.gz
2014 09:02:58.360731
2015 09:02:58.360795 Waiting for link
2016 09:02:58.561789
2017 09:02:58.561943 done.
2018 09:02:58.562034
2019 09:02:58.562111 MAC: 00:24:32:50:19:be
2020 09:02:58.562170
2021 09:02:58.564717 Sending DHCP discover... done.
2022 09:02:58.564800
2023 09:02:58.568290 Waiting for reply... done.
2024 09:02:58.568423
2025 09:02:58.571749 Sending DHCP request... done.
2026 09:02:58.571832
2027 09:02:58.574629 Waiting for reply... done.
2028 09:02:58.574711
2029 09:02:58.577793 My ip is 192.168.201.15
2030 09:02:58.577890
2031 09:02:58.581454 The DHCP server ip is 192.168.201.1
2032 09:02:58.581538
2033 09:02:58.584265 TFTP server IP predefined by user: 192.168.201.1
2034 09:02:58.584370
2035 09:02:58.591672 Bootfile predefined by user: 13757419/tftp-deploy-f517a00_/kernel/bzImage
2036 09:02:58.591821
2037 09:02:58.594597 Sending tftp read request... done.
2038 09:02:58.594709
2039 09:02:58.601770 Waiting for the transfer...
2040 09:02:58.601853
2041 09:02:59.120349 00000000 ################################################################
2042 09:02:59.120496
2043 09:02:59.639046 00080000 ################################################################
2044 09:02:59.639187
2045 09:03:00.165725 00100000 ################################################################
2046 09:03:00.165868
2047 09:03:00.688660 00180000 ################################################################
2048 09:03:00.688792
2049 09:03:01.206868 00200000 ################################################################
2050 09:03:01.207033
2051 09:03:01.731838 00280000 ################################################################
2052 09:03:01.732004
2053 09:03:02.250022 00300000 ################################################################
2054 09:03:02.250157
2055 09:03:02.773803 00380000 ################################################################
2056 09:03:02.773986
2057 09:03:03.306471 00400000 ################################################################
2058 09:03:03.306606
2059 09:03:03.822631 00480000 ################################################################
2060 09:03:03.822799
2061 09:03:04.337992 00500000 ################################################################
2062 09:03:04.338130
2063 09:03:04.852633 00580000 ################################################################
2064 09:03:04.852767
2065 09:03:05.369009 00600000 ################################################################
2066 09:03:05.369172
2067 09:03:05.897687 00680000 ################################################################
2068 09:03:05.897826
2069 09:03:06.419813 00700000 ################################################################
2070 09:03:06.419981
2071 09:03:06.944137 00780000 ################################################################
2072 09:03:06.944272
2073 09:03:07.459922 00800000 ################################################################
2074 09:03:07.460110
2075 09:03:07.971211 00880000 ################################################################
2076 09:03:07.971351
2077 09:03:08.484414 00900000 ################################################################
2078 09:03:08.484547
2079 09:03:08.999048 00980000 ################################################################
2080 09:03:08.999182
2081 09:03:09.527431 00a00000 ################################################################
2082 09:03:09.527564
2083 09:03:10.060454 00a80000 ################################################################
2084 09:03:10.060616
2085 09:03:10.579115 00b00000 ################################################################
2086 09:03:10.579252
2087 09:03:11.095564 00b80000 ################################################################
2088 09:03:11.095702
2089 09:03:11.629220 00c00000 ################################################################
2090 09:03:11.629356
2091 09:03:12.167236 00c80000 ################################################################
2092 09:03:12.167396
2093 09:03:12.677314 00d00000 ############################################################ done.
2094 09:03:12.677463
2095 09:03:12.681222 The bootfile was 14122896 bytes long.
2096 09:03:12.681334
2097 09:03:12.684522 Sending tftp read request... done.
2098 09:03:12.684609
2099 09:03:12.687556 Waiting for the transfer...
2100 09:03:12.687639
2101 09:03:13.236799 00000000 ################################################################
2102 09:03:13.236933
2103 09:03:13.779881 00080000 ################################################################
2104 09:03:13.780036
2105 09:03:14.319352 00100000 ################################################################
2106 09:03:14.319490
2107 09:03:14.845272 00180000 ################################################################
2108 09:03:14.845415
2109 09:03:15.372914 00200000 ################################################################
2110 09:03:15.373049
2111 09:03:15.915888 00280000 ################################################################
2112 09:03:15.916057
2113 09:03:16.457033 00300000 ################################################################
2114 09:03:16.457194
2115 09:03:17.004728 00380000 ################################################################
2116 09:03:17.004868
2117 09:03:17.538759 00400000 ################################################################
2118 09:03:17.538921
2119 09:03:18.075533 00480000 ################################################################
2120 09:03:18.075677
2121 09:03:18.598371 00500000 ################################################################
2122 09:03:18.598511
2123 09:03:19.124086 00580000 ################################################################
2124 09:03:19.124261
2125 09:03:19.642916 00600000 ################################################################
2126 09:03:19.643103
2127 09:03:20.167864 00680000 ################################################################
2128 09:03:20.168028
2129 09:03:20.691743 00700000 ################################################################
2130 09:03:20.691895
2131 09:03:21.207928 00780000 ################################################################
2132 09:03:21.208103
2133 09:03:21.758679 00800000 ################################################################
2134 09:03:21.758889
2135 09:03:21.991115 00880000 ############################ done.
2136 09:03:21.991249
2137 09:03:21.993880 Sending tftp read request... done.
2138 09:03:21.993957
2139 09:03:21.997421 Waiting for the transfer...
2140 09:03:21.997498
2141 09:03:21.997560 00000000 # done.
2142 09:03:21.997621
2143 09:03:22.007105 Command line loaded dynamically from TFTP file: 13757419/tftp-deploy-f517a00_/kernel/cmdline
2144 09:03:22.007192
2145 09:03:22.027211 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2146 09:03:22.027368
2147 09:03:22.030820 ec_init(0): CrosEC protocol v3 supported (256, 256)
2148 09:03:22.038401
2149 09:03:22.041739 Shutting down all USB controllers.
2150 09:03:22.041824
2151 09:03:22.041891 Removing current net device
2152 09:03:22.045847
2153 09:03:22.045933 Finalizing coreboot
2154 09:03:22.046000
2155 09:03:22.052550 Exiting depthcharge with code 4 at timestamp: 33338298
2156 09:03:22.052649
2157 09:03:22.052715
2158 09:03:22.052778 Starting kernel ...
2159 09:03:22.052837
2160 09:03:22.052895
2161 09:03:22.053291 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2162 09:03:22.053390 start: 2.2.5 auto-login-action (timeout 00:04:16) [common]
2163 09:03:22.053468 Setting prompt string to ['Linux version [0-9]']
2164 09:03:22.053539 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2165 09:03:22.053608 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2167 09:07:38.053643 end: 2.2.5 auto-login-action (duration 00:04:16) [common]
2169 09:07:38.053849 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 256 seconds'
2171 09:07:38.054010 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2174 09:07:38.054259 end: 2 depthcharge-action (duration 00:05:00) [common]
2176 09:07:38.054477 Cleaning after the job
2177 09:07:38.054567 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/ramdisk
2178 09:07:38.055556 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/kernel
2179 09:07:38.057063 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/13757419/tftp-deploy-f517a00_/modules
2180 09:07:38.057551 start: 4.1 power-off (timeout 00:00:30) [common]
2181 09:07:38.057712 Calling: ['pduclient', '--daemon=localhost', '--hostname=asus-C436FA-Flip-hatch-cbg-3', '--port=1', '--command=off']
2182 09:07:38.134608 >> Command sent successfully.
2183 09:07:38.137382 Returned 0 in 0 seconds
2184 09:07:38.237856 end: 4.1 power-off (duration 00:00:00) [common]
2186 09:07:38.238347 start: 4.2 read-feedback (timeout 00:10:00) [common]
2187 09:07:38.238614 Listened to connection for namespace 'common' for up to 1s
2189 09:07:38.238992 Listened to connection for namespace 'common' for up to 1s
2190 09:07:39.239552 Finalising connection for namespace 'common'
2191 09:07:39.239738 Disconnecting from shell: Finalise
2192 09:07:39.239819
2193 09:07:39.340128 end: 4.2 read-feedback (duration 00:00:01) [common]
2194 09:07:39.340295 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/13757419
2195 09:07:39.355893 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/13757419
2196 09:07:39.356082 JobError: Your job cannot terminate cleanly.