Boot log: asus-C436FA-Flip-hatch

    1 12:44:08.680460  lava-dispatcher, installed at version: 2023.01
    2 12:44:08.680659  start: 0 validate
    3 12:44:08.680777  Start time: 2023-03-22 12:44:08.680771+00:00 (UTC)
    4 12:44:08.680936  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:44:08.681061  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
    6 12:44:08.972248  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:44:08.972438  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:44:09.262789  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:44:09.263431  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 12:44:13.202599  validate duration: 4.52
   12 12:44:13.202885  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 12:44:13.203045  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 12:44:13.203152  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 12:44:13.203255  Not decompressing ramdisk as can be used compressed.
   16 12:44:13.203335  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
   17 12:44:13.203399  saving as /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/ramdisk/rootfs.cpio.gz
   18 12:44:13.203460  total size: 8429740 (8MB)
   19 12:44:13.931131  progress   0% (0MB)
   20 12:44:13.936149  progress   5% (0MB)
   21 12:44:13.938286  progress  10% (0MB)
   22 12:44:13.940348  progress  15% (1MB)
   23 12:44:13.942428  progress  20% (1MB)
   24 12:44:13.944496  progress  25% (2MB)
   25 12:44:13.946600  progress  30% (2MB)
   26 12:44:13.948620  progress  35% (2MB)
   27 12:44:13.950527  progress  40% (3MB)
   28 12:44:13.952601  progress  45% (3MB)
   29 12:44:13.954637  progress  50% (4MB)
   30 12:44:13.956613  progress  55% (4MB)
   31 12:44:13.958627  progress  60% (4MB)
   32 12:44:13.960601  progress  65% (5MB)
   33 12:44:13.962615  progress  70% (5MB)
   34 12:44:13.964447  progress  75% (6MB)
   35 12:44:13.966512  progress  80% (6MB)
   36 12:44:13.968485  progress  85% (6MB)
   37 12:44:13.970501  progress  90% (7MB)
   38 12:44:13.972523  progress  95% (7MB)
   39 12:44:13.974636  progress 100% (8MB)
   40 12:44:13.974761  8MB downloaded in 0.77s (10.42MB/s)
   41 12:44:13.974906  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 12:44:13.975155  end: 1.1 download-retry (duration 00:00:01) [common]
   44 12:44:13.975242  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 12:44:13.975325  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 12:44:13.975426  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 12:44:13.975491  saving as /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/kernel/bzImage
   48 12:44:13.975553  total size: 11646080 (11MB)
   49 12:44:13.975611  No compression specified
   50 12:44:13.976484  progress   0% (0MB)
   51 12:44:13.979295  progress   5% (0MB)
   52 12:44:13.982244  progress  10% (1MB)
   53 12:44:13.985104  progress  15% (1MB)
   54 12:44:13.987965  progress  20% (2MB)
   55 12:44:13.990863  progress  25% (2MB)
   56 12:44:13.993686  progress  30% (3MB)
   57 12:44:13.996715  progress  35% (3MB)
   58 12:44:13.999575  progress  40% (4MB)
   59 12:44:14.002260  progress  45% (5MB)
   60 12:44:14.005153  progress  50% (5MB)
   61 12:44:14.008038  progress  55% (6MB)
   62 12:44:14.011207  progress  60% (6MB)
   63 12:44:14.014068  progress  65% (7MB)
   64 12:44:14.016710  progress  70% (7MB)
   65 12:44:14.019578  progress  75% (8MB)
   66 12:44:14.022436  progress  80% (8MB)
   67 12:44:14.025232  progress  85% (9MB)
   68 12:44:14.027878  progress  90% (10MB)
   69 12:44:14.030671  progress  95% (10MB)
   70 12:44:14.033436  progress 100% (11MB)
   71 12:44:14.033587  11MB downloaded in 0.06s (191.39MB/s)
   72 12:44:14.033776  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 12:44:14.034013  end: 1.2 download-retry (duration 00:00:00) [common]
   75 12:44:14.034101  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 12:44:14.034190  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 12:44:14.034297  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 12:44:14.034366  saving as /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/modules/modules.tar
   79 12:44:14.034431  total size: 497788 (0MB)
   80 12:44:14.034490  Using unxz to decompress xz
   81 12:44:14.037398  progress   6% (0MB)
   82 12:44:14.037806  progress  13% (0MB)
   83 12:44:14.038045  progress  19% (0MB)
   84 12:44:14.039424  progress  26% (0MB)
   85 12:44:14.041322  progress  32% (0MB)
   86 12:44:14.043370  progress  39% (0MB)
   87 12:44:14.045235  progress  46% (0MB)
   88 12:44:14.047106  progress  52% (0MB)
   89 12:44:14.049355  progress  59% (0MB)
   90 12:44:14.051250  progress  65% (0MB)
   91 12:44:14.053236  progress  72% (0MB)
   92 12:44:14.055091  progress  78% (0MB)
   93 12:44:14.056955  progress  85% (0MB)
   94 12:44:14.058956  progress  92% (0MB)
   95 12:44:14.060932  progress  98% (0MB)
   96 12:44:14.067687  0MB downloaded in 0.03s (14.28MB/s)
   97 12:44:14.067964  end: 1.3.1 http-download (duration 00:00:00) [common]
   99 12:44:14.068269  end: 1.3 download-retry (duration 00:00:00) [common]
  100 12:44:14.068362  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
  101 12:44:14.068458  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
  102 12:44:14.068544  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
  103 12:44:14.068630  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
  104 12:44:14.068806  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29
  105 12:44:14.068912  makedir: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin
  106 12:44:14.068998  makedir: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/tests
  107 12:44:14.069077  makedir: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/results
  108 12:44:14.069184  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-add-keys
  109 12:44:14.069317  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-add-sources
  110 12:44:14.069430  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-background-process-start
  111 12:44:14.069541  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-background-process-stop
  112 12:44:14.069650  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-common-functions
  113 12:44:14.069796  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-echo-ipv4
  114 12:44:14.069905  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-install-packages
  115 12:44:14.070014  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-installed-packages
  116 12:44:14.070120  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-os-build
  117 12:44:14.070227  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-probe-channel
  118 12:44:14.070334  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-probe-ip
  119 12:44:14.070440  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-target-ip
  120 12:44:14.070545  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-target-mac
  121 12:44:14.070649  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-target-storage
  122 12:44:14.070759  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-case
  123 12:44:14.070868  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-event
  124 12:44:14.070972  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-feedback
  125 12:44:14.071080  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-raise
  126 12:44:14.071190  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-reference
  127 12:44:14.071296  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-runner
  128 12:44:14.071459  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-set
  129 12:44:14.071568  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-test-shell
  130 12:44:14.071679  Updating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-install-packages (oe)
  131 12:44:14.071789  Updating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/bin/lava-installed-packages (oe)
  132 12:44:14.071888  Creating /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/environment
  133 12:44:14.071978  LAVA metadata
  134 12:44:14.072049  - LAVA_JOB_ID=9729697
  135 12:44:14.072115  - LAVA_DISPATCHER_IP=192.168.201.1
  136 12:44:14.072217  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  137 12:44:14.072283  skipped lava-vland-overlay
  138 12:44:14.072360  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  139 12:44:14.072445  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  140 12:44:14.072510  skipped lava-multinode-overlay
  141 12:44:14.072584  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  142 12:44:14.072669  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  143 12:44:14.072742  Loading test definitions
  144 12:44:14.072841  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  145 12:44:14.072924  Using /lava-9729697 at stage 0
  146 12:44:14.073175  uuid=9729697_1.4.2.3.1 testdef=None
  147 12:44:14.073266  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  148 12:44:14.073375  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  149 12:44:14.073905  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  151 12:44:14.074131  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  152 12:44:14.074688  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  154 12:44:14.074925  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  155 12:44:14.075455  runner path: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/0/tests/0_dmesg test_uuid 9729697_1.4.2.3.1
  156 12:44:14.075598  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  158 12:44:14.075830  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  159 12:44:14.075904  Using /lava-9729697 at stage 1
  160 12:44:14.076144  uuid=9729697_1.4.2.3.5 testdef=None
  161 12:44:14.076237  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  162 12:44:14.076324  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  163 12:44:14.076827  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  165 12:44:14.077046  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  166 12:44:14.077604  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  168 12:44:14.077880  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  169 12:44:14.078416  runner path: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/1/tests/1_bootrr test_uuid 9729697_1.4.2.3.5
  170 12:44:14.078553  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  172 12:44:14.078761  Creating lava-test-runner.conf files
  173 12:44:14.078825  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/0 for stage 0
  174 12:44:14.078904  - 0_dmesg
  175 12:44:14.078977  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729697/lava-overlay-jd43ux29/lava-9729697/1 for stage 1
  176 12:44:14.079057  - 1_bootrr
  177 12:44:14.079146  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  178 12:44:14.079231  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  179 12:44:14.085522  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  180 12:44:14.085636  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  181 12:44:14.085750  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  182 12:44:14.085856  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  183 12:44:14.085945  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  184 12:44:14.272521  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  185 12:44:14.272859  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  186 12:44:14.272972  extracting modules file /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729697/extract-overlay-ramdisk-s7km4baq/ramdisk
  187 12:44:14.286100  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  188 12:44:14.286284  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  189 12:44:14.286397  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729697/compress-overlay-4ces9xim/overlay-1.4.2.4.tar.gz to ramdisk
  190 12:44:14.286472  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729697/compress-overlay-4ces9xim/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729697/extract-overlay-ramdisk-s7km4baq/ramdisk
  191 12:44:14.290490  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  192 12:44:14.290601  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  193 12:44:14.290690  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  194 12:44:14.290779  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  195 12:44:14.290860  Building ramdisk /var/lib/lava/dispatcher/tmp/9729697/extract-overlay-ramdisk-s7km4baq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729697/extract-overlay-ramdisk-s7km4baq/ramdisk
  196 12:44:14.362594  >> 53721 blocks

  197 12:44:15.220024  rename /var/lib/lava/dispatcher/tmp/9729697/extract-overlay-ramdisk-s7km4baq/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz
  198 12:44:15.220426  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  199 12:44:15.220550  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  200 12:44:15.220654  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  201 12:44:15.220750  No mkimage arch provided, not using FIT.
  202 12:44:15.220870  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  203 12:44:15.220958  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  204 12:44:15.221054  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  205 12:44:15.221143  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  206 12:44:15.221220  No LXC device requested
  207 12:44:15.221301  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  208 12:44:15.221392  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  209 12:44:15.221489  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  210 12:44:15.221561  Checking files for TFTP limit of 4294967296 bytes.
  211 12:44:15.221969  end: 1 tftp-deploy (duration 00:00:02) [common]
  212 12:44:15.222097  start: 2 depthcharge-action (timeout 00:05:00) [common]
  213 12:44:15.222218  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  214 12:44:15.222378  substitutions:
  215 12:44:15.222465  - {DTB}: None
  216 12:44:15.222533  - {INITRD}: 9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz
  217 12:44:15.222595  - {KERNEL}: 9729697/tftp-deploy-t_yif5br/kernel/bzImage
  218 12:44:15.222656  - {LAVA_MAC}: None
  219 12:44:15.222715  - {PRESEED_CONFIG}: None
  220 12:44:15.222785  - {PRESEED_LOCAL}: None
  221 12:44:15.222846  - {RAMDISK}: 9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz
  222 12:44:15.222903  - {ROOT_PART}: None
  223 12:44:15.222958  - {ROOT}: None
  224 12:44:15.223014  - {SERVER_IP}: 192.168.201.1
  225 12:44:15.223069  - {TEE}: None
  226 12:44:15.223124  Parsed boot commands:
  227 12:44:15.223178  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  228 12:44:15.223329  Parsed boot commands: tftpboot 192.168.201.1 9729697/tftp-deploy-t_yif5br/kernel/bzImage 9729697/tftp-deploy-t_yif5br/kernel/cmdline 9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz
  229 12:44:15.223418  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  230 12:44:15.223510  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  231 12:44:15.223610  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  232 12:44:15.223697  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  233 12:44:15.223766  Not connected, no need to disconnect.
  234 12:44:15.223843  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  235 12:44:15.223923  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  236 12:44:15.223987  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-1'
  237 12:44:15.226950  Setting prompt string to ['lava-test: # ']
  238 12:44:15.227284  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  239 12:44:15.227409  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  240 12:44:15.227536  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  241 12:44:15.227659  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  242 12:44:15.227884  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=reboot'
  243 12:44:20.346904  >> Command sent successfully.

  244 12:44:20.349132  Returned 0 in 5 seconds
  245 12:44:20.449888  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  247 12:44:20.450257  end: 2.2.2 reset-device (duration 00:00:05) [common]
  248 12:44:20.450357  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  249 12:44:20.450443  Setting prompt string to 'Starting depthcharge on Helios...'
  250 12:44:20.450511  Changing prompt to 'Starting depthcharge on Helios...'
  251 12:44:20.450580  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  252 12:44:20.450853  [Enter `^Ec?' for help]

  253 12:44:21.069089  

  254 12:44:21.069306  

  255 12:44:21.079022  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  256 12:44:21.082099  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  257 12:44:21.088732  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  258 12:44:21.092129  CPU: AES supported, TXT NOT supported, VT supported

  259 12:44:21.098801  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  260 12:44:21.102010  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  261 12:44:21.108527  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  262 12:44:21.111592  VBOOT: Loading verstage.

  263 12:44:21.115042  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  264 12:44:21.121654  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  265 12:44:21.128146  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  266 12:44:21.128259  CBFS @ c08000 size 3f8000

  267 12:44:21.135027  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  268 12:44:21.138059  CBFS: Locating 'fallback/verstage'

  269 12:44:21.141559  CBFS: Found @ offset 10fb80 size 1072c

  270 12:44:21.145519  

  271 12:44:21.145615  

  272 12:44:21.155729  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  273 12:44:21.169992  Probing TPM: . done!

  274 12:44:21.173385  TPM ready after 0 ms

  275 12:44:21.176430  Connected to device vid:did:rid of 1ae0:0028:00

  276 12:44:21.186849  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  277 12:44:21.190188  Initialized TPM device CR50 revision 0

  278 12:44:21.232336  tlcl_send_startup: Startup return code is 0

  279 12:44:21.232480  TPM: setup succeeded

  280 12:44:21.245191  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  281 12:44:21.249039  Chrome EC: UHEPI supported

  282 12:44:21.252162  Phase 1

  283 12:44:21.255294  FMAP: area GBB found @ c05000 (12288 bytes)

  284 12:44:21.262034  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  285 12:44:21.265392  Phase 2

  286 12:44:21.265485  Phase 3

  287 12:44:21.268536  FMAP: area GBB found @ c05000 (12288 bytes)

  288 12:44:21.275159  VB2:vb2_report_dev_firmware() This is developer signed firmware

  289 12:44:21.282076  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  290 12:44:21.285125  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  291 12:44:21.291512  VB2:vb2_verify_keyblock() Checking keyblock signature...

  292 12:44:21.307558  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  293 12:44:21.310701  FMAP: area VBLOCK_B found @ 768000 (65536 bytes)

  294 12:44:21.317523  VB2:vb2_verify_fw_preamble() Verifying preamble.

  295 12:44:21.321976  Phase 4

  296 12:44:21.324870  FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)

  297 12:44:21.331720  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  298 12:44:21.511320  VB2:vb2_rsa_verify_digest() Digest check failed!

  299 12:44:21.517605  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  300 12:44:21.517699  Saving nvdata

  301 12:44:21.521101  Reboot requested (10020007)

  302 12:44:21.524214  board_reset() called!

  303 12:44:21.524300  full_reset() called!

  304 12:44:26.036021  

  305 12:44:26.036592  

  306 12:44:26.046059  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:44:26.049154  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:44:26.055769  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:44:26.059041  CPU: AES supported, TXT NOT supported, VT supported

  310 12:44:26.065317  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:44:26.068919  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:44:26.075652  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:44:26.078637  VBOOT: Loading verstage.

  314 12:44:26.085207  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:44:26.088449  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:44:26.094780  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:44:26.095092  CBFS @ c08000 size 3f8000

  318 12:44:26.101377  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:44:26.104621  CBFS: Locating 'fallback/verstage'

  320 12:44:26.107869  CBFS: Found @ offset 10fb80 size 1072c

  321 12:44:26.112264  

  322 12:44:26.112462  

  323 12:44:26.122481  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:44:26.137219  Probing TPM: . done!

  325 12:44:26.140196  TPM ready after 0 ms

  326 12:44:26.143435  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:44:26.153481  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  328 12:44:26.156958  Initialized TPM device CR50 revision 0

  329 12:44:26.199642  tlcl_send_startup: Startup return code is 0

  330 12:44:26.200081  TPM: setup succeeded

  331 12:44:26.212356  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:44:26.216088  Chrome EC: UHEPI supported

  333 12:44:26.219850  Phase 1

  334 12:44:26.222650  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:44:26.229026  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  336 12:44:26.235938  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  337 12:44:26.238986  Recovery requested (1009000e)

  338 12:44:26.245277  Saving nvdata

  339 12:44:26.251406  tlcl_extend: response is 0

  340 12:44:26.259829  tlcl_extend: response is 0

  341 12:44:26.266868  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  342 12:44:26.270102  CBFS @ c08000 size 3f8000

  343 12:44:26.276921  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  344 12:44:26.280026  CBFS: Locating 'fallback/romstage'

  345 12:44:26.283484  CBFS: Found @ offset 80 size 145fc

  346 12:44:26.286442  Accumulated console time in verstage 98 ms

  347 12:44:26.286892  

  348 12:44:26.289963  

  349 12:44:26.299881  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  350 12:44:26.306223  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  351 12:44:26.309894  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  352 12:44:26.312974  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  353 12:44:26.319511  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  354 12:44:26.322848  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  355 12:44:26.325805  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  356 12:44:26.329809  TCO_STS:   0000 0000

  357 12:44:26.332577  GEN_PMCON: e0015238 00000200

  358 12:44:26.335740  GBLRST_CAUSE: 00000000 00000000

  359 12:44:26.338897  prev_sleep_state 5

  360 12:44:26.342451  Boot Count incremented to 49919

  361 12:44:26.345618  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  362 12:44:26.349019  CBFS @ c08000 size 3f8000

  363 12:44:26.355433  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  364 12:44:26.358912  CBFS: Locating 'fspm.bin'

  365 12:44:26.361938  CBFS: Found @ offset 5ffc0 size 71000

  366 12:44:26.365491  Chrome EC: UHEPI supported

  367 12:44:26.371887  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  368 12:44:26.377012  Probing TPM:  done!

  369 12:44:26.383303  Connected to device vid:did:rid of 1ae0:0028:00

  370 12:44:26.393298  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  371 12:44:26.399006  Initialized TPM device CR50 revision 0

  372 12:44:26.408038  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  373 12:44:26.417929  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  374 12:44:26.418472  MRC cache found, size 1948

  375 12:44:26.421140  bootmode is set to: 2

  376 12:44:26.424394  PRMRR disabled by config.

  377 12:44:26.427803  SPD INDEX = 1

  378 12:44:26.430868  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  379 12:44:26.433830  CBFS @ c08000 size 3f8000

  380 12:44:26.440729  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  381 12:44:26.441338  CBFS: Locating 'spd.bin'

  382 12:44:26.447451  CBFS: Found @ offset 5fb80 size 400

  383 12:44:26.447893  SPD: module type is LPDDR3

  384 12:44:26.450508  SPD: module part is 

  385 12:44:26.457230  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  386 12:44:26.460302  SPD: device width 4 bits, bus width 8 bits

  387 12:44:26.463594  SPD: module size is 4096 MB (per channel)

  388 12:44:26.470394  memory slot: 0 configuration done.

  389 12:44:26.473527  memory slot: 2 configuration done.

  390 12:44:26.522624  CBMEM:

  391 12:44:26.525555  IMD: root @ 99fff000 254 entries.

  392 12:44:26.528994  IMD: root @ 99ffec00 62 entries.

  393 12:44:26.532437  External stage cache:

  394 12:44:26.535594  IMD: root @ 9abff000 254 entries.

  395 12:44:26.538873  IMD: root @ 9abfec00 62 entries.

  396 12:44:26.545631  Chrome EC: clear events_b mask to 0x0000000020004000

  397 12:44:26.558206  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  398 12:44:26.568194  tlcl_write: response is 0

  399 12:44:26.580183  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  400 12:44:26.586527  MRC: TPM MRC hash updated successfully.

  401 12:44:26.587036  2 DIMMs found

  402 12:44:26.590159  SMM Memory Map

  403 12:44:26.593368  SMRAM       : 0x9a000000 0x1000000

  404 12:44:26.596803   Subregion 0: 0x9a000000 0xa00000

  405 12:44:26.599844   Subregion 1: 0x9aa00000 0x200000

  406 12:44:26.603448   Subregion 2: 0x9ac00000 0x400000

  407 12:44:26.606672  top_of_ram = 0x9a000000

  408 12:44:26.609889  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  409 12:44:26.616640  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  410 12:44:26.619734  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  411 12:44:26.626430  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  412 12:44:26.629342  CBFS @ c08000 size 3f8000

  413 12:44:26.632947  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  414 12:44:26.636346  CBFS: Locating 'fallback/postcar'

  415 12:44:26.642784  CBFS: Found @ offset 107000 size 4b44

  416 12:44:26.649044  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  417 12:44:26.659136  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  418 12:44:26.662227  Processing 180 relocs. Offset value of 0x97c0c000

  419 12:44:26.670991  Accumulated console time in romstage 286 ms

  420 12:44:26.671439  

  421 12:44:26.671873  

  422 12:44:26.680943  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  423 12:44:26.687505  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  424 12:44:26.691122  CBFS @ c08000 size 3f8000

  425 12:44:26.694422  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  426 12:44:26.701373  CBFS: Locating 'fallback/ramstage'

  427 12:44:26.704303  CBFS: Found @ offset 43380 size 1b9e8

  428 12:44:26.710487  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  429 12:44:26.742604  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  430 12:44:26.749011  Processing 3976 relocs. Offset value of 0x98db0000

  431 12:44:26.752272  Accumulated console time in postcar 52 ms

  432 12:44:26.752770  

  433 12:44:26.753158  

  434 12:44:26.762308  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  435 12:44:26.768787  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  436 12:44:26.772177  WARNING: RO_VPD is uninitialized or empty.

  437 12:44:26.775249  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  438 12:44:26.781896  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  439 12:44:26.782372  Normal boot.

  440 12:44:26.788548  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  441 12:44:26.791779  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  442 12:44:26.795169  CBFS @ c08000 size 3f8000

  443 12:44:26.801882  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  444 12:44:26.805091  CBFS: Locating 'cpu_microcode_blob.bin'

  445 12:44:26.808458  CBFS: Found @ offset 14700 size 2ec00

  446 12:44:26.811867  microcode: sig=0x806ec pf=0x4 revision=0xc9

  447 12:44:26.815128  Skip microcode update

  448 12:44:26.821505  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  449 12:44:26.824958  CBFS @ c08000 size 3f8000

  450 12:44:26.828113  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  451 12:44:26.831457  CBFS: Locating 'fsps.bin'

  452 12:44:26.834579  CBFS: Found @ offset d1fc0 size 35000

  453 12:44:26.860841  Detected 4 core, 8 thread CPU.

  454 12:44:26.864049  Setting up SMI for CPU

  455 12:44:26.867653  IED base = 0x9ac00000

  456 12:44:26.870645  IED size = 0x00400000

  457 12:44:26.871121  Will perform SMM setup.

  458 12:44:26.877375  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  459 12:44:26.883749  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  460 12:44:26.890519  Processing 16 relocs. Offset value of 0x00030000

  461 12:44:26.893574  Attempting to start 7 APs

  462 12:44:26.896813  Waiting for 10ms after sending INIT.

  463 12:44:26.910758  Waiting for 1st SIPI to complete...done.

  464 12:44:26.911295  AP: slot 7 apic_id 5.

  465 12:44:26.914123  AP: slot 5 apic_id 4.

  466 12:44:26.917344  AP: slot 3 apic_id 7.

  467 12:44:26.917830  AP: slot 6 apic_id 6.

  468 12:44:26.920530  AP: slot 2 apic_id 1.

  469 12:44:26.923982  Waiting for 2nd SIPI to complete...done.

  470 12:44:26.927299  AP: slot 1 apic_id 2.

  471 12:44:26.930439  AP: slot 4 apic_id 3.

  472 12:44:26.937414  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  473 12:44:26.943754  Processing 13 relocs. Offset value of 0x00038000

  474 12:44:26.950159  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  475 12:44:26.953281  Installing SMM handler to 0x9a000000

  476 12:44:26.959882  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  477 12:44:26.966665  Processing 658 relocs. Offset value of 0x9a010000

  478 12:44:26.973323  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  479 12:44:26.976343  Processing 13 relocs. Offset value of 0x9a008000

  480 12:44:26.983137  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  481 12:44:26.989866  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  482 12:44:26.996326  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  483 12:44:26.999614  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  484 12:44:27.006249  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  485 12:44:27.012605  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  486 12:44:27.019186  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  487 12:44:27.025771  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  488 12:44:27.029412  Clearing SMI status registers

  489 12:44:27.029906  SMI_STS: PM1 

  490 12:44:27.032361  PM1_STS: PWRBTN 

  491 12:44:27.032814  TCO_STS: SECOND_TO 

  492 12:44:27.035898  New SMBASE 0x9a000000

  493 12:44:27.039067  In relocation handler: CPU 0

  494 12:44:27.042221  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  495 12:44:27.048969  Writing SMRR. base = 0x9a000006, mask=0xff000800

  496 12:44:27.049427  Relocation complete.

  497 12:44:27.052390  New SMBASE 0x99fff800

  498 12:44:27.055694  In relocation handler: CPU 2

  499 12:44:27.058773  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  500 12:44:27.065510  Writing SMRR. base = 0x9a000006, mask=0xff000800

  501 12:44:27.066000  Relocation complete.

  502 12:44:27.068683  New SMBASE 0x99ffe800

  503 12:44:27.071957  In relocation handler: CPU 6

  504 12:44:27.075378  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  505 12:44:27.081685  Writing SMRR. base = 0x9a000006, mask=0xff000800

  506 12:44:27.082176  Relocation complete.

  507 12:44:27.084914  New SMBASE 0x99fffc00

  508 12:44:27.088538  In relocation handler: CPU 1

  509 12:44:27.091898  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  510 12:44:27.098281  Writing SMRR. base = 0x9a000006, mask=0xff000800

  511 12:44:27.098819  Relocation complete.

  512 12:44:27.101335  New SMBASE 0x99fff000

  513 12:44:27.104909  In relocation handler: CPU 4

  514 12:44:27.108028  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  515 12:44:27.114786  Writing SMRR. base = 0x9a000006, mask=0xff000800

  516 12:44:27.115304  Relocation complete.

  517 12:44:27.118080  New SMBASE 0x99fff400

  518 12:44:27.121408  In relocation handler: CPU 3

  519 12:44:27.124700  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  520 12:44:27.130906  Writing SMRR. base = 0x9a000006, mask=0xff000800

  521 12:44:27.131364  Relocation complete.

  522 12:44:27.134262  New SMBASE 0x99ffe400

  523 12:44:27.137357  In relocation handler: CPU 7

  524 12:44:27.140782  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  525 12:44:27.147505  Writing SMRR. base = 0x9a000006, mask=0xff000800

  526 12:44:27.148056  Relocation complete.

  527 12:44:27.150827  New SMBASE 0x99ffec00

  528 12:44:27.153870  In relocation handler: CPU 5

  529 12:44:27.157272  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  530 12:44:27.163838  Writing SMRR. base = 0x9a000006, mask=0xff000800

  531 12:44:27.164299  Relocation complete.

  532 12:44:27.167404  Initializing CPU #0

  533 12:44:27.170638  CPU: vendor Intel device 806ec

  534 12:44:27.173681  CPU: family 06, model 8e, stepping 0c

  535 12:44:27.177297  Clearing out pending MCEs

  536 12:44:27.180332  Setting up local APIC...

  537 12:44:27.180786   apic_id: 0x00 done.

  538 12:44:27.183731  Turbo is available but hidden

  539 12:44:27.187018  Turbo is available and visible

  540 12:44:27.190142  VMX status: enabled

  541 12:44:27.193483  IA32_FEATURE_CONTROL status: locked

  542 12:44:27.194048  Skip microcode update

  543 12:44:27.196905  CPU #0 initialized

  544 12:44:27.200208  Initializing CPU #2

  545 12:44:27.200662  Initializing CPU #4

  546 12:44:27.203417  Initializing CPU #1

  547 12:44:27.206972  CPU: vendor Intel device 806ec

  548 12:44:27.210128  CPU: family 06, model 8e, stepping 0c

  549 12:44:27.213165  CPU: vendor Intel device 806ec

  550 12:44:27.216842  CPU: family 06, model 8e, stepping 0c

  551 12:44:27.220110  Clearing out pending MCEs

  552 12:44:27.223538  Clearing out pending MCEs

  553 12:44:27.223994  Setting up local APIC...

  554 12:44:27.226718  Initializing CPU #6

  555 12:44:27.230052  CPU: vendor Intel device 806ec

  556 12:44:27.233432  CPU: family 06, model 8e, stepping 0c

  557 12:44:27.236551  Clearing out pending MCEs

  558 12:44:27.239917  Initializing CPU #3

  559 12:44:27.243535  CPU: vendor Intel device 806ec

  560 12:44:27.246516  CPU: family 06, model 8e, stepping 0c

  561 12:44:27.249608  CPU: vendor Intel device 806ec

  562 12:44:27.252843  CPU: family 06, model 8e, stepping 0c

  563 12:44:27.256460  Clearing out pending MCEs

  564 12:44:27.256914  Clearing out pending MCEs

  565 12:44:27.259704  Setting up local APIC...

  566 12:44:27.262837  Setting up local APIC...

  567 12:44:27.266346  Setting up local APIC...

  568 12:44:27.266786  Initializing CPU #5

  569 12:44:27.269538  Initializing CPU #7

  570 12:44:27.273073  CPU: vendor Intel device 806ec

  571 12:44:27.276186  CPU: family 06, model 8e, stepping 0c

  572 12:44:27.279566  CPU: vendor Intel device 806ec

  573 12:44:27.282584  CPU: family 06, model 8e, stepping 0c

  574 12:44:27.286073  Clearing out pending MCEs

  575 12:44:27.289252  Clearing out pending MCEs

  576 12:44:27.289772  Setting up local APIC...

  577 12:44:27.292547   apic_id: 0x06 done.

  578 12:44:27.295980   apic_id: 0x07 done.

  579 12:44:27.296443  VMX status: enabled

  580 12:44:27.299421  VMX status: enabled

  581 12:44:27.302483  IA32_FEATURE_CONTROL status: locked

  582 12:44:27.305521  IA32_FEATURE_CONTROL status: locked

  583 12:44:27.308839  Skip microcode update

  584 12:44:27.312339  Skip microcode update

  585 12:44:27.312785  CPU #6 initialized

  586 12:44:27.315688  CPU #3 initialized

  587 12:44:27.316135   apic_id: 0x04 done.

  588 12:44:27.318669  Setting up local APIC...

  589 12:44:27.322228   apic_id: 0x03 done.

  590 12:44:27.325361  Setting up local APIC...

  591 12:44:27.325854  VMX status: enabled

  592 12:44:27.329030   apic_id: 0x05 done.

  593 12:44:27.332451  IA32_FEATURE_CONTROL status: locked

  594 12:44:27.335371  VMX status: enabled

  595 12:44:27.335818  Skip microcode update

  596 12:44:27.338875  IA32_FEATURE_CONTROL status: locked

  597 12:44:27.342244  CPU #5 initialized

  598 12:44:27.345501  Skip microcode update

  599 12:44:27.346039  VMX status: enabled

  600 12:44:27.348612   apic_id: 0x02 done.

  601 12:44:27.352031  IA32_FEATURE_CONTROL status: locked

  602 12:44:27.355131  VMX status: enabled

  603 12:44:27.355668  Skip microcode update

  604 12:44:27.358552  IA32_FEATURE_CONTROL status: locked

  605 12:44:27.361633  CPU #4 initialized

  606 12:44:27.365280  Skip microcode update

  607 12:44:27.365744   apic_id: 0x01 done.

  608 12:44:27.368402  CPU #7 initialized

  609 12:44:27.371660  CPU #1 initialized

  610 12:44:27.372104  VMX status: enabled

  611 12:44:27.375023  IA32_FEATURE_CONTROL status: locked

  612 12:44:27.377939  Skip microcode update

  613 12:44:27.381635  CPU #2 initialized

  614 12:44:27.384615  bsp_do_flight_plan done after 457 msecs.

  615 12:44:27.387965  CPU: frequency set to 4200 MHz

  616 12:44:27.388406  Enabling SMIs.

  617 12:44:27.391472  Locking SMM.

  618 12:44:27.404976  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  619 12:44:27.408515  CBFS @ c08000 size 3f8000

  620 12:44:27.414810  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  621 12:44:27.415263  CBFS: Locating 'vbt.bin'

  622 12:44:27.421319  CBFS: Found @ offset 5f5c0 size 499

  623 12:44:27.424620  Found a VBT of 4608 bytes after decompression

  624 12:44:27.606779  Display FSP Version Info HOB

  625 12:44:27.609748  Reference Code - CPU = 9.0.1e.30

  626 12:44:27.613103  uCode Version = 0.0.0.ca

  627 12:44:27.616566  TXT ACM version = ff.ff.ff.ffff

  628 12:44:27.619527  Display FSP Version Info HOB

  629 12:44:27.622917  Reference Code - ME = 9.0.1e.30

  630 12:44:27.625978  MEBx version = 0.0.0.0

  631 12:44:27.629327  ME Firmware Version = Consumer SKU

  632 12:44:27.632551  Display FSP Version Info HOB

  633 12:44:27.635705  Reference Code - CML PCH = 9.0.1e.30

  634 12:44:27.639284  PCH-CRID Status = Disabled

  635 12:44:27.642534  PCH-CRID Original Value = ff.ff.ff.ffff

  636 12:44:27.645842  PCH-CRID New Value = ff.ff.ff.ffff

  637 12:44:27.649093  OPROM - RST - RAID = ff.ff.ff.ffff

  638 12:44:27.652162  ChipsetInit Base Version = ff.ff.ff.ffff

  639 12:44:27.655939  ChipsetInit Oem Version = ff.ff.ff.ffff

  640 12:44:27.658957  Display FSP Version Info HOB

  641 12:44:27.665489  Reference Code - SA - System Agent = 9.0.1e.30

  642 12:44:27.668600  Reference Code - MRC = 0.7.1.6c

  643 12:44:27.671818  SA - PCIe Version = 9.0.1e.30

  644 12:44:27.675647  SA-CRID Status = Disabled

  645 12:44:27.678614  SA-CRID Original Value = 0.0.0.c

  646 12:44:27.678929  SA-CRID New Value = 0.0.0.c

  647 12:44:27.681679  OPROM - VBIOS = ff.ff.ff.ffff

  648 12:44:27.685129  RTC Init

  649 12:44:27.688251  Set power on after power failure.

  650 12:44:27.688564  Disabling Deep S3

  651 12:44:27.691679  Disabling Deep S3

  652 12:44:27.694833  Disabling Deep S4

  653 12:44:27.695148  Disabling Deep S4

  654 12:44:27.697945  Disabling Deep S5

  655 12:44:27.698257  Disabling Deep S5

  656 12:44:27.704786  BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1

  657 12:44:27.707983  Enumerating buses...

  658 12:44:27.711457  Show all devs... Before device enumeration.

  659 12:44:27.714589  Root Device: enabled 1

  660 12:44:27.717814  CPU_CLUSTER: 0: enabled 1

  661 12:44:27.718220  DOMAIN: 0000: enabled 1

  662 12:44:27.721092  APIC: 00: enabled 1

  663 12:44:27.724471  PCI: 00:00.0: enabled 1

  664 12:44:27.727875  PCI: 00:02.0: enabled 1

  665 12:44:27.728280  PCI: 00:04.0: enabled 0

  666 12:44:27.730992  PCI: 00:05.0: enabled 0

  667 12:44:27.734063  PCI: 00:12.0: enabled 1

  668 12:44:27.734489  PCI: 00:12.5: enabled 0

  669 12:44:27.737461  PCI: 00:12.6: enabled 0

  670 12:44:27.740842  PCI: 00:14.0: enabled 1

  671 12:44:27.744092  PCI: 00:14.1: enabled 0

  672 12:44:27.744499  PCI: 00:14.3: enabled 1

  673 12:44:27.747379  PCI: 00:14.5: enabled 0

  674 12:44:27.750344  PCI: 00:15.0: enabled 1

  675 12:44:27.753809  PCI: 00:15.1: enabled 1

  676 12:44:27.754229  PCI: 00:15.2: enabled 0

  677 12:44:27.757052  PCI: 00:15.3: enabled 0

  678 12:44:27.760254  PCI: 00:16.0: enabled 1

  679 12:44:27.763577  PCI: 00:16.1: enabled 0

  680 12:44:27.764012  PCI: 00:16.2: enabled 0

  681 12:44:27.766916  PCI: 00:16.3: enabled 0

  682 12:44:27.770126  PCI: 00:16.4: enabled 0

  683 12:44:27.773435  PCI: 00:16.5: enabled 0

  684 12:44:27.773913  PCI: 00:17.0: enabled 1

  685 12:44:27.776942  PCI: 00:19.0: enabled 1

  686 12:44:27.780055  PCI: 00:19.1: enabled 0

  687 12:44:27.783335  PCI: 00:19.2: enabled 0

  688 12:44:27.783752  PCI: 00:1a.0: enabled 0

  689 12:44:27.786756  PCI: 00:1c.0: enabled 0

  690 12:44:27.790004  PCI: 00:1c.1: enabled 0

  691 12:44:27.793195  PCI: 00:1c.2: enabled 0

  692 12:44:27.793628  PCI: 00:1c.3: enabled 0

  693 12:44:27.796629  PCI: 00:1c.4: enabled 0

  694 12:44:27.799617  PCI: 00:1c.5: enabled 0

  695 12:44:27.800043  PCI: 00:1c.6: enabled 0

  696 12:44:27.803192  PCI: 00:1c.7: enabled 0

  697 12:44:27.806294  PCI: 00:1d.0: enabled 1

  698 12:44:27.809857  PCI: 00:1d.1: enabled 0

  699 12:44:27.810276  PCI: 00:1d.2: enabled 0

  700 12:44:27.812984  PCI: 00:1d.3: enabled 0

  701 12:44:27.816188  PCI: 00:1d.4: enabled 0

  702 12:44:27.819363  PCI: 00:1d.5: enabled 1

  703 12:44:27.819777  PCI: 00:1e.0: enabled 1

  704 12:44:27.822896  PCI: 00:1e.1: enabled 0

  705 12:44:27.826119  PCI: 00:1e.2: enabled 1

  706 12:44:27.829131  PCI: 00:1e.3: enabled 1

  707 12:44:27.829539  PCI: 00:1f.0: enabled 1

  708 12:44:27.832514  PCI: 00:1f.1: enabled 1

  709 12:44:27.835803  PCI: 00:1f.2: enabled 1

  710 12:44:27.839342  PCI: 00:1f.3: enabled 1

  711 12:44:27.839910  PCI: 00:1f.4: enabled 1

  712 12:44:27.842369  PCI: 00:1f.5: enabled 1

  713 12:44:27.845847  PCI: 00:1f.6: enabled 0

  714 12:44:27.849080  USB0 port 0: enabled 1

  715 12:44:27.849517  I2C: 00:15: enabled 1

  716 12:44:27.852167  I2C: 00:5d: enabled 1

  717 12:44:27.855697  GENERIC: 0.0: enabled 1

  718 12:44:27.856127  I2C: 00:1a: enabled 1

  719 12:44:27.858848  I2C: 00:38: enabled 1

  720 12:44:27.861952  I2C: 00:39: enabled 1

  721 12:44:27.862384  I2C: 00:3a: enabled 1

  722 12:44:27.865555  I2C: 00:3b: enabled 1

  723 12:44:27.868646  PCI: 00:00.0: enabled 1

  724 12:44:27.869097  SPI: 00: enabled 1

  725 12:44:27.871986  SPI: 01: enabled 1

  726 12:44:27.875218  PNP: 0c09.0: enabled 1

  727 12:44:27.875663  USB2 port 0: enabled 1

  728 12:44:27.878459  USB2 port 1: enabled 1

  729 12:44:27.881666  USB2 port 2: enabled 0

  730 12:44:27.885182  USB2 port 3: enabled 0

  731 12:44:27.885615  USB2 port 5: enabled 0

  732 12:44:27.888123  USB2 port 6: enabled 1

  733 12:44:27.891333  USB2 port 9: enabled 1

  734 12:44:27.891769  USB3 port 0: enabled 1

  735 12:44:27.894739  USB3 port 1: enabled 1

  736 12:44:27.898100  USB3 port 2: enabled 1

  737 12:44:27.901239  USB3 port 3: enabled 1

  738 12:44:27.901649  USB3 port 4: enabled 0

  739 12:44:27.905120  APIC: 02: enabled 1

  740 12:44:27.907816  APIC: 01: enabled 1

  741 12:44:27.908270  APIC: 07: enabled 1

  742 12:44:27.910865  APIC: 03: enabled 1

  743 12:44:27.911319  APIC: 04: enabled 1

  744 12:44:27.914524  APIC: 06: enabled 1

  745 12:44:27.917624  APIC: 05: enabled 1

  746 12:44:27.918148  Compare with tree...

  747 12:44:27.920944  Root Device: enabled 1

  748 12:44:27.924040   CPU_CLUSTER: 0: enabled 1

  749 12:44:27.927570    APIC: 00: enabled 1

  750 12:44:27.928041    APIC: 02: enabled 1

  751 12:44:27.930505    APIC: 01: enabled 1

  752 12:44:27.933798    APIC: 07: enabled 1

  753 12:44:27.934192    APIC: 03: enabled 1

  754 12:44:27.937290    APIC: 04: enabled 1

  755 12:44:27.940535    APIC: 06: enabled 1

  756 12:44:27.940945    APIC: 05: enabled 1

  757 12:44:27.943688   DOMAIN: 0000: enabled 1

  758 12:44:27.947392    PCI: 00:00.0: enabled 1

  759 12:44:27.950465    PCI: 00:02.0: enabled 1

  760 12:44:27.953576    PCI: 00:04.0: enabled 0

  761 12:44:27.954028    PCI: 00:05.0: enabled 0

  762 12:44:27.956811    PCI: 00:12.0: enabled 1

  763 12:44:27.959896    PCI: 00:12.5: enabled 0

  764 12:44:27.963387    PCI: 00:12.6: enabled 0

  765 12:44:27.966565    PCI: 00:14.0: enabled 1

  766 12:44:27.967045     USB0 port 0: enabled 1

  767 12:44:27.969660      USB2 port 0: enabled 1

  768 12:44:27.973163      USB2 port 1: enabled 1

  769 12:44:27.976388      USB2 port 2: enabled 0

  770 12:44:27.979727      USB2 port 3: enabled 0

  771 12:44:27.982841      USB2 port 5: enabled 0

  772 12:44:27.983351      USB2 port 6: enabled 1

  773 12:44:27.986290      USB2 port 9: enabled 1

  774 12:44:27.989432      USB3 port 0: enabled 1

  775 12:44:27.992844      USB3 port 1: enabled 1

  776 12:44:27.996137      USB3 port 2: enabled 1

  777 12:44:27.999370      USB3 port 3: enabled 1

  778 12:44:27.999820      USB3 port 4: enabled 0

  779 12:44:28.002760    PCI: 00:14.1: enabled 0

  780 12:44:28.005920    PCI: 00:14.3: enabled 1

  781 12:44:28.009121    PCI: 00:14.5: enabled 0

  782 12:44:28.012176    PCI: 00:15.0: enabled 1

  783 12:44:28.012620     I2C: 00:15: enabled 1

  784 12:44:28.015713    PCI: 00:15.1: enabled 1

  785 12:44:28.018909     I2C: 00:5d: enabled 1

  786 12:44:28.022140     GENERIC: 0.0: enabled 1

  787 12:44:28.025650    PCI: 00:15.2: enabled 0

  788 12:44:28.026100    PCI: 00:15.3: enabled 0

  789 12:44:28.028612    PCI: 00:16.0: enabled 1

  790 12:44:28.031867    PCI: 00:16.1: enabled 0

  791 12:44:28.035582    PCI: 00:16.2: enabled 0

  792 12:44:28.038427    PCI: 00:16.3: enabled 0

  793 12:44:28.038926    PCI: 00:16.4: enabled 0

  794 12:44:28.041750    PCI: 00:16.5: enabled 0

  795 12:44:28.044890    PCI: 00:17.0: enabled 1

  796 12:44:28.048390    PCI: 00:19.0: enabled 1

  797 12:44:28.051855     I2C: 00:1a: enabled 1

  798 12:44:28.052266     I2C: 00:38: enabled 1

  799 12:44:28.054842     I2C: 00:39: enabled 1

  800 12:44:28.058206     I2C: 00:3a: enabled 1

  801 12:44:28.061277     I2C: 00:3b: enabled 1

  802 12:44:28.061760    PCI: 00:19.1: enabled 0

  803 12:44:28.064818    PCI: 00:19.2: enabled 0

  804 12:44:28.068053    PCI: 00:1a.0: enabled 0

  805 12:44:28.071154    PCI: 00:1c.0: enabled 0

  806 12:44:28.074202    PCI: 00:1c.1: enabled 0

  807 12:44:28.074607    PCI: 00:1c.2: enabled 0

  808 12:44:28.077750    PCI: 00:1c.3: enabled 0

  809 12:44:28.080803    PCI: 00:1c.4: enabled 0

  810 12:44:28.084141    PCI: 00:1c.5: enabled 0

  811 12:44:28.087337    PCI: 00:1c.6: enabled 0

  812 12:44:28.090758    PCI: 00:1c.7: enabled 0

  813 12:44:28.091229    PCI: 00:1d.0: enabled 1

  814 12:44:28.093817    PCI: 00:1d.1: enabled 0

  815 12:44:28.097015    PCI: 00:1d.2: enabled 0

  816 12:44:28.100432    PCI: 00:1d.3: enabled 0

  817 12:44:28.103864    PCI: 00:1d.4: enabled 0

  818 12:44:28.104344    PCI: 00:1d.5: enabled 1

  819 12:44:28.107043     PCI: 00:00.0: enabled 1

  820 12:44:28.110217    PCI: 00:1e.0: enabled 1

  821 12:44:28.113500    PCI: 00:1e.1: enabled 0

  822 12:44:28.117206    PCI: 00:1e.2: enabled 1

  823 12:44:28.117745     SPI: 00: enabled 1

  824 12:44:28.120431    PCI: 00:1e.3: enabled 1

  825 12:44:28.124030     SPI: 01: enabled 1

  826 12:44:28.126980    PCI: 00:1f.0: enabled 1

  827 12:44:28.127388     PNP: 0c09.0: enabled 1

  828 12:44:28.130565    PCI: 00:1f.1: enabled 1

  829 12:44:28.133381    PCI: 00:1f.2: enabled 1

  830 12:44:28.136411    PCI: 00:1f.3: enabled 1

  831 12:44:28.139684    PCI: 00:1f.4: enabled 1

  832 12:44:28.140090    PCI: 00:1f.5: enabled 1

  833 12:44:28.142853    PCI: 00:1f.6: enabled 0

  834 12:44:28.146373  Root Device scanning...

  835 12:44:28.149750  scan_static_bus for Root Device

  836 12:44:28.152869  CPU_CLUSTER: 0 enabled

  837 12:44:28.153272  DOMAIN: 0000 enabled

  838 12:44:28.156251  DOMAIN: 0000 scanning...

  839 12:44:28.159441  PCI: pci_scan_bus for bus 00

  840 12:44:28.162611  PCI: 00:00.0 [8086/0000] ops

  841 12:44:28.166006  PCI: 00:00.0 [8086/9b61] enabled

  842 12:44:28.169216  PCI: 00:02.0 [8086/0000] bus ops

  843 12:44:28.172293  PCI: 00:02.0 [8086/9b41] enabled

  844 12:44:28.175756  PCI: 00:04.0 [8086/1903] disabled

  845 12:44:28.178902  PCI: 00:08.0 [8086/1911] enabled

  846 12:44:28.181984  PCI: 00:12.0 [8086/02f9] enabled

  847 12:44:28.185641  PCI: 00:14.0 [8086/0000] bus ops

  848 12:44:28.188803  PCI: 00:14.0 [8086/02ed] enabled

  849 12:44:28.192133  PCI: 00:14.2 [8086/02ef] enabled

  850 12:44:28.195210  PCI: 00:14.3 [8086/02f0] enabled

  851 12:44:28.198445  PCI: 00:15.0 [8086/0000] bus ops

  852 12:44:28.201683  PCI: 00:15.0 [8086/02e8] enabled

  853 12:44:28.204994  PCI: 00:15.1 [8086/0000] bus ops

  854 12:44:28.208182  PCI: 00:15.1 [8086/02e9] enabled

  855 12:44:28.211393  PCI: 00:16.0 [8086/0000] ops

  856 12:44:28.214839  PCI: 00:16.0 [8086/02e0] enabled

  857 12:44:28.218176  PCI: 00:17.0 [8086/0000] ops

  858 12:44:28.221576  PCI: 00:17.0 [8086/02d3] enabled

  859 12:44:28.225031  PCI: 00:19.0 [8086/0000] bus ops

  860 12:44:28.228072  PCI: 00:19.0 [8086/02c5] enabled

  861 12:44:28.231232  PCI: 00:1d.0 [8086/0000] bus ops

  862 12:44:28.234465  PCI: 00:1d.0 [8086/02b0] enabled

  863 12:44:28.241040  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  864 12:44:28.244658  PCI: 00:1e.0 [8086/0000] ops

  865 12:44:28.247847  PCI: 00:1e.0 [8086/02a8] enabled

  866 12:44:28.251059  PCI: 00:1e.2 [8086/0000] bus ops

  867 12:44:28.254371  PCI: 00:1e.2 [8086/02aa] enabled

  868 12:44:28.257770  PCI: 00:1e.3 [8086/0000] bus ops

  869 12:44:28.261051  PCI: 00:1e.3 [8086/02ab] enabled

  870 12:44:28.263980  PCI: 00:1f.0 [8086/0000] bus ops

  871 12:44:28.267318  PCI: 00:1f.0 [8086/0284] enabled

  872 12:44:28.273867  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  873 12:44:28.276938  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  874 12:44:28.280224  PCI: 00:1f.3 [8086/0000] bus ops

  875 12:44:28.283822  PCI: 00:1f.3 [8086/02c8] enabled

  876 12:44:28.286947  PCI: 00:1f.4 [8086/0000] bus ops

  877 12:44:28.290129  PCI: 00:1f.4 [8086/02a3] enabled

  878 12:44:28.293639  PCI: 00:1f.5 [8086/0000] bus ops

  879 12:44:28.296683  PCI: 00:1f.5 [8086/02a4] enabled

  880 12:44:28.300083  PCI: Leftover static devices:

  881 12:44:28.303404  PCI: 00:05.0

  882 12:44:28.303815  PCI: 00:12.5

  883 12:44:28.306509  PCI: 00:12.6

  884 12:44:28.306920  PCI: 00:14.1

  885 12:44:28.307244  PCI: 00:14.5

  886 12:44:28.309765  PCI: 00:15.2

  887 12:44:28.310191  PCI: 00:15.3

  888 12:44:28.313044  PCI: 00:16.1

  889 12:44:28.313479  PCI: 00:16.2

  890 12:44:28.316409  PCI: 00:16.3

  891 12:44:28.316821  PCI: 00:16.4

  892 12:44:28.317146  PCI: 00:16.5

  893 12:44:28.319403  PCI: 00:19.1

  894 12:44:28.319810  PCI: 00:19.2

  895 12:44:28.323078  PCI: 00:1a.0

  896 12:44:28.323487  PCI: 00:1c.0

  897 12:44:28.323810  PCI: 00:1c.1

  898 12:44:28.326134  PCI: 00:1c.2

  899 12:44:28.326559  PCI: 00:1c.3

  900 12:44:28.329429  PCI: 00:1c.4

  901 12:44:28.329860  PCI: 00:1c.5

  902 12:44:28.332915  PCI: 00:1c.6

  903 12:44:28.333345  PCI: 00:1c.7

  904 12:44:28.333694  PCI: 00:1d.1

  905 12:44:28.336083  PCI: 00:1d.2

  906 12:44:28.336494  PCI: 00:1d.3

  907 12:44:28.339315  PCI: 00:1d.4

  908 12:44:28.339727  PCI: 00:1d.5

  909 12:44:28.340051  PCI: 00:1e.1

  910 12:44:28.342574  PCI: 00:1f.1

  911 12:44:28.342981  PCI: 00:1f.2

  912 12:44:28.345545  PCI: 00:1f.6

  913 12:44:28.349236  PCI: Check your devicetree.cb.

  914 12:44:28.349646  PCI: 00:02.0 scanning...

  915 12:44:28.355792  scan_generic_bus for PCI: 00:02.0

  916 12:44:28.359394  scan_generic_bus for PCI: 00:02.0 done

  917 12:44:28.362355  scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs

  918 12:44:28.365870  PCI: 00:14.0 scanning...

  919 12:44:28.368784  scan_static_bus for PCI: 00:14.0

  920 12:44:28.372082  USB0 port 0 enabled

  921 12:44:28.375462  USB0 port 0 scanning...

  922 12:44:28.378905  scan_static_bus for USB0 port 0

  923 12:44:28.379398  USB2 port 0 enabled

  924 12:44:28.381970  USB2 port 1 enabled

  925 12:44:28.385252  USB2 port 2 disabled

  926 12:44:28.385688  USB2 port 3 disabled

  927 12:44:28.388595  USB2 port 5 disabled

  928 12:44:28.391926  USB2 port 6 enabled

  929 12:44:28.392339  USB2 port 9 enabled

  930 12:44:28.395014  USB3 port 0 enabled

  931 12:44:28.395604  USB3 port 1 enabled

  932 12:44:28.398586  USB3 port 2 enabled

  933 12:44:28.401639  USB3 port 3 enabled

  934 12:44:28.402259  USB3 port 4 disabled

  935 12:44:28.404616  USB2 port 0 scanning...

  936 12:44:28.407982  scan_static_bus for USB2 port 0

  937 12:44:28.411397  scan_static_bus for USB2 port 0 done

  938 12:44:28.417825  scan_bus: scanning of bus USB2 port 0 took 9694 usecs

  939 12:44:28.421224  USB2 port 1 scanning...

  940 12:44:28.424371  scan_static_bus for USB2 port 1

  941 12:44:28.427693  scan_static_bus for USB2 port 1 done

  942 12:44:28.434369  scan_bus: scanning of bus USB2 port 1 took 9695 usecs

  943 12:44:28.434777  USB2 port 6 scanning...

  944 12:44:28.437497  scan_static_bus for USB2 port 6

  945 12:44:28.440593  scan_static_bus for USB2 port 6 done

  946 12:44:28.447497  scan_bus: scanning of bus USB2 port 6 took 9704 usecs

  947 12:44:28.450459  USB2 port 9 scanning...

  948 12:44:28.454115  scan_static_bus for USB2 port 9

  949 12:44:28.457276  scan_static_bus for USB2 port 9 done

  950 12:44:28.463921  scan_bus: scanning of bus USB2 port 9 took 9696 usecs

  951 12:44:28.464335  USB3 port 0 scanning...

  952 12:44:28.467202  scan_static_bus for USB3 port 0

  953 12:44:28.473486  scan_static_bus for USB3 port 0 done

  954 12:44:28.476705  scan_bus: scanning of bus USB3 port 0 took 9703 usecs

  955 12:44:28.480168  USB3 port 1 scanning...

  956 12:44:28.483546  scan_static_bus for USB3 port 1

  957 12:44:28.486837  scan_static_bus for USB3 port 1 done

  958 12:44:28.493521  scan_bus: scanning of bus USB3 port 1 took 9703 usecs

  959 12:44:28.496629  USB3 port 2 scanning...

  960 12:44:28.499893  scan_static_bus for USB3 port 2

  961 12:44:28.503224  scan_static_bus for USB3 port 2 done

  962 12:44:28.506204  scan_bus: scanning of bus USB3 port 2 took 9687 usecs

  963 12:44:28.509753  USB3 port 3 scanning...

  964 12:44:28.512817  scan_static_bus for USB3 port 3

  965 12:44:28.516160  scan_static_bus for USB3 port 3 done

  966 12:44:28.522612  scan_bus: scanning of bus USB3 port 3 took 9694 usecs

  967 12:44:28.526140  scan_static_bus for USB0 port 0 done

  968 12:44:28.532551  scan_bus: scanning of bus USB0 port 0 took 155319 usecs

  969 12:44:28.536315  scan_static_bus for PCI: 00:14.0 done

  970 12:44:28.542676  scan_bus: scanning of bus PCI: 00:14.0 took 172924 usecs

  971 12:44:28.545816  PCI: 00:15.0 scanning...

  972 12:44:28.548757  scan_generic_bus for PCI: 00:15.0

  973 12:44:28.551943  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

  974 12:44:28.555765  scan_generic_bus for PCI: 00:15.0 done

  975 12:44:28.561838  scan_bus: scanning of bus PCI: 00:15.0 took 14279 usecs

  976 12:44:28.565026  PCI: 00:15.1 scanning...

  977 12:44:28.568213  scan_generic_bus for PCI: 00:15.1

  978 12:44:28.571787  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

  979 12:44:28.574812  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

  980 12:44:28.577917  scan_generic_bus for PCI: 00:15.1 done

  981 12:44:28.584561  scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs

  982 12:44:28.587999  PCI: 00:19.0 scanning...

  983 12:44:28.591009  scan_generic_bus for PCI: 00:19.0

  984 12:44:28.594272  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

  985 12:44:28.601110  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

  986 12:44:28.604305  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

  987 12:44:28.607385  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

  988 12:44:28.610831  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

  989 12:44:28.616932  scan_generic_bus for PCI: 00:19.0 done

  990 12:44:28.620431  scan_bus: scanning of bus PCI: 00:19.0 took 30718 usecs

  991 12:44:28.623385  PCI: 00:1d.0 scanning...

  992 12:44:28.627054  do_pci_scan_bridge for PCI: 00:1d.0

  993 12:44:28.629926  PCI: pci_scan_bus for bus 01

  994 12:44:28.633256  PCI: 01:00.0 [1c5c/1327] enabled

  995 12:44:28.636544  Enabling Common Clock Configuration

  996 12:44:28.643255  L1 Sub-State supported from root port 29

  997 12:44:28.643452  L1 Sub-State Support = 0xf

  998 12:44:28.646211  CommonModeRestoreTime = 0x28

  999 12:44:28.652933  Power On Value = 0x16, Power On Scale = 0x0

 1000 12:44:28.653076  ASPM: Enabled L1

 1001 12:44:28.659165  scan_bus: scanning of bus PCI: 00:1d.0 took 32778 usecs

 1002 12:44:28.662766  PCI: 00:1e.2 scanning...

 1003 12:44:28.665817  scan_generic_bus for PCI: 00:1e.2

 1004 12:44:28.669207  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1005 12:44:28.672346  scan_generic_bus for PCI: 00:1e.2 done

 1006 12:44:28.678948  scan_bus: scanning of bus PCI: 00:1e.2 took 14009 usecs

 1007 12:44:28.682185  PCI: 00:1e.3 scanning...

 1008 12:44:28.685469  scan_generic_bus for PCI: 00:1e.3

 1009 12:44:28.688992  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1010 12:44:28.692067  scan_generic_bus for PCI: 00:1e.3 done

 1011 12:44:28.698345  scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs

 1012 12:44:28.701631  PCI: 00:1f.0 scanning...

 1013 12:44:28.705035  scan_static_bus for PCI: 00:1f.0

 1014 12:44:28.705127  PNP: 0c09.0 enabled

 1015 12:44:28.711668  scan_static_bus for PCI: 00:1f.0 done

 1016 12:44:28.714857  scan_bus: scanning of bus PCI: 00:1f.0 took 12054 usecs

 1017 12:44:28.718054  PCI: 00:1f.3 scanning...

 1018 12:44:28.724634  scan_bus: scanning of bus PCI: 00:1f.3 took 2860 usecs

 1019 12:44:28.728049  PCI: 00:1f.4 scanning...

 1020 12:44:28.731045  scan_generic_bus for PCI: 00:1f.4

 1021 12:44:28.734490  scan_generic_bus for PCI: 00:1f.4 done

 1022 12:44:28.741080  scan_bus: scanning of bus PCI: 00:1f.4 took 10181 usecs

 1023 12:44:28.741189  PCI: 00:1f.5 scanning...

 1024 12:44:28.744098  scan_generic_bus for PCI: 00:1f.5

 1025 12:44:28.750793  scan_generic_bus for PCI: 00:1f.5 done

 1026 12:44:28.754318  scan_bus: scanning of bus PCI: 00:1f.5 took 10191 usecs

 1027 12:44:28.760683  scan_bus: scanning of bus DOMAIN: 0000 took 604763 usecs

 1028 12:44:28.763795  scan_static_bus for Root Device done

 1029 12:44:28.770442  scan_bus: scanning of bus Root Device took 624641 usecs

 1030 12:44:28.770539  done

 1031 12:44:28.773654  Chrome EC: UHEPI supported

 1032 12:44:28.780767  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1033 12:44:28.787321  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1034 12:44:28.793693  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1035 12:44:28.800169  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1036 12:44:28.803345  SPI flash protection: WPSW=0 SRP0=0

 1037 12:44:28.806909  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1038 12:44:28.813459  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1039 12:44:28.816410  found VGA at PCI: 00:02.0

 1040 12:44:28.819897  Setting up VGA for PCI: 00:02.0

 1041 12:44:28.822962  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1042 12:44:28.829535  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1043 12:44:28.832657  Allocating resources...

 1044 12:44:28.832832  Reading resources...

 1045 12:44:28.838994  Root Device read_resources bus 0 link: 0

 1046 12:44:28.842337  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1047 12:44:28.848800  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1048 12:44:28.851985  DOMAIN: 0000 read_resources bus 0 link: 0

 1049 12:44:28.858640  PCI: 00:14.0 read_resources bus 0 link: 0

 1050 12:44:28.861815  USB0 port 0 read_resources bus 0 link: 0

 1051 12:44:28.869751  USB0 port 0 read_resources bus 0 link: 0 done

 1052 12:44:28.873261  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1053 12:44:28.880751  PCI: 00:15.0 read_resources bus 1 link: 0

 1054 12:44:28.883934  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1055 12:44:28.890701  PCI: 00:15.1 read_resources bus 2 link: 0

 1056 12:44:28.896913  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1057 12:44:28.900154  PCI: 00:19.0 read_resources bus 3 link: 0

 1058 12:44:28.907329  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1059 12:44:28.910681  PCI: 00:1d.0 read_resources bus 1 link: 0

 1060 12:44:28.917320  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1061 12:44:28.921108  PCI: 00:1e.2 read_resources bus 4 link: 0

 1062 12:44:28.928079  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1063 12:44:28.930834  PCI: 00:1e.3 read_resources bus 5 link: 0

 1064 12:44:28.937520  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1065 12:44:28.940748  PCI: 00:1f.0 read_resources bus 0 link: 0

 1066 12:44:28.947484  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1067 12:44:28.953987  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1068 12:44:28.957324  Root Device read_resources bus 0 link: 0 done

 1069 12:44:28.960527  Done reading resources.

 1070 12:44:28.967277  Show resources in subtree (Root Device)...After reading.

 1071 12:44:28.970489   Root Device child on link 0 CPU_CLUSTER: 0

 1072 12:44:28.973691    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1073 12:44:28.977237     APIC: 00

 1074 12:44:28.977676     APIC: 02

 1075 12:44:28.980312     APIC: 01

 1076 12:44:28.980752     APIC: 07

 1077 12:44:28.981098     APIC: 03

 1078 12:44:28.983717     APIC: 04

 1079 12:44:28.984260     APIC: 06

 1080 12:44:28.984614     APIC: 05

 1081 12:44:28.990022    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1082 12:44:29.040172    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1083 12:44:29.040688    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1084 12:44:29.041162     PCI: 00:00.0

 1085 12:44:29.041967     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1086 12:44:29.042388     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1087 12:44:29.042739     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1088 12:44:29.047136     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1089 12:44:29.057369     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1090 12:44:29.066924     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1091 12:44:29.076408     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1092 12:44:29.086330     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1093 12:44:29.092669     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1094 12:44:29.102456     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1095 12:44:29.112240     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1096 12:44:29.122367     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1097 12:44:29.132370     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1098 12:44:29.141750     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1099 12:44:29.151520     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1100 12:44:29.161273     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1101 12:44:29.161859     PCI: 00:02.0

 1102 12:44:29.170954     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1103 12:44:29.180749     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1104 12:44:29.190623     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1105 12:44:29.191162     PCI: 00:04.0

 1106 12:44:29.193866     PCI: 00:08.0

 1107 12:44:29.203821     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1108 12:44:29.204321     PCI: 00:12.0

 1109 12:44:29.213835     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1110 12:44:29.220406     PCI: 00:14.0 child on link 0 USB0 port 0

 1111 12:44:29.230180     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1112 12:44:29.233468      USB0 port 0 child on link 0 USB2 port 0

 1113 12:44:29.236533       USB2 port 0

 1114 12:44:29.236976       USB2 port 1

 1115 12:44:29.239663       USB2 port 2

 1116 12:44:29.240104       USB2 port 3

 1117 12:44:29.243022       USB2 port 5

 1118 12:44:29.243591       USB2 port 6

 1119 12:44:29.246557       USB2 port 9

 1120 12:44:29.249737       USB3 port 0

 1121 12:44:29.250278       USB3 port 1

 1122 12:44:29.252843       USB3 port 2

 1123 12:44:29.253286       USB3 port 3

 1124 12:44:29.255988       USB3 port 4

 1125 12:44:29.256478     PCI: 00:14.2

 1126 12:44:29.265958     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1127 12:44:29.275763     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1128 12:44:29.279106     PCI: 00:14.3

 1129 12:44:29.288737     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1130 12:44:29.292278     PCI: 00:15.0 child on link 0 I2C: 01:15

 1131 12:44:29.301959     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1132 12:44:29.305269      I2C: 01:15

 1133 12:44:29.308626     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1134 12:44:29.318069     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1135 12:44:29.318594      I2C: 02:5d

 1136 12:44:29.321585      GENERIC: 0.0

 1137 12:44:29.324718     PCI: 00:16.0

 1138 12:44:29.334679     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1139 12:44:29.335120     PCI: 00:17.0

 1140 12:44:29.344185     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1141 12:44:29.353867     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1142 12:44:29.360459     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1143 12:44:29.370390     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1144 12:44:29.376789     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1145 12:44:29.387037     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1146 12:44:29.390035     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1147 12:44:29.399909     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1148 12:44:29.402951      I2C: 03:1a

 1149 12:44:29.403494      I2C: 03:38

 1150 12:44:29.406276      I2C: 03:39

 1151 12:44:29.406845      I2C: 03:3a

 1152 12:44:29.409338      I2C: 03:3b

 1153 12:44:29.412912     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1154 12:44:29.422500     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1155 12:44:29.432125     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1156 12:44:29.441977     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1157 12:44:29.442086      PCI: 01:00.0

 1158 12:44:29.451816      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1159 12:44:29.455224     PCI: 00:1e.0

 1160 12:44:29.464647     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1161 12:44:29.474658     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1162 12:44:29.477748     PCI: 00:1e.2 child on link 0 SPI: 00

 1163 12:44:29.487559     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1164 12:44:29.490978      SPI: 00

 1165 12:44:29.494209     PCI: 00:1e.3 child on link 0 SPI: 01

 1166 12:44:29.504088     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1167 12:44:29.504351      SPI: 01

 1168 12:44:29.510769     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1169 12:44:29.517352     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1170 12:44:29.527431     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1171 12:44:29.530572      PNP: 0c09.0

 1172 12:44:29.536899      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1173 12:44:29.540156     PCI: 00:1f.3

 1174 12:44:29.549880     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1175 12:44:29.559888     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1176 12:44:29.560426     PCI: 00:1f.4

 1177 12:44:29.569690     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1178 12:44:29.579525     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1179 12:44:29.583099     PCI: 00:1f.5

 1180 12:44:29.589497     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1181 12:44:29.596026  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1182 12:44:29.602418  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1183 12:44:29.608817  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1184 12:44:29.612031  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1185 12:44:29.618678  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1186 12:44:29.622160  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1187 12:44:29.625268  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1188 12:44:29.631561  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1189 12:44:29.638312  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1190 12:44:29.644613  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1191 12:44:29.654336  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1192 12:44:29.660981  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1193 12:44:29.664497  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1194 12:44:29.674184  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1195 12:44:29.677212  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1196 12:44:29.680718  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1197 12:44:29.687116  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1198 12:44:29.690358  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1199 12:44:29.697047  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1200 12:44:29.700324  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1201 12:44:29.706965  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1202 12:44:29.710077  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1203 12:44:29.716625  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1204 12:44:29.720200  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1205 12:44:29.726488  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1206 12:44:29.730038  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1207 12:44:29.736392  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1208 12:44:29.739523  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1209 12:44:29.746254  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1210 12:44:29.749569  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1211 12:44:29.756198  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1212 12:44:29.759148  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1213 12:44:29.765888  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1214 12:44:29.769317  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1215 12:44:29.775816  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1216 12:44:29.778967  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1217 12:44:29.785590  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1218 12:44:29.791965  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1219 12:44:29.794976  avoid_fixed_resources: DOMAIN: 0000

 1220 12:44:29.801675  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1221 12:44:29.808082  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1222 12:44:29.814659  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1223 12:44:29.824393  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1224 12:44:29.830967  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1225 12:44:29.837497  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1226 12:44:29.847339  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1227 12:44:29.853619  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1228 12:44:29.860467  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1229 12:44:29.870371  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1230 12:44:29.876912  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1231 12:44:29.883244  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1232 12:44:29.886498  Setting resources...

 1233 12:44:29.893252  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1234 12:44:29.896415  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1235 12:44:29.899805  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1236 12:44:29.902916  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1237 12:44:29.909531  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1238 12:44:29.913001  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1239 12:44:29.919181  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1240 12:44:29.926089  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1241 12:44:29.935755  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1242 12:44:29.938835  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1243 12:44:29.945497  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1244 12:44:29.948647  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1245 12:44:29.955352  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1246 12:44:29.958492  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1247 12:44:29.965187  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1248 12:44:29.968234  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1249 12:44:29.974749  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1250 12:44:29.977924  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1251 12:44:29.984526  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1252 12:44:29.987864  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1253 12:44:29.994216  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1254 12:44:29.997603  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1255 12:44:30.004344  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1256 12:44:30.007220  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1257 12:44:30.014087  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1258 12:44:30.017225  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1259 12:44:30.023502  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1260 12:44:30.026806  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1261 12:44:30.033221  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1262 12:44:30.036566  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1263 12:44:30.043106  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1264 12:44:30.046509  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1265 12:44:30.052916  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1266 12:44:30.063012  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1267 12:44:30.069350  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1268 12:44:30.075965  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1269 12:44:30.082541  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1270 12:44:30.088852  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1271 12:44:30.092299  Root Device assign_resources, bus 0 link: 0

 1272 12:44:30.099020  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1273 12:44:30.105456  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1274 12:44:30.115335  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1275 12:44:30.121506  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1276 12:44:30.131329  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1277 12:44:30.137977  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1278 12:44:30.147691  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1279 12:44:30.150927  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1280 12:44:30.157326  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1281 12:44:30.164088  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1282 12:44:30.174080  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1283 12:44:30.180350  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1284 12:44:30.190326  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1285 12:44:30.193572  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1286 12:44:30.199785  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1287 12:44:30.206527  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1288 12:44:30.212946  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1289 12:44:30.216247  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1290 12:44:30.226130  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1291 12:44:30.232365  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1292 12:44:30.239056  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1293 12:44:30.248589  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1294 12:44:30.255004  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1295 12:44:30.264920  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1296 12:44:30.271341  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1297 12:44:30.277966  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1298 12:44:30.284289  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1299 12:44:30.287828  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1300 12:44:30.297623  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1301 12:44:30.307196  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1302 12:44:30.313847  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1303 12:44:30.320227  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1304 12:44:30.326859  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1305 12:44:30.333556  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1306 12:44:30.339962  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1307 12:44:30.349605  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1308 12:44:30.353175  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1309 12:44:30.356488  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1310 12:44:30.366301  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1311 12:44:30.369640  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1312 12:44:30.376348  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1313 12:44:30.379653  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1314 12:44:30.386220  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1315 12:44:30.389271  LPC: Trying to open IO window from 800 size 1ff

 1316 12:44:30.399175  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1317 12:44:30.405565  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1318 12:44:30.415320  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1319 12:44:30.421995  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1320 12:44:30.428495  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1321 12:44:30.431636  Root Device assign_resources, bus 0 link: 0

 1322 12:44:30.434952  Done setting resources.

 1323 12:44:30.441622  Show resources in subtree (Root Device)...After assigning values.

 1324 12:44:30.444721   Root Device child on link 0 CPU_CLUSTER: 0

 1325 12:44:30.451243    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1326 12:44:30.451328     APIC: 00

 1327 12:44:30.451393     APIC: 02

 1328 12:44:30.454645     APIC: 01

 1329 12:44:30.454728     APIC: 07

 1330 12:44:30.454793     APIC: 03

 1331 12:44:30.457661     APIC: 04

 1332 12:44:30.457787     APIC: 06

 1333 12:44:30.461086     APIC: 05

 1334 12:44:30.464294    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1335 12:44:30.474395    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1336 12:44:30.484073    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1337 12:44:30.487216     PCI: 00:00.0

 1338 12:44:30.497294     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1339 12:44:30.506698     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1340 12:44:30.513325     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1341 12:44:30.523614     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1342 12:44:30.533156     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1343 12:44:30.543194     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1344 12:44:30.552724     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1345 12:44:30.562563     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1346 12:44:30.572587     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1347 12:44:30.578925     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1348 12:44:30.588860     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1349 12:44:30.598818     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1350 12:44:30.608468     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1351 12:44:30.618328     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1352 12:44:30.628193     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1353 12:44:30.638144     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1354 12:44:30.638257     PCI: 00:02.0

 1355 12:44:30.647672     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1356 12:44:30.660916     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1357 12:44:30.667442     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1358 12:44:30.670544     PCI: 00:04.0

 1359 12:44:30.670632     PCI: 00:08.0

 1360 12:44:30.683691     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1361 12:44:30.683782     PCI: 00:12.0

 1362 12:44:30.693640     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1363 12:44:30.699913     PCI: 00:14.0 child on link 0 USB0 port 0

 1364 12:44:30.709894     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1365 12:44:30.713334      USB0 port 0 child on link 0 USB2 port 0

 1366 12:44:30.716364       USB2 port 0

 1367 12:44:30.716450       USB2 port 1

 1368 12:44:30.719587       USB2 port 2

 1369 12:44:30.719680       USB2 port 3

 1370 12:44:30.723135       USB2 port 5

 1371 12:44:30.723221       USB2 port 6

 1372 12:44:30.726389       USB2 port 9

 1373 12:44:30.726474       USB3 port 0

 1374 12:44:30.729491       USB3 port 1

 1375 12:44:30.732795       USB3 port 2

 1376 12:44:30.732881       USB3 port 3

 1377 12:44:30.736017       USB3 port 4

 1378 12:44:30.736092     PCI: 00:14.2

 1379 12:44:30.746007     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1380 12:44:30.755629     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1381 12:44:30.758575     PCI: 00:14.3

 1382 12:44:30.768326     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1383 12:44:30.771965     PCI: 00:15.0 child on link 0 I2C: 01:15

 1384 12:44:30.784743     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1385 12:44:30.784833      I2C: 01:15

 1386 12:44:30.788085     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1387 12:44:30.797972     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1388 12:44:30.801267      I2C: 02:5d

 1389 12:44:30.801366      GENERIC: 0.0

 1390 12:44:30.804433     PCI: 00:16.0

 1391 12:44:30.814228     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1392 12:44:30.817325     PCI: 00:17.0

 1393 12:44:30.827202     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1394 12:44:30.836977     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1395 12:44:30.846674     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1396 12:44:30.853292     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1397 12:44:30.863002     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1398 12:44:30.872740     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1399 12:44:30.879468     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1400 12:44:30.889194     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1401 12:44:30.889305      I2C: 03:1a

 1402 12:44:30.892470      I2C: 03:38

 1403 12:44:30.892557      I2C: 03:39

 1404 12:44:30.895941      I2C: 03:3a

 1405 12:44:30.896028      I2C: 03:3b

 1406 12:44:30.902037     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1407 12:44:30.908710     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1408 12:44:30.921684     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1409 12:44:30.931576     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1410 12:44:30.931685      PCI: 01:00.0

 1411 12:44:30.941259      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1412 12:44:30.944732     PCI: 00:1e.0

 1413 12:44:30.954411     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1414 12:44:30.967590     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1415 12:44:30.970558     PCI: 00:1e.2 child on link 0 SPI: 00

 1416 12:44:30.980542     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1417 12:44:30.980678      SPI: 00

 1418 12:44:30.987060     PCI: 00:1e.3 child on link 0 SPI: 01

 1419 12:44:30.996732     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1420 12:44:30.996854      SPI: 01

 1421 12:44:31.000228     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1422 12:44:31.010072     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1423 12:44:31.020012     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1424 12:44:31.020153      PNP: 0c09.0

 1425 12:44:31.029684      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1426 12:44:31.029815     PCI: 00:1f.3

 1427 12:44:31.042628     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1428 12:44:31.052375     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1429 12:44:31.052494     PCI: 00:1f.4

 1430 12:44:31.062277     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1431 12:44:31.072247     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1432 12:44:31.075569     PCI: 00:1f.5

 1433 12:44:31.085203     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1434 12:44:31.088490  Done allocating resources.

 1435 12:44:31.091510  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1436 12:44:31.095159  Enabling resources...

 1437 12:44:31.101540  PCI: 00:00.0 subsystem <- 8086/9b61

 1438 12:44:31.101689  PCI: 00:00.0 cmd <- 06

 1439 12:44:31.105252  PCI: 00:02.0 subsystem <- 8086/9b41

 1440 12:44:31.108244  PCI: 00:02.0 cmd <- 03

 1441 12:44:31.111379  PCI: 00:08.0 cmd <- 06

 1442 12:44:31.114750  PCI: 00:12.0 subsystem <- 8086/02f9

 1443 12:44:31.118145  PCI: 00:12.0 cmd <- 02

 1444 12:44:31.121213  PCI: 00:14.0 subsystem <- 8086/02ed

 1445 12:44:31.124419  PCI: 00:14.0 cmd <- 02

 1446 12:44:31.127790  PCI: 00:14.2 cmd <- 02

 1447 12:44:31.130777  PCI: 00:14.3 subsystem <- 8086/02f0

 1448 12:44:31.134462  PCI: 00:14.3 cmd <- 02

 1449 12:44:31.137625  PCI: 00:15.0 subsystem <- 8086/02e8

 1450 12:44:31.140853  PCI: 00:15.0 cmd <- 02

 1451 12:44:31.143948  PCI: 00:15.1 subsystem <- 8086/02e9

 1452 12:44:31.144041  PCI: 00:15.1 cmd <- 02

 1453 12:44:31.150643  PCI: 00:16.0 subsystem <- 8086/02e0

 1454 12:44:31.150768  PCI: 00:16.0 cmd <- 02

 1455 12:44:31.156977  PCI: 00:17.0 subsystem <- 8086/02d3

 1456 12:44:31.157067  PCI: 00:17.0 cmd <- 03

 1457 12:44:31.160556  PCI: 00:19.0 subsystem <- 8086/02c5

 1458 12:44:31.163731  PCI: 00:19.0 cmd <- 02

 1459 12:44:31.166938  PCI: 00:1d.0 bridge ctrl <- 0013

 1460 12:44:31.170346  PCI: 00:1d.0 subsystem <- 8086/02b0

 1461 12:44:31.173509  PCI: 00:1d.0 cmd <- 06

 1462 12:44:31.176688  PCI: 00:1e.0 subsystem <- 8086/02a8

 1463 12:44:31.180191  PCI: 00:1e.0 cmd <- 06

 1464 12:44:31.183092  PCI: 00:1e.2 subsystem <- 8086/02aa

 1465 12:44:31.186638  PCI: 00:1e.2 cmd <- 06

 1466 12:44:31.189688  PCI: 00:1e.3 subsystem <- 8086/02ab

 1467 12:44:31.192942  PCI: 00:1e.3 cmd <- 02

 1468 12:44:31.196143  PCI: 00:1f.0 subsystem <- 8086/0284

 1469 12:44:31.199706  PCI: 00:1f.0 cmd <- 407

 1470 12:44:31.202882  PCI: 00:1f.3 subsystem <- 8086/02c8

 1471 12:44:31.206346  PCI: 00:1f.3 cmd <- 02

 1472 12:44:31.209458  PCI: 00:1f.4 subsystem <- 8086/02a3

 1473 12:44:31.212575  PCI: 00:1f.4 cmd <- 03

 1474 12:44:31.215675  PCI: 00:1f.5 subsystem <- 8086/02a4

 1475 12:44:31.218883  PCI: 00:1f.5 cmd <- 406

 1476 12:44:31.226541  PCI: 01:00.0 cmd <- 02

 1477 12:44:31.231750  done.

 1478 12:44:31.244804  ME: Version: 14.0.39.1367

 1479 12:44:31.251475  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1480 12:44:31.254527  Initializing devices...

 1481 12:44:31.254653  Root Device init ...

 1482 12:44:31.261378  Chrome EC: Set SMI mask to 0x0000000000000000

 1483 12:44:31.267708  Chrome EC: clear events_b mask to 0x0000000000000000

 1484 12:44:31.271253  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1485 12:44:31.277676  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1486 12:44:31.283961  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1487 12:44:31.287225  Chrome EC: Set WAKE mask to 0x0000000000000000

 1488 12:44:31.293764  Root Device init finished in 35255 usecs

 1489 12:44:31.297150  CPU_CLUSTER: 0 init ...

 1490 12:44:31.300382  CPU_CLUSTER: 0 init finished in 2448 usecs

 1491 12:44:31.305754  PCI: 00:00.0 init ...

 1492 12:44:31.308934  CPU TDP: 15 Watts

 1493 12:44:31.312415  CPU PL2 = 64 Watts

 1494 12:44:31.315603  PCI: 00:00.0 init finished in 7077 usecs

 1495 12:44:31.318717  PCI: 00:02.0 init ...

 1496 12:44:31.321954  PCI: 00:02.0 init finished in 2244 usecs

 1497 12:44:31.325345  PCI: 00:08.0 init ...

 1498 12:44:31.328876  PCI: 00:08.0 init finished in 2251 usecs

 1499 12:44:31.332162  PCI: 00:12.0 init ...

 1500 12:44:31.335121  PCI: 00:12.0 init finished in 2251 usecs

 1501 12:44:31.338461  PCI: 00:14.0 init ...

 1502 12:44:31.341617  PCI: 00:14.0 init finished in 2251 usecs

 1503 12:44:31.344993  PCI: 00:14.2 init ...

 1504 12:44:31.347930  PCI: 00:14.2 init finished in 2252 usecs

 1505 12:44:31.351540  PCI: 00:14.3 init ...

 1506 12:44:31.354727  PCI: 00:14.3 init finished in 2269 usecs

 1507 12:44:31.358305  PCI: 00:15.0 init ...

 1508 12:44:31.361792  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1509 12:44:31.368133  PCI: 00:15.0 init finished in 5975 usecs

 1510 12:44:31.368758  PCI: 00:15.1 init ...

 1511 12:44:31.374464  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1512 12:44:31.378027  PCI: 00:15.1 init finished in 5967 usecs

 1513 12:44:31.381240  PCI: 00:16.0 init ...

 1514 12:44:31.384422  PCI: 00:16.0 init finished in 2253 usecs

 1515 12:44:31.387649  PCI: 00:19.0 init ...

 1516 12:44:31.391114  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1517 12:44:31.394286  PCI: 00:19.0 init finished in 5976 usecs

 1518 12:44:31.397397  PCI: 00:1d.0 init ...

 1519 12:44:31.400484  Initializing PCH PCIe bridge.

 1520 12:44:31.403807  PCI: 00:1d.0 init finished in 5286 usecs

 1521 12:44:31.407844  PCI: 00:1f.0 init ...

 1522 12:44:31.411053  IOAPIC: Initializing IOAPIC at 0xfec00000

 1523 12:44:31.417333  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1524 12:44:31.417491  IOAPIC: ID = 0x02

 1525 12:44:31.420743  IOAPIC: Dumping registers

 1526 12:44:31.424106    reg 0x0000: 0x02000000

 1527 12:44:31.427302    reg 0x0001: 0x00770020

 1528 12:44:31.430451    reg 0x0002: 0x00000000

 1529 12:44:31.433605  PCI: 00:1f.0 init finished in 23546 usecs

 1530 12:44:31.436799  PCI: 00:1f.4 init ...

 1531 12:44:31.440157  PCI: 00:1f.4 init finished in 2263 usecs

 1532 12:44:31.452390  PCI: 01:00.0 init ...

 1533 12:44:31.455155  PCI: 01:00.0 init finished in 2252 usecs

 1534 12:44:31.459519  PNP: 0c09.0 init ...

 1535 12:44:31.462922  Google Chrome EC uptime: 11.140 seconds

 1536 12:44:31.469483  Google Chrome AP resets since EC boot: 0

 1537 12:44:31.472368  Google Chrome most recent AP reset causes:

 1538 12:44:31.479325  Google Chrome EC reset flags at last EC boot: reset-pin

 1539 12:44:31.482428  PNP: 0c09.0 init finished in 20561 usecs

 1540 12:44:31.485527  Devices initialized

 1541 12:44:31.489009  Show all devs... After init.

 1542 12:44:31.489182  Root Device: enabled 1

 1543 12:44:31.492281  CPU_CLUSTER: 0: enabled 1

 1544 12:44:31.495880  DOMAIN: 0000: enabled 1

 1545 12:44:31.499473  APIC: 00: enabled 1

 1546 12:44:31.500026  PCI: 00:00.0: enabled 1

 1547 12:44:31.502391  PCI: 00:02.0: enabled 1

 1548 12:44:31.505508  PCI: 00:04.0: enabled 0

 1549 12:44:31.505980  PCI: 00:05.0: enabled 0

 1550 12:44:31.508722  PCI: 00:12.0: enabled 1

 1551 12:44:31.512099  PCI: 00:12.5: enabled 0

 1552 12:44:31.515329  PCI: 00:12.6: enabled 0

 1553 12:44:31.515901  PCI: 00:14.0: enabled 1

 1554 12:44:31.518712  PCI: 00:14.1: enabled 0

 1555 12:44:31.521730  PCI: 00:14.3: enabled 1

 1556 12:44:31.525407  PCI: 00:14.5: enabled 0

 1557 12:44:31.526204  PCI: 00:15.0: enabled 1

 1558 12:44:31.528104  PCI: 00:15.1: enabled 1

 1559 12:44:31.531766  PCI: 00:15.2: enabled 0

 1560 12:44:31.534889  PCI: 00:15.3: enabled 0

 1561 12:44:31.535332  PCI: 00:16.0: enabled 1

 1562 12:44:31.538116  PCI: 00:16.1: enabled 0

 1563 12:44:31.541301  PCI: 00:16.2: enabled 0

 1564 12:44:31.544859  PCI: 00:16.3: enabled 0

 1565 12:44:31.545298  PCI: 00:16.4: enabled 0

 1566 12:44:31.547891  PCI: 00:16.5: enabled 0

 1567 12:44:31.551497  PCI: 00:17.0: enabled 1

 1568 12:44:31.554585  PCI: 00:19.0: enabled 1

 1569 12:44:31.555027  PCI: 00:19.1: enabled 0

 1570 12:44:31.558046  PCI: 00:19.2: enabled 0

 1571 12:44:31.561338  PCI: 00:1a.0: enabled 0

 1572 12:44:31.564156  PCI: 00:1c.0: enabled 0

 1573 12:44:31.564597  PCI: 00:1c.1: enabled 0

 1574 12:44:31.567525  PCI: 00:1c.2: enabled 0

 1575 12:44:31.570884  PCI: 00:1c.3: enabled 0

 1576 12:44:31.574137  PCI: 00:1c.4: enabled 0

 1577 12:44:31.574592  PCI: 00:1c.5: enabled 0

 1578 12:44:31.577279  PCI: 00:1c.6: enabled 0

 1579 12:44:31.580468  PCI: 00:1c.7: enabled 0

 1580 12:44:31.584139  PCI: 00:1d.0: enabled 1

 1581 12:44:31.584583  PCI: 00:1d.1: enabled 0

 1582 12:44:31.587262  PCI: 00:1d.2: enabled 0

 1583 12:44:31.590840  PCI: 00:1d.3: enabled 0

 1584 12:44:31.591293  PCI: 00:1d.4: enabled 0

 1585 12:44:31.594050  PCI: 00:1d.5: enabled 0

 1586 12:44:31.597340  PCI: 00:1e.0: enabled 1

 1587 12:44:31.600729  PCI: 00:1e.1: enabled 0

 1588 12:44:31.601202  PCI: 00:1e.2: enabled 1

 1589 12:44:31.603816  PCI: 00:1e.3: enabled 1

 1590 12:44:31.606978  PCI: 00:1f.0: enabled 1

 1591 12:44:31.610130  PCI: 00:1f.1: enabled 0

 1592 12:44:31.610576  PCI: 00:1f.2: enabled 0

 1593 12:44:31.613245  PCI: 00:1f.3: enabled 1

 1594 12:44:31.616487  PCI: 00:1f.4: enabled 1

 1595 12:44:31.620392  PCI: 00:1f.5: enabled 1

 1596 12:44:31.620932  PCI: 00:1f.6: enabled 0

 1597 12:44:31.623338  USB0 port 0: enabled 1

 1598 12:44:31.626433  I2C: 01:15: enabled 1

 1599 12:44:31.629904  I2C: 02:5d: enabled 1

 1600 12:44:31.630352  GENERIC: 0.0: enabled 1

 1601 12:44:31.633174  I2C: 03:1a: enabled 1

 1602 12:44:31.636221  I2C: 03:38: enabled 1

 1603 12:44:31.636671  I2C: 03:39: enabled 1

 1604 12:44:31.639823  I2C: 03:3a: enabled 1

 1605 12:44:31.643036  I2C: 03:3b: enabled 1

 1606 12:44:31.643571  PCI: 00:00.0: enabled 1

 1607 12:44:31.646122  SPI: 00: enabled 1

 1608 12:44:31.649498  SPI: 01: enabled 1

 1609 12:44:31.650030  PNP: 0c09.0: enabled 1

 1610 12:44:31.652708  USB2 port 0: enabled 1

 1611 12:44:31.655934  USB2 port 1: enabled 1

 1612 12:44:31.656384  USB2 port 2: enabled 0

 1613 12:44:31.658879  USB2 port 3: enabled 0

 1614 12:44:31.662206  USB2 port 5: enabled 0

 1615 12:44:31.665759  USB2 port 6: enabled 1

 1616 12:44:31.666250  USB2 port 9: enabled 1

 1617 12:44:31.668746  USB3 port 0: enabled 1

 1618 12:44:31.671870  USB3 port 1: enabled 1

 1619 12:44:31.675393  USB3 port 2: enabled 1

 1620 12:44:31.675837  USB3 port 3: enabled 1

 1621 12:44:31.678687  USB3 port 4: enabled 0

 1622 12:44:31.681655  APIC: 02: enabled 1

 1623 12:44:31.682077  APIC: 01: enabled 1

 1624 12:44:31.685117  APIC: 07: enabled 1

 1625 12:44:31.688421  APIC: 03: enabled 1

 1626 12:44:31.688961  APIC: 04: enabled 1

 1627 12:44:31.691347  APIC: 06: enabled 1

 1628 12:44:31.691791  APIC: 05: enabled 1

 1629 12:44:31.694646  PCI: 00:08.0: enabled 1

 1630 12:44:31.698084  PCI: 00:14.2: enabled 1

 1631 12:44:31.701524  PCI: 01:00.0: enabled 1

 1632 12:44:31.704419  Disabling ACPI via APMC:

 1633 12:44:31.707686  done.

 1634 12:44:31.710941  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1635 12:44:31.714481  ELOG: NV offset 0xaf0000 size 0x4000

 1636 12:44:31.721413  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1637 12:44:31.727905  ELOG: Event(17) added with size 13 at 2023-03-22 12:44:31 UTC

 1638 12:44:31.734519  ELOG: Event(92) added with size 9 at 2023-03-22 12:44:31 UTC

 1639 12:44:31.741229  ELOG: Event(93) added with size 9 at 2023-03-22 12:44:31 UTC

 1640 12:44:31.747406  ELOG: Event(9A) added with size 9 at 2023-03-22 12:44:31 UTC

 1641 12:44:31.753969  ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:31 UTC

 1642 12:44:31.760715  ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:31 UTC

 1643 12:44:31.767122  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1644 12:44:31.773342  ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:31 UTC

 1645 12:44:31.780048  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1646 12:44:31.786349  ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:31 UTC

 1647 12:44:31.789787  elog_add_boot_reason: Logged dev mode boot

 1648 12:44:31.793262  Finalize devices...

 1649 12:44:31.796519  PCI: 00:17.0 final

 1650 12:44:31.796956  Devices finalized

 1651 12:44:31.803033  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1652 12:44:31.806412  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1653 12:44:31.812902  ME: HFSTS1                  : 0x90000245

 1654 12:44:31.816131  ME: HFSTS2                  : 0x3B850126

 1655 12:44:31.819582  ME: HFSTS3                  : 0x00000020

 1656 12:44:31.822814  ME: HFSTS4                  : 0x00004800

 1657 12:44:31.828902  ME: HFSTS5                  : 0x00000000

 1658 12:44:31.832599  ME: HFSTS6                  : 0x40400006

 1659 12:44:31.835711  ME: Manufacturing Mode      : NO

 1660 12:44:31.838859  ME: FW Partition Table      : OK

 1661 12:44:31.842117  ME: Bringup Loader Failure  : NO

 1662 12:44:31.845429  ME: Firmware Init Complete  : YES

 1663 12:44:31.848575  ME: Boot Options Present    : NO

 1664 12:44:31.851903  ME: Update In Progress      : NO

 1665 12:44:31.855425  ME: D0i3 Support            : YES

 1666 12:44:31.858631  ME: Low Power State Enabled : NO

 1667 12:44:31.861737  ME: CPU Replaced            : NO

 1668 12:44:31.865270  ME: CPU Replacement Valid   : YES

 1669 12:44:31.868408  ME: Current Working State   : 5

 1670 12:44:31.871546  ME: Current Operation State : 1

 1671 12:44:31.874763  ME: Current Operation Mode  : 0

 1672 12:44:31.878377  ME: Error Code              : 0

 1673 12:44:31.881478  ME: CPU Debug Disabled      : YES

 1674 12:44:31.884546  ME: TXT Support             : NO

 1675 12:44:31.891228  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1676 12:44:31.894090  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1677 12:44:31.897453  CBFS @ c08000 size 3f8000

 1678 12:44:31.904175  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1679 12:44:31.907513  CBFS: Locating 'fallback/dsdt.aml'

 1680 12:44:31.910606  CBFS: Found @ offset 10bb80 size 3fa5

 1681 12:44:31.916887  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1682 12:44:31.920228  CBFS @ c08000 size 3f8000

 1683 12:44:31.923799  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1684 12:44:31.926926  CBFS: Locating 'fallback/slic'

 1685 12:44:31.935263  CBFS: 'fallback/slic' not found.

 1686 12:44:31.938307  ACPI: Writing ACPI tables at 99b3e000.

 1687 12:44:31.938395  ACPI:    * FACS

 1688 12:44:31.941608  ACPI:    * DSDT

 1689 12:44:31.945029  Ramoops buffer: 0x100000@0x99a3d000.

 1690 12:44:31.948288  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1691 12:44:31.954623  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1692 12:44:31.957824  Google Chrome EC: version:

 1693 12:44:31.961288  	ro: helios_v2.0.2659-56403530b

 1694 12:44:31.964738  	rw: helios_v2.0.2849-c41de27e7d

 1695 12:44:31.965206    running image: 1

 1696 12:44:31.969562  ACPI:    * FADT

 1697 12:44:31.970034  SCI is IRQ9

 1698 12:44:31.975959  ACPI: added table 1/32, length now 40

 1699 12:44:31.976538  ACPI:     * SSDT

 1700 12:44:31.979194  Found 1 CPU(s) with 8 core(s) each.

 1701 12:44:31.982206  Error: Could not locate 'wifi_sar' in VPD.

 1702 12:44:31.989220  Checking CBFS for default SAR values

 1703 12:44:31.992229  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1704 12:44:31.995440  CBFS @ c08000 size 3f8000

 1705 12:44:32.001750  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1706 12:44:32.005101  CBFS: Locating 'wifi_sar_defaults.hex'

 1707 12:44:32.008523  CBFS: Found @ offset 5fac0 size 77

 1708 12:44:32.011872  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1709 12:44:32.018134  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1710 12:44:32.021499  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1711 12:44:32.028300  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1712 12:44:32.031286  failed to find key in VPD: dsm_calib_r0_0

 1713 12:44:32.041033  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1714 12:44:32.047618  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1715 12:44:32.051152  failed to find key in VPD: dsm_calib_r0_1

 1716 12:44:32.057271  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1717 12:44:32.063892  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1718 12:44:32.067384  failed to find key in VPD: dsm_calib_r0_2

 1719 12:44:32.077043  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1720 12:44:32.083739  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1721 12:44:32.087250  failed to find key in VPD: dsm_calib_r0_3

 1722 12:44:32.097009  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1723 12:44:32.100061  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1724 12:44:32.106830  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1725 12:44:32.110114  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1726 12:44:32.113312  EC returned error result code 1

 1727 12:44:32.116662  EC returned error result code 1

 1728 12:44:32.119958  EC returned error result code 1

 1729 12:44:32.126619  PS2K: Bad resp from EC. Vivaldi disabled!

 1730 12:44:32.130195  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1731 12:44:32.136644  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1732 12:44:32.143241  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1733 12:44:32.146420  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1734 12:44:32.152735  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1735 12:44:32.159286  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1736 12:44:32.165599  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1737 12:44:32.169267  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1738 12:44:32.175710  ACPI: added table 2/32, length now 44

 1739 12:44:32.176156  ACPI:    * MCFG

 1740 12:44:32.178970  ACPI: added table 3/32, length now 48

 1741 12:44:32.182572  ACPI:    * TPM2

 1742 12:44:32.185313  TPM2 log created at 99a2d000

 1743 12:44:32.189034  ACPI: added table 4/32, length now 52

 1744 12:44:32.189575  ACPI:    * MADT

 1745 12:44:32.192043  SCI is IRQ9

 1746 12:44:32.195710  ACPI: added table 5/32, length now 56

 1747 12:44:32.196151  current = 99b43ac0

 1748 12:44:32.198809  ACPI:    * DMAR

 1749 12:44:32.202142  ACPI: added table 6/32, length now 60

 1750 12:44:32.205225  ACPI:    * IGD OpRegion

 1751 12:44:32.208461  GMA: Found VBT in CBFS

 1752 12:44:32.211675  GMA: Found valid VBT in CBFS

 1753 12:44:32.215202  ACPI: added table 7/32, length now 64

 1754 12:44:32.215746  ACPI:    * HPET

 1755 12:44:32.218074  ACPI: added table 8/32, length now 68

 1756 12:44:32.221642  ACPI: done.

 1757 12:44:32.224629  ACPI tables: 31744 bytes.

 1758 12:44:32.225099  smbios_write_tables: 99a2c000

 1759 12:44:32.228355  EC returned error result code 3

 1760 12:44:32.234831  Couldn't obtain OEM name from CBI

 1761 12:44:32.235270  Create SMBIOS type 17

 1762 12:44:32.237953  PCI: 00:00.0 (Intel Cannonlake)

 1763 12:44:32.241618  PCI: 00:14.3 (Intel WiFi)

 1764 12:44:32.244734  SMBIOS tables: 939 bytes.

 1765 12:44:32.247943  Writing table forward entry at 0x00000500

 1766 12:44:32.254644  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1767 12:44:32.257734  Writing coreboot table at 0x99b62000

 1768 12:44:32.264040   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1769 12:44:32.267281   1. 0000000000001000-000000000009ffff: RAM

 1770 12:44:32.273840   2. 00000000000a0000-00000000000fffff: RESERVED

 1771 12:44:32.277307   3. 0000000000100000-0000000099a2bfff: RAM

 1772 12:44:32.283820   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1773 12:44:32.286926   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1774 12:44:32.293558   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1775 12:44:32.299930   7. 000000009a000000-000000009f7fffff: RESERVED

 1776 12:44:32.303143   8. 00000000e0000000-00000000efffffff: RESERVED

 1777 12:44:32.309920   9. 00000000fc000000-00000000fc000fff: RESERVED

 1778 12:44:32.312856  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1779 12:44:32.319494  11. 00000000fed10000-00000000fed17fff: RESERVED

 1780 12:44:32.323054  12. 00000000fed80000-00000000fed83fff: RESERVED

 1781 12:44:32.329566  13. 00000000fed90000-00000000fed91fff: RESERVED

 1782 12:44:32.332639  14. 00000000feda0000-00000000feda1fff: RESERVED

 1783 12:44:32.336038  15. 0000000100000000-000000045e7fffff: RAM

 1784 12:44:32.342422  Graphics framebuffer located at 0xc0000000

 1785 12:44:32.342877  Passing 5 GPIOs to payload:

 1786 12:44:32.349165              NAME |       PORT | POLARITY |     VALUE

 1787 12:44:32.355619     write protect |  undefined |     high |       low

 1788 12:44:32.358773               lid |  undefined |     high |      high

 1789 12:44:32.365529             power |  undefined |     high |       low

 1790 12:44:32.371913             oprom |  undefined |     high |       low

 1791 12:44:32.375096          EC in RW | 0x000000cb |     high |       low

 1792 12:44:32.378305  Board ID: 4

 1793 12:44:32.381761  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1794 12:44:32.384905  CBFS @ c08000 size 3f8000

 1795 12:44:32.391255  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1796 12:44:32.398178  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6d56

 1797 12:44:32.398622  coreboot table: 1492 bytes.

 1798 12:44:32.401481  IMD ROOT    0. 99fff000 00001000

 1799 12:44:32.404447  IMD SMALL   1. 99ffe000 00001000

 1800 12:44:32.407650  FSP MEMORY  2. 99c4e000 003b0000

 1801 12:44:32.410989  CONSOLE     3. 99c2e000 00020000

 1802 12:44:32.414587  FMAP        4. 99c2d000 0000054e

 1803 12:44:32.417901  TIME STAMP  5. 99c2c000 00000910

 1804 12:44:32.420835  VBOOT WORK  6. 99c18000 00014000

 1805 12:44:32.427478  MRC DATA    7. 99c16000 00001958

 1806 12:44:32.430669  ROMSTG STCK 8. 99c15000 00001000

 1807 12:44:32.434080  AFTER CAR   9. 99c0b000 0000a000

 1808 12:44:32.437275  RAMSTAGE   10. 99baf000 0005c000

 1809 12:44:32.440718  REFCODE    11. 99b7a000 00035000

 1810 12:44:32.444042  SMM BACKUP 12. 99b6a000 00010000

 1811 12:44:32.447088  COREBOOT   13. 99b62000 00008000

 1812 12:44:32.450640  ACPI       14. 99b3e000 00024000

 1813 12:44:32.453872  ACPI GNVS  15. 99b3d000 00001000

 1814 12:44:32.457015  RAMOOPS    16. 99a3d000 00100000

 1815 12:44:32.460099  TPM2 TCGLOG17. 99a2d000 00010000

 1816 12:44:32.463268  SMBIOS     18. 99a2c000 00000800

 1817 12:44:32.463715  IMD small region:

 1818 12:44:32.466869    IMD ROOT    0. 99ffec00 00000400

 1819 12:44:32.470044    FSP RUNTIME 1. 99ffebe0 00000004

 1820 12:44:32.476758    EC HOSTEVENT 2. 99ffebc0 00000008

 1821 12:44:32.479864    POWER STATE 3. 99ffeb80 00000040

 1822 12:44:32.482945    ROMSTAGE    4. 99ffeb60 00000004

 1823 12:44:32.486632    MEM INFO    5. 99ffe9a0 000001b9

 1824 12:44:32.489507    VPD         6. 99ffe920 0000006c

 1825 12:44:32.492756  MTRR: Physical address space:

 1826 12:44:32.499588  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1827 12:44:32.505834  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1828 12:44:32.508991  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1829 12:44:32.515929  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1830 12:44:32.522631  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1831 12:44:32.528780  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1832 12:44:32.535432  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1833 12:44:32.538580  MTRR: Fixed MSR 0x250 0x0606060606060606

 1834 12:44:32.545248  MTRR: Fixed MSR 0x258 0x0606060606060606

 1835 12:44:32.548521  MTRR: Fixed MSR 0x259 0x0000000000000000

 1836 12:44:32.552078  MTRR: Fixed MSR 0x268 0x0606060606060606

 1837 12:44:32.555571  MTRR: Fixed MSR 0x269 0x0606060606060606

 1838 12:44:32.561758  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1839 12:44:32.565056  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1840 12:44:32.568197  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1841 12:44:32.571575  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1842 12:44:32.577873  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1843 12:44:32.581287  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1844 12:44:32.584581  call enable_fixed_mtrr()

 1845 12:44:32.587786  CPU physical address size: 39 bits

 1846 12:44:32.591269  MTRR: default type WB/UC MTRR counts: 6/8.

 1847 12:44:32.594441  MTRR: WB selected as default type.

 1848 12:44:32.600817  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1849 12:44:32.607368  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1850 12:44:32.614091  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1851 12:44:32.620598  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1852 12:44:32.627087  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1853 12:44:32.633664  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1854 12:44:32.636911  MTRR: Fixed MSR 0x250 0x0606060606060606

 1855 12:44:32.643632  MTRR: Fixed MSR 0x258 0x0606060606060606

 1856 12:44:32.646609  MTRR: Fixed MSR 0x259 0x0000000000000000

 1857 12:44:32.650024  MTRR: Fixed MSR 0x268 0x0606060606060606

 1858 12:44:32.653348  MTRR: Fixed MSR 0x269 0x0606060606060606

 1859 12:44:32.660254  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1860 12:44:32.663127  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1861 12:44:32.666527  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1862 12:44:32.669468  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1863 12:44:32.676029  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1864 12:44:32.679511  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1865 12:44:32.679956  

 1866 12:44:32.680306  MTRR check

 1867 12:44:32.682545  Fixed MTRRs   : Enabled

 1868 12:44:32.685808  Variable MTRRs: Enabled

 1869 12:44:32.686250  

 1870 12:44:32.689498  call enable_fixed_mtrr()

 1871 12:44:32.692556  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1872 12:44:32.695880  CPU physical address size: 39 bits

 1873 12:44:32.703201  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1874 12:44:32.706170  MTRR: Fixed MSR 0x250 0x0606060606060606

 1875 12:44:32.709121  MTRR: Fixed MSR 0x250 0x0606060606060606

 1876 12:44:32.715627  MTRR: Fixed MSR 0x258 0x0606060606060606

 1877 12:44:32.718886  MTRR: Fixed MSR 0x259 0x0000000000000000

 1878 12:44:32.722497  MTRR: Fixed MSR 0x268 0x0606060606060606

 1879 12:44:32.725220  MTRR: Fixed MSR 0x269 0x0606060606060606

 1880 12:44:32.731748  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1881 12:44:32.735175  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1882 12:44:32.738586  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1883 12:44:32.741886  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1884 12:44:32.748580  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1885 12:44:32.751701  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1886 12:44:32.754791  MTRR: Fixed MSR 0x258 0x0606060606060606

 1887 12:44:32.758299  call enable_fixed_mtrr()

 1888 12:44:32.761228  MTRR: Fixed MSR 0x259 0x0000000000000000

 1889 12:44:32.767821  MTRR: Fixed MSR 0x268 0x0606060606060606

 1890 12:44:32.771234  MTRR: Fixed MSR 0x269 0x0606060606060606

 1891 12:44:32.774551  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1892 12:44:32.777804  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1893 12:44:32.784184  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1894 12:44:32.787731  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1895 12:44:32.790774  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1896 12:44:32.793877  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1897 12:44:32.797510  CPU physical address size: 39 bits

 1898 12:44:32.800820  call enable_fixed_mtrr()

 1899 12:44:32.804042  CBFS @ c08000 size 3f8000

 1900 12:44:32.810458  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1901 12:44:32.813798  CBFS: Locating 'fallback/payload'

 1902 12:44:32.817269  MTRR: Fixed MSR 0x250 0x0606060606060606

 1903 12:44:32.820143  MTRR: Fixed MSR 0x250 0x0606060606060606

 1904 12:44:32.826855  MTRR: Fixed MSR 0x258 0x0606060606060606

 1905 12:44:32.830069  MTRR: Fixed MSR 0x259 0x0000000000000000

 1906 12:44:32.833510  MTRR: Fixed MSR 0x268 0x0606060606060606

 1907 12:44:32.836842  MTRR: Fixed MSR 0x269 0x0606060606060606

 1908 12:44:32.843293  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1909 12:44:32.846503  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1910 12:44:32.849647  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1911 12:44:32.853280  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1912 12:44:32.859591  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1913 12:44:32.862674  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1914 12:44:32.866209  MTRR: Fixed MSR 0x258 0x0606060606060606

 1915 12:44:32.869293  call enable_fixed_mtrr()

 1916 12:44:32.872657  MTRR: Fixed MSR 0x259 0x0000000000000000

 1917 12:44:32.879182  MTRR: Fixed MSR 0x268 0x0606060606060606

 1918 12:44:32.882390  MTRR: Fixed MSR 0x269 0x0606060606060606

 1919 12:44:32.885751  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1920 12:44:32.888984  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1921 12:44:32.895314  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1922 12:44:32.898519  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1923 12:44:32.902169  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1924 12:44:32.905421  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1925 12:44:32.911688  CPU physical address size: 39 bits

 1926 12:44:32.912128  call enable_fixed_mtrr()

 1927 12:44:32.918146  MTRR: Fixed MSR 0x250 0x0606060606060606

 1928 12:44:32.921561  MTRR: Fixed MSR 0x258 0x0606060606060606

 1929 12:44:32.924958  MTRR: Fixed MSR 0x259 0x0000000000000000

 1930 12:44:32.928014  MTRR: Fixed MSR 0x268 0x0606060606060606

 1931 12:44:32.934444  MTRR: Fixed MSR 0x269 0x0606060606060606

 1932 12:44:32.938051  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1933 12:44:32.941178  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1934 12:44:32.944284  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1935 12:44:32.951148  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1936 12:44:32.954370  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1937 12:44:32.957489  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1938 12:44:32.960680  MTRR: Fixed MSR 0x250 0x0606060606060606

 1939 12:44:32.967373  CPU physical address size: 39 bits

 1940 12:44:32.970571  CBFS: Found @ offset 1c96c0 size 3f798

 1941 12:44:32.973984  MTRR: Fixed MSR 0x258 0x0606060606060606

 1942 12:44:32.977502  call enable_fixed_mtrr()

 1943 12:44:32.980663  MTRR: Fixed MSR 0x259 0x0000000000000000

 1944 12:44:32.983599  MTRR: Fixed MSR 0x268 0x0606060606060606

 1945 12:44:32.990385  MTRR: Fixed MSR 0x269 0x0606060606060606

 1946 12:44:32.993564  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1947 12:44:32.996913  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1948 12:44:32.999953  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1949 12:44:33.003404  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1950 12:44:33.010074  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1951 12:44:33.013536  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1952 12:44:33.016719  CPU physical address size: 39 bits

 1953 12:44:33.019600  call enable_fixed_mtrr()

 1954 12:44:33.022768  Checking segment from ROM address 0xffdd16f8

 1955 12:44:33.026107  CPU physical address size: 39 bits

 1956 12:44:33.032731  Checking segment from ROM address 0xffdd1714

 1957 12:44:33.036119  CPU physical address size: 39 bits

 1958 12:44:33.039297  Loading segment from ROM address 0xffdd16f8

 1959 12:44:33.042539    code (compression=0)

 1960 12:44:33.052377    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 1961 12:44:33.059126  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 1962 12:44:33.062251  it's not compressed!

 1963 12:44:33.153923  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 1964 12:44:33.160327  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 1965 12:44:33.167076  Loading segment from ROM address 0xffdd1714

 1966 12:44:33.167521    Entry Point 0x30000000

 1967 12:44:33.170430  Loaded segments

 1968 12:44:33.175942  Finalizing chipset.

 1969 12:44:33.179279  Finalizing SMM.

 1970 12:44:33.182501  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 1971 12:44:33.185828  mp_park_aps done after 0 msecs.

 1972 12:44:33.192701  Jumping to boot code at 30000000(99b62000)

 1973 12:44:33.199043  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 1974 12:44:33.199509  

 1975 12:44:33.199903  

 1976 12:44:33.200253  

 1977 12:44:33.202255  Starting depthcharge on Helios...

 1978 12:44:33.202701  

 1979 12:44:33.203737  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 1980 12:44:33.204261  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 1981 12:44:33.204678  Setting prompt string to ['hatch:']
 1982 12:44:33.205080  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 1983 12:44:33.212050  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 1984 12:44:33.212505  

 1985 12:44:33.218669  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 1986 12:44:33.219217  

 1987 12:44:33.225584  board_setup: Info: eMMC controller not present; skipping

 1988 12:44:33.226322  

 1989 12:44:33.228539  New NVMe Controller 0x30053ac0 @ 00:1d:00

 1990 12:44:33.229133  

 1991 12:44:33.235034  board_setup: Info: SDHCI controller not present; skipping

 1992 12:44:33.235484  

 1993 12:44:33.241553  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 1994 12:44:33.242044  

 1995 12:44:33.242401  Wipe memory regions:

 1996 12:44:33.242730  

 1997 12:44:33.247997  	[0x00000000001000, 0x000000000a0000)

 1998 12:44:33.248444  

 1999 12:44:33.251166  	[0x00000000100000, 0x00000030000000)

 2000 12:44:33.311948  

 2001 12:44:33.315320  	[0x00000030657430, 0x00000099a2c000)

 2002 12:44:33.445189  

 2003 12:44:33.448341  	[0x00000100000000, 0x0000045e800000)

 2004 12:44:34.766598  

 2005 12:44:34.766753  R8152: Initializing

 2006 12:44:34.766822  

 2007 12:44:34.770130  Version 9 (ocp_data = 6010)

 2008 12:44:34.774117  

 2009 12:44:34.774292  R8152: Done initializing

 2010 12:44:34.774389  

 2011 12:44:34.777269  Adding net device

 2012 12:44:35.381558  

 2013 12:44:35.381724  R8152: Initializing

 2014 12:44:35.381829  

 2015 12:44:35.384924  Version 6 (ocp_data = 5c30)

 2016 12:44:35.385044  

 2017 12:44:35.388285  R8152: Done initializing

 2018 12:44:35.388372  

 2019 12:44:35.394801  net_add_device: Attemp to include the same device

 2020 12:44:35.394922  

 2021 12:44:35.401653  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2022 12:44:35.401808  

 2023 12:44:35.401878  

 2024 12:44:35.401940  

 2025 12:44:35.402277  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2027 12:44:35.503063  hatch: tftpboot 192.168.201.1 9729697/tftp-deploy-t_yif5br/kernel/bzImage 9729697/tftp-deploy-t_yif5br/kernel/cmdline 9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz

 2028 12:44:35.503247  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2029 12:44:35.503335  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2030 12:44:35.507506  tftpboot 192.168.201.1 9729697/tftp-deploy-t_yif5br/kernel/bzImoy-t_yif5br/kernel/cmdline 9729697/tftp-deploy-t_yif5br/ramdisk/ramdisk.cpio.gz

 2031 12:44:35.507601  

 2032 12:44:35.507688  Waiting for link

 2033 12:44:35.708043  

 2034 12:44:35.708188  done.

 2035 12:44:35.708282  

 2036 12:44:35.708382  MAC: 00:24:32:50:21:91

 2037 12:44:35.708473  

 2038 12:44:35.711431  Sending DHCP discover... done.

 2039 12:44:35.711514  

 2040 12:44:35.714632  Waiting for reply... done.

 2041 12:44:35.714727  

 2042 12:44:35.718946  Sending DHCP request... done.

 2043 12:44:35.719046  

 2044 12:44:35.721348  Waiting for reply... done.

 2045 12:44:35.724305  

 2046 12:44:35.724439  My ip is 192.168.201.14

 2047 12:44:35.724509  

 2048 12:44:35.727600  The DHCP server ip is 192.168.201.1

 2049 12:44:35.727688  

 2050 12:44:35.734438  TFTP server IP predefined by user: 192.168.201.1

 2051 12:44:35.734564  

 2052 12:44:35.740825  Bootfile predefined by user: 9729697/tftp-deploy-t_yif5br/kernel/bzImage

 2053 12:44:35.740954  

 2054 12:44:35.744187  Sending tftp read request... done.

 2055 12:44:35.744337  

 2056 12:44:35.747562  Waiting for the transfer... 

 2057 12:44:35.747651  

 2058 12:44:36.309906  00000000 ################################################################

 2059 12:44:36.310059  

 2060 12:44:36.862215  00080000 ################################################################

 2061 12:44:36.862356  

 2062 12:44:37.405198  00100000 ################################################################

 2063 12:44:37.405340  

 2064 12:44:37.954575  00180000 ################################################################

 2065 12:44:37.954715  

 2066 12:44:38.519974  00200000 ################################################################

 2067 12:44:38.520116  

 2068 12:44:39.095401  00280000 ################################################################

 2069 12:44:39.095539  

 2070 12:44:39.649511  00300000 ################################################################

 2071 12:44:39.649647  

 2072 12:44:40.216912  00380000 ################################################################

 2073 12:44:40.217066  

 2074 12:44:40.771134  00400000 ################################################################

 2075 12:44:40.771282  

 2076 12:44:41.313843  00480000 ################################################################

 2077 12:44:41.313983  

 2078 12:44:41.853569  00500000 ################################################################

 2079 12:44:41.853724  

 2080 12:44:42.392531  00580000 ################################################################

 2081 12:44:42.392674  

 2082 12:44:42.952166  00600000 ################################################################

 2083 12:44:42.952311  

 2084 12:44:43.494793  00680000 ################################################################

 2085 12:44:43.494954  

 2086 12:44:44.044294  00700000 ################################################################

 2087 12:44:44.044451  

 2088 12:44:44.558054  00780000 ################################################################

 2089 12:44:44.558212  

 2090 12:44:45.079427  00800000 ################################################################

 2091 12:44:45.079577  

 2092 12:44:45.629550  00880000 ################################################################

 2093 12:44:45.629691  

 2094 12:44:46.166430  00900000 ################################################################

 2095 12:44:46.166577  

 2096 12:44:46.712598  00980000 ################################################################

 2097 12:44:46.712751  

 2098 12:44:47.252149  00a00000 ################################################################

 2099 12:44:47.252300  

 2100 12:44:47.799965  00a80000 ################################################################

 2101 12:44:47.800119  

 2102 12:44:47.915095  00b00000 ############## done.

 2103 12:44:47.915230  

 2104 12:44:47.918264  The bootfile was 11646080 bytes long.

 2105 12:44:47.918344  

 2106 12:44:47.921557  Sending tftp read request... done.

 2107 12:44:47.921637  

 2108 12:44:47.924854  Waiting for the transfer... 

 2109 12:44:47.924941  

 2110 12:44:48.469495  00000000 ################################################################

 2111 12:44:48.469655  

 2112 12:44:49.012383  00080000 ################################################################

 2113 12:44:49.012532  

 2114 12:44:49.544908  00100000 ################################################################

 2115 12:44:49.545064  

 2116 12:44:50.067174  00180000 ################################################################

 2117 12:44:50.067326  

 2118 12:44:50.609891  00200000 ################################################################

 2119 12:44:50.610031  

 2120 12:44:51.141423  00280000 ################################################################

 2121 12:44:51.141564  

 2122 12:44:51.658520  00300000 ################################################################

 2123 12:44:51.658670  

 2124 12:44:52.185394  00380000 ################################################################

 2125 12:44:52.185543  

 2126 12:44:52.871088  00400000 ################################################################

 2127 12:44:52.871701  

 2128 12:44:53.561774  00480000 ################################################################

 2129 12:44:53.562367  

 2130 12:44:54.239844  00500000 ################################################################

 2131 12:44:54.239985  

 2132 12:44:54.897013  00580000 ################################################################

 2133 12:44:54.897576  

 2134 12:44:55.499529  00600000 ################################################################

 2135 12:44:55.499673  

 2136 12:44:56.065056  00680000 ################################################################

 2137 12:44:56.065196  

 2138 12:44:56.637113  00700000 ################################################################

 2139 12:44:56.637260  

 2140 12:44:57.189920  00780000 ################################################################

 2141 12:44:57.190062  

 2142 12:44:57.730173  00800000 ################################################################

 2143 12:44:57.730308  

 2144 12:44:58.072594  00880000 ####################################### done.

 2145 12:44:58.072738  

 2146 12:44:58.075926  Sending tftp read request... done.

 2147 12:44:58.076014  

 2148 12:44:58.079203  Waiting for the transfer... 

 2149 12:44:58.079351  

 2150 12:44:58.079426  00000000 # done.

 2151 12:44:58.079493  

 2152 12:44:58.088664  Command line loaded dynamically from TFTP file: 9729697/tftp-deploy-t_yif5br/kernel/cmdline

 2153 12:44:58.088757  

 2154 12:44:58.104989  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

 2155 12:44:58.105083  

 2156 12:44:58.111426  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2157 12:44:58.116889  

 2158 12:44:58.120344  Shutting down all USB controllers.

 2159 12:44:58.120432  

 2160 12:44:58.120500  Removing current net device

 2161 12:44:58.128583  

 2162 12:44:58.128679  Finalizing coreboot

 2163 12:44:58.128749  

 2164 12:44:58.135077  Exiting depthcharge with code 4 at timestamp: 32296241

 2165 12:44:58.135184  

 2166 12:44:58.135252  

 2167 12:44:58.135316  Starting kernel ...

 2168 12:44:58.135378  

 2169 12:44:58.135441  

 2170 12:44:58.135832  end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
 2171 12:44:58.135934  start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
 2172 12:44:58.136015  Setting prompt string to ['Linux version [0-9]']
 2173 12:44:58.136087  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2174 12:44:58.136158  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2176 12:49:15.137380  end: 2.2.5 auto-login-action (duration 00:04:17) [common]
 2178 12:49:15.138436  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
 2180 12:49:15.139311  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2183 12:49:15.140676  end: 2 depthcharge-action (duration 00:05:00) [common]
 2185 12:49:15.141334  Cleaning after the job
 2186 12:49:15.141425  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/ramdisk
 2187 12:49:15.142119  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/kernel
 2188 12:49:15.142891  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729697/tftp-deploy-t_yif5br/modules
 2189 12:49:15.143253  start: 5.1 power-off (timeout 00:00:30) [common]
 2190 12:49:15.143404  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-1' '--port=1' '--command=off'
 2191 12:49:15.211615  >> Command sent successfully.

 2192 12:49:15.213802  Returned 0 in 0 seconds
 2193 12:49:15.314790  end: 5.1 power-off (duration 00:00:00) [common]
 2195 12:49:15.315568  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2196 12:49:15.316149  Listened to connection for namespace 'common' for up to 1s
 2198 12:49:15.316882  Listened to connection for namespace 'common' for up to 1s
 2199 12:49:15.318868  Listened to connection for namespace 'common' for up to 1s
 2200 12:49:15.322591  Listened to connection for namespace 'common' for up to 1s
 2201 12:49:15.325557  Listened to connection for namespace 'common' for up to 1s
 2202 12:49:15.328870  Listened to connection for namespace 'common' for up to 1s
 2203 12:49:15.332137  Listened to connection for namespace 'common' for up to 1s
 2204 12:49:15.335690  Listened to connection for namespace 'common' for up to 1s
 2205 12:49:15.339052  Listened to connection for namespace 'common' for up to 1s
 2206 12:49:15.342371  Listened to connection for namespace 'common' for up to 1s
 2207 12:49:15.345474  Listened to connection for namespace 'common' for up to 1s
 2208 12:49:15.348455  Listened to connection for namespace 'common' for up to 1s
 2209 12:49:15.351861  Listened to connection for namespace 'common' for up to 1s
 2210 12:49:15.355472  Listened to connection for namespace 'common' for up to 1s
 2211 12:49:15.358518  Listened to connection for namespace 'common' for up to 1s
 2212 12:49:15.362475  Listened to connection for namespace 'common' for up to 1s
 2213 12:49:15.365256  Listened to connection for namespace 'common' for up to 1s
 2214 12:49:15.368259  Listened to connection for namespace 'common' for up to 1s
 2215 12:49:15.371485  Listened to connection for namespace 'common' for up to 1s
 2216 12:49:15.374993  Listened to connection for namespace 'common' for up to 1s
 2217 12:49:15.378245  Listened to connection for namespace 'common' for up to 1s
 2218 12:49:15.381612  Listened to connection for namespace 'common' for up to 1s
 2219 12:49:15.384695  Listened to connection for namespace 'common' for up to 1s
 2220 12:49:15.387924  Listened to connection for namespace 'common' for up to 1s
 2221 12:49:15.391618  Listened to connection for namespace 'common' for up to 1s
 2222 12:49:15.394784  Listened to connection for namespace 'common' for up to 1s
 2223 12:49:15.398244  Listened to connection for namespace 'common' for up to 1s
 2224 12:49:15.401215  Listened to connection for namespace 'common' for up to 1s
 2225 12:49:15.404627  Listened to connection for namespace 'common' for up to 1s
 2226 12:49:15.407868  Listened to connection for namespace 'common' for up to 1s
 2227 12:49:15.411159  Listened to connection for namespace 'common' for up to 1s
 2228 12:49:15.414531  Listened to connection for namespace 'common' for up to 1s
 2229 12:49:15.417893  Listened to connection for namespace 'common' for up to 1s
 2230 12:49:15.421323  Listened to connection for namespace 'common' for up to 1s
 2231 12:49:15.424184  Listened to connection for namespace 'common' for up to 1s
 2232 12:49:15.427605  Listened to connection for namespace 'common' for up to 1s
 2233 12:49:15.430882  Listened to connection for namespace 'common' for up to 1s
 2234 12:49:15.434064  Listened to connection for namespace 'common' for up to 1s
 2235 12:49:15.437331  Listened to connection for namespace 'common' for up to 1s
 2236 12:49:15.440586  Listened to connection for namespace 'common' for up to 1s
 2237 12:49:15.443894  Listened to connection for namespace 'common' for up to 1s
 2238 12:49:15.447470  Listened to connection for namespace 'common' for up to 1s
 2239 12:49:15.450677  Listened to connection for namespace 'common' for up to 1s
 2240 12:49:15.453754  Listened to connection for namespace 'common' for up to 1s
 2241 12:49:15.457082  Listened to connection for namespace 'common' for up to 1s
 2242 12:49:15.460542  Listened to connection for namespace 'common' for up to 1s
 2243 12:49:15.463598  Listened to connection for namespace 'common' for up to 1s
 2244 12:49:15.466744  Listened to connection for namespace 'common' for up to 1s
 2245 12:49:15.470371  Listened to connection for namespace 'common' for up to 1s
 2246 12:49:15.473364  Listened to connection for namespace 'common' for up to 1s
 2247 12:49:15.476700  Listened to connection for namespace 'common' for up to 1s
 2248 12:49:15.479896  Listened to connection for namespace 'common' for up to 1s
 2249 12:49:15.483699  Listened to connection for namespace 'common' for up to 1s
 2250 12:49:15.486442  Listened to connection for namespace 'common' for up to 1s
 2251 12:49:15.490037  Listened to connection for namespace 'common' for up to 1s
 2252 12:49:15.493204  Listened to connection for namespace 'common' for up to 1s
 2253 12:49:15.496684  Listened to connection for namespace 'common' for up to 1s
 2254 12:49:15.499742  Listened to connection for namespace 'common' for up to 1s
 2255 12:49:15.502875  Listened to connection for namespace 'common' for up to 1s
 2256 12:49:15.506252  Listened to connection for namespace 'common' for up to 1s
 2257 12:49:15.509513  Listened to connection for namespace 'common' for up to 1s
 2258 12:49:15.513186  Listened to connection for namespace 'common' for up to 1s
 2259 12:49:15.516195  Listened to connection for namespace 'common' for up to 1s
 2260 12:49:15.519314  Listened to connection for namespace 'common' for up to 1s
 2261 12:49:15.522467  Listened to connection for namespace 'common' for up to 1s
 2262 12:49:15.525889  Listened to connection for namespace 'common' for up to 1s
 2263 12:49:15.529276  Listened to connection for namespace 'common' for up to 1s
 2264 12:49:15.532261  Listened to connection for namespace 'common' for up to 1s
 2265 12:49:15.535640  Listened to connection for namespace 'common' for up to 1s
 2266 12:49:15.538900  Listened to connection for namespace 'common' for up to 1s
 2267 12:49:15.542134  Listened to connection for namespace 'common' for up to 1s
 2268 12:49:15.545626  Listened to connection for namespace 'common' for up to 1s
 2269 12:49:15.548733  Listened to connection for namespace 'common' for up to 1s
 2270 12:49:15.552160  Listened to connection for namespace 'common' for up to 1s
 2271 12:49:15.555429  Listened to connection for namespace 'common' for up to 1s
 2272 12:49:15.558840  Listened to connection for namespace 'common' for up to 1s
 2273 12:49:15.562051  Listened to connection for namespace 'common' for up to 1s
 2274 12:49:15.565353  Listened to connection for namespace 'common' for up to 1s
 2275 12:49:15.568534  Listened to connection for namespace 'common' for up to 1s
 2276 12:49:15.571588  Listened to connection for namespace 'common' for up to 1s
 2277 12:49:15.575583  Listened to connection for namespace 'common' for up to 1s
 2278 12:49:15.578575  Listened to connection for namespace 'common' for up to 1s
 2279 12:49:15.581578  Listened to connection for namespace 'common' for up to 1s
 2280 12:49:15.584863  Listened to connection for namespace 'common' for up to 1s
 2281 12:49:15.587991  Listened to connection for namespace 'common' for up to 1s
 2282 12:49:15.591325  Listened to connection for namespace 'common' for up to 1s
 2283 12:49:15.594542  Listened to connection for namespace 'common' for up to 1s
 2284 12:49:15.598108  Listened to connection for namespace 'common' for up to 1s
 2285 12:49:15.601315  Listened to connection for namespace 'common' for up to 1s
 2286 12:49:15.604612  Listened to connection for namespace 'common' for up to 1s
 2287 12:49:15.607895  Listened to connection for namespace 'common' for up to 1s
 2288 12:49:15.611054  Listened to connection for namespace 'common' for up to 1s
 2289 12:49:15.614507  Listened to connection for namespace 'common' for up to 1s
 2290 12:49:15.617641  Listened to connection for namespace 'common' for up to 1s
 2291 12:49:15.621116  Listened to connection for namespace 'common' for up to 1s
 2292 12:49:15.624232  Listened to connection for namespace 'common' for up to 1s
 2293 12:49:15.627438  Listened to connection for namespace 'common' for up to 1s
 2294 12:49:15.630757  Listened to connection for namespace 'common' for up to 1s
 2295 12:49:15.634348  Listened to connection for namespace 'common' for up to 1s
 2296 12:49:15.637264  Listened to connection for namespace 'common' for up to 1s
 2297 12:49:15.640609  Listened to connection for namespace 'common' for up to 1s
 2298 12:49:15.643649  Listened to connection for namespace 'common' for up to 1s
 2299 12:49:15.647114  Listened to connection for namespace 'common' for up to 1s
 2300 12:49:15.650341  Listened to connection for namespace 'common' for up to 1s
 2301 12:49:15.653344  Listened to connection for namespace 'common' for up to 1s
 2302 12:49:15.656824  Listened to connection for namespace 'common' for up to 1s
 2303 12:49:15.660512  Listened to connection for namespace 'common' for up to 1s
 2304 12:49:15.663556  Listened to connection for namespace 'common' for up to 1s
 2305 12:49:15.666758  Listened to connection for namespace 'common' for up to 1s
 2306 12:49:15.670230  Listened to connection for namespace 'common' for up to 1s
 2307 12:49:15.673377  Listened to connection for namespace 'common' for up to 1s
 2308 12:49:15.676507  Listened to connection for namespace 'common' for up to 1s
 2309 12:49:15.680090  Listened to connection for namespace 'common' for up to 1s
 2310 12:49:15.683395  Listened to connection for namespace 'common' for up to 1s
 2311 12:49:15.686419  Listened to connection for namespace 'common' for up to 1s
 2312 12:49:15.689954  Listened to connection for namespace 'common' for up to 1s
 2313 12:49:15.692818  Listened to connection for namespace 'common' for up to 1s
 2314 12:49:15.696468  Listened to connection for namespace 'common' for up to 1s
 2315 12:49:15.699414  Listened to connection for namespace 'common' for up to 1s
 2316 12:49:15.702652  Listened to connection for namespace 'common' for up to 1s
 2317 12:49:15.705969  Listened to connection for namespace 'common' for up to 1s
 2318 12:49:15.709197  Listened to connection for namespace 'common' for up to 1s
 2319 12:49:15.712661  Listened to connection for namespace 'common' for up to 1s
 2320 12:49:15.716467  Listened to connection for namespace 'common' for up to 1s
 2321 12:49:15.718973  Listened to connection for namespace 'common' for up to 1s
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 2324 12:49:15.728791  Listened to connection for namespace 'common' for up to 1s
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 2503 12:49:16.316011  Listened to connection for namespace 'common' for up to 1s
 2504 12:49:16.316672  Finalising connection for namespace 'common'
 2505 12:49:16.317124  Disconnecting from shell: Finalise
 2506 12:49:16.317495  
 2507 12:49:16.419837  end: 5.2 read-feedback (duration 00:00:01) [common]
 2508 12:49:16.420438  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729697
 2509 12:49:16.448159  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729697
 2510 12:49:16.448597  JobError: Your job cannot terminate cleanly.