Boot log: dell-latitude-5400-4305U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:09.580238 lava-dispatcher, installed at version: 2023.01
2 12:44:09.580441 start: 0 validate
3 12:44:09.580570 Start time: 2023-03-22 12:44:09.580562+00:00 (UTC)
4 12:44:09.580699 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:09.580825 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:44:09.867989 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:09.868254 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:22.891941 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:22.892658 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:23.898390 validate duration: 14.32
12 12:44:23.898719 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:23.898913 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:23.899043 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:23.899179 Not decompressing ramdisk as can be used compressed.
16 12:44:23.899304 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:44:23.899376 saving as /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/ramdisk/rootfs.cpio.gz
18 12:44:23.899441 total size: 8429740 (8MB)
19 12:44:24.190121 progress 0% (0MB)
20 12:44:24.192520 progress 5% (0MB)
21 12:44:24.194711 progress 10% (0MB)
22 12:44:24.196915 progress 15% (1MB)
23 12:44:24.199266 progress 20% (1MB)
24 12:44:24.201874 progress 25% (2MB)
25 12:44:24.204130 progress 30% (2MB)
26 12:44:24.206344 progress 35% (2MB)
27 12:44:24.208366 progress 40% (3MB)
28 12:44:24.210592 progress 45% (3MB)
29 12:44:24.212835 progress 50% (4MB)
30 12:44:24.215039 progress 55% (4MB)
31 12:44:24.217207 progress 60% (4MB)
32 12:44:24.219380 progress 65% (5MB)
33 12:44:24.221609 progress 70% (5MB)
34 12:44:24.223612 progress 75% (6MB)
35 12:44:24.225868 progress 80% (6MB)
36 12:44:24.228202 progress 85% (6MB)
37 12:44:24.230519 progress 90% (7MB)
38 12:44:24.232810 progress 95% (7MB)
39 12:44:24.235082 progress 100% (8MB)
40 12:44:24.235256 8MB downloaded in 0.34s (23.94MB/s)
41 12:44:24.235418 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:44:24.235679 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:44:24.235788 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:44:24.235876 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:44:24.235987 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:24.236055 saving as /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/kernel/bzImage
48 12:44:24.236118 total size: 11646080 (11MB)
49 12:44:24.236179 No compression specified
50 12:44:24.237178 progress 0% (0MB)
51 12:44:24.240255 progress 5% (0MB)
52 12:44:24.243489 progress 10% (1MB)
53 12:44:24.246682 progress 15% (1MB)
54 12:44:24.249833 progress 20% (2MB)
55 12:44:24.252847 progress 25% (2MB)
56 12:44:24.256033 progress 30% (3MB)
57 12:44:24.259222 progress 35% (3MB)
58 12:44:24.262261 progress 40% (4MB)
59 12:44:24.265157 progress 45% (5MB)
60 12:44:24.268110 progress 50% (5MB)
61 12:44:24.271187 progress 55% (6MB)
62 12:44:24.274260 progress 60% (6MB)
63 12:44:24.277332 progress 65% (7MB)
64 12:44:24.280408 progress 70% (7MB)
65 12:44:24.283415 progress 75% (8MB)
66 12:44:24.286525 progress 80% (8MB)
67 12:44:24.289553 progress 85% (9MB)
68 12:44:24.292493 progress 90% (10MB)
69 12:44:24.295440 progress 95% (10MB)
70 12:44:24.298621 progress 100% (11MB)
71 12:44:24.298839 11MB downloaded in 0.06s (177.09MB/s)
72 12:44:24.299004 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:44:24.299251 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:44:24.299346 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:44:24.299452 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:44:24.299576 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:24.299646 saving as /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/modules/modules.tar
79 12:44:24.299709 total size: 497788 (0MB)
80 12:44:24.299771 Using unxz to decompress xz
81 12:44:24.303341 progress 6% (0MB)
82 12:44:24.303766 progress 13% (0MB)
83 12:44:24.304028 progress 19% (0MB)
84 12:44:24.306298 progress 26% (0MB)
85 12:44:24.309806 progress 32% (0MB)
86 12:44:24.313388 progress 39% (0MB)
87 12:44:24.316508 progress 46% (0MB)
88 12:44:24.319791 progress 52% (0MB)
89 12:44:24.323917 progress 59% (0MB)
90 12:44:24.327244 progress 65% (0MB)
91 12:44:24.330903 progress 72% (0MB)
92 12:44:24.334203 progress 78% (0MB)
93 12:44:24.337611 progress 85% (0MB)
94 12:44:24.341162 progress 92% (0MB)
95 12:44:24.344703 progress 98% (0MB)
96 12:44:24.356382 0MB downloaded in 0.06s (8.38MB/s)
97 12:44:24.356778 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:44:24.357065 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:44:24.357167 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:44:24.357269 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:44:24.357362 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:44:24.357454 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:44:24.357637 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49
105 12:44:24.357756 makedir: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin
106 12:44:24.357853 makedir: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/tests
107 12:44:24.357953 makedir: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/results
108 12:44:24.358077 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-add-keys
109 12:44:24.358221 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-add-sources
110 12:44:24.358345 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-background-process-start
111 12:44:24.358464 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-background-process-stop
112 12:44:24.358581 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-common-functions
113 12:44:24.358696 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-echo-ipv4
114 12:44:24.358812 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-install-packages
115 12:44:24.358935 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-installed-packages
116 12:44:24.359097 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-os-build
117 12:44:24.359239 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-probe-channel
118 12:44:24.359356 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-probe-ip
119 12:44:24.359470 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-target-ip
120 12:44:24.359587 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-target-mac
121 12:44:24.359701 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-target-storage
122 12:44:24.359818 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-case
123 12:44:24.359948 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-event
124 12:44:24.360063 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-feedback
125 12:44:24.360177 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-raise
126 12:44:24.360302 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-reference
127 12:44:24.360415 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-runner
128 12:44:24.360528 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-set
129 12:44:24.360640 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-test-shell
130 12:44:24.360756 Updating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-install-packages (oe)
131 12:44:24.360879 Updating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/bin/lava-installed-packages (oe)
132 12:44:24.360983 Creating /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/environment
133 12:44:24.361075 LAVA metadata
134 12:44:24.361148 - LAVA_JOB_ID=9729689
135 12:44:24.361217 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:44:24.361334 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:44:24.361404 skipped lava-vland-overlay
138 12:44:24.361485 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:44:24.361594 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:44:24.361694 skipped lava-multinode-overlay
141 12:44:24.361802 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:44:24.361896 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:44:24.361976 Loading test definitions
144 12:44:24.362090 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:44:24.362172 Using /lava-9729689 at stage 0
146 12:44:24.362452 uuid=9729689_1.4.2.3.1 testdef=None
147 12:44:24.362549 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:44:24.362644 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:44:24.363165 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:44:24.363409 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:44:24.364057 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:44:24.364314 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:44:24.364962 runner path: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/0/tests/0_dmesg test_uuid 9729689_1.4.2.3.1
156 12:44:24.365118 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:44:24.365359 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:44:24.365436 Using /lava-9729689 at stage 1
160 12:44:24.365690 uuid=9729689_1.4.2.3.5 testdef=None
161 12:44:24.365789 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:44:24.365884 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:44:24.366430 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:44:24.366666 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:44:24.367258 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:44:24.367593 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:44:24.368167 runner path: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/1/tests/1_bootrr test_uuid 9729689_1.4.2.3.5
170 12:44:24.368315 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:44:24.368534 Creating lava-test-runner.conf files
173 12:44:24.368603 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/0 for stage 0
174 12:44:24.368689 - 0_dmesg
175 12:44:24.368768 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729689/lava-overlay-nt5jus49/lava-9729689/1 for stage 1
176 12:44:24.368877 - 1_bootrr
177 12:44:24.368975 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:44:24.369069 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:44:24.375930 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:44:24.376091 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:44:24.376202 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:44:24.376299 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:44:24.376419 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:44:24.570783 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:44:24.571242 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
186 12:44:24.571435 extracting modules file /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729689/extract-overlay-ramdisk-ooqdanut/ramdisk
187 12:44:24.593191 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:44:24.593435 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
189 12:44:24.593609 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729689/compress-overlay-27dmx1lp/overlay-1.4.2.4.tar.gz to ramdisk
190 12:44:24.593747 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729689/compress-overlay-27dmx1lp/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729689/extract-overlay-ramdisk-ooqdanut/ramdisk
191 12:44:24.600902 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:44:24.601124 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
193 12:44:24.601297 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:44:24.601462 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
195 12:44:24.601619 Building ramdisk /var/lib/lava/dispatcher/tmp/9729689/extract-overlay-ramdisk-ooqdanut/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729689/extract-overlay-ramdisk-ooqdanut/ramdisk
196 12:44:24.693740 >> 53721 blocks
197 12:44:25.819326 rename /var/lib/lava/dispatcher/tmp/9729689/extract-overlay-ramdisk-ooqdanut/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
198 12:44:25.819746 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:44:25.819879 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
200 12:44:25.819990 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
201 12:44:25.820085 No mkimage arch provided, not using FIT.
202 12:44:25.820182 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:44:25.820269 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:44:25.820375 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:44:25.820468 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
206 12:44:25.820547 No LXC device requested
207 12:44:25.820633 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:44:25.820729 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
209 12:44:25.820817 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:44:25.820890 Checking files for TFTP limit of 4294967296 bytes.
211 12:44:25.821288 end: 1 tftp-deploy (duration 00:00:02) [common]
212 12:44:25.821398 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:44:25.821498 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:44:25.821631 substitutions:
215 12:44:25.821702 - {DTB}: None
216 12:44:25.821768 - {INITRD}: 9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
217 12:44:25.821830 - {KERNEL}: 9729689/tftp-deploy-oiwsyrhr/kernel/bzImage
218 12:44:25.821891 - {LAVA_MAC}: None
219 12:44:25.821951 - {PRESEED_CONFIG}: None
220 12:44:25.822009 - {PRESEED_LOCAL}: None
221 12:44:25.822097 - {RAMDISK}: 9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
222 12:44:25.822175 - {ROOT_PART}: None
223 12:44:25.822250 - {ROOT}: None
224 12:44:25.822333 - {SERVER_IP}: 192.168.201.1
225 12:44:25.822395 - {TEE}: None
226 12:44:25.822454 Parsed boot commands:
227 12:44:25.822511 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:44:25.822728 Parsed boot commands: tftpboot 192.168.201.1 9729689/tftp-deploy-oiwsyrhr/kernel/bzImage 9729689/tftp-deploy-oiwsyrhr/kernel/cmdline 9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
229 12:44:25.822836 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:44:25.822933 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:44:25.823038 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:44:25.823130 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:44:25.823206 Not connected, no need to disconnect.
234 12:44:25.823289 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:44:25.823374 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:44:25.823441 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-4305U-sarien-cbg-0'
237 12:44:25.826597 Setting prompt string to ['lava-test: # ']
238 12:44:25.826931 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:44:25.827049 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:44:25.827159 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:44:25.827258 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:44:25.827450 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=reboot'
243 12:44:47.222358 >> Command sent successfully.
244 12:44:47.225282 Returned 0 in 21 seconds
245 12:44:47.326097 end: 2.2.2.1 pdu-reboot (duration 00:00:21) [common]
247 12:44:47.326432 end: 2.2.2 reset-device (duration 00:00:21) [common]
248 12:44:47.326533 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
249 12:44:47.326625 Setting prompt string to 'Starting depthcharge on sarien...'
250 12:44:47.326712 Changing prompt to 'Starting depthcharge on sarien...'
251 12:44:47.326787 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
252 12:44:47.327072 [Enter `^Ec?' for help]
253 12:44:47.327154
254 12:44:47.327225
255 12:44:47.327291 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
256 12:44:47.327361 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
257 12:44:47.327423 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
258 12:44:47.327483 CPU: AES supported, TXT NOT supported, VT supported
259 12:44:47.327543 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
260 12:44:47.327601 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
261 12:44:47.327660 IGD: device id 3ea1 (rev 02) is Unknown
262 12:44:47.327717 VBOOT: Loading verstage.
263 12:44:47.327777 CBFS @ 1d00000 size 300000
264 12:44:47.327835 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
265 12:44:47.327901 CBFS: Locating 'fallback/verstage'
266 12:44:47.327999 CBFS: Found @ offset 10f6c0 size 1435c
267 12:44:47.328066
268 12:44:47.328151
269 12:44:47.328240 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
270 12:44:47.328326 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
271 12:44:47.328411 done! DID_VID 0x00281ae0
272 12:44:47.328494 TPM ready after 0 ms
273 12:44:47.328581 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
274 12:44:47.328645 tlcl_send_startup: Startup return code is 0
275 12:44:47.328705 TPM: setup succeeded
276 12:44:47.328764 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
277 12:44:47.328822 Checking cr50 for recovery request
278 12:44:47.328879 Phase 1
279 12:44:47.328936 FMAP: Found "FLASH" version 1.1 at 1c10000.
280 12:44:47.328994 FMAP: base = fe000000 size = 2000000 #areas = 37
281 12:44:47.329052 FMAP: area GBB found @ 1c11000 (978944 bytes)
282 12:44:47.329130 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 12:44:47.329214 Phase 2
284 12:44:47.329295 Phase 3
285 12:44:47.329376 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 12:44:47.329459 VB2:vb2_report_dev_firmware() This is developer signed firmware
287 12:44:47.329552 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
288 12:44:47.329638 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
289 12:44:47.329701 VB2:vb2_verify_keyblock() Checking key block signature...
290 12:44:47.329761 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
291 12:44:47.329823 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
292 12:44:47.329896 VB2:vb2_verify_fw_preamble() Verifying preamble.
293 12:44:47.329984 Phase 4
294 12:44:47.330076 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
295 12:44:47.330140 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
296 12:44:47.330200 VB2:vb2_rsa_verify_digest() Digest check failed!
297 12:44:47.330258 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
298 12:44:47.330317 Saving nvdata
299 12:44:47.330374 Reboot requested (10020007)
300 12:44:47.330432 board_reset() called!
301 12:44:47.330489 full_reset() called!
302 12:44:49.412560
303 12:44:49.413063
304 12:44:49.422307 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
305 12:44:49.426246 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz
306 12:44:49.431477 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
307 12:44:49.436104 CPU: AES supported, TXT NOT supported, VT supported
308 12:44:49.441583 MCH: device id 3e35 (rev 0c) is Whiskeylake W (2+2)
309 12:44:49.446849 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
310 12:44:49.450058 IGD: device id 3ea1 (rev 02) is Unknown
311 12:44:49.453624 VBOOT: Loading verstage.
312 12:44:49.457327 CBFS @ 1d00000 size 300000
313 12:44:49.463569 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
314 12:44:49.466790 CBFS: Locating 'fallback/verstage'
315 12:44:49.471135 CBFS: Found @ offset 10f6c0 size 1435c
316 12:44:49.485046
317 12:44:49.485147
318 12:44:49.493252 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
319 12:44:49.500102 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
320 12:44:49.503206 done! DID_VID 0x00281ae0
321 12:44:49.505171 TPM ready after 0 ms
322 12:44:49.509055 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
323 12:44:49.588814 tlcl_send_startup: Startup return code is 0
324 12:44:49.590764 TPM: setup succeeded
325 12:44:49.609397 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
326 12:44:49.613510 Checking cr50 for recovery request
327 12:44:49.622722 Phase 1
328 12:44:49.626889 FMAP: Found "FLASH" version 1.1 at 1c10000.
329 12:44:49.631682 FMAP: base = fe000000 size = 2000000 #areas = 37
330 12:44:49.637051 FMAP: area GBB found @ 1c11000 (978944 bytes)
331 12:44:49.643912 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
332 12:44:49.650478 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
333 12:44:49.652988 Recovery requested (1009000e)
334 12:44:49.654604 Saving nvdata
335 12:44:49.670710 tlcl_extend: response is 0
336 12:44:49.686495 tlcl_extend: response is 0
337 12:44:49.689729 CBFS @ 1d00000 size 300000
338 12:44:49.696708 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
339 12:44:49.700576 CBFS: Locating 'fallback/romstage'
340 12:44:49.703721 CBFS: Found @ offset 80 size 15b2c
341 12:44:49.704499
342 12:44:49.705573
343 12:44:49.713495 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
344 12:44:49.718891 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:44:49.722921 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:44:49.727472 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 12:44:49.730938 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 12:44:49.735544 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
349 12:44:49.738059 TCO_STS: 0000 0004
350 12:44:49.740820 GEN_PMCON: d0015209 00002200
351 12:44:49.744186 GBLRST_CAUSE: 00000000 00000000
352 12:44:49.745555 prev_sleep_state 5
353 12:44:49.749362 Boot Count incremented to 31011
354 12:44:49.752528 CBFS @ 1d00000 size 300000
355 12:44:49.758899 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
356 12:44:49.761934 CBFS: Locating 'fspm.bin'
357 12:44:49.765358 CBFS: Found @ offset 60fc0 size 70000
358 12:44:49.770912 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 12:44:49.776117 FMAP: base = fe000000 size = 2000000 #areas = 37
360 12:44:49.781458 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
361 12:44:49.788221 Probing TPM I2C: done! DID_VID 0x00281ae0
362 12:44:49.790858 Locality already claimed
363 12:44:49.793744 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
364 12:44:49.813005 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
365 12:44:49.819560 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
366 12:44:49.822945 MRC cache found, size 18e0
367 12:44:49.824423 bootmode is set to :2
368 12:44:49.914605 CBMEM:
369 12:44:49.918854 IMD: root @ 89fff000 254 entries.
370 12:44:49.921109 IMD: root @ 89ffec00 62 entries.
371 12:44:49.924378 External stage cache:
372 12:44:49.928205 IMD: root @ 8abff000 254 entries.
373 12:44:49.931607 IMD: root @ 8abfec00 62 entries.
374 12:44:49.937537 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
375 12:44:49.940811 creating vboot_handoff structure
376 12:44:49.961453 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
377 12:44:49.976417 tlcl_write: response is 0
378 12:44:49.995864 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
379 12:44:50.000091 MRC: TPM MRC hash updated successfully.
380 12:44:50.001586 1 DIMMs found
381 12:44:50.004073 top_of_ram = 0x8a000000
382 12:44:50.009341 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
383 12:44:50.014213 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 12:44:50.017074 CBFS @ 1d00000 size 300000
385 12:44:50.023001 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 12:44:50.026333 CBFS: Locating 'fallback/postcar'
387 12:44:50.030287 CBFS: Found @ offset 107000 size 41a4
388 12:44:50.036305 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
389 12:44:50.047466 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
390 12:44:50.051659 Processing 126 relocs. Offset value of 0x87cdd000
391 12:44:50.054944
392 12:44:50.055040
393 12:44:50.062990 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
394 12:44:50.066184 CBFS @ 1d00000 size 300000
395 12:44:50.071959 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
396 12:44:50.075287 CBFS: Locating 'fallback/ramstage'
397 12:44:50.079051 CBFS: Found @ offset 458c0 size 1a8a8
398 12:44:50.085707 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
399 12:44:50.113307 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
400 12:44:50.118235 Processing 3754 relocs. Offset value of 0x88e81000
401 12:44:50.123401
402 12:44:50.123675
403 12:44:50.132515 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
404 12:44:50.137128 FMAP: Found "FLASH" version 1.1 at 1c10000.
405 12:44:50.141172 FMAP: base = fe000000 size = 2000000 #areas = 37
406 12:44:50.147073 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
407 12:44:50.151011 WARNING: RO_VPD is uninitialized or empty.
408 12:44:50.155246 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
409 12:44:50.161105 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
410 12:44:50.162441 Normal boot.
411 12:44:50.169006 BS: BS_PRE_DEVICE times (us): entry 0 run 54 exit 1163
412 12:44:50.171703 CBFS @ 1d00000 size 300000
413 12:44:50.177343 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
414 12:44:50.181060 CBFS: Locating 'cpu_microcode_blob.bin'
415 12:44:50.185078 CBFS: Found @ offset 15c40 size 2fc00
416 12:44:50.190225 microcode: sig=0x806ec pf=0x80 revision=0xb7
417 12:44:50.192124 Skip microcode update
418 12:44:50.194423 CBFS @ 1d00000 size 300000
419 12:44:50.201802 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
420 12:44:50.203826 CBFS: Locating 'fsps.bin'
421 12:44:50.208362 CBFS: Found @ offset d1fc0 size 35000
422 12:44:50.241897 Detected 2 core, 2 thread CPU.
423 12:44:50.244075 Setting up SMI for CPU
424 12:44:50.247245 IED base = 0x8ac00000
425 12:44:50.249275 IED size = 0x00400000
426 12:44:50.251625 Will perform SMM setup.
427 12:44:50.256341 CPU: Intel(R) Celeron(R) CPU 4305U @ 2.20GHz.
428 12:44:50.263750 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
429 12:44:50.268392 Processing 16 relocs. Offset value of 0x00030000
430 12:44:50.272042 Attempting to start 1 APs
431 12:44:50.274931 Waiting for 10ms after sending INIT.
432 12:44:50.289619 Waiting for 1st SIPI to complete...done.
433 12:44:50.292220 AP: slot 1 apic_id 2.
434 12:44:50.296231 Waiting for 2nd SIPI to complete...done.
435 12:44:50.303246 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
436 12:44:50.308613 Processing 13 relocs. Offset value of 0x00038000
437 12:44:50.315050 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
438 12:44:50.318252 Installing SMM handler to 0x8a000000
439 12:44:50.326701 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
440 12:44:50.332178 Processing 867 relocs. Offset value of 0x8a010000
441 12:44:50.340940 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
442 12:44:50.345194 Processing 13 relocs. Offset value of 0x8a008000
443 12:44:50.351163 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
444 12:44:50.357339 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
445 12:44:50.361250 Clearing SMI status registers
446 12:44:50.361696 SMI_STS: PM1
447 12:44:50.363806 PM1_STS: WAK PWRBTN
448 12:44:50.367242 TCO_STS: BOOT SECOND_TO
449 12:44:50.368457 GPE0 STD STS: eSPI
450 12:44:50.371142 New SMBASE 0x8a000000
451 12:44:50.373530 In relocation handler: CPU 0
452 12:44:50.378677 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
453 12:44:50.383193 Writing SMRR. base = 0x8a000006, mask=0xff000800
454 12:44:50.385164 Relocation complete.
455 12:44:50.387366 New SMBASE 0x89fffc00
456 12:44:50.390512 In relocation handler: CPU 1
457 12:44:50.394481 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
458 12:44:50.399060 Writing SMRR. base = 0x8a000006, mask=0xff000800
459 12:44:50.401369 Relocation complete.
460 12:44:50.403890 Initializing CPU #0
461 12:44:50.406998 CPU: vendor Intel device 806ec
462 12:44:50.410829 CPU: family 06, model 8e, stepping 0c
463 12:44:50.413292 Clearing out pending MCEs
464 12:44:50.418216 Setting up local APIC... apic_id: 0x00 done.
465 12:44:50.420441 Turbo is available but hidden
466 12:44:50.423296 Turbo has been enabled
467 12:44:50.425132 VMX status: enabled
468 12:44:50.429009 IA32_FEATURE_CONTROL status: locked
469 12:44:50.430568 Skip microcode update
470 12:44:50.432619 CPU #0 initialized
471 12:44:50.434686 Initializing CPU #1
472 12:44:50.438288 CPU: vendor Intel device 806ec
473 12:44:50.442743 CPU: family 06, model 8e, stepping 0c
474 12:44:50.444437 Clearing out pending MCEs
475 12:44:50.449254 Setting up local APIC... apic_id: 0x02 done.
476 12:44:50.451942 VMX status: enabled
477 12:44:50.454710 IA32_FEATURE_CONTROL status: locked
478 12:44:50.457364 Skip microcode update
479 12:44:50.459774 CPU #1 initialized
480 12:44:50.463847 bsp_do_flight_plan done after 163 msecs.
481 12:44:50.467175 CPU: frequency set to 2200 MHz
482 12:44:50.468495 Enabling SMIs.
483 12:44:50.469392 Locking SMM.
484 12:44:50.472690 CBFS @ 1d00000 size 300000
485 12:44:50.479265 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
486 12:44:50.481938 CBFS: Locating 'vbt.bin'
487 12:44:50.485806 CBFS: Found @ offset 60a40 size 4a0
488 12:44:50.490504 Found a VBT of 4608 bytes after decompression
489 12:44:50.504040 FMAP: area GBB found @ 1c11000 (978944 bytes)
490 12:44:50.614099 Detected 2 core, 2 thread CPU.
491 12:44:50.617201 Detected 2 core, 2 thread CPU.
492 12:44:50.846907 Display FSP Version Info HOB
493 12:44:50.850397 Reference Code - CPU = 7.0.5e.40
494 12:44:50.852914 uCode Version = 0.0.0.b8
495 12:44:50.855976 Display FSP Version Info HOB
496 12:44:50.859145 Reference Code - ME = 7.0.5e.40
497 12:44:50.860439 MEBx version = 0.0.0.0
498 12:44:50.864657 ME Firmware Version = Consumer SKU
499 12:44:50.867443 Display FSP Version Info HOB
500 12:44:50.871204 Reference Code - CNL PCH = 7.0.5e.40
501 12:44:50.873343 PCH-CRID Status = Disabled
502 12:44:50.877620 CNL PCH H A0 Hsio Version = 2.0.0.0
503 12:44:50.881521 CNL PCH H Ax Hsio Version = 9.0.0.0
504 12:44:50.884856 CNL PCH H Bx Hsio Version = a.0.0.0
505 12:44:50.888839 CNL PCH LP B0 Hsio Version = 7.0.0.0
506 12:44:50.892144 CNL PCH LP Bx Hsio Version = 6.0.0.0
507 12:44:50.896053 CNL PCH LP Dx Hsio Version = 7.0.0.0
508 12:44:50.898708 Display FSP Version Info HOB
509 12:44:50.903341 Reference Code - SA - System Agent = 7.0.5e.40
510 12:44:50.906599 Reference Code - MRC = 0.7.1.68
511 12:44:50.909493 SA - PCIe Version = 7.0.5e.40
512 12:44:50.911578 SA-CRID Status = Disabled
513 12:44:50.915680 SA-CRID Original Value = 0.0.0.c
514 12:44:50.918252 SA-CRID New Value = 0.0.0.c
515 12:44:50.936685 RTC Init
516 12:44:50.940538 Set power off after power failure.
517 12:44:50.941996 Disabling Deep S3
518 12:44:50.944852 Disabling Deep S3
519 12:44:50.946776 Disabling Deep S4
520 12:44:50.948071 Disabling Deep S4
521 12:44:50.950035 Disabling Deep S5
522 12:44:50.951512 Disabling Deep S5
523 12:44:50.958708 BS: BS_DEV_INIT_CHIPS times (us): entry 300968 run 465951 exit 16239
524 12:44:50.961198 Enumerating buses...
525 12:44:50.964545 Show all devs... Before device enumeration.
526 12:44:50.967677 Root Device: enabled 1
527 12:44:50.969789 CPU_CLUSTER: 0: enabled 1
528 12:44:50.972822 DOMAIN: 0000: enabled 1
529 12:44:50.974828 APIC: 00: enabled 1
530 12:44:50.976907 PCI: 00:00.0: enabled 1
531 12:44:50.979457 PCI: 00:02.0: enabled 1
532 12:44:50.982038 PCI: 00:04.0: enabled 1
533 12:44:50.984634 PCI: 00:12.0: enabled 1
534 12:44:50.986687 PCI: 00:12.5: enabled 0
535 12:44:50.988565 PCI: 00:12.6: enabled 0
536 12:44:50.991813 PCI: 00:13.0: enabled 0
537 12:44:50.993900 PCI: 00:14.0: enabled 1
538 12:44:50.996499 PCI: 00:14.1: enabled 0
539 12:44:50.999121 PCI: 00:14.3: enabled 1
540 12:44:51.001793 PCI: 00:14.5: enabled 0
541 12:44:51.004392 PCI: 00:15.0: enabled 1
542 12:44:51.006423 PCI: 00:15.1: enabled 1
543 12:44:51.009128 PCI: 00:15.2: enabled 0
544 12:44:51.011112 PCI: 00:15.3: enabled 0
545 12:44:51.013345 PCI: 00:16.0: enabled 1
546 12:44:51.016476 PCI: 00:16.1: enabled 0
547 12:44:51.018513 PCI: 00:16.2: enabled 0
548 12:44:51.021076 PCI: 00:16.3: enabled 0
549 12:44:51.023790 PCI: 00:16.4: enabled 0
550 12:44:51.025156 PCI: 00:16.5: enabled 0
551 12:44:51.028492 PCI: 00:17.0: enabled 1
552 12:44:51.030057 PCI: 00:19.0: enabled 1
553 12:44:51.032496 PCI: 00:19.1: enabled 0
554 12:44:51.035833 PCI: 00:19.2: enabled 1
555 12:44:51.038477 PCI: 00:1a.0: enabled 0
556 12:44:51.040305 PCI: 00:1c.0: enabled 1
557 12:44:51.042875 PCI: 00:1c.1: enabled 0
558 12:44:51.044482 PCI: 00:1c.2: enabled 0
559 12:44:51.047510 PCI: 00:1c.3: enabled 0
560 12:44:51.050033 PCI: 00:1c.4: enabled 0
561 12:44:51.052561 PCI: 00:1c.5: enabled 0
562 12:44:51.055124 PCI: 00:1c.6: enabled 0
563 12:44:51.057527 PCI: 00:1c.7: enabled 1
564 12:44:51.059566 PCI: 00:1d.0: enabled 1
565 12:44:51.062358 PCI: 00:1d.1: enabled 1
566 12:44:51.064699 PCI: 00:1d.2: enabled 0
567 12:44:51.067227 PCI: 00:1d.3: enabled 0
568 12:44:51.069309 PCI: 00:1d.4: enabled 1
569 12:44:51.072303 PCI: 00:1e.0: enabled 0
570 12:44:51.074707 PCI: 00:1e.1: enabled 0
571 12:44:51.077128 PCI: 00:1e.2: enabled 0
572 12:44:51.079084 PCI: 00:1e.3: enabled 0
573 12:44:51.081669 PCI: 00:1f.0: enabled 1
574 12:44:51.084489 PCI: 00:1f.1: enabled 1
575 12:44:51.086344 PCI: 00:1f.2: enabled 1
576 12:44:51.089044 PCI: 00:1f.3: enabled 1
577 12:44:51.090999 PCI: 00:1f.4: enabled 1
578 12:44:51.093231 PCI: 00:1f.5: enabled 1
579 12:44:51.096028 PCI: 00:1f.6: enabled 1
580 12:44:51.098864 USB0 port 0: enabled 1
581 12:44:51.100739 I2C: 00:10: enabled 1
582 12:44:51.103042 I2C: 00:10: enabled 1
583 12:44:51.105541 I2C: 00:34: enabled 1
584 12:44:51.107395 I2C: 00:2c: enabled 1
585 12:44:51.110074 I2C: 00:50: enabled 1
586 12:44:51.111533 PNP: 0c09.0: enabled 1
587 12:44:51.114825 USB2 port 0: enabled 1
588 12:44:51.116829 USB2 port 1: enabled 1
589 12:44:51.118975 USB2 port 2: enabled 1
590 12:44:51.121367 USB2 port 4: enabled 1
591 12:44:51.123951 USB2 port 5: enabled 1
592 12:44:51.126583 USB2 port 6: enabled 1
593 12:44:51.128589 USB2 port 7: enabled 1
594 12:44:51.131315 USB2 port 8: enabled 1
595 12:44:51.133391 USB2 port 9: enabled 1
596 12:44:51.134922 USB3 port 0: enabled 1
597 12:44:51.138079 USB3 port 1: enabled 1
598 12:44:51.140064 USB3 port 2: enabled 1
599 12:44:51.141721 USB3 port 3: enabled 1
600 12:44:51.144712 USB3 port 4: enabled 1
601 12:44:51.146882 APIC: 02: enabled 1
602 12:44:51.148717 Compare with tree...
603 12:44:51.150828 Root Device: enabled 1
604 12:44:51.153915 CPU_CLUSTER: 0: enabled 1
605 12:44:51.155867 APIC: 00: enabled 1
606 12:44:51.158848 APIC: 02: enabled 1
607 12:44:51.161490 DOMAIN: 0000: enabled 1
608 12:44:51.163989 PCI: 00:00.0: enabled 1
609 12:44:51.166019 PCI: 00:02.0: enabled 1
610 12:44:51.168515 PCI: 00:04.0: enabled 1
611 12:44:51.171050 PCI: 00:12.0: enabled 1
612 12:44:51.174005 PCI: 00:12.5: enabled 0
613 12:44:51.177169 PCI: 00:12.6: enabled 0
614 12:44:51.179615 PCI: 00:13.0: enabled 0
615 12:44:51.181580 PCI: 00:14.0: enabled 1
616 12:44:51.184599 USB0 port 0: enabled 1
617 12:44:51.187950 USB2 port 0: enabled 1
618 12:44:51.190603 USB2 port 1: enabled 1
619 12:44:51.192709 USB2 port 2: enabled 1
620 12:44:51.195871 USB2 port 4: enabled 1
621 12:44:51.198534 USB2 port 5: enabled 1
622 12:44:51.200605 USB2 port 6: enabled 1
623 12:44:51.204245 USB2 port 7: enabled 1
624 12:44:51.206938 USB2 port 8: enabled 1
625 12:44:51.208695 USB2 port 9: enabled 1
626 12:44:51.212438 USB3 port 0: enabled 1
627 12:44:51.214403 USB3 port 1: enabled 1
628 12:44:51.217808 USB3 port 2: enabled 1
629 12:44:51.219803 USB3 port 3: enabled 1
630 12:44:51.223136 USB3 port 4: enabled 1
631 12:44:51.225762 PCI: 00:14.1: enabled 0
632 12:44:51.228424 PCI: 00:14.3: enabled 1
633 12:44:51.230616 PCI: 00:14.5: enabled 0
634 12:44:51.233740 PCI: 00:15.0: enabled 1
635 12:44:51.235736 I2C: 00:10: enabled 1
636 12:44:51.237958 I2C: 00:10: enabled 1
637 12:44:51.241088 I2C: 00:34: enabled 1
638 12:44:51.243287 PCI: 00:15.1: enabled 1
639 12:44:51.245829 I2C: 00:2c: enabled 1
640 12:44:51.249094 PCI: 00:15.2: enabled 0
641 12:44:51.251711 PCI: 00:15.3: enabled 0
642 12:44:51.253466 PCI: 00:16.0: enabled 1
643 12:44:51.255967 PCI: 00:16.1: enabled 0
644 12:44:51.259010 PCI: 00:16.2: enabled 0
645 12:44:51.262219 PCI: 00:16.3: enabled 0
646 12:44:51.264442 PCI: 00:16.4: enabled 0
647 12:44:51.266961 PCI: 00:16.5: enabled 0
648 12:44:51.269671 PCI: 00:17.0: enabled 1
649 12:44:51.272590 PCI: 00:19.0: enabled 1
650 12:44:51.275086 I2C: 00:50: enabled 1
651 12:44:51.276944 PCI: 00:19.1: enabled 0
652 12:44:51.280273 PCI: 00:19.2: enabled 1
653 12:44:51.282778 PCI: 00:1a.0: enabled 0
654 12:44:51.285338 PCI: 00:1c.0: enabled 1
655 12:44:51.288421 PCI: 00:1c.1: enabled 0
656 12:44:51.291022 PCI: 00:1c.2: enabled 0
657 12:44:51.293607 PCI: 00:1c.3: enabled 0
658 12:44:51.296170 PCI: 00:1c.4: enabled 0
659 12:44:51.298438 PCI: 00:1c.5: enabled 0
660 12:44:51.301424 PCI: 00:1c.6: enabled 0
661 12:44:51.303099 PCI: 00:1c.7: enabled 1
662 12:44:51.306517 PCI: 00:1d.0: enabled 1
663 12:44:51.309022 PCI: 00:1d.1: enabled 1
664 12:44:51.311504 PCI: 00:1d.2: enabled 0
665 12:44:51.313654 PCI: 00:1d.3: enabled 0
666 12:44:51.316312 PCI: 00:1d.4: enabled 1
667 12:44:51.319434 PCI: 00:1e.0: enabled 0
668 12:44:51.322140 PCI: 00:1e.1: enabled 0
669 12:44:51.324839 PCI: 00:1e.2: enabled 0
670 12:44:51.327521 PCI: 00:1e.3: enabled 0
671 12:44:51.330152 PCI: 00:1f.0: enabled 1
672 12:44:51.332680 PNP: 0c09.0: enabled 1
673 12:44:51.335359 PCI: 00:1f.1: enabled 1
674 12:44:51.337486 PCI: 00:1f.2: enabled 1
675 12:44:51.340710 PCI: 00:1f.3: enabled 1
676 12:44:51.343269 PCI: 00:1f.4: enabled 1
677 12:44:51.345900 PCI: 00:1f.5: enabled 1
678 12:44:51.348599 PCI: 00:1f.6: enabled 1
679 12:44:51.351176 Root Device scanning...
680 12:44:51.354007 root_dev_scan_bus for Root Device
681 12:44:51.357123 CPU_CLUSTER: 0 enabled
682 12:44:51.358946 DOMAIN: 0000 enabled
683 12:44:51.361063 DOMAIN: 0000 scanning...
684 12:44:51.364763 PCI: pci_scan_bus for bus 00
685 12:44:51.367894 PCI: 00:00.0 [8086/0000] ops
686 12:44:51.371042 PCI: 00:00.0 [8086/3e35] enabled
687 12:44:51.374255 PCI: 00:02.0 [8086/0000] ops
688 12:44:51.376905 PCI: 00:02.0 [8086/3ea1] enabled
689 12:44:51.380438 PCI: 00:04.0 [8086/1903] enabled
690 12:44:51.383866 PCI: 00:08.0 [8086/1911] enabled
691 12:44:51.387516 PCI: 00:12.0 [8086/9df9] enabled
692 12:44:51.390250 PCI: 00:14.0 [8086/0000] bus ops
693 12:44:51.393510 PCI: 00:14.0 [8086/9ded] enabled
694 12:44:51.397571 PCI: 00:14.2 [8086/9def] enabled
695 12:44:51.400663 PCI: 00:14.3 [8086/9df0] enabled
696 12:44:51.403408 PCI: 00:15.0 [8086/0000] bus ops
697 12:44:51.407117 PCI: 00:15.0 [8086/9de8] enabled
698 12:44:51.410485 PCI: 00:15.1 [8086/0000] bus ops
699 12:44:51.413290 PCI: 00:15.1 [8086/9de9] enabled
700 12:44:51.416542 PCI: 00:16.0 [8086/0000] ops
701 12:44:51.419734 PCI: 00:16.0 [8086/9de0] enabled
702 12:44:51.422907 PCI: 00:17.0 [8086/0000] ops
703 12:44:51.425733 PCI: 00:17.0 [8086/9dd3] enabled
704 12:44:51.429482 PCI: 00:19.0 [8086/0000] bus ops
705 12:44:51.432918 PCI: 00:19.0 [8086/9dc5] enabled
706 12:44:51.435764 PCI: 00:19.2 [8086/0000] ops
707 12:44:51.439497 PCI: 00:19.2 [8086/9dc7] enabled
708 12:44:51.442298 PCI: 00:1c.0 [8086/0000] bus ops
709 12:44:51.446090 PCI: 00:1c.0 [8086/9dbf] enabled
710 12:44:51.451442 PCI: Static device PCI: 00:1c.7 not found, disabling it.
711 12:44:51.454409 PCI: 00:1d.0 [8086/0000] bus ops
712 12:44:51.457670 PCI: 00:1d.0 [8086/9db4] enabled
713 12:44:51.463945 PCI: Static device PCI: 00:1d.1 not found, disabling it.
714 12:44:51.469647 PCI: Static device PCI: 00:1d.4 not found, disabling it.
715 12:44:51.472711 PCI: 00:1f.0 [8086/0000] bus ops
716 12:44:51.475995 PCI: 00:1f.0 [8086/9d84] enabled
717 12:44:51.482092 PCI: Static device PCI: 00:1f.1 not found, disabling it.
718 12:44:51.487758 PCI: Static device PCI: 00:1f.2 not found, disabling it.
719 12:44:51.490999 PCI: 00:1f.3 [8086/0000] bus ops
720 12:44:51.494019 PCI: 00:1f.3 [8086/9dc8] enabled
721 12:44:51.496632 PCI: 00:1f.4 [8086/0000] bus ops
722 12:44:51.500545 PCI: 00:1f.4 [8086/9da3] enabled
723 12:44:51.503736 PCI: 00:1f.5 [8086/0000] bus ops
724 12:44:51.507233 PCI: 00:1f.5 [8086/9da4] enabled
725 12:44:51.510456 PCI: 00:1f.6 [8086/15be] enabled
726 12:44:51.513727 PCI: Leftover static devices:
727 12:44:51.514703 PCI: 00:12.5
728 12:44:51.516025 PCI: 00:12.6
729 12:44:51.517891 PCI: 00:13.0
730 12:44:51.519192 PCI: 00:14.1
731 12:44:51.520065 PCI: 00:14.5
732 12:44:51.521787 PCI: 00:15.2
733 12:44:51.522699 PCI: 00:15.3
734 12:44:51.524447 PCI: 00:16.1
735 12:44:51.526248 PCI: 00:16.2
736 12:44:51.527491 PCI: 00:16.3
737 12:44:51.528863 PCI: 00:16.4
738 12:44:51.530226 PCI: 00:16.5
739 12:44:51.531569 PCI: 00:19.1
740 12:44:51.532359 PCI: 00:1a.0
741 12:44:51.534076 PCI: 00:1c.1
742 12:44:51.534943 PCI: 00:1c.2
743 12:44:51.537343 PCI: 00:1c.3
744 12:44:51.538685 PCI: 00:1c.4
745 12:44:51.539922 PCI: 00:1c.5
746 12:44:51.541219 PCI: 00:1c.6
747 12:44:51.542606 PCI: 00:1c.7
748 12:44:51.543407 PCI: 00:1d.1
749 12:44:51.545271 PCI: 00:1d.2
750 12:44:51.546092 PCI: 00:1d.3
751 12:44:51.547765 PCI: 00:1d.4
752 12:44:51.548674 PCI: 00:1e.0
753 12:44:51.550558 PCI: 00:1e.1
754 12:44:51.551857 PCI: 00:1e.2
755 12:44:51.553176 PCI: 00:1e.3
756 12:44:51.554590 PCI: 00:1f.1
757 12:44:51.555797 PCI: 00:1f.2
758 12:44:51.559186 PCI: Check your devicetree.cb.
759 12:44:51.561312 PCI: 00:14.0 scanning...
760 12:44:51.564732 scan_usb_bus for PCI: 00:14.0
761 12:44:51.567189 USB0 port 0 enabled
762 12:44:51.569783 USB0 port 0 scanning...
763 12:44:51.572879 scan_usb_bus for USB0 port 0
764 12:44:51.574402 USB2 port 0 enabled
765 12:44:51.576683 USB2 port 1 enabled
766 12:44:51.578595 USB2 port 2 enabled
767 12:44:51.580719 USB2 port 4 enabled
768 12:44:51.583128 USB2 port 5 enabled
769 12:44:51.584582 USB2 port 6 enabled
770 12:44:51.586997 USB2 port 7 enabled
771 12:44:51.588420 USB2 port 8 enabled
772 12:44:51.590789 USB2 port 9 enabled
773 12:44:51.592641 USB3 port 0 enabled
774 12:44:51.594742 USB3 port 1 enabled
775 12:44:51.597066 USB3 port 2 enabled
776 12:44:51.599538 USB3 port 3 enabled
777 12:44:51.600985 USB3 port 4 enabled
778 12:44:51.603493 USB2 port 0 scanning...
779 12:44:51.607194 scan_usb_bus for USB2 port 0
780 12:44:51.610298 scan_usb_bus for USB2 port 0 done
781 12:44:51.615522 scan_bus: scanning of bus USB2 port 0 took 9063 usecs
782 12:44:51.617939 USB2 port 1 scanning...
783 12:44:51.621472 scan_usb_bus for USB2 port 1
784 12:44:51.624831 scan_usb_bus for USB2 port 1 done
785 12:44:51.629950 scan_bus: scanning of bus USB2 port 1 took 9066 usecs
786 12:44:51.632438 USB2 port 2 scanning...
787 12:44:51.635077 scan_usb_bus for USB2 port 2
788 12:44:51.639151 scan_usb_bus for USB2 port 2 done
789 12:44:51.643970 scan_bus: scanning of bus USB2 port 2 took 9064 usecs
790 12:44:51.647143 USB2 port 4 scanning...
791 12:44:51.650483 scan_usb_bus for USB2 port 4
792 12:44:51.653865 scan_usb_bus for USB2 port 4 done
793 12:44:51.659186 scan_bus: scanning of bus USB2 port 4 took 9064 usecs
794 12:44:51.660611 USB2 port 5 scanning...
795 12:44:51.664101 scan_usb_bus for USB2 port 5
796 12:44:51.667935 scan_usb_bus for USB2 port 5 done
797 12:44:51.673127 scan_bus: scanning of bus USB2 port 5 took 9063 usecs
798 12:44:51.675775 USB2 port 6 scanning...
799 12:44:51.678796 scan_usb_bus for USB2 port 6
800 12:44:51.682486 scan_usb_bus for USB2 port 6 done
801 12:44:51.687519 scan_bus: scanning of bus USB2 port 6 took 9063 usecs
802 12:44:51.689596 USB2 port 7 scanning...
803 12:44:51.693524 scan_usb_bus for USB2 port 7
804 12:44:51.697090 scan_usb_bus for USB2 port 7 done
805 12:44:51.702289 scan_bus: scanning of bus USB2 port 7 took 9065 usecs
806 12:44:51.704785 USB2 port 8 scanning...
807 12:44:51.707047 scan_usb_bus for USB2 port 8
808 12:44:51.711045 scan_usb_bus for USB2 port 8 done
809 12:44:51.716674 scan_bus: scanning of bus USB2 port 8 took 9061 usecs
810 12:44:51.719123 USB2 port 9 scanning...
811 12:44:51.721760 scan_usb_bus for USB2 port 9
812 12:44:51.725604 scan_usb_bus for USB2 port 9 done
813 12:44:51.730956 scan_bus: scanning of bus USB2 port 9 took 9062 usecs
814 12:44:51.733623 USB3 port 0 scanning...
815 12:44:51.736389 scan_usb_bus for USB3 port 0
816 12:44:51.739692 scan_usb_bus for USB3 port 0 done
817 12:44:51.744696 scan_bus: scanning of bus USB3 port 0 took 9064 usecs
818 12:44:51.747752 USB3 port 1 scanning...
819 12:44:51.751154 scan_usb_bus for USB3 port 1
820 12:44:51.754474 scan_usb_bus for USB3 port 1 done
821 12:44:51.759680 scan_bus: scanning of bus USB3 port 1 took 9063 usecs
822 12:44:51.761738 USB3 port 2 scanning...
823 12:44:51.765814 scan_usb_bus for USB3 port 2
824 12:44:51.769095 scan_usb_bus for USB3 port 2 done
825 12:44:51.773959 scan_bus: scanning of bus USB3 port 2 took 9062 usecs
826 12:44:51.776463 USB3 port 3 scanning...
827 12:44:51.779779 scan_usb_bus for USB3 port 3
828 12:44:51.782722 scan_usb_bus for USB3 port 3 done
829 12:44:51.788311 scan_bus: scanning of bus USB3 port 3 took 9063 usecs
830 12:44:51.790793 USB3 port 4 scanning...
831 12:44:51.793676 scan_usb_bus for USB3 port 4
832 12:44:51.797836 scan_usb_bus for USB3 port 4 done
833 12:44:51.802435 scan_bus: scanning of bus USB3 port 4 took 9063 usecs
834 12:44:51.806679 scan_usb_bus for USB0 port 0 done
835 12:44:51.811316 scan_bus: scanning of bus USB0 port 0 took 239374 usecs
836 12:44:51.815568 scan_usb_bus for PCI: 00:14.0 done
837 12:44:51.820767 scan_bus: scanning of bus PCI: 00:14.0 took 256310 usecs
838 12:44:51.823055 PCI: 00:15.0 scanning...
839 12:44:51.827002 scan_generic_bus for PCI: 00:15.0
840 12:44:51.831036 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
841 12:44:51.835512 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
842 12:44:51.838902 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
843 12:44:51.843439 scan_generic_bus for PCI: 00:15.0 done
844 12:44:51.849171 scan_bus: scanning of bus PCI: 00:15.0 took 22386 usecs
845 12:44:51.851660 PCI: 00:15.1 scanning...
846 12:44:51.854999 scan_generic_bus for PCI: 00:15.1
847 12:44:51.859058 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
848 12:44:51.862526 scan_generic_bus for PCI: 00:15.1 done
849 12:44:51.868522 scan_bus: scanning of bus PCI: 00:15.1 took 14216 usecs
850 12:44:51.871135 PCI: 00:19.0 scanning...
851 12:44:51.875058 scan_generic_bus for PCI: 00:19.0
852 12:44:51.878956 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
853 12:44:51.882910 scan_generic_bus for PCI: 00:19.0 done
854 12:44:51.888814 scan_bus: scanning of bus PCI: 00:19.0 took 14218 usecs
855 12:44:51.890365 PCI: 00:1c.0 scanning...
856 12:44:51.894643 do_pci_scan_bridge for PCI: 00:1c.0
857 12:44:51.897426 PCI: pci_scan_bus for bus 01
858 12:44:51.901534 PCI: 01:00.0 [10ec/525a] enabled
859 12:44:51.904165 Capability: type 0x01 @ 0x80
860 12:44:51.907293 Capability: type 0x05 @ 0x90
861 12:44:51.910615 Capability: type 0x10 @ 0xb0
862 12:44:51.913141 Capability: type 0x10 @ 0x40
863 12:44:51.916870 Enabling Common Clock Configuration
864 12:44:51.920757 L1 Sub-State supported from root port 28
865 12:44:51.923512 L1 Sub-State Support = 0xf
866 12:44:51.926496 CommonModeRestoreTime = 0x3c
867 12:44:51.930942 Power On Value = 0x6, Power On Scale = 0x1
868 12:44:51.933506 ASPM: Enabled L0s and L1
869 12:44:51.936057 Capability: type 0x01 @ 0x80
870 12:44:51.938638 Capability: type 0x05 @ 0x90
871 12:44:51.942412 Capability: type 0x10 @ 0xb0
872 12:44:51.947385 scan_bus: scanning of bus PCI: 00:1c.0 took 53665 usecs
873 12:44:51.950535 PCI: 00:1d.0 scanning...
874 12:44:51.953752 do_pci_scan_bridge for PCI: 00:1d.0
875 12:44:51.956933 PCI: pci_scan_bus for bus 02
876 12:44:51.960440 PCI: 02:00.0 [15b7/5004] enabled
877 12:44:51.963523 Capability: type 0x01 @ 0x80
878 12:44:51.966406 Capability: type 0x05 @ 0x90
879 12:44:51.969520 Capability: type 0x11 @ 0xb0
880 12:44:51.972101 Capability: type 0x10 @ 0xc0
881 12:44:51.975382 Capability: type 0x10 @ 0x40
882 12:44:51.978213 Enabling Common Clock Configuration
883 12:44:51.982712 L1 Sub-State supported from root port 29
884 12:44:51.986123 L1 Sub-State Support = 0x5
885 12:44:51.988866 CommonModeRestoreTime = 0xff
886 12:44:51.992888 Power On Value = 0x16, Power On Scale = 0x0
887 12:44:51.994806 ASPM: Enabled L1
888 12:44:51.997960 Capability: type 0x01 @ 0x80
889 12:44:52.000044 Capability: type 0x05 @ 0x90
890 12:44:52.003343 Capability: type 0x11 @ 0xb0
891 12:44:52.006342 Capability: type 0x10 @ 0xc0
892 12:44:52.011703 scan_bus: scanning of bus PCI: 00:1d.0 took 58822 usecs
893 12:44:52.014743 PCI: 00:1f.0 scanning...
894 12:44:52.018029 scan_lpc_bus for PCI: 00:1f.0
895 12:44:52.019900 PNP: 0c09.0 enabled
896 12:44:52.023681 scan_lpc_bus for PCI: 00:1f.0 done
897 12:44:52.028821 scan_bus: scanning of bus PCI: 00:1f.0 took 11398 usecs
898 12:44:52.031347 PCI: 00:1f.3 scanning...
899 12:44:52.036766 scan_bus: scanning of bus PCI: 00:1f.3 took 2841 usecs
900 12:44:52.039187 PCI: 00:1f.4 scanning...
901 12:44:52.042948 scan_generic_bus for PCI: 00:1f.4
902 12:44:52.047342 scan_generic_bus for PCI: 00:1f.4 done
903 12:44:52.053220 scan_bus: scanning of bus PCI: 00:1f.4 took 10131 usecs
904 12:44:52.055816 PCI: 00:1f.5 scanning...
905 12:44:52.059170 scan_generic_bus for PCI: 00:1f.5
906 12:44:52.062566 scan_generic_bus for PCI: 00:1f.5 done
907 12:44:52.068471 scan_bus: scanning of bus PCI: 00:1f.5 took 10131 usecs
908 12:44:52.073675 scan_bus: scanning of bus DOMAIN: 0000 took 709659 usecs
909 12:44:52.078087 root_dev_scan_bus for Root Device done
910 12:44:52.083137 scan_bus: scanning of bus Root Device took 729798 usecs
911 12:44:52.084725 done
912 12:44:52.090867 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
913 12:44:52.096880 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
914 12:44:52.104108 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
915 12:44:52.111023 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
916 12:44:52.114426 SPI flash protection: WPSW=1 SRP0=0
917 12:44:52.119294 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
918 12:44:52.125396 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1125929 exit 34828
919 12:44:52.128861 found VGA at PCI: 00:02.0
920 12:44:52.131531 Setting up VGA for PCI: 00:02.0
921 12:44:52.137115 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
922 12:44:52.141555 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
923 12:44:52.143708 Allocating resources...
924 12:44:52.146792 Reading resources...
925 12:44:52.149880 Root Device read_resources bus 0 link: 0
926 12:44:52.155241 CPU_CLUSTER: 0 read_resources bus 0 link: 0
927 12:44:52.159916 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
928 12:44:52.164109 DOMAIN: 0000 read_resources bus 0 link: 0
929 12:44:52.170879 PCI: 00:14.0 read_resources bus 0 link: 0
930 12:44:52.175496 USB0 port 0 read_resources bus 0 link: 0
931 12:44:52.184410 USB0 port 0 read_resources bus 0 link: 0 done
932 12:44:52.189653 PCI: 00:14.0 read_resources bus 0 link: 0 done
933 12:44:52.194337 PCI: 00:15.0 read_resources bus 1 link: 0
934 12:44:52.200273 PCI: 00:15.0 read_resources bus 1 link: 0 done
935 12:44:52.204993 PCI: 00:15.1 read_resources bus 2 link: 0
936 12:44:52.210732 PCI: 00:15.1 read_resources bus 2 link: 0 done
937 12:44:52.215784 PCI: 00:19.0 read_resources bus 3 link: 0
938 12:44:52.221321 PCI: 00:19.0 read_resources bus 3 link: 0 done
939 12:44:52.226501 PCI: 00:1c.0 read_resources bus 1 link: 0
940 12:44:52.231062 PCI: 00:1c.0 read_resources bus 1 link: 0 done
941 12:44:52.235335 PCI: 00:1d.0 read_resources bus 2 link: 0
942 12:44:52.240801 PCI: 00:1d.0 read_resources bus 2 link: 0 done
943 12:44:52.245858 PCI: 00:1f.0 read_resources bus 0 link: 0
944 12:44:52.250560 PCI: 00:1f.0 read_resources bus 0 link: 0 done
945 12:44:52.257814 DOMAIN: 0000 read_resources bus 0 link: 0 done
946 12:44:52.262719 Root Device read_resources bus 0 link: 0 done
947 12:44:52.264346 Done reading resources.
948 12:44:52.270419 Show resources in subtree (Root Device)...After reading.
949 12:44:52.275273 Root Device child on link 0 CPU_CLUSTER: 0
950 12:44:52.278681 CPU_CLUSTER: 0 child on link 0 APIC: 00
951 12:44:52.280549 APIC: 00
952 12:44:52.281785 APIC: 02
953 12:44:52.285367 DOMAIN: 0000 child on link 0 PCI: 00:00.0
954 12:44:52.295125 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
955 12:44:52.304645 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
956 12:44:52.305968 PCI: 00:00.0
957 12:44:52.316473 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
958 12:44:52.324973 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
959 12:44:52.334304 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
960 12:44:52.344082 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
961 12:44:52.352995 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
962 12:44:52.362811 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
963 12:44:52.372550 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
964 12:44:52.381122 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
965 12:44:52.390464 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
966 12:44:52.399432 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
967 12:44:52.409737 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
968 12:44:52.419291 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
969 12:44:52.428144 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
970 12:44:52.437705 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
971 12:44:52.440038 PCI: 00:02.0
972 12:44:52.449672 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
973 12:44:52.460204 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
974 12:44:52.468589 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
975 12:44:52.470095 PCI: 00:04.0
976 12:44:52.479942 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
977 12:44:52.481870 PCI: 00:08.0
978 12:44:52.491545 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
979 12:44:52.493544 PCI: 00:12.0
980 12:44:52.503408 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
981 12:44:52.507416 PCI: 00:14.0 child on link 0 USB0 port 0
982 12:44:52.517075 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
983 12:44:52.522204 USB0 port 0 child on link 0 USB2 port 0
984 12:44:52.523720 USB2 port 0
985 12:44:52.525479 USB2 port 1
986 12:44:52.527011 USB2 port 2
987 12:44:52.528632 USB2 port 4
988 12:44:52.530640 USB2 port 5
989 12:44:52.532055 USB2 port 6
990 12:44:52.534440 USB2 port 7
991 12:44:52.536415 USB2 port 8
992 12:44:52.537757 USB2 port 9
993 12:44:52.539227 USB3 port 0
994 12:44:52.540602 USB3 port 1
995 12:44:52.542934 USB3 port 2
996 12:44:52.544817 USB3 port 3
997 12:44:52.546867 USB3 port 4
998 12:44:52.548155 PCI: 00:14.2
999 12:44:52.557406 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1000 12:44:52.567845 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1001 12:44:52.569805 PCI: 00:14.3
1002 12:44:52.579631 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1003 12:44:52.583859 PCI: 00:15.0 child on link 0 I2C: 01:10
1004 12:44:52.593275 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1005 12:44:52.595077 I2C: 01:10
1006 12:44:52.597083 I2C: 01:10
1007 12:44:52.598455 I2C: 01:34
1008 12:44:52.602625 PCI: 00:15.1 child on link 0 I2C: 02:2c
1009 12:44:52.612515 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1010 12:44:52.614358 I2C: 02:2c
1011 12:44:52.615681 PCI: 00:16.0
1012 12:44:52.625290 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1013 12:44:52.627109 PCI: 00:17.0
1014 12:44:52.636445 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1015 12:44:52.645719 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1016 12:44:52.653478 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1017 12:44:52.661950 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1018 12:44:52.669700 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1019 12:44:52.678813 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1020 12:44:52.684059 PCI: 00:19.0 child on link 0 I2C: 03:50
1021 12:44:52.693441 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1022 12:44:52.703325 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1023 12:44:52.705421 I2C: 03:50
1024 12:44:52.706315 PCI: 00:19.2
1025 12:44:52.717232 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 12:44:52.727154 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 12:44:52.732369 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1028 12:44:52.740726 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1029 12:44:52.750585 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1030 12:44:52.759664 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1031 12:44:52.760963 PCI: 01:00.0
1032 12:44:52.770398 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1033 12:44:52.774821 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1034 12:44:52.783694 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1035 12:44:52.793257 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1036 12:44:52.801894 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1037 12:44:52.804313 PCI: 02:00.0
1038 12:44:52.814370 PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1039 12:44:52.818520 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1040 12:44:52.826964 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1041 12:44:52.836000 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1042 12:44:52.837551 PNP: 0c09.0
1043 12:44:52.846715 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1044 12:44:52.854550 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1045 12:44:52.863738 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1046 12:44:52.865257 PCI: 00:1f.3
1047 12:44:52.875307 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1048 12:44:52.885286 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1049 12:44:52.887173 PCI: 00:1f.4
1050 12:44:52.895459 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1051 12:44:52.906083 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1052 12:44:52.907478 PCI: 00:1f.5
1053 12:44:52.917177 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1054 12:44:52.918536 PCI: 00:1f.6
1055 12:44:52.927801 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1056 12:44:52.934366 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1057 12:44:52.940429 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1058 12:44:52.946674 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1059 12:44:52.953791 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1060 12:44:52.959721 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1061 12:44:52.963477 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1062 12:44:52.967491 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1063 12:44:52.970799 PCI: 00:17.0 18 * [0x60 - 0x67] io
1064 12:44:52.974211 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1065 12:44:52.981756 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1066 12:44:52.987572 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1067 12:44:52.995666 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1068 12:44:53.004096 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1069 12:44:53.010634 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1070 12:44:53.015104 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1071 12:44:53.022797 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1072 12:44:53.030904 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1073 12:44:53.039066 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1074 12:44:53.046164 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1075 12:44:53.050034 PCI: 02:00.0 10 * [0x0 - 0x3fff] mem
1076 12:44:53.057549 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1077 12:44:53.061992 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1078 12:44:53.067252 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1079 12:44:53.071898 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1080 12:44:53.077152 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1081 12:44:53.082184 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1082 12:44:53.086563 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1083 12:44:53.091671 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1084 12:44:53.096696 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1085 12:44:53.101086 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1086 12:44:53.105993 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1087 12:44:53.110462 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1088 12:44:53.115793 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1089 12:44:53.121136 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1090 12:44:53.125296 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1091 12:44:53.129754 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1092 12:44:53.135593 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1093 12:44:53.140340 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1094 12:44:53.144905 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1095 12:44:53.150335 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1096 12:44:53.154762 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1097 12:44:53.159537 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1098 12:44:53.164285 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1099 12:44:53.169667 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1100 12:44:53.174039 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1101 12:44:53.179248 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1102 12:44:53.187844 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1103 12:44:53.190651 avoid_fixed_resources: DOMAIN: 0000
1104 12:44:53.197421 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1105 12:44:53.203067 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1106 12:44:53.210100 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1107 12:44:53.218424 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1108 12:44:53.226268 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1109 12:44:53.234096 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1110 12:44:53.240947 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1111 12:44:53.248816 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1112 12:44:53.256098 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1113 12:44:53.263556 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1114 12:44:53.270995 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1115 12:44:53.278288 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1116 12:44:53.280295 Setting resources...
1117 12:44:53.287478 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1118 12:44:53.291661 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1119 12:44:53.294509 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1120 12:44:53.299555 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1121 12:44:53.303049 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1122 12:44:53.309622 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1123 12:44:53.315436 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1124 12:44:53.322206 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1125 12:44:53.328489 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1126 12:44:53.334441 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1127 12:44:53.342293 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1128 12:44:53.347179 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1129 12:44:53.352405 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1130 12:44:53.357116 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1131 12:44:53.361345 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1132 12:44:53.367169 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1133 12:44:53.371762 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1134 12:44:53.376440 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1135 12:44:53.381526 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1136 12:44:53.386179 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1137 12:44:53.390904 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1138 12:44:53.396141 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1139 12:44:53.400309 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1140 12:44:53.405568 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1141 12:44:53.410503 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1142 12:44:53.415490 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1143 12:44:53.420158 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1144 12:44:53.424807 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1145 12:44:53.430005 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1146 12:44:53.434877 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1147 12:44:53.440135 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1148 12:44:53.444147 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1149 12:44:53.448868 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1150 12:44:53.454192 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1151 12:44:53.458935 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1152 12:44:53.463558 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1153 12:44:53.471531 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1154 12:44:53.478283 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1155 12:44:53.486523 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1156 12:44:53.494035 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1157 12:44:53.498276 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1158 12:44:53.505430 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1159 12:44:53.513160 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1160 12:44:53.520826 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1161 12:44:53.527831 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1162 12:44:53.532801 PCI: 02:00.0 10 * [0xd1100000 - 0xd1103fff] mem
1163 12:44:53.540458 PCI: 00:1d.0 mem: next_base: d1104000 size: 100000 align: 20 gran: 20 done
1164 12:44:53.544536 Root Device assign_resources, bus 0 link: 0
1165 12:44:53.549671 DOMAIN: 0000 assign_resources, bus 0 link: 0
1166 12:44:53.557791 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1167 12:44:53.565717 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1168 12:44:53.574285 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1169 12:44:53.582359 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1170 12:44:53.590045 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1171 12:44:53.598792 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1172 12:44:53.607209 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1173 12:44:53.611296 PCI: 00:14.0 assign_resources, bus 0 link: 0
1174 12:44:53.615882 PCI: 00:14.0 assign_resources, bus 0 link: 0
1175 12:44:53.624159 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1176 12:44:53.632288 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1177 12:44:53.641169 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1178 12:44:53.648681 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1179 12:44:53.653484 PCI: 00:15.0 assign_resources, bus 1 link: 0
1180 12:44:53.658359 PCI: 00:15.0 assign_resources, bus 1 link: 0
1181 12:44:53.667105 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1182 12:44:53.670671 PCI: 00:15.1 assign_resources, bus 2 link: 0
1183 12:44:53.676471 PCI: 00:15.1 assign_resources, bus 2 link: 0
1184 12:44:53.683957 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1185 12:44:53.692430 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1186 12:44:53.699513 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1187 12:44:53.707318 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1188 12:44:53.715453 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1189 12:44:53.723266 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1190 12:44:53.730338 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1191 12:44:53.738695 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1192 12:44:53.746988 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1193 12:44:53.751880 PCI: 00:19.0 assign_resources, bus 3 link: 0
1194 12:44:53.756298 PCI: 00:19.0 assign_resources, bus 3 link: 0
1195 12:44:53.764262 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1196 12:44:53.773433 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1197 12:44:53.782542 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1198 12:44:53.790740 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1199 12:44:53.795063 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1200 12:44:53.803527 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1201 12:44:53.808086 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1202 12:44:53.816798 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1203 12:44:53.825505 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1204 12:44:53.834282 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1205 12:44:53.838782 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1206 12:44:53.846462 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1103fff] size 0x00004000 gran 0x0e mem64
1207 12:44:53.850940 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1208 12:44:53.856034 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1209 12:44:53.861612 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1210 12:44:53.866094 LPC: Trying to open IO window from 930 size 8
1211 12:44:53.870168 LPC: Trying to open IO window from 940 size 8
1212 12:44:53.875611 LPC: Trying to open IO window from 950 size 10
1213 12:44:53.883448 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1214 12:44:53.890958 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1215 12:44:53.899505 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1216 12:44:53.907758 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1217 12:44:53.915725 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1218 12:44:53.920771 DOMAIN: 0000 assign_resources, bus 0 link: 0
1219 12:44:53.925467 Root Device assign_resources, bus 0 link: 0
1220 12:44:53.928212 Done setting resources.
1221 12:44:53.934715 Show resources in subtree (Root Device)...After assigning values.
1222 12:44:53.938487 Root Device child on link 0 CPU_CLUSTER: 0
1223 12:44:53.942932 CPU_CLUSTER: 0 child on link 0 APIC: 00
1224 12:44:53.943782 APIC: 00
1225 12:44:53.945067 APIC: 02
1226 12:44:53.949604 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1227 12:44:53.959483 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1228 12:44:53.970939 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1229 12:44:53.972214 PCI: 00:00.0
1230 12:44:53.982457 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1231 12:44:53.991827 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1232 12:44:54.000201 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1233 12:44:54.010442 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1234 12:44:54.019166 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1235 12:44:54.028488 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1236 12:44:54.038468 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1237 12:44:54.046720 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1238 12:44:54.055743 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1239 12:44:54.066125 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1240 12:44:54.075753 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1241 12:44:54.085409 PCI: 00:00.0 resource base 100000000 size 6e800000 align 0 gran 0 limit 0 flags e0004200 index c
1242 12:44:54.094354 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1243 12:44:54.103652 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1244 12:44:54.104996 PCI: 00:02.0
1245 12:44:54.115543 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1246 12:44:54.125892 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1247 12:44:54.136101 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1248 12:44:54.136809 PCI: 00:04.0
1249 12:44:54.147495 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1250 12:44:54.149329 PCI: 00:08.0
1251 12:44:54.159678 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1252 12:44:54.160506 PCI: 00:12.0
1253 12:44:54.170741 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1254 12:44:54.176126 PCI: 00:14.0 child on link 0 USB0 port 0
1255 12:44:54.186207 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1256 12:44:54.190232 USB0 port 0 child on link 0 USB2 port 0
1257 12:44:54.192216 USB2 port 0
1258 12:44:54.194664 USB2 port 1
1259 12:44:54.195478 USB2 port 2
1260 12:44:54.197785 USB2 port 4
1261 12:44:54.199253 USB2 port 5
1262 12:44:54.200655 USB2 port 6
1263 12:44:54.202626 USB2 port 7
1264 12:44:54.204503 USB2 port 8
1265 12:44:54.206398 USB2 port 9
1266 12:44:54.208270 USB3 port 0
1267 12:44:54.210196 USB3 port 1
1268 12:44:54.211117 USB3 port 2
1269 12:44:54.213621 USB3 port 3
1270 12:44:54.215134 USB3 port 4
1271 12:44:54.216476 PCI: 00:14.2
1272 12:44:54.226477 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1273 12:44:54.236774 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1274 12:44:54.239520 PCI: 00:14.3
1275 12:44:54.249429 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1276 12:44:54.253428 PCI: 00:15.0 child on link 0 I2C: 01:10
1277 12:44:54.264263 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1278 12:44:54.265050 I2C: 01:10
1279 12:44:54.266463 I2C: 01:10
1280 12:44:54.268661 I2C: 01:34
1281 12:44:54.272653 PCI: 00:15.1 child on link 0 I2C: 02:2c
1282 12:44:54.283156 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1283 12:44:54.285003 I2C: 02:2c
1284 12:44:54.285833 PCI: 00:16.0
1285 12:44:54.296947 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1286 12:44:54.297848 PCI: 00:17.0
1287 12:44:54.308273 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1288 12:44:54.318730 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1289 12:44:54.327745 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1290 12:44:54.337122 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1291 12:44:54.345842 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1292 12:44:54.355937 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1293 12:44:54.360968 PCI: 00:19.0 child on link 0 I2C: 03:50
1294 12:44:54.370685 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1295 12:44:54.381445 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1296 12:44:54.382588 I2C: 03:50
1297 12:44:54.384478 PCI: 00:19.2
1298 12:44:54.395156 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1299 12:44:54.405170 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1300 12:44:54.410190 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1301 12:44:54.419743 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1302 12:44:54.429757 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1303 12:44:54.439763 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1304 12:44:54.441785 PCI: 01:00.0
1305 12:44:54.452363 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1306 12:44:54.455933 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1307 12:44:54.465578 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1308 12:44:54.476010 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1309 12:44:54.485761 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1310 12:44:54.488277 PCI: 02:00.0
1311 12:44:54.498092 PCI: 02:00.0 resource base d1100000 size 4000 align 14 gran 14 limit d1103fff flags 60000201 index 10
1312 12:44:54.502379 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1313 12:44:54.511091 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1314 12:44:54.520732 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1315 12:44:54.521516 PNP: 0c09.0
1316 12:44:54.530190 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1317 12:44:54.539171 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1318 12:44:54.547655 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1319 12:44:54.549696 PCI: 00:1f.3
1320 12:44:54.560164 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1321 12:44:54.570681 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1322 12:44:54.571484 PCI: 00:1f.4
1323 12:44:54.581446 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1324 12:44:54.590994 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1325 12:44:54.592110 PCI: 00:1f.5
1326 12:44:54.603496 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1327 12:44:54.604200 PCI: 00:1f.6
1328 12:44:54.615017 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1329 12:44:54.617602 Done allocating resources.
1330 12:44:54.624302 BS: BS_DEV_RESOURCES times (us): entry 0 run 2492053 exit 36
1331 12:44:54.626360 Enabling resources...
1332 12:44:54.631197 PCI: 00:00.0 subsystem <- 1028/3e35
1333 12:44:54.632952 PCI: 00:00.0 cmd <- 06
1334 12:44:54.637084 PCI: 00:02.0 subsystem <- 1028/3ea1
1335 12:44:54.639702 PCI: 00:02.0 cmd <- 03
1336 12:44:54.643064 PCI: 00:04.0 subsystem <- 1028/1903
1337 12:44:54.645574 PCI: 00:04.0 cmd <- 02
1338 12:44:54.648753 PCI: 00:08.0 cmd <- 06
1339 12:44:54.652671 PCI: 00:12.0 subsystem <- 1028/9df9
1340 12:44:54.654887 PCI: 00:12.0 cmd <- 02
1341 12:44:54.658803 PCI: 00:14.0 subsystem <- 1028/9ded
1342 12:44:54.661477 PCI: 00:14.0 cmd <- 02
1343 12:44:54.664165 PCI: 00:14.2 cmd <- 02
1344 12:44:54.668137 PCI: 00:14.3 subsystem <- 1028/9df0
1345 12:44:54.669457 PCI: 00:14.3 cmd <- 02
1346 12:44:54.673490 PCI: 00:15.0 subsystem <- 1028/9de8
1347 12:44:54.676681 PCI: 00:15.0 cmd <- 02
1348 12:44:54.680095 PCI: 00:15.1 subsystem <- 1028/9de9
1349 12:44:54.682882 PCI: 00:15.1 cmd <- 02
1350 12:44:54.686817 PCI: 00:16.0 subsystem <- 1028/9de0
1351 12:44:54.688791 PCI: 00:16.0 cmd <- 02
1352 12:44:54.692115 PCI: 00:17.0 subsystem <- 1028/9dd3
1353 12:44:54.694829 PCI: 00:17.0 cmd <- 03
1354 12:44:54.698607 PCI: 00:19.0 subsystem <- 1028/9dc5
1355 12:44:54.700558 PCI: 00:19.0 cmd <- 06
1356 12:44:54.705105 PCI: 00:19.2 subsystem <- 1028/9dc7
1357 12:44:54.707103 PCI: 00:19.2 cmd <- 06
1358 12:44:54.711086 PCI: 00:1c.0 bridge ctrl <- 0003
1359 12:44:54.714701 PCI: 00:1c.0 subsystem <- 1028/9dbf
1360 12:44:54.717756 Capability: type 0x10 @ 0x40
1361 12:44:54.720560 Capability: type 0x05 @ 0x80
1362 12:44:54.722945 Capability: type 0x0d @ 0x90
1363 12:44:54.725927 PCI: 00:1c.0 cmd <- 06
1364 12:44:54.729419 PCI: 00:1d.0 bridge ctrl <- 0003
1365 12:44:54.732952 PCI: 00:1d.0 subsystem <- 1028/9db4
1366 12:44:54.735484 Capability: type 0x10 @ 0x40
1367 12:44:54.738846 Capability: type 0x05 @ 0x80
1368 12:44:54.741792 Capability: type 0x0d @ 0x90
1369 12:44:54.744202 PCI: 00:1d.0 cmd <- 06
1370 12:44:54.747533 PCI: 00:1f.0 subsystem <- 1028/9d84
1371 12:44:54.749893 PCI: 00:1f.0 cmd <- 407
1372 12:44:54.753921 PCI: 00:1f.3 subsystem <- 1028/9dc8
1373 12:44:54.756657 PCI: 00:1f.3 cmd <- 02
1374 12:44:54.761103 PCI: 00:1f.4 subsystem <- 1028/9da3
1375 12:44:54.763141 PCI: 00:1f.4 cmd <- 03
1376 12:44:54.767321 PCI: 00:1f.5 subsystem <- 1028/9da4
1377 12:44:54.768763 PCI: 00:1f.5 cmd <- 406
1378 12:44:54.772723 PCI: 00:1f.6 subsystem <- 1028/15be
1379 12:44:54.775683 PCI: 00:1f.6 cmd <- 02
1380 12:44:54.786031 PCI: 01:00.0 cmd <- 02
1381 12:44:54.788885 PCI: 02:00.0 cmd <- 02
1382 12:44:54.790821 done.
1383 12:44:54.796566 BS: BS_DEV_ENABLE times (us): entry 391 run 167129 exit 0
1384 12:44:54.800062 Initializing devices...
1385 12:44:54.802244 Root Device init ...
1386 12:44:54.805540 Root Device init finished in 2138 usecs
1387 12:44:54.808055 CPU_CLUSTER: 0 init ...
1388 12:44:54.813247 CPU_CLUSTER: 0 init finished in 2430 usecs
1389 12:44:54.817037 PCI: 00:00.0 init ...
1390 12:44:54.819452 CPU TDP: 15 Watts
1391 12:44:54.821516 CPU PL2 = 51 Watts
1392 12:44:54.825682 PCI: 00:00.0 init finished in 7045 usecs
1393 12:44:54.827715 PCI: 00:02.0 init ...
1394 12:44:54.832160 PCI: 00:02.0 init finished in 2237 usecs
1395 12:44:54.834563 PCI: 00:04.0 init ...
1396 12:44:54.838982 PCI: 00:04.0 init finished in 2235 usecs
1397 12:44:54.841573 PCI: 00:08.0 init ...
1398 12:44:54.846230 PCI: 00:08.0 init finished in 2237 usecs
1399 12:44:54.848733 PCI: 00:12.0 init ...
1400 12:44:54.852533 PCI: 00:12.0 init finished in 2235 usecs
1401 12:44:54.854934 PCI: 00:14.0 init ...
1402 12:44:54.859216 PCI: 00:14.0 init finished in 2236 usecs
1403 12:44:54.862319 PCI: 00:14.2 init ...
1404 12:44:54.866396 PCI: 00:14.2 init finished in 2235 usecs
1405 12:44:54.869047 PCI: 00:14.3 init ...
1406 12:44:54.872312 PCI: 00:14.3 init finished in 2241 usecs
1407 12:44:54.875124 PCI: 00:15.0 init ...
1408 12:44:54.878516 DW I2C bus 0 at 0xd1347000 (400 KHz)
1409 12:44:54.883329 PCI: 00:15.0 init finished in 5934 usecs
1410 12:44:54.885152 PCI: 00:15.1 init ...
1411 12:44:54.888921 DW I2C bus 1 at 0xd1348000 (400 KHz)
1412 12:44:54.893491 PCI: 00:15.1 init finished in 5935 usecs
1413 12:44:54.896167 PCI: 00:16.0 init ...
1414 12:44:54.900249 PCI: 00:16.0 init finished in 2237 usecs
1415 12:44:54.902949 PCI: 00:19.0 init ...
1416 12:44:54.906506 DW I2C bus 4 at 0xd134a000 (400 KHz)
1417 12:44:54.910668 PCI: 00:19.0 init finished in 5923 usecs
1418 12:44:54.914193 PCI: 00:1c.0 init ...
1419 12:44:54.917303 Initializing PCH PCIe bridge.
1420 12:44:54.921177 PCI: 00:1c.0 init finished in 5240 usecs
1421 12:44:54.924016 PCI: 00:1d.0 init ...
1422 12:44:54.926743 Initializing PCH PCIe bridge.
1423 12:44:54.930858 PCI: 00:1d.0 init finished in 5250 usecs
1424 12:44:54.933962 PCI: 00:1f.0 init ...
1425 12:44:54.937971 IOAPIC: Initializing IOAPIC at 0xfec00000
1426 12:44:54.941993 IOAPIC: Bootstrap Processor Local APIC = 0x00
1427 12:44:54.944142 IOAPIC: ID = 0x02
1428 12:44:54.946655 IOAPIC: Dumping registers
1429 12:44:54.949541 reg 0x0000: 0x02000000
1430 12:44:54.951598 reg 0x0001: 0x00770020
1431 12:44:54.954467 reg 0x0002: 0x00000000
1432 12:44:54.958405 PCI: 00:1f.0 init finished in 23303 usecs
1433 12:44:54.961488 PCI: 00:1f.3 init ...
1434 12:44:54.966918 HDA: codec_mask = 05
1435 12:44:54.969549 HDA: Initializing codec #2
1436 12:44:54.972164 HDA: codec viddid: 8086280b
1437 12:44:54.975009 HDA: No verb table entry found
1438 12:44:54.978191 HDA: Initializing codec #0
1439 12:44:54.981014 HDA: codec viddid: 10ec0236
1440 12:44:54.987939 HDA: verb loaded.
1441 12:44:54.992701 PCI: 00:1f.3 init finished in 28836 usecs
1442 12:44:54.995385 PCI: 00:1f.4 init ...
1443 12:44:54.999503 PCI: 00:1f.4 init finished in 2245 usecs
1444 12:44:55.001716 PCI: 00:1f.6 init ...
1445 12:44:55.006001 PCI: 00:1f.6 init finished in 2227 usecs
1446 12:44:55.016979 PCI: 01:00.0 init ...
1447 12:44:55.021447 PCI: 01:00.0 init finished in 2235 usecs
1448 12:44:55.023645 PCI: 02:00.0 init ...
1449 12:44:55.028027 PCI: 02:00.0 init finished in 2236 usecs
1450 12:44:55.030046 PNP: 0c09.0 init ...
1451 12:44:55.034786 EC Label : 00.00.20
1452 12:44:55.038936 EC Revision : 9ca674bba
1453 12:44:55.041686 EC Model Num : 08B9
1454 12:44:55.045080 EC Build Date : 05/10/19
1455 12:44:55.056849 PNP: 0c09.0 init finished in 24879 usecs
1456 12:44:55.059726 Devices initialized
1457 12:44:55.062629 Show all devs... After init.
1458 12:44:55.065145 Root Device: enabled 1
1459 12:44:55.067246 CPU_CLUSTER: 0: enabled 1
1460 12:44:55.070201 DOMAIN: 0000: enabled 1
1461 12:44:55.072069 APIC: 00: enabled 1
1462 12:44:55.074572 PCI: 00:00.0: enabled 1
1463 12:44:55.076714 PCI: 00:02.0: enabled 1
1464 12:44:55.079391 PCI: 00:04.0: enabled 1
1465 12:44:55.081831 PCI: 00:12.0: enabled 1
1466 12:44:55.084018 PCI: 00:12.5: enabled 0
1467 12:44:55.086523 PCI: 00:12.6: enabled 0
1468 12:44:55.088716 PCI: 00:13.0: enabled 0
1469 12:44:55.091683 PCI: 00:14.0: enabled 1
1470 12:44:55.093886 PCI: 00:14.1: enabled 0
1471 12:44:55.096492 PCI: 00:14.3: enabled 1
1472 12:44:55.099102 PCI: 00:14.5: enabled 0
1473 12:44:55.101170 PCI: 00:15.0: enabled 1
1474 12:44:55.103851 PCI: 00:15.1: enabled 1
1475 12:44:55.106479 PCI: 00:15.2: enabled 0
1476 12:44:55.107974 PCI: 00:15.3: enabled 0
1477 12:44:55.111005 PCI: 00:16.0: enabled 1
1478 12:44:55.113280 PCI: 00:16.1: enabled 0
1479 12:44:55.115597 PCI: 00:16.2: enabled 0
1480 12:44:55.117839 PCI: 00:16.3: enabled 0
1481 12:44:55.121136 PCI: 00:16.4: enabled 0
1482 12:44:55.123049 PCI: 00:16.5: enabled 0
1483 12:44:55.125686 PCI: 00:17.0: enabled 1
1484 12:44:55.127468 PCI: 00:19.0: enabled 1
1485 12:44:55.130476 PCI: 00:19.1: enabled 0
1486 12:44:55.133125 PCI: 00:19.2: enabled 1
1487 12:44:55.135043 PCI: 00:1a.0: enabled 0
1488 12:44:55.137499 PCI: 00:1c.0: enabled 1
1489 12:44:55.139492 PCI: 00:1c.1: enabled 0
1490 12:44:55.142586 PCI: 00:1c.2: enabled 0
1491 12:44:55.145178 PCI: 00:1c.3: enabled 0
1492 12:44:55.147284 PCI: 00:1c.4: enabled 0
1493 12:44:55.149371 PCI: 00:1c.5: enabled 0
1494 12:44:55.152141 PCI: 00:1c.6: enabled 0
1495 12:44:55.154723 PCI: 00:1c.7: enabled 0
1496 12:44:55.157196 PCI: 00:1d.0: enabled 1
1497 12:44:55.159408 PCI: 00:1d.1: enabled 0
1498 12:44:55.161813 PCI: 00:1d.2: enabled 0
1499 12:44:55.164666 PCI: 00:1d.3: enabled 0
1500 12:44:55.167097 PCI: 00:1d.4: enabled 0
1501 12:44:55.169533 PCI: 00:1e.0: enabled 0
1502 12:44:55.171479 PCI: 00:1e.1: enabled 0
1503 12:44:55.173827 PCI: 00:1e.2: enabled 0
1504 12:44:55.176919 PCI: 00:1e.3: enabled 0
1505 12:44:55.178388 PCI: 00:1f.0: enabled 1
1506 12:44:55.181267 PCI: 00:1f.1: enabled 0
1507 12:44:55.183739 PCI: 00:1f.2: enabled 0
1508 12:44:55.186441 PCI: 00:1f.3: enabled 1
1509 12:44:55.189126 PCI: 00:1f.4: enabled 1
1510 12:44:55.191217 PCI: 00:1f.5: enabled 1
1511 12:44:55.193781 PCI: 00:1f.6: enabled 1
1512 12:44:55.195961 USB0 port 0: enabled 1
1513 12:44:55.198390 I2C: 01:10: enabled 1
1514 12:44:55.200439 I2C: 01:10: enabled 1
1515 12:44:55.202085 I2C: 01:34: enabled 1
1516 12:44:55.204175 I2C: 02:2c: enabled 1
1517 12:44:55.207172 I2C: 03:50: enabled 1
1518 12:44:55.209799 PNP: 0c09.0: enabled 1
1519 12:44:55.211702 USB2 port 0: enabled 1
1520 12:44:55.214411 USB2 port 1: enabled 1
1521 12:44:55.216396 USB2 port 2: enabled 1
1522 12:44:55.219100 USB2 port 4: enabled 1
1523 12:44:55.220538 USB2 port 5: enabled 1
1524 12:44:55.223807 USB2 port 6: enabled 1
1525 12:44:55.225142 USB2 port 7: enabled 1
1526 12:44:55.227956 USB2 port 8: enabled 1
1527 12:44:55.230496 USB2 port 9: enabled 1
1528 12:44:55.233204 USB3 port 0: enabled 1
1529 12:44:55.235201 USB3 port 1: enabled 1
1530 12:44:55.237874 USB3 port 2: enabled 1
1531 12:44:55.239805 USB3 port 3: enabled 1
1532 12:44:55.242418 USB3 port 4: enabled 1
1533 12:44:55.244357 APIC: 02: enabled 1
1534 12:44:55.246506 PCI: 00:08.0: enabled 1
1535 12:44:55.248571 PCI: 00:14.2: enabled 1
1536 12:44:55.251729 PCI: 01:00.0: enabled 1
1537 12:44:55.253710 PCI: 02:00.0: enabled 1
1538 12:44:55.259323 Disabling ACPI via APMC:
1539 12:44:55.260800 done.
1540 12:44:55.265472 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1541 12:44:55.269723 ELOG: NV offset 0x1bf0000 size 0x4000
1542 12:44:55.277441 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1543 12:44:55.283445 ELOG: Event(17) added with size 13 at 2023-03-22 12:44:55 UTC
1544 12:44:55.289052 POST: Unexpected post code in previous boot: 0x73
1545 12:44:55.295572 ELOG: Event(A3) added with size 11 at 2023-03-22 12:44:55 UTC
1546 12:44:55.302057 ELOG: Event(92) added with size 9 at 2023-03-22 12:44:55 UTC
1547 12:44:55.307882 ELOG: Event(93) added with size 9 at 2023-03-22 12:44:55 UTC
1548 12:44:55.313514 ELOG: Event(9A) added with size 9 at 2023-03-22 12:44:55 UTC
1549 12:44:55.320618 ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:55 UTC
1550 12:44:55.326089 ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:55 UTC
1551 12:44:55.331858 BS: BS_DEV_INIT times (us): entry 0 run 456677 exit 72560
1552 12:44:55.338703 ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:55 UTC
1553 12:44:55.346573 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1554 12:44:55.352505 ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:55 UTC
1555 12:44:55.357026 elog_add_boot_reason: Logged dev mode boot
1556 12:44:55.359057 Finalize devices...
1557 12:44:55.361209 PCI: 00:17.0 final
1558 12:44:55.362530 Devices finalized
1559 12:44:55.368273 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1560 12:44:55.374795 BS: BS_POST_DEVICE times (us): entry 24767 run 5925 exit 5371
1561 12:44:55.379957 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 97 exit 0
1562 12:44:55.389134 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1563 12:44:55.393534 disable_unused_touchscreen: Disable ACPI0C50
1564 12:44:55.397370 disable_unused_touchscreen: Enable ELAN900C
1565 12:44:55.400625 CBFS @ 1d00000 size 300000
1566 12:44:55.406601 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1567 12:44:55.410372 CBFS: Locating 'fallback/dsdt.aml'
1568 12:44:55.413938 CBFS: Found @ offset 10b200 size 4448
1569 12:44:55.416582 CBFS @ 1d00000 size 300000
1570 12:44:55.423376 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1571 12:44:55.426459 CBFS: Locating 'fallback/slic'
1572 12:44:55.431832 CBFS: 'fallback/slic' not found.
1573 12:44:55.435826 ACPI: Writing ACPI tables at 89c0f000.
1574 12:44:55.437130 ACPI: * FACS
1575 12:44:55.439084 ACPI: * DSDT
1576 12:44:55.442604 Ramoops buffer: 0x100000@0x89b0e000.
1577 12:44:55.447856 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1578 12:44:55.452400 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1579 12:44:55.455551 ACPI: * FADT
1580 12:44:55.456847 SCI is IRQ9
1581 12:44:55.460854 ACPI: added table 1/32, length now 40
1582 12:44:55.462875 ACPI: * SSDT
1583 12:44:55.466125 Found 1 CPU(s) with 2 core(s) each.
1584 12:44:55.470255 Error: Could not locate 'wifi_sar' in VPD.
1585 12:44:55.474433 Error: failed from getting SAR limits!
1586 12:44:55.478578 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1587 12:44:55.482398 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1588 12:44:55.486914 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1589 12:44:55.490644 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1590 12:44:55.496299 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1591 12:44:55.500742 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1592 12:44:55.506232 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1593 12:44:55.510198 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1594 12:44:55.516639 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1595 12:44:55.522643 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1596 12:44:55.527940 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1597 12:44:55.533343 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1598 12:44:55.539128 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1599 12:44:55.543145 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1600 12:44:55.547807 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1601 12:44:55.552602 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1602 12:44:55.557830 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1603 12:44:55.563557 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1604 12:44:55.569086 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1605 12:44:55.575606 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1606 12:44:55.580868 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1607 12:44:55.586130 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1608 12:44:55.589846 ACPI: added table 2/32, length now 44
1609 12:44:55.591184 ACPI: * MCFG
1610 12:44:55.595473 ACPI: added table 3/32, length now 48
1611 12:44:55.597014 ACPI: * TPM2
1612 12:44:55.599943 TPM2 log created at 89afe000
1613 12:44:55.603720 ACPI: added table 4/32, length now 52
1614 12:44:55.604613 ACPI: * MADT
1615 12:44:55.606947 SCI is IRQ9
1616 12:44:55.609812 ACPI: added table 5/32, length now 56
1617 12:44:55.612325 current = 89c14720
1618 12:44:55.614673 ACPI: * IGD OpRegion
1619 12:44:55.617305 GMA: Found VBT in CBFS
1620 12:44:55.620009 GMA: Found valid VBT in CBFS
1621 12:44:55.623586 ACPI: added table 6/32, length now 60
1622 12:44:55.625395 ACPI: * HPET
1623 12:44:55.628602 ACPI: added table 7/32, length now 64
1624 12:44:55.629991 ACPI: done.
1625 12:44:55.633180 ACPI tables: 30672 bytes.
1626 12:44:55.636374 smbios_write_tables: 89afd000
1627 12:44:55.638359 recv_ec_data: 0x01
1628 12:44:55.641000 Create SMBIOS type 17
1629 12:44:55.642697 PCI: 00:14.3 (Intel WiFi)
1630 12:44:55.645820 SMBIOS tables: 708 bytes.
1631 12:44:55.650396 Writing table forward entry at 0x00000500
1632 12:44:55.656319 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1633 12:44:55.659703 Writing coreboot table at 0x89c33000
1634 12:44:55.665699 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1635 12:44:55.670172 1. 0000000000001000-000000000009ffff: RAM
1636 12:44:55.674399 2. 00000000000a0000-00000000000fffff: RESERVED
1637 12:44:55.678610 3. 0000000000100000-0000000089afcfff: RAM
1638 12:44:55.684529 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1639 12:44:55.690113 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1640 12:44:55.695320 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1641 12:44:55.699953 7. 000000008a000000-000000008f7fffff: RESERVED
1642 12:44:55.705043 8. 00000000e0000000-00000000efffffff: RESERVED
1643 12:44:55.710117 9. 00000000fc000000-00000000fc000fff: RESERVED
1644 12:44:55.715111 10. 00000000fe000000-00000000fe00ffff: RESERVED
1645 12:44:55.718887 11. 00000000fed10000-00000000fed17fff: RESERVED
1646 12:44:55.724067 12. 00000000fed80000-00000000fed83fff: RESERVED
1647 12:44:55.728986 13. 00000000feda0000-00000000feda1fff: RESERVED
1648 12:44:55.733554 14. 0000000100000000-000000016e7fffff: RAM
1649 12:44:55.737524 Graphics framebuffer located at 0xc0000000
1650 12:44:55.739844 Passing 6 GPIOs to payload:
1651 12:44:55.746167 NAME | PORT | POLARITY | VALUE
1652 12:44:55.750785 write protect | 0x000000dc | high | high
1653 12:44:55.756172 recovery | 0x000000d5 | low | high
1654 12:44:55.760968 lid | undefined | high | high
1655 12:44:55.766780 power | undefined | high | low
1656 12:44:55.771917 oprom | undefined | high | low
1657 12:44:55.777115 EC in RW | undefined | high | low
1658 12:44:55.778876 recv_ec_data: 0x01
1659 12:44:55.780493 SKU ID: 3
1660 12:44:55.782754 CBFS @ 1d00000 size 300000
1661 12:44:55.789806 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1662 12:44:55.795245 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum 2f4f
1663 12:44:55.798323 coreboot table: 1484 bytes.
1664 12:44:55.802073 IMD ROOT 0. 89fff000 00001000
1665 12:44:55.805270 IMD SMALL 1. 89ffe000 00001000
1666 12:44:55.808877 FSP MEMORY 2. 89d0e000 002f0000
1667 12:44:55.811489 CONSOLE 3. 89cee000 00020000
1668 12:44:55.814663 TIME STAMP 4. 89ced000 00000910
1669 12:44:55.818653 VBOOT WORK 5. 89cea000 00003000
1670 12:44:55.822180 VBOOT 6. 89ce9000 00000c0c
1671 12:44:55.825451 MRC DATA 7. 89ce7000 000018f0
1672 12:44:55.828587 ROMSTG STCK 8. 89ce6000 00000400
1673 12:44:55.831439 AFTER CAR 9. 89cdc000 0000a000
1674 12:44:55.835148 RAMSTAGE 10. 89c80000 0005c000
1675 12:44:55.838661 REFCODE 11. 89c4b000 00035000
1676 12:44:55.841263 SMM BACKUP 12. 89c3b000 00010000
1677 12:44:55.844452 COREBOOT 13. 89c33000 00008000
1678 12:44:55.848094 ACPI 14. 89c0f000 00024000
1679 12:44:55.852070 ACPI GNVS 15. 89c0e000 00001000
1680 12:44:55.855366 RAMOOPS 16. 89b0e000 00100000
1681 12:44:55.858038 TPM2 TCGLOG17. 89afe000 00010000
1682 12:44:55.861352 SMBIOS 18. 89afd000 00000800
1683 12:44:55.862678 IMD small region:
1684 12:44:55.867262 IMD ROOT 0. 89ffec00 00000400
1685 12:44:55.870727 FSP RUNTIME 1. 89ffebe0 00000004
1686 12:44:55.873956 POWER STATE 2. 89ffeba0 00000040
1687 12:44:55.877086 ROMSTAGE 3. 89ffeb80 00000004
1688 12:44:55.880186 MEM INFO 4. 89ffe9c0 000001a9
1689 12:44:55.884377 VPD 5. 89ffe980 00000031
1690 12:44:55.888420 COREBOOTFWD 6. 89ffe940 00000028
1691 12:44:55.890526 MTRR: Physical address space:
1692 12:44:55.897220 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1693 12:44:55.903319 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1694 12:44:55.909607 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1695 12:44:55.915562 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1696 12:44:55.922081 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1697 12:44:55.928042 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1698 12:44:55.934687 0x0000000100000000 - 0x000000016e800000 size 0x6e800000 type 6
1699 12:44:55.938693 MTRR: Fixed MSR 0x250 0x0606060606060606
1700 12:44:55.942099 MTRR: Fixed MSR 0x258 0x0606060606060606
1701 12:44:55.947703 MTRR: Fixed MSR 0x259 0x0000000000000000
1702 12:44:55.950346 MTRR: Fixed MSR 0x268 0x0606060606060606
1703 12:44:55.954769 MTRR: Fixed MSR 0x269 0x0606060606060606
1704 12:44:55.959270 MTRR: Fixed MSR 0x26a 0x0606060606060606
1705 12:44:55.963097 MTRR: Fixed MSR 0x26b 0x0606060606060606
1706 12:44:55.967085 MTRR: Fixed MSR 0x26c 0x0606060606060606
1707 12:44:55.971127 MTRR: Fixed MSR 0x26d 0x0606060606060606
1708 12:44:55.974569 MTRR: Fixed MSR 0x26e 0x0606060606060606
1709 12:44:55.979214 MTRR: Fixed MSR 0x26f 0x0606060606060606
1710 12:44:55.982318 call enable_fixed_mtrr()
1711 12:44:55.986122 CPU physical address size: 39 bits
1712 12:44:55.990057 MTRR: default type WB/UC MTRR counts: 7/6.
1713 12:44:55.993999 MTRR: UC selected as default type.
1714 12:44:55.999557 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1715 12:44:56.006068 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1716 12:44:56.011747 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1717 12:44:56.018862 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1718 12:44:56.025132 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1719 12:44:56.030711 MTRR: 5 base 0x0000000100000000 mask 0x0000007f80000000 type 6
1720 12:44:56.031411
1721 12:44:56.032646 MTRR check
1722 12:44:56.034899 Fixed MTRRs : Enabled
1723 12:44:56.037083 Variable MTRRs: Enabled
1724 12:44:56.037171
1725 12:44:56.041483 MTRR: Fixed MSR 0x250 0x0606060606060606
1726 12:44:56.045507 MTRR: Fixed MSR 0x258 0x0606060606060606
1727 12:44:56.049489 MTRR: Fixed MSR 0x259 0x0000000000000000
1728 12:44:56.054119 MTRR: Fixed MSR 0x268 0x0606060606060606
1729 12:44:56.058026 MTRR: Fixed MSR 0x269 0x0606060606060606
1730 12:44:56.062606 MTRR: Fixed MSR 0x26a 0x0606060606060606
1731 12:44:56.065799 MTRR: Fixed MSR 0x26b 0x0606060606060606
1732 12:44:56.070545 MTRR: Fixed MSR 0x26c 0x0606060606060606
1733 12:44:56.074493 MTRR: Fixed MSR 0x26d 0x0606060606060606
1734 12:44:56.078547 MTRR: Fixed MSR 0x26e 0x0606060606060606
1735 12:44:56.083147 MTRR: Fixed MSR 0x26f 0x0606060606060606
1736 12:44:56.089679 BS: BS_WRITE_TABLES times (us): entry 17197 run 490283 exit 150019
1737 12:44:56.092345 call enable_fixed_mtrr()
1738 12:44:56.093965 CBFS @ 1d00000 size 300000
1739 12:44:56.101037 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1740 12:44:56.104351 CBFS: Locating 'fallback/payload'
1741 12:44:56.107283 CPU physical address size: 39 bits
1742 12:44:56.111023 CBFS: Found @ offset 1cf4c0 size 3a954
1743 12:44:56.116049 Checking segment from ROM address 0xffecf4f8
1744 12:44:56.120267 Checking segment from ROM address 0xffecf514
1745 12:44:56.125292 Loading segment from ROM address 0xffecf4f8
1746 12:44:56.127202 code (compression=0)
1747 12:44:56.135753 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1748 12:44:56.143909 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1749 12:44:56.146347 it's not compressed!
1750 12:44:56.228685 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1751 12:44:56.235142 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1752 12:44:56.243813 Loading segment from ROM address 0xffecf514
1753 12:44:56.246495 Entry Point 0x30100018
1754 12:44:56.248337 Loaded segments
1755 12:44:56.257934 Finalizing chipset.
1756 12:44:56.259261 Finalizing SMM.
1757 12:44:56.265857 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 158903 exit 11532
1758 12:44:56.269246 mp_park_aps done after 0 msecs.
1759 12:44:56.272841 Jumping to boot code at 30100018(89c33000)
1760 12:44:56.281730 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1761 12:44:56.281817
1762 12:44:56.282101
1763 12:44:56.282187
1764 12:44:56.285704 Starting depthcharge on sarien...
1765 12:44:56.285790
1766 12:44:56.286366 end: 2.2.3 depthcharge-start (duration 00:00:09) [common]
1767 12:44:56.286478 start: 2.2.4 bootloader-commands (timeout 00:04:30) [common]
1768 12:44:56.286564 Setting prompt string to ['sarien:']
1769 12:44:56.286643 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:30)
1770 12:44:56.293599 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1771 12:44:56.293713
1772 12:44:56.300473 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1773 12:44:56.300932
1774 12:44:56.309060 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1775 12:44:56.309340
1776 12:44:56.311095 BIOS MMAP details:
1777 12:44:56.311814
1778 12:44:56.313801 IFD Base Offset : 0x1000000
1779 12:44:56.314120
1780 12:44:56.316675 IFD End Offset : 0x2000000
1781 12:44:56.316796
1782 12:44:56.319328 MMAP Size : 0x1000000
1783 12:44:56.319410
1784 12:44:56.323050 MMAP Start : 0xff000000
1785 12:44:56.323717
1786 12:44:56.329782 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1787 12:44:56.332290
1788 12:44:56.336697 Failed to find BH720 with VID/DID 1217:8620
1789 12:44:56.337320
1790 12:44:56.341389 New NVMe Controller 0x3214e050 @ 00:1d:04
1791 12:44:56.341474
1792 12:44:56.344736 New NVMe Controller 0x3214e118 @ 00:1d:00
1793 12:44:56.345304
1794 12:44:56.351154 The GBB signature is at 0x30000014 and is: 24 47 42 42
1795 12:44:56.354569
1796 12:44:56.357055 Wipe memory regions:
1797 12:44:56.357654
1798 12:44:56.360905 [0x00000000001000, 0x000000000a0000)
1799 12:44:56.361399
1800 12:44:56.364567 [0x00000000100000, 0x00000030000000)
1801 12:44:56.446592
1802 12:44:56.450023 [0x00000032751910, 0x00000089afd000)
1803 12:44:56.600865
1804 12:44:56.604525 [0x00000100000000, 0x0000016e800000)
1805 12:44:57.225466
1806 12:44:57.228104 R8152: Initializing
1807 12:44:57.228195
1808 12:44:57.230094 Version 9 (ocp_data = 6010)
1809 12:44:57.231389
1810 12:44:57.233337 R8152: Done initializing
1811 12:44:57.233596
1812 12:44:57.235799 Adding net device
1813 12:44:57.236385
1814 12:44:57.242017 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
1815 12:44:57.242139
1816 12:44:57.242207
1817 12:44:57.242618
1818 12:44:57.242895 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1820 12:44:57.343564 sarien:tftpboot 192.168.201.1 9729689/tftp-deploy-oiwsyrhr/kernel/bzImage 9729689/tftp-deploy-oiwsyrhr/kernel/cmdline 9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
1821 12:44:57.343721 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1822 12:44:57.343822 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:28)
1823 12:44:57.345790 tftpboot 192.168.201.1 9729689/tftp-deploy-oiwsyrhr/kernel/bzImage 9729689/tftp-deploy-oiwsyrhr/kernel/cmdline 9729689/tftp-deploy-oiwsyrhr/ramdisk/ramdisk.cpio.gz
1824 12:44:57.345876
1825 12:44:57.347564 Waiting for link
1826 12:44:57.547139
1827 12:44:57.547827 done.
1828 12:44:57.548215
1829 12:44:57.550471 MAC: 00:e0:4c:78:7f:db
1830 12:44:57.550567
1831 12:44:57.552949 Sending DHCP discover... done.
1832 12:44:57.553578
1833 12:44:57.556028 Waiting for reply... done.
1834 12:44:57.556307
1835 12:44:57.559345 Sending DHCP request... done.
1836 12:44:57.559445
1837 12:44:57.561772 Waiting for reply... done.
1838 12:44:57.562397
1839 12:44:57.563779 My ip is 192.168.201.103
1840 12:44:57.564350
1841 12:44:57.568228 The DHCP server ip is 192.168.201.1
1842 12:44:57.568328
1843 12:44:57.572451 TFTP server IP predefined by user: 192.168.201.1
1844 12:44:57.572574
1845 12:44:57.579577 Bootfile predefined by user: 9729689/tftp-deploy-oiwsyrhr/kernel/bzImage
1846 12:44:57.579677
1847 12:44:57.583258 Sending tftp read request... done.
1848 12:44:57.583858
1849 12:44:57.586128 Waiting for the transfer...
1850 12:44:57.586641
1851 12:44:57.854124 00000000 ################################################################
1852 12:44:57.854856
1853 12:44:58.109406 00080000 ################################################################
1854 12:44:58.110738
1855 12:44:58.360537 00100000 ################################################################
1856 12:44:58.360885
1857 12:44:58.604896 00180000 ################################################################
1858 12:44:58.605053
1859 12:44:58.855529 00200000 ################################################################
1860 12:44:58.856180
1861 12:44:59.116045 00280000 ################################################################
1862 12:44:59.116627
1863 12:44:59.363652 00300000 ################################################################
1864 12:44:59.364251
1865 12:44:59.616673 00380000 ################################################################
1866 12:44:59.617275
1867 12:44:59.866639 00400000 ################################################################
1868 12:44:59.867239
1869 12:45:00.128522 00480000 ################################################################
1870 12:45:00.129467
1871 12:45:00.371782 00500000 ################################################################
1872 12:45:00.372455
1873 12:45:00.621655 00580000 ################################################################
1874 12:45:00.622277
1875 12:45:00.868002 00600000 ################################################################
1876 12:45:00.868359
1877 12:45:01.121740 00680000 ################################################################
1878 12:45:01.122448
1879 12:45:01.373094 00700000 ################################################################
1880 12:45:01.373753
1881 12:45:01.639464 00780000 ################################################################
1882 12:45:01.639875
1883 12:45:01.918072 00800000 ################################################################
1884 12:45:01.919354
1885 12:45:02.173815 00880000 ################################################################
1886 12:45:02.174503
1887 12:45:02.430315 00900000 ################################################################
1888 12:45:02.430994
1889 12:45:02.686847 00980000 ################################################################
1890 12:45:02.687501
1891 12:45:02.948599 00a00000 ################################################################
1892 12:45:02.949209
1893 12:45:03.210020 00a80000 ################################################################
1894 12:45:03.210684
1895 12:45:03.267271 00b00000 ############## done.
1896 12:45:03.267406
1897 12:45:03.270543 The bootfile was 11646080 bytes long.
1898 12:45:03.271158
1899 12:45:03.274539 Sending tftp read request... done.
1900 12:45:03.274627
1901 12:45:03.277228 Waiting for the transfer...
1902 12:45:03.277550
1903 12:45:03.536019 00000000 ################################################################
1904 12:45:03.536629
1905 12:45:03.807003 00080000 ################################################################
1906 12:45:03.807507
1907 12:45:04.058836 00100000 ################################################################
1908 12:45:04.059480
1909 12:45:04.309531 00180000 ################################################################
1910 12:45:04.310124
1911 12:45:04.558109 00200000 ################################################################
1912 12:45:04.559308
1913 12:45:04.820506 00280000 ################################################################
1914 12:45:04.821068
1915 12:45:05.068469 00300000 ################################################################
1916 12:45:05.068655
1917 12:45:05.317939 00380000 ################################################################
1918 12:45:05.318102
1919 12:45:05.556331 00400000 ################################################################
1920 12:45:05.556813
1921 12:45:05.791213 00480000 ################################################################
1922 12:45:05.791947
1923 12:45:06.028697 00500000 ################################################################
1924 12:45:06.028839
1925 12:45:06.270597 00580000 ################################################################
1926 12:45:06.271204
1927 12:45:06.507171 00600000 ################################################################
1928 12:45:06.507809
1929 12:45:06.737652 00680000 ################################################################
1930 12:45:06.738825
1931 12:45:06.984305 00700000 ################################################################
1932 12:45:06.984900
1933 12:45:07.227985 00780000 ################################################################
1934 12:45:07.228392
1935 12:45:07.484483 00800000 ################################################################
1936 12:45:07.484886
1937 12:45:07.635326 00880000 ####################################### done.
1938 12:45:07.636010
1939 12:45:07.639608 Sending tftp read request... done.
1940 12:45:07.639695
1941 12:45:07.641844 Waiting for the transfer...
1942 12:45:07.642222
1943 12:45:07.644116 00000000 # done.
1944 12:45:07.644733
1945 12:45:07.653285 Command line loaded dynamically from TFTP file: 9729689/tftp-deploy-oiwsyrhr/kernel/cmdline
1946 12:45:07.653372
1947 12:45:07.670445 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1948 12:45:07.675398
1949 12:45:07.679522 Shutting down all USB controllers.
1950 12:45:07.679610
1951 12:45:07.682462 Removing current net device
1952 12:45:07.683657
1953 12:45:07.686050 EC: exit firmware mode
1954 12:45:07.689073
1955 12:45:07.690599 Finalizing coreboot
1956 12:45:07.690992
1957 12:45:07.695873 Exiting depthcharge with code 4 at timestamp: 18302509
1958 12:45:07.697166
1959 12:45:07.697254
1960 12:45:07.698211 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1961 12:45:07.698329 start: 2.2.5 auto-login-action (timeout 00:04:18) [common]
1962 12:45:07.698414 Setting prompt string to ['Linux version [0-9]']
1963 12:45:07.698499 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1964 12:45:07.698587 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1965 12:45:07.698781 Starting kernel ...
1966 12:45:07.698856
1967 12:45:07.698921
1969 12:49:25.698733 end: 2.2.5 auto-login-action (duration 00:04:18) [common]
1971 12:49:25.698954 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 258 seconds'
1973 12:49:25.699113 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1976 12:49:25.699382 end: 2 depthcharge-action (duration 00:05:00) [common]
1978 12:49:25.699620 Cleaning after the job
1979 12:49:25.699717 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/ramdisk
1980 12:49:25.700429 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/kernel
1981 12:49:25.701257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729689/tftp-deploy-oiwsyrhr/modules
1982 12:49:25.701623 start: 5.1 power-off (timeout 00:00:30) [common]
1983 12:49:25.701798 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-4305U-sarien-cbg-0' '--port=1' '--command=off'
1984 12:49:32.946047 >> Command sent successfully.
1985 12:49:32.955180 Returned 0 in 7 seconds
1986 12:49:33.056890 end: 5.1 power-off (duration 00:00:07) [common]
1988 12:49:33.058559 start: 5.2 read-feedback (timeout 00:09:53) [common]
1989 12:49:33.059869 Listened to connection for namespace 'common' for up to 1s
1990 12:49:34.062294 Finalising connection for namespace 'common'
1991 12:49:34.063015 Disconnecting from shell: Finalise
1992 12:49:34.063593
1993 12:49:34.164781 end: 5.2 read-feedback (duration 00:00:01) [common]
1994 12:49:34.164941 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729689
1995 12:49:34.170868 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729689
1996 12:49:34.171025 JobError: Your job cannot terminate cleanly.