Boot log: dell-latitude-5400-8665U-sarien
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:28.875047 lava-dispatcher, installed at version: 2023.01
2 12:44:28.875225 start: 0 validate
3 12:44:28.875344 Start time: 2023-03-22 12:44:28.875338+00:00 (UTC)
4 12:44:28.875465 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:28.875587 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:44:29.176725 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:29.177384 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:29.473165 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:29.473351 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:29.768740 validate duration: 0.89
12 12:44:29.770065 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:29.770861 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:29.771581 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:29.772121 Not decompressing ramdisk as can be used compressed.
16 12:44:29.772552 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:44:29.772889 saving as /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/ramdisk/rootfs.cpio.gz
18 12:44:29.773217 total size: 8429740 (8MB)
19 12:44:29.777137 progress 0% (0MB)
20 12:44:29.787795 progress 5% (0MB)
21 12:44:29.796463 progress 10% (0MB)
22 12:44:29.802181 progress 15% (1MB)
23 12:44:29.806708 progress 20% (1MB)
24 12:44:29.810561 progress 25% (2MB)
25 12:44:29.814051 progress 30% (2MB)
26 12:44:29.817320 progress 35% (2MB)
27 12:44:29.819990 progress 40% (3MB)
28 12:44:29.822766 progress 45% (3MB)
29 12:44:29.825313 progress 50% (4MB)
30 12:44:29.827782 progress 55% (4MB)
31 12:44:29.830063 progress 60% (4MB)
32 12:44:29.832318 progress 65% (5MB)
33 12:44:29.834449 progress 70% (5MB)
34 12:44:29.836377 progress 75% (6MB)
35 12:44:29.838485 progress 80% (6MB)
36 12:44:29.840515 progress 85% (6MB)
37 12:44:29.842583 progress 90% (7MB)
38 12:44:29.844626 progress 95% (7MB)
39 12:44:29.846713 progress 100% (8MB)
40 12:44:29.846844 8MB downloaded in 0.07s (109.18MB/s)
41 12:44:29.846994 end: 1.1.1 http-download (duration 00:00:00) [common]
43 12:44:29.847237 end: 1.1 download-retry (duration 00:00:00) [common]
44 12:44:29.847326 start: 1.2 download-retry (timeout 00:10:00) [common]
45 12:44:29.847412 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 12:44:29.847518 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:29.847590 saving as /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/kernel/bzImage
48 12:44:29.847676 total size: 11646080 (11MB)
49 12:44:29.847751 No compression specified
50 12:44:29.848647 progress 0% (0MB)
51 12:44:29.851429 progress 5% (0MB)
52 12:44:29.854297 progress 10% (1MB)
53 12:44:29.857107 progress 15% (1MB)
54 12:44:29.859965 progress 20% (2MB)
55 12:44:29.862689 progress 25% (2MB)
56 12:44:29.865661 progress 30% (3MB)
57 12:44:29.868775 progress 35% (3MB)
58 12:44:29.871701 progress 40% (4MB)
59 12:44:29.874462 progress 45% (5MB)
60 12:44:29.877284 progress 50% (5MB)
61 12:44:29.880157 progress 55% (6MB)
62 12:44:29.883033 progress 60% (6MB)
63 12:44:29.885991 progress 65% (7MB)
64 12:44:29.888699 progress 70% (7MB)
65 12:44:29.891527 progress 75% (8MB)
66 12:44:29.894346 progress 80% (8MB)
67 12:44:29.897124 progress 85% (9MB)
68 12:44:29.899784 progress 90% (10MB)
69 12:44:29.902666 progress 95% (10MB)
70 12:44:29.905523 progress 100% (11MB)
71 12:44:29.905691 11MB downloaded in 0.06s (191.46MB/s)
72 12:44:29.905876 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:44:29.906111 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:44:29.906200 start: 1.3 download-retry (timeout 00:10:00) [common]
76 12:44:29.906290 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 12:44:29.906397 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:29.906468 saving as /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/modules/modules.tar
79 12:44:29.906532 total size: 497788 (0MB)
80 12:44:29.906594 Using unxz to decompress xz
81 12:44:29.909640 progress 6% (0MB)
82 12:44:29.910075 progress 13% (0MB)
83 12:44:29.910312 progress 19% (0MB)
84 12:44:29.911578 progress 26% (0MB)
85 12:44:29.913537 progress 32% (0MB)
86 12:44:29.915806 progress 39% (0MB)
87 12:44:29.917594 progress 46% (0MB)
88 12:44:29.919609 progress 52% (0MB)
89 12:44:29.922115 progress 59% (0MB)
90 12:44:29.924036 progress 65% (0MB)
91 12:44:29.926099 progress 72% (0MB)
92 12:44:29.928090 progress 78% (0MB)
93 12:44:29.930079 progress 85% (0MB)
94 12:44:29.932057 progress 92% (0MB)
95 12:44:29.934019 progress 98% (0MB)
96 12:44:29.941096 0MB downloaded in 0.03s (13.74MB/s)
97 12:44:29.941409 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:44:29.941676 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:44:29.941816 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
101 12:44:29.941912 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
102 12:44:29.942003 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:44:29.942089 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
104 12:44:29.942268 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581
105 12:44:29.942378 makedir: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin
106 12:44:29.942464 makedir: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/tests
107 12:44:29.942544 makedir: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/results
108 12:44:29.942649 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-add-keys
109 12:44:29.942781 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-add-sources
110 12:44:29.942895 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-background-process-start
111 12:44:29.943009 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-background-process-stop
112 12:44:29.943119 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-common-functions
113 12:44:29.943226 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-echo-ipv4
114 12:44:29.943336 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-install-packages
115 12:44:29.943448 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-installed-packages
116 12:44:29.943554 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-os-build
117 12:44:29.943666 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-probe-channel
118 12:44:29.943805 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-probe-ip
119 12:44:29.943912 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-target-ip
120 12:44:29.944037 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-target-mac
121 12:44:29.944178 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-target-storage
122 12:44:29.944292 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-case
123 12:44:29.944402 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-event
124 12:44:29.944509 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-feedback
125 12:44:29.944620 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-raise
126 12:44:29.944732 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-reference
127 12:44:29.944840 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-runner
128 12:44:29.944947 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-set
129 12:44:29.945052 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-test-shell
130 12:44:29.945165 Updating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-install-packages (oe)
131 12:44:29.945276 Updating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/bin/lava-installed-packages (oe)
132 12:44:29.945374 Creating /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/environment
133 12:44:29.945463 LAVA metadata
134 12:44:29.945536 - LAVA_JOB_ID=9729708
135 12:44:29.945604 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:44:29.945739 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
137 12:44:29.945821 skipped lava-vland-overlay
138 12:44:29.945900 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:44:29.945984 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
140 12:44:29.946051 skipped lava-multinode-overlay
141 12:44:29.946128 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:44:29.946217 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
143 12:44:29.946291 Loading test definitions
144 12:44:29.946391 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
145 12:44:29.946466 Using /lava-9729708 at stage 0
146 12:44:29.946746 uuid=9729708_1.4.2.3.1 testdef=None
147 12:44:29.946856 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:44:29.946949 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
149 12:44:29.947476 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:44:29.947706 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
152 12:44:29.948266 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:44:29.948505 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
155 12:44:29.949040 runner path: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/0/tests/0_dmesg test_uuid 9729708_1.4.2.3.1
156 12:44:29.949187 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:44:29.949418 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
159 12:44:29.949491 Using /lava-9729708 at stage 1
160 12:44:29.949768 uuid=9729708_1.4.2.3.5 testdef=None
161 12:44:29.949861 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
162 12:44:29.949948 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
163 12:44:29.950451 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
165 12:44:29.950672 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
166 12:44:29.951231 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
168 12:44:29.951462 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
169 12:44:29.951998 runner path: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/1/tests/1_bootrr test_uuid 9729708_1.4.2.3.5
170 12:44:29.952137 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
172 12:44:29.952346 Creating lava-test-runner.conf files
173 12:44:29.952412 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/0 for stage 0
174 12:44:29.952495 - 0_dmesg
175 12:44:29.952568 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729708/lava-overlay-5ky9d581/lava-9729708/1 for stage 1
176 12:44:29.952650 - 1_bootrr
177 12:44:29.952740 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
178 12:44:29.952831 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
179 12:44:29.959374 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
180 12:44:29.959506 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
181 12:44:29.959600 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
182 12:44:29.959689 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
183 12:44:29.959778 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
184 12:44:30.145455 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
185 12:44:30.145849 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
186 12:44:30.145992 extracting modules file /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729708/extract-overlay-ramdisk-z76vihxk/ramdisk
187 12:44:30.159253 end: 1.4.4 extract-modules (duration 00:00:00) [common]
188 12:44:30.159405 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
189 12:44:30.159502 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729708/compress-overlay-8duztjko/overlay-1.4.2.4.tar.gz to ramdisk
190 12:44:30.159588 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729708/compress-overlay-8duztjko/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729708/extract-overlay-ramdisk-z76vihxk/ramdisk
191 12:44:30.163661 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
192 12:44:30.163776 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
193 12:44:30.163868 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
194 12:44:30.163956 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
195 12:44:30.164036 Building ramdisk /var/lib/lava/dispatcher/tmp/9729708/extract-overlay-ramdisk-z76vihxk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729708/extract-overlay-ramdisk-z76vihxk/ramdisk
196 12:44:30.235826 >> 53721 blocks
197 12:44:31.076874 rename /var/lib/lava/dispatcher/tmp/9729708/extract-overlay-ramdisk-z76vihxk/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
198 12:44:31.077268 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
199 12:44:31.077394 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
200 12:44:31.077539 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
201 12:44:31.077659 No mkimage arch provided, not using FIT.
202 12:44:31.077785 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
203 12:44:31.077873 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
204 12:44:31.077974 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
205 12:44:31.078073 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
206 12:44:31.078152 No LXC device requested
207 12:44:31.078236 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
208 12:44:31.078325 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
209 12:44:31.078407 end: 1.6 deploy-device-env (duration 00:00:00) [common]
210 12:44:31.078474 Checking files for TFTP limit of 4294967296 bytes.
211 12:44:31.078903 end: 1 tftp-deploy (duration 00:00:01) [common]
212 12:44:31.079007 start: 2 depthcharge-action (timeout 00:05:00) [common]
213 12:44:31.079102 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
214 12:44:31.079232 substitutions:
215 12:44:31.079302 - {DTB}: None
216 12:44:31.079366 - {INITRD}: 9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
217 12:44:31.079426 - {KERNEL}: 9729708/tftp-deploy-brayilo6/kernel/bzImage
218 12:44:31.079485 - {LAVA_MAC}: None
219 12:44:31.079542 - {PRESEED_CONFIG}: None
220 12:44:31.079600 - {PRESEED_LOCAL}: None
221 12:44:31.079656 - {RAMDISK}: 9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
222 12:44:31.079712 - {ROOT_PART}: None
223 12:44:31.079767 - {ROOT}: None
224 12:44:31.079822 - {SERVER_IP}: 192.168.201.1
225 12:44:31.079877 - {TEE}: None
226 12:44:31.079932 Parsed boot commands:
227 12:44:31.079986 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
228 12:44:31.080143 Parsed boot commands: tftpboot 192.168.201.1 9729708/tftp-deploy-brayilo6/kernel/bzImage 9729708/tftp-deploy-brayilo6/kernel/cmdline 9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
229 12:44:31.080250 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
230 12:44:31.080340 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
231 12:44:31.080452 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
232 12:44:31.080555 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
233 12:44:31.080636 Not connected, no need to disconnect.
234 12:44:31.080717 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
235 12:44:31.080824 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
236 12:44:31.080893 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost dell-latitude-5400-8665U-sarien-cbg-4'
237 12:44:31.084000 Setting prompt string to ['lava-test: # ']
238 12:44:31.084329 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
239 12:44:31.084438 end: 2.2.1 reset-connection (duration 00:00:00) [common]
240 12:44:31.084539 start: 2.2.2 reset-device (timeout 00:05:00) [common]
241 12:44:31.084631 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
242 12:44:31.084812 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=reboot'
243 12:44:52.839374 >> Command sent successfully.
244 12:44:52.849761 Returned 0 in 21 seconds
245 12:44:52.951473 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
247 12:44:52.952856 end: 2.2.2 reset-device (duration 00:00:22) [common]
248 12:44:52.953362 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
249 12:44:52.953852 Setting prompt string to 'Starting depthcharge on sarien...'
250 12:44:52.954203 Changing prompt to 'Starting depthcharge on sarien...'
251 12:44:52.954574 depthcharge-start: Wait for prompt Starting depthcharge on sarien... (timeout 00:05:00)
252 12:44:52.955808 [Enter `^Ec?' for help]
253 12:44:52.956227
254 12:44:52.956568
255 12:44:52.956899 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
256 12:44:52.957223 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
257 12:44:52.957523 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
258 12:44:52.957841 CPU: AES supported, TXT supported, VT supported
259 12:44:52.958139 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
260 12:44:52.958435 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
261 12:44:52.958730 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
262 12:44:52.959016 VBOOT: Loading verstage.
263 12:44:52.959304 CBFS @ 1d00000 size 300000
264 12:44:52.959591 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
265 12:44:52.959877 CBFS: Locating 'fallback/verstage'
266 12:44:52.960162 CBFS: Found @ offset 10f6c0 size 1435c
267 12:44:52.960445
268 12:44:52.960726
269 12:44:52.961007 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
270 12:44:52.961300 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
271 12:44:52.961589 done! DID_VID 0x00281ae0
272 12:44:52.961895 TPM ready after 0 ms
273 12:44:52.962250 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
274 12:44:52.962541 tlcl_send_startup: Startup return code is 0
275 12:44:52.962829 TPM: setup succeeded
276 12:44:52.963116 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
277 12:44:52.963406 Checking cr50 for recovery request
278 12:44:52.963690 Phase 1
279 12:44:52.963972 FMAP: Found "FLASH" version 1.1 at 1c10000.
280 12:44:52.964259 FMAP: base = fe000000 size = 2000000 #areas = 37
281 12:44:52.964542 FMAP: area GBB found @ 1c11000 (978944 bytes)
282 12:44:52.964830 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
283 12:44:52.965114 Phase 2
284 12:44:52.965398 Phase 3
285 12:44:52.965675 FMAP: area GBB found @ 1c11000 (978944 bytes)
286 12:44:52.965978 VB2:vb2_report_dev_firmware() This is developer signed firmware
287 12:44:52.966264 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
288 12:44:52.966548 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
289 12:44:52.966837 VB2:vb2_verify_keyblock() Checking key block signature...
290 12:44:52.967122 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
291 12:44:52.967426 FMAP: area VBLOCK_B found @ 1950000 (65536 bytes)
292 12:44:52.967712 VB2:vb2_verify_fw_preamble() Verifying preamble.
293 12:44:52.967994 Phase 4
294 12:44:52.968276 FMAP: area FW_MAIN_B found @ 1960000 (2555840 bytes)
295 12:44:52.968561 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
296 12:44:52.968847 VB2:vb2_rsa_verify_digest() Digest check failed!
297 12:44:52.969129 VB2:vb2_fail() Need recovery, reason: 0x1b / 0x7
298 12:44:52.969409 Saving nvdata
299 12:44:52.969689 Reboot requested (10020007)
300 12:44:52.969989 board_reset() called!
301 12:44:52.970271 full_reset() called!
302 12:44:54.904636
303 12:44:54.905131
304 12:44:54.913011 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 bootblock starting (log level: 8)...
305 12:44:54.917428 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz
306 12:44:54.922388 CPU: ID 806ec, Whiskeylake V0, ucode: 000000b7
307 12:44:54.926752 CPU: AES supported, TXT supported, VT supported
308 12:44:54.931688 MCH: device id 3e34 (rev 0c) is Whiskeylake W (4+2)
309 12:44:54.937130 PCH: device id 9d84 (rev 30) is Cannonlake-U Premium
310 12:44:54.942121 IGD: device id 3ea0 (rev 02) is Whiskeylake ULT GT1
311 12:44:54.945817 VBOOT: Loading verstage.
312 12:44:54.948473 CBFS @ 1d00000 size 300000
313 12:44:54.954617 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
314 12:44:54.958402 CBFS: Locating 'fallback/verstage'
315 12:44:54.962290 CBFS: Found @ offset 10f6c0 size 1435c
316 12:44:54.977131
317 12:44:54.977217
318 12:44:54.985333 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 verstage starting (log level: 8)...
319 12:44:54.992219 Probing TPM I2C: DW I2C bus 4 at 0xfe044000 (400 KHz)
320 12:44:55.117507 .done! DID_VID 0x00281ae0
321 12:44:55.119714 TPM ready after 0 ms
322 12:44:55.123055 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
323 12:44:55.232430 tlcl_send_startup: Startup return code is 0
324 12:44:55.235058 TPM: setup succeeded
325 12:44:55.253857 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x1007 return code 0
326 12:44:55.257096 Checking cr50 for recovery request
327 12:44:55.266854 Phase 1
328 12:44:55.271252 FMAP: Found "FLASH" version 1.1 at 1c10000.
329 12:44:55.276205 FMAP: base = fe000000 size = 2000000 #areas = 37
330 12:44:55.281095 FMAP: area GBB found @ 1c11000 (978944 bytes)
331 12:44:55.288454 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
332 12:44:55.294589 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
333 12:44:55.297431 Recovery requested (1009000e)
334 12:44:55.298853 Saving nvdata
335 12:44:55.315542 tlcl_extend: response is 0
336 12:44:55.329524 tlcl_extend: response is 0
337 12:44:55.333467 CBFS @ 1d00000 size 300000
338 12:44:55.339807 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
339 12:44:55.343026 CBFS: Locating 'fallback/romstage'
340 12:44:55.346358 CBFS: Found @ offset 80 size 15b2c
341 12:44:55.348067
342 12:44:55.348151
343 12:44:55.356384 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 romstage starting (log level: 8)...
344 12:44:55.361835 pm1_sts: 8100 pm1_en: 0000 pm1_cnt: 00001c00
345 12:44:55.365987 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
346 12:44:55.369977 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
347 12:44:55.374519 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
348 12:44:55.378827 gpe0_sts[3]: 00004000 gpe0_en[3]: 00000000
349 12:44:55.380592 TCO_STS: 0000 0004
350 12:44:55.383781 GEN_PMCON: d0015209 00002200
351 12:44:55.386983 GBLRST_CAUSE: 00000000 00000000
352 12:44:55.389019 prev_sleep_state 5
353 12:44:55.392735 Boot Count incremented to 24631
354 12:44:55.395980 CBFS @ 1d00000 size 300000
355 12:44:55.402099 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
356 12:44:55.404969 CBFS: Locating 'fspm.bin'
357 12:44:55.408796 CBFS: Found @ offset 60fc0 size 70000
358 12:44:55.414139 FMAP: Found "FLASH" version 1.1 at 1c10000.
359 12:44:55.418454 FMAP: base = fe000000 size = 2000000 #areas = 37
360 12:44:55.424750 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
361 12:44:55.431006 Probing TPM I2C: done! DID_VID 0x00281ae0
362 12:44:55.433710 Locality already claimed
363 12:44:55.436896 cr50 TPM 2.0 (i2c 4:0x50 id 0x28)
364 12:44:55.456790 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
365 12:44:55.463413 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
366 12:44:55.466206 MRC cache found, size 18e0
367 12:44:55.467997 bootmode is set to :2
368 12:44:55.560304 CBMEM:
369 12:44:55.563616 IMD: root @ 89fff000 254 entries.
370 12:44:55.566774 IMD: root @ 89ffec00 62 entries.
371 12:44:55.569903 External stage cache:
372 12:44:55.573644 IMD: root @ 8abff000 254 entries.
373 12:44:55.576867 IMD: root @ 8abfec00 62 entries.
374 12:44:55.582480 VBOOT: copying vboot_working_data (12288 bytes) to CBMEM...
375 12:44:55.586232 creating vboot_handoff structure
376 12:44:55.606852 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
377 12:44:55.622806 tlcl_write: response is 0
378 12:44:55.641290 src/security/tpm/tss/tcg-2.0/tss.c:217 index 0x100b return code 0
379 12:44:55.645583 MRC: TPM MRC hash updated successfully.
380 12:44:55.647247 1 DIMMs found
381 12:44:55.649536 top_of_ram = 0x8a000000
382 12:44:55.655061 MTRR Range: Start=89000000 End=8a000000 (Size 1000000)
383 12:44:55.659834 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 12:44:55.662256 CBFS @ 1d00000 size 300000
385 12:44:55.668748 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
386 12:44:55.672465 CBFS: Locating 'fallback/postcar'
387 12:44:55.675938 CBFS: Found @ offset 107000 size 41a4
388 12:44:55.682726 Decompressing stage fallback/postcar @ 0x89cdcfc0 (33360 bytes)
389 12:44:55.692242 Loading module at 89cdd000 with entry 89cdd000. filesize: 0x3f50 memsize: 0x8210
390 12:44:55.697119 Processing 126 relocs. Offset value of 0x87cdd000
391 12:44:55.700470
392 12:44:55.700556
393 12:44:55.708509 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 postcar starting (log level: 8)...
394 12:44:55.711371 CBFS @ 1d00000 size 300000
395 12:44:55.717825 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
396 12:44:55.721003 CBFS: Locating 'fallback/ramstage'
397 12:44:55.725071 CBFS: Found @ offset 458c0 size 1a8a8
398 12:44:55.731798 Decompressing stage fallback/ramstage @ 0x89c80fc0 (372256 bytes)
399 12:44:55.760482 Loading module at 89c81000 with entry 89c81000. filesize: 0x400e0 memsize: 0x5ade0
400 12:44:55.765552 Processing 3754 relocs. Offset value of 0x88e81000
401 12:44:55.771901
402 12:44:55.772299
403 12:44:55.780628 coreboot-3d715efb13 Fri Apr 19 02:50:16 UTC 2019 ramstage starting (log level: 8)...
404 12:44:55.784838 FMAP: Found "FLASH" version 1.1 at 1c10000.
405 12:44:55.789936 FMAP: base = fe000000 size = 2000000 #areas = 37
406 12:44:55.794641 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
407 12:44:55.798856 WARNING: RO_VPD is uninitialized or empty.
408 12:44:55.803887 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
409 12:44:55.808514 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
410 12:44:55.810105 Normal boot.
411 12:44:55.816531 BS: BS_PRE_DEVICE times (us): entry 0 run 57 exit 1160
412 12:44:55.819420 CBFS @ 1d00000 size 300000
413 12:44:55.825842 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
414 12:44:55.829412 CBFS: Locating 'cpu_microcode_blob.bin'
415 12:44:55.833506 CBFS: Found @ offset 15c40 size 2fc00
416 12:44:55.837876 microcode: sig=0x806ec pf=0x80 revision=0xb7
417 12:44:55.840294 Skip microcode update
418 12:44:55.842897 CBFS @ 1d00000 size 300000
419 12:44:55.848909 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
420 12:44:55.851735 CBFS: Locating 'fsps.bin'
421 12:44:55.855883 CBFS: Found @ offset d1fc0 size 35000
422 12:44:55.890696 Detected 4 core, 8 thread CPU.
423 12:44:55.893178 Setting up SMI for CPU
424 12:44:55.895247 IED base = 0x8ac00000
425 12:44:55.897561 IED size = 0x00400000
426 12:44:55.900487 Will perform SMM setup.
427 12:44:55.905108 CPU: Intel(R) Core(TM) i7-8665U CPU @ 1.90GHz.
428 12:44:55.912928 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
429 12:44:55.917573 Processing 16 relocs. Offset value of 0x00030000
430 12:44:55.920183 Attempting to start 7 APs
431 12:44:55.923858 Waiting for 10ms after sending INIT.
432 12:44:55.940137 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
433 12:44:55.940435 done.
434 12:44:55.943032 AP: slot 4 apic_id 2.
435 12:44:55.945346 AP: slot 1 apic_id 3.
436 12:44:55.947293 AP: slot 2 apic_id 6.
437 12:44:55.951504 Waiting for 2nd SIPI to complete...done.
438 12:44:55.953679 AP: slot 7 apic_id 4.
439 12:44:55.955962 AP: slot 6 apic_id 5.
440 12:44:55.958341 AP: slot 5 apic_id 7.
441 12:44:55.966085 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
442 12:44:55.970625 Processing 13 relocs. Offset value of 0x00038000
443 12:44:55.977556 SMM Module: stub loaded at 00038000. Will call 89c9b6bd(00000000)
444 12:44:55.981153 Installing SMM handler to 0x8a000000
445 12:44:55.988854 Loading module at 8a010000 with entry 8a010a27. filesize: 0xa988 memsize: 0xfa40
446 12:44:55.994592 Processing 867 relocs. Offset value of 0x8a010000
447 12:44:56.003030 Loading module at 8a008000 with entry 8a008000. filesize: 0x1a8 memsize: 0x1a8
448 12:44:56.007516 Processing 13 relocs. Offset value of 0x8a008000
449 12:44:56.013585 SMM Module: placing jmp sequence at 8a007c00 rel16 0x03fd
450 12:44:56.019020 SMM Module: placing jmp sequence at 8a007800 rel16 0x07fd
451 12:44:56.025104 SMM Module: placing jmp sequence at 8a007400 rel16 0x0bfd
452 12:44:56.030519 SMM Module: placing jmp sequence at 8a007000 rel16 0x0ffd
453 12:44:56.035935 SMM Module: placing jmp sequence at 8a006c00 rel16 0x13fd
454 12:44:56.042113 SMM Module: placing jmp sequence at 8a006800 rel16 0x17fd
455 12:44:56.047947 SMM Module: placing jmp sequence at 8a006400 rel16 0x1bfd
456 12:44:56.054146 SMM Module: stub loaded at 8a008000. Will call 8a010a27(00000000)
457 12:44:56.057788 Clearing SMI status registers
458 12:44:56.059400 SMI_STS: PM1
459 12:44:56.061187 PM1_STS: WAK PWRBTN
460 12:44:56.063794 TCO_STS: BOOT SECOND_TO
461 12:44:56.065935 GPE0 STD STS: eSPI
462 12:44:56.068421 New SMBASE 0x8a000000
463 12:44:56.071117 In relocation handler: CPU 0
464 12:44:56.075388 New SMBASE=0x8a000000 IEDBASE=0x8ac00000
465 12:44:56.080194 Writing SMRR. base = 0x8a000006, mask=0xff000800
466 12:44:56.081850 Relocation complete.
467 12:44:56.084264 New SMBASE 0x89fff400
468 12:44:56.087392 In relocation handler: CPU 3
469 12:44:56.091219 New SMBASE=0x89fff400 IEDBASE=0x8ac00000
470 12:44:56.096479 Writing SMRR. base = 0x8a000006, mask=0xff000800
471 12:44:56.098411 Relocation complete.
472 12:44:56.100781 New SMBASE 0x89ffe800
473 12:44:56.103823 In relocation handler: CPU 6
474 12:44:56.108122 New SMBASE=0x89ffe800 IEDBASE=0x8ac00000
475 12:44:56.113007 Writing SMRR. base = 0x8a000006, mask=0xff000800
476 12:44:56.115054 Relocation complete.
477 12:44:56.117006 New SMBASE 0x89ffe400
478 12:44:56.120338 In relocation handler: CPU 7
479 12:44:56.123728 New SMBASE=0x89ffe400 IEDBASE=0x8ac00000
480 12:44:56.128790 Writing SMRR. base = 0x8a000006, mask=0xff000800
481 12:44:56.131398 Relocation complete.
482 12:44:56.133404 New SMBASE 0x89fff000
483 12:44:56.136531 In relocation handler: CPU 4
484 12:44:56.140710 New SMBASE=0x89fff000 IEDBASE=0x8ac00000
485 12:44:56.145596 Writing SMRR. base = 0x8a000006, mask=0xff000800
486 12:44:56.147459 Relocation complete.
487 12:44:56.149824 New SMBASE 0x89fffc00
488 12:44:56.152748 In relocation handler: CPU 1
489 12:44:56.156779 New SMBASE=0x89fffc00 IEDBASE=0x8ac00000
490 12:44:56.161549 Writing SMRR. base = 0x8a000006, mask=0xff000800
491 12:44:56.163673 Relocation complete.
492 12:44:56.166012 New SMBASE 0x89ffec00
493 12:44:56.168829 In relocation handler: CPU 5
494 12:44:56.172895 New SMBASE=0x89ffec00 IEDBASE=0x8ac00000
495 12:44:56.177759 Writing SMRR. base = 0x8a000006, mask=0xff000800
496 12:44:56.179979 Relocation complete.
497 12:44:56.182345 New SMBASE 0x89fff800
498 12:44:56.185490 In relocation handler: CPU 2
499 12:44:56.189415 New SMBASE=0x89fff800 IEDBASE=0x8ac00000
500 12:44:56.194053 Writing SMRR. base = 0x8a000006, mask=0xff000800
501 12:44:56.196469 Relocation complete.
502 12:44:56.198203 Initializing CPU #0
503 12:44:56.201838 CPU: vendor Intel device 806ec
504 12:44:56.205900 CPU: family 06, model 8e, stepping 0c
505 12:44:56.208362 Clearing out pending MCEs
506 12:44:56.212494 Setting up local APIC... apic_id: 0x00 done.
507 12:44:56.215363 Turbo is available but hidden
508 12:44:56.218141 Turbo has been enabled
509 12:44:56.220132 VMX status: enabled
510 12:44:56.223826 IA32_FEATURE_CONTROL status: locked
511 12:44:56.225863 Skip microcode update
512 12:44:56.228217 CPU #0 initialized
513 12:44:56.230376 Initializing CPU #3
514 12:44:56.231864 Initializing CPU #4
515 12:44:56.234169 Initializing CPU #1
516 12:44:56.237018 CPU: vendor Intel device 806ec
517 12:44:56.240740 CPU: family 06, model 8e, stepping 0c
518 12:44:56.244500 CPU: vendor Intel device 806ec
519 12:44:56.248345 CPU: family 06, model 8e, stepping 0c
520 12:44:56.250827 Clearing out pending MCEs
521 12:44:56.252824 Clearing out pending MCEs
522 12:44:56.257979 Setting up local APIC...Initializing CPU #7
523 12:44:56.259574 Initializing CPU #6
524 12:44:56.262858 CPU: vendor Intel device 806ec
525 12:44:56.266769 CPU: family 06, model 8e, stepping 0c
526 12:44:56.269652 CPU: vendor Intel device 806ec
527 12:44:56.273142 CPU: family 06, model 8e, stepping 0c
528 12:44:56.276082 Clearing out pending MCEs
529 12:44:56.278962 Clearing out pending MCEs
530 12:44:56.283334 Setting up local APIC... apic_id: 0x02 done.
531 12:44:56.288867 Setting up local APIC...CPU: vendor Intel device 806ec
532 12:44:56.292287 CPU: family 06, model 8e, stepping 0c
533 12:44:56.294599 VMX status: enabled
534 12:44:56.296489 apic_id: 0x03 done.
535 12:44:56.299845 IA32_FEATURE_CONTROL status: locked
536 12:44:56.302313 VMX status: enabled
537 12:44:56.304857 Skip microcode update
538 12:44:56.308426 IA32_FEATURE_CONTROL status: locked
539 12:44:56.310150 CPU #4 initialized
540 12:44:56.312284 Skip microcode update
541 12:44:56.316979 Setting up local APIC...Initializing CPU #2
542 12:44:56.318991 Initializing CPU #5
543 12:44:56.321750 CPU: vendor Intel device 806ec
544 12:44:56.325171 CPU: family 06, model 8e, stepping 0c
545 12:44:56.327483 CPU #1 initialized
546 12:44:56.330103 Clearing out pending MCEs
547 12:44:56.332875 Clearing out pending MCEs
548 12:44:56.335912 CPU: vendor Intel device 806ec
549 12:44:56.339660 CPU: family 06, model 8e, stepping 0c
550 12:44:56.344109 Setting up local APIC... apic_id: 0x04 done.
551 12:44:56.346004 apic_id: 0x05 done.
552 12:44:56.348154 VMX status: enabled
553 12:44:56.350294 VMX status: enabled
554 12:44:56.353775 IA32_FEATURE_CONTROL status: locked
555 12:44:56.357726 IA32_FEATURE_CONTROL status: locked
556 12:44:56.360093 Skip microcode update
557 12:44:56.362199 Skip microcode update
558 12:44:56.364130 CPU #7 initialized
559 12:44:56.365772 CPU #6 initialized
560 12:44:56.368074 apic_id: 0x06 done.
561 12:44:56.370872 Clearing out pending MCEs
562 12:44:56.373024 VMX status: enabled
563 12:44:56.379461 Setting up local APIC...Setting up local APIC... apic_id: 0x07 done.
564 12:44:56.383257 IA32_FEATURE_CONTROL status: locked
565 12:44:56.384941 VMX status: enabled
566 12:44:56.387518 Skip microcode update
567 12:44:56.390913 IA32_FEATURE_CONTROL status: locked
568 12:44:56.392769 CPU #2 initialized
569 12:44:56.395274 Skip microcode update
570 12:44:56.397308 apic_id: 0x01 done.
571 12:44:56.399212 CPU #5 initialized
572 12:44:56.401500 VMX status: enabled
573 12:44:56.404935 IA32_FEATURE_CONTROL status: locked
574 12:44:56.406949 Skip microcode update
575 12:44:56.409375 CPU #3 initialized
576 12:44:56.413357 bsp_do_flight_plan done after 458 msecs.
577 12:44:56.416607 CPU: frequency set to 4800 MHz
578 12:44:56.417906 Enabling SMIs.
579 12:44:56.419390 Locking SMM.
580 12:44:56.422546 CBFS @ 1d00000 size 300000
581 12:44:56.428993 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
582 12:44:56.431730 CBFS: Locating 'vbt.bin'
583 12:44:56.435066 CBFS: Found @ offset 60a40 size 4a0
584 12:44:56.439813 Found a VBT of 4608 bytes after decompression
585 12:44:56.453606 FMAP: area GBB found @ 1c11000 (978944 bytes)
586 12:44:56.515153 Detected 4 core, 8 thread CPU.
587 12:44:56.518596 Detected 4 core, 8 thread CPU.
588 12:44:56.745206 Display FSP Version Info HOB
589 12:44:56.748489 Reference Code - CPU = 7.0.5e.40
590 12:44:56.751386 uCode Version = 0.0.0.b8
591 12:44:56.754264 Display FSP Version Info HOB
592 12:44:56.757226 Reference Code - ME = 7.0.5e.40
593 12:44:56.759461 MEBx version = 0.0.0.0
594 12:44:56.762830 ME Firmware Version = Consumer SKU
595 12:44:56.765897 Display FSP Version Info HOB
596 12:44:56.769484 Reference Code - CNL PCH = 7.0.5e.40
597 12:44:56.772340 PCH-CRID Status = Disabled
598 12:44:56.776181 CNL PCH H A0 Hsio Version = 2.0.0.0
599 12:44:56.779775 CNL PCH H Ax Hsio Version = 9.0.0.0
600 12:44:56.783023 CNL PCH H Bx Hsio Version = a.0.0.0
601 12:44:56.787125 CNL PCH LP B0 Hsio Version = 7.0.0.0
602 12:44:56.790597 CNL PCH LP Bx Hsio Version = 6.0.0.0
603 12:44:56.794292 CNL PCH LP Dx Hsio Version = 7.0.0.0
604 12:44:56.796909 Display FSP Version Info HOB
605 12:44:56.801823 Reference Code - SA - System Agent = 7.0.5e.40
606 12:44:56.804902 Reference Code - MRC = 0.7.1.68
607 12:44:56.808165 SA - PCIe Version = 7.0.5e.40
608 12:44:56.810346 SA-CRID Status = Disabled
609 12:44:56.814158 SA-CRID Original Value = 0.0.0.c
610 12:44:56.817034 SA-CRID New Value = 0.0.0.c
611 12:44:56.835473 RTC Init
612 12:44:56.839043 Set power off after power failure.
613 12:44:56.840838 Disabling Deep S3
614 12:44:56.842816 Disabling Deep S3
615 12:44:56.844299 Disabling Deep S4
616 12:44:56.846374 Disabling Deep S4
617 12:44:56.848246 Disabling Deep S5
618 12:44:56.850324 Disabling Deep S5
619 12:44:56.856975 BS: BS_DEV_INIT_CHIPS times (us): entry 602969 run 414434 exit 16234
620 12:44:56.859499 Enumerating buses...
621 12:44:56.863724 Show all devs... Before device enumeration.
622 12:44:56.865943 Root Device: enabled 1
623 12:44:56.868715 CPU_CLUSTER: 0: enabled 1
624 12:44:56.871136 DOMAIN: 0000: enabled 1
625 12:44:56.873162 APIC: 00: enabled 1
626 12:44:56.875358 PCI: 00:00.0: enabled 1
627 12:44:56.878108 PCI: 00:02.0: enabled 1
628 12:44:56.880232 PCI: 00:04.0: enabled 1
629 12:44:56.882724 PCI: 00:12.0: enabled 1
630 12:44:56.884913 PCI: 00:12.5: enabled 0
631 12:44:56.887904 PCI: 00:12.6: enabled 0
632 12:44:56.890288 PCI: 00:13.0: enabled 0
633 12:44:56.892423 PCI: 00:14.0: enabled 1
634 12:44:56.895250 PCI: 00:14.1: enabled 0
635 12:44:56.897150 PCI: 00:14.3: enabled 1
636 12:44:56.899932 PCI: 00:14.5: enabled 0
637 12:44:56.902386 PCI: 00:15.0: enabled 1
638 12:44:56.904684 PCI: 00:15.1: enabled 1
639 12:44:56.906995 PCI: 00:15.2: enabled 0
640 12:44:56.909540 PCI: 00:15.3: enabled 0
641 12:44:56.912166 PCI: 00:16.0: enabled 1
642 12:44:56.914501 PCI: 00:16.1: enabled 0
643 12:44:56.916705 PCI: 00:16.2: enabled 0
644 12:44:56.919399 PCI: 00:16.3: enabled 0
645 12:44:56.921909 PCI: 00:16.4: enabled 0
646 12:44:56.924236 PCI: 00:16.5: enabled 0
647 12:44:56.926757 PCI: 00:17.0: enabled 1
648 12:44:56.929123 PCI: 00:19.0: enabled 1
649 12:44:56.931077 PCI: 00:19.1: enabled 0
650 12:44:56.933880 PCI: 00:19.2: enabled 1
651 12:44:56.936099 PCI: 00:1a.0: enabled 0
652 12:44:56.938728 PCI: 00:1c.0: enabled 1
653 12:44:56.940860 PCI: 00:1c.1: enabled 0
654 12:44:56.943752 PCI: 00:1c.2: enabled 0
655 12:44:56.946144 PCI: 00:1c.3: enabled 0
656 12:44:56.948473 PCI: 00:1c.4: enabled 0
657 12:44:56.950819 PCI: 00:1c.5: enabled 0
658 12:44:56.953306 PCI: 00:1c.6: enabled 0
659 12:44:56.955774 PCI: 00:1c.7: enabled 1
660 12:44:56.958214 PCI: 00:1d.0: enabled 1
661 12:44:56.960327 PCI: 00:1d.1: enabled 1
662 12:44:56.963348 PCI: 00:1d.2: enabled 0
663 12:44:56.965407 PCI: 00:1d.3: enabled 0
664 12:44:56.967502 PCI: 00:1d.4: enabled 1
665 12:44:56.970337 PCI: 00:1e.0: enabled 0
666 12:44:56.972778 PCI: 00:1e.1: enabled 0
667 12:44:56.975108 PCI: 00:1e.2: enabled 0
668 12:44:56.977903 PCI: 00:1e.3: enabled 0
669 12:44:56.980036 PCI: 00:1f.0: enabled 1
670 12:44:56.982403 PCI: 00:1f.1: enabled 1
671 12:44:56.984945 PCI: 00:1f.2: enabled 1
672 12:44:56.987445 PCI: 00:1f.3: enabled 1
673 12:44:56.989964 PCI: 00:1f.4: enabled 1
674 12:44:56.992244 PCI: 00:1f.5: enabled 1
675 12:44:56.994524 PCI: 00:1f.6: enabled 1
676 12:44:56.997292 USB0 port 0: enabled 1
677 12:44:56.999258 I2C: 00:10: enabled 1
678 12:44:57.001294 I2C: 00:10: enabled 1
679 12:44:57.003779 I2C: 00:34: enabled 1
680 12:44:57.005759 I2C: 00:2c: enabled 1
681 12:44:57.008193 I2C: 00:50: enabled 1
682 12:44:57.010373 PNP: 0c09.0: enabled 1
683 12:44:57.012424 USB2 port 0: enabled 1
684 12:44:57.015276 USB2 port 1: enabled 1
685 12:44:57.017759 USB2 port 2: enabled 1
686 12:44:57.019561 USB2 port 4: enabled 1
687 12:44:57.022242 USB2 port 5: enabled 1
688 12:44:57.024676 USB2 port 6: enabled 1
689 12:44:57.026690 USB2 port 7: enabled 1
690 12:44:57.029083 USB2 port 8: enabled 1
691 12:44:57.031717 USB2 port 9: enabled 1
692 12:44:57.034133 USB3 port 0: enabled 1
693 12:44:57.035720 USB3 port 1: enabled 1
694 12:44:57.038760 USB3 port 2: enabled 1
695 12:44:57.040799 USB3 port 3: enabled 1
696 12:44:57.043034 USB3 port 4: enabled 1
697 12:44:57.045196 APIC: 03: enabled 1
698 12:44:57.047122 APIC: 06: enabled 1
699 12:44:57.049478 APIC: 01: enabled 1
700 12:44:57.051478 APIC: 02: enabled 1
701 12:44:57.053312 APIC: 07: enabled 1
702 12:44:57.055678 APIC: 05: enabled 1
703 12:44:57.057665 APIC: 04: enabled 1
704 12:44:57.059495 Compare with tree...
705 12:44:57.062031 Root Device: enabled 1
706 12:44:57.064517 CPU_CLUSTER: 0: enabled 1
707 12:44:57.067045 APIC: 00: enabled 1
708 12:44:57.069111 APIC: 03: enabled 1
709 12:44:57.071666 APIC: 06: enabled 1
710 12:44:57.073568 APIC: 01: enabled 1
711 12:44:57.075878 APIC: 02: enabled 1
712 12:44:57.078242 APIC: 07: enabled 1
713 12:44:57.079990 APIC: 05: enabled 1
714 12:44:57.082626 APIC: 04: enabled 1
715 12:44:57.084963 DOMAIN: 0000: enabled 1
716 12:44:57.087378 PCI: 00:00.0: enabled 1
717 12:44:57.090170 PCI: 00:02.0: enabled 1
718 12:44:57.093125 PCI: 00:04.0: enabled 1
719 12:44:57.095632 PCI: 00:12.0: enabled 1
720 12:44:57.098020 PCI: 00:12.5: enabled 0
721 12:44:57.100790 PCI: 00:12.6: enabled 0
722 12:44:57.103648 PCI: 00:13.0: enabled 0
723 12:44:57.106073 PCI: 00:14.0: enabled 1
724 12:44:57.108661 USB0 port 0: enabled 1
725 12:44:57.111402 USB2 port 0: enabled 1
726 12:44:57.113927 USB2 port 1: enabled 1
727 12:44:57.116484 USB2 port 2: enabled 1
728 12:44:57.119675 USB2 port 4: enabled 1
729 12:44:57.122485 USB2 port 5: enabled 1
730 12:44:57.125218 USB2 port 6: enabled 1
731 12:44:57.127709 USB2 port 7: enabled 1
732 12:44:57.130556 USB2 port 8: enabled 1
733 12:44:57.133338 USB2 port 9: enabled 1
734 12:44:57.135873 USB3 port 0: enabled 1
735 12:44:57.138660 USB3 port 1: enabled 1
736 12:44:57.141403 USB3 port 2: enabled 1
737 12:44:57.144149 USB3 port 3: enabled 1
738 12:44:57.146948 USB3 port 4: enabled 1
739 12:44:57.149534 PCI: 00:14.1: enabled 0
740 12:44:57.152281 PCI: 00:14.3: enabled 1
741 12:44:57.154661 PCI: 00:14.5: enabled 0
742 12:44:57.157466 PCI: 00:15.0: enabled 1
743 12:44:57.159923 I2C: 00:10: enabled 1
744 12:44:57.162302 I2C: 00:10: enabled 1
745 12:44:57.164843 I2C: 00:34: enabled 1
746 12:44:57.167731 PCI: 00:15.1: enabled 1
747 12:44:57.169945 I2C: 00:2c: enabled 1
748 12:44:57.172314 PCI: 00:15.2: enabled 0
749 12:44:57.175258 PCI: 00:15.3: enabled 0
750 12:44:57.177780 PCI: 00:16.0: enabled 1
751 12:44:57.180706 PCI: 00:16.1: enabled 0
752 12:44:57.182977 PCI: 00:16.2: enabled 0
753 12:44:57.185833 PCI: 00:16.3: enabled 0
754 12:44:57.188724 PCI: 00:16.4: enabled 0
755 12:44:57.190777 PCI: 00:16.5: enabled 0
756 12:44:57.193657 PCI: 00:17.0: enabled 1
757 12:44:57.196527 PCI: 00:19.0: enabled 1
758 12:44:57.198701 I2C: 00:50: enabled 1
759 12:44:57.201571 PCI: 00:19.1: enabled 0
760 12:44:57.204126 PCI: 00:19.2: enabled 1
761 12:44:57.206921 PCI: 00:1a.0: enabled 0
762 12:44:57.209297 PCI: 00:1c.0: enabled 1
763 12:44:57.212182 PCI: 00:1c.1: enabled 0
764 12:44:57.214486 PCI: 00:1c.2: enabled 0
765 12:44:57.217382 PCI: 00:1c.3: enabled 0
766 12:44:57.220080 PCI: 00:1c.4: enabled 0
767 12:44:57.222556 PCI: 00:1c.5: enabled 0
768 12:44:57.224721 PCI: 00:1c.6: enabled 0
769 12:44:57.227943 PCI: 00:1c.7: enabled 1
770 12:44:57.230284 PCI: 00:1d.0: enabled 1
771 12:44:57.232965 PCI: 00:1d.1: enabled 1
772 12:44:57.235781 PCI: 00:1d.2: enabled 0
773 12:44:57.238143 PCI: 00:1d.3: enabled 0
774 12:44:57.240954 PCI: 00:1d.4: enabled 1
775 12:44:57.243707 PCI: 00:1e.0: enabled 0
776 12:44:57.246083 PCI: 00:1e.1: enabled 0
777 12:44:57.248572 PCI: 00:1e.2: enabled 0
778 12:44:57.251459 PCI: 00:1e.3: enabled 0
779 12:44:57.253800 PCI: 00:1f.0: enabled 1
780 12:44:57.256540 PNP: 0c09.0: enabled 1
781 12:44:57.259215 PCI: 00:1f.1: enabled 1
782 12:44:57.261926 PCI: 00:1f.2: enabled 1
783 12:44:57.264357 PCI: 00:1f.3: enabled 1
784 12:44:57.267089 PCI: 00:1f.4: enabled 1
785 12:44:57.269596 PCI: 00:1f.5: enabled 1
786 12:44:57.272568 PCI: 00:1f.6: enabled 1
787 12:44:57.274436 Root Device scanning...
788 12:44:57.277987 root_dev_scan_bus for Root Device
789 12:44:57.280812 CPU_CLUSTER: 0 enabled
790 12:44:57.282636 DOMAIN: 0000 enabled
791 12:44:57.285636 DOMAIN: 0000 scanning...
792 12:44:57.288184 PCI: pci_scan_bus for bus 00
793 12:44:57.291746 PCI: 00:00.0 [8086/0000] ops
794 12:44:57.295099 PCI: 00:00.0 [8086/3e34] enabled
795 12:44:57.297591 PCI: 00:02.0 [8086/0000] ops
796 12:44:57.301339 PCI: 00:02.0 [8086/3ea0] enabled
797 12:44:57.304362 PCI: 00:04.0 [8086/1903] enabled
798 12:44:57.307760 PCI: 00:08.0 [8086/1911] enabled
799 12:44:57.311355 PCI: 00:12.0 [8086/9df9] enabled
800 12:44:57.314873 PCI: 00:14.0 [8086/0000] bus ops
801 12:44:57.318139 PCI: 00:14.0 [8086/9ded] enabled
802 12:44:57.321332 PCI: 00:14.2 [8086/9def] enabled
803 12:44:57.324714 PCI: 00:14.3 [8086/9df0] enabled
804 12:44:57.327964 PCI: 00:15.0 [8086/0000] bus ops
805 12:44:57.331124 PCI: 00:15.0 [8086/9de8] enabled
806 12:44:57.334416 PCI: 00:15.1 [8086/0000] bus ops
807 12:44:57.337512 PCI: 00:15.1 [8086/9de9] enabled
808 12:44:57.340850 PCI: 00:16.0 [8086/0000] ops
809 12:44:57.343879 PCI: 00:16.0 [8086/9de0] enabled
810 12:44:57.347146 PCI: 00:17.0 [8086/0000] ops
811 12:44:57.349863 PCI: 00:17.0 [8086/9dd3] enabled
812 12:44:57.353392 PCI: 00:19.0 [8086/0000] bus ops
813 12:44:57.356809 PCI: 00:19.0 [8086/9dc5] enabled
814 12:44:57.359772 PCI: 00:19.2 [8086/0000] ops
815 12:44:57.362972 PCI: 00:19.2 [8086/9dc7] enabled
816 12:44:57.366681 PCI: 00:1c.0 [8086/0000] bus ops
817 12:44:57.369642 PCI: 00:1c.0 [8086/9dbf] enabled
818 12:44:57.375558 PCI: Static device PCI: 00:1c.7 not found, disabling it.
819 12:44:57.378832 PCI: 00:1d.0 [8086/0000] bus ops
820 12:44:57.382144 PCI: 00:1d.0 [8086/9db4] enabled
821 12:44:57.387685 PCI: Static device PCI: 00:1d.1 not found, disabling it.
822 12:44:57.393123 PCI: Static device PCI: 00:1d.4 not found, disabling it.
823 12:44:57.396584 PCI: 00:1f.0 [8086/0000] bus ops
824 12:44:57.400224 PCI: 00:1f.0 [8086/9d84] enabled
825 12:44:57.405835 PCI: Static device PCI: 00:1f.1 not found, disabling it.
826 12:44:57.411543 PCI: Static device PCI: 00:1f.2 not found, disabling it.
827 12:44:57.414854 PCI: 00:1f.3 [8086/0000] bus ops
828 12:44:57.418098 PCI: 00:1f.3 [8086/9dc8] enabled
829 12:44:57.421123 PCI: 00:1f.4 [8086/0000] bus ops
830 12:44:57.424745 PCI: 00:1f.4 [8086/9da3] enabled
831 12:44:57.427666 PCI: 00:1f.5 [8086/0000] bus ops
832 12:44:57.431217 PCI: 00:1f.5 [8086/9da4] enabled
833 12:44:57.434557 PCI: 00:1f.6 [8086/15be] enabled
834 12:44:57.437798 PCI: Leftover static devices:
835 12:44:57.438744 PCI: 00:12.5
836 12:44:57.440256 PCI: 00:12.6
837 12:44:57.441874 PCI: 00:13.0
838 12:44:57.443170 PCI: 00:14.1
839 12:44:57.444142 PCI: 00:14.5
840 12:44:57.446012 PCI: 00:15.2
841 12:44:57.447123 PCI: 00:15.3
842 12:44:57.448681 PCI: 00:16.1
843 12:44:57.449858 PCI: 00:16.2
844 12:44:57.451022 PCI: 00:16.3
845 12:44:57.452686 PCI: 00:16.4
846 12:44:57.453850 PCI: 00:16.5
847 12:44:57.454950 PCI: 00:19.1
848 12:44:57.456191 PCI: 00:1a.0
849 12:44:57.458208 PCI: 00:1c.1
850 12:44:57.459452 PCI: 00:1c.2
851 12:44:57.460636 PCI: 00:1c.3
852 12:44:57.462309 PCI: 00:1c.4
853 12:44:57.463360 PCI: 00:1c.5
854 12:44:57.464753 PCI: 00:1c.6
855 12:44:57.466138 PCI: 00:1c.7
856 12:44:57.467801 PCI: 00:1d.1
857 12:44:57.468739 PCI: 00:1d.2
858 12:44:57.470163 PCI: 00:1d.3
859 12:44:57.471785 PCI: 00:1d.4
860 12:44:57.472736 PCI: 00:1e.0
861 12:44:57.474327 PCI: 00:1e.1
862 12:44:57.475744 PCI: 00:1e.2
863 12:44:57.476718 PCI: 00:1e.3
864 12:44:57.478358 PCI: 00:1f.1
865 12:44:57.479699 PCI: 00:1f.2
866 12:44:57.482776 PCI: Check your devicetree.cb.
867 12:44:57.485410 PCI: 00:14.0 scanning...
868 12:44:57.488635 scan_usb_bus for PCI: 00:14.0
869 12:44:57.491063 USB0 port 0 enabled
870 12:44:57.493113 USB0 port 0 scanning...
871 12:44:57.496358 scan_usb_bus for USB0 port 0
872 12:44:57.498394 USB2 port 0 enabled
873 12:44:57.500247 USB2 port 1 enabled
874 12:44:57.502355 USB2 port 2 enabled
875 12:44:57.504712 USB2 port 4 enabled
876 12:44:57.506762 USB2 port 5 enabled
877 12:44:57.508831 USB2 port 6 enabled
878 12:44:57.510930 USB2 port 7 enabled
879 12:44:57.512608 USB2 port 8 enabled
880 12:44:57.514772 USB2 port 9 enabled
881 12:44:57.516837 USB3 port 0 enabled
882 12:44:57.518777 USB3 port 1 enabled
883 12:44:57.520961 USB3 port 2 enabled
884 12:44:57.523161 USB3 port 3 enabled
885 12:44:57.525021 USB3 port 4 enabled
886 12:44:57.527300 USB2 port 0 scanning...
887 12:44:57.530851 scan_usb_bus for USB2 port 0
888 12:44:57.534356 scan_usb_bus for USB2 port 0 done
889 12:44:57.539740 scan_bus: scanning of bus USB2 port 0 took 9060 usecs
890 12:44:57.541644 USB2 port 1 scanning...
891 12:44:57.544892 scan_usb_bus for USB2 port 1
892 12:44:57.548594 scan_usb_bus for USB2 port 1 done
893 12:44:57.553748 scan_bus: scanning of bus USB2 port 1 took 9060 usecs
894 12:44:57.556140 USB2 port 2 scanning...
895 12:44:57.559229 scan_usb_bus for USB2 port 2
896 12:44:57.562820 scan_usb_bus for USB2 port 2 done
897 12:44:57.568333 scan_bus: scanning of bus USB2 port 2 took 9060 usecs
898 12:44:57.570547 USB2 port 4 scanning...
899 12:44:57.573830 scan_usb_bus for USB2 port 4
900 12:44:57.577327 scan_usb_bus for USB2 port 4 done
901 12:44:57.582726 scan_bus: scanning of bus USB2 port 4 took 9060 usecs
902 12:44:57.585119 USB2 port 5 scanning...
903 12:44:57.588157 scan_usb_bus for USB2 port 5
904 12:44:57.591349 scan_usb_bus for USB2 port 5 done
905 12:44:57.597080 scan_bus: scanning of bus USB2 port 5 took 9059 usecs
906 12:44:57.599238 USB2 port 6 scanning...
907 12:44:57.602415 scan_usb_bus for USB2 port 6
908 12:44:57.606095 scan_usb_bus for USB2 port 6 done
909 12:44:57.611471 scan_bus: scanning of bus USB2 port 6 took 9062 usecs
910 12:44:57.613642 USB2 port 7 scanning...
911 12:44:57.617195 scan_usb_bus for USB2 port 7
912 12:44:57.620568 scan_usb_bus for USB2 port 7 done
913 12:44:57.626166 scan_bus: scanning of bus USB2 port 7 took 9061 usecs
914 12:44:57.628212 USB2 port 8 scanning...
915 12:44:57.631575 scan_usb_bus for USB2 port 8
916 12:44:57.634836 scan_usb_bus for USB2 port 8 done
917 12:44:57.640272 scan_bus: scanning of bus USB2 port 8 took 9059 usecs
918 12:44:57.642675 USB2 port 9 scanning...
919 12:44:57.646188 scan_usb_bus for USB2 port 9
920 12:44:57.649502 scan_usb_bus for USB2 port 9 done
921 12:44:57.654985 scan_bus: scanning of bus USB2 port 9 took 9061 usecs
922 12:44:57.657351 USB3 port 0 scanning...
923 12:44:57.660439 scan_usb_bus for USB3 port 0
924 12:44:57.663701 scan_usb_bus for USB3 port 0 done
925 12:44:57.669170 scan_bus: scanning of bus USB3 port 0 took 9059 usecs
926 12:44:57.671256 USB3 port 1 scanning...
927 12:44:57.674743 scan_usb_bus for USB3 port 1
928 12:44:57.678180 scan_usb_bus for USB3 port 1 done
929 12:44:57.683551 scan_bus: scanning of bus USB3 port 1 took 9061 usecs
930 12:44:57.685963 USB3 port 2 scanning...
931 12:44:57.689092 scan_usb_bus for USB3 port 2
932 12:44:57.692671 scan_usb_bus for USB3 port 2 done
933 12:44:57.697875 scan_bus: scanning of bus USB3 port 2 took 9060 usecs
934 12:44:57.700336 USB3 port 3 scanning...
935 12:44:57.703552 scan_usb_bus for USB3 port 3
936 12:44:57.707198 scan_usb_bus for USB3 port 3 done
937 12:44:57.712627 scan_bus: scanning of bus USB3 port 3 took 9060 usecs
938 12:44:57.714764 USB3 port 4 scanning...
939 12:44:57.717955 scan_usb_bus for USB3 port 4
940 12:44:57.721282 scan_usb_bus for USB3 port 4 done
941 12:44:57.726633 scan_bus: scanning of bus USB3 port 4 took 9060 usecs
942 12:44:57.730258 scan_usb_bus for USB0 port 0 done
943 12:44:57.735594 scan_bus: scanning of bus USB0 port 0 took 239289 usecs
944 12:44:57.739426 scan_usb_bus for PCI: 00:14.0 done
945 12:44:57.744762 scan_bus: scanning of bus PCI: 00:14.0 took 256220 usecs
946 12:44:57.747380 PCI: 00:15.0 scanning...
947 12:44:57.751173 scan_generic_bus for PCI: 00:15.0
948 12:44:57.755064 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
949 12:44:57.759084 bus: PCI: 00:15.0[0]->I2C: 01:10 enabled
950 12:44:57.763264 bus: PCI: 00:15.0[0]->I2C: 01:34 enabled
951 12:44:57.767022 scan_generic_bus for PCI: 00:15.0 done
952 12:44:57.772722 scan_bus: scanning of bus PCI: 00:15.0 took 22382 usecs
953 12:44:57.775127 PCI: 00:15.1 scanning...
954 12:44:57.779134 scan_generic_bus for PCI: 00:15.1
955 12:44:57.783044 bus: PCI: 00:15.1[0]->I2C: 02:2c enabled
956 12:44:57.786759 scan_generic_bus for PCI: 00:15.1 done
957 12:44:57.792026 scan_bus: scanning of bus PCI: 00:15.1 took 14212 usecs
958 12:44:57.794930 PCI: 00:19.0 scanning...
959 12:44:57.798695 scan_generic_bus for PCI: 00:19.0
960 12:44:57.802884 bus: PCI: 00:19.0[0]->I2C: 03:50 enabled
961 12:44:57.806558 scan_generic_bus for PCI: 00:19.0 done
962 12:44:57.812022 scan_bus: scanning of bus PCI: 00:19.0 took 14214 usecs
963 12:44:57.814550 PCI: 00:1c.0 scanning...
964 12:44:57.818677 do_pci_scan_bridge for PCI: 00:1c.0
965 12:44:57.821372 PCI: pci_scan_bus for bus 01
966 12:44:57.825015 PCI: 01:00.0 [10ec/525a] enabled
967 12:44:57.828454 Capability: type 0x01 @ 0x80
968 12:44:57.831245 Capability: type 0x05 @ 0x90
969 12:44:57.834069 Capability: type 0x10 @ 0xb0
970 12:44:57.836995 Capability: type 0x10 @ 0x40
971 12:44:57.840281 Enabling Common Clock Configuration
972 12:44:57.844462 L1 Sub-State supported from root port 28
973 12:44:57.847171 L1 Sub-State Support = 0xf
974 12:44:57.850319 CommonModeRestoreTime = 0x3c
975 12:44:57.854620 Power On Value = 0x6, Power On Scale = 0x1
976 12:44:57.856795 ASPM: Enabled L0s and L1
977 12:44:57.859739 Capability: type 0x01 @ 0x80
978 12:44:57.862946 Capability: type 0x05 @ 0x90
979 12:44:57.865894 Capability: type 0x10 @ 0xb0
980 12:44:57.871633 scan_bus: scanning of bus PCI: 00:1c.0 took 53664 usecs
981 12:44:57.873710 PCI: 00:1d.0 scanning...
982 12:44:57.877787 do_pci_scan_bridge for PCI: 00:1d.0
983 12:44:57.880667 PCI: pci_scan_bus for bus 02
984 12:44:57.884108 PCI: 02:00.0 [1217/8620] enabled
985 12:44:57.887308 Capability: type 0x01 @ 0x6c
986 12:44:57.890351 Capability: type 0x05 @ 0x48
987 12:44:57.892816 Capability: type 0x10 @ 0x80
988 12:44:57.896176 Capability: type 0x10 @ 0x40
989 12:44:57.900229 L1 Sub-State supported from root port 29
990 12:44:57.902816 L1 Sub-State Support = 0xf
991 12:44:57.905841 CommonModeRestoreTime = 0x78
992 12:44:57.910031 Power On Value = 0x16, Power On Scale = 0x0
993 12:44:57.911798 ASPM: Enabled L1
994 12:44:57.916818 Capability: type 0x01 @ 0x6c
995 12:44:57.921430 Capability: type 0x05 @ 0x48
996 12:44:57.925644 Capability: type 0x10 @ 0x80
997 12:44:57.933228 scan_bus: scanning of bus PCI: 00:1d.0 took 56033 usecs
998 12:44:57.935607 PCI: 00:1f.0 scanning...
999 12:44:57.938932 scan_lpc_bus for PCI: 00:1f.0
1000 12:44:57.940972 PNP: 0c09.0 enabled
1001 12:44:57.943966 scan_lpc_bus for PCI: 00:1f.0 done
1002 12:44:57.950260 scan_bus: scanning of bus PCI: 00:1f.0 took 11395 usecs
1003 12:44:57.952612 PCI: 00:1f.3 scanning...
1004 12:44:57.958203 scan_bus: scanning of bus PCI: 00:1f.3 took 2840 usecs
1005 12:44:57.960964 PCI: 00:1f.4 scanning...
1006 12:44:57.964726 scan_generic_bus for PCI: 00:1f.4
1007 12:44:57.968292 scan_generic_bus for PCI: 00:1f.4 done
1008 12:44:57.973521 scan_bus: scanning of bus PCI: 00:1f.4 took 10129 usecs
1009 12:44:57.976200 PCI: 00:1f.5 scanning...
1010 12:44:57.979855 scan_generic_bus for PCI: 00:1f.5
1011 12:44:57.984234 scan_generic_bus for PCI: 00:1f.5 done
1012 12:44:57.989568 scan_bus: scanning of bus PCI: 00:1f.5 took 10128 usecs
1013 12:44:57.995330 scan_bus: scanning of bus DOMAIN: 0000 took 706684 usecs
1014 12:44:57.998997 root_dev_scan_bus for Root Device done
1015 12:44:58.004488 scan_bus: scanning of bus Root Device took 726821 usecs
1016 12:44:58.005527 done
1017 12:44:58.011627 FMAP: area RECOVERY_MRC_CACHE found @ 1bd0000 (65536 bytes)
1018 12:44:58.017465 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1019 12:44:58.025374 SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x2000000
1020 12:44:58.032129 FMAP: area UNIFIED_MRC_CACHE found @ 1bd0000 (131072 bytes)
1021 12:44:58.035906 SPI flash protection: WPSW=1 SRP0=1
1022 12:44:58.042856 fast_spi_flash_protect: FPR 0 is enabled for range 0x01bd0000-0x01beffff
1023 12:44:58.047805 MRC: Enabled Protected Range on 'UNIFIED_MRC_CACHE'.
1024 12:44:58.054756 BS: BS_DEV_ENUMERATE times (us): entry 0 run 1148548 exit 42576
1025 12:44:58.057190 found VGA at PCI: 00:02.0
1026 12:44:58.060478 Setting up VGA for PCI: 00:02.0
1027 12:44:58.065737 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1028 12:44:58.070626 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1029 12:44:58.072622 Allocating resources...
1030 12:44:58.075156 Reading resources...
1031 12:44:58.079316 Root Device read_resources bus 0 link: 0
1032 12:44:58.083490 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1033 12:44:58.088724 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1034 12:44:58.093521 DOMAIN: 0000 read_resources bus 0 link: 0
1035 12:44:58.099884 PCI: 00:14.0 read_resources bus 0 link: 0
1036 12:44:58.104303 USB0 port 0 read_resources bus 0 link: 0
1037 12:44:58.113073 USB0 port 0 read_resources bus 0 link: 0 done
1038 12:44:58.118502 PCI: 00:14.0 read_resources bus 0 link: 0 done
1039 12:44:58.123682 PCI: 00:15.0 read_resources bus 1 link: 0
1040 12:44:58.129891 PCI: 00:15.0 read_resources bus 1 link: 0 done
1041 12:44:58.134263 PCI: 00:15.1 read_resources bus 2 link: 0
1042 12:44:58.139312 PCI: 00:15.1 read_resources bus 2 link: 0 done
1043 12:44:58.144335 PCI: 00:19.0 read_resources bus 3 link: 0
1044 12:44:58.149778 PCI: 00:19.0 read_resources bus 3 link: 0 done
1045 12:44:58.154611 PCI: 00:1c.0 read_resources bus 1 link: 0
1046 12:44:58.160159 PCI: 00:1c.0 read_resources bus 1 link: 0 done
1047 12:44:58.164892 PCI: 00:1d.0 read_resources bus 2 link: 0
1048 12:44:58.171922 PCI: 00:1d.0 read_resources bus 2 link: 0 done
1049 12:44:58.176012 PCI: 00:1f.0 read_resources bus 0 link: 0
1050 12:44:58.181621 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1051 12:44:58.187980 DOMAIN: 0000 read_resources bus 0 link: 0 done
1052 12:44:58.192813 Root Device read_resources bus 0 link: 0 done
1053 12:44:58.195463 Done reading resources.
1054 12:44:58.200951 Show resources in subtree (Root Device)...After reading.
1055 12:44:58.205353 Root Device child on link 0 CPU_CLUSTER: 0
1056 12:44:58.209431 CPU_CLUSTER: 0 child on link 0 APIC: 00
1057 12:44:58.210972 APIC: 00
1058 12:44:58.212108 APIC: 03
1059 12:44:58.213261 APIC: 06
1060 12:44:58.214483 APIC: 01
1061 12:44:58.216007 APIC: 02
1062 12:44:58.216918 APIC: 07
1063 12:44:58.218317 APIC: 05
1064 12:44:58.219445 APIC: 04
1065 12:44:58.224131 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1066 12:44:58.233399 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1067 12:44:58.243011 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1068 12:44:58.244403 PCI: 00:00.0
1069 12:44:58.254170 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1070 12:44:58.263567 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1071 12:44:58.272541 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1072 12:44:58.282447 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1073 12:44:58.291468 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1074 12:44:58.301106 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1075 12:44:58.310242 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1076 12:44:58.318757 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1077 12:44:58.328689 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1078 12:44:58.338223 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1079 12:44:58.347813 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1080 12:44:58.357542 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1081 12:44:58.366988 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1082 12:44:58.376036 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1083 12:44:58.377317 PCI: 00:02.0
1084 12:44:58.387881 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1085 12:44:58.398111 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1086 12:44:58.406500 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1087 12:44:58.408215 PCI: 00:04.0
1088 12:44:58.417850 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
1089 12:44:58.419592 PCI: 00:08.0
1090 12:44:58.429478 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1091 12:44:58.431143 PCI: 00:12.0
1092 12:44:58.441097 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1093 12:44:58.445459 PCI: 00:14.0 child on link 0 USB0 port 0
1094 12:44:58.455795 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1095 12:44:58.459947 USB0 port 0 child on link 0 USB2 port 0
1096 12:44:58.461549 USB2 port 0
1097 12:44:58.463216 USB2 port 1
1098 12:44:58.465300 USB2 port 2
1099 12:44:58.467041 USB2 port 4
1100 12:44:58.468507 USB2 port 5
1101 12:44:58.470693 USB2 port 6
1102 12:44:58.471904 USB2 port 7
1103 12:44:58.474037 USB2 port 8
1104 12:44:58.475595 USB2 port 9
1105 12:44:58.477291 USB3 port 0
1106 12:44:58.479255 USB3 port 1
1107 12:44:58.480963 USB3 port 2
1108 12:44:58.482609 USB3 port 3
1109 12:44:58.484728 USB3 port 4
1110 12:44:58.486396 PCI: 00:14.2
1111 12:44:58.496091 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1112 12:44:58.505869 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1113 12:44:58.507499 PCI: 00:14.3
1114 12:44:58.517525 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1115 12:44:58.521588 PCI: 00:15.0 child on link 0 I2C: 01:10
1116 12:44:58.531308 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1117 12:44:58.533247 I2C: 01:10
1118 12:44:58.534530 I2C: 01:10
1119 12:44:58.536169 I2C: 01:34
1120 12:44:58.540413 PCI: 00:15.1 child on link 0 I2C: 02:2c
1121 12:44:58.550611 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1122 12:44:58.552082 I2C: 02:2c
1123 12:44:58.553594 PCI: 00:16.0
1124 12:44:58.563796 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1125 12:44:58.565573 PCI: 00:17.0
1126 12:44:58.574229 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1127 12:44:58.583344 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1128 12:44:58.591295 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1129 12:44:58.599888 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1130 12:44:58.608475 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1131 12:44:58.617055 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1132 12:44:58.621820 PCI: 00:19.0 child on link 0 I2C: 03:50
1133 12:44:58.631151 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1134 12:44:58.641164 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1135 12:44:58.642561 I2C: 03:50
1136 12:44:58.644489 PCI: 00:19.2
1137 12:44:58.655598 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1138 12:44:58.665485 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1139 12:44:58.669746 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1140 12:44:58.678682 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1141 12:44:58.688296 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1142 12:44:58.697641 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1143 12:44:58.699311 PCI: 01:00.0
1144 12:44:58.708465 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
1145 12:44:58.712772 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1146 12:44:58.721856 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1147 12:44:58.731127 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1148 12:44:58.740504 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1149 12:44:58.742219 PCI: 02:00.0
1150 12:44:58.751389 PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1151 12:44:58.760502 PCI: 02:00.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 14
1152 12:44:58.765095 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1153 12:44:58.773602 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1154 12:44:58.782660 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1155 12:44:58.784238 PNP: 0c09.0
1156 12:44:58.792634 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1157 12:44:58.801521 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1158 12:44:58.809839 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1159 12:44:58.811921 PCI: 00:1f.3
1160 12:44:58.821604 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1161 12:44:58.831589 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1162 12:44:58.833365 PCI: 00:1f.4
1163 12:44:58.842461 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1164 12:44:58.852222 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1165 12:44:58.853889 PCI: 00:1f.5
1166 12:44:58.862426 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1167 12:44:58.864511 PCI: 00:1f.6
1168 12:44:58.873394 PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
1169 12:44:58.880099 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1170 12:44:58.886423 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1171 12:44:58.893269 PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1172 12:44:58.899632 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1173 12:44:58.906410 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1174 12:44:58.910213 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1175 12:44:58.913642 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1176 12:44:58.917352 PCI: 00:17.0 18 * [0x60 - 0x67] io
1177 12:44:58.920242 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1178 12:44:58.927662 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1179 12:44:58.934075 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1180 12:44:58.942310 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1181 12:44:58.950382 PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1182 12:44:58.957465 PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1183 12:44:58.960702 PCI: 01:00.0 14 * [0x0 - 0xfff] mem
1184 12:44:58.969225 PCI: 00:1c.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1185 12:44:58.977090 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1186 12:44:58.985369 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1187 12:44:58.992287 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1188 12:44:58.995995 PCI: 02:00.0 10 * [0x0 - 0xfff] mem
1189 12:44:58.999807 PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem
1190 12:44:59.008025 PCI: 00:1d.0 mem: base: 1800 size: 100000 align: 20 gran: 20 limit: ffffffff done
1191 12:44:59.012939 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1192 12:44:59.017150 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1193 12:44:59.022328 PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem
1194 12:44:59.027360 PCI: 00:1d.0 20 * [0x11100000 - 0x111fffff] mem
1195 12:44:59.031755 PCI: 00:1f.3 20 * [0x11200000 - 0x112fffff] mem
1196 12:44:59.036935 PCI: 00:1f.6 10 * [0x11300000 - 0x1131ffff] mem
1197 12:44:59.041833 PCI: 00:14.0 10 * [0x11320000 - 0x1132ffff] mem
1198 12:44:59.046765 PCI: 00:04.0 10 * [0x11330000 - 0x11337fff] mem
1199 12:44:59.051694 PCI: 00:14.3 10 * [0x11338000 - 0x1133bfff] mem
1200 12:44:59.056551 PCI: 00:1f.3 10 * [0x1133c000 - 0x1133ffff] mem
1201 12:44:59.061163 PCI: 00:14.2 10 * [0x11340000 - 0x11341fff] mem
1202 12:44:59.066346 PCI: 00:17.0 10 * [0x11342000 - 0x11343fff] mem
1203 12:44:59.070996 PCI: 00:08.0 10 * [0x11344000 - 0x11344fff] mem
1204 12:44:59.076129 PCI: 00:12.0 10 * [0x11345000 - 0x11345fff] mem
1205 12:44:59.080528 PCI: 00:14.2 18 * [0x11346000 - 0x11346fff] mem
1206 12:44:59.085598 PCI: 00:15.0 10 * [0x11347000 - 0x11347fff] mem
1207 12:44:59.090348 PCI: 00:15.1 10 * [0x11348000 - 0x11348fff] mem
1208 12:44:59.095228 PCI: 00:16.0 10 * [0x11349000 - 0x11349fff] mem
1209 12:44:59.100263 PCI: 00:19.0 10 * [0x1134a000 - 0x1134afff] mem
1210 12:44:59.104667 PCI: 00:19.0 18 * [0x1134b000 - 0x1134bfff] mem
1211 12:44:59.110004 PCI: 00:19.2 18 * [0x1134c000 - 0x1134cfff] mem
1212 12:44:59.114387 PCI: 00:1f.5 10 * [0x1134d000 - 0x1134dfff] mem
1213 12:44:59.119688 PCI: 00:17.0 24 * [0x1134e000 - 0x1134e7ff] mem
1214 12:44:59.124211 PCI: 00:17.0 14 * [0x1134f000 - 0x1134f0ff] mem
1215 12:44:59.129282 PCI: 00:1f.4 10 * [0x11350000 - 0x113500ff] mem
1216 12:44:59.137987 DOMAIN: 0000 mem: base: 11350100 size: 11350100 align: 28 gran: 0 limit: ffffffff done
1217 12:44:59.141312 avoid_fixed_resources: DOMAIN: 0000
1218 12:44:59.147472 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1219 12:44:59.152971 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1220 12:44:59.160908 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1221 12:44:59.168499 constrain_resources: PCI: 00:00.0 07 base 00000000 limit 0009ffff mem (fixed)
1222 12:44:59.176395 constrain_resources: PCI: 00:00.0 08 base 000c0000 limit 89ffffff mem (fixed)
1223 12:44:59.183662 constrain_resources: PCI: 00:00.0 0a base 8a000000 limit 8affffff mem (fixed)
1224 12:44:59.191508 constrain_resources: PCI: 00:00.0 0b base 8b000000 limit 8f7fffff mem (fixed)
1225 12:44:59.199316 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1226 12:44:59.206720 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1227 12:44:59.214254 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1228 12:44:59.221366 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1229 12:44:59.228825 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1230 12:44:59.231359 Setting resources...
1231 12:44:59.237594 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1232 12:44:59.241315 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1233 12:44:59.245318 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1234 12:44:59.249419 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1235 12:44:59.253415 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1236 12:44:59.259770 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1237 12:44:59.265502 PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1238 12:44:59.271988 PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1239 12:44:59.278438 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1240 12:44:59.284655 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1241 12:44:59.292379 DOMAIN: 0000 mem: base:c0000000 size:11350100 align:28 gran:0 limit:dfffffff
1242 12:44:59.297396 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1243 12:44:59.302589 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1244 12:44:59.307200 PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem
1245 12:44:59.311883 PCI: 00:1d.0 20 * [0xd1100000 - 0xd11fffff] mem
1246 12:44:59.316720 PCI: 00:1f.3 20 * [0xd1200000 - 0xd12fffff] mem
1247 12:44:59.321685 PCI: 00:1f.6 10 * [0xd1300000 - 0xd131ffff] mem
1248 12:44:59.326478 PCI: 00:14.0 10 * [0xd1320000 - 0xd132ffff] mem
1249 12:44:59.331593 PCI: 00:04.0 10 * [0xd1330000 - 0xd1337fff] mem
1250 12:44:59.336253 PCI: 00:14.3 10 * [0xd1338000 - 0xd133bfff] mem
1251 12:44:59.341195 PCI: 00:1f.3 10 * [0xd133c000 - 0xd133ffff] mem
1252 12:44:59.346135 PCI: 00:14.2 10 * [0xd1340000 - 0xd1341fff] mem
1253 12:44:59.351097 PCI: 00:17.0 10 * [0xd1342000 - 0xd1343fff] mem
1254 12:44:59.355872 PCI: 00:08.0 10 * [0xd1344000 - 0xd1344fff] mem
1255 12:44:59.360987 PCI: 00:12.0 10 * [0xd1345000 - 0xd1345fff] mem
1256 12:44:59.365553 PCI: 00:14.2 18 * [0xd1346000 - 0xd1346fff] mem
1257 12:44:59.370412 PCI: 00:15.0 10 * [0xd1347000 - 0xd1347fff] mem
1258 12:44:59.375245 PCI: 00:15.1 10 * [0xd1348000 - 0xd1348fff] mem
1259 12:44:59.380430 PCI: 00:16.0 10 * [0xd1349000 - 0xd1349fff] mem
1260 12:44:59.384924 PCI: 00:19.0 10 * [0xd134a000 - 0xd134afff] mem
1261 12:44:59.389699 PCI: 00:19.0 18 * [0xd134b000 - 0xd134bfff] mem
1262 12:44:59.394787 PCI: 00:19.2 18 * [0xd134c000 - 0xd134cfff] mem
1263 12:44:59.399317 PCI: 00:1f.5 10 * [0xd134d000 - 0xd134dfff] mem
1264 12:44:59.404544 PCI: 00:17.0 24 * [0xd134e000 - 0xd134e7ff] mem
1265 12:44:59.409556 PCI: 00:17.0 14 * [0xd134f000 - 0xd134f0ff] mem
1266 12:44:59.414264 PCI: 00:1f.4 10 * [0xd1350000 - 0xd13500ff] mem
1267 12:44:59.421686 DOMAIN: 0000 mem: next_base: d1350100 size: 11350100 align: 28 gran: 0 done
1268 12:44:59.429067 PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1269 12:44:59.436521 PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1270 12:44:59.443606 PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1271 12:44:59.448962 PCI: 01:00.0 14 * [0xd1000000 - 0xd1000fff] mem
1272 12:44:59.455911 PCI: 00:1c.0 mem: next_base: d1001000 size: 100000 align: 20 gran: 20 done
1273 12:44:59.463158 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1274 12:44:59.470743 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1275 12:44:59.477884 PCI: 00:1d.0 mem: base:d1100000 size:100000 align:20 gran:20 limit:d11fffff
1276 12:44:59.482798 PCI: 02:00.0 10 * [0xd1100000 - 0xd1100fff] mem
1277 12:44:59.487555 PCI: 02:00.0 14 * [0xd1101000 - 0xd11017ff] mem
1278 12:44:59.495639 PCI: 00:1d.0 mem: next_base: d1101800 size: 100000 align: 20 gran: 20 done
1279 12:44:59.499776 Root Device assign_resources, bus 0 link: 0
1280 12:44:59.504308 DOMAIN: 0000 assign_resources, bus 0 link: 0
1281 12:44:59.512766 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1282 12:44:59.521379 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1283 12:44:59.529127 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1284 12:44:59.537374 PCI: 00:04.0 10 <- [0x00d1330000 - 0x00d1337fff] size 0x00008000 gran 0x0f mem64
1285 12:44:59.545525 PCI: 00:08.0 10 <- [0x00d1344000 - 0x00d1344fff] size 0x00001000 gran 0x0c mem64
1286 12:44:59.553731 PCI: 00:12.0 10 <- [0x00d1345000 - 0x00d1345fff] size 0x00001000 gran 0x0c mem64
1287 12:44:59.561941 PCI: 00:14.0 10 <- [0x00d1320000 - 0x00d132ffff] size 0x00010000 gran 0x10 mem64
1288 12:44:59.566485 PCI: 00:14.0 assign_resources, bus 0 link: 0
1289 12:44:59.571326 PCI: 00:14.0 assign_resources, bus 0 link: 0
1290 12:44:59.579759 PCI: 00:14.2 10 <- [0x00d1340000 - 0x00d1341fff] size 0x00002000 gran 0x0d mem64
1291 12:44:59.587480 PCI: 00:14.2 18 <- [0x00d1346000 - 0x00d1346fff] size 0x00001000 gran 0x0c mem64
1292 12:44:59.596119 PCI: 00:14.3 10 <- [0x00d1338000 - 0x00d133bfff] size 0x00004000 gran 0x0e mem64
1293 12:44:59.603965 PCI: 00:15.0 10 <- [0x00d1347000 - 0x00d1347fff] size 0x00001000 gran 0x0c mem64
1294 12:44:59.608851 PCI: 00:15.0 assign_resources, bus 1 link: 0
1295 12:44:59.613886 PCI: 00:15.0 assign_resources, bus 1 link: 0
1296 12:44:59.621790 PCI: 00:15.1 10 <- [0x00d1348000 - 0x00d1348fff] size 0x00001000 gran 0x0c mem64
1297 12:44:59.626118 PCI: 00:15.1 assign_resources, bus 2 link: 0
1298 12:44:59.631306 PCI: 00:15.1 assign_resources, bus 2 link: 0
1299 12:44:59.639357 PCI: 00:16.0 10 <- [0x00d1349000 - 0x00d1349fff] size 0x00001000 gran 0x0c mem64
1300 12:44:59.647715 PCI: 00:17.0 10 <- [0x00d1342000 - 0x00d1343fff] size 0x00002000 gran 0x0d mem
1301 12:44:59.655295 PCI: 00:17.0 14 <- [0x00d134f000 - 0x00d134f0ff] size 0x00000100 gran 0x08 mem
1302 12:44:59.662546 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1303 12:44:59.670649 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1304 12:44:59.678186 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1305 12:44:59.685557 PCI: 00:17.0 24 <- [0x00d134e000 - 0x00d134e7ff] size 0x00000800 gran 0x0b mem
1306 12:44:59.694564 PCI: 00:19.0 10 <- [0x00d134a000 - 0x00d134afff] size 0x00001000 gran 0x0c mem64
1307 12:44:59.702489 PCI: 00:19.0 18 <- [0x00d134b000 - 0x00d134bfff] size 0x00001000 gran 0x0c mem64
1308 12:44:59.706719 PCI: 00:19.0 assign_resources, bus 3 link: 0
1309 12:44:59.711496 PCI: 00:19.0 assign_resources, bus 3 link: 0
1310 12:44:59.719735 PCI: 00:19.2 18 <- [0x00d134c000 - 0x00d134cfff] size 0x00001000 gran 0x0c mem64
1311 12:44:59.728176 PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1312 12:44:59.737466 PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1313 12:44:59.745798 PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1314 12:44:59.750485 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1315 12:44:59.758240 PCI: 01:00.0 14 <- [0x00d1000000 - 0x00d1000fff] size 0x00001000 gran 0x0c mem
1316 12:44:59.763302 PCI: 00:1c.0 assign_resources, bus 1 link: 0
1317 12:44:59.771813 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 02 io
1318 12:44:59.780495 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
1319 12:44:59.789272 PCI: 00:1d.0 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 bus 02 mem
1320 12:44:59.793419 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1321 12:44:59.803274 PCI: 02:00.0 10 <- [0x00d1100000 - 0x00d1100fff] size 0x00001000 gran 0x0c mem
1322 12:44:59.812706 PCI: 02:00.0 14 <- [0x00d1101000 - 0x00d11017ff] size 0x00000800 gran 0x0b mem
1323 12:44:59.818933 PCI: 00:1d.0 assign_resources, bus 2 link: 0
1324 12:44:59.824305 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1325 12:44:59.829239 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1326 12:44:59.833415 LPC: Trying to open IO window from 930 size 8
1327 12:44:59.838472 LPC: Trying to open IO window from 940 size 8
1328 12:44:59.842982 LPC: Trying to open IO window from 950 size 10
1329 12:44:59.851307 PCI: 00:1f.3 10 <- [0x00d133c000 - 0x00d133ffff] size 0x00004000 gran 0x0e mem64
1330 12:44:59.859020 PCI: 00:1f.3 20 <- [0x00d1200000 - 0x00d12fffff] size 0x00100000 gran 0x14 mem64
1331 12:44:59.867297 PCI: 00:1f.4 10 <- [0x00d1350000 - 0x00d13500ff] size 0x00000100 gran 0x08 mem64
1332 12:44:59.875478 PCI: 00:1f.5 10 <- [0x00d134d000 - 0x00d134dfff] size 0x00001000 gran 0x0c mem
1333 12:44:59.883656 PCI: 00:1f.6 10 <- [0x00d1300000 - 0x00d131ffff] size 0x00020000 gran 0x11 mem
1334 12:44:59.888447 DOMAIN: 0000 assign_resources, bus 0 link: 0
1335 12:44:59.893275 Root Device assign_resources, bus 0 link: 0
1336 12:44:59.895832 Done setting resources.
1337 12:44:59.901956 Show resources in subtree (Root Device)...After assigning values.
1338 12:44:59.906589 Root Device child on link 0 CPU_CLUSTER: 0
1339 12:44:59.910812 CPU_CLUSTER: 0 child on link 0 APIC: 00
1340 12:44:59.912083 APIC: 00
1341 12:44:59.913320 APIC: 03
1342 12:44:59.914217 APIC: 06
1343 12:44:59.915829 APIC: 01
1344 12:44:59.917122 APIC: 02
1345 12:44:59.918331 APIC: 07
1346 12:44:59.919456 APIC: 05
1347 12:44:59.920692 APIC: 04
1348 12:44:59.924714 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1349 12:44:59.934584 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1350 12:44:59.946133 DOMAIN: 0000 resource base c0000000 size 11350100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1351 12:44:59.947821 PCI: 00:00.0
1352 12:44:59.957186 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1353 12:44:59.966582 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1354 12:44:59.975542 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1355 12:44:59.985004 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1356 12:44:59.994503 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1357 12:45:00.003869 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1358 12:45:00.013359 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1359 12:45:00.022105 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 7
1360 12:45:00.031534 PCI: 00:00.0 resource base c0000 size 89f40000 align 0 gran 0 limit 0 flags e0004200 index 8
1361 12:45:00.041214 PCI: 00:00.0 resource base 8a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index a
1362 12:45:00.050707 PCI: 00:00.0 resource base 8b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index b
1363 12:45:00.060676 PCI: 00:00.0 resource base 100000000 size 16e800000 align 0 gran 0 limit 0 flags e0004200 index c
1364 12:45:00.069760 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index d
1365 12:45:00.078756 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index e
1366 12:45:00.080524 PCI: 00:02.0
1367 12:45:00.091099 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1368 12:45:00.101693 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1369 12:45:00.110770 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1370 12:45:00.112529 PCI: 00:04.0
1371 12:45:00.123000 PCI: 00:04.0 resource base d1330000 size 8000 align 15 gran 15 limit d1337fff flags 60000201 index 10
1372 12:45:00.124562 PCI: 00:08.0
1373 12:45:00.135088 PCI: 00:08.0 resource base d1344000 size 1000 align 12 gran 12 limit d1344fff flags 60000201 index 10
1374 12:45:00.136780 PCI: 00:12.0
1375 12:45:00.146522 PCI: 00:12.0 resource base d1345000 size 1000 align 12 gran 12 limit d1345fff flags 60000201 index 10
1376 12:45:00.151403 PCI: 00:14.0 child on link 0 USB0 port 0
1377 12:45:00.161684 PCI: 00:14.0 resource base d1320000 size 10000 align 16 gran 16 limit d132ffff flags 60000201 index 10
1378 12:45:00.166227 USB0 port 0 child on link 0 USB2 port 0
1379 12:45:00.167787 USB2 port 0
1380 12:45:00.169389 USB2 port 1
1381 12:45:00.170758 USB2 port 2
1382 12:45:00.173239 USB2 port 4
1383 12:45:00.174701 USB2 port 5
1384 12:45:00.176437 USB2 port 6
1385 12:45:00.178244 USB2 port 7
1386 12:45:00.180234 USB2 port 8
1387 12:45:00.181870 USB2 port 9
1388 12:45:00.183114 USB3 port 0
1389 12:45:00.185118 USB3 port 1
1390 12:45:00.187211 USB3 port 2
1391 12:45:00.188887 USB3 port 3
1392 12:45:00.190655 USB3 port 4
1393 12:45:00.192204 PCI: 00:14.2
1394 12:45:00.202553 PCI: 00:14.2 resource base d1340000 size 2000 align 13 gran 13 limit d1341fff flags 60000201 index 10
1395 12:45:00.212641 PCI: 00:14.2 resource base d1346000 size 1000 align 12 gran 12 limit d1346fff flags 60000201 index 18
1396 12:45:00.214436 PCI: 00:14.3
1397 12:45:00.224574 PCI: 00:14.3 resource base d1338000 size 4000 align 14 gran 14 limit d133bfff flags 60000201 index 10
1398 12:45:00.229267 PCI: 00:15.0 child on link 0 I2C: 01:10
1399 12:45:00.239179 PCI: 00:15.0 resource base d1347000 size 1000 align 12 gran 12 limit d1347fff flags 60000201 index 10
1400 12:45:00.240837 I2C: 01:10
1401 12:45:00.242539 I2C: 01:10
1402 12:45:00.244173 I2C: 01:34
1403 12:45:00.248411 PCI: 00:15.1 child on link 0 I2C: 02:2c
1404 12:45:00.258592 PCI: 00:15.1 resource base d1348000 size 1000 align 12 gran 12 limit d1348fff flags 60000201 index 10
1405 12:45:00.260337 I2C: 02:2c
1406 12:45:00.261644 PCI: 00:16.0
1407 12:45:00.271828 PCI: 00:16.0 resource base d1349000 size 1000 align 12 gran 12 limit d1349fff flags 60000201 index 10
1408 12:45:00.273476 PCI: 00:17.0
1409 12:45:00.284037 PCI: 00:17.0 resource base d1342000 size 2000 align 13 gran 13 limit d1343fff flags 60000200 index 10
1410 12:45:00.294007 PCI: 00:17.0 resource base d134f000 size 100 align 12 gran 8 limit d134f0ff flags 60000200 index 14
1411 12:45:00.303262 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1412 12:45:00.312031 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1413 12:45:00.321013 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1414 12:45:00.331408 PCI: 00:17.0 resource base d134e000 size 800 align 12 gran 11 limit d134e7ff flags 60000200 index 24
1415 12:45:00.335745 PCI: 00:19.0 child on link 0 I2C: 03:50
1416 12:45:00.346233 PCI: 00:19.0 resource base d134a000 size 1000 align 12 gran 12 limit d134afff flags 60000201 index 10
1417 12:45:00.356341 PCI: 00:19.0 resource base d134b000 size 1000 align 12 gran 12 limit d134bfff flags 60000201 index 18
1418 12:45:00.357872 I2C: 03:50
1419 12:45:00.359280 PCI: 00:19.2
1420 12:45:00.370669 PCI: 00:19.2 resource base fe036000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1421 12:45:00.380875 PCI: 00:19.2 resource base d134c000 size 1000 align 12 gran 12 limit d134cfff flags 60000201 index 18
1422 12:45:00.385383 PCI: 00:1c.0 child on link 0 PCI: 01:00.0
1423 12:45:00.394753 PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1424 12:45:00.404477 PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1425 12:45:00.415047 PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1426 12:45:00.416862 PCI: 01:00.0
1427 12:45:00.427189 PCI: 01:00.0 resource base d1000000 size 1000 align 12 gran 12 limit d1000fff flags 60000200 index 14
1428 12:45:00.431978 PCI: 00:1d.0 child on link 0 PCI: 02:00.0
1429 12:45:00.440955 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1430 12:45:00.451070 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1431 12:45:00.461390 PCI: 00:1d.0 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60080202 index 20
1432 12:45:00.463018 PCI: 02:00.0
1433 12:45:00.473589 PCI: 02:00.0 resource base d1100000 size 1000 align 12 gran 12 limit d1100fff flags 60000200 index 10
1434 12:45:00.483651 PCI: 02:00.0 resource base d1101000 size 800 align 12 gran 11 limit d11017ff flags 60000200 index 14
1435 12:45:00.488220 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1436 12:45:00.496761 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1437 12:45:00.506045 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1438 12:45:00.507699 PNP: 0c09.0
1439 12:45:00.515762 PNP: 0c09.0 resource base 930 size 8 align 0 gran 0 limit 0 flags c0000100 index 0
1440 12:45:00.524719 PNP: 0c09.0 resource base 940 size 8 align 0 gran 0 limit 0 flags c0000100 index 1
1441 12:45:00.533199 PNP: 0c09.0 resource base 950 size 10 align 0 gran 0 limit 0 flags c0000100 index 2
1442 12:45:00.535085 PCI: 00:1f.3
1443 12:45:00.544718 PCI: 00:1f.3 resource base d133c000 size 4000 align 14 gran 14 limit d133ffff flags 60000201 index 10
1444 12:45:00.555335 PCI: 00:1f.3 resource base d1200000 size 100000 align 20 gran 20 limit d12fffff flags 60000201 index 20
1445 12:45:00.557299 PCI: 00:1f.4
1446 12:45:00.566521 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1447 12:45:00.576647 PCI: 00:1f.4 resource base d1350000 size 100 align 12 gran 8 limit d13500ff flags 60000201 index 10
1448 12:45:00.577994 PCI: 00:1f.5
1449 12:45:00.588703 PCI: 00:1f.5 resource base d134d000 size 1000 align 12 gran 12 limit d134dfff flags 60000200 index 10
1450 12:45:00.589980 PCI: 00:1f.6
1451 12:45:00.600563 PCI: 00:1f.6 resource base d1300000 size 20000 align 17 gran 17 limit d131ffff flags 60000200 index 10
1452 12:45:00.603395 Done allocating resources.
1453 12:45:00.609307 BS: BS_DEV_RESOURCES times (us): entry 0 run 2548792 exit 14
1454 12:45:00.611872 Enabling resources...
1455 12:45:00.616717 PCI: 00:00.0 subsystem <- 1028/3e34
1456 12:45:00.618902 PCI: 00:00.0 cmd <- 06
1457 12:45:00.622874 PCI: 00:02.0 subsystem <- 1028/3ea0
1458 12:45:00.625137 PCI: 00:02.0 cmd <- 03
1459 12:45:00.629063 PCI: 00:04.0 subsystem <- 1028/1903
1460 12:45:00.631006 PCI: 00:04.0 cmd <- 02
1461 12:45:00.634275 PCI: 00:08.0 cmd <- 06
1462 12:45:00.638224 PCI: 00:12.0 subsystem <- 1028/9df9
1463 12:45:00.640453 PCI: 00:12.0 cmd <- 02
1464 12:45:00.644064 PCI: 00:14.0 subsystem <- 1028/9ded
1465 12:45:00.646424 PCI: 00:14.0 cmd <- 02
1466 12:45:00.649224 PCI: 00:14.2 cmd <- 02
1467 12:45:00.653230 PCI: 00:14.3 subsystem <- 1028/9df0
1468 12:45:00.655573 PCI: 00:14.3 cmd <- 02
1469 12:45:00.659383 PCI: 00:15.0 subsystem <- 1028/9de8
1470 12:45:00.661697 PCI: 00:15.0 cmd <- 02
1471 12:45:00.665750 PCI: 00:15.1 subsystem <- 1028/9de9
1472 12:45:00.668205 PCI: 00:15.1 cmd <- 02
1473 12:45:00.671866 PCI: 00:16.0 subsystem <- 1028/9de0
1474 12:45:00.673943 PCI: 00:16.0 cmd <- 02
1475 12:45:00.677629 PCI: 00:17.0 subsystem <- 1028/9dd3
1476 12:45:00.680592 PCI: 00:17.0 cmd <- 03
1477 12:45:00.684107 PCI: 00:19.0 subsystem <- 1028/9dc5
1478 12:45:00.686488 PCI: 00:19.0 cmd <- 06
1479 12:45:00.690560 PCI: 00:19.2 subsystem <- 1028/9dc7
1480 12:45:00.693046 PCI: 00:19.2 cmd <- 06
1481 12:45:00.696687 PCI: 00:1c.0 bridge ctrl <- 0003
1482 12:45:00.699846 PCI: 00:1c.0 subsystem <- 1028/9dbf
1483 12:45:00.702992 Capability: type 0x10 @ 0x40
1484 12:45:00.705787 Capability: type 0x05 @ 0x80
1485 12:45:00.708871 Capability: type 0x0d @ 0x90
1486 12:45:00.710948 PCI: 00:1c.0 cmd <- 06
1487 12:45:00.714923 PCI: 00:1d.0 bridge ctrl <- 0003
1488 12:45:00.718569 PCI: 00:1d.0 subsystem <- 1028/9db4
1489 12:45:00.721267 Capability: type 0x10 @ 0x40
1490 12:45:00.724452 Capability: type 0x05 @ 0x80
1491 12:45:00.727202 Capability: type 0x0d @ 0x90
1492 12:45:00.729339 PCI: 00:1d.0 cmd <- 06
1493 12:45:00.733172 PCI: 00:1f.0 subsystem <- 1028/9d84
1494 12:45:00.735872 PCI: 00:1f.0 cmd <- 407
1495 12:45:00.739952 PCI: 00:1f.3 subsystem <- 1028/9dc8
1496 12:45:00.741997 PCI: 00:1f.3 cmd <- 02
1497 12:45:00.746295 PCI: 00:1f.4 subsystem <- 1028/9da3
1498 12:45:00.748563 PCI: 00:1f.4 cmd <- 03
1499 12:45:00.752368 PCI: 00:1f.5 subsystem <- 1028/9da4
1500 12:45:00.754559 PCI: 00:1f.5 cmd <- 406
1501 12:45:00.758879 PCI: 00:1f.6 subsystem <- 1028/15be
1502 12:45:00.760675 PCI: 00:1f.6 cmd <- 02
1503 12:45:00.771514 PCI: 01:00.0 cmd <- 02
1504 12:45:00.776340 PCI: 02:00.0 cmd <- 06
1505 12:45:00.779993 done.
1506 12:45:00.786228 BS: BS_DEV_ENABLE times (us): entry 399 run 170425 exit 0
1507 12:45:00.788624 Initializing devices...
1508 12:45:00.790310 Root Device init ...
1509 12:45:00.794794 Root Device init finished in 2138 usecs
1510 12:45:00.797423 CPU_CLUSTER: 0 init ...
1511 12:45:00.801745 CPU_CLUSTER: 0 init finished in 2429 usecs
1512 12:45:00.807655 PCI: 00:00.0 init ...
1513 12:45:00.810503 CPU TDP: 15 Watts
1514 12:45:00.812410 CPU PL2 = 51 Watts
1515 12:45:00.817119 PCI: 00:00.0 init finished in 7034 usecs
1516 12:45:00.819272 PCI: 00:02.0 init ...
1517 12:45:00.823497 PCI: 00:02.0 init finished in 2235 usecs
1518 12:45:00.826228 PCI: 00:04.0 init ...
1519 12:45:00.830000 PCI: 00:04.0 init finished in 2235 usecs
1520 12:45:00.832812 PCI: 00:08.0 init ...
1521 12:45:00.837250 PCI: 00:08.0 init finished in 2235 usecs
1522 12:45:00.839582 PCI: 00:12.0 init ...
1523 12:45:00.843953 PCI: 00:12.0 init finished in 2235 usecs
1524 12:45:00.846330 PCI: 00:14.0 init ...
1525 12:45:00.850154 PCI: 00:14.0 init finished in 2235 usecs
1526 12:45:00.852784 PCI: 00:14.2 init ...
1527 12:45:00.856839 PCI: 00:14.2 init finished in 2235 usecs
1528 12:45:00.859813 PCI: 00:14.3 init ...
1529 12:45:00.864086 PCI: 00:14.3 init finished in 2240 usecs
1530 12:45:00.866153 PCI: 00:15.0 init ...
1531 12:45:00.869912 DW I2C bus 0 at 0xd1347000 (400 KHz)
1532 12:45:00.873884 PCI: 00:15.0 init finished in 5931 usecs
1533 12:45:00.877019 PCI: 00:15.1 init ...
1534 12:45:00.880658 DW I2C bus 1 at 0xd1348000 (400 KHz)
1535 12:45:00.884711 PCI: 00:15.1 init finished in 5932 usecs
1536 12:45:00.887201 PCI: 00:16.0 init ...
1537 12:45:00.891691 PCI: 00:16.0 init finished in 2235 usecs
1538 12:45:00.894704 PCI: 00:19.0 init ...
1539 12:45:00.898324 DW I2C bus 4 at 0xd134a000 (400 KHz)
1540 12:45:00.902203 PCI: 00:19.0 init finished in 5922 usecs
1541 12:45:00.905485 PCI: 00:1c.0 init ...
1542 12:45:00.908424 Initializing PCH PCIe bridge.
1543 12:45:00.912328 PCI: 00:1c.0 init finished in 5246 usecs
1544 12:45:00.914752 PCI: 00:1d.0 init ...
1545 12:45:00.917831 Initializing PCH PCIe bridge.
1546 12:45:00.922254 PCI: 00:1d.0 init finished in 5246 usecs
1547 12:45:00.924729 PCI: 00:1f.0 init ...
1548 12:45:00.928828 IOAPIC: Initializing IOAPIC at 0xfec00000
1549 12:45:00.933509 IOAPIC: Bootstrap Processor Local APIC = 0x00
1550 12:45:00.935600 IOAPIC: ID = 0x02
1551 12:45:00.937785 IOAPIC: Dumping registers
1552 12:45:00.940438 reg 0x0000: 0x02000000
1553 12:45:00.942940 reg 0x0001: 0x00770020
1554 12:45:00.945449 reg 0x0002: 0x00000000
1555 12:45:00.951730 PCI: 00:1f.0 init finished in 25021 usecs
1556 12:45:00.954156 PCI: 00:1f.3 init ...
1557 12:45:00.959395 HDA: codec_mask = 05
1558 12:45:00.962212 HDA: Initializing codec #2
1559 12:45:00.964827 HDA: codec viddid: 8086280b
1560 12:45:00.968245 HDA: No verb table entry found
1561 12:45:00.971142 HDA: Initializing codec #0
1562 12:45:00.973997 HDA: codec viddid: 10ec0236
1563 12:45:00.980693 HDA: verb loaded.
1564 12:45:00.984839 PCI: 00:1f.3 init finished in 28812 usecs
1565 12:45:00.987858 PCI: 00:1f.4 init ...
1566 12:45:00.991623 PCI: 00:1f.4 init finished in 2245 usecs
1567 12:45:00.994631 PCI: 00:1f.6 init ...
1568 12:45:00.999092 PCI: 00:1f.6 init finished in 2236 usecs
1569 12:45:01.010057 PCI: 01:00.0 init ...
1570 12:45:01.014502 PCI: 01:00.0 init finished in 2235 usecs
1571 12:45:01.017133 PCI: 02:00.0 init ...
1572 12:45:01.020887 PCI: 02:00.0 init finished in 2235 usecs
1573 12:45:01.023308 PNP: 0c09.0 init ...
1574 12:45:01.027539 EC Label : 00.00.20
1575 12:45:01.031025 EC Revision : 9ca674bba
1576 12:45:01.034583 EC Model Num : 08B9
1577 12:45:01.038753 EC Build Date : 05/10/19
1578 12:45:01.046997 PNP: 0c09.0 init finished in 21716 usecs
1579 12:45:01.049126 Devices initialized
1580 12:45:01.052635 Show all devs... After init.
1581 12:45:01.054414 Root Device: enabled 1
1582 12:45:01.057228 CPU_CLUSTER: 0: enabled 1
1583 12:45:01.059675 DOMAIN: 0000: enabled 1
1584 12:45:01.062136 APIC: 00: enabled 1
1585 12:45:01.064373 PCI: 00:00.0: enabled 1
1586 12:45:01.066639 PCI: 00:02.0: enabled 1
1587 12:45:01.068946 PCI: 00:04.0: enabled 1
1588 12:45:01.071207 PCI: 00:12.0: enabled 1
1589 12:45:01.074005 PCI: 00:12.5: enabled 0
1590 12:45:01.076344 PCI: 00:12.6: enabled 0
1591 12:45:01.078712 PCI: 00:13.0: enabled 0
1592 12:45:01.081546 PCI: 00:14.0: enabled 1
1593 12:45:01.083538 PCI: 00:14.1: enabled 0
1594 12:45:01.086043 PCI: 00:14.3: enabled 1
1595 12:45:01.088610 PCI: 00:14.5: enabled 0
1596 12:45:01.091219 PCI: 00:15.0: enabled 1
1597 12:45:01.092890 PCI: 00:15.1: enabled 1
1598 12:45:01.095970 PCI: 00:15.2: enabled 0
1599 12:45:01.097949 PCI: 00:15.3: enabled 0
1600 12:45:01.100840 PCI: 00:16.0: enabled 1
1601 12:45:01.103196 PCI: 00:16.1: enabled 0
1602 12:45:01.105514 PCI: 00:16.2: enabled 0
1603 12:45:01.108160 PCI: 00:16.3: enabled 0
1604 12:45:01.110767 PCI: 00:16.4: enabled 0
1605 12:45:01.113177 PCI: 00:16.5: enabled 0
1606 12:45:01.115575 PCI: 00:17.0: enabled 1
1607 12:45:01.117855 PCI: 00:19.0: enabled 1
1608 12:45:01.120464 PCI: 00:19.1: enabled 0
1609 12:45:01.122607 PCI: 00:19.2: enabled 1
1610 12:45:01.125197 PCI: 00:1a.0: enabled 0
1611 12:45:01.127181 PCI: 00:1c.0: enabled 1
1612 12:45:01.129696 PCI: 00:1c.1: enabled 0
1613 12:45:01.132148 PCI: 00:1c.2: enabled 0
1614 12:45:01.135007 PCI: 00:1c.3: enabled 0
1615 12:45:01.137477 PCI: 00:1c.4: enabled 0
1616 12:45:01.139588 PCI: 00:1c.5: enabled 0
1617 12:45:01.142083 PCI: 00:1c.6: enabled 0
1618 12:45:01.144573 PCI: 00:1c.7: enabled 0
1619 12:45:01.146582 PCI: 00:1d.0: enabled 1
1620 12:45:01.148887 PCI: 00:1d.1: enabled 0
1621 12:45:01.151821 PCI: 00:1d.2: enabled 0
1622 12:45:01.154426 PCI: 00:1d.3: enabled 0
1623 12:45:01.156636 PCI: 00:1d.4: enabled 0
1624 12:45:01.159250 PCI: 00:1e.0: enabled 0
1625 12:45:01.161755 PCI: 00:1e.1: enabled 0
1626 12:45:01.163702 PCI: 00:1e.2: enabled 0
1627 12:45:01.166244 PCI: 00:1e.3: enabled 0
1628 12:45:01.168574 PCI: 00:1f.0: enabled 1
1629 12:45:01.171392 PCI: 00:1f.1: enabled 0
1630 12:45:01.173626 PCI: 00:1f.2: enabled 0
1631 12:45:01.175882 PCI: 00:1f.3: enabled 1
1632 12:45:01.178059 PCI: 00:1f.4: enabled 1
1633 12:45:01.180744 PCI: 00:1f.5: enabled 1
1634 12:45:01.183276 PCI: 00:1f.6: enabled 1
1635 12:45:01.185460 USB0 port 0: enabled 1
1636 12:45:01.187857 I2C: 01:10: enabled 1
1637 12:45:01.190090 I2C: 01:10: enabled 1
1638 12:45:01.191851 I2C: 01:34: enabled 1
1639 12:45:01.194548 I2C: 02:2c: enabled 1
1640 12:45:01.196565 I2C: 03:50: enabled 1
1641 12:45:01.198857 PNP: 0c09.0: enabled 1
1642 12:45:01.200882 USB2 port 0: enabled 1
1643 12:45:01.203418 USB2 port 1: enabled 1
1644 12:45:01.205594 USB2 port 2: enabled 1
1645 12:45:01.208085 USB2 port 4: enabled 1
1646 12:45:01.210490 USB2 port 5: enabled 1
1647 12:45:01.212803 USB2 port 6: enabled 1
1648 12:45:01.215462 USB2 port 7: enabled 1
1649 12:45:01.217019 USB2 port 8: enabled 1
1650 12:45:01.220026 USB2 port 9: enabled 1
1651 12:45:01.222020 USB3 port 0: enabled 1
1652 12:45:01.224220 USB3 port 1: enabled 1
1653 12:45:01.227103 USB3 port 2: enabled 1
1654 12:45:01.229443 USB3 port 3: enabled 1
1655 12:45:01.231389 USB3 port 4: enabled 1
1656 12:45:01.233478 APIC: 03: enabled 1
1657 12:45:01.235871 APIC: 06: enabled 1
1658 12:45:01.237465 APIC: 01: enabled 1
1659 12:45:01.239488 APIC: 02: enabled 1
1660 12:45:01.241628 APIC: 07: enabled 1
1661 12:45:01.243759 APIC: 05: enabled 1
1662 12:45:01.245802 APIC: 04: enabled 1
1663 12:45:01.248300 PCI: 00:08.0: enabled 1
1664 12:45:01.250273 PCI: 00:14.2: enabled 1
1665 12:45:01.252867 PCI: 01:00.0: enabled 1
1666 12:45:01.255314 PCI: 02:00.0: enabled 1
1667 12:45:01.260512 Disabling ACPI via APMC:
1668 12:45:01.262760 done.
1669 12:45:01.267599 FMAP: area RW_ELOG found @ 1bf0000 (16384 bytes)
1670 12:45:01.271392 ELOG: NV offset 0x1bf0000 size 0x4000
1671 12:45:01.279136 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1672 12:45:01.285220 ELOG: Event(17) added with size 13 at 2023-03-22 12:45:00 UTC
1673 12:45:01.290491 POST: Unexpected post code in previous boot: 0x73
1674 12:45:01.297168 ELOG: Event(A3) added with size 11 at 2023-03-22 12:45:00 UTC
1675 12:45:01.302943 ELOG: Event(92) added with size 9 at 2023-03-22 12:45:00 UTC
1676 12:45:01.309280 ELOG: Event(93) added with size 9 at 2023-03-22 12:45:00 UTC
1677 12:45:01.315912 ELOG: Event(9A) added with size 9 at 2023-03-22 12:45:00 UTC
1678 12:45:01.321798 ELOG: Event(9E) added with size 10 at 2023-03-22 12:45:00 UTC
1679 12:45:01.328242 ELOG: Event(9F) added with size 14 at 2023-03-22 12:45:00 UTC
1680 12:45:01.334099 BS: BS_DEV_INIT times (us): entry 0 run 469537 exit 72475
1681 12:45:01.340912 ELOG: Event(A1) added with size 10 at 2023-03-22 12:45:00 UTC
1682 12:45:01.348701 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1683 12:45:01.354342 ELOG: Event(A0) added with size 9 at 2023-03-22 12:45:00 UTC
1684 12:45:01.359015 elog_add_boot_reason: Logged dev mode boot
1685 12:45:01.361670 Finalize devices...
1686 12:45:01.363246 PCI: 00:17.0 final
1687 12:45:01.365204 Devices finalized
1688 12:45:01.370352 FMAP: area RW_NVRAM found @ 1bfa000 (24576 bytes)
1689 12:45:01.376750 BS: BS_POST_DEVICE times (us): entry 24766 run 5933 exit 5357
1690 12:45:01.381978 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 96 exit 0
1691 12:45:01.390572 disable_unused_touchscreen: VPD key 'touchscreen_hid' not found, default to ELAN900C
1692 12:45:01.395210 disable_unused_touchscreen: Disable ACPI0C50
1693 12:45:01.399632 disable_unused_touchscreen: Enable ELAN900C
1694 12:45:01.402241 CBFS @ 1d00000 size 300000
1695 12:45:01.408753 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1696 12:45:01.412183 CBFS: Locating 'fallback/dsdt.aml'
1697 12:45:01.416420 CBFS: Found @ offset 10b200 size 4448
1698 12:45:01.419033 CBFS @ 1d00000 size 300000
1699 12:45:01.425370 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1700 12:45:01.428328 CBFS: Locating 'fallback/slic'
1701 12:45:01.433597 CBFS: 'fallback/slic' not found.
1702 12:45:01.437347 ACPI: Writing ACPI tables at 89c0f000.
1703 12:45:01.438506 ACPI: * FACS
1704 12:45:01.440381 ACPI: * DSDT
1705 12:45:01.444156 Ramoops buffer: 0x100000@0x89b0e000.
1706 12:45:01.449033 FMAP: area RO_VPD found @ 1c00000 (16384 bytes)
1707 12:45:01.453651 FMAP: area RW_VPD found @ 1bf8000 (8192 bytes)
1708 12:45:01.457690 ACPI: * FADT
1709 12:45:01.458556 SCI is IRQ9
1710 12:45:01.462530 ACPI: added table 1/32, length now 40
1711 12:45:01.464189 ACPI: * SSDT
1712 12:45:01.467955 Found 1 CPU(s) with 8 core(s) each.
1713 12:45:01.472181 Error: Could not locate 'wifi_sar' in VPD.
1714 12:45:01.476346 Error: failed from getting SAR limits!
1715 12:45:01.479666 \_SB.PCI0.WIFI: Intel WiFi PCI: 00:14.3
1716 12:45:01.484143 dw_i2c: bad counts. hcnt = -14 lcnt = 30
1717 12:45:01.487803 dw_i2c: bad counts. hcnt = -20 lcnt = 40
1718 12:45:01.492187 dw_i2c: bad counts. hcnt = -18 lcnt = 48
1719 12:45:01.497546 \_SB.PCI0.I2C0.H010: ELAN Touchscreen at I2C: 01:10
1720 12:45:01.502687 \_SB.PCI0.I2C0.D034: Melfas Touchscreen at I2C: 01:34
1721 12:45:01.507451 \_SB.PCI0.I2C1.D02C: ELAN Touchpad at I2C: 02:2c
1722 12:45:01.511839 \_SB.PCI0.I2C4.TPMI: I2C TPM at I2C: 03:50
1723 12:45:01.517807 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1724 12:45:01.523396 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-A Port 1 at USB2 port 1
1725 12:45:01.529422 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1726 12:45:01.535518 \_SB.PCI0.XHCI.RHUB.HS05: Right Type-A Port 2 at USB2 port 4
1727 12:45:01.539771 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1728 12:45:01.544482 \_SB.PCI0.XHCI.RHUB.HS07: WWAN at USB2 port 6
1729 12:45:01.548746 \_SB.PCI0.XHCI.RHUB.HS08: USH at USB2 port 7
1730 12:45:01.554552 \_SB.PCI0.XHCI.RHUB.HS09: Fingerprint at USB2 port 8
1731 12:45:01.559538 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1732 12:45:01.565008 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1733 12:45:01.571410 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-A Port 1 at USB3 port 1
1734 12:45:01.576751 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1735 12:45:01.582895 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 2 at USB3 port 3
1736 12:45:01.587533 \_SB.PCI0.XHCI.RHUB.SS05: WWAN at USB3 port 4
1737 12:45:01.591156 ACPI: added table 2/32, length now 44
1738 12:45:01.592924 ACPI: * MCFG
1739 12:45:01.596822 ACPI: added table 3/32, length now 48
1740 12:45:01.598426 ACPI: * TPM2
1741 12:45:01.600912 TPM2 log created at 89afe000
1742 12:45:01.604940 ACPI: added table 4/32, length now 52
1743 12:45:01.606575 ACPI: * MADT
1744 12:45:01.608241 SCI is IRQ9
1745 12:45:01.611820 ACPI: added table 5/32, length now 56
1746 12:45:01.613375 current = 89c14bd0
1747 12:45:01.616134 ACPI: * IGD OpRegion
1748 12:45:01.618581 GMA: Found VBT in CBFS
1749 12:45:01.621544 GMA: Found valid VBT in CBFS
1750 12:45:01.624858 ACPI: added table 6/32, length now 60
1751 12:45:01.626834 ACPI: * HPET
1752 12:45:01.630422 ACPI: added table 7/32, length now 64
1753 12:45:01.631938 ACPI: done.
1754 12:45:01.634625 ACPI tables: 31872 bytes.
1755 12:45:01.637500 smbios_write_tables: 89afd000
1756 12:45:01.639646 recv_ec_data: 0x01
1757 12:45:01.642050 Create SMBIOS type 17
1758 12:45:01.644814 PCI: 00:14.3 (Intel WiFi)
1759 12:45:01.647290 SMBIOS tables: 708 bytes.
1760 12:45:01.651481 Writing table forward entry at 0x00000500
1761 12:45:01.657735 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 461b
1762 12:45:01.661408 Writing coreboot table at 0x89c33000
1763 12:45:01.667321 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1764 12:45:01.671331 1. 0000000000001000-000000000009ffff: RAM
1765 12:45:01.676289 2. 00000000000a0000-00000000000fffff: RESERVED
1766 12:45:01.680448 3. 0000000000100000-0000000089afcfff: RAM
1767 12:45:01.686196 4. 0000000089afd000-0000000089c80fff: CONFIGURATION TABLES
1768 12:45:01.691077 5. 0000000089c81000-0000000089cdbfff: RAMSTAGE
1769 12:45:01.697363 6. 0000000089cdc000-0000000089ffffff: CONFIGURATION TABLES
1770 12:45:01.701915 7. 000000008a000000-000000008f7fffff: RESERVED
1771 12:45:01.706207 8. 00000000e0000000-00000000efffffff: RESERVED
1772 12:45:01.711720 9. 00000000fc000000-00000000fc000fff: RESERVED
1773 12:45:01.716040 10. 00000000fe000000-00000000fe00ffff: RESERVED
1774 12:45:01.721053 11. 00000000fed10000-00000000fed17fff: RESERVED
1775 12:45:01.725330 12. 00000000fed80000-00000000fed83fff: RESERVED
1776 12:45:01.730387 13. 00000000feda0000-00000000feda1fff: RESERVED
1777 12:45:01.734682 14. 0000000100000000-000000026e7fffff: RAM
1778 12:45:01.738888 Graphics framebuffer located at 0xc0000000
1779 12:45:01.741850 Passing 6 GPIOs to payload:
1780 12:45:01.747185 NAME | PORT | POLARITY | VALUE
1781 12:45:01.752275 write protect | 0x000000dc | high | high
1782 12:45:01.757419 recovery | 0x000000d5 | low | high
1783 12:45:01.762982 lid | undefined | high | high
1784 12:45:01.767887 power | undefined | high | low
1785 12:45:01.773230 oprom | undefined | high | low
1786 12:45:01.778805 EC in RW | undefined | high | low
1787 12:45:01.780749 recv_ec_data: 0x01
1788 12:45:01.781953 SKU ID: 3
1789 12:45:01.784901 CBFS @ 1d00000 size 300000
1790 12:45:01.790996 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1791 12:45:01.797255 Wrote coreboot table at: 89c33000, 0x5b4 bytes, checksum a344
1792 12:45:01.799841 coreboot table: 1484 bytes.
1793 12:45:01.803150 IMD ROOT 0. 89fff000 00001000
1794 12:45:01.806382 IMD SMALL 1. 89ffe000 00001000
1795 12:45:01.810120 FSP MEMORY 2. 89d0e000 002f0000
1796 12:45:01.813300 CONSOLE 3. 89cee000 00020000
1797 12:45:01.816591 TIME STAMP 4. 89ced000 00000910
1798 12:45:01.819802 VBOOT WORK 5. 89cea000 00003000
1799 12:45:01.823167 VBOOT 6. 89ce9000 00000c0c
1800 12:45:01.826594 MRC DATA 7. 89ce7000 000018f0
1801 12:45:01.829917 ROMSTG STCK 8. 89ce6000 00000400
1802 12:45:01.833196 AFTER CAR 9. 89cdc000 0000a000
1803 12:45:01.836521 RAMSTAGE 10. 89c80000 0005c000
1804 12:45:01.839690 REFCODE 11. 89c4b000 00035000
1805 12:45:01.843090 SMM BACKUP 12. 89c3b000 00010000
1806 12:45:01.846386 COREBOOT 13. 89c33000 00008000
1807 12:45:01.849671 ACPI 14. 89c0f000 00024000
1808 12:45:01.852897 ACPI GNVS 15. 89c0e000 00001000
1809 12:45:01.856050 RAMOOPS 16. 89b0e000 00100000
1810 12:45:01.859418 TPM2 TCGLOG17. 89afe000 00010000
1811 12:45:01.862909 SMBIOS 18. 89afd000 00000800
1812 12:45:01.864755 IMD small region:
1813 12:45:01.868145 IMD ROOT 0. 89ffec00 00000400
1814 12:45:01.871555 FSP RUNTIME 1. 89ffebe0 00000004
1815 12:45:01.875089 POWER STATE 2. 89ffeba0 00000040
1816 12:45:01.878819 ROMSTAGE 3. 89ffeb80 00000004
1817 12:45:01.882323 MEM INFO 4. 89ffe9c0 000001a9
1818 12:45:01.885841 VPD 5. 89ffe980 00000031
1819 12:45:01.888828 COREBOOTFWD 6. 89ffe940 00000028
1820 12:45:01.892108 MTRR: Physical address space:
1821 12:45:01.898755 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1822 12:45:01.904761 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1823 12:45:01.910887 0x00000000000c0000 - 0x000000008b000000 size 0x8af40000 type 6
1824 12:45:01.917146 0x000000008b000000 - 0x00000000c0000000 size 0x35000000 type 0
1825 12:45:01.923304 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1826 12:45:01.929544 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1827 12:45:01.935792 0x0000000100000000 - 0x000000026e800000 size 0x16e800000 type 6
1828 12:45:01.939891 MTRR: Fixed MSR 0x250 0x0606060606060606
1829 12:45:01.943514 MTRR: Fixed MSR 0x258 0x0606060606060606
1830 12:45:01.948177 MTRR: Fixed MSR 0x259 0x0000000000000000
1831 12:45:01.952213 MTRR: Fixed MSR 0x268 0x0606060606060606
1832 12:45:01.956366 MTRR: Fixed MSR 0x269 0x0606060606060606
1833 12:45:01.960418 MTRR: Fixed MSR 0x26a 0x0606060606060606
1834 12:45:01.964433 MTRR: Fixed MSR 0x26b 0x0606060606060606
1835 12:45:01.968331 MTRR: Fixed MSR 0x26c 0x0606060606060606
1836 12:45:01.972467 MTRR: Fixed MSR 0x26d 0x0606060606060606
1837 12:45:01.976555 MTRR: Fixed MSR 0x26e 0x0606060606060606
1838 12:45:01.980796 MTRR: Fixed MSR 0x26f 0x0606060606060606
1839 12:45:01.983984 call enable_fixed_mtrr()
1840 12:45:01.987653 CPU physical address size: 39 bits
1841 12:45:01.991793 MTRR: default type WB/UC MTRR counts: 7/7.
1842 12:45:01.995237 MTRR: UC selected as default type.
1843 12:45:02.001574 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1844 12:45:02.007837 MTRR: 1 base 0x0000000080000000 mask 0x0000007ff8000000 type 6
1845 12:45:02.013764 MTRR: 2 base 0x0000000088000000 mask 0x0000007ffe000000 type 6
1846 12:45:02.020152 MTRR: 3 base 0x000000008a000000 mask 0x0000007fff000000 type 6
1847 12:45:02.026243 MTRR: 4 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1848 12:45:02.032909 MTRR: 5 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1849 12:45:02.038941 MTRR: 6 base 0x0000000200000000 mask 0x0000007f80000000 type 6
1850 12:45:02.039699
1851 12:45:02.040840 MTRR check
1852 12:45:02.043612 Fixed MTRRs : Enabled
1853 12:45:02.046107 Variable MTRRs: Enabled
1854 12:45:02.046183
1855 12:45:02.050208 MTRR: Fixed MSR 0x250 0x0606060606060606
1856 12:45:02.054081 MTRR: Fixed MSR 0x258 0x0606060606060606
1857 12:45:02.058393 MTRR: Fixed MSR 0x259 0x0000000000000000
1858 12:45:02.062462 MTRR: Fixed MSR 0x268 0x0606060606060606
1859 12:45:02.066198 MTRR: Fixed MSR 0x269 0x0606060606060606
1860 12:45:02.070339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1861 12:45:02.074809 MTRR: Fixed MSR 0x26b 0x0606060606060606
1862 12:45:02.078797 MTRR: Fixed MSR 0x26c 0x0606060606060606
1863 12:45:02.082897 MTRR: Fixed MSR 0x26d 0x0606060606060606
1864 12:45:02.087119 MTRR: Fixed MSR 0x26e 0x0606060606060606
1865 12:45:02.091170 MTRR: Fixed MSR 0x26f 0x0606060606060606
1866 12:45:02.097918 BS: BS_WRITE_TABLES times (us): entry 17190 run 490085 exit 157068
1867 12:45:02.100227 call enable_fixed_mtrr()
1868 12:45:02.102981 CBFS @ 1d00000 size 300000
1869 12:45:02.109684 CBFS: 'Master Header Locator' located CBFS at [1d00000:2000000)
1870 12:45:02.112973 CPU physical address size: 39 bits
1871 12:45:02.116720 CBFS: Locating 'fallback/payload'
1872 12:45:02.120992 MTRR: Fixed MSR 0x250 0x0606060606060606
1873 12:45:02.124745 MTRR: Fixed MSR 0x250 0x0606060606060606
1874 12:45:02.128916 MTRR: Fixed MSR 0x258 0x0606060606060606
1875 12:45:02.133124 MTRR: Fixed MSR 0x259 0x0000000000000000
1876 12:45:02.137393 MTRR: Fixed MSR 0x268 0x0606060606060606
1877 12:45:02.141425 MTRR: Fixed MSR 0x269 0x0606060606060606
1878 12:45:02.145149 MTRR: Fixed MSR 0x26a 0x0606060606060606
1879 12:45:02.149034 MTRR: Fixed MSR 0x26b 0x0606060606060606
1880 12:45:02.153477 MTRR: Fixed MSR 0x26c 0x0606060606060606
1881 12:45:02.157581 MTRR: Fixed MSR 0x26d 0x0606060606060606
1882 12:45:02.161115 MTRR: Fixed MSR 0x26e 0x0606060606060606
1883 12:45:02.165806 MTRR: Fixed MSR 0x26f 0x0606060606060606
1884 12:45:02.169832 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 12:45:02.172618 call enable_fixed_mtrr()
1886 12:45:02.176676 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:45:02.180715 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:45:02.185153 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:45:02.189122 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:45:02.193269 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:45:02.197414 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:45:02.201472 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:45:02.205634 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:45:02.209634 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:45:02.213539 CPU physical address size: 39 bits
1896 12:45:02.216516 call enable_fixed_mtrr()
1897 12:45:02.220308 MTRR: Fixed MSR 0x250 0x0606060606060606
1898 12:45:02.224038 MTRR: Fixed MSR 0x250 0x0606060606060606
1899 12:45:02.228488 MTRR: Fixed MSR 0x258 0x0606060606060606
1900 12:45:02.232741 MTRR: Fixed MSR 0x259 0x0000000000000000
1901 12:45:02.236472 MTRR: Fixed MSR 0x268 0x0606060606060606
1902 12:45:02.240343 MTRR: Fixed MSR 0x269 0x0606060606060606
1903 12:45:02.244915 MTRR: Fixed MSR 0x26a 0x0606060606060606
1904 12:45:02.249080 MTRR: Fixed MSR 0x26b 0x0606060606060606
1905 12:45:02.253078 MTRR: Fixed MSR 0x26c 0x0606060606060606
1906 12:45:02.256658 MTRR: Fixed MSR 0x26d 0x0606060606060606
1907 12:45:02.261198 MTRR: Fixed MSR 0x26e 0x0606060606060606
1908 12:45:02.265405 MTRR: Fixed MSR 0x26f 0x0606060606060606
1909 12:45:02.269657 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 12:45:02.272266 call enable_fixed_mtrr()
1911 12:45:02.276399 MTRR: Fixed MSR 0x259 0x0000000000000000
1912 12:45:02.280207 MTRR: Fixed MSR 0x268 0x0606060606060606
1913 12:45:02.284681 MTRR: Fixed MSR 0x269 0x0606060606060606
1914 12:45:02.288368 MTRR: Fixed MSR 0x26a 0x0606060606060606
1915 12:45:02.292791 MTRR: Fixed MSR 0x26b 0x0606060606060606
1916 12:45:02.296876 MTRR: Fixed MSR 0x26c 0x0606060606060606
1917 12:45:02.300229 MTRR: Fixed MSR 0x26d 0x0606060606060606
1918 12:45:02.304792 MTRR: Fixed MSR 0x26e 0x0606060606060606
1919 12:45:02.308916 MTRR: Fixed MSR 0x26f 0x0606060606060606
1920 12:45:02.312620 CPU physical address size: 39 bits
1921 12:45:02.315532 call enable_fixed_mtrr()
1922 12:45:02.319642 MTRR: Fixed MSR 0x250 0x0606060606060606
1923 12:45:02.323755 MTRR: Fixed MSR 0x250 0x0606060606060606
1924 12:45:02.327921 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 12:45:02.331912 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 12:45:02.336125 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 12:45:02.340376 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 12:45:02.343629 MTRR: Fixed MSR 0x26a 0x0606060606060606
1929 12:45:02.348219 MTRR: Fixed MSR 0x26b 0x0606060606060606
1930 12:45:02.352452 MTRR: Fixed MSR 0x26c 0x0606060606060606
1931 12:45:02.356476 MTRR: Fixed MSR 0x26d 0x0606060606060606
1932 12:45:02.360585 MTRR: Fixed MSR 0x26e 0x0606060606060606
1933 12:45:02.364610 MTRR: Fixed MSR 0x26f 0x0606060606060606
1934 12:45:02.368767 MTRR: Fixed MSR 0x258 0x0606060606060606
1935 12:45:02.370810 call enable_fixed_mtrr()
1936 12:45:02.374919 MTRR: Fixed MSR 0x259 0x0000000000000000
1937 12:45:02.379186 MTRR: Fixed MSR 0x268 0x0606060606060606
1938 12:45:02.383418 MTRR: Fixed MSR 0x269 0x0606060606060606
1939 12:45:02.387346 MTRR: Fixed MSR 0x26a 0x0606060606060606
1940 12:45:02.391222 MTRR: Fixed MSR 0x26b 0x0606060606060606
1941 12:45:02.395336 MTRR: Fixed MSR 0x26c 0x0606060606060606
1942 12:45:02.399682 MTRR: Fixed MSR 0x26d 0x0606060606060606
1943 12:45:02.403698 MTRR: Fixed MSR 0x26e 0x0606060606060606
1944 12:45:02.408065 MTRR: Fixed MSR 0x26f 0x0606060606060606
1945 12:45:02.411765 CPU physical address size: 39 bits
1946 12:45:02.414377 call enable_fixed_mtrr()
1947 12:45:02.418433 CBFS: Found @ offset 1cf4c0 size 3a954
1948 12:45:02.421555 CPU physical address size: 39 bits
1949 12:45:02.426372 Checking segment from ROM address 0xffecf4f8
1950 12:45:02.429748 CPU physical address size: 39 bits
1951 12:45:02.434194 Checking segment from ROM address 0xffecf514
1952 12:45:02.438157 CPU physical address size: 39 bits
1953 12:45:02.442224 Loading segment from ROM address 0xffecf4f8
1954 12:45:02.444345 code (compression=0)
1955 12:45:02.452863 New segment dstaddr 0x30100018 memsize 0x26518f8 srcaddr 0xffecf530 filesize 0x3a91c
1956 12:45:02.461856 Loading Segment: addr: 0x30100018 memsz: 0x00000000026518f8 filesz: 0x000000000003a91c
1957 12:45:02.463479 it's not compressed!
1958 12:45:02.545591 [ 0x30100018, 3013a934, 0x32751910) <- ffecf530
1959 12:45:02.552183 Clearing Segment: addr: 0x000000003013a934 memsz: 0x0000000002616fdc
1960 12:45:02.560720 Loading segment from ROM address 0xffecf514
1961 12:45:02.563061 Entry Point 0x30100018
1962 12:45:02.564203 Loaded segments
1963 12:45:02.574579 Finalizing chipset.
1964 12:45:02.576126 Finalizing SMM.
1965 12:45:02.582293 BS: BS_PAYLOAD_LOAD times (us): entry 1 run 466340 exit 11551
1966 12:45:02.585264 mp_park_aps done after 0 msecs.
1967 12:45:02.589741 Jumping to boot code at 30100018(89c33000)
1968 12:45:02.598308 CPU0: stack: 89cca000 - 89ccb000, lowest used address 89ccaa9c, stack used: 1380 bytes
1969 12:45:02.598396
1970 12:45:02.598659
1971 12:45:02.598729
1972 12:45:02.602130 Starting depthcharge on sarien...
1973 12:45:02.602216
1974 12:45:02.602867 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
1975 12:45:02.602973 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
1976 12:45:02.603054 Setting prompt string to ['sarien:']
1977 12:45:02.603136 bootloader-commands: Wait for prompt ['sarien:'] (timeout 00:04:28)
1978 12:45:02.609489 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1979 12:45:02.609577
1980 12:45:02.616891 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1981 12:45:02.617356
1982 12:45:02.624653 WARNING: can't convert coreboot GPIOs, 'EC in RW' won't be resampled at runtime!
1983 12:45:02.625309
1984 12:45:02.626922 BIOS MMAP details:
1985 12:45:02.627323
1986 12:45:02.629816 IFD Base Offset : 0x1000000
1987 12:45:02.630081
1988 12:45:02.632565 IFD End Offset : 0x2000000
1989 12:45:02.632822
1990 12:45:02.635592 MMAP Size : 0x1000000
1991 12:45:02.635855
1992 12:45:02.638802 MMAP Start : 0xff000000
1993 12:45:02.639272
1994 12:45:02.645246 Wilco EC [base 0x0940 emi 0x0950] flash 0x00001000-0x00100fff
1995 12:45:02.649481
1996 12:45:02.653399 New NVMe Controller 0x3214e110 @ 00:1d:04
1997 12:45:02.653681
1998 12:45:02.657762 New NVMe Controller 0x3214e1d8 @ 00:1d:00
1999 12:45:02.658201
2000 12:45:02.663733 The GBB signature is at 0x30000014 and is: 24 47 42 42
2001 12:45:02.667823
2002 12:45:02.670675 Wipe memory regions:
2003 12:45:02.670764
2004 12:45:02.673835 [0x00000000001000, 0x000000000a0000)
2005 12:45:02.673925
2006 12:45:02.677684 [0x00000000100000, 0x00000030000000)
2007 12:45:02.760094
2008 12:45:02.763930 [0x00000032751910, 0x00000089afd000)
2009 12:45:02.913765
2010 12:45:02.917506 [0x00000100000000, 0x0000026e800000)
2011 12:45:03.927949
2012 12:45:03.929318 R8152: Initializing
2013 12:45:03.929819
2014 12:45:03.932574 Version 6 (ocp_data = 5c30)
2015 12:45:03.933480
2016 12:45:03.935873 R8152: Done initializing
2017 12:45:03.936339
2018 12:45:03.937733 Adding net device
2019 12:45:03.938448
2020 12:45:03.943464 [firmware-sarien-12200.B-collabora] Apr 9 2021 09:49:38
2021 12:45:03.943883
2022 12:45:03.943966
2023 12:45:03.944031
2024 12:45:03.944901 Setting prompt string to ['sarien:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2026 12:45:04.045836 sarien: tftpboot 192.168.201.1 9729708/tftp-deploy-brayilo6/kernel/bzImage 9729708/tftp-deploy-brayilo6/kernel/cmdline 9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
2027 12:45:04.046421 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2028 12:45:04.046858 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
2029 12:45:04.050060 tftpboot 192.168.201.1 9729708/tftp-deploy-brayilo6/kernel/bzImage 9729708/tftp-deploy-brayilo6/kernel/cmdline 9729708/tftp-deploy-brayilo6/ramdisk/ramdisk.cpio.gz
2030 12:45:04.050481
2031 12:45:04.050821 Waiting for link
2032 12:45:04.250053
2033 12:45:04.250922 done.
2034 12:45:04.251293
2035 12:45:04.252751 MAC: 00:24:32:30:79:bd
2036 12:45:04.253186
2037 12:45:04.255559 Sending DHCP discover... done.
2038 12:45:04.256329
2039 12:45:07.577860 Waiting for reply... done.
2040 12:45:07.578050
2041 12:45:07.580860 Sending DHCP request... done.
2042 12:45:07.581212
2043 12:45:07.583425 Waiting for reply... done.
2044 12:45:07.583511
2045 12:45:07.585824 My ip is 192.168.201.166
2046 12:45:07.585911
2047 12:45:07.589876 The DHCP server ip is 192.168.201.1
2048 12:45:07.589964
2049 12:45:07.594515 TFTP server IP predefined by user: 192.168.201.1
2050 12:45:07.594874
2051 12:45:07.601488 Bootfile predefined by user: 9729708/tftp-deploy-brayilo6/kernel/bzImage
2052 12:45:07.601759
2053 12:45:07.605183 Sending tftp read request... done.
2054 12:45:07.605290
2055 12:45:07.608331 Waiting for the transfer...
2056 12:45:07.609069
2057 12:45:08.121845 00000000 ################################################################
2058 12:45:08.122241
2059 12:45:08.636665 00080000 ################################################################
2060 12:45:08.637060
2061 12:45:09.154920 00100000 ################################################################
2062 12:45:09.155296
2063 12:45:09.690494 00180000 ################################################################
2064 12:45:09.690870
2065 12:45:10.215840 00200000 ################################################################
2066 12:45:10.216247
2067 12:45:10.738486 00280000 ################################################################
2068 12:45:10.738934
2069 12:45:11.248795 00300000 ################################################################
2070 12:45:11.248971
2071 12:45:11.774620 00380000 ################################################################
2072 12:45:11.775003
2073 12:45:12.315977 00400000 ################################################################
2074 12:45:12.316798
2075 12:45:12.846518 00480000 ################################################################
2076 12:45:12.846891
2077 12:45:13.387797 00500000 ################################################################
2078 12:45:13.388168
2079 12:45:13.959871 00580000 ################################################################
2080 12:45:13.960060
2081 12:45:14.522266 00600000 ################################################################
2082 12:45:14.522641
2083 12:45:15.084282 00680000 ################################################################
2084 12:45:15.085160
2085 12:45:15.666821 00700000 ################################################################
2086 12:45:15.667189
2087 12:45:16.227540 00780000 ################################################################
2088 12:45:16.227935
2089 12:45:16.787567 00800000 ################################################################
2090 12:45:16.787976
2091 12:45:17.354078 00880000 ################################################################
2092 12:45:17.354476
2093 12:45:17.880550 00900000 ################################################################
2094 12:45:17.880945
2095 12:45:18.422061 00980000 ################################################################
2096 12:45:18.422463
2097 12:45:18.973692 00a00000 ################################################################
2098 12:45:18.974146
2099 12:45:19.516694 00a80000 ################################################################
2100 12:45:19.516840
2101 12:45:19.629609 00b00000 ############## done.
2102 12:45:19.629803
2103 12:45:19.633450 The bootfile was 11646080 bytes long.
2104 12:45:19.633539
2105 12:45:19.637064 Sending tftp read request... done.
2106 12:45:19.637162
2107 12:45:19.639961 Waiting for the transfer...
2108 12:45:19.640051
2109 12:45:20.167050 00000000 ################################################################
2110 12:45:20.167213
2111 12:45:20.687582 00080000 ################################################################
2112 12:45:20.688000
2113 12:45:21.211320 00100000 ################################################################
2114 12:45:21.211723
2115 12:45:21.734514 00180000 ################################################################
2116 12:45:21.734932
2117 12:45:22.258836 00200000 ################################################################
2118 12:45:22.259240
2119 12:45:22.779999 00280000 ################################################################
2120 12:45:22.780424
2121 12:45:23.296658 00300000 ################################################################
2122 12:45:23.296805
2123 12:45:23.816788 00380000 ################################################################
2124 12:45:23.817186
2125 12:45:24.339727 00400000 ################################################################
2126 12:45:24.340119
2127 12:45:24.852205 00480000 ################################################################
2128 12:45:24.852627
2129 12:45:25.360097 00500000 ################################################################
2130 12:45:25.360525
2131 12:45:25.870615 00580000 ################################################################
2132 12:45:25.870783
2133 12:45:26.390709 00600000 ################################################################
2134 12:45:26.391127
2135 12:45:26.907334 00680000 ################################################################
2136 12:45:26.907774
2137 12:45:27.425745 00700000 ################################################################
2138 12:45:27.425905
2139 12:45:27.944022 00780000 ################################################################
2140 12:45:27.944421
2141 12:45:28.476027 00800000 ################################################################
2142 12:45:28.476451
2143 12:45:28.802397 00880000 ######################################## done.
2144 12:45:28.802818
2145 12:45:28.805877 Sending tftp read request... done.
2146 12:45:28.805973
2147 12:45:28.808965 Waiting for the transfer...
2148 12:45:28.809058
2149 12:45:28.810586 00000000 # done.
2150 12:45:28.810674
2151 12:45:28.819434 Command line loaded dynamically from TFTP file: 9729708/tftp-deploy-brayilo6/kernel/cmdline
2152 12:45:28.819535
2153 12:45:28.836956 The command line is: earlyprintk=uart8250,mmio32,0xde000000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2154 12:45:28.841466
2155 12:45:28.845217 Shutting down all USB controllers.
2156 12:45:28.845602
2157 12:45:28.847568 Removing current net device
2158 12:45:28.853242
2159 12:45:28.855981 EC: exit firmware mode
2160 12:45:28.856742
2161 12:45:28.858662 Finalizing coreboot
2162 12:45:28.858751
2163 12:45:28.864660 Exiting depthcharge with code 4 at timestamp: 33979986
2164 12:45:28.864753
2165 12:45:28.865102
2166 12:45:28.866407 end: 2.2.4 bootloader-commands (duration 00:00:26) [common]
2167 12:45:28.866514 start: 2.2.5 auto-login-action (timeout 00:04:02) [common]
2168 12:45:28.866592 Setting prompt string to ['Linux version [0-9]']
2169 12:45:28.866665 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 12:45:28.866739 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2171 12:45:28.866941 Starting kernel ...
2172 12:45:28.867014
2173 12:45:28.867262
2175 12:49:30.866924 end: 2.2.5 auto-login-action (duration 00:04:02) [common]
2177 12:49:30.867140 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 242 seconds'
2179 12:49:30.867309 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2182 12:49:30.867569 end: 2 depthcharge-action (duration 00:05:00) [common]
2184 12:49:30.867806 Cleaning after the job
2185 12:49:30.867892 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/ramdisk
2186 12:49:30.868569 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/kernel
2187 12:49:30.869366 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729708/tftp-deploy-brayilo6/modules
2188 12:49:30.869767 start: 5.1 power-off (timeout 00:00:30) [common]
2189 12:49:30.869926 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=dell-latitude-5400-8665U-sarien-cbg-4' '--port=1' '--command=off'
2190 12:49:38.238776 >> Command sent successfully.
2191 12:49:38.240808 Returned 0 in 7 seconds
2192 12:49:38.341625 end: 5.1 power-off (duration 00:00:07) [common]
2194 12:49:38.342088 start: 5.2 read-feedback (timeout 00:09:53) [common]
2195 12:49:38.342428 Listened to connection for namespace 'common' for up to 1s
2196 12:49:39.347367 Finalising connection for namespace 'common'
2197 12:49:39.347547 Disconnecting from shell: Finalise
2198 12:49:39.347631
2199 12:49:39.448358 end: 5.2 read-feedback (duration 00:00:01) [common]
2200 12:49:39.448525 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729708
2201 12:49:39.454360 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729708
2202 12:49:39.454492 JobError: Your job cannot terminate cleanly.