Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:11.662901 lava-dispatcher, installed at version: 2023.01
2 12:44:11.663099 start: 0 validate
3 12:44:11.663221 Start time: 2023-03-22 12:44:11.663216+00:00 (UTC)
4 12:44:11.663348 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:11.663484 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-cros-ec%2F20230317.0%2Famd64%2Frootfs.cpio.gz exists
6 12:44:11.949628 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:11.949973 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:15.951194 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:15.952143 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:44:16.250558 validate duration: 4.59
12 12:44:16.251994 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:44:16.252958 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:44:16.253756 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:44:16.254382 Not decompressing ramdisk as can be used compressed.
16 12:44:16.254961 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-cros-ec/20230317.0/amd64/rootfs.cpio.gz
17 12:44:16.255362 saving as /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/ramdisk/rootfs.cpio.gz
18 12:44:16.255737 total size: 35758894 (34MB)
19 12:44:17.024638 progress 0% (0MB)
20 12:44:17.036859 progress 5% (1MB)
21 12:44:17.045718 progress 10% (3MB)
22 12:44:17.054430 progress 15% (5MB)
23 12:44:17.063117 progress 20% (6MB)
24 12:44:17.071472 progress 25% (8MB)
25 12:44:17.079866 progress 30% (10MB)
26 12:44:17.088160 progress 35% (11MB)
27 12:44:17.096859 progress 40% (13MB)
28 12:44:17.105269 progress 45% (15MB)
29 12:44:17.113635 progress 50% (17MB)
30 12:44:17.122284 progress 55% (18MB)
31 12:44:17.130751 progress 60% (20MB)
32 12:44:17.139149 progress 65% (22MB)
33 12:44:17.147404 progress 70% (23MB)
34 12:44:17.155808 progress 75% (25MB)
35 12:44:17.164373 progress 80% (27MB)
36 12:44:17.172630 progress 85% (29MB)
37 12:44:17.181039 progress 90% (30MB)
38 12:44:17.189324 progress 95% (32MB)
39 12:44:17.197808 progress 100% (34MB)
40 12:44:17.197975 34MB downloaded in 0.94s (36.19MB/s)
41 12:44:17.198130 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:44:17.198378 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:44:17.198468 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:44:17.198557 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:44:17.198664 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:44:17.198737 saving as /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/kernel/bzImage
48 12:44:17.198800 total size: 11646080 (11MB)
49 12:44:17.198861 No compression specified
50 12:44:17.199762 progress 0% (0MB)
51 12:44:17.202561 progress 5% (0MB)
52 12:44:17.205460 progress 10% (1MB)
53 12:44:17.208316 progress 15% (1MB)
54 12:44:17.211227 progress 20% (2MB)
55 12:44:17.213994 progress 25% (2MB)
56 12:44:17.216945 progress 30% (3MB)
57 12:44:17.219785 progress 35% (3MB)
58 12:44:17.222712 progress 40% (4MB)
59 12:44:17.225460 progress 45% (5MB)
60 12:44:17.228386 progress 50% (5MB)
61 12:44:17.231269 progress 55% (6MB)
62 12:44:17.234144 progress 60% (6MB)
63 12:44:17.237083 progress 65% (7MB)
64 12:44:17.239803 progress 70% (7MB)
65 12:44:17.242642 progress 75% (8MB)
66 12:44:17.245478 progress 80% (8MB)
67 12:44:17.248271 progress 85% (9MB)
68 12:44:17.250941 progress 90% (10MB)
69 12:44:17.253770 progress 95% (10MB)
70 12:44:17.256622 progress 100% (11MB)
71 12:44:17.256782 11MB downloaded in 0.06s (191.56MB/s)
72 12:44:17.256931 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:44:17.257173 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:44:17.257264 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:44:17.257359 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:44:17.257467 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:44:17.257536 saving as /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/modules/modules.tar
79 12:44:17.257602 total size: 497788 (0MB)
80 12:44:17.257665 Using unxz to decompress xz
81 12:44:17.260994 progress 6% (0MB)
82 12:44:17.261372 progress 13% (0MB)
83 12:44:17.261605 progress 19% (0MB)
84 12:44:17.262870 progress 26% (0MB)
85 12:44:17.264878 progress 32% (0MB)
86 12:44:17.267024 progress 39% (0MB)
87 12:44:17.268850 progress 46% (0MB)
88 12:44:17.270715 progress 52% (0MB)
89 12:44:17.273003 progress 59% (0MB)
90 12:44:17.274903 progress 65% (0MB)
91 12:44:17.276940 progress 72% (0MB)
92 12:44:17.278784 progress 78% (0MB)
93 12:44:17.280709 progress 85% (0MB)
94 12:44:17.282678 progress 92% (0MB)
95 12:44:17.284597 progress 98% (0MB)
96 12:44:17.291542 0MB downloaded in 0.03s (13.99MB/s)
97 12:44:17.291845 end: 1.3.1 http-download (duration 00:00:00) [common]
99 12:44:17.292117 end: 1.3 download-retry (duration 00:00:00) [common]
100 12:44:17.292215 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
101 12:44:17.292320 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
102 12:44:17.292447 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
103 12:44:17.292534 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
104 12:44:17.292713 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh
105 12:44:17.292821 makedir: /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin
106 12:44:17.292909 makedir: /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/tests
107 12:44:17.292991 makedir: /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/results
108 12:44:17.293098 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-add-keys
109 12:44:17.293235 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-add-sources
110 12:44:17.293353 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-background-process-start
111 12:44:17.293467 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-background-process-stop
112 12:44:17.293583 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-common-functions
113 12:44:17.293696 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-echo-ipv4
114 12:44:17.293810 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-install-packages
115 12:44:17.293922 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-installed-packages
116 12:44:17.294031 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-os-build
117 12:44:17.294142 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-probe-channel
118 12:44:17.294253 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-probe-ip
119 12:44:17.294362 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-target-ip
120 12:44:17.294470 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-target-mac
121 12:44:17.294578 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-target-storage
122 12:44:17.294689 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-case
123 12:44:17.294798 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-event
124 12:44:17.294907 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-feedback
125 12:44:17.295015 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-raise
126 12:44:17.295128 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-reference
127 12:44:17.295238 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-runner
128 12:44:17.295347 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-set
129 12:44:17.295456 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-test-shell
130 12:44:17.295572 Updating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-install-packages (oe)
131 12:44:17.295687 Updating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/bin/lava-installed-packages (oe)
132 12:44:17.295789 Creating /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/environment
133 12:44:17.295881 LAVA metadata
134 12:44:17.295966 - LAVA_JOB_ID=9729653
135 12:44:17.296039 - LAVA_DISPATCHER_IP=192.168.201.1
136 12:44:17.296143 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
137 12:44:17.296212 skipped lava-vland-overlay
138 12:44:17.296294 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
139 12:44:17.296425 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
140 12:44:17.296497 skipped lava-multinode-overlay
141 12:44:17.296575 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
142 12:44:17.296663 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
143 12:44:17.296743 Loading test definitions
144 12:44:17.296842 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
145 12:44:17.296921 Using /lava-9729653 at stage 0
146 12:44:17.297176 uuid=9729653_1.4.2.3.1 testdef=None
147 12:44:17.297267 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
148 12:44:17.297362 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
149 12:44:17.297836 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
151 12:44:17.298075 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
152 12:44:17.298607 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
154 12:44:17.298846 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
155 12:44:17.299353 runner path: /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/0/tests/0_cros-ec test_uuid 9729653_1.4.2.3.1
156 12:44:17.299498 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
158 12:44:17.299712 Creating lava-test-runner.conf files
159 12:44:17.299777 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729653/lava-overlay-pr9t_wgh/lava-9729653/0 for stage 0
160 12:44:17.299859 - 0_cros-ec
161 12:44:17.299954 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
162 12:44:17.300044 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
163 12:44:17.305581 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
164 12:44:17.305709 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
165 12:44:17.305801 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
166 12:44:17.305896 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
167 12:44:17.305986 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
168 12:44:18.071655 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:01) [common]
169 12:44:18.072025 start: 1.4.4 extract-modules (timeout 00:09:58) [common]
170 12:44:18.072162 extracting modules file /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729653/extract-overlay-ramdisk-0crdgj9d/ramdisk
171 12:44:18.086751 end: 1.4.4 extract-modules (duration 00:00:00) [common]
172 12:44:18.086917 start: 1.4.5 apply-overlay-tftp (timeout 00:09:58) [common]
173 12:44:18.087019 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729653/compress-overlay-4jr9p4qa/overlay-1.4.2.4.tar.gz to ramdisk
174 12:44:18.087095 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729653/compress-overlay-4jr9p4qa/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729653/extract-overlay-ramdisk-0crdgj9d/ramdisk
175 12:44:18.090724 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
176 12:44:18.090845 start: 1.4.6 configure-preseed-file (timeout 00:09:58) [common]
177 12:44:18.090943 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
178 12:44:18.091080 start: 1.4.7 compress-ramdisk (timeout 00:09:58) [common]
179 12:44:18.091201 Building ramdisk /var/lib/lava/dispatcher/tmp/9729653/extract-overlay-ramdisk-0crdgj9d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729653/extract-overlay-ramdisk-0crdgj9d/ramdisk
180 12:44:18.350780 >> 187988 blocks
181 12:44:21.685254 rename /var/lib/lava/dispatcher/tmp/9729653/extract-overlay-ramdisk-0crdgj9d/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
182 12:44:21.685677 end: 1.4.7 compress-ramdisk (duration 00:00:04) [common]
183 12:44:21.685800 start: 1.4.8 prepare-kernel (timeout 00:09:55) [common]
184 12:44:21.685917 start: 1.4.8.1 prepare-fit (timeout 00:09:55) [common]
185 12:44:21.686015 No mkimage arch provided, not using FIT.
186 12:44:21.686107 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
187 12:44:21.686195 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
188 12:44:21.686293 end: 1.4 prepare-tftp-overlay (duration 00:00:04) [common]
189 12:44:21.686391 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:55) [common]
190 12:44:21.686474 No LXC device requested
191 12:44:21.686603 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
192 12:44:21.686736 start: 1.6 deploy-device-env (timeout 00:09:55) [common]
193 12:44:21.686829 end: 1.6 deploy-device-env (duration 00:00:00) [common]
194 12:44:21.686904 Checking files for TFTP limit of 4294967296 bytes.
195 12:44:21.687291 end: 1 tftp-deploy (duration 00:00:05) [common]
196 12:44:21.687402 start: 2 depthcharge-action (timeout 00:05:00) [common]
197 12:44:21.687505 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
198 12:44:21.687639 substitutions:
199 12:44:21.687716 - {DTB}: None
200 12:44:21.687788 - {INITRD}: 9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
201 12:44:21.687986 - {KERNEL}: 9729653/tftp-deploy-suke3obl/kernel/bzImage
202 12:44:21.688055 - {LAVA_MAC}: None
203 12:44:21.688119 - {PRESEED_CONFIG}: None
204 12:44:21.688181 - {PRESEED_LOCAL}: None
205 12:44:21.688242 - {RAMDISK}: 9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
206 12:44:21.688379 - {ROOT_PART}: None
207 12:44:21.688468 - {ROOT}: None
208 12:44:21.688549 - {SERVER_IP}: 192.168.201.1
209 12:44:21.688609 - {TEE}: None
210 12:44:21.688668 Parsed boot commands:
211 12:44:21.688725 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
212 12:44:21.688881 Parsed boot commands: tftpboot 192.168.201.1 9729653/tftp-deploy-suke3obl/kernel/bzImage 9729653/tftp-deploy-suke3obl/kernel/cmdline 9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
213 12:44:21.688977 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
214 12:44:21.689068 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
215 12:44:21.689165 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
216 12:44:21.689257 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
217 12:44:21.689329 Not connected, no need to disconnect.
218 12:44:21.689408 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
219 12:44:21.689498 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
220 12:44:21.689571 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
221 12:44:21.692598 Setting prompt string to ['lava-test: # ']
222 12:44:21.692946 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
223 12:44:21.693062 end: 2.2.1 reset-connection (duration 00:00:00) [common]
224 12:44:21.693164 start: 2.2.2 reset-device (timeout 00:05:00) [common]
225 12:44:21.693269 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
226 12:44:21.693481 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
227 12:44:26.825740 >> Command sent successfully.
228 12:44:26.828010 Returned 0 in 5 seconds
229 12:44:26.928494 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
231 12:44:26.929014 end: 2.2.2 reset-device (duration 00:00:05) [common]
232 12:44:26.929184 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
233 12:44:26.929332 Setting prompt string to 'Starting depthcharge on Voema...'
234 12:44:26.929473 Changing prompt to 'Starting depthcharge on Voema...'
235 12:44:26.929617 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
236 12:44:26.930045 [Enter `^Ec?' for help]
237 12:44:28.622910
238 12:44:28.623258
239 12:44:28.633064 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
240 12:44:28.636459 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
241 12:44:28.642655 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
242 12:44:28.645991 CPU: AES supported, TXT NOT supported, VT supported
243 12:44:28.652852 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
244 12:44:28.659135 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
245 12:44:28.662912 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
246 12:44:28.666538 VBOOT: Loading verstage.
247 12:44:28.669383 FMAP: Found "FLASH" version 1.1 at 0x1804000.
248 12:44:28.676514 FMAP: base = 0x0 size = 0x2000000 #areas = 32
249 12:44:28.679550 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
250 12:44:28.690344 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
251 12:44:28.696491 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
252 12:44:28.696585
253 12:44:28.696659
254 12:44:28.710017 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
255 12:44:28.723379 Probing TPM: . done!
256 12:44:28.726939 TPM ready after 0 ms
257 12:44:28.730029 Connected to device vid:did:rid of 1ae0:0028:00
258 12:44:28.741370 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
259 12:44:28.747946 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
260 12:44:28.751157 Initialized TPM device CR50 revision 0
261 12:44:28.802795 tlcl_send_startup: Startup return code is 0
262 12:44:28.803180 TPM: setup succeeded
263 12:44:28.818373 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
264 12:44:28.832695 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
265 12:44:28.844976 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
266 12:44:28.854716 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
267 12:44:28.858622 Chrome EC: UHEPI supported
268 12:44:28.861935 Phase 1
269 12:44:28.865390 FMAP: area GBB found @ 1805000 (458752 bytes)
270 12:44:28.875252 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
271 12:44:28.882085 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
272 12:44:28.888663 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
273 12:44:28.894682 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
274 12:44:28.898244 Recovery requested (1009000e)
275 12:44:28.902086 TPM: Extending digest for VBOOT: boot mode into PCR 0
276 12:44:28.913611 tlcl_extend: response is 0
277 12:44:28.919955 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
278 12:44:28.929748 tlcl_extend: response is 0
279 12:44:28.936540 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
280 12:44:28.943301 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
281 12:44:28.949614 BS: verstage times (exec / console): total (unknown) / 142 ms
282 12:44:28.949771
283 12:44:28.949900
284 12:44:28.963656 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
285 12:44:28.969908 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
286 12:44:28.972913 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
287 12:44:28.976421 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
288 12:44:28.982876 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
289 12:44:28.986337 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
290 12:44:28.989842 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
291 12:44:28.993099 TCO_STS: 0000 0000
292 12:44:28.995992 GEN_PMCON: d0015038 00002200
293 12:44:28.999536 GBLRST_CAUSE: 00000000 00000000
294 12:44:29.002556 HPR_CAUSE0: 00000000
295 12:44:29.002649 prev_sleep_state 5
296 12:44:29.005762 Boot Count incremented to 15442
297 12:44:29.012277 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
298 12:44:29.019254 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
299 12:44:29.028829 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
300 12:44:29.035685 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
301 12:44:29.039589 Chrome EC: UHEPI supported
302 12:44:29.046019 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
303 12:44:29.056589 Probing TPM: done!
304 12:44:29.063291 Connected to device vid:did:rid of 1ae0:0028:00
305 12:44:29.073549 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
306 12:44:29.076341 Initialized TPM device CR50 revision 0
307 12:44:29.091890 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
308 12:44:29.098059 MRC: Hash idx 0x100b comparison successful.
309 12:44:29.101579 MRC cache found, size faa8
310 12:44:29.101668 bootmode is set to: 2
311 12:44:29.104832 SPD index = 2
312 12:44:29.111341 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
313 12:44:29.114496 SPD: module type is LPDDR4X
314 12:44:29.118083 SPD: module part number is MT53D1G64D4NW-046
315 12:44:29.124958 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
316 12:44:29.128025 SPD: device width 16 bits, bus width 16 bits
317 12:44:29.134200 SPD: module size is 2048 MB (per channel)
318 12:44:29.563680 CBMEM:
319 12:44:29.566791 IMD: root @ 0x76fff000 254 entries.
320 12:44:29.570442 IMD: root @ 0x76ffec00 62 entries.
321 12:44:29.573261 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
322 12:44:29.579912 FMAP: area RW_VPD found @ f35000 (8192 bytes)
323 12:44:29.583775 External stage cache:
324 12:44:29.586301 IMD: root @ 0x7b3ff000 254 entries.
325 12:44:29.590242 IMD: root @ 0x7b3fec00 62 entries.
326 12:44:29.604676 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
327 12:44:29.611214 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
328 12:44:29.617576 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
329 12:44:29.631687 MRC: 'RECOVERY_MRC_CACHE' does not need update.
330 12:44:29.634858 cse_lite: Skip switching to RW in the recovery path
331 12:44:29.638558 8 DIMMs found
332 12:44:29.638747 SMM Memory Map
333 12:44:29.641946 SMRAM : 0x7b000000 0x800000
334 12:44:29.644932 Subregion 0: 0x7b000000 0x200000
335 12:44:29.648327 Subregion 1: 0x7b200000 0x200000
336 12:44:29.655682 Subregion 2: 0x7b400000 0x400000
337 12:44:29.655781 top_of_ram = 0x77000000
338 12:44:29.661430 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
339 12:44:29.668432 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
340 12:44:29.671734 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
341 12:44:29.678467 MTRR Range: Start=ff000000 End=0 (Size 1000000)
342 12:44:29.685074 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
343 12:44:29.691381 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
344 12:44:29.701410 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
345 12:44:29.708124 Processing 211 relocs. Offset value of 0x74c0b000
346 12:44:29.714477 BS: romstage times (exec / console): total (unknown) / 277 ms
347 12:44:29.720507
348 12:44:29.720956
349 12:44:29.730294 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
350 12:44:29.733850 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 12:44:29.743720 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 12:44:29.750052 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 12:44:29.756925 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
354 12:44:29.762882 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
355 12:44:29.806787 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
356 12:44:29.813210 Processing 5008 relocs. Offset value of 0x75d98000
357 12:44:29.820117 BS: postcar times (exec / console): total (unknown) / 59 ms
358 12:44:29.820564
359 12:44:29.820920
360 12:44:29.830134 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
361 12:44:29.830613 Normal boot
362 12:44:29.833371 FW_CONFIG value is 0x804c02
363 12:44:29.836988 PCI: 00:07.0 disabled by fw_config
364 12:44:29.839768 PCI: 00:07.1 disabled by fw_config
365 12:44:29.843505 PCI: 00:0d.2 disabled by fw_config
366 12:44:29.846926 PCI: 00:1c.7 disabled by fw_config
367 12:44:29.853672 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
368 12:44:29.860194 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
369 12:44:29.863699 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
370 12:44:29.866767 GENERIC: 0.0 disabled by fw_config
371 12:44:29.873107 GENERIC: 1.0 disabled by fw_config
372 12:44:29.876453 fw_config match found: DB_USB=USB3_ACTIVE
373 12:44:29.879799 fw_config match found: DB_USB=USB3_ACTIVE
374 12:44:29.882800 fw_config match found: DB_USB=USB3_ACTIVE
375 12:44:29.889997 fw_config match found: DB_USB=USB3_ACTIVE
376 12:44:29.892975 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
377 12:44:29.899424 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
378 12:44:29.909768 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
379 12:44:29.916575 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
380 12:44:29.919358 microcode: sig=0x806c1 pf=0x80 revision=0x86
381 12:44:29.925749 microcode: Update skipped, already up-to-date
382 12:44:29.932491 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
383 12:44:29.960805 Detected 4 core, 8 thread CPU.
384 12:44:29.963938 Setting up SMI for CPU
385 12:44:29.967431 IED base = 0x7b400000
386 12:44:29.967970 IED size = 0x00400000
387 12:44:29.970572 Will perform SMM setup.
388 12:44:29.977334 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
389 12:44:29.983691 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
390 12:44:29.990976 Processing 16 relocs. Offset value of 0x00030000
391 12:44:29.993716 Attempting to start 7 APs
392 12:44:29.996992 Waiting for 10ms after sending INIT.
393 12:44:30.013578 Waiting for 1st SIPI to complete...done.
394 12:44:30.014083 AP: slot 6 apic_id 1.
395 12:44:30.019120 Waiting for 2nd SIPI to complete...done.
396 12:44:30.019603 AP: slot 1 apic_id 5.
397 12:44:30.022579 AP: slot 5 apic_id 4.
398 12:44:30.025713 AP: slot 2 apic_id 2.
399 12:44:30.026127 AP: slot 7 apic_id 3.
400 12:44:30.029051 AP: slot 4 apic_id 6.
401 12:44:30.032348 AP: slot 3 apic_id 7.
402 12:44:30.039148 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
403 12:44:30.045104 Processing 13 relocs. Offset value of 0x00038000
404 12:44:30.048697 Unable to locate Global NVS
405 12:44:30.055224 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
406 12:44:30.058561 Installing permanent SMM handler to 0x7b000000
407 12:44:30.068594 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
408 12:44:30.071742 Processing 794 relocs. Offset value of 0x7b010000
409 12:44:30.082004 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
410 12:44:30.085202 Processing 13 relocs. Offset value of 0x7b008000
411 12:44:30.091783 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
412 12:44:30.098307 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
413 12:44:30.101752 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
414 12:44:30.108550 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
415 12:44:30.114775 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
416 12:44:30.121860 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
417 12:44:30.128192 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
418 12:44:30.128285 Unable to locate Global NVS
419 12:44:30.138503 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
420 12:44:30.141386 Clearing SMI status registers
421 12:44:30.141477 SMI_STS: PM1
422 12:44:30.144595 PM1_STS: PWRBTN
423 12:44:30.151604 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
424 12:44:30.154354 In relocation handler: CPU 0
425 12:44:30.158122 New SMBASE=0x7b000000 IEDBASE=0x7b400000
426 12:44:30.164939 Writing SMRR. base = 0x7b000006, mask=0xff800c00
427 12:44:30.165027 Relocation complete.
428 12:44:30.174835 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
429 12:44:30.178194 In relocation handler: CPU 6
430 12:44:30.181648 New SMBASE=0x7affe800 IEDBASE=0x7b400000
431 12:44:30.181738 Relocation complete.
432 12:44:30.191369 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
433 12:44:30.191473 In relocation handler: CPU 2
434 12:44:30.197737 New SMBASE=0x7afff800 IEDBASE=0x7b400000
435 12:44:30.200860 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 12:44:30.204227 Relocation complete.
437 12:44:30.211000 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
438 12:44:30.214384 In relocation handler: CPU 7
439 12:44:30.217598 New SMBASE=0x7affe400 IEDBASE=0x7b400000
440 12:44:30.221276 Relocation complete.
441 12:44:30.227663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
442 12:44:30.231178 In relocation handler: CPU 4
443 12:44:30.234174 New SMBASE=0x7afff000 IEDBASE=0x7b400000
444 12:44:30.240635 Writing SMRR. base = 0x7b000006, mask=0xff800c00
445 12:44:30.240755 Relocation complete.
446 12:44:30.247085 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
447 12:44:30.250750 In relocation handler: CPU 3
448 12:44:30.257150 New SMBASE=0x7afff400 IEDBASE=0x7b400000
449 12:44:30.257339 Relocation complete.
450 12:44:30.264018 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
451 12:44:30.267455 In relocation handler: CPU 1
452 12:44:30.273983 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
453 12:44:30.274320 Relocation complete.
454 12:44:30.280500 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
455 12:44:30.283563 In relocation handler: CPU 5
456 12:44:30.290609 New SMBASE=0x7affec00 IEDBASE=0x7b400000
457 12:44:30.294220 Writing SMRR. base = 0x7b000006, mask=0xff800c00
458 12:44:30.298139 Relocation complete.
459 12:44:30.298508 Initializing CPU #0
460 12:44:30.301422 CPU: vendor Intel device 806c1
461 12:44:30.304055 CPU: family 06, model 8c, stepping 01
462 12:44:30.307998 Clearing out pending MCEs
463 12:44:30.310730 Setting up local APIC...
464 12:44:30.314018 apic_id: 0x00 done.
465 12:44:30.317709 Turbo is available but hidden
466 12:44:30.318152 Turbo is available and visible
467 12:44:30.324153 microcode: Update skipped, already up-to-date
468 12:44:30.327179 CPU #0 initialized
469 12:44:30.327507 Initializing CPU #3
470 12:44:30.331127 Initializing CPU #4
471 12:44:30.334301 CPU: vendor Intel device 806c1
472 12:44:30.337344 CPU: family 06, model 8c, stepping 01
473 12:44:30.340507 CPU: vendor Intel device 806c1
474 12:44:30.343974 CPU: family 06, model 8c, stepping 01
475 12:44:30.347581 Clearing out pending MCEs
476 12:44:30.351253 Clearing out pending MCEs
477 12:44:30.351547 Setting up local APIC...
478 12:44:30.354220 Initializing CPU #7
479 12:44:30.357317 Initializing CPU #1
480 12:44:30.357645 Initializing CPU #5
481 12:44:30.360590 CPU: vendor Intel device 806c1
482 12:44:30.363950 CPU: family 06, model 8c, stepping 01
483 12:44:30.367352 CPU: vendor Intel device 806c1
484 12:44:30.370647 CPU: family 06, model 8c, stepping 01
485 12:44:30.373975 Clearing out pending MCEs
486 12:44:30.377097 Clearing out pending MCEs
487 12:44:30.380680 Setting up local APIC...
488 12:44:30.381000 Initializing CPU #2
489 12:44:30.383808 Setting up local APIC...
490 12:44:30.387567 CPU: vendor Intel device 806c1
491 12:44:30.390748 CPU: family 06, model 8c, stepping 01
492 12:44:30.393759 CPU: vendor Intel device 806c1
493 12:44:30.397603 CPU: family 06, model 8c, stepping 01
494 12:44:30.400470 Clearing out pending MCEs
495 12:44:30.403888 Clearing out pending MCEs
496 12:44:30.407084 Setting up local APIC...
497 12:44:30.407408 Initializing CPU #6
498 12:44:30.410500 Setting up local APIC...
499 12:44:30.413788 apic_id: 0x04 done.
500 12:44:30.414140 apic_id: 0x05 done.
501 12:44:30.416851 apic_id: 0x06 done.
502 12:44:30.420007 apic_id: 0x07 done.
503 12:44:30.423352 microcode: Update skipped, already up-to-date
504 12:44:30.426678 microcode: Update skipped, already up-to-date
505 12:44:30.430181 CPU #4 initialized
506 12:44:30.433749 CPU #3 initialized
507 12:44:30.436608 microcode: Update skipped, already up-to-date
508 12:44:30.439988 microcode: Update skipped, already up-to-date
509 12:44:30.443091 CPU #5 initialized
510 12:44:30.443179 CPU #1 initialized
511 12:44:30.446592 CPU: vendor Intel device 806c1
512 12:44:30.453644 CPU: family 06, model 8c, stepping 01
513 12:44:30.453732 apic_id: 0x02 done.
514 12:44:30.456531 Setting up local APIC...
515 12:44:30.459551 Clearing out pending MCEs
516 12:44:30.459626 apic_id: 0x03 done.
517 12:44:30.466214 microcode: Update skipped, already up-to-date
518 12:44:30.469870 microcode: Update skipped, already up-to-date
519 12:44:30.473197 CPU #2 initialized
520 12:44:30.473286 CPU #7 initialized
521 12:44:30.477017 Setting up local APIC...
522 12:44:30.479668 apic_id: 0x01 done.
523 12:44:30.483161 microcode: Update skipped, already up-to-date
524 12:44:30.486303 CPU #6 initialized
525 12:44:30.489800 bsp_do_flight_plan done after 468 msecs.
526 12:44:30.493116 CPU: frequency set to 4400 MHz
527 12:44:30.496988 Enabling SMIs.
528 12:44:30.499934 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
529 12:44:30.517529 SATAXPCIE1 indicates PCIe NVMe is present
530 12:44:30.520601 Probing TPM: done!
531 12:44:30.524287 Connected to device vid:did:rid of 1ae0:0028:00
532 12:44:30.534906 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
533 12:44:30.537719 Initialized TPM device CR50 revision 0
534 12:44:30.541191 Enabling S0i3.4
535 12:44:30.547656 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
536 12:44:30.551075 Found a VBT of 8704 bytes after decompression
537 12:44:30.557704 cse_lite: CSE RO boot. HybridStorageMode disabled
538 12:44:30.564560 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
539 12:44:30.639099 FSPS returned 0
540 12:44:30.641985 Executing Phase 1 of FspMultiPhaseSiInit
541 12:44:30.651957 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
542 12:44:30.655605 port C0 DISC req: usage 1 usb3 1 usb2 5
543 12:44:30.658677 Raw Buffer output 0 00000511
544 12:44:30.661987 Raw Buffer output 1 00000000
545 12:44:30.666113 pmc_send_ipc_cmd succeeded
546 12:44:30.672124 port C1 DISC req: usage 1 usb3 2 usb2 3
547 12:44:30.672214 Raw Buffer output 0 00000321
548 12:44:30.675870 Raw Buffer output 1 00000000
549 12:44:30.679607 pmc_send_ipc_cmd succeeded
550 12:44:30.685384 Detected 4 core, 8 thread CPU.
551 12:44:30.688176 Detected 4 core, 8 thread CPU.
552 12:44:30.888514 Display FSP Version Info HOB
553 12:44:30.891450 Reference Code - CPU = a.0.4c.31
554 12:44:30.895341 uCode Version = 0.0.0.86
555 12:44:30.898141 TXT ACM version = ff.ff.ff.ffff
556 12:44:30.901718 Reference Code - ME = a.0.4c.31
557 12:44:30.904820 MEBx version = 0.0.0.0
558 12:44:30.908118 ME Firmware Version = Consumer SKU
559 12:44:30.911192 Reference Code - PCH = a.0.4c.31
560 12:44:30.915017 PCH-CRID Status = Disabled
561 12:44:30.918059 PCH-CRID Original Value = ff.ff.ff.ffff
562 12:44:30.921929 PCH-CRID New Value = ff.ff.ff.ffff
563 12:44:30.924781 OPROM - RST - RAID = ff.ff.ff.ffff
564 12:44:30.927907 PCH Hsio Version = 4.0.0.0
565 12:44:30.931564 Reference Code - SA - System Agent = a.0.4c.31
566 12:44:30.934805 Reference Code - MRC = 2.0.0.1
567 12:44:30.937757 SA - PCIe Version = a.0.4c.31
568 12:44:30.941167 SA-CRID Status = Disabled
569 12:44:30.944996 SA-CRID Original Value = 0.0.0.1
570 12:44:30.947944 SA-CRID New Value = 0.0.0.1
571 12:44:30.950942 OPROM - VBIOS = ff.ff.ff.ffff
572 12:44:30.954385 IO Manageability Engine FW Version = 11.1.4.0
573 12:44:30.957943 PHY Build Version = 0.0.0.e0
574 12:44:30.961238 Thunderbolt(TM) FW Version = 0.0.0.0
575 12:44:30.967867 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
576 12:44:30.971212 ITSS IRQ Polarities Before:
577 12:44:30.971299 IPC0: 0xffffffff
578 12:44:30.974479 IPC1: 0xffffffff
579 12:44:30.974562 IPC2: 0xffffffff
580 12:44:30.977972 IPC3: 0xffffffff
581 12:44:30.980703 ITSS IRQ Polarities After:
582 12:44:30.980788 IPC0: 0xffffffff
583 12:44:30.983964 IPC1: 0xffffffff
584 12:44:30.984048 IPC2: 0xffffffff
585 12:44:30.987451 IPC3: 0xffffffff
586 12:44:30.990450 Found PCIe Root Port #9 at PCI: 00:1d.0.
587 12:44:31.004121 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
588 12:44:31.014353 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
589 12:44:31.027233 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
590 12:44:31.033960 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
591 12:44:31.037040 Enumerating buses...
592 12:44:31.040138 Show all devs... Before device enumeration.
593 12:44:31.043626 Root Device: enabled 1
594 12:44:31.043710 DOMAIN: 0000: enabled 1
595 12:44:31.047366 CPU_CLUSTER: 0: enabled 1
596 12:44:31.050653 PCI: 00:00.0: enabled 1
597 12:44:31.053679 PCI: 00:02.0: enabled 1
598 12:44:31.053783 PCI: 00:04.0: enabled 1
599 12:44:31.057027 PCI: 00:05.0: enabled 1
600 12:44:31.060201 PCI: 00:06.0: enabled 0
601 12:44:31.063287 PCI: 00:07.0: enabled 0
602 12:44:31.063386 PCI: 00:07.1: enabled 0
603 12:44:31.067095 PCI: 00:07.2: enabled 0
604 12:44:31.070165 PCI: 00:07.3: enabled 0
605 12:44:31.073775 PCI: 00:08.0: enabled 1
606 12:44:31.073908 PCI: 00:09.0: enabled 0
607 12:44:31.076785 PCI: 00:0a.0: enabled 0
608 12:44:31.080301 PCI: 00:0d.0: enabled 1
609 12:44:31.083387 PCI: 00:0d.1: enabled 0
610 12:44:31.083552 PCI: 00:0d.2: enabled 0
611 12:44:31.087197 PCI: 00:0d.3: enabled 0
612 12:44:31.090567 PCI: 00:0e.0: enabled 0
613 12:44:31.093460 PCI: 00:10.2: enabled 1
614 12:44:31.093565 PCI: 00:10.6: enabled 0
615 12:44:31.097126 PCI: 00:10.7: enabled 0
616 12:44:31.099692 PCI: 00:12.0: enabled 0
617 12:44:31.103198 PCI: 00:12.6: enabled 0
618 12:44:31.103292 PCI: 00:13.0: enabled 0
619 12:44:31.106380 PCI: 00:14.0: enabled 1
620 12:44:31.109705 PCI: 00:14.1: enabled 0
621 12:44:31.109809 PCI: 00:14.2: enabled 1
622 12:44:31.113057 PCI: 00:14.3: enabled 1
623 12:44:31.116584 PCI: 00:15.0: enabled 1
624 12:44:31.119991 PCI: 00:15.1: enabled 1
625 12:44:31.120099 PCI: 00:15.2: enabled 1
626 12:44:31.122876 PCI: 00:15.3: enabled 1
627 12:44:31.126285 PCI: 00:16.0: enabled 1
628 12:44:31.129451 PCI: 00:16.1: enabled 0
629 12:44:31.129534 PCI: 00:16.2: enabled 0
630 12:44:31.132845 PCI: 00:16.3: enabled 0
631 12:44:31.136762 PCI: 00:16.4: enabled 0
632 12:44:31.139214 PCI: 00:16.5: enabled 0
633 12:44:31.139301 PCI: 00:17.0: enabled 1
634 12:44:31.142619 PCI: 00:19.0: enabled 0
635 12:44:31.146073 PCI: 00:19.1: enabled 1
636 12:44:31.149445 PCI: 00:19.2: enabled 0
637 12:44:31.149527 PCI: 00:1c.0: enabled 1
638 12:44:31.153030 PCI: 00:1c.1: enabled 0
639 12:44:31.155948 PCI: 00:1c.2: enabled 0
640 12:44:31.156045 PCI: 00:1c.3: enabled 0
641 12:44:31.159180 PCI: 00:1c.4: enabled 0
642 12:44:31.162231 PCI: 00:1c.5: enabled 0
643 12:44:31.165538 PCI: 00:1c.6: enabled 1
644 12:44:31.165626 PCI: 00:1c.7: enabled 0
645 12:44:31.169472 PCI: 00:1d.0: enabled 1
646 12:44:31.172852 PCI: 00:1d.1: enabled 0
647 12:44:31.176047 PCI: 00:1d.2: enabled 1
648 12:44:31.176623 PCI: 00:1d.3: enabled 0
649 12:44:31.179272 PCI: 00:1e.0: enabled 1
650 12:44:31.182854 PCI: 00:1e.1: enabled 0
651 12:44:31.186506 PCI: 00:1e.2: enabled 1
652 12:44:31.186965 PCI: 00:1e.3: enabled 1
653 12:44:31.189341 PCI: 00:1f.0: enabled 1
654 12:44:31.192765 PCI: 00:1f.1: enabled 0
655 12:44:31.196033 PCI: 00:1f.2: enabled 1
656 12:44:31.196572 PCI: 00:1f.3: enabled 1
657 12:44:31.198854 PCI: 00:1f.4: enabled 0
658 12:44:31.202400 PCI: 00:1f.5: enabled 1
659 12:44:31.205950 PCI: 00:1f.6: enabled 0
660 12:44:31.206418 PCI: 00:1f.7: enabled 0
661 12:44:31.209341 APIC: 00: enabled 1
662 12:44:31.212536 GENERIC: 0.0: enabled 1
663 12:44:31.213089 GENERIC: 0.0: enabled 1
664 12:44:31.215499 GENERIC: 1.0: enabled 1
665 12:44:31.218786 GENERIC: 0.0: enabled 1
666 12:44:31.222404 GENERIC: 1.0: enabled 1
667 12:44:31.222858 USB0 port 0: enabled 1
668 12:44:31.225386 GENERIC: 0.0: enabled 1
669 12:44:31.229318 USB0 port 0: enabled 1
670 12:44:31.231925 GENERIC: 0.0: enabled 1
671 12:44:31.232491 I2C: 00:1a: enabled 1
672 12:44:31.235278 I2C: 00:31: enabled 1
673 12:44:31.238412 I2C: 00:32: enabled 1
674 12:44:31.238891 I2C: 00:10: enabled 1
675 12:44:31.242157 I2C: 00:15: enabled 1
676 12:44:31.245643 GENERIC: 0.0: enabled 0
677 12:44:31.246201 GENERIC: 1.0: enabled 0
678 12:44:31.248674 GENERIC: 0.0: enabled 1
679 12:44:31.251951 SPI: 00: enabled 1
680 12:44:31.252432 SPI: 00: enabled 1
681 12:44:31.255193 PNP: 0c09.0: enabled 1
682 12:44:31.258523 GENERIC: 0.0: enabled 1
683 12:44:31.258982 USB3 port 0: enabled 1
684 12:44:31.261710 USB3 port 1: enabled 1
685 12:44:31.264812 USB3 port 2: enabled 0
686 12:44:31.268403 USB3 port 3: enabled 0
687 12:44:31.268863 USB2 port 0: enabled 0
688 12:44:31.271701 USB2 port 1: enabled 1
689 12:44:31.274931 USB2 port 2: enabled 1
690 12:44:31.275565 USB2 port 3: enabled 0
691 12:44:31.279012 USB2 port 4: enabled 1
692 12:44:31.281888 USB2 port 5: enabled 0
693 12:44:31.285001 USB2 port 6: enabled 0
694 12:44:31.285431 USB2 port 7: enabled 0
695 12:44:31.288127 USB2 port 8: enabled 0
696 12:44:31.291468 USB2 port 9: enabled 0
697 12:44:31.291721 USB3 port 0: enabled 0
698 12:44:31.294359 USB3 port 1: enabled 1
699 12:44:31.297773 USB3 port 2: enabled 0
700 12:44:31.300962 USB3 port 3: enabled 0
701 12:44:31.301127 GENERIC: 0.0: enabled 1
702 12:44:31.304683 GENERIC: 1.0: enabled 1
703 12:44:31.307586 APIC: 05: enabled 1
704 12:44:31.307751 APIC: 02: enabled 1
705 12:44:31.311311 APIC: 07: enabled 1
706 12:44:31.314711 APIC: 06: enabled 1
707 12:44:31.314878 APIC: 04: enabled 1
708 12:44:31.318454 APIC: 01: enabled 1
709 12:44:31.318675 APIC: 03: enabled 1
710 12:44:31.321042 Compare with tree...
711 12:44:31.324147 Root Device: enabled 1
712 12:44:31.327926 DOMAIN: 0000: enabled 1
713 12:44:31.328094 PCI: 00:00.0: enabled 1
714 12:44:31.330794 PCI: 00:02.0: enabled 1
715 12:44:31.334194 PCI: 00:04.0: enabled 1
716 12:44:31.337715 GENERIC: 0.0: enabled 1
717 12:44:31.340621 PCI: 00:05.0: enabled 1
718 12:44:31.340706 PCI: 00:06.0: enabled 0
719 12:44:31.344033 PCI: 00:07.0: enabled 0
720 12:44:31.347400 GENERIC: 0.0: enabled 1
721 12:44:31.351028 PCI: 00:07.1: enabled 0
722 12:44:31.353699 GENERIC: 1.0: enabled 1
723 12:44:31.353780 PCI: 00:07.2: enabled 0
724 12:44:31.357415 GENERIC: 0.0: enabled 1
725 12:44:31.360325 PCI: 00:07.3: enabled 0
726 12:44:31.363478 GENERIC: 1.0: enabled 1
727 12:44:31.367210 PCI: 00:08.0: enabled 1
728 12:44:31.367298 PCI: 00:09.0: enabled 0
729 12:44:31.370074 PCI: 00:0a.0: enabled 0
730 12:44:31.373743 PCI: 00:0d.0: enabled 1
731 12:44:31.377135 USB0 port 0: enabled 1
732 12:44:31.380957 USB3 port 0: enabled 1
733 12:44:31.381049 USB3 port 1: enabled 1
734 12:44:31.383630 USB3 port 2: enabled 0
735 12:44:31.386948 USB3 port 3: enabled 0
736 12:44:31.390205 PCI: 00:0d.1: enabled 0
737 12:44:31.393405 PCI: 00:0d.2: enabled 0
738 12:44:31.396625 GENERIC: 0.0: enabled 1
739 12:44:31.396703 PCI: 00:0d.3: enabled 0
740 12:44:31.400805 PCI: 00:0e.0: enabled 0
741 12:44:31.403989 PCI: 00:10.2: enabled 1
742 12:44:31.406874 PCI: 00:10.6: enabled 0
743 12:44:31.410100 PCI: 00:10.7: enabled 0
744 12:44:31.410178 PCI: 00:12.0: enabled 0
745 12:44:31.413414 PCI: 00:12.6: enabled 0
746 12:44:31.416845 PCI: 00:13.0: enabled 0
747 12:44:31.420091 PCI: 00:14.0: enabled 1
748 12:44:31.423471 USB0 port 0: enabled 1
749 12:44:31.423547 USB2 port 0: enabled 0
750 12:44:31.426942 USB2 port 1: enabled 1
751 12:44:31.429940 USB2 port 2: enabled 1
752 12:44:31.433185 USB2 port 3: enabled 0
753 12:44:31.436410 USB2 port 4: enabled 1
754 12:44:31.439802 USB2 port 5: enabled 0
755 12:44:31.439883 USB2 port 6: enabled 0
756 12:44:31.443073 USB2 port 7: enabled 0
757 12:44:31.446461 USB2 port 8: enabled 0
758 12:44:31.449656 USB2 port 9: enabled 0
759 12:44:31.453190 USB3 port 0: enabled 0
760 12:44:31.453274 USB3 port 1: enabled 1
761 12:44:31.456635 USB3 port 2: enabled 0
762 12:44:31.459424 USB3 port 3: enabled 0
763 12:44:31.462563 PCI: 00:14.1: enabled 0
764 12:44:31.465987 PCI: 00:14.2: enabled 1
765 12:44:31.469444 PCI: 00:14.3: enabled 1
766 12:44:31.469528 GENERIC: 0.0: enabled 1
767 12:44:31.472655 PCI: 00:15.0: enabled 1
768 12:44:31.475888 I2C: 00:1a: enabled 1
769 12:44:31.479574 I2C: 00:31: enabled 1
770 12:44:31.479654 I2C: 00:32: enabled 1
771 12:44:31.482755 PCI: 00:15.1: enabled 1
772 12:44:31.486351 I2C: 00:10: enabled 1
773 12:44:31.489636 PCI: 00:15.2: enabled 1
774 12:44:31.492418 PCI: 00:15.3: enabled 1
775 12:44:31.492497 PCI: 00:16.0: enabled 1
776 12:44:31.495772 PCI: 00:16.1: enabled 0
777 12:44:31.499278 PCI: 00:16.2: enabled 0
778 12:44:31.502483 PCI: 00:16.3: enabled 0
779 12:44:31.505602 PCI: 00:16.4: enabled 0
780 12:44:31.505680 PCI: 00:16.5: enabled 0
781 12:44:31.508884 PCI: 00:17.0: enabled 1
782 12:44:31.512551 PCI: 00:19.0: enabled 0
783 12:44:31.515502 PCI: 00:19.1: enabled 1
784 12:44:31.518693 I2C: 00:15: enabled 1
785 12:44:31.518785 PCI: 00:19.2: enabled 0
786 12:44:31.522632 PCI: 00:1d.0: enabled 1
787 12:44:31.525736 GENERIC: 0.0: enabled 1
788 12:44:31.528631 PCI: 00:1e.0: enabled 1
789 12:44:31.532255 PCI: 00:1e.1: enabled 0
790 12:44:31.532340 PCI: 00:1e.2: enabled 1
791 12:44:31.535789 SPI: 00: enabled 1
792 12:44:31.539678 PCI: 00:1e.3: enabled 1
793 12:44:31.539760 SPI: 00: enabled 1
794 12:44:31.543838 PCI: 00:1f.0: enabled 1
795 12:44:31.547108 PNP: 0c09.0: enabled 1
796 12:44:31.547192 PCI: 00:1f.1: enabled 0
797 12:44:31.550432 PCI: 00:1f.2: enabled 1
798 12:44:31.554102 GENERIC: 0.0: enabled 1
799 12:44:31.556909 GENERIC: 0.0: enabled 1
800 12:44:31.560551 GENERIC: 1.0: enabled 1
801 12:44:31.563678 PCI: 00:1f.3: enabled 1
802 12:44:31.563765 PCI: 00:1f.4: enabled 0
803 12:44:31.566809 PCI: 00:1f.5: enabled 1
804 12:44:31.570403 PCI: 00:1f.6: enabled 0
805 12:44:31.622255 PCI: 00:1f.7: enabled 0
806 12:44:31.622381 CPU_CLUSTER: 0: enabled 1
807 12:44:31.622457 APIC: 00: enabled 1
808 12:44:31.622720 APIC: 05: enabled 1
809 12:44:31.622807 APIC: 02: enabled 1
810 12:44:31.623247 APIC: 07: enabled 1
811 12:44:31.623329 APIC: 06: enabled 1
812 12:44:31.623395 APIC: 04: enabled 1
813 12:44:31.623645 APIC: 01: enabled 1
814 12:44:31.623716 APIC: 03: enabled 1
815 12:44:31.623793 Root Device scanning...
816 12:44:31.623857 scan_static_bus for Root Device
817 12:44:31.623919 DOMAIN: 0000 enabled
818 12:44:31.624182 CPU_CLUSTER: 0 enabled
819 12:44:31.624261 DOMAIN: 0000 scanning...
820 12:44:31.624349 PCI: pci_scan_bus for bus 00
821 12:44:31.624633 PCI: 00:00.0 [8086/0000] ops
822 12:44:31.624703 PCI: 00:00.0 [8086/9a12] enabled
823 12:44:31.624994 PCI: 00:02.0 [8086/0000] bus ops
824 12:44:31.637551 PCI: 00:02.0 [8086/9a40] enabled
825 12:44:31.637675 PCI: 00:04.0 [8086/0000] bus ops
826 12:44:31.638166 PCI: 00:04.0 [8086/9a03] enabled
827 12:44:31.638240 PCI: 00:05.0 [8086/9a19] enabled
828 12:44:31.641102 PCI: 00:07.0 [0000/0000] hidden
829 12:44:31.641176 PCI: 00:08.0 [8086/9a11] enabled
830 12:44:31.644112 PCI: 00:0a.0 [8086/9a0d] disabled
831 12:44:31.647942 PCI: 00:0d.0 [8086/0000] bus ops
832 12:44:31.650650 PCI: 00:0d.0 [8086/9a13] enabled
833 12:44:31.654007 PCI: 00:14.0 [8086/0000] bus ops
834 12:44:31.657378 PCI: 00:14.0 [8086/a0ed] enabled
835 12:44:31.660482 PCI: 00:14.2 [8086/a0ef] enabled
836 12:44:31.663698 PCI: 00:14.3 [8086/0000] bus ops
837 12:44:31.667236 PCI: 00:14.3 [8086/a0f0] enabled
838 12:44:31.670473 PCI: 00:15.0 [8086/0000] bus ops
839 12:44:31.673892 PCI: 00:15.0 [8086/a0e8] enabled
840 12:44:31.677083 PCI: 00:15.1 [8086/0000] bus ops
841 12:44:31.680532 PCI: 00:15.1 [8086/a0e9] enabled
842 12:44:31.684102 PCI: 00:15.2 [8086/0000] bus ops
843 12:44:31.687442 PCI: 00:15.2 [8086/a0ea] enabled
844 12:44:31.690414 PCI: 00:15.3 [8086/0000] bus ops
845 12:44:31.694405 PCI: 00:15.3 [8086/a0eb] enabled
846 12:44:31.696942 PCI: 00:16.0 [8086/0000] ops
847 12:44:31.700248 PCI: 00:16.0 [8086/a0e0] enabled
848 12:44:31.707428 PCI: Static device PCI: 00:17.0 not found, disabling it.
849 12:44:31.710298 PCI: 00:19.0 [8086/0000] bus ops
850 12:44:31.713714 PCI: 00:19.0 [8086/a0c5] disabled
851 12:44:31.716829 PCI: 00:19.1 [8086/0000] bus ops
852 12:44:31.719977 PCI: 00:19.1 [8086/a0c6] enabled
853 12:44:31.723434 PCI: 00:1d.0 [8086/0000] bus ops
854 12:44:31.726796 PCI: 00:1d.0 [8086/a0b0] enabled
855 12:44:31.729940 PCI: 00:1e.0 [8086/0000] ops
856 12:44:31.733584 PCI: 00:1e.0 [8086/a0a8] enabled
857 12:44:31.736946 PCI: 00:1e.2 [8086/0000] bus ops
858 12:44:31.740564 PCI: 00:1e.2 [8086/a0aa] enabled
859 12:44:31.743611 PCI: 00:1e.3 [8086/0000] bus ops
860 12:44:31.746695 PCI: 00:1e.3 [8086/a0ab] enabled
861 12:44:31.750276 PCI: 00:1f.0 [8086/0000] bus ops
862 12:44:31.753224 PCI: 00:1f.0 [8086/a087] enabled
863 12:44:31.753311 RTC Init
864 12:44:31.756618 Set power on after power failure.
865 12:44:31.760196 Disabling Deep S3
866 12:44:31.760296 Disabling Deep S3
867 12:44:31.763114 Disabling Deep S4
868 12:44:31.763201 Disabling Deep S4
869 12:44:31.766481 Disabling Deep S5
870 12:44:31.766571 Disabling Deep S5
871 12:44:31.770204 PCI: 00:1f.2 [0000/0000] hidden
872 12:44:31.772958 PCI: 00:1f.3 [8086/0000] bus ops
873 12:44:31.776421 PCI: 00:1f.3 [8086/a0c8] enabled
874 12:44:31.779760 PCI: 00:1f.5 [8086/0000] bus ops
875 12:44:31.782968 PCI: 00:1f.5 [8086/a0a4] enabled
876 12:44:31.786467 PCI: Leftover static devices:
877 12:44:31.789861 PCI: 00:10.2
878 12:44:31.789950 PCI: 00:10.6
879 12:44:31.793261 PCI: 00:10.7
880 12:44:31.793350 PCI: 00:06.0
881 12:44:31.793418 PCI: 00:07.1
882 12:44:31.796565 PCI: 00:07.2
883 12:44:31.796653 PCI: 00:07.3
884 12:44:31.799690 PCI: 00:09.0
885 12:44:31.799768 PCI: 00:0d.1
886 12:44:31.803224 PCI: 00:0d.2
887 12:44:31.803301 PCI: 00:0d.3
888 12:44:31.803366 PCI: 00:0e.0
889 12:44:31.806185 PCI: 00:12.0
890 12:44:31.806264 PCI: 00:12.6
891 12:44:31.809400 PCI: 00:13.0
892 12:44:31.809477 PCI: 00:14.1
893 12:44:31.809544 PCI: 00:16.1
894 12:44:31.813171 PCI: 00:16.2
895 12:44:31.813249 PCI: 00:16.3
896 12:44:31.815999 PCI: 00:16.4
897 12:44:31.816074 PCI: 00:16.5
898 12:44:31.819386 PCI: 00:17.0
899 12:44:31.819462 PCI: 00:19.2
900 12:44:31.819529 PCI: 00:1e.1
901 12:44:31.822743 PCI: 00:1f.1
902 12:44:31.822817 PCI: 00:1f.4
903 12:44:31.826104 PCI: 00:1f.6
904 12:44:31.826178 PCI: 00:1f.7
905 12:44:31.829896 PCI: Check your devicetree.cb.
906 12:44:31.832659 PCI: 00:02.0 scanning...
907 12:44:31.836150 scan_generic_bus for PCI: 00:02.0
908 12:44:31.839063 scan_generic_bus for PCI: 00:02.0 done
909 12:44:31.842643 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
910 12:44:31.846018 PCI: 00:04.0 scanning...
911 12:44:31.849096 scan_generic_bus for PCI: 00:04.0
912 12:44:31.852346 GENERIC: 0.0 enabled
913 12:44:31.859278 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
914 12:44:31.862633 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
915 12:44:31.865908 PCI: 00:0d.0 scanning...
916 12:44:31.869198 scan_static_bus for PCI: 00:0d.0
917 12:44:31.872268 USB0 port 0 enabled
918 12:44:31.872369 USB0 port 0 scanning...
919 12:44:31.875918 scan_static_bus for USB0 port 0
920 12:44:31.878953 USB3 port 0 enabled
921 12:44:31.882132 USB3 port 1 enabled
922 12:44:31.882210 USB3 port 2 disabled
923 12:44:31.885627 USB3 port 3 disabled
924 12:44:31.888827 USB3 port 0 scanning...
925 12:44:31.892136 scan_static_bus for USB3 port 0
926 12:44:31.895584 scan_static_bus for USB3 port 0 done
927 12:44:31.898594 scan_bus: bus USB3 port 0 finished in 6 msecs
928 12:44:31.902221 USB3 port 1 scanning...
929 12:44:31.905329 scan_static_bus for USB3 port 1
930 12:44:31.908557 scan_static_bus for USB3 port 1 done
931 12:44:31.915269 scan_bus: bus USB3 port 1 finished in 6 msecs
932 12:44:31.918755 scan_static_bus for USB0 port 0 done
933 12:44:31.922046 scan_bus: bus USB0 port 0 finished in 43 msecs
934 12:44:31.925352 scan_static_bus for PCI: 00:0d.0 done
935 12:44:31.931733 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
936 12:44:31.935706 PCI: 00:14.0 scanning...
937 12:44:31.938439 scan_static_bus for PCI: 00:14.0
938 12:44:31.938535 USB0 port 0 enabled
939 12:44:31.941565 USB0 port 0 scanning...
940 12:44:31.945308 scan_static_bus for USB0 port 0
941 12:44:31.948477 USB2 port 0 disabled
942 12:44:31.948565 USB2 port 1 enabled
943 12:44:31.951908 USB2 port 2 enabled
944 12:44:31.955129 USB2 port 3 disabled
945 12:44:31.955218 USB2 port 4 enabled
946 12:44:31.958355 USB2 port 5 disabled
947 12:44:31.958452 USB2 port 6 disabled
948 12:44:31.961538 USB2 port 7 disabled
949 12:44:31.964916 USB2 port 8 disabled
950 12:44:31.964994 USB2 port 9 disabled
951 12:44:31.968192 USB3 port 0 disabled
952 12:44:31.971843 USB3 port 1 enabled
953 12:44:31.971920 USB3 port 2 disabled
954 12:44:31.974960 USB3 port 3 disabled
955 12:44:31.977865 USB2 port 1 scanning...
956 12:44:31.981849 scan_static_bus for USB2 port 1
957 12:44:31.984341 scan_static_bus for USB2 port 1 done
958 12:44:31.987942 scan_bus: bus USB2 port 1 finished in 6 msecs
959 12:44:31.991347 USB2 port 2 scanning...
960 12:44:31.994635 scan_static_bus for USB2 port 2
961 12:44:31.997859 scan_static_bus for USB2 port 2 done
962 12:44:32.004431 scan_bus: bus USB2 port 2 finished in 6 msecs
963 12:44:32.004522 USB2 port 4 scanning...
964 12:44:32.007769 scan_static_bus for USB2 port 4
965 12:44:32.014245 scan_static_bus for USB2 port 4 done
966 12:44:32.017905 scan_bus: bus USB2 port 4 finished in 6 msecs
967 12:44:32.020935 USB3 port 1 scanning...
968 12:44:32.024420 scan_static_bus for USB3 port 1
969 12:44:32.027435 scan_static_bus for USB3 port 1 done
970 12:44:32.030871 scan_bus: bus USB3 port 1 finished in 6 msecs
971 12:44:32.034220 scan_static_bus for USB0 port 0 done
972 12:44:32.040735 scan_bus: bus USB0 port 0 finished in 93 msecs
973 12:44:32.044092 scan_static_bus for PCI: 00:14.0 done
974 12:44:32.047544 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
975 12:44:32.050367 PCI: 00:14.3 scanning...
976 12:44:32.054144 scan_static_bus for PCI: 00:14.3
977 12:44:32.057565 GENERIC: 0.0 enabled
978 12:44:32.060933 scan_static_bus for PCI: 00:14.3 done
979 12:44:32.063616 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
980 12:44:32.067471 PCI: 00:15.0 scanning...
981 12:44:32.070345 scan_static_bus for PCI: 00:15.0
982 12:44:32.073648 I2C: 00:1a enabled
983 12:44:32.076971 I2C: 00:31 enabled
984 12:44:32.077090 I2C: 00:32 enabled
985 12:44:32.080320 scan_static_bus for PCI: 00:15.0 done
986 12:44:32.086751 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
987 12:44:32.086842 PCI: 00:15.1 scanning...
988 12:44:32.090165 scan_static_bus for PCI: 00:15.1
989 12:44:32.093801 I2C: 00:10 enabled
990 12:44:32.097832 scan_static_bus for PCI: 00:15.1 done
991 12:44:32.103628 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
992 12:44:32.103726 PCI: 00:15.2 scanning...
993 12:44:32.107037 scan_static_bus for PCI: 00:15.2
994 12:44:32.113628 scan_static_bus for PCI: 00:15.2 done
995 12:44:32.117532 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
996 12:44:32.121104 PCI: 00:15.3 scanning...
997 12:44:32.124568 scan_static_bus for PCI: 00:15.3
998 12:44:32.127566 scan_static_bus for PCI: 00:15.3 done
999 12:44:32.130951 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1000 12:44:32.134097 PCI: 00:19.1 scanning...
1001 12:44:32.137691 scan_static_bus for PCI: 00:19.1
1002 12:44:32.141296 I2C: 00:15 enabled
1003 12:44:32.144527 scan_static_bus for PCI: 00:19.1 done
1004 12:44:32.147373 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1005 12:44:32.150705 PCI: 00:1d.0 scanning...
1006 12:44:32.153968 do_pci_scan_bridge for PCI: 00:1d.0
1007 12:44:32.157631 PCI: pci_scan_bus for bus 01
1008 12:44:32.161034 PCI: 01:00.0 [15b7/5009] enabled
1009 12:44:32.163873 GENERIC: 0.0 enabled
1010 12:44:32.167474 Enabling Common Clock Configuration
1011 12:44:32.170524 L1 Sub-State supported from root port 29
1012 12:44:32.173774 L1 Sub-State Support = 0x5
1013 12:44:32.177245 CommonModeRestoreTime = 0x28
1014 12:44:32.180935 Power On Value = 0x16, Power On Scale = 0x0
1015 12:44:32.183813 ASPM: Enabled L1
1016 12:44:32.187588 PCIe: Max_Payload_Size adjusted to 128
1017 12:44:32.190576 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1018 12:44:32.193598 PCI: 00:1e.2 scanning...
1019 12:44:32.196850 scan_generic_bus for PCI: 00:1e.2
1020 12:44:32.200681 SPI: 00 enabled
1021 12:44:32.206850 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1022 12:44:32.210388 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1023 12:44:32.213645 PCI: 00:1e.3 scanning...
1024 12:44:32.217046 scan_generic_bus for PCI: 00:1e.3
1025 12:44:32.217135 SPI: 00 enabled
1026 12:44:32.223528 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1027 12:44:32.230086 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1028 12:44:32.230176 PCI: 00:1f.0 scanning...
1029 12:44:32.233559 scan_static_bus for PCI: 00:1f.0
1030 12:44:32.236730 PNP: 0c09.0 enabled
1031 12:44:32.240581 PNP: 0c09.0 scanning...
1032 12:44:32.243196 scan_static_bus for PNP: 0c09.0
1033 12:44:32.246730 scan_static_bus for PNP: 0c09.0 done
1034 12:44:32.249994 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1035 12:44:32.256637 scan_static_bus for PCI: 00:1f.0 done
1036 12:44:32.259884 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1037 12:44:32.263060 PCI: 00:1f.2 scanning...
1038 12:44:32.266528 scan_static_bus for PCI: 00:1f.2
1039 12:44:32.266616 GENERIC: 0.0 enabled
1040 12:44:32.269584 GENERIC: 0.0 scanning...
1041 12:44:32.273110 scan_static_bus for GENERIC: 0.0
1042 12:44:32.276699 GENERIC: 0.0 enabled
1043 12:44:32.279800 GENERIC: 1.0 enabled
1044 12:44:32.282861 scan_static_bus for GENERIC: 0.0 done
1045 12:44:32.286419 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1046 12:44:32.290169 scan_static_bus for PCI: 00:1f.2 done
1047 12:44:32.296482 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1048 12:44:32.299479 PCI: 00:1f.3 scanning...
1049 12:44:32.303147 scan_static_bus for PCI: 00:1f.3
1050 12:44:32.306243 scan_static_bus for PCI: 00:1f.3 done
1051 12:44:32.309452 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1052 12:44:32.312734 PCI: 00:1f.5 scanning...
1053 12:44:32.315929 scan_generic_bus for PCI: 00:1f.5
1054 12:44:32.319396 scan_generic_bus for PCI: 00:1f.5 done
1055 12:44:32.326074 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1056 12:44:32.329284 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1057 12:44:32.332986 scan_static_bus for Root Device done
1058 12:44:32.339595 scan_bus: bus Root Device finished in 736 msecs
1059 12:44:32.339687 done
1060 12:44:32.345887 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1061 12:44:32.349098 Chrome EC: UHEPI supported
1062 12:44:32.356266 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1063 12:44:32.362342 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1064 12:44:32.365444 SPI flash protection: WPSW=0 SRP0=1
1065 12:44:32.368844 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:44:32.375992 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1067 12:44:32.378908 found VGA at PCI: 00:02.0
1068 12:44:32.382184 Setting up VGA for PCI: 00:02.0
1069 12:44:32.385459 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:44:32.392582 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:44:32.392673 Allocating resources...
1072 12:44:32.395408 Reading resources...
1073 12:44:32.398900 Root Device read_resources bus 0 link: 0
1074 12:44:32.405290 DOMAIN: 0000 read_resources bus 0 link: 0
1075 12:44:32.408799 PCI: 00:04.0 read_resources bus 1 link: 0
1076 12:44:32.415388 PCI: 00:04.0 read_resources bus 1 link: 0 done
1077 12:44:32.418494 PCI: 00:0d.0 read_resources bus 0 link: 0
1078 12:44:32.424888 USB0 port 0 read_resources bus 0 link: 0
1079 12:44:32.428316 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:44:32.435730 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1081 12:44:32.438255 PCI: 00:14.0 read_resources bus 0 link: 0
1082 12:44:32.441647 USB0 port 0 read_resources bus 0 link: 0
1083 12:44:32.448893 USB0 port 0 read_resources bus 0 link: 0 done
1084 12:44:32.452104 PCI: 00:14.0 read_resources bus 0 link: 0 done
1085 12:44:32.458866 PCI: 00:14.3 read_resources bus 0 link: 0
1086 12:44:32.462451 PCI: 00:14.3 read_resources bus 0 link: 0 done
1087 12:44:32.468800 PCI: 00:15.0 read_resources bus 0 link: 0
1088 12:44:32.472187 PCI: 00:15.0 read_resources bus 0 link: 0 done
1089 12:44:32.478622 PCI: 00:15.1 read_resources bus 0 link: 0
1090 12:44:32.482296 PCI: 00:15.1 read_resources bus 0 link: 0 done
1091 12:44:32.489271 PCI: 00:19.1 read_resources bus 0 link: 0
1092 12:44:32.492514 PCI: 00:19.1 read_resources bus 0 link: 0 done
1093 12:44:32.499009 PCI: 00:1d.0 read_resources bus 1 link: 0
1094 12:44:32.502190 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1095 12:44:32.509284 PCI: 00:1e.2 read_resources bus 2 link: 0
1096 12:44:32.512447 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1097 12:44:32.519098 PCI: 00:1e.3 read_resources bus 3 link: 0
1098 12:44:32.522438 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1099 12:44:32.528832 PCI: 00:1f.0 read_resources bus 0 link: 0
1100 12:44:32.531975 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1101 12:44:32.539016 PCI: 00:1f.2 read_resources bus 0 link: 0
1102 12:44:32.542298 GENERIC: 0.0 read_resources bus 0 link: 0
1103 12:44:32.545539 GENERIC: 0.0 read_resources bus 0 link: 0 done
1104 12:44:32.552112 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1105 12:44:32.558878 DOMAIN: 0000 read_resources bus 0 link: 0 done
1106 12:44:32.562515 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1107 12:44:32.568468 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1108 12:44:32.572070 Root Device read_resources bus 0 link: 0 done
1109 12:44:32.575173 Done reading resources.
1110 12:44:32.578752 Show resources in subtree (Root Device)...After reading.
1111 12:44:32.585283 Root Device child on link 0 DOMAIN: 0000
1112 12:44:32.588567 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1113 12:44:32.598573 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1114 12:44:32.608804 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1115 12:44:32.608897 PCI: 00:00.0
1116 12:44:32.618503 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1117 12:44:32.628427 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1118 12:44:32.638185 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1119 12:44:32.648147 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1120 12:44:32.658110 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1121 12:44:32.664658 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1122 12:44:32.674962 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1123 12:44:32.684762 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1124 12:44:32.694785 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1125 12:44:32.704640 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1126 12:44:32.714745 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1127 12:44:32.721388 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1128 12:44:32.731021 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1129 12:44:32.741079 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1130 12:44:32.751322 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1131 12:44:32.761186 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1132 12:44:32.770745 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1133 12:44:32.777409 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1134 12:44:32.787399 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1135 12:44:32.797474 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1136 12:44:32.800838 PCI: 00:02.0
1137 12:44:32.811089 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1138 12:44:32.820609 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1139 12:44:32.827319 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1140 12:44:32.833959 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1141 12:44:32.843726 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1142 12:44:32.843815 GENERIC: 0.0
1143 12:44:32.847322 PCI: 00:05.0
1144 12:44:32.857140 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1145 12:44:32.860491 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1146 12:44:32.863328 GENERIC: 0.0
1147 12:44:32.863417 PCI: 00:08.0
1148 12:44:32.873556 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 12:44:32.876664 PCI: 00:0a.0
1150 12:44:32.879895 PCI: 00:0d.0 child on link 0 USB0 port 0
1151 12:44:32.889802 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1152 12:44:32.896553 USB0 port 0 child on link 0 USB3 port 0
1153 12:44:32.896641 USB3 port 0
1154 12:44:32.899863 USB3 port 1
1155 12:44:32.899944 USB3 port 2
1156 12:44:32.903186 USB3 port 3
1157 12:44:32.906384 PCI: 00:14.0 child on link 0 USB0 port 0
1158 12:44:32.916227 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1159 12:44:32.919494 USB0 port 0 child on link 0 USB2 port 0
1160 12:44:32.923219 USB2 port 0
1161 12:44:32.926266 USB2 port 1
1162 12:44:32.926355 USB2 port 2
1163 12:44:32.929499 USB2 port 3
1164 12:44:32.929588 USB2 port 4
1165 12:44:32.932648 USB2 port 5
1166 12:44:32.932764 USB2 port 6
1167 12:44:32.936611 USB2 port 7
1168 12:44:32.936753 USB2 port 8
1169 12:44:32.939162 USB2 port 9
1170 12:44:32.939251 USB3 port 0
1171 12:44:32.942751 USB3 port 1
1172 12:44:32.942840 USB3 port 2
1173 12:44:32.945799 USB3 port 3
1174 12:44:32.945888 PCI: 00:14.2
1175 12:44:32.955855 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1176 12:44:32.966013 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1177 12:44:32.972870 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1178 12:44:32.982468 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1179 12:44:32.982565 GENERIC: 0.0
1180 12:44:32.989029 PCI: 00:15.0 child on link 0 I2C: 00:1a
1181 12:44:32.998874 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1182 12:44:32.998970 I2C: 00:1a
1183 12:44:33.002271 I2C: 00:31
1184 12:44:33.002362 I2C: 00:32
1185 12:44:33.005568 PCI: 00:15.1 child on link 0 I2C: 00:10
1186 12:44:33.015224 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1187 12:44:33.018677 I2C: 00:10
1188 12:44:33.018761 PCI: 00:15.2
1189 12:44:33.028498 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1190 12:44:33.031847 PCI: 00:15.3
1191 12:44:33.041845 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:44:33.041932 PCI: 00:16.0
1193 12:44:33.051426 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:44:33.054989 PCI: 00:19.0
1195 12:44:33.058621 PCI: 00:19.1 child on link 0 I2C: 00:15
1196 12:44:33.068372 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:44:33.071636 I2C: 00:15
1198 12:44:33.075046 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1199 12:44:33.084823 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1200 12:44:33.094895 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1201 12:44:33.101366 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1202 12:44:33.104709 GENERIC: 0.0
1203 12:44:33.107798 PCI: 01:00.0
1204 12:44:33.118068 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 12:44:33.127951 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1206 12:44:33.128048 PCI: 00:1e.0
1207 12:44:33.137844 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1208 12:44:33.144608 PCI: 00:1e.2 child on link 0 SPI: 00
1209 12:44:33.154134 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1210 12:44:33.154231 SPI: 00
1211 12:44:33.157718 PCI: 00:1e.3 child on link 0 SPI: 00
1212 12:44:33.167492 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 12:44:33.170658 SPI: 00
1214 12:44:33.174281 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1215 12:44:33.183790 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1216 12:44:33.183896 PNP: 0c09.0
1217 12:44:33.193588 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1218 12:44:33.197530 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1219 12:44:33.207175 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1220 12:44:33.216718 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1221 12:44:33.219962 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1222 12:44:33.223904 GENERIC: 0.0
1223 12:44:33.223996 GENERIC: 1.0
1224 12:44:33.226972 PCI: 00:1f.3
1225 12:44:33.236887 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1226 12:44:33.246779 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1227 12:44:33.246874 PCI: 00:1f.5
1228 12:44:33.256321 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1229 12:44:33.260565 CPU_CLUSTER: 0 child on link 0 APIC: 00
1230 12:44:33.263045 APIC: 00
1231 12:44:33.263148 APIC: 05
1232 12:44:33.266394 APIC: 02
1233 12:44:33.266478 APIC: 07
1234 12:44:33.266547 APIC: 06
1235 12:44:33.270023 APIC: 04
1236 12:44:33.270114 APIC: 01
1237 12:44:33.273093 APIC: 03
1238 12:44:33.279754 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1239 12:44:33.286129 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1240 12:44:33.289687 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1241 12:44:33.296171 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1242 12:44:33.299733 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1243 12:44:33.306418 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1244 12:44:33.312813 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1245 12:44:33.319571 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1246 12:44:33.329560 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1247 12:44:33.335902 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1248 12:44:33.342371 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1249 12:44:33.349087 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1250 12:44:33.356067 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1251 12:44:33.362203 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1252 12:44:33.365430 DOMAIN: 0000: Resource ranges:
1253 12:44:33.369191 * Base: 1000, Size: 800, Tag: 100
1254 12:44:33.375668 * Base: 1900, Size: e700, Tag: 100
1255 12:44:33.378928 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1256 12:44:33.385416 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1257 12:44:33.391977 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1258 12:44:33.401891 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1259 12:44:33.408821 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1260 12:44:33.415166 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1261 12:44:33.425035 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1262 12:44:33.431407 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1263 12:44:33.438523 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1264 12:44:33.448164 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1265 12:44:33.454762 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1266 12:44:33.461157 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1267 12:44:33.471315 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1268 12:44:33.478043 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1269 12:44:33.484368 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1270 12:44:33.494346 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1271 12:44:33.501144 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1272 12:44:33.507567 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1273 12:44:33.517333 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1274 12:44:33.524085 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1275 12:44:33.530856 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1276 12:44:33.540967 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1277 12:44:33.547433 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1278 12:44:33.553724 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1279 12:44:33.563552 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1280 12:44:33.567069 DOMAIN: 0000: Resource ranges:
1281 12:44:33.570379 * Base: 7fc00000, Size: 40400000, Tag: 200
1282 12:44:33.573491 * Base: d0000000, Size: 28000000, Tag: 200
1283 12:44:33.580670 * Base: fa000000, Size: 1000000, Tag: 200
1284 12:44:33.583773 * Base: fb001000, Size: 2fff000, Tag: 200
1285 12:44:33.586629 * Base: fe010000, Size: 2e000, Tag: 200
1286 12:44:33.590066 * Base: fe03f000, Size: d41000, Tag: 200
1287 12:44:33.596823 * Base: fed88000, Size: 8000, Tag: 200
1288 12:44:33.600037 * Base: fed93000, Size: d000, Tag: 200
1289 12:44:33.603463 * Base: feda2000, Size: 1e000, Tag: 200
1290 12:44:33.606784 * Base: fede0000, Size: 1220000, Tag: 200
1291 12:44:33.613942 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1292 12:44:33.619803 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1293 12:44:33.626404 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1294 12:44:33.633387 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1295 12:44:33.639622 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1296 12:44:33.646561 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1297 12:44:33.653130 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1298 12:44:33.659700 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1299 12:44:33.666311 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1300 12:44:33.672748 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1301 12:44:33.679125 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1302 12:44:33.686016 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1303 12:44:33.692507 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1304 12:44:33.698957 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1305 12:44:33.705744 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1306 12:44:33.712895 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1307 12:44:33.719094 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1308 12:44:33.725607 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1309 12:44:33.732106 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1310 12:44:33.738733 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1311 12:44:33.745573 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1312 12:44:33.752147 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1313 12:44:33.758674 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1314 12:44:33.765612 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1315 12:44:33.775387 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1316 12:44:33.778578 PCI: 00:1d.0: Resource ranges:
1317 12:44:33.781745 * Base: 7fc00000, Size: 100000, Tag: 200
1318 12:44:33.788507 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1319 12:44:33.794911 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1320 12:44:33.805786 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1321 12:44:33.811485 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1322 12:44:33.814923 Root Device assign_resources, bus 0 link: 0
1323 12:44:33.821132 DOMAIN: 0000 assign_resources, bus 0 link: 0
1324 12:44:33.828103 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1325 12:44:33.838193 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1326 12:44:33.844640 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1327 12:44:33.851313 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1328 12:44:33.857691 PCI: 00:04.0 assign_resources, bus 1 link: 0
1329 12:44:33.861011 PCI: 00:04.0 assign_resources, bus 1 link: 0
1330 12:44:33.870824 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1331 12:44:33.877511 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1332 12:44:33.887294 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1333 12:44:33.890823 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1334 12:44:33.894070 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1335 12:44:33.903858 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1336 12:44:33.907368 PCI: 00:14.0 assign_resources, bus 0 link: 0
1337 12:44:33.914451 PCI: 00:14.0 assign_resources, bus 0 link: 0
1338 12:44:33.920851 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1339 12:44:33.930718 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1340 12:44:33.936959 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1341 12:44:33.940688 PCI: 00:14.3 assign_resources, bus 0 link: 0
1342 12:44:33.946697 PCI: 00:14.3 assign_resources, bus 0 link: 0
1343 12:44:33.953993 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1344 12:44:33.960273 PCI: 00:15.0 assign_resources, bus 0 link: 0
1345 12:44:33.963439 PCI: 00:15.0 assign_resources, bus 0 link: 0
1346 12:44:33.973531 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1347 12:44:33.976843 PCI: 00:15.1 assign_resources, bus 0 link: 0
1348 12:44:33.979714 PCI: 00:15.1 assign_resources, bus 0 link: 0
1349 12:44:33.990057 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1350 12:44:33.996745 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1351 12:44:34.006890 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1352 12:44:34.012808 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1353 12:44:34.019380 PCI: 00:19.1 assign_resources, bus 0 link: 0
1354 12:44:34.022734 PCI: 00:19.1 assign_resources, bus 0 link: 0
1355 12:44:34.032804 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1356 12:44:34.042954 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1357 12:44:34.049457 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1358 12:44:34.055840 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1359 12:44:34.062667 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1360 12:44:34.072575 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1361 12:44:34.075655 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1362 12:44:34.085719 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1363 12:44:34.088847 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1364 12:44:34.092165 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1365 12:44:34.102076 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1366 12:44:34.105620 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1367 12:44:34.112349 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1368 12:44:34.115641 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1369 12:44:34.122340 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1370 12:44:34.125103 LPC: Trying to open IO window from 800 size 1ff
1371 12:44:34.135366 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1372 12:44:34.141918 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1373 12:44:34.148864 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1374 12:44:34.155212 DOMAIN: 0000 assign_resources, bus 0 link: 0
1375 12:44:34.158436 Root Device assign_resources, bus 0 link: 0
1376 12:44:34.161790 Done setting resources.
1377 12:44:34.168789 Show resources in subtree (Root Device)...After assigning values.
1378 12:44:34.171961 Root Device child on link 0 DOMAIN: 0000
1379 12:44:34.178570 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1380 12:44:34.185283 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1381 12:44:34.195104 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1382 12:44:34.198351 PCI: 00:00.0
1383 12:44:34.208604 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1384 12:44:34.218758 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1385 12:44:34.225605 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1386 12:44:34.234832 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1387 12:44:34.244964 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1388 12:44:34.254821 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1389 12:44:34.264491 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1390 12:44:34.274833 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1391 12:44:34.281351 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1392 12:44:34.290900 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1393 12:44:34.301167 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1394 12:44:34.311032 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1395 12:44:34.320866 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1396 12:44:34.327420 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1397 12:44:34.337280 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1398 12:44:34.347563 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1399 12:44:34.357380 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1400 12:44:34.367001 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1401 12:44:34.377092 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1402 12:44:34.387244 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1403 12:44:34.387345 PCI: 00:02.0
1404 12:44:34.397216 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1405 12:44:34.410199 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1406 12:44:34.417202 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1407 12:44:34.423440 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1408 12:44:34.433921 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1409 12:44:34.434092 GENERIC: 0.0
1410 12:44:34.436702 PCI: 00:05.0
1411 12:44:34.446937 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1412 12:44:34.453427 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1413 12:44:34.453555 GENERIC: 0.0
1414 12:44:34.456783 PCI: 00:08.0
1415 12:44:34.466384 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1416 12:44:34.466514 PCI: 00:0a.0
1417 12:44:34.469682 PCI: 00:0d.0 child on link 0 USB0 port 0
1418 12:44:34.482928 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1419 12:44:34.486119 USB0 port 0 child on link 0 USB3 port 0
1420 12:44:34.489674 USB3 port 0
1421 12:44:34.489767 USB3 port 1
1422 12:44:34.492842 USB3 port 2
1423 12:44:34.492939 USB3 port 3
1424 12:44:34.496221 PCI: 00:14.0 child on link 0 USB0 port 0
1425 12:44:34.509553 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1426 12:44:34.512649 USB0 port 0 child on link 0 USB2 port 0
1427 12:44:34.515798 USB2 port 0
1428 12:44:34.515919 USB2 port 1
1429 12:44:34.519692 USB2 port 2
1430 12:44:34.519784 USB2 port 3
1431 12:44:34.522722 USB2 port 4
1432 12:44:34.522861 USB2 port 5
1433 12:44:34.525709 USB2 port 6
1434 12:44:34.525836 USB2 port 7
1435 12:44:34.529330 USB2 port 8
1436 12:44:34.529455 USB2 port 9
1437 12:44:34.532447 USB3 port 0
1438 12:44:34.532568 USB3 port 1
1439 12:44:34.535750 USB3 port 2
1440 12:44:34.535841 USB3 port 3
1441 12:44:34.538881 PCI: 00:14.2
1442 12:44:34.549039 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1443 12:44:34.559073 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1444 12:44:34.565751 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1445 12:44:34.575199 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1446 12:44:34.575309 GENERIC: 0.0
1447 12:44:34.581927 PCI: 00:15.0 child on link 0 I2C: 00:1a
1448 12:44:34.592250 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1449 12:44:34.592379 I2C: 00:1a
1450 12:44:34.595754 I2C: 00:31
1451 12:44:34.595847 I2C: 00:32
1452 12:44:34.598440 PCI: 00:15.1 child on link 0 I2C: 00:10
1453 12:44:34.611757 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1454 12:44:34.611859 I2C: 00:10
1455 12:44:34.615125 PCI: 00:15.2
1456 12:44:34.624801 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1457 12:44:34.624910 PCI: 00:15.3
1458 12:44:34.635147 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1459 12:44:34.638347 PCI: 00:16.0
1460 12:44:34.648098 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1461 12:44:34.648206 PCI: 00:19.0
1462 12:44:34.654594 PCI: 00:19.1 child on link 0 I2C: 00:15
1463 12:44:34.664659 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1464 12:44:34.664780 I2C: 00:15
1465 12:44:34.671282 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1466 12:44:34.677975 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1467 12:44:34.690961 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1468 12:44:34.700954 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1469 12:44:34.704637 GENERIC: 0.0
1470 12:44:34.704733 PCI: 01:00.0
1471 12:44:34.714182 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1472 12:44:34.724510 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1473 12:44:34.727670 PCI: 00:1e.0
1474 12:44:34.737415 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1475 12:44:34.743873 PCI: 00:1e.2 child on link 0 SPI: 00
1476 12:44:34.753822 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1477 12:44:34.753946 SPI: 00
1478 12:44:34.757319 PCI: 00:1e.3 child on link 0 SPI: 00
1479 12:44:34.766957 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1480 12:44:34.770033 SPI: 00
1481 12:44:34.773321 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1482 12:44:34.783359 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1483 12:44:34.783452 PNP: 0c09.0
1484 12:44:34.793303 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1485 12:44:34.797345 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1486 12:44:34.806723 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1487 12:44:34.816981 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1488 12:44:34.819905 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1489 12:44:34.823482 GENERIC: 0.0
1490 12:44:34.823571 GENERIC: 1.0
1491 12:44:34.826371 PCI: 00:1f.3
1492 12:44:34.836773 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1493 12:44:34.846468 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1494 12:44:34.849534 PCI: 00:1f.5
1495 12:44:34.859633 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1496 12:44:34.862772 CPU_CLUSTER: 0 child on link 0 APIC: 00
1497 12:44:34.866182 APIC: 00
1498 12:44:34.866271 APIC: 05
1499 12:44:34.866340 APIC: 02
1500 12:44:34.869513 APIC: 07
1501 12:44:34.869601 APIC: 06
1502 12:44:34.872743 APIC: 04
1503 12:44:34.872832 APIC: 01
1504 12:44:34.872902 APIC: 03
1505 12:44:34.875810 Done allocating resources.
1506 12:44:34.882752 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1507 12:44:34.889007 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1508 12:44:34.892293 Configure GPIOs for I2S audio on UP4.
1509 12:44:34.899967 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1510 12:44:34.902612 Enabling resources...
1511 12:44:34.905995 PCI: 00:00.0 subsystem <- 8086/9a12
1512 12:44:34.909048 PCI: 00:00.0 cmd <- 06
1513 12:44:34.912408 PCI: 00:02.0 subsystem <- 8086/9a40
1514 12:44:34.915427 PCI: 00:02.0 cmd <- 03
1515 12:44:34.918713 PCI: 00:04.0 subsystem <- 8086/9a03
1516 12:44:34.918802 PCI: 00:04.0 cmd <- 02
1517 12:44:34.925301 PCI: 00:05.0 subsystem <- 8086/9a19
1518 12:44:34.925390 PCI: 00:05.0 cmd <- 02
1519 12:44:34.928767 PCI: 00:08.0 subsystem <- 8086/9a11
1520 12:44:34.931989 PCI: 00:08.0 cmd <- 06
1521 12:44:34.935822 PCI: 00:0d.0 subsystem <- 8086/9a13
1522 12:44:34.938789 PCI: 00:0d.0 cmd <- 02
1523 12:44:34.942207 PCI: 00:14.0 subsystem <- 8086/a0ed
1524 12:44:34.945659 PCI: 00:14.0 cmd <- 02
1525 12:44:34.948523 PCI: 00:14.2 subsystem <- 8086/a0ef
1526 12:44:34.951642 PCI: 00:14.2 cmd <- 02
1527 12:44:34.955139 PCI: 00:14.3 subsystem <- 8086/a0f0
1528 12:44:34.958441 PCI: 00:14.3 cmd <- 02
1529 12:44:34.961971 PCI: 00:15.0 subsystem <- 8086/a0e8
1530 12:44:34.964976 PCI: 00:15.0 cmd <- 02
1531 12:44:34.968500 PCI: 00:15.1 subsystem <- 8086/a0e9
1532 12:44:34.968587 PCI: 00:15.1 cmd <- 02
1533 12:44:34.975031 PCI: 00:15.2 subsystem <- 8086/a0ea
1534 12:44:34.975113 PCI: 00:15.2 cmd <- 02
1535 12:44:34.978576 PCI: 00:15.3 subsystem <- 8086/a0eb
1536 12:44:34.981595 PCI: 00:15.3 cmd <- 02
1537 12:44:34.985069 PCI: 00:16.0 subsystem <- 8086/a0e0
1538 12:44:34.988590 PCI: 00:16.0 cmd <- 02
1539 12:44:34.991646 PCI: 00:19.1 subsystem <- 8086/a0c6
1540 12:44:34.994652 PCI: 00:19.1 cmd <- 02
1541 12:44:34.998292 PCI: 00:1d.0 bridge ctrl <- 0013
1542 12:44:35.001397 PCI: 00:1d.0 subsystem <- 8086/a0b0
1543 12:44:35.004647 PCI: 00:1d.0 cmd <- 06
1544 12:44:35.008284 PCI: 00:1e.0 subsystem <- 8086/a0a8
1545 12:44:35.011475 PCI: 00:1e.0 cmd <- 06
1546 12:44:35.014665 PCI: 00:1e.2 subsystem <- 8086/a0aa
1547 12:44:35.017552 PCI: 00:1e.2 cmd <- 06
1548 12:44:35.021145 PCI: 00:1e.3 subsystem <- 8086/a0ab
1549 12:44:35.021228 PCI: 00:1e.3 cmd <- 02
1550 12:44:35.028022 PCI: 00:1f.0 subsystem <- 8086/a087
1551 12:44:35.028105 PCI: 00:1f.0 cmd <- 407
1552 12:44:35.031131 PCI: 00:1f.3 subsystem <- 8086/a0c8
1553 12:44:35.034321 PCI: 00:1f.3 cmd <- 02
1554 12:44:35.037899 PCI: 00:1f.5 subsystem <- 8086/a0a4
1555 12:44:35.040745 PCI: 00:1f.5 cmd <- 406
1556 12:44:35.045789 PCI: 01:00.0 cmd <- 02
1557 12:44:35.050476 done.
1558 12:44:35.053577 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1559 12:44:35.057048 Initializing devices...
1560 12:44:35.059993 Root Device init
1561 12:44:35.063374 Chrome EC: Set SMI mask to 0x0000000000000000
1562 12:44:35.070205 Chrome EC: clear events_b mask to 0x0000000000000000
1563 12:44:35.076753 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1564 12:44:35.083312 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1565 12:44:35.089859 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1566 12:44:35.092965 Chrome EC: Set WAKE mask to 0x0000000000000000
1567 12:44:35.100266 fw_config match found: DB_USB=USB3_ACTIVE
1568 12:44:35.103586 Configure Right Type-C port orientation for retimer
1569 12:44:35.109860 Root Device init finished in 45 msecs
1570 12:44:35.109944 PCI: 00:00.0 init
1571 12:44:35.114279 CPU TDP = 9 Watts
1572 12:44:35.117777 CPU PL1 = 9 Watts
1573 12:44:35.117867 CPU PL2 = 40 Watts
1574 12:44:35.120491 CPU PL4 = 83 Watts
1575 12:44:35.124843 PCI: 00:00.0 init finished in 8 msecs
1576 12:44:35.127541 PCI: 00:02.0 init
1577 12:44:35.127630 GMA: Found VBT in CBFS
1578 12:44:35.130514 GMA: Found valid VBT in CBFS
1579 12:44:35.137153 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1580 12:44:35.143754 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1581 12:44:35.147157 PCI: 00:02.0 init finished in 18 msecs
1582 12:44:35.150804 PCI: 00:05.0 init
1583 12:44:35.153880 PCI: 00:05.0 init finished in 0 msecs
1584 12:44:35.157707 PCI: 00:08.0 init
1585 12:44:35.160392 PCI: 00:08.0 init finished in 0 msecs
1586 12:44:35.164151 PCI: 00:14.0 init
1587 12:44:35.167370 PCI: 00:14.0 init finished in 0 msecs
1588 12:44:35.170406 PCI: 00:14.2 init
1589 12:44:35.173772 PCI: 00:14.2 init finished in 0 msecs
1590 12:44:35.177122 PCI: 00:15.0 init
1591 12:44:35.180587 I2C bus 0 version 0x3230302a
1592 12:44:35.183707 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1593 12:44:35.186741 PCI: 00:15.0 init finished in 6 msecs
1594 12:44:35.190647 PCI: 00:15.1 init
1595 12:44:35.190735 I2C bus 1 version 0x3230302a
1596 12:44:35.196705 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1597 12:44:35.200163 PCI: 00:15.1 init finished in 6 msecs
1598 12:44:35.200252 PCI: 00:15.2 init
1599 12:44:35.204066 I2C bus 2 version 0x3230302a
1600 12:44:35.206682 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1601 12:44:35.209962 PCI: 00:15.2 init finished in 6 msecs
1602 12:44:35.213687 PCI: 00:15.3 init
1603 12:44:35.217117 I2C bus 3 version 0x3230302a
1604 12:44:35.220440 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1605 12:44:35.223797 PCI: 00:15.3 init finished in 6 msecs
1606 12:44:35.227002 PCI: 00:16.0 init
1607 12:44:35.230202 PCI: 00:16.0 init finished in 0 msecs
1608 12:44:35.233484 PCI: 00:19.1 init
1609 12:44:35.237003 I2C bus 5 version 0x3230302a
1610 12:44:35.240739 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1611 12:44:35.243688 PCI: 00:19.1 init finished in 6 msecs
1612 12:44:35.246427 PCI: 00:1d.0 init
1613 12:44:35.249989 Initializing PCH PCIe bridge.
1614 12:44:35.253165 PCI: 00:1d.0 init finished in 3 msecs
1615 12:44:35.256863 PCI: 00:1f.0 init
1616 12:44:35.259829 IOAPIC: Initializing IOAPIC at 0xfec00000
1617 12:44:35.263378 IOAPIC: Bootstrap Processor Local APIC = 0x00
1618 12:44:35.266361 IOAPIC: ID = 0x02
1619 12:44:35.269789 IOAPIC: Dumping registers
1620 12:44:35.269878 reg 0x0000: 0x02000000
1621 12:44:35.272991 reg 0x0001: 0x00770020
1622 12:44:35.276430 reg 0x0002: 0x00000000
1623 12:44:35.279615 PCI: 00:1f.0 init finished in 21 msecs
1624 12:44:35.283154 PCI: 00:1f.2 init
1625 12:44:35.286225 Disabling ACPI via APMC.
1626 12:44:35.289830 APMC done.
1627 12:44:35.293040 PCI: 00:1f.2 init finished in 6 msecs
1628 12:44:35.304913 PCI: 01:00.0 init
1629 12:44:35.308175 PCI: 01:00.0 init finished in 0 msecs
1630 12:44:35.311667 PNP: 0c09.0 init
1631 12:44:35.314600 Google Chrome EC uptime: 8.382 seconds
1632 12:44:35.321089 Google Chrome AP resets since EC boot: 1
1633 12:44:35.324807 Google Chrome most recent AP reset causes:
1634 12:44:35.328254 0.483: 32775 shutdown: entering G3
1635 12:44:35.334539 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1636 12:44:35.337783 PNP: 0c09.0 init finished in 22 msecs
1637 12:44:35.343388 Devices initialized
1638 12:44:35.347046 Show all devs... After init.
1639 12:44:35.350294 Root Device: enabled 1
1640 12:44:35.350393 DOMAIN: 0000: enabled 1
1641 12:44:35.353478 CPU_CLUSTER: 0: enabled 1
1642 12:44:35.356987 PCI: 00:00.0: enabled 1
1643 12:44:35.360299 PCI: 00:02.0: enabled 1
1644 12:44:35.360417 PCI: 00:04.0: enabled 1
1645 12:44:35.363157 PCI: 00:05.0: enabled 1
1646 12:44:35.366574 PCI: 00:06.0: enabled 0
1647 12:44:35.369689 PCI: 00:07.0: enabled 0
1648 12:44:35.369771 PCI: 00:07.1: enabled 0
1649 12:44:35.373082 PCI: 00:07.2: enabled 0
1650 12:44:35.376606 PCI: 00:07.3: enabled 0
1651 12:44:35.379910 PCI: 00:08.0: enabled 1
1652 12:44:35.379987 PCI: 00:09.0: enabled 0
1653 12:44:35.382927 PCI: 00:0a.0: enabled 0
1654 12:44:35.386188 PCI: 00:0d.0: enabled 1
1655 12:44:35.389829 PCI: 00:0d.1: enabled 0
1656 12:44:35.389922 PCI: 00:0d.2: enabled 0
1657 12:44:35.393215 PCI: 00:0d.3: enabled 0
1658 12:44:35.396389 PCI: 00:0e.0: enabled 0
1659 12:44:35.399669 PCI: 00:10.2: enabled 1
1660 12:44:35.399748 PCI: 00:10.6: enabled 0
1661 12:44:35.403020 PCI: 00:10.7: enabled 0
1662 12:44:35.406799 PCI: 00:12.0: enabled 0
1663 12:44:35.409546 PCI: 00:12.6: enabled 0
1664 12:44:35.409627 PCI: 00:13.0: enabled 0
1665 12:44:35.413046 PCI: 00:14.0: enabled 1
1666 12:44:35.416002 PCI: 00:14.1: enabled 0
1667 12:44:35.416091 PCI: 00:14.2: enabled 1
1668 12:44:35.419215 PCI: 00:14.3: enabled 1
1669 12:44:35.422640 PCI: 00:15.0: enabled 1
1670 12:44:35.426136 PCI: 00:15.1: enabled 1
1671 12:44:35.426220 PCI: 00:15.2: enabled 1
1672 12:44:35.429278 PCI: 00:15.3: enabled 1
1673 12:44:35.432515 PCI: 00:16.0: enabled 1
1674 12:44:35.435847 PCI: 00:16.1: enabled 0
1675 12:44:35.435933 PCI: 00:16.2: enabled 0
1676 12:44:35.438998 PCI: 00:16.3: enabled 0
1677 12:44:35.442406 PCI: 00:16.4: enabled 0
1678 12:44:35.445788 PCI: 00:16.5: enabled 0
1679 12:44:35.445868 PCI: 00:17.0: enabled 0
1680 12:44:35.448770 PCI: 00:19.0: enabled 0
1681 12:44:35.452456 PCI: 00:19.1: enabled 1
1682 12:44:35.455772 PCI: 00:19.2: enabled 0
1683 12:44:35.455853 PCI: 00:1c.0: enabled 1
1684 12:44:35.458942 PCI: 00:1c.1: enabled 0
1685 12:44:35.462141 PCI: 00:1c.2: enabled 0
1686 12:44:35.465404 PCI: 00:1c.3: enabled 0
1687 12:44:35.465485 PCI: 00:1c.4: enabled 0
1688 12:44:35.469091 PCI: 00:1c.5: enabled 0
1689 12:44:35.472047 PCI: 00:1c.6: enabled 1
1690 12:44:35.475251 PCI: 00:1c.7: enabled 0
1691 12:44:35.475353 PCI: 00:1d.0: enabled 1
1692 12:44:35.479441 PCI: 00:1d.1: enabled 0
1693 12:44:35.481954 PCI: 00:1d.2: enabled 1
1694 12:44:35.482042 PCI: 00:1d.3: enabled 0
1695 12:44:35.485290 PCI: 00:1e.0: enabled 1
1696 12:44:35.488931 PCI: 00:1e.1: enabled 0
1697 12:44:35.492364 PCI: 00:1e.2: enabled 1
1698 12:44:35.492446 PCI: 00:1e.3: enabled 1
1699 12:44:35.495325 PCI: 00:1f.0: enabled 1
1700 12:44:35.498749 PCI: 00:1f.1: enabled 0
1701 12:44:35.501924 PCI: 00:1f.2: enabled 1
1702 12:44:35.502003 PCI: 00:1f.3: enabled 1
1703 12:44:35.504964 PCI: 00:1f.4: enabled 0
1704 12:44:35.508298 PCI: 00:1f.5: enabled 1
1705 12:44:35.511808 PCI: 00:1f.6: enabled 0
1706 12:44:35.511909 PCI: 00:1f.7: enabled 0
1707 12:44:35.515277 APIC: 00: enabled 1
1708 12:44:35.518703 GENERIC: 0.0: enabled 1
1709 12:44:35.518781 GENERIC: 0.0: enabled 1
1710 12:44:35.521641 GENERIC: 1.0: enabled 1
1711 12:44:35.525394 GENERIC: 0.0: enabled 1
1712 12:44:35.528208 GENERIC: 1.0: enabled 1
1713 12:44:35.528287 USB0 port 0: enabled 1
1714 12:44:35.531493 GENERIC: 0.0: enabled 1
1715 12:44:35.534892 USB0 port 0: enabled 1
1716 12:44:35.538208 GENERIC: 0.0: enabled 1
1717 12:44:35.538286 I2C: 00:1a: enabled 1
1718 12:44:35.541439 I2C: 00:31: enabled 1
1719 12:44:35.544803 I2C: 00:32: enabled 1
1720 12:44:35.544896 I2C: 00:10: enabled 1
1721 12:44:35.548454 I2C: 00:15: enabled 1
1722 12:44:35.551463 GENERIC: 0.0: enabled 0
1723 12:44:35.551554 GENERIC: 1.0: enabled 0
1724 12:44:35.554905 GENERIC: 0.0: enabled 1
1725 12:44:35.558249 SPI: 00: enabled 1
1726 12:44:35.558326 SPI: 00: enabled 1
1727 12:44:35.561285 PNP: 0c09.0: enabled 1
1728 12:44:35.564772 GENERIC: 0.0: enabled 1
1729 12:44:35.564851 USB3 port 0: enabled 1
1730 12:44:35.567801 USB3 port 1: enabled 1
1731 12:44:35.571549 USB3 port 2: enabled 0
1732 12:44:35.574447 USB3 port 3: enabled 0
1733 12:44:35.574540 USB2 port 0: enabled 0
1734 12:44:35.578187 USB2 port 1: enabled 1
1735 12:44:35.581404 USB2 port 2: enabled 1
1736 12:44:35.581496 USB2 port 3: enabled 0
1737 12:44:35.584462 USB2 port 4: enabled 1
1738 12:44:35.587761 USB2 port 5: enabled 0
1739 12:44:35.591033 USB2 port 6: enabled 0
1740 12:44:35.591110 USB2 port 7: enabled 0
1741 12:44:35.594789 USB2 port 8: enabled 0
1742 12:44:35.598253 USB2 port 9: enabled 0
1743 12:44:35.598345 USB3 port 0: enabled 0
1744 12:44:35.601840 USB3 port 1: enabled 1
1745 12:44:35.604602 USB3 port 2: enabled 0
1746 12:44:35.604697 USB3 port 3: enabled 0
1747 12:44:35.607911 GENERIC: 0.0: enabled 1
1748 12:44:35.611715 GENERIC: 1.0: enabled 1
1749 12:44:35.614268 APIC: 05: enabled 1
1750 12:44:35.614362 APIC: 02: enabled 1
1751 12:44:35.617708 APIC: 07: enabled 1
1752 12:44:35.617800 APIC: 06: enabled 1
1753 12:44:35.620943 APIC: 04: enabled 1
1754 12:44:35.624375 APIC: 01: enabled 1
1755 12:44:35.624459 APIC: 03: enabled 1
1756 12:44:35.627677 PCI: 01:00.0: enabled 1
1757 12:44:35.634310 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1758 12:44:35.637712 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1759 12:44:35.640938 ELOG: NV offset 0xf30000 size 0x1000
1760 12:44:35.648676 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1761 12:44:35.655089 ELOG: Event(17) added with size 13 at 2023-03-22 12:44:35 UTC
1762 12:44:35.661738 ELOG: Event(92) added with size 9 at 2023-03-22 12:44:35 UTC
1763 12:44:35.668857 ELOG: Event(93) added with size 9 at 2023-03-22 12:44:35 UTC
1764 12:44:35.675456 ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:35 UTC
1765 12:44:35.681774 ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:35 UTC
1766 12:44:35.688306 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1767 12:44:35.695030 ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:35 UTC
1768 12:44:35.701397 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1769 12:44:35.708786 ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:35 UTC
1770 12:44:35.711422 elog_add_boot_reason: Logged dev mode boot
1771 12:44:35.718161 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1772 12:44:35.718264 Finalize devices...
1773 12:44:35.721897 Devices finalized
1774 12:44:35.728097 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1775 12:44:35.731333 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1776 12:44:35.738380 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1777 12:44:35.741743 ME: HFSTS1 : 0x80030055
1778 12:44:35.747664 ME: HFSTS2 : 0x30280116
1779 12:44:35.751220 ME: HFSTS3 : 0x00000050
1780 12:44:35.754515 ME: HFSTS4 : 0x00004000
1781 12:44:35.760833 ME: HFSTS5 : 0x00000000
1782 12:44:35.764155 ME: HFSTS6 : 0x40400006
1783 12:44:35.767635 ME: Manufacturing Mode : YES
1784 12:44:35.771144 ME: SPI Protection Mode Enabled : NO
1785 12:44:35.777598 ME: FW Partition Table : OK
1786 12:44:35.781135 ME: Bringup Loader Failure : NO
1787 12:44:35.784189 ME: Firmware Init Complete : NO
1788 12:44:35.787958 ME: Boot Options Present : NO
1789 12:44:35.791008 ME: Update In Progress : NO
1790 12:44:35.794378 ME: D0i3 Support : YES
1791 12:44:35.797245 ME: Low Power State Enabled : NO
1792 12:44:35.800684 ME: CPU Replaced : YES
1793 12:44:35.807810 ME: CPU Replacement Valid : YES
1794 12:44:35.810941 ME: Current Working State : 5
1795 12:44:35.814156 ME: Current Operation State : 1
1796 12:44:35.817647 ME: Current Operation Mode : 3
1797 12:44:35.821342 ME: Error Code : 0
1798 12:44:35.823893 ME: Enhanced Debug Mode : NO
1799 12:44:35.827322 ME: CPU Debug Disabled : YES
1800 12:44:35.830637 ME: TXT Support : NO
1801 12:44:35.837002 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1802 12:44:35.846882 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1803 12:44:35.850491 CBFS: 'fallback/slic' not found.
1804 12:44:35.853757 ACPI: Writing ACPI tables at 76b01000.
1805 12:44:35.853857 ACPI: * FACS
1806 12:44:35.856892 ACPI: * DSDT
1807 12:44:35.860257 Ramoops buffer: 0x100000@0x76a00000.
1808 12:44:35.863301 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1809 12:44:35.870130 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1810 12:44:35.873326 Google Chrome EC: version:
1811 12:44:35.876803 ro: voema_v2.0.10114-a447f03e46
1812 12:44:35.879899 rw: voema_v2.0.10114-a447f03e46
1813 12:44:35.879995 running image: 2
1814 12:44:35.886391 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1815 12:44:35.891674 ACPI: * FADT
1816 12:44:35.891823 SCI is IRQ9
1817 12:44:35.898194 ACPI: added table 1/32, length now 40
1818 12:44:35.898320 ACPI: * SSDT
1819 12:44:35.901541 Found 1 CPU(s) with 8 core(s) each.
1820 12:44:35.908498 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1821 12:44:35.911177 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1822 12:44:35.914663 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1823 12:44:35.918251 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1824 12:44:35.924512 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1825 12:44:35.931445 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1826 12:44:35.934450 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1827 12:44:35.941373 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1828 12:44:35.947842 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1829 12:44:35.952022 \_SB.PCI0.RP09: Added StorageD3Enable property
1830 12:44:35.958047 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1831 12:44:35.961004 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1832 12:44:35.967811 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1833 12:44:35.971098 PS2K: Passing 80 keymaps to kernel
1834 12:44:35.977576 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1835 12:44:35.984080 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1836 12:44:35.991021 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1837 12:44:35.997823 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1838 12:44:36.004811 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1839 12:44:36.010815 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1840 12:44:36.017873 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1841 12:44:36.024214 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1842 12:44:36.027400 ACPI: added table 2/32, length now 44
1843 12:44:36.027494 ACPI: * MCFG
1844 12:44:36.031060 ACPI: added table 3/32, length now 48
1845 12:44:36.033980 ACPI: * TPM2
1846 12:44:36.037390 TPM2 log created at 0x769f0000
1847 12:44:36.041199 ACPI: added table 4/32, length now 52
1848 12:44:36.041293 ACPI: * MADT
1849 12:44:36.043841 SCI is IRQ9
1850 12:44:36.047116 ACPI: added table 5/32, length now 56
1851 12:44:36.050421 current = 76b09850
1852 12:44:36.050515 ACPI: * DMAR
1853 12:44:36.053916 ACPI: added table 6/32, length now 60
1854 12:44:36.057207 ACPI: added table 7/32, length now 64
1855 12:44:36.060665 ACPI: * HPET
1856 12:44:36.063837 ACPI: added table 8/32, length now 68
1857 12:44:36.063927 ACPI: done.
1858 12:44:36.067682 ACPI tables: 35216 bytes.
1859 12:44:36.070772 smbios_write_tables: 769ef000
1860 12:44:36.073613 EC returned error result code 3
1861 12:44:36.076834 Couldn't obtain OEM name from CBI
1862 12:44:36.080434 Create SMBIOS type 16
1863 12:44:36.083536 Create SMBIOS type 17
1864 12:44:36.086819 GENERIC: 0.0 (WIFI Device)
1865 12:44:36.090046 SMBIOS tables: 1734 bytes.
1866 12:44:36.093357 Writing table forward entry at 0x00000500
1867 12:44:36.100329 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1868 12:44:36.103812 Writing coreboot table at 0x76b25000
1869 12:44:36.109914 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1870 12:44:36.113223 1. 0000000000001000-000000000009ffff: RAM
1871 12:44:36.116581 2. 00000000000a0000-00000000000fffff: RESERVED
1872 12:44:36.123439 3. 0000000000100000-00000000769eefff: RAM
1873 12:44:36.126662 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1874 12:44:36.133678 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1875 12:44:36.139978 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1876 12:44:36.142819 7. 0000000077000000-000000007fbfffff: RESERVED
1877 12:44:36.149608 8. 00000000c0000000-00000000cfffffff: RESERVED
1878 12:44:36.153144 9. 00000000f8000000-00000000f9ffffff: RESERVED
1879 12:44:36.156545 10. 00000000fb000000-00000000fb000fff: RESERVED
1880 12:44:36.163157 11. 00000000fe000000-00000000fe00ffff: RESERVED
1881 12:44:36.166276 12. 00000000fed80000-00000000fed87fff: RESERVED
1882 12:44:36.173037 13. 00000000fed90000-00000000fed92fff: RESERVED
1883 12:44:36.176062 14. 00000000feda0000-00000000feda1fff: RESERVED
1884 12:44:36.182712 15. 00000000fedc0000-00000000feddffff: RESERVED
1885 12:44:36.185712 16. 0000000100000000-00000004803fffff: RAM
1886 12:44:36.189318 Passing 4 GPIOs to payload:
1887 12:44:36.192543 NAME | PORT | POLARITY | VALUE
1888 12:44:36.199481 lid | undefined | high | high
1889 12:44:36.205800 power | undefined | high | low
1890 12:44:36.209364 oprom | undefined | high | low
1891 12:44:36.215673 EC in RW | 0x000000e5 | high | high
1892 12:44:36.222663 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
1893 12:44:36.225404 coreboot table: 1576 bytes.
1894 12:44:36.229170 IMD ROOT 0. 0x76fff000 0x00001000
1895 12:44:36.232100 IMD SMALL 1. 0x76ffe000 0x00001000
1896 12:44:36.235339 FSP MEMORY 2. 0x76c4e000 0x003b0000
1897 12:44:36.239011 VPD 3. 0x76c4d000 0x00000367
1898 12:44:36.241859 RO MCACHE 4. 0x76c4c000 0x00000fdc
1899 12:44:36.245455 CONSOLE 5. 0x76c2c000 0x00020000
1900 12:44:36.252278 FMAP 6. 0x76c2b000 0x00000578
1901 12:44:36.255534 TIME STAMP 7. 0x76c2a000 0x00000910
1902 12:44:36.258451 VBOOT WORK 8. 0x76c16000 0x00014000
1903 12:44:36.262311 ROMSTG STCK 9. 0x76c15000 0x00001000
1904 12:44:36.265497 AFTER CAR 10. 0x76c0a000 0x0000b000
1905 12:44:36.268544 RAMSTAGE 11. 0x76b97000 0x00073000
1906 12:44:36.271903 REFCODE 12. 0x76b42000 0x00055000
1907 12:44:36.275094 SMM BACKUP 13. 0x76b32000 0x00010000
1908 12:44:36.281431 4f444749 14. 0x76b30000 0x00002000
1909 12:44:36.284776 EXT VBT15. 0x76b2d000 0x0000219f
1910 12:44:36.288127 COREBOOT 16. 0x76b25000 0x00008000
1911 12:44:36.291386 ACPI 17. 0x76b01000 0x00024000
1912 12:44:36.294627 ACPI GNVS 18. 0x76b00000 0x00001000
1913 12:44:36.297864 RAMOOPS 19. 0x76a00000 0x00100000
1914 12:44:36.301276 TPM2 TCGLOG20. 0x769f0000 0x00010000
1915 12:44:36.304680 SMBIOS 21. 0x769ef000 0x00000800
1916 12:44:36.308183 IMD small region:
1917 12:44:36.311320 IMD ROOT 0. 0x76ffec00 0x00000400
1918 12:44:36.315061 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1919 12:44:36.317928 POWER STATE 2. 0x76ffeb80 0x00000044
1920 12:44:36.324466 ROMSTAGE 3. 0x76ffeb60 0x00000004
1921 12:44:36.328100 MEM INFO 4. 0x76ffe980 0x000001e0
1922 12:44:36.334521 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1923 12:44:36.338048 MTRR: Physical address space:
1924 12:44:36.341128 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1925 12:44:36.348480 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1926 12:44:36.354621 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1927 12:44:36.360653 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1928 12:44:36.367772 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1929 12:44:36.373841 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1930 12:44:36.380793 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1931 12:44:36.384021 MTRR: Fixed MSR 0x250 0x0606060606060606
1932 12:44:36.387379 MTRR: Fixed MSR 0x258 0x0606060606060606
1933 12:44:36.393837 MTRR: Fixed MSR 0x259 0x0000000000000000
1934 12:44:36.397366 MTRR: Fixed MSR 0x268 0x0606060606060606
1935 12:44:36.400682 MTRR: Fixed MSR 0x269 0x0606060606060606
1936 12:44:36.403788 MTRR: Fixed MSR 0x26a 0x0606060606060606
1937 12:44:36.407196 MTRR: Fixed MSR 0x26b 0x0606060606060606
1938 12:44:36.413831 MTRR: Fixed MSR 0x26c 0x0606060606060606
1939 12:44:36.417038 MTRR: Fixed MSR 0x26d 0x0606060606060606
1940 12:44:36.420163 MTRR: Fixed MSR 0x26e 0x0606060606060606
1941 12:44:36.423659 MTRR: Fixed MSR 0x26f 0x0606060606060606
1942 12:44:36.428888 call enable_fixed_mtrr()
1943 12:44:36.432377 CPU physical address size: 39 bits
1944 12:44:36.438537 MTRR: default type WB/UC MTRR counts: 6/7.
1945 12:44:36.442196 MTRR: WB selected as default type.
1946 12:44:36.448587 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1947 12:44:36.451742 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1948 12:44:36.458570 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1949 12:44:36.465455 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1950 12:44:36.471905 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1951 12:44:36.478318 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1952 12:44:36.482346
1953 12:44:36.482430 MTRR check
1954 12:44:36.485398 Fixed MTRRs : Enabled
1955 12:44:36.485481 Variable MTRRs: Enabled
1956 12:44:36.485557
1957 12:44:36.491978 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 12:44:36.495119 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 12:44:36.498615 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 12:44:36.502316 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 12:44:36.508590 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 12:44:36.511977 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 12:44:36.514988 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 12:44:36.518416 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 12:44:36.525006 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 12:44:36.528428 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 12:44:36.531685 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 12:44:36.535394 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 12:44:36.541632 MTRR: Fixed MSR 0x250 0x0606060606060606
1970 12:44:36.545129 MTRR: Fixed MSR 0x258 0x0606060606060606
1971 12:44:36.548981 MTRR: Fixed MSR 0x259 0x0000000000000000
1972 12:44:36.551714 MTRR: Fixed MSR 0x268 0x0606060606060606
1973 12:44:36.555138 MTRR: Fixed MSR 0x269 0x0606060606060606
1974 12:44:36.561784 MTRR: Fixed MSR 0x26a 0x0606060606060606
1975 12:44:36.564804 MTRR: Fixed MSR 0x26b 0x0606060606060606
1976 12:44:36.568108 MTRR: Fixed MSR 0x26c 0x0606060606060606
1977 12:44:36.571695 MTRR: Fixed MSR 0x26d 0x0606060606060606
1978 12:44:36.578079 MTRR: Fixed MSR 0x26e 0x0606060606060606
1979 12:44:36.581240 MTRR: Fixed MSR 0x26f 0x0606060606060606
1980 12:44:36.588360 MTRR: Fixed MSR 0x258 0x0606060606060606
1981 12:44:36.588447 call enable_fixed_mtrr()
1982 12:44:36.594674 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 12:44:36.598444 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 12:44:36.601366 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 12:44:36.604638 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 12:44:36.611125 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 12:44:36.614809 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 12:44:36.618056 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 12:44:36.621138 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 12:44:36.627601 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 12:44:36.631376 CPU physical address size: 39 bits
1992 12:44:36.635605 call enable_fixed_mtrr()
1993 12:44:36.638708 MTRR: Fixed MSR 0x250 0x0606060606060606
1994 12:44:36.645774 MTRR: Fixed MSR 0x250 0x0606060606060606
1995 12:44:36.648636 MTRR: Fixed MSR 0x258 0x0606060606060606
1996 12:44:36.652098 MTRR: Fixed MSR 0x259 0x0000000000000000
1997 12:44:36.655432 MTRR: Fixed MSR 0x268 0x0606060606060606
1998 12:44:36.662261 MTRR: Fixed MSR 0x269 0x0606060606060606
1999 12:44:36.665351 MTRR: Fixed MSR 0x26a 0x0606060606060606
2000 12:44:36.668674 MTRR: Fixed MSR 0x26b 0x0606060606060606
2001 12:44:36.672054 MTRR: Fixed MSR 0x26c 0x0606060606060606
2002 12:44:36.678666 MTRR: Fixed MSR 0x26d 0x0606060606060606
2003 12:44:36.681993 MTRR: Fixed MSR 0x26e 0x0606060606060606
2004 12:44:36.685483 MTRR: Fixed MSR 0x26f 0x0606060606060606
2005 12:44:36.692291 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 12:44:36.695589 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:44:36.699095 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:44:36.702904 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:44:36.708785 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:44:36.712151 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:44:36.715335 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:44:36.718619 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:44:36.725505 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:44:36.728584 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:44:36.731987 call enable_fixed_mtrr()
2016 12:44:36.734960 call enable_fixed_mtrr()
2017 12:44:36.741919 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2018 12:44:36.745120 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 12:44:36.748580 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 12:44:36.755380 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 12:44:36.758214 MTRR: Fixed MSR 0x259 0x0000000000000000
2022 12:44:36.761378 MTRR: Fixed MSR 0x268 0x0606060606060606
2023 12:44:36.764931 MTRR: Fixed MSR 0x269 0x0606060606060606
2024 12:44:36.771094 MTRR: Fixed MSR 0x26a 0x0606060606060606
2025 12:44:36.774375 MTRR: Fixed MSR 0x26b 0x0606060606060606
2026 12:44:36.777867 MTRR: Fixed MSR 0x26c 0x0606060606060606
2027 12:44:36.781188 MTRR: Fixed MSR 0x26d 0x0606060606060606
2028 12:44:36.787594 MTRR: Fixed MSR 0x26e 0x0606060606060606
2029 12:44:36.790985 MTRR: Fixed MSR 0x26f 0x0606060606060606
2030 12:44:36.797377 MTRR: Fixed MSR 0x258 0x0606060606060606
2031 12:44:36.800654 MTRR: Fixed MSR 0x259 0x0000000000000000
2032 12:44:36.804002 MTRR: Fixed MSR 0x268 0x0606060606060606
2033 12:44:36.807839 MTRR: Fixed MSR 0x269 0x0606060606060606
2034 12:44:36.814322 MTRR: Fixed MSR 0x26a 0x0606060606060606
2035 12:44:36.817328 MTRR: Fixed MSR 0x26b 0x0606060606060606
2036 12:44:36.820340 MTRR: Fixed MSR 0x26c 0x0606060606060606
2037 12:44:36.823937 MTRR: Fixed MSR 0x26d 0x0606060606060606
2038 12:44:36.830165 MTRR: Fixed MSR 0x26e 0x0606060606060606
2039 12:44:36.833551 MTRR: Fixed MSR 0x26f 0x0606060606060606
2040 12:44:36.836789 call enable_fixed_mtrr()
2041 12:44:36.839898 call enable_fixed_mtrr()
2042 12:44:36.843547 CPU physical address size: 39 bits
2043 12:44:36.847290 Checking cr50 for pending updates
2044 12:44:36.851281 call enable_fixed_mtrr()
2045 12:44:36.854686 CPU physical address size: 39 bits
2046 12:44:36.857862 CPU physical address size: 39 bits
2047 12:44:36.861122 CPU physical address size: 39 bits
2048 12:44:36.865695 CPU physical address size: 39 bits
2049 12:44:36.869973 Reading cr50 TPM mode
2050 12:44:36.872958 CPU physical address size: 39 bits
2051 12:44:36.881811 BS: BS_PAYLOAD_LOAD entry times (exec / console): 129 / 6 ms
2052 12:44:36.891660 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2053 12:44:36.895082 Checking segment from ROM address 0xffc02b38
2054 12:44:36.898278 Checking segment from ROM address 0xffc02b54
2055 12:44:36.904892 Loading segment from ROM address 0xffc02b38
2056 12:44:36.904977 code (compression=0)
2057 12:44:36.914657 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2058 12:44:36.924461 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2059 12:44:36.924549 it's not compressed!
2060 12:44:37.066197 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2061 12:44:37.072268 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2062 12:44:37.079241 Loading segment from ROM address 0xffc02b54
2063 12:44:37.082373 Entry Point 0x30000000
2064 12:44:37.082456 Loaded segments
2065 12:44:37.089210 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2066 12:44:37.134116 Finalizing chipset.
2067 12:44:37.137355 Finalizing SMM.
2068 12:44:37.137440 APMC done.
2069 12:44:37.143818 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2070 12:44:37.147536 mp_park_aps done after 0 msecs.
2071 12:44:37.150338 Jumping to boot code at 0x30000000(0x76b25000)
2072 12:44:37.160277 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2073 12:44:37.160419
2074 12:44:37.163545
2075 12:44:37.163625
2076 12:44:37.163975 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2077 12:44:37.164088 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2078 12:44:37.164181 Setting prompt string to ['volteer:']
2079 12:44:37.164265 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2080 12:44:37.166831 Starting depthcharge on Voema...
2081 12:44:37.166916
2082 12:44:37.173739 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2083 12:44:37.173827
2084 12:44:37.180082 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2085 12:44:37.180173
2086 12:44:37.186826 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2087 12:44:37.186915
2088 12:44:37.190087 Failed to find eMMC card reader
2089 12:44:37.190174
2090 12:44:37.193373 Wipe memory regions:
2091 12:44:37.193458
2092 12:44:37.197077 [0x00000000001000, 0x000000000a0000)
2093 12:44:37.197160
2094 12:44:37.199902 [0x00000000100000, 0x00000030000000)
2095 12:44:37.234295
2096 12:44:37.237546 [0x00000032662db0, 0x000000769ef000)
2097 12:44:37.285646
2098 12:44:37.288319 [0x00000100000000, 0x00000480400000)
2099 12:44:37.916121
2100 12:44:37.919303 ec_init: CrosEC protocol v3 supported (256, 256)
2101 12:44:38.350646
2102 12:44:38.350795 R8152: Initializing
2103 12:44:38.350870
2104 12:44:38.353963 Version 6 (ocp_data = 5c30)
2105 12:44:38.354054
2106 12:44:38.357403 R8152: Done initializing
2107 12:44:38.357493
2108 12:44:38.360911 Adding net device
2109 12:44:38.661888
2110 12:44:38.664832 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2111 12:44:38.664929
2112 12:44:38.665002
2113 12:44:38.665071
2114 12:44:38.668268 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2116 12:44:38.769004 volteer: tftpboot 192.168.201.1 9729653/tftp-deploy-suke3obl/kernel/bzImage 9729653/tftp-deploy-suke3obl/kernel/cmdline 9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
2117 12:44:38.769148 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2118 12:44:38.769249 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2119 12:44:38.773548 tftpboot 192.168.201.1 9729653/tftp-deploy-suke3obl/kernel/bzImoy-suke3obl/kernel/cmdline 9729653/tftp-deploy-suke3obl/ramdisk/ramdisk.cpio.gz
2120 12:44:38.773648
2121 12:44:38.773743 Waiting for link
2122 12:44:38.976452
2123 12:44:38.976601 done.
2124 12:44:38.976677
2125 12:44:38.976744 MAC: 00:24:32:30:7a:04
2126 12:44:38.976808
2127 12:44:38.979406 Sending DHCP discover... done.
2128 12:44:38.979498
2129 12:44:38.982823 Waiting for reply... done.
2130 12:44:38.982913
2131 12:44:38.986610 Sending DHCP request... done.
2132 12:44:38.986700
2133 12:44:38.989340 Waiting for reply... done.
2134 12:44:38.989429
2135 12:44:38.992751 My ip is 192.168.201.22
2136 12:44:38.992839
2137 12:44:38.996236 The DHCP server ip is 192.168.201.1
2138 12:44:38.996360
2139 12:44:38.999261 TFTP server IP predefined by user: 192.168.201.1
2140 12:44:38.999345
2141 12:44:39.005999 Bootfile predefined by user: 9729653/tftp-deploy-suke3obl/kernel/bzImage
2142 12:44:39.006088
2143 12:44:39.009257 Sending tftp read request... done.
2144 12:44:39.012241
2145 12:44:39.016158 Waiting for the transfer...
2146 12:44:39.016248
2147 12:44:39.549198 00000000 ################################################################
2148 12:44:39.549361
2149 12:44:40.081982 00080000 ################################################################
2150 12:44:40.082127
2151 12:44:40.617078 00100000 ################################################################
2152 12:44:40.617234
2153 12:44:41.148171 00180000 ################################################################
2154 12:44:41.148329
2155 12:44:41.689795 00200000 ################################################################
2156 12:44:41.689948
2157 12:44:42.287783 00280000 ################################################################
2158 12:44:42.287935
2159 12:44:42.861355 00300000 ################################################################
2160 12:44:42.861502
2161 12:44:43.439556 00380000 ################################################################
2162 12:44:43.439700
2163 12:44:44.014918 00400000 ################################################################
2164 12:44:44.015112
2165 12:44:44.595540 00480000 ################################################################
2166 12:44:44.595687
2167 12:44:45.174283 00500000 ################################################################
2168 12:44:45.174421
2169 12:44:45.831676 00580000 ################################################################
2170 12:44:45.832211
2171 12:44:46.549377 00600000 ################################################################
2172 12:44:46.549931
2173 12:44:47.271231 00680000 ################################################################
2174 12:44:47.271813
2175 12:44:48.005023 00700000 ################################################################
2176 12:44:48.005592
2177 12:44:48.725445 00780000 ################################################################
2178 12:44:48.726034
2179 12:44:49.442170 00800000 ################################################################
2180 12:44:49.442826
2181 12:44:50.161198 00880000 ################################################################
2182 12:44:50.161777
2183 12:44:50.847300 00900000 ################################################################
2184 12:44:50.847900
2185 12:44:51.535266 00980000 ################################################################
2186 12:44:51.536056
2187 12:44:52.236910 00a00000 ################################################################
2188 12:44:52.237491
2189 12:44:52.946386 00a80000 ################################################################
2190 12:44:52.947009
2191 12:44:53.096734 00b00000 ############## done.
2192 12:44:53.097330
2193 12:44:53.100031 The bootfile was 11646080 bytes long.
2194 12:44:53.100577
2195 12:44:53.103397 Sending tftp read request... done.
2196 12:44:53.103898
2197 12:44:53.106731 Waiting for the transfer...
2198 12:44:53.107279
2199 12:44:53.828870 00000000 ################################################################
2200 12:44:53.829564
2201 12:44:54.549050 00080000 ################################################################
2202 12:44:54.549684
2203 12:44:55.249843 00100000 ################################################################
2204 12:44:55.250430
2205 12:44:55.918801 00180000 ################################################################
2206 12:44:55.918953
2207 12:44:56.568556 00200000 ################################################################
2208 12:44:56.568702
2209 12:44:57.163567 00280000 ################################################################
2210 12:44:57.164117
2211 12:44:57.852561 00300000 ################################################################
2212 12:44:57.853142
2213 12:44:58.544469 00380000 ################################################################
2214 12:44:58.545085
2215 12:44:59.213851 00400000 ################################################################
2216 12:44:59.214384
2217 12:44:59.894585 00480000 ################################################################
2218 12:44:59.895119
2219 12:45:00.579354 00500000 ################################################################
2220 12:45:00.579890
2221 12:45:01.292680 00580000 ################################################################
2222 12:45:01.293219
2223 12:45:02.008437 00600000 ################################################################
2224 12:45:02.009023
2225 12:45:02.709534 00680000 ################################################################
2226 12:45:02.710151
2227 12:45:03.393424 00700000 ################################################################
2228 12:45:03.393992
2229 12:45:04.101989 00780000 ################################################################
2230 12:45:04.102568
2231 12:45:04.767410 00800000 ################################################################
2232 12:45:04.767987
2233 12:45:05.369505 00880000 ################################################################
2234 12:45:05.369655
2235 12:45:05.980596 00900000 ################################################################
2236 12:45:05.980747
2237 12:45:06.576584 00980000 ################################################################
2238 12:45:06.576738
2239 12:45:07.172119 00a00000 ################################################################
2240 12:45:07.172269
2241 12:45:07.789279 00a80000 ################################################################
2242 12:45:07.789432
2243 12:45:08.427948 00b00000 ################################################################
2244 12:45:08.428107
2245 12:45:09.037361 00b80000 ################################################################
2246 12:45:09.037510
2247 12:45:09.646068 00c00000 ################################################################
2248 12:45:09.646233
2249 12:45:10.243799 00c80000 ################################################################
2250 12:45:10.243951
2251 12:45:10.864171 00d00000 ################################################################
2252 12:45:10.864350
2253 12:45:11.469328 00d80000 ################################################################
2254 12:45:11.469481
2255 12:45:12.085833 00e00000 ################################################################
2256 12:45:12.085982
2257 12:45:12.708682 00e80000 ################################################################
2258 12:45:12.708836
2259 12:45:13.344252 00f00000 ################################################################
2260 12:45:13.344436
2261 12:45:13.979307 00f80000 ################################################################
2262 12:45:13.979454
2263 12:45:14.595955 01000000 ################################################################
2264 12:45:14.596112
2265 12:45:15.202084 01080000 ################################################################
2266 12:45:15.202235
2267 12:45:15.835935 01100000 ################################################################
2268 12:45:15.836097
2269 12:45:16.436261 01180000 ################################################################
2270 12:45:16.436451
2271 12:45:17.011690 01200000 ################################################################
2272 12:45:17.011852
2273 12:45:17.604509 01280000 ################################################################
2274 12:45:17.604659
2275 12:45:18.215372 01300000 ################################################################
2276 12:45:18.215530
2277 12:45:18.798767 01380000 ################################################################
2278 12:45:18.798920
2279 12:45:19.358941 01400000 ################################################################
2280 12:45:19.359084
2281 12:45:19.922390 01480000 ################################################################
2282 12:45:19.922538
2283 12:45:20.493379 01500000 ################################################################
2284 12:45:20.493526
2285 12:45:21.051176 01580000 ################################################################
2286 12:45:21.051331
2287 12:45:21.610593 01600000 ################################################################
2288 12:45:21.610751
2289 12:45:22.174185 01680000 ################################################################
2290 12:45:22.174348
2291 12:45:22.724802 01700000 ################################################################
2292 12:45:22.724956
2293 12:45:23.290616 01780000 ################################################################
2294 12:45:23.290770
2295 12:45:23.881471 01800000 ################################################################
2296 12:45:23.882079
2297 12:45:24.558795 01880000 ################################################################
2298 12:45:24.559453
2299 12:45:25.255144 01900000 ################################################################
2300 12:45:25.255796
2301 12:45:25.980286 01980000 ################################################################
2302 12:45:25.980963
2303 12:45:26.711219 01a00000 ################################################################
2304 12:45:26.711841
2305 12:45:27.440956 01a80000 ################################################################
2306 12:45:27.441564
2307 12:45:28.179625 01b00000 ################################################################
2308 12:45:28.180243
2309 12:45:28.898799 01b80000 ################################################################
2310 12:45:28.899483
2311 12:45:29.624608 01c00000 ################################################################
2312 12:45:29.625249
2313 12:45:30.338519 01c80000 ################################################################
2314 12:45:30.339186
2315 12:45:31.072509 01d00000 ################################################################
2316 12:45:31.073125
2317 12:45:31.700251 01d80000 ################################################################
2318 12:45:31.700494
2319 12:45:32.234849 01e00000 ################################################################
2320 12:45:32.235070
2321 12:45:32.783203 01e80000 ################################################################
2322 12:45:32.783377
2323 12:45:33.321043 01f00000 ################################################################
2324 12:45:33.321216
2325 12:45:33.865708 01f80000 ################################################################
2326 12:45:33.865910
2327 12:45:34.408656 02000000 ################################################################
2328 12:45:34.408863
2329 12:45:34.948173 02080000 ################################################################
2330 12:45:34.948356
2331 12:45:35.474559 02100000 ################################################################
2332 12:45:35.474721
2333 12:45:36.002134 02180000 ################################################################
2334 12:45:36.002291
2335 12:45:36.524754 02200000 ################################################################
2336 12:45:36.524911
2337 12:45:36.856814 02280000 ######################################## done.
2338 12:45:36.856990
2339 12:45:36.860260 Sending tftp read request... done.
2340 12:45:36.860399
2341 12:45:36.863915 Waiting for the transfer...
2342 12:45:36.864031
2343 12:45:36.864127 00000000 # done.
2344 12:45:36.864198
2345 12:45:36.873181 Command line loaded dynamically from TFTP file: 9729653/tftp-deploy-suke3obl/kernel/cmdline
2346 12:45:36.873331
2347 12:45:36.886239 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2348 12:45:36.894267
2349 12:45:36.897412 Shutting down all USB controllers.
2350 12:45:36.897526
2351 12:45:36.897600 Removing current net device
2352 12:45:36.897668
2353 12:45:36.901010 Finalizing coreboot
2354 12:45:36.901107
2355 12:45:36.907795 Exiting depthcharge with code 4 at timestamp: 68311496
2356 12:45:36.907907
2357 12:45:36.907982
2358 12:45:36.908049 Starting kernel ...
2359 12:45:36.908114
2360 12:45:36.908177
2361 12:45:36.908591 end: 2.2.4 bootloader-commands (duration 00:01:00) [common]
2362 12:45:36.908701 start: 2.2.5 auto-login-action (timeout 00:03:45) [common]
2363 12:45:36.908781 Setting prompt string to ['Linux version [0-9]']
2364 12:45:36.908855 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2365 12:45:36.908928 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2367 12:49:21.909552 end: 2.2.5 auto-login-action (duration 00:03:45) [common]
2369 12:49:21.910642 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 225 seconds'
2371 12:49:21.911517 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2374 12:49:21.913077 end: 2 depthcharge-action (duration 00:05:00) [common]
2376 12:49:21.914337 Cleaning after the job
2377 12:49:21.914787 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/ramdisk
2378 12:49:21.924888 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/kernel
2379 12:49:21.928662 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729653/tftp-deploy-suke3obl/modules
2380 12:49:21.929036 start: 4.1 power-off (timeout 00:00:30) [common]
2381 12:49:21.929200 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
2382 12:49:22.010350 >> Command sent successfully.
2383 12:49:22.020009 Returned 0 in 0 seconds
2384 12:49:22.121971 end: 4.1 power-off (duration 00:00:00) [common]
2386 12:49:22.123551 start: 4.2 read-feedback (timeout 00:10:00) [common]
2387 12:49:22.124822 Listened to connection for namespace 'common' for up to 1s
2388 12:49:23.128641 Finalising connection for namespace 'common'
2389 12:49:23.129393 Disconnecting from shell: Finalise
2390 12:49:23.129853
2391 12:49:23.231240 end: 4.2 read-feedback (duration 00:00:01) [common]
2392 12:49:23.231879 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729653
2393 12:49:23.296172 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729653
2394 12:49:23.296681 JobError: Your job cannot terminate cleanly.