Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:11.779592 lava-dispatcher, installed at version: 2023.01
2 12:44:11.779796 start: 0 validate
3 12:44:11.779928 Start time: 2023-03-22 12:44:11.779923+00:00 (UTC)
4 12:44:11.780058 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:11.780191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:12.074526 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:12.075292 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:16.084904 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:16.085625 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:16.383823 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:16.384558 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:17.386374 validate duration: 5.61
14 12:44:17.386732 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:17.386849 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:17.386942 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:17.387043 Not decompressing ramdisk as can be used compressed.
18 12:44:17.387128 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230317.0/amd64/initrd.cpio.gz
19 12:44:17.387198 saving as /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/ramdisk/initrd.cpio.gz
20 12:44:17.387261 total size: 6132225 (5MB)
21 12:44:17.388151 progress 0% (0MB)
22 12:44:17.389868 progress 5% (0MB)
23 12:44:17.391346 progress 10% (0MB)
24 12:44:17.393006 progress 15% (0MB)
25 12:44:17.394480 progress 20% (1MB)
26 12:44:17.395957 progress 25% (1MB)
27 12:44:17.397614 progress 30% (1MB)
28 12:44:17.399083 progress 35% (2MB)
29 12:44:17.400585 progress 40% (2MB)
30 12:44:17.402173 progress 45% (2MB)
31 12:44:17.403647 progress 50% (2MB)
32 12:44:17.405158 progress 55% (3MB)
33 12:44:17.406741 progress 60% (3MB)
34 12:44:17.408178 progress 65% (3MB)
35 12:44:17.409754 progress 70% (4MB)
36 12:44:17.411358 progress 75% (4MB)
37 12:44:17.412901 progress 80% (4MB)
38 12:44:17.414523 progress 85% (5MB)
39 12:44:17.416089 progress 90% (5MB)
40 12:44:17.417701 progress 95% (5MB)
41 12:44:17.419374 progress 100% (5MB)
42 12:44:17.419492 5MB downloaded in 0.03s (181.48MB/s)
43 12:44:17.419644 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:17.419889 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:17.419978 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:17.420065 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:17.420179 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:17.420251 saving as /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/kernel/bzImage
50 12:44:17.420337 total size: 11646080 (11MB)
51 12:44:17.420413 No compression specified
52 12:44:17.421340 progress 0% (0MB)
53 12:44:17.424221 progress 5% (0MB)
54 12:44:17.427219 progress 10% (1MB)
55 12:44:17.430123 progress 15% (1MB)
56 12:44:17.433188 progress 20% (2MB)
57 12:44:17.435949 progress 25% (2MB)
58 12:44:17.438872 progress 30% (3MB)
59 12:44:17.441889 progress 35% (3MB)
60 12:44:17.444842 progress 40% (4MB)
61 12:44:17.447678 progress 45% (5MB)
62 12:44:17.450641 progress 50% (5MB)
63 12:44:17.453554 progress 55% (6MB)
64 12:44:17.456460 progress 60% (6MB)
65 12:44:17.459394 progress 65% (7MB)
66 12:44:17.462194 progress 70% (7MB)
67 12:44:17.465051 progress 75% (8MB)
68 12:44:17.467883 progress 80% (8MB)
69 12:44:17.470730 progress 85% (9MB)
70 12:44:17.473448 progress 90% (10MB)
71 12:44:17.476315 progress 95% (10MB)
72 12:44:17.479164 progress 100% (11MB)
73 12:44:17.479327 11MB downloaded in 0.06s (188.23MB/s)
74 12:44:17.479481 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:17.479723 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:17.479813 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:17.479907 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:17.480015 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20230317.0/amd64/full.rootfs.tar.xz
80 12:44:17.480089 saving as /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/nfsrootfs/full.rootfs.tar
81 12:44:17.480153 total size: 203010352 (193MB)
82 12:44:17.480216 Using unxz to decompress xz
83 12:44:17.483401 progress 0% (0MB)
84 12:44:18.066372 progress 5% (9MB)
85 12:44:18.612811 progress 10% (19MB)
86 12:44:19.160504 progress 15% (29MB)
87 12:44:19.452522 progress 20% (38MB)
88 12:44:19.980430 progress 25% (48MB)
89 12:44:20.545502 progress 30% (58MB)
90 12:44:21.106597 progress 35% (67MB)
91 12:44:21.651953 progress 40% (77MB)
92 12:44:22.212654 progress 45% (87MB)
93 12:44:22.805010 progress 50% (96MB)
94 12:44:23.415233 progress 55% (106MB)
95 12:44:24.099024 progress 60% (116MB)
96 12:44:24.533678 progress 65% (125MB)
97 12:44:24.628016 progress 70% (135MB)
98 12:44:24.760675 progress 75% (145MB)
99 12:44:24.850639 progress 80% (154MB)
100 12:44:24.906399 progress 85% (164MB)
101 12:44:25.002325 progress 90% (174MB)
102 12:44:25.360769 progress 95% (183MB)
103 12:44:25.949456 progress 100% (193MB)
104 12:44:25.954934 193MB downloaded in 8.47s (22.84MB/s)
105 12:44:25.955231 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:44:25.955529 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:44:25.955639 start: 1.4 download-retry (timeout 00:09:51) [common]
109 12:44:25.955744 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 12:44:25.955875 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:44:25.955951 saving as /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/modules/modules.tar
112 12:44:25.956030 total size: 497788 (0MB)
113 12:44:25.956110 Using unxz to decompress xz
114 12:44:25.959215 progress 6% (0MB)
115 12:44:25.959587 progress 13% (0MB)
116 12:44:25.959826 progress 19% (0MB)
117 12:44:25.961178 progress 26% (0MB)
118 12:44:25.963051 progress 32% (0MB)
119 12:44:25.965166 progress 39% (0MB)
120 12:44:25.966979 progress 46% (0MB)
121 12:44:25.969034 progress 52% (0MB)
122 12:44:25.971314 progress 59% (0MB)
123 12:44:25.973273 progress 65% (0MB)
124 12:44:25.975271 progress 72% (0MB)
125 12:44:25.977156 progress 78% (0MB)
126 12:44:25.979046 progress 85% (0MB)
127 12:44:25.981058 progress 92% (0MB)
128 12:44:25.982955 progress 98% (0MB)
129 12:44:25.989848 0MB downloaded in 0.03s (14.04MB/s)
130 12:44:25.990117 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:44:25.990390 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:44:25.990487 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
134 12:44:25.990586 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
135 12:44:28.046372 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729695/extract-nfsrootfs-1nctcq47
136 12:44:28.046580 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:44:28.046687 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
138 12:44:28.046820 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p
139 12:44:28.046922 makedir: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin
140 12:44:28.047007 makedir: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/tests
141 12:44:28.047088 makedir: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/results
142 12:44:28.047186 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-add-keys
143 12:44:28.047312 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-add-sources
144 12:44:28.047498 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-background-process-start
145 12:44:28.047608 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-background-process-stop
146 12:44:28.047715 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-common-functions
147 12:44:28.047891 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-echo-ipv4
148 12:44:28.048013 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-install-packages
149 12:44:28.048118 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-installed-packages
150 12:44:28.048224 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-os-build
151 12:44:28.048357 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-probe-channel
152 12:44:28.048489 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-probe-ip
153 12:44:28.048593 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-target-ip
154 12:44:28.048697 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-target-mac
155 12:44:28.048806 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-target-storage
156 12:44:28.048923 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-case
157 12:44:28.049037 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-event
158 12:44:28.049142 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-feedback
159 12:44:28.049245 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-raise
160 12:44:28.049348 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-reference
161 12:44:28.049451 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-runner
162 12:44:28.049556 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-set
163 12:44:28.049659 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-test-shell
164 12:44:28.049765 Updating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-add-keys (debian)
165 12:44:28.049892 Updating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-add-sources (debian)
166 12:44:28.050039 Updating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-install-packages (debian)
167 12:44:28.050147 Updating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-installed-packages (debian)
168 12:44:28.050253 Updating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/bin/lava-os-build (debian)
169 12:44:28.050347 Creating /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/environment
170 12:44:28.050430 LAVA metadata
171 12:44:28.050499 - LAVA_JOB_ID=9729695
172 12:44:28.050562 - LAVA_DISPATCHER_IP=192.168.201.1
173 12:44:28.050656 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
174 12:44:28.050718 skipped lava-vland-overlay
175 12:44:28.050791 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
176 12:44:28.050870 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
177 12:44:28.050941 skipped lava-multinode-overlay
178 12:44:28.051013 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
179 12:44:28.051090 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
180 12:44:28.051159 Loading test definitions
181 12:44:28.051244 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:49) [common]
182 12:44:28.051311 Using /lava-9729695 at stage 0
183 12:44:28.051530 uuid=9729695_1.5.2.3.1 testdef=None
184 12:44:28.051616 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
185 12:44:28.051699 start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
186 12:44:28.052181 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
188 12:44:28.052627 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
189 12:44:28.053093 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
191 12:44:28.053328 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
192 12:44:28.053774 runner path: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/0/tests/0_timesync-off test_uuid 9729695_1.5.2.3.1
193 12:44:28.053929 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
195 12:44:28.054155 start: 1.5.2.3.5 git-repo-action (timeout 00:09:49) [common]
196 12:44:28.054225 Using /lava-9729695 at stage 0
197 12:44:28.054316 Fetching tests from https://github.com/kernelci/test-definitions.git
198 12:44:28.054401 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/0/tests/1_kselftest-alsa'
199 12:44:36.140833 Running '/usr/bin/git checkout kernelci.org
200 12:44:36.245773 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
201 12:44:36.246458 uuid=9729695_1.5.2.3.5 testdef=None
202 12:44:36.246623 end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
204 12:44:36.246875 start: 1.5.2.3.6 test-overlay (timeout 00:09:41) [common]
205 12:44:36.247592 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
207 12:44:36.247841 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:41) [common]
208 12:44:36.248796 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
210 12:44:36.249048 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:41) [common]
211 12:44:36.249917 runner path: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/0/tests/1_kselftest-alsa test_uuid 9729695_1.5.2.3.5
212 12:44:36.250006 BOARD='asus-cx9400-volteer'
213 12:44:36.250073 BRANCH='cip-gitlab'
214 12:44:36.250134 SKIPFILE='skipfile-lkft.yaml'
215 12:44:36.250196 SKIP_INSTALL='True'
216 12:44:36.250253 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kselftest.tar.xz'
217 12:44:36.250313 TST_CASENAME=''
218 12:44:36.250371 TST_CMDFILES='alsa'
219 12:44:36.250536 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
221 12:44:36.250752 Creating lava-test-runner.conf files
222 12:44:36.250817 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729695/lava-overlay-ug1vrc5p/lava-9729695/0 for stage 0
223 12:44:36.250904 - 0_timesync-off
224 12:44:36.250976 - 1_kselftest-alsa
225 12:44:36.251068 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
226 12:44:36.251157 start: 1.5.2.4 compress-overlay (timeout 00:09:41) [common]
227 12:44:43.732345 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
228 12:44:43.732517 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
229 12:44:43.732641 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
230 12:44:43.732750 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
231 12:44:43.732842 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
232 12:44:43.852889 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
233 12:44:43.853237 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
234 12:44:43.853365 extracting modules file /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729695/extract-nfsrootfs-1nctcq47
235 12:44:43.866037 extracting modules file /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729695/extract-overlay-ramdisk-w8aoqf_c/ramdisk
236 12:44:43.878381 end: 1.5.4 extract-modules (duration 00:00:00) [common]
237 12:44:43.878516 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
238 12:44:43.878613 [common] Applying overlay to NFS
239 12:44:43.878685 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729695/compress-overlay-tkp28dbr/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729695/extract-nfsrootfs-1nctcq47
240 12:44:44.659699 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
241 12:44:44.659861 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
242 12:44:44.659958 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
243 12:44:44.660052 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
244 12:44:44.660136 Building ramdisk /var/lib/lava/dispatcher/tmp/9729695/extract-overlay-ramdisk-w8aoqf_c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729695/extract-overlay-ramdisk-w8aoqf_c/ramdisk
245 12:44:44.705774 >> 34577 blocks
246 12:44:45.322948 rename /var/lib/lava/dispatcher/tmp/9729695/extract-overlay-ramdisk-w8aoqf_c/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
247 12:44:45.323352 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
248 12:44:45.323473 start: 1.5.8 prepare-kernel (timeout 00:09:32) [common]
249 12:44:45.323574 start: 1.5.8.1 prepare-fit (timeout 00:09:32) [common]
250 12:44:45.323673 No mkimage arch provided, not using FIT.
251 12:44:45.323766 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
252 12:44:45.323851 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
253 12:44:45.323955 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
254 12:44:45.324050 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
255 12:44:45.324130 No LXC device requested
256 12:44:45.324212 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 12:44:45.324302 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
258 12:44:45.324420 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 12:44:45.324490 Checking files for TFTP limit of 4294967296 bytes.
260 12:44:45.324864 end: 1 tftp-deploy (duration 00:00:28) [common]
261 12:44:45.324970 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 12:44:45.325067 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 12:44:45.325201 substitutions:
264 12:44:45.325270 - {DTB}: None
265 12:44:45.325337 - {INITRD}: 9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
266 12:44:45.325399 - {KERNEL}: 9729695/tftp-deploy-4yp8zeme/kernel/bzImage
267 12:44:45.325459 - {LAVA_MAC}: None
268 12:44:45.325516 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729695/extract-nfsrootfs-1nctcq47
269 12:44:45.325578 - {NFS_SERVER_IP}: 192.168.201.1
270 12:44:45.325636 - {PRESEED_CONFIG}: None
271 12:44:45.325694 - {PRESEED_LOCAL}: None
272 12:44:45.325751 - {RAMDISK}: 9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
273 12:44:45.325808 - {ROOT_PART}: None
274 12:44:45.325864 - {ROOT}: None
275 12:44:45.325920 - {SERVER_IP}: 192.168.201.1
276 12:44:45.325976 - {TEE}: None
277 12:44:45.326031 Parsed boot commands:
278 12:44:45.326086 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
279 12:44:45.326241 Parsed boot commands: tftpboot 192.168.201.1 9729695/tftp-deploy-4yp8zeme/kernel/bzImage 9729695/tftp-deploy-4yp8zeme/kernel/cmdline 9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
280 12:44:45.326339 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
281 12:44:45.326436 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
282 12:44:45.326537 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
283 12:44:45.326627 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
284 12:44:45.326700 Not connected, no need to disconnect.
285 12:44:45.326778 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
286 12:44:45.326860 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
287 12:44:45.326928 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-9'
288 12:44:45.329884 Setting prompt string to ['lava-test: # ']
289 12:44:45.330190 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
290 12:44:45.330297 end: 2.2.1 reset-connection (duration 00:00:00) [common]
291 12:44:45.330398 start: 2.2.2 reset-device (timeout 00:05:00) [common]
292 12:44:45.330494 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
293 12:44:45.330669 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=reboot'
294 12:44:50.470845 >> Command sent successfully.
295 12:44:50.480284 Returned 0 in 5 seconds
296 12:44:50.582024 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
298 12:44:50.583404 end: 2.2.2 reset-device (duration 00:00:05) [common]
299 12:44:50.583909 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
300 12:44:50.584391 Setting prompt string to 'Starting depthcharge on Voema...'
301 12:44:50.584787 Changing prompt to 'Starting depthcharge on Voema...'
302 12:44:50.585158 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
303 12:44:50.586363 [Enter `^Ec?' for help]
304 12:44:52.140438
305 12:44:52.141092
306 12:44:52.150052 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
307 12:44:52.156387 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
308 12:44:52.159799 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
309 12:44:52.163286 CPU: AES supported, TXT NOT supported, VT supported
310 12:44:52.169410 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
311 12:44:52.176707 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
312 12:44:52.179613 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
313 12:44:52.182705 VBOOT: Loading verstage.
314 12:44:52.189554 FMAP: Found "FLASH" version 1.1 at 0x1804000.
315 12:44:52.192776 FMAP: base = 0x0 size = 0x2000000 #areas = 32
316 12:44:52.199352 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
317 12:44:52.205982 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
318 12:44:52.212815 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
319 12:44:52.216254
320 12:44:52.216769
321 12:44:52.226019 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
322 12:44:52.240588 Probing TPM: . done!
323 12:44:52.243936 TPM ready after 0 ms
324 12:44:52.247713 Connected to device vid:did:rid of 1ae0:0028:00
325 12:44:52.258705 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
326 12:44:52.265232 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
327 12:44:52.269166 Initialized TPM device CR50 revision 0
328 12:44:52.320557 tlcl_send_startup: Startup return code is 0
329 12:44:52.321156 TPM: setup succeeded
330 12:44:52.335775 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
331 12:44:52.350961 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
332 12:44:52.364843 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
333 12:44:52.374866 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
334 12:44:52.379347 Chrome EC: UHEPI supported
335 12:44:52.382003 Phase 1
336 12:44:52.385031 FMAP: area GBB found @ 1805000 (458752 bytes)
337 12:44:52.395265 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
338 12:44:52.401574 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
339 12:44:52.408062 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
340 12:44:52.414841 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
341 12:44:52.418290 Recovery requested (1009000e)
342 12:44:52.421891 TPM: Extending digest for VBOOT: boot mode into PCR 0
343 12:44:52.432983 tlcl_extend: response is 0
344 12:44:52.439782 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
345 12:44:52.449677 tlcl_extend: response is 0
346 12:44:52.455941 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
347 12:44:52.463008 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
348 12:44:52.469504 BS: verstage times (exec / console): total (unknown) / 142 ms
349 12:44:52.469970
350 12:44:52.470322
351 12:44:52.483052 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
352 12:44:52.489232 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
353 12:44:52.492808 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
354 12:44:52.496813 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
355 12:44:52.502798 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
356 12:44:52.505928 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
357 12:44:52.509310 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
358 12:44:52.512698 TCO_STS: 0000 0000
359 12:44:52.516542 GEN_PMCON: d0015038 00002200
360 12:44:52.519575 GBLRST_CAUSE: 00000000 00000000
361 12:44:52.520188 HPR_CAUSE0: 00000000
362 12:44:52.522957 prev_sleep_state 5
363 12:44:52.526043 Boot Count incremented to 18246
364 12:44:52.532767 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
365 12:44:52.539356 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
366 12:44:52.549488 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
367 12:44:52.555472 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
368 12:44:52.559142 Chrome EC: UHEPI supported
369 12:44:52.565878 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
370 12:44:52.577016 Probing TPM: done!
371 12:44:52.584736 Connected to device vid:did:rid of 1ae0:0028:00
372 12:44:52.594835 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
373 12:44:52.602292 Initialized TPM device CR50 revision 0
374 12:44:52.612219 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
375 12:44:52.618653 MRC: Hash idx 0x100b comparison successful.
376 12:44:52.622266 MRC cache found, size faa8
377 12:44:52.622779 bootmode is set to: 2
378 12:44:52.625101 SPD index = 0
379 12:44:52.632549 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
380 12:44:52.635233 SPD: module type is LPDDR4X
381 12:44:52.638716 SPD: module part number is MT53E512M64D4NW-046
382 12:44:52.645024 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
383 12:44:52.648434 SPD: device width 16 bits, bus width 16 bits
384 12:44:52.655544 SPD: module size is 1024 MB (per channel)
385 12:44:53.085920 CBMEM:
386 12:44:53.089407 IMD: root @ 0x76fff000 254 entries.
387 12:44:53.092426 IMD: root @ 0x76ffec00 62 entries.
388 12:44:53.096116 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
389 12:44:53.102452 FMAP: area RW_VPD found @ f35000 (8192 bytes)
390 12:44:53.105594 External stage cache:
391 12:44:53.109112 IMD: root @ 0x7b3ff000 254 entries.
392 12:44:53.112634 IMD: root @ 0x7b3fec00 62 entries.
393 12:44:53.127692 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
394 12:44:53.134434 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
395 12:44:53.140707 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
396 12:44:53.155439 MRC: 'RECOVERY_MRC_CACHE' does not need update.
397 12:44:53.159149 cse_lite: Skip switching to RW in the recovery path
398 12:44:53.162248 8 DIMMs found
399 12:44:53.162757 SMM Memory Map
400 12:44:53.167155 SMRAM : 0x7b000000 0x800000
401 12:44:53.169309 Subregion 0: 0x7b000000 0x200000
402 12:44:53.172866 Subregion 1: 0x7b200000 0x200000
403 12:44:53.175998 Subregion 2: 0x7b400000 0x400000
404 12:44:53.179638 top_of_ram = 0x77000000
405 12:44:53.185898 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
406 12:44:53.189387 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
407 12:44:53.195696 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
408 12:44:53.199281 MTRR Range: Start=ff000000 End=0 (Size 1000000)
409 12:44:53.208854 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
410 12:44:53.216102 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
411 12:44:53.225580 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
412 12:44:53.228899 Processing 211 relocs. Offset value of 0x74c0b000
413 12:44:53.237956 BS: romstage times (exec / console): total (unknown) / 277 ms
414 12:44:53.243838
415 12:44:53.244412
416 12:44:53.253934 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
417 12:44:53.257100 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
418 12:44:53.267299 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
419 12:44:53.273489 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
420 12:44:53.280119 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
421 12:44:53.287495 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
422 12:44:53.334877 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
423 12:44:53.341176 Processing 5008 relocs. Offset value of 0x75d98000
424 12:44:53.344391 BS: postcar times (exec / console): total (unknown) / 59 ms
425 12:44:53.347921
426 12:44:53.348477
427 12:44:53.357702 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
428 12:44:53.358229 Normal boot
429 12:44:53.361284 FW_CONFIG value is 0x804c02
430 12:44:53.364905 PCI: 00:07.0 disabled by fw_config
431 12:44:53.367576 PCI: 00:07.1 disabled by fw_config
432 12:44:53.371143 PCI: 00:0d.2 disabled by fw_config
433 12:44:53.374403 PCI: 00:1c.7 disabled by fw_config
434 12:44:53.380811 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
435 12:44:53.387480 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
436 12:44:53.391224 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
437 12:44:53.394146 GENERIC: 0.0 disabled by fw_config
438 12:44:53.400960 GENERIC: 1.0 disabled by fw_config
439 12:44:53.404222 fw_config match found: DB_USB=USB3_ACTIVE
440 12:44:53.407736 fw_config match found: DB_USB=USB3_ACTIVE
441 12:44:53.411115 fw_config match found: DB_USB=USB3_ACTIVE
442 12:44:53.417414 fw_config match found: DB_USB=USB3_ACTIVE
443 12:44:53.420980 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
444 12:44:53.427406 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
445 12:44:53.437269 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
446 12:44:53.444367 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
447 12:44:53.447118 microcode: sig=0x806c1 pf=0x80 revision=0x86
448 12:44:53.453957 microcode: Update skipped, already up-to-date
449 12:44:53.460390 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
450 12:44:53.488306 Detected 4 core, 8 thread CPU.
451 12:44:53.491728 Setting up SMI for CPU
452 12:44:53.494873 IED base = 0x7b400000
453 12:44:53.495525 IED size = 0x00400000
454 12:44:53.498427 Will perform SMM setup.
455 12:44:53.504749 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
456 12:44:53.511192 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
457 12:44:53.517861 Processing 16 relocs. Offset value of 0x00030000
458 12:44:53.521262 Attempting to start 7 APs
459 12:44:53.524333 Waiting for 10ms after sending INIT.
460 12:44:53.539959 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
461 12:44:53.540611 done.
462 12:44:53.543384 AP: slot 5 apic_id 4.
463 12:44:53.547275 AP: slot 4 apic_id 5.
464 12:44:53.547780 AP: slot 6 apic_id 2.
465 12:44:53.550112 AP: slot 2 apic_id 3.
466 12:44:53.553672 Waiting for 2nd SIPI to complete...done.
467 12:44:53.556681 AP: slot 7 apic_id 6.
468 12:44:53.560134 AP: slot 3 apic_id 7.
469 12:44:53.566900 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
470 12:44:53.573400 Processing 13 relocs. Offset value of 0x00038000
471 12:44:53.574013 Unable to locate Global NVS
472 12:44:53.583375 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
473 12:44:53.586887 Installing permanent SMM handler to 0x7b000000
474 12:44:53.597290 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
475 12:44:53.600080 Processing 794 relocs. Offset value of 0x7b010000
476 12:44:53.610747 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
477 12:44:53.613254 Processing 13 relocs. Offset value of 0x7b008000
478 12:44:53.619498 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
479 12:44:53.626615 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
480 12:44:53.629538 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
481 12:44:53.636272 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
482 12:44:53.642967 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
483 12:44:53.649394 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
484 12:44:53.656022 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
485 12:44:53.656620 Unable to locate Global NVS
486 12:44:53.666263 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
487 12:44:53.669566 Clearing SMI status registers
488 12:44:53.670034 SMI_STS: PM1
489 12:44:53.672716 PM1_STS: PWRBTN
490 12:44:53.679288 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
491 12:44:53.682916 In relocation handler: CPU 0
492 12:44:53.686190 New SMBASE=0x7b000000 IEDBASE=0x7b400000
493 12:44:53.693158 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:44:53.693786 Relocation complete.
495 12:44:53.702468 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
496 12:44:53.702942 In relocation handler: CPU 1
497 12:44:53.709596 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
498 12:44:53.710069 Relocation complete.
499 12:44:53.719130 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 12:44:53.719601 In relocation handler: CPU 6
501 12:44:53.725969 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 12:44:53.728873 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 12:44:53.732437 Relocation complete.
504 12:44:53.738907 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
505 12:44:53.742673 In relocation handler: CPU 2
506 12:44:53.746193 New SMBASE=0x7afff800 IEDBASE=0x7b400000
507 12:44:53.749226 Relocation complete.
508 12:44:53.755848 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
509 12:44:53.759031 In relocation handler: CPU 4
510 12:44:53.762377 New SMBASE=0x7afff000 IEDBASE=0x7b400000
511 12:44:53.766564 Relocation complete.
512 12:44:53.772207 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
513 12:44:53.775512 In relocation handler: CPU 3
514 12:44:53.779281 New SMBASE=0x7afff400 IEDBASE=0x7b400000
515 12:44:53.782324 Relocation complete.
516 12:44:53.789080 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
517 12:44:53.792056 In relocation handler: CPU 7
518 12:44:53.795795 New SMBASE=0x7affe400 IEDBASE=0x7b400000
519 12:44:53.802100 Writing SMRR. base = 0x7b000006, mask=0xff800c00
520 12:44:53.802702 Relocation complete.
521 12:44:53.808932 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
522 12:44:53.812426 In relocation handler: CPU 5
523 12:44:53.815314 New SMBASE=0x7affec00 IEDBASE=0x7b400000
524 12:44:53.822623 Writing SMRR. base = 0x7b000006, mask=0xff800c00
525 12:44:53.823146 Relocation complete.
526 12:44:53.826251 Initializing CPU #0
527 12:44:53.829644 CPU: vendor Intel device 806c1
528 12:44:53.832466 CPU: family 06, model 8c, stepping 01
529 12:44:53.835810 Clearing out pending MCEs
530 12:44:53.839413 Setting up local APIC...
531 12:44:53.839919 apic_id: 0x00 done.
532 12:44:53.842461 Turbo is available but hidden
533 12:44:53.845646 Turbo is available and visible
534 12:44:53.852433 microcode: Update skipped, already up-to-date
535 12:44:53.852916 CPU #0 initialized
536 12:44:53.856063 Initializing CPU #6
537 12:44:53.859316 Initializing CPU #2
538 12:44:53.862379 CPU: vendor Intel device 806c1
539 12:44:53.866127 CPU: family 06, model 8c, stepping 01
540 12:44:53.869304 CPU: vendor Intel device 806c1
541 12:44:53.872621 CPU: family 06, model 8c, stepping 01
542 12:44:53.875561 Clearing out pending MCEs
543 12:44:53.876074 Clearing out pending MCEs
544 12:44:53.879401 Setting up local APIC...
545 12:44:53.882639 Initializing CPU #1
546 12:44:53.883243 Initializing CPU #5
547 12:44:53.885767 Initializing CPU #4
548 12:44:53.888826 CPU: vendor Intel device 806c1
549 12:44:53.892675 CPU: family 06, model 8c, stepping 01
550 12:44:53.895472 apic_id: 0x02 done.
551 12:44:53.898853 Setting up local APIC...
552 12:44:53.899350 Initializing CPU #7
553 12:44:53.902503 CPU: vendor Intel device 806c1
554 12:44:53.905866 CPU: family 06, model 8c, stepping 01
555 12:44:53.912043 microcode: Update skipped, already up-to-date
556 12:44:53.912586 apic_id: 0x03 done.
557 12:44:53.915605 CPU #6 initialized
558 12:44:53.918601 microcode: Update skipped, already up-to-date
559 12:44:53.921906 Clearing out pending MCEs
560 12:44:53.925223 Initializing CPU #3
561 12:44:53.928499 CPU: vendor Intel device 806c1
562 12:44:53.931820 CPU: family 06, model 8c, stepping 01
563 12:44:53.935226 CPU: vendor Intel device 806c1
564 12:44:53.938480 CPU: family 06, model 8c, stepping 01
565 12:44:53.942218 Clearing out pending MCEs
566 12:44:53.942715 Clearing out pending MCEs
567 12:44:53.945612 Setting up local APIC...
568 12:44:53.948491 CPU #2 initialized
569 12:44:53.951625 Setting up local APIC...
570 12:44:53.952120 apic_id: 0x06 done.
571 12:44:53.955272 Setting up local APIC...
572 12:44:53.958321 Clearing out pending MCEs
573 12:44:53.962212 CPU: vendor Intel device 806c1
574 12:44:53.965458 CPU: family 06, model 8c, stepping 01
575 12:44:53.968538 Setting up local APIC...
576 12:44:53.969005 Clearing out pending MCEs
577 12:44:53.971797 apic_id: 0x04 done.
578 12:44:53.975200 Setting up local APIC...
579 12:44:53.975696 apic_id: 0x01 done.
580 12:44:53.981644 microcode: Update skipped, already up-to-date
581 12:44:53.982141 apic_id: 0x05 done.
582 12:44:53.985422 CPU #5 initialized
583 12:44:53.988430 microcode: Update skipped, already up-to-date
584 12:44:53.991735 apic_id: 0x07 done.
585 12:44:53.994775 microcode: Update skipped, already up-to-date
586 12:44:54.001591 microcode: Update skipped, already up-to-date
587 12:44:54.002147 CPU #7 initialized
588 12:44:54.005094 CPU #3 initialized
589 12:44:54.008184 microcode: Update skipped, already up-to-date
590 12:44:54.011511 CPU #4 initialized
591 12:44:54.014940 CPU #1 initialized
592 12:44:54.018442 bsp_do_flight_plan done after 459 msecs.
593 12:44:54.021423 CPU: frequency set to 4000 MHz
594 12:44:54.021895 Enabling SMIs.
595 12:44:54.028105 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
596 12:44:54.045125 SATAXPCIE1 indicates PCIe NVMe is present
597 12:44:54.048362 Probing TPM: done!
598 12:44:54.052101 Connected to device vid:did:rid of 1ae0:0028:00
599 12:44:54.062392 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.51/cr50_v1.9308_B.1054-0e610b99f9
600 12:44:54.065356 Initialized TPM device CR50 revision 0
601 12:44:54.068502 Enabling S0i3.4
602 12:44:54.075664 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
603 12:44:54.079088 Found a VBT of 8704 bytes after decompression
604 12:44:54.085991 cse_lite: CSE RO boot. HybridStorageMode disabled
605 12:44:54.091930 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
606 12:44:54.168258 FSPS returned 0
607 12:44:54.172040 Executing Phase 1 of FspMultiPhaseSiInit
608 12:44:54.181435 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
609 12:44:54.185440 port C0 DISC req: usage 1 usb3 1 usb2 5
610 12:44:54.188012 Raw Buffer output 0 00000511
611 12:44:54.191513 Raw Buffer output 1 00000000
612 12:44:54.195410 pmc_send_ipc_cmd succeeded
613 12:44:54.202016 port C1 DISC req: usage 1 usb3 2 usb2 3
614 12:44:54.202573 Raw Buffer output 0 00000321
615 12:44:54.205332 Raw Buffer output 1 00000000
616 12:44:54.209424 pmc_send_ipc_cmd succeeded
617 12:44:54.214756 Detected 4 core, 8 thread CPU.
618 12:44:54.217785 Detected 4 core, 8 thread CPU.
619 12:44:54.452533 Display FSP Version Info HOB
620 12:44:54.455182 Reference Code - CPU = a.0.4c.31
621 12:44:54.458430 uCode Version = 0.0.0.86
622 12:44:54.462270 TXT ACM version = ff.ff.ff.ffff
623 12:44:54.465376 Reference Code - ME = a.0.4c.31
624 12:44:54.468487 MEBx version = 0.0.0.0
625 12:44:54.472081 ME Firmware Version = Consumer SKU
626 12:44:54.475227 Reference Code - PCH = a.0.4c.31
627 12:44:54.478697 PCH-CRID Status = Disabled
628 12:44:54.481753 PCH-CRID Original Value = ff.ff.ff.ffff
629 12:44:54.485004 PCH-CRID New Value = ff.ff.ff.ffff
630 12:44:54.488673 OPROM - RST - RAID = ff.ff.ff.ffff
631 12:44:54.492351 PCH Hsio Version = 4.0.0.0
632 12:44:54.495542 Reference Code - SA - System Agent = a.0.4c.31
633 12:44:54.498393 Reference Code - MRC = 2.0.0.1
634 12:44:54.502171 SA - PCIe Version = a.0.4c.31
635 12:44:54.505228 SA-CRID Status = Disabled
636 12:44:54.508976 SA-CRID Original Value = 0.0.0.1
637 12:44:54.511674 SA-CRID New Value = 0.0.0.1
638 12:44:54.515004 OPROM - VBIOS = ff.ff.ff.ffff
639 12:44:54.518837 IO Manageability Engine FW Version = 11.1.4.0
640 12:44:54.521822 PHY Build Version = 0.0.0.e0
641 12:44:54.526115 Thunderbolt(TM) FW Version = 0.0.0.0
642 12:44:54.531771 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
643 12:44:54.535389 ITSS IRQ Polarities Before:
644 12:44:54.535962 IPC0: 0xffffffff
645 12:44:54.538576 IPC1: 0xffffffff
646 12:44:54.539072 IPC2: 0xffffffff
647 12:44:54.542699 IPC3: 0xffffffff
648 12:44:54.545375 ITSS IRQ Polarities After:
649 12:44:54.545875 IPC0: 0xffffffff
650 12:44:54.548478 IPC1: 0xffffffff
651 12:44:54.548975 IPC2: 0xffffffff
652 12:44:54.551900 IPC3: 0xffffffff
653 12:44:54.555401 Found PCIe Root Port #9 at PCI: 00:1d.0.
654 12:44:54.568084 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
655 12:44:54.578210 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
656 12:44:54.591782 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
657 12:44:54.598305 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 237 ms
658 12:44:54.598822 Enumerating buses...
659 12:44:54.604893 Show all devs... Before device enumeration.
660 12:44:54.607818 Root Device: enabled 1
661 12:44:54.608433 DOMAIN: 0000: enabled 1
662 12:44:54.611409 CPU_CLUSTER: 0: enabled 1
663 12:44:54.614695 PCI: 00:00.0: enabled 1
664 12:44:54.619086 PCI: 00:02.0: enabled 1
665 12:44:54.619551 PCI: 00:04.0: enabled 1
666 12:44:54.621487 PCI: 00:05.0: enabled 1
667 12:44:54.624765 PCI: 00:06.0: enabled 0
668 12:44:54.625232 PCI: 00:07.0: enabled 0
669 12:44:54.628460 PCI: 00:07.1: enabled 0
670 12:44:54.631129 PCI: 00:07.2: enabled 0
671 12:44:54.634681 PCI: 00:07.3: enabled 0
672 12:44:54.635178 PCI: 00:08.0: enabled 1
673 12:44:54.638232 PCI: 00:09.0: enabled 0
674 12:44:54.641503 PCI: 00:0a.0: enabled 0
675 12:44:54.644679 PCI: 00:0d.0: enabled 1
676 12:44:54.645133 PCI: 00:0d.1: enabled 0
677 12:44:54.647789 PCI: 00:0d.2: enabled 0
678 12:44:54.651296 PCI: 00:0d.3: enabled 0
679 12:44:54.654814 PCI: 00:0e.0: enabled 0
680 12:44:54.655269 PCI: 00:10.2: enabled 1
681 12:44:54.658108 PCI: 00:10.6: enabled 0
682 12:44:54.661151 PCI: 00:10.7: enabled 0
683 12:44:54.661610 PCI: 00:12.0: enabled 0
684 12:44:54.664586 PCI: 00:12.6: enabled 0
685 12:44:54.667787 PCI: 00:13.0: enabled 0
686 12:44:54.671231 PCI: 00:14.0: enabled 1
687 12:44:54.671683 PCI: 00:14.1: enabled 0
688 12:44:54.674603 PCI: 00:14.2: enabled 1
689 12:44:54.677716 PCI: 00:14.3: enabled 1
690 12:44:54.681381 PCI: 00:15.0: enabled 1
691 12:44:54.681838 PCI: 00:15.1: enabled 1
692 12:44:54.684678 PCI: 00:15.2: enabled 1
693 12:44:54.688158 PCI: 00:15.3: enabled 1
694 12:44:54.691401 PCI: 00:16.0: enabled 1
695 12:44:54.691856 PCI: 00:16.1: enabled 0
696 12:44:54.694397 PCI: 00:16.2: enabled 0
697 12:44:54.698039 PCI: 00:16.3: enabled 0
698 12:44:54.701613 PCI: 00:16.4: enabled 0
699 12:44:54.702068 PCI: 00:16.5: enabled 0
700 12:44:54.704509 PCI: 00:17.0: enabled 1
701 12:44:54.707871 PCI: 00:19.0: enabled 0
702 12:44:54.708373 PCI: 00:19.1: enabled 1
703 12:44:54.711491 PCI: 00:19.2: enabled 0
704 12:44:54.714339 PCI: 00:1c.0: enabled 1
705 12:44:54.717982 PCI: 00:1c.1: enabled 0
706 12:44:54.718546 PCI: 00:1c.2: enabled 0
707 12:44:54.721126 PCI: 00:1c.3: enabled 0
708 12:44:54.724348 PCI: 00:1c.4: enabled 0
709 12:44:54.728038 PCI: 00:1c.5: enabled 0
710 12:44:54.728631 PCI: 00:1c.6: enabled 1
711 12:44:54.731144 PCI: 00:1c.7: enabled 0
712 12:44:54.734708 PCI: 00:1d.0: enabled 1
713 12:44:54.737488 PCI: 00:1d.1: enabled 0
714 12:44:54.737938 PCI: 00:1d.2: enabled 1
715 12:44:54.741141 PCI: 00:1d.3: enabled 0
716 12:44:54.744537 PCI: 00:1e.0: enabled 1
717 12:44:54.745007 PCI: 00:1e.1: enabled 0
718 12:44:54.747510 PCI: 00:1e.2: enabled 1
719 12:44:54.751036 PCI: 00:1e.3: enabled 1
720 12:44:54.754545 PCI: 00:1f.0: enabled 1
721 12:44:54.755099 PCI: 00:1f.1: enabled 0
722 12:44:54.757635 PCI: 00:1f.2: enabled 1
723 12:44:54.761351 PCI: 00:1f.3: enabled 1
724 12:44:54.764429 PCI: 00:1f.4: enabled 0
725 12:44:54.764882 PCI: 00:1f.5: enabled 1
726 12:44:54.767346 PCI: 00:1f.6: enabled 0
727 12:44:54.771305 PCI: 00:1f.7: enabled 0
728 12:44:54.771899 APIC: 00: enabled 1
729 12:44:54.774301 GENERIC: 0.0: enabled 1
730 12:44:54.777821 GENERIC: 0.0: enabled 1
731 12:44:54.780775 GENERIC: 1.0: enabled 1
732 12:44:54.781269 GENERIC: 0.0: enabled 1
733 12:44:54.784053 GENERIC: 1.0: enabled 1
734 12:44:54.788021 USB0 port 0: enabled 1
735 12:44:54.791151 GENERIC: 0.0: enabled 1
736 12:44:54.791651 USB0 port 0: enabled 1
737 12:44:54.794435 GENERIC: 0.0: enabled 1
738 12:44:54.797540 I2C: 00:1a: enabled 1
739 12:44:54.798061 I2C: 00:31: enabled 1
740 12:44:54.800752 I2C: 00:32: enabled 1
741 12:44:54.804263 I2C: 00:10: enabled 1
742 12:44:54.805022 I2C: 00:15: enabled 1
743 12:44:54.807342 GENERIC: 0.0: enabled 0
744 12:44:54.811092 GENERIC: 1.0: enabled 0
745 12:44:54.814364 GENERIC: 0.0: enabled 1
746 12:44:54.814862 SPI: 00: enabled 1
747 12:44:54.817576 SPI: 00: enabled 1
748 12:44:54.818071 PNP: 0c09.0: enabled 1
749 12:44:54.820578 GENERIC: 0.0: enabled 1
750 12:44:54.824753 USB3 port 0: enabled 1
751 12:44:54.827301 USB3 port 1: enabled 1
752 12:44:54.827801 USB3 port 2: enabled 0
753 12:44:54.830916 USB3 port 3: enabled 0
754 12:44:54.833981 USB2 port 0: enabled 0
755 12:44:54.834477 USB2 port 1: enabled 1
756 12:44:54.837393 USB2 port 2: enabled 1
757 12:44:54.840650 USB2 port 3: enabled 0
758 12:44:54.843974 USB2 port 4: enabled 1
759 12:44:54.844552 USB2 port 5: enabled 0
760 12:44:54.847224 USB2 port 6: enabled 0
761 12:44:54.850584 USB2 port 7: enabled 0
762 12:44:54.851057 USB2 port 8: enabled 0
763 12:44:54.853712 USB2 port 9: enabled 0
764 12:44:54.857286 USB3 port 0: enabled 0
765 12:44:54.860796 USB3 port 1: enabled 1
766 12:44:54.861245 USB3 port 2: enabled 0
767 12:44:54.863915 USB3 port 3: enabled 0
768 12:44:54.867648 GENERIC: 0.0: enabled 1
769 12:44:54.868183 GENERIC: 1.0: enabled 1
770 12:44:54.870618 APIC: 01: enabled 1
771 12:44:54.873895 APIC: 03: enabled 1
772 12:44:54.874345 APIC: 07: enabled 1
773 12:44:54.877375 APIC: 05: enabled 1
774 12:44:54.877824 APIC: 04: enabled 1
775 12:44:54.880399 APIC: 02: enabled 1
776 12:44:54.883536 APIC: 06: enabled 1
777 12:44:54.883985 Compare with tree...
778 12:44:54.887436 Root Device: enabled 1
779 12:44:54.890540 DOMAIN: 0000: enabled 1
780 12:44:54.894135 PCI: 00:00.0: enabled 1
781 12:44:54.894586 PCI: 00:02.0: enabled 1
782 12:44:54.897034 PCI: 00:04.0: enabled 1
783 12:44:54.900610 GENERIC: 0.0: enabled 1
784 12:44:54.904012 PCI: 00:05.0: enabled 1
785 12:44:54.907588 PCI: 00:06.0: enabled 0
786 12:44:54.908040 PCI: 00:07.0: enabled 0
787 12:44:54.910818 GENERIC: 0.0: enabled 1
788 12:44:54.913718 PCI: 00:07.1: enabled 0
789 12:44:54.916985 GENERIC: 1.0: enabled 1
790 12:44:54.920214 PCI: 00:07.2: enabled 0
791 12:44:54.923500 GENERIC: 0.0: enabled 1
792 12:44:54.923952 PCI: 00:07.3: enabled 0
793 12:44:54.927248 GENERIC: 1.0: enabled 1
794 12:44:54.930476 PCI: 00:08.0: enabled 1
795 12:44:54.933527 PCI: 00:09.0: enabled 0
796 12:44:54.937232 PCI: 00:0a.0: enabled 0
797 12:44:54.937681 PCI: 00:0d.0: enabled 1
798 12:44:54.940698 USB0 port 0: enabled 1
799 12:44:54.943500 USB3 port 0: enabled 1
800 12:44:54.946857 USB3 port 1: enabled 1
801 12:44:54.950195 USB3 port 2: enabled 0
802 12:44:54.950644 USB3 port 3: enabled 0
803 12:44:54.953555 PCI: 00:0d.1: enabled 0
804 12:44:54.956843 PCI: 00:0d.2: enabled 0
805 12:44:54.960302 GENERIC: 0.0: enabled 1
806 12:44:54.963632 PCI: 00:0d.3: enabled 0
807 12:44:54.964127 PCI: 00:0e.0: enabled 0
808 12:44:54.967034 PCI: 00:10.2: enabled 1
809 12:44:54.970259 PCI: 00:10.6: enabled 0
810 12:44:54.973756 PCI: 00:10.7: enabled 0
811 12:44:54.977058 PCI: 00:12.0: enabled 0
812 12:44:54.977529 PCI: 00:12.6: enabled 0
813 12:44:54.980244 PCI: 00:13.0: enabled 0
814 12:44:54.983386 PCI: 00:14.0: enabled 1
815 12:44:54.986737 USB0 port 0: enabled 1
816 12:44:54.989863 USB2 port 0: enabled 0
817 12:44:54.990309 USB2 port 1: enabled 1
818 12:44:54.993235 USB2 port 2: enabled 1
819 12:44:54.996828 USB2 port 3: enabled 0
820 12:44:54.999629 USB2 port 4: enabled 1
821 12:44:55.002887 USB2 port 5: enabled 0
822 12:44:55.006392 USB2 port 6: enabled 0
823 12:44:55.006875 USB2 port 7: enabled 0
824 12:44:55.009933 USB2 port 8: enabled 0
825 12:44:55.013290 USB2 port 9: enabled 0
826 12:44:55.016453 USB3 port 0: enabled 0
827 12:44:55.019594 USB3 port 1: enabled 1
828 12:44:55.022862 USB3 port 2: enabled 0
829 12:44:55.023321 USB3 port 3: enabled 0
830 12:44:55.026193 PCI: 00:14.1: enabled 0
831 12:44:55.029635 PCI: 00:14.2: enabled 1
832 12:44:55.032765 PCI: 00:14.3: enabled 1
833 12:44:55.036544 GENERIC: 0.0: enabled 1
834 12:44:55.037107 PCI: 00:15.0: enabled 1
835 12:44:55.039549 I2C: 00:1a: enabled 1
836 12:44:55.042793 I2C: 00:31: enabled 1
837 12:44:55.046448 I2C: 00:32: enabled 1
838 12:44:55.046898 PCI: 00:15.1: enabled 1
839 12:44:55.049579 I2C: 00:10: enabled 1
840 12:44:55.053048 PCI: 00:15.2: enabled 1
841 12:44:55.055786 PCI: 00:15.3: enabled 1
842 12:44:55.059217 PCI: 00:16.0: enabled 1
843 12:44:55.059710 PCI: 00:16.1: enabled 0
844 12:44:55.062467 PCI: 00:16.2: enabled 0
845 12:44:55.065803 PCI: 00:16.3: enabled 0
846 12:44:55.069898 PCI: 00:16.4: enabled 0
847 12:44:55.070357 PCI: 00:16.5: enabled 0
848 12:44:55.073153 PCI: 00:17.0: enabled 1
849 12:44:55.076849 PCI: 00:19.0: enabled 0
850 12:44:55.080417 PCI: 00:19.1: enabled 1
851 12:44:55.083408 I2C: 00:15: enabled 1
852 12:44:55.083869 PCI: 00:19.2: enabled 0
853 12:44:55.087018 PCI: 00:1d.0: enabled 1
854 12:44:55.090519 GENERIC: 0.0: enabled 1
855 12:44:55.093162 PCI: 00:1e.0: enabled 1
856 12:44:55.143237 PCI: 00:1e.1: enabled 0
857 12:44:55.143870 PCI: 00:1e.2: enabled 1
858 12:44:55.144439 SPI: 00: enabled 1
859 12:44:55.145238 PCI: 00:1e.3: enabled 1
860 12:44:55.145633 SPI: 00: enabled 1
861 12:44:55.146024 PCI: 00:1f.0: enabled 1
862 12:44:55.146357 PNP: 0c09.0: enabled 1
863 12:44:55.146692 PCI: 00:1f.1: enabled 0
864 12:44:55.147001 PCI: 00:1f.2: enabled 1
865 12:44:55.147331 GENERIC: 0.0: enabled 1
866 12:44:55.147636 GENERIC: 0.0: enabled 1
867 12:44:55.147953 GENERIC: 1.0: enabled 1
868 12:44:55.148438 PCI: 00:1f.3: enabled 1
869 12:44:55.148909 PCI: 00:1f.4: enabled 0
870 12:44:55.149246 PCI: 00:1f.5: enabled 1
871 12:44:55.149554 PCI: 00:1f.6: enabled 0
872 12:44:55.149929 PCI: 00:1f.7: enabled 0
873 12:44:55.150293 CPU_CLUSTER: 0: enabled 1
874 12:44:55.150715 APIC: 00: enabled 1
875 12:44:55.151033 APIC: 01: enabled 1
876 12:44:55.151817 APIC: 03: enabled 1
877 12:44:55.152209 APIC: 07: enabled 1
878 12:44:55.152642 APIC: 05: enabled 1
879 12:44:55.154387 APIC: 04: enabled 1
880 12:44:55.154898 APIC: 02: enabled 1
881 12:44:55.157423 APIC: 06: enabled 1
882 12:44:55.160737 Root Device scanning...
883 12:44:55.163949 scan_static_bus for Root Device
884 12:44:55.167220 DOMAIN: 0000 enabled
885 12:44:55.170381 CPU_CLUSTER: 0 enabled
886 12:44:55.170830 DOMAIN: 0000 scanning...
887 12:44:55.174184 PCI: pci_scan_bus for bus 00
888 12:44:55.177195 PCI: 00:00.0 [8086/0000] ops
889 12:44:55.180638 PCI: 00:00.0 [8086/9a12] enabled
890 12:44:55.183847 PCI: 00:02.0 [8086/0000] bus ops
891 12:44:55.187515 PCI: 00:02.0 [8086/9a40] enabled
892 12:44:55.190751 PCI: 00:04.0 [8086/0000] bus ops
893 12:44:55.193911 PCI: 00:04.0 [8086/9a03] enabled
894 12:44:55.197292 PCI: 00:05.0 [8086/9a19] enabled
895 12:44:55.200473 PCI: 00:07.0 [0000/0000] hidden
896 12:44:55.203807 PCI: 00:08.0 [8086/9a11] enabled
897 12:44:55.207172 PCI: 00:0a.0 [8086/9a0d] disabled
898 12:44:55.210667 PCI: 00:0d.0 [8086/0000] bus ops
899 12:44:55.213960 PCI: 00:0d.0 [8086/9a13] enabled
900 12:44:55.216966 PCI: 00:14.0 [8086/0000] bus ops
901 12:44:55.220914 PCI: 00:14.0 [8086/a0ed] enabled
902 12:44:55.224143 PCI: 00:14.2 [8086/a0ef] enabled
903 12:44:55.226823 PCI: 00:14.3 [8086/0000] bus ops
904 12:44:55.230401 PCI: 00:14.3 [8086/a0f0] enabled
905 12:44:55.233753 PCI: 00:15.0 [8086/0000] bus ops
906 12:44:55.237377 PCI: 00:15.0 [8086/a0e8] enabled
907 12:44:55.240500 PCI: 00:15.1 [8086/0000] bus ops
908 12:44:55.243586 PCI: 00:15.1 [8086/a0e9] enabled
909 12:44:55.246807 PCI: 00:15.2 [8086/0000] bus ops
910 12:44:55.250499 PCI: 00:15.2 [8086/a0ea] enabled
911 12:44:55.253398 PCI: 00:15.3 [8086/0000] bus ops
912 12:44:55.256777 PCI: 00:15.3 [8086/a0eb] enabled
913 12:44:55.260089 PCI: 00:16.0 [8086/0000] ops
914 12:44:55.263465 PCI: 00:16.0 [8086/a0e0] enabled
915 12:44:55.270343 PCI: Static device PCI: 00:17.0 not found, disabling it.
916 12:44:55.273459 PCI: 00:19.0 [8086/0000] bus ops
917 12:44:55.276433 PCI: 00:19.0 [8086/a0c5] disabled
918 12:44:55.280123 PCI: 00:19.1 [8086/0000] bus ops
919 12:44:55.283348 PCI: 00:19.1 [8086/a0c6] enabled
920 12:44:55.286687 PCI: 00:1d.0 [8086/0000] bus ops
921 12:44:55.290118 PCI: 00:1d.0 [8086/a0b0] enabled
922 12:44:55.293280 PCI: 00:1e.0 [8086/0000] ops
923 12:44:55.296924 PCI: 00:1e.0 [8086/a0a8] enabled
924 12:44:55.300438 PCI: 00:1e.2 [8086/0000] bus ops
925 12:44:55.303458 PCI: 00:1e.2 [8086/a0aa] enabled
926 12:44:55.306421 PCI: 00:1e.3 [8086/0000] bus ops
927 12:44:55.310545 PCI: 00:1e.3 [8086/a0ab] enabled
928 12:44:55.313187 PCI: 00:1f.0 [8086/0000] bus ops
929 12:44:55.316553 PCI: 00:1f.0 [8086/a087] enabled
930 12:44:55.317139 RTC Init
931 12:44:55.319663 Set power on after power failure.
932 12:44:55.323043 Disabling Deep S3
933 12:44:55.326755 Disabling Deep S3
934 12:44:55.327475 Disabling Deep S4
935 12:44:55.329897 Disabling Deep S4
936 12:44:55.330372 Disabling Deep S5
937 12:44:55.333200 Disabling Deep S5
938 12:44:55.337045 PCI: 00:1f.2 [0000/0000] hidden
939 12:44:55.340065 PCI: 00:1f.3 [8086/0000] bus ops
940 12:44:55.343134 PCI: 00:1f.3 [8086/a0c8] enabled
941 12:44:55.346432 PCI: 00:1f.5 [8086/0000] bus ops
942 12:44:55.350139 PCI: 00:1f.5 [8086/a0a4] enabled
943 12:44:55.353163 PCI: Leftover static devices:
944 12:44:55.353659 PCI: 00:10.2
945 12:44:55.356401 PCI: 00:10.6
946 12:44:55.356885 PCI: 00:10.7
947 12:44:55.357291 PCI: 00:06.0
948 12:44:55.360040 PCI: 00:07.1
949 12:44:55.360512 PCI: 00:07.2
950 12:44:55.363038 PCI: 00:07.3
951 12:44:55.363477 PCI: 00:09.0
952 12:44:55.363820 PCI: 00:0d.1
953 12:44:55.366241 PCI: 00:0d.2
954 12:44:55.366682 PCI: 00:0d.3
955 12:44:55.369517 PCI: 00:0e.0
956 12:44:55.369958 PCI: 00:12.0
957 12:44:55.372976 PCI: 00:12.6
958 12:44:55.373418 PCI: 00:13.0
959 12:44:55.373766 PCI: 00:14.1
960 12:44:55.376554 PCI: 00:16.1
961 12:44:55.377024 PCI: 00:16.2
962 12:44:55.379678 PCI: 00:16.3
963 12:44:55.380156 PCI: 00:16.4
964 12:44:55.380602 PCI: 00:16.5
965 12:44:55.384242 PCI: 00:17.0
966 12:44:55.384781 PCI: 00:19.2
967 12:44:55.386463 PCI: 00:1e.1
968 12:44:55.386897 PCI: 00:1f.1
969 12:44:55.387278 PCI: 00:1f.4
970 12:44:55.389835 PCI: 00:1f.6
971 12:44:55.390272 PCI: 00:1f.7
972 12:44:55.393131 PCI: Check your devicetree.cb.
973 12:44:55.396039 PCI: 00:02.0 scanning...
974 12:44:55.399750 scan_generic_bus for PCI: 00:02.0
975 12:44:55.403078 scan_generic_bus for PCI: 00:02.0 done
976 12:44:55.409569 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
977 12:44:55.410059 PCI: 00:04.0 scanning...
978 12:44:55.416236 scan_generic_bus for PCI: 00:04.0
979 12:44:55.416760 GENERIC: 0.0 enabled
980 12:44:55.423326 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
981 12:44:55.426277 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
982 12:44:55.429566 PCI: 00:0d.0 scanning...
983 12:44:55.432762 scan_static_bus for PCI: 00:0d.0
984 12:44:55.436408 USB0 port 0 enabled
985 12:44:55.439531 USB0 port 0 scanning...
986 12:44:55.442944 scan_static_bus for USB0 port 0
987 12:44:55.443436 USB3 port 0 enabled
988 12:44:55.446149 USB3 port 1 enabled
989 12:44:55.449396 USB3 port 2 disabled
990 12:44:55.449857 USB3 port 3 disabled
991 12:44:55.452815 USB3 port 0 scanning...
992 12:44:55.456077 scan_static_bus for USB3 port 0
993 12:44:55.459471 scan_static_bus for USB3 port 0 done
994 12:44:55.466273 scan_bus: bus USB3 port 0 finished in 6 msecs
995 12:44:55.466731 USB3 port 1 scanning...
996 12:44:55.469774 scan_static_bus for USB3 port 1
997 12:44:55.472502 scan_static_bus for USB3 port 1 done
998 12:44:55.479295 scan_bus: bus USB3 port 1 finished in 6 msecs
999 12:44:55.482437 scan_static_bus for USB0 port 0 done
1000 12:44:55.486036 scan_bus: bus USB0 port 0 finished in 43 msecs
1001 12:44:55.489124 scan_static_bus for PCI: 00:0d.0 done
1002 12:44:55.495725 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
1003 12:44:55.499175 PCI: 00:14.0 scanning...
1004 12:44:55.502331 scan_static_bus for PCI: 00:14.0
1005 12:44:55.502813 USB0 port 0 enabled
1006 12:44:55.505830 USB0 port 0 scanning...
1007 12:44:55.509144 scan_static_bus for USB0 port 0
1008 12:44:55.512734 USB2 port 0 disabled
1009 12:44:55.513204 USB2 port 1 enabled
1010 12:44:55.515863 USB2 port 2 enabled
1011 12:44:55.519579 USB2 port 3 disabled
1012 12:44:55.520062 USB2 port 4 enabled
1013 12:44:55.522413 USB2 port 5 disabled
1014 12:44:55.525743 USB2 port 6 disabled
1015 12:44:55.526331 USB2 port 7 disabled
1016 12:44:55.529021 USB2 port 8 disabled
1017 12:44:55.532182 USB2 port 9 disabled
1018 12:44:55.532693 USB3 port 0 disabled
1019 12:44:55.535536 USB3 port 1 enabled
1020 12:44:55.536002 USB3 port 2 disabled
1021 12:44:55.538733 USB3 port 3 disabled
1022 12:44:55.542161 USB2 port 1 scanning...
1023 12:44:55.545377 scan_static_bus for USB2 port 1
1024 12:44:55.548756 scan_static_bus for USB2 port 1 done
1025 12:44:55.552159 scan_bus: bus USB2 port 1 finished in 6 msecs
1026 12:44:55.555619 USB2 port 2 scanning...
1027 12:44:55.558842 scan_static_bus for USB2 port 2
1028 12:44:55.562360 scan_static_bus for USB2 port 2 done
1029 12:44:55.568797 scan_bus: bus USB2 port 2 finished in 6 msecs
1030 12:44:55.569256 USB2 port 4 scanning...
1031 12:44:55.571981 scan_static_bus for USB2 port 4
1032 12:44:55.578890 scan_static_bus for USB2 port 4 done
1033 12:44:55.582421 scan_bus: bus USB2 port 4 finished in 6 msecs
1034 12:44:55.585321 USB3 port 1 scanning...
1035 12:44:55.589080 scan_static_bus for USB3 port 1
1036 12:44:55.592193 scan_static_bus for USB3 port 1 done
1037 12:44:55.595739 scan_bus: bus USB3 port 1 finished in 6 msecs
1038 12:44:55.598649 scan_static_bus for USB0 port 0 done
1039 12:44:55.605331 scan_bus: bus USB0 port 0 finished in 93 msecs
1040 12:44:55.608458 scan_static_bus for PCI: 00:14.0 done
1041 12:44:55.612050 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1042 12:44:55.615522 PCI: 00:14.3 scanning...
1043 12:44:55.618872 scan_static_bus for PCI: 00:14.3
1044 12:44:55.622121 GENERIC: 0.0 enabled
1045 12:44:55.625367 scan_static_bus for PCI: 00:14.3 done
1046 12:44:55.628660 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1047 12:44:55.632140 PCI: 00:15.0 scanning...
1048 12:44:55.635599 scan_static_bus for PCI: 00:15.0
1049 12:44:55.638337 I2C: 00:1a enabled
1050 12:44:55.638796 I2C: 00:31 enabled
1051 12:44:55.642097 I2C: 00:32 enabled
1052 12:44:55.645993 scan_static_bus for PCI: 00:15.0 done
1053 12:44:55.649115 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1054 12:44:55.652237 PCI: 00:15.1 scanning...
1055 12:44:55.655911 scan_static_bus for PCI: 00:15.1
1056 12:44:55.659579 I2C: 00:10 enabled
1057 12:44:55.662398 scan_static_bus for PCI: 00:15.1 done
1058 12:44:55.665934 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1059 12:44:55.668994 PCI: 00:15.2 scanning...
1060 12:44:55.672282 scan_static_bus for PCI: 00:15.2
1061 12:44:55.675862 scan_static_bus for PCI: 00:15.2 done
1062 12:44:55.682056 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1063 12:44:55.685613 PCI: 00:15.3 scanning...
1064 12:44:55.688914 scan_static_bus for PCI: 00:15.3
1065 12:44:55.692112 scan_static_bus for PCI: 00:15.3 done
1066 12:44:55.695392 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1067 12:44:55.698784 PCI: 00:19.1 scanning...
1068 12:44:55.701959 scan_static_bus for PCI: 00:19.1
1069 12:44:55.705121 I2C: 00:15 enabled
1070 12:44:55.709057 scan_static_bus for PCI: 00:19.1 done
1071 12:44:55.712282 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1072 12:44:55.715418 PCI: 00:1d.0 scanning...
1073 12:44:55.718477 do_pci_scan_bridge for PCI: 00:1d.0
1074 12:44:55.722078 PCI: pci_scan_bus for bus 01
1075 12:44:55.725558 PCI: 01:00.0 [1c5c/174a] enabled
1076 12:44:55.728574 GENERIC: 0.0 enabled
1077 12:44:55.731794 Enabling Common Clock Configuration
1078 12:44:55.735352 L1 Sub-State supported from root port 29
1079 12:44:55.738796 L1 Sub-State Support = 0xf
1080 12:44:55.742283 CommonModeRestoreTime = 0x28
1081 12:44:55.745007 Power On Value = 0x16, Power On Scale = 0x0
1082 12:44:55.748347 ASPM: Enabled L1
1083 12:44:55.751523 PCIe: Max_Payload_Size adjusted to 128
1084 12:44:55.754900 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1085 12:44:55.758329 PCI: 00:1e.2 scanning...
1086 12:44:55.761365 scan_generic_bus for PCI: 00:1e.2
1087 12:44:55.764749 SPI: 00 enabled
1088 12:44:55.771356 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1089 12:44:55.774680 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1090 12:44:55.778215 PCI: 00:1e.3 scanning...
1091 12:44:55.782146 scan_generic_bus for PCI: 00:1e.3
1092 12:44:55.782618 SPI: 00 enabled
1093 12:44:55.788240 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1094 12:44:55.794842 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1095 12:44:55.795313 PCI: 00:1f.0 scanning...
1096 12:44:55.798156 scan_static_bus for PCI: 00:1f.0
1097 12:44:55.801655 PNP: 0c09.0 enabled
1098 12:44:55.804906 PNP: 0c09.0 scanning...
1099 12:44:55.808257 scan_static_bus for PNP: 0c09.0
1100 12:44:55.811280 scan_static_bus for PNP: 0c09.0 done
1101 12:44:55.814683 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1102 12:44:55.821693 scan_static_bus for PCI: 00:1f.0 done
1103 12:44:55.824657 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1104 12:44:55.828268 PCI: 00:1f.2 scanning...
1105 12:44:55.831481 scan_static_bus for PCI: 00:1f.2
1106 12:44:55.831947 GENERIC: 0.0 enabled
1107 12:44:55.834467 GENERIC: 0.0 scanning...
1108 12:44:55.838423 scan_static_bus for GENERIC: 0.0
1109 12:44:55.841179 GENERIC: 0.0 enabled
1110 12:44:55.844796 GENERIC: 1.0 enabled
1111 12:44:55.847754 scan_static_bus for GENERIC: 0.0 done
1112 12:44:55.851439 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1113 12:44:55.854570 scan_static_bus for PCI: 00:1f.2 done
1114 12:44:55.861014 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1115 12:44:55.864342 PCI: 00:1f.3 scanning...
1116 12:44:55.867849 scan_static_bus for PCI: 00:1f.3
1117 12:44:55.870874 scan_static_bus for PCI: 00:1f.3 done
1118 12:44:55.874623 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1119 12:44:55.877465 PCI: 00:1f.5 scanning...
1120 12:44:55.881030 scan_generic_bus for PCI: 00:1f.5
1121 12:44:55.883922 scan_generic_bus for PCI: 00:1f.5 done
1122 12:44:55.890462 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1123 12:44:55.894149 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1124 12:44:55.897074 scan_static_bus for Root Device done
1125 12:44:55.903661 scan_bus: bus Root Device finished in 736 msecs
1126 12:44:55.903748 done
1127 12:44:55.910311 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1128 12:44:55.913765 Chrome EC: UHEPI supported
1129 12:44:55.920676 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1130 12:44:55.923650 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1131 12:44:55.930283 SPI flash protection: WPSW=0 SRP0=0
1132 12:44:55.933772 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1133 12:44:55.940504 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1134 12:44:55.943894 found VGA at PCI: 00:02.0
1135 12:44:55.946754 Setting up VGA for PCI: 00:02.0
1136 12:44:55.950151 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1137 12:44:55.956958 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 12:44:55.957052 Allocating resources...
1139 12:44:55.960332 Reading resources...
1140 12:44:55.963890 Root Device read_resources bus 0 link: 0
1141 12:44:55.970475 DOMAIN: 0000 read_resources bus 0 link: 0
1142 12:44:55.973256 PCI: 00:04.0 read_resources bus 1 link: 0
1143 12:44:55.980221 PCI: 00:04.0 read_resources bus 1 link: 0 done
1144 12:44:55.983304 PCI: 00:0d.0 read_resources bus 0 link: 0
1145 12:44:55.989943 USB0 port 0 read_resources bus 0 link: 0
1146 12:44:55.993182 USB0 port 0 read_resources bus 0 link: 0 done
1147 12:44:55.999731 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1148 12:44:56.003043 PCI: 00:14.0 read_resources bus 0 link: 0
1149 12:44:56.006582 USB0 port 0 read_resources bus 0 link: 0
1150 12:44:56.013599 USB0 port 0 read_resources bus 0 link: 0 done
1151 12:44:56.016548 PCI: 00:14.0 read_resources bus 0 link: 0 done
1152 12:44:56.023491 PCI: 00:14.3 read_resources bus 0 link: 0
1153 12:44:56.027153 PCI: 00:14.3 read_resources bus 0 link: 0 done
1154 12:44:56.033611 PCI: 00:15.0 read_resources bus 0 link: 0
1155 12:44:56.037013 PCI: 00:15.0 read_resources bus 0 link: 0 done
1156 12:44:56.043552 PCI: 00:15.1 read_resources bus 0 link: 0
1157 12:44:56.046699 PCI: 00:15.1 read_resources bus 0 link: 0 done
1158 12:44:56.055226 PCI: 00:19.1 read_resources bus 0 link: 0
1159 12:44:56.057109 PCI: 00:19.1 read_resources bus 0 link: 0 done
1160 12:44:56.063954 PCI: 00:1d.0 read_resources bus 1 link: 0
1161 12:44:56.067448 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1162 12:44:56.074304 PCI: 00:1e.2 read_resources bus 2 link: 0
1163 12:44:56.077800 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1164 12:44:56.084345 PCI: 00:1e.3 read_resources bus 3 link: 0
1165 12:44:56.087704 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1166 12:44:56.093848 PCI: 00:1f.0 read_resources bus 0 link: 0
1167 12:44:56.097847 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1168 12:44:56.103756 PCI: 00:1f.2 read_resources bus 0 link: 0
1169 12:44:56.107294 GENERIC: 0.0 read_resources bus 0 link: 0
1170 12:44:56.113749 GENERIC: 0.0 read_resources bus 0 link: 0 done
1171 12:44:56.117413 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1172 12:44:56.124175 DOMAIN: 0000 read_resources bus 0 link: 0 done
1173 12:44:56.127341 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1174 12:44:56.133925 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1175 12:44:56.136836 Root Device read_resources bus 0 link: 0 done
1176 12:44:56.140420 Done reading resources.
1177 12:44:56.146990 Show resources in subtree (Root Device)...After reading.
1178 12:44:56.150326 Root Device child on link 0 DOMAIN: 0000
1179 12:44:56.153414 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1180 12:44:56.164010 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1181 12:44:56.173923 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1182 12:44:56.174381 PCI: 00:00.0
1183 12:44:56.183752 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1184 12:44:56.193582 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1185 12:44:56.203290 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1186 12:44:56.213315 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1187 12:44:56.223354 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1188 12:44:56.229707 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1189 12:44:56.239678 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1190 12:44:56.250146 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1191 12:44:56.260411 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1192 12:44:56.269689 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1193 12:44:56.279896 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1194 12:44:56.286363 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1195 12:44:56.296438 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1196 12:44:56.306621 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1197 12:44:56.315930 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1198 12:44:56.326329 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1199 12:44:56.336425 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1200 12:44:56.342896 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1201 12:44:56.352488 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1202 12:44:56.362444 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1203 12:44:56.367032 PCI: 00:02.0
1204 12:44:56.375854 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1205 12:44:56.386034 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1206 12:44:56.392393 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1207 12:44:56.399104 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1208 12:44:56.409027 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1209 12:44:56.409483 GENERIC: 0.0
1210 12:44:56.412280 PCI: 00:05.0
1211 12:44:56.422296 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1212 12:44:56.425412 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1213 12:44:56.428886 GENERIC: 0.0
1214 12:44:56.429337 PCI: 00:08.0
1215 12:44:56.439084 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 12:44:56.442062 PCI: 00:0a.0
1217 12:44:56.445470 PCI: 00:0d.0 child on link 0 USB0 port 0
1218 12:44:56.455347 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1219 12:44:56.462680 USB0 port 0 child on link 0 USB3 port 0
1220 12:44:56.463135 USB3 port 0
1221 12:44:56.465571 USB3 port 1
1222 12:44:56.466094 USB3 port 2
1223 12:44:56.468559 USB3 port 3
1224 12:44:56.471917 PCI: 00:14.0 child on link 0 USB0 port 0
1225 12:44:56.482198 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1226 12:44:56.485142 USB0 port 0 child on link 0 USB2 port 0
1227 12:44:56.488651 USB2 port 0
1228 12:44:56.489103 USB2 port 1
1229 12:44:56.492396 USB2 port 2
1230 12:44:56.492848 USB2 port 3
1231 12:44:56.495639 USB2 port 4
1232 12:44:56.498410 USB2 port 5
1233 12:44:56.498856 USB2 port 6
1234 12:44:56.502434 USB2 port 7
1235 12:44:56.502879 USB2 port 8
1236 12:44:56.505266 USB2 port 9
1237 12:44:56.505715 USB3 port 0
1238 12:44:56.508464 USB3 port 1
1239 12:44:56.508907 USB3 port 2
1240 12:44:56.512274 USB3 port 3
1241 12:44:56.512761 PCI: 00:14.2
1242 12:44:56.522275 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1243 12:44:56.532150 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1244 12:44:56.538467 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1245 12:44:56.547898 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 12:44:56.547988 GENERIC: 0.0
1247 12:44:56.551424 PCI: 00:15.0 child on link 0 I2C: 00:1a
1248 12:44:56.561725 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:44:56.564532 I2C: 00:1a
1250 12:44:56.564613 I2C: 00:31
1251 12:44:56.567903 I2C: 00:32
1252 12:44:56.571285 PCI: 00:15.1 child on link 0 I2C: 00:10
1253 12:44:56.580973 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1254 12:44:56.584767 I2C: 00:10
1255 12:44:56.584847 PCI: 00:15.2
1256 12:44:56.594636 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 12:44:56.597570 PCI: 00:15.3
1258 12:44:56.607463 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:44:56.607554 PCI: 00:16.0
1260 12:44:56.617878 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 12:44:56.621298 PCI: 00:19.0
1262 12:44:56.624462 PCI: 00:19.1 child on link 0 I2C: 00:15
1263 12:44:56.634405 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 12:44:56.634496 I2C: 00:15
1265 12:44:56.640574 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1266 12:44:56.651107 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1267 12:44:56.657092 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1268 12:44:56.667487 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1269 12:44:56.670391 GENERIC: 0.0
1270 12:44:56.670481 PCI: 01:00.0
1271 12:44:56.680475 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:44:56.690283 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1273 12:44:56.700379 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1274 12:44:56.700464 PCI: 00:1e.0
1275 12:44:56.713635 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1276 12:44:56.717005 PCI: 00:1e.2 child on link 0 SPI: 00
1277 12:44:56.726831 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1278 12:44:56.726919 SPI: 00
1279 12:44:56.733607 PCI: 00:1e.3 child on link 0 SPI: 00
1280 12:44:56.743668 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 12:44:56.743748 SPI: 00
1282 12:44:56.746982 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1283 12:44:56.756902 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1284 12:44:56.756985 PNP: 0c09.0
1285 12:44:56.766843 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1286 12:44:56.770061 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1287 12:44:56.780059 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1288 12:44:56.790303 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1289 12:44:56.793332 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1290 12:44:56.796374 GENERIC: 0.0
1291 12:44:56.799983 GENERIC: 1.0
1292 12:44:56.800063 PCI: 00:1f.3
1293 12:44:56.809944 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1294 12:44:56.819287 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1295 12:44:56.822669 PCI: 00:1f.5
1296 12:44:56.829880 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1297 12:44:56.835935 CPU_CLUSTER: 0 child on link 0 APIC: 00
1298 12:44:56.836014 APIC: 00
1299 12:44:56.836079 APIC: 01
1300 12:44:56.839481 APIC: 03
1301 12:44:56.839555 APIC: 07
1302 12:44:56.842677 APIC: 05
1303 12:44:56.842751 APIC: 04
1304 12:44:56.842812 APIC: 02
1305 12:44:56.846211 APIC: 06
1306 12:44:56.852920 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1307 12:44:56.859637 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1308 12:44:56.866025 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1309 12:44:56.872996 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1310 12:44:56.875568 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1311 12:44:56.879227 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1312 12:44:56.882795 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1313 12:44:56.889175 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1314 12:44:56.899180 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1315 12:44:56.905627 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1316 12:44:56.912447 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1317 12:44:56.919153 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1318 12:44:56.925906 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1319 12:44:56.935260 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1320 12:44:56.942158 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1321 12:44:56.945919 DOMAIN: 0000: Resource ranges:
1322 12:44:56.948391 * Base: 1000, Size: 800, Tag: 100
1323 12:44:56.952278 * Base: 1900, Size: e700, Tag: 100
1324 12:44:56.958696 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1325 12:44:56.965395 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1326 12:44:56.971773 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1327 12:44:56.978617 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1328 12:44:56.985250 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1329 12:44:56.995275 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1330 12:44:57.002063 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1331 12:44:57.008462 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1332 12:44:57.018327 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1333 12:44:57.024999 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1334 12:44:57.031621 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1335 12:44:57.041755 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1336 12:44:57.048428 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1337 12:44:57.055130 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1338 12:44:57.064755 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1339 12:44:57.071555 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1340 12:44:57.078693 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1341 12:44:57.088031 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1342 12:44:57.094673 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1343 12:44:57.101507 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1344 12:44:57.111522 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1345 12:44:57.118327 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1346 12:44:57.124432 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1347 12:44:57.135085 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1348 12:44:57.141126 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1349 12:44:57.144410 DOMAIN: 0000: Resource ranges:
1350 12:44:57.147993 * Base: 7fc00000, Size: 40400000, Tag: 200
1351 12:44:57.154259 * Base: d0000000, Size: 28000000, Tag: 200
1352 12:44:57.158371 * Base: fa000000, Size: 1000000, Tag: 200
1353 12:44:57.160985 * Base: fb001000, Size: 2fff000, Tag: 200
1354 12:44:57.165055 * Base: fe010000, Size: 2e000, Tag: 200
1355 12:44:57.170919 * Base: fe03f000, Size: d41000, Tag: 200
1356 12:44:57.174383 * Base: fed88000, Size: 8000, Tag: 200
1357 12:44:57.177967 * Base: fed93000, Size: d000, Tag: 200
1358 12:44:57.180617 * Base: feda2000, Size: 1e000, Tag: 200
1359 12:44:57.187353 * Base: fede0000, Size: 1220000, Tag: 200
1360 12:44:57.190823 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1361 12:44:57.197672 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1362 12:44:57.203838 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1363 12:44:57.210988 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1364 12:44:57.217618 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1365 12:44:57.224137 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1366 12:44:57.230432 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1367 12:44:57.237591 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1368 12:44:57.243960 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1369 12:44:57.250570 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1370 12:44:57.257216 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1371 12:44:57.264434 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1372 12:44:57.270449 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1373 12:44:57.276961 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1374 12:44:57.283982 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1375 12:44:57.291423 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1376 12:44:57.297007 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1377 12:44:57.303413 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1378 12:44:57.310547 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1379 12:44:57.316732 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1380 12:44:57.323592 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1381 12:44:57.330555 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1382 12:44:57.336867 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1383 12:44:57.343326 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1384 12:44:57.353278 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1385 12:44:57.356792 PCI: 00:1d.0: Resource ranges:
1386 12:44:57.360073 * Base: 7fc00000, Size: 100000, Tag: 200
1387 12:44:57.366326 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1388 12:44:57.373524 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1389 12:44:57.379916 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1390 12:44:57.389484 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1391 12:44:57.396457 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1392 12:44:57.399605 Root Device assign_resources, bus 0 link: 0
1393 12:44:57.406055 DOMAIN: 0000 assign_resources, bus 0 link: 0
1394 12:44:57.412711 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1395 12:44:57.423169 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1396 12:44:57.429506 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1397 12:44:57.439301 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1398 12:44:57.442738 PCI: 00:04.0 assign_resources, bus 1 link: 0
1399 12:44:57.446009 PCI: 00:04.0 assign_resources, bus 1 link: 0
1400 12:44:57.455967 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1401 12:44:57.462847 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1402 12:44:57.472521 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1403 12:44:57.475757 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1404 12:44:57.482192 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1405 12:44:57.489180 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1406 12:44:57.492576 PCI: 00:14.0 assign_resources, bus 0 link: 0
1407 12:44:57.499127 PCI: 00:14.0 assign_resources, bus 0 link: 0
1408 12:44:57.505464 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1409 12:44:57.515450 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1410 12:44:57.522117 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1411 12:44:57.528834 PCI: 00:14.3 assign_resources, bus 0 link: 0
1412 12:44:57.531716 PCI: 00:14.3 assign_resources, bus 0 link: 0
1413 12:44:57.541761 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1414 12:44:57.545236 PCI: 00:15.0 assign_resources, bus 0 link: 0
1415 12:44:57.548517 PCI: 00:15.0 assign_resources, bus 0 link: 0
1416 12:44:57.558744 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1417 12:44:57.561734 PCI: 00:15.1 assign_resources, bus 0 link: 0
1418 12:44:57.568208 PCI: 00:15.1 assign_resources, bus 0 link: 0
1419 12:44:57.574837 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1420 12:44:57.584837 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1421 12:44:57.591323 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1422 12:44:57.601178 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1423 12:44:57.604768 PCI: 00:19.1 assign_resources, bus 0 link: 0
1424 12:44:57.607918 PCI: 00:19.1 assign_resources, bus 0 link: 0
1425 12:44:57.618026 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1426 12:44:57.628202 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1427 12:44:57.637663 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1428 12:44:57.641154 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 12:44:57.647512 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1430 12:44:57.657846 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1431 12:44:57.664190 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1432 12:44:57.670632 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1433 12:44:57.677490 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1434 12:44:57.683939 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1435 12:44:57.688208 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1436 12:44:57.694316 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1437 12:44:57.701274 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1438 12:44:57.704499 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1439 12:44:57.710538 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1440 12:44:57.713575 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1441 12:44:57.720691 LPC: Trying to open IO window from 800 size 1ff
1442 12:44:57.726869 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1443 12:44:57.737712 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1444 12:44:57.743688 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1445 12:44:57.747084 DOMAIN: 0000 assign_resources, bus 0 link: 0
1446 12:44:57.753704 Root Device assign_resources, bus 0 link: 0
1447 12:44:57.756855 Done setting resources.
1448 12:44:57.763496 Show resources in subtree (Root Device)...After assigning values.
1449 12:44:57.767245 Root Device child on link 0 DOMAIN: 0000
1450 12:44:57.770242 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1451 12:44:57.780050 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1452 12:44:57.790551 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1453 12:44:57.791004 PCI: 00:00.0
1454 12:44:57.800159 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1455 12:44:57.809769 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1456 12:44:57.819678 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1457 12:44:57.829823 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1458 12:44:57.839882 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1459 12:44:57.849624 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1460 12:44:57.856351 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1461 12:44:57.866809 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1462 12:44:57.876415 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1463 12:44:57.886456 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1464 12:44:57.896435 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1465 12:44:57.903088 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1466 12:44:57.912558 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1467 12:44:57.922484 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1468 12:44:57.932804 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1469 12:44:57.942477 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1470 12:44:57.952352 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1471 12:44:57.962083 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1472 12:44:57.969221 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1473 12:44:57.979061 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1474 12:44:57.982289 PCI: 00:02.0
1475 12:44:57.992184 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1476 12:44:58.002241 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1477 12:44:58.012206 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1478 12:44:58.015552 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1479 12:44:58.028869 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1480 12:44:58.029333 GENERIC: 0.0
1481 12:44:58.032195 PCI: 00:05.0
1482 12:44:58.041681 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1483 12:44:58.045380 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1484 12:44:58.048431 GENERIC: 0.0
1485 12:44:58.049041 PCI: 00:08.0
1486 12:44:58.058630 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1487 12:44:58.061851 PCI: 00:0a.0
1488 12:44:58.065154 PCI: 00:0d.0 child on link 0 USB0 port 0
1489 12:44:58.074764 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1490 12:44:58.081556 USB0 port 0 child on link 0 USB3 port 0
1491 12:44:58.082183 USB3 port 0
1492 12:44:58.085162 USB3 port 1
1493 12:44:58.085729 USB3 port 2
1494 12:44:58.088197 USB3 port 3
1495 12:44:58.091778 PCI: 00:14.0 child on link 0 USB0 port 0
1496 12:44:58.101381 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1497 12:44:58.107578 USB0 port 0 child on link 0 USB2 port 0
1498 12:44:58.107700 USB2 port 0
1499 12:44:58.111033 USB2 port 1
1500 12:44:58.111121 USB2 port 2
1501 12:44:58.114397 USB2 port 3
1502 12:44:58.114485 USB2 port 4
1503 12:44:58.117786 USB2 port 5
1504 12:44:58.117874 USB2 port 6
1505 12:44:58.121223 USB2 port 7
1506 12:44:58.121311 USB2 port 8
1507 12:44:58.124282 USB2 port 9
1508 12:44:58.124410 USB3 port 0
1509 12:44:58.127598 USB3 port 1
1510 12:44:58.127678 USB3 port 2
1511 12:44:58.130913 USB3 port 3
1512 12:44:58.134628 PCI: 00:14.2
1513 12:44:58.144472 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1514 12:44:58.154270 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1515 12:44:58.157512 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1516 12:44:58.167847 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1517 12:44:58.170486 GENERIC: 0.0
1518 12:44:58.174005 PCI: 00:15.0 child on link 0 I2C: 00:1a
1519 12:44:58.183895 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1520 12:44:58.187585 I2C: 00:1a
1521 12:44:58.188007 I2C: 00:31
1522 12:44:58.191045 I2C: 00:32
1523 12:44:58.194147 PCI: 00:15.1 child on link 0 I2C: 00:10
1524 12:44:58.204092 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1525 12:44:58.207564 I2C: 00:10
1526 12:44:58.208104 PCI: 00:15.2
1527 12:44:58.217319 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1528 12:44:58.220508 PCI: 00:15.3
1529 12:44:58.230548 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1530 12:44:58.231167 PCI: 00:16.0
1531 12:44:58.240726 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1532 12:44:58.243759 PCI: 00:19.0
1533 12:44:58.247070 PCI: 00:19.1 child on link 0 I2C: 00:15
1534 12:44:58.256886 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1535 12:44:58.260283 I2C: 00:15
1536 12:44:58.263771 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1537 12:44:58.273970 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1538 12:44:58.283910 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1539 12:44:58.297049 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1540 12:44:58.297529 GENERIC: 0.0
1541 12:44:58.300035 PCI: 01:00.0
1542 12:44:58.310282 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1543 12:44:58.320188 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1544 12:44:58.330326 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1545 12:44:58.333188 PCI: 00:1e.0
1546 12:44:58.343578 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 12:44:58.346328 PCI: 00:1e.2 child on link 0 SPI: 00
1548 12:44:58.357058 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 12:44:58.359569 SPI: 00
1550 12:44:58.363389 PCI: 00:1e.3 child on link 0 SPI: 00
1551 12:44:58.373169 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1552 12:44:58.373655 SPI: 00
1553 12:44:58.379771 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1554 12:44:58.386268 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1555 12:44:58.389549 PNP: 0c09.0
1556 12:44:58.399695 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1557 12:44:58.402888 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1558 12:44:58.413010 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1559 12:44:58.419553 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1560 12:44:58.425989 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1561 12:44:58.426664 GENERIC: 0.0
1562 12:44:58.429489 GENERIC: 1.0
1563 12:44:58.432592 PCI: 00:1f.3
1564 12:44:58.442527 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1565 12:44:58.452456 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1566 12:44:58.453033 PCI: 00:1f.5
1567 12:44:58.462606 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1568 12:44:58.469349 CPU_CLUSTER: 0 child on link 0 APIC: 00
1569 12:44:58.469894 APIC: 00
1570 12:44:58.470398 APIC: 01
1571 12:44:58.472723 APIC: 03
1572 12:44:58.473178 APIC: 07
1573 12:44:58.475572 APIC: 05
1574 12:44:58.476032 APIC: 04
1575 12:44:58.476538 APIC: 02
1576 12:44:58.479020 APIC: 06
1577 12:44:58.482197 Done allocating resources.
1578 12:44:58.485749 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1579 12:44:58.493054 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1580 12:44:58.495751 Configure GPIOs for I2S audio on UP4.
1581 12:44:58.503734 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1582 12:44:58.506915 Enabling resources...
1583 12:44:58.510131 PCI: 00:00.0 subsystem <- 8086/9a12
1584 12:44:58.513404 PCI: 00:00.0 cmd <- 06
1585 12:44:58.516468 PCI: 00:02.0 subsystem <- 8086/9a40
1586 12:44:58.520087 PCI: 00:02.0 cmd <- 03
1587 12:44:58.523262 PCI: 00:04.0 subsystem <- 8086/9a03
1588 12:44:58.526342 PCI: 00:04.0 cmd <- 02
1589 12:44:58.530021 PCI: 00:05.0 subsystem <- 8086/9a19
1590 12:44:58.530528 PCI: 00:05.0 cmd <- 02
1591 12:44:58.536426 PCI: 00:08.0 subsystem <- 8086/9a11
1592 12:44:58.536919 PCI: 00:08.0 cmd <- 06
1593 12:44:58.540216 PCI: 00:0d.0 subsystem <- 8086/9a13
1594 12:44:58.543385 PCI: 00:0d.0 cmd <- 02
1595 12:44:58.546597 PCI: 00:14.0 subsystem <- 8086/a0ed
1596 12:44:58.549797 PCI: 00:14.0 cmd <- 02
1597 12:44:58.552963 PCI: 00:14.2 subsystem <- 8086/a0ef
1598 12:44:58.556650 PCI: 00:14.2 cmd <- 02
1599 12:44:58.559897 PCI: 00:14.3 subsystem <- 8086/a0f0
1600 12:44:58.562971 PCI: 00:14.3 cmd <- 02
1601 12:44:58.566397 PCI: 00:15.0 subsystem <- 8086/a0e8
1602 12:44:58.569578 PCI: 00:15.0 cmd <- 02
1603 12:44:58.572788 PCI: 00:15.1 subsystem <- 8086/a0e9
1604 12:44:58.576351 PCI: 00:15.1 cmd <- 02
1605 12:44:58.579708 PCI: 00:15.2 subsystem <- 8086/a0ea
1606 12:44:58.580200 PCI: 00:15.2 cmd <- 02
1607 12:44:58.586045 PCI: 00:15.3 subsystem <- 8086/a0eb
1608 12:44:58.586500 PCI: 00:15.3 cmd <- 02
1609 12:44:58.589757 PCI: 00:16.0 subsystem <- 8086/a0e0
1610 12:44:58.592754 PCI: 00:16.0 cmd <- 02
1611 12:44:58.596370 PCI: 00:19.1 subsystem <- 8086/a0c6
1612 12:44:58.599453 PCI: 00:19.1 cmd <- 02
1613 12:44:58.602856 PCI: 00:1d.0 bridge ctrl <- 0013
1614 12:44:58.605908 PCI: 00:1d.0 subsystem <- 8086/a0b0
1615 12:44:58.609160 PCI: 00:1d.0 cmd <- 06
1616 12:44:58.612545 PCI: 00:1e.0 subsystem <- 8086/a0a8
1617 12:44:58.615919 PCI: 00:1e.0 cmd <- 06
1618 12:44:58.619197 PCI: 00:1e.2 subsystem <- 8086/a0aa
1619 12:44:58.623053 PCI: 00:1e.2 cmd <- 06
1620 12:44:58.626102 PCI: 00:1e.3 subsystem <- 8086/a0ab
1621 12:44:58.629234 PCI: 00:1e.3 cmd <- 02
1622 12:44:58.632557 PCI: 00:1f.0 subsystem <- 8086/a087
1623 12:44:58.633179 PCI: 00:1f.0 cmd <- 407
1624 12:44:58.639315 PCI: 00:1f.3 subsystem <- 8086/a0c8
1625 12:44:58.639809 PCI: 00:1f.3 cmd <- 02
1626 12:44:58.643404 PCI: 00:1f.5 subsystem <- 8086/a0a4
1627 12:44:58.646072 PCI: 00:1f.5 cmd <- 406
1628 12:44:58.650765 PCI: 01:00.0 cmd <- 02
1629 12:44:58.655618 done.
1630 12:44:58.658689 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1631 12:44:58.662036 Initializing devices...
1632 12:44:58.664960 Root Device init
1633 12:44:58.668533 Chrome EC: Set SMI mask to 0x0000000000000000
1634 12:44:58.674973 Chrome EC: clear events_b mask to 0x0000000000000000
1635 12:44:58.681918 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1636 12:44:58.684994 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1637 12:44:58.691929 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1638 12:44:58.698987 Chrome EC: Set WAKE mask to 0x0000000000000000
1639 12:44:58.702022 fw_config match found: DB_USB=USB3_ACTIVE
1640 12:44:58.708431 Configure Right Type-C port orientation for retimer
1641 12:44:58.711688 Root Device init finished in 42 msecs
1642 12:44:58.715131 PCI: 00:00.0 init
1643 12:44:58.715581 CPU TDP = 9 Watts
1644 12:44:58.718077 CPU PL1 = 9 Watts
1645 12:44:58.721614 CPU PL2 = 40 Watts
1646 12:44:58.722067 CPU PL4 = 83 Watts
1647 12:44:58.724818 PCI: 00:00.0 init finished in 8 msecs
1648 12:44:58.728286 PCI: 00:02.0 init
1649 12:44:58.731908 GMA: Found VBT in CBFS
1650 12:44:58.734950 GMA: Found valid VBT in CBFS
1651 12:44:58.738053 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1652 12:44:58.748307 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1653 12:44:58.751368 PCI: 00:02.0 init finished in 18 msecs
1654 12:44:58.754704 PCI: 00:05.0 init
1655 12:44:58.758297 PCI: 00:05.0 init finished in 0 msecs
1656 12:44:58.758748 PCI: 00:08.0 init
1657 12:44:58.765116 PCI: 00:08.0 init finished in 0 msecs
1658 12:44:58.765565 PCI: 00:14.0 init
1659 12:44:58.771392 PCI: 00:14.0 init finished in 0 msecs
1660 12:44:58.771812 PCI: 00:14.2 init
1661 12:44:58.774601 PCI: 00:14.2 init finished in 0 msecs
1662 12:44:58.778388 PCI: 00:15.0 init
1663 12:44:58.781830 I2C bus 0 version 0x3230302a
1664 12:44:58.784724 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1665 12:44:58.788384 PCI: 00:15.0 init finished in 6 msecs
1666 12:44:58.791811 PCI: 00:15.1 init
1667 12:44:58.795143 I2C bus 1 version 0x3230302a
1668 12:44:58.798143 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1669 12:44:58.801665 PCI: 00:15.1 init finished in 6 msecs
1670 12:44:58.805333 PCI: 00:15.2 init
1671 12:44:58.808288 I2C bus 2 version 0x3230302a
1672 12:44:58.811567 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1673 12:44:58.815130 PCI: 00:15.2 init finished in 6 msecs
1674 12:44:58.815625 PCI: 00:15.3 init
1675 12:44:58.818282 I2C bus 3 version 0x3230302a
1676 12:44:58.821720 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1677 12:44:58.828514 PCI: 00:15.3 init finished in 6 msecs
1678 12:44:58.829015 PCI: 00:16.0 init
1679 12:44:58.831490 PCI: 00:16.0 init finished in 0 msecs
1680 12:44:58.835872 PCI: 00:19.1 init
1681 12:44:58.838835 I2C bus 5 version 0x3230302a
1682 12:44:58.842051 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1683 12:44:58.845276 PCI: 00:19.1 init finished in 6 msecs
1684 12:44:58.848916 PCI: 00:1d.0 init
1685 12:44:58.851776 Initializing PCH PCIe bridge.
1686 12:44:58.855136 PCI: 00:1d.0 init finished in 3 msecs
1687 12:44:58.858500 PCI: 00:1f.0 init
1688 12:44:58.861476 IOAPIC: Initializing IOAPIC at 0xfec00000
1689 12:44:58.868179 IOAPIC: Bootstrap Processor Local APIC = 0x00
1690 12:44:58.868788 IOAPIC: ID = 0x02
1691 12:44:58.871431 IOAPIC: Dumping registers
1692 12:44:58.875329 reg 0x0000: 0x02000000
1693 12:44:58.875837 reg 0x0001: 0x00770020
1694 12:44:58.877980 reg 0x0002: 0x00000000
1695 12:44:58.881665 PCI: 00:1f.0 init finished in 21 msecs
1696 12:44:58.884810 PCI: 00:1f.2 init
1697 12:44:58.888246 Disabling ACPI via APMC.
1698 12:44:58.892151 APMC done.
1699 12:44:58.894816 PCI: 00:1f.2 init finished in 5 msecs
1700 12:44:58.906913 PCI: 01:00.0 init
1701 12:44:58.909940 PCI: 01:00.0 init finished in 0 msecs
1702 12:44:58.913018 PNP: 0c09.0 init
1703 12:44:58.916519 Google Chrome EC uptime: 8.420 seconds
1704 12:44:58.923068 Google Chrome AP resets since EC boot: 0
1705 12:44:58.926746 Google Chrome most recent AP reset causes:
1706 12:44:58.933501 Google Chrome EC reset flags at last EC boot: reset-pin
1707 12:44:58.936409 PNP: 0c09.0 init finished in 18 msecs
1708 12:44:58.941715 Devices initialized
1709 12:44:58.944757 Show all devs... After init.
1710 12:44:58.947798 Root Device: enabled 1
1711 12:44:58.948349 DOMAIN: 0000: enabled 1
1712 12:44:58.951283 CPU_CLUSTER: 0: enabled 1
1713 12:44:58.954750 PCI: 00:00.0: enabled 1
1714 12:44:58.957805 PCI: 00:02.0: enabled 1
1715 12:44:58.958312 PCI: 00:04.0: enabled 1
1716 12:44:58.961180 PCI: 00:05.0: enabled 1
1717 12:44:58.964824 PCI: 00:06.0: enabled 0
1718 12:44:58.967560 PCI: 00:07.0: enabled 0
1719 12:44:58.968167 PCI: 00:07.1: enabled 0
1720 12:44:58.971077 PCI: 00:07.2: enabled 0
1721 12:44:58.975213 PCI: 00:07.3: enabled 0
1722 12:44:58.977404 PCI: 00:08.0: enabled 1
1723 12:44:58.977495 PCI: 00:09.0: enabled 0
1724 12:44:58.981094 PCI: 00:0a.0: enabled 0
1725 12:44:58.984338 PCI: 00:0d.0: enabled 1
1726 12:44:58.987577 PCI: 00:0d.1: enabled 0
1727 12:44:58.987664 PCI: 00:0d.2: enabled 0
1728 12:44:58.990856 PCI: 00:0d.3: enabled 0
1729 12:44:58.995096 PCI: 00:0e.0: enabled 0
1730 12:44:58.995179 PCI: 00:10.2: enabled 1
1731 12:44:58.997530 PCI: 00:10.6: enabled 0
1732 12:44:59.000831 PCI: 00:10.7: enabled 0
1733 12:44:59.004272 PCI: 00:12.0: enabled 0
1734 12:44:59.004397 PCI: 00:12.6: enabled 0
1735 12:44:59.007419 PCI: 00:13.0: enabled 0
1736 12:44:59.010771 PCI: 00:14.0: enabled 1
1737 12:44:59.014019 PCI: 00:14.1: enabled 0
1738 12:44:59.014107 PCI: 00:14.2: enabled 1
1739 12:44:59.017677 PCI: 00:14.3: enabled 1
1740 12:44:59.020742 PCI: 00:15.0: enabled 1
1741 12:44:59.023771 PCI: 00:15.1: enabled 1
1742 12:44:59.023858 PCI: 00:15.2: enabled 1
1743 12:44:59.027525 PCI: 00:15.3: enabled 1
1744 12:44:59.030627 PCI: 00:16.0: enabled 1
1745 12:44:59.030713 PCI: 00:16.1: enabled 0
1746 12:44:59.033913 PCI: 00:16.2: enabled 0
1747 12:44:59.037167 PCI: 00:16.3: enabled 0
1748 12:44:59.040745 PCI: 00:16.4: enabled 0
1749 12:44:59.040832 PCI: 00:16.5: enabled 0
1750 12:44:59.044027 PCI: 00:17.0: enabled 0
1751 12:44:59.047246 PCI: 00:19.0: enabled 0
1752 12:44:59.050491 PCI: 00:19.1: enabled 1
1753 12:44:59.050595 PCI: 00:19.2: enabled 0
1754 12:44:59.053491 PCI: 00:1c.0: enabled 1
1755 12:44:59.056818 PCI: 00:1c.1: enabled 0
1756 12:44:59.060418 PCI: 00:1c.2: enabled 0
1757 12:44:59.060535 PCI: 00:1c.3: enabled 0
1758 12:44:59.063492 PCI: 00:1c.4: enabled 0
1759 12:44:59.067050 PCI: 00:1c.5: enabled 0
1760 12:44:59.070603 PCI: 00:1c.6: enabled 1
1761 12:44:59.070734 PCI: 00:1c.7: enabled 0
1762 12:44:59.073507 PCI: 00:1d.0: enabled 1
1763 12:44:59.077011 PCI: 00:1d.1: enabled 0
1764 12:44:59.077157 PCI: 00:1d.2: enabled 1
1765 12:44:59.080471 PCI: 00:1d.3: enabled 0
1766 12:44:59.083502 PCI: 00:1e.0: enabled 1
1767 12:44:59.086837 PCI: 00:1e.1: enabled 0
1768 12:44:59.087022 PCI: 00:1e.2: enabled 1
1769 12:44:59.090139 PCI: 00:1e.3: enabled 1
1770 12:44:59.093756 PCI: 00:1f.0: enabled 1
1771 12:44:59.097412 PCI: 00:1f.1: enabled 0
1772 12:44:59.097671 PCI: 00:1f.2: enabled 1
1773 12:44:59.100145 PCI: 00:1f.3: enabled 1
1774 12:44:59.103765 PCI: 00:1f.4: enabled 0
1775 12:44:59.107039 PCI: 00:1f.5: enabled 1
1776 12:44:59.107451 PCI: 00:1f.6: enabled 0
1777 12:44:59.110437 PCI: 00:1f.7: enabled 0
1778 12:44:59.113799 APIC: 00: enabled 1
1779 12:44:59.114251 GENERIC: 0.0: enabled 1
1780 12:44:59.116872 GENERIC: 0.0: enabled 1
1781 12:44:59.120178 GENERIC: 1.0: enabled 1
1782 12:44:59.123515 GENERIC: 0.0: enabled 1
1783 12:44:59.123966 GENERIC: 1.0: enabled 1
1784 12:44:59.127105 USB0 port 0: enabled 1
1785 12:44:59.130612 GENERIC: 0.0: enabled 1
1786 12:44:59.133471 USB0 port 0: enabled 1
1787 12:44:59.134081 GENERIC: 0.0: enabled 1
1788 12:44:59.136735 I2C: 00:1a: enabled 1
1789 12:44:59.140165 I2C: 00:31: enabled 1
1790 12:44:59.140744 I2C: 00:32: enabled 1
1791 12:44:59.143365 I2C: 00:10: enabled 1
1792 12:44:59.146900 I2C: 00:15: enabled 1
1793 12:44:59.147448 GENERIC: 0.0: enabled 0
1794 12:44:59.150365 GENERIC: 1.0: enabled 0
1795 12:44:59.153441 GENERIC: 0.0: enabled 1
1796 12:44:59.153974 SPI: 00: enabled 1
1797 12:44:59.156660 SPI: 00: enabled 1
1798 12:44:59.160217 PNP: 0c09.0: enabled 1
1799 12:44:59.160576 GENERIC: 0.0: enabled 1
1800 12:44:59.163543 USB3 port 0: enabled 1
1801 12:44:59.166532 USB3 port 1: enabled 1
1802 12:44:59.169702 USB3 port 2: enabled 0
1803 12:44:59.169945 USB3 port 3: enabled 0
1804 12:44:59.173301 USB2 port 0: enabled 0
1805 12:44:59.176613 USB2 port 1: enabled 1
1806 12:44:59.176854 USB2 port 2: enabled 1
1807 12:44:59.180593 USB2 port 3: enabled 0
1808 12:44:59.183223 USB2 port 4: enabled 1
1809 12:44:59.186401 USB2 port 5: enabled 0
1810 12:44:59.186641 USB2 port 6: enabled 0
1811 12:44:59.189648 USB2 port 7: enabled 0
1812 12:44:59.193350 USB2 port 8: enabled 0
1813 12:44:59.193591 USB2 port 9: enabled 0
1814 12:44:59.196465 USB3 port 0: enabled 0
1815 12:44:59.199483 USB3 port 1: enabled 1
1816 12:44:59.199725 USB3 port 2: enabled 0
1817 12:44:59.202974 USB3 port 3: enabled 0
1818 12:44:59.206311 GENERIC: 0.0: enabled 1
1819 12:44:59.209913 GENERIC: 1.0: enabled 1
1820 12:44:59.210338 APIC: 01: enabled 1
1821 12:44:59.213307 APIC: 03: enabled 1
1822 12:44:59.216241 APIC: 07: enabled 1
1823 12:44:59.216762 APIC: 05: enabled 1
1824 12:44:59.219730 APIC: 04: enabled 1
1825 12:44:59.220178 APIC: 02: enabled 1
1826 12:44:59.223207 APIC: 06: enabled 1
1827 12:44:59.226511 PCI: 01:00.0: enabled 1
1828 12:44:59.229984 BS: BS_DEV_INIT run times (exec / console): 30 / 536 ms
1829 12:44:59.236239 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1830 12:44:59.239543 ELOG: NV offset 0xf30000 size 0x1000
1831 12:44:59.246196 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1832 12:44:59.252849 ELOG: Event(17) added with size 13 at 2023-03-22 12:44:59 UTC
1833 12:44:59.259728 ELOG: Event(92) added with size 9 at 2023-03-22 12:44:59 UTC
1834 12:44:59.266585 ELOG: Event(93) added with size 9 at 2023-03-22 12:44:59 UTC
1835 12:44:59.273161 ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:59 UTC
1836 12:44:59.279321 ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:59 UTC
1837 12:44:59.286424 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1838 12:44:59.289303 ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:59 UTC
1839 12:44:59.299576 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1840 12:44:59.305932 ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:59 UTC
1841 12:44:59.309709 elog_add_boot_reason: Logged dev mode boot
1842 12:44:59.316101 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1843 12:44:59.316719 Finalize devices...
1844 12:44:59.319527 Devices finalized
1845 12:44:59.325820 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1846 12:44:59.329314 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1847 12:44:59.335979 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1848 12:44:59.339298 ME: HFSTS1 : 0x80030055
1849 12:44:59.345708 ME: HFSTS2 : 0x30280116
1850 12:44:59.349532 ME: HFSTS3 : 0x00000050
1851 12:44:59.352617 ME: HFSTS4 : 0x00004000
1852 12:44:59.358892 ME: HFSTS5 : 0x00000000
1853 12:44:59.362367 ME: HFSTS6 : 0x00400006
1854 12:44:59.365628 ME: Manufacturing Mode : YES
1855 12:44:59.369215 ME: SPI Protection Mode Enabled : NO
1856 12:44:59.372778 ME: FW Partition Table : OK
1857 12:44:59.379524 ME: Bringup Loader Failure : NO
1858 12:44:59.382380 ME: Firmware Init Complete : NO
1859 12:44:59.385590 ME: Boot Options Present : NO
1860 12:44:59.389233 ME: Update In Progress : NO
1861 12:44:59.392366 ME: D0i3 Support : YES
1862 12:44:59.395903 ME: Low Power State Enabled : NO
1863 12:44:59.398994 ME: CPU Replaced : YES
1864 12:44:59.402312 ME: CPU Replacement Valid : YES
1865 12:44:59.408783 ME: Current Working State : 5
1866 12:44:59.412782 ME: Current Operation State : 1
1867 12:44:59.415595 ME: Current Operation Mode : 3
1868 12:44:59.418601 ME: Error Code : 0
1869 12:44:59.422209 ME: Enhanced Debug Mode : NO
1870 12:44:59.425319 ME: CPU Debug Disabled : YES
1871 12:44:59.428983 ME: TXT Support : NO
1872 12:44:59.435159 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1873 12:44:59.441930 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1874 12:44:59.445537 CBFS: 'fallback/slic' not found.
1875 12:44:59.451805 ACPI: Writing ACPI tables at 76b01000.
1876 12:44:59.452261 ACPI: * FACS
1877 12:44:59.455233 ACPI: * DSDT
1878 12:44:59.458471 Ramoops buffer: 0x100000@0x76a00000.
1879 12:44:59.462224 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1880 12:44:59.468443 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1881 12:44:59.471887 Google Chrome EC: version:
1882 12:44:59.475044 ro: voema_v2.0.10114-a447f03e46
1883 12:44:59.478587 rw: voema_v2.0.10114-a447f03e46
1884 12:44:59.481807 running image: 1
1885 12:44:59.484889 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1886 12:44:59.490299 ACPI: * FADT
1887 12:44:59.490755 SCI is IRQ9
1888 12:44:59.496996 ACPI: added table 1/32, length now 40
1889 12:44:59.497466 ACPI: * SSDT
1890 12:44:59.500451 Found 1 CPU(s) with 8 core(s) each.
1891 12:44:59.507303 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1892 12:44:59.510602 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1893 12:44:59.514067 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1894 12:44:59.516550 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1895 12:44:59.523248 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1896 12:44:59.530058 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1897 12:44:59.533508 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1898 12:44:59.540268 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1899 12:44:59.546946 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1900 12:44:59.550118 \_SB.PCI0.RP09: Added StorageD3Enable property
1901 12:44:59.556426 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1902 12:44:59.559638 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1903 12:44:59.566608 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1904 12:44:59.569912 PS2K: Passing 80 keymaps to kernel
1905 12:44:59.577440 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1906 12:44:59.582758 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1907 12:44:59.589922 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1908 12:44:59.596032 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1909 12:44:59.602837 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1910 12:44:59.609369 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1911 12:44:59.616122 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1912 12:44:59.622855 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1913 12:44:59.626148 ACPI: added table 2/32, length now 44
1914 12:44:59.629177 ACPI: * MCFG
1915 12:44:59.632361 ACPI: added table 3/32, length now 48
1916 12:44:59.632861 ACPI: * TPM2
1917 12:44:59.636151 TPM2 log created at 0x769f0000
1918 12:44:59.639385 ACPI: added table 4/32, length now 52
1919 12:44:59.642825 ACPI: * MADT
1920 12:44:59.643299 SCI is IRQ9
1921 12:44:59.645729 ACPI: added table 5/32, length now 56
1922 12:44:59.649426 current = 76b09850
1923 12:44:59.649848 ACPI: * DMAR
1924 12:44:59.655980 ACPI: added table 6/32, length now 60
1925 12:44:59.659063 ACPI: added table 7/32, length now 64
1926 12:44:59.659477 ACPI: * HPET
1927 12:44:59.662436 ACPI: added table 8/32, length now 68
1928 12:44:59.665641 ACPI: done.
1929 12:44:59.669329 ACPI tables: 35216 bytes.
1930 12:44:59.669794 smbios_write_tables: 769ef000
1931 12:44:59.672629 EC returned error result code 3
1932 12:44:59.676028 Couldn't obtain OEM name from CBI
1933 12:44:59.681315 Create SMBIOS type 16
1934 12:44:59.684624 Create SMBIOS type 17
1935 12:44:59.687534 GENERIC: 0.0 (WIFI Device)
1936 12:44:59.688016 SMBIOS tables: 1750 bytes.
1937 12:44:59.694393 Writing table forward entry at 0x00000500
1938 12:44:59.700771 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1939 12:44:59.704100 Writing coreboot table at 0x76b25000
1940 12:44:59.710744 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1941 12:44:59.714219 1. 0000000000001000-000000000009ffff: RAM
1942 12:44:59.717457 2. 00000000000a0000-00000000000fffff: RESERVED
1943 12:44:59.723934 3. 0000000000100000-00000000769eefff: RAM
1944 12:44:59.727136 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1945 12:44:59.734230 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1946 12:44:59.740648 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1947 12:44:59.743707 7. 0000000077000000-000000007fbfffff: RESERVED
1948 12:44:59.746988 8. 00000000c0000000-00000000cfffffff: RESERVED
1949 12:44:59.753903 9. 00000000f8000000-00000000f9ffffff: RESERVED
1950 12:44:59.756978 10. 00000000fb000000-00000000fb000fff: RESERVED
1951 12:44:59.763596 11. 00000000fe000000-00000000fe00ffff: RESERVED
1952 12:44:59.766845 12. 00000000fed80000-00000000fed87fff: RESERVED
1953 12:44:59.773430 13. 00000000fed90000-00000000fed92fff: RESERVED
1954 12:44:59.776937 14. 00000000feda0000-00000000feda1fff: RESERVED
1955 12:44:59.783450 15. 00000000fedc0000-00000000feddffff: RESERVED
1956 12:44:59.786714 16. 0000000100000000-00000002803fffff: RAM
1957 12:44:59.790071 Passing 4 GPIOs to payload:
1958 12:44:59.793557 NAME | PORT | POLARITY | VALUE
1959 12:44:59.800481 lid | undefined | high | high
1960 12:44:59.804007 power | undefined | high | low
1961 12:44:59.810066 oprom | undefined | high | low
1962 12:44:59.816965 EC in RW | 0x000000e5 | high | low
1963 12:44:59.823387 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8928
1964 12:44:59.823847 coreboot table: 1576 bytes.
1965 12:44:59.830295 IMD ROOT 0. 0x76fff000 0x00001000
1966 12:44:59.834599 IMD SMALL 1. 0x76ffe000 0x00001000
1967 12:44:59.836732 FSP MEMORY 2. 0x76c4e000 0x003b0000
1968 12:44:59.840376 VPD 3. 0x76c4d000 0x00000367
1969 12:44:59.843443 RO MCACHE 4. 0x76c4c000 0x00000fdc
1970 12:44:59.847044 CONSOLE 5. 0x76c2c000 0x00020000
1971 12:44:59.850353 FMAP 6. 0x76c2b000 0x00000578
1972 12:44:59.853279 TIME STAMP 7. 0x76c2a000 0x00000910
1973 12:44:59.860050 VBOOT WORK 8. 0x76c16000 0x00014000
1974 12:44:59.863440 ROMSTG STCK 9. 0x76c15000 0x00001000
1975 12:44:59.866780 AFTER CAR 10. 0x76c0a000 0x0000b000
1976 12:44:59.870030 RAMSTAGE 11. 0x76b97000 0x00073000
1977 12:44:59.873585 REFCODE 12. 0x76b42000 0x00055000
1978 12:44:59.877217 SMM BACKUP 13. 0x76b32000 0x00010000
1979 12:44:59.879848 4f444749 14. 0x76b30000 0x00002000
1980 12:44:59.883635 EXT VBT15. 0x76b2d000 0x0000219f
1981 12:44:59.886807 COREBOOT 16. 0x76b25000 0x00008000
1982 12:44:59.893257 ACPI 17. 0x76b01000 0x00024000
1983 12:44:59.896762 ACPI GNVS 18. 0x76b00000 0x00001000
1984 12:44:59.899679 RAMOOPS 19. 0x76a00000 0x00100000
1985 12:44:59.902958 TPM2 TCGLOG20. 0x769f0000 0x00010000
1986 12:44:59.906456 SMBIOS 21. 0x769ef000 0x00000800
1987 12:44:59.909865 IMD small region:
1988 12:44:59.913109 IMD ROOT 0. 0x76ffec00 0x00000400
1989 12:44:59.916228 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1990 12:44:59.919643 POWER STATE 2. 0x76ffeb80 0x00000044
1991 12:44:59.923594 ROMSTAGE 3. 0x76ffeb60 0x00000004
1992 12:44:59.926813 MEM INFO 4. 0x76ffe980 0x000001e0
1993 12:44:59.933497 BS: BS_WRITE_TABLES run times (exec / console): 9 / 484 ms
1994 12:44:59.936630 MTRR: Physical address space:
1995 12:44:59.943163 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1996 12:44:59.949700 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1997 12:44:59.956281 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1998 12:44:59.962882 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1999 12:44:59.969435 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2000 12:44:59.972788 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2001 12:44:59.979562 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2002 12:44:59.986127 MTRR: Fixed MSR 0x250 0x0606060606060606
2003 12:44:59.989358 MTRR: Fixed MSR 0x258 0x0606060606060606
2004 12:44:59.993020 MTRR: Fixed MSR 0x259 0x0000000000000000
2005 12:44:59.995941 MTRR: Fixed MSR 0x268 0x0606060606060606
2006 12:45:00.002605 MTRR: Fixed MSR 0x269 0x0606060606060606
2007 12:45:00.005911 MTRR: Fixed MSR 0x26a 0x0606060606060606
2008 12:45:00.009506 MTRR: Fixed MSR 0x26b 0x0606060606060606
2009 12:45:00.012434 MTRR: Fixed MSR 0x26c 0x0606060606060606
2010 12:45:00.019014 MTRR: Fixed MSR 0x26d 0x0606060606060606
2011 12:45:00.022589 MTRR: Fixed MSR 0x26e 0x0606060606060606
2012 12:45:00.025716 MTRR: Fixed MSR 0x26f 0x0606060606060606
2013 12:45:00.029529 call enable_fixed_mtrr()
2014 12:45:00.032499 CPU physical address size: 39 bits
2015 12:45:00.039078 MTRR: default type WB/UC MTRR counts: 6/6.
2016 12:45:00.042564 MTRR: UC selected as default type.
2017 12:45:00.045568 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2018 12:45:00.052406 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2019 12:45:00.059046 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2020 12:45:00.065454 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2021 12:45:00.072037 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2022 12:45:00.078746 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2023 12:45:00.079244
2024 12:45:00.082120 MTRR check
2025 12:45:00.082595 Fixed MTRRs : Enabled
2026 12:45:00.085562 Variable MTRRs: Enabled
2027 12:45:00.086030
2028 12:45:00.088613 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 12:45:00.095688 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 12:45:00.098544 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 12:45:00.101998 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 12:45:00.105135 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 12:45:00.112084 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 12:45:00.115129 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 12:45:00.118515 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 12:45:00.121739 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 12:45:00.128820 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 12:45:00.131726 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 12:45:00.138094 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2040 12:45:00.141924 call enable_fixed_mtrr()
2041 12:45:00.145069 Checking cr50 for pending updates
2042 12:45:00.148574 CPU physical address size: 39 bits
2043 12:45:00.152049 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 12:45:00.155322 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 12:45:00.158387 MTRR: Fixed MSR 0x258 0x0606060606060606
2046 12:45:00.165845 MTRR: Fixed MSR 0x259 0x0000000000000000
2047 12:45:00.168271 MTRR: Fixed MSR 0x268 0x0606060606060606
2048 12:45:00.171846 MTRR: Fixed MSR 0x269 0x0606060606060606
2049 12:45:00.174897 MTRR: Fixed MSR 0x26a 0x0606060606060606
2050 12:45:00.181695 MTRR: Fixed MSR 0x26b 0x0606060606060606
2051 12:45:00.185185 MTRR: Fixed MSR 0x26c 0x0606060606060606
2052 12:45:00.188225 MTRR: Fixed MSR 0x26d 0x0606060606060606
2053 12:45:00.191579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2054 12:45:00.198289 MTRR: Fixed MSR 0x26f 0x0606060606060606
2055 12:45:00.201785 MTRR: Fixed MSR 0x258 0x0606060606060606
2056 12:45:00.204875 call enable_fixed_mtrr()
2057 12:45:00.208185 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 12:45:00.211376 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 12:45:00.218451 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 12:45:00.221608 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 12:45:00.225160 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 12:45:00.228003 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 12:45:00.234690 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 12:45:00.237928 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 12:45:00.241692 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 12:45:00.244557 CPU physical address size: 39 bits
2067 12:45:00.249233 call enable_fixed_mtrr()
2068 12:45:00.252474 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 12:45:00.259189 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 12:45:00.262350 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 12:45:00.265731 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 12:45:00.269085 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 12:45:00.275470 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 12:45:00.278966 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 12:45:00.282666 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 12:45:00.285883 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 12:45:00.292059 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 12:45:00.295760 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 12:45:00.298625 MTRR: Fixed MSR 0x26f 0x0606060606060606
2080 12:45:00.305711 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 12:45:00.306169 call enable_fixed_mtrr()
2082 12:45:00.312388 MTRR: Fixed MSR 0x259 0x0000000000000000
2083 12:45:00.315222 MTRR: Fixed MSR 0x268 0x0606060606060606
2084 12:45:00.318917 MTRR: Fixed MSR 0x269 0x0606060606060606
2085 12:45:00.322350 MTRR: Fixed MSR 0x26a 0x0606060606060606
2086 12:45:00.328514 MTRR: Fixed MSR 0x26b 0x0606060606060606
2087 12:45:00.331889 MTRR: Fixed MSR 0x26c 0x0606060606060606
2088 12:45:00.335265 MTRR: Fixed MSR 0x26d 0x0606060606060606
2089 12:45:00.338536 MTRR: Fixed MSR 0x26e 0x0606060606060606
2090 12:45:00.341848 MTRR: Fixed MSR 0x26f 0x0606060606060606
2091 12:45:00.348922 CPU physical address size: 39 bits
2092 12:45:00.352393 call enable_fixed_mtrr()
2093 12:45:00.356227 Reading cr50 TPM mode
2094 12:45:00.356769 MTRR: Fixed MSR 0x250 0x0606060606060606
2095 12:45:00.363048 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 12:45:00.366275 MTRR: Fixed MSR 0x258 0x0606060606060606
2097 12:45:00.369732 MTRR: Fixed MSR 0x259 0x0000000000000000
2098 12:45:00.373246 MTRR: Fixed MSR 0x268 0x0606060606060606
2099 12:45:00.380058 MTRR: Fixed MSR 0x269 0x0606060606060606
2100 12:45:00.382785 MTRR: Fixed MSR 0x26a 0x0606060606060606
2101 12:45:00.386412 MTRR: Fixed MSR 0x26b 0x0606060606060606
2102 12:45:00.389788 MTRR: Fixed MSR 0x26c 0x0606060606060606
2103 12:45:00.396907 MTRR: Fixed MSR 0x26d 0x0606060606060606
2104 12:45:00.400183 MTRR: Fixed MSR 0x26e 0x0606060606060606
2105 12:45:00.403068 MTRR: Fixed MSR 0x26f 0x0606060606060606
2106 12:45:00.409549 MTRR: Fixed MSR 0x258 0x0606060606060606
2107 12:45:00.410021 call enable_fixed_mtrr()
2108 12:45:00.416297 MTRR: Fixed MSR 0x259 0x0000000000000000
2109 12:45:00.419542 MTRR: Fixed MSR 0x268 0x0606060606060606
2110 12:45:00.422896 MTRR: Fixed MSR 0x269 0x0606060606060606
2111 12:45:00.426076 MTRR: Fixed MSR 0x26a 0x0606060606060606
2112 12:45:00.433154 MTRR: Fixed MSR 0x26b 0x0606060606060606
2113 12:45:00.436598 MTRR: Fixed MSR 0x26c 0x0606060606060606
2114 12:45:00.439284 MTRR: Fixed MSR 0x26d 0x0606060606060606
2115 12:45:00.442973 MTRR: Fixed MSR 0x26e 0x0606060606060606
2116 12:45:00.445945 MTRR: Fixed MSR 0x26f 0x0606060606060606
2117 12:45:00.452464 CPU physical address size: 39 bits
2118 12:45:00.455799 call enable_fixed_mtrr()
2119 12:45:00.459514 CPU physical address size: 39 bits
2120 12:45:00.462896 CPU physical address size: 39 bits
2121 12:45:00.469331 BS: BS_PAYLOAD_LOAD entry times (exec / console): 214 / 6 ms
2122 12:45:00.472738 CPU physical address size: 39 bits
2123 12:45:00.478957 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2124 12:45:00.485921 Checking segment from ROM address 0xffc02b38
2125 12:45:00.489771 Checking segment from ROM address 0xffc02b54
2126 12:45:00.492116 Loading segment from ROM address 0xffc02b38
2127 12:45:00.495830 code (compression=0)
2128 12:45:00.505438 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2129 12:45:00.512151 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2130 12:45:00.515541 it's not compressed!
2131 12:45:00.654170 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2132 12:45:00.660520 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2133 12:45:00.667075 Loading segment from ROM address 0xffc02b54
2134 12:45:00.667620 Entry Point 0x30000000
2135 12:45:00.671029 Loaded segments
2136 12:45:00.676954 BS: BS_PAYLOAD_LOAD run times (exec / console): 139 / 63 ms
2137 12:45:00.720046 Finalizing chipset.
2138 12:45:00.723022 Finalizing SMM.
2139 12:45:00.723525 APMC done.
2140 12:45:00.729721 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2141 12:45:00.733065 mp_park_aps done after 0 msecs.
2142 12:45:00.737062 Jumping to boot code at 0x30000000(0x76b25000)
2143 12:45:00.747221 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2144 12:45:00.747763
2145 12:45:00.748174
2146 12:45:00.749667
2147 12:45:00.750171 Starting depthcharge on Voema...
2148 12:45:00.751384 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2149 12:45:00.751990 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2150 12:45:00.752557 Setting prompt string to ['volteer:']
2151 12:45:00.753042 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2152 12:45:00.753880
2153 12:45:00.759602 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2154 12:45:00.760147
2155 12:45:00.766162 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2156 12:45:00.766701
2157 12:45:00.772915 Looking for NVMe Controller 0x3005f238 @ 00:1d:00
2158 12:45:00.773484
2159 12:45:00.776068 Failed to find eMMC card reader
2160 12:45:00.776687
2161 12:45:00.777098 Wipe memory regions:
2162 12:45:00.779742
2163 12:45:00.782785 [0x00000000001000, 0x000000000a0000)
2164 12:45:00.783309
2165 12:45:00.785845 [0x00000000100000, 0x00000030000000)
2166 12:45:00.811806
2167 12:45:00.815233 [0x00000032662db0, 0x000000769ef000)
2168 12:45:00.850705
2169 12:45:00.854141 [0x00000100000000, 0x00000280400000)
2170 12:45:01.055246
2171 12:45:01.058219 ec_init: CrosEC protocol v3 supported (256, 256)
2172 12:45:01.489742
2173 12:45:01.490325 R8152: Initializing
2174 12:45:01.490763
2175 12:45:01.493789 Version 6 (ocp_data = 5c30)
2176 12:45:01.494291
2177 12:45:01.496292 R8152: Done initializing
2178 12:45:01.496827
2179 12:45:01.499651 Adding net device
2180 12:45:01.801128
2181 12:45:01.804776 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2182 12:45:01.805223
2183 12:45:01.805571
2184 12:45:01.805905
2185 12:45:01.808129 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2187 12:45:01.909903 volteer: tftpboot 192.168.201.1 9729695/tftp-deploy-4yp8zeme/kernel/bzImage 9729695/tftp-deploy-4yp8zeme/kernel/cmdline 9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
2188 12:45:01.910494 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2189 12:45:01.910906 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2190 12:45:01.915432 tftpboot 192.168.201.1 9729695/tftp-deploy-4yp8zeme/kernel/bzImoy-4yp8zeme/kernel/cmdline 9729695/tftp-deploy-4yp8zeme/ramdisk/ramdisk.cpio.gz
2191 12:45:01.915988
2192 12:45:01.916381 Waiting for link
2193 12:45:02.119159
2194 12:45:02.119712 done.
2195 12:45:02.120106
2196 12:45:02.120529 MAC: 00:24:32:30:77:76
2197 12:45:02.120896
2198 12:45:02.122260 Sending DHCP discover... done.
2199 12:45:02.122888
2200 12:45:02.126127 Waiting for reply... done.
2201 12:45:02.126701
2202 12:45:02.129109 Sending DHCP request... done.
2203 12:45:02.129658
2204 12:45:02.135803 Waiting for reply... done.
2205 12:45:02.136385
2206 12:45:02.136794 My ip is 192.168.201.16
2207 12:45:02.137157
2208 12:45:02.139317 The DHCP server ip is 192.168.201.1
2209 12:45:02.139824
2210 12:45:02.145586 TFTP server IP predefined by user: 192.168.201.1
2211 12:45:02.146049
2212 12:45:02.152140 Bootfile predefined by user: 9729695/tftp-deploy-4yp8zeme/kernel/bzImage
2213 12:45:02.152687
2214 12:45:02.155537 Sending tftp read request... done.
2215 12:45:02.156076
2216 12:45:02.161901 Waiting for the transfer...
2217 12:45:02.162349
2218 12:45:02.848410 00000000 ################################################################
2219 12:45:02.848983
2220 12:45:03.542741 00080000 ################################################################
2221 12:45:03.543319
2222 12:45:04.238686 00100000 ################################################################
2223 12:45:04.239254
2224 12:45:04.902178 00180000 ################################################################
2225 12:45:04.902770
2226 12:45:05.508629 00200000 ################################################################
2227 12:45:05.508792
2228 12:45:06.130549 00280000 ################################################################
2229 12:45:06.130703
2230 12:45:06.747773 00300000 ################################################################
2231 12:45:06.747928
2232 12:45:07.359453 00380000 ################################################################
2233 12:45:07.359606
2234 12:45:07.975823 00400000 ################################################################
2235 12:45:07.975977
2236 12:45:08.611788 00480000 ################################################################
2237 12:45:08.611956
2238 12:45:09.226464 00500000 ################################################################
2239 12:45:09.226619
2240 12:45:09.848098 00580000 ################################################################
2241 12:45:09.848253
2242 12:45:10.451511 00600000 ################################################################
2243 12:45:10.451662
2244 12:45:11.079571 00680000 ################################################################
2245 12:45:11.079725
2246 12:45:11.713281 00700000 ################################################################
2247 12:45:11.713434
2248 12:45:12.312145 00780000 ################################################################
2249 12:45:12.312300
2250 12:45:12.950292 00800000 ################################################################
2251 12:45:12.950448
2252 12:45:13.575226 00880000 ################################################################
2253 12:45:13.575381
2254 12:45:14.211712 00900000 ################################################################
2255 12:45:14.211868
2256 12:45:14.828481 00980000 ################################################################
2257 12:45:14.828635
2258 12:45:15.429796 00a00000 ################################################################
2259 12:45:15.429956
2260 12:45:16.060463 00a80000 ################################################################
2261 12:45:16.060615
2262 12:45:16.193260 00b00000 ############## done.
2263 12:45:16.193408
2264 12:45:16.196613 The bootfile was 11646080 bytes long.
2265 12:45:16.196702
2266 12:45:16.200284 Sending tftp read request... done.
2267 12:45:16.200393
2268 12:45:16.203305 Waiting for the transfer...
2269 12:45:16.203393
2270 12:45:16.804453 00000000 ################################################################
2271 12:45:16.804610
2272 12:45:17.406078 00080000 ################################################################
2273 12:45:17.406245
2274 12:45:18.012301 00100000 ################################################################
2275 12:45:18.012473
2276 12:45:18.615718 00180000 ################################################################
2277 12:45:18.615871
2278 12:45:19.174087 00200000 ################################################################
2279 12:45:19.174240
2280 12:45:19.732229 00280000 ################################################################
2281 12:45:19.732420
2282 12:45:20.305594 00300000 ################################################################
2283 12:45:20.305777
2284 12:45:20.867248 00380000 ################################################################
2285 12:45:20.867405
2286 12:45:21.428265 00400000 ################################################################
2287 12:45:21.428424
2288 12:45:21.997534 00480000 ################################################################
2289 12:45:21.997691
2290 12:45:22.566852 00500000 ################################################################
2291 12:45:22.567007
2292 12:45:23.134174 00580000 ################################################################
2293 12:45:23.134329
2294 12:45:23.740954 00600000 ################################################################
2295 12:45:23.741107
2296 12:45:23.801844 00680000 ####### done.
2297 12:45:23.801959
2298 12:45:23.805491 Sending tftp read request... done.
2299 12:45:23.805587
2300 12:45:23.809152 Waiting for the transfer...
2301 12:45:23.809247
2302 12:45:23.809322 00000000 # done.
2303 12:45:23.809394
2304 12:45:23.818731 Command line loaded dynamically from TFTP file: 9729695/tftp-deploy-4yp8zeme/kernel/cmdline
2305 12:45:23.818844
2306 12:45:23.842078 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729695/extract-nfsrootfs-1nctcq47,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2307 12:45:23.845414
2308 12:45:23.848757 Shutting down all USB controllers.
2309 12:45:23.848974
2310 12:45:23.849146 Removing current net device
2311 12:45:23.849306
2312 12:45:23.852141 Finalizing coreboot
2313 12:45:23.852419
2314 12:45:23.858895 Exiting depthcharge with code 4 at timestamp: 31759687
2315 12:45:23.859221
2316 12:45:23.859474
2317 12:45:23.859711 Starting kernel ...
2318 12:45:23.859939
2319 12:45:23.860160
2320 12:45:23.861348 end: 2.2.4 bootloader-commands (duration 00:00:23) [common]
2321 12:45:23.861833 start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
2322 12:45:23.862193 Setting prompt string to ['Linux version [0-9]']
2323 12:45:23.862527 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2324 12:45:23.862862 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2326 12:49:44.862773 end: 2.2.5 auto-login-action (duration 00:04:21) [common]
2328 12:49:44.863993 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
2330 12:49:44.865038 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2333 12:49:44.866766 end: 2 depthcharge-action (duration 00:05:00) [common]
2335 12:49:44.868052 Cleaning after the job
2336 12:49:44.868554 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/ramdisk
2337 12:49:44.871222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/kernel
2338 12:49:44.875407 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/nfsrootfs
2339 12:49:44.938175 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729695/tftp-deploy-4yp8zeme/modules
2340 12:49:44.938654 start: 4.1 power-off (timeout 00:00:30) [common]
2341 12:49:44.938818 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-9' '--port=1' '--command=off'
2342 12:49:45.007599 >> Command sent successfully.
2343 12:49:45.010644 Returned 0 in 0 seconds
2344 12:49:45.112053 end: 4.1 power-off (duration 00:00:00) [common]
2346 12:49:45.113864 start: 4.2 read-feedback (timeout 00:10:00) [common]
2347 12:49:45.115110 Listened to connection for namespace 'common' for up to 1s
2348 12:49:46.119919 Finalising connection for namespace 'common'
2349 12:49:46.120700 Disconnecting from shell: Finalise
2350 12:49:46.121236
2351 12:49:46.222789 end: 4.2 read-feedback (duration 00:00:01) [common]
2352 12:49:46.223476 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729695
2353 12:49:46.428267 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729695
2354 12:49:46.428485 JobError: Your job cannot terminate cleanly.