Boot log: asus-C436FA-Flip-hatch

    1 12:50:09.886354  lava-dispatcher, installed at version: 2023.01
    2 12:50:09.886644  start: 0 validate
    3 12:50:09.886771  Start time: 2023-03-22 12:50:09.886764+00:00 (UTC)
    4 12:50:09.886897  Using caching service: 'http://localhost/cache/?uri=%s'
    5 12:50:09.887027  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
    6 12:50:10.178480  Using caching service: 'http://localhost/cache/?uri=%s'
    7 12:50:10.178662  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 12:50:10.467632  Using caching service: 'http://localhost/cache/?uri=%s'
    9 12:50:10.467833  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-kselftest%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 12:50:10.752206  Using caching service: 'http://localhost/cache/?uri=%s'
   11 12:50:10.752368  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 12:50:11.043228  validate duration: 1.16
   14 12:50:11.043582  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 12:50:11.043707  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 12:50:11.043811  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 12:50:11.043918  Not decompressing ramdisk as can be used compressed.
   18 12:50:11.044008  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230317.0/amd64/initrd.cpio.gz
   19 12:50:11.044079  saving as /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/ramdisk/initrd.cpio.gz
   20 12:50:11.044145  total size: 5432124 (5MB)
   21 12:50:11.044991  progress   0% (0MB)
   22 12:50:11.046470  progress   5% (0MB)
   23 12:50:11.047839  progress  10% (0MB)
   24 12:50:11.049162  progress  15% (0MB)
   25 12:50:11.050686  progress  20% (1MB)
   26 12:50:11.051986  progress  25% (1MB)
   27 12:50:11.053314  progress  30% (1MB)
   28 12:50:11.054802  progress  35% (1MB)
   29 12:50:11.056143  progress  40% (2MB)
   30 12:50:11.057461  progress  45% (2MB)
   31 12:50:11.058795  progress  50% (2MB)
   32 12:50:11.060264  progress  55% (2MB)
   33 12:50:11.061586  progress  60% (3MB)
   34 12:50:11.062956  progress  65% (3MB)
   35 12:50:11.064434  progress  70% (3MB)
   36 12:50:11.065756  progress  75% (3MB)
   37 12:50:11.067090  progress  80% (4MB)
   38 12:50:11.068459  progress  85% (4MB)
   39 12:50:11.069982  progress  90% (4MB)
   40 12:50:11.071366  progress  95% (4MB)
   41 12:50:11.072714  progress 100% (5MB)
   42 12:50:11.072921  5MB downloaded in 0.03s (180.06MB/s)
   43 12:50:11.073078  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 12:50:11.073338  end: 1.1 download-retry (duration 00:00:00) [common]
   46 12:50:11.073433  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 12:50:11.073526  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 12:50:11.073639  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 12:50:11.073712  saving as /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/kernel/bzImage
   50 12:50:11.073777  total size: 11646080 (11MB)
   51 12:50:11.073844  No compression specified
   52 12:50:11.074690  progress   0% (0MB)
   53 12:50:11.077496  progress   5% (0MB)
   54 12:50:11.080411  progress  10% (1MB)
   55 12:50:11.083329  progress  15% (1MB)
   56 12:50:11.086228  progress  20% (2MB)
   57 12:50:11.089004  progress  25% (2MB)
   58 12:50:11.091940  progress  30% (3MB)
   59 12:50:11.094861  progress  35% (3MB)
   60 12:50:11.097788  progress  40% (4MB)
   61 12:50:11.100552  progress  45% (5MB)
   62 12:50:11.103465  progress  50% (5MB)
   63 12:50:11.106371  progress  55% (6MB)
   64 12:50:11.109271  progress  60% (6MB)
   65 12:50:11.112135  progress  65% (7MB)
   66 12:50:11.114833  progress  70% (7MB)
   67 12:50:11.117699  progress  75% (8MB)
   68 12:50:11.120570  progress  80% (8MB)
   69 12:50:11.123425  progress  85% (9MB)
   70 12:50:11.126114  progress  90% (10MB)
   71 12:50:11.128983  progress  95% (10MB)
   72 12:50:11.131861  progress 100% (11MB)
   73 12:50:11.132022  11MB downloaded in 0.06s (190.70MB/s)
   74 12:50:11.132176  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 12:50:11.132423  end: 1.2 download-retry (duration 00:00:00) [common]
   77 12:50:11.132516  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 12:50:11.132607  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 12:50:11.132720  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-kselftest/20230317.0/amd64/full.rootfs.tar.xz
   80 12:50:11.132798  saving as /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/nfsrootfs/full.rootfs.tar
   81 12:50:11.132864  total size: 207197968 (197MB)
   82 12:50:11.132927  Using unxz to decompress xz
   83 12:50:11.135924  progress   0% (0MB)
   84 12:50:11.718093  progress   5% (9MB)
   85 12:50:12.263651  progress  10% (19MB)
   86 12:50:12.869743  progress  15% (29MB)
   87 12:50:13.242295  progress  20% (39MB)
   88 12:50:13.605866  progress  25% (49MB)
   89 12:50:14.204231  progress  30% (59MB)
   90 12:50:14.769473  progress  35% (69MB)
   91 12:50:15.364911  progress  40% (79MB)
   92 12:50:15.918318  progress  45% (88MB)
   93 12:50:16.505021  progress  50% (98MB)
   94 12:50:17.132581  progress  55% (108MB)
   95 12:50:17.815607  progress  60% (118MB)
   96 12:50:17.956586  progress  65% (128MB)
   97 12:50:18.097511  progress  70% (138MB)
   98 12:50:18.187485  progress  75% (148MB)
   99 12:50:18.260202  progress  80% (158MB)
  100 12:50:18.327478  progress  85% (167MB)
  101 12:50:18.438343  progress  90% (177MB)
  102 12:50:18.699414  progress  95% (187MB)
  103 12:50:19.283166  progress 100% (197MB)
  104 12:50:19.288161  197MB downloaded in 8.16s (24.23MB/s)
  105 12:50:19.288439  end: 1.3.1 http-download (duration 00:00:08) [common]
  107 12:50:19.288709  end: 1.3 download-retry (duration 00:00:08) [common]
  108 12:50:19.288805  start: 1.4 download-retry (timeout 00:09:52) [common]
  109 12:50:19.288898  start: 1.4.1 http-download (timeout 00:09:52) [common]
  110 12:50:19.289016  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 12:50:19.289087  saving as /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/modules/modules.tar
  112 12:50:19.289151  total size: 497788 (0MB)
  113 12:50:19.289216  Using unxz to decompress xz
  114 12:50:19.292083  progress   6% (0MB)
  115 12:50:19.292443  progress  13% (0MB)
  116 12:50:19.292676  progress  19% (0MB)
  117 12:50:19.293943  progress  26% (0MB)
  118 12:50:19.295961  progress  32% (0MB)
  119 12:50:19.298120  progress  39% (0MB)
  120 12:50:19.299975  progress  46% (0MB)
  121 12:50:19.301844  progress  52% (0MB)
  122 12:50:19.304114  progress  59% (0MB)
  123 12:50:19.306002  progress  65% (0MB)
  124 12:50:19.308073  progress  72% (0MB)
  125 12:50:19.309934  progress  78% (0MB)
  126 12:50:19.311857  progress  85% (0MB)
  127 12:50:19.313797  progress  92% (0MB)
  128 12:50:19.315701  progress  98% (0MB)
  129 12:50:19.322591  0MB downloaded in 0.03s (14.20MB/s)
  130 12:50:19.322854  end: 1.4.1 http-download (duration 00:00:00) [common]
  132 12:50:19.323120  end: 1.4 download-retry (duration 00:00:00) [common]
  133 12:50:19.323217  start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
  134 12:50:19.323318  start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
  135 12:50:21.310235  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729671/extract-nfsrootfs-0j32cf6f
  136 12:50:21.310460  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  137 12:50:21.310601  start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
  138 12:50:21.310740  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo
  139 12:50:21.310845  makedir: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin
  140 12:50:21.310932  makedir: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/tests
  141 12:50:21.311034  makedir: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/results
  142 12:50:21.311136  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-add-keys
  143 12:50:21.311275  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-add-sources
  144 12:50:21.311397  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-background-process-start
  145 12:50:21.311512  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-background-process-stop
  146 12:50:21.311624  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-common-functions
  147 12:50:21.311733  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-echo-ipv4
  148 12:50:21.311842  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-install-packages
  149 12:50:21.311950  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-installed-packages
  150 12:50:21.312056  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-os-build
  151 12:50:21.312164  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-probe-channel
  152 12:50:21.312290  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-probe-ip
  153 12:50:21.312398  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-target-ip
  154 12:50:21.312506  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-target-mac
  155 12:50:21.312643  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-target-storage
  156 12:50:21.312753  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-case
  157 12:50:21.312860  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-event
  158 12:50:21.312967  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-feedback
  159 12:50:21.313078  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-raise
  160 12:50:21.313202  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-reference
  161 12:50:21.313320  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-runner
  162 12:50:21.313439  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-set
  163 12:50:21.313556  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-test-shell
  164 12:50:21.313679  Updating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-add-keys (debian)
  165 12:50:21.313803  Updating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-add-sources (debian)
  166 12:50:21.313923  Updating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-install-packages (debian)
  167 12:50:21.314042  Updating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-installed-packages (debian)
  168 12:50:21.314161  Updating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/bin/lava-os-build (debian)
  169 12:50:21.314266  Creating /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/environment
  170 12:50:21.314358  LAVA metadata
  171 12:50:21.314434  - LAVA_JOB_ID=9729671
  172 12:50:21.314605  - LAVA_DISPATCHER_IP=192.168.201.1
  173 12:50:21.314708  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
  174 12:50:21.314780  skipped lava-vland-overlay
  175 12:50:21.314858  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  176 12:50:21.314941  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
  177 12:50:21.315005  skipped lava-multinode-overlay
  178 12:50:21.315079  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  179 12:50:21.315160  start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
  180 12:50:21.315232  Loading test definitions
  181 12:50:21.315321  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
  182 12:50:21.315391  Using /lava-9729671 at stage 0
  183 12:50:21.315619  uuid=9729671_1.5.2.3.1 testdef=None
  184 12:50:21.315707  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  185 12:50:21.315793  start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
  186 12:50:21.316193  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  188 12:50:21.316417  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
  189 12:50:21.316908  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  191 12:50:21.317185  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
  192 12:50:21.317638  runner path: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/0/tests/0_timesync-off test_uuid 9729671_1.5.2.3.1
  193 12:50:21.317780  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  195 12:50:21.318010  start: 1.5.2.3.5 git-repo-action (timeout 00:09:50) [common]
  196 12:50:21.318083  Using /lava-9729671 at stage 0
  197 12:50:21.318178  Fetching tests from https://github.com/kernelci/test-definitions.git
  198 12:50:21.318258  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/0/tests/1_kselftest-rtc'
  199 12:50:28.899169  Running '/usr/bin/git checkout kernelci.org
  200 12:50:29.034721  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  201 12:50:29.035418  uuid=9729671_1.5.2.3.5 testdef=None
  202 12:50:29.035584  end: 1.5.2.3.5 git-repo-action (duration 00:00:08) [common]
  204 12:50:29.035843  start: 1.5.2.3.6 test-overlay (timeout 00:09:42) [common]
  205 12:50:29.036561  end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
  207 12:50:29.036803  start: 1.5.2.3.7 test-install-overlay (timeout 00:09:42) [common]
  208 12:50:29.037734  end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
  210 12:50:29.037984  start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:42) [common]
  211 12:50:29.038898  runner path: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/0/tests/1_kselftest-rtc test_uuid 9729671_1.5.2.3.5
  212 12:50:29.038990  BOARD='asus-C436FA-Flip-hatch'
  213 12:50:29.039057  BRANCH='cip-gitlab'
  214 12:50:29.039120  SKIPFILE='skipfile-lkft.yaml'
  215 12:50:29.039182  SKIP_INSTALL='True'
  216 12:50:29.039240  TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kselftest.tar.xz'
  217 12:50:29.039304  TST_CASENAME=''
  218 12:50:29.039372  TST_CMDFILES='rtc'
  219 12:50:29.039513  end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  221 12:50:29.039725  Creating lava-test-runner.conf files
  222 12:50:29.039790  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729671/lava-overlay-97fru0xo/lava-9729671/0 for stage 0
  223 12:50:29.039889  - 0_timesync-off
  224 12:50:29.039963  - 1_kselftest-rtc
  225 12:50:29.040060  end: 1.5.2.3 test-definition (duration 00:00:08) [common]
  226 12:50:29.040153  start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
  227 12:50:36.561520  end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
  228 12:50:36.561683  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
  229 12:50:36.561781  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  230 12:50:36.561882  end: 1.5.2 lava-overlay (duration 00:00:15) [common]
  231 12:50:36.561981  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  232 12:50:36.667687  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  233 12:50:36.668057  start: 1.5.4 extract-modules (timeout 00:09:34) [common]
  234 12:50:36.668180  extracting modules file /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729671/extract-nfsrootfs-0j32cf6f
  235 12:50:36.681431  extracting modules file /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729671/extract-overlay-ramdisk-b1lgrtcm/ramdisk
  236 12:50:36.694037  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  237 12:50:36.694205  start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
  238 12:50:36.694303  [common] Applying overlay to NFS
  239 12:50:36.694377  [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729671/compress-overlay-0g5wy0p5/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729671/extract-nfsrootfs-0j32cf6f
  240 12:50:37.493534  end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
  241 12:50:37.493711  start: 1.5.6 configure-preseed-file (timeout 00:09:34) [common]
  242 12:50:37.493813  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  243 12:50:37.493906  start: 1.5.7 compress-ramdisk (timeout 00:09:34) [common]
  244 12:50:37.493992  Building ramdisk /var/lib/lava/dispatcher/tmp/9729671/extract-overlay-ramdisk-b1lgrtcm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729671/extract-overlay-ramdisk-b1lgrtcm/ramdisk
  245 12:50:37.535055  >> 30091 blocks

  246 12:50:38.088879  rename /var/lib/lava/dispatcher/tmp/9729671/extract-overlay-ramdisk-b1lgrtcm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz
  247 12:50:38.089294  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  248 12:50:38.089419  start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
  249 12:50:38.089524  start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
  250 12:50:38.089624  No mkimage arch provided, not using FIT.
  251 12:50:38.089715  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  252 12:50:38.089805  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  253 12:50:38.089904  end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
  254 12:50:38.089999  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
  255 12:50:38.090077  No LXC device requested
  256 12:50:38.090160  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 12:50:38.090264  start: 1.7 deploy-device-env (timeout 00:09:33) [common]
  258 12:50:38.090350  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 12:50:38.090439  Checking files for TFTP limit of 4294967296 bytes.
  260 12:50:38.090844  end: 1 tftp-deploy (duration 00:00:27) [common]
  261 12:50:38.090951  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 12:50:38.091050  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 12:50:38.091182  substitutions:
  264 12:50:38.091253  - {DTB}: None
  265 12:50:38.091317  - {INITRD}: 9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz
  266 12:50:38.091378  - {KERNEL}: 9729671/tftp-deploy-zrjhb4v8/kernel/bzImage
  267 12:50:38.091439  - {LAVA_MAC}: None
  268 12:50:38.091497  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729671/extract-nfsrootfs-0j32cf6f
  269 12:50:38.091557  - {NFS_SERVER_IP}: 192.168.201.1
  270 12:50:38.091614  - {PRESEED_CONFIG}: None
  271 12:50:38.091672  - {PRESEED_LOCAL}: None
  272 12:50:38.091727  - {RAMDISK}: 9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz
  273 12:50:38.091784  - {ROOT_PART}: None
  274 12:50:38.091840  - {ROOT}: None
  275 12:50:38.091895  - {SERVER_IP}: 192.168.201.1
  276 12:50:38.091950  - {TEE}: None
  277 12:50:38.092006  Parsed boot commands:
  278 12:50:38.092060  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  279 12:50:38.092216  Parsed boot commands: tftpboot 192.168.201.1 9729671/tftp-deploy-zrjhb4v8/kernel/bzImage 9729671/tftp-deploy-zrjhb4v8/kernel/cmdline 9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz
  280 12:50:38.092308  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  281 12:50:38.092395  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  282 12:50:38.092490  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  283 12:50:38.092577  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  284 12:50:38.092648  Not connected, no need to disconnect.
  285 12:50:38.092725  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  286 12:50:38.092811  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  287 12:50:38.092879  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-2'
  288 12:50:38.095746  Setting prompt string to ['lava-test: # ']
  289 12:50:38.096047  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  290 12:50:38.096161  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  291 12:50:38.096263  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  292 12:50:38.096358  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  293 12:50:38.096531  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=reboot'
  294 12:50:43.227566  >> Command sent successfully.

  295 12:50:43.236480  Returned 0 in 5 seconds
  296 12:50:43.337888  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  298 12:50:43.338447  end: 2.2.2 reset-device (duration 00:00:05) [common]
  299 12:50:43.338568  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  300 12:50:43.338670  Setting prompt string to 'Starting depthcharge on Helios...'
  301 12:50:43.338748  Changing prompt to 'Starting depthcharge on Helios...'
  302 12:50:43.338832  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  303 12:50:43.339122  [Enter `^Ec?' for help]

  304 12:50:43.952911  

  305 12:50:43.953091  

  306 12:50:43.962925  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  307 12:50:43.966327  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  308 12:50:43.972981  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  309 12:50:43.976313  CPU: AES supported, TXT NOT supported, VT supported

  310 12:50:43.982928  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  311 12:50:43.986366  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  312 12:50:43.992862  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  313 12:50:43.996351  VBOOT: Loading verstage.

  314 12:50:43.999314  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  315 12:50:44.005751  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  316 12:50:44.012662  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  317 12:50:44.012751  CBFS @ c08000 size 3f8000

  318 12:50:44.019075  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  319 12:50:44.022474  CBFS: Locating 'fallback/verstage'

  320 12:50:44.025509  CBFS: Found @ offset 10fb80 size 1072c

  321 12:50:44.030195  

  322 12:50:44.030284  

  323 12:50:44.039834  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  324 12:50:44.054105  Probing TPM: . done!

  325 12:50:44.057611  TPM ready after 0 ms

  326 12:50:44.061187  Connected to device vid:did:rid of 1ae0:0028:00

  327 12:50:44.070985  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  328 12:50:44.074411  Initialized TPM device CR50 revision 0

  329 12:50:44.117065  tlcl_send_startup: Startup return code is 0

  330 12:50:44.117167  TPM: setup succeeded

  331 12:50:44.129768  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  332 12:50:44.133188  Chrome EC: UHEPI supported

  333 12:50:44.136626  Phase 1

  334 12:50:44.140018  FMAP: area GBB found @ c05000 (12288 bytes)

  335 12:50:44.146653  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0

  336 12:50:44.149470  Phase 2

  337 12:50:44.149557  Phase 3

  338 12:50:44.153041  FMAP: area GBB found @ c05000 (12288 bytes)

  339 12:50:44.159415  VB2:vb2_report_dev_firmware() This is developer signed firmware

  340 12:50:44.165966  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  341 12:50:44.169484  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  342 12:50:44.175754  VB2:vb2_verify_keyblock() Checking keyblock signature...

  343 12:50:44.191969  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  344 12:50:44.195471  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)

  345 12:50:44.202123  VB2:vb2_verify_fw_preamble() Verifying preamble.

  346 12:50:44.206127  Phase 4

  347 12:50:44.209572  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)

  348 12:50:44.216412  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW

  349 12:50:44.395548  VB2:vb2_rsa_verify_digest() Digest check failed!

  350 12:50:44.402082  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7

  351 12:50:44.402195  Saving nvdata

  352 12:50:44.405663  Reboot requested (10020007)

  353 12:50:44.408601  board_reset() called!

  354 12:50:44.408686  full_reset() called!

  355 12:50:48.920646  

  356 12:50:48.920798  

  357 12:50:48.930392  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...

  358 12:50:48.933690  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz

  359 12:50:48.940093  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9

  360 12:50:48.943656  CPU: AES supported, TXT NOT supported, VT supported

  361 12:50:48.950009  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)

  362 12:50:48.956453  PCH: device id 0284 (rev 00) is Cometlake-U Premium

  363 12:50:48.960072  IGD: device id 9b41 (rev 02) is CometLake ULT GT2

  364 12:50:48.963454  VBOOT: Loading verstage.

  365 12:50:48.969549  FMAP: Found "FLASH" version 1.1 at 0xc04000.

  366 12:50:48.972987  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31

  367 12:50:48.979547  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  368 12:50:48.979635  CBFS @ c08000 size 3f8000

  369 12:50:48.985988  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  370 12:50:48.989331  CBFS: Locating 'fallback/verstage'

  371 12:50:48.996320  CBFS: Found @ offset 10fb80 size 1072c

  372 12:50:48.996406  

  373 12:50:48.996475  

  374 12:50:49.005501  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...

  375 12:50:49.021573  Probing TPM: . done!

  376 12:50:49.025080  TPM ready after 0 ms

  377 12:50:49.028423  Connected to device vid:did:rid of 1ae0:0028:00

  378 12:50:49.038152  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  379 12:50:49.041725  Initialized TPM device CR50 revision 0

  380 12:50:49.084206  tlcl_send_startup: Startup return code is 0

  381 12:50:49.084322  TPM: setup succeeded

  382 12:50:49.096925  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0

  383 12:50:49.100337  Chrome EC: UHEPI supported

  384 12:50:49.103796  Phase 1

  385 12:50:49.107234  FMAP: area GBB found @ c05000 (12288 bytes)

  386 12:50:49.113622  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  387 12:50:49.120245  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0

  388 12:50:49.123569  Recovery requested (1009000e)

  389 12:50:49.129689  Saving nvdata

  390 12:50:49.135452  tlcl_extend: response is 0

  391 12:50:49.144460  tlcl_extend: response is 0

  392 12:50:49.151591  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  393 12:50:49.154736  CBFS @ c08000 size 3f8000

  394 12:50:49.161532  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  395 12:50:49.164702  CBFS: Locating 'fallback/romstage'

  396 12:50:49.168179  CBFS: Found @ offset 80 size 145fc

  397 12:50:49.170930  Accumulated console time in verstage 98 ms

  398 12:50:49.171006  

  399 12:50:49.171071  

  400 12:50:49.184464  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...

  401 12:50:49.190860  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync

  402 12:50:49.194298  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00

  403 12:50:49.197762  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000

  404 12:50:49.204069  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000

  405 12:50:49.207464  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000

  406 12:50:49.210767  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000

  407 12:50:49.214296  TCO_STS:   0000 0000

  408 12:50:49.217261  GEN_PMCON: e0015238 00000200

  409 12:50:49.220703  GBLRST_CAUSE: 00000000 00000000

  410 12:50:49.220790  prev_sleep_state 5

  411 12:50:49.224323  Boot Count incremented to 50460

  412 12:50:49.231120  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  413 12:50:49.234390  CBFS @ c08000 size 3f8000

  414 12:50:49.240748  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  415 12:50:49.240849  CBFS: Locating 'fspm.bin'

  416 12:50:49.247494  CBFS: Found @ offset 5ffc0 size 71000

  417 12:50:49.250934  Chrome EC: UHEPI supported

  418 12:50:49.257466  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

  419 12:50:49.260955  Probing TPM:  done!

  420 12:50:49.267383  Connected to device vid:did:rid of 1ae0:0028:00

  421 12:50:49.277384  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98

  422 12:50:49.283678  Initialized TPM device CR50 revision 0

  423 12:50:49.292665  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  424 12:50:49.302413  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE

  425 12:50:49.302531  MRC cache found, size 1948

  426 12:50:49.305376  bootmode is set to: 2

  427 12:50:49.308851  PRMRR disabled by config.

  428 12:50:49.312273  SPD INDEX = 1

  429 12:50:49.315633  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  430 12:50:49.318356  CBFS @ c08000 size 3f8000

  431 12:50:49.325368  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  432 12:50:49.325454  CBFS: Locating 'spd.bin'

  433 12:50:49.331759  CBFS: Found @ offset 5fb80 size 400

  434 12:50:49.331845  SPD: module type is LPDDR3

  435 12:50:49.335098  SPD: module part is 

  436 12:50:49.341575  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb

  437 12:50:49.345064  SPD: device width 4 bits, bus width 8 bits

  438 12:50:49.348086  SPD: module size is 4096 MB (per channel)

  439 12:50:49.351501  memory slot: 0 configuration done.

  440 12:50:49.357803  memory slot: 2 configuration done.

  441 12:50:49.406710  CBMEM:

  442 12:50:49.410170  IMD: root @ 99fff000 254 entries.

  443 12:50:49.412983  IMD: root @ 99ffec00 62 entries.

  444 12:50:49.416527  External stage cache:

  445 12:50:49.420039  IMD: root @ 9abff000 254 entries.

  446 12:50:49.423301  IMD: root @ 9abfec00 62 entries.

  447 12:50:49.429785  Chrome EC: clear events_b mask to 0x0000000020004000

  448 12:50:49.442432  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  449 12:50:49.455359  tlcl_write: response is 0

  450 12:50:49.464648  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0

  451 12:50:49.470985  MRC: TPM MRC hash updated successfully.

  452 12:50:49.471072  2 DIMMs found

  453 12:50:49.474329  SMM Memory Map

  454 12:50:49.477784  SMRAM       : 0x9a000000 0x1000000

  455 12:50:49.481080   Subregion 0: 0x9a000000 0xa00000

  456 12:50:49.484407   Subregion 1: 0x9aa00000 0x200000

  457 12:50:49.487245   Subregion 2: 0x9ac00000 0x400000

  458 12:50:49.490653  top_of_ram = 0x9a000000

  459 12:50:49.494048  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)

  460 12:50:49.501213  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)

  461 12:50:49.504025  MTRR Range: Start=ff000000 End=0 (Size 1000000)

  462 12:50:49.510879  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  463 12:50:49.514285  CBFS @ c08000 size 3f8000

  464 12:50:49.517279  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  465 12:50:49.520696  CBFS: Locating 'fallback/postcar'

  466 12:50:49.526988  CBFS: Found @ offset 107000 size 4b44

  467 12:50:49.533449  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)

  468 12:50:49.543450  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8

  469 12:50:49.546877  Processing 180 relocs. Offset value of 0x97c0c000

  470 12:50:49.554869  Accumulated console time in romstage 286 ms

  471 12:50:49.554960  

  472 12:50:49.555028  

  473 12:50:49.564731  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...

  474 12:50:49.571105  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  475 12:50:49.574739  CBFS @ c08000 size 3f8000

  476 12:50:49.580976  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  477 12:50:49.584535  CBFS: Locating 'fallback/ramstage'

  478 12:50:49.587511  CBFS: Found @ offset 43380 size 1b9e8

  479 12:50:49.594378  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)

  480 12:50:49.626449  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38

  481 12:50:49.629893  Processing 3976 relocs. Offset value of 0x98db0000

  482 12:50:49.636424  Accumulated console time in postcar 52 ms

  483 12:50:49.636511  

  484 12:50:49.636579  

  485 12:50:49.646370  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...

  486 12:50:49.652528  FMAP: area RO_VPD found @ c00000 (16384 bytes)

  487 12:50:49.655965  WARNING: RO_VPD is uninitialized or empty.

  488 12:50:49.659532  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  489 12:50:49.665666  FMAP: area RW_VPD found @ af8000 (8192 bytes)

  490 12:50:49.665754  Normal boot.

  491 12:50:49.672158  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0

  492 12:50:49.675836  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  493 12:50:49.679042  CBFS @ c08000 size 3f8000

  494 12:50:49.685306  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  495 12:50:49.688878  CBFS: Locating 'cpu_microcode_blob.bin'

  496 12:50:49.691835  CBFS: Found @ offset 14700 size 2ec00

  497 12:50:49.695199  microcode: sig=0x806ec pf=0x4 revision=0xc9

  498 12:50:49.698882  Skip microcode update

  499 12:50:49.705094  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  500 12:50:49.705182  CBFS @ c08000 size 3f8000

  501 12:50:49.712172  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  502 12:50:49.715026  CBFS: Locating 'fsps.bin'

  503 12:50:49.718591  CBFS: Found @ offset d1fc0 size 35000

  504 12:50:49.744399  Detected 4 core, 8 thread CPU.

  505 12:50:49.747854  Setting up SMI for CPU

  506 12:50:49.750797  IED base = 0x9ac00000

  507 12:50:49.754336  IED size = 0x00400000

  508 12:50:49.754423  Will perform SMM setup.

  509 12:50:49.760532  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.

  510 12:50:49.767427  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170

  511 12:50:49.773809  Processing 16 relocs. Offset value of 0x00030000

  512 12:50:49.777317  Attempting to start 7 APs

  513 12:50:49.780134  Waiting for 10ms after sending INIT.

  514 12:50:49.794122  Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.

  515 12:50:49.794209  done.

  516 12:50:49.797555  AP: slot 1 apic_id 3.

  517 12:50:49.800807  AP: slot 4 apic_id 2.

  518 12:50:49.800894  AP: slot 5 apic_id 5.

  519 12:50:49.803936  AP: slot 6 apic_id 4.

  520 12:50:49.807296  AP: slot 7 apic_id 6.

  521 12:50:49.807382  AP: slot 2 apic_id 7.

  522 12:50:49.814197  Waiting for 2nd SIPI to complete...done.

  523 12:50:49.820601  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8

  524 12:50:49.827448  Processing 13 relocs. Offset value of 0x00038000

  525 12:50:49.833625  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)

  526 12:50:49.837095  Installing SMM handler to 0x9a000000

  527 12:50:49.843553  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58

  528 12:50:49.850077  Processing 658 relocs. Offset value of 0x9a010000

  529 12:50:49.857181  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8

  530 12:50:49.860635  Processing 13 relocs. Offset value of 0x9a008000

  531 12:50:49.866851  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd

  532 12:50:49.873580  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd

  533 12:50:49.880028  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd

  534 12:50:49.883562  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd

  535 12:50:49.889812  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd

  536 12:50:49.896697  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd

  537 12:50:49.903067  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd

  538 12:50:49.909721  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)

  539 12:50:49.913000  Clearing SMI status registers

  540 12:50:49.913088  SMI_STS: PM1 

  541 12:50:49.916096  PM1_STS: PWRBTN 

  542 12:50:49.916183  TCO_STS: SECOND_TO 

  543 12:50:49.919605  New SMBASE 0x9a000000

  544 12:50:49.922505  In relocation handler: CPU 0

  545 12:50:49.925844  New SMBASE=0x9a000000 IEDBASE=0x9ac00000

  546 12:50:49.929395  Writing SMRR. base = 0x9a000006, mask=0xff000800

  547 12:50:49.932686  Relocation complete.

  548 12:50:49.936179  New SMBASE 0x99fff400

  549 12:50:49.939158  In relocation handler: CPU 3

  550 12:50:49.942508  New SMBASE=0x99fff400 IEDBASE=0x9ac00000

  551 12:50:49.945897  Writing SMRR. base = 0x9a000006, mask=0xff000800

  552 12:50:49.948832  Relocation complete.

  553 12:50:49.952339  New SMBASE 0x99ffe400

  554 12:50:49.955908  In relocation handler: CPU 7

  555 12:50:49.958889  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000

  556 12:50:49.962468  Writing SMRR. base = 0x9a000006, mask=0xff000800

  557 12:50:49.965190  Relocation complete.

  558 12:50:49.968749  New SMBASE 0x99fff800

  559 12:50:49.972171  In relocation handler: CPU 2

  560 12:50:49.974986  New SMBASE=0x99fff800 IEDBASE=0x9ac00000

  561 12:50:49.978460  Writing SMRR. base = 0x9a000006, mask=0xff000800

  562 12:50:49.981954  Relocation complete.

  563 12:50:49.984856  New SMBASE 0x99fffc00

  564 12:50:49.988470  In relocation handler: CPU 1

  565 12:50:49.991865  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000

  566 12:50:49.994749  Writing SMRR. base = 0x9a000006, mask=0xff000800

  567 12:50:49.998172  Relocation complete.

  568 12:50:50.001659  New SMBASE 0x99fff000

  569 12:50:50.004633  In relocation handler: CPU 4

  570 12:50:50.008141  New SMBASE=0x99fff000 IEDBASE=0x9ac00000

  571 12:50:50.011029  Writing SMRR. base = 0x9a000006, mask=0xff000800

  572 12:50:50.014367  Relocation complete.

  573 12:50:50.017843  New SMBASE 0x99ffec00

  574 12:50:50.020953  In relocation handler: CPU 5

  575 12:50:50.024464  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000

  576 12:50:50.027884  Writing SMRR. base = 0x9a000006, mask=0xff000800

  577 12:50:50.030618  Relocation complete.

  578 12:50:50.034088  New SMBASE 0x99ffe800

  579 12:50:50.037560  In relocation handler: CPU 6

  580 12:50:50.041025  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000

  581 12:50:50.043886  Writing SMRR. base = 0x9a000006, mask=0xff000800

  582 12:50:50.047356  Relocation complete.

  583 12:50:50.050705  Initializing CPU #0

  584 12:50:50.053686  CPU: vendor Intel device 806ec

  585 12:50:50.057305  CPU: family 06, model 8e, stepping 0c

  586 12:50:50.060295  Clearing out pending MCEs

  587 12:50:50.060383  Setting up local APIC...

  588 12:50:50.063757   apic_id: 0x00 done.

  589 12:50:50.066668  Turbo is available but hidden

  590 12:50:50.070129  Turbo is available and visible

  591 12:50:50.073687  VMX status: enabled

  592 12:50:50.076942  IA32_FEATURE_CONTROL status: locked

  593 12:50:50.077029  Skip microcode update

  594 12:50:50.079869  CPU #0 initialized

  595 12:50:50.083315  Initializing CPU #3

  596 12:50:50.083403  Initializing CPU #5

  597 12:50:50.086751  Initializing CPU #6

  598 12:50:50.089722  CPU: vendor Intel device 806ec

  599 12:50:50.093314  CPU: family 06, model 8e, stepping 0c

  600 12:50:50.096279  Initializing CPU #4

  601 12:50:50.096366  Initializing CPU #1

  602 12:50:50.099670  CPU: vendor Intel device 806ec

  603 12:50:50.103115  CPU: family 06, model 8e, stepping 0c

  604 12:50:50.106069  CPU: vendor Intel device 806ec

  605 12:50:50.109743  CPU: family 06, model 8e, stepping 0c

  606 12:50:50.113353  Clearing out pending MCEs

  607 12:50:50.116023  Clearing out pending MCEs

  608 12:50:50.119449  Setting up local APIC...

  609 12:50:50.119537  Initializing CPU #7

  610 12:50:50.123083  Initializing CPU #2

  611 12:50:50.126037  CPU: vendor Intel device 806ec

  612 12:50:50.129472  CPU: family 06, model 8e, stepping 0c

  613 12:50:50.133146  CPU: vendor Intel device 806ec

  614 12:50:50.136208  CPU: family 06, model 8e, stepping 0c

  615 12:50:50.139601  Clearing out pending MCEs

  616 12:50:50.142402  Clearing out pending MCEs

  617 12:50:50.145862  Setting up local APIC...

  618 12:50:50.145955  Clearing out pending MCEs

  619 12:50:50.149409  CPU: vendor Intel device 806ec

  620 12:50:50.156299  CPU: family 06, model 8e, stepping 0c

  621 12:50:50.156390  Setting up local APIC...

  622 12:50:50.159070  CPU: vendor Intel device 806ec

  623 12:50:50.162587  CPU: family 06, model 8e, stepping 0c

  624 12:50:50.165593  Clearing out pending MCEs

  625 12:50:50.169037   apic_id: 0x05 done.

  626 12:50:50.172453  Clearing out pending MCEs

  627 12:50:50.172537  VMX status: enabled

  628 12:50:50.175332  Setting up local APIC...

  629 12:50:50.178862  Setting up local APIC...

  630 12:50:50.178951   apic_id: 0x04 done.

  631 12:50:50.182249  Setting up local APIC...

  632 12:50:50.185465  Setting up local APIC...

  633 12:50:50.188461   apic_id: 0x02 done.

  634 12:50:50.188551   apic_id: 0x03 done.

  635 12:50:50.192029  VMX status: enabled

  636 12:50:50.195398  VMX status: enabled

  637 12:50:50.198355  IA32_FEATURE_CONTROL status: locked

  638 12:50:50.201857  IA32_FEATURE_CONTROL status: locked

  639 12:50:50.201939  Skip microcode update

  640 12:50:50.205328  Skip microcode update

  641 12:50:50.208293  CPU #4 initialized

  642 12:50:50.208382  CPU #1 initialized

  643 12:50:50.211968   apic_id: 0x01 done.

  644 12:50:50.215471  VMX status: enabled

  645 12:50:50.218365  IA32_FEATURE_CONTROL status: locked

  646 12:50:50.222044  IA32_FEATURE_CONTROL status: locked

  647 12:50:50.222135  Skip microcode update

  648 12:50:50.224939  Skip microcode update

  649 12:50:50.227895  CPU #5 initialized

  650 12:50:50.227985  CPU #6 initialized

  651 12:50:50.231419  VMX status: enabled

  652 12:50:50.235060   apic_id: 0x07 done.

  653 12:50:50.235150   apic_id: 0x06 done.

  654 12:50:50.237903  VMX status: enabled

  655 12:50:50.237999  VMX status: enabled

  656 12:50:50.244832  IA32_FEATURE_CONTROL status: locked

  657 12:50:50.247645  IA32_FEATURE_CONTROL status: locked

  658 12:50:50.247735  Skip microcode update

  659 12:50:50.251247  Skip microcode update

  660 12:50:50.254513  CPU #2 initialized

  661 12:50:50.254638  CPU #7 initialized

  662 12:50:50.257421  IA32_FEATURE_CONTROL status: locked

  663 12:50:50.260812  Skip microcode update

  664 12:50:50.264482  CPU #3 initialized

  665 12:50:50.267317  bsp_do_flight_plan done after 452 msecs.

  666 12:50:50.270965  CPU: frequency set to 4200 MHz

  667 12:50:50.271055  Enabling SMIs.

  668 12:50:50.274387  Locking SMM.

  669 12:50:50.288541  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

  670 12:50:50.291007  CBFS @ c08000 size 3f8000

  671 12:50:50.298195  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

  672 12:50:50.298277  CBFS: Locating 'vbt.bin'

  673 12:50:50.304587  CBFS: Found @ offset 5f5c0 size 499

  674 12:50:50.307871  Found a VBT of 4608 bytes after decompression

  675 12:50:50.491547  Display FSP Version Info HOB

  676 12:50:50.495133  Reference Code - CPU = 9.0.1e.30

  677 12:50:50.498224  uCode Version = 0.0.0.ca

  678 12:50:50.501045  TXT ACM version = ff.ff.ff.ffff

  679 12:50:50.504466  Display FSP Version Info HOB

  680 12:50:50.508097  Reference Code - ME = 9.0.1e.30

  681 12:50:50.511027  MEBx version = 0.0.0.0

  682 12:50:50.514447  ME Firmware Version = Consumer SKU

  683 12:50:50.517309  Display FSP Version Info HOB

  684 12:50:50.520749  Reference Code - CML PCH = 9.0.1e.30

  685 12:50:50.524514  PCH-CRID Status = Disabled

  686 12:50:50.527449  PCH-CRID Original Value = ff.ff.ff.ffff

  687 12:50:50.530407  PCH-CRID New Value = ff.ff.ff.ffff

  688 12:50:50.534123  OPROM - RST - RAID = ff.ff.ff.ffff

  689 12:50:50.537398  ChipsetInit Base Version = ff.ff.ff.ffff

  690 12:50:50.543885  ChipsetInit Oem Version = ff.ff.ff.ffff

  691 12:50:50.543972  Display FSP Version Info HOB

  692 12:50:50.549928  Reference Code - SA - System Agent = 9.0.1e.30

  693 12:50:50.553357  Reference Code - MRC = 0.7.1.6c

  694 12:50:50.556781  SA - PCIe Version = 9.0.1e.30

  695 12:50:50.560148  SA-CRID Status = Disabled

  696 12:50:50.563455  SA-CRID Original Value = 0.0.0.c

  697 12:50:50.563541  SA-CRID New Value = 0.0.0.c

  698 12:50:50.566355  OPROM - VBIOS = ff.ff.ff.ffff

  699 12:50:50.570428  RTC Init

  700 12:50:50.573776  Set power on after power failure.

  701 12:50:50.573863  Disabling Deep S3

  702 12:50:50.576556  Disabling Deep S3

  703 12:50:50.580204  Disabling Deep S4

  704 12:50:50.580291  Disabling Deep S4

  705 12:50:50.583148  Disabling Deep S5

  706 12:50:50.583235  Disabling Deep S5

  707 12:50:50.590000  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 194 exit 1

  708 12:50:50.592948  Enumerating buses...

  709 12:50:50.596425  Show all devs... Before device enumeration.

  710 12:50:50.599859  Root Device: enabled 1

  711 12:50:50.602749  CPU_CLUSTER: 0: enabled 1

  712 12:50:50.602836  DOMAIN: 0000: enabled 1

  713 12:50:50.606143  APIC: 00: enabled 1

  714 12:50:50.609552  PCI: 00:00.0: enabled 1

  715 12:50:50.612450  PCI: 00:02.0: enabled 1

  716 12:50:50.612536  PCI: 00:04.0: enabled 0

  717 12:50:50.615932  PCI: 00:05.0: enabled 0

  718 12:50:50.619016  PCI: 00:12.0: enabled 1

  719 12:50:50.622208  PCI: 00:12.5: enabled 0

  720 12:50:50.622294  PCI: 00:12.6: enabled 0

  721 12:50:50.625639  PCI: 00:14.0: enabled 1

  722 12:50:50.629216  PCI: 00:14.1: enabled 0

  723 12:50:50.629303  PCI: 00:14.3: enabled 1

  724 12:50:50.632271  PCI: 00:14.5: enabled 0

  725 12:50:50.635742  PCI: 00:15.0: enabled 1

  726 12:50:50.639165  PCI: 00:15.1: enabled 1

  727 12:50:50.639251  PCI: 00:15.2: enabled 0

  728 12:50:50.641874  PCI: 00:15.3: enabled 0

  729 12:50:50.645505  PCI: 00:16.0: enabled 1

  730 12:50:50.648355  PCI: 00:16.1: enabled 0

  731 12:50:50.648442  PCI: 00:16.2: enabled 0

  732 12:50:50.651842  PCI: 00:16.3: enabled 0

  733 12:50:50.655331  PCI: 00:16.4: enabled 0

  734 12:50:50.658751  PCI: 00:16.5: enabled 0

  735 12:50:50.658837  PCI: 00:17.0: enabled 1

  736 12:50:50.661577  PCI: 00:19.0: enabled 1

  737 12:50:50.665093  PCI: 00:19.1: enabled 0

  738 12:50:50.668205  PCI: 00:19.2: enabled 0

  739 12:50:50.668291  PCI: 00:1a.0: enabled 0

  740 12:50:50.671798  PCI: 00:1c.0: enabled 0

  741 12:50:50.674746  PCI: 00:1c.1: enabled 0

  742 12:50:50.678172  PCI: 00:1c.2: enabled 0

  743 12:50:50.678257  PCI: 00:1c.3: enabled 0

  744 12:50:50.681128  PCI: 00:1c.4: enabled 0

  745 12:50:50.684752  PCI: 00:1c.5: enabled 0

  746 12:50:50.687676  PCI: 00:1c.6: enabled 0

  747 12:50:50.687778  PCI: 00:1c.7: enabled 0

  748 12:50:50.691097  PCI: 00:1d.0: enabled 1

  749 12:50:50.694448  PCI: 00:1d.1: enabled 0

  750 12:50:50.697360  PCI: 00:1d.2: enabled 0

  751 12:50:50.697445  PCI: 00:1d.3: enabled 0

  752 12:50:50.700782  PCI: 00:1d.4: enabled 0

  753 12:50:50.704223  PCI: 00:1d.5: enabled 1

  754 12:50:50.707834  PCI: 00:1e.0: enabled 1

  755 12:50:50.707921  PCI: 00:1e.1: enabled 0

  756 12:50:50.710652  PCI: 00:1e.2: enabled 1

  757 12:50:50.714014  PCI: 00:1e.3: enabled 1

  758 12:50:50.717249  PCI: 00:1f.0: enabled 1

  759 12:50:50.717336  PCI: 00:1f.1: enabled 1

  760 12:50:50.720496  PCI: 00:1f.2: enabled 1

  761 12:50:50.723956  PCI: 00:1f.3: enabled 1

  762 12:50:50.724042  PCI: 00:1f.4: enabled 1

  763 12:50:50.726971  PCI: 00:1f.5: enabled 1

  764 12:50:50.730151  PCI: 00:1f.6: enabled 0

  765 12:50:50.733720  USB0 port 0: enabled 1

  766 12:50:50.733806  I2C: 00:15: enabled 1

  767 12:50:50.736620  I2C: 00:5d: enabled 1

  768 12:50:50.740114  GENERIC: 0.0: enabled 1

  769 12:50:50.743188  I2C: 00:1a: enabled 1

  770 12:50:50.743274  I2C: 00:38: enabled 1

  771 12:50:50.746943  I2C: 00:39: enabled 1

  772 12:50:50.749635  I2C: 00:3a: enabled 1

  773 12:50:50.749722  I2C: 00:3b: enabled 1

  774 12:50:50.753203  PCI: 00:00.0: enabled 1

  775 12:50:50.756173  SPI: 00: enabled 1

  776 12:50:50.756261  SPI: 01: enabled 1

  777 12:50:50.759682  PNP: 0c09.0: enabled 1

  778 12:50:50.763031  USB2 port 0: enabled 1

  779 12:50:50.763117  USB2 port 1: enabled 1

  780 12:50:50.765937  USB2 port 2: enabled 0

  781 12:50:50.769324  USB2 port 3: enabled 0

  782 12:50:50.772804  USB2 port 5: enabled 0

  783 12:50:50.772892  USB2 port 6: enabled 1

  784 12:50:50.775629  USB2 port 9: enabled 1

  785 12:50:50.779131  USB3 port 0: enabled 1

  786 12:50:50.779218  USB3 port 1: enabled 1

  787 12:50:50.782466  USB3 port 2: enabled 1

  788 12:50:50.785532  USB3 port 3: enabled 1

  789 12:50:50.789020  USB3 port 4: enabled 0

  790 12:50:50.789108  APIC: 03: enabled 1

  791 12:50:50.792073  APIC: 07: enabled 1

  792 12:50:50.792161  APIC: 01: enabled 1

  793 12:50:50.795597  APIC: 02: enabled 1

  794 12:50:50.799050  APIC: 05: enabled 1

  795 12:50:50.799137  APIC: 04: enabled 1

  796 12:50:50.801896  APIC: 06: enabled 1

  797 12:50:50.805192  Compare with tree...

  798 12:50:50.805280  Root Device: enabled 1

  799 12:50:50.808334   CPU_CLUSTER: 0: enabled 1

  800 12:50:50.811761    APIC: 00: enabled 1

  801 12:50:50.811849    APIC: 03: enabled 1

  802 12:50:50.815184    APIC: 07: enabled 1

  803 12:50:50.817999    APIC: 01: enabled 1

  804 12:50:50.821519    APIC: 02: enabled 1

  805 12:50:50.821606    APIC: 05: enabled 1

  806 12:50:50.824897    APIC: 04: enabled 1

  807 12:50:50.827985    APIC: 06: enabled 1

  808 12:50:50.828077   DOMAIN: 0000: enabled 1

  809 12:50:50.831345    PCI: 00:00.0: enabled 1

  810 12:50:50.834728    PCI: 00:02.0: enabled 1

  811 12:50:50.837678    PCI: 00:04.0: enabled 0

  812 12:50:50.841187    PCI: 00:05.0: enabled 0

  813 12:50:50.841276    PCI: 00:12.0: enabled 1

  814 12:50:50.844720    PCI: 00:12.5: enabled 0

  815 12:50:50.847647    PCI: 00:12.6: enabled 0

  816 12:50:50.851012    PCI: 00:14.0: enabled 1

  817 12:50:50.854187     USB0 port 0: enabled 1

  818 12:50:50.854277      USB2 port 0: enabled 1

  819 12:50:50.857840      USB2 port 1: enabled 1

  820 12:50:50.860824      USB2 port 2: enabled 0

  821 12:50:50.864219      USB2 port 3: enabled 0

  822 12:50:50.867596      USB2 port 5: enabled 0

  823 12:50:50.870404      USB2 port 6: enabled 1

  824 12:50:50.870492      USB2 port 9: enabled 1

  825 12:50:50.873903      USB3 port 0: enabled 1

  826 12:50:50.877251      USB3 port 1: enabled 1

  827 12:50:50.880796      USB3 port 2: enabled 1

  828 12:50:50.883650      USB3 port 3: enabled 1

  829 12:50:50.887200      USB3 port 4: enabled 0

  830 12:50:50.887288    PCI: 00:14.1: enabled 0

  831 12:50:50.890044    PCI: 00:14.3: enabled 1

  832 12:50:50.893607    PCI: 00:14.5: enabled 0

  833 12:50:50.897008    PCI: 00:15.0: enabled 1

  834 12:50:50.900011     I2C: 00:15: enabled 1

  835 12:50:50.900098    PCI: 00:15.1: enabled 1

  836 12:50:50.903405     I2C: 00:5d: enabled 1

  837 12:50:50.906818     GENERIC: 0.0: enabled 1

  838 12:50:50.910078    PCI: 00:15.2: enabled 0

  839 12:50:50.913022    PCI: 00:15.3: enabled 0

  840 12:50:50.913109    PCI: 00:16.0: enabled 1

  841 12:50:50.916286    PCI: 00:16.1: enabled 0

  842 12:50:50.919545    PCI: 00:16.2: enabled 0

  843 12:50:50.922673    PCI: 00:16.3: enabled 0

  844 12:50:50.926246    PCI: 00:16.4: enabled 0

  845 12:50:50.926332    PCI: 00:16.5: enabled 0

  846 12:50:50.929688    PCI: 00:17.0: enabled 1

  847 12:50:50.932594    PCI: 00:19.0: enabled 1

  848 12:50:50.936077     I2C: 00:1a: enabled 1

  849 12:50:50.939243     I2C: 00:38: enabled 1

  850 12:50:50.939330     I2C: 00:39: enabled 1

  851 12:50:50.942577     I2C: 00:3a: enabled 1

  852 12:50:50.945803     I2C: 00:3b: enabled 1

  853 12:50:50.949025    PCI: 00:19.1: enabled 0

  854 12:50:50.952095    PCI: 00:19.2: enabled 0

  855 12:50:50.952181    PCI: 00:1a.0: enabled 0

  856 12:50:50.955394    PCI: 00:1c.0: enabled 0

  857 12:50:50.958830    PCI: 00:1c.1: enabled 0

  858 12:50:50.962332    PCI: 00:1c.2: enabled 0

  859 12:50:50.965325    PCI: 00:1c.3: enabled 0

  860 12:50:50.965413    PCI: 00:1c.4: enabled 0

  861 12:50:50.968335    PCI: 00:1c.5: enabled 0

  862 12:50:50.971663    PCI: 00:1c.6: enabled 0

  863 12:50:50.974945    PCI: 00:1c.7: enabled 0

  864 12:50:50.978476    PCI: 00:1d.0: enabled 1

  865 12:50:50.978604    PCI: 00:1d.1: enabled 0

  866 12:50:50.981634    PCI: 00:1d.2: enabled 0

  867 12:50:50.984593    PCI: 00:1d.3: enabled 0

  868 12:50:50.988021    PCI: 00:1d.4: enabled 0

  869 12:50:50.991382    PCI: 00:1d.5: enabled 1

  870 12:50:50.991470     PCI: 00:00.0: enabled 1

  871 12:50:50.995024    PCI: 00:1e.0: enabled 1

  872 12:50:50.998276    PCI: 00:1e.1: enabled 0

  873 12:50:51.001458    PCI: 00:1e.2: enabled 1

  874 12:50:51.004346     SPI: 00: enabled 1

  875 12:50:51.004442    PCI: 00:1e.3: enabled 1

  876 12:50:51.007744     SPI: 01: enabled 1

  877 12:50:51.010685    PCI: 00:1f.0: enabled 1

  878 12:50:51.014138     PNP: 0c09.0: enabled 1

  879 12:50:51.014226    PCI: 00:1f.1: enabled 1

  880 12:50:51.017853    PCI: 00:1f.2: enabled 1

  881 12:50:51.020917    PCI: 00:1f.3: enabled 1

  882 12:50:51.023902    PCI: 00:1f.4: enabled 1

  883 12:50:51.027255    PCI: 00:1f.5: enabled 1

  884 12:50:51.027348    PCI: 00:1f.6: enabled 0

  885 12:50:51.030210  Root Device scanning...

  886 12:50:51.033700  scan_static_bus for Root Device

  887 12:50:51.037302  CPU_CLUSTER: 0 enabled

  888 12:50:51.040095  DOMAIN: 0000 enabled

  889 12:50:51.040183  DOMAIN: 0000 scanning...

  890 12:50:51.044105  PCI: pci_scan_bus for bus 00

  891 12:50:51.047054  PCI: 00:00.0 [8086/0000] ops

  892 12:50:51.050203  PCI: 00:00.0 [8086/9b61] enabled

  893 12:50:51.053620  PCI: 00:02.0 [8086/0000] bus ops

  894 12:50:51.056510  PCI: 00:02.0 [8086/9b41] enabled

  895 12:50:51.060096  PCI: 00:04.0 [8086/1903] disabled

  896 12:50:51.062916  PCI: 00:08.0 [8086/1911] enabled

  897 12:50:51.069462  PCI: 00:12.0 [8086/02f9] enabled

  898 12:50:51.072942  PCI: 00:14.0 [8086/0000] bus ops

  899 12:50:51.076293  PCI: 00:14.0 [8086/02ed] enabled

  900 12:50:51.079617  PCI: 00:14.2 [8086/02ef] enabled

  901 12:50:51.083227  PCI: 00:14.3 [8086/02f0] enabled

  902 12:50:51.085917  PCI: 00:15.0 [8086/0000] bus ops

  903 12:50:51.089490  PCI: 00:15.0 [8086/02e8] enabled

  904 12:50:51.092913  PCI: 00:15.1 [8086/0000] bus ops

  905 12:50:51.095757  PCI: 00:15.1 [8086/02e9] enabled

  906 12:50:51.099348  PCI: 00:16.0 [8086/0000] ops

  907 12:50:51.102212  PCI: 00:16.0 [8086/02e0] enabled

  908 12:50:51.102298  PCI: 00:17.0 [8086/0000] ops

  909 12:50:51.105834  PCI: 00:17.0 [8086/02d3] enabled

  910 12:50:51.108732  PCI: 00:19.0 [8086/0000] bus ops

  911 12:50:51.112141  PCI: 00:19.0 [8086/02c5] enabled

  912 12:50:51.115594  PCI: 00:1d.0 [8086/0000] bus ops

  913 12:50:51.122395  PCI: 00:1d.0 [8086/02b0] enabled

  914 12:50:51.125406  PCI: Static device PCI: 00:1d.5 not found, disabling it.

  915 12:50:51.128788  PCI: 00:1e.0 [8086/0000] ops

  916 12:50:51.131736  PCI: 00:1e.0 [8086/02a8] enabled

  917 12:50:51.135297  PCI: 00:1e.2 [8086/0000] bus ops

  918 12:50:51.138165  PCI: 00:1e.2 [8086/02aa] enabled

  919 12:50:51.141813  PCI: 00:1e.3 [8086/0000] bus ops

  920 12:50:51.145363  PCI: 00:1e.3 [8086/02ab] enabled

  921 12:50:51.148024  PCI: 00:1f.0 [8086/0000] bus ops

  922 12:50:51.151538  PCI: 00:1f.0 [8086/0284] enabled

  923 12:50:51.157945  PCI: Static device PCI: 00:1f.1 not found, disabling it.

  924 12:50:51.164799  PCI: Static device PCI: 00:1f.2 not found, disabling it.

  925 12:50:51.168277  PCI: 00:1f.3 [8086/0000] bus ops

  926 12:50:51.171292  PCI: 00:1f.3 [8086/02c8] enabled

  927 12:50:51.174285  PCI: 00:1f.4 [8086/0000] bus ops

  928 12:50:51.177672  PCI: 00:1f.4 [8086/02a3] enabled

  929 12:50:51.181038  PCI: 00:1f.5 [8086/0000] bus ops

  930 12:50:51.184392  PCI: 00:1f.5 [8086/02a4] enabled

  931 12:50:51.187856  PCI: Leftover static devices:

  932 12:50:51.187943  PCI: 00:05.0

  933 12:50:51.190637  PCI: 00:12.5

  934 12:50:51.190723  PCI: 00:12.6

  935 12:50:51.190796  PCI: 00:14.1

  936 12:50:51.194073  PCI: 00:14.5

  937 12:50:51.194160  PCI: 00:15.2

  938 12:50:51.197551  PCI: 00:15.3

  939 12:50:51.197638  PCI: 00:16.1

  940 12:50:51.197706  PCI: 00:16.2

  941 12:50:51.200463  PCI: 00:16.3

  942 12:50:51.200550  PCI: 00:16.4

  943 12:50:51.203927  PCI: 00:16.5

  944 12:50:51.204014  PCI: 00:19.1

  945 12:50:51.207459  PCI: 00:19.2

  946 12:50:51.207546  PCI: 00:1a.0

  947 12:50:51.207615  PCI: 00:1c.0

  948 12:50:51.210451  PCI: 00:1c.1

  949 12:50:51.210578  PCI: 00:1c.2

  950 12:50:51.213943  PCI: 00:1c.3

  951 12:50:51.214030  PCI: 00:1c.4

  952 12:50:51.214099  PCI: 00:1c.5

  953 12:50:51.216737  PCI: 00:1c.6

  954 12:50:51.216824  PCI: 00:1c.7

  955 12:50:51.220253  PCI: 00:1d.1

  956 12:50:51.220340  PCI: 00:1d.2

  957 12:50:51.223656  PCI: 00:1d.3

  958 12:50:51.223744  PCI: 00:1d.4

  959 12:50:51.223813  PCI: 00:1d.5

  960 12:50:51.226483  PCI: 00:1e.1

  961 12:50:51.226609  PCI: 00:1f.1

  962 12:50:51.230150  PCI: 00:1f.2

  963 12:50:51.230238  PCI: 00:1f.6

  964 12:50:51.233522  PCI: Check your devicetree.cb.

  965 12:50:51.236330  PCI: 00:02.0 scanning...

  966 12:50:51.239906  scan_generic_bus for PCI: 00:02.0

  967 12:50:51.242822  scan_generic_bus for PCI: 00:02.0 done

  968 12:50:51.249742  scan_bus: scanning of bus PCI: 00:02.0 took 10196 usecs

  969 12:50:51.253051  PCI: 00:14.0 scanning...

  970 12:50:51.255830  scan_static_bus for PCI: 00:14.0

  971 12:50:51.255936  USB0 port 0 enabled

  972 12:50:51.259328  USB0 port 0 scanning...

  973 12:50:51.262818  scan_static_bus for USB0 port 0

  974 12:50:51.265788  USB2 port 0 enabled

  975 12:50:51.265876  USB2 port 1 enabled

  976 12:50:51.269204  USB2 port 2 disabled

  977 12:50:51.272298  USB2 port 3 disabled

  978 12:50:51.272386  USB2 port 5 disabled

  979 12:50:51.275631  USB2 port 6 enabled

  980 12:50:51.278755  USB2 port 9 enabled

  981 12:50:51.278842  USB3 port 0 enabled

  982 12:50:51.282280  USB3 port 1 enabled

  983 12:50:51.285428  USB3 port 2 enabled

  984 12:50:51.285523  USB3 port 3 enabled

  985 12:50:51.288899  USB3 port 4 disabled

  986 12:50:51.291789  USB2 port 0 scanning...

  987 12:50:51.295180  scan_static_bus for USB2 port 0

  988 12:50:51.298799  scan_static_bus for USB2 port 0 done

  989 12:50:51.301578  scan_bus: scanning of bus USB2 port 0 took 9699 usecs

  990 12:50:51.305095  USB2 port 1 scanning...

  991 12:50:51.308068  scan_static_bus for USB2 port 1

  992 12:50:51.311750  scan_static_bus for USB2 port 1 done

  993 12:50:51.318065  scan_bus: scanning of bus USB2 port 1 took 9697 usecs

  994 12:50:51.321516  USB2 port 6 scanning...

  995 12:50:51.325051  scan_static_bus for USB2 port 6

  996 12:50:51.328266  scan_static_bus for USB2 port 6 done

  997 12:50:51.334628  scan_bus: scanning of bus USB2 port 6 took 9705 usecs

  998 12:50:51.334717  USB2 port 9 scanning...

  999 12:50:51.337517  scan_static_bus for USB2 port 9

 1000 12:50:51.344469  scan_static_bus for USB2 port 9 done

 1001 12:50:51.347360  scan_bus: scanning of bus USB2 port 9 took 9695 usecs

 1002 12:50:51.350891  USB3 port 0 scanning...

 1003 12:50:51.353870  scan_static_bus for USB3 port 0

 1004 12:50:51.357224  scan_static_bus for USB3 port 0 done

 1005 12:50:51.364160  scan_bus: scanning of bus USB3 port 0 took 9704 usecs

 1006 12:50:51.364273  USB3 port 1 scanning...

 1007 12:50:51.367699  scan_static_bus for USB3 port 1

 1008 12:50:51.374004  scan_static_bus for USB3 port 1 done

 1009 12:50:51.377612  scan_bus: scanning of bus USB3 port 1 took 9690 usecs

 1010 12:50:51.380609  USB3 port 2 scanning...

 1011 12:50:51.384058  scan_static_bus for USB3 port 2

 1012 12:50:51.386859  scan_static_bus for USB3 port 2 done

 1013 12:50:51.393424  scan_bus: scanning of bus USB3 port 2 took 9699 usecs

 1014 12:50:51.396838  USB3 port 3 scanning...

 1015 12:50:51.399776  scan_static_bus for USB3 port 3

 1016 12:50:51.403304  scan_static_bus for USB3 port 3 done

 1017 12:50:51.406784  scan_bus: scanning of bus USB3 port 3 took 9690 usecs

 1018 12:50:51.413074  scan_static_bus for USB0 port 0 done

 1019 12:50:51.416697  scan_bus: scanning of bus USB0 port 0 took 155331 usecs

 1020 12:50:51.419671  scan_static_bus for PCI: 00:14.0 done

 1021 12:50:51.426004  scan_bus: scanning of bus PCI: 00:14.0 took 172949 usecs

 1022 12:50:51.429550  PCI: 00:15.0 scanning...

 1023 12:50:51.433053  scan_generic_bus for PCI: 00:15.0

 1024 12:50:51.435854  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled

 1025 12:50:51.442836  scan_generic_bus for PCI: 00:15.0 done

 1026 12:50:51.445644  scan_bus: scanning of bus PCI: 00:15.0 took 14292 usecs

 1027 12:50:51.449175  PCI: 00:15.1 scanning...

 1028 12:50:51.452138  scan_generic_bus for PCI: 00:15.1

 1029 12:50:51.455480  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled

 1030 12:50:51.462013  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled

 1031 12:50:51.465360  scan_generic_bus for PCI: 00:15.1 done

 1032 12:50:51.471757  scan_bus: scanning of bus PCI: 00:15.1 took 18597 usecs

 1033 12:50:51.471849  PCI: 00:19.0 scanning...

 1034 12:50:51.478169  scan_generic_bus for PCI: 00:19.0

 1035 12:50:51.481779  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled

 1036 12:50:51.484760  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled

 1037 12:50:51.488342  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled

 1038 12:50:51.494771  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled

 1039 12:50:51.497611  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled

 1040 12:50:51.501121  scan_generic_bus for PCI: 00:19.0 done

 1041 12:50:51.507396  scan_bus: scanning of bus PCI: 00:19.0 took 30747 usecs

 1042 12:50:51.507483  PCI: 00:1d.0 scanning...

 1043 12:50:51.514222  do_pci_scan_bridge for PCI: 00:1d.0

 1044 12:50:51.514308  PCI: pci_scan_bus for bus 01

 1045 12:50:51.517733  PCI: 01:00.0 [1c5c/1327] enabled

 1046 12:50:51.524312  Enabling Common Clock Configuration

 1047 12:50:51.527697  L1 Sub-State supported from root port 29

 1048 12:50:51.531143  L1 Sub-State Support = 0xf

 1049 12:50:51.534126  CommonModeRestoreTime = 0x28

 1050 12:50:51.537917  Power On Value = 0x16, Power On Scale = 0x0

 1051 12:50:51.540663  ASPM: Enabled L1

 1052 12:50:51.544301  scan_bus: scanning of bus PCI: 00:1d.0 took 32793 usecs

 1053 12:50:51.547158  PCI: 00:1e.2 scanning...

 1054 12:50:51.550659  scan_generic_bus for PCI: 00:1e.2

 1055 12:50:51.554130  bus: PCI: 00:1e.2[0]->SPI: 00 enabled

 1056 12:50:51.557026  scan_generic_bus for PCI: 00:1e.2 done

 1057 12:50:51.563493  scan_bus: scanning of bus PCI: 00:1e.2 took 14013 usecs

 1058 12:50:51.566787  PCI: 00:1e.3 scanning...

 1059 12:50:51.570150  scan_generic_bus for PCI: 00:1e.3

 1060 12:50:51.573736  bus: PCI: 00:1e.3[0]->SPI: 01 enabled

 1061 12:50:51.576790  scan_generic_bus for PCI: 00:1e.3 done

 1062 12:50:51.582986  scan_bus: scanning of bus PCI: 00:1e.3 took 14005 usecs

 1063 12:50:51.586456  PCI: 00:1f.0 scanning...

 1064 12:50:51.589981  scan_static_bus for PCI: 00:1f.0

 1065 12:50:51.592944  PNP: 0c09.0 enabled

 1066 12:50:51.596306  scan_static_bus for PCI: 00:1f.0 done

 1067 12:50:51.603141  scan_bus: scanning of bus PCI: 00:1f.0 took 12045 usecs

 1068 12:50:51.603227  PCI: 00:1f.3 scanning...

 1069 12:50:51.609515  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs

 1070 12:50:51.612487  PCI: 00:1f.4 scanning...

 1071 12:50:51.615799  scan_generic_bus for PCI: 00:1f.4

 1072 12:50:51.619301  scan_generic_bus for PCI: 00:1f.4 done

 1073 12:50:51.625855  scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs

 1074 12:50:51.628813  PCI: 00:1f.5 scanning...

 1075 12:50:51.632233  scan_generic_bus for PCI: 00:1f.5

 1076 12:50:51.635586  scan_generic_bus for PCI: 00:1f.5 done

 1077 12:50:51.641904  scan_bus: scanning of bus PCI: 00:1f.5 took 10188 usecs

 1078 12:50:51.645161  scan_bus: scanning of bus DOMAIN: 0000 took 604928 usecs

 1079 12:50:51.651663  scan_static_bus for Root Device done

 1080 12:50:51.655159  scan_bus: scanning of bus Root Device took 624810 usecs

 1081 12:50:51.658139  done

 1082 12:50:51.658227  Chrome EC: UHEPI supported

 1083 12:50:51.665177  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)

 1084 12:50:51.671234  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.

 1085 12:50:51.678209  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000

 1086 12:50:51.684657  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)

 1087 12:50:51.687653  SPI flash protection: WPSW=0 SRP0=0

 1088 12:50:51.694085  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.

 1089 12:50:51.697644  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2

 1090 12:50:51.700517  found VGA at PCI: 00:02.0

 1091 12:50:51.704437  Setting up VGA for PCI: 00:02.0

 1092 12:50:51.710636  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000

 1093 12:50:51.714195  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device

 1094 12:50:51.717083  Allocating resources...

 1095 12:50:51.720458  Reading resources...

 1096 12:50:51.724047  Root Device read_resources bus 0 link: 0

 1097 12:50:51.727065  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 1098 12:50:51.733587  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 1099 12:50:51.737000  DOMAIN: 0000 read_resources bus 0 link: 0

 1100 12:50:51.744323  PCI: 00:14.0 read_resources bus 0 link: 0

 1101 12:50:51.747293  USB0 port 0 read_resources bus 0 link: 0

 1102 12:50:51.755326  USB0 port 0 read_resources bus 0 link: 0 done

 1103 12:50:51.758789  PCI: 00:14.0 read_resources bus 0 link: 0 done

 1104 12:50:51.766193  PCI: 00:15.0 read_resources bus 1 link: 0

 1105 12:50:51.769608  PCI: 00:15.0 read_resources bus 1 link: 0 done

 1106 12:50:51.776518  PCI: 00:15.1 read_resources bus 2 link: 0

 1107 12:50:51.779235  PCI: 00:15.1 read_resources bus 2 link: 0 done

 1108 12:50:51.787160  PCI: 00:19.0 read_resources bus 3 link: 0

 1109 12:50:51.793384  PCI: 00:19.0 read_resources bus 3 link: 0 done

 1110 12:50:51.796967  PCI: 00:1d.0 read_resources bus 1 link: 0

 1111 12:50:51.803262  PCI: 00:1d.0 read_resources bus 1 link: 0 done

 1112 12:50:51.806853  PCI: 00:1e.2 read_resources bus 4 link: 0

 1113 12:50:51.813114  PCI: 00:1e.2 read_resources bus 4 link: 0 done

 1114 12:50:51.816605  PCI: 00:1e.3 read_resources bus 5 link: 0

 1115 12:50:51.822884  PCI: 00:1e.3 read_resources bus 5 link: 0 done

 1116 12:50:51.826364  PCI: 00:1f.0 read_resources bus 0 link: 0

 1117 12:50:51.832787  PCI: 00:1f.0 read_resources bus 0 link: 0 done

 1118 12:50:51.839297  DOMAIN: 0000 read_resources bus 0 link: 0 done

 1119 12:50:51.842756  Root Device read_resources bus 0 link: 0 done

 1120 12:50:51.846189  Done reading resources.

 1121 12:50:51.852458  Show resources in subtree (Root Device)...After reading.

 1122 12:50:51.856203   Root Device child on link 0 CPU_CLUSTER: 0

 1123 12:50:51.859129    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1124 12:50:51.862743     APIC: 00

 1125 12:50:51.862831     APIC: 03

 1126 12:50:51.862900     APIC: 07

 1127 12:50:51.865743     APIC: 01

 1128 12:50:51.865830     APIC: 02

 1129 12:50:51.869306     APIC: 05

 1130 12:50:51.869392     APIC: 04

 1131 12:50:51.869462     APIC: 06

 1132 12:50:51.875785    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1133 12:50:51.925252    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000

 1134 12:50:51.925578    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100

 1135 12:50:51.925660     PCI: 00:00.0

 1136 12:50:51.925908     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1137 12:50:51.925977     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1138 12:50:51.926222     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1139 12:50:51.932429     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1140 12:50:51.942352     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1141 12:50:51.952060     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1142 12:50:51.961789     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1143 12:50:51.971626     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1144 12:50:51.978754     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1145 12:50:51.988006     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1146 12:50:51.997909     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1147 12:50:52.007676     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1148 12:50:52.017573     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1149 12:50:52.027342     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1150 12:50:52.037553     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1151 12:50:52.043589     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1152 12:50:52.047058     PCI: 00:02.0

 1153 12:50:52.056744     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10

 1154 12:50:52.066454     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18

 1155 12:50:52.076344     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20

 1156 12:50:52.076442     PCI: 00:04.0

 1157 12:50:52.079757     PCI: 00:08.0

 1158 12:50:52.089374     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1159 12:50:52.089468     PCI: 00:12.0

 1160 12:50:52.099247     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1161 12:50:52.105942     PCI: 00:14.0 child on link 0 USB0 port 0

 1162 12:50:52.116012     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10

 1163 12:50:52.118859      USB0 port 0 child on link 0 USB2 port 0

 1164 12:50:52.122211       USB2 port 0

 1165 12:50:52.122300       USB2 port 1

 1166 12:50:52.125677       USB2 port 2

 1167 12:50:52.125766       USB2 port 3

 1168 12:50:52.128572       USB2 port 5

 1169 12:50:52.128662       USB2 port 6

 1170 12:50:52.132034       USB2 port 9

 1171 12:50:52.132124       USB3 port 0

 1172 12:50:52.135011       USB3 port 1

 1173 12:50:52.138736       USB3 port 2

 1174 12:50:52.138825       USB3 port 3

 1175 12:50:52.141936       USB3 port 4

 1176 12:50:52.142024     PCI: 00:14.2

 1177 12:50:52.151395     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10

 1178 12:50:52.161083     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1179 12:50:52.164442     PCI: 00:14.3

 1180 12:50:52.174355     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1181 12:50:52.177742     PCI: 00:15.0 child on link 0 I2C: 01:15

 1182 12:50:52.187767     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1183 12:50:52.190857      I2C: 01:15

 1184 12:50:52.194096     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1185 12:50:52.203691     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1186 12:50:52.203806      I2C: 02:5d

 1187 12:50:52.207060      GENERIC: 0.0

 1188 12:50:52.207153     PCI: 00:16.0

 1189 12:50:52.216879     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1190 12:50:52.220415     PCI: 00:17.0

 1191 12:50:52.230139     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10

 1192 12:50:52.240000     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14

 1193 12:50:52.246406     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18

 1194 12:50:52.255867     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c

 1195 12:50:52.262689     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20

 1196 12:50:52.272401     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24

 1197 12:50:52.275375     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1198 12:50:52.285168     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1199 12:50:52.288683      I2C: 03:1a

 1200 12:50:52.288770      I2C: 03:38

 1201 12:50:52.291914      I2C: 03:39

 1202 12:50:52.292001      I2C: 03:3a

 1203 12:50:52.295117      I2C: 03:3b

 1204 12:50:52.298632     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1205 12:50:52.308095     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c

 1206 12:50:52.318048     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24

 1207 12:50:52.324477     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20

 1208 12:50:52.327997      PCI: 01:00.0

 1209 12:50:52.337687      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1210 12:50:52.341032     PCI: 00:1e.0

 1211 12:50:52.350954     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1212 12:50:52.360170     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18

 1213 12:50:52.363544     PCI: 00:1e.2 child on link 0 SPI: 00

 1214 12:50:52.373339     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1215 12:50:52.376670      SPI: 00

 1216 12:50:52.379702     PCI: 00:1e.3 child on link 0 SPI: 01

 1217 12:50:52.390001     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10

 1218 12:50:52.390089      SPI: 01

 1219 12:50:52.396546     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1220 12:50:52.402894     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1221 12:50:52.412789     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1222 12:50:52.415715      PNP: 0c09.0

 1223 12:50:52.422632      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1224 12:50:52.425644     PCI: 00:1f.3

 1225 12:50:52.435557     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10

 1226 12:50:52.445377     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20

 1227 12:50:52.445464     PCI: 00:1f.4

 1228 12:50:52.455213     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1229 12:50:52.464701     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10

 1230 12:50:52.468206     PCI: 00:1f.5

 1231 12:50:52.477688     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10

 1232 12:50:52.484386  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff

 1233 12:50:52.487867  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff

 1234 12:50:52.497548  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done

 1235 12:50:52.500559  PCI: 00:02.0 20 *  [0x0 - 0x3f] io

 1236 12:50:52.504042  PCI: 00:17.0 20 *  [0x40 - 0x5f] io

 1237 12:50:52.507371  PCI: 00:17.0 18 *  [0x60 - 0x67] io

 1238 12:50:52.510296  PCI: 00:17.0 1c *  [0x68 - 0x6b] io

 1239 12:50:52.516846  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done

 1240 12:50:52.523595  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff

 1241 12:50:52.530243  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff

 1242 12:50:52.540112  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done

 1243 12:50:52.546136  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff

 1244 12:50:52.549545  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem

 1245 12:50:52.559510  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done

 1246 12:50:52.563169  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem

 1247 12:50:52.569371  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem

 1248 12:50:52.572523  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem

 1249 12:50:52.578914  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem

 1250 12:50:52.582307  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem

 1251 12:50:52.588596  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem

 1252 12:50:52.592109  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem

 1253 12:50:52.598222  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem

 1254 12:50:52.601791  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem

 1255 12:50:52.608377  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem

 1256 12:50:52.611706  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem

 1257 12:50:52.618250  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem

 1258 12:50:52.621206  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem

 1259 12:50:52.627593  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem

 1260 12:50:52.631080  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem

 1261 12:50:52.637611  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem

 1262 12:50:52.641051  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem

 1263 12:50:52.643949  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem

 1264 12:50:52.650701  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem

 1265 12:50:52.654147  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem

 1266 12:50:52.660373  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem

 1267 12:50:52.663864  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem

 1268 12:50:52.670447  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem

 1269 12:50:52.680242  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done

 1270 12:50:52.683110  avoid_fixed_resources: DOMAIN: 0000

 1271 12:50:52.686508  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff

 1272 12:50:52.692793  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff

 1273 12:50:52.703451  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)

 1274 12:50:52.709787  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)

 1275 12:50:52.716018  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)

 1276 12:50:52.725914  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)

 1277 12:50:52.732400  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)

 1278 12:50:52.738777  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)

 1279 12:50:52.748668  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)

 1280 12:50:52.754890  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)

 1281 12:50:52.761810  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f

 1282 12:50:52.771018  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff

 1283 12:50:52.771105  Setting resources...

 1284 12:50:52.778034  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f

 1285 12:50:52.781001  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io

 1286 12:50:52.787747  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io

 1287 12:50:52.791229  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io

 1288 12:50:52.794188  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io

 1289 12:50:52.800598  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done

 1290 12:50:52.807837  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f

 1291 12:50:52.813520  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done

 1292 12:50:52.820021  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff

 1293 12:50:52.826699  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem

 1294 12:50:52.830405  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem

 1295 12:50:52.836454  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem

 1296 12:50:52.840052  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem

 1297 12:50:52.846098  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem

 1298 12:50:52.849723  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem

 1299 12:50:52.856393  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem

 1300 12:50:52.859154  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem

 1301 12:50:52.865874  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem

 1302 12:50:52.869361  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem

 1303 12:50:52.875392  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem

 1304 12:50:52.879147  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem

 1305 12:50:52.885471  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem

 1306 12:50:52.889076  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem

 1307 12:50:52.895549  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem

 1308 12:50:52.898917  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem

 1309 12:50:52.905030  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem

 1310 12:50:52.908953  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem

 1311 12:50:52.915284  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem

 1312 12:50:52.918613  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem

 1313 12:50:52.924926  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem

 1314 12:50:52.928095  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem

 1315 12:50:52.934549  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem

 1316 12:50:52.941444  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done

 1317 12:50:52.947952  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff

 1318 12:50:52.954083  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done

 1319 12:50:52.964059  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff

 1320 12:50:52.967336  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem

 1321 12:50:52.973896  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done

 1322 12:50:52.980257  Root Device assign_resources, bus 0 link: 0

 1323 12:50:52.983269  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1324 12:50:52.993178  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64

 1325 12:50:52.999596  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64

 1326 12:50:53.009325  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io

 1327 12:50:53.016037  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64

 1328 12:50:53.026255  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64

 1329 12:50:53.032159  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64

 1330 12:50:53.038846  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1331 12:50:53.042019  PCI: 00:14.0 assign_resources, bus 0 link: 0

 1332 12:50:53.052036  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64

 1333 12:50:53.058662  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64

 1334 12:50:53.068233  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64

 1335 12:50:53.074733  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64

 1336 12:50:53.081606  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1337 12:50:53.084685  PCI: 00:15.0 assign_resources, bus 1 link: 0

 1338 12:50:53.094488  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64

 1339 12:50:53.097587  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1340 12:50:53.101086  PCI: 00:15.1 assign_resources, bus 2 link: 0

 1341 12:50:53.110908  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64

 1342 12:50:53.117527  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem

 1343 12:50:53.127581  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem

 1344 12:50:53.133629  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io

 1345 12:50:53.140573  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io

 1346 12:50:53.150316  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io

 1347 12:50:53.156781  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem

 1348 12:50:53.166387  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64

 1349 12:50:53.169869  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1350 12:50:53.176265  PCI: 00:19.0 assign_resources, bus 3 link: 0

 1351 12:50:53.182847  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io

 1352 12:50:53.192841  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem

 1353 12:50:53.202834  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem

 1354 12:50:53.205769  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1355 12:50:53.212008  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64

 1356 12:50:53.219125  PCI: 00:1d.0 assign_resources, bus 1 link: 0

 1357 12:50:53.225446  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64

 1358 12:50:53.235429  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64

 1359 12:50:53.238387  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1360 12:50:53.245584  PCI: 00:1e.2 assign_resources, bus 4 link: 0

 1361 12:50:53.251833  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64

 1362 12:50:53.258192  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1363 12:50:53.261541  PCI: 00:1e.3 assign_resources, bus 5 link: 0

 1364 12:50:53.267694  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1365 12:50:53.271087  PCI: 00:1f.0 assign_resources, bus 0 link: 0

 1366 12:50:53.277670  LPC: Trying to open IO window from 800 size 1ff

 1367 12:50:53.284379  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64

 1368 12:50:53.293905  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64

 1369 12:50:53.300686  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64

 1370 12:50:53.310367  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem

 1371 12:50:53.313751  DOMAIN: 0000 assign_resources, bus 0 link: 0

 1372 12:50:53.320066  Root Device assign_resources, bus 0 link: 0

 1373 12:50:53.320498  Done setting resources.

 1374 12:50:53.326767  Show resources in subtree (Root Device)...After assigning values.

 1375 12:50:53.333192   Root Device child on link 0 CPU_CLUSTER: 0

 1376 12:50:53.336303    CPU_CLUSTER: 0 child on link 0 APIC: 00

 1377 12:50:53.336712     APIC: 00

 1378 12:50:53.339838     APIC: 03

 1379 12:50:53.340242     APIC: 07

 1380 12:50:53.340564     APIC: 01

 1381 12:50:53.342931     APIC: 02

 1382 12:50:53.343366     APIC: 05

 1383 12:50:53.345892     APIC: 04

 1384 12:50:53.346320     APIC: 06

 1385 12:50:53.349380    DOMAIN: 0000 child on link 0 PCI: 00:00.0

 1386 12:50:53.358988    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000

 1387 12:50:53.372322    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100

 1388 12:50:53.372754     PCI: 00:00.0

 1389 12:50:53.381705     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0

 1390 12:50:53.391831     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1

 1391 12:50:53.401730     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2

 1392 12:50:53.411790     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3

 1393 12:50:53.420834     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4

 1394 12:50:53.430762     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5

 1395 12:50:53.436983     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6

 1396 12:50:53.447550     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7

 1397 12:50:53.456934     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8

 1398 12:50:53.466942     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9

 1399 12:50:53.476249     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a

 1400 12:50:53.485909     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b

 1401 12:50:53.496085     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c

 1402 12:50:53.505986     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d

 1403 12:50:53.512106     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e

 1404 12:50:53.521947     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f

 1405 12:50:53.525821     PCI: 00:02.0

 1406 12:50:53.534884     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10

 1407 12:50:53.544980     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18

 1408 12:50:53.554579     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20

 1409 12:50:53.554669     PCI: 00:04.0

 1410 12:50:53.557651     PCI: 00:08.0

 1411 12:50:53.568023     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10

 1412 12:50:53.570718     PCI: 00:12.0

 1413 12:50:53.580938     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10

 1414 12:50:53.584023     PCI: 00:14.0 child on link 0 USB0 port 0

 1415 12:50:53.593941     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10

 1416 12:50:53.600507      USB0 port 0 child on link 0 USB2 port 0

 1417 12:50:53.600588       USB2 port 0

 1418 12:50:53.603557       USB2 port 1

 1419 12:50:53.603635       USB2 port 2

 1420 12:50:53.607049       USB2 port 3

 1421 12:50:53.607125       USB2 port 5

 1422 12:50:53.610058       USB2 port 6

 1423 12:50:53.610136       USB2 port 9

 1424 12:50:53.613741       USB3 port 0

 1425 12:50:53.613819       USB3 port 1

 1426 12:50:53.616792       USB3 port 2

 1427 12:50:53.619859       USB3 port 3

 1428 12:50:53.619934       USB3 port 4

 1429 12:50:53.623442     PCI: 00:14.2

 1430 12:50:53.632864     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10

 1431 12:50:53.642962     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18

 1432 12:50:53.643045     PCI: 00:14.3

 1433 12:50:53.656030     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10

 1434 12:50:53.659008     PCI: 00:15.0 child on link 0 I2C: 01:15

 1435 12:50:53.669257     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10

 1436 12:50:53.672324      I2C: 01:15

 1437 12:50:53.675409     PCI: 00:15.1 child on link 0 I2C: 02:5d

 1438 12:50:53.685543     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10

 1439 12:50:53.685630      I2C: 02:5d

 1440 12:50:53.688603      GENERIC: 0.0

 1441 12:50:53.691577     PCI: 00:16.0

 1442 12:50:53.701407     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10

 1443 12:50:53.701488     PCI: 00:17.0

 1444 12:50:53.711335     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10

 1445 12:50:53.721213     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14

 1446 12:50:53.730786     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18

 1447 12:50:53.740644     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c

 1448 12:50:53.750741     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20

 1449 12:50:53.760530     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24

 1450 12:50:53.763457     PCI: 00:19.0 child on link 0 I2C: 03:1a

 1451 12:50:53.773106     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10

 1452 12:50:53.776753      I2C: 03:1a

 1453 12:50:53.776832      I2C: 03:38

 1454 12:50:53.779811      I2C: 03:39

 1455 12:50:53.779888      I2C: 03:3a

 1456 12:50:53.782728      I2C: 03:3b

 1457 12:50:53.786415     PCI: 00:1d.0 child on link 0 PCI: 01:00.0

 1458 12:50:53.795959     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c

 1459 12:50:53.805871     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24

 1460 12:50:53.815783     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20

 1461 12:50:53.818771      PCI: 01:00.0

 1462 12:50:53.828570      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10

 1463 12:50:53.832282     PCI: 00:1e.0

 1464 12:50:53.841707     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10

 1465 12:50:53.851350     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18

 1466 12:50:53.854853     PCI: 00:1e.2 child on link 0 SPI: 00

 1467 12:50:53.864284     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10

 1468 12:50:53.867810      SPI: 00

 1469 12:50:53.871249     PCI: 00:1e.3 child on link 0 SPI: 01

 1470 12:50:53.880858     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10

 1471 12:50:53.883884      SPI: 01

 1472 12:50:53.887544     PCI: 00:1f.0 child on link 0 PNP: 0c09.0

 1473 12:50:53.897309     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0

 1474 12:50:53.903909     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20

 1475 12:50:53.906763      PNP: 0c09.0

 1476 12:50:53.916699      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0

 1477 12:50:53.916782     PCI: 00:1f.3

 1478 12:50:53.926760     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10

 1479 12:50:53.936501     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20

 1480 12:50:53.939712     PCI: 00:1f.4

 1481 12:50:53.949737     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20

 1482 12:50:53.959022     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10

 1483 12:50:53.959105     PCI: 00:1f.5

 1484 12:50:53.968772     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10

 1485 12:50:53.972193  Done allocating resources.

 1486 12:50:53.978568  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0

 1487 12:50:53.982194  Enabling resources...

 1488 12:50:53.985218  PCI: 00:00.0 subsystem <- 8086/9b61

 1489 12:50:53.989008  PCI: 00:00.0 cmd <- 06

 1490 12:50:53.991910  PCI: 00:02.0 subsystem <- 8086/9b41

 1491 12:50:53.995484  PCI: 00:02.0 cmd <- 03

 1492 12:50:53.998734  PCI: 00:08.0 cmd <- 06

 1493 12:50:54.001624  PCI: 00:12.0 subsystem <- 8086/02f9

 1494 12:50:54.005073  PCI: 00:12.0 cmd <- 02

 1495 12:50:54.008160  PCI: 00:14.0 subsystem <- 8086/02ed

 1496 12:50:54.011638  PCI: 00:14.0 cmd <- 02

 1497 12:50:54.011750  PCI: 00:14.2 cmd <- 02

 1498 12:50:54.017965  PCI: 00:14.3 subsystem <- 8086/02f0

 1499 12:50:54.018107  PCI: 00:14.3 cmd <- 02

 1500 12:50:54.021057  PCI: 00:15.0 subsystem <- 8086/02e8

 1501 12:50:54.024672  PCI: 00:15.0 cmd <- 02

 1502 12:50:54.027610  PCI: 00:15.1 subsystem <- 8086/02e9

 1503 12:50:54.031335  PCI: 00:15.1 cmd <- 02

 1504 12:50:54.034296  PCI: 00:16.0 subsystem <- 8086/02e0

 1505 12:50:54.038284  PCI: 00:16.0 cmd <- 02

 1506 12:50:54.041328  PCI: 00:17.0 subsystem <- 8086/02d3

 1507 12:50:54.044222  PCI: 00:17.0 cmd <- 03

 1508 12:50:54.047839  PCI: 00:19.0 subsystem <- 8086/02c5

 1509 12:50:54.051212  PCI: 00:19.0 cmd <- 02

 1510 12:50:54.054442  PCI: 00:1d.0 bridge ctrl <- 0013

 1511 12:50:54.057703  PCI: 00:1d.0 subsystem <- 8086/02b0

 1512 12:50:54.061582  PCI: 00:1d.0 cmd <- 06

 1513 12:50:54.064065  PCI: 00:1e.0 subsystem <- 8086/02a8

 1514 12:50:54.066961  PCI: 00:1e.0 cmd <- 06

 1515 12:50:54.070681  PCI: 00:1e.2 subsystem <- 8086/02aa

 1516 12:50:54.073809  PCI: 00:1e.2 cmd <- 06

 1517 12:50:54.077085  PCI: 00:1e.3 subsystem <- 8086/02ab

 1518 12:50:54.080593  PCI: 00:1e.3 cmd <- 02

 1519 12:50:54.083469  PCI: 00:1f.0 subsystem <- 8086/0284

 1520 12:50:54.083966  PCI: 00:1f.0 cmd <- 407

 1521 12:50:54.090161  PCI: 00:1f.3 subsystem <- 8086/02c8

 1522 12:50:54.090655  PCI: 00:1f.3 cmd <- 02

 1523 12:50:54.096758  PCI: 00:1f.4 subsystem <- 8086/02a3

 1524 12:50:54.097212  PCI: 00:1f.4 cmd <- 03

 1525 12:50:54.099799  PCI: 00:1f.5 subsystem <- 8086/02a4

 1526 12:50:54.103369  PCI: 00:1f.5 cmd <- 406

 1527 12:50:54.112761  PCI: 01:00.0 cmd <- 02

 1528 12:50:54.117848  done.

 1529 12:50:54.130804  ME: Version: 14.0.39.1367

 1530 12:50:54.137452  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12

 1531 12:50:54.141148  Initializing devices...

 1532 12:50:54.141715  Root Device init ...

 1533 12:50:54.147137  Chrome EC: Set SMI mask to 0x0000000000000000

 1534 12:50:54.153835  Chrome EC: clear events_b mask to 0x0000000000000000

 1535 12:50:54.156735  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006

 1536 12:50:54.163303  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006

 1537 12:50:54.170171  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006

 1538 12:50:54.173079  Chrome EC: Set WAKE mask to 0x0000000000000000

 1539 12:50:54.179596  Root Device init finished in 35237 usecs

 1540 12:50:54.183242  CPU_CLUSTER: 0 init ...

 1541 12:50:54.186186  CPU_CLUSTER: 0 init finished in 2447 usecs

 1542 12:50:54.191779  PCI: 00:00.0 init ...

 1543 12:50:54.195475  CPU TDP: 15 Watts

 1544 12:50:54.198490  CPU PL2 = 64 Watts

 1545 12:50:54.201865  PCI: 00:00.0 init finished in 7080 usecs

 1546 12:50:54.204869  PCI: 00:02.0 init ...

 1547 12:50:54.207864  PCI: 00:02.0 init finished in 2252 usecs

 1548 12:50:54.211709  PCI: 00:08.0 init ...

 1549 12:50:54.214562  PCI: 00:08.0 init finished in 2251 usecs

 1550 12:50:54.218005  PCI: 00:12.0 init ...

 1551 12:50:54.221707  PCI: 00:12.0 init finished in 2253 usecs

 1552 12:50:54.224407  PCI: 00:14.0 init ...

 1553 12:50:54.227844  PCI: 00:14.0 init finished in 2253 usecs

 1554 12:50:54.231010  PCI: 00:14.2 init ...

 1555 12:50:54.234511  PCI: 00:14.2 init finished in 2252 usecs

 1556 12:50:54.237837  PCI: 00:14.3 init ...

 1557 12:50:54.240871  PCI: 00:14.3 init finished in 2269 usecs

 1558 12:50:54.244555  PCI: 00:15.0 init ...

 1559 12:50:54.247487  DW I2C bus 0 at 0xd121f000 (400 KHz)

 1560 12:50:54.253662  PCI: 00:15.0 init finished in 5977 usecs

 1561 12:50:54.254142  PCI: 00:15.1 init ...

 1562 12:50:54.260639  DW I2C bus 1 at 0xd1220000 (400 KHz)

 1563 12:50:54.263699  PCI: 00:15.1 init finished in 5977 usecs

 1564 12:50:54.266844  PCI: 00:16.0 init ...

 1565 12:50:54.270380  PCI: 00:16.0 init finished in 2252 usecs

 1566 12:50:54.273456  PCI: 00:19.0 init ...

 1567 12:50:54.276955  DW I2C bus 4 at 0xd1222000 (400 KHz)

 1568 12:50:54.280096  PCI: 00:19.0 init finished in 5977 usecs

 1569 12:50:54.283165  PCI: 00:1d.0 init ...

 1570 12:50:54.286806  Initializing PCH PCIe bridge.

 1571 12:50:54.289705  PCI: 00:1d.0 init finished in 5284 usecs

 1572 12:50:54.294003  PCI: 00:1f.0 init ...

 1573 12:50:54.296935  IOAPIC: Initializing IOAPIC at 0xfec00000

 1574 12:50:54.303493  IOAPIC: Bootstrap Processor Local APIC = 0x00

 1575 12:50:54.303982  IOAPIC: ID = 0x02

 1576 12:50:54.306489  IOAPIC: Dumping registers

 1577 12:50:54.309317    reg 0x0000: 0x02000000

 1578 12:50:54.313004    reg 0x0001: 0x00770020

 1579 12:50:54.316102    reg 0x0002: 0x00000000

 1580 12:50:54.319962  PCI: 00:1f.0 init finished in 23514 usecs

 1581 12:50:54.322806  PCI: 00:1f.4 init ...

 1582 12:50:54.326436  PCI: 00:1f.4 init finished in 2262 usecs

 1583 12:50:54.337760  PCI: 01:00.0 init ...

 1584 12:50:54.340756  PCI: 01:00.0 init finished in 2252 usecs

 1585 12:50:54.345331  PNP: 0c09.0 init ...

 1586 12:50:54.348367  Google Chrome EC uptime: 11.048 seconds

 1587 12:50:54.355203  Google Chrome AP resets since EC boot: 0

 1588 12:50:54.358236  Google Chrome most recent AP reset causes:

 1589 12:50:54.364464  Google Chrome EC reset flags at last EC boot: reset-pin

 1590 12:50:54.368628  PNP: 0c09.0 init finished in 20570 usecs

 1591 12:50:54.371833  Devices initialized

 1592 12:50:54.374640  Show all devs... After init.

 1593 12:50:54.375123  Root Device: enabled 1

 1594 12:50:54.378244  CPU_CLUSTER: 0: enabled 1

 1595 12:50:54.381894  DOMAIN: 0000: enabled 1

 1596 12:50:54.384753  APIC: 00: enabled 1

 1597 12:50:54.385283  PCI: 00:00.0: enabled 1

 1598 12:50:54.388357  PCI: 00:02.0: enabled 1

 1599 12:50:54.391363  PCI: 00:04.0: enabled 0

 1600 12:50:54.391817  PCI: 00:05.0: enabled 0

 1601 12:50:54.394188  PCI: 00:12.0: enabled 1

 1602 12:50:54.397695  PCI: 00:12.5: enabled 0

 1603 12:50:54.400764  PCI: 00:12.6: enabled 0

 1604 12:50:54.401212  PCI: 00:14.0: enabled 1

 1605 12:50:54.404372  PCI: 00:14.1: enabled 0

 1606 12:50:54.407486  PCI: 00:14.3: enabled 1

 1607 12:50:54.410980  PCI: 00:14.5: enabled 0

 1608 12:50:54.411427  PCI: 00:15.0: enabled 1

 1609 12:50:54.414145  PCI: 00:15.1: enabled 1

 1610 12:50:54.417612  PCI: 00:15.2: enabled 0

 1611 12:50:54.420582  PCI: 00:15.3: enabled 0

 1612 12:50:54.421051  PCI: 00:16.0: enabled 1

 1613 12:50:54.424147  PCI: 00:16.1: enabled 0

 1614 12:50:54.426924  PCI: 00:16.2: enabled 0

 1615 12:50:54.430358  PCI: 00:16.3: enabled 0

 1616 12:50:54.430925  PCI: 00:16.4: enabled 0

 1617 12:50:54.433873  PCI: 00:16.5: enabled 0

 1618 12:50:54.436633  PCI: 00:17.0: enabled 1

 1619 12:50:54.440266  PCI: 00:19.0: enabled 1

 1620 12:50:54.440713  PCI: 00:19.1: enabled 0

 1621 12:50:54.443169  PCI: 00:19.2: enabled 0

 1622 12:50:54.446466  PCI: 00:1a.0: enabled 0

 1623 12:50:54.449897  PCI: 00:1c.0: enabled 0

 1624 12:50:54.450346  PCI: 00:1c.1: enabled 0

 1625 12:50:54.453065  PCI: 00:1c.2: enabled 0

 1626 12:50:54.456827  PCI: 00:1c.3: enabled 0

 1627 12:50:54.460060  PCI: 00:1c.4: enabled 0

 1628 12:50:54.460620  PCI: 00:1c.5: enabled 0

 1629 12:50:54.462877  PCI: 00:1c.6: enabled 0

 1630 12:50:54.466606  PCI: 00:1c.7: enabled 0

 1631 12:50:54.469423  PCI: 00:1d.0: enabled 1

 1632 12:50:54.469867  PCI: 00:1d.1: enabled 0

 1633 12:50:54.472896  PCI: 00:1d.2: enabled 0

 1634 12:50:54.476294  PCI: 00:1d.3: enabled 0

 1635 12:50:54.479374  PCI: 00:1d.4: enabled 0

 1636 12:50:54.479818  PCI: 00:1d.5: enabled 0

 1637 12:50:54.482489  PCI: 00:1e.0: enabled 1

 1638 12:50:54.485922  PCI: 00:1e.1: enabled 0

 1639 12:50:54.489476  PCI: 00:1e.2: enabled 1

 1640 12:50:54.489918  PCI: 00:1e.3: enabled 1

 1641 12:50:54.492519  PCI: 00:1f.0: enabled 1

 1642 12:50:54.495470  PCI: 00:1f.1: enabled 0

 1643 12:50:54.499059  PCI: 00:1f.2: enabled 0

 1644 12:50:54.499506  PCI: 00:1f.3: enabled 1

 1645 12:50:54.501811  PCI: 00:1f.4: enabled 1

 1646 12:50:54.505580  PCI: 00:1f.5: enabled 1

 1647 12:50:54.508707  PCI: 00:1f.6: enabled 0

 1648 12:50:54.509150  USB0 port 0: enabled 1

 1649 12:50:54.511739  I2C: 01:15: enabled 1

 1650 12:50:54.515234  I2C: 02:5d: enabled 1

 1651 12:50:54.515693  GENERIC: 0.0: enabled 1

 1652 12:50:54.518567  I2C: 03:1a: enabled 1

 1653 12:50:54.521895  I2C: 03:38: enabled 1

 1654 12:50:54.522335  I2C: 03:39: enabled 1

 1655 12:50:54.524981  I2C: 03:3a: enabled 1

 1656 12:50:54.527938  I2C: 03:3b: enabled 1

 1657 12:50:54.531515  PCI: 00:00.0: enabled 1

 1658 12:50:54.531959  SPI: 00: enabled 1

 1659 12:50:54.535066  SPI: 01: enabled 1

 1660 12:50:54.535517  PNP: 0c09.0: enabled 1

 1661 12:50:54.538093  USB2 port 0: enabled 1

 1662 12:50:54.541054  USB2 port 1: enabled 1

 1663 12:50:54.544611  USB2 port 2: enabled 0

 1664 12:50:54.545120  USB2 port 3: enabled 0

 1665 12:50:54.547607  USB2 port 5: enabled 0

 1666 12:50:54.550943  USB2 port 6: enabled 1

 1667 12:50:54.551455  USB2 port 9: enabled 1

 1668 12:50:54.554504  USB3 port 0: enabled 1

 1669 12:50:54.557650  USB3 port 1: enabled 1

 1670 12:50:54.560622  USB3 port 2: enabled 1

 1671 12:50:54.561141  USB3 port 3: enabled 1

 1672 12:50:54.564262  USB3 port 4: enabled 0

 1673 12:50:54.567226  APIC: 03: enabled 1

 1674 12:50:54.567669  APIC: 07: enabled 1

 1675 12:50:54.570405  APIC: 01: enabled 1

 1676 12:50:54.573894  APIC: 02: enabled 1

 1677 12:50:54.574338  APIC: 05: enabled 1

 1678 12:50:54.577466  APIC: 04: enabled 1

 1679 12:50:54.578009  APIC: 06: enabled 1

 1680 12:50:54.580630  PCI: 00:08.0: enabled 1

 1681 12:50:54.583614  PCI: 00:14.2: enabled 1

 1682 12:50:54.587259  PCI: 01:00.0: enabled 1

 1683 12:50:54.590578  Disabling ACPI via APMC:

 1684 12:50:54.593302  done.

 1685 12:50:54.596986  FMAP: area RW_ELOG found @ af0000 (16384 bytes)

 1686 12:50:54.600040  ELOG: NV offset 0xaf0000 size 0x4000

 1687 12:50:54.607244  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 1688 12:50:54.614229  ELOG: Event(17) added with size 13 at 2023-03-22 12:50:54 UTC

 1689 12:50:54.620700  POST: Unexpected post code in previous boot: 0x75

 1690 12:50:54.627167  ELOG: Event(A3) added with size 11 at 2023-03-22 12:50:54 UTC

 1691 12:50:54.633175  ELOG: Event(92) added with size 9 at 2023-03-22 12:50:54 UTC

 1692 12:50:54.640028  ELOG: Event(93) added with size 9 at 2023-03-22 12:50:54 UTC

 1693 12:50:54.646553  ELOG: Event(9A) added with size 9 at 2023-03-22 12:50:54 UTC

 1694 12:50:54.652778  ELOG: Event(9E) added with size 10 at 2023-03-22 12:50:54 UTC

 1695 12:50:54.656425  ELOG: Event(9F) added with size 14 at 2023-03-22 12:50:54 UTC

 1696 12:50:54.662670  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6

 1697 12:50:54.669171  ELOG: Event(A1) added with size 10 at 2023-03-22 12:50:54 UTC

 1698 12:50:54.679185  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 1699 12:50:54.682034  ELOG: Event(A0) added with size 9 at 2023-03-22 12:50:54 UTC

 1700 12:50:54.688699  elog_add_boot_reason: Logged dev mode boot

 1701 12:50:54.689186  Finalize devices...

 1702 12:50:54.691693  PCI: 00:17.0 final

 1703 12:50:54.694974  Devices finalized

 1704 12:50:54.698235  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)

 1705 12:50:54.704823  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0

 1706 12:50:54.708073  ME: HFSTS1                  : 0x90000245

 1707 12:50:54.711401  ME: HFSTS2                  : 0x3B850126

 1708 12:50:54.718360  ME: HFSTS3                  : 0x00000020

 1709 12:50:54.721426  ME: HFSTS4                  : 0x00004800

 1710 12:50:54.725051  ME: HFSTS5                  : 0x00000000

 1711 12:50:54.727644  ME: HFSTS6                  : 0x40400006

 1712 12:50:54.731348  ME: Manufacturing Mode      : NO

 1713 12:50:54.734487  ME: FW Partition Table      : OK

 1714 12:50:54.737293  ME: Bringup Loader Failure  : NO

 1715 12:50:54.740919  ME: Firmware Init Complete  : YES

 1716 12:50:54.744478  ME: Boot Options Present    : NO

 1717 12:50:54.750860  ME: Update In Progress      : NO

 1718 12:50:54.754153  ME: D0i3 Support            : YES

 1719 12:50:54.757081  ME: Low Power State Enabled : NO

 1720 12:50:54.760752  ME: CPU Replaced            : NO

 1721 12:50:54.763545  ME: CPU Replacement Valid   : YES

 1722 12:50:54.767304  ME: Current Working State   : 5

 1723 12:50:54.770217  ME: Current Operation State : 1

 1724 12:50:54.773409  ME: Current Operation Mode  : 0

 1725 12:50:54.776738  ME: Error Code              : 0

 1726 12:50:54.779916  ME: CPU Debug Disabled      : YES

 1727 12:50:54.782944  ME: TXT Support             : NO

 1728 12:50:54.786410  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0

 1729 12:50:54.792965  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1730 12:50:54.796323  CBFS @ c08000 size 3f8000

 1731 12:50:54.802483  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1732 12:50:54.805995  CBFS: Locating 'fallback/dsdt.aml'

 1733 12:50:54.809439  CBFS: Found @ offset 10bb80 size 3fa5

 1734 12:50:54.812728  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1735 12:50:54.816131  CBFS @ c08000 size 3f8000

 1736 12:50:54.822367  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1737 12:50:54.826088  CBFS: Locating 'fallback/slic'

 1738 12:50:54.829679  CBFS: 'fallback/slic' not found.

 1739 12:50:54.835863  ACPI: Writing ACPI tables at 99b3e000.

 1740 12:50:54.836438  ACPI:    * FACS

 1741 12:50:54.839615  ACPI:    * DSDT

 1742 12:50:54.842629  Ramoops buffer: 0x100000@0x99a3d000.

 1743 12:50:54.845706  FMAP: area RO_VPD found @ c00000 (16384 bytes)

 1744 12:50:54.852810  FMAP: area RW_VPD found @ af8000 (8192 bytes)

 1745 12:50:54.855376  Google Chrome EC: version:

 1746 12:50:54.858876  	ro: helios_v2.0.2659-56403530b

 1747 12:50:54.861767  	rw: helios_v2.0.2849-c41de27e7d

 1748 12:50:54.862230    running image: 1

 1749 12:50:54.866390  ACPI:    * FADT

 1750 12:50:54.866898  SCI is IRQ9

 1751 12:50:54.873136  ACPI: added table 1/32, length now 40

 1752 12:50:54.873697  ACPI:     * SSDT

 1753 12:50:54.876739  Found 1 CPU(s) with 8 core(s) each.

 1754 12:50:54.879765  Error: Could not locate 'wifi_sar' in VPD.

 1755 12:50:54.886693  Checking CBFS for default SAR values

 1756 12:50:54.889506  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1757 12:50:54.893120  CBFS @ c08000 size 3f8000

 1758 12:50:54.899665  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1759 12:50:54.902747  CBFS: Locating 'wifi_sar_defaults.hex'

 1760 12:50:54.906123  CBFS: Found @ offset 5fac0 size 77

 1761 12:50:54.909309  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3

 1762 12:50:54.915721  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15

 1763 12:50:54.918820  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d

 1764 12:50:54.925405  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a

 1765 12:50:54.929022  failed to find key in VPD: dsm_calib_r0_0

 1766 12:50:54.938437  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0

 1767 12:50:54.944980  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h

 1768 12:50:54.947960  failed to find key in VPD: dsm_calib_r0_1

 1769 12:50:54.957986  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0

 1770 12:50:54.961182  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h

 1771 12:50:54.964586  failed to find key in VPD: dsm_calib_r0_2

 1772 12:50:54.974296  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0

 1773 12:50:54.981011  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah

 1774 12:50:54.983849  failed to find key in VPD: dsm_calib_r0_3

 1775 12:50:54.993711  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0

 1776 12:50:54.997006  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh

 1777 12:50:55.003674  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00

 1778 12:50:55.006873  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01

 1779 12:50:55.010406  EC returned error result code 1

 1780 12:50:55.013635  EC returned error result code 1

 1781 12:50:55.020033  EC returned error result code 1

 1782 12:50:55.023235  PS2K: Bad resp from EC. Vivaldi disabled!

 1783 12:50:55.030143  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0

 1784 12:50:55.033322  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1

 1785 12:50:55.039817  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6

 1786 12:50:55.043308  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9

 1787 12:50:55.049875  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0

 1788 12:50:55.056098  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1

 1789 12:50:55.062352  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2

 1790 12:50:55.069247  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3

 1791 12:50:55.072813  ACPI: added table 2/32, length now 44

 1792 12:50:55.073393  ACPI:    * MCFG

 1793 12:50:55.075482  ACPI: added table 3/32, length now 48

 1794 12:50:55.079079  ACPI:    * TPM2

 1795 12:50:55.082111  TPM2 log created at 99a2d000

 1796 12:50:55.085169  ACPI: added table 4/32, length now 52

 1797 12:50:55.088931  ACPI:    * MADT

 1798 12:50:55.089377  SCI is IRQ9

 1799 12:50:55.091965  ACPI: added table 5/32, length now 56

 1800 12:50:55.094907  current = 99b43ac0

 1801 12:50:55.095354  ACPI:    * DMAR

 1802 12:50:55.098389  ACPI: added table 6/32, length now 60

 1803 12:50:55.101830  ACPI:    * IGD OpRegion

 1804 12:50:55.104719  GMA: Found VBT in CBFS

 1805 12:50:55.108412  GMA: Found valid VBT in CBFS

 1806 12:50:55.111537  ACPI: added table 7/32, length now 64

 1807 12:50:55.111988  ACPI:    * HPET

 1808 12:50:55.118303  ACPI: added table 8/32, length now 68

 1809 12:50:55.118811  ACPI: done.

 1810 12:50:55.121359  ACPI tables: 31744 bytes.

 1811 12:50:55.124937  smbios_write_tables: 99a2c000

 1812 12:50:55.127837  EC returned error result code 3

 1813 12:50:55.131302  Couldn't obtain OEM name from CBI

 1814 12:50:55.134376  Create SMBIOS type 17

 1815 12:50:55.137876  PCI: 00:00.0 (Intel Cannonlake)

 1816 12:50:55.138322  PCI: 00:14.3 (Intel WiFi)

 1817 12:50:55.141311  SMBIOS tables: 939 bytes.

 1818 12:50:55.148050  Writing table forward entry at 0x00000500

 1819 12:50:55.151058  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628

 1820 12:50:55.157550  Writing coreboot table at 0x99b62000

 1821 12:50:55.160601   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES

 1822 12:50:55.167000   1. 0000000000001000-000000000009ffff: RAM

 1823 12:50:55.170505   2. 00000000000a0000-00000000000fffff: RESERVED

 1824 12:50:55.173988   3. 0000000000100000-0000000099a2bfff: RAM

 1825 12:50:55.180351   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES

 1826 12:50:55.186921   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE

 1827 12:50:55.190763   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES

 1828 12:50:55.196546   7. 000000009a000000-000000009f7fffff: RESERVED

 1829 12:50:55.200535   8. 00000000e0000000-00000000efffffff: RESERVED

 1830 12:50:55.206901   9. 00000000fc000000-00000000fc000fff: RESERVED

 1831 12:50:55.209644  10. 00000000fe000000-00000000fe00ffff: RESERVED

 1832 12:50:55.216702  11. 00000000fed10000-00000000fed17fff: RESERVED

 1833 12:50:55.219467  12. 00000000fed80000-00000000fed83fff: RESERVED

 1834 12:50:55.226078  13. 00000000fed90000-00000000fed91fff: RESERVED

 1835 12:50:55.229263  14. 00000000feda0000-00000000feda1fff: RESERVED

 1836 12:50:55.232562  15. 0000000100000000-000000045e7fffff: RAM

 1837 12:50:55.238927  Graphics framebuffer located at 0xc0000000

 1838 12:50:55.242653  Passing 5 GPIOs to payload:

 1839 12:50:55.245667              NAME |       PORT | POLARITY |     VALUE

 1840 12:50:55.252344     write protect |  undefined |     high |       low

 1841 12:50:55.255225               lid |  undefined |     high |      high

 1842 12:50:55.262172             power |  undefined |     high |       low

 1843 12:50:55.268779             oprom |  undefined |     high |       low

 1844 12:50:55.271828          EC in RW | 0x000000cb |     high |       low

 1845 12:50:55.275232  Board ID: 4

 1846 12:50:55.278453  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1847 12:50:55.281885  CBFS @ c08000 size 3f8000

 1848 12:50:55.288039  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1849 12:50:55.294872  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum f861

 1850 12:50:55.297700  coreboot table: 1492 bytes.

 1851 12:50:55.301546  IMD ROOT    0. 99fff000 00001000

 1852 12:50:55.304417  IMD SMALL   1. 99ffe000 00001000

 1853 12:50:55.308033  FSP MEMORY  2. 99c4e000 003b0000

 1854 12:50:55.310827  CONSOLE     3. 99c2e000 00020000

 1855 12:50:55.314701  FMAP        4. 99c2d000 0000054e

 1856 12:50:55.317781  TIME STAMP  5. 99c2c000 00000910

 1857 12:50:55.320743  VBOOT WORK  6. 99c18000 00014000

 1858 12:50:55.324515  MRC DATA    7. 99c16000 00001958

 1859 12:50:55.327463  ROMSTG STCK 8. 99c15000 00001000

 1860 12:50:55.330390  AFTER CAR   9. 99c0b000 0000a000

 1861 12:50:55.333918  RAMSTAGE   10. 99baf000 0005c000

 1862 12:50:55.336702  REFCODE    11. 99b7a000 00035000

 1863 12:50:55.339964  SMM BACKUP 12. 99b6a000 00010000

 1864 12:50:55.343257  COREBOOT   13. 99b62000 00008000

 1865 12:50:55.347133  ACPI       14. 99b3e000 00024000

 1866 12:50:55.350237  ACPI GNVS  15. 99b3d000 00001000

 1867 12:50:55.353277  RAMOOPS    16. 99a3d000 00100000

 1868 12:50:55.356725  TPM2 TCGLOG17. 99a2d000 00010000

 1869 12:50:55.359557  SMBIOS     18. 99a2c000 00000800

 1870 12:50:55.363305  IMD small region:

 1871 12:50:55.366199    IMD ROOT    0. 99ffec00 00000400

 1872 12:50:55.369838    FSP RUNTIME 1. 99ffebe0 00000004

 1873 12:50:55.372745    EC HOSTEVENT 2. 99ffebc0 00000008

 1874 12:50:55.375748    POWER STATE 3. 99ffeb80 00000040

 1875 12:50:55.379399    ROMSTAGE    4. 99ffeb60 00000004

 1876 12:50:55.382772    MEM INFO    5. 99ffe9a0 000001b9

 1877 12:50:55.385977    VPD         6. 99ffe920 0000006c

 1878 12:50:55.389483  MTRR: Physical address space:

 1879 12:50:55.395640  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6

 1880 12:50:55.402744  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0

 1881 12:50:55.408658  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6

 1882 12:50:55.415459  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0

 1883 12:50:55.422194  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1

 1884 12:50:55.428632  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0

 1885 12:50:55.431494  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6

 1886 12:50:55.438392  MTRR: Fixed MSR 0x250 0x0606060606060606

 1887 12:50:55.441569  MTRR: Fixed MSR 0x258 0x0606060606060606

 1888 12:50:55.444644  MTRR: Fixed MSR 0x259 0x0000000000000000

 1889 12:50:55.447987  MTRR: Fixed MSR 0x268 0x0606060606060606

 1890 12:50:55.454363  MTRR: Fixed MSR 0x269 0x0606060606060606

 1891 12:50:55.458221  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1892 12:50:55.461153  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1893 12:50:55.464190  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1894 12:50:55.470671  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1895 12:50:55.474339  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1896 12:50:55.477429  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1897 12:50:55.481181  call enable_fixed_mtrr()

 1898 12:50:55.483944  CPU physical address size: 39 bits

 1899 12:50:55.490685  MTRR: default type WB/UC MTRR counts: 6/8.

 1900 12:50:55.493763  MTRR: WB selected as default type.

 1901 12:50:55.500098  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0

 1902 12:50:55.506844  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0

 1903 12:50:55.509813  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0

 1904 12:50:55.516576  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1

 1905 12:50:55.522934  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0

 1906 12:50:55.529369  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0

 1907 12:50:55.536295  MTRR: Fixed MSR 0x250 0x0606060606060606

 1908 12:50:55.539310  MTRR: Fixed MSR 0x258 0x0606060606060606

 1909 12:50:55.542159  MTRR: Fixed MSR 0x259 0x0000000000000000

 1910 12:50:55.545601  MTRR: Fixed MSR 0x268 0x0606060606060606

 1911 12:50:55.552124  MTRR: Fixed MSR 0x269 0x0606060606060606

 1912 12:50:55.555727  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1913 12:50:55.559038  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1914 12:50:55.562166  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1915 12:50:55.568949  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1916 12:50:55.571905  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1917 12:50:55.575237  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1918 12:50:55.575681  

 1919 12:50:55.578290  MTRR check

 1920 12:50:55.578772  Fixed MTRRs   : Enabled

 1921 12:50:55.581897  Variable MTRRs: Enabled

 1922 12:50:55.582337  

 1923 12:50:55.584814  call enable_fixed_mtrr()

 1924 12:50:55.591284  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2

 1925 12:50:55.594839  CPU physical address size: 39 bits

 1926 12:50:55.597622  FMAP: area COREBOOT found @ c08000 (4161536 bytes)

 1927 12:50:55.604202  MTRR: Fixed MSR 0x250 0x0606060606060606

 1928 12:50:55.607774  MTRR: Fixed MSR 0x250 0x0606060606060606

 1929 12:50:55.610759  MTRR: Fixed MSR 0x258 0x0606060606060606

 1930 12:50:55.614060  MTRR: Fixed MSR 0x259 0x0000000000000000

 1931 12:50:55.620811  MTRR: Fixed MSR 0x268 0x0606060606060606

 1932 12:50:55.623669  MTRR: Fixed MSR 0x269 0x0606060606060606

 1933 12:50:55.627352  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1934 12:50:55.630206  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1935 12:50:55.636874  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1936 12:50:55.639927  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1937 12:50:55.643630  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1938 12:50:55.646719  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1939 12:50:55.653301  MTRR: Fixed MSR 0x258 0x0606060606060606

 1940 12:50:55.656732  call enable_fixed_mtrr()

 1941 12:50:55.659653  MTRR: Fixed MSR 0x259 0x0000000000000000

 1942 12:50:55.663148  MTRR: Fixed MSR 0x268 0x0606060606060606

 1943 12:50:55.666223  MTRR: Fixed MSR 0x269 0x0606060606060606

 1944 12:50:55.672822  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1945 12:50:55.675731  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1946 12:50:55.679491  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1947 12:50:55.682269  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1948 12:50:55.688822  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1949 12:50:55.692313  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1950 12:50:55.695273  CPU physical address size: 39 bits

 1951 12:50:55.698738  call enable_fixed_mtrr()

 1952 12:50:55.702197  MTRR: Fixed MSR 0x250 0x0606060606060606

 1953 12:50:55.705343  MTRR: Fixed MSR 0x258 0x0606060606060606

 1954 12:50:55.711843  MTRR: Fixed MSR 0x259 0x0000000000000000

 1955 12:50:55.714783  MTRR: Fixed MSR 0x268 0x0606060606060606

 1956 12:50:55.718477  MTRR: Fixed MSR 0x269 0x0606060606060606

 1957 12:50:55.721517  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1958 12:50:55.728329  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1959 12:50:55.731247  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1960 12:50:55.734759  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1961 12:50:55.737754  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1962 12:50:55.744523  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1963 12:50:55.747471  MTRR: Fixed MSR 0x250 0x0606060606060606

 1964 12:50:55.751100  call enable_fixed_mtrr()

 1965 12:50:55.754174  MTRR: Fixed MSR 0x258 0x0606060606060606

 1966 12:50:55.757409  MTRR: Fixed MSR 0x259 0x0000000000000000

 1967 12:50:55.763902  MTRR: Fixed MSR 0x268 0x0606060606060606

 1968 12:50:55.767352  MTRR: Fixed MSR 0x269 0x0606060606060606

 1969 12:50:55.770280  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1970 12:50:55.774001  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1971 12:50:55.780469  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1972 12:50:55.783723  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1973 12:50:55.786750  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1974 12:50:55.790433  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1975 12:50:55.794084  CPU physical address size: 39 bits

 1976 12:50:55.796973  call enable_fixed_mtrr()

 1977 12:50:55.800378  CPU physical address size: 39 bits

 1978 12:50:55.803115  CPU physical address size: 39 bits

 1979 12:50:55.806555  CBFS @ c08000 size 3f8000

 1980 12:50:55.813206  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)

 1981 12:50:55.816735  CBFS: Locating 'fallback/payload'

 1982 12:50:55.819812  MTRR: Fixed MSR 0x250 0x0606060606060606

 1983 12:50:55.823625  MTRR: Fixed MSR 0x258 0x0606060606060606

 1984 12:50:55.829649  MTRR: Fixed MSR 0x259 0x0000000000000000

 1985 12:50:55.833250  MTRR: Fixed MSR 0x268 0x0606060606060606

 1986 12:50:55.836672  MTRR: Fixed MSR 0x269 0x0606060606060606

 1987 12:50:55.842922  MTRR: Fixed MSR 0x26a 0x0606060606060606

 1988 12:50:55.846329  MTRR: Fixed MSR 0x26b 0x0606060606060606

 1989 12:50:55.849494  MTRR: Fixed MSR 0x26c 0x0606060606060606

 1990 12:50:55.852902  MTRR: Fixed MSR 0x26d 0x0606060606060606

 1991 12:50:55.859101  MTRR: Fixed MSR 0x26e 0x0606060606060606

 1992 12:50:55.862636  MTRR: Fixed MSR 0x26f 0x0606060606060606

 1993 12:50:55.866051  MTRR: Fixed MSR 0x250 0x0606060606060606

 1994 12:50:55.869491  call enable_fixed_mtrr()

 1995 12:50:55.872389  MTRR: Fixed MSR 0x258 0x0606060606060606

 1996 12:50:55.875647  MTRR: Fixed MSR 0x259 0x0000000000000000

 1997 12:50:55.882260  MTRR: Fixed MSR 0x268 0x0606060606060606

 1998 12:50:55.885284  MTRR: Fixed MSR 0x269 0x0606060606060606

 1999 12:50:55.888910  MTRR: Fixed MSR 0x26a 0x0606060606060606

 2000 12:50:55.892509  MTRR: Fixed MSR 0x26b 0x0606060606060606

 2001 12:50:55.898507  MTRR: Fixed MSR 0x26c 0x0606060606060606

 2002 12:50:55.902056  MTRR: Fixed MSR 0x26d 0x0606060606060606

 2003 12:50:55.905043  MTRR: Fixed MSR 0x26e 0x0606060606060606

 2004 12:50:55.908806  MTRR: Fixed MSR 0x26f 0x0606060606060606

 2005 12:50:55.915258  CPU physical address size: 39 bits

 2006 12:50:55.918685  call enable_fixed_mtrr()

 2007 12:50:55.921508  CBFS: Found @ offset 1c96c0 size 3f798

 2008 12:50:55.924561  CPU physical address size: 39 bits

 2009 12:50:55.928280  Checking segment from ROM address 0xffdd16f8

 2010 12:50:55.934231  Checking segment from ROM address 0xffdd1714

 2011 12:50:55.938136  Loading segment from ROM address 0xffdd16f8

 2012 12:50:55.940974    code (compression=0)

 2013 12:50:55.947315    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760

 2014 12:50:55.957091  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760

 2015 12:50:55.957549  it's not compressed!

 2016 12:50:56.051003  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730

 2017 12:50:56.058013  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0

 2018 12:50:56.064119  Loading segment from ROM address 0xffdd1714

 2019 12:50:56.064739    Entry Point 0x30000000

 2020 12:50:56.066888  Loaded segments

 2021 12:50:56.073481  Finalizing chipset.

 2022 12:50:56.076140  Finalizing SMM.

 2023 12:50:56.079757  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5

 2024 12:50:56.083140  mp_park_aps done after 0 msecs.

 2025 12:50:56.089650  Jumping to boot code at 30000000(99b62000)

 2026 12:50:56.096033  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes

 2027 12:50:56.096638  

 2028 12:50:56.097092  

 2029 12:50:56.097457  

 2030 12:50:56.099287  Starting depthcharge on Helios...

 2031 12:50:56.100513  end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
 2032 12:50:56.101088  start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
 2033 12:50:56.101556  Setting prompt string to ['hatch:']
 2034 12:50:56.102036  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
 2035 12:50:56.102854  

 2036 12:50:56.109114  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!

 2037 12:50:56.109715  

 2038 12:50:56.115530  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!

 2039 12:50:56.116146  

 2040 12:50:56.122397  board_setup: Info: eMMC controller not present; skipping

 2041 12:50:56.123022  

 2042 12:50:56.125331  New NVMe Controller 0x30053ac0 @ 00:1d:00

 2043 12:50:56.125825  

 2044 12:50:56.131725  board_setup: Info: SDHCI controller not present; skipping

 2045 12:50:56.132309  

 2046 12:50:56.138503  vboot_create_vbsd: creating legacy VbSharedDataHeader structure

 2047 12:50:56.139150  

 2048 12:50:56.139546  Wipe memory regions:

 2049 12:50:56.141630  

 2050 12:50:56.145406  	[0x00000000001000, 0x000000000a0000)

 2051 12:50:56.146010  

 2052 12:50:56.148150  	[0x00000000100000, 0x00000030000000)

 2053 12:50:56.211157  

 2054 12:50:56.213902  	[0x00000030657430, 0x00000099a2c000)

 2055 12:50:56.351173  

 2056 12:50:56.354853  	[0x00000100000000, 0x0000045e800000)

 2057 12:50:57.737261  

 2058 12:50:57.737860  R8152: Initializing

 2059 12:50:57.738313  

 2060 12:50:57.740047  Version 9 (ocp_data = 6010)

 2061 12:50:57.744650  

 2062 12:50:57.745145  R8152: Done initializing

 2063 12:50:57.745534  

 2064 12:50:57.747712  Adding net device

 2065 12:50:58.352553  

 2066 12:50:58.353149  R8152: Initializing

 2067 12:50:58.353566  

 2068 12:50:58.355201  Version 6 (ocp_data = 5c30)

 2069 12:50:58.355684  

 2070 12:50:58.358849  R8152: Done initializing

 2071 12:50:58.359331  

 2072 12:50:58.364843  net_add_device: Attemp to include the same device

 2073 12:50:58.365336  

 2074 12:50:58.372507  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58

 2075 12:50:58.373029  

 2076 12:50:58.373433  

 2077 12:50:58.373831  

 2078 12:50:58.374619  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2080 12:50:58.476312  hatch: tftpboot 192.168.201.1 9729671/tftp-deploy-zrjhb4v8/kernel/bzImage 9729671/tftp-deploy-zrjhb4v8/kernel/cmdline 9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz

 2081 12:50:58.477013  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2082 12:50:58.477558  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
 2083 12:50:58.481562  tftpboot 192.168.201.1 9729671/tftp-deploy-zrjhb4v8/kernel/bzImoy-zrjhb4v8/kernel/cmdline 9729671/tftp-deploy-zrjhb4v8/ramdisk/ramdisk.cpio.gz

 2084 12:50:58.482045  

 2085 12:50:58.482431  Waiting for link

 2086 12:50:58.682597  

 2087 12:50:58.683190  done.

 2088 12:50:58.683587  

 2089 12:50:58.683961  MAC: 00:24:32:30:7f:7f

 2090 12:50:58.684321  

 2091 12:50:58.685894  Sending DHCP discover... done.

 2092 12:50:58.686429  

 2093 12:50:58.688671  Waiting for reply... done.

 2094 12:50:58.689167  

 2095 12:50:58.692022  Sending DHCP request... done.

 2096 12:50:58.692538  

 2097 12:50:58.695700  Waiting for reply... done.

 2098 12:50:58.696199  

 2099 12:50:58.698666  My ip is 192.168.201.15

 2100 12:50:58.699170  

 2101 12:50:58.702264  The DHCP server ip is 192.168.201.1

 2102 12:50:58.702905  

 2103 12:50:58.705379  TFTP server IP predefined by user: 192.168.201.1

 2104 12:50:58.708717  

 2105 12:50:58.715187  Bootfile predefined by user: 9729671/tftp-deploy-zrjhb4v8/kernel/bzImage

 2106 12:50:58.715695  

 2107 12:50:58.718600  Sending tftp read request... done.

 2108 12:50:58.719124  

 2109 12:50:58.721543  Waiting for the transfer... 

 2110 12:50:58.722064  

 2111 12:50:59.395625  00000000 ################################################################

 2112 12:50:59.396301  

 2113 12:51:00.078066  00080000 ################################################################

 2114 12:51:00.078210  

 2115 12:51:00.649194  00100000 ################################################################

 2116 12:51:00.649809  

 2117 12:51:01.296395  00180000 ################################################################

 2118 12:51:01.296930  

 2119 12:51:01.955519  00200000 ################################################################

 2120 12:51:01.956044  

 2121 12:51:02.626685  00280000 ################################################################

 2122 12:51:02.627277  

 2123 12:51:03.225549  00300000 ################################################################

 2124 12:51:03.225689  

 2125 12:51:03.875944  00380000 ################################################################

 2126 12:51:03.876529  

 2127 12:51:04.541847  00400000 ################################################################

 2128 12:51:04.541999  

 2129 12:51:05.212112  00480000 ################################################################

 2130 12:51:05.212640  

 2131 12:51:05.889225  00500000 ################################################################

 2132 12:51:05.889748  

 2133 12:51:06.427702  00580000 ################################################################

 2134 12:51:06.427854  

 2135 12:51:06.966213  00600000 ################################################################

 2136 12:51:06.966361  

 2137 12:51:07.517650  00680000 ################################################################

 2138 12:51:07.517826  

 2139 12:51:08.045629  00700000 ################################################################

 2140 12:51:08.045795  

 2141 12:51:08.592226  00780000 ################################################################

 2142 12:51:08.592368  

 2143 12:51:09.131783  00800000 ################################################################

 2144 12:51:09.131942  

 2145 12:51:09.651484  00880000 ################################################################

 2146 12:51:09.651632  

 2147 12:51:10.162259  00900000 ################################################################

 2148 12:51:10.162426  

 2149 12:51:10.679262  00980000 ################################################################

 2150 12:51:10.679439  

 2151 12:51:11.201405  00a00000 ################################################################

 2152 12:51:11.201563  

 2153 12:51:11.729612  00a80000 ################################################################

 2154 12:51:11.729762  

 2155 12:51:11.843316  00b00000 ############## done.

 2156 12:51:11.843479  

 2157 12:51:11.846679  The bootfile was 11646080 bytes long.

 2158 12:51:11.846818  

 2159 12:51:11.849578  Sending tftp read request... done.

 2160 12:51:11.849682  

 2161 12:51:11.853220  Waiting for the transfer... 

 2162 12:51:11.853385  

 2163 12:51:12.377920  00000000 ################################################################

 2164 12:51:12.378089  

 2165 12:51:12.910913  00080000 ################################################################

 2166 12:51:12.911076  

 2167 12:51:13.442647  00100000 ################################################################

 2168 12:51:13.442837  

 2169 12:51:13.974892  00180000 ################################################################

 2170 12:51:13.975035  

 2171 12:51:14.486328  00200000 ################################################################

 2172 12:51:14.486503  

 2173 12:51:15.080632  00280000 ################################################################

 2174 12:51:15.080797  

 2175 12:51:15.623917  00300000 ################################################################

 2176 12:51:15.624067  

 2177 12:51:16.160731  00380000 ################################################################

 2178 12:51:16.160870  

 2179 12:51:16.693557  00400000 ################################################################

 2180 12:51:16.693725  

 2181 12:51:17.220294  00480000 ################################################################

 2182 12:51:17.220442  

 2183 12:51:17.755374  00500000 ################################################################

 2184 12:51:17.755532  

 2185 12:51:18.172860  00580000 ################################################# done.

 2186 12:51:18.173007  

 2187 12:51:18.176731  Sending tftp read request... done.

 2188 12:51:18.176820  

 2189 12:51:18.179707  Waiting for the transfer... 

 2190 12:51:18.179795  

 2191 12:51:18.179864  00000000 # done.

 2192 12:51:18.179931  

 2193 12:51:18.189379  Command line loaded dynamically from TFTP file: 9729671/tftp-deploy-zrjhb4v8/kernel/cmdline

 2194 12:51:18.189472  

 2195 12:51:18.215580  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729671/extract-nfsrootfs-0j32cf6f,tcp,hard ip=dhcp tftpserverip=192.168.201.1

 2196 12:51:18.215696  

 2197 12:51:18.221713  ec_init(0): CrosEC protocol v3 supported (256, 256)

 2198 12:51:18.226652  

 2199 12:51:18.229738  Shutting down all USB controllers.

 2200 12:51:18.229826  

 2201 12:51:18.229894  Removing current net device

 2202 12:51:18.238298  

 2203 12:51:18.238396  Finalizing coreboot

 2204 12:51:18.238465  

 2205 12:51:18.244239  Exiting depthcharge with code 4 at timestamp: 29504893

 2206 12:51:18.244331  

 2207 12:51:18.244401  

 2208 12:51:18.244465  Starting kernel ...

 2209 12:51:18.244527  

 2210 12:51:18.244587  

 2211 12:51:18.244970  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2212 12:51:18.245073  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2213 12:51:18.245150  Setting prompt string to ['Linux version [0-9]']
 2214 12:51:18.245221  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2215 12:51:18.245292  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2217 12:55:38.245337  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2219 12:55:38.245568  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2221 12:55:38.245736  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2224 12:55:38.246018  end: 2 depthcharge-action (duration 00:05:00) [common]
 2226 12:55:38.246248  Cleaning after the job
 2227 12:55:38.246337  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/ramdisk
 2228 12:55:38.246880  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/kernel
 2229 12:55:38.247636  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/nfsrootfs
 2230 12:55:38.286146  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729671/tftp-deploy-zrjhb4v8/modules
 2231 12:55:38.286696  start: 4.1 power-off (timeout 00:00:30) [common]
 2232 12:55:38.286872  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-2' '--port=1' '--command=off'
 2233 12:55:38.356019  >> Command sent successfully.

 2234 12:55:38.358234  Returned 0 in 0 seconds
 2235 12:55:38.458684  end: 4.1 power-off (duration 00:00:00) [common]
 2237 12:55:38.459110  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2238 12:55:38.459375  Listened to connection for namespace 'common' for up to 1s
 2240 12:55:38.459786  Listened to connection for namespace 'common' for up to 1s
 2241 12:55:38.461957  Listened to connection for namespace 'common' for up to 1s
 2242 12:55:38.464825  Listened to connection for namespace 'common' for up to 1s
 2243 12:55:38.468530  Listened to connection for namespace 'common' for up to 1s
 2244 12:55:38.471662  Listened to connection for namespace 'common' for up to 1s
 2245 12:55:38.475239  Listened to connection for namespace 'common' for up to 1s
 2246 12:55:38.478238  Listened to connection for namespace 'common' for up to 1s
 2247 12:55:38.481211  Listened to connection for namespace 'common' for up to 1s
 2248 12:55:38.484787  Listened to connection for namespace 'common' for up to 1s
 2249 12:55:38.488224  Listened to connection for namespace 'common' for up to 1s
 2250 12:55:38.491170  Listened to connection for namespace 'common' for up to 1s
 2251 12:55:38.494762  Listened to connection for namespace 'common' for up to 1s
 2252 12:55:38.497944  Listened to connection for namespace 'common' for up to 1s
 2253 12:55:38.501124  Listened to connection for namespace 'common' for up to 1s
 2254 12:55:38.504696  Listened to connection for namespace 'common' for up to 1s
 2255 12:55:38.507668  Listened to connection for namespace 'common' for up to 1s
 2256 12:55:38.510802  Listened to connection for namespace 'common' for up to 1s
 2257 12:55:38.514552  Listened to connection for namespace 'common' for up to 1s
 2258 12:55:38.517696  Listened to connection for namespace 'common' for up to 1s
 2259 12:55:38.520774  Listened to connection for namespace 'common' for up to 1s
 2260 12:55:38.524297  Listened to connection for namespace 'common' for up to 1s
 2261 12:55:38.527773  Listened to connection for namespace 'common' for up to 1s
 2262 12:55:38.530805  Listened to connection for namespace 'common' for up to 1s
 2263 12:55:38.534447  Listened to connection for namespace 'common' for up to 1s
 2264 12:55:38.537616  Listened to connection for namespace 'common' for up to 1s
 2265 12:55:38.540748  Listened to connection for namespace 'common' for up to 1s
 2266 12:55:38.544454  Listened to connection for namespace 'common' for up to 1s
 2267 12:55:38.547566  Listened to connection for namespace 'common' for up to 1s
 2268 12:55:38.550677  Listened to connection for namespace 'common' for up to 1s
 2269 12:55:38.554426  Listened to connection for namespace 'common' for up to 1s
 2270 12:55:38.557191  Listened to connection for namespace 'common' for up to 1s
 2271 12:55:38.560746  Listened to connection for namespace 'common' for up to 1s
 2272 12:55:38.563853  Listened to connection for namespace 'common' for up to 1s
 2273 12:55:38.567197  Listened to connection for namespace 'common' for up to 1s
 2274 12:55:38.570233  Listened to connection for namespace 'common' for up to 1s
 2275 12:55:38.573860  Listened to connection for namespace 'common' for up to 1s
 2276 12:55:38.576978  Listened to connection for namespace 'common' for up to 1s
 2277 12:55:38.580566  Listened to connection for namespace 'common' for up to 1s
 2278 12:55:38.583684  Listened to connection for namespace 'common' for up to 1s
 2279 12:55:38.586627  Listened to connection for namespace 'common' for up to 1s
 2280 12:55:38.590060  Listened to connection for namespace 'common' for up to 1s
 2281 12:55:38.593516  Listened to connection for namespace 'common' for up to 1s
 2282 12:55:38.596480  Listened to connection for namespace 'common' for up to 1s
 2283 12:55:38.600151  Listened to connection for namespace 'common' for up to 1s
 2284 12:55:38.603360  Listened to connection for namespace 'common' for up to 1s
 2285 12:55:38.606383  Listened to connection for namespace 'common' for up to 1s
 2286 12:55:38.609881  Listened to connection for namespace 'common' for up to 1s
 2287 12:55:38.612962  Listened to connection for namespace 'common' for up to 1s
 2288 12:55:38.616161  Listened to connection for namespace 'common' for up to 1s
 2289 12:55:38.619937  Listened to connection for namespace 'common' for up to 1s
 2290 12:55:38.622981  Listened to connection for namespace 'common' for up to 1s
 2291 12:55:38.626118  Listened to connection for namespace 'common' for up to 1s
 2292 12:55:38.629589  Listened to connection for namespace 'common' for up to 1s
 2293 12:55:38.633252  Listened to connection for namespace 'common' for up to 1s
 2294 12:55:38.636122  Listened to connection for namespace 'common' for up to 1s
 2295 12:55:38.639209  Listened to connection for namespace 'common' for up to 1s
 2296 12:55:38.643099  Listened to connection for namespace 'common' for up to 1s
 2297 12:55:38.645968  Listened to connection for namespace 'common' for up to 1s
 2298 12:55:38.649163  Listened to connection for namespace 'common' for up to 1s
 2299 12:55:38.652828  Listened to connection for namespace 'common' for up to 1s
 2300 12:55:38.655854  Listened to connection for namespace 'common' for up to 1s
 2301 12:55:38.659384  Listened to connection for namespace 'common' for up to 1s
 2302 12:55:38.662459  Listened to connection for namespace 'common' for up to 1s
 2303 12:55:38.665444  Listened to connection for namespace 'common' for up to 1s
 2304 12:55:38.668807  Listened to connection for namespace 'common' for up to 1s
 2305 12:55:38.672430  Listened to connection for namespace 'common' for up to 1s
 2306 12:55:38.675557  Listened to connection for namespace 'common' for up to 1s
 2307 12:55:38.678705  Listened to connection for namespace 'common' for up to 1s
 2308 12:55:38.682257  Listened to connection for namespace 'common' for up to 1s
 2309 12:55:38.685353  Listened to connection for namespace 'common' for up to 1s
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 2511 12:55:39.353148  Listened to connection for namespace 'common' for up to 1s
 2512 12:55:39.459866  Finalising connection for namespace 'common'
 2513 12:55:39.460047  Disconnecting from shell: Finalise
 2514 12:55:39.460128  
 2515 12:55:39.561020  end: 4.2 read-feedback (duration 00:00:01) [common]
 2516 12:55:39.561195  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729671
 2517 12:55:39.735216  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729671
 2518 12:55:39.735420  JobError: Your job cannot terminate cleanly.