Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:50:31.738463 lava-dispatcher, installed at version: 2023.01
2 12:50:31.738646 start: 0 validate
3 12:50:31.738773 Start time: 2023-03-22 12:50:31.738767+00:00 (UTC)
4 12:50:31.738891 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:50:31.739016 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:50:32.038978 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:50:32.039712 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:50:32.326164 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:50:32.326891 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:50:32.620591 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:50:32.621344 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:50:32.919958 validate duration: 1.18
14 12:50:32.921806 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:50:32.922446 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:50:32.923013 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:50:32.923568 Not decompressing ramdisk as can be used compressed.
18 12:50:32.924041 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:50:32.924472 saving as /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/ramdisk/initrd.cpio.gz
20 12:50:32.924845 total size: 5672849 (5MB)
21 12:50:32.929089 progress 0% (0MB)
22 12:50:32.937643 progress 5% (0MB)
23 12:50:32.946556 progress 10% (0MB)
24 12:50:32.951538 progress 15% (0MB)
25 12:50:32.955791 progress 20% (1MB)
26 12:50:32.959243 progress 25% (1MB)
27 12:50:32.962101 progress 30% (1MB)
28 12:50:32.964902 progress 35% (1MB)
29 12:50:32.967434 progress 40% (2MB)
30 12:50:32.969548 progress 45% (2MB)
31 12:50:32.971818 progress 50% (2MB)
32 12:50:32.973940 progress 55% (3MB)
33 12:50:32.975788 progress 60% (3MB)
34 12:50:32.977662 progress 65% (3MB)
35 12:50:32.979498 progress 70% (3MB)
36 12:50:32.981146 progress 75% (4MB)
37 12:50:32.982792 progress 80% (4MB)
38 12:50:32.984437 progress 85% (4MB)
39 12:50:32.985907 progress 90% (4MB)
40 12:50:32.987427 progress 95% (5MB)
41 12:50:32.988948 progress 100% (5MB)
42 12:50:32.989064 5MB downloaded in 0.06s (84.24MB/s)
43 12:50:32.989215 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:50:32.989467 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:50:32.989560 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:50:32.989650 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:50:32.989760 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:50:32.989836 saving as /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/kernel/bzImage
50 12:50:32.989904 total size: 11646080 (11MB)
51 12:50:32.989968 No compression specified
52 12:50:32.990861 progress 0% (0MB)
53 12:50:32.993623 progress 5% (0MB)
54 12:50:32.996467 progress 10% (1MB)
55 12:50:32.999316 progress 15% (1MB)
56 12:50:33.002148 progress 20% (2MB)
57 12:50:33.004840 progress 25% (2MB)
58 12:50:33.007674 progress 30% (3MB)
59 12:50:33.010509 progress 35% (3MB)
60 12:50:33.013357 progress 40% (4MB)
61 12:50:33.016032 progress 45% (5MB)
62 12:50:33.018863 progress 50% (5MB)
63 12:50:33.021730 progress 55% (6MB)
64 12:50:33.024616 progress 60% (6MB)
65 12:50:33.027443 progress 65% (7MB)
66 12:50:33.030169 progress 70% (7MB)
67 12:50:33.033021 progress 75% (8MB)
68 12:50:33.035805 progress 80% (8MB)
69 12:50:33.038621 progress 85% (9MB)
70 12:50:33.041346 progress 90% (10MB)
71 12:50:33.044142 progress 95% (10MB)
72 12:50:33.047033 progress 100% (11MB)
73 12:50:33.047192 11MB downloaded in 0.06s (193.89MB/s)
74 12:50:33.047340 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:50:33.047576 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:50:33.047666 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:50:33.047752 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:50:33.047859 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:50:33.047929 saving as /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/nfsrootfs/full.rootfs.tar
81 12:50:33.047991 total size: 125916488 (120MB)
82 12:50:33.048053 Using unxz to decompress xz
83 12:50:33.051209 progress 0% (0MB)
84 12:50:33.496754 progress 5% (6MB)
85 12:50:33.949781 progress 10% (12MB)
86 12:50:34.406236 progress 15% (18MB)
87 12:50:34.866956 progress 20% (24MB)
88 12:50:35.199984 progress 25% (30MB)
89 12:50:35.545924 progress 30% (36MB)
90 12:50:35.802870 progress 35% (42MB)
91 12:50:35.991530 progress 40% (48MB)
92 12:50:36.348796 progress 45% (54MB)
93 12:50:36.709219 progress 50% (60MB)
94 12:50:37.047330 progress 55% (66MB)
95 12:50:37.398497 progress 60% (72MB)
96 12:50:37.730507 progress 65% (78MB)
97 12:50:38.112413 progress 70% (84MB)
98 12:50:38.530896 progress 75% (90MB)
99 12:50:38.945670 progress 80% (96MB)
100 12:50:39.043995 progress 85% (102MB)
101 12:50:39.204084 progress 90% (108MB)
102 12:50:39.530207 progress 95% (114MB)
103 12:50:39.897021 progress 100% (120MB)
104 12:50:39.902887 120MB downloaded in 6.85s (17.52MB/s)
105 12:50:39.903168 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:50:39.903434 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:50:39.903530 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:50:39.903623 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:50:39.903741 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:50:39.903817 saving as /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/modules/modules.tar
112 12:50:39.903883 total size: 497788 (0MB)
113 12:50:39.903946 Using unxz to decompress xz
114 12:50:39.906926 progress 6% (0MB)
115 12:50:39.907291 progress 13% (0MB)
116 12:50:39.907525 progress 19% (0MB)
117 12:50:39.908756 progress 26% (0MB)
118 12:50:39.910713 progress 32% (0MB)
119 12:50:39.912907 progress 39% (0MB)
120 12:50:39.914711 progress 46% (0MB)
121 12:50:39.916602 progress 52% (0MB)
122 12:50:39.918839 progress 59% (0MB)
123 12:50:39.920730 progress 65% (0MB)
124 12:50:39.922712 progress 72% (0MB)
125 12:50:39.924554 progress 78% (0MB)
126 12:50:39.926438 progress 85% (0MB)
127 12:50:39.928424 progress 92% (0MB)
128 12:50:39.930278 progress 98% (0MB)
129 12:50:39.937209 0MB downloaded in 0.03s (14.25MB/s)
130 12:50:39.937479 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:50:39.937747 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:50:39.937845 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 12:50:39.937943 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 12:50:41.671448 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729710/extract-nfsrootfs-hcuxq9ye
136 12:50:41.671655 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:50:41.671761 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 12:50:41.671937 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h
139 12:50:41.672043 makedir: /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin
140 12:50:41.672130 makedir: /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/tests
141 12:50:41.672214 makedir: /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/results
142 12:50:41.672345 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-add-keys
143 12:50:41.672511 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-add-sources
144 12:50:41.672628 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-background-process-start
145 12:50:41.672782 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-background-process-stop
146 12:50:41.672894 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-common-functions
147 12:50:41.673030 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-echo-ipv4
148 12:50:41.673154 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-install-packages
149 12:50:41.673264 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-installed-packages
150 12:50:41.673377 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-os-build
151 12:50:41.673495 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-probe-channel
152 12:50:41.673606 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-probe-ip
153 12:50:41.673715 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-target-ip
154 12:50:41.673824 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-target-mac
155 12:50:41.673932 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-target-storage
156 12:50:41.674045 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-case
157 12:50:41.674164 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-event
158 12:50:41.674303 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-feedback
159 12:50:41.674416 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-raise
160 12:50:41.674525 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-reference
161 12:50:41.674635 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-runner
162 12:50:41.674744 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-set
163 12:50:41.674876 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-test-shell
164 12:50:41.675053 Updating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-install-packages (oe)
165 12:50:41.675180 Updating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/bin/lava-installed-packages (oe)
166 12:50:41.675277 Creating /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/environment
167 12:50:41.675364 LAVA metadata
168 12:50:41.675435 - LAVA_JOB_ID=9729710
169 12:50:41.675500 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:50:41.675596 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 12:50:41.675662 skipped lava-vland-overlay
172 12:50:41.675738 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:50:41.675820 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 12:50:41.675892 skipped lava-multinode-overlay
175 12:50:41.675997 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:50:41.676078 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 12:50:41.676151 Loading test definitions
178 12:50:41.676243 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
179 12:50:41.676321 Using /lava-9729710 at stage 0
180 12:50:41.676448 Fetching tests from https://github.com/kernelci/test-definitions
181 12:50:41.676525 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/0/tests/0_ltp-ipc'
182 12:50:46.151242 Running '/usr/bin/git checkout kernelci.org
183 12:50:46.262255 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 12:50:46.263010 uuid=9729710_1.5.2.3.1 testdef=None
185 12:50:46.263172 end: 1.5.2.3.1 git-repo-action (duration 00:00:05) [common]
187 12:50:46.263436 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
188 12:50:46.264221 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:50:46.264518 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
191 12:50:46.265541 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:50:46.265799 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
194 12:50:46.266769 runner path: /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/0/tests/0_ltp-ipc test_uuid 9729710_1.5.2.3.1
195 12:50:46.266866 SKIPFILE='skipfile-lkft.yaml'
196 12:50:46.266934 SKIP_INSTALL='true'
197 12:50:46.266995 TST_CMDFILES='ipc'
198 12:50:46.267130 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:50:46.267352 Creating lava-test-runner.conf files
201 12:50:46.267418 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729710/lava-overlay-7hx3vz3h/lava-9729710/0 for stage 0
202 12:50:46.267504 - 0_ltp-ipc
203 12:50:46.267606 end: 1.5.2.3 test-definition (duration 00:00:05) [common]
204 12:50:46.267698 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
205 12:50:53.697311 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
206 12:50:53.697474 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
207 12:50:53.697570 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:50:53.697672 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
209 12:50:53.697773 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
210 12:50:53.804778 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:50:53.805131 start: 1.5.4 extract-modules (timeout 00:09:39) [common]
212 12:50:53.805245 extracting modules file /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729710/extract-nfsrootfs-hcuxq9ye
213 12:50:53.817936 extracting modules file /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729710/extract-overlay-ramdisk-aip742ul/ramdisk
214 12:50:53.830252 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:50:53.830376 start: 1.5.5 apply-overlay-tftp (timeout 00:09:39) [common]
216 12:50:53.830465 [common] Applying overlay to NFS
217 12:50:53.830537 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729710/compress-overlay-lhqzi20a/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729710/extract-nfsrootfs-hcuxq9ye
218 12:50:54.607224 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:50:54.607401 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
220 12:50:54.607502 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:50:54.607593 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
222 12:50:54.607678 Building ramdisk /var/lib/lava/dispatcher/tmp/9729710/extract-overlay-ramdisk-aip742ul/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729710/extract-overlay-ramdisk-aip742ul/ramdisk
223 12:50:54.649190 >> 31110 blocks
224 12:50:55.203370 rename /var/lib/lava/dispatcher/tmp/9729710/extract-overlay-ramdisk-aip742ul/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
225 12:50:55.203790 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:50:55.203911 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
227 12:50:55.204017 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
228 12:50:55.204114 No mkimage arch provided, not using FIT.
229 12:50:55.204207 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:50:55.204294 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:50:55.204439 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
232 12:50:55.204534 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
233 12:50:55.204616 No LXC device requested
234 12:50:55.204698 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:50:55.204786 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
236 12:50:55.204870 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:50:55.204939 Checking files for TFTP limit of 4294967296 bytes.
238 12:50:55.205318 end: 1 tftp-deploy (duration 00:00:22) [common]
239 12:50:55.205422 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:50:55.205517 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:50:55.205653 substitutions:
242 12:50:55.205723 - {DTB}: None
243 12:50:55.205788 - {INITRD}: 9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
244 12:50:55.205849 - {KERNEL}: 9729710/tftp-deploy-60l4399p/kernel/bzImage
245 12:50:55.205908 - {LAVA_MAC}: None
246 12:50:55.205966 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729710/extract-nfsrootfs-hcuxq9ye
247 12:50:55.206027 - {NFS_SERVER_IP}: 192.168.201.1
248 12:50:55.206085 - {PRESEED_CONFIG}: None
249 12:50:55.206154 - {PRESEED_LOCAL}: None
250 12:50:55.206217 - {RAMDISK}: 9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
251 12:50:55.206274 - {ROOT_PART}: None
252 12:50:55.206330 - {ROOT}: None
253 12:50:55.206385 - {SERVER_IP}: 192.168.201.1
254 12:50:55.206440 - {TEE}: None
255 12:50:55.206496 Parsed boot commands:
256 12:50:55.206550 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:50:55.206702 Parsed boot commands: tftpboot 192.168.201.1 9729710/tftp-deploy-60l4399p/kernel/bzImage 9729710/tftp-deploy-60l4399p/kernel/cmdline 9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
258 12:50:55.206793 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:50:55.206882 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:50:55.206978 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:50:55.207070 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:50:55.207140 Not connected, no need to disconnect.
263 12:50:55.207217 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:50:55.207302 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:50:55.207369 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
266 12:50:55.210311 Setting prompt string to ['lava-test: # ']
267 12:50:55.210603 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:50:55.210712 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:50:55.210809 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:50:55.210902 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:50:55.211078 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
272 12:51:00.352431 >> Command sent successfully.
273 12:51:00.358052 Returned 0 in 5 seconds
274 12:51:00.459226 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 12:51:00.460695 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 12:51:00.461195 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 12:51:00.461631 Setting prompt string to 'Starting depthcharge on Helios...'
279 12:51:00.461994 Changing prompt to 'Starting depthcharge on Helios...'
280 12:51:00.462430 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 12:51:00.463694 [Enter `^Ec?' for help]
282 12:51:01.074886
283 12:51:01.075496
284 12:51:01.085399 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 12:51:01.088282 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 12:51:01.095106 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 12:51:01.098230 CPU: AES supported, TXT NOT supported, VT supported
288 12:51:01.105098 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 12:51:01.108396 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 12:51:01.114973 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 12:51:01.118437 VBOOT: Loading verstage.
292 12:51:01.121810 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 12:51:01.128067 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 12:51:01.131893 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 12:51:01.134524 CBFS @ c08000 size 3f8000
296 12:51:01.141295 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 12:51:01.144678 CBFS: Locating 'fallback/verstage'
298 12:51:01.148165 CBFS: Found @ offset 10fb80 size 1072c
299 12:51:01.148778
300 12:51:01.151336
301 12:51:01.161534 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 12:51:01.175399 Probing TPM: . done!
303 12:51:01.179008 TPM ready after 0 ms
304 12:51:01.181994 Connected to device vid:did:rid of 1ae0:0028:00
305 12:51:01.192662 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
306 12:51:01.195996 Initialized TPM device CR50 revision 0
307 12:51:01.239445 tlcl_send_startup: Startup return code is 0
308 12:51:01.240034 TPM: setup succeeded
309 12:51:01.251962 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 12:51:01.255981 Chrome EC: UHEPI supported
311 12:51:01.259509 Phase 1
312 12:51:01.262921 FMAP: area GBB found @ c05000 (12288 bytes)
313 12:51:01.269585 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 12:51:01.272382 Phase 2
315 12:51:01.272916 Phase 3
316 12:51:01.276063 FMAP: area GBB found @ c05000 (12288 bytes)
317 12:51:01.282872 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 12:51:01.289188 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 12:51:01.292448 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 12:51:01.298826 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 12:51:01.314554 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
322 12:51:01.317726 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 12:51:01.324658 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 12:51:01.328665 Phase 4
325 12:51:01.331956 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
326 12:51:01.338581 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 12:51:01.518519 VB2:vb2_rsa_verify_digest() Digest check failed!
328 12:51:01.525565 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 12:51:01.526165 Saving nvdata
330 12:51:01.528459 Reboot requested (10020007)
331 12:51:01.531770 board_reset() called!
332 12:51:01.532419 full_reset() called!
333 12:51:06.041104
334 12:51:06.041266
335 12:51:06.050986 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 12:51:06.054270 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 12:51:06.060765 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 12:51:06.064050 CPU: AES supported, TXT NOT supported, VT supported
339 12:51:06.070606 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 12:51:06.074088 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 12:51:06.080542 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 12:51:06.083905 VBOOT: Loading verstage.
343 12:51:06.087242 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 12:51:06.094108 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 12:51:06.100526 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 12:51:06.100614 CBFS @ c08000 size 3f8000
347 12:51:06.107297 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 12:51:06.110901 CBFS: Locating 'fallback/verstage'
349 12:51:06.113706 CBFS: Found @ offset 10fb80 size 1072c
350 12:51:06.117551
351 12:51:06.117637
352 12:51:06.127974 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 12:51:06.142284 Probing TPM: . done!
354 12:51:06.145508 TPM ready after 0 ms
355 12:51:06.148997 Connected to device vid:did:rid of 1ae0:0028:00
356 12:51:06.159304 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
357 12:51:06.162321 Initialized TPM device CR50 revision 0
358 12:51:06.205906 tlcl_send_startup: Startup return code is 0
359 12:51:06.206016 TPM: setup succeeded
360 12:51:06.218802 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 12:51:06.222753 Chrome EC: UHEPI supported
362 12:51:06.226023 Phase 1
363 12:51:06.229173 FMAP: area GBB found @ c05000 (12288 bytes)
364 12:51:06.236091 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 12:51:06.242544 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 12:51:06.245809 Recovery requested (1009000e)
367 12:51:06.251885 Saving nvdata
368 12:51:06.257715 tlcl_extend: response is 0
369 12:51:06.266534 tlcl_extend: response is 0
370 12:51:06.273745 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 12:51:06.276872 CBFS @ c08000 size 3f8000
372 12:51:06.283571 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 12:51:06.286962 CBFS: Locating 'fallback/romstage'
374 12:51:06.289991 CBFS: Found @ offset 80 size 145fc
375 12:51:06.293343 Accumulated console time in verstage 98 ms
376 12:51:06.293430
377 12:51:06.293498
378 12:51:06.306471 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 12:51:06.313426 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 12:51:06.316379 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 12:51:06.319843 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 12:51:06.326677 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 12:51:06.329713 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 12:51:06.333055 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 12:51:06.336654 TCO_STS: 0000 0000
386 12:51:06.339662 GEN_PMCON: e0015238 00000200
387 12:51:06.343044 GBLRST_CAUSE: 00000000 00000000
388 12:51:06.343117 prev_sleep_state 5
389 12:51:06.346139 Boot Count incremented to 58029
390 12:51:06.352902 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:51:06.356503 CBFS @ c08000 size 3f8000
392 12:51:06.363207 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 12:51:06.363281 CBFS: Locating 'fspm.bin'
394 12:51:06.369695 CBFS: Found @ offset 5ffc0 size 71000
395 12:51:06.372910 Chrome EC: UHEPI supported
396 12:51:06.379307 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 12:51:06.383592 Probing TPM: done!
398 12:51:06.389968 Connected to device vid:did:rid of 1ae0:0028:00
399 12:51:06.399710 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
400 12:51:06.405823 Initialized TPM device CR50 revision 0
401 12:51:06.414957 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 12:51:06.421761 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 12:51:06.425004 MRC cache found, size 1948
404 12:51:06.428065 bootmode is set to: 2
405 12:51:06.431529 PRMRR disabled by config.
406 12:51:06.431601 SPD INDEX = 1
407 12:51:06.438193 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 12:51:06.441329 CBFS @ c08000 size 3f8000
409 12:51:06.447941 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 12:51:06.448021 CBFS: Locating 'spd.bin'
411 12:51:06.451513 CBFS: Found @ offset 5fb80 size 400
412 12:51:06.454448 SPD: module type is LPDDR3
413 12:51:06.457962 SPD: module part is
414 12:51:06.464777 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 12:51:06.467916 SPD: device width 4 bits, bus width 8 bits
416 12:51:06.471209 SPD: module size is 4096 MB (per channel)
417 12:51:06.474669 memory slot: 0 configuration done.
418 12:51:06.477595 memory slot: 2 configuration done.
419 12:51:06.529896 CBMEM:
420 12:51:06.533399 IMD: root @ 99fff000 254 entries.
421 12:51:06.536525 IMD: root @ 99ffec00 62 entries.
422 12:51:06.539828 External stage cache:
423 12:51:06.543408 IMD: root @ 9abff000 254 entries.
424 12:51:06.546377 IMD: root @ 9abfec00 62 entries.
425 12:51:06.550213 Chrome EC: clear events_b mask to 0x0000000020004000
426 12:51:06.565354 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 12:51:06.579270 tlcl_write: response is 0
428 12:51:06.587796 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 12:51:06.594263 MRC: TPM MRC hash updated successfully.
430 12:51:06.594777 2 DIMMs found
431 12:51:06.597585 SMM Memory Map
432 12:51:06.601126 SMRAM : 0x9a000000 0x1000000
433 12:51:06.604790 Subregion 0: 0x9a000000 0xa00000
434 12:51:06.607794 Subregion 1: 0x9aa00000 0x200000
435 12:51:06.611056 Subregion 2: 0x9ac00000 0x400000
436 12:51:06.614515 top_of_ram = 0x9a000000
437 12:51:06.617946 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 12:51:06.624128 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 12:51:06.627516 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 12:51:06.634187 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:51:06.637293 CBFS @ c08000 size 3f8000
442 12:51:06.640838 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:51:06.644253 CBFS: Locating 'fallback/postcar'
444 12:51:06.650882 CBFS: Found @ offset 107000 size 4b44
445 12:51:06.653983 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 12:51:06.666659 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 12:51:06.670142 Processing 180 relocs. Offset value of 0x97c0c000
448 12:51:06.678505 Accumulated console time in romstage 286 ms
449 12:51:06.678999
450 12:51:06.679385
451 12:51:06.688239 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 12:51:06.695200 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 12:51:06.698430 CBFS @ c08000 size 3f8000
454 12:51:06.701993 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 12:51:06.708211 CBFS: Locating 'fallback/ramstage'
456 12:51:06.711442 CBFS: Found @ offset 43380 size 1b9e8
457 12:51:06.718272 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 12:51:06.750114 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 12:51:06.753683 Processing 3976 relocs. Offset value of 0x98db0000
460 12:51:06.760364 Accumulated console time in postcar 52 ms
461 12:51:06.760866
462 12:51:06.761254
463 12:51:06.770486 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 12:51:06.777047 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 12:51:06.780137 WARNING: RO_VPD is uninitialized or empty.
466 12:51:06.783816 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 12:51:06.790848 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:51:06.791453 Normal boot.
469 12:51:06.797483 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 12:51:06.800183 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 12:51:06.803509 CBFS @ c08000 size 3f8000
472 12:51:06.810231 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 12:51:06.813564 CBFS: Locating 'cpu_microcode_blob.bin'
474 12:51:06.816446 CBFS: Found @ offset 14700 size 2ec00
475 12:51:06.820268 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 12:51:06.823602 Skip microcode update
477 12:51:06.826908 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 12:51:06.830020 CBFS @ c08000 size 3f8000
479 12:51:06.836658 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 12:51:06.839957 CBFS: Locating 'fsps.bin'
481 12:51:06.843276 CBFS: Found @ offset d1fc0 size 35000
482 12:51:06.868917 Detected 4 core, 8 thread CPU.
483 12:51:06.871813 Setting up SMI for CPU
484 12:51:06.875318 IED base = 0x9ac00000
485 12:51:06.875911 IED size = 0x00400000
486 12:51:06.878029 Will perform SMM setup.
487 12:51:06.884907 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 12:51:06.890935 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 12:51:06.894289 Processing 16 relocs. Offset value of 0x00030000
490 12:51:06.898245 Attempting to start 7 APs
491 12:51:06.901276 Waiting for 10ms after sending INIT.
492 12:51:06.917535 Waiting for 1st SIPI to complete...done.
493 12:51:06.917625 AP: slot 2 apic_id 1.
494 12:51:06.924219 Waiting for 2nd SIPI to complete...done.
495 12:51:06.924346 AP: slot 3 apic_id 6.
496 12:51:06.928052 AP: slot 5 apic_id 7.
497 12:51:06.931059 AP: slot 6 apic_id 5.
498 12:51:06.931146 AP: slot 7 apic_id 4.
499 12:51:06.934438 AP: slot 1 apic_id 3.
500 12:51:06.938147 AP: slot 4 apic_id 2.
501 12:51:06.944564 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 12:51:06.947684 Processing 13 relocs. Offset value of 0x00038000
503 12:51:06.953982 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 12:51:06.961033 Installing SMM handler to 0x9a000000
505 12:51:06.967622 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 12:51:06.970687 Processing 658 relocs. Offset value of 0x9a010000
507 12:51:06.980447 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 12:51:06.983940 Processing 13 relocs. Offset value of 0x9a008000
509 12:51:06.990634 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 12:51:06.997387 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 12:51:07.000757 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 12:51:07.007591 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 12:51:07.013644 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 12:51:07.020555 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 12:51:07.023972 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 12:51:07.030604 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 12:51:07.033778 Clearing SMI status registers
518 12:51:07.037063 SMI_STS: PM1
519 12:51:07.037150 PM1_STS: PWRBTN
520 12:51:07.040680 TCO_STS: SECOND_TO
521 12:51:07.043626 New SMBASE 0x9a000000
522 12:51:07.047127 In relocation handler: CPU 0
523 12:51:07.050392 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 12:51:07.053843 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:51:07.057130 Relocation complete.
526 12:51:07.060318 New SMBASE 0x99fff800
527 12:51:07.060439 In relocation handler: CPU 2
528 12:51:07.067238 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
529 12:51:07.070443 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 12:51:07.074177 Relocation complete.
531 12:51:07.074264 New SMBASE 0x99fff000
532 12:51:07.077128 In relocation handler: CPU 4
533 12:51:07.083690 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
534 12:51:07.087376 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 12:51:07.090261 Relocation complete.
536 12:51:07.090348 New SMBASE 0x99fffc00
537 12:51:07.093618 In relocation handler: CPU 1
538 12:51:07.100300 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
539 12:51:07.103496 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:51:07.106847 Relocation complete.
541 12:51:07.106933 New SMBASE 0x99fff400
542 12:51:07.110130 In relocation handler: CPU 3
543 12:51:07.113625 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
544 12:51:07.120130 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:51:07.123451 Relocation complete.
546 12:51:07.123560 New SMBASE 0x99ffec00
547 12:51:07.127243 In relocation handler: CPU 5
548 12:51:07.130596 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
549 12:51:07.137725 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:51:07.137967 Relocation complete.
551 12:51:07.140306 New SMBASE 0x99ffe400
552 12:51:07.143617 In relocation handler: CPU 7
553 12:51:07.147268 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
554 12:51:07.153748 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:51:07.154063 Relocation complete.
556 12:51:07.156972 New SMBASE 0x99ffe800
557 12:51:07.160266 In relocation handler: CPU 6
558 12:51:07.164156 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
559 12:51:07.170560 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 12:51:07.171056 Relocation complete.
561 12:51:07.173878 Initializing CPU #0
562 12:51:07.176889 CPU: vendor Intel device 806ec
563 12:51:07.180187 CPU: family 06, model 8e, stepping 0c
564 12:51:07.183786 Clearing out pending MCEs
565 12:51:07.186918 Setting up local APIC...
566 12:51:07.187412 apic_id: 0x00 done.
567 12:51:07.190560 Turbo is available but hidden
568 12:51:07.193529 Turbo is available and visible
569 12:51:07.197069 VMX status: enabled
570 12:51:07.200422 IA32_FEATURE_CONTROL status: locked
571 12:51:07.203663 Skip microcode update
572 12:51:07.204170 CPU #0 initialized
573 12:51:07.207170 Initializing CPU #2
574 12:51:07.207706 Initializing CPU #7
575 12:51:07.210340 Initializing CPU #6
576 12:51:07.213527 CPU: vendor Intel device 806ec
577 12:51:07.217061 CPU: family 06, model 8e, stepping 0c
578 12:51:07.220174 CPU: vendor Intel device 806ec
579 12:51:07.223640 CPU: family 06, model 8e, stepping 0c
580 12:51:07.226582 CPU: vendor Intel device 806ec
581 12:51:07.230149 CPU: family 06, model 8e, stepping 0c
582 12:51:07.233427 Clearing out pending MCEs
583 12:51:07.236887 Initializing CPU #4
584 12:51:07.237403 Initializing CPU #1
585 12:51:07.240148 CPU: vendor Intel device 806ec
586 12:51:07.243603 CPU: family 06, model 8e, stepping 0c
587 12:51:07.246742 CPU: vendor Intel device 806ec
588 12:51:07.253216 CPU: family 06, model 8e, stepping 0c
589 12:51:07.253723 Clearing out pending MCEs
590 12:51:07.256458 Clearing out pending MCEs
591 12:51:07.259765 Setting up local APIC...
592 12:51:07.263202 Clearing out pending MCEs
593 12:51:07.263697 Setting up local APIC...
594 12:51:07.267123 Setting up local APIC...
595 12:51:07.270109 Clearing out pending MCEs
596 12:51:07.273627 Setting up local APIC...
597 12:51:07.274148 apic_id: 0x01 done.
598 12:51:07.276307 apic_id: 0x02 done.
599 12:51:07.279727 apic_id: 0x03 done.
600 12:51:07.280221 VMX status: enabled
601 12:51:07.283281 VMX status: enabled
602 12:51:07.286651 IA32_FEATURE_CONTROL status: locked
603 12:51:07.289882 IA32_FEATURE_CONTROL status: locked
604 12:51:07.293215 Skip microcode update
605 12:51:07.293712 Skip microcode update
606 12:51:07.296681 CPU #4 initialized
607 12:51:07.299670 CPU #1 initialized
608 12:51:07.300161 Initializing CPU #5
609 12:51:07.303092 Initializing CPU #3
610 12:51:07.306686 CPU: vendor Intel device 806ec
611 12:51:07.309755 CPU: family 06, model 8e, stepping 0c
612 12:51:07.312869 CPU: vendor Intel device 806ec
613 12:51:07.316269 CPU: family 06, model 8e, stepping 0c
614 12:51:07.319972 Clearing out pending MCEs
615 12:51:07.323087 Clearing out pending MCEs
616 12:51:07.323600 Setting up local APIC...
617 12:51:07.326626 VMX status: enabled
618 12:51:07.329385 apic_id: 0x05 done.
619 12:51:07.329902 apic_id: 0x04 done.
620 12:51:07.332990 IA32_FEATURE_CONTROL status: locked
621 12:51:07.336097 VMX status: enabled
622 12:51:07.339881 VMX status: enabled
623 12:51:07.342939 IA32_FEATURE_CONTROL status: locked
624 12:51:07.346469 IA32_FEATURE_CONTROL status: locked
625 12:51:07.346977 Skip microcode update
626 12:51:07.349812 Skip microcode update
627 12:51:07.352827 Setting up local APIC...
628 12:51:07.353351 CPU #7 initialized
629 12:51:07.356167 Skip microcode update
630 12:51:07.359147 CPU #2 initialized
631 12:51:07.359679 CPU #6 initialized
632 12:51:07.362477 apic_id: 0x06 done.
633 12:51:07.365820 Setting up local APIC...
634 12:51:07.366318 VMX status: enabled
635 12:51:07.369310 apic_id: 0x07 done.
636 12:51:07.372794 IA32_FEATURE_CONTROL status: locked
637 12:51:07.376077 VMX status: enabled
638 12:51:07.376626 Skip microcode update
639 12:51:07.379175 IA32_FEATURE_CONTROL status: locked
640 12:51:07.382847 CPU #3 initialized
641 12:51:07.386048 Skip microcode update
642 12:51:07.386551 CPU #5 initialized
643 12:51:07.392778 bsp_do_flight_plan done after 466 msecs.
644 12:51:07.396164 CPU: frequency set to 4200 MHz
645 12:51:07.396817 Enabling SMIs.
646 12:51:07.397215 Locking SMM.
647 12:51:07.412146 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 12:51:07.415838 CBFS @ c08000 size 3f8000
649 12:51:07.422018 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 12:51:07.422604 CBFS: Locating 'vbt.bin'
651 12:51:07.425409 CBFS: Found @ offset 5f5c0 size 499
652 12:51:07.432405 Found a VBT of 4608 bytes after decompression
653 12:51:07.611862 Display FSP Version Info HOB
654 12:51:07.615287 Reference Code - CPU = 9.0.1e.30
655 12:51:07.618804 uCode Version = 0.0.0.ca
656 12:51:07.622102 TXT ACM version = ff.ff.ff.ffff
657 12:51:07.625499 Display FSP Version Info HOB
658 12:51:07.628358 Reference Code - ME = 9.0.1e.30
659 12:51:07.631708 MEBx version = 0.0.0.0
660 12:51:07.635826 ME Firmware Version = Consumer SKU
661 12:51:07.638465 Display FSP Version Info HOB
662 12:51:07.641988 Reference Code - CML PCH = 9.0.1e.30
663 12:51:07.642324 PCH-CRID Status = Disabled
664 12:51:07.648802 PCH-CRID Original Value = ff.ff.ff.ffff
665 12:51:07.652208 PCH-CRID New Value = ff.ff.ff.ffff
666 12:51:07.655467 OPROM - RST - RAID = ff.ff.ff.ffff
667 12:51:07.658960 ChipsetInit Base Version = ff.ff.ff.ffff
668 12:51:07.661814 ChipsetInit Oem Version = ff.ff.ff.ffff
669 12:51:07.665477 Display FSP Version Info HOB
670 12:51:07.671910 Reference Code - SA - System Agent = 9.0.1e.30
671 12:51:07.672440 Reference Code - MRC = 0.7.1.6c
672 12:51:07.675505 SA - PCIe Version = 9.0.1e.30
673 12:51:07.678762 SA-CRID Status = Disabled
674 12:51:07.682254 SA-CRID Original Value = 0.0.0.c
675 12:51:07.685702 SA-CRID New Value = 0.0.0.c
676 12:51:07.688931 OPROM - VBIOS = ff.ff.ff.ffff
677 12:51:07.689533 RTC Init
678 12:51:07.695545 Set power on after power failure.
679 12:51:07.696137 Disabling Deep S3
680 12:51:07.698985 Disabling Deep S3
681 12:51:07.699547 Disabling Deep S4
682 12:51:07.702100 Disabling Deep S4
683 12:51:07.702704 Disabling Deep S5
684 12:51:07.705566 Disabling Deep S5
685 12:51:07.711952 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 190 exit 1
686 12:51:07.712504 Enumerating buses...
687 12:51:07.718774 Show all devs... Before device enumeration.
688 12:51:07.719286 Root Device: enabled 1
689 12:51:07.722215 CPU_CLUSTER: 0: enabled 1
690 12:51:07.725152 DOMAIN: 0000: enabled 1
691 12:51:07.725732 APIC: 00: enabled 1
692 12:51:07.729112 PCI: 00:00.0: enabled 1
693 12:51:07.732027 PCI: 00:02.0: enabled 1
694 12:51:07.735561 PCI: 00:04.0: enabled 0
695 12:51:07.736255 PCI: 00:05.0: enabled 0
696 12:51:07.738891 PCI: 00:12.0: enabled 1
697 12:51:07.742497 PCI: 00:12.5: enabled 0
698 12:51:07.744996 PCI: 00:12.6: enabled 0
699 12:51:07.745564 PCI: 00:14.0: enabled 1
700 12:51:07.748453 PCI: 00:14.1: enabled 0
701 12:51:07.751605 PCI: 00:14.3: enabled 1
702 12:51:07.755134 PCI: 00:14.5: enabled 0
703 12:51:07.755692 PCI: 00:15.0: enabled 1
704 12:51:07.758274 PCI: 00:15.1: enabled 1
705 12:51:07.761995 PCI: 00:15.2: enabled 0
706 12:51:07.762498 PCI: 00:15.3: enabled 0
707 12:51:07.764891 PCI: 00:16.0: enabled 1
708 12:51:07.768393 PCI: 00:16.1: enabled 0
709 12:51:07.771888 PCI: 00:16.2: enabled 0
710 12:51:07.772417 PCI: 00:16.3: enabled 0
711 12:51:07.775006 PCI: 00:16.4: enabled 0
712 12:51:07.778093 PCI: 00:16.5: enabled 0
713 12:51:07.781597 PCI: 00:17.0: enabled 1
714 12:51:07.782095 PCI: 00:19.0: enabled 1
715 12:51:07.784831 PCI: 00:19.1: enabled 0
716 12:51:07.788220 PCI: 00:19.2: enabled 0
717 12:51:07.791555 PCI: 00:1a.0: enabled 0
718 12:51:07.792117 PCI: 00:1c.0: enabled 0
719 12:51:07.794925 PCI: 00:1c.1: enabled 0
720 12:51:07.798062 PCI: 00:1c.2: enabled 0
721 12:51:07.801208 PCI: 00:1c.3: enabled 0
722 12:51:07.801752 PCI: 00:1c.4: enabled 0
723 12:51:07.804626 PCI: 00:1c.5: enabled 0
724 12:51:07.808141 PCI: 00:1c.6: enabled 0
725 12:51:07.808806 PCI: 00:1c.7: enabled 0
726 12:51:07.811393 PCI: 00:1d.0: enabled 1
727 12:51:07.814907 PCI: 00:1d.1: enabled 0
728 12:51:07.818148 PCI: 00:1d.2: enabled 0
729 12:51:07.818754 PCI: 00:1d.3: enabled 0
730 12:51:07.821734 PCI: 00:1d.4: enabled 0
731 12:51:07.824536 PCI: 00:1d.5: enabled 1
732 12:51:07.827982 PCI: 00:1e.0: enabled 1
733 12:51:07.828508 PCI: 00:1e.1: enabled 0
734 12:51:07.831289 PCI: 00:1e.2: enabled 1
735 12:51:07.834770 PCI: 00:1e.3: enabled 1
736 12:51:07.838036 PCI: 00:1f.0: enabled 1
737 12:51:07.838600 PCI: 00:1f.1: enabled 1
738 12:51:07.841018 PCI: 00:1f.2: enabled 1
739 12:51:07.844765 PCI: 00:1f.3: enabled 1
740 12:51:07.845305 PCI: 00:1f.4: enabled 1
741 12:51:07.847905 PCI: 00:1f.5: enabled 1
742 12:51:07.851408 PCI: 00:1f.6: enabled 0
743 12:51:07.854391 USB0 port 0: enabled 1
744 12:51:07.854887 I2C: 00:15: enabled 1
745 12:51:07.857980 I2C: 00:5d: enabled 1
746 12:51:07.861447 GENERIC: 0.0: enabled 1
747 12:51:07.861942 I2C: 00:1a: enabled 1
748 12:51:07.864378 I2C: 00:38: enabled 1
749 12:51:07.867846 I2C: 00:39: enabled 1
750 12:51:07.868375 I2C: 00:3a: enabled 1
751 12:51:07.870960 I2C: 00:3b: enabled 1
752 12:51:07.874534 PCI: 00:00.0: enabled 1
753 12:51:07.875072 SPI: 00: enabled 1
754 12:51:07.877990 SPI: 01: enabled 1
755 12:51:07.881209 PNP: 0c09.0: enabled 1
756 12:51:07.881702 USB2 port 0: enabled 1
757 12:51:07.884185 USB2 port 1: enabled 1
758 12:51:07.887842 USB2 port 2: enabled 0
759 12:51:07.888367 USB2 port 3: enabled 0
760 12:51:07.891156 USB2 port 5: enabled 0
761 12:51:07.894429 USB2 port 6: enabled 1
762 12:51:07.898039 USB2 port 9: enabled 1
763 12:51:07.898631 USB3 port 0: enabled 1
764 12:51:07.901061 USB3 port 1: enabled 1
765 12:51:07.904293 USB3 port 2: enabled 1
766 12:51:07.904831 USB3 port 3: enabled 1
767 12:51:07.907712 USB3 port 4: enabled 0
768 12:51:07.910828 APIC: 03: enabled 1
769 12:51:07.911321 APIC: 01: enabled 1
770 12:51:07.914771 APIC: 06: enabled 1
771 12:51:07.917872 APIC: 02: enabled 1
772 12:51:07.918367 APIC: 07: enabled 1
773 12:51:07.920872 APIC: 05: enabled 1
774 12:51:07.921369 APIC: 04: enabled 1
775 12:51:07.924653 Compare with tree...
776 12:51:07.927560 Root Device: enabled 1
777 12:51:07.931062 CPU_CLUSTER: 0: enabled 1
778 12:51:07.931552 APIC: 00: enabled 1
779 12:51:07.934341 APIC: 03: enabled 1
780 12:51:07.937609 APIC: 01: enabled 1
781 12:51:07.938132 APIC: 06: enabled 1
782 12:51:07.940640 APIC: 02: enabled 1
783 12:51:07.944280 APIC: 07: enabled 1
784 12:51:07.944802 APIC: 05: enabled 1
785 12:51:07.947297 APIC: 04: enabled 1
786 12:51:07.950621 DOMAIN: 0000: enabled 1
787 12:51:07.954233 PCI: 00:00.0: enabled 1
788 12:51:07.954722 PCI: 00:02.0: enabled 1
789 12:51:07.957571 PCI: 00:04.0: enabled 0
790 12:51:07.960840 PCI: 00:05.0: enabled 0
791 12:51:07.963984 PCI: 00:12.0: enabled 1
792 12:51:07.967657 PCI: 00:12.5: enabled 0
793 12:51:07.968256 PCI: 00:12.6: enabled 0
794 12:51:07.971052 PCI: 00:14.0: enabled 1
795 12:51:07.974335 USB0 port 0: enabled 1
796 12:51:07.977036 USB2 port 0: enabled 1
797 12:51:07.980517 USB2 port 1: enabled 1
798 12:51:07.981030 USB2 port 2: enabled 0
799 12:51:07.984092 USB2 port 3: enabled 0
800 12:51:07.987165 USB2 port 5: enabled 0
801 12:51:07.990629 USB2 port 6: enabled 1
802 12:51:07.993600 USB2 port 9: enabled 1
803 12:51:07.997208 USB3 port 0: enabled 1
804 12:51:07.997857 USB3 port 1: enabled 1
805 12:51:08.000493 USB3 port 2: enabled 1
806 12:51:08.004256 USB3 port 3: enabled 1
807 12:51:08.006895 USB3 port 4: enabled 0
808 12:51:08.010593 PCI: 00:14.1: enabled 0
809 12:51:08.011088 PCI: 00:14.3: enabled 1
810 12:51:08.013467 PCI: 00:14.5: enabled 0
811 12:51:08.016877 PCI: 00:15.0: enabled 1
812 12:51:08.020801 I2C: 00:15: enabled 1
813 12:51:08.023690 PCI: 00:15.1: enabled 1
814 12:51:08.024291 I2C: 00:5d: enabled 1
815 12:51:08.027163 GENERIC: 0.0: enabled 1
816 12:51:08.030462 PCI: 00:15.2: enabled 0
817 12:51:08.033665 PCI: 00:15.3: enabled 0
818 12:51:08.037077 PCI: 00:16.0: enabled 1
819 12:51:08.037684 PCI: 00:16.1: enabled 0
820 12:51:08.040089 PCI: 00:16.2: enabled 0
821 12:51:08.043104 PCI: 00:16.3: enabled 0
822 12:51:08.046455 PCI: 00:16.4: enabled 0
823 12:51:08.046947 PCI: 00:16.5: enabled 0
824 12:51:08.049716 PCI: 00:17.0: enabled 1
825 12:51:08.053550 PCI: 00:19.0: enabled 1
826 12:51:08.056806 I2C: 00:1a: enabled 1
827 12:51:08.059897 I2C: 00:38: enabled 1
828 12:51:08.060543 I2C: 00:39: enabled 1
829 12:51:08.063324 I2C: 00:3a: enabled 1
830 12:51:08.066869 I2C: 00:3b: enabled 1
831 12:51:08.069966 PCI: 00:19.1: enabled 0
832 12:51:08.070559 PCI: 00:19.2: enabled 0
833 12:51:08.073316 PCI: 00:1a.0: enabled 0
834 12:51:08.076589 PCI: 00:1c.0: enabled 0
835 12:51:08.079930 PCI: 00:1c.1: enabled 0
836 12:51:08.083333 PCI: 00:1c.2: enabled 0
837 12:51:08.083933 PCI: 00:1c.3: enabled 0
838 12:51:08.086699 PCI: 00:1c.4: enabled 0
839 12:51:08.089953 PCI: 00:1c.5: enabled 0
840 12:51:08.092895 PCI: 00:1c.6: enabled 0
841 12:51:08.096433 PCI: 00:1c.7: enabled 0
842 12:51:08.096933 PCI: 00:1d.0: enabled 1
843 12:51:08.099526 PCI: 00:1d.1: enabled 0
844 12:51:08.103227 PCI: 00:1d.2: enabled 0
845 12:51:08.106023 PCI: 00:1d.3: enabled 0
846 12:51:08.109248 PCI: 00:1d.4: enabled 0
847 12:51:08.109739 PCI: 00:1d.5: enabled 1
848 12:51:08.112672 PCI: 00:00.0: enabled 1
849 12:51:08.116464 PCI: 00:1e.0: enabled 1
850 12:51:08.119271 PCI: 00:1e.1: enabled 0
851 12:51:08.122656 PCI: 00:1e.2: enabled 1
852 12:51:08.123229 SPI: 00: enabled 1
853 12:51:08.126165 PCI: 00:1e.3: enabled 1
854 12:51:08.129535 SPI: 01: enabled 1
855 12:51:08.132499 PCI: 00:1f.0: enabled 1
856 12:51:08.132994 PNP: 0c09.0: enabled 1
857 12:51:08.136084 PCI: 00:1f.1: enabled 1
858 12:51:08.139447 PCI: 00:1f.2: enabled 1
859 12:51:08.142491 PCI: 00:1f.3: enabled 1
860 12:51:08.145804 PCI: 00:1f.4: enabled 1
861 12:51:08.146305 PCI: 00:1f.5: enabled 1
862 12:51:08.149148 PCI: 00:1f.6: enabled 0
863 12:51:08.152928 Root Device scanning...
864 12:51:08.155892 scan_static_bus for Root Device
865 12:51:08.159380 CPU_CLUSTER: 0 enabled
866 12:51:08.159827 DOMAIN: 0000 enabled
867 12:51:08.162674 DOMAIN: 0000 scanning...
868 12:51:08.165873 PCI: pci_scan_bus for bus 00
869 12:51:08.169177 PCI: 00:00.0 [8086/0000] ops
870 12:51:08.172833 PCI: 00:00.0 [8086/9b61] enabled
871 12:51:08.176100 PCI: 00:02.0 [8086/0000] bus ops
872 12:51:08.179002 PCI: 00:02.0 [8086/9b41] enabled
873 12:51:08.182457 PCI: 00:04.0 [8086/1903] disabled
874 12:51:08.185829 PCI: 00:08.0 [8086/1911] enabled
875 12:51:08.188862 PCI: 00:12.0 [8086/02f9] enabled
876 12:51:08.192292 PCI: 00:14.0 [8086/0000] bus ops
877 12:51:08.195866 PCI: 00:14.0 [8086/02ed] enabled
878 12:51:08.199460 PCI: 00:14.2 [8086/02ef] enabled
879 12:51:08.202185 PCI: 00:14.3 [8086/02f0] enabled
880 12:51:08.205777 PCI: 00:15.0 [8086/0000] bus ops
881 12:51:08.209315 PCI: 00:15.0 [8086/02e8] enabled
882 12:51:08.212177 PCI: 00:15.1 [8086/0000] bus ops
883 12:51:08.215477 PCI: 00:15.1 [8086/02e9] enabled
884 12:51:08.219200 PCI: 00:16.0 [8086/0000] ops
885 12:51:08.222318 PCI: 00:16.0 [8086/02e0] enabled
886 12:51:08.225732 PCI: 00:17.0 [8086/0000] ops
887 12:51:08.228883 PCI: 00:17.0 [8086/02d3] enabled
888 12:51:08.232092 PCI: 00:19.0 [8086/0000] bus ops
889 12:51:08.235629 PCI: 00:19.0 [8086/02c5] enabled
890 12:51:08.238707 PCI: 00:1d.0 [8086/0000] bus ops
891 12:51:08.242284 PCI: 00:1d.0 [8086/02b0] enabled
892 12:51:08.245421 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 12:51:08.248920 PCI: 00:1e.0 [8086/0000] ops
894 12:51:08.252206 PCI: 00:1e.0 [8086/02a8] enabled
895 12:51:08.255498 PCI: 00:1e.2 [8086/0000] bus ops
896 12:51:08.258814 PCI: 00:1e.2 [8086/02aa] enabled
897 12:51:08.262048 PCI: 00:1e.3 [8086/0000] bus ops
898 12:51:08.265749 PCI: 00:1e.3 [8086/02ab] enabled
899 12:51:08.268857 PCI: 00:1f.0 [8086/0000] bus ops
900 12:51:08.272042 PCI: 00:1f.0 [8086/0284] enabled
901 12:51:08.278587 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 12:51:08.285549 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 12:51:08.288173 PCI: 00:1f.3 [8086/0000] bus ops
904 12:51:08.291887 PCI: 00:1f.3 [8086/02c8] enabled
905 12:51:08.295112 PCI: 00:1f.4 [8086/0000] bus ops
906 12:51:08.298146 PCI: 00:1f.4 [8086/02a3] enabled
907 12:51:08.301778 PCI: 00:1f.5 [8086/0000] bus ops
908 12:51:08.305169 PCI: 00:1f.5 [8086/02a4] enabled
909 12:51:08.308152 PCI: Leftover static devices:
910 12:51:08.308239 PCI: 00:05.0
911 12:51:08.308308 PCI: 00:12.5
912 12:51:08.311368 PCI: 00:12.6
913 12:51:08.311456 PCI: 00:14.1
914 12:51:08.314932 PCI: 00:14.5
915 12:51:08.315023 PCI: 00:15.2
916 12:51:08.318469 PCI: 00:15.3
917 12:51:08.318556 PCI: 00:16.1
918 12:51:08.318624 PCI: 00:16.2
919 12:51:08.321345 PCI: 00:16.3
920 12:51:08.321431 PCI: 00:16.4
921 12:51:08.324905 PCI: 00:16.5
922 12:51:08.324992 PCI: 00:19.1
923 12:51:08.325061 PCI: 00:19.2
924 12:51:08.328177 PCI: 00:1a.0
925 12:51:08.328269 PCI: 00:1c.0
926 12:51:08.331213 PCI: 00:1c.1
927 12:51:08.331301 PCI: 00:1c.2
928 12:51:08.331370 PCI: 00:1c.3
929 12:51:08.334941 PCI: 00:1c.4
930 12:51:08.335028 PCI: 00:1c.5
931 12:51:08.338248 PCI: 00:1c.6
932 12:51:08.338336 PCI: 00:1c.7
933 12:51:08.341118 PCI: 00:1d.1
934 12:51:08.341206 PCI: 00:1d.2
935 12:51:08.341275 PCI: 00:1d.3
936 12:51:08.344893 PCI: 00:1d.4
937 12:51:08.344980 PCI: 00:1d.5
938 12:51:08.347804 PCI: 00:1e.1
939 12:51:08.347891 PCI: 00:1f.1
940 12:51:08.347959 PCI: 00:1f.2
941 12:51:08.351412 PCI: 00:1f.6
942 12:51:08.354858 PCI: Check your devicetree.cb.
943 12:51:08.357786 PCI: 00:02.0 scanning...
944 12:51:08.361133 scan_generic_bus for PCI: 00:02.0
945 12:51:08.364485 scan_generic_bus for PCI: 00:02.0 done
946 12:51:08.368131 scan_bus: scanning of bus PCI: 00:02.0 took 10212 usecs
947 12:51:08.371312 PCI: 00:14.0 scanning...
948 12:51:08.374920 scan_static_bus for PCI: 00:14.0
949 12:51:08.377984 USB0 port 0 enabled
950 12:51:08.380935 USB0 port 0 scanning...
951 12:51:08.384587 scan_static_bus for USB0 port 0
952 12:51:08.384674 USB2 port 0 enabled
953 12:51:08.387674 USB2 port 1 enabled
954 12:51:08.390933 USB2 port 2 disabled
955 12:51:08.391020 USB2 port 3 disabled
956 12:51:08.394582 USB2 port 5 disabled
957 12:51:08.398006 USB2 port 6 enabled
958 12:51:08.398093 USB2 port 9 enabled
959 12:51:08.401073 USB3 port 0 enabled
960 12:51:08.401160 USB3 port 1 enabled
961 12:51:08.404624 USB3 port 2 enabled
962 12:51:08.407933 USB3 port 3 enabled
963 12:51:08.408020 USB3 port 4 disabled
964 12:51:08.411000 USB2 port 0 scanning...
965 12:51:08.414164 scan_static_bus for USB2 port 0
966 12:51:08.417524 scan_static_bus for USB2 port 0 done
967 12:51:08.424331 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
968 12:51:08.427343 USB2 port 1 scanning...
969 12:51:08.431038 scan_static_bus for USB2 port 1
970 12:51:08.434444 scan_static_bus for USB2 port 1 done
971 12:51:08.437619 scan_bus: scanning of bus USB2 port 1 took 9706 usecs
972 12:51:08.441049 USB2 port 6 scanning...
973 12:51:08.444416 scan_static_bus for USB2 port 6
974 12:51:08.447409 scan_static_bus for USB2 port 6 done
975 12:51:08.454259 scan_bus: scanning of bus USB2 port 6 took 9700 usecs
976 12:51:08.457653 USB2 port 9 scanning...
977 12:51:08.461072 scan_static_bus for USB2 port 9
978 12:51:08.463970 scan_static_bus for USB2 port 9 done
979 12:51:08.467576 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
980 12:51:08.470885 USB3 port 0 scanning...
981 12:51:08.474043 scan_static_bus for USB3 port 0
982 12:51:08.477649 scan_static_bus for USB3 port 0 done
983 12:51:08.484178 scan_bus: scanning of bus USB3 port 0 took 9697 usecs
984 12:51:08.487216 USB3 port 1 scanning...
985 12:51:08.491082 scan_static_bus for USB3 port 1
986 12:51:08.494304 scan_static_bus for USB3 port 1 done
987 12:51:08.497301 scan_bus: scanning of bus USB3 port 1 took 9697 usecs
988 12:51:08.500730 USB3 port 2 scanning...
989 12:51:08.504406 scan_static_bus for USB3 port 2
990 12:51:08.507435 scan_static_bus for USB3 port 2 done
991 12:51:08.514402 scan_bus: scanning of bus USB3 port 2 took 9700 usecs
992 12:51:08.517433 USB3 port 3 scanning...
993 12:51:08.520975 scan_static_bus for USB3 port 3
994 12:51:08.523987 scan_static_bus for USB3 port 3 done
995 12:51:08.527592 scan_bus: scanning of bus USB3 port 3 took 9707 usecs
996 12:51:08.534322 scan_static_bus for USB0 port 0 done
997 12:51:08.537558 scan_bus: scanning of bus USB0 port 0 took 155369 usecs
998 12:51:08.540858 scan_static_bus for PCI: 00:14.0 done
999 12:51:08.547774 scan_bus: scanning of bus PCI: 00:14.0 took 172998 usecs
1000 12:51:08.550642 PCI: 00:15.0 scanning...
1001 12:51:08.554208 scan_generic_bus for PCI: 00:15.0
1002 12:51:08.557975 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 12:51:08.560750 scan_generic_bus for PCI: 00:15.0 done
1004 12:51:08.567826 scan_bus: scanning of bus PCI: 00:15.0 took 14298 usecs
1005 12:51:08.571186 PCI: 00:15.1 scanning...
1006 12:51:08.574044 scan_generic_bus for PCI: 00:15.1
1007 12:51:08.577525 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 12:51:08.580527 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 12:51:08.587207 scan_generic_bus for PCI: 00:15.1 done
1010 12:51:08.591135 scan_bus: scanning of bus PCI: 00:15.1 took 18598 usecs
1011 12:51:08.594023 PCI: 00:19.0 scanning...
1012 12:51:08.597075 scan_generic_bus for PCI: 00:19.0
1013 12:51:08.601121 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 12:51:08.610632 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 12:51:08.610761 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 12:51:08.613610 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 12:51:08.617063 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 12:51:08.620679 scan_generic_bus for PCI: 00:19.0 done
1019 12:51:08.626804 scan_bus: scanning of bus PCI: 00:19.0 took 30736 usecs
1020 12:51:08.630290 PCI: 00:1d.0 scanning...
1021 12:51:08.633499 do_pci_scan_bridge for PCI: 00:1d.0
1022 12:51:08.637109 PCI: pci_scan_bus for bus 01
1023 12:51:08.640104 PCI: 01:00.0 [1c5c/1327] enabled
1024 12:51:08.643483 Enabling Common Clock Configuration
1025 12:51:08.646889 L1 Sub-State supported from root port 29
1026 12:51:08.650101 L1 Sub-State Support = 0xf
1027 12:51:08.653657 CommonModeRestoreTime = 0x28
1028 12:51:08.657033 Power On Value = 0x16, Power On Scale = 0x0
1029 12:51:08.660096 ASPM: Enabled L1
1030 12:51:08.666961 scan_bus: scanning of bus PCI: 00:1d.0 took 32784 usecs
1031 12:51:08.667460 PCI: 00:1e.2 scanning...
1032 12:51:08.674004 scan_generic_bus for PCI: 00:1e.2
1033 12:51:08.677036 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 12:51:08.680188 scan_generic_bus for PCI: 00:1e.2 done
1035 12:51:08.686908 scan_bus: scanning of bus PCI: 00:1e.2 took 14007 usecs
1036 12:51:08.687413 PCI: 00:1e.3 scanning...
1037 12:51:08.690604 scan_generic_bus for PCI: 00:1e.3
1038 12:51:08.697189 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 12:51:08.699915 scan_generic_bus for PCI: 00:1e.3 done
1040 12:51:08.703366 scan_bus: scanning of bus PCI: 00:1e.3 took 14006 usecs
1041 12:51:08.706751 PCI: 00:1f.0 scanning...
1042 12:51:08.709972 scan_static_bus for PCI: 00:1f.0
1043 12:51:08.713459 PNP: 0c09.0 enabled
1044 12:51:08.716629 scan_static_bus for PCI: 00:1f.0 done
1045 12:51:08.723271 scan_bus: scanning of bus PCI: 00:1f.0 took 12056 usecs
1046 12:51:08.723805 PCI: 00:1f.3 scanning...
1047 12:51:08.730126 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1048 12:51:08.733617 PCI: 00:1f.4 scanning...
1049 12:51:08.736759 scan_generic_bus for PCI: 00:1f.4
1050 12:51:08.739791 scan_generic_bus for PCI: 00:1f.4 done
1051 12:51:08.746640 scan_bus: scanning of bus PCI: 00:1f.4 took 10194 usecs
1052 12:51:08.749810 PCI: 00:1f.5 scanning...
1053 12:51:08.753393 scan_generic_bus for PCI: 00:1f.5
1054 12:51:08.756749 scan_generic_bus for PCI: 00:1f.5 done
1055 12:51:08.763035 scan_bus: scanning of bus PCI: 00:1f.5 took 10196 usecs
1056 12:51:08.766255 scan_bus: scanning of bus DOMAIN: 0000 took 605118 usecs
1057 12:51:08.770396 scan_static_bus for Root Device done
1058 12:51:08.776235 scan_bus: scanning of bus Root Device took 625000 usecs
1059 12:51:08.776790 done
1060 12:51:08.779724 Chrome EC: UHEPI supported
1061 12:51:08.786574 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 12:51:08.793255 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 12:51:08.799773 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 12:51:08.806639 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 12:51:08.809886 SPI flash protection: WPSW=0 SRP0=0
1066 12:51:08.813235 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 12:51:08.819992 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 12:51:08.823007 found VGA at PCI: 00:02.0
1069 12:51:08.826457 Setting up VGA for PCI: 00:02.0
1070 12:51:08.829907 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 12:51:08.836519 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 12:51:08.839889 Allocating resources...
1073 12:51:08.840442 Reading resources...
1074 12:51:08.846354 Root Device read_resources bus 0 link: 0
1075 12:51:08.849436 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 12:51:08.856166 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 12:51:08.859653 DOMAIN: 0000 read_resources bus 0 link: 0
1078 12:51:08.866010 PCI: 00:14.0 read_resources bus 0 link: 0
1079 12:51:08.869453 USB0 port 0 read_resources bus 0 link: 0
1080 12:51:08.877417 USB0 port 0 read_resources bus 0 link: 0 done
1081 12:51:08.880848 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 12:51:08.887734 PCI: 00:15.0 read_resources bus 1 link: 0
1083 12:51:08.891112 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 12:51:08.898380 PCI: 00:15.1 read_resources bus 2 link: 0
1085 12:51:08.900995 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 12:51:08.908337 PCI: 00:19.0 read_resources bus 3 link: 0
1087 12:51:08.914977 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 12:51:08.918385 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 12:51:08.925555 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 12:51:08.928742 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 12:51:08.935499 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 12:51:08.938729 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 12:51:08.945083 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 12:51:08.948604 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 12:51:08.954983 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 12:51:08.961551 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 12:51:08.965020 Root Device read_resources bus 0 link: 0 done
1098 12:51:08.968259 Done reading resources.
1099 12:51:08.971548 Show resources in subtree (Root Device)...After reading.
1100 12:51:08.978444 Root Device child on link 0 CPU_CLUSTER: 0
1101 12:51:08.981729 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 12:51:08.982230 APIC: 00
1103 12:51:08.984985 APIC: 03
1104 12:51:08.985441 APIC: 01
1105 12:51:08.985799 APIC: 06
1106 12:51:08.988793 APIC: 02
1107 12:51:08.989243 APIC: 07
1108 12:51:08.991956 APIC: 05
1109 12:51:08.992579 APIC: 04
1110 12:51:08.995516 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 12:51:09.004857 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 12:51:09.061288 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 12:51:09.061888 PCI: 00:00.0
1114 12:51:09.062662 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 12:51:09.063431 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 12:51:09.063840 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 12:51:09.064572 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 12:51:09.111184 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 12:51:09.111850 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 12:51:09.112671 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 12:51:09.113113 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 12:51:09.113564 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 12:51:09.113940 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 12:51:09.127078 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 12:51:09.130195 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 12:51:09.139988 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 12:51:09.150025 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 12:51:09.156979 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 12:51:09.166477 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 12:51:09.169836 PCI: 00:02.0
1131 12:51:09.179921 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 12:51:09.189842 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 12:51:09.196090 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 12:51:09.199782 PCI: 00:04.0
1135 12:51:09.200353 PCI: 00:08.0
1136 12:51:09.209889 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 12:51:09.212832 PCI: 00:12.0
1138 12:51:09.222981 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:51:09.226682 PCI: 00:14.0 child on link 0 USB0 port 0
1140 12:51:09.236469 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 12:51:09.239635 USB0 port 0 child on link 0 USB2 port 0
1142 12:51:09.242705 USB2 port 0
1143 12:51:09.243204 USB2 port 1
1144 12:51:09.246181 USB2 port 2
1145 12:51:09.249612 USB2 port 3
1146 12:51:09.250108 USB2 port 5
1147 12:51:09.253054 USB2 port 6
1148 12:51:09.253551 USB2 port 9
1149 12:51:09.256194 USB3 port 0
1150 12:51:09.256852 USB3 port 1
1151 12:51:09.259594 USB3 port 2
1152 12:51:09.260186 USB3 port 3
1153 12:51:09.262945 USB3 port 4
1154 12:51:09.263450 PCI: 00:14.2
1155 12:51:09.273112 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 12:51:09.282796 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 12:51:09.286398 PCI: 00:14.3
1158 12:51:09.296019 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:51:09.299505 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 12:51:09.309236 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:51:09.309740 I2C: 01:15
1162 12:51:09.316268 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 12:51:09.325897 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:51:09.326356 I2C: 02:5d
1165 12:51:09.328950 GENERIC: 0.0
1166 12:51:09.329397 PCI: 00:16.0
1167 12:51:09.339317 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 12:51:09.342490 PCI: 00:17.0
1169 12:51:09.352755 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 12:51:09.359303 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 12:51:09.369040 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 12:51:09.375904 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 12:51:09.385880 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 12:51:09.391969 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 12:51:09.399104 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 12:51:09.408947 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 12:51:09.409633 I2C: 03:1a
1178 12:51:09.411828 I2C: 03:38
1179 12:51:09.412439 I2C: 03:39
1180 12:51:09.415342 I2C: 03:3a
1181 12:51:09.415842 I2C: 03:3b
1182 12:51:09.418703 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 12:51:09.428778 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 12:51:09.438363 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 12:51:09.448952 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 12:51:09.449558 PCI: 01:00.0
1187 12:51:09.458556 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:51:09.462046 PCI: 00:1e.0
1189 12:51:09.471948 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 12:51:09.481637 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 12:51:09.484684 PCI: 00:1e.2 child on link 0 SPI: 00
1192 12:51:09.495349 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:51:09.498375 SPI: 00
1194 12:51:09.501633 PCI: 00:1e.3 child on link 0 SPI: 01
1195 12:51:09.511391 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:51:09.511994 SPI: 01
1197 12:51:09.518268 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 12:51:09.524799 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 12:51:09.534486 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 12:51:09.535085 PNP: 0c09.0
1201 12:51:09.544493 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 12:51:09.548215 PCI: 00:1f.3
1203 12:51:09.557892 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 12:51:09.567663 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 12:51:09.568357 PCI: 00:1f.4
1206 12:51:09.578044 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 12:51:09.588029 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 12:51:09.588688 PCI: 00:1f.5
1209 12:51:09.597445 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 12:51:09.603955 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 12:51:09.610593 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 12:51:09.617357 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 12:51:09.620605 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 12:51:09.623754 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 12:51:09.627335 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 12:51:09.630334 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 12:51:09.637055 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 12:51:09.644074 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 12:51:09.653931 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 12:51:09.660507 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 12:51:09.666929 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 12:51:09.670481 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 12:51:09.680448 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 12:51:09.683914 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 12:51:09.690101 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 12:51:09.693906 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 12:51:09.700121 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 12:51:09.703491 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 12:51:09.709850 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 12:51:09.713165 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 12:51:09.720238 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 12:51:09.723522 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 12:51:09.726753 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 12:51:09.733489 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 12:51:09.736674 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 12:51:09.743154 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 12:51:09.746457 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 12:51:09.753159 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 12:51:09.756364 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 12:51:09.763371 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 12:51:09.766730 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 12:51:09.773139 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 12:51:09.776742 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 12:51:09.783036 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 12:51:09.786708 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 12:51:09.790028 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 12:51:09.799982 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 12:51:09.802876 avoid_fixed_resources: DOMAIN: 0000
1249 12:51:09.809787 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 12:51:09.816232 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 12:51:09.822777 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 12:51:09.829450 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 12:51:09.839529 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 12:51:09.845948 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 12:51:09.852885 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 12:51:09.862654 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 12:51:09.869393 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 12:51:09.875957 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 12:51:09.882597 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 12:51:09.892421 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 12:51:09.892879 Setting resources...
1262 12:51:09.898955 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 12:51:09.902340 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 12:51:09.908989 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 12:51:09.912238 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 12:51:09.915842 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 12:51:09.922086 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 12:51:09.929039 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 12:51:09.935580 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 12:51:09.941980 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 12:51:09.948380 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 12:51:09.951991 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 12:51:09.958349 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 12:51:09.961758 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 12:51:09.964907 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 12:51:09.971832 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 12:51:09.975312 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 12:51:09.981421 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 12:51:09.985059 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 12:51:09.991458 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 12:51:09.995070 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 12:51:10.001529 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 12:51:10.004697 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 12:51:10.011175 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 12:51:10.014803 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 12:51:10.021441 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 12:51:10.024584 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 12:51:10.031395 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 12:51:10.034957 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 12:51:10.038192 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 12:51:10.044814 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 12:51:10.048664 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 12:51:10.054877 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 12:51:10.061245 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 12:51:10.067949 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 12:51:10.077856 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 12:51:10.084764 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 12:51:10.088432 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 12:51:10.094812 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 12:51:10.101222 Root Device assign_resources, bus 0 link: 0
1301 12:51:10.104297 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 12:51:10.114643 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 12:51:10.121221 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 12:51:10.131215 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 12:51:10.137558 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 12:51:10.147907 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 12:51:10.154045 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 12:51:10.160963 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 12:51:10.163909 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:51:10.170873 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 12:51:10.180810 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 12:51:10.187623 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 12:51:10.197209 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 12:51:10.200385 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 12:51:10.207158 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:51:10.213615 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 12:51:10.220436 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 12:51:10.223575 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:51:10.230093 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 12:51:10.240661 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 12:51:10.247129 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 12:51:10.257196 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 12:51:10.263613 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 12:51:10.270343 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 12:51:10.280027 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 12:51:10.286363 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 12:51:10.289864 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 12:51:10.296729 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:51:10.303275 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 12:51:10.312907 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 12:51:10.323080 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 12:51:10.326554 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 12:51:10.336257 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 12:51:10.339022 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 12:51:10.349422 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 12:51:10.356202 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 12:51:10.358864 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 12:51:10.365993 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:51:10.372382 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 12:51:10.379189 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 12:51:10.382185 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:51:10.388887 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 12:51:10.391975 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:51:10.399033 LPC: Trying to open IO window from 800 size 1ff
1345 12:51:10.405184 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 12:51:10.415266 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 12:51:10.421882 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 12:51:10.432086 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 12:51:10.434874 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 12:51:10.438425 Root Device assign_resources, bus 0 link: 0
1351 12:51:10.441146 Done setting resources.
1352 12:51:10.447659 Show resources in subtree (Root Device)...After assigning values.
1353 12:51:10.450996 Root Device child on link 0 CPU_CLUSTER: 0
1354 12:51:10.457623 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 12:51:10.457704 APIC: 00
1356 12:51:10.457778 APIC: 03
1357 12:51:10.461026 APIC: 01
1358 12:51:10.461099 APIC: 06
1359 12:51:10.464195 APIC: 02
1360 12:51:10.464269 APIC: 07
1361 12:51:10.464377 APIC: 05
1362 12:51:10.467677 APIC: 04
1363 12:51:10.471234 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 12:51:10.481098 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 12:51:10.490950 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 12:51:10.494081 PCI: 00:00.0
1367 12:51:10.503982 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 12:51:10.513799 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 12:51:10.520549 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 12:51:10.530411 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 12:51:10.540419 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 12:51:10.550470 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 12:51:10.560546 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 12:51:10.569912 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 12:51:10.576442 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 12:51:10.586574 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 12:51:10.596534 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 12:51:10.606131 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 12:51:10.616228 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 12:51:10.626035 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 12:51:10.636083 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 12:51:10.642885 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 12:51:10.645997 PCI: 00:02.0
1384 12:51:10.655893 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 12:51:10.665645 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 12:51:10.675614 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 12:51:10.675704 PCI: 00:04.0
1388 12:51:10.678985 PCI: 00:08.0
1389 12:51:10.689071 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 12:51:10.691997 PCI: 00:12.0
1391 12:51:10.702395 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 12:51:10.705351 PCI: 00:14.0 child on link 0 USB0 port 0
1393 12:51:10.715371 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 12:51:10.721736 USB0 port 0 child on link 0 USB2 port 0
1395 12:51:10.721821 USB2 port 0
1396 12:51:10.725152 USB2 port 1
1397 12:51:10.725233 USB2 port 2
1398 12:51:10.728530 USB2 port 3
1399 12:51:10.728607 USB2 port 5
1400 12:51:10.732112 USB2 port 6
1401 12:51:10.732192 USB2 port 9
1402 12:51:10.735383 USB3 port 0
1403 12:51:10.735462 USB3 port 1
1404 12:51:10.738707 USB3 port 2
1405 12:51:10.738800 USB3 port 3
1406 12:51:10.741928 USB3 port 4
1407 12:51:10.742018 PCI: 00:14.2
1408 12:51:10.755288 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 12:51:10.764750 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 12:51:10.764836 PCI: 00:14.3
1411 12:51:10.774766 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 12:51:10.781375 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 12:51:10.791333 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 12:51:10.791421 I2C: 01:15
1415 12:51:10.794329 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 12:51:10.807886 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 12:51:10.807973 I2C: 02:5d
1418 12:51:10.811221 GENERIC: 0.0
1419 12:51:10.811307 PCI: 00:16.0
1420 12:51:10.821002 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 12:51:10.824585 PCI: 00:17.0
1422 12:51:10.834153 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 12:51:10.844263 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 12:51:10.854302 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 12:51:10.860812 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 12:51:10.870424 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 12:51:10.880803 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 12:51:10.887056 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 12:51:10.896989 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 12:51:10.897079 I2C: 03:1a
1431 12:51:10.900589 I2C: 03:38
1432 12:51:10.900677 I2C: 03:39
1433 12:51:10.903548 I2C: 03:3a
1434 12:51:10.903636 I2C: 03:3b
1435 12:51:10.907162 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 12:51:10.916818 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 12:51:10.926689 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 12:51:10.936521 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 12:51:10.940217 PCI: 01:00.0
1440 12:51:10.950116 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 12:51:10.953075 PCI: 00:1e.0
1442 12:51:10.962955 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 12:51:10.972912 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 12:51:10.976193 PCI: 00:1e.2 child on link 0 SPI: 00
1445 12:51:10.985964 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 12:51:10.989470 SPI: 00
1447 12:51:10.992931 PCI: 00:1e.3 child on link 0 SPI: 01
1448 12:51:11.002893 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 12:51:11.002981 SPI: 01
1450 12:51:11.009732 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 12:51:11.016306 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 12:51:11.026133 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 12:51:11.029114 PNP: 0c09.0
1454 12:51:11.035753 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 12:51:11.039037 PCI: 00:1f.3
1456 12:51:11.048899 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 12:51:11.058899 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 12:51:11.058990 PCI: 00:1f.4
1459 12:51:11.068903 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 12:51:11.078623 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 12:51:11.082004 PCI: 00:1f.5
1462 12:51:11.092198 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 12:51:11.095495 Done allocating resources.
1464 12:51:11.098722 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 12:51:11.102325 Enabling resources...
1466 12:51:11.108488 PCI: 00:00.0 subsystem <- 8086/9b61
1467 12:51:11.108576 PCI: 00:00.0 cmd <- 06
1468 12:51:11.111912 PCI: 00:02.0 subsystem <- 8086/9b41
1469 12:51:11.115405 PCI: 00:02.0 cmd <- 03
1470 12:51:11.118707 PCI: 00:08.0 cmd <- 06
1471 12:51:11.122317 PCI: 00:12.0 subsystem <- 8086/02f9
1472 12:51:11.125120 PCI: 00:12.0 cmd <- 02
1473 12:51:11.128562 PCI: 00:14.0 subsystem <- 8086/02ed
1474 12:51:11.132265 PCI: 00:14.0 cmd <- 02
1475 12:51:11.132394 PCI: 00:14.2 cmd <- 02
1476 12:51:11.138995 PCI: 00:14.3 subsystem <- 8086/02f0
1477 12:51:11.139082 PCI: 00:14.3 cmd <- 02
1478 12:51:11.142358 PCI: 00:15.0 subsystem <- 8086/02e8
1479 12:51:11.145446 PCI: 00:15.0 cmd <- 02
1480 12:51:11.148979 PCI: 00:15.1 subsystem <- 8086/02e9
1481 12:51:11.152276 PCI: 00:15.1 cmd <- 02
1482 12:51:11.155431 PCI: 00:16.0 subsystem <- 8086/02e0
1483 12:51:11.158840 PCI: 00:16.0 cmd <- 02
1484 12:51:11.161895 PCI: 00:17.0 subsystem <- 8086/02d3
1485 12:51:11.165839 PCI: 00:17.0 cmd <- 03
1486 12:51:11.169209 PCI: 00:19.0 subsystem <- 8086/02c5
1487 12:51:11.171963 PCI: 00:19.0 cmd <- 02
1488 12:51:11.175355 PCI: 00:1d.0 bridge ctrl <- 0013
1489 12:51:11.178673 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 12:51:11.182103 PCI: 00:1d.0 cmd <- 06
1491 12:51:11.185014 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 12:51:11.188647 PCI: 00:1e.0 cmd <- 06
1493 12:51:11.191963 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 12:51:11.192054 PCI: 00:1e.2 cmd <- 06
1495 12:51:11.198252 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 12:51:11.198343 PCI: 00:1e.3 cmd <- 02
1497 12:51:11.201569 PCI: 00:1f.0 subsystem <- 8086/0284
1498 12:51:11.205262 PCI: 00:1f.0 cmd <- 407
1499 12:51:11.208209 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 12:51:11.211639 PCI: 00:1f.3 cmd <- 02
1501 12:51:11.215092 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 12:51:11.218126 PCI: 00:1f.4 cmd <- 03
1503 12:51:11.221397 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 12:51:11.225121 PCI: 00:1f.5 cmd <- 406
1505 12:51:11.233544 PCI: 01:00.0 cmd <- 02
1506 12:51:11.238509 done.
1507 12:51:11.252018 ME: Version: 14.0.39.1367
1508 12:51:11.258637 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
1509 12:51:11.261839 Initializing devices...
1510 12:51:11.261919 Root Device init ...
1511 12:51:11.268410 Chrome EC: Set SMI mask to 0x0000000000000000
1512 12:51:11.271916 Chrome EC: clear events_b mask to 0x0000000000000000
1513 12:51:11.278728 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 12:51:11.285234 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 12:51:11.292076 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 12:51:11.295438 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 12:51:11.298551 Root Device init finished in 35165 usecs
1518 12:51:11.302187 CPU_CLUSTER: 0 init ...
1519 12:51:11.308613 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 12:51:11.312686 PCI: 00:00.0 init ...
1521 12:51:11.315997 CPU TDP: 15 Watts
1522 12:51:11.319429 CPU PL2 = 64 Watts
1523 12:51:11.322902 PCI: 00:00.0 init finished in 7061 usecs
1524 12:51:11.326223 PCI: 00:02.0 init ...
1525 12:51:11.329317 PCI: 00:02.0 init finished in 2254 usecs
1526 12:51:11.332462 PCI: 00:08.0 init ...
1527 12:51:11.335776 PCI: 00:08.0 init finished in 2252 usecs
1528 12:51:11.339557 PCI: 00:12.0 init ...
1529 12:51:11.342335 PCI: 00:12.0 init finished in 2252 usecs
1530 12:51:11.345590 PCI: 00:14.0 init ...
1531 12:51:11.348955 PCI: 00:14.0 init finished in 2252 usecs
1532 12:51:11.352419 PCI: 00:14.2 init ...
1533 12:51:11.356100 PCI: 00:14.2 init finished in 2253 usecs
1534 12:51:11.358914 PCI: 00:14.3 init ...
1535 12:51:11.362439 PCI: 00:14.3 init finished in 2269 usecs
1536 12:51:11.365597 PCI: 00:15.0 init ...
1537 12:51:11.368930 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 12:51:11.372072 PCI: 00:15.0 init finished in 5970 usecs
1539 12:51:11.375864 PCI: 00:15.1 init ...
1540 12:51:11.379230 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 12:51:11.385481 PCI: 00:15.1 init finished in 5977 usecs
1542 12:51:11.385569 PCI: 00:16.0 init ...
1543 12:51:11.392050 PCI: 00:16.0 init finished in 2251 usecs
1544 12:51:11.395490 PCI: 00:19.0 init ...
1545 12:51:11.398938 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 12:51:11.401904 PCI: 00:19.0 init finished in 5977 usecs
1547 12:51:11.405421 PCI: 00:1d.0 init ...
1548 12:51:11.408638 Initializing PCH PCIe bridge.
1549 12:51:11.412013 PCI: 00:1d.0 init finished in 5284 usecs
1550 12:51:11.415170 PCI: 00:1f.0 init ...
1551 12:51:11.418972 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 12:51:11.425226 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 12:51:11.425313 IOAPIC: ID = 0x02
1554 12:51:11.428617 IOAPIC: Dumping registers
1555 12:51:11.432069 reg 0x0000: 0x02000000
1556 12:51:11.434936 reg 0x0001: 0x00770020
1557 12:51:11.435023 reg 0x0002: 0x00000000
1558 12:51:11.441739 PCI: 00:1f.0 init finished in 23536 usecs
1559 12:51:11.445354 PCI: 00:1f.4 init ...
1560 12:51:11.448179 PCI: 00:1f.4 init finished in 2261 usecs
1561 12:51:11.458938 PCI: 01:00.0 init ...
1562 12:51:11.462379 PCI: 01:00.0 init finished in 2251 usecs
1563 12:51:11.466576 PNP: 0c09.0 init ...
1564 12:51:11.470143 Google Chrome EC uptime: 11.088 seconds
1565 12:51:11.476300 Google Chrome AP resets since EC boot: 0
1566 12:51:11.479786 Google Chrome most recent AP reset causes:
1567 12:51:11.486184 Google Chrome EC reset flags at last EC boot: reset-pin
1568 12:51:11.490033 PNP: 0c09.0 init finished in 20566 usecs
1569 12:51:11.492812 Devices initialized
1570 12:51:11.492899 Show all devs... After init.
1571 12:51:11.496476 Root Device: enabled 1
1572 12:51:11.499586 CPU_CLUSTER: 0: enabled 1
1573 12:51:11.503068 DOMAIN: 0000: enabled 1
1574 12:51:11.503156 APIC: 00: enabled 1
1575 12:51:11.506697 PCI: 00:00.0: enabled 1
1576 12:51:11.509472 PCI: 00:02.0: enabled 1
1577 12:51:11.513009 PCI: 00:04.0: enabled 0
1578 12:51:11.513097 PCI: 00:05.0: enabled 0
1579 12:51:11.515971 PCI: 00:12.0: enabled 1
1580 12:51:11.519734 PCI: 00:12.5: enabled 0
1581 12:51:11.519823 PCI: 00:12.6: enabled 0
1582 12:51:11.522899 PCI: 00:14.0: enabled 1
1583 12:51:11.526326 PCI: 00:14.1: enabled 0
1584 12:51:11.529728 PCI: 00:14.3: enabled 1
1585 12:51:11.529820 PCI: 00:14.5: enabled 0
1586 12:51:11.532750 PCI: 00:15.0: enabled 1
1587 12:51:11.536160 PCI: 00:15.1: enabled 1
1588 12:51:11.539235 PCI: 00:15.2: enabled 0
1589 12:51:11.539322 PCI: 00:15.3: enabled 0
1590 12:51:11.542713 PCI: 00:16.0: enabled 1
1591 12:51:11.545776 PCI: 00:16.1: enabled 0
1592 12:51:11.549290 PCI: 00:16.2: enabled 0
1593 12:51:11.549377 PCI: 00:16.3: enabled 0
1594 12:51:11.552540 PCI: 00:16.4: enabled 0
1595 12:51:11.556150 PCI: 00:16.5: enabled 0
1596 12:51:11.559295 PCI: 00:17.0: enabled 1
1597 12:51:11.559384 PCI: 00:19.0: enabled 1
1598 12:51:11.562892 PCI: 00:19.1: enabled 0
1599 12:51:11.565619 PCI: 00:19.2: enabled 0
1600 12:51:11.565706 PCI: 00:1a.0: enabled 0
1601 12:51:11.569209 PCI: 00:1c.0: enabled 0
1602 12:51:11.572451 PCI: 00:1c.1: enabled 0
1603 12:51:11.576237 PCI: 00:1c.2: enabled 0
1604 12:51:11.576341 PCI: 00:1c.3: enabled 0
1605 12:51:11.579222 PCI: 00:1c.4: enabled 0
1606 12:51:11.582513 PCI: 00:1c.5: enabled 0
1607 12:51:11.585779 PCI: 00:1c.6: enabled 0
1608 12:51:11.585910 PCI: 00:1c.7: enabled 0
1609 12:51:11.589346 PCI: 00:1d.0: enabled 1
1610 12:51:11.592290 PCI: 00:1d.1: enabled 0
1611 12:51:11.595574 PCI: 00:1d.2: enabled 0
1612 12:51:11.595677 PCI: 00:1d.3: enabled 0
1613 12:51:11.598576 PCI: 00:1d.4: enabled 0
1614 12:51:11.602810 PCI: 00:1d.5: enabled 0
1615 12:51:11.602898 PCI: 00:1e.0: enabled 1
1616 12:51:11.605381 PCI: 00:1e.1: enabled 0
1617 12:51:11.609104 PCI: 00:1e.2: enabled 1
1618 12:51:11.612128 PCI: 00:1e.3: enabled 1
1619 12:51:11.612222 PCI: 00:1f.0: enabled 1
1620 12:51:11.615117 PCI: 00:1f.1: enabled 0
1621 12:51:11.618642 PCI: 00:1f.2: enabled 0
1622 12:51:11.622091 PCI: 00:1f.3: enabled 1
1623 12:51:11.622179 PCI: 00:1f.4: enabled 1
1624 12:51:11.625240 PCI: 00:1f.5: enabled 1
1625 12:51:11.628565 PCI: 00:1f.6: enabled 0
1626 12:51:11.632186 USB0 port 0: enabled 1
1627 12:51:11.632286 I2C: 01:15: enabled 1
1628 12:51:11.635330 I2C: 02:5d: enabled 1
1629 12:51:11.638483 GENERIC: 0.0: enabled 1
1630 12:51:11.638671 I2C: 03:1a: enabled 1
1631 12:51:11.641808 I2C: 03:38: enabled 1
1632 12:51:11.645117 I2C: 03:39: enabled 1
1633 12:51:11.645240 I2C: 03:3a: enabled 1
1634 12:51:11.648535 I2C: 03:3b: enabled 1
1635 12:51:11.651890 PCI: 00:00.0: enabled 1
1636 12:51:11.652033 SPI: 00: enabled 1
1637 12:51:11.655139 SPI: 01: enabled 1
1638 12:51:11.658224 PNP: 0c09.0: enabled 1
1639 12:51:11.658310 USB2 port 0: enabled 1
1640 12:51:11.661451 USB2 port 1: enabled 1
1641 12:51:11.664981 USB2 port 2: enabled 0
1642 12:51:11.665068 USB2 port 3: enabled 0
1643 12:51:11.668845 USB2 port 5: enabled 0
1644 12:51:11.672300 USB2 port 6: enabled 1
1645 12:51:11.675942 USB2 port 9: enabled 1
1646 12:51:11.676502 USB3 port 0: enabled 1
1647 12:51:11.678991 USB3 port 1: enabled 1
1648 12:51:11.682025 USB3 port 2: enabled 1
1649 12:51:11.682630 USB3 port 3: enabled 1
1650 12:51:11.685185 USB3 port 4: enabled 0
1651 12:51:11.688730 APIC: 03: enabled 1
1652 12:51:11.689228 APIC: 01: enabled 1
1653 12:51:11.691831 APIC: 06: enabled 1
1654 12:51:11.695202 APIC: 02: enabled 1
1655 12:51:11.695781 APIC: 07: enabled 1
1656 12:51:11.698732 APIC: 05: enabled 1
1657 12:51:11.699237 APIC: 04: enabled 1
1658 12:51:11.702178 PCI: 00:08.0: enabled 1
1659 12:51:11.705392 PCI: 00:14.2: enabled 1
1660 12:51:11.708446 PCI: 01:00.0: enabled 1
1661 12:51:11.711871 Disabling ACPI via APMC:
1662 12:51:11.715043 done.
1663 12:51:11.718718 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 12:51:11.721800 ELOG: NV offset 0xaf0000 size 0x4000
1665 12:51:11.728404 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 12:51:11.735265 ELOG: Event(17) added with size 13 at 2023-03-22 12:51:10 UTC
1667 12:51:11.741983 ELOG: Event(92) added with size 9 at 2023-03-22 12:51:10 UTC
1668 12:51:11.748701 ELOG: Event(93) added with size 9 at 2023-03-22 12:51:10 UTC
1669 12:51:11.755185 ELOG: Event(9A) added with size 9 at 2023-03-22 12:51:10 UTC
1670 12:51:11.761762 ELOG: Event(9E) added with size 10 at 2023-03-22 12:51:10 UTC
1671 12:51:11.768851 ELOG: Event(9F) added with size 14 at 2023-03-22 12:51:10 UTC
1672 12:51:11.771525 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 12:51:11.779246 ELOG: Event(A1) added with size 10 at 2023-03-22 12:51:10 UTC
1674 12:51:11.788789 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 12:51:11.795589 ELOG: Event(A0) added with size 9 at 2023-03-22 12:51:10 UTC
1676 12:51:11.798902 elog_add_boot_reason: Logged dev mode boot
1677 12:51:11.802027 Finalize devices...
1678 12:51:11.802586 PCI: 00:17.0 final
1679 12:51:11.805559 Devices finalized
1680 12:51:11.808741 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 12:51:11.815171 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 12:51:11.818431 ME: HFSTS1 : 0x90000245
1683 12:51:11.822089 ME: HFSTS2 : 0x3B850126
1684 12:51:11.828367 ME: HFSTS3 : 0x00000020
1685 12:51:11.831946 ME: HFSTS4 : 0x00004800
1686 12:51:11.835096 ME: HFSTS5 : 0x00000000
1687 12:51:11.838759 ME: HFSTS6 : 0x40400006
1688 12:51:11.841795 ME: Manufacturing Mode : NO
1689 12:51:11.844995 ME: FW Partition Table : OK
1690 12:51:11.848222 ME: Bringup Loader Failure : NO
1691 12:51:11.851846 ME: Firmware Init Complete : YES
1692 12:51:11.855234 ME: Boot Options Present : NO
1693 12:51:11.858205 ME: Update In Progress : NO
1694 12:51:11.861806 ME: D0i3 Support : YES
1695 12:51:11.864992 ME: Low Power State Enabled : NO
1696 12:51:11.868043 ME: CPU Replaced : NO
1697 12:51:11.871174 ME: CPU Replacement Valid : YES
1698 12:51:11.874279 ME: Current Working State : 5
1699 12:51:11.877608 ME: Current Operation State : 1
1700 12:51:11.881360 ME: Current Operation Mode : 0
1701 12:51:11.885099 ME: Error Code : 0
1702 12:51:11.888125 ME: CPU Debug Disabled : YES
1703 12:51:11.891239 ME: TXT Support : NO
1704 12:51:11.898162 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 12:51:11.904542 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 12:51:11.905057 CBFS @ c08000 size 3f8000
1707 12:51:11.911237 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 12:51:11.914491 CBFS: Locating 'fallback/dsdt.aml'
1709 12:51:11.917778 CBFS: Found @ offset 10bb80 size 3fa5
1710 12:51:11.924481 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 12:51:11.927551 CBFS @ c08000 size 3f8000
1712 12:51:11.931198 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 12:51:11.934235 CBFS: Locating 'fallback/slic'
1714 12:51:11.939266 CBFS: 'fallback/slic' not found.
1715 12:51:11.946249 ACPI: Writing ACPI tables at 99b3e000.
1716 12:51:11.946750 ACPI: * FACS
1717 12:51:11.949250 ACPI: * DSDT
1718 12:51:11.952720 Ramoops buffer: 0x100000@0x99a3d000.
1719 12:51:11.955817 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 12:51:11.962482 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 12:51:11.965914 Google Chrome EC: version:
1722 12:51:11.969509 ro: helios_v2.0.2659-56403530b
1723 12:51:11.972298 rw: helios_v2.0.2849-c41de27e7d
1724 12:51:11.972836 running image: 1
1725 12:51:11.976909 ACPI: * FADT
1726 12:51:11.977426 SCI is IRQ9
1727 12:51:11.983148 ACPI: added table 1/32, length now 40
1728 12:51:11.983642 ACPI: * SSDT
1729 12:51:11.986553 Found 1 CPU(s) with 8 core(s) each.
1730 12:51:11.990125 Error: Could not locate 'wifi_sar' in VPD.
1731 12:51:11.996776 Checking CBFS for default SAR values
1732 12:51:12.000029 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 12:51:12.003143 CBFS @ c08000 size 3f8000
1734 12:51:12.009798 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 12:51:12.013201 CBFS: Locating 'wifi_sar_defaults.hex'
1736 12:51:12.016251 CBFS: Found @ offset 5fac0 size 77
1737 12:51:12.019148 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 12:51:12.026268 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 12:51:12.029322 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 12:51:12.035814 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 12:51:12.039111 failed to find key in VPD: dsm_calib_r0_0
1742 12:51:12.049143 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 12:51:12.052541 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 12:51:12.058760 failed to find key in VPD: dsm_calib_r0_1
1745 12:51:12.065629 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 12:51:12.072494 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 12:51:12.075445 failed to find key in VPD: dsm_calib_r0_2
1748 12:51:12.085446 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 12:51:12.088895 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 12:51:12.095179 failed to find key in VPD: dsm_calib_r0_3
1751 12:51:12.102168 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 12:51:12.109039 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 12:51:12.112264 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 12:51:12.118692 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 12:51:12.121928 EC returned error result code 1
1756 12:51:12.125940 EC returned error result code 1
1757 12:51:12.129212 EC returned error result code 1
1758 12:51:12.132521 PS2K: Bad resp from EC. Vivaldi disabled!
1759 12:51:12.139037 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 12:51:12.145625 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 12:51:12.149383 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 12:51:12.155600 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 12:51:12.159029 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 12:51:12.165472 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 12:51:12.172125 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 12:51:12.178573 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 12:51:12.182193 ACPI: added table 2/32, length now 44
1768 12:51:12.182271 ACPI: * MCFG
1769 12:51:12.188649 ACPI: added table 3/32, length now 48
1770 12:51:12.188728 ACPI: * TPM2
1771 12:51:12.191674 TPM2 log created at 99a2d000
1772 12:51:12.195401 ACPI: added table 4/32, length now 52
1773 12:51:12.198455 ACPI: * MADT
1774 12:51:12.198535 SCI is IRQ9
1775 12:51:12.201753 ACPI: added table 5/32, length now 56
1776 12:51:12.204776 current = 99b43ac0
1777 12:51:12.204851 ACPI: * DMAR
1778 12:51:12.208231 ACPI: added table 6/32, length now 60
1779 12:51:12.211809 ACPI: * IGD OpRegion
1780 12:51:12.214944 GMA: Found VBT in CBFS
1781 12:51:12.218411 GMA: Found valid VBT in CBFS
1782 12:51:12.221548 ACPI: added table 7/32, length now 64
1783 12:51:12.221624 ACPI: * HPET
1784 12:51:12.227987 ACPI: added table 8/32, length now 68
1785 12:51:12.228064 ACPI: done.
1786 12:51:12.231612 ACPI tables: 31744 bytes.
1787 12:51:12.234870 smbios_write_tables: 99a2c000
1788 12:51:12.237923 EC returned error result code 3
1789 12:51:12.241461 Couldn't obtain OEM name from CBI
1790 12:51:12.244493 Create SMBIOS type 17
1791 12:51:12.248154 PCI: 00:00.0 (Intel Cannonlake)
1792 12:51:12.248234 PCI: 00:14.3 (Intel WiFi)
1793 12:51:12.251636 SMBIOS tables: 939 bytes.
1794 12:51:12.254506 Writing table forward entry at 0x00000500
1795 12:51:12.261197 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 12:51:12.264543 Writing coreboot table at 0x99b62000
1797 12:51:12.271085 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 12:51:12.274457 1. 0000000000001000-000000000009ffff: RAM
1799 12:51:12.280897 2. 00000000000a0000-00000000000fffff: RESERVED
1800 12:51:12.284222 3. 0000000000100000-0000000099a2bfff: RAM
1801 12:51:12.291175 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 12:51:12.294208 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 12:51:12.301071 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 12:51:12.307688 7. 000000009a000000-000000009f7fffff: RESERVED
1805 12:51:12.310929 8. 00000000e0000000-00000000efffffff: RESERVED
1806 12:51:12.317337 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 12:51:12.320988 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 12:51:12.324157 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 12:51:12.330685 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 12:51:12.333941 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 12:51:12.340738 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 12:51:12.344134 15. 0000000100000000-000000045e7fffff: RAM
1813 12:51:12.347446 Graphics framebuffer located at 0xc0000000
1814 12:51:12.350466 Passing 5 GPIOs to payload:
1815 12:51:12.357176 NAME | PORT | POLARITY | VALUE
1816 12:51:12.360871 write protect | undefined | high | low
1817 12:51:12.367399 lid | undefined | high | high
1818 12:51:12.374152 power | undefined | high | low
1819 12:51:12.376973 oprom | undefined | high | low
1820 12:51:12.383943 EC in RW | 0x000000cb | high | low
1821 12:51:12.384061 Board ID: 4
1822 12:51:12.390451 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 12:51:12.390582 CBFS @ c08000 size 3f8000
1824 12:51:12.397090 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 12:51:12.403404 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1826 12:51:12.406895 coreboot table: 1492 bytes.
1827 12:51:12.410436 IMD ROOT 0. 99fff000 00001000
1828 12:51:12.413489 IMD SMALL 1. 99ffe000 00001000
1829 12:51:12.416947 FSP MEMORY 2. 99c4e000 003b0000
1830 12:51:12.420502 CONSOLE 3. 99c2e000 00020000
1831 12:51:12.423568 FMAP 4. 99c2d000 0000054e
1832 12:51:12.426595 TIME STAMP 5. 99c2c000 00000910
1833 12:51:12.429994 VBOOT WORK 6. 99c18000 00014000
1834 12:51:12.433508 MRC DATA 7. 99c16000 00001958
1835 12:51:12.436936 ROMSTG STCK 8. 99c15000 00001000
1836 12:51:12.440072 AFTER CAR 9. 99c0b000 0000a000
1837 12:51:12.443318 RAMSTAGE 10. 99baf000 0005c000
1838 12:51:12.446596 REFCODE 11. 99b7a000 00035000
1839 12:51:12.450098 SMM BACKUP 12. 99b6a000 00010000
1840 12:51:12.453313 COREBOOT 13. 99b62000 00008000
1841 12:51:12.456511 ACPI 14. 99b3e000 00024000
1842 12:51:12.460023 ACPI GNVS 15. 99b3d000 00001000
1843 12:51:12.463441 RAMOOPS 16. 99a3d000 00100000
1844 12:51:12.466211 TPM2 TCGLOG17. 99a2d000 00010000
1845 12:51:12.469602 SMBIOS 18. 99a2c000 00000800
1846 12:51:12.472890 IMD small region:
1847 12:51:12.476772 IMD ROOT 0. 99ffec00 00000400
1848 12:51:12.479846 FSP RUNTIME 1. 99ffebe0 00000004
1849 12:51:12.483047 EC HOSTEVENT 2. 99ffebc0 00000008
1850 12:51:12.487048 POWER STATE 3. 99ffeb80 00000040
1851 12:51:12.490238 ROMSTAGE 4. 99ffeb60 00000004
1852 12:51:12.493441 MEM INFO 5. 99ffe9a0 000001b9
1853 12:51:12.497126 VPD 6. 99ffe920 0000006c
1854 12:51:12.499751 MTRR: Physical address space:
1855 12:51:12.506403 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 12:51:12.513398 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 12:51:12.519900 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 12:51:12.523032 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 12:51:12.529859 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 12:51:12.536080 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 12:51:12.543057 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 12:51:12.546181 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 12:51:12.552798 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 12:51:12.556060 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 12:51:12.559427 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 12:51:12.563016 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 12:51:12.569289 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 12:51:12.572267 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 12:51:12.576284 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 12:51:12.579029 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 12:51:12.585614 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 12:51:12.588878 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 12:51:12.592383 call enable_fixed_mtrr()
1874 12:51:12.595316 CPU physical address size: 39 bits
1875 12:51:12.599082 MTRR: default type WB/UC MTRR counts: 6/8.
1876 12:51:12.602275 MTRR: WB selected as default type.
1877 12:51:12.608910 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 12:51:12.615323 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 12:51:12.622436 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 12:51:12.628433 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 12:51:12.635774 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 12:51:12.641893 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 12:51:12.645234 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 12:51:12.648444 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 12:51:12.655178 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 12:51:12.658712 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 12:51:12.661464 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 12:51:12.664985 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 12:51:12.668377 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 12:51:12.675003 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 12:51:12.678513 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 12:51:12.681594 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 12:51:12.684907 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 12:51:12.688050
1895 12:51:12.688765 MTRR check
1896 12:51:12.691119 Fixed MTRRs : Enabled
1897 12:51:12.691623 Variable MTRRs: Enabled
1898 12:51:12.694825
1899 12:51:12.695387 call enable_fixed_mtrr()
1900 12:51:12.701599 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 12:51:12.704506 CPU physical address size: 39 bits
1902 12:51:12.711342 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 12:51:12.714570 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:51:12.717799 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:51:12.721139 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:51:12.727492 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:51:12.731100 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:51:12.734538 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:51:12.737513 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:51:12.741037 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:51:12.747518 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:51:12.751173 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:51:12.754098 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:51:12.757256 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:51:12.763941 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:51:12.767248 call enable_fixed_mtrr()
1917 12:51:12.770738 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:51:12.773983 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:51:12.777629 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:51:12.784165 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:51:12.787048 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:51:12.790234 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:51:12.794233 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:51:12.797158 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:51:12.803595 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:51:12.807141 CPU physical address size: 39 bits
1927 12:51:12.810472 call enable_fixed_mtrr()
1928 12:51:12.813464 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:51:12.816805 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:51:12.820515 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:51:12.827019 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:51:12.830556 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:51:12.833619 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:51:12.836935 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:51:12.843480 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:51:12.847100 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:51:12.850001 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:51:12.853514 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:51:12.860131 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:51:12.863308 CPU physical address size: 39 bits
1941 12:51:12.863944 call enable_fixed_mtrr()
1942 12:51:12.869862 MTRR: Fixed MSR 0x258 0x0606060606060606
1943 12:51:12.873493 MTRR: Fixed MSR 0x259 0x0000000000000000
1944 12:51:12.876578 MTRR: Fixed MSR 0x268 0x0606060606060606
1945 12:51:12.879850 MTRR: Fixed MSR 0x269 0x0606060606060606
1946 12:51:12.886201 MTRR: Fixed MSR 0x26a 0x0606060606060606
1947 12:51:12.889879 MTRR: Fixed MSR 0x26b 0x0606060606060606
1948 12:51:12.893192 MTRR: Fixed MSR 0x26c 0x0606060606060606
1949 12:51:12.896193 MTRR: Fixed MSR 0x26d 0x0606060606060606
1950 12:51:12.899994 MTRR: Fixed MSR 0x26e 0x0606060606060606
1951 12:51:12.906181 MTRR: Fixed MSR 0x26f 0x0606060606060606
1952 12:51:12.909337 CPU physical address size: 39 bits
1953 12:51:12.912985 call enable_fixed_mtrr()
1954 12:51:12.916223 CBFS @ c08000 size 3f8000
1955 12:51:12.919604 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1956 12:51:12.922542 CPU physical address size: 39 bits
1957 12:51:12.929745 MTRR: Fixed MSR 0x250 0x0606060606060606
1958 12:51:12.932554 MTRR: Fixed MSR 0x258 0x0606060606060606
1959 12:51:12.936409 MTRR: Fixed MSR 0x259 0x0000000000000000
1960 12:51:12.939831 MTRR: Fixed MSR 0x268 0x0606060606060606
1961 12:51:12.945762 MTRR: Fixed MSR 0x269 0x0606060606060606
1962 12:51:12.949188 MTRR: Fixed MSR 0x26a 0x0606060606060606
1963 12:51:12.952935 MTRR: Fixed MSR 0x26b 0x0606060606060606
1964 12:51:12.955937 MTRR: Fixed MSR 0x26c 0x0606060606060606
1965 12:51:12.959277 MTRR: Fixed MSR 0x26d 0x0606060606060606
1966 12:51:12.965887 MTRR: Fixed MSR 0x26e 0x0606060606060606
1967 12:51:12.968902 MTRR: Fixed MSR 0x26f 0x0606060606060606
1968 12:51:12.972440 MTRR: Fixed MSR 0x250 0x0606060606060606
1969 12:51:12.975887 MTRR: Fixed MSR 0x258 0x0606060606060606
1970 12:51:12.982553 MTRR: Fixed MSR 0x259 0x0000000000000000
1971 12:51:12.985632 MTRR: Fixed MSR 0x268 0x0606060606060606
1972 12:51:12.989154 MTRR: Fixed MSR 0x269 0x0606060606060606
1973 12:51:12.992023 MTRR: Fixed MSR 0x26a 0x0606060606060606
1974 12:51:12.998956 MTRR: Fixed MSR 0x26b 0x0606060606060606
1975 12:51:13.002482 MTRR: Fixed MSR 0x26c 0x0606060606060606
1976 12:51:13.005170 MTRR: Fixed MSR 0x26d 0x0606060606060606
1977 12:51:13.008579 MTRR: Fixed MSR 0x26e 0x0606060606060606
1978 12:51:13.015123 MTRR: Fixed MSR 0x26f 0x0606060606060606
1979 12:51:13.015575 call enable_fixed_mtrr()
1980 12:51:13.018522 call enable_fixed_mtrr()
1981 12:51:13.022151 CPU physical address size: 39 bits
1982 12:51:13.025627 CPU physical address size: 39 bits
1983 12:51:13.028616 CBFS: Locating 'fallback/payload'
1984 12:51:13.036212 CBFS: Found @ offset 1c96c0 size 3f798
1985 12:51:13.039670 Checking segment from ROM address 0xffdd16f8
1986 12:51:13.043228 Checking segment from ROM address 0xffdd1714
1987 12:51:13.049423 Loading segment from ROM address 0xffdd16f8
1988 12:51:13.049928 code (compression=0)
1989 12:51:13.059152 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 12:51:13.069181 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 12:51:13.069934 it's not compressed!
1992 12:51:13.162754 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 12:51:13.168920 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 12:51:13.172235 Loading segment from ROM address 0xffdd1714
1995 12:51:13.175701 Entry Point 0x30000000
1996 12:51:13.179197 Loaded segments
1997 12:51:13.184998 Finalizing chipset.
1998 12:51:13.187947 Finalizing SMM.
1999 12:51:13.191498 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 12:51:13.194493 mp_park_aps done after 0 msecs.
2001 12:51:13.201205 Jumping to boot code at 30000000(99b62000)
2002 12:51:13.207251 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 12:51:13.207751
2004 12:51:13.208156
2005 12:51:13.208595
2006 12:51:13.210544 Starting depthcharge on Helios...
2007 12:51:13.211039
2008 12:51:13.212164 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 12:51:13.212752 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 12:51:13.213215 Setting prompt string to ['hatch:']
2011 12:51:13.213666 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 12:51:13.220575 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 12:51:13.221081
2014 12:51:13.227525 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 12:51:13.228122
2016 12:51:13.233714 board_setup: Info: eMMC controller not present; skipping
2017 12:51:13.234215
2018 12:51:13.237121 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 12:51:13.237625
2020 12:51:13.243650 board_setup: Info: SDHCI controller not present; skipping
2021 12:51:13.244145
2022 12:51:13.250289 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 12:51:13.250784
2024 12:51:13.251168 Wipe memory regions:
2025 12:51:13.251528
2026 12:51:13.254056 [0x00000000001000, 0x000000000a0000)
2027 12:51:13.254659
2028 12:51:13.260078 [0x00000000100000, 0x00000030000000)
2029 12:51:13.323576
2030 12:51:13.326482 [0x00000030657430, 0x00000099a2c000)
2031 12:51:13.463983
2032 12:51:13.466808 [0x00000100000000, 0x0000045e800000)
2033 12:51:14.849491
2034 12:51:14.850087 R8152: Initializing
2035 12:51:14.850514
2036 12:51:14.852610 Version 9 (ocp_data = 6010)
2037 12:51:14.856900
2038 12:51:14.857387 R8152: Done initializing
2039 12:51:14.857773
2040 12:51:14.860294 Adding net device
2041 12:51:15.469890
2042 12:51:15.470466 R8152: Initializing
2043 12:51:15.470841
2044 12:51:15.472796 Version 6 (ocp_data = 5c30)
2045 12:51:15.473269
2046 12:51:15.476456 R8152: Done initializing
2047 12:51:15.476895
2048 12:51:15.479497 net_add_device: Attemp to include the same device
2049 12:51:15.483065
2050 12:51:15.490178 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 12:51:15.490615
2052 12:51:15.490953
2053 12:51:15.491269
2054 12:51:15.491968 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 12:51:15.593549 hatch: tftpboot 192.168.201.1 9729710/tftp-deploy-60l4399p/kernel/bzImage 9729710/tftp-deploy-60l4399p/kernel/cmdline 9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
2057 12:51:15.594236 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 12:51:15.594748 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 12:51:15.598958 tftpboot 192.168.201.1 9729710/tftp-deploy-60l4399p/kernel/bzImoy-60l4399p/kernel/cmdline 9729710/tftp-deploy-60l4399p/ramdisk/ramdisk.cpio.gz
2060 12:51:15.599426
2061 12:51:15.599770 Waiting for link
2062 12:51:15.800086
2063 12:51:15.800737 done.
2064 12:51:15.801132
2065 12:51:15.801497 MAC: 00:24:32:50:1a:5f
2066 12:51:15.801848
2067 12:51:15.802785 Sending DHCP discover... done.
2068 12:51:15.803279
2069 12:51:15.806800 Waiting for reply... done.
2070 12:51:15.807421
2071 12:51:15.809853 Sending DHCP request... done.
2072 12:51:15.810345
2073 12:51:15.816187 Waiting for reply... done.
2074 12:51:15.816730
2075 12:51:15.817123 My ip is 192.168.201.21
2076 12:51:15.817493
2077 12:51:15.819752 The DHCP server ip is 192.168.201.1
2078 12:51:15.820288
2079 12:51:15.826431 TFTP server IP predefined by user: 192.168.201.1
2080 12:51:15.826950
2081 12:51:15.833008 Bootfile predefined by user: 9729710/tftp-deploy-60l4399p/kernel/bzImage
2082 12:51:15.833506
2083 12:51:15.836705 Sending tftp read request... done.
2084 12:51:15.837200
2085 12:51:15.842779 Waiting for the transfer...
2086 12:51:15.843230
2087 12:51:16.520168 00000000 ################################################################
2088 12:51:16.520797
2089 12:51:17.199993 00080000 ################################################################
2090 12:51:17.200600
2091 12:51:17.876041 00100000 ################################################################
2092 12:51:17.876634
2093 12:51:18.449408 00180000 ################################################################
2094 12:51:18.449560
2095 12:51:19.026285 00200000 ################################################################
2096 12:51:19.026955
2097 12:51:19.648065 00280000 ################################################################
2098 12:51:19.648212
2099 12:51:20.241527 00300000 ################################################################
2100 12:51:20.242075
2101 12:51:20.902492 00380000 ################################################################
2102 12:51:20.902706
2103 12:51:21.555827 00400000 ################################################################
2104 12:51:21.556489
2105 12:51:22.241799 00480000 ################################################################
2106 12:51:22.242489
2107 12:51:22.855095 00500000 ################################################################
2108 12:51:22.855673
2109 12:51:23.478292 00580000 ################################################################
2110 12:51:23.478448
2111 12:51:24.110480 00600000 ################################################################
2112 12:51:24.110660
2113 12:51:24.771337 00680000 ################################################################
2114 12:51:24.771913
2115 12:51:25.473862 00700000 ################################################################
2116 12:51:25.474433
2117 12:51:26.120101 00780000 ################################################################
2118 12:51:26.120262
2119 12:51:26.718861 00800000 ################################################################
2120 12:51:26.719407
2121 12:51:27.389391 00880000 ################################################################
2122 12:51:27.389958
2123 12:51:28.092928 00900000 ################################################################
2124 12:51:28.093480
2125 12:51:28.796231 00980000 ################################################################
2126 12:51:28.796811
2127 12:51:29.451947 00a00000 ################################################################
2128 12:51:29.452109
2129 12:51:30.046899 00a80000 ################################################################
2130 12:51:30.047438
2131 12:51:30.194943 00b00000 ############## done.
2132 12:51:30.195449
2133 12:51:30.197959 The bootfile was 11646080 bytes long.
2134 12:51:30.198435
2135 12:51:30.201223 Sending tftp read request... done.
2136 12:51:30.201668
2137 12:51:30.204669 Waiting for the transfer...
2138 12:51:30.205115
2139 12:51:30.872285 00000000 ################################################################
2140 12:51:30.872858
2141 12:51:31.493505 00080000 ################################################################
2142 12:51:31.494087
2143 12:51:32.117816 00100000 ################################################################
2144 12:51:32.118356
2145 12:51:32.751263 00180000 ################################################################
2146 12:51:32.751434
2147 12:51:33.377509 00200000 ################################################################
2148 12:51:33.377671
2149 12:51:34.004315 00280000 ################################################################
2150 12:51:34.004487
2151 12:51:34.655433 00300000 ################################################################
2152 12:51:34.655989
2153 12:51:35.310523 00380000 ################################################################
2154 12:51:35.311141
2155 12:51:35.957423 00400000 ################################################################
2156 12:51:35.957581
2157 12:51:36.554911 00480000 ################################################################
2158 12:51:36.555067
2159 12:51:37.111518 00500000 ################################################################
2160 12:51:37.111660
2161 12:51:37.645268 00580000 ################################################################
2162 12:51:37.645442
2163 12:51:37.762549 00600000 ############### done.
2164 12:51:37.762693
2165 12:51:37.766184 Sending tftp read request... done.
2166 12:51:37.766730
2167 12:51:37.769479 Waiting for the transfer...
2168 12:51:37.769971
2169 12:51:37.770357 00000000 # done.
2170 12:51:37.770824
2171 12:51:37.779555 Command line loaded dynamically from TFTP file: 9729710/tftp-deploy-60l4399p/kernel/cmdline
2172 12:51:37.780194
2173 12:51:37.802752 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729710/extract-nfsrootfs-hcuxq9ye,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2174 12:51:37.803240
2175 12:51:37.805824 ec_init(0): CrosEC protocol v3 supported (256, 256)
2176 12:51:37.812645
2177 12:51:37.815864 Shutting down all USB controllers.
2178 12:51:37.816403
2179 12:51:37.816852 Removing current net device
2180 12:51:37.823855
2181 12:51:37.824430 Finalizing coreboot
2182 12:51:37.824816
2183 12:51:37.830324 Exiting depthcharge with code 4 at timestamp: 31984079
2184 12:51:37.830803
2185 12:51:37.831180
2186 12:51:37.831512 Starting kernel ...
2187 12:51:37.831856
2188 12:51:37.833210 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2189 12:51:37.833725 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2190 12:51:37.834115 Setting prompt string to ['Linux version [0-9]']
2191 12:51:37.834472 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2192 12:51:37.834827 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2193 12:51:37.835717
2195 12:55:54.834566 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2197 12:55:54.835653 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2199 12:55:54.836586 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 12:55:54.838054 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 12:55:54.839284 Cleaning after the job
2205 12:55:54.839725 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/ramdisk
2206 12:55:54.842073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/kernel
2207 12:55:54.845791 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/nfsrootfs
2208 12:55:54.924521 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729710/tftp-deploy-60l4399p/modules
2209 12:55:54.925005 start: 4.1 power-off (timeout 00:00:30) [common]
2210 12:55:54.925171 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2211 12:55:55.004579 >> Command sent successfully.
2212 12:55:55.013680 Returned 0 in 0 seconds
2213 12:55:55.115279 end: 4.1 power-off (duration 00:00:00) [common]
2215 12:55:55.116882 start: 4.2 read-feedback (timeout 00:10:00) [common]
2216 12:55:55.117988 Listened to connection for namespace 'common' for up to 1s
2218 12:55:55.120063 Listened to connection for namespace 'common' for up to 1s
2219 12:55:56.120578 Finalising connection for namespace 'common'
2220 12:55:56.121214 Disconnecting from shell: Finalise
2221 12:55:56.121636
2222 12:55:56.222967 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 12:55:56.223507 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729710
2224 12:55:56.398303 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729710
2225 12:55:56.398498 JobError: Your job cannot terminate cleanly.