Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:44:09.995213 lava-dispatcher, installed at version: 2023.01
2 12:44:09.995403 start: 0 validate
3 12:44:09.995532 Start time: 2023-03-22 12:44:09.995521+00:00 (UTC)
4 12:44:09.995659 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:44:09.995790 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:44:10.289634 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:44:10.290389 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:44:15.793902 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:44:15.794645 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:44:16.088769 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:44:16.089477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv5.10.175-cip29-rt12%2Fx86_64%2Fx86_64_defconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:44:17.095340 validate duration: 7.10
14 12:44:17.095931 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:44:17.096111 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:44:17.096270 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:44:17.096430 Not decompressing ramdisk as can be used compressed.
18 12:44:17.096569 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:44:17.096681 saving as /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/ramdisk/initrd.cpio.gz
20 12:44:17.096788 total size: 5672849 (5MB)
21 12:44:17.098150 progress 0% (0MB)
22 12:44:17.100664 progress 5% (0MB)
23 12:44:17.102834 progress 10% (0MB)
24 12:44:17.104703 progress 15% (0MB)
25 12:44:17.106706 progress 20% (1MB)
26 12:44:17.108637 progress 25% (1MB)
27 12:44:17.110308 progress 30% (1MB)
28 12:44:17.112127 progress 35% (1MB)
29 12:44:17.113785 progress 40% (2MB)
30 12:44:17.115266 progress 45% (2MB)
31 12:44:17.116835 progress 50% (2MB)
32 12:44:17.118369 progress 55% (3MB)
33 12:44:17.119728 progress 60% (3MB)
34 12:44:17.121317 progress 65% (3MB)
35 12:44:17.122835 progress 70% (3MB)
36 12:44:17.124157 progress 75% (4MB)
37 12:44:17.125650 progress 80% (4MB)
38 12:44:17.127118 progress 85% (4MB)
39 12:44:17.128489 progress 90% (4MB)
40 12:44:17.130049 progress 95% (5MB)
41 12:44:17.131698 progress 100% (5MB)
42 12:44:17.131823 5MB downloaded in 0.04s (154.44MB/s)
43 12:44:17.132020 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:44:17.132345 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:44:17.132449 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:44:17.132588 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:44:17.132712 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:44:17.132782 saving as /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/kernel/bzImage
50 12:44:17.132844 total size: 11646080 (11MB)
51 12:44:17.132922 No compression specified
52 12:44:17.133842 progress 0% (0MB)
53 12:44:17.136880 progress 5% (0MB)
54 12:44:17.139957 progress 10% (1MB)
55 12:44:17.143004 progress 15% (1MB)
56 12:44:17.145934 progress 20% (2MB)
57 12:44:17.148779 progress 25% (2MB)
58 12:44:17.151957 progress 30% (3MB)
59 12:44:17.154879 progress 35% (3MB)
60 12:44:17.157866 progress 40% (4MB)
61 12:44:17.160683 progress 45% (5MB)
62 12:44:17.163613 progress 50% (5MB)
63 12:44:17.166556 progress 55% (6MB)
64 12:44:17.169580 progress 60% (6MB)
65 12:44:17.172585 progress 65% (7MB)
66 12:44:17.175342 progress 70% (7MB)
67 12:44:17.178237 progress 75% (8MB)
68 12:44:17.181180 progress 80% (8MB)
69 12:44:17.184334 progress 85% (9MB)
70 12:44:17.187015 progress 90% (10MB)
71 12:44:17.189915 progress 95% (10MB)
72 12:44:17.192986 progress 100% (11MB)
73 12:44:17.193202 11MB downloaded in 0.06s (184.02MB/s)
74 12:44:17.193351 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:44:17.193646 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:44:17.193777 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:44:17.193879 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:44:17.193997 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:44:17.194082 saving as /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/nfsrootfs/full.rootfs.tar
81 12:44:17.194163 total size: 125916488 (120MB)
82 12:44:17.194240 Using unxz to decompress xz
83 12:44:17.197389 progress 0% (0MB)
84 12:44:17.667572 progress 5% (6MB)
85 12:44:18.152861 progress 10% (12MB)
86 12:44:18.704869 progress 15% (18MB)
87 12:44:19.199673 progress 20% (24MB)
88 12:44:19.565795 progress 25% (30MB)
89 12:44:19.939976 progress 30% (36MB)
90 12:44:20.211547 progress 35% (42MB)
91 12:44:20.417668 progress 40% (48MB)
92 12:44:20.839284 progress 45% (54MB)
93 12:44:21.231754 progress 50% (60MB)
94 12:44:21.622846 progress 55% (66MB)
95 12:44:22.011554 progress 60% (72MB)
96 12:44:22.373994 progress 65% (78MB)
97 12:44:22.804803 progress 70% (84MB)
98 12:44:23.261904 progress 75% (90MB)
99 12:44:23.721444 progress 80% (96MB)
100 12:44:23.845288 progress 85% (102MB)
101 12:44:24.063558 progress 90% (108MB)
102 12:44:24.516267 progress 95% (114MB)
103 12:44:24.918343 progress 100% (120MB)
104 12:44:24.924678 120MB downloaded in 7.73s (15.53MB/s)
105 12:44:24.925001 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:44:24.925283 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:44:24.925383 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:44:24.925482 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:44:24.925609 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v5.10.175-cip29-rt12/x86_64/x86_64_defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:44:24.925687 saving as /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/modules/modules.tar
112 12:44:24.925774 total size: 497788 (0MB)
113 12:44:24.925861 Using unxz to decompress xz
114 12:44:24.928965 progress 6% (0MB)
115 12:44:24.929376 progress 13% (0MB)
116 12:44:24.929755 progress 19% (0MB)
117 12:44:24.931048 progress 26% (0MB)
118 12:44:24.933250 progress 32% (0MB)
119 12:44:24.935507 progress 39% (0MB)
120 12:44:24.937424 progress 46% (0MB)
121 12:44:24.939527 progress 52% (0MB)
122 12:44:24.942021 progress 59% (0MB)
123 12:44:24.944174 progress 65% (0MB)
124 12:44:24.946394 progress 72% (0MB)
125 12:44:24.948491 progress 78% (0MB)
126 12:44:24.950736 progress 85% (0MB)
127 12:44:24.952854 progress 92% (0MB)
128 12:44:24.954815 progress 98% (0MB)
129 12:44:24.962149 0MB downloaded in 0.04s (13.06MB/s)
130 12:44:24.962464 end: 1.4.1 http-download (duration 00:00:00) [common]
132 12:44:24.962819 end: 1.4 download-retry (duration 00:00:00) [common]
133 12:44:24.962947 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
134 12:44:24.963074 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
135 12:44:26.880918 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729661/extract-nfsrootfs-734j389c
136 12:44:26.881126 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 12:44:26.881239 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 12:44:26.881382 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq
139 12:44:26.881487 makedir: /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin
140 12:44:26.881573 makedir: /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/tests
141 12:44:26.881655 makedir: /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/results
142 12:44:26.881753 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-add-keys
143 12:44:26.881885 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-add-sources
144 12:44:26.882005 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-background-process-start
145 12:44:26.882119 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-background-process-stop
146 12:44:26.882232 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-common-functions
147 12:44:26.882345 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-echo-ipv4
148 12:44:26.882479 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-install-packages
149 12:44:26.882705 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-installed-packages
150 12:44:26.882820 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-os-build
151 12:44:26.882932 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-probe-channel
152 12:44:26.883043 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-probe-ip
153 12:44:26.883154 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-target-ip
154 12:44:26.883264 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-target-mac
155 12:44:26.883374 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-target-storage
156 12:44:26.883488 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-case
157 12:44:26.883599 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-event
158 12:44:26.883708 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-feedback
159 12:44:26.883819 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-raise
160 12:44:26.883928 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-reference
161 12:44:26.884036 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-runner
162 12:44:26.884145 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-set
163 12:44:26.884254 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-test-shell
164 12:44:26.884365 Updating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-install-packages (oe)
165 12:44:26.884485 Updating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/bin/lava-installed-packages (oe)
166 12:44:26.884584 Creating /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/environment
167 12:44:26.884672 LAVA metadata
168 12:44:26.884742 - LAVA_JOB_ID=9729661
169 12:44:26.884807 - LAVA_DISPATCHER_IP=192.168.201.1
170 12:44:26.884912 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 12:44:26.884978 skipped lava-vland-overlay
172 12:44:26.885055 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 12:44:26.885138 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 12:44:26.885203 skipped lava-multinode-overlay
175 12:44:26.885278 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 12:44:26.885360 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 12:44:26.885433 Loading test definitions
178 12:44:26.885523 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 12:44:26.885595 Using /lava-9729661 at stage 0
180 12:44:26.885693 Fetching tests from https://github.com/kernelci/test-definitions
181 12:44:26.885776 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/0/tests/0_ltp-ipc'
182 12:44:34.893335 Running '/usr/bin/git checkout kernelci.org
183 12:44:35.030662 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
184 12:44:35.031413 uuid=9729661_1.5.2.3.1 testdef=None
185 12:44:35.031575 end: 1.5.2.3.1 git-repo-action (duration 00:00:08) [common]
187 12:44:35.031849 start: 1.5.2.3.2 test-overlay (timeout 00:09:42) [common]
188 12:44:35.032640 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 12:44:35.032898 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:42) [common]
191 12:44:35.033980 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 12:44:35.034259 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:42) [common]
194 12:44:35.035272 runner path: /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/0/tests/0_ltp-ipc test_uuid 9729661_1.5.2.3.1
195 12:44:35.035367 SKIPFILE='skipfile-lkft.yaml'
196 12:44:35.035434 SKIP_INSTALL='true'
197 12:44:35.035495 TST_CMDFILES='ipc'
198 12:44:35.035631 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:44:35.035855 Creating lava-test-runner.conf files
201 12:44:35.035922 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729661/lava-overlay-wfltuihq/lava-9729661/0 for stage 0
202 12:44:35.036007 - 0_ltp-ipc
203 12:44:35.036107 end: 1.5.2.3 test-definition (duration 00:00:08) [common]
204 12:44:35.036200 start: 1.5.2.4 compress-overlay (timeout 00:09:42) [common]
205 12:44:42.696836 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 12:44:42.696993 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:34) [common]
207 12:44:42.697094 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:44:42.697280 end: 1.5.2 lava-overlay (duration 00:00:16) [common]
209 12:44:42.697376 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
210 12:44:42.805639 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:44:42.805992 start: 1.5.4 extract-modules (timeout 00:09:34) [common]
212 12:44:42.806120 extracting modules file /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729661/extract-nfsrootfs-734j389c
213 12:44:42.819746 extracting modules file /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729661/extract-overlay-ramdisk-pvxdbmt9/ramdisk
214 12:44:42.832952 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:44:42.833107 start: 1.5.5 apply-overlay-tftp (timeout 00:09:34) [common]
216 12:44:42.833207 [common] Applying overlay to NFS
217 12:44:42.833285 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729661/compress-overlay-50dhy5bg/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729661/extract-nfsrootfs-734j389c
218 12:44:43.649318 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:44:43.649489 start: 1.5.6 configure-preseed-file (timeout 00:09:33) [common]
220 12:44:43.649591 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:44:43.649695 start: 1.5.7 compress-ramdisk (timeout 00:09:33) [common]
222 12:44:43.649786 Building ramdisk /var/lib/lava/dispatcher/tmp/9729661/extract-overlay-ramdisk-pvxdbmt9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729661/extract-overlay-ramdisk-pvxdbmt9/ramdisk
223 12:44:43.692487 >> 31110 blocks
224 12:44:44.276997 rename /var/lib/lava/dispatcher/tmp/9729661/extract-overlay-ramdisk-pvxdbmt9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
225 12:44:44.277399 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:44:44.277531 start: 1.5.8 prepare-kernel (timeout 00:09:33) [common]
227 12:44:44.277649 start: 1.5.8.1 prepare-fit (timeout 00:09:33) [common]
228 12:44:44.277753 No mkimage arch provided, not using FIT.
229 12:44:44.277852 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:44:44.277943 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:44:44.278047 end: 1.5 prepare-tftp-overlay (duration 00:00:19) [common]
232 12:44:44.278149 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
233 12:44:44.278235 No LXC device requested
234 12:44:44.278320 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:44:44.278416 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
236 12:44:44.278506 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:44:44.278596 Checking files for TFTP limit of 4294967296 bytes.
238 12:44:44.279001 end: 1 tftp-deploy (duration 00:00:27) [common]
239 12:44:44.279110 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:44:44.279213 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:44:44.279351 substitutions:
242 12:44:44.279426 - {DTB}: None
243 12:44:44.279493 - {INITRD}: 9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
244 12:44:44.279558 - {KERNEL}: 9729661/tftp-deploy-4lhhmppz/kernel/bzImage
245 12:44:44.279621 - {LAVA_MAC}: None
246 12:44:44.279681 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729661/extract-nfsrootfs-734j389c
247 12:44:44.279745 - {NFS_SERVER_IP}: 192.168.201.1
248 12:44:44.279807 - {PRESEED_CONFIG}: None
249 12:44:44.279870 - {PRESEED_LOCAL}: None
250 12:44:44.279933 - {RAMDISK}: 9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
251 12:44:44.279996 - {ROOT_PART}: None
252 12:44:44.280062 - {ROOT}: None
253 12:44:44.280122 - {SERVER_IP}: 192.168.201.1
254 12:44:44.280181 - {TEE}: None
255 12:44:44.280240 Parsed boot commands:
256 12:44:44.280297 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:44:44.280463 Parsed boot commands: tftpboot 192.168.201.1 9729661/tftp-deploy-4lhhmppz/kernel/bzImage 9729661/tftp-deploy-4lhhmppz/kernel/cmdline 9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
258 12:44:44.280562 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:44:44.280660 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:44:44.280761 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:44:44.280855 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:44:44.280936 Not connected, no need to disconnect.
263 12:44:44.281019 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:44:44.281106 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:44:44.281179 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-2'
266 12:44:44.284162 Setting prompt string to ['lava-test: # ']
267 12:44:44.284516 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:44:44.284648 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:44:44.284753 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:44:44.284849 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:44:44.285037 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=reboot'
272 12:44:49.416584 >> Command sent successfully.
273 12:44:49.418802 Returned 0 in 5 seconds
274 12:44:49.519562 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 12:44:49.520023 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 12:44:49.520157 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 12:44:49.520269 Setting prompt string to 'Starting depthcharge on Voema...'
279 12:44:49.520338 Changing prompt to 'Starting depthcharge on Voema...'
280 12:44:49.520457 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
281 12:44:49.520814 [Enter `^Ec?' for help]
282 12:44:51.153415
283 12:44:51.153572
284 12:44:51.163665 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
285 12:44:51.169946 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
286 12:44:51.173308 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
287 12:44:51.176676 CPU: AES supported, TXT NOT supported, VT supported
288 12:44:51.183338 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
289 12:44:51.189564 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
290 12:44:51.193214 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
291 12:44:51.196261 VBOOT: Loading verstage.
292 12:44:51.202985 FMAP: Found "FLASH" version 1.1 at 0x1804000.
293 12:44:51.206032 FMAP: base = 0x0 size = 0x2000000 #areas = 32
294 12:44:51.212808 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 12:44:51.219759 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
296 12:44:51.226345 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
297 12:44:51.229799
298 12:44:51.229885
299 12:44:51.239807 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
300 12:44:51.254211 Probing TPM: . done!
301 12:44:51.257204 TPM ready after 0 ms
302 12:44:51.260858 Connected to device vid:did:rid of 1ae0:0028:00
303 12:44:51.271933 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
304 12:44:51.278639 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
305 12:44:51.282060 Initialized TPM device CR50 revision 0
306 12:44:51.333426 tlcl_send_startup: Startup return code is 0
307 12:44:51.333569 TPM: setup succeeded
308 12:44:51.349319 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
309 12:44:51.363319 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
310 12:44:51.376025 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
311 12:44:51.386167 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
312 12:44:51.389487 Chrome EC: UHEPI supported
313 12:44:51.393090 Phase 1
314 12:44:51.396152 FMAP: area GBB found @ 1805000 (458752 bytes)
315 12:44:51.405992 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
316 12:44:51.412706 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
317 12:44:51.419306 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
318 12:44:51.426256 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
319 12:44:51.429453 Recovery requested (1009000e)
320 12:44:51.432435 TPM: Extending digest for VBOOT: boot mode into PCR 0
321 12:44:51.444273 tlcl_extend: response is 0
322 12:44:51.450864 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
323 12:44:51.460990 tlcl_extend: response is 0
324 12:44:51.467470 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
325 12:44:51.474094 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
326 12:44:51.480660 BS: verstage times (exec / console): total (unknown) / 142 ms
327 12:44:51.480751
328 12:44:51.480821
329 12:44:51.493973 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
330 12:44:51.500768 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
331 12:44:51.504095 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
332 12:44:51.507053 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
333 12:44:51.513879 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
334 12:44:51.517429 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
335 12:44:51.520510 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
336 12:44:51.523503 TCO_STS: 0000 0000
337 12:44:51.527075 GEN_PMCON: d0015038 00002200
338 12:44:51.530451 GBLRST_CAUSE: 00000000 00000000
339 12:44:51.530546 HPR_CAUSE0: 00000000
340 12:44:51.533929 prev_sleep_state 5
341 12:44:51.537093 Boot Count incremented to 18610
342 12:44:51.543389 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
343 12:44:51.550403 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
344 12:44:51.557014 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
345 12:44:51.563508 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
346 12:44:51.568229 Chrome EC: UHEPI supported
347 12:44:51.574654 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
348 12:44:51.587361 Probing TPM: done!
349 12:44:51.594439 Connected to device vid:did:rid of 1ae0:0028:00
350 12:44:51.605115 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
351 12:44:51.613585 Initialized TPM device CR50 revision 0
352 12:44:51.622760 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
353 12:44:51.629545 MRC: Hash idx 0x100b comparison successful.
354 12:44:51.632623 MRC cache found, size faa8
355 12:44:51.632708 bootmode is set to: 2
356 12:44:51.636292 SPD index = 0
357 12:44:51.642264 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
358 12:44:51.645809 SPD: module type is LPDDR4X
359 12:44:51.649438 SPD: module part number is MT53E512M64D4NW-046
360 12:44:51.655895 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
361 12:44:51.658949 SPD: device width 16 bits, bus width 16 bits
362 12:44:51.665470 SPD: module size is 1024 MB (per channel)
363 12:44:52.098630 CBMEM:
364 12:44:52.101666 IMD: root @ 0x76fff000 254 entries.
365 12:44:52.104794 IMD: root @ 0x76ffec00 62 entries.
366 12:44:52.108437 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
367 12:44:52.115030 FMAP: area RW_VPD found @ f35000 (8192 bytes)
368 12:44:52.117961 External stage cache:
369 12:44:52.121541 IMD: root @ 0x7b3ff000 254 entries.
370 12:44:52.124578 IMD: root @ 0x7b3fec00 62 entries.
371 12:44:52.140029 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
372 12:44:52.146656 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
373 12:44:52.153372 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
374 12:44:52.167118 MRC: 'RECOVERY_MRC_CACHE' does not need update.
375 12:44:52.173568 cse_lite: Skip switching to RW in the recovery path
376 12:44:52.173673 8 DIMMs found
377 12:44:52.177061 SMM Memory Map
378 12:44:52.180475 SMRAM : 0x7b000000 0x800000
379 12:44:52.184284 Subregion 0: 0x7b000000 0x200000
380 12:44:52.184399 Subregion 1: 0x7b200000 0x200000
381 12:44:52.188409 Subregion 2: 0x7b400000 0x400000
382 12:44:52.191420 top_of_ram = 0x77000000
383 12:44:52.198351 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
384 12:44:52.201294 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
385 12:44:52.208064 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
386 12:44:52.211579 MTRR Range: Start=ff000000 End=0 (Size 1000000)
387 12:44:52.221352 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
388 12:44:52.227815 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
389 12:44:52.237704 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
390 12:44:52.240667 Processing 211 relocs. Offset value of 0x74c0b000
391 12:44:52.249799 BS: romstage times (exec / console): total (unknown) / 277 ms
392 12:44:52.256579
393 12:44:52.256675
394 12:44:52.266020 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
395 12:44:52.269626 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
396 12:44:52.279246 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
397 12:44:52.286187 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
398 12:44:52.292440 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
399 12:44:52.299565 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
400 12:44:52.346761 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
401 12:44:52.352761 Processing 5008 relocs. Offset value of 0x75d98000
402 12:44:52.356432 BS: postcar times (exec / console): total (unknown) / 59 ms
403 12:44:52.359506
404 12:44:52.359602
405 12:44:52.369741 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
406 12:44:52.369845 Normal boot
407 12:44:52.372794 FW_CONFIG value is 0x804c02
408 12:44:52.376220 PCI: 00:07.0 disabled by fw_config
409 12:44:52.380101 PCI: 00:07.1 disabled by fw_config
410 12:44:52.382962 PCI: 00:0d.2 disabled by fw_config
411 12:44:52.386225 PCI: 00:1c.7 disabled by fw_config
412 12:44:52.392792 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:44:52.399349 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:44:52.402950 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
415 12:44:52.406006 GENERIC: 0.0 disabled by fw_config
416 12:44:52.412999 GENERIC: 1.0 disabled by fw_config
417 12:44:52.416084 fw_config match found: DB_USB=USB3_ACTIVE
418 12:44:52.419164 fw_config match found: DB_USB=USB3_ACTIVE
419 12:44:52.422795 fw_config match found: DB_USB=USB3_ACTIVE
420 12:44:52.429596 fw_config match found: DB_USB=USB3_ACTIVE
421 12:44:52.432531 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
422 12:44:52.439204 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
423 12:44:52.449396 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
424 12:44:52.456024 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
425 12:44:52.459072 microcode: sig=0x806c1 pf=0x80 revision=0x86
426 12:44:52.465794 microcode: Update skipped, already up-to-date
427 12:44:52.472248 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
428 12:44:52.499828 Detected 4 core, 8 thread CPU.
429 12:44:52.503402 Setting up SMI for CPU
430 12:44:52.506369 IED base = 0x7b400000
431 12:44:52.506466 IED size = 0x00400000
432 12:44:52.509816 Will perform SMM setup.
433 12:44:52.516457 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
434 12:44:52.523132 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
435 12:44:52.529680 Processing 16 relocs. Offset value of 0x00030000
436 12:44:52.533353 Attempting to start 7 APs
437 12:44:52.536349 Waiting for 10ms after sending INIT.
438 12:44:52.551737 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
439 12:44:52.551873 done.
440 12:44:52.555415 AP: slot 7 apic_id 7.
441 12:44:52.558983 AP: slot 3 apic_id 6.
442 12:44:52.559076 AP: slot 6 apic_id 4.
443 12:44:52.562008 AP: slot 2 apic_id 5.
444 12:44:52.565205 Waiting for 2nd SIPI to complete...done.
445 12:44:52.568721 AP: slot 5 apic_id 2.
446 12:44:52.571922 AP: slot 4 apic_id 3.
447 12:44:52.578342 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
448 12:44:52.584724 Processing 13 relocs. Offset value of 0x00038000
449 12:44:52.588344 Unable to locate Global NVS
450 12:44:52.595218 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 12:44:52.598044 Installing permanent SMM handler to 0x7b000000
452 12:44:52.608363 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 12:44:52.611845 Processing 794 relocs. Offset value of 0x7b010000
454 12:44:52.621921 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 12:44:52.624975 Processing 13 relocs. Offset value of 0x7b008000
456 12:44:52.631713 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 12:44:52.638279 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 12:44:52.641229 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 12:44:52.648242 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 12:44:52.654695 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 12:44:52.661284 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 12:44:52.668081 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 12:44:52.671113 Unable to locate Global NVS
464 12:44:52.677527 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 12:44:52.680828 Clearing SMI status registers
466 12:44:52.684107 SMI_STS: PM1
467 12:44:52.684197 PM1_STS: PWRBTN
468 12:44:52.690678 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 12:44:52.694184 In relocation handler: CPU 0
470 12:44:52.697809 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 12:44:52.704166 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 12:44:52.707275 Relocation complete.
473 12:44:52.714040 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 12:44:52.717505 In relocation handler: CPU 1
475 12:44:52.720500 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 12:44:52.723950 Relocation complete.
477 12:44:52.730794 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
478 12:44:52.733880 In relocation handler: CPU 7
479 12:44:52.737429 New SMBASE=0x7affe400 IEDBASE=0x7b400000
480 12:44:52.740481 Relocation complete.
481 12:44:52.747088 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
482 12:44:52.750092 In relocation handler: CPU 3
483 12:44:52.753666 New SMBASE=0x7afff400 IEDBASE=0x7b400000
484 12:44:52.757145 Writing SMRR. base = 0x7b000006, mask=0xff800c00
485 12:44:52.760081 Relocation complete.
486 12:44:52.766665 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
487 12:44:52.770386 In relocation handler: CPU 2
488 12:44:52.773517 New SMBASE=0x7afff800 IEDBASE=0x7b400000
489 12:44:52.776417 Relocation complete.
490 12:44:52.783081 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
491 12:44:52.786708 In relocation handler: CPU 6
492 12:44:52.789802 New SMBASE=0x7affe800 IEDBASE=0x7b400000
493 12:44:52.796765 Writing SMRR. base = 0x7b000006, mask=0xff800c00
494 12:44:52.796870 Relocation complete.
495 12:44:52.806533 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
496 12:44:52.809564 In relocation handler: CPU 5
497 12:44:52.813223 New SMBASE=0x7affec00 IEDBASE=0x7b400000
498 12:44:52.816268 Writing SMRR. base = 0x7b000006, mask=0xff800c00
499 12:44:52.819988 Relocation complete.
500 12:44:52.826242 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
501 12:44:52.829582 In relocation handler: CPU 4
502 12:44:52.832997 New SMBASE=0x7afff000 IEDBASE=0x7b400000
503 12:44:52.836202 Relocation complete.
504 12:44:52.839345 Initializing CPU #0
505 12:44:52.842968 CPU: vendor Intel device 806c1
506 12:44:52.845974 CPU: family 06, model 8c, stepping 01
507 12:44:52.849573 Clearing out pending MCEs
508 12:44:52.849675 Setting up local APIC...
509 12:44:52.852972 apic_id: 0x00 done.
510 12:44:52.857134 Turbo is available but hidden
511 12:44:52.860778 Turbo is available and visible
512 12:44:52.864809 microcode: Update skipped, already up-to-date
513 12:44:52.864896 CPU #0 initialized
514 12:44:52.867634 Initializing CPU #3
515 12:44:52.870736 Initializing CPU #7
516 12:44:52.874342 CPU: vendor Intel device 806c1
517 12:44:52.877449 CPU: family 06, model 8c, stepping 01
518 12:44:52.881153 CPU: vendor Intel device 806c1
519 12:44:52.884078 CPU: family 06, model 8c, stepping 01
520 12:44:52.887678 Clearing out pending MCEs
521 12:44:52.887767 Clearing out pending MCEs
522 12:44:52.890634 Setting up local APIC...
523 12:44:52.894312 Initializing CPU #5
524 12:44:52.894401 Initializing CPU #4
525 12:44:52.897258 CPU: vendor Intel device 806c1
526 12:44:52.903766 CPU: family 06, model 8c, stepping 01
527 12:44:52.903857 CPU: vendor Intel device 806c1
528 12:44:52.910736 CPU: family 06, model 8c, stepping 01
529 12:44:52.910828 Clearing out pending MCEs
530 12:44:52.913725 Clearing out pending MCEs
531 12:44:52.917371 Setting up local APIC...
532 12:44:52.920556 Initializing CPU #6
533 12:44:52.920645 Initializing CPU #2
534 12:44:52.924095 CPU: vendor Intel device 806c1
535 12:44:52.927743 CPU: family 06, model 8c, stepping 01
536 12:44:52.930423 CPU: vendor Intel device 806c1
537 12:44:52.933757 CPU: family 06, model 8c, stepping 01
538 12:44:52.937045 Clearing out pending MCEs
539 12:44:52.940555 Clearing out pending MCEs
540 12:44:52.943670 Setting up local APIC...
541 12:44:52.943755 apic_id: 0x07 done.
542 12:44:52.947378 apic_id: 0x06 done.
543 12:44:52.950440 microcode: Update skipped, already up-to-date
544 12:44:52.956937 microcode: Update skipped, already up-to-date
545 12:44:52.957033 CPU #7 initialized
546 12:44:52.960683 CPU #3 initialized
547 12:44:52.963718 Setting up local APIC...
548 12:44:52.963806 apic_id: 0x04 done.
549 12:44:52.967287 Setting up local APIC...
550 12:44:52.970686 apic_id: 0x02 done.
551 12:44:52.973520 Setting up local APIC...
552 12:44:52.976663 microcode: Update skipped, already up-to-date
553 12:44:52.980429 apic_id: 0x05 done.
554 12:44:52.980516 CPU #6 initialized
555 12:44:52.987017 microcode: Update skipped, already up-to-date
556 12:44:52.987106 Initializing CPU #1
557 12:44:52.993690 microcode: Update skipped, already up-to-date
558 12:44:52.993783 apic_id: 0x03 done.
559 12:44:52.996677 CPU #5 initialized
560 12:44:53.000362 microcode: Update skipped, already up-to-date
561 12:44:53.003325 CPU: vendor Intel device 806c1
562 12:44:53.006947 CPU: family 06, model 8c, stepping 01
563 12:44:53.010052 CPU #4 initialized
564 12:44:53.010156 CPU #2 initialized
565 12:44:53.013550 Clearing out pending MCEs
566 12:44:53.016975 Setting up local APIC...
567 12:44:53.020050 apic_id: 0x01 done.
568 12:44:53.023559 microcode: Update skipped, already up-to-date
569 12:44:53.026524 CPU #1 initialized
570 12:44:53.030121 bsp_do_flight_plan done after 459 msecs.
571 12:44:53.033110 CPU: frequency set to 4000 MHz
572 12:44:53.033198 Enabling SMIs.
573 12:44:53.039955 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
574 12:44:53.057237 SATAXPCIE1 indicates PCIe NVMe is present
575 12:44:53.060788 Probing TPM: done!
576 12:44:53.063838 Connected to device vid:did:rid of 1ae0:0028:00
577 12:44:53.074579 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
578 12:44:53.078155 Initialized TPM device CR50 revision 0
579 12:44:53.081414 Enabling S0i3.4
580 12:44:53.087616 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
581 12:44:53.091264 Found a VBT of 8704 bytes after decompression
582 12:44:53.097877 cse_lite: CSE RO boot. HybridStorageMode disabled
583 12:44:53.104008 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
584 12:44:53.179700 FSPS returned 0
585 12:44:53.183413 Executing Phase 1 of FspMultiPhaseSiInit
586 12:44:53.192979 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
587 12:44:53.196477 port C0 DISC req: usage 1 usb3 1 usb2 5
588 12:44:53.199986 Raw Buffer output 0 00000511
589 12:44:53.202906 Raw Buffer output 1 00000000
590 12:44:53.206561 pmc_send_ipc_cmd succeeded
591 12:44:53.213542 port C1 DISC req: usage 1 usb3 2 usb2 3
592 12:44:53.213633 Raw Buffer output 0 00000321
593 12:44:53.216604 Raw Buffer output 1 00000000
594 12:44:53.220860 pmc_send_ipc_cmd succeeded
595 12:44:53.226453 Detected 4 core, 8 thread CPU.
596 12:44:53.229381 Detected 4 core, 8 thread CPU.
597 12:44:53.463321 Display FSP Version Info HOB
598 12:44:53.467047 Reference Code - CPU = a.0.4c.31
599 12:44:53.469972 uCode Version = 0.0.0.86
600 12:44:53.473077 TXT ACM version = ff.ff.ff.ffff
601 12:44:53.476596 Reference Code - ME = a.0.4c.31
602 12:44:53.479669 MEBx version = 0.0.0.0
603 12:44:53.483398 ME Firmware Version = Consumer SKU
604 12:44:53.486498 Reference Code - PCH = a.0.4c.31
605 12:44:53.489573 PCH-CRID Status = Disabled
606 12:44:53.493081 PCH-CRID Original Value = ff.ff.ff.ffff
607 12:44:53.496750 PCH-CRID New Value = ff.ff.ff.ffff
608 12:44:53.499786 OPROM - RST - RAID = ff.ff.ff.ffff
609 12:44:53.503269 PCH Hsio Version = 4.0.0.0
610 12:44:53.506339 Reference Code - SA - System Agent = a.0.4c.31
611 12:44:53.509834 Reference Code - MRC = 2.0.0.1
612 12:44:53.513173 SA - PCIe Version = a.0.4c.31
613 12:44:53.516172 SA-CRID Status = Disabled
614 12:44:53.519711 SA-CRID Original Value = 0.0.0.1
615 12:44:53.523367 SA-CRID New Value = 0.0.0.1
616 12:44:53.526183 OPROM - VBIOS = ff.ff.ff.ffff
617 12:44:53.529669 IO Manageability Engine FW Version = 11.1.4.0
618 12:44:53.533258 PHY Build Version = 0.0.0.e0
619 12:44:53.536332 Thunderbolt(TM) FW Version = 0.0.0.0
620 12:44:53.543063 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
621 12:44:53.546455 ITSS IRQ Polarities Before:
622 12:44:53.546548 IPC0: 0xffffffff
623 12:44:53.549896 IPC1: 0xffffffff
624 12:44:53.549981 IPC2: 0xffffffff
625 12:44:53.552821 IPC3: 0xffffffff
626 12:44:53.556346 ITSS IRQ Polarities After:
627 12:44:53.556476 IPC0: 0xffffffff
628 12:44:53.559473 IPC1: 0xffffffff
629 12:44:53.559551 IPC2: 0xffffffff
630 12:44:53.563053 IPC3: 0xffffffff
631 12:44:53.566020 Found PCIe Root Port #9 at PCI: 00:1d.0.
632 12:44:53.579276 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
633 12:44:53.589436 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
634 12:44:53.602486 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
635 12:44:53.609121 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
636 12:44:53.612796 Enumerating buses...
637 12:44:53.615595 Show all devs... Before device enumeration.
638 12:44:53.619066 Root Device: enabled 1
639 12:44:53.619154 DOMAIN: 0000: enabled 1
640 12:44:53.622133 CPU_CLUSTER: 0: enabled 1
641 12:44:53.625815 PCI: 00:00.0: enabled 1
642 12:44:53.629490 PCI: 00:02.0: enabled 1
643 12:44:53.629577 PCI: 00:04.0: enabled 1
644 12:44:53.632252 PCI: 00:05.0: enabled 1
645 12:44:53.635864 PCI: 00:06.0: enabled 0
646 12:44:53.638855 PCI: 00:07.0: enabled 0
647 12:44:53.638940 PCI: 00:07.1: enabled 0
648 12:44:53.642299 PCI: 00:07.2: enabled 0
649 12:44:53.645927 PCI: 00:07.3: enabled 0
650 12:44:53.646014 PCI: 00:08.0: enabled 1
651 12:44:53.649276 PCI: 00:09.0: enabled 0
652 12:44:53.652581 PCI: 00:0a.0: enabled 0
653 12:44:53.655649 PCI: 00:0d.0: enabled 1
654 12:44:53.655737 PCI: 00:0d.1: enabled 0
655 12:44:53.659226 PCI: 00:0d.2: enabled 0
656 12:44:53.662211 PCI: 00:0d.3: enabled 0
657 12:44:53.665857 PCI: 00:0e.0: enabled 0
658 12:44:53.665945 PCI: 00:10.2: enabled 1
659 12:44:53.668867 PCI: 00:10.6: enabled 0
660 12:44:53.672560 PCI: 00:10.7: enabled 0
661 12:44:53.675598 PCI: 00:12.0: enabled 0
662 12:44:53.675685 PCI: 00:12.6: enabled 0
663 12:44:53.679236 PCI: 00:13.0: enabled 0
664 12:44:53.682144 PCI: 00:14.0: enabled 1
665 12:44:53.685695 PCI: 00:14.1: enabled 0
666 12:44:53.685782 PCI: 00:14.2: enabled 1
667 12:44:53.688782 PCI: 00:14.3: enabled 1
668 12:44:53.692293 PCI: 00:15.0: enabled 1
669 12:44:53.692377 PCI: 00:15.1: enabled 1
670 12:44:53.695370 PCI: 00:15.2: enabled 1
671 12:44:53.699061 PCI: 00:15.3: enabled 1
672 12:44:53.701949 PCI: 00:16.0: enabled 1
673 12:44:53.702049 PCI: 00:16.1: enabled 0
674 12:44:53.705482 PCI: 00:16.2: enabled 0
675 12:44:53.709143 PCI: 00:16.3: enabled 0
676 12:44:53.712155 PCI: 00:16.4: enabled 0
677 12:44:53.712238 PCI: 00:16.5: enabled 0
678 12:44:53.715279 PCI: 00:17.0: enabled 1
679 12:44:53.718818 PCI: 00:19.0: enabled 0
680 12:44:53.722284 PCI: 00:19.1: enabled 1
681 12:44:53.722372 PCI: 00:19.2: enabled 0
682 12:44:53.725313 PCI: 00:1c.0: enabled 1
683 12:44:53.728341 PCI: 00:1c.1: enabled 0
684 12:44:53.732021 PCI: 00:1c.2: enabled 0
685 12:44:53.732102 PCI: 00:1c.3: enabled 0
686 12:44:53.735041 PCI: 00:1c.4: enabled 0
687 12:44:53.738365 PCI: 00:1c.5: enabled 0
688 12:44:53.738447 PCI: 00:1c.6: enabled 1
689 12:44:53.741961 PCI: 00:1c.7: enabled 0
690 12:44:53.745086 PCI: 00:1d.0: enabled 1
691 12:44:53.748621 PCI: 00:1d.1: enabled 0
692 12:44:53.748701 PCI: 00:1d.2: enabled 1
693 12:44:53.751580 PCI: 00:1d.3: enabled 0
694 12:44:53.755139 PCI: 00:1e.0: enabled 1
695 12:44:53.758502 PCI: 00:1e.1: enabled 0
696 12:44:53.758613 PCI: 00:1e.2: enabled 1
697 12:44:53.761999 PCI: 00:1e.3: enabled 1
698 12:44:53.765097 PCI: 00:1f.0: enabled 1
699 12:44:53.768142 PCI: 00:1f.1: enabled 0
700 12:44:53.768228 PCI: 00:1f.2: enabled 1
701 12:44:53.771711 PCI: 00:1f.3: enabled 1
702 12:44:53.775168 PCI: 00:1f.4: enabled 0
703 12:44:53.778180 PCI: 00:1f.5: enabled 1
704 12:44:53.778276 PCI: 00:1f.6: enabled 0
705 12:44:53.781842 PCI: 00:1f.7: enabled 0
706 12:44:53.784976 APIC: 00: enabled 1
707 12:44:53.785093 GENERIC: 0.0: enabled 1
708 12:44:53.788563 GENERIC: 0.0: enabled 1
709 12:44:53.791536 GENERIC: 1.0: enabled 1
710 12:44:53.794470 GENERIC: 0.0: enabled 1
711 12:44:53.794595 GENERIC: 1.0: enabled 1
712 12:44:53.798214 USB0 port 0: enabled 1
713 12:44:53.801329 GENERIC: 0.0: enabled 1
714 12:44:53.804805 USB0 port 0: enabled 1
715 12:44:53.804892 GENERIC: 0.0: enabled 1
716 12:44:53.807707 I2C: 00:1a: enabled 1
717 12:44:53.811363 I2C: 00:31: enabled 1
718 12:44:53.811451 I2C: 00:32: enabled 1
719 12:44:53.814346 I2C: 00:10: enabled 1
720 12:44:53.817945 I2C: 00:15: enabled 1
721 12:44:53.818039 GENERIC: 0.0: enabled 0
722 12:44:53.820900 GENERIC: 1.0: enabled 0
723 12:44:53.824478 GENERIC: 0.0: enabled 1
724 12:44:53.824564 SPI: 00: enabled 1
725 12:44:53.827855 SPI: 00: enabled 1
726 12:44:53.831389 PNP: 0c09.0: enabled 1
727 12:44:53.831476 GENERIC: 0.0: enabled 1
728 12:44:53.834362 USB3 port 0: enabled 1
729 12:44:53.837975 USB3 port 1: enabled 1
730 12:44:53.840876 USB3 port 2: enabled 0
731 12:44:53.840962 USB3 port 3: enabled 0
732 12:44:53.844318 USB2 port 0: enabled 0
733 12:44:53.847872 USB2 port 1: enabled 1
734 12:44:53.847959 USB2 port 2: enabled 1
735 12:44:53.850951 USB2 port 3: enabled 0
736 12:44:53.854849 USB2 port 4: enabled 1
737 12:44:53.857616 USB2 port 5: enabled 0
738 12:44:53.857700 USB2 port 6: enabled 0
739 12:44:53.860570 USB2 port 7: enabled 0
740 12:44:53.864233 USB2 port 8: enabled 0
741 12:44:53.864314 USB2 port 9: enabled 0
742 12:44:53.867470 USB3 port 0: enabled 0
743 12:44:53.870600 USB3 port 1: enabled 1
744 12:44:53.874145 USB3 port 2: enabled 0
745 12:44:53.874226 USB3 port 3: enabled 0
746 12:44:53.877591 GENERIC: 0.0: enabled 1
747 12:44:53.880591 GENERIC: 1.0: enabled 1
748 12:44:53.880670 APIC: 01: enabled 1
749 12:44:53.884327 APIC: 05: enabled 1
750 12:44:53.887349 APIC: 06: enabled 1
751 12:44:53.887429 APIC: 03: enabled 1
752 12:44:53.891065 APIC: 02: enabled 1
753 12:44:53.891150 APIC: 04: enabled 1
754 12:44:53.893948 APIC: 07: enabled 1
755 12:44:53.897563 Compare with tree...
756 12:44:53.897645 Root Device: enabled 1
757 12:44:53.900598 DOMAIN: 0000: enabled 1
758 12:44:53.903790 PCI: 00:00.0: enabled 1
759 12:44:53.907304 PCI: 00:02.0: enabled 1
760 12:44:53.910941 PCI: 00:04.0: enabled 1
761 12:44:53.911037 GENERIC: 0.0: enabled 1
762 12:44:53.913893 PCI: 00:05.0: enabled 1
763 12:44:53.916894 PCI: 00:06.0: enabled 0
764 12:44:53.920320 PCI: 00:07.0: enabled 0
765 12:44:53.924068 GENERIC: 0.0: enabled 1
766 12:44:53.924147 PCI: 00:07.1: enabled 0
767 12:44:53.927051 GENERIC: 1.0: enabled 1
768 12:44:53.930429 PCI: 00:07.2: enabled 0
769 12:44:53.933500 GENERIC: 0.0: enabled 1
770 12:44:53.937075 PCI: 00:07.3: enabled 0
771 12:44:53.940141 GENERIC: 1.0: enabled 1
772 12:44:53.940230 PCI: 00:08.0: enabled 1
773 12:44:53.943823 PCI: 00:09.0: enabled 0
774 12:44:53.946914 PCI: 00:0a.0: enabled 0
775 12:44:53.950255 PCI: 00:0d.0: enabled 1
776 12:44:53.950360 USB0 port 0: enabled 1
777 12:44:53.953867 USB3 port 0: enabled 1
778 12:44:53.956899 USB3 port 1: enabled 1
779 12:44:53.960034 USB3 port 2: enabled 0
780 12:44:53.963469 USB3 port 3: enabled 0
781 12:44:53.966944 PCI: 00:0d.1: enabled 0
782 12:44:53.967029 PCI: 00:0d.2: enabled 0
783 12:44:53.969819 GENERIC: 0.0: enabled 1
784 12:44:53.973198 PCI: 00:0d.3: enabled 0
785 12:44:53.976825 PCI: 00:0e.0: enabled 0
786 12:44:53.979772 PCI: 00:10.2: enabled 1
787 12:44:53.979858 PCI: 00:10.6: enabled 0
788 12:44:53.983368 PCI: 00:10.7: enabled 0
789 12:44:53.986422 PCI: 00:12.0: enabled 0
790 12:44:53.990154 PCI: 00:12.6: enabled 0
791 12:44:53.993048 PCI: 00:13.0: enabled 0
792 12:44:53.993126 PCI: 00:14.0: enabled 1
793 12:44:53.996551 USB0 port 0: enabled 1
794 12:44:53.999560 USB2 port 0: enabled 0
795 12:44:54.003175 USB2 port 1: enabled 1
796 12:44:54.006162 USB2 port 2: enabled 1
797 12:44:54.009836 USB2 port 3: enabled 0
798 12:44:54.009919 USB2 port 4: enabled 1
799 12:44:54.012866 USB2 port 5: enabled 0
800 12:44:54.016361 USB2 port 6: enabled 0
801 12:44:54.019551 USB2 port 7: enabled 0
802 12:44:54.022985 USB2 port 8: enabled 0
803 12:44:54.023072 USB2 port 9: enabled 0
804 12:44:54.026458 USB3 port 0: enabled 0
805 12:44:54.029566 USB3 port 1: enabled 1
806 12:44:54.033081 USB3 port 2: enabled 0
807 12:44:54.036015 USB3 port 3: enabled 0
808 12:44:54.039478 PCI: 00:14.1: enabled 0
809 12:44:54.039564 PCI: 00:14.2: enabled 1
810 12:44:54.043080 PCI: 00:14.3: enabled 1
811 12:44:54.046060 GENERIC: 0.0: enabled 1
812 12:44:54.049668 PCI: 00:15.0: enabled 1
813 12:44:54.053140 I2C: 00:1a: enabled 1
814 12:44:54.053244 I2C: 00:31: enabled 1
815 12:44:54.055935 I2C: 00:32: enabled 1
816 12:44:54.059492 PCI: 00:15.1: enabled 1
817 12:44:54.062459 I2C: 00:10: enabled 1
818 12:44:54.065595 PCI: 00:15.2: enabled 1
819 12:44:54.065686 PCI: 00:15.3: enabled 1
820 12:44:54.069295 PCI: 00:16.0: enabled 1
821 12:44:54.072718 PCI: 00:16.1: enabled 0
822 12:44:54.076162 PCI: 00:16.2: enabled 0
823 12:44:54.076250 PCI: 00:16.3: enabled 0
824 12:44:54.079220 PCI: 00:16.4: enabled 0
825 12:44:54.082209 PCI: 00:16.5: enabled 0
826 12:44:54.085859 PCI: 00:17.0: enabled 1
827 12:44:54.089372 PCI: 00:19.0: enabled 0
828 12:44:54.089466 PCI: 00:19.1: enabled 1
829 12:44:54.092368 I2C: 00:15: enabled 1
830 12:44:54.096113 PCI: 00:19.2: enabled 0
831 12:44:54.099059 PCI: 00:1d.0: enabled 1
832 12:44:54.102472 GENERIC: 0.0: enabled 1
833 12:44:54.102568 PCI: 00:1e.0: enabled 1
834 12:44:54.152548 PCI: 00:1e.1: enabled 0
835 12:44:54.152697 PCI: 00:1e.2: enabled 1
836 12:44:54.153280 SPI: 00: enabled 1
837 12:44:54.153366 PCI: 00:1e.3: enabled 1
838 12:44:54.153485 SPI: 00: enabled 1
839 12:44:54.153775 PCI: 00:1f.0: enabled 1
840 12:44:54.153857 PNP: 0c09.0: enabled 1
841 12:44:54.153934 PCI: 00:1f.1: enabled 0
842 12:44:54.153994 PCI: 00:1f.2: enabled 1
843 12:44:54.154052 GENERIC: 0.0: enabled 1
844 12:44:54.154111 GENERIC: 0.0: enabled 1
845 12:44:54.154168 GENERIC: 1.0: enabled 1
846 12:44:54.154412 PCI: 00:1f.3: enabled 1
847 12:44:54.154477 PCI: 00:1f.4: enabled 0
848 12:44:54.154749 PCI: 00:1f.5: enabled 1
849 12:44:54.154813 PCI: 00:1f.6: enabled 0
850 12:44:54.154872 PCI: 00:1f.7: enabled 0
851 12:44:54.154958 CPU_CLUSTER: 0: enabled 1
852 12:44:54.155015 APIC: 00: enabled 1
853 12:44:54.204224 APIC: 01: enabled 1
854 12:44:54.204363 APIC: 05: enabled 1
855 12:44:54.204492 APIC: 06: enabled 1
856 12:44:54.204765 APIC: 03: enabled 1
857 12:44:54.204833 APIC: 02: enabled 1
858 12:44:54.204895 APIC: 04: enabled 1
859 12:44:54.204958 APIC: 07: enabled 1
860 12:44:54.205017 Root Device scanning...
861 12:44:54.205293 scan_static_bus for Root Device
862 12:44:54.205357 DOMAIN: 0000 enabled
863 12:44:54.205439 CPU_CLUSTER: 0 enabled
864 12:44:54.205533 DOMAIN: 0000 scanning...
865 12:44:54.205602 PCI: pci_scan_bus for bus 00
866 12:44:54.205856 PCI: 00:00.0 [8086/0000] ops
867 12:44:54.205919 PCI: 00:00.0 [8086/9a12] enabled
868 12:44:54.205976 PCI: 00:02.0 [8086/0000] bus ops
869 12:44:54.206047 PCI: 00:02.0 [8086/9a40] enabled
870 12:44:54.206391 PCI: 00:04.0 [8086/0000] bus ops
871 12:44:54.254871 PCI: 00:04.0 [8086/9a03] enabled
872 12:44:54.255127 PCI: 00:05.0 [8086/9a19] enabled
873 12:44:54.255439 PCI: 00:07.0 [0000/0000] hidden
874 12:44:54.255524 PCI: 00:08.0 [8086/9a11] enabled
875 12:44:54.255612 PCI: 00:0a.0 [8086/9a0d] disabled
876 12:44:54.255675 PCI: 00:0d.0 [8086/0000] bus ops
877 12:44:54.255786 PCI: 00:0d.0 [8086/9a13] enabled
878 12:44:54.255867 PCI: 00:14.0 [8086/0000] bus ops
879 12:44:54.255965 PCI: 00:14.0 [8086/a0ed] enabled
880 12:44:54.256054 PCI: 00:14.2 [8086/a0ef] enabled
881 12:44:54.256332 PCI: 00:14.3 [8086/0000] bus ops
882 12:44:54.256422 PCI: 00:14.3 [8086/a0f0] enabled
883 12:44:54.256493 PCI: 00:15.0 [8086/0000] bus ops
884 12:44:54.256554 PCI: 00:15.0 [8086/a0e8] enabled
885 12:44:54.256612 PCI: 00:15.1 [8086/0000] bus ops
886 12:44:54.256724 PCI: 00:15.1 [8086/a0e9] enabled
887 12:44:54.291661 PCI: 00:15.2 [8086/0000] bus ops
888 12:44:54.292039 PCI: 00:15.2 [8086/a0ea] enabled
889 12:44:54.292187 PCI: 00:15.3 [8086/0000] bus ops
890 12:44:54.292270 PCI: 00:15.3 [8086/a0eb] enabled
891 12:44:54.292333 PCI: 00:16.0 [8086/0000] ops
892 12:44:54.292591 PCI: 00:16.0 [8086/a0e0] enabled
893 12:44:54.292658 PCI: Static device PCI: 00:17.0 not found, disabling it.
894 12:44:54.292718 PCI: 00:19.0 [8086/0000] bus ops
895 12:44:54.292777 PCI: 00:19.0 [8086/a0c5] disabled
896 12:44:54.292835 PCI: 00:19.1 [8086/0000] bus ops
897 12:44:54.295892 PCI: 00:19.1 [8086/a0c6] enabled
898 12:44:54.298962 PCI: 00:1d.0 [8086/0000] bus ops
899 12:44:54.302500 PCI: 00:1d.0 [8086/a0b0] enabled
900 12:44:54.305596 PCI: 00:1e.0 [8086/0000] ops
901 12:44:54.309183 PCI: 00:1e.0 [8086/a0a8] enabled
902 12:44:54.312160 PCI: 00:1e.2 [8086/0000] bus ops
903 12:44:54.315882 PCI: 00:1e.2 [8086/a0aa] enabled
904 12:44:54.318860 PCI: 00:1e.3 [8086/0000] bus ops
905 12:44:54.322428 PCI: 00:1e.3 [8086/a0ab] enabled
906 12:44:54.325437 PCI: 00:1f.0 [8086/0000] bus ops
907 12:44:54.328813 PCI: 00:1f.0 [8086/a087] enabled
908 12:44:54.328899 RTC Init
909 12:44:54.331809 Set power on after power failure.
910 12:44:54.334967 Disabling Deep S3
911 12:44:54.335134 Disabling Deep S3
912 12:44:54.338366 Disabling Deep S4
913 12:44:54.341893 Disabling Deep S4
914 12:44:54.341980 Disabling Deep S5
915 12:44:54.345493 Disabling Deep S5
916 12:44:54.348492 PCI: 00:1f.2 [0000/0000] hidden
917 12:44:54.351887 PCI: 00:1f.3 [8086/0000] bus ops
918 12:44:54.355216 PCI: 00:1f.3 [8086/a0c8] enabled
919 12:44:54.358222 PCI: 00:1f.5 [8086/0000] bus ops
920 12:44:54.361942 PCI: 00:1f.5 [8086/a0a4] enabled
921 12:44:54.364959 PCI: Leftover static devices:
922 12:44:54.365042 PCI: 00:10.2
923 12:44:54.365110 PCI: 00:10.6
924 12:44:54.368486 PCI: 00:10.7
925 12:44:54.368590 PCI: 00:06.0
926 12:44:54.371375 PCI: 00:07.1
927 12:44:54.371450 PCI: 00:07.2
928 12:44:54.375007 PCI: 00:07.3
929 12:44:54.375082 PCI: 00:09.0
930 12:44:54.375146 PCI: 00:0d.1
931 12:44:54.378005 PCI: 00:0d.2
932 12:44:54.378088 PCI: 00:0d.3
933 12:44:54.381728 PCI: 00:0e.0
934 12:44:54.381804 PCI: 00:12.0
935 12:44:54.381868 PCI: 00:12.6
936 12:44:54.384817 PCI: 00:13.0
937 12:44:54.384897 PCI: 00:14.1
938 12:44:54.387812 PCI: 00:16.1
939 12:44:54.387888 PCI: 00:16.2
940 12:44:54.391335 PCI: 00:16.3
941 12:44:54.391413 PCI: 00:16.4
942 12:44:54.391477 PCI: 00:16.5
943 12:44:54.394221 PCI: 00:17.0
944 12:44:54.394301 PCI: 00:19.2
945 12:44:54.397712 PCI: 00:1e.1
946 12:44:54.397788 PCI: 00:1f.1
947 12:44:54.397852 PCI: 00:1f.4
948 12:44:54.401281 PCI: 00:1f.6
949 12:44:54.401366 PCI: 00:1f.7
950 12:44:54.404195 PCI: Check your devicetree.cb.
951 12:44:54.407892 PCI: 00:02.0 scanning...
952 12:44:54.410935 scan_generic_bus for PCI: 00:02.0
953 12:44:54.414339 scan_generic_bus for PCI: 00:02.0 done
954 12:44:54.421014 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
955 12:44:54.424095 PCI: 00:04.0 scanning...
956 12:44:54.427181 scan_generic_bus for PCI: 00:04.0
957 12:44:54.427259 GENERIC: 0.0 enabled
958 12:44:54.434104 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
959 12:44:54.440691 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
960 12:44:54.440781 PCI: 00:0d.0 scanning...
961 12:44:54.444059 scan_static_bus for PCI: 00:0d.0
962 12:44:54.447132 USB0 port 0 enabled
963 12:44:54.450783 USB0 port 0 scanning...
964 12:44:54.453690 scan_static_bus for USB0 port 0
965 12:44:54.453772 USB3 port 0 enabled
966 12:44:54.457107 USB3 port 1 enabled
967 12:44:54.460501 USB3 port 2 disabled
968 12:44:54.460625 USB3 port 3 disabled
969 12:44:54.463870 USB3 port 0 scanning...
970 12:44:54.467041 scan_static_bus for USB3 port 0
971 12:44:54.470028 scan_static_bus for USB3 port 0 done
972 12:44:54.477014 scan_bus: bus USB3 port 0 finished in 6 msecs
973 12:44:54.477100 USB3 port 1 scanning...
974 12:44:54.480137 scan_static_bus for USB3 port 1
975 12:44:54.486793 scan_static_bus for USB3 port 1 done
976 12:44:54.490366 scan_bus: bus USB3 port 1 finished in 6 msecs
977 12:44:54.493833 scan_static_bus for USB0 port 0 done
978 12:44:54.496824 scan_bus: bus USB0 port 0 finished in 43 msecs
979 12:44:54.503370 scan_static_bus for PCI: 00:0d.0 done
980 12:44:54.506955 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
981 12:44:54.510005 PCI: 00:14.0 scanning...
982 12:44:54.513624 scan_static_bus for PCI: 00:14.0
983 12:44:54.516568 USB0 port 0 enabled
984 12:44:54.516677 USB0 port 0 scanning...
985 12:44:54.520094 scan_static_bus for USB0 port 0
986 12:44:54.523138 USB2 port 0 disabled
987 12:44:54.526787 USB2 port 1 enabled
988 12:44:54.526881 USB2 port 2 enabled
989 12:44:54.529827 USB2 port 3 disabled
990 12:44:54.529914 USB2 port 4 enabled
991 12:44:54.533500 USB2 port 5 disabled
992 12:44:54.536393 USB2 port 6 disabled
993 12:44:54.536478 USB2 port 7 disabled
994 12:44:54.539913 USB2 port 8 disabled
995 12:44:54.542912 USB2 port 9 disabled
996 12:44:54.543000 USB3 port 0 disabled
997 12:44:54.546491 USB3 port 1 enabled
998 12:44:54.550049 USB3 port 2 disabled
999 12:44:54.550137 USB3 port 3 disabled
1000 12:44:54.553031 USB2 port 1 scanning...
1001 12:44:54.556112 scan_static_bus for USB2 port 1
1002 12:44:54.559687 scan_static_bus for USB2 port 1 done
1003 12:44:54.566456 scan_bus: bus USB2 port 1 finished in 6 msecs
1004 12:44:54.566568 USB2 port 2 scanning...
1005 12:44:54.569515 scan_static_bus for USB2 port 2
1006 12:44:54.576034 scan_static_bus for USB2 port 2 done
1007 12:44:54.579504 scan_bus: bus USB2 port 2 finished in 6 msecs
1008 12:44:54.583072 USB2 port 4 scanning...
1009 12:44:54.586109 scan_static_bus for USB2 port 4
1010 12:44:54.589678 scan_static_bus for USB2 port 4 done
1011 12:44:54.592995 scan_bus: bus USB2 port 4 finished in 6 msecs
1012 12:44:54.596363 USB3 port 1 scanning...
1013 12:44:54.599230 scan_static_bus for USB3 port 1
1014 12:44:54.602855 scan_static_bus for USB3 port 1 done
1015 12:44:54.605768 scan_bus: bus USB3 port 1 finished in 6 msecs
1016 12:44:54.612799 scan_static_bus for USB0 port 0 done
1017 12:44:54.615748 scan_bus: bus USB0 port 0 finished in 93 msecs
1018 12:44:54.619234 scan_static_bus for PCI: 00:14.0 done
1019 12:44:54.625881 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1020 12:44:54.625973 PCI: 00:14.3 scanning...
1021 12:44:54.629107 scan_static_bus for PCI: 00:14.3
1022 12:44:54.632605 GENERIC: 0.0 enabled
1023 12:44:54.635620 scan_static_bus for PCI: 00:14.3 done
1024 12:44:54.642711 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1025 12:44:54.642800 PCI: 00:15.0 scanning...
1026 12:44:54.646208 scan_static_bus for PCI: 00:15.0
1027 12:44:54.649156 I2C: 00:1a enabled
1028 12:44:54.652682 I2C: 00:31 enabled
1029 12:44:54.652761 I2C: 00:32 enabled
1030 12:44:54.655663 scan_static_bus for PCI: 00:15.0 done
1031 12:44:54.662379 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1032 12:44:54.665885 PCI: 00:15.1 scanning...
1033 12:44:54.668891 scan_static_bus for PCI: 00:15.1
1034 12:44:54.668973 I2C: 00:10 enabled
1035 12:44:54.672255 scan_static_bus for PCI: 00:15.1 done
1036 12:44:54.678988 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1037 12:44:54.682657 PCI: 00:15.2 scanning...
1038 12:44:54.686575 scan_static_bus for PCI: 00:15.2
1039 12:44:54.690293 scan_static_bus for PCI: 00:15.2 done
1040 12:44:54.693313 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1041 12:44:54.696354 PCI: 00:15.3 scanning...
1042 12:44:54.699859 scan_static_bus for PCI: 00:15.3
1043 12:44:54.703245 scan_static_bus for PCI: 00:15.3 done
1044 12:44:54.706420 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1045 12:44:54.710069 PCI: 00:19.1 scanning...
1046 12:44:54.713025 scan_static_bus for PCI: 00:19.1
1047 12:44:54.716105 I2C: 00:15 enabled
1048 12:44:54.719778 scan_static_bus for PCI: 00:19.1 done
1049 12:44:54.722824 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1050 12:44:54.726276 PCI: 00:1d.0 scanning...
1051 12:44:54.729327 do_pci_scan_bridge for PCI: 00:1d.0
1052 12:44:54.733041 PCI: pci_scan_bus for bus 01
1053 12:44:54.735979 PCI: 01:00.0 [1c5c/174a] enabled
1054 12:44:54.739456 GENERIC: 0.0 enabled
1055 12:44:54.743186 Enabling Common Clock Configuration
1056 12:44:54.746181 L1 Sub-State supported from root port 29
1057 12:44:54.749528 L1 Sub-State Support = 0xf
1058 12:44:54.752578 CommonModeRestoreTime = 0x28
1059 12:44:54.755716 Power On Value = 0x16, Power On Scale = 0x0
1060 12:44:54.759197 ASPM: Enabled L1
1061 12:44:54.762309 PCIe: Max_Payload_Size adjusted to 128
1062 12:44:54.769069 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1063 12:44:54.769158 PCI: 00:1e.2 scanning...
1064 12:44:54.772449 scan_generic_bus for PCI: 00:1e.2
1065 12:44:54.775473 SPI: 00 enabled
1066 12:44:54.782475 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1067 12:44:54.785543 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1068 12:44:54.789043 PCI: 00:1e.3 scanning...
1069 12:44:54.791917 scan_generic_bus for PCI: 00:1e.3
1070 12:44:54.795573 SPI: 00 enabled
1071 12:44:54.801716 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1072 12:44:54.805306 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1073 12:44:54.808275 PCI: 00:1f.0 scanning...
1074 12:44:54.811819 scan_static_bus for PCI: 00:1f.0
1075 12:44:54.811933 PNP: 0c09.0 enabled
1076 12:44:54.815237 PNP: 0c09.0 scanning...
1077 12:44:54.818276 scan_static_bus for PNP: 0c09.0
1078 12:44:54.821376 scan_static_bus for PNP: 0c09.0 done
1079 12:44:54.828036 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1080 12:44:54.831630 scan_static_bus for PCI: 00:1f.0 done
1081 12:44:54.834643 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1082 12:44:54.838360 PCI: 00:1f.2 scanning...
1083 12:44:54.841349 scan_static_bus for PCI: 00:1f.2
1084 12:44:54.844944 GENERIC: 0.0 enabled
1085 12:44:54.847995 GENERIC: 0.0 scanning...
1086 12:44:54.851448 scan_static_bus for GENERIC: 0.0
1087 12:44:54.851528 GENERIC: 0.0 enabled
1088 12:44:54.854290 GENERIC: 1.0 enabled
1089 12:44:54.857917 scan_static_bus for GENERIC: 0.0 done
1090 12:44:54.864492 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1091 12:44:54.868182 scan_static_bus for PCI: 00:1f.2 done
1092 12:44:54.871108 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1093 12:44:54.874215 PCI: 00:1f.3 scanning...
1094 12:44:54.877711 scan_static_bus for PCI: 00:1f.3
1095 12:44:54.881148 scan_static_bus for PCI: 00:1f.3 done
1096 12:44:54.887857 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1097 12:44:54.887940 PCI: 00:1f.5 scanning...
1098 12:44:54.894145 scan_generic_bus for PCI: 00:1f.5
1099 12:44:54.897889 scan_generic_bus for PCI: 00:1f.5 done
1100 12:44:54.900916 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1101 12:44:54.907533 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1102 12:44:54.910729 scan_static_bus for Root Device done
1103 12:44:54.914074 scan_bus: bus Root Device finished in 737 msecs
1104 12:44:54.914168 done
1105 12:44:54.920429 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1106 12:44:54.924062 Chrome EC: UHEPI supported
1107 12:44:54.930816 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1108 12:44:54.937813 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1109 12:44:54.940883 SPI flash protection: WPSW=0 SRP0=0
1110 12:44:54.947743 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1111 12:44:54.950722 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1112 12:44:54.954395 found VGA at PCI: 00:02.0
1113 12:44:54.957317 Setting up VGA for PCI: 00:02.0
1114 12:44:54.964001 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1115 12:44:54.967472 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1116 12:44:54.970941 Allocating resources...
1117 12:44:54.973942 Reading resources...
1118 12:44:54.977112 Root Device read_resources bus 0 link: 0
1119 12:44:54.980721 DOMAIN: 0000 read_resources bus 0 link: 0
1120 12:44:54.987521 PCI: 00:04.0 read_resources bus 1 link: 0
1121 12:44:54.990523 PCI: 00:04.0 read_resources bus 1 link: 0 done
1122 12:44:54.997092 PCI: 00:0d.0 read_resources bus 0 link: 0
1123 12:44:55.000262 USB0 port 0 read_resources bus 0 link: 0
1124 12:44:55.007226 USB0 port 0 read_resources bus 0 link: 0 done
1125 12:44:55.010238 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1126 12:44:55.016781 PCI: 00:14.0 read_resources bus 0 link: 0
1127 12:44:55.020316 USB0 port 0 read_resources bus 0 link: 0
1128 12:44:55.026898 USB0 port 0 read_resources bus 0 link: 0 done
1129 12:44:55.029918 PCI: 00:14.0 read_resources bus 0 link: 0 done
1130 12:44:55.037024 PCI: 00:14.3 read_resources bus 0 link: 0
1131 12:44:55.039869 PCI: 00:14.3 read_resources bus 0 link: 0 done
1132 12:44:55.046506 PCI: 00:15.0 read_resources bus 0 link: 0
1133 12:44:55.050198 PCI: 00:15.0 read_resources bus 0 link: 0 done
1134 12:44:55.056369 PCI: 00:15.1 read_resources bus 0 link: 0
1135 12:44:55.059382 PCI: 00:15.1 read_resources bus 0 link: 0 done
1136 12:44:55.066488 PCI: 00:19.1 read_resources bus 0 link: 0
1137 12:44:55.070042 PCI: 00:19.1 read_resources bus 0 link: 0 done
1138 12:44:55.076435 PCI: 00:1d.0 read_resources bus 1 link: 0
1139 12:44:55.080119 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1140 12:44:55.086797 PCI: 00:1e.2 read_resources bus 2 link: 0
1141 12:44:55.089666 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1142 12:44:55.096751 PCI: 00:1e.3 read_resources bus 3 link: 0
1143 12:44:55.099728 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1144 12:44:55.106404 PCI: 00:1f.0 read_resources bus 0 link: 0
1145 12:44:55.109869 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1146 12:44:55.116038 PCI: 00:1f.2 read_resources bus 0 link: 0
1147 12:44:55.119632 GENERIC: 0.0 read_resources bus 0 link: 0
1148 12:44:55.126046 GENERIC: 0.0 read_resources bus 0 link: 0 done
1149 12:44:55.129005 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1150 12:44:55.135668 DOMAIN: 0000 read_resources bus 0 link: 0 done
1151 12:44:55.139245 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1152 12:44:55.145761 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1153 12:44:55.149385 Root Device read_resources bus 0 link: 0 done
1154 12:44:55.152430 Done reading resources.
1155 12:44:55.159103 Show resources in subtree (Root Device)...After reading.
1156 12:44:55.162094 Root Device child on link 0 DOMAIN: 0000
1157 12:44:55.165620 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1158 12:44:55.175707 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1159 12:44:55.185287 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1160 12:44:55.188939 PCI: 00:00.0
1161 12:44:55.195323 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1162 12:44:55.205486 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1163 12:44:55.215190 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1164 12:44:55.225441 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1165 12:44:55.235382 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1166 12:44:55.245075 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1167 12:44:55.251571 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1168 12:44:55.261831 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1169 12:44:55.271883 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1170 12:44:55.281338 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1171 12:44:55.291442 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1172 12:44:55.301376 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1173 12:44:55.308064 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1174 12:44:55.318306 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1175 12:44:55.327738 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1176 12:44:55.337897 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1177 12:44:55.347575 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1178 12:44:55.357619 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1179 12:44:55.364430 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1180 12:44:55.374189 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1181 12:44:55.377667 PCI: 00:02.0
1182 12:44:55.387502 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1183 12:44:55.397668 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1184 12:44:55.407556 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1185 12:44:55.410586 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1186 12:44:55.420847 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1187 12:44:55.423850 GENERIC: 0.0
1188 12:44:55.423965 PCI: 00:05.0
1189 12:44:55.434333 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:44:55.437304 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1191 12:44:55.440870 GENERIC: 0.0
1192 12:44:55.443773 PCI: 00:08.0
1193 12:44:55.454137 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 12:44:55.454229 PCI: 00:0a.0
1195 12:44:55.457079 PCI: 00:0d.0 child on link 0 USB0 port 0
1196 12:44:55.467258 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1197 12:44:55.473963 USB0 port 0 child on link 0 USB3 port 0
1198 12:44:55.474058 USB3 port 0
1199 12:44:55.476997 USB3 port 1
1200 12:44:55.477086 USB3 port 2
1201 12:44:55.480447 USB3 port 3
1202 12:44:55.483444 PCI: 00:14.0 child on link 0 USB0 port 0
1203 12:44:55.493626 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:44:55.500109 USB0 port 0 child on link 0 USB2 port 0
1205 12:44:55.500205 USB2 port 0
1206 12:44:55.503807 USB2 port 1
1207 12:44:55.503899 USB2 port 2
1208 12:44:55.506605 USB2 port 3
1209 12:44:55.506695 USB2 port 4
1210 12:44:55.510215 USB2 port 5
1211 12:44:55.510305 USB2 port 6
1212 12:44:55.513246 USB2 port 7
1213 12:44:55.513339 USB2 port 8
1214 12:44:55.516726 USB2 port 9
1215 12:44:55.516815 USB3 port 0
1216 12:44:55.520128 USB3 port 1
1217 12:44:55.523218 USB3 port 2
1218 12:44:55.523307 USB3 port 3
1219 12:44:55.526806 PCI: 00:14.2
1220 12:44:55.536440 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1221 12:44:55.546643 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1222 12:44:55.549707 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1223 12:44:55.559494 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1224 12:44:55.562899 GENERIC: 0.0
1225 12:44:55.566441 PCI: 00:15.0 child on link 0 I2C: 00:1a
1226 12:44:55.576386 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1227 12:44:55.576493 I2C: 00:1a
1228 12:44:55.579347 I2C: 00:31
1229 12:44:55.579463 I2C: 00:32
1230 12:44:55.586402 PCI: 00:15.1 child on link 0 I2C: 00:10
1231 12:44:55.595744 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1232 12:44:55.595872 I2C: 00:10
1233 12:44:55.599437 PCI: 00:15.2
1234 12:44:55.610008 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 12:44:55.610125 PCI: 00:15.3
1236 12:44:55.619340 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 12:44:55.622640 PCI: 00:16.0
1238 12:44:55.632737 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:44:55.632833 PCI: 00:19.0
1240 12:44:55.635698 PCI: 00:19.1 child on link 0 I2C: 00:15
1241 12:44:55.645597 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:44:55.649209 I2C: 00:15
1243 12:44:55.652188 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1244 12:44:55.661988 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1245 12:44:55.672167 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1246 12:44:55.681835 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1247 12:44:55.681933 GENERIC: 0.0
1248 12:44:55.685518 PCI: 01:00.0
1249 12:44:55.695503 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1250 12:44:55.701904 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1251 12:44:55.712057 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1252 12:44:55.715117 PCI: 00:1e.0
1253 12:44:55.725331 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1254 12:44:55.728314 PCI: 00:1e.2 child on link 0 SPI: 00
1255 12:44:55.738324 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1256 12:44:55.741946 SPI: 00
1257 12:44:55.744800 PCI: 00:1e.3 child on link 0 SPI: 00
1258 12:44:55.754710 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 12:44:55.754810 SPI: 00
1260 12:44:55.761373 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1261 12:44:55.768000 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1262 12:44:55.771492 PNP: 0c09.0
1263 12:44:55.778118 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:44:55.784801 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1265 12:44:55.794584 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1266 12:44:55.801216 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1267 12:44:55.807904 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1268 12:44:55.808035 GENERIC: 0.0
1269 12:44:55.811293 GENERIC: 1.0
1270 12:44:55.811376 PCI: 00:1f.3
1271 12:44:55.820913 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1272 12:44:55.834377 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1273 12:44:55.834482 PCI: 00:1f.5
1274 12:44:55.844006 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1275 12:44:55.847574 CPU_CLUSTER: 0 child on link 0 APIC: 00
1276 12:44:55.847671 APIC: 00
1277 12:44:55.850559 APIC: 01
1278 12:44:55.850647 APIC: 05
1279 12:44:55.854164 APIC: 06
1280 12:44:55.854254 APIC: 03
1281 12:44:55.854324 APIC: 02
1282 12:44:55.857067 APIC: 04
1283 12:44:55.857173 APIC: 07
1284 12:44:55.867449 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1285 12:44:55.870478 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1286 12:44:55.876915 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1287 12:44:55.883675 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1288 12:44:55.887291 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1289 12:44:55.890416 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1290 12:44:55.896824 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1291 12:44:55.903501 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1292 12:44:55.910443 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1293 12:44:55.916915 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1294 12:44:55.926505 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1295 12:44:55.933617 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1296 12:44:55.940141 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1297 12:44:55.946638 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1298 12:44:55.953207 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1299 12:44:55.956629 DOMAIN: 0000: Resource ranges:
1300 12:44:55.960172 * Base: 1000, Size: 800, Tag: 100
1301 12:44:55.966770 * Base: 1900, Size: e700, Tag: 100
1302 12:44:55.969777 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1303 12:44:55.976387 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1304 12:44:55.982884 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1305 12:44:55.993217 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1306 12:44:55.999959 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1307 12:44:56.006449 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1308 12:44:56.015850 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1309 12:44:56.022764 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1310 12:44:56.029243 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1311 12:44:56.039286 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1312 12:44:56.045615 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1313 12:44:56.052709 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1314 12:44:56.062315 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1315 12:44:56.069243 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1316 12:44:56.075307 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1317 12:44:56.085424 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1318 12:44:56.092088 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1319 12:44:56.098986 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1320 12:44:56.105902 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1321 12:44:56.115176 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1322 12:44:56.121654 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1323 12:44:56.132169 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1324 12:44:56.138302 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1325 12:44:56.145462 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1326 12:44:56.155316 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1327 12:44:56.155418 DOMAIN: 0000: Resource ranges:
1328 12:44:56.161822 * Base: 7fc00000, Size: 40400000, Tag: 200
1329 12:44:56.165287 * Base: d0000000, Size: 28000000, Tag: 200
1330 12:44:56.168171 * Base: fa000000, Size: 1000000, Tag: 200
1331 12:44:56.174696 * Base: fb001000, Size: 2fff000, Tag: 200
1332 12:44:56.178216 * Base: fe010000, Size: 2e000, Tag: 200
1333 12:44:56.181341 * Base: fe03f000, Size: d41000, Tag: 200
1334 12:44:56.184889 * Base: fed88000, Size: 8000, Tag: 200
1335 12:44:56.191202 * Base: fed93000, Size: d000, Tag: 200
1336 12:44:56.194913 * Base: feda2000, Size: 1e000, Tag: 200
1337 12:44:56.197829 * Base: fede0000, Size: 1220000, Tag: 200
1338 12:44:56.204541 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1339 12:44:56.211616 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1340 12:44:56.217625 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1341 12:44:56.224582 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1342 12:44:56.230920 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1343 12:44:56.237530 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1344 12:44:56.244268 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1345 12:44:56.250706 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1346 12:44:56.257754 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1347 12:44:56.264236 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1348 12:44:56.270809 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1349 12:44:56.277268 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1350 12:44:56.283875 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1351 12:44:56.290466 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1352 12:44:56.297465 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1353 12:44:56.303984 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1354 12:44:56.310746 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1355 12:44:56.316885 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1356 12:44:56.323555 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1357 12:44:56.330551 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1358 12:44:56.336973 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1359 12:44:56.343519 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1360 12:44:56.350220 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1361 12:44:56.356725 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1362 12:44:56.366800 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1363 12:44:56.369776 PCI: 00:1d.0: Resource ranges:
1364 12:44:56.373179 * Base: 7fc00000, Size: 100000, Tag: 200
1365 12:44:56.379662 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1366 12:44:56.386397 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1367 12:44:56.393058 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1368 12:44:56.400032 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1369 12:44:56.409789 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1370 12:44:56.413325 Root Device assign_resources, bus 0 link: 0
1371 12:44:56.416352 DOMAIN: 0000 assign_resources, bus 0 link: 0
1372 12:44:56.426465 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1373 12:44:56.432966 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1374 12:44:56.443029 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1375 12:44:56.449221 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1376 12:44:56.455802 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 12:44:56.459297 PCI: 00:04.0 assign_resources, bus 1 link: 0
1378 12:44:56.469423 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1379 12:44:56.475946 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1380 12:44:56.485487 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1381 12:44:56.489147 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 12:44:56.492141 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1383 12:44:56.502248 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1384 12:44:56.505253 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 12:44:56.511935 PCI: 00:14.0 assign_resources, bus 0 link: 0
1386 12:44:56.518387 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1387 12:44:56.528788 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1388 12:44:56.535541 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1389 12:44:56.538176 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 12:44:56.544967 PCI: 00:14.3 assign_resources, bus 0 link: 0
1391 12:44:56.551550 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1392 12:44:56.558159 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 12:44:56.561206 PCI: 00:15.0 assign_resources, bus 0 link: 0
1394 12:44:56.571426 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1395 12:44:56.574432 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 12:44:56.577945 PCI: 00:15.1 assign_resources, bus 0 link: 0
1397 12:44:56.587974 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1398 12:44:56.594456 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1399 12:44:56.604715 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1400 12:44:56.611077 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1401 12:44:56.617804 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 12:44:56.621291 PCI: 00:19.1 assign_resources, bus 0 link: 0
1403 12:44:56.630839 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1404 12:44:56.640917 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1405 12:44:56.647585 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1406 12:44:56.654192 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1407 12:44:56.660792 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1408 12:44:56.670809 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1409 12:44:56.677429 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1410 12:44:56.680493 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 12:44:56.691077 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1412 12:44:56.694081 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 12:44:56.700676 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1414 12:44:56.707455 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1415 12:44:56.713965 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 12:44:56.717057 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1417 12:44:56.720716 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 12:44:56.727643 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1419 12:44:56.730625 LPC: Trying to open IO window from 800 size 1ff
1420 12:44:56.740523 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1421 12:44:56.747232 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1422 12:44:56.756781 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1423 12:44:56.760407 DOMAIN: 0000 assign_resources, bus 0 link: 0
1424 12:44:56.766546 Root Device assign_resources, bus 0 link: 0
1425 12:44:56.766635 Done setting resources.
1426 12:44:56.773197 Show resources in subtree (Root Device)...After assigning values.
1427 12:44:56.780299 Root Device child on link 0 DOMAIN: 0000
1428 12:44:56.783251 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1429 12:44:56.793341 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1430 12:44:56.802911 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1431 12:44:56.803003 PCI: 00:00.0
1432 12:44:56.813265 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1433 12:44:56.822783 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1434 12:44:56.832817 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1435 12:44:56.842907 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1436 12:44:56.852862 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1437 12:44:56.859472 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1438 12:44:56.869081 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1439 12:44:56.879022 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1440 12:44:56.889088 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1441 12:44:56.898991 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1442 12:44:56.906051 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1443 12:44:56.915856 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1444 12:44:56.925451 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1445 12:44:56.935642 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1446 12:44:56.945377 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1447 12:44:56.955277 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1448 12:44:56.965355 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1449 12:44:56.972035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1450 12:44:56.982202 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1451 12:44:56.991699 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1452 12:44:56.995318 PCI: 00:02.0
1453 12:44:57.005278 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1454 12:44:57.015348 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1455 12:44:57.024822 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1456 12:44:57.028405 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1457 12:44:57.038753 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1458 12:44:57.041715 GENERIC: 0.0
1459 12:44:57.041804 PCI: 00:05.0
1460 12:44:57.054811 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1461 12:44:57.058180 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1462 12:44:57.058265 GENERIC: 0.0
1463 12:44:57.061725 PCI: 00:08.0
1464 12:44:57.071523 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1465 12:44:57.074636 PCI: 00:0a.0
1466 12:44:57.078259 PCI: 00:0d.0 child on link 0 USB0 port 0
1467 12:44:57.088251 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1468 12:44:57.091206 USB0 port 0 child on link 0 USB3 port 0
1469 12:44:57.094850 USB3 port 0
1470 12:44:57.094935 USB3 port 1
1471 12:44:57.097842 USB3 port 2
1472 12:44:57.097922 USB3 port 3
1473 12:44:57.104352 PCI: 00:14.0 child on link 0 USB0 port 0
1474 12:44:57.114310 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1475 12:44:57.118019 USB0 port 0 child on link 0 USB2 port 0
1476 12:44:57.121002 USB2 port 0
1477 12:44:57.121092 USB2 port 1
1478 12:44:57.124680 USB2 port 2
1479 12:44:57.124769 USB2 port 3
1480 12:44:57.127655 USB2 port 4
1481 12:44:57.131161 USB2 port 5
1482 12:44:57.131240 USB2 port 6
1483 12:44:57.134219 USB2 port 7
1484 12:44:57.134300 USB2 port 8
1485 12:44:57.137806 USB2 port 9
1486 12:44:57.137887 USB3 port 0
1487 12:44:57.140873 USB3 port 1
1488 12:44:57.140949 USB3 port 2
1489 12:44:57.143969 USB3 port 3
1490 12:44:57.144045 PCI: 00:14.2
1491 12:44:57.154380 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1492 12:44:57.167406 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1493 12:44:57.170960 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1494 12:44:57.180640 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1495 12:44:57.183712 GENERIC: 0.0
1496 12:44:57.187252 PCI: 00:15.0 child on link 0 I2C: 00:1a
1497 12:44:57.197308 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1498 12:44:57.197406 I2C: 00:1a
1499 12:44:57.200404 I2C: 00:31
1500 12:44:57.200487 I2C: 00:32
1501 12:44:57.207053 PCI: 00:15.1 child on link 0 I2C: 00:10
1502 12:44:57.217674 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1503 12:44:57.217782 I2C: 00:10
1504 12:44:57.220756 PCI: 00:15.2
1505 12:44:57.230348 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1506 12:44:57.230446 PCI: 00:15.3
1507 12:44:57.240493 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1508 12:44:57.244162 PCI: 00:16.0
1509 12:44:57.253856 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1510 12:44:57.256858 PCI: 00:19.0
1511 12:44:57.260650 PCI: 00:19.1 child on link 0 I2C: 00:15
1512 12:44:57.270483 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1513 12:44:57.270595 I2C: 00:15
1514 12:44:57.276968 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1515 12:44:57.286861 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1516 12:44:57.296780 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1517 12:44:57.306861 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1518 12:44:57.310434 GENERIC: 0.0
1519 12:44:57.310546 PCI: 01:00.0
1520 12:44:57.323559 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1521 12:44:57.333196 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1522 12:44:57.343340 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1523 12:44:57.343441 PCI: 00:1e.0
1524 12:44:57.356336 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1525 12:44:57.359914 PCI: 00:1e.2 child on link 0 SPI: 00
1526 12:44:57.369631 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1527 12:44:57.369727 SPI: 00
1528 12:44:57.376001 PCI: 00:1e.3 child on link 0 SPI: 00
1529 12:44:57.386262 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1530 12:44:57.386356 SPI: 00
1531 12:44:57.389320 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1532 12:44:57.399357 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1533 12:44:57.402412 PNP: 0c09.0
1534 12:44:57.409547 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1535 12:44:57.416008 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1536 12:44:57.422352 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1537 12:44:57.432670 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1538 12:44:57.438868 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1539 12:44:57.438967 GENERIC: 0.0
1540 12:44:57.442402 GENERIC: 1.0
1541 12:44:57.442490 PCI: 00:1f.3
1542 12:44:57.452478 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1543 12:44:57.466041 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1544 12:44:57.466155 PCI: 00:1f.5
1545 12:44:57.475663 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1546 12:44:57.479177 CPU_CLUSTER: 0 child on link 0 APIC: 00
1547 12:44:57.482126 APIC: 00
1548 12:44:57.482216 APIC: 01
1549 12:44:57.485753 APIC: 05
1550 12:44:57.485839 APIC: 06
1551 12:44:57.485908 APIC: 03
1552 12:44:57.488629 APIC: 02
1553 12:44:57.488714 APIC: 04
1554 12:44:57.492175 APIC: 07
1555 12:44:57.492278 Done allocating resources.
1556 12:44:57.498774 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1557 12:44:57.505529 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1558 12:44:57.508462 Configure GPIOs for I2S audio on UP4.
1559 12:44:57.515732 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1560 12:44:57.519404 Enabling resources...
1561 12:44:57.522364 PCI: 00:00.0 subsystem <- 8086/9a12
1562 12:44:57.525900 PCI: 00:00.0 cmd <- 06
1563 12:44:57.528876 PCI: 00:02.0 subsystem <- 8086/9a40
1564 12:44:57.532360 PCI: 00:02.0 cmd <- 03
1565 12:44:57.535427 PCI: 00:04.0 subsystem <- 8086/9a03
1566 12:44:57.539068 PCI: 00:04.0 cmd <- 02
1567 12:44:57.542179 PCI: 00:05.0 subsystem <- 8086/9a19
1568 12:44:57.542270 PCI: 00:05.0 cmd <- 02
1569 12:44:57.548848 PCI: 00:08.0 subsystem <- 8086/9a11
1570 12:44:57.548970 PCI: 00:08.0 cmd <- 06
1571 12:44:57.552368 PCI: 00:0d.0 subsystem <- 8086/9a13
1572 12:44:57.555428 PCI: 00:0d.0 cmd <- 02
1573 12:44:57.558513 PCI: 00:14.0 subsystem <- 8086/a0ed
1574 12:44:57.562253 PCI: 00:14.0 cmd <- 02
1575 12:44:57.565220 PCI: 00:14.2 subsystem <- 8086/a0ef
1576 12:44:57.568730 PCI: 00:14.2 cmd <- 02
1577 12:44:57.571748 PCI: 00:14.3 subsystem <- 8086/a0f0
1578 12:44:57.575424 PCI: 00:14.3 cmd <- 02
1579 12:44:57.578414 PCI: 00:15.0 subsystem <- 8086/a0e8
1580 12:44:57.582106 PCI: 00:15.0 cmd <- 02
1581 12:44:57.585166 PCI: 00:15.1 subsystem <- 8086/a0e9
1582 12:44:57.588413 PCI: 00:15.1 cmd <- 02
1583 12:44:57.591432 PCI: 00:15.2 subsystem <- 8086/a0ea
1584 12:44:57.591530 PCI: 00:15.2 cmd <- 02
1585 12:44:57.598790 PCI: 00:15.3 subsystem <- 8086/a0eb
1586 12:44:57.598884 PCI: 00:15.3 cmd <- 02
1587 12:44:57.601806 PCI: 00:16.0 subsystem <- 8086/a0e0
1588 12:44:57.605199 PCI: 00:16.0 cmd <- 02
1589 12:44:57.608842 PCI: 00:19.1 subsystem <- 8086/a0c6
1590 12:44:57.611666 PCI: 00:19.1 cmd <- 02
1591 12:44:57.615262 PCI: 00:1d.0 bridge ctrl <- 0013
1592 12:44:57.618372 PCI: 00:1d.0 subsystem <- 8086/a0b0
1593 12:44:57.621395 PCI: 00:1d.0 cmd <- 06
1594 12:44:57.625043 PCI: 00:1e.0 subsystem <- 8086/a0a8
1595 12:44:57.627910 PCI: 00:1e.0 cmd <- 06
1596 12:44:57.631442 PCI: 00:1e.2 subsystem <- 8086/a0aa
1597 12:44:57.634875 PCI: 00:1e.2 cmd <- 06
1598 12:44:57.637915 PCI: 00:1e.3 subsystem <- 8086/a0ab
1599 12:44:57.641469 PCI: 00:1e.3 cmd <- 02
1600 12:44:57.644531 PCI: 00:1f.0 subsystem <- 8086/a087
1601 12:44:57.648197 PCI: 00:1f.0 cmd <- 407
1602 12:44:57.651287 PCI: 00:1f.3 subsystem <- 8086/a0c8
1603 12:44:57.651369 PCI: 00:1f.3 cmd <- 02
1604 12:44:57.657730 PCI: 00:1f.5 subsystem <- 8086/a0a4
1605 12:44:57.657821 PCI: 00:1f.5 cmd <- 406
1606 12:44:57.663302 PCI: 01:00.0 cmd <- 02
1607 12:44:57.667580 done.
1608 12:44:57.671230 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1609 12:44:57.674286 Initializing devices...
1610 12:44:57.677380 Root Device init
1611 12:44:57.681032 Chrome EC: Set SMI mask to 0x0000000000000000
1612 12:44:57.687444 Chrome EC: clear events_b mask to 0x0000000000000000
1613 12:44:57.693951 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1614 12:44:57.697675 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1615 12:44:57.704378 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1616 12:44:57.710822 Chrome EC: Set WAKE mask to 0x0000000000000000
1617 12:44:57.713784 fw_config match found: DB_USB=USB3_ACTIVE
1618 12:44:57.720911 Configure Right Type-C port orientation for retimer
1619 12:44:57.724040 Root Device init finished in 42 msecs
1620 12:44:57.727497 PCI: 00:00.0 init
1621 12:44:57.730457 CPU TDP = 9 Watts
1622 12:44:57.730549 CPU PL1 = 9 Watts
1623 12:44:57.733962 CPU PL2 = 40 Watts
1624 12:44:57.734060 CPU PL4 = 83 Watts
1625 12:44:57.737346 PCI: 00:00.0 init finished in 8 msecs
1626 12:44:57.740323 PCI: 00:02.0 init
1627 12:44:57.743988 GMA: Found VBT in CBFS
1628 12:44:57.747062 GMA: Found valid VBT in CBFS
1629 12:44:57.750765 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1630 12:44:57.760346 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1631 12:44:57.763436 PCI: 00:02.0 init finished in 18 msecs
1632 12:44:57.767069 PCI: 00:05.0 init
1633 12:44:57.770096 PCI: 00:05.0 init finished in 0 msecs
1634 12:44:57.770214 PCI: 00:08.0 init
1635 12:44:57.776645 PCI: 00:08.0 init finished in 0 msecs
1636 12:44:57.776747 PCI: 00:14.0 init
1637 12:44:57.783415 PCI: 00:14.0 init finished in 0 msecs
1638 12:44:57.783505 PCI: 00:14.2 init
1639 12:44:57.787028 PCI: 00:14.2 init finished in 0 msecs
1640 12:44:57.790492 PCI: 00:15.0 init
1641 12:44:57.794164 I2C bus 0 version 0x3230302a
1642 12:44:57.797077 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1643 12:44:57.800572 PCI: 00:15.0 init finished in 6 msecs
1644 12:44:57.804100 PCI: 00:15.1 init
1645 12:44:57.807186 I2C bus 1 version 0x3230302a
1646 12:44:57.810260 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1647 12:44:57.813852 PCI: 00:15.1 init finished in 6 msecs
1648 12:44:57.817405 PCI: 00:15.2 init
1649 12:44:57.820378 I2C bus 2 version 0x3230302a
1650 12:44:57.823904 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1651 12:44:57.827422 PCI: 00:15.2 init finished in 6 msecs
1652 12:44:57.827507 PCI: 00:15.3 init
1653 12:44:57.830430 I2C bus 3 version 0x3230302a
1654 12:44:57.834373 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1655 12:44:57.840498 PCI: 00:15.3 init finished in 6 msecs
1656 12:44:57.840590 PCI: 00:16.0 init
1657 12:44:57.843905 PCI: 00:16.0 init finished in 0 msecs
1658 12:44:57.847533 PCI: 00:19.1 init
1659 12:44:57.851151 I2C bus 5 version 0x3230302a
1660 12:44:57.854191 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1661 12:44:57.857243 PCI: 00:19.1 init finished in 6 msecs
1662 12:44:57.860721 PCI: 00:1d.0 init
1663 12:44:57.864084 Initializing PCH PCIe bridge.
1664 12:44:57.867041 PCI: 00:1d.0 init finished in 3 msecs
1665 12:44:57.870701 PCI: 00:1f.0 init
1666 12:44:57.873776 IOAPIC: Initializing IOAPIC at 0xfec00000
1667 12:44:57.880479 IOAPIC: Bootstrap Processor Local APIC = 0x00
1668 12:44:57.880575 IOAPIC: ID = 0x02
1669 12:44:57.883554 IOAPIC: Dumping registers
1670 12:44:57.887267 reg 0x0000: 0x02000000
1671 12:44:57.887354 reg 0x0001: 0x00770020
1672 12:44:57.890303 reg 0x0002: 0x00000000
1673 12:44:57.894112 PCI: 00:1f.0 init finished in 21 msecs
1674 12:44:57.897518 PCI: 00:1f.2 init
1675 12:44:57.901113 Disabling ACPI via APMC.
1676 12:44:57.904056 APMC done.
1677 12:44:57.907749 PCI: 00:1f.2 init finished in 5 msecs
1678 12:44:57.918435 PCI: 01:00.0 init
1679 12:44:57.922067 PCI: 01:00.0 init finished in 0 msecs
1680 12:44:57.924894 PNP: 0c09.0 init
1681 12:44:57.928379 Google Chrome EC uptime: 8.390 seconds
1682 12:44:57.934867 Google Chrome AP resets since EC boot: 1
1683 12:44:57.938435 Google Chrome most recent AP reset causes:
1684 12:44:57.941323 0.377: 32775 shutdown: entering G3
1685 12:44:57.948520 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1686 12:44:57.951535 PNP: 0c09.0 init finished in 22 msecs
1687 12:44:57.957010 Devices initialized
1688 12:44:57.960604 Show all devs... After init.
1689 12:44:57.963619 Root Device: enabled 1
1690 12:44:57.963730 DOMAIN: 0000: enabled 1
1691 12:44:57.967111 CPU_CLUSTER: 0: enabled 1
1692 12:44:57.970762 PCI: 00:00.0: enabled 1
1693 12:44:57.973869 PCI: 00:02.0: enabled 1
1694 12:44:57.973977 PCI: 00:04.0: enabled 1
1695 12:44:57.976848 PCI: 00:05.0: enabled 1
1696 12:44:57.980301 PCI: 00:06.0: enabled 0
1697 12:44:57.983620 PCI: 00:07.0: enabled 0
1698 12:44:57.983710 PCI: 00:07.1: enabled 0
1699 12:44:57.987223 PCI: 00:07.2: enabled 0
1700 12:44:57.990300 PCI: 00:07.3: enabled 0
1701 12:44:57.993443 PCI: 00:08.0: enabled 1
1702 12:44:57.993530 PCI: 00:09.0: enabled 0
1703 12:44:57.997169 PCI: 00:0a.0: enabled 0
1704 12:44:58.000155 PCI: 00:0d.0: enabled 1
1705 12:44:58.003607 PCI: 00:0d.1: enabled 0
1706 12:44:58.003697 PCI: 00:0d.2: enabled 0
1707 12:44:58.006607 PCI: 00:0d.3: enabled 0
1708 12:44:58.010107 PCI: 00:0e.0: enabled 0
1709 12:44:58.013166 PCI: 00:10.2: enabled 1
1710 12:44:58.013247 PCI: 00:10.6: enabled 0
1711 12:44:58.016833 PCI: 00:10.7: enabled 0
1712 12:44:58.019856 PCI: 00:12.0: enabled 0
1713 12:44:58.019934 PCI: 00:12.6: enabled 0
1714 12:44:58.023357 PCI: 00:13.0: enabled 0
1715 12:44:58.026404 PCI: 00:14.0: enabled 1
1716 12:44:58.029976 PCI: 00:14.1: enabled 0
1717 12:44:58.030085 PCI: 00:14.2: enabled 1
1718 12:44:58.033385 PCI: 00:14.3: enabled 1
1719 12:44:58.036269 PCI: 00:15.0: enabled 1
1720 12:44:58.039927 PCI: 00:15.1: enabled 1
1721 12:44:58.040022 PCI: 00:15.2: enabled 1
1722 12:44:58.042885 PCI: 00:15.3: enabled 1
1723 12:44:58.046273 PCI: 00:16.0: enabled 1
1724 12:44:58.049819 PCI: 00:16.1: enabled 0
1725 12:44:58.049940 PCI: 00:16.2: enabled 0
1726 12:44:58.053291 PCI: 00:16.3: enabled 0
1727 12:44:58.056408 PCI: 00:16.4: enabled 0
1728 12:44:58.059514 PCI: 00:16.5: enabled 0
1729 12:44:58.059620 PCI: 00:17.0: enabled 0
1730 12:44:58.062907 PCI: 00:19.0: enabled 0
1731 12:44:58.066385 PCI: 00:19.1: enabled 1
1732 12:44:58.069330 PCI: 00:19.2: enabled 0
1733 12:44:58.069417 PCI: 00:1c.0: enabled 1
1734 12:44:58.072800 PCI: 00:1c.1: enabled 0
1735 12:44:58.076503 PCI: 00:1c.2: enabled 0
1736 12:44:58.076595 PCI: 00:1c.3: enabled 0
1737 12:44:58.079417 PCI: 00:1c.4: enabled 0
1738 12:44:58.083081 PCI: 00:1c.5: enabled 0
1739 12:44:58.086092 PCI: 00:1c.6: enabled 1
1740 12:44:58.086172 PCI: 00:1c.7: enabled 0
1741 12:44:58.089036 PCI: 00:1d.0: enabled 1
1742 12:44:58.092688 PCI: 00:1d.1: enabled 0
1743 12:44:58.095843 PCI: 00:1d.2: enabled 1
1744 12:44:58.095926 PCI: 00:1d.3: enabled 0
1745 12:44:58.099541 PCI: 00:1e.0: enabled 1
1746 12:44:58.102497 PCI: 00:1e.1: enabled 0
1747 12:44:58.106138 PCI: 00:1e.2: enabled 1
1748 12:44:58.106260 PCI: 00:1e.3: enabled 1
1749 12:44:58.108900 PCI: 00:1f.0: enabled 1
1750 12:44:58.112284 PCI: 00:1f.1: enabled 0
1751 12:44:58.115934 PCI: 00:1f.2: enabled 1
1752 12:44:58.116020 PCI: 00:1f.3: enabled 1
1753 12:44:58.119413 PCI: 00:1f.4: enabled 0
1754 12:44:58.122460 PCI: 00:1f.5: enabled 1
1755 12:44:58.125887 PCI: 00:1f.6: enabled 0
1756 12:44:58.125973 PCI: 00:1f.7: enabled 0
1757 12:44:58.128919 APIC: 00: enabled 1
1758 12:44:58.132412 GENERIC: 0.0: enabled 1
1759 12:44:58.132509 GENERIC: 0.0: enabled 1
1760 12:44:58.135960 GENERIC: 1.0: enabled 1
1761 12:44:58.138916 GENERIC: 0.0: enabled 1
1762 12:44:58.142390 GENERIC: 1.0: enabled 1
1763 12:44:58.142482 USB0 port 0: enabled 1
1764 12:44:58.145396 GENERIC: 0.0: enabled 1
1765 12:44:58.148928 USB0 port 0: enabled 1
1766 12:44:58.149012 GENERIC: 0.0: enabled 1
1767 12:44:58.152534 I2C: 00:1a: enabled 1
1768 12:44:58.155445 I2C: 00:31: enabled 1
1769 12:44:58.155540 I2C: 00:32: enabled 1
1770 12:44:58.159002 I2C: 00:10: enabled 1
1771 12:44:58.162032 I2C: 00:15: enabled 1
1772 12:44:58.165830 GENERIC: 0.0: enabled 0
1773 12:44:58.165920 GENERIC: 1.0: enabled 0
1774 12:44:58.168766 GENERIC: 0.0: enabled 1
1775 12:44:58.172116 SPI: 00: enabled 1
1776 12:44:58.172196 SPI: 00: enabled 1
1777 12:44:58.175679 PNP: 0c09.0: enabled 1
1778 12:44:58.179154 GENERIC: 0.0: enabled 1
1779 12:44:58.179238 USB3 port 0: enabled 1
1780 12:44:58.182176 USB3 port 1: enabled 1
1781 12:44:58.185709 USB3 port 2: enabled 0
1782 12:44:58.185792 USB3 port 3: enabled 0
1783 12:44:58.188959 USB2 port 0: enabled 0
1784 12:44:58.191926 USB2 port 1: enabled 1
1785 12:44:58.195652 USB2 port 2: enabled 1
1786 12:44:58.195739 USB2 port 3: enabled 0
1787 12:44:58.198637 USB2 port 4: enabled 1
1788 12:44:58.202257 USB2 port 5: enabled 0
1789 12:44:58.202340 USB2 port 6: enabled 0
1790 12:44:58.205429 USB2 port 7: enabled 0
1791 12:44:58.208964 USB2 port 8: enabled 0
1792 12:44:58.212366 USB2 port 9: enabled 0
1793 12:44:58.212489 USB3 port 0: enabled 0
1794 12:44:58.215450 USB3 port 1: enabled 1
1795 12:44:58.218929 USB3 port 2: enabled 0
1796 12:44:58.219025 USB3 port 3: enabled 0
1797 12:44:58.222088 GENERIC: 0.0: enabled 1
1798 12:44:58.225822 GENERIC: 1.0: enabled 1
1799 12:44:58.225911 APIC: 01: enabled 1
1800 12:44:58.228855 APIC: 05: enabled 1
1801 12:44:58.232444 APIC: 06: enabled 1
1802 12:44:58.232556 APIC: 03: enabled 1
1803 12:44:58.235372 APIC: 02: enabled 1
1804 12:44:58.238476 APIC: 04: enabled 1
1805 12:44:58.238565 APIC: 07: enabled 1
1806 12:44:58.242026 PCI: 01:00.0: enabled 1
1807 12:44:58.248507 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1808 12:44:58.252053 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1809 12:44:58.255605 ELOG: NV offset 0xf30000 size 0x1000
1810 12:44:58.262254 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1811 12:44:58.269427 ELOG: Event(17) added with size 13 at 2023-03-22 12:44:58 UTC
1812 12:44:58.275447 ELOG: Event(92) added with size 9 at 2023-03-22 12:44:58 UTC
1813 12:44:58.282405 ELOG: Event(93) added with size 9 at 2023-03-22 12:44:58 UTC
1814 12:44:58.289045 ELOG: Event(9E) added with size 10 at 2023-03-22 12:44:58 UTC
1815 12:44:58.295799 ELOG: Event(9F) added with size 14 at 2023-03-22 12:44:58 UTC
1816 12:44:58.302397 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1817 12:44:58.308567 ELOG: Event(A1) added with size 10 at 2023-03-22 12:44:58 UTC
1818 12:44:58.314954 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1819 12:44:58.321561 ELOG: Event(A0) added with size 9 at 2023-03-22 12:44:58 UTC
1820 12:44:58.325049 elog_add_boot_reason: Logged dev mode boot
1821 12:44:58.331857 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1822 12:44:58.334733 Finalize devices...
1823 12:44:58.334828 Devices finalized
1824 12:44:58.341704 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1825 12:44:58.344707 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1826 12:44:58.351780 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1827 12:44:58.354733 ME: HFSTS1 : 0x80030055
1828 12:44:58.361239 ME: HFSTS2 : 0x30280116
1829 12:44:58.364718 ME: HFSTS3 : 0x00000050
1830 12:44:58.371205 ME: HFSTS4 : 0x00004000
1831 12:44:58.374833 ME: HFSTS5 : 0x00000000
1832 12:44:58.377813 ME: HFSTS6 : 0x00400006
1833 12:44:58.381407 ME: Manufacturing Mode : YES
1834 12:44:58.384362 ME: SPI Protection Mode Enabled : NO
1835 12:44:58.391453 ME: FW Partition Table : OK
1836 12:44:58.394549 ME: Bringup Loader Failure : NO
1837 12:44:58.398201 ME: Firmware Init Complete : NO
1838 12:44:58.401233 ME: Boot Options Present : NO
1839 12:44:58.404795 ME: Update In Progress : NO
1840 12:44:58.407882 ME: D0i3 Support : YES
1841 12:44:58.411007 ME: Low Power State Enabled : NO
1842 12:44:58.414718 ME: CPU Replaced : YES
1843 12:44:58.421232 ME: CPU Replacement Valid : YES
1844 12:44:58.424185 ME: Current Working State : 5
1845 12:44:58.427910 ME: Current Operation State : 1
1846 12:44:58.431015 ME: Current Operation Mode : 3
1847 12:44:58.434757 ME: Error Code : 0
1848 12:44:58.437681 ME: Enhanced Debug Mode : NO
1849 12:44:58.441228 ME: CPU Debug Disabled : YES
1850 12:44:58.444080 ME: TXT Support : NO
1851 12:44:58.450721 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1852 12:44:58.460875 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1853 12:44:58.464454 CBFS: 'fallback/slic' not found.
1854 12:44:58.467454 ACPI: Writing ACPI tables at 76b01000.
1855 12:44:58.467548 ACPI: * FACS
1856 12:44:58.470843 ACPI: * DSDT
1857 12:44:58.473858 Ramoops buffer: 0x100000@0x76a00000.
1858 12:44:58.477405 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1859 12:44:58.484031 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1860 12:44:58.487356 Google Chrome EC: version:
1861 12:44:58.490534 ro: voema_v2.0.7540-147f8d37d1
1862 12:44:58.493924 rw: voema_v2.0.7540-147f8d37d1
1863 12:44:58.494017 running image: 2
1864 12:44:58.500464 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1865 12:44:58.505363 ACPI: * FADT
1866 12:44:58.505457 SCI is IRQ9
1867 12:44:58.511662 ACPI: added table 1/32, length now 40
1868 12:44:58.511759 ACPI: * SSDT
1869 12:44:58.515126 Found 1 CPU(s) with 8 core(s) each.
1870 12:44:58.521792 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1871 12:44:58.524821 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1872 12:44:58.528351 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1873 12:44:58.531348 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1874 12:44:58.537930 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1875 12:44:58.545102 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1876 12:44:58.547975 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1877 12:44:58.555084 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1878 12:44:58.561575 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1879 12:44:58.564582 \_SB.PCI0.RP09: Added StorageD3Enable property
1880 12:44:58.571068 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1881 12:44:58.574563 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1882 12:44:58.581135 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1883 12:44:58.584767 PS2K: Passing 80 keymaps to kernel
1884 12:44:58.591546 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1885 12:44:58.597715 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1886 12:44:58.604357 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1887 12:44:58.611259 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1888 12:44:58.618087 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1889 12:44:58.624656 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1890 12:44:58.630634 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1891 12:44:58.637827 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1892 12:44:58.640870 ACPI: added table 2/32, length now 44
1893 12:44:58.640963 ACPI: * MCFG
1894 12:44:58.647648 ACPI: added table 3/32, length now 48
1895 12:44:58.647741 ACPI: * TPM2
1896 12:44:58.651137 TPM2 log created at 0x769f0000
1897 12:44:58.654071 ACPI: added table 4/32, length now 52
1898 12:44:58.657761 ACPI: * MADT
1899 12:44:58.657845 SCI is IRQ9
1900 12:44:58.660721 ACPI: added table 5/32, length now 56
1901 12:44:58.664386 current = 76b09850
1902 12:44:58.664471 ACPI: * DMAR
1903 12:44:58.667335 ACPI: added table 6/32, length now 60
1904 12:44:58.674044 ACPI: added table 7/32, length now 64
1905 12:44:58.674149 ACPI: * HPET
1906 12:44:58.677642 ACPI: added table 8/32, length now 68
1907 12:44:58.680579 ACPI: done.
1908 12:44:58.680662 ACPI tables: 35216 bytes.
1909 12:44:58.683663 smbios_write_tables: 769ef000
1910 12:44:58.687428 EC returned error result code 3
1911 12:44:58.690472 Couldn't obtain OEM name from CBI
1912 12:44:58.694720 Create SMBIOS type 16
1913 12:44:58.697735 Create SMBIOS type 17
1914 12:44:58.701189 GENERIC: 0.0 (WIFI Device)
1915 12:44:58.701291 SMBIOS tables: 1750 bytes.
1916 12:44:58.707593 Writing table forward entry at 0x00000500
1917 12:44:58.714222 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1918 12:44:58.717879 Writing coreboot table at 0x76b25000
1919 12:44:58.723958 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1920 12:44:58.727648 1. 0000000000001000-000000000009ffff: RAM
1921 12:44:58.730704 2. 00000000000a0000-00000000000fffff: RESERVED
1922 12:44:58.737817 3. 0000000000100000-00000000769eefff: RAM
1923 12:44:58.740910 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1924 12:44:58.747544 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1925 12:44:58.754049 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1926 12:44:58.757518 7. 0000000077000000-000000007fbfffff: RESERVED
1927 12:44:58.764131 8. 00000000c0000000-00000000cfffffff: RESERVED
1928 12:44:58.767663 9. 00000000f8000000-00000000f9ffffff: RESERVED
1929 12:44:58.770906 10. 00000000fb000000-00000000fb000fff: RESERVED
1930 12:44:58.777540 11. 00000000fe000000-00000000fe00ffff: RESERVED
1931 12:44:58.780598 12. 00000000fed80000-00000000fed87fff: RESERVED
1932 12:44:58.787100 13. 00000000fed90000-00000000fed92fff: RESERVED
1933 12:44:58.790822 14. 00000000feda0000-00000000feda1fff: RESERVED
1934 12:44:58.797009 15. 00000000fedc0000-00000000feddffff: RESERVED
1935 12:44:58.800592 16. 0000000100000000-00000002803fffff: RAM
1936 12:44:58.803729 Passing 4 GPIOs to payload:
1937 12:44:58.807269 NAME | PORT | POLARITY | VALUE
1938 12:44:58.813777 lid | undefined | high | high
1939 12:44:58.820493 power | undefined | high | low
1940 12:44:58.823549 oprom | undefined | high | low
1941 12:44:58.830373 EC in RW | 0x000000e5 | high | high
1942 12:44:58.837037 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 3f85
1943 12:44:58.840459 coreboot table: 1576 bytes.
1944 12:44:58.843493 IMD ROOT 0. 0x76fff000 0x00001000
1945 12:44:58.847058 IMD SMALL 1. 0x76ffe000 0x00001000
1946 12:44:58.850040 FSP MEMORY 2. 0x76c4e000 0x003b0000
1947 12:44:58.853699 VPD 3. 0x76c4d000 0x00000367
1948 12:44:58.856828 RO MCACHE 4. 0x76c4c000 0x00000fdc
1949 12:44:58.860330 CONSOLE 5. 0x76c2c000 0x00020000
1950 12:44:58.863279 FMAP 6. 0x76c2b000 0x00000578
1951 12:44:58.869939 TIME STAMP 7. 0x76c2a000 0x00000910
1952 12:44:58.873120 VBOOT WORK 8. 0x76c16000 0x00014000
1953 12:44:58.876478 ROMSTG STCK 9. 0x76c15000 0x00001000
1954 12:44:58.880333 AFTER CAR 10. 0x76c0a000 0x0000b000
1955 12:44:58.883464 RAMSTAGE 11. 0x76b97000 0x00073000
1956 12:44:58.886409 REFCODE 12. 0x76b42000 0x00055000
1957 12:44:58.889927 SMM BACKUP 13. 0x76b32000 0x00010000
1958 12:44:58.892896 4f444749 14. 0x76b30000 0x00002000
1959 12:44:58.896416 EXT VBT15. 0x76b2d000 0x0000219f
1960 12:44:58.903144 COREBOOT 16. 0x76b25000 0x00008000
1961 12:44:58.906128 ACPI 17. 0x76b01000 0x00024000
1962 12:44:58.909766 ACPI GNVS 18. 0x76b00000 0x00001000
1963 12:44:58.912760 RAMOOPS 19. 0x76a00000 0x00100000
1964 12:44:58.916255 TPM2 TCGLOG20. 0x769f0000 0x00010000
1965 12:44:58.919213 SMBIOS 21. 0x769ef000 0x00000800
1966 12:44:58.922887 IMD small region:
1967 12:44:58.925914 IMD ROOT 0. 0x76ffec00 0x00000400
1968 12:44:58.929830 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1969 12:44:58.932768 POWER STATE 2. 0x76ffeb80 0x00000044
1970 12:44:58.939451 ROMSTAGE 3. 0x76ffeb60 0x00000004
1971 12:44:58.942449 MEM INFO 4. 0x76ffe980 0x000001e0
1972 12:44:58.949481 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1973 12:44:58.949588 MTRR: Physical address space:
1974 12:44:58.955605 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1975 12:44:58.962263 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1976 12:44:58.968754 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1977 12:44:58.975401 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1978 12:44:58.982436 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1979 12:44:58.988858 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1980 12:44:58.995236 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1981 12:44:58.998952 MTRR: Fixed MSR 0x250 0x0606060606060606
1982 12:44:59.001897 MTRR: Fixed MSR 0x258 0x0606060606060606
1983 12:44:59.005561 MTRR: Fixed MSR 0x259 0x0000000000000000
1984 12:44:59.012074 MTRR: Fixed MSR 0x268 0x0606060606060606
1985 12:44:59.015149 MTRR: Fixed MSR 0x269 0x0606060606060606
1986 12:44:59.018676 MTRR: Fixed MSR 0x26a 0x0606060606060606
1987 12:44:59.021767 MTRR: Fixed MSR 0x26b 0x0606060606060606
1988 12:44:59.028403 MTRR: Fixed MSR 0x26c 0x0606060606060606
1989 12:44:59.031940 MTRR: Fixed MSR 0x26d 0x0606060606060606
1990 12:44:59.035009 MTRR: Fixed MSR 0x26e 0x0606060606060606
1991 12:44:59.038549 MTRR: Fixed MSR 0x26f 0x0606060606060606
1992 12:44:59.042878 call enable_fixed_mtrr()
1993 12:44:59.045754 CPU physical address size: 39 bits
1994 12:44:59.052322 MTRR: default type WB/UC MTRR counts: 6/6.
1995 12:44:59.055778 MTRR: UC selected as default type.
1996 12:44:59.062278 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1997 12:44:59.066044 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1998 12:44:59.072618 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1999 12:44:59.079160 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2000 12:44:59.085858 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2001 12:44:59.092579 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2002 12:44:59.092708
2003 12:44:59.095635 MTRR check
2004 12:44:59.098575 Fixed MTRRs : Enabled
2005 12:44:59.098661 Variable MTRRs: Enabled
2006 12:44:59.098734
2007 12:44:59.105752 MTRR: Fixed MSR 0x250 0x0606060606060606
2008 12:44:59.108771 MTRR: Fixed MSR 0x258 0x0606060606060606
2009 12:44:59.112423 MTRR: Fixed MSR 0x259 0x0000000000000000
2010 12:44:59.115561 MTRR: Fixed MSR 0x268 0x0606060606060606
2011 12:44:59.122037 MTRR: Fixed MSR 0x269 0x0606060606060606
2012 12:44:59.125114 MTRR: Fixed MSR 0x26a 0x0606060606060606
2013 12:44:59.128846 MTRR: Fixed MSR 0x26b 0x0606060606060606
2014 12:44:59.131932 MTRR: Fixed MSR 0x26c 0x0606060606060606
2015 12:44:59.135629 MTRR: Fixed MSR 0x26d 0x0606060606060606
2016 12:44:59.142185 MTRR: Fixed MSR 0x26e 0x0606060606060606
2017 12:44:59.145182 MTRR: Fixed MSR 0x26f 0x0606060606060606
2018 12:44:59.151771 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2019 12:44:59.155157 call enable_fixed_mtrr()
2020 12:44:59.158527 Checking cr50 for pending updates
2021 12:44:59.162747 CPU physical address size: 39 bits
2022 12:44:59.166287 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 12:44:59.169397 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:44:59.172823 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:44:59.179572 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 12:44:59.182489 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 12:44:59.186307 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 12:44:59.189259 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 12:44:59.192974 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 12:44:59.199435 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 12:44:59.202997 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 12:44:59.205753 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 12:44:59.209325 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 12:44:59.216681 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 12:44:59.216787 call enable_fixed_mtrr()
2036 12:44:59.223506 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 12:44:59.227069 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 12:44:59.230559 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 12:44:59.233591 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 12:44:59.240298 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 12:44:59.243272 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 12:44:59.246949 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 12:44:59.250014 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 12:44:59.256413 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 12:44:59.260226 CPU physical address size: 39 bits
2046 12:44:59.263303 call enable_fixed_mtrr()
2047 12:44:59.266964 Reading cr50 TPM mode
2048 12:44:59.270413 MTRR: Fixed MSR 0x250 0x0606060606060606
2049 12:44:59.274123 MTRR: Fixed MSR 0x250 0x0606060606060606
2050 12:44:59.277031 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 12:44:59.280571 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 12:44:59.287093 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 12:44:59.290732 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 12:44:59.293798 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 12:44:59.297361 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 12:44:59.303642 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 12:44:59.307131 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 12:44:59.310658 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 12:44:59.313418 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 12:44:59.320909 MTRR: Fixed MSR 0x258 0x0606060606060606
2061 12:44:59.321024 call enable_fixed_mtrr()
2062 12:44:59.327580 MTRR: Fixed MSR 0x259 0x0000000000000000
2063 12:44:59.331129 MTRR: Fixed MSR 0x268 0x0606060606060606
2064 12:44:59.334173 MTRR: Fixed MSR 0x269 0x0606060606060606
2065 12:44:59.337823 MTRR: Fixed MSR 0x26a 0x0606060606060606
2066 12:44:59.344482 MTRR: Fixed MSR 0x26b 0x0606060606060606
2067 12:44:59.347525 MTRR: Fixed MSR 0x26c 0x0606060606060606
2068 12:44:59.350668 MTRR: Fixed MSR 0x26d 0x0606060606060606
2069 12:44:59.354361 MTRR: Fixed MSR 0x26e 0x0606060606060606
2070 12:44:59.361003 MTRR: Fixed MSR 0x26f 0x0606060606060606
2071 12:44:59.364036 CPU physical address size: 39 bits
2072 12:44:59.367569 call enable_fixed_mtrr()
2073 12:44:59.370619 MTRR: Fixed MSR 0x250 0x0606060606060606
2074 12:44:59.374213 MTRR: Fixed MSR 0x250 0x0606060606060606
2075 12:44:59.380667 MTRR: Fixed MSR 0x258 0x0606060606060606
2076 12:44:59.384340 MTRR: Fixed MSR 0x259 0x0000000000000000
2077 12:44:59.387407 MTRR: Fixed MSR 0x268 0x0606060606060606
2078 12:44:59.390989 MTRR: Fixed MSR 0x269 0x0606060606060606
2079 12:44:59.397474 MTRR: Fixed MSR 0x26a 0x0606060606060606
2080 12:44:59.400405 MTRR: Fixed MSR 0x26b 0x0606060606060606
2081 12:44:59.403756 MTRR: Fixed MSR 0x26c 0x0606060606060606
2082 12:44:59.407346 MTRR: Fixed MSR 0x26d 0x0606060606060606
2083 12:44:59.413838 MTRR: Fixed MSR 0x26e 0x0606060606060606
2084 12:44:59.417283 MTRR: Fixed MSR 0x26f 0x0606060606060606
2085 12:44:59.420396 MTRR: Fixed MSR 0x258 0x0606060606060606
2086 12:44:59.423907 call enable_fixed_mtrr()
2087 12:44:59.426986 MTRR: Fixed MSR 0x259 0x0000000000000000
2088 12:44:59.433638 MTRR: Fixed MSR 0x268 0x0606060606060606
2089 12:44:59.437161 MTRR: Fixed MSR 0x269 0x0606060606060606
2090 12:44:59.440191 MTRR: Fixed MSR 0x26a 0x0606060606060606
2091 12:44:59.443760 MTRR: Fixed MSR 0x26b 0x0606060606060606
2092 12:44:59.450390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2093 12:44:59.453549 MTRR: Fixed MSR 0x26d 0x0606060606060606
2094 12:44:59.457044 MTRR: Fixed MSR 0x26e 0x0606060606060606
2095 12:44:59.460157 MTRR: Fixed MSR 0x26f 0x0606060606060606
2096 12:44:59.464300 CPU physical address size: 39 bits
2097 12:44:59.470960 call enable_fixed_mtrr()
2098 12:44:59.473836 CPU physical address size: 39 bits
2099 12:44:59.477362 BS: BS_PAYLOAD_LOAD entry times (exec / console): 113 / 6 ms
2100 12:44:59.487056 CPU physical address size: 39 bits
2101 12:44:59.490626 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 12:44:59.493632 CPU physical address size: 39 bits
2103 12:44:59.497349 Checking segment from ROM address 0xffc02b38
2104 12:44:59.503856 Checking segment from ROM address 0xffc02b54
2105 12:44:59.506954 Loading segment from ROM address 0xffc02b38
2106 12:44:59.510360 code (compression=0)
2107 12:44:59.516725 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2108 12:44:59.526786 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2109 12:44:59.529812 it's not compressed!
2110 12:44:59.667638 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2111 12:44:59.674169 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2112 12:44:59.680902 Loading segment from ROM address 0xffc02b54
2113 12:44:59.683767 Entry Point 0x30000000
2114 12:44:59.683855 Loaded segments
2115 12:44:59.690435 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2116 12:44:59.733623 Finalizing chipset.
2117 12:44:59.736719 Finalizing SMM.
2118 12:44:59.736810 APMC done.
2119 12:44:59.743445 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2120 12:44:59.746487 mp_park_aps done after 0 msecs.
2121 12:44:59.750153 Jumping to boot code at 0x30000000(0x76b25000)
2122 12:44:59.759925 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2123 12:44:59.760022
2124 12:44:59.762962
2125 12:44:59.763049
2126 12:44:59.763398 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2127 12:44:59.763499 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2128 12:44:59.763585 Setting prompt string to ['volteer:']
2129 12:44:59.763666 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2130 12:44:59.766665 Starting depthcharge on Voema...
2131 12:44:59.766752
2132 12:44:59.773301 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2133 12:44:59.773388
2134 12:44:59.779942 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2135 12:44:59.780031
2136 12:44:59.786472 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2137 12:44:59.786628
2138 12:44:59.789462 Failed to find eMMC card reader
2139 12:44:59.789549
2140 12:44:59.793044 Wipe memory regions:
2141 12:44:59.793130
2142 12:44:59.796088 [0x00000000001000, 0x000000000a0000)
2143 12:44:59.796174
2144 12:44:59.799888 [0x00000000100000, 0x00000030000000)
2145 12:44:59.825845
2146 12:44:59.829427 [0x00000032662db0, 0x000000769ef000)
2147 12:44:59.864991
2148 12:44:59.868492 [0x00000100000000, 0x00000280400000)
2149 12:45:00.070837
2150 12:45:00.074461 ec_init: CrosEC protocol v3 supported (256, 256)
2151 12:45:00.074621
2152 12:45:00.080692 update_port_state: port C0 state: usb enable 1 mux conn 0
2153 12:45:00.080799
2154 12:45:00.090416 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2155 12:45:00.090525
2156 12:45:00.093960 pmc_check_ipc_sts: STS_BUSY done after 1516 us
2157 12:45:00.097080
2158 12:45:00.100468 send_conn_disc_msg: pmc_send_cmd succeeded
2159 12:45:00.531484
2160 12:45:00.531628 R8152: Initializing
2161 12:45:00.531698
2162 12:45:00.534859 Version 6 (ocp_data = 5c30)
2163 12:45:00.534949
2164 12:45:00.537975 R8152: Done initializing
2165 12:45:00.538073
2166 12:45:00.541031 Adding net device
2167 12:45:00.844644
2168 12:45:00.847984 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2169 12:45:00.848080
2170 12:45:00.848150
2171 12:45:00.848215
2172 12:45:00.851352 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2174 12:45:00.952166 volteer: tftpboot 192.168.201.1 9729661/tftp-deploy-4lhhmppz/kernel/bzImage 9729661/tftp-deploy-4lhhmppz/kernel/cmdline 9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
2175 12:45:00.952336 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2176 12:45:00.952425 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2177 12:45:00.956585 tftpboot 192.168.201.1 9729661/tftp-deploy-4lhhmppz/kernel/bzImoy-4lhhmppz/kernel/cmdline 9729661/tftp-deploy-4lhhmppz/ramdisk/ramdisk.cpio.gz
2178 12:45:00.956684
2179 12:45:00.956755 Waiting for link
2180 12:45:01.160040
2181 12:45:01.160185 done.
2182 12:45:01.160255
2183 12:45:01.160321 MAC: 00:24:32:30:79:06
2184 12:45:01.160384
2185 12:45:01.163572 Sending DHCP discover... done.
2186 12:45:01.163662
2187 12:45:01.166494 Waiting for reply... done.
2188 12:45:01.166624
2189 12:45:01.169516 Sending DHCP request... done.
2190 12:45:01.169604
2191 12:45:01.173286 Waiting for reply... done.
2192 12:45:01.173375
2193 12:45:01.176263 My ip is 192.168.201.23
2194 12:45:01.176351
2195 12:45:01.179670 The DHCP server ip is 192.168.201.1
2196 12:45:01.179758
2197 12:45:01.182562 TFTP server IP predefined by user: 192.168.201.1
2198 12:45:01.182652
2199 12:45:01.192554 Bootfile predefined by user: 9729661/tftp-deploy-4lhhmppz/kernel/bzImage
2200 12:45:01.192649
2201 12:45:01.196067 Sending tftp read request... done.
2202 12:45:01.196183
2203 12:45:01.199648 Waiting for the transfer...
2204 12:45:01.199736
2205 12:45:01.728775 00000000 ################################################################
2206 12:45:01.728921
2207 12:45:02.260058 00080000 ################################################################
2208 12:45:02.260212
2209 12:45:02.778168 00100000 ################################################################
2210 12:45:02.778350
2211 12:45:03.294702 00180000 ################################################################
2212 12:45:03.294846
2213 12:45:03.812296 00200000 ################################################################
2214 12:45:03.812436
2215 12:45:04.325819 00280000 ################################################################
2216 12:45:04.325965
2217 12:45:04.839242 00300000 ################################################################
2218 12:45:04.839397
2219 12:45:05.354795 00380000 ################################################################
2220 12:45:05.354937
2221 12:45:05.882034 00400000 ################################################################
2222 12:45:05.882180
2223 12:45:06.410154 00480000 ################################################################
2224 12:45:06.410292
2225 12:45:06.938274 00500000 ################################################################
2226 12:45:06.938443
2227 12:45:07.464001 00580000 ################################################################
2228 12:45:07.464142
2229 12:45:07.974661 00600000 ################################################################
2230 12:45:07.974842
2231 12:45:08.480492 00680000 ################################################################
2232 12:45:08.480654
2233 12:45:08.985707 00700000 ################################################################
2234 12:45:08.985850
2235 12:45:09.495403 00780000 ################################################################
2236 12:45:09.495549
2237 12:45:10.009646 00800000 ################################################################
2238 12:45:10.009791
2239 12:45:10.527469 00880000 ################################################################
2240 12:45:10.527615
2241 12:45:11.046475 00900000 ################################################################
2242 12:45:11.046630
2243 12:45:11.560620 00980000 ################################################################
2244 12:45:11.560764
2245 12:45:12.070081 00a00000 ################################################################
2246 12:45:12.070228
2247 12:45:12.580821 00a80000 ################################################################
2248 12:45:12.580971
2249 12:45:12.689590 00b00000 ############## done.
2250 12:45:12.689730
2251 12:45:12.692678 The bootfile was 11646080 bytes long.
2252 12:45:12.692765
2253 12:45:12.696141 Sending tftp read request... done.
2254 12:45:12.696228
2255 12:45:12.699122 Waiting for the transfer...
2256 12:45:12.699215
2257 12:45:13.207989 00000000 ################################################################
2258 12:45:13.208136
2259 12:45:13.720642 00080000 ################################################################
2260 12:45:13.720793
2261 12:45:14.231672 00100000 ################################################################
2262 12:45:14.231817
2263 12:45:14.746924 00180000 ################################################################
2264 12:45:14.747065
2265 12:45:15.260405 00200000 ################################################################
2266 12:45:15.260545
2267 12:45:15.770038 00280000 ################################################################
2268 12:45:15.770186
2269 12:45:16.282013 00300000 ################################################################
2270 12:45:16.282156
2271 12:45:16.797655 00380000 ################################################################
2272 12:45:16.797795
2273 12:45:17.325799 00400000 ################################################################
2274 12:45:17.326012
2275 12:45:17.853631 00480000 ################################################################
2276 12:45:17.853770
2277 12:45:18.393832 00500000 ################################################################
2278 12:45:18.393973
2279 12:45:18.919730 00580000 ################################################################
2280 12:45:18.919872
2281 12:45:19.043666 00600000 ############### done.
2282 12:45:19.043800
2283 12:45:19.046502 Sending tftp read request... done.
2284 12:45:19.046631
2285 12:45:19.046701 Waiting for the transfer...
2286 12:45:19.050156
2287 12:45:19.050242 00000000 # done.
2288 12:45:19.050313
2289 12:45:19.059916 Command line loaded dynamically from TFTP file: 9729661/tftp-deploy-4lhhmppz/kernel/cmdline
2290 12:45:19.060007
2291 12:45:19.079844 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729661/extract-nfsrootfs-734j389c,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2292 12:45:19.086240
2293 12:45:19.089875 Shutting down all USB controllers.
2294 12:45:19.089962
2295 12:45:19.090045 Removing current net device
2296 12:45:19.090111
2297 12:45:19.092883 Finalizing coreboot
2298 12:45:19.092970
2299 12:45:19.099621 Exiting depthcharge with code 4 at timestamp: 27984907
2300 12:45:19.099708
2301 12:45:19.099777
2302 12:45:19.099840 Starting kernel ...
2303 12:45:19.099902
2304 12:45:19.099962
2305 12:45:19.100349 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2306 12:45:19.100446 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2307 12:45:19.100526 Setting prompt string to ['Linux version [0-9]']
2308 12:45:19.100596 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2309 12:45:19.100666 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2311 12:49:44.101540 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2313 12:49:44.102780 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2315 12:49:44.103725 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2318 12:49:44.105277 end: 2 depthcharge-action (duration 00:05:00) [common]
2320 12:49:44.106580 Cleaning after the job
2321 12:49:44.107083 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/ramdisk
2322 12:49:44.110022 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/kernel
2323 12:49:44.114331 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/nfsrootfs
2324 12:49:44.191235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729661/tftp-deploy-4lhhmppz/modules
2325 12:49:44.191692 start: 4.1 power-off (timeout 00:00:30) [common]
2326 12:49:44.191856 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-2' '--port=1' '--command=off'
2327 12:49:44.267861 >> Command sent successfully.
2328 12:49:44.272033 Returned 0 in 0 seconds
2329 12:49:44.373350 end: 4.1 power-off (duration 00:00:00) [common]
2331 12:49:44.374940 start: 4.2 read-feedback (timeout 00:10:00) [common]
2332 12:49:44.376178 Listened to connection for namespace 'common' for up to 1s
2333 12:49:45.378768 Finalising connection for namespace 'common'
2334 12:49:45.379438 Disconnecting from shell: Finalise
2335 12:49:45.379885
2336 12:49:45.482198 end: 4.2 read-feedback (duration 00:00:01) [common]
2337 12:49:45.482779 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729661
2338 12:49:45.643476 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729661
2339 12:49:45.643696 JobError: Your job cannot terminate cleanly.